1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
33 #include "opcode/i386.h"
35 #ifndef REGISTER_WARNINGS
36 #define REGISTER_WARNINGS 1
39 #ifndef INFER_ADDR_PREFIX
40 #define INFER_ADDR_PREFIX 1
43 #ifndef SCALE1_WHEN_NO_INDEX
44 /* Specifying a scale factor besides 1 when there is no index is
45 futile. eg. `mov (%ebx,2),%al' does exactly the same as
46 `mov (%ebx),%al'. To slavishly follow what the programmer
47 specified, set SCALE1_WHEN_NO_INDEX to 0. */
48 #define SCALE1_WHEN_NO_INDEX 1
54 static unsigned int mode_from_disp_size
PARAMS ((unsigned int));
55 static int fits_in_signed_byte
PARAMS ((long));
56 static int fits_in_unsigned_byte
PARAMS ((long));
57 static int fits_in_unsigned_word
PARAMS ((long));
58 static int fits_in_signed_word
PARAMS ((long));
59 static int smallest_imm_type
PARAMS ((long));
60 static int add_prefix
PARAMS ((unsigned int));
61 static void set_16bit_code_flag
PARAMS ((int));
62 static void set_16bit_gcc_code_flag
PARAMS((int));
63 static void set_intel_syntax
PARAMS ((int));
66 static bfd_reloc_code_real_type reloc
67 PARAMS ((int, int, bfd_reloc_code_real_type
));
70 /* 'md_assemble ()' gathers together information and puts it into a
77 const reg_entry
*regs
;
82 /* TM holds the template for the insn were currently assembling. */
85 /* SUFFIX holds the instruction mnemonic suffix if given.
86 (e.g. 'l' for 'movl') */
89 /* OPERANDS gives the number of given operands. */
90 unsigned int operands
;
92 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
93 of given register, displacement, memory operands and immediate
95 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
97 /* TYPES [i] is the type (see above #defines) which tells us how to
98 use OP[i] for the corresponding operand. */
99 unsigned int types
[MAX_OPERANDS
];
101 /* Displacement expression, immediate expression, or register for each
103 union i386_op op
[MAX_OPERANDS
];
105 /* Relocation type for operand */
107 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
109 int disp_reloc
[MAX_OPERANDS
];
112 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
113 the base index byte below. */
114 const reg_entry
*base_reg
;
115 const reg_entry
*index_reg
;
116 unsigned int log2_scale_factor
;
118 /* SEG gives the seg_entries of this insn. They are zero unless
119 explicit segment overrides are given. */
120 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
122 /* PREFIX holds all the given prefix opcodes (usually null).
123 PREFIXES is the number of prefix opcodes. */
124 unsigned int prefixes
;
125 unsigned char prefix
[MAX_PREFIXES
];
127 /* RM and SIB are the modrm byte and the sib byte where the
128 addressing modes of this insn are encoded. */
134 typedef struct _i386_insn i386_insn
;
136 /* List of chars besides those in app.c:symbol_chars that can start an
137 operand. Used to prevent the scrubber eating vital white-space. */
139 const char extra_symbol_chars
[] = "*%-(@";
141 const char extra_symbol_chars
[] = "*%-(";
144 /* This array holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful */
146 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
147 /* Putting '/' here makes it impossible to use the divide operator.
148 However, we need it for compatibility with SVR4 systems. */
149 const char comment_chars
[] = "#/";
150 #define PREFIX_SEPARATOR '\\'
152 const char comment_chars
[] = "#";
153 #define PREFIX_SEPARATOR '/'
156 /* This array holds the chars that only start a comment at the beginning of
157 a line. If the line seems to have the form '# 123 filename'
158 .line and .file directives will appear in the pre-processed output */
159 /* Note that input_file.c hand checks for '#' at the beginning of the
160 first line of the input file. This is because the compiler outputs
161 #NO_APP at the beginning of its output. */
162 /* Also note that comments started like this one will always work if
163 '/' isn't otherwise defined. */
164 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
165 const char line_comment_chars
[] = "";
167 const char line_comment_chars
[] = "/";
170 const char line_separator_chars
[] = "";
172 /* Chars that can be used to separate mant from exp in floating point nums */
173 const char EXP_CHARS
[] = "eE";
175 /* Chars that mean this number is a floating point constant */
178 const char FLT_CHARS
[] = "fFdDxX";
180 /* tables for lexical analysis */
181 static char mnemonic_chars
[256];
182 static char register_chars
[256];
183 static char operand_chars
[256];
184 static char identifier_chars
[256];
185 static char digit_chars
[256];
188 #define is_mnemonic_char(x) (mnemonic_chars[(unsigned char) x])
189 #define is_operand_char(x) (operand_chars[(unsigned char) x])
190 #define is_register_char(x) (register_chars[(unsigned char) x])
191 #define is_space_char(x) ((x) == ' ')
192 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
193 #define is_digit_char(x) (digit_chars[(unsigned char) x])
195 /* put here all non-digit non-letter charcters that may occur in an operand */
196 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
198 /* md_assemble() always leaves the strings it's passed unaltered. To
199 effect this we maintain a stack of saved characters that we've smashed
200 with '\0's (indicating end of strings for various sub-fields of the
201 assembler instruction). */
202 static char save_stack
[32];
203 static char *save_stack_p
; /* stack pointer */
204 #define END_STRING_AND_SAVE(s) \
205 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
206 #define RESTORE_END_STRING(s) \
207 do { *(s) = *--save_stack_p; } while (0)
209 /* The instruction we're assembling. */
212 /* Possible templates for current insn. */
213 static const templates
*current_templates
;
215 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
216 static expressionS disp_expressions
[2], im_expressions
[2];
218 static int this_operand
; /* current operand we are working on */
220 static int flag_do_long_jump
; /* FIXME what does this do? */
222 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
224 static int intel_syntax
= 0; /* 1 for intel syntax, 0 if att syntax */
226 static int allow_naked_reg
= 0; /* 1 if register prefix % not required */
228 static char stackop_size
= '\0'; /* Used in 16 bit gcc mode to add an l
229 suffix to call, ret, enter, leave, push,
230 and pop instructions so that gcc has the
231 same stack frame as in 32 bit mode. */
233 /* Interface to relax_segment.
234 There are 2 relax states for 386 jump insns: one for conditional &
235 one for unconditional jumps. This is because these two types of
236 jumps add different sizes to frags when we're figuring out what
237 sort of jump to choose to reach a given label. */
240 #define COND_JUMP 1 /* conditional jump */
241 #define UNCOND_JUMP 2 /* unconditional jump */
245 #define SMALL16 (SMALL|CODE16)
247 #define BIG16 (BIG|CODE16)
251 #define INLINE __inline__
257 #define ENCODE_RELAX_STATE(type,size) \
258 ((relax_substateT)((type<<2) | (size)))
259 #define SIZE_FROM_RELAX_STATE(s) \
260 ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) )
262 /* This table is used by relax_frag to promote short jumps to long
263 ones where necessary. SMALL (short) jumps may be promoted to BIG
264 (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We
265 don't allow a short jump in a 32 bit code segment to be promoted to
266 a 16 bit offset jump because it's slower (requires data size
267 prefix), and doesn't work, unless the destination is in the bottom
268 64k of the code segment (The top 16 bits of eip are zeroed). */
270 const relax_typeS md_relax_table
[] =
273 1) most positive reach of this state,
274 2) most negative reach of this state,
275 3) how many bytes this mode will add to the size of the current frag
276 4) which index into the table to try if we can't fit into this one.
283 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG
)},
284 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG16
)},
285 /* dword conditionals adds 4 bytes to frag:
286 1 extra opcode byte, 3 extra displacement bytes. */
288 /* word conditionals add 2 bytes to frag:
289 1 extra opcode byte, 1 extra displacement byte. */
292 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
)},
293 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
)},
294 /* dword jmp adds 3 bytes to frag:
295 0 extra opcode bytes, 3 extra displacement bytes. */
297 /* word jmp adds 1 byte to frag:
298 0 extra opcode bytes, 1 extra displacement byte. */
305 i386_align_code (fragP
, count
)
309 /* Various efficient no-op patterns for aligning code labels. */
310 /* Note: Don't try to assemble the instructions in the comments. */
311 /* 0L and 0w are not legal */
312 static const char f32_1
[] =
314 static const char f32_2
[] =
315 {0x89,0xf6}; /* movl %esi,%esi */
316 static const char f32_3
[] =
317 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
318 static const char f32_4
[] =
319 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
320 static const char f32_5
[] =
322 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
323 static const char f32_6
[] =
324 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
325 static const char f32_7
[] =
326 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
327 static const char f32_8
[] =
329 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
330 static const char f32_9
[] =
331 {0x89,0xf6, /* movl %esi,%esi */
332 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
333 static const char f32_10
[] =
334 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
335 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
336 static const char f32_11
[] =
337 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
338 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
339 static const char f32_12
[] =
340 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
341 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
342 static const char f32_13
[] =
343 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
344 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
345 static const char f32_14
[] =
346 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
347 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
348 static const char f32_15
[] =
349 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
350 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
351 static const char f16_3
[] =
352 {0x8d,0x74,0x00}; /* lea 0(%esi),%esi */
353 static const char f16_4
[] =
354 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
355 static const char f16_5
[] =
357 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
358 static const char f16_6
[] =
359 {0x89,0xf6, /* mov %si,%si */
360 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
361 static const char f16_7
[] =
362 {0x8d,0x74,0x00, /* lea 0(%si),%si */
363 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
364 static const char f16_8
[] =
365 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
366 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
367 static const char *const f32_patt
[] = {
368 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
369 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
371 static const char *const f16_patt
[] = {
372 f32_1
, f32_2
, f16_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
373 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
376 if (count
> 0 && count
<= 15)
380 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
381 f16_patt
[count
- 1], count
);
382 if (count
> 8) /* adjust jump offset */
383 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
386 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
387 f32_patt
[count
- 1], count
);
388 fragP
->fr_var
= count
;
392 static char *output_invalid
PARAMS ((int c
));
393 static int i386_operand
PARAMS ((char *operand_string
));
394 static int i386_intel_operand
PARAMS ((char *operand_string
, int got_a_float
));
395 static const reg_entry
*parse_register
PARAMS ((char *reg_string
,
399 static void s_bss
PARAMS ((int));
402 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
404 static INLINE
unsigned int
405 mode_from_disp_size (t
)
408 return (t
& Disp8
) ? 1 : (t
& (Disp16
|Disp32
)) ? 2 : 0;
412 fits_in_signed_byte (num
)
415 return (num
>= -128) && (num
<= 127);
416 } /* fits_in_signed_byte() */
419 fits_in_unsigned_byte (num
)
422 return (num
& 0xff) == num
;
423 } /* fits_in_unsigned_byte() */
426 fits_in_unsigned_word (num
)
429 return (num
& 0xffff) == num
;
430 } /* fits_in_unsigned_word() */
433 fits_in_signed_word (num
)
436 return (-32768 <= num
) && (num
<= 32767);
437 } /* fits_in_signed_word() */
440 smallest_imm_type (num
)
444 /* This code is disabled because all the Imm1 forms in the opcode table
445 are slower on the i486, and they're the versions with the implicitly
446 specified single-position displacement, which has another syntax if
447 you really want to use that form. If you really prefer to have the
448 one-byte-shorter Imm1 form despite these problems, re-enable this
451 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
453 return (fits_in_signed_byte (num
)
454 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
455 : fits_in_unsigned_byte (num
)
456 ? (Imm8
| Imm16
| Imm32
)
457 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
460 } /* smallest_imm_type() */
462 /* Returns 0 if attempting to add a prefix where one from the same
463 class already exists, 1 if non rep/repne added, 2 if rep/repne
477 case CS_PREFIX_OPCODE
:
478 case DS_PREFIX_OPCODE
:
479 case ES_PREFIX_OPCODE
:
480 case FS_PREFIX_OPCODE
:
481 case GS_PREFIX_OPCODE
:
482 case SS_PREFIX_OPCODE
:
486 case REPNE_PREFIX_OPCODE
:
487 case REPE_PREFIX_OPCODE
:
490 case LOCK_PREFIX_OPCODE
:
498 case ADDR_PREFIX_OPCODE
:
502 case DATA_PREFIX_OPCODE
:
509 as_bad (_("same type of prefix used twice"));
514 i
.prefix
[q
] = prefix
;
519 set_16bit_code_flag (new_16bit_code_flag
)
520 int new_16bit_code_flag
;
522 flag_16bit_code
= new_16bit_code_flag
;
527 set_16bit_gcc_code_flag (new_16bit_code_flag
)
528 int new_16bit_code_flag
;
530 flag_16bit_code
= new_16bit_code_flag
;
531 stackop_size
= new_16bit_code_flag
? 'l' : '\0';
535 set_intel_syntax (syntax_flag
)
538 /* Find out if register prefixing is specified. */
539 int ask_naked_reg
= 0;
542 if (! is_end_of_line
[(unsigned char) *input_line_pointer
])
544 char *string
= input_line_pointer
;
545 int e
= get_symbol_end ();
547 if (strcmp(string
, "prefix") == 0)
549 else if (strcmp(string
, "noprefix") == 0)
552 as_bad (_("Bad argument to syntax directive."));
553 *input_line_pointer
= e
;
555 demand_empty_rest_of_line ();
557 intel_syntax
= syntax_flag
;
559 if (ask_naked_reg
== 0)
562 allow_naked_reg
= (intel_syntax
563 && (bfd_get_symbol_leading_char (stdoutput
) != '\0'));
565 allow_naked_reg
= 0; /* conservative default */
569 allow_naked_reg
= (ask_naked_reg
< 0);
572 const pseudo_typeS md_pseudo_table
[] =
577 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
578 {"align", s_align_bytes
, 0},
580 {"align", s_align_ptwo
, 0},
582 {"ffloat", float_cons
, 'f'},
583 {"dfloat", float_cons
, 'd'},
584 {"tfloat", float_cons
, 'x'},
586 {"noopt", s_ignore
, 0},
587 {"optim", s_ignore
, 0},
588 {"code16gcc", set_16bit_gcc_code_flag
, 1},
589 {"code16", set_16bit_code_flag
, 1},
590 {"code32", set_16bit_code_flag
, 0},
591 {"intel_syntax", set_intel_syntax
, 1},
592 {"att_syntax", set_intel_syntax
, 0},
596 /* for interface with expression () */
597 extern char *input_line_pointer
;
599 /* hash table for instruction mnemonic lookup */
600 static struct hash_control
*op_hash
;
601 /* hash table for register lookup */
602 static struct hash_control
*reg_hash
;
608 const char *hash_err
;
610 /* initialize op_hash hash table */
611 op_hash
= hash_new ();
614 register const template *optab
;
615 register templates
*core_optab
;
617 optab
= i386_optab
; /* setup for loop */
618 core_optab
= (templates
*) xmalloc (sizeof (templates
));
619 core_optab
->start
= optab
;
624 if (optab
->name
== NULL
625 || strcmp (optab
->name
, (optab
- 1)->name
) != 0)
627 /* different name --> ship out current template list;
628 add to hash table; & begin anew */
629 core_optab
->end
= optab
;
630 hash_err
= hash_insert (op_hash
,
636 as_fatal (_("Internal Error: Can't hash %s: %s"),
640 if (optab
->name
== NULL
)
642 core_optab
= (templates
*) xmalloc (sizeof (templates
));
643 core_optab
->start
= optab
;
648 /* initialize reg_hash hash table */
649 reg_hash
= hash_new ();
651 register const reg_entry
*regtab
;
653 for (regtab
= i386_regtab
;
654 regtab
< i386_regtab
+ sizeof (i386_regtab
) / sizeof (i386_regtab
[0]);
657 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
663 /* fill in lexical tables: mnemonic_chars, operand_chars. */
668 for (c
= 0; c
< 256; c
++)
673 mnemonic_chars
[c
] = c
;
674 register_chars
[c
] = c
;
675 operand_chars
[c
] = c
;
677 else if (islower (c
))
679 mnemonic_chars
[c
] = c
;
680 register_chars
[c
] = c
;
681 operand_chars
[c
] = c
;
683 else if (isupper (c
))
685 mnemonic_chars
[c
] = tolower (c
);
686 register_chars
[c
] = mnemonic_chars
[c
];
687 operand_chars
[c
] = c
;
690 if (isalpha (c
) || isdigit (c
))
691 identifier_chars
[c
] = c
;
694 identifier_chars
[c
] = c
;
695 operand_chars
[c
] = c
;
700 identifier_chars
['@'] = '@';
702 digit_chars
['-'] = '-';
703 identifier_chars
['_'] = '_';
704 identifier_chars
['.'] = '.';
706 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
707 operand_chars
[(unsigned char) *p
] = *p
;
710 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
711 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
713 record_alignment (text_section
, 2);
714 record_alignment (data_section
, 2);
715 record_alignment (bss_section
, 2);
721 i386_print_statistics (file
)
724 hash_print_statistics (file
, "i386 opcode", op_hash
);
725 hash_print_statistics (file
, "i386 register", reg_hash
);
731 /* debugging routines for md_assemble */
732 static void pi
PARAMS ((char *, i386_insn
*));
733 static void pte
PARAMS ((template *));
734 static void pt
PARAMS ((unsigned int));
735 static void pe
PARAMS ((expressionS
*));
736 static void ps
PARAMS ((symbolS
*));
743 register template *p
;
746 fprintf (stdout
, "%s: template ", line
);
748 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
749 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
750 fprintf (stdout
, " base %x index %x scale %x\n",
751 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
752 for (i
= 0; i
< x
->operands
; i
++)
754 fprintf (stdout
, " #%d: ", i
+ 1);
756 fprintf (stdout
, "\n");
758 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
| RegXMM
))
759 fprintf (stdout
, "%s\n", x
->op
[i
].regs
->reg_name
);
760 if (x
->types
[i
] & Imm
)
762 if (x
->types
[i
] & Disp
)
772 fprintf (stdout
, " %d operands ", t
->operands
);
773 fprintf (stdout
, "opcode %x ",
775 if (t
->extension_opcode
!= None
)
776 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
777 if (t
->opcode_modifier
& D
)
778 fprintf (stdout
, "D");
779 if (t
->opcode_modifier
& W
)
780 fprintf (stdout
, "W");
781 fprintf (stdout
, "\n");
782 for (i
= 0; i
< t
->operands
; i
++)
784 fprintf (stdout
, " #%d type ", i
+ 1);
785 pt (t
->operand_types
[i
]);
786 fprintf (stdout
, "\n");
794 fprintf (stdout
, " operation %d\n", e
->X_op
);
795 fprintf (stdout
, " add_number %ld (%lx)\n",
796 (long) e
->X_add_number
, (long) e
->X_add_number
);
799 fprintf (stdout
, " add_symbol ");
800 ps (e
->X_add_symbol
);
801 fprintf (stdout
, "\n");
805 fprintf (stdout
, " op_symbol ");
807 fprintf (stdout
, "\n");
815 fprintf (stdout
, "%s type %s%s",
817 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
818 segment_name (S_GET_SEGMENT (s
)));
837 { BaseIndex
, "BaseIndex" },
841 { InOutPortReg
, "InOutPortReg" },
842 { ShiftCount
, "ShiftCount" },
843 { Control
, "control reg" },
844 { Test
, "test reg" },
845 { Debug
, "debug reg" },
846 { FloatReg
, "FReg" },
847 { FloatAcc
, "FAcc" },
851 { JumpAbsolute
, "Jump Absolute" },
862 register struct type_name
*ty
;
866 fprintf (stdout
, _("Unknown"));
870 for (ty
= type_names
; ty
->mask
; ty
++)
872 fprintf (stdout
, "%s, ", ty
->tname
);
877 #endif /* DEBUG386 */
880 tc_i386_force_relocation (fixp
)
884 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
885 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
890 return fixp
->fx_r_type
== 7;
895 static bfd_reloc_code_real_type reloc
896 PARAMS ((int, int, bfd_reloc_code_real_type
));
898 static bfd_reloc_code_real_type
899 reloc (size
, pcrel
, other
)
902 bfd_reloc_code_real_type other
;
904 if (other
!= NO_RELOC
) return other
;
910 case 1: return BFD_RELOC_8_PCREL
;
911 case 2: return BFD_RELOC_16_PCREL
;
912 case 4: return BFD_RELOC_32_PCREL
;
914 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
920 case 1: return BFD_RELOC_8
;
921 case 2: return BFD_RELOC_16
;
922 case 4: return BFD_RELOC_32
;
924 as_bad (_("Can not do %d byte relocation"), size
);
927 return BFD_RELOC_NONE
;
931 * Here we decide which fixups can be adjusted to make them relative to
932 * the beginning of the section instead of the symbol. Basically we need
933 * to make sure that the dynamic relocations are done correctly, so in
934 * some cases we force the original symbol to be used.
937 tc_i386_fix_adjustable (fixP
)
940 #if defined (OBJ_ELF) || defined (TE_PE)
941 /* Prevent all adjustments to global symbols, or else dynamic
942 linking will not work correctly. */
943 if (S_IS_EXTERN (fixP
->fx_addsy
))
945 if (S_IS_WEAK (fixP
->fx_addsy
))
948 /* adjust_reloc_syms doesn't know about the GOT */
949 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
950 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
951 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
952 || fixP
->fx_r_type
== BFD_RELOC_RVA
953 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
954 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
959 #define reloc(SIZE,PCREL,OTHER) 0
960 #define BFD_RELOC_16 0
961 #define BFD_RELOC_32 0
962 #define BFD_RELOC_16_PCREL 0
963 #define BFD_RELOC_32_PCREL 0
964 #define BFD_RELOC_386_PLT32 0
965 #define BFD_RELOC_386_GOT32 0
966 #define BFD_RELOC_386_GOTOFF 0
970 intel_float_operand
PARAMS ((char *mnemonic
));
973 intel_float_operand (mnemonic
)
976 if (mnemonic
[0] == 'f' && mnemonic
[1] =='i')
979 if (mnemonic
[0] == 'f')
985 /* This is the guts of the machine-dependent assembler. LINE points to a
986 machine dependent instruction. This function is supposed to emit
987 the frags/bytes it assembles to. */
993 /* Points to template once we've found it. */
996 /* Count the size of the instruction generated. */
1001 char mnemonic
[MAX_MNEM_SIZE
];
1003 /* Initialize globals. */
1004 memset (&i
, '\0', sizeof (i
));
1005 for (j
= 0; j
< MAX_OPERANDS
; j
++)
1006 i
.disp_reloc
[j
] = NO_RELOC
;
1007 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
1008 memset (im_expressions
, '\0', sizeof (im_expressions
));
1009 save_stack_p
= save_stack
; /* reset stack pointer */
1011 /* First parse an instruction mnemonic & call i386_operand for the operands.
1012 We assume that the scrubber has arranged it so that line[0] is the valid
1013 start of a (possibly prefixed) mnemonic. */
1016 char *token_start
= l
;
1019 /* Non-zero if we found a prefix only acceptable with string insns. */
1020 const char *expecting_string_instruction
= NULL
;
1025 while ((*mnem_p
= mnemonic_chars
[(unsigned char) *l
]) != 0)
1028 if (mnem_p
>= mnemonic
+ sizeof (mnemonic
))
1030 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1035 if (!is_space_char (*l
)
1036 && *l
!= END_OF_INSN
1037 && *l
!= PREFIX_SEPARATOR
)
1039 as_bad (_("invalid character %s in mnemonic"),
1040 output_invalid (*l
));
1043 if (token_start
== l
)
1045 if (*l
== PREFIX_SEPARATOR
)
1046 as_bad (_("expecting prefix; got nothing"));
1048 as_bad (_("expecting mnemonic; got nothing"));
1052 /* Look up instruction (or prefix) via hash table. */
1053 current_templates
= hash_find (op_hash
, mnemonic
);
1055 if (*l
!= END_OF_INSN
1056 && (! is_space_char (*l
) || l
[1] != END_OF_INSN
)
1057 && current_templates
1058 && (current_templates
->start
->opcode_modifier
& IsPrefix
))
1060 /* If we are in 16-bit mode, do not allow addr16 or data16.
1061 Similarly, in 32-bit mode, do not allow addr32 or data32. */
1062 if ((current_templates
->start
->opcode_modifier
& (Size16
| Size32
))
1063 && (((current_templates
->start
->opcode_modifier
& Size32
) != 0)
1066 as_bad (_("redundant %s prefix"),
1067 current_templates
->start
->name
);
1070 /* Add prefix, checking for repeated prefixes. */
1071 switch (add_prefix (current_templates
->start
->base_opcode
))
1076 expecting_string_instruction
=
1077 current_templates
->start
->name
;
1080 /* Skip past PREFIX_SEPARATOR and reset token_start. */
1087 if (!current_templates
)
1089 /* See if we can get a match by trimming off a suffix. */
1092 case WORD_MNEM_SUFFIX
:
1093 case BYTE_MNEM_SUFFIX
:
1094 case SHORT_MNEM_SUFFIX
:
1095 case LONG_MNEM_SUFFIX
:
1096 i
.suffix
= mnem_p
[-1];
1098 current_templates
= hash_find (op_hash
, mnemonic
);
1102 case DWORD_MNEM_SUFFIX
:
1105 i
.suffix
= mnem_p
[-1];
1107 current_templates
= hash_find (op_hash
, mnemonic
);
1111 if (!current_templates
)
1113 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1118 /* check for rep/repne without a string instruction */
1119 if (expecting_string_instruction
1120 && !(current_templates
->start
->opcode_modifier
& IsString
))
1122 as_bad (_("expecting string instruction after `%s'"),
1123 expecting_string_instruction
);
1127 /* There may be operands to parse. */
1128 if (*l
!= END_OF_INSN
)
1130 /* parse operands */
1132 /* 1 if operand is pending after ','. */
1133 unsigned int expecting_operand
= 0;
1135 /* Non-zero if operand parens not balanced. */
1136 unsigned int paren_not_balanced
;
1140 /* skip optional white space before operand */
1141 if (is_space_char (*l
))
1143 if (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1145 as_bad (_("invalid character %s before operand %d"),
1146 output_invalid (*l
),
1150 token_start
= l
; /* after white space */
1151 paren_not_balanced
= 0;
1152 while (paren_not_balanced
|| *l
!= ',')
1154 if (*l
== END_OF_INSN
)
1156 if (paren_not_balanced
)
1159 as_bad (_("unbalanced parenthesis in operand %d."),
1162 as_bad (_("unbalanced brackets in operand %d."),
1167 break; /* we are done */
1169 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1171 as_bad (_("invalid character %s in operand %d"),
1172 output_invalid (*l
),
1179 ++paren_not_balanced
;
1181 --paren_not_balanced
;
1186 ++paren_not_balanced
;
1188 --paren_not_balanced
;
1192 if (l
!= token_start
)
1193 { /* yes, we've read in another operand */
1194 unsigned int operand_ok
;
1195 this_operand
= i
.operands
++;
1196 if (i
.operands
> MAX_OPERANDS
)
1198 as_bad (_("spurious operands; (%d operands/instruction max)"),
1202 /* now parse operand adding info to 'i' as we go along */
1203 END_STRING_AND_SAVE (l
);
1206 operand_ok
= i386_intel_operand (token_start
, intel_float_operand (mnemonic
));
1208 operand_ok
= i386_operand (token_start
);
1210 RESTORE_END_STRING (l
); /* restore old contents */
1216 if (expecting_operand
)
1218 expecting_operand_after_comma
:
1219 as_bad (_("expecting operand after ','; got nothing"));
1224 as_bad (_("expecting operand before ','; got nothing"));
1229 /* now *l must be either ',' or END_OF_INSN */
1232 if (*++l
== END_OF_INSN
)
1233 { /* just skip it, if it's \n complain */
1234 goto expecting_operand_after_comma
;
1236 expecting_operand
= 1;
1239 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1243 /* Now we've parsed the mnemonic into a set of templates, and have the
1246 Next, we find a template that matches the given insn,
1247 making sure the overlap of the given operands types is consistent
1248 with the template operand types. */
1250 #define MATCH(overlap, given, template) \
1251 ((overlap & ~JumpAbsolute) \
1252 && ((given) & (BaseIndex|JumpAbsolute)) == ((overlap) & (BaseIndex|JumpAbsolute)))
1254 /* If given types r0 and r1 are registers they must be of the same type
1255 unless the expected operand type register overlap is null.
1256 Note that Acc in a template matches every size of reg. */
1257 #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \
1258 ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \
1259 ((g0) & Reg) == ((g1) & Reg) || \
1260 ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 )
1263 register unsigned int overlap0
, overlap1
;
1264 unsigned int overlap2
;
1265 unsigned int found_reverse_match
;
1268 /* All intel opcodes have reversed operands except for BOUND and ENTER */
1269 if (intel_syntax
&& i
.operands
> 1
1270 && (strcmp (mnemonic
, "enter") != 0)
1271 && (strcmp (mnemonic
, "bound") != 0)
1272 && (strncmp (mnemonic
, "fsub", 4) !=0)
1273 && (strncmp (mnemonic
, "fdiv", 4) !=0))
1275 union i386_op temp_op
;
1276 unsigned int temp_type
;
1280 if (i
.operands
== 2)
1285 else if (i
.operands
== 3)
1290 temp_type
= i
.types
[xchg2
];
1291 i
.types
[xchg2
] = i
.types
[xchg1
];
1292 i
.types
[xchg1
] = temp_type
;
1293 temp_op
= i
.op
[xchg2
];
1294 i
.op
[xchg2
] = i
.op
[xchg1
];
1295 i
.op
[xchg1
] = temp_op
;
1300 found_reverse_match
= 0;
1301 suffix_check
= (i
.suffix
== BYTE_MNEM_SUFFIX
1303 : (i
.suffix
== WORD_MNEM_SUFFIX
1305 : (i
.suffix
== SHORT_MNEM_SUFFIX
1307 : (i
.suffix
== LONG_MNEM_SUFFIX
1309 : (i
.suffix
== DWORD_MNEM_SUFFIX
1311 : (i
.suffix
== LONG_DOUBLE_MNEM_SUFFIX
? No_xSuf
: 0))))));
1313 for (t
= current_templates
->start
;
1314 t
< current_templates
->end
;
1317 /* Must have right number of operands. */
1318 if (i
.operands
!= t
->operands
)
1321 /* For some opcodes, don't check the suffix */
1324 if (strcmp (t
->name
, "fnstcw")
1325 && strcmp (t
->name
, "fldcw")
1326 && (t
->opcode_modifier
& suffix_check
))
1329 /* Must not have disallowed suffix. */
1330 else if ((t
->opcode_modifier
& suffix_check
))
1333 else if (!t
->operands
)
1334 break; /* 0 operands always matches */
1336 overlap0
= i
.types
[0] & t
->operand_types
[0];
1337 switch (t
->operands
)
1340 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0]))
1345 overlap1
= i
.types
[1] & t
->operand_types
[1];
1346 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0])
1347 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[1])
1348 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1349 t
->operand_types
[0],
1350 overlap1
, i
.types
[1],
1351 t
->operand_types
[1]))
1354 /* check if other direction is valid ... */
1355 if ((t
->opcode_modifier
& (D
|FloatD
)) == 0)
1358 /* try reversing direction of operands */
1359 overlap0
= i
.types
[0] & t
->operand_types
[1];
1360 overlap1
= i
.types
[1] & t
->operand_types
[0];
1361 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[1])
1362 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[0])
1363 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1364 t
->operand_types
[1],
1365 overlap1
, i
.types
[1],
1366 t
->operand_types
[0]))
1368 /* does not match either direction */
1371 /* found_reverse_match holds which of D or FloatDR
1373 found_reverse_match
= t
->opcode_modifier
& (D
|FloatDR
);
1376 /* found a forward 2 operand match here */
1377 if (t
->operands
== 3)
1379 /* Here we make use of the fact that there are no
1380 reverse match 3 operand instructions, and all 3
1381 operand instructions only need to be checked for
1382 register consistency between operands 2 and 3. */
1383 overlap2
= i
.types
[2] & t
->operand_types
[2];
1384 if (!MATCH (overlap2
, i
.types
[2], t
->operand_types
[2])
1385 || !CONSISTENT_REGISTER_MATCH (overlap1
, i
.types
[1],
1386 t
->operand_types
[1],
1387 overlap2
, i
.types
[2],
1388 t
->operand_types
[2]))
1392 /* found either forward/reverse 2 or 3 operand match here:
1393 slip through to break */
1395 break; /* we've found a match; break out of loop */
1396 } /* for (t = ... */
1397 if (t
== current_templates
->end
)
1398 { /* we found no match */
1399 as_bad (_("suffix or operands invalid for `%s'"),
1400 current_templates
->start
->name
);
1405 && (i
.types
[0] & JumpAbsolute
) != (t
->operand_types
[0] & JumpAbsolute
))
1407 as_warn (_("Indirect %s without `*'"), t
->name
);
1410 if ((t
->opcode_modifier
& (IsPrefix
|IgnoreSize
)) == (IsPrefix
|IgnoreSize
))
1412 /* Warn them that a data or address size prefix doesn't affect
1413 assembly of the next line of code. */
1414 as_warn (_("stand-alone `%s' prefix"), t
->name
);
1417 /* Copy the template we found. */
1419 if (found_reverse_match
)
1421 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1422 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1426 if (i
.tm
.opcode_modifier
& FWait
)
1427 if (! add_prefix (FWAIT_OPCODE
))
1430 /* Check string instruction segment overrides */
1431 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1433 int mem_op
= (i
.types
[0] & AnyMem
) ? 0 : 1;
1434 if ((i
.tm
.operand_types
[mem_op
] & EsSeg
) != 0)
1436 if (i
.seg
[0] != NULL
&& i
.seg
[0] != &es
)
1438 as_bad (_("`%s' operand %d must use `%%es' segment"),
1443 /* There's only ever one segment override allowed per instruction.
1444 This instruction possibly has a legal segment override on the
1445 second operand, so copy the segment to where non-string
1446 instructions store it, allowing common code. */
1447 i
.seg
[0] = i
.seg
[1];
1449 else if ((i
.tm
.operand_types
[mem_op
+ 1] & EsSeg
) != 0)
1451 if (i
.seg
[1] != NULL
&& i
.seg
[1] != &es
)
1453 as_bad (_("`%s' operand %d must use `%%es' segment"),
1461 /* If matched instruction specifies an explicit instruction mnemonic
1463 if (i
.tm
.opcode_modifier
& (Size16
| Size32
))
1465 if (i
.tm
.opcode_modifier
& Size16
)
1466 i
.suffix
= WORD_MNEM_SUFFIX
;
1468 i
.suffix
= LONG_MNEM_SUFFIX
;
1470 else if (i
.reg_operands
)
1472 /* If there's no instruction mnemonic suffix we try to invent one
1473 based on register operands. */
1476 /* We take i.suffix from the last register operand specified,
1477 Destination register type is more significant than source
1480 for (op
= i
.operands
; --op
>= 0; )
1481 if (i
.types
[op
] & Reg
)
1483 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_MNEM_SUFFIX
:
1484 (i
.types
[op
] & Reg16
) ? WORD_MNEM_SUFFIX
:
1489 else if (i
.suffix
== BYTE_MNEM_SUFFIX
)
1492 for (op
= i
.operands
; --op
>= 0; )
1494 /* If this is an eight bit register, it's OK. If it's
1495 the 16 or 32 bit version of an eight bit register,
1496 we will just use the low portion, and that's OK too. */
1497 if (i
.types
[op
] & Reg8
)
1500 /* movzx and movsx should not generate this warning. */
1502 && (i
.tm
.base_opcode
== 0xfb7
1503 || i
.tm
.base_opcode
== 0xfb6
1504 || i
.tm
.base_opcode
== 0xfbe
1505 || i
.tm
.base_opcode
== 0xfbf))
1508 if ((i
.types
[op
] & WordReg
) && i
.op
[op
].regs
->reg_num
< 4
1510 /* Check that the template allows eight bit regs
1511 This kills insns such as `orb $1,%edx', which
1512 maybe should be allowed. */
1513 && (i
.tm
.operand_types
[op
] & (Reg8
|InOutPortReg
))
1517 #if REGISTER_WARNINGS
1518 if ((i
.tm
.operand_types
[op
] & InOutPortReg
) == 0)
1519 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1520 (i
.op
[op
].regs
- (i
.types
[op
] & Reg16
? 8 : 16))->reg_name
,
1521 i
.op
[op
].regs
->reg_name
,
1526 /* Any other register is bad */
1527 if (i
.types
[op
] & (Reg
| RegMMX
| RegXMM
1529 | Control
| Debug
| Test
1530 | FloatReg
| FloatAcc
))
1532 as_bad (_("`%%%s' not allowed with `%s%c'"),
1533 i
.op
[op
].regs
->reg_name
,
1540 else if (i
.suffix
== LONG_MNEM_SUFFIX
)
1543 for (op
= i
.operands
; --op
>= 0; )
1544 /* Reject eight bit registers, except where the template
1545 requires them. (eg. movzb) */
1546 if ((i
.types
[op
] & Reg8
) != 0
1547 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1549 as_bad (_("`%%%s' not allowed with `%s%c'"),
1550 i
.op
[op
].regs
->reg_name
,
1555 #if REGISTER_WARNINGS
1556 /* Warn if the e prefix on a general reg is missing. */
1557 else if ((i
.types
[op
] & Reg16
) != 0
1558 && (i
.tm
.operand_types
[op
] & (Reg32
|Acc
)) != 0)
1560 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1561 (i
.op
[op
].regs
+ 8)->reg_name
,
1562 i
.op
[op
].regs
->reg_name
,
1567 else if (i
.suffix
== WORD_MNEM_SUFFIX
)
1570 for (op
= i
.operands
; --op
>= 0; )
1571 /* Reject eight bit registers, except where the template
1572 requires them. (eg. movzb) */
1573 if ((i
.types
[op
] & Reg8
) != 0
1574 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1576 as_bad (_("`%%%s' not allowed with `%s%c'"),
1577 i
.op
[op
].regs
->reg_name
,
1582 #if REGISTER_WARNINGS
1583 /* Warn if the e prefix on a general reg is present. */
1584 else if ((i
.types
[op
] & Reg32
) != 0
1585 && (i
.tm
.operand_types
[op
] & (Reg16
|Acc
)) != 0)
1587 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1588 (i
.op
[op
].regs
- 8)->reg_name
,
1589 i
.op
[op
].regs
->reg_name
,
1597 else if ((i
.tm
.opcode_modifier
& DefaultSize
) && !i
.suffix
)
1599 i
.suffix
= stackop_size
;
1602 /* Make still unresolved immediate matches conform to size of immediate
1603 given in i.suffix. Note: overlap2 cannot be an immediate! */
1604 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1605 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1606 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1610 overlap0
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1611 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1613 else if (overlap0
== (Imm16
| Imm32
))
1616 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1620 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1624 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1625 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1626 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1630 overlap1
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1631 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1633 else if (overlap1
== (Imm16
| Imm32
))
1636 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1640 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1644 assert ((overlap2
& Imm
) == 0);
1646 i
.types
[0] = overlap0
;
1647 if (overlap0
& ImplicitRegister
)
1649 if (overlap0
& Imm1
)
1650 i
.imm_operands
= 0; /* kludge for shift insns */
1652 i
.types
[1] = overlap1
;
1653 if (overlap1
& ImplicitRegister
)
1656 i
.types
[2] = overlap2
;
1657 if (overlap2
& ImplicitRegister
)
1660 /* Finalize opcode. First, we change the opcode based on the operand
1661 size given by i.suffix: We need not change things for byte insns. */
1663 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1665 as_bad (_("no instruction mnemonic suffix given and no register operands; can't size instruction"));
1669 /* For movzx and movsx, need to check the register type */
1671 && (i
.tm
.base_opcode
== 0xfb6 || i
.tm
.base_opcode
== 0xfbe))
1672 if (i
.suffix
&& i
.suffix
== BYTE_MNEM_SUFFIX
)
1674 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1676 if ((i
.op
[1].regs
->reg_type
& Reg16
) != 0)
1677 if (!add_prefix (prefix
))
1681 if (i
.suffix
&& i
.suffix
!= BYTE_MNEM_SUFFIX
)
1683 /* It's not a byte, select word/dword operation. */
1684 if (i
.tm
.opcode_modifier
& W
)
1686 if (i
.tm
.opcode_modifier
& ShortForm
)
1687 i
.tm
.base_opcode
|= 8;
1689 i
.tm
.base_opcode
|= 1;
1691 /* Now select between word & dword operations via the operand
1692 size prefix, except for instructions that will ignore this
1694 if (((intel_syntax
&& (i
.suffix
== DWORD_MNEM_SUFFIX
))
1695 || i
.suffix
== LONG_MNEM_SUFFIX
) == flag_16bit_code
1696 && !(i
.tm
.opcode_modifier
& IgnoreSize
))
1698 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1699 if (i
.tm
.opcode_modifier
& JumpByte
) /* jcxz, loop */
1700 prefix
= ADDR_PREFIX_OPCODE
;
1702 if (! add_prefix (prefix
))
1705 /* Size floating point instruction. */
1706 if (i
.suffix
== LONG_MNEM_SUFFIX
1707 || (intel_syntax
&& i
.suffix
== DWORD_MNEM_SUFFIX
))
1709 if (i
.tm
.opcode_modifier
& FloatMF
)
1710 i
.tm
.base_opcode
^= 4;
1714 if (i
.tm
.opcode_modifier
& ImmExt
)
1716 /* These AMD 3DNow! and Intel Katmai New Instructions have an
1717 opcode suffix which is coded in the same place as an 8-bit
1718 immediate field would be. Here we fake an 8-bit immediate
1719 operand from the opcode suffix stored in tm.extension_opcode. */
1723 assert(i
.imm_operands
== 0 && i
.operands
<= 2 && 2 < MAX_OPERANDS
);
1725 exp
= &im_expressions
[i
.imm_operands
++];
1726 i
.op
[i
.operands
].imms
= exp
;
1727 i
.types
[i
.operands
++] = Imm8
;
1728 exp
->X_op
= O_constant
;
1729 exp
->X_add_number
= i
.tm
.extension_opcode
;
1730 i
.tm
.extension_opcode
= None
;
1733 /* For insns with operands there are more diddles to do to the opcode. */
1736 /* Default segment register this instruction will use
1737 for memory accesses. 0 means unknown.
1738 This is only for optimizing out unnecessary segment overrides. */
1739 const seg_entry
*default_seg
= 0;
1741 /* If we found a reverse match we must alter the opcode
1742 direction bit. found_reverse_match holds bits to change
1743 (different for int & float insns). */
1745 i
.tm
.base_opcode
^= found_reverse_match
;
1747 /* The imul $imm, %reg instruction is converted into
1748 imul $imm, %reg, %reg, and the clr %reg instruction
1749 is converted into xor %reg, %reg. */
1750 if (i
.tm
.opcode_modifier
& regKludge
)
1752 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1753 /* Pretend we saw the extra register operand. */
1754 assert (i
.op
[first_reg_op
+1].regs
== 0);
1755 i
.op
[first_reg_op
+1].regs
= i
.op
[first_reg_op
].regs
;
1756 i
.types
[first_reg_op
+1] = i
.types
[first_reg_op
];
1760 if (i
.tm
.opcode_modifier
& ShortForm
)
1762 /* The register or float register operand is in operand 0 or 1. */
1763 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1764 /* Register goes in low 3 bits of opcode. */
1765 i
.tm
.base_opcode
|= i
.op
[op
].regs
->reg_num
;
1766 if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1768 /* Warn about some common errors, but press on regardless.
1769 The first case can be generated by gcc (<= 2.8.1). */
1770 if (i
.operands
== 2)
1772 /* reversed arguments on faddp, fsubp, etc. */
1773 as_warn (_("translating to `%s %%%s,%%%s'"), i
.tm
.name
,
1774 i
.op
[1].regs
->reg_name
,
1775 i
.op
[0].regs
->reg_name
);
1779 /* extraneous `l' suffix on fp insn */
1780 as_warn (_("translating to `%s %%%s'"), i
.tm
.name
,
1781 i
.op
[0].regs
->reg_name
);
1785 else if (i
.tm
.opcode_modifier
& Modrm
)
1787 /* The opcode is completed (modulo i.tm.extension_opcode which
1788 must be put into the modrm byte).
1789 Now, we make the modrm & index base bytes based on all the
1790 info we've collected. */
1792 /* i.reg_operands MUST be the number of real register operands;
1793 implicit registers do not count. */
1794 if (i
.reg_operands
== 2)
1796 unsigned int source
, dest
;
1797 source
= ((i
.types
[0]
1798 & (Reg
| RegMMX
| RegXMM
1800 | Control
| Debug
| Test
))
1805 /* One of the register operands will be encoded in the
1806 i.tm.reg field, the other in the combined i.tm.mode
1807 and i.tm.regmem fields. If no form of this
1808 instruction supports a memory destination operand,
1809 then we assume the source operand may sometimes be
1810 a memory operand and so we need to store the
1811 destination in the i.rm.reg field. */
1812 if ((i
.tm
.operand_types
[dest
] & AnyMem
) == 0)
1814 i
.rm
.reg
= i
.op
[dest
].regs
->reg_num
;
1815 i
.rm
.regmem
= i
.op
[source
].regs
->reg_num
;
1819 i
.rm
.reg
= i
.op
[source
].regs
->reg_num
;
1820 i
.rm
.regmem
= i
.op
[dest
].regs
->reg_num
;
1824 { /* if it's not 2 reg operands... */
1827 unsigned int fake_zero_displacement
= 0;
1828 unsigned int op
= ((i
.types
[0] & AnyMem
)
1830 : (i
.types
[1] & AnyMem
) ? 1 : 2);
1837 if (! i
.disp_operands
)
1838 fake_zero_displacement
= 1;
1841 /* Operand is just <disp> */
1842 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
1844 i
.rm
.regmem
= NO_BASE_REGISTER_16
;
1845 i
.types
[op
] &= ~Disp
;
1846 i
.types
[op
] |= Disp16
;
1850 i
.rm
.regmem
= NO_BASE_REGISTER
;
1851 i
.types
[op
] &= ~Disp
;
1852 i
.types
[op
] |= Disp32
;
1855 else /* ! i.base_reg && i.index_reg */
1857 i
.sib
.index
= i
.index_reg
->reg_num
;
1858 i
.sib
.base
= NO_BASE_REGISTER
;
1859 i
.sib
.scale
= i
.log2_scale_factor
;
1860 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1861 i
.types
[op
] &= ~Disp
;
1862 i
.types
[op
] |= Disp32
; /* Must be 32 bit */
1865 else if (i
.base_reg
->reg_type
& Reg16
)
1867 switch (i
.base_reg
->reg_num
)
1872 else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */
1873 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6;
1880 if ((i
.types
[op
] & Disp
) == 0)
1882 /* fake (%bp) into 0(%bp) */
1883 i
.types
[op
] |= Disp8
;
1884 fake_zero_displacement
= 1;
1887 else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */
1888 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6 + 2;
1890 default: /* (%si) -> 4 or (%di) -> 5 */
1891 i
.rm
.regmem
= i
.base_reg
->reg_num
- 6 + 4;
1893 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1895 else /* i.base_reg and 32 bit mode */
1897 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1898 i
.sib
.base
= i
.base_reg
->reg_num
;
1899 if (i
.base_reg
->reg_num
== EBP_REG_NUM
)
1902 if (i
.disp_operands
== 0)
1904 fake_zero_displacement
= 1;
1905 i
.types
[op
] |= Disp8
;
1908 else if (i
.base_reg
->reg_num
== ESP_REG_NUM
)
1912 i
.sib
.scale
= i
.log2_scale_factor
;
1915 /* <disp>(%esp) becomes two byte modrm
1916 with no index register. We've already
1917 stored the code for esp in i.rm.regmem
1918 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1919 base register besides %esp will not use
1920 the extra modrm byte. */
1921 i
.sib
.index
= NO_INDEX_REGISTER
;
1922 #if ! SCALE1_WHEN_NO_INDEX
1923 /* Another case where we force the second
1925 if (i
.log2_scale_factor
)
1926 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1931 i
.sib
.index
= i
.index_reg
->reg_num
;
1932 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1934 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1937 if (fake_zero_displacement
)
1939 /* Fakes a zero displacement assuming that i.types[op]
1940 holds the correct displacement size. */
1943 assert (i
.op
[op
].disps
== 0);
1944 exp
= &disp_expressions
[i
.disp_operands
++];
1945 i
.op
[op
].disps
= exp
;
1946 exp
->X_op
= O_constant
;
1947 exp
->X_add_number
= 0;
1948 exp
->X_add_symbol
= (symbolS
*) 0;
1949 exp
->X_op_symbol
= (symbolS
*) 0;
1953 /* Fill in i.rm.reg or i.rm.regmem field with register
1954 operand (if any) based on i.tm.extension_opcode.
1955 Again, we must be careful to make sure that
1956 segment/control/debug/test/MMX registers are coded
1957 into the i.rm.reg field. */
1962 & (Reg
| RegMMX
| RegXMM
1964 | Control
| Debug
| Test
))
1967 & (Reg
| RegMMX
| RegXMM
1969 | Control
| Debug
| Test
))
1972 /* If there is an extension opcode to put here, the
1973 register number must be put into the regmem field. */
1974 if (i
.tm
.extension_opcode
!= None
)
1975 i
.rm
.regmem
= i
.op
[op
].regs
->reg_num
;
1977 i
.rm
.reg
= i
.op
[op
].regs
->reg_num
;
1979 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1980 we must set it to 3 to indicate this is a register
1981 operand in the regmem field. */
1982 if (!i
.mem_operands
)
1986 /* Fill in i.rm.reg field with extension opcode (if any). */
1987 if (i
.tm
.extension_opcode
!= None
)
1988 i
.rm
.reg
= i
.tm
.extension_opcode
;
1991 else if (i
.tm
.opcode_modifier
& (Seg2ShortForm
| Seg3ShortForm
))
1993 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.op
[0].regs
->reg_num
== 1)
1995 as_bad (_("you can't `pop %%cs'"));
1998 i
.tm
.base_opcode
|= (i
.op
[0].regs
->reg_num
<< 3);
2000 else if ((i
.tm
.base_opcode
& ~(D
|W
)) == MOV_AX_DISP32
)
2004 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
2006 /* For the string instructions that allow a segment override
2007 on one of their operands, the default segment is ds. */
2011 /* If a segment was explicitly specified,
2012 and the specified segment is not the default,
2013 use an opcode prefix to select it.
2014 If we never figured out what the default segment is,
2015 then default_seg will be zero at this point,
2016 and the specified segment prefix will always be used. */
2017 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
2019 if (! add_prefix (i
.seg
[0]->seg_prefix
))
2023 else if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
2025 /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc. */
2026 as_warn (_("translating to `%sp'"), i
.tm
.name
);
2030 /* Handle conversion of 'int $3' --> special int3 insn. */
2031 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.op
[0].imms
->X_add_number
== 3)
2033 i
.tm
.base_opcode
= INT3_OPCODE
;
2037 if ((i
.tm
.opcode_modifier
& (Jump
| JumpByte
| JumpDword
))
2038 && i
.op
[0].disps
->X_op
== O_constant
)
2040 /* Convert "jmp constant" (and "call constant") to a jump (call) to
2041 the absolute address given by the constant. Since ix86 jumps and
2042 calls are pc relative, we need to generate a reloc. */
2043 i
.op
[0].disps
->X_add_symbol
= &abs_symbol
;
2044 i
.op
[0].disps
->X_op
= O_symbol
;
2047 /* We are ready to output the insn. */
2052 if (i
.tm
.opcode_modifier
& Jump
)
2059 if (flag_16bit_code
)
2063 if (i
.prefix
[DATA_PREFIX
])
2074 if (i
.prefixes
!= 0 && !intel_syntax
)
2075 as_warn (_("skipping prefixes on this instruction"));
2077 /* It's always a symbol; End frag & setup for relax.
2078 Make sure there is enough room in this frag for the largest
2079 instruction we may generate in md_convert_frag. This is 2
2080 bytes for the opcode and room for the prefix and largest
2082 frag_grow (prefix
+ 2 + size
);
2083 insn_size
+= prefix
+ 1;
2084 /* Prefix and 1 opcode byte go in fr_fix. */
2085 p
= frag_more (prefix
+ 1);
2087 *p
++ = DATA_PREFIX_OPCODE
;
2088 *p
= i
.tm
.base_opcode
;
2089 /* 1 possible extra opcode + displacement go in fr_var. */
2090 frag_var (rs_machine_dependent
,
2093 ((unsigned char) *p
== JUMP_PC_RELATIVE
2094 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
) | code16
2095 : ENCODE_RELAX_STATE (COND_JUMP
, SMALL
) | code16
),
2096 i
.op
[0].disps
->X_add_symbol
,
2097 i
.op
[0].disps
->X_add_number
,
2100 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
2104 if (i
.tm
.opcode_modifier
& JumpByte
)
2106 /* This is a loop or jecxz type instruction. */
2108 if (i
.prefix
[ADDR_PREFIX
])
2111 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
2120 if (flag_16bit_code
)
2123 if (i
.prefix
[DATA_PREFIX
])
2126 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
2136 if (i
.prefixes
!= 0 && !intel_syntax
)
2137 as_warn (_("skipping prefixes on this instruction"));
2139 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2141 insn_size
+= 1 + size
;
2142 p
= frag_more (1 + size
);
2146 /* opcode can be at most two bytes */
2147 insn_size
+= 2 + size
;
2148 p
= frag_more (2 + size
);
2149 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2151 *p
++ = i
.tm
.base_opcode
& 0xff;
2153 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2154 i
.op
[0].disps
, 1, reloc (size
, 1, i
.disp_reloc
[0]));
2156 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
2163 if (flag_16bit_code
)
2167 if (i
.prefix
[DATA_PREFIX
])
2178 if (i
.prefixes
!= 0 && !intel_syntax
)
2179 as_warn (_("skipping prefixes on this instruction"));
2181 insn_size
+= prefix
+ 1 + 2 + size
; /* 1 opcode; 2 segment; offset */
2182 p
= frag_more (prefix
+ 1 + 2 + size
);
2184 *p
++ = DATA_PREFIX_OPCODE
;
2185 *p
++ = i
.tm
.base_opcode
;
2186 if (i
.op
[1].imms
->X_op
== O_constant
)
2188 long n
= (long) i
.op
[1].imms
->X_add_number
;
2190 if (size
== 2 && !fits_in_unsigned_word (n
))
2192 as_bad (_("16-bit jump out of range"));
2195 md_number_to_chars (p
, (valueT
) n
, size
);
2198 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2199 i
.op
[1].imms
, 0, reloc (size
, 0, i
.disp_reloc
[0]));
2200 if (i
.op
[0].imms
->X_op
!= O_constant
)
2201 as_bad (_("can't handle non absolute segment in `%s'"),
2203 md_number_to_chars (p
+ size
, (valueT
) i
.op
[0].imms
->X_add_number
, 2);
2207 /* Output normal instructions here. */
2210 /* The prefix bytes. */
2212 q
< i
.prefix
+ sizeof (i
.prefix
) / sizeof (i
.prefix
[0]);
2219 md_number_to_chars (p
, (valueT
) *q
, 1);
2223 /* Now the opcode; be careful about word order here! */
2224 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2227 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
2229 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
2233 /* put out high byte first: can't use md_number_to_chars! */
2234 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2235 *p
= i
.tm
.base_opcode
& 0xff;
2238 { /* opcode is either 3 or 4 bytes */
2239 if (i
.tm
.base_opcode
& 0xff000000)
2243 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
2250 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
2251 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2252 *p
= (i
.tm
.base_opcode
) & 0xff;
2255 /* Now the modrm byte and sib byte (if present). */
2256 if (i
.tm
.opcode_modifier
& Modrm
)
2260 md_number_to_chars (p
,
2261 (valueT
) (i
.rm
.regmem
<< 0
2265 /* If i.rm.regmem == ESP (4)
2266 && i.rm.mode != (Register mode)
2268 ==> need second modrm byte. */
2269 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
2271 && !(i
.base_reg
&& (i
.base_reg
->reg_type
& Reg16
) != 0))
2275 md_number_to_chars (p
,
2276 (valueT
) (i
.sib
.base
<< 0
2278 | i
.sib
.scale
<< 6),
2283 if (i
.disp_operands
)
2285 register unsigned int n
;
2287 for (n
= 0; n
< i
.operands
; n
++)
2289 if (i
.types
[n
] & Disp
)
2291 if (i
.op
[n
].disps
->X_op
== O_constant
)
2294 long val
= (long) i
.op
[n
].disps
->X_add_number
;
2296 if (i
.types
[n
] & (Disp8
| Disp16
))
2301 mask
= ~ (long) 0xffff;
2302 if (i
.types
[n
] & Disp8
)
2305 mask
= ~ (long) 0xff;
2308 if ((val
& mask
) != 0 && (val
& mask
) != mask
)
2309 as_warn (_("%ld shortened to %ld"),
2313 p
= frag_more (size
);
2314 md_number_to_chars (p
, (valueT
) val
, size
);
2320 if (i
.types
[n
] & Disp16
)
2324 p
= frag_more (size
);
2325 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2327 reloc (size
, 0, i
.disp_reloc
[n
]));
2331 } /* end displacement output */
2333 /* output immediate */
2336 register unsigned int n
;
2338 for (n
= 0; n
< i
.operands
; n
++)
2340 if (i
.types
[n
] & Imm
)
2342 if (i
.op
[n
].imms
->X_op
== O_constant
)
2345 long val
= (long) i
.op
[n
].imms
->X_add_number
;
2347 if (i
.types
[n
] & (Imm8
| Imm8S
| Imm16
))
2352 mask
= ~ (long) 0xffff;
2353 if (i
.types
[n
] & (Imm8
| Imm8S
))
2356 mask
= ~ (long) 0xff;
2358 if ((val
& mask
) != 0 && (val
& mask
) != mask
)
2359 as_warn (_("%ld shortened to %ld"),
2363 p
= frag_more (size
);
2364 md_number_to_chars (p
, (valueT
) val
, size
);
2367 { /* not absolute_section */
2368 /* Need a 32-bit fixup (don't support 8bit
2369 non-absolute imms). Try to support other
2371 #ifdef BFD_ASSEMBLER
2372 enum bfd_reloc_code_real reloc_type
;
2378 if (i
.types
[n
] & Imm16
)
2380 else if (i
.types
[n
] & (Imm8
| Imm8S
))
2384 p
= frag_more (size
);
2385 reloc_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2386 #ifdef BFD_ASSEMBLER
2387 if (reloc_type
== BFD_RELOC_32
2389 && GOT_symbol
== i
.op
[n
].imms
->X_add_symbol
2390 && (i
.op
[n
].imms
->X_op
== O_symbol
2391 || (i
.op
[n
].imms
->X_op
== O_add
2392 && ((symbol_get_value_expression
2393 (i
.op
[n
].imms
->X_op_symbol
)->X_op
)
2396 reloc_type
= BFD_RELOC_386_GOTPC
;
2397 i
.op
[n
].imms
->X_add_number
+= 3;
2400 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2401 i
.op
[n
].imms
, 0, reloc_type
);
2405 } /* end immediate output */
2413 #endif /* DEBUG386 */
2417 static int i386_immediate
PARAMS ((char *));
2420 i386_immediate (imm_start
)
2423 char *save_input_line_pointer
;
2427 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2429 as_bad (_("Only 1 or 2 immediate operands are allowed"));
2433 exp
= &im_expressions
[i
.imm_operands
++];
2434 i
.op
[this_operand
].imms
= exp
;
2436 if (is_space_char (*imm_start
))
2439 save_input_line_pointer
= input_line_pointer
;
2440 input_line_pointer
= imm_start
;
2445 * We can have operands of the form
2446 * <symbol>@GOTOFF+<nnn>
2447 * Take the easy way out here and copy everything
2448 * into a temporary buffer...
2452 cp
= strchr (input_line_pointer
, '@');
2459 /* GOT relocations are not supported in 16 bit mode */
2460 if (flag_16bit_code
)
2461 as_bad (_("GOT relocations not supported in 16 bit mode"));
2463 if (GOT_symbol
== NULL
)
2464 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2466 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2468 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2471 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2473 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2476 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2478 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2482 as_bad (_("Bad reloc specifier in expression"));
2484 /* Replace the relocation token with ' ', so that errors like
2485 foo@GOTOFF1 will be detected. */
2486 first
= cp
- input_line_pointer
;
2487 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2488 memcpy (tmpbuf
, input_line_pointer
, first
);
2489 tmpbuf
[first
] = ' ';
2490 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2491 input_line_pointer
= tmpbuf
;
2496 exp_seg
= expression (exp
);
2499 if (*input_line_pointer
)
2500 as_bad (_("Ignoring junk `%s' after expression"), input_line_pointer
);
2502 input_line_pointer
= save_input_line_pointer
;
2504 if (exp
->X_op
== O_absent
|| exp
->X_op
== O_big
)
2506 /* missing or bad expr becomes absolute 0 */
2507 as_bad (_("Missing or invalid immediate expression `%s' taken as 0"),
2509 exp
->X_op
= O_constant
;
2510 exp
->X_add_number
= 0;
2511 exp
->X_add_symbol
= (symbolS
*) 0;
2512 exp
->X_op_symbol
= (symbolS
*) 0;
2515 if (exp
->X_op
== O_constant
)
2518 if (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0))
2521 i
.types
[this_operand
] |=
2522 (bigimm
| smallest_imm_type ((long) exp
->X_add_number
));
2524 /* If a suffix is given, this operand may be shortened. */
2527 case WORD_MNEM_SUFFIX
:
2528 i
.types
[this_operand
] |= Imm16
;
2530 case BYTE_MNEM_SUFFIX
:
2531 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2535 #if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
2537 #ifdef BFD_ASSEMBLER
2538 OUTPUT_FLAVOR
== bfd_target_aout_flavour
&&
2540 exp_seg
!= text_section
2541 && exp_seg
!= data_section
2542 && exp_seg
!= bss_section
2543 && exp_seg
!= undefined_section
2544 #ifdef BFD_ASSEMBLER
2545 && !bfd_is_com_section (exp_seg
)
2549 #ifdef BFD_ASSEMBLER
2550 as_bad (_("Unimplemented segment %s in operand"), exp_seg
->name
);
2552 as_bad (_("Unimplemented segment type %d in operand"), exp_seg
);
2559 /* This is an address. The size of the address will be
2560 determined later, depending on destination register,
2561 suffix, or the default for the section. We exclude
2562 Imm8S here so that `push $foo' and other instructions
2563 with an Imm8S form will use Imm16 or Imm32. */
2564 i
.types
[this_operand
] |= (Imm8
| Imm16
| Imm32
);
2570 static int i386_scale
PARAMS ((char *));
2576 if (!isdigit (*scale
))
2583 i
.log2_scale_factor
= 0;
2586 i
.log2_scale_factor
= 1;
2589 i
.log2_scale_factor
= 2;
2592 i
.log2_scale_factor
= 3;
2596 as_bad (_("expecting scale factor of 1, 2, 4, or 8: got `%s'"),
2600 if (i
.log2_scale_factor
!= 0 && ! i
.index_reg
)
2602 as_warn (_("scale factor of %d without an index register"),
2603 1 << i
.log2_scale_factor
);
2604 #if SCALE1_WHEN_NO_INDEX
2605 i
.log2_scale_factor
= 0;
2611 static int i386_displacement
PARAMS ((char *, char *));
2614 i386_displacement (disp_start
, disp_end
)
2618 register expressionS
*exp
;
2620 char *save_input_line_pointer
;
2621 int bigdisp
= Disp32
;
2623 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2625 i
.types
[this_operand
] |= bigdisp
;
2627 exp
= &disp_expressions
[i
.disp_operands
];
2628 i
.op
[this_operand
].disps
= exp
;
2630 save_input_line_pointer
= input_line_pointer
;
2631 input_line_pointer
= disp_start
;
2632 END_STRING_AND_SAVE (disp_end
);
2634 #ifndef GCC_ASM_O_HACK
2635 #define GCC_ASM_O_HACK 0
2638 END_STRING_AND_SAVE (disp_end
+ 1);
2639 if ((i
.types
[this_operand
] & BaseIndex
) != 0
2640 && displacement_string_end
[-1] == '+')
2642 /* This hack is to avoid a warning when using the "o"
2643 constraint within gcc asm statements.
2646 #define _set_tssldt_desc(n,addr,limit,type) \
2647 __asm__ __volatile__ ( \
2649 "movw %w1,2+%0\n\t" \
2651 "movb %b1,4+%0\n\t" \
2652 "movb %4,5+%0\n\t" \
2653 "movb $0,6+%0\n\t" \
2654 "movb %h1,7+%0\n\t" \
2656 : "=o"(*(n)) : "q" (addr), "ri"(limit), "i"(type))
2658 This works great except that the output assembler ends
2659 up looking a bit weird if it turns out that there is
2660 no offset. You end up producing code that looks like:
2673 So here we provide the missing zero.
2676 *displacement_string_end
= '0';
2682 * We can have operands of the form
2683 * <symbol>@GOTOFF+<nnn>
2684 * Take the easy way out here and copy everything
2685 * into a temporary buffer...
2689 cp
= strchr (input_line_pointer
, '@');
2696 /* GOT relocations are not supported in 16 bit mode */
2697 if (flag_16bit_code
)
2698 as_bad (_("GOT relocations not supported in 16 bit mode"));
2700 if (GOT_symbol
== NULL
)
2701 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2703 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2705 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2708 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2710 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2713 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2715 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2719 as_bad (_("Bad reloc specifier in expression"));
2721 /* Replace the relocation token with ' ', so that errors like
2722 foo@GOTOFF1 will be detected. */
2723 first
= cp
- input_line_pointer
;
2724 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2725 memcpy (tmpbuf
, input_line_pointer
, first
);
2726 tmpbuf
[first
] = ' ';
2727 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2728 input_line_pointer
= tmpbuf
;
2733 exp_seg
= expression (exp
);
2735 #ifdef BFD_ASSEMBLER
2736 /* We do this to make sure that the section symbol is in
2737 the symbol table. We will ultimately change the relocation
2738 to be relative to the beginning of the section */
2739 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2741 if (S_IS_LOCAL(exp
->X_add_symbol
)
2742 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2743 section_symbol (S_GET_SEGMENT (exp
->X_add_symbol
));
2744 assert (exp
->X_op
== O_symbol
);
2745 exp
->X_op
= O_subtract
;
2746 exp
->X_op_symbol
= GOT_symbol
;
2747 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2752 if (*input_line_pointer
)
2753 as_bad (_("Ignoring junk `%s' after expression"),
2754 input_line_pointer
);
2756 RESTORE_END_STRING (disp_end
+ 1);
2758 RESTORE_END_STRING (disp_end
);
2759 input_line_pointer
= save_input_line_pointer
;
2761 if (exp
->X_op
== O_absent
|| exp
->X_op
== O_big
)
2763 /* missing or bad expr becomes absolute 0 */
2764 as_bad (_("Missing or invalid displacement expression `%s' taken as 0"),
2766 exp
->X_op
= O_constant
;
2767 exp
->X_add_number
= 0;
2768 exp
->X_add_symbol
= (symbolS
*) 0;
2769 exp
->X_op_symbol
= (symbolS
*) 0;
2772 if (exp
->X_op
== O_constant
)
2774 if (fits_in_signed_byte (exp
->X_add_number
))
2775 i
.types
[this_operand
] |= Disp8
;
2777 #if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
2779 #ifdef BFD_ASSEMBLER
2780 OUTPUT_FLAVOR
== bfd_target_aout_flavour
&&
2782 exp_seg
!= text_section
2783 && exp_seg
!= data_section
2784 && exp_seg
!= bss_section
2785 && exp_seg
!= undefined_section
)
2787 #ifdef BFD_ASSEMBLER
2788 as_bad (_("Unimplemented segment %s in operand"), exp_seg
->name
);
2790 as_bad (_("Unimplemented segment type %d in operand"), exp_seg
);
2798 static int i386_operand_modifier
PARAMS ((char **, int));
2801 i386_operand_modifier (op_string
, got_a_float
)
2805 if (!strncasecmp (*op_string
, "BYTE PTR", 8))
2807 i
.suffix
= BYTE_MNEM_SUFFIX
;
2812 else if (!strncasecmp (*op_string
, "WORD PTR", 8))
2814 i
.suffix
= WORD_MNEM_SUFFIX
;
2819 else if (!strncasecmp (*op_string
, "DWORD PTR", 9))
2822 i
.suffix
= SHORT_MNEM_SUFFIX
;
2824 i
.suffix
= LONG_MNEM_SUFFIX
;
2829 else if (!strncasecmp (*op_string
, "QWORD PTR", 9))
2831 i
.suffix
= DWORD_MNEM_SUFFIX
;
2836 else if (!strncasecmp (*op_string
, "XWORD PTR", 9))
2838 i
.suffix
= LONG_DOUBLE_MNEM_SUFFIX
;
2843 else if (!strncasecmp (*op_string
, "SHORT", 5))
2849 else if (!strncasecmp (*op_string
, "OFFSET FLAT:", 12))
2855 else if (!strncasecmp (*op_string
, "FLAT", 4))
2861 else return NONE_FOUND
;
2864 static char * build_displacement_string
PARAMS ((int, char *));
2867 build_displacement_string (initial_disp
, op_string
)
2871 char *temp_string
= (char *) malloc (strlen (op_string
) + 1);
2872 char *end_of_operand_string
;
2876 temp_string
[0] = '\0';
2877 tc
= end_of_operand_string
= strchr (op_string
, '[');
2878 if ( initial_disp
&& !end_of_operand_string
)
2880 strcpy (temp_string
, op_string
);
2881 return (temp_string
);
2884 /* Build the whole displacement string */
2887 strncpy (temp_string
, op_string
, end_of_operand_string
- op_string
);
2888 temp_string
[end_of_operand_string
- op_string
] = '\0';
2892 temp_disp
= op_string
;
2894 while (*temp_disp
!= '\0')
2897 int add_minus
= (*temp_disp
== '-');
2899 if (*temp_disp
== '+' || *temp_disp
== '-' || *temp_disp
== '[')
2902 if (is_space_char (*temp_disp
))
2905 /* Don't consider registers */
2906 if ( !((*temp_disp
== REGISTER_PREFIX
|| allow_naked_reg
)
2907 && parse_register (temp_disp
, &end_op
)) )
2909 char *string_start
= temp_disp
;
2911 while (*temp_disp
!= ']'
2912 && *temp_disp
!= '+'
2913 && *temp_disp
!= '-'
2914 && *temp_disp
!= '*')
2918 strcat (temp_string
, "-");
2920 strcat (temp_string
, "+");
2922 strncat (temp_string
, string_start
, temp_disp
- string_start
);
2923 if (*temp_disp
== '+' || *temp_disp
== '-')
2927 while (*temp_disp
!= '\0'
2928 && *temp_disp
!= '+'
2929 && *temp_disp
!= '-')
2936 static int i386_parse_seg
PARAMS ((char *));
2939 i386_parse_seg (op_string
)
2942 if (is_space_char (*op_string
))
2945 /* Should be one of es, cs, ss, ds fs or gs */
2946 switch (*op_string
++)
2949 i
.seg
[i
.mem_operands
] = &es
;
2952 i
.seg
[i
.mem_operands
] = &cs
;
2955 i
.seg
[i
.mem_operands
] = &ss
;
2958 i
.seg
[i
.mem_operands
] = &ds
;
2961 i
.seg
[i
.mem_operands
] = &fs
;
2964 i
.seg
[i
.mem_operands
] = &gs
;
2967 as_bad (_("bad segment name `%s'"), op_string
);
2971 if (*op_string
++ != 's')
2973 as_bad (_("bad segment name `%s'"), op_string
);
2977 if (is_space_char (*op_string
))
2980 if (*op_string
!= ':')
2982 as_bad (_("bad segment name `%s'"), op_string
);
2990 static int i386_index_check
PARAMS((const char *));
2992 /* Make sure the memory operand we've been dealt is valid.
2993 Returns 1 on success, 0 on a failure.
2996 i386_index_check (operand_string
)
2997 const char *operand_string
;
2999 #if INFER_ADDR_PREFIX
3004 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0) ?
3005 /* 16 bit mode checks */
3007 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
3008 != (Reg16
|BaseIndex
)))
3010 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
3011 != (Reg16
|BaseIndex
))
3013 && i
.base_reg
->reg_num
< 6
3014 && i
.index_reg
->reg_num
>= 6
3015 && i
.log2_scale_factor
== 0)))) :
3016 /* 32 bit mode checks */
3018 && (i
.base_reg
->reg_type
& Reg32
) == 0)
3020 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
3021 != (Reg32
|BaseIndex
)))))
3023 #if INFER_ADDR_PREFIX
3024 if (i
.prefix
[ADDR_PREFIX
] == 0 && stackop_size
!= '\0')
3026 i
.prefix
[ADDR_PREFIX
] = ADDR_PREFIX_OPCODE
;
3028 /* Change the size of any displacement too. At most one of
3029 Disp16 or Disp32 is set.
3030 FIXME. There doesn't seem to be any real need for separate
3031 Disp16 and Disp32 flags. The same goes for Imm16 and Imm32.
3032 Removing them would probably clean up the code quite a lot.
3034 if (i
.types
[this_operand
] & (Disp16
|Disp32
))
3035 i
.types
[this_operand
] ^= (Disp16
|Disp32
);
3040 as_bad (_("`%s' is not a valid base/index expression"),
3044 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3046 flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0) ? "16" : "32");
3052 static int i386_intel_memory_operand
PARAMS ((char *));
3055 i386_intel_memory_operand (operand_string
)
3056 char *operand_string
;
3058 char *op_string
= operand_string
;
3059 char *end_of_operand_string
;
3061 if ((i
.mem_operands
== 1
3062 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3063 || i
.mem_operands
== 2)
3065 as_bad (_("too many memory references for `%s'"),
3066 current_templates
->start
->name
);
3070 /* Look for displacement preceding open bracket */
3071 if (*op_string
!= '[')
3076 end_seg
= strchr (op_string
, ':');
3079 if (!i386_parse_seg (op_string
))
3081 op_string
= end_seg
+ 1;
3084 temp_string
= build_displacement_string (true, op_string
);
3086 if (i
.disp_operands
== 0 &&
3087 !i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3090 end_of_operand_string
= strchr (op_string
, '[');
3091 if (!end_of_operand_string
)
3092 end_of_operand_string
= op_string
+ strlen (op_string
);
3094 if (is_space_char (*end_of_operand_string
))
3095 --end_of_operand_string
;
3097 op_string
= end_of_operand_string
;
3100 if (*op_string
== '[')
3104 /* Pick off each component and figure out where it belongs */
3106 end_of_operand_string
= op_string
;
3108 while (*op_string
!= ']')
3110 const reg_entry
*temp_reg
;
3114 while (*end_of_operand_string
!= '+'
3115 && *end_of_operand_string
!= '-'
3116 && *end_of_operand_string
!= '*'
3117 && *end_of_operand_string
!= ']')
3118 end_of_operand_string
++;
3120 temp_string
= op_string
;
3121 if (*temp_string
== '+')
3124 if (is_space_char (*temp_string
))
3128 if ((*temp_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3129 && (temp_reg
= parse_register (temp_string
, &end_op
)) != NULL
)
3131 if (i
.base_reg
== NULL
)
3132 i
.base_reg
= temp_reg
;
3134 i
.index_reg
= temp_reg
;
3136 i
.types
[this_operand
] |= BaseIndex
;
3138 else if (*temp_string
== REGISTER_PREFIX
)
3140 as_bad (_("bad register name `%s'"), temp_string
);
3143 else if (is_digit_char (*op_string
)
3144 || *op_string
== '+' || *op_string
== '-')
3146 temp_string
= build_displacement_string (false, op_string
);
3148 if (*temp_string
== '+')
3151 if (i
.disp_operands
== 0 &&
3152 !i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3156 end_of_operand_string
= op_string
;
3157 while (*end_of_operand_string
!= ']'
3158 && *end_of_operand_string
!= '+'
3159 && *end_of_operand_string
!= '-'
3160 && *end_of_operand_string
!= '*')
3161 ++end_of_operand_string
;
3163 else if (*op_string
== '*')
3167 if (i
.base_reg
&& !i
.index_reg
)
3169 i
.index_reg
= i
.base_reg
;
3173 if (!i386_scale (op_string
))
3176 op_string
= end_of_operand_string
;
3177 ++end_of_operand_string
;
3181 if (i386_index_check (operand_string
) == 0)
3189 i386_intel_operand (operand_string
, got_a_float
)
3190 char *operand_string
;
3193 const reg_entry
* r
;
3195 char *op_string
= operand_string
;
3197 int operand_modifier
= i386_operand_modifier (&op_string
, got_a_float
);
3198 if (is_space_char (*op_string
))
3201 switch (operand_modifier
)
3208 if (!i386_intel_memory_operand (op_string
))
3214 if (!i386_immediate (op_string
))
3220 /* Should be register or immediate */
3221 if (is_digit_char (*op_string
)
3222 && strchr (op_string
, '[') == 0)
3224 if (!i386_immediate (op_string
))
3227 else if ((*op_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3228 && (r
= parse_register (op_string
, &end_op
)) != NULL
)
3230 /* Check for a segment override by searching for ':' after a
3231 segment register. */
3233 if (is_space_char (*op_string
))
3235 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3240 i
.seg
[i
.mem_operands
] = &es
;
3243 i
.seg
[i
.mem_operands
] = &cs
;
3246 i
.seg
[i
.mem_operands
] = &ss
;
3249 i
.seg
[i
.mem_operands
] = &ds
;
3252 i
.seg
[i
.mem_operands
] = &fs
;
3255 i
.seg
[i
.mem_operands
] = &gs
;
3260 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3261 i
.op
[this_operand
].regs
= r
;
3264 else if (*op_string
== REGISTER_PREFIX
)
3266 as_bad (_("bad register name `%s'"), op_string
);
3269 else if (!i386_intel_memory_operand (op_string
))
3278 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
3282 i386_operand (operand_string
)
3283 char *operand_string
;
3287 char *op_string
= operand_string
;
3289 if (is_space_char (*op_string
))
3292 /* We check for an absolute prefix (differentiating,
3293 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
3294 if (*op_string
== ABSOLUTE_PREFIX
)
3297 if (is_space_char (*op_string
))
3299 i
.types
[this_operand
] |= JumpAbsolute
;
3302 /* Check if operand is a register. */
3303 if ((*op_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3304 && (r
= parse_register (op_string
, &end_op
)) != NULL
)
3306 /* Check for a segment override by searching for ':' after a
3307 segment register. */
3309 if (is_space_char (*op_string
))
3311 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3316 i
.seg
[i
.mem_operands
] = &es
;
3319 i
.seg
[i
.mem_operands
] = &cs
;
3322 i
.seg
[i
.mem_operands
] = &ss
;
3325 i
.seg
[i
.mem_operands
] = &ds
;
3328 i
.seg
[i
.mem_operands
] = &fs
;
3331 i
.seg
[i
.mem_operands
] = &gs
;
3335 /* Skip the ':' and whitespace. */
3337 if (is_space_char (*op_string
))
3340 if (!is_digit_char (*op_string
)
3341 && !is_identifier_char (*op_string
)
3342 && *op_string
!= '('
3343 && *op_string
!= ABSOLUTE_PREFIX
)
3345 as_bad (_("bad memory operand `%s'"), op_string
);
3348 /* Handle case of %es:*foo. */
3349 if (*op_string
== ABSOLUTE_PREFIX
)
3352 if (is_space_char (*op_string
))
3354 i
.types
[this_operand
] |= JumpAbsolute
;
3356 goto do_memory_reference
;
3360 as_bad (_("Junk `%s' after register"), op_string
);
3363 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3364 i
.op
[this_operand
].regs
= r
;
3367 else if (*op_string
== REGISTER_PREFIX
)
3369 as_bad (_("bad register name `%s'"), op_string
);
3372 else if (*op_string
== IMMEDIATE_PREFIX
)
3373 { /* ... or an immediate */
3375 if (i
.types
[this_operand
] & JumpAbsolute
)
3377 as_bad (_("Immediate operand illegal with absolute jump"));
3380 if (!i386_immediate (op_string
))
3383 else if (is_digit_char (*op_string
)
3384 || is_identifier_char (*op_string
)
3385 || *op_string
== '(' )
3387 /* This is a memory reference of some sort. */
3390 /* Start and end of displacement string expression (if found). */
3391 char *displacement_string_start
;
3392 char *displacement_string_end
;
3394 do_memory_reference
:
3395 if ((i
.mem_operands
== 1
3396 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3397 || i
.mem_operands
== 2)
3399 as_bad (_("too many memory references for `%s'"),
3400 current_templates
->start
->name
);
3404 /* Check for base index form. We detect the base index form by
3405 looking for an ')' at the end of the operand, searching
3406 for the '(' matching it, and finding a REGISTER_PREFIX or ','
3408 base_string
= op_string
+ strlen (op_string
);
3411 if (is_space_char (*base_string
))
3414 /* If we only have a displacement, set-up for it to be parsed later. */
3415 displacement_string_start
= op_string
;
3416 displacement_string_end
= base_string
+ 1;
3418 if (*base_string
== ')')
3421 unsigned int parens_balanced
= 1;
3422 /* We've already checked that the number of left & right ()'s are
3423 equal, so this loop will not be infinite. */
3427 if (*base_string
== ')')
3429 if (*base_string
== '(')
3432 while (parens_balanced
);
3434 temp_string
= base_string
;
3436 /* Skip past '(' and whitespace. */
3438 if (is_space_char (*base_string
))
3441 if (*base_string
== ','
3442 || ((*base_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3443 && (i
.base_reg
= parse_register (base_string
, &end_op
)) != NULL
))
3445 displacement_string_end
= temp_string
;
3447 i
.types
[this_operand
] |= BaseIndex
;
3451 base_string
= end_op
;
3452 if (is_space_char (*base_string
))
3456 /* There may be an index reg or scale factor here. */
3457 if (*base_string
== ',')
3460 if (is_space_char (*base_string
))
3463 if ((*base_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3464 && (i
.index_reg
= parse_register (base_string
, &end_op
)) != NULL
)
3466 base_string
= end_op
;
3467 if (is_space_char (*base_string
))
3469 if (*base_string
== ',')
3472 if (is_space_char (*base_string
))
3475 else if (*base_string
!= ')' )
3477 as_bad (_("expecting `,' or `)' after index register in `%s'"),
3482 else if (*base_string
== REGISTER_PREFIX
)
3484 as_bad (_("bad register name `%s'"), base_string
);
3488 /* Check for scale factor. */
3489 if (isdigit ((unsigned char) *base_string
))
3491 if (!i386_scale (base_string
))
3495 if (is_space_char (*base_string
))
3497 if (*base_string
!= ')')
3499 as_bad (_("expecting `)' after scale factor in `%s'"),
3504 else if (!i
.index_reg
)
3506 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
3511 else if (*base_string
!= ')')
3513 as_bad (_("expecting `,' or `)' after base register in `%s'"),
3518 else if (*base_string
== REGISTER_PREFIX
)
3520 as_bad (_("bad register name `%s'"), base_string
);
3525 /* If there's an expression beginning the operand, parse it,
3526 assuming displacement_string_start and
3527 displacement_string_end are meaningful. */
3528 if (displacement_string_start
!= displacement_string_end
)
3530 if (!i386_displacement (displacement_string_start
,
3531 displacement_string_end
))
3535 /* Special case for (%dx) while doing input/output op. */
3537 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
3539 && i
.log2_scale_factor
== 0
3540 && i
.seg
[i
.mem_operands
] == 0
3541 && (i
.types
[this_operand
] & Disp
) == 0)
3543 i
.types
[this_operand
] = InOutPortReg
;
3547 if (i386_index_check (operand_string
) == 0)
3552 { /* it's not a memory operand; argh! */
3553 as_bad (_("invalid char %s beginning operand %d `%s'"),
3554 output_invalid (*op_string
),
3559 return 1; /* normal return */
3563 * md_estimate_size_before_relax()
3565 * Called just before relax().
3566 * Any symbol that is now undefined will not become defined.
3567 * Return the correct fr_subtype in the frag.
3568 * Return the initial "guess for fr_var" to caller.
3569 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
3570 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
3571 * Although it may not be explicit in the frag, pretend fr_var starts with a
3575 md_estimate_size_before_relax (fragP
, segment
)
3576 register fragS
*fragP
;
3577 register segT segment
;
3579 register unsigned char *opcode
;
3580 register int old_fr_fix
;
3582 old_fr_fix
= fragP
->fr_fix
;
3583 opcode
= (unsigned char *) fragP
->fr_opcode
;
3584 /* We've already got fragP->fr_subtype right; all we have to do is
3585 check for un-relaxable symbols. */
3586 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
3588 /* symbol is undefined in this segment */
3589 int code16
= fragP
->fr_subtype
& CODE16
;
3590 int size
= code16
? 2 : 4;
3591 #ifdef BFD_ASSEMBLER
3592 enum bfd_reloc_code_real reloc_type
;
3597 if (GOT_symbol
/* Not quite right - we should switch on presence of
3598 @PLT, but I cannot see how to get to that from
3599 here. We should have done this in md_assemble to
3600 really get it right all of the time, but I think it
3601 does not matter that much, as this will be right
3602 most of the time. ERY */
3603 && S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3604 reloc_type
= BFD_RELOC_386_PLT32
;
3606 reloc_type
= BFD_RELOC_16_PCREL
;
3608 reloc_type
= BFD_RELOC_32_PCREL
;
3612 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
3613 opcode
[0] = 0xe9; /* dword disp jmp */
3614 fragP
->fr_fix
+= size
;
3615 fix_new (fragP
, old_fr_fix
, size
,
3617 fragP
->fr_offset
, 1,
3622 /* This changes the byte-displacement jump 0x7N
3623 to the dword-displacement jump 0x0f,0x8N. */
3624 opcode
[1] = opcode
[0] + 0x10;
3625 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3626 fragP
->fr_fix
+= 1 + size
; /* we've added an opcode byte */
3627 fix_new (fragP
, old_fr_fix
+ 1, size
,
3629 fragP
->fr_offset
, 1,
3635 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
3636 } /* md_estimate_size_before_relax() */
3639 * md_convert_frag();
3641 * Called after relax() is finished.
3642 * In: Address of frag.
3643 * fr_type == rs_machine_dependent.
3644 * fr_subtype is what the address relaxed to.
3646 * Out: Any fixSs and constants are set up.
3647 * Caller will turn frag into a ".space 0".
3649 #ifndef BFD_ASSEMBLER
3651 md_convert_frag (headers
, sec
, fragP
)
3652 object_headers
*headers ATTRIBUTE_UNUSED
;
3653 segT sec ATTRIBUTE_UNUSED
;
3654 register fragS
*fragP
;
3657 md_convert_frag (abfd
, sec
, fragP
)
3658 bfd
*abfd ATTRIBUTE_UNUSED
;
3659 segT sec ATTRIBUTE_UNUSED
;
3660 register fragS
*fragP
;
3663 register unsigned char *opcode
;
3664 unsigned char *where_to_put_displacement
= NULL
;
3665 unsigned int target_address
;
3666 unsigned int opcode_address
;
3667 unsigned int extension
= 0;
3668 int displacement_from_opcode_start
;
3670 opcode
= (unsigned char *) fragP
->fr_opcode
;
3672 /* Address we want to reach in file space. */
3673 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
3674 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
3675 target_address
+= symbol_get_frag (fragP
->fr_symbol
)->fr_address
;
3678 /* Address opcode resides at in file space. */
3679 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
3681 /* Displacement from opcode start to fill into instruction. */
3682 displacement_from_opcode_start
= target_address
- opcode_address
;
3684 switch (fragP
->fr_subtype
)
3686 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL
):
3687 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL16
):
3688 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
):
3689 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL16
):
3690 /* don't have to change opcode */
3691 extension
= 1; /* 1 opcode + 1 displacement */
3692 where_to_put_displacement
= &opcode
[1];
3695 case ENCODE_RELAX_STATE (COND_JUMP
, BIG
):
3696 extension
= 5; /* 2 opcode + 4 displacement */
3697 opcode
[1] = opcode
[0] + 0x10;
3698 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3699 where_to_put_displacement
= &opcode
[2];
3702 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
):
3703 extension
= 4; /* 1 opcode + 4 displacement */
3705 where_to_put_displacement
= &opcode
[1];
3708 case ENCODE_RELAX_STATE (COND_JUMP
, BIG16
):
3709 extension
= 3; /* 2 opcode + 2 displacement */
3710 opcode
[1] = opcode
[0] + 0x10;
3711 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3712 where_to_put_displacement
= &opcode
[2];
3715 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
):
3716 extension
= 2; /* 1 opcode + 2 displacement */
3718 where_to_put_displacement
= &opcode
[1];
3722 BAD_CASE (fragP
->fr_subtype
);
3725 /* now put displacement after opcode */
3726 md_number_to_chars ((char *) where_to_put_displacement
,
3727 (valueT
) (displacement_from_opcode_start
- extension
),
3728 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
3729 fragP
->fr_fix
+= extension
;
3733 int md_short_jump_size
= 2; /* size of byte displacement jmp */
3734 int md_long_jump_size
= 5; /* size of dword displacement jmp */
3735 const int md_reloc_size
= 8; /* Size of relocation record */
3738 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3740 addressT from_addr
, to_addr
;
3741 fragS
*frag ATTRIBUTE_UNUSED
;
3742 symbolS
*to_symbol ATTRIBUTE_UNUSED
;
3746 offset
= to_addr
- (from_addr
+ 2);
3747 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
3748 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
3752 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3754 addressT from_addr
, to_addr
;
3760 if (flag_do_long_jump
)
3762 offset
= to_addr
- S_GET_VALUE (to_symbol
);
3763 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
3764 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3765 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
3766 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
3770 offset
= to_addr
- (from_addr
+ 5);
3771 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
3772 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3776 /* Apply a fixup (fixS) to segment data, once it has been determined
3777 by our caller that we have all the info we need to fix it up.
3779 On the 386, immediates, displacements, and data pointers are all in
3780 the same (little-endian) format, so we don't need to care about which
3784 md_apply_fix3 (fixP
, valp
, seg
)
3785 fixS
*fixP
; /* The fix we're to put in. */
3786 valueT
*valp
; /* Pointer to the value of the bits. */
3787 segT seg ATTRIBUTE_UNUSED
; /* Segment fix is from. */
3789 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3790 valueT value
= *valp
;
3792 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
3795 switch (fixP
->fx_r_type
)
3801 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3804 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
3807 fixP
->fx_r_type
= BFD_RELOC_8_PCREL
;
3812 /* This is a hack. There should be a better way to handle this.
3813 This covers for the fact that bfd_install_relocation will
3814 subtract the current location (for partial_inplace, PC relative
3815 relocations); see more below. */
3816 if ((fixP
->fx_r_type
== BFD_RELOC_32_PCREL
3817 || fixP
->fx_r_type
== BFD_RELOC_16_PCREL
3818 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
)
3822 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3824 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
3827 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3829 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3830 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
3832 segT fseg
= S_GET_SEGMENT (fixP
->fx_addsy
);
3835 || (symbol_section_p (fixP
->fx_addsy
)
3836 && fseg
!= absolute_section
))
3837 && ! S_IS_EXTERNAL (fixP
->fx_addsy
)
3838 && ! S_IS_WEAK (fixP
->fx_addsy
)
3839 && S_IS_DEFINED (fixP
->fx_addsy
)
3840 && ! S_IS_COMMON (fixP
->fx_addsy
))
3842 /* Yes, we add the values in twice. This is because
3843 bfd_perform_relocation subtracts them out again. I think
3844 bfd_perform_relocation is broken, but I don't dare change
3846 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3850 #if defined (OBJ_COFF) && defined (TE_PE)
3851 /* For some reason, the PE format does not store a section
3852 address offset for a PC relative symbol. */
3853 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
3854 value
+= md_pcrel_from (fixP
);
3855 else if (S_IS_EXTERNAL (fixP
->fx_addsy
)
3856 || S_IS_WEAK (fixP
->fx_addsy
))
3858 /* We are generating an external relocation for this defined
3859 symbol. We add the address, because
3860 bfd_install_relocation will subtract it. VALUE already
3861 holds the symbol value, because fixup_segment added it
3862 in. We subtract it out, and then we subtract it out
3863 again because bfd_install_relocation will add it in
3865 value
+= md_pcrel_from (fixP
);
3866 value
-= 2 * S_GET_VALUE (fixP
->fx_addsy
);
3871 else if (fixP
->fx_addsy
!= NULL
3872 && S_IS_DEFINED (fixP
->fx_addsy
)
3873 && (S_IS_EXTERNAL (fixP
->fx_addsy
)
3874 || S_IS_WEAK (fixP
->fx_addsy
)))
3876 /* We are generating an external relocation for this defined
3877 symbol. VALUE already holds the symbol value, and
3878 bfd_install_relocation will add it in again. We don't want
3880 value
-= 2 * S_GET_VALUE (fixP
->fx_addsy
);
3884 /* Fix a few things - the dynamic linker expects certain values here,
3885 and we must not dissappoint it. */
3886 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3887 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3889 switch (fixP
->fx_r_type
) {
3890 case BFD_RELOC_386_PLT32
:
3891 /* Make the jump instruction point to the address of the operand. At
3892 runtime we merely add the offset to the actual PLT entry. */
3895 case BFD_RELOC_386_GOTPC
:
3897 * This is tough to explain. We end up with this one if we have
3898 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
3899 * here is to obtain the absolute address of the GOT, and it is strongly
3900 * preferable from a performance point of view to avoid using a runtime
3901 * relocation for this. The actual sequence of instructions often look
3907 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
3909 * The call and pop essentially return the absolute address of
3910 * the label .L66 and store it in %ebx. The linker itself will
3911 * ultimately change the first operand of the addl so that %ebx points to
3912 * the GOT, but to keep things simple, the .o file must have this operand
3913 * set so that it generates not the absolute address of .L66, but the
3914 * absolute address of itself. This allows the linker itself simply
3915 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
3916 * added in, and the addend of the relocation is stored in the operand
3917 * field for the instruction itself.
3919 * Our job here is to fix the operand so that it would add the correct
3920 * offset so that %ebx would point to itself. The thing that is tricky is
3921 * that .-.L66 will point to the beginning of the instruction, so we need
3922 * to further modify the operand so that it will point to itself.
3923 * There are other cases where you have something like:
3925 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
3927 * and here no correction would be required. Internally in the assembler
3928 * we treat operands of this form as not being pcrel since the '.' is
3929 * explicitly mentioned, and I wonder whether it would simplify matters
3930 * to do it this way. Who knows. In earlier versions of the PIC patches,
3931 * the pcrel_adjust field was used to store the correction, but since the
3932 * expression is not pcrel, I felt it would be confusing to do it this way.
3936 case BFD_RELOC_386_GOT32
:
3937 value
= 0; /* Fully resolved at runtime. No addend. */
3939 case BFD_RELOC_386_GOTOFF
:
3942 case BFD_RELOC_VTABLE_INHERIT
:
3943 case BFD_RELOC_VTABLE_ENTRY
:
3950 #endif /* defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) */
3952 #endif /* defined (BFD_ASSEMBLER) && !defined (TE_Mach) */
3953 md_number_to_chars (p
, value
, fixP
->fx_size
);
3959 /* This is never used. */
3960 long /* Knows about the byte order in a word. */
3961 md_chars_to_number (con
, nbytes
)
3962 unsigned char con
[]; /* Low order byte 1st. */
3963 int nbytes
; /* Number of bytes in the input. */
3966 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
3968 retval
<<= BITS_PER_CHAR
;
3976 #define MAX_LITTLENUMS 6
3978 /* Turn the string pointed to by litP into a floating point constant of type
3979 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
3980 is stored in *sizeP . An error message is returned, or NULL on OK. */
3982 md_atof (type
, litP
, sizeP
)
3988 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
3989 LITTLENUM_TYPE
*wordP
;
4011 return _("Bad call to md_atof ()");
4013 t
= atof_ieee (input_line_pointer
, type
, words
);
4015 input_line_pointer
= t
;
4017 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
4018 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
4019 the bigendian 386. */
4020 for (wordP
= words
+ prec
- 1; prec
--;)
4022 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
4023 litP
+= sizeof (LITTLENUM_TYPE
);
4028 char output_invalid_buf
[8];
4030 static char * output_invalid
PARAMS ((int));
4037 sprintf (output_invalid_buf
, "'%c'", c
);
4039 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
4040 return output_invalid_buf
;
4044 /* REG_STRING starts *before* REGISTER_PREFIX. */
4046 static const reg_entry
*
4047 parse_register (reg_string
, end_op
)
4051 char *s
= reg_string
;
4053 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
4056 /* Skip possible REGISTER_PREFIX and possible whitespace. */
4057 if (*s
== REGISTER_PREFIX
)
4060 if (is_space_char (*s
))
4064 while ((*p
++ = register_chars
[(unsigned char) *s
]) != '\0')
4066 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
4067 return (const reg_entry
*) NULL
;
4073 r
= (const reg_entry
*) hash_find (reg_hash
, reg_name_given
);
4075 /* Handle floating point regs, allowing spaces in the (i) part. */
4076 if (r
== i386_regtab
/* %st is first entry of table */)
4078 if (is_space_char (*s
))
4083 if (is_space_char (*s
))
4085 if (*s
>= '0' && *s
<= '7')
4087 r
= &i386_float_regtab
[*s
- '0'];
4089 if (is_space_char (*s
))
4097 /* We have "%st(" then garbage */
4098 return (const reg_entry
*) NULL
;
4105 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4106 CONST
char *md_shortopts
= "kmVQ:sq";
4108 CONST
char *md_shortopts
= "m";
4110 struct option md_longopts
[] = {
4111 {NULL
, no_argument
, NULL
, 0}
4113 size_t md_longopts_size
= sizeof (md_longopts
);
4116 md_parse_option (c
, arg
)
4118 char *arg ATTRIBUTE_UNUSED
;
4123 flag_do_long_jump
= 1;
4126 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4127 /* -k: Ignore for FreeBSD compatibility. */
4131 /* -V: SVR4 argument to print version ID. */
4133 print_version_id ();
4136 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
4137 should be emitted or not. FIXME: Not implemented. */
4142 /* -s: On i386 Solaris, this tells the native assembler to use
4143 .stab instead of .stab.excl. We always use .stab anyhow. */
4147 /* -q: On i386 Solaris, this tells the native assembler does
4159 md_show_usage (stream
)
4162 fprintf (stream
, _("\
4163 -m do long jump\n"));
4164 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4165 fprintf (stream
, _("\
4166 -V print assembler version number\n\
4174 #ifdef BFD_ASSEMBLER
4175 #if ((defined (OBJ_MAYBE_ELF) && defined (OBJ_MAYBE_COFF)) \
4176 || (defined (OBJ_MAYBE_ELF) && defined (OBJ_MAYBE_AOUT)) \
4177 || (defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)))
4179 /* Pick the target format to use. */
4182 i386_target_format ()
4184 switch (OUTPUT_FLAVOR
)
4186 #ifdef OBJ_MAYBE_AOUT
4187 case bfd_target_aout_flavour
:
4188 return AOUT_TARGET_FORMAT
;
4190 #ifdef OBJ_MAYBE_COFF
4191 case bfd_target_coff_flavour
:
4194 #ifdef OBJ_MAYBE_ELF
4195 case bfd_target_elf_flavour
:
4196 return "elf32-i386";
4204 #endif /* OBJ_MAYBE_ more than one */
4205 #endif /* BFD_ASSEMBLER */
4208 md_undefined_symbol (name
)
4211 if (name
[0] == GLOBAL_OFFSET_TABLE_NAME
[0]
4212 && name
[1] == GLOBAL_OFFSET_TABLE_NAME
[1]
4213 && name
[2] == GLOBAL_OFFSET_TABLE_NAME
[2]
4214 && strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4218 if (symbol_find (name
))
4219 as_bad (_("GOT already in symbol table"));
4220 GOT_symbol
= symbol_new (name
, undefined_section
,
4221 (valueT
) 0, &zero_address_frag
);
4228 /* Round up a section size to the appropriate boundary. */
4230 md_section_align (segment
, size
)
4231 segT segment ATTRIBUTE_UNUSED
;
4234 #ifdef BFD_ASSEMBLER
4235 #if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
4236 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
)
4238 /* For a.out, force the section size to be aligned. If we don't do
4239 this, BFD will align it for us, but it will not write out the
4240 final bytes of the section. This may be a bug in BFD, but it is
4241 easier to fix it here since that is how the other a.out targets
4245 align
= bfd_get_section_alignment (stdoutput
, segment
);
4246 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
4254 /* On the i386, PC-relative offsets are relative to the start of the
4255 next instruction. That is, the address of the offset, plus its
4256 size, since the offset is always the last part of the insn. */
4259 md_pcrel_from (fixP
)
4262 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4269 int ignore ATTRIBUTE_UNUSED
;
4273 temp
= get_absolute_expression ();
4274 subseg_set (bss_section
, (subsegT
) temp
);
4275 demand_empty_rest_of_line ();
4281 #ifdef BFD_ASSEMBLER
4284 i386_validate_fix (fixp
)
4287 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
4289 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
4295 tc_gen_reloc (section
, fixp
)
4296 asection
*section ATTRIBUTE_UNUSED
;
4300 bfd_reloc_code_real_type code
;
4302 switch (fixp
->fx_r_type
)
4304 case BFD_RELOC_386_PLT32
:
4305 case BFD_RELOC_386_GOT32
:
4306 case BFD_RELOC_386_GOTOFF
:
4307 case BFD_RELOC_386_GOTPC
:
4309 case BFD_RELOC_VTABLE_ENTRY
:
4310 case BFD_RELOC_VTABLE_INHERIT
:
4311 code
= fixp
->fx_r_type
;
4316 switch (fixp
->fx_size
)
4319 as_bad (_("Can not do %d byte pc-relative relocation"),
4321 code
= BFD_RELOC_32_PCREL
;
4323 case 1: code
= BFD_RELOC_8_PCREL
; break;
4324 case 2: code
= BFD_RELOC_16_PCREL
; break;
4325 case 4: code
= BFD_RELOC_32_PCREL
; break;
4330 switch (fixp
->fx_size
)
4333 as_bad (_("Can not do %d byte relocation"), fixp
->fx_size
);
4334 code
= BFD_RELOC_32
;
4336 case 1: code
= BFD_RELOC_8
; break;
4337 case 2: code
= BFD_RELOC_16
; break;
4338 case 4: code
= BFD_RELOC_32
; break;
4344 if (code
== BFD_RELOC_32
4346 && fixp
->fx_addsy
== GOT_symbol
)
4347 code
= BFD_RELOC_386_GOTPC
;
4349 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4350 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4351 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4353 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4354 /* HACK: Since i386 ELF uses Rel instead of Rela, encode the
4355 vtable entry to be used in the relocation's section offset. */
4356 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
4357 rel
->address
= fixp
->fx_offset
;
4360 rel
->addend
= fixp
->fx_addnumber
;
4364 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
4365 if (rel
->howto
== NULL
)
4367 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4368 _("Cannot represent relocation type %s"),
4369 bfd_get_reloc_code_name (code
));
4370 /* Set howto to a garbage value so that we can keep going. */
4371 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4372 assert (rel
->howto
!= NULL
);
4378 #else /* ! BFD_ASSEMBLER */
4380 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
4382 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
4385 relax_addressT segment_address_in_file
;
4388 * In: length of relocation (or of address) in chars: 1, 2 or 4.
4389 * Out: GNU LD relocation length code: 0, 1, or 2.
4392 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
4395 know (fixP
->fx_addsy
!= NULL
);
4397 md_number_to_chars (where
,
4398 (valueT
) (fixP
->fx_frag
->fr_address
4399 + fixP
->fx_where
- segment_address_in_file
),
4402 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
4403 ? S_GET_TYPE (fixP
->fx_addsy
)
4404 : fixP
->fx_addsy
->sy_number
);
4406 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
4407 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
4408 where
[4] = r_symbolnum
& 0x0ff;
4409 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
4410 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
4411 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
4414 #endif /* OBJ_AOUT or OBJ_BOUT */
4416 #if defined (I386COFF)
4419 tc_coff_fix2rtype (fixP
)
4422 if (fixP
->fx_r_type
== R_IMAGEBASE
)
4425 return (fixP
->fx_pcrel
?
4426 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
4427 fixP
->fx_size
== 2 ? R_PCRWORD
:
4429 (fixP
->fx_size
== 1 ? R_RELBYTE
:
4430 fixP
->fx_size
== 2 ? R_RELWORD
:
4435 tc_coff_sizemachdep (frag
)
4439 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
4444 #endif /* I386COFF */
4446 #endif /* ! BFD_ASSEMBLER */
4448 /* end of tc-i386.c */