1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 1998
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
35 #include "opcode/i386.h"
38 #define TC_RELOC(X,Y) (Y)
41 #ifndef REGISTER_WARNINGS
42 #define REGISTER_WARNINGS 1
45 #ifndef SCALE1_WHEN_NO_INDEX
46 /* Specifying a scale factor besides 1 when there is no index is
47 futile. eg. `mov (%ebx,2),%al' does exactly the same as
48 `mov (%ebx),%al'. To slavishly follow what the programmer
49 specified, set SCALE1_WHEN_NO_INDEX to 0. */
50 #define SCALE1_WHEN_NO_INDEX 1
53 static unsigned long mode_from_disp_size
PARAMS ((unsigned long));
54 static int fits_in_signed_byte
PARAMS ((long));
55 static int fits_in_unsigned_byte
PARAMS ((long));
56 static int fits_in_unsigned_word
PARAMS ((long));
57 static int fits_in_signed_word
PARAMS ((long));
58 static int smallest_imm_type
PARAMS ((long));
59 static int add_prefix
PARAMS ((unsigned int));
60 static void set_16bit_code_flag
PARAMS ((int));
62 static bfd_reloc_code_real_type reloc
63 PARAMS ((int, int, bfd_reloc_code_real_type
));
66 /* 'md_assemble ()' gathers together information and puts it into a
71 /* TM holds the template for the insn were currently assembling. */
74 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
77 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
79 /* OPERANDS gives the number of given operands. */
80 unsigned int operands
;
82 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
83 of given register, displacement, memory operands and immediate
85 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
87 /* TYPES [i] is the type (see above #defines) which tells us how to
88 search through DISPS [i] & IMMS [i] & REGS [i] for the required
90 unsigned int types
[MAX_OPERANDS
];
92 /* Displacements (if given) for each operand. */
93 expressionS
*disps
[MAX_OPERANDS
];
95 /* Relocation type for operand */
97 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
99 int disp_reloc
[MAX_OPERANDS
];
102 /* Immediate operands (if given) for each operand. */
103 expressionS
*imms
[MAX_OPERANDS
];
105 /* Register operands (if given) for each operand. */
106 const reg_entry
*regs
[MAX_OPERANDS
];
108 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
109 the base index byte below. */
110 const reg_entry
*base_reg
;
111 const reg_entry
*index_reg
;
112 unsigned int log2_scale_factor
;
114 /* SEG gives the seg_entries of this insn. They are zero unless
115 explicit segment overrides are given. */
116 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
118 /* PREFIX holds all the given prefix opcodes (usually null).
119 PREFIXES is the number of prefix opcodes. */
120 unsigned int prefixes
;
121 unsigned char prefix
[MAX_PREFIXES
];
123 /* RM and BI are the modrm byte and the base index byte where the
124 addressing modes of this insn are encoded. */
130 typedef struct _i386_insn i386_insn
;
132 /* This array holds the chars that always start a comment. If the
133 pre-processor is disabled, these aren't very useful */
134 #if defined (TE_I386AIX) || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
135 const char comment_chars
[] = "#/";
137 const char comment_chars
[] = "#";
140 /* This array holds the chars that only start a comment at the beginning of
141 a line. If the line seems to have the form '# 123 filename'
142 .line and .file directives will appear in the pre-processed output */
143 /* Note that input_file.c hand checks for '#' at the beginning of the
144 first line of the input file. This is because the compiler outputs
145 #NO_APP at the beginning of its output. */
146 /* Also note that comments started like this one will always work if
147 '/' isn't otherwise defined. */
148 #if defined (TE_I386AIX) || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
149 const char line_comment_chars
[] = "";
151 const char line_comment_chars
[] = "/";
153 const char line_separator_chars
[] = "";
155 /* Chars that can be used to separate mant from exp in floating point nums */
156 const char EXP_CHARS
[] = "eE";
158 /* Chars that mean this number is a floating point constant */
161 const char FLT_CHARS
[] = "fFdDxX";
163 /* tables for lexical analysis */
164 static char opcode_chars
[256];
165 static char register_chars
[256];
166 static char operand_chars
[256];
167 static char space_chars
[256];
168 static char identifier_chars
[256];
169 static char digit_chars
[256];
172 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
173 #define is_operand_char(x) (operand_chars[(unsigned char) x])
174 #define is_register_char(x) (register_chars[(unsigned char) x])
175 #define is_space_char(x) (space_chars[(unsigned char) x])
176 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
177 #define is_digit_char(x) (digit_chars[(unsigned char) x])
179 /* put here all non-digit non-letter charcters that may occur in an operand */
180 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
182 /* md_assemble() always leaves the strings it's passed unaltered. To
183 effect this we maintain a stack of saved characters that we've smashed
184 with '\0's (indicating end of strings for various sub-fields of the
185 assembler instruction). */
186 static char save_stack
[32];
187 static char *save_stack_p
; /* stack pointer */
188 #define END_STRING_AND_SAVE(s) \
189 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
190 #define RESTORE_END_STRING(s) \
191 do { *(s) = *--save_stack_p; } while (0)
193 /* The instruction we're assembling. */
196 /* Possible templates for current insn. */
197 static templates
*current_templates
;
199 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
200 static expressionS disp_expressions
[2], im_expressions
[2];
202 static int this_operand
; /* current operand we are working on */
204 static int flag_do_long_jump
; /* FIXME what does this do? */
206 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
208 /* Interface to relax_segment.
209 There are 2 relax states for 386 jump insns: one for conditional &
210 one for unconditional jumps. This is because the these two types
211 of jumps add different sizes to frags when we're figuring out what
212 sort of jump to choose to reach a given label. */
215 #define COND_JUMP 1 /* conditional jump */
216 #define UNCOND_JUMP 2 /* unconditional jump */
221 #define UNKNOWN_SIZE 3
225 #define INLINE __inline__
231 #define ENCODE_RELAX_STATE(type,size) \
232 ((relax_substateT)((type<<2) | (size)))
233 #define SIZE_FROM_RELAX_STATE(s) \
234 ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) )
236 const relax_typeS md_relax_table
[] =
239 1) most positive reach of this state,
240 2) most negative reach of this state,
241 3) how many bytes this mode will add to the size of the current frag
242 4) which index into the table to try if we can't fit into this one.
249 /* For now we don't use word displacement jumps; they will not work
250 for destination addresses > 0xFFFF, since they clear the upper 16
252 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
253 /* word conditionals add 3 bytes to frag:
254 2 opcode prefix; 1 displacement bytes */
255 {32767 + 2, -32768 + 2, 3, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
256 /* dword conditionals adds 4 bytes to frag:
257 1 opcode prefix; 3 displacement bytes */
261 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
262 /* word jmp adds 2 bytes to frag:
263 1 opcode prefix; 1 displacement bytes */
264 {32767 + 2, -32768 + 2, 2, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
265 /* dword jmp adds 3 bytes to frag:
266 0 opcode prefix; 3 displacement bytes */
274 i386_align_code (fragP
, count
)
278 /* Various efficient no-op patterns for aligning code labels. */
279 /* Note: Don't try to assemble the instructions in the comments. */
280 /* 0L and 0w are not legal */
281 static const char f32_1
[] =
283 static const char f32_2
[] =
284 {0x89,0xf6}; /* movl %esi,%esi */
285 static const char f32_3
[] =
286 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
287 static const char f32_4
[] =
288 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
289 static const char f32_5
[] =
291 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
292 static const char f32_6
[] =
293 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
294 static const char f32_7
[] =
295 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
296 static const char f32_8
[] =
298 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
299 static const char f32_9
[] =
300 {0x89,0xf6, /* movl %esi,%esi */
301 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
302 static const char f32_10
[] =
303 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
304 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
305 static const char f32_11
[] =
306 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
307 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
308 static const char f32_12
[] =
309 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
310 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
311 static const char f32_13
[] =
312 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
313 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
314 static const char f32_14
[] =
315 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
316 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
317 static const char f32_15
[] =
318 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
319 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
320 static const char f16_4
[] =
321 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
322 static const char f16_5
[] =
324 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
325 static const char f16_6
[] =
326 {0x89,0xf6, /* mov %si,%si */
327 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
328 static const char f16_7
[] =
329 {0x8d,0x74,0x00, /* lea 0(%si),%si */
330 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
331 static const char f16_8
[] =
332 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
333 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
334 static const char *const f32_patt
[] = {
335 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
336 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
338 static const char *const f16_patt
[] = {
339 f32_1
, f32_2
, f32_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
340 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
343 if (count
> 0 && count
<= 15)
347 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
348 f16_patt
[count
- 1], count
);
349 if (count
> 8) /* adjust jump offset */
350 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
353 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
354 f32_patt
[count
- 1], count
);
355 fragP
->fr_var
= count
;
359 static char *output_invalid
PARAMS ((int c
));
360 static int i386_operand
PARAMS ((char *operand_string
));
361 static reg_entry
*parse_register
PARAMS ((char *reg_string
));
363 static void s_bss
PARAMS ((int));
366 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
368 static INLINE
unsigned long
369 mode_from_disp_size (t
)
372 return (t
& Disp8
) ? 1 : (t
& (Disp16
|Disp32
)) ? 2 : 0;
377 /* convert opcode suffix ('b' 'w' 'l' typically) into type specifier */
379 static INLINE
unsigned long
380 opcode_suffix_to_type (s
)
383 return (s
== BYTE_OPCODE_SUFFIX
384 ? Byte
: (s
== WORD_OPCODE_SUFFIX
386 } /* opcode_suffix_to_type() */
390 fits_in_signed_byte (num
)
393 return (num
>= -128) && (num
<= 127);
394 } /* fits_in_signed_byte() */
397 fits_in_unsigned_byte (num
)
400 return (num
& 0xff) == num
;
401 } /* fits_in_unsigned_byte() */
404 fits_in_unsigned_word (num
)
407 return (num
& 0xffff) == num
;
408 } /* fits_in_unsigned_word() */
411 fits_in_signed_word (num
)
414 return (-32768 <= num
) && (num
<= 32767);
415 } /* fits_in_signed_word() */
418 smallest_imm_type (num
)
422 /* This code is disabled because all the Imm1 forms in the opcode table
423 are slower on the i486, and they're the versions with the implicitly
424 specified single-position displacement, which has another syntax if
425 you really want to use that form. If you really prefer to have the
426 one-byte-shorter Imm1 form despite these problems, re-enable this
429 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
431 return (fits_in_signed_byte (num
)
432 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
433 : fits_in_unsigned_byte (num
)
434 ? (Imm8
| Imm16
| Imm32
)
435 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
438 } /* smallest_imm_type() */
440 /* Returns 0 if attempting to add a prefix where one from the same
441 class already exists, 1 if non rep/repne added, 2 if rep/repne
455 case CS_PREFIX_OPCODE
:
456 case DS_PREFIX_OPCODE
:
457 case ES_PREFIX_OPCODE
:
458 case FS_PREFIX_OPCODE
:
459 case GS_PREFIX_OPCODE
:
460 case SS_PREFIX_OPCODE
:
468 case LOCK_PREFIX_OPCODE
:
476 case ADDR_PREFIX_OPCODE
:
480 case DATA_PREFIX_OPCODE
:
487 as_bad (_("same type of prefix used twice"));
492 i
.prefix
[q
] = prefix
;
497 set_16bit_code_flag (new_16bit_code_flag
)
498 int new_16bit_code_flag
;
500 flag_16bit_code
= new_16bit_code_flag
;
503 const pseudo_typeS md_pseudo_table
[] =
508 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
509 {"align", s_align_bytes
, 0},
511 {"align", s_align_ptwo
, 0},
513 {"ffloat", float_cons
, 'f'},
514 {"dfloat", float_cons
, 'd'},
515 {"tfloat", float_cons
, 'x'},
517 {"noopt", s_ignore
, 0},
518 {"optim", s_ignore
, 0},
519 {"code16", set_16bit_code_flag
, 1},
520 {"code32", set_16bit_code_flag
, 0},
524 /* for interface with expression () */
525 extern char *input_line_pointer
;
527 /* obstack for constructing various things in md_begin */
530 /* hash table for opcode lookup */
531 static struct hash_control
*op_hash
;
532 /* hash table for register lookup */
533 static struct hash_control
*reg_hash
;
534 /* hash table for prefix lookup */
535 static struct hash_control
*prefix_hash
;
541 const char *hash_err
;
543 obstack_begin (&o
, 4096);
545 /* initialize op_hash hash table */
546 op_hash
= hash_new ();
549 register const template *optab
;
550 register templates
*core_optab
;
553 optab
= i386_optab
; /* setup for loop */
554 prev_name
= optab
->name
;
555 obstack_grow (&o
, optab
, sizeof (template));
556 core_optab
= (templates
*) xmalloc (sizeof (templates
));
558 for (optab
++; optab
< i386_optab_end
; optab
++)
560 if (!strcmp (optab
->name
, prev_name
))
562 /* same name as before --> append to current template list */
563 obstack_grow (&o
, optab
, sizeof (template));
567 /* different name --> ship out current template list;
568 add to hash table; & begin anew */
569 /* Note: end must be set before start! since obstack_next_free
570 changes upon opstack_finish */
571 core_optab
->end
= (template *) obstack_next_free (&o
);
572 core_optab
->start
= (template *) obstack_finish (&o
);
573 hash_err
= hash_insert (op_hash
, prev_name
, (char *) core_optab
);
577 as_fatal (_("Internal Error: Can't hash %s: %s"), prev_name
,
580 prev_name
= optab
->name
;
581 core_optab
= (templates
*) xmalloc (sizeof (templates
));
582 obstack_grow (&o
, optab
, sizeof (template));
587 /* initialize reg_hash hash table */
588 reg_hash
= hash_new ();
590 register const reg_entry
*regtab
;
592 for (regtab
= i386_regtab
; regtab
< i386_regtab_end
; regtab
++)
594 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
600 /* initialize reg_hash hash table */
601 prefix_hash
= hash_new ();
603 register const prefix_entry
*prefixtab
;
605 for (prefixtab
= i386_prefixtab
;
606 prefixtab
< i386_prefixtab_end
; prefixtab
++)
608 hash_err
= hash_insert (prefix_hash
, prefixtab
->prefix_name
,
615 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */
620 for (c
= 0; c
< 256; c
++)
622 if (islower (c
) || isdigit (c
))
625 register_chars
[c
] = c
;
627 else if (isupper (c
))
629 opcode_chars
[c
] = tolower (c
);
630 register_chars
[c
] = opcode_chars
[c
];
632 else if (c
== PREFIX_SEPERATOR
)
636 else if (c
== ')' || c
== '(')
638 register_chars
[c
] = c
;
641 if (isupper (c
) || islower (c
) || isdigit (c
))
642 operand_chars
[c
] = c
;
644 if (isdigit (c
) || c
== '-')
647 if (isalpha (c
) || c
== '_' || c
== '.' || isdigit (c
))
648 identifier_chars
[c
] = c
;
651 identifier_chars
['@'] = '@';
654 if (c
== ' ' || c
== '\t')
658 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
659 operand_chars
[(unsigned char) *p
] = *p
;
662 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
663 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
665 record_alignment (text_section
, 2);
666 record_alignment (data_section
, 2);
667 record_alignment (bss_section
, 2);
673 i386_print_statistics (file
)
676 hash_print_statistics (file
, "i386 opcode", op_hash
);
677 hash_print_statistics (file
, "i386 register", reg_hash
);
678 hash_print_statistics (file
, "i386 prefix", prefix_hash
);
684 /* debugging routines for md_assemble */
685 static void pi
PARAMS ((char *, i386_insn
*));
686 static void pte
PARAMS ((template *));
687 static void pt
PARAMS ((unsigned int));
688 static void pe
PARAMS ((expressionS
*));
689 static void ps
PARAMS ((symbolS
*));
696 register template *p
;
699 fprintf (stdout
, "%s: template ", line
);
701 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
702 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
703 fprintf (stdout
, " base %x index %x scale %x\n",
704 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
705 for (i
= 0; i
< x
->operands
; i
++)
707 fprintf (stdout
, " #%d: ", i
+ 1);
709 fprintf (stdout
, "\n");
711 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
))
712 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
713 if (x
->types
[i
] & Imm
)
715 if (x
->types
[i
] & Disp
)
725 fprintf (stdout
, " %d operands ", t
->operands
);
726 fprintf (stdout
, "opcode %x ",
728 if (t
->extension_opcode
!= None
)
729 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
730 if (t
->opcode_modifier
& D
)
731 fprintf (stdout
, "D");
732 if (t
->opcode_modifier
& W
)
733 fprintf (stdout
, "W");
734 fprintf (stdout
, "\n");
735 for (i
= 0; i
< t
->operands
; i
++)
737 fprintf (stdout
, " #%d type ", i
+ 1);
738 pt (t
->operand_types
[i
]);
739 fprintf (stdout
, "\n");
747 fprintf (stdout
, " operation %d\n", e
->X_op
);
748 fprintf (stdout
, " add_number %d (%x)\n",
749 e
->X_add_number
, e
->X_add_number
);
752 fprintf (stdout
, " add_symbol ");
753 ps (e
->X_add_symbol
);
754 fprintf (stdout
, "\n");
758 fprintf (stdout
, " op_symbol ");
760 fprintf (stdout
, "\n");
768 fprintf (stdout
, "%s type %s%s",
770 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
771 segment_name (S_GET_SEGMENT (s
)));
790 { BaseIndex
, "BaseIndex" },
794 { InOutPortReg
, "InOutPortReg" },
795 { ShiftCount
, "ShiftCount" },
796 { Control
, "control reg" },
797 { Test
, "test reg" },
798 { Debug
, "debug reg" },
799 { FloatReg
, "FReg" },
800 { FloatAcc
, "FAcc" },
804 { JumpAbsolute
, "Jump Absolute" },
814 register struct type_name
*ty
;
818 fprintf (stdout
, _("Unknown"));
822 for (ty
= type_names
; ty
->mask
; ty
++)
824 fprintf (stdout
, "%s, ", ty
->tname
);
829 #endif /* DEBUG386 */
832 static bfd_reloc_code_real_type
833 reloc (size
, pcrel
, other
)
836 bfd_reloc_code_real_type other
;
838 if (other
!= NO_RELOC
) return other
;
843 case 1: return BFD_RELOC_8_PCREL
;
844 case 2: return BFD_RELOC_16_PCREL
;
845 case 4: return BFD_RELOC_32_PCREL
;
850 case 1: return BFD_RELOC_8
;
851 case 2: return BFD_RELOC_16
;
852 case 4: return BFD_RELOC_32
;
856 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
858 as_bad (_("Can not do %d byte relocation"), size
);
860 return BFD_RELOC_NONE
;
864 * Here we decide which fixups can be adjusted to make them relative to
865 * the beginning of the section instead of the symbol. Basically we need
866 * to make sure that the dynamic relocations are done correctly, so in
867 * some cases we force the original symbol to be used.
870 tc_i386_fix_adjustable(fixP
)
874 /* Prevent all adjustments to global symbols. */
875 if (S_IS_EXTERN (fixP
->fx_addsy
))
877 if (S_IS_WEAK (fixP
->fx_addsy
))
879 #endif /* ! defined (OBJ_AOUT) */
880 /* adjust_reloc_syms doesn't know about the GOT */
881 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
882 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
883 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
)
888 #define reloc(SIZE,PCREL,OTHER) 0
889 #define BFD_RELOC_32 0
890 #define BFD_RELOC_32_PCREL 0
891 #define BFD_RELOC_386_PLT32 0
892 #define BFD_RELOC_386_GOT32 0
893 #define BFD_RELOC_386_GOTOFF 0
896 /* This is the guts of the machine-dependent assembler. LINE points to a
897 machine dependent instruction. This function is supposed to emit
898 the frags/bytes it assembles to. */
904 /* Points to template once we've found it. */
907 /* Count the size of the instruction generated. */
912 /* Initialize globals. */
913 memset (&i
, '\0', sizeof (i
));
914 for (j
= 0; j
< MAX_OPERANDS
; j
++)
915 i
.disp_reloc
[j
] = NO_RELOC
;
916 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
917 memset (im_expressions
, '\0', sizeof (im_expressions
));
918 save_stack_p
= save_stack
; /* reset stack pointer */
920 /* First parse an opcode & call i386_operand for the operands.
921 We assume that the scrubber has arranged it so that line[0] is the valid
922 start of a (possibly prefixed) opcode. */
926 /* 1 if operand is pending after ','. */
927 unsigned int expecting_operand
= 0;
928 /* Non-zero if we found a prefix only acceptable with string insns. */
929 const char *expecting_string_instruction
= NULL
;
930 /* Non-zero if operand parens not balanced. */
931 unsigned int paren_not_balanced
;
932 char *token_start
= l
;
934 while (!is_space_char (*l
) && *l
!= END_OF_INSN
)
936 if (!is_opcode_char (*l
))
938 as_bad (_("invalid character %s in opcode"), output_invalid (*l
));
941 else if (*l
!= PREFIX_SEPERATOR
)
943 *l
= opcode_chars
[(unsigned char) *l
]; /* fold case of opcodes */
948 /* This opcode's got a prefix. */
949 prefix_entry
*prefix
;
951 if (l
== token_start
)
953 as_bad (_("expecting prefix; got nothing"));
956 END_STRING_AND_SAVE (l
);
957 prefix
= (prefix_entry
*) hash_find (prefix_hash
, token_start
);
960 as_bad (_("no such opcode prefix `%s'"), token_start
);
961 RESTORE_END_STRING (l
);
964 RESTORE_END_STRING (l
);
965 /* add prefix, checking for repeated prefixes */
966 switch (add_prefix (prefix
->prefix_code
))
971 expecting_string_instruction
= prefix
->prefix_name
;
974 /* Skip past PREFIX_SEPARATOR and reset token_start. */
978 END_STRING_AND_SAVE (l
);
979 if (token_start
== l
)
981 as_bad (_("expecting opcode; got nothing"));
982 RESTORE_END_STRING (l
);
986 /* Lookup insn in hash; try intel & att naming conventions if appropriate;
987 that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */
988 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
989 if (!current_templates
)
991 int last_index
= strlen (token_start
) - 1;
992 char last_char
= token_start
[last_index
];
995 case DWORD_OPCODE_SUFFIX
:
996 case WORD_OPCODE_SUFFIX
:
997 case BYTE_OPCODE_SUFFIX
:
998 case SHORT_OPCODE_SUFFIX
:
999 #if LONG_OPCODE_SUFFIX != DWORD_OPCODE_SUFFIX
1000 case LONG_OPCODE_SUFFIX
:
1002 token_start
[last_index
] = '\0';
1003 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
1004 token_start
[last_index
] = last_char
;
1005 i
.suffix
= last_char
;
1007 if (!current_templates
)
1009 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1010 RESTORE_END_STRING (l
);
1014 RESTORE_END_STRING (l
);
1016 /* check for rep/repne without a string instruction */
1017 if (expecting_string_instruction
1018 && !(current_templates
->start
->opcode_modifier
& IsString
))
1020 as_bad (_("expecting string instruction after `%s'"),
1021 expecting_string_instruction
);
1025 /* There may be operands to parse. */
1026 if (*l
!= END_OF_INSN
)
1028 /* parse operands */
1031 /* skip optional white space before operand */
1032 while (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1034 if (!is_space_char (*l
))
1036 as_bad (_("invalid character %s before operand %d"),
1037 output_invalid (*l
),
1043 token_start
= l
; /* after white space */
1044 paren_not_balanced
= 0;
1045 while (paren_not_balanced
|| *l
!= ',')
1047 if (*l
== END_OF_INSN
)
1049 if (paren_not_balanced
)
1051 as_bad (_("unbalanced parenthesis in operand %d."),
1056 break; /* we are done */
1058 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1060 as_bad (_("invalid character %s in operand %d"),
1061 output_invalid (*l
),
1066 ++paren_not_balanced
;
1068 --paren_not_balanced
;
1071 if (l
!= token_start
)
1072 { /* yes, we've read in another operand */
1073 unsigned int operand_ok
;
1074 this_operand
= i
.operands
++;
1075 if (i
.operands
> MAX_OPERANDS
)
1077 as_bad (_("spurious operands; (%d operands/instruction max)"),
1081 /* now parse operand adding info to 'i' as we go along */
1082 END_STRING_AND_SAVE (l
);
1083 operand_ok
= i386_operand (token_start
);
1084 RESTORE_END_STRING (l
); /* restore old contents */
1090 if (expecting_operand
)
1092 expecting_operand_after_comma
:
1093 as_bad (_("expecting operand after ','; got nothing"));
1098 as_bad (_("expecting operand before ','; got nothing"));
1103 /* now *l must be either ',' or END_OF_INSN */
1106 if (*++l
== END_OF_INSN
)
1107 { /* just skip it, if it's \n complain */
1108 goto expecting_operand_after_comma
;
1110 expecting_operand
= 1;
1113 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1117 /* Now we've parsed the opcode into a set of templates, and have the
1120 Next, we find a template that matches the given insn,
1121 making sure the overlap of the given operands types is consistent
1122 with the template operand types. */
1124 #define MATCH(overlap, given, template) \
1126 && (((overlap) & (JumpAbsolute|BaseIndex)) \
1127 == ((given) & (JumpAbsolute|BaseIndex))))
1130 /* If given types r0 and r1 are registers they must be of the same type
1131 unless the expected operand type register overlap is null.
1132 Note that Acc in a template matches every size of reg. */
1133 #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \
1134 ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \
1135 ((g0) & Reg) == ((g1) & Reg) || \
1136 ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 )
1139 register unsigned int overlap0
, overlap1
;
1141 unsigned int overlap2
;
1142 unsigned int found_reverse_match
;
1148 found_reverse_match
= 0;
1149 suffix_check
= (i
.suffix
== BYTE_OPCODE_SUFFIX
1151 : (i
.suffix
== WORD_OPCODE_SUFFIX
1153 : (i
.suffix
== SHORT_OPCODE_SUFFIX
1155 : (i
.suffix
== LONG_OPCODE_SUFFIX
? No_lSuf
: 0))));
1157 for (t
= current_templates
->start
;
1158 t
< current_templates
->end
;
1161 /* Must have right number of operands, and must not have
1162 disallowed suffix. */
1163 if (i
.operands
!= t
->operands
|| (t
->opcode_modifier
& suffix_check
))
1165 else if (!t
->operands
)
1166 break; /* 0 operands always matches */
1168 overlap0
= i
.types
[0] & t
->operand_types
[0];
1169 switch (t
->operands
)
1172 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0]))
1177 overlap1
= i
.types
[1] & t
->operand_types
[1];
1178 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0])
1179 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[1])
1180 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1181 t
->operand_types
[0],
1182 overlap1
, i
.types
[1],
1183 t
->operand_types
[1]))
1186 /* check if other direction is valid ... */
1187 if ((t
->opcode_modifier
& (D
|FloatD
)) == 0)
1190 /* try reversing direction of operands */
1191 overlap0
= i
.types
[0] & t
->operand_types
[1];
1192 overlap1
= i
.types
[1] & t
->operand_types
[0];
1193 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[1])
1194 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[0])
1195 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1196 t
->operand_types
[1],
1197 overlap1
, i
.types
[1],
1198 t
->operand_types
[0]))
1200 /* does not match either direction */
1203 /* found_reverse_match holds which of D or FloatDR
1205 found_reverse_match
= t
->opcode_modifier
& (D
|FloatDR
);
1208 /* found a forward 2 operand match here */
1209 if (t
->operands
== 3)
1211 /* Here we make use of the fact that there are no
1212 reverse match 3 operand instructions, and all 3
1213 operand instructions only need to be checked for
1214 register consistency between operands 2 and 3. */
1215 overlap2
= i
.types
[2] & t
->operand_types
[2];
1216 if (!MATCH (overlap2
, i
.types
[2], t
->operand_types
[2])
1217 || !CONSISTENT_REGISTER_MATCH (overlap1
, i
.types
[1],
1218 t
->operand_types
[1],
1219 overlap2
, i
.types
[2],
1220 t
->operand_types
[2]))
1223 /* found either forward/reverse 2 or 3 operand match here:
1224 slip through to break */
1226 break; /* we've found a match; break out of loop */
1227 } /* for (t = ... */
1228 if (t
== current_templates
->end
)
1229 { /* we found no match */
1230 as_bad (_("suffix or operands invalid for `%s'"),
1231 current_templates
->start
->name
);
1235 /* Copy the template we found. */
1237 if (found_reverse_match
)
1239 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1240 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1243 if (i
.tm
.opcode_modifier
& FWait
)
1244 if (! add_prefix (FWAIT_OPCODE
))
1247 /* Check string instruction segment overrides */
1248 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1250 int mem_op
= (i
.types
[0] & AnyMem
) ? 0 : 1;
1251 if ((i
.tm
.operand_types
[mem_op
] & EsSeg
) != 0)
1253 if (i
.seg
[0] != NULL
&& i
.seg
[0] != &es
)
1255 as_bad (_("`%s' operand %d must use `%%es' segment"),
1260 /* There's only ever one segment override allowed per instruction.
1261 This instruction possibly has a legal segment override on the
1262 second operand, so copy the segment to where non-string
1263 instructions store it, allowing common code. */
1264 i
.seg
[0] = i
.seg
[1];
1266 else if ((i
.tm
.operand_types
[mem_op
+ 1] & EsSeg
) != 0)
1268 if (i
.seg
[1] != NULL
&& i
.seg
[1] != &es
)
1270 as_bad (_("`%s' operand %d must use `%%es' segment"),
1278 /* If matched instruction specifies an explicit opcode suffix, use
1280 if (i
.tm
.opcode_modifier
& (Data16
|Data32
))
1282 if (i
.tm
.opcode_modifier
& Data16
)
1283 i
.suffix
= WORD_OPCODE_SUFFIX
;
1285 i
.suffix
= DWORD_OPCODE_SUFFIX
;
1287 else if (i
.reg_operands
)
1289 /* If there's no opcode suffix we try to invent one based on
1290 register operands. */
1293 /* We take i.suffix from the last register operand specified,
1294 Destination register type is more significant than source
1297 for (op
= i
.operands
; --op
>= 0; )
1298 if (i
.types
[op
] & Reg
)
1300 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_OPCODE_SUFFIX
:
1301 (i
.types
[op
] & Reg16
) ? WORD_OPCODE_SUFFIX
:
1302 DWORD_OPCODE_SUFFIX
);
1306 else if (i
.suffix
== BYTE_OPCODE_SUFFIX
)
1309 for (op
= i
.operands
; --op
>= 0; )
1311 /* If this is an eight bit register, it's OK. If it's
1312 the 16 or 32 bit version of an eight bit register,
1313 we will just use the low portion, and that's OK too. */
1314 if (i
.types
[op
] & Reg8
)
1316 if ((i
.types
[op
] & WordReg
) && i
.regs
[op
]->reg_num
< 4
1318 /* Check that the template allows eight bit regs
1319 This kills insns such as `orb $1,%edx', which
1320 maybe should be allowed. */
1321 && (i
.tm
.operand_types
[op
] & (Reg8
|InOutPortReg
))
1325 #if REGISTER_WARNINGS
1326 if ((i
.tm
.operand_types
[op
] & InOutPortReg
) == 0)
1327 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1328 (i
.regs
[op
] - (i
.types
[op
] & Reg16
? 8 : 16))->reg_name
,
1329 i
.regs
[op
]->reg_name
,
1334 /* Any other register is bad */
1335 if (i
.types
[op
] & (Reg
| RegMMX
| Control
| Debug
| Test
1336 | FloatReg
| FloatAcc
| SReg2
| SReg3
))
1338 as_bad (_("`%%%s' not allowed with `%s%c'"),
1339 i
.regs
[op
]->reg_name
,
1346 else if (i
.suffix
== DWORD_OPCODE_SUFFIX
)
1349 for (op
= i
.operands
; --op
>= 0; )
1350 /* Reject eight bit registers, except where the template
1351 requires them. (eg. movzb) */
1352 if ((i
.types
[op
] & Reg8
) != 0
1353 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1355 as_bad (_("`%%%s' not allowed with `%s%c'"),
1356 i
.regs
[op
]->reg_name
,
1361 #if REGISTER_WARNINGS
1362 /* Warn if the e prefix on a general reg is missing. */
1363 else if ((i
.types
[op
] & Reg16
) != 0
1364 && (i
.tm
.operand_types
[op
] & (Reg32
|Acc
)) != 0)
1366 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1367 (i
.regs
[op
] + 8)->reg_name
,
1368 i
.regs
[op
]->reg_name
,
1373 else if (i
.suffix
== WORD_OPCODE_SUFFIX
)
1376 for (op
= i
.operands
; --op
>= 0; )
1377 /* Reject eight bit registers, except where the template
1378 requires them. (eg. movzb) */
1379 if ((i
.types
[op
] & Reg8
) != 0
1380 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1382 as_bad (_("`%%%s' not allowed with `%s%c'"),
1383 i
.regs
[op
]->reg_name
,
1388 #if REGISTER_WARNINGS
1389 /* Warn if the e prefix on a general reg is present. */
1390 else if ((i
.types
[op
] & Reg32
) != 0
1391 && (i
.tm
.operand_types
[op
] & (Reg16
|Acc
)) != 0)
1393 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1394 (i
.regs
[op
] - 8)->reg_name
,
1395 i
.regs
[op
]->reg_name
,
1404 /* Make still unresolved immediate matches conform to size of immediate
1405 given in i.suffix. Note: overlap2 cannot be an immediate!
1407 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1408 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1409 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1413 as_bad (_("no opcode suffix given; can't determine immediate size"));
1416 overlap0
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1417 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1419 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1420 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1421 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1425 as_bad (_("no opcode suffix given; can't determine immediate size"));
1428 overlap1
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1429 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1432 i
.types
[0] = overlap0
;
1433 i
.types
[1] = overlap1
;
1434 i
.types
[2] = overlap2
;
1436 if (overlap0
& ImplicitRegister
)
1438 if (overlap1
& ImplicitRegister
)
1440 if (overlap2
& ImplicitRegister
)
1442 if (overlap0
& Imm1
)
1443 i
.imm_operands
= 0; /* kludge for shift insns */
1445 /* Finalize opcode. First, we change the opcode based on the operand
1446 size given by i.suffix: we never have to change things for byte insns,
1447 or when no opcode suffix is need to size the operands. */
1449 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1451 as_bad (_("no opcode suffix given and no register operands; can't size instruction"));
1455 if (i
.suffix
&& i
.suffix
!= BYTE_OPCODE_SUFFIX
)
1457 /* Select between byte and word/dword operations. */
1458 if (i
.tm
.opcode_modifier
& W
)
1460 if (i
.tm
.opcode_modifier
& ShortForm
)
1461 i
.tm
.base_opcode
|= 8;
1463 i
.tm
.base_opcode
|= 1;
1465 /* Now select between word & dword operations via the operand
1466 size prefix, except for instructions that will ignore this
1468 if ((i
.suffix
== DWORD_OPCODE_SUFFIX
1469 || i
.suffix
== LONG_OPCODE_SUFFIX
) == flag_16bit_code
1470 && !(i
.tm
.opcode_modifier
& IgnoreDataSize
))
1472 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1473 if (i
.tm
.opcode_modifier
& JumpByte
) /* jcxz, loop */
1474 prefix
= ADDR_PREFIX_OPCODE
;
1476 if (! add_prefix (prefix
))
1479 /* Size floating point instruction. */
1480 if (i
.suffix
== LONG_OPCODE_SUFFIX
)
1482 if (i
.tm
.opcode_modifier
& FloatMF
)
1483 i
.tm
.base_opcode
^= 4;
1487 /* For insns with operands there are more diddles to do to the opcode. */
1490 /* Default segment register this instruction will use
1491 for memory accesses. 0 means unknown.
1492 This is only for optimizing out unnecessary segment overrides. */
1493 const seg_entry
*default_seg
= 0;
1495 /* True if this instruction uses a memory addressing mode,
1496 and therefore may need an address-size prefix. */
1497 int uses_mem_addrmode
= 0;
1500 /* If we found a reverse match we must alter the opcode
1501 direction bit. found_reverse_match holds bits to change
1502 (different for int & float insns). */
1504 i
.tm
.base_opcode
^= found_reverse_match
;
1506 /* The imul $imm, %reg instruction is converted into
1507 imul $imm, %reg, %reg, and the clr %reg instruction
1508 is converted into xor %reg, %reg. */
1509 if (i
.tm
.opcode_modifier
& regKludge
)
1511 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1512 /* Pretend we saw the extra register operand. */
1513 i
.regs
[first_reg_op
+1] = i
.regs
[first_reg_op
];
1517 if (i
.tm
.opcode_modifier
& ShortForm
)
1519 /* The register or float register operand is in operand 0 or 1. */
1520 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1521 /* Register goes in low 3 bits of opcode. */
1522 i
.tm
.base_opcode
|= i
.regs
[op
]->reg_num
;
1523 if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1525 /* Warn about some common errors, but press on regardless.
1526 The first case can be generated by gcc (<= 2.8.1). */
1527 if (i
.operands
== 2)
1529 /* reversed arguments on faddp, fsubp, etc. */
1530 as_warn (_("translating to `%s %%%s,%%%s'"), i
.tm
.name
,
1531 i
.regs
[1]->reg_name
,
1532 i
.regs
[0]->reg_name
);
1536 /* extraneous `l' suffix on fp insn */
1537 as_warn (_("translating to `%s %%%s'"), i
.tm
.name
,
1538 i
.regs
[0]->reg_name
);
1542 else if (i
.tm
.opcode_modifier
& Modrm
)
1544 /* The opcode is completed (modulo i.tm.extension_opcode which
1545 must be put into the modrm byte).
1546 Now, we make the modrm & index base bytes based on all the
1547 info we've collected. */
1549 /* i.reg_operands MUST be the number of real register operands;
1550 implicit registers do not count. */
1551 if (i
.reg_operands
== 2)
1553 unsigned int source
, dest
;
1554 source
= ((i
.types
[0]
1565 /* Certain instructions expect the destination to be
1566 in the i.rm.reg field. This is by far the
1567 exceptional case. For these instructions, if the
1568 source operand is a register, we must reverse the
1569 i.rm.reg and i.rm.regmem fields. We accomplish
1570 this by pretending that the two register operands
1571 were given in the reverse order. */
1572 if (i
.tm
.opcode_modifier
& ReverseRegRegmem
)
1574 const reg_entry
*tmp
= i
.regs
[source
];
1575 i
.regs
[source
] = i
.regs
[dest
];
1580 /* We must be careful to make sure that all
1581 segment/control/test/debug/MMX registers go into
1582 the i.rm.reg field (despite whether they are
1583 source or destination operands). */
1584 if (i
.regs
[dest
]->reg_type
1585 & (SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
))
1587 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1588 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1592 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1593 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1597 { /* if it's not 2 reg operands... */
1600 unsigned int fake_zero_displacement
= 0;
1601 unsigned int op
= ((i
.types
[0] & AnyMem
)
1603 : (i
.types
[1] & AnyMem
) ? 1 : 2);
1610 if (! i
.disp_operands
)
1611 fake_zero_displacement
= 1;
1614 /* Operand is just <disp> */
1615 i
.rm
.regmem
= NO_BASE_REGISTER
;
1616 i
.types
[op
] &= ~Disp
;
1617 i
.types
[op
] |= Disp32
;
1621 i
.bi
.index
= i
.index_reg
->reg_num
;
1622 i
.bi
.base
= NO_BASE_REGISTER
;
1623 i
.bi
.scale
= i
.log2_scale_factor
;
1624 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1625 i
.types
[op
] &= ~Disp
;
1626 i
.types
[op
] |= Disp32
; /* Must be 32 bit */
1629 else /* i.base_reg */
1631 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1632 i
.bi
.base
= i
.base_reg
->reg_num
;
1633 if (i
.base_reg
->reg_num
== EBP_REG_NUM
)
1636 if (i
.disp_operands
== 0)
1638 fake_zero_displacement
= 1;
1639 i
.types
[op
] |= Disp8
;
1642 else if (i
.base_reg
->reg_num
== ESP_REG_NUM
)
1646 i
.bi
.scale
= i
.log2_scale_factor
;
1649 /* <disp>(%esp) becomes two byte modrm
1650 with no index register. We've already
1651 stored the code for esp in i.rm.regmem
1652 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1653 base register besides %esp will not use
1654 the extra modrm byte. */
1655 i
.bi
.index
= NO_INDEX_REGISTER
;
1656 #if ! SCALE1_WHEN_NO_INDEX
1657 /* Another case where we force the second
1659 if (i
.log2_scale_factor
)
1660 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1665 i
.bi
.index
= i
.index_reg
->reg_num
;
1666 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1668 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1671 if (fake_zero_displacement
)
1673 /* Fakes a zero displacement assuming that i.types[op]
1674 holds the correct displacement size. */
1675 exp
= &disp_expressions
[i
.disp_operands
++];
1677 exp
->X_op
= O_constant
;
1678 exp
->X_add_number
= 0;
1679 exp
->X_add_symbol
= (symbolS
*) 0;
1680 exp
->X_op_symbol
= (symbolS
*) 0;
1684 /* Fill in i.rm.reg or i.rm.regmem field with register
1685 operand (if any) based on i.tm.extension_opcode.
1686 Again, we must be careful to make sure that
1687 segment/control/debug/test/MMX registers are coded
1688 into the i.rm.reg field. */
1693 & (Reg
| SReg2
| SReg3
| Control
| Debug
1697 & (Reg
| SReg2
| SReg3
| Control
| Debug
1701 /* If there is an extension opcode to put here, the
1702 register number must be put into the regmem field. */
1703 if (i
.tm
.extension_opcode
!= None
)
1704 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
1706 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
1708 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1709 we must set it to 3 to indicate this is a register
1710 operand in the regmem field. */
1711 if (!i
.mem_operands
)
1715 /* Fill in i.rm.reg field with extension opcode (if any). */
1716 if (i
.tm
.extension_opcode
!= None
)
1717 i
.rm
.reg
= i
.tm
.extension_opcode
;
1721 uses_mem_addrmode
= 1;
1723 else if (i
.tm
.opcode_modifier
& (Seg2ShortForm
| Seg3ShortForm
))
1725 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
1727 as_bad (_("you can't `pop %%cs'"));
1730 i
.tm
.base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
1732 else if ((i
.tm
.base_opcode
& ~(D
|W
)) == MOV_AX_DISP32
)
1734 /* This is a special non-modrm instruction
1735 that addresses memory with a 32-bit displacement mode anyway,
1736 and thus requires an address-size prefix if in 16-bit mode. */
1737 uses_mem_addrmode
= 1;
1740 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
1742 /* For the string instructions that allow a segment override
1743 on one of their operands, the default segment is ds. */
1747 /* GAS currently doesn't support 16-bit memory addressing modes at all,
1748 so if we're writing 16-bit code and using a memory addressing mode,
1749 always spew out an address size prefix. */
1750 if (uses_mem_addrmode
&& flag_16bit_code
)
1752 if (! add_prefix (ADDR_PREFIX_OPCODE
))
1756 /* If a segment was explicitly specified,
1757 and the specified segment is not the default,
1758 use an opcode prefix to select it.
1759 If we never figured out what the default segment is,
1760 then default_seg will be zero at this point,
1761 and the specified segment prefix will always be used. */
1762 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
1764 if (! add_prefix (i
.seg
[0]->seg_prefix
))
1768 else if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1770 /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc */
1771 as_warn (_("translating to `%sp'"), i
.tm
.name
);
1775 /* Handle conversion of 'int $3' --> special int3 insn. */
1776 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
1778 i
.tm
.base_opcode
= INT3_OPCODE
;
1782 /* We are ready to output the insn. */
1787 if (i
.tm
.opcode_modifier
& Jump
)
1789 unsigned long n
= i
.disps
[0]->X_add_number
;
1791 if (i
.prefixes
!= 0)
1792 as_warn (_("skipping prefixes on this instruction"));
1794 if (i
.disps
[0]->X_op
== O_constant
)
1796 if (fits_in_signed_byte (n
))
1800 p
[0] = i
.tm
.base_opcode
;
1804 { /* It's an absolute word/dword displacement. */
1806 /* Use 16-bit jumps only for 16-bit code,
1807 because text segments are limited to 64K anyway;
1808 Use 32-bit jumps for 32-bit code, because they're faster,
1809 and a 16-bit jump will clear the top 16 bits of %eip. */
1810 int jmp_size
= flag_16bit_code
? 2 : 4;
1811 if (flag_16bit_code
&& !fits_in_signed_word (n
))
1813 as_bad (_("16-bit jump out of range"));
1817 if (i
.tm
.base_opcode
== JUMP_PC_RELATIVE
)
1819 /* unconditional jump */
1820 p
= frag_more (1 + jmp_size
);
1821 insn_size
+= 1 + jmp_size
;
1823 md_number_to_chars (&p
[1], (valueT
) n
, jmp_size
);
1827 /* conditional jump */
1828 p
= frag_more (2 + jmp_size
);
1829 insn_size
+= 2 + jmp_size
;
1830 p
[0] = TWO_BYTE_OPCODE_ESCAPE
;
1831 p
[1] = i
.tm
.base_opcode
+ 0x10;
1832 md_number_to_chars (&p
[2], (valueT
) n
, jmp_size
);
1838 if (flag_16bit_code
)
1840 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
1844 /* It's a symbol; end frag & setup for relax.
1845 Make sure there are more than 6 chars left in the current frag;
1846 if not we'll have to start a new one. */
1850 p
[0] = i
.tm
.base_opcode
;
1851 frag_var (rs_machine_dependent
,
1852 6, /* 2 opcode/prefix + 4 displacement */
1854 ((unsigned char) *p
== JUMP_PC_RELATIVE
1855 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
)
1856 : ENCODE_RELAX_STATE (COND_JUMP
, BYTE
)),
1857 i
.disps
[0]->X_add_symbol
,
1861 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
1863 int size
= (i
.tm
.opcode_modifier
& JumpByte
) ? 1 : 4;
1864 unsigned long n
= i
.disps
[0]->X_add_number
;
1866 if (size
== 1) /* then this is a loop or jecxz type instruction */
1868 if (i
.prefix
[ADDR_PREFIX
])
1870 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
1876 if (i
.prefixes
!= 0)
1877 as_warn (_("skipping prefixes on this instruction"));
1879 if (size
== 4 && flag_16bit_code
)
1881 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
1885 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
1887 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
1892 p
= frag_more (2); /* opcode can be at most two bytes */
1894 /* put out high byte first: can't use md_number_to_chars! */
1895 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
1896 *p
= i
.tm
.base_opcode
& 0xff;
1899 p
= frag_more (size
);
1901 if (i
.disps
[0]->X_op
== O_constant
)
1903 md_number_to_chars (p
, (valueT
) n
, size
);
1904 if (size
== 1 && !fits_in_signed_byte (n
))
1906 as_bad (_("`%s' only takes byte displacement; %lu shortened to %d"),
1912 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
1913 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
1917 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
1919 if (i
.prefixes
!= 0)
1920 as_warn (_("skipping prefixes on this instruction"));
1922 if (flag_16bit_code
)
1924 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
1928 p
= frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */
1929 insn_size
+= 1 + 2 + 4;
1930 p
[0] = i
.tm
.base_opcode
;
1931 if (i
.imms
[1]->X_op
== O_constant
)
1932 md_number_to_chars (p
+ 1, (valueT
) i
.imms
[1]->X_add_number
, 4);
1934 fix_new_exp (frag_now
, p
+ 1 - frag_now
->fr_literal
, 4,
1935 i
.imms
[1], 0, BFD_RELOC_32
);
1936 if (i
.imms
[0]->X_op
!= O_constant
)
1937 as_bad (_("can't handle non absolute segment in long call/jmp"));
1938 md_number_to_chars (p
+ 5, (valueT
) i
.imms
[0]->X_add_number
, 2);
1942 /* Output normal instructions here. */
1945 /* The prefix bytes. */
1947 q
< i
.prefix
+ sizeof (i
.prefix
) / sizeof (i
.prefix
[0]);
1954 md_number_to_chars (p
, (valueT
) *q
, 1);
1958 /* Now the opcode; be careful about word order here! */
1959 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
1961 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
1964 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
1968 /* put out high byte first: can't use md_number_to_chars! */
1969 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
1970 *p
= i
.tm
.base_opcode
& 0xff;
1973 { /* opcode is either 3 or 4 bytes */
1974 if (i
.tm
.base_opcode
& 0xff000000)
1978 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
1985 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
1986 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
1987 *p
= (i
.tm
.base_opcode
) & 0xff;
1990 /* Now the modrm byte and base index byte (if present). */
1991 if (i
.tm
.opcode_modifier
& Modrm
)
1995 /* md_number_to_chars (p, i.rm, 1); */
1996 md_number_to_chars (p
,
1997 (valueT
) (i
.rm
.regmem
<< 0
2001 /* If i.rm.regmem == ESP (4)
2002 && i.rm.mode != (Register mode)
2003 ==> need second modrm byte. */
2004 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
2009 /* md_number_to_chars (p, i.bi, 1); */
2010 md_number_to_chars (p
, (valueT
) (i
.bi
.base
<< 0
2017 if (i
.disp_operands
)
2019 register unsigned int n
;
2021 for (n
= 0; n
< i
.operands
; n
++)
2025 if (i
.disps
[n
]->X_op
== O_constant
)
2027 if (i
.types
[n
] & Disp8
)
2031 md_number_to_chars (p
,
2032 (valueT
) i
.disps
[n
]->X_add_number
,
2035 else if (i
.types
[n
] & Disp16
)
2039 md_number_to_chars (p
,
2040 (valueT
) i
.disps
[n
]->X_add_number
,
2047 md_number_to_chars (p
,
2048 (valueT
) i
.disps
[n
]->X_add_number
,
2053 { /* not absolute_section */
2054 /* need a 32-bit fixup (don't support 8bit non-absolute disps) */
2057 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
2059 TC_RELOC(i
.disp_reloc
[n
], BFD_RELOC_32
));
2063 } /* end displacement output */
2065 /* output immediate */
2068 register unsigned int n
;
2070 for (n
= 0; n
< i
.operands
; n
++)
2074 if (i
.imms
[n
]->X_op
== O_constant
)
2076 if (i
.types
[n
] & (Imm8
| Imm8S
))
2080 md_number_to_chars (p
,
2081 (valueT
) i
.imms
[n
]->X_add_number
,
2084 else if (i
.types
[n
] & Imm16
)
2088 md_number_to_chars (p
,
2089 (valueT
) i
.imms
[n
]->X_add_number
,
2096 md_number_to_chars (p
,
2097 (valueT
) i
.imms
[n
]->X_add_number
,
2102 { /* not absolute_section */
2103 /* Need a 32-bit fixup (don't support 8bit
2104 non-absolute ims). Try to support other
2110 if (i
.types
[n
] & (Imm8
| Imm8S
))
2112 else if (i
.types
[n
] & Imm16
)
2116 r_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2117 p
= frag_more (size
);
2119 #ifdef BFD_ASSEMBLER
2120 if (r_type
== BFD_RELOC_32
2122 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
2123 && (i
.imms
[n
]->X_op
== O_symbol
2124 || (i
.imms
[n
]->X_op
== O_add
2125 && (i
.imms
[n
]->X_op_symbol
->sy_value
.X_op
2128 r_type
= BFD_RELOC_386_GOTPC
;
2129 i
.imms
[n
]->X_add_number
+= 3;
2132 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2133 i
.imms
[n
], pcrel
, r_type
);
2137 } /* end immediate output */
2145 #endif /* DEBUG386 */
2149 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
2153 i386_operand (operand_string
)
2154 char *operand_string
;
2156 register char *op_string
= operand_string
;
2158 /* Address of '\0' at end of operand_string. */
2159 char *end_of_operand_string
= operand_string
+ strlen (operand_string
);
2161 /* Start and end of displacement string expression (if found). */
2162 char *displacement_string_start
= NULL
;
2163 char *displacement_string_end
= NULL
;
2165 /* We check for an absolute prefix (differentiating,
2166 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
2167 if (*op_string
== ABSOLUTE_PREFIX
)
2170 i
.types
[this_operand
] |= JumpAbsolute
;
2173 /* Check if operand is a register. */
2174 if (*op_string
== REGISTER_PREFIX
)
2176 register reg_entry
*r
;
2177 if (!(r
= parse_register (op_string
)))
2179 as_bad (_("bad register name `%s'"), op_string
);
2182 /* Check for segment override, rather than segment register by
2183 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
2184 if ((r
->reg_type
& (SReg2
| SReg3
)) && op_string
[3] == ':')
2189 i
.seg
[i
.mem_operands
] = (seg_entry
*) & es
;
2192 i
.seg
[i
.mem_operands
] = (seg_entry
*) & cs
;
2195 i
.seg
[i
.mem_operands
] = (seg_entry
*) & ss
;
2198 i
.seg
[i
.mem_operands
] = (seg_entry
*) & ds
;
2201 i
.seg
[i
.mem_operands
] = (seg_entry
*) & fs
;
2204 i
.seg
[i
.mem_operands
] = (seg_entry
*) & gs
;
2207 op_string
+= 4; /* skip % <x> s : */
2208 operand_string
= op_string
; /* Pretend given string starts here. */
2209 if (!is_digit_char (*op_string
) && !is_identifier_char (*op_string
)
2210 && *op_string
!= '(' && *op_string
!= ABSOLUTE_PREFIX
)
2212 as_bad (_("bad memory operand `%s'"), op_string
);
2215 /* Handle case of %es:*foo. */
2216 if (*op_string
== ABSOLUTE_PREFIX
)
2219 i
.types
[this_operand
] |= JumpAbsolute
;
2221 goto do_memory_reference
;
2223 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
2224 i
.regs
[this_operand
] = r
;
2227 else if (*op_string
== IMMEDIATE_PREFIX
)
2228 { /* ... or an immediate */
2229 char *save_input_line_pointer
;
2233 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2235 as_bad (_("only 1 or 2 immediate operands are allowed"));
2239 exp
= &im_expressions
[i
.imm_operands
++];
2240 i
.imms
[this_operand
] = exp
;
2241 save_input_line_pointer
= input_line_pointer
;
2242 input_line_pointer
= ++op_string
; /* must advance op_string! */
2244 exp_seg
= expression (exp
);
2245 if (*input_line_pointer
!= '\0')
2247 /* This should be as_bad, but some versions of gcc, up to
2248 about 2.8 and egcs 1.01, generate a bogus @GOTOFF(%ebx)
2249 in certain cases. Oddly, the code in question turns out
2250 to work correctly anyhow, so we make this just a warning
2251 until those versions of gcc are obsolete. */
2252 as_warn (_("unrecognized characters `%s' in expression"),
2253 input_line_pointer
);
2255 input_line_pointer
= save_input_line_pointer
;
2257 if (exp
->X_op
== O_absent
)
2259 /* missing or bad expr becomes absolute 0 */
2260 as_bad (_("missing or invalid immediate expression `%s' taken as 0"),
2262 exp
->X_op
= O_constant
;
2263 exp
->X_add_number
= 0;
2264 exp
->X_add_symbol
= (symbolS
*) 0;
2265 exp
->X_op_symbol
= (symbolS
*) 0;
2266 i
.types
[this_operand
] |= Imm
;
2268 else if (exp
->X_op
== O_constant
)
2270 i
.types
[this_operand
] |=
2271 smallest_imm_type ((unsigned long) exp
->X_add_number
);
2274 else if (exp_seg
!= text_section
2275 && exp_seg
!= data_section
2276 && exp_seg
!= bss_section
2277 && exp_seg
!= undefined_section
2278 #ifdef BFD_ASSEMBLER
2279 && ! bfd_is_com_section (exp_seg
)
2284 as_bad (_("Unimplemented segment type %d in parse_operand"), exp_seg
);
2290 /* this is an address ==> 32bit */
2291 i
.types
[this_operand
] |= Imm32
;
2293 /* shorten this type of this operand if the instruction wants
2294 * fewer bits than are present in the immediate. The bit field
2295 * code can put out 'andb $0xffffff, %al', for example. pace
2296 * also 'movw $foo,(%eax)'
2300 case WORD_OPCODE_SUFFIX
:
2301 i
.types
[this_operand
] |= Imm16
;
2303 case BYTE_OPCODE_SUFFIX
:
2304 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2308 else if (is_digit_char (*op_string
) || is_identifier_char (*op_string
)
2309 || *op_string
== '(')
2311 /* This is a memory reference of some sort. */
2312 register char *base_string
;
2313 int found_base_index_form
;
2315 do_memory_reference
:
2316 if ((i
.mem_operands
== 1
2317 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
2318 || i
.mem_operands
== 2)
2320 as_bad (_("too many memory references for `%s'"),
2321 current_templates
->start
->name
);
2325 /* Check for base index form. We detect the base index form by
2326 looking for an ')' at the end of the operand, searching
2327 for the '(' matching it, and finding a REGISTER_PREFIX or ','
2329 base_string
= end_of_operand_string
- 1;
2330 found_base_index_form
= 0;
2331 if (*base_string
== ')')
2333 unsigned int parens_balanced
= 1;
2334 /* We've already checked that the number of left & right ()'s are
2335 equal, so this loop will not be infinite. */
2339 if (*base_string
== ')')
2341 if (*base_string
== '(')
2344 while (parens_balanced
);
2345 base_string
++; /* Skip past '('. */
2346 if (*base_string
== REGISTER_PREFIX
|| *base_string
== ',')
2347 found_base_index_form
= 1;
2350 /* If we can't parse a base index register expression, we've found
2351 a pure displacement expression. We set up displacement_string_start
2352 and displacement_string_end for the code below. */
2353 if (!found_base_index_form
)
2355 displacement_string_start
= op_string
;
2356 displacement_string_end
= end_of_operand_string
;
2360 char *base_reg_name
, *index_reg_name
, *num_string
;
2363 i
.types
[this_operand
] |= BaseIndex
;
2365 /* If there is a displacement set-up for it to be parsed later. */
2366 if (base_string
!= op_string
+ 1)
2368 displacement_string_start
= op_string
;
2369 displacement_string_end
= base_string
- 1;
2372 /* Find base register (if any). */
2373 if (*base_string
!= ',')
2375 base_reg_name
= base_string
++;
2376 /* skip past register name & parse it */
2377 while (isalpha (*base_string
))
2379 if (base_string
== base_reg_name
+ 1)
2381 as_bad (_("can't find base register name after `(%c'"),
2385 END_STRING_AND_SAVE (base_string
);
2386 if (!(i
.base_reg
= parse_register (base_reg_name
)))
2388 as_bad (_("bad base register name `%s'"), base_reg_name
);
2389 RESTORE_END_STRING (base_string
);
2392 RESTORE_END_STRING (base_string
);
2395 /* Now check seperator; must be ',' ==> index reg
2396 OR num ==> no index reg. just scale factor
2397 OR ')' ==> end. (scale factor = 1) */
2398 if (*base_string
!= ',' && *base_string
!= ')')
2400 as_bad (_("expecting `,' or `)' after base register in `%s'"),
2405 /* There may index reg here; and there may be a scale factor. */
2406 if (*base_string
== ',' && *(base_string
+ 1) == REGISTER_PREFIX
)
2408 index_reg_name
= ++base_string
;
2409 while (isalpha (*++base_string
));
2410 END_STRING_AND_SAVE (base_string
);
2411 if (!(i
.index_reg
= parse_register (index_reg_name
)))
2413 as_bad (_("bad index register name `%s'"), index_reg_name
);
2414 RESTORE_END_STRING (base_string
);
2417 RESTORE_END_STRING (base_string
);
2420 /* Check for scale factor. */
2421 if (*base_string
== ',' && isdigit (*(base_string
+ 1)))
2423 num_string
= ++base_string
;
2424 while (is_digit_char (*base_string
))
2426 if (base_string
== num_string
)
2428 as_bad (_("can't find a scale factor after `,'"));
2431 END_STRING_AND_SAVE (base_string
);
2432 /* We've got a scale factor. */
2433 if (!sscanf (num_string
, "%d", &num
))
2435 as_bad (_("can't parse scale factor from `%s'"), num_string
);
2436 RESTORE_END_STRING (base_string
);
2439 RESTORE_END_STRING (base_string
);
2441 { /* must be 1 digit scale */
2443 i
.log2_scale_factor
= 0;
2446 i
.log2_scale_factor
= 1;
2449 i
.log2_scale_factor
= 2;
2452 i
.log2_scale_factor
= 3;
2455 as_bad (_("expecting scale factor of 1, 2, 4, 8; got %d"), num
);
2458 if (num
!= 1 && ! i
.index_reg
)
2460 as_warn (_("scale factor of %d without an index register"),
2462 #if SCALE1_WHEN_NO_INDEX
2463 i
.log2_scale_factor
= 0;
2469 if (!i
.index_reg
&& *base_string
== ',')
2471 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
2472 *(base_string
+ 1));
2478 /* If there's an expression begining the operand, parse it,
2479 assuming displacement_string_start and displacement_string_end
2481 if (displacement_string_start
)
2483 register expressionS
*exp
;
2485 char *save_input_line_pointer
;
2487 exp
= &disp_expressions
[i
.disp_operands
];
2488 i
.disps
[this_operand
] = exp
;
2489 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2491 save_input_line_pointer
= input_line_pointer
;
2492 input_line_pointer
= displacement_string_start
;
2493 END_STRING_AND_SAVE (displacement_string_end
);
2498 * We can have operands of the form
2499 * <symbol>@GOTOFF+<nnn>
2500 * Take the easy way out here and copy everything
2501 * into a temporary buffer...
2505 cp
= strchr (input_line_pointer
, '@');
2510 if (GOT_symbol
== NULL
)
2511 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2513 tmpbuf
= (char *) alloca ((cp
- input_line_pointer
) + 20);
2515 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2517 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2519 strcpy (tmpbuf
, input_line_pointer
);
2520 strcat (tmpbuf
, cp
+ 1 + 3);
2523 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2525 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2527 strcpy (tmpbuf
, input_line_pointer
);
2528 strcat (tmpbuf
, cp
+ 1 + 6);
2531 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2533 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2535 strcpy (tmpbuf
, input_line_pointer
);
2536 strcat (tmpbuf
, cp
+ 1 + 3);
2540 as_bad (_("Bad reloc specifier `%s' in expression"), cp
+ 1);
2542 input_line_pointer
= tmpbuf
;
2547 exp_seg
= expression (exp
);
2549 #ifdef BFD_ASSEMBLER
2550 /* We do this to make sure that the section symbol is in
2551 the symbol table. We will ultimately change the relocation
2552 to be relative to the beginning of the section */
2553 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2555 if (S_IS_LOCAL(exp
->X_add_symbol
)
2556 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2557 section_symbol(exp
->X_add_symbol
->bsym
->section
);
2558 assert (exp
->X_op
== O_symbol
);
2559 exp
->X_op
= O_subtract
;
2560 exp
->X_op_symbol
= GOT_symbol
;
2561 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2565 if (*input_line_pointer
)
2566 as_bad (_("Ignoring junk `%s' after expression"),
2567 input_line_pointer
);
2568 RESTORE_END_STRING (displacement_string_end
);
2569 input_line_pointer
= save_input_line_pointer
;
2571 #if 0 /* this is handled in expr. */
2572 if (exp
->X_op
== O_absent
)
2574 /* missing expr becomes absolute 0 */
2575 as_bad (_("missing or invalid displacement `%s' taken as 0"),
2577 i
.types
[this_operand
] |= Disp
;
2578 exp
->X_op
= O_constant
;
2579 exp
->X_add_number
= 0;
2580 exp
->X_add_symbol
= (symbolS
*) 0;
2581 exp
->X_op_symbol
= (symbolS
*) 0;
2585 if (exp
->X_op
== O_constant
)
2587 i
.types
[this_operand
] |= SMALLEST_DISP_TYPE (exp
->X_add_number
);
2589 else if (exp_seg
== text_section
2590 || exp_seg
== data_section
2591 || exp_seg
== bss_section
2592 || exp_seg
== undefined_section
)
2594 i
.types
[this_operand
] |= Disp32
;
2599 i
.types
[this_operand
] |= Disp32
;
2601 goto seg_unimplemented
;
2606 /* Special case for (%dx) while doing input/output op. */
2608 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
2610 && i
.log2_scale_factor
== 0
2611 && i
.seg
[i
.mem_operands
] == 0
2612 && (i
.types
[this_operand
] & Disp
) == 0)
2614 i
.types
[this_operand
] = InOutPortReg
;
2617 /* Make sure the memory operand we've been dealt is valid. */
2619 && (i
.base_reg
->reg_type
& Reg32
) == 0)
2621 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
2622 != (Reg32
|BaseIndex
))))
2624 as_bad (_("`%s' is not a valid %s bit base/index expression"),
2625 operand_string
, "32");
2631 { /* it's not a memory operand; argh! */
2632 as_bad (_("invalid char %s begining operand %d `%s'"),
2633 output_invalid (*op_string
),
2638 return 1; /* normal return */
2642 * md_estimate_size_before_relax()
2644 * Called just before relax().
2645 * Any symbol that is now undefined will not become defined.
2646 * Return the correct fr_subtype in the frag.
2647 * Return the initial "guess for fr_var" to caller.
2648 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
2649 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
2650 * Although it may not be explicit in the frag, pretend fr_var starts with a
2654 md_estimate_size_before_relax (fragP
, segment
)
2655 register fragS
*fragP
;
2656 register segT segment
;
2658 register unsigned char *opcode
;
2659 register int old_fr_fix
;
2661 old_fr_fix
= fragP
->fr_fix
;
2662 opcode
= (unsigned char *) fragP
->fr_opcode
;
2663 /* We've already got fragP->fr_subtype right; all we have to do is
2664 check for un-relaxable symbols. */
2665 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
2667 /* symbol is undefined in this segment */
2670 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
2671 opcode
[0] = 0xe9; /* dword disp jmp */
2673 fix_new (fragP
, old_fr_fix
, 4,
2675 fragP
->fr_offset
, 1,
2676 (GOT_symbol
&& /* Not quite right - we should switch on
2677 presence of @PLT, but I cannot see how
2678 to get to that from here. We should have
2679 done this in md_assemble to really
2680 get it right all of the time, but I
2681 think it does not matter that much, as
2682 this will be right most of the time. ERY*/
2683 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)?
2684 BFD_RELOC_386_PLT32
: BFD_RELOC_32_PCREL
);
2688 /* This changes the byte-displacement jump 0x7N -->
2689 the dword-displacement jump 0x0f8N */
2690 opcode
[1] = opcode
[0] + 0x10;
2691 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
2692 fragP
->fr_fix
+= 1 + 4; /* we've added an opcode byte */
2693 fix_new (fragP
, old_fr_fix
+ 1, 4,
2695 fragP
->fr_offset
, 1,
2696 (GOT_symbol
&& /* Not quite right - we should switch on
2697 presence of @PLT, but I cannot see how
2698 to get to that from here. ERY */
2699 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)?
2700 BFD_RELOC_386_PLT32
: BFD_RELOC_32_PCREL
);
2705 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
2706 } /* md_estimate_size_before_relax() */
2709 * md_convert_frag();
2711 * Called after relax() is finished.
2712 * In: Address of frag.
2713 * fr_type == rs_machine_dependent.
2714 * fr_subtype is what the address relaxed to.
2716 * Out: Any fixSs and constants are set up.
2717 * Caller will turn frag into a ".space 0".
2719 #ifndef BFD_ASSEMBLER
2721 md_convert_frag (headers
, sec
, fragP
)
2722 object_headers
*headers
;
2724 register fragS
*fragP
;
2727 md_convert_frag (abfd
, sec
, fragP
)
2730 register fragS
*fragP
;
2733 register unsigned char *opcode
;
2734 unsigned char *where_to_put_displacement
= NULL
;
2735 unsigned int target_address
;
2736 unsigned int opcode_address
;
2737 unsigned int extension
= 0;
2738 int displacement_from_opcode_start
;
2740 opcode
= (unsigned char *) fragP
->fr_opcode
;
2742 /* Address we want to reach in file space. */
2743 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
2744 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
2745 target_address
+= fragP
->fr_symbol
->sy_frag
->fr_address
;
2748 /* Address opcode resides at in file space. */
2749 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
2751 /* Displacement from opcode start to fill into instruction. */
2752 displacement_from_opcode_start
= target_address
- opcode_address
;
2754 switch (fragP
->fr_subtype
)
2756 case ENCODE_RELAX_STATE (COND_JUMP
, BYTE
):
2757 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
):
2758 /* don't have to change opcode */
2759 extension
= 1; /* 1 opcode + 1 displacement */
2760 where_to_put_displacement
= &opcode
[1];
2763 case ENCODE_RELAX_STATE (COND_JUMP
, WORD
):
2764 opcode
[1] = TWO_BYTE_OPCODE_ESCAPE
;
2765 opcode
[2] = opcode
[0] + 0x10;
2766 opcode
[0] = DATA_PREFIX_OPCODE
;
2767 extension
= 4; /* 3 opcode + 2 displacement */
2768 where_to_put_displacement
= &opcode
[3];
2771 case ENCODE_RELAX_STATE (UNCOND_JUMP
, WORD
):
2773 opcode
[0] = DATA_PREFIX_OPCODE
;
2774 extension
= 3; /* 2 opcode + 2 displacement */
2775 where_to_put_displacement
= &opcode
[2];
2778 case ENCODE_RELAX_STATE (COND_JUMP
, DWORD
):
2779 opcode
[1] = opcode
[0] + 0x10;
2780 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
2781 extension
= 5; /* 2 opcode + 4 displacement */
2782 where_to_put_displacement
= &opcode
[2];
2785 case ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
):
2787 extension
= 4; /* 1 opcode + 4 displacement */
2788 where_to_put_displacement
= &opcode
[1];
2792 BAD_CASE (fragP
->fr_subtype
);
2795 /* now put displacement after opcode */
2796 md_number_to_chars ((char *) where_to_put_displacement
,
2797 (valueT
) (displacement_from_opcode_start
- extension
),
2798 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
2799 fragP
->fr_fix
+= extension
;
2803 int md_short_jump_size
= 2; /* size of byte displacement jmp */
2804 int md_long_jump_size
= 5; /* size of dword displacement jmp */
2805 const int md_reloc_size
= 8; /* Size of relocation record */
2808 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2810 addressT from_addr
, to_addr
;
2816 offset
= to_addr
- (from_addr
+ 2);
2817 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
2818 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
2822 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2824 addressT from_addr
, to_addr
;
2830 if (flag_do_long_jump
)
2832 offset
= to_addr
- S_GET_VALUE (to_symbol
);
2833 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
2834 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
2835 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
2836 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
2840 offset
= to_addr
- (from_addr
+ 5);
2841 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
2842 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
2846 /* Apply a fixup (fixS) to segment data, once it has been determined
2847 by our caller that we have all the info we need to fix it up.
2849 On the 386, immediates, displacements, and data pointers are all in
2850 the same (little-endian) format, so we don't need to care about which
2854 md_apply_fix3 (fixP
, valp
, seg
)
2855 fixS
*fixP
; /* The fix we're to put in. */
2856 valueT
*valp
; /* Pointer to the value of the bits. */
2857 segT seg
; /* Segment fix is from. */
2859 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2860 valueT value
= *valp
;
2862 if (fixP
->fx_r_type
== BFD_RELOC_32
&& fixP
->fx_pcrel
)
2863 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
2865 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
2867 * This is a hack. There should be a better way to
2870 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
&& fixP
->fx_addsy
)
2873 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
2874 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
)
2875 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2877 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
2878 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
2879 && (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
2880 || (fixP
->fx_addsy
->bsym
->flags
& BSF_SECTION_SYM
) != 0)
2881 && ! S_IS_EXTERNAL (fixP
->fx_addsy
)
2882 && ! S_IS_WEAK (fixP
->fx_addsy
)
2883 && S_IS_DEFINED (fixP
->fx_addsy
)
2884 && ! S_IS_COMMON (fixP
->fx_addsy
))
2886 /* Yes, we add the values in twice. This is because
2887 bfd_perform_relocation subtracts them out again. I think
2888 bfd_perform_relocation is broken, but I don't dare change
2890 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2893 #if defined (OBJ_COFF) && defined (TE_PE)
2894 /* For some reason, the PE format does not store a section
2895 address offset for a PC relative symbol. */
2896 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
2897 value
+= md_pcrel_from (fixP
);
2901 /* Fix a few things - the dynamic linker expects certain values here,
2902 and we must not dissappoint it. */
2903 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
2904 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
2906 switch(fixP
->fx_r_type
) {
2907 case BFD_RELOC_386_PLT32
:
2908 /* Make the jump instruction point to the address of the operand. At
2909 runtime we merely add the offset to the actual PLT entry. */
2912 case BFD_RELOC_386_GOTPC
:
2914 * This is tough to explain. We end up with this one if we have
2915 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
2916 * here is to obtain the absolute address of the GOT, and it is strongly
2917 * preferable from a performance point of view to avoid using a runtime
2918 * relocation for this. The actual sequence of instructions often look
2924 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
2926 * The call and pop essentially return the absolute address of
2927 * the label .L66 and store it in %ebx. The linker itself will
2928 * ultimately change the first operand of the addl so that %ebx points to
2929 * the GOT, but to keep things simple, the .o file must have this operand
2930 * set so that it generates not the absolute address of .L66, but the
2931 * absolute address of itself. This allows the linker itself simply
2932 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
2933 * added in, and the addend of the relocation is stored in the operand
2934 * field for the instruction itself.
2936 * Our job here is to fix the operand so that it would add the correct
2937 * offset so that %ebx would point to itself. The thing that is tricky is
2938 * that .-.L66 will point to the beginning of the instruction, so we need
2939 * to further modify the operand so that it will point to itself.
2940 * There are other cases where you have something like:
2942 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
2944 * and here no correction would be required. Internally in the assembler
2945 * we treat operands of this form as not being pcrel since the '.' is
2946 * explicitly mentioned, and I wonder whether it would simplify matters
2947 * to do it this way. Who knows. In earlier versions of the PIC patches,
2948 * the pcrel_adjust field was used to store the correction, but since the
2949 * expression is not pcrel, I felt it would be confusing to do it this way.
2953 case BFD_RELOC_386_GOT32
:
2954 value
= 0; /* Fully resolved at runtime. No addend. */
2956 case BFD_RELOC_386_GOTOFF
:
2965 md_number_to_chars (p
, value
, fixP
->fx_size
);
2971 /* This is never used. */
2972 long /* Knows about the byte order in a word. */
2973 md_chars_to_number (con
, nbytes
)
2974 unsigned char con
[]; /* Low order byte 1st. */
2975 int nbytes
; /* Number of bytes in the input. */
2978 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
2980 retval
<<= BITS_PER_CHAR
;
2988 #define MAX_LITTLENUMS 6
2990 /* Turn the string pointed to by litP into a floating point constant of type
2991 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
2992 is stored in *sizeP . An error message is returned, or NULL on OK. */
2994 md_atof (type
, litP
, sizeP
)
3000 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
3001 LITTLENUM_TYPE
*wordP
;
3023 return _("Bad call to md_atof ()");
3025 t
= atof_ieee (input_line_pointer
, type
, words
);
3027 input_line_pointer
= t
;
3029 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
3030 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
3031 the bigendian 386. */
3032 for (wordP
= words
+ prec
- 1; prec
--;)
3034 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
3035 litP
+= sizeof (LITTLENUM_TYPE
);
3040 char output_invalid_buf
[8];
3047 sprintf (output_invalid_buf
, "'%c'", c
);
3049 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
3050 return output_invalid_buf
;
3053 /* reg_string starts *before* REGISTER_PREFIX */
3055 parse_register (reg_string
)
3058 register char *s
= reg_string
;
3060 char reg_name_given
[MAX_REG_NAME_SIZE
];
3062 s
++; /* skip REGISTER_PREFIX */
3063 for (p
= reg_name_given
; is_register_char (*s
); p
++, s
++)
3065 *p
= register_chars
[(unsigned char) *s
];
3066 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
3067 return (reg_entry
*) 0;
3070 return (reg_entry
*) hash_find (reg_hash
, reg_name_given
);
3074 CONST
char *md_shortopts
= "kmVQ:";
3076 CONST
char *md_shortopts
= "m";
3078 struct option md_longopts
[] = {
3079 {NULL
, no_argument
, NULL
, 0}
3081 size_t md_longopts_size
= sizeof(md_longopts
);
3084 md_parse_option (c
, arg
)
3091 flag_do_long_jump
= 1;
3094 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3095 /* -k: Ignore for FreeBSD compatibility. */
3099 /* -V: SVR4 argument to print version ID. */
3101 print_version_id ();
3104 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
3105 should be emitted or not. FIXME: Not implemented. */
3117 md_show_usage (stream
)
3120 fprintf (stream
, _("\
3121 -m do long jump\n"));
3124 #ifdef BFD_ASSEMBLER
3125 #ifdef OBJ_MAYBE_ELF
3126 #ifdef OBJ_MAYBE_COFF
3128 /* Pick the target format to use. */
3131 i386_target_format ()
3133 switch (OUTPUT_FLAVOR
)
3135 case bfd_target_coff_flavour
:
3137 case bfd_target_elf_flavour
:
3138 return "elf32-i386";
3145 #endif /* OBJ_MAYBE_COFF */
3146 #endif /* OBJ_MAYBE_ELF */
3147 #endif /* BFD_ASSEMBLER */
3151 md_undefined_symbol (name
)
3154 if (*name
== '_' && *(name
+1) == 'G'
3155 && strcmp(name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
3159 if(symbol_find(name
))
3160 as_bad (_("GOT already in symbol table"));
3161 GOT_symbol
= symbol_new (name
, undefined_section
,
3162 (valueT
) 0, &zero_address_frag
);
3169 /* Round up a section size to the appropriate boundary. */
3171 md_section_align (segment
, size
)
3176 #ifdef BFD_ASSEMBLER
3177 /* For a.out, force the section size to be aligned. If we don't do
3178 this, BFD will align it for us, but it will not write out the
3179 final bytes of the section. This may be a bug in BFD, but it is
3180 easier to fix it here since that is how the other a.out targets
3184 align
= bfd_get_section_alignment (stdoutput
, segment
);
3185 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
3192 /* Exactly what point is a PC-relative offset relative TO? On the
3193 i386, they're relative to the address of the offset, plus its
3194 size. (??? Is this right? FIXME-SOON!) */
3196 md_pcrel_from (fixP
)
3199 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3210 temp
= get_absolute_expression ();
3211 subseg_set (bss_section
, (subsegT
) temp
);
3212 demand_empty_rest_of_line ();
3218 #ifdef BFD_ASSEMBLER
3221 i386_validate_fix (fixp
)
3224 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
3226 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
3231 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
3232 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
3235 tc_gen_reloc (section
, fixp
)
3240 bfd_reloc_code_real_type code
;
3242 switch (fixp
->fx_r_type
)
3244 case BFD_RELOC_386_PLT32
:
3245 case BFD_RELOC_386_GOT32
:
3246 case BFD_RELOC_386_GOTOFF
:
3247 case BFD_RELOC_386_GOTPC
:
3249 code
= fixp
->fx_r_type
;
3252 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
3254 MAP (1, 0, BFD_RELOC_8
);
3255 MAP (2, 0, BFD_RELOC_16
);
3256 MAP (4, 0, BFD_RELOC_32
);
3257 MAP (1, 1, BFD_RELOC_8_PCREL
);
3258 MAP (2, 1, BFD_RELOC_16_PCREL
);
3259 MAP (4, 1, BFD_RELOC_32_PCREL
);
3262 as_bad (_("Can not do %d byte pc-relative relocation"),
3265 as_bad (_("Can not do %d byte relocation"), fixp
->fx_size
);
3266 code
= BFD_RELOC_32
;
3274 if (code
== BFD_RELOC_32
3276 && fixp
->fx_addsy
== GOT_symbol
)
3277 code
= BFD_RELOC_386_GOTPC
;
3279 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3280 rel
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
3281 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3283 rel
->addend
= fixp
->fx_addnumber
;
3287 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
3288 if (rel
->howto
== NULL
)
3290 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3291 _("Cannot represent relocation type %s"),
3292 bfd_get_reloc_code_name (code
));
3293 /* Set howto to a garbage value so that we can keep going. */
3294 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3295 assert (rel
->howto
!= NULL
);
3301 #else /* ! BFD_ASSEMBLER */
3303 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
3305 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
3308 relax_addressT segment_address_in_file
;
3311 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3312 * Out: GNU LD relocation length code: 0, 1, or 2.
3315 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
3318 know (fixP
->fx_addsy
!= NULL
);
3320 md_number_to_chars (where
,
3321 (valueT
) (fixP
->fx_frag
->fr_address
3322 + fixP
->fx_where
- segment_address_in_file
),
3325 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
3326 ? S_GET_TYPE (fixP
->fx_addsy
)
3327 : fixP
->fx_addsy
->sy_number
);
3329 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
3330 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
3331 where
[4] = r_symbolnum
& 0x0ff;
3332 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
3333 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
3334 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
3337 #endif /* OBJ_AOUT or OBJ_BOUT */
3339 #if defined (I386COFF)
3342 tc_coff_fix2rtype (fixP
)
3345 if (fixP
->fx_r_type
== R_IMAGEBASE
)
3348 return (fixP
->fx_pcrel
?
3349 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
3350 fixP
->fx_size
== 2 ? R_PCRWORD
:
3352 (fixP
->fx_size
== 1 ? R_RELBYTE
:
3353 fixP
->fx_size
== 2 ? R_RELWORD
:
3358 tc_coff_sizemachdep (frag
)
3362 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
3367 #endif /* I386COFF */
3369 #endif /* BFD_ASSEMBLER? */
3371 /* end of tc-i386.c */