1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 1999
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
33 #include "opcode/i386.h"
36 #define TC_RELOC(X,Y) (Y)
39 #ifndef REGISTER_WARNINGS
40 #define REGISTER_WARNINGS 1
43 #ifndef INFER_ADDR_PREFIX
44 #define INFER_ADDR_PREFIX 0
47 #ifndef SCALE1_WHEN_NO_INDEX
48 /* Specifying a scale factor besides 1 when there is no index is
49 futile. eg. `mov (%ebx,2),%al' does exactly the same as
50 `mov (%ebx),%al'. To slavishly follow what the programmer
51 specified, set SCALE1_WHEN_NO_INDEX to 0. */
52 #define SCALE1_WHEN_NO_INDEX 1
58 static unsigned int mode_from_disp_size
PARAMS ((unsigned int));
59 static int fits_in_signed_byte
PARAMS ((long));
60 static int fits_in_unsigned_byte
PARAMS ((long));
61 static int fits_in_unsigned_word
PARAMS ((long));
62 static int fits_in_signed_word
PARAMS ((long));
63 static int smallest_imm_type
PARAMS ((long));
64 static int add_prefix
PARAMS ((unsigned int));
65 static void set_16bit_code_flag
PARAMS ((int));
66 static void set_intel_syntax
PARAMS ((int));
69 static bfd_reloc_code_real_type reloc
70 PARAMS ((int, int, bfd_reloc_code_real_type
));
73 /* 'md_assemble ()' gathers together information and puts it into a
78 /* TM holds the template for the insn were currently assembling. */
81 /* SUFFIX holds the instruction mnemonic suffix if given.
82 (e.g. 'l' for 'movl') */
85 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
87 /* OPERANDS gives the number of given operands. */
88 unsigned int operands
;
90 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
91 of given register, displacement, memory operands and immediate
93 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
95 /* TYPES [i] is the type (see above #defines) which tells us how to
96 search through DISPS [i] & IMMS [i] & REGS [i] for the required
98 unsigned int types
[MAX_OPERANDS
];
100 /* Displacements (if given) for each operand. */
101 expressionS
*disps
[MAX_OPERANDS
];
103 /* Relocation type for operand */
105 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
107 int disp_reloc
[MAX_OPERANDS
];
110 /* Immediate operands (if given) for each operand. */
111 expressionS
*imms
[MAX_OPERANDS
];
113 /* Register operands (if given) for each operand. */
114 const reg_entry
*regs
[MAX_OPERANDS
];
116 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
117 the base index byte below. */
118 const reg_entry
*base_reg
;
119 const reg_entry
*index_reg
;
120 unsigned int log2_scale_factor
;
122 /* SEG gives the seg_entries of this insn. They are zero unless
123 explicit segment overrides are given. */
124 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
126 /* PREFIX holds all the given prefix opcodes (usually null).
127 PREFIXES is the number of prefix opcodes. */
128 unsigned int prefixes
;
129 unsigned char prefix
[MAX_PREFIXES
];
131 /* RM and SIB are the modrm byte and the sib byte where the
132 addressing modes of this insn are encoded. */
138 typedef struct _i386_insn i386_insn
;
140 /* List of chars besides those in app.c:symbol_chars that can start an
141 operand. Used to prevent the scrubber eating vital white-space. */
143 const char extra_symbol_chars
[] = "*%-(@";
145 const char extra_symbol_chars
[] = "*%-(";
148 /* This array holds the chars that always start a comment. If the
149 pre-processor is disabled, these aren't very useful */
150 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
151 /* Putting '/' here makes it impossible to use the divide operator.
152 However, we need it for compatibility with SVR4 systems. */
153 const char comment_chars
[] = "#/";
154 #define PREFIX_SEPARATOR '\\'
156 const char comment_chars
[] = "#";
157 #define PREFIX_SEPARATOR '/'
160 /* This array holds the chars that only start a comment at the beginning of
161 a line. If the line seems to have the form '# 123 filename'
162 .line and .file directives will appear in the pre-processed output */
163 /* Note that input_file.c hand checks for '#' at the beginning of the
164 first line of the input file. This is because the compiler outputs
165 #NO_APP at the beginning of its output. */
166 /* Also note that comments started like this one will always work if
167 '/' isn't otherwise defined. */
168 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
169 const char line_comment_chars
[] = "";
171 const char line_comment_chars
[] = "/";
174 const char line_separator_chars
[] = "";
176 /* Chars that can be used to separate mant from exp in floating point nums */
177 const char EXP_CHARS
[] = "eE";
179 /* Chars that mean this number is a floating point constant */
182 const char FLT_CHARS
[] = "fFdDxX";
184 /* tables for lexical analysis */
185 static char mnemonic_chars
[256];
186 static char register_chars
[256];
187 static char operand_chars
[256];
188 static char identifier_chars
[256];
189 static char digit_chars
[256];
192 #define is_mnemonic_char(x) (mnemonic_chars[(unsigned char) x])
193 #define is_operand_char(x) (operand_chars[(unsigned char) x])
194 #define is_register_char(x) (register_chars[(unsigned char) x])
195 #define is_space_char(x) ((x) == ' ')
196 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
197 #define is_digit_char(x) (digit_chars[(unsigned char) x])
199 /* put here all non-digit non-letter charcters that may occur in an operand */
200 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
202 /* md_assemble() always leaves the strings it's passed unaltered. To
203 effect this we maintain a stack of saved characters that we've smashed
204 with '\0's (indicating end of strings for various sub-fields of the
205 assembler instruction). */
206 static char save_stack
[32];
207 static char *save_stack_p
; /* stack pointer */
208 #define END_STRING_AND_SAVE(s) \
209 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
210 #define RESTORE_END_STRING(s) \
211 do { *(s) = *--save_stack_p; } while (0)
213 /* The instruction we're assembling. */
216 /* Possible templates for current insn. */
217 static const templates
*current_templates
;
219 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
220 static expressionS disp_expressions
[2], im_expressions
[2];
222 static int this_operand
; /* current operand we are working on */
224 static int flag_do_long_jump
; /* FIXME what does this do? */
226 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
228 static int intel_syntax
= 0; /* 1 for intel syntax, 0 if att syntax */
230 static int allow_naked_reg
= 0; /* 1 if register prefix % not required */
232 /* Interface to relax_segment.
233 There are 2 relax states for 386 jump insns: one for conditional &
234 one for unconditional jumps. This is because the these two types
235 of jumps add different sizes to frags when we're figuring out what
236 sort of jump to choose to reach a given label. */
239 #define COND_JUMP 1 /* conditional jump */
240 #define UNCOND_JUMP 2 /* unconditional jump */
244 #define SMALL16 (SMALL|CODE16)
246 #define BIG16 (BIG|CODE16)
250 #define INLINE __inline__
256 #define ENCODE_RELAX_STATE(type,size) \
257 ((relax_substateT)((type<<2) | (size)))
258 #define SIZE_FROM_RELAX_STATE(s) \
259 ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) )
261 /* This table is used by relax_frag to promote short jumps to long
262 ones where necessary. SMALL (short) jumps may be promoted to BIG
263 (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We
264 don't allow a short jump in a 32 bit code segment to be promoted to
265 a 16 bit offset jump because it's slower (requires data size
266 prefix), and doesn't work, unless the destination is in the bottom
267 64k of the code segment (The top 16 bits of eip are zeroed). */
269 const relax_typeS md_relax_table
[] =
272 1) most positive reach of this state,
273 2) most negative reach of this state,
274 3) how many bytes this mode will add to the size of the current frag
275 4) which index into the table to try if we can't fit into this one.
282 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG
)},
283 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG16
)},
284 /* dword conditionals adds 4 bytes to frag:
285 1 extra opcode byte, 3 extra displacement bytes. */
287 /* word conditionals add 2 bytes to frag:
288 1 extra opcode byte, 1 extra displacement byte. */
291 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
)},
292 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
)},
293 /* dword jmp adds 3 bytes to frag:
294 0 extra opcode bytes, 3 extra displacement bytes. */
296 /* word jmp adds 1 byte to frag:
297 0 extra opcode bytes, 1 extra displacement byte. */
304 i386_align_code (fragP
, count
)
308 /* Various efficient no-op patterns for aligning code labels. */
309 /* Note: Don't try to assemble the instructions in the comments. */
310 /* 0L and 0w are not legal */
311 static const char f32_1
[] =
313 static const char f32_2
[] =
314 {0x89,0xf6}; /* movl %esi,%esi */
315 static const char f32_3
[] =
316 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
317 static const char f32_4
[] =
318 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
319 static const char f32_5
[] =
321 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
322 static const char f32_6
[] =
323 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
324 static const char f32_7
[] =
325 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
326 static const char f32_8
[] =
328 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
329 static const char f32_9
[] =
330 {0x89,0xf6, /* movl %esi,%esi */
331 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
332 static const char f32_10
[] =
333 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
334 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
335 static const char f32_11
[] =
336 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
337 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
338 static const char f32_12
[] =
339 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
340 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
341 static const char f32_13
[] =
342 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
343 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
344 static const char f32_14
[] =
345 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
346 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
347 static const char f32_15
[] =
348 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
349 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
350 static const char f16_3
[] =
351 {0x8d,0x74,0x00}; /* lea 0(%esi),%esi */
352 static const char f16_4
[] =
353 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
354 static const char f16_5
[] =
356 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
357 static const char f16_6
[] =
358 {0x89,0xf6, /* mov %si,%si */
359 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
360 static const char f16_7
[] =
361 {0x8d,0x74,0x00, /* lea 0(%si),%si */
362 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
363 static const char f16_8
[] =
364 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
365 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
366 static const char *const f32_patt
[] = {
367 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
368 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
370 static const char *const f16_patt
[] = {
371 f32_1
, f32_2
, f16_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
372 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
375 if (count
> 0 && count
<= 15)
379 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
380 f16_patt
[count
- 1], count
);
381 if (count
> 8) /* adjust jump offset */
382 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
385 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
386 f32_patt
[count
- 1], count
);
387 fragP
->fr_var
= count
;
391 static char *output_invalid
PARAMS ((int c
));
392 static int i386_operand
PARAMS ((char *operand_string
));
393 static int i386_intel_operand
PARAMS ((char *operand_string
, int got_a_float
));
394 static const reg_entry
*parse_register
PARAMS ((char *reg_string
,
398 static void s_bss
PARAMS ((int));
401 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
403 static INLINE
unsigned int
404 mode_from_disp_size (t
)
407 return (t
& Disp8
) ? 1 : (t
& (Disp16
|Disp32
)) ? 2 : 0;
411 fits_in_signed_byte (num
)
414 return (num
>= -128) && (num
<= 127);
415 } /* fits_in_signed_byte() */
418 fits_in_unsigned_byte (num
)
421 return (num
& 0xff) == num
;
422 } /* fits_in_unsigned_byte() */
425 fits_in_unsigned_word (num
)
428 return (num
& 0xffff) == num
;
429 } /* fits_in_unsigned_word() */
432 fits_in_signed_word (num
)
435 return (-32768 <= num
) && (num
<= 32767);
436 } /* fits_in_signed_word() */
439 smallest_imm_type (num
)
443 /* This code is disabled because all the Imm1 forms in the opcode table
444 are slower on the i486, and they're the versions with the implicitly
445 specified single-position displacement, which has another syntax if
446 you really want to use that form. If you really prefer to have the
447 one-byte-shorter Imm1 form despite these problems, re-enable this
450 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
452 return (fits_in_signed_byte (num
)
453 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
454 : fits_in_unsigned_byte (num
)
455 ? (Imm8
| Imm16
| Imm32
)
456 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
459 } /* smallest_imm_type() */
461 /* Returns 0 if attempting to add a prefix where one from the same
462 class already exists, 1 if non rep/repne added, 2 if rep/repne
476 case CS_PREFIX_OPCODE
:
477 case DS_PREFIX_OPCODE
:
478 case ES_PREFIX_OPCODE
:
479 case FS_PREFIX_OPCODE
:
480 case GS_PREFIX_OPCODE
:
481 case SS_PREFIX_OPCODE
:
485 case REPNE_PREFIX_OPCODE
:
486 case REPE_PREFIX_OPCODE
:
489 case LOCK_PREFIX_OPCODE
:
497 case ADDR_PREFIX_OPCODE
:
501 case DATA_PREFIX_OPCODE
:
508 as_bad (_("same type of prefix used twice"));
513 i
.prefix
[q
] = prefix
;
518 set_16bit_code_flag (new_16bit_code_flag
)
519 int new_16bit_code_flag
;
521 flag_16bit_code
= new_16bit_code_flag
;
525 set_intel_syntax (syntax_flag
)
528 /* Find out if register prefixing is specified. */
529 int ask_naked_reg
= 0;
532 if (! is_end_of_line
[(unsigned char) *input_line_pointer
])
534 char *string
= input_line_pointer
;
535 int e
= get_symbol_end ();
537 if (strcmp(string
, "prefix") == 0)
539 else if (strcmp(string
, "noprefix") == 0)
542 as_bad (_("Bad argument to syntax directive."));
543 *input_line_pointer
= e
;
545 demand_empty_rest_of_line ();
547 intel_syntax
= syntax_flag
;
549 if (ask_naked_reg
== 0)
552 allow_naked_reg
= (intel_syntax
553 && (bfd_get_symbol_leading_char (stdoutput
) != '\0'));
555 allow_naked_reg
= 0; /* conservative default */
559 allow_naked_reg
= (ask_naked_reg
< 0);
562 const pseudo_typeS md_pseudo_table
[] =
567 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
568 {"align", s_align_bytes
, 0},
570 {"align", s_align_ptwo
, 0},
572 {"ffloat", float_cons
, 'f'},
573 {"dfloat", float_cons
, 'd'},
574 {"tfloat", float_cons
, 'x'},
576 {"noopt", s_ignore
, 0},
577 {"optim", s_ignore
, 0},
578 {"code16", set_16bit_code_flag
, 1},
579 {"code32", set_16bit_code_flag
, 0},
580 {"intel_syntax", set_intel_syntax
, 1},
581 {"att_syntax", set_intel_syntax
, 0},
585 /* for interface with expression () */
586 extern char *input_line_pointer
;
588 /* hash table for instruction mnemonic lookup */
589 static struct hash_control
*op_hash
;
590 /* hash table for register lookup */
591 static struct hash_control
*reg_hash
;
597 const char *hash_err
;
599 /* initialize op_hash hash table */
600 op_hash
= hash_new ();
603 register const template *optab
;
604 register templates
*core_optab
;
606 optab
= i386_optab
; /* setup for loop */
607 core_optab
= (templates
*) xmalloc (sizeof (templates
));
608 core_optab
->start
= optab
;
613 if (optab
->name
== NULL
614 || strcmp (optab
->name
, (optab
- 1)->name
) != 0)
616 /* different name --> ship out current template list;
617 add to hash table; & begin anew */
618 core_optab
->end
= optab
;
619 hash_err
= hash_insert (op_hash
,
625 as_fatal (_("Internal Error: Can't hash %s: %s"),
629 if (optab
->name
== NULL
)
631 core_optab
= (templates
*) xmalloc (sizeof (templates
));
632 core_optab
->start
= optab
;
637 /* initialize reg_hash hash table */
638 reg_hash
= hash_new ();
640 register const reg_entry
*regtab
;
642 for (regtab
= i386_regtab
;
643 regtab
< i386_regtab
+ sizeof (i386_regtab
) / sizeof (i386_regtab
[0]);
646 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
652 /* fill in lexical tables: mnemonic_chars, operand_chars. */
657 for (c
= 0; c
< 256; c
++)
662 mnemonic_chars
[c
] = c
;
663 register_chars
[c
] = c
;
664 operand_chars
[c
] = c
;
666 else if (islower (c
))
668 mnemonic_chars
[c
] = c
;
669 register_chars
[c
] = c
;
670 operand_chars
[c
] = c
;
672 else if (isupper (c
))
674 mnemonic_chars
[c
] = tolower (c
);
675 register_chars
[c
] = mnemonic_chars
[c
];
676 operand_chars
[c
] = c
;
679 if (isalpha (c
) || isdigit (c
))
680 identifier_chars
[c
] = c
;
683 identifier_chars
[c
] = c
;
684 operand_chars
[c
] = c
;
689 identifier_chars
['@'] = '@';
691 register_chars
[')'] = ')';
692 register_chars
['('] = '(';
693 digit_chars
['-'] = '-';
694 identifier_chars
['_'] = '_';
695 identifier_chars
['.'] = '.';
697 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
698 operand_chars
[(unsigned char) *p
] = *p
;
701 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
702 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
704 record_alignment (text_section
, 2);
705 record_alignment (data_section
, 2);
706 record_alignment (bss_section
, 2);
712 i386_print_statistics (file
)
715 hash_print_statistics (file
, "i386 opcode", op_hash
);
716 hash_print_statistics (file
, "i386 register", reg_hash
);
722 /* debugging routines for md_assemble */
723 static void pi
PARAMS ((char *, i386_insn
*));
724 static void pte
PARAMS ((template *));
725 static void pt
PARAMS ((unsigned int));
726 static void pe
PARAMS ((expressionS
*));
727 static void ps
PARAMS ((symbolS
*));
734 register template *p
;
737 fprintf (stdout
, "%s: template ", line
);
739 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
740 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
741 fprintf (stdout
, " base %x index %x scale %x\n",
742 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
743 for (i
= 0; i
< x
->operands
; i
++)
745 fprintf (stdout
, " #%d: ", i
+ 1);
747 fprintf (stdout
, "\n");
749 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
| RegXMM
))
750 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
751 if (x
->types
[i
] & Imm
)
753 if (x
->types
[i
] & Disp
)
763 fprintf (stdout
, " %d operands ", t
->operands
);
764 fprintf (stdout
, "opcode %x ",
766 if (t
->extension_opcode
!= None
)
767 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
768 if (t
->opcode_modifier
& D
)
769 fprintf (stdout
, "D");
770 if (t
->opcode_modifier
& W
)
771 fprintf (stdout
, "W");
772 fprintf (stdout
, "\n");
773 for (i
= 0; i
< t
->operands
; i
++)
775 fprintf (stdout
, " #%d type ", i
+ 1);
776 pt (t
->operand_types
[i
]);
777 fprintf (stdout
, "\n");
785 fprintf (stdout
, " operation %d\n", e
->X_op
);
786 fprintf (stdout
, " add_number %ld (%lx)\n",
787 (long) e
->X_add_number
, (long) e
->X_add_number
);
790 fprintf (stdout
, " add_symbol ");
791 ps (e
->X_add_symbol
);
792 fprintf (stdout
, "\n");
796 fprintf (stdout
, " op_symbol ");
798 fprintf (stdout
, "\n");
806 fprintf (stdout
, "%s type %s%s",
808 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
809 segment_name (S_GET_SEGMENT (s
)));
828 { BaseIndex
, "BaseIndex" },
832 { InOutPortReg
, "InOutPortReg" },
833 { ShiftCount
, "ShiftCount" },
834 { Control
, "control reg" },
835 { Test
, "test reg" },
836 { Debug
, "debug reg" },
837 { FloatReg
, "FReg" },
838 { FloatAcc
, "FAcc" },
842 { JumpAbsolute
, "Jump Absolute" },
853 register struct type_name
*ty
;
857 fprintf (stdout
, _("Unknown"));
861 for (ty
= type_names
; ty
->mask
; ty
++)
863 fprintf (stdout
, "%s, ", ty
->tname
);
868 #endif /* DEBUG386 */
871 tc_i386_force_relocation (fixp
)
875 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
876 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
881 return fixp
->fx_r_type
==7;
886 static bfd_reloc_code_real_type reloc
887 PARAMS ((int, int, bfd_reloc_code_real_type
));
889 static bfd_reloc_code_real_type
890 reloc (size
, pcrel
, other
)
893 bfd_reloc_code_real_type other
;
895 if (other
!= NO_RELOC
) return other
;
901 case 1: return BFD_RELOC_8_PCREL
;
902 case 2: return BFD_RELOC_16_PCREL
;
903 case 4: return BFD_RELOC_32_PCREL
;
905 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
911 case 1: return BFD_RELOC_8
;
912 case 2: return BFD_RELOC_16
;
913 case 4: return BFD_RELOC_32
;
915 as_bad (_("Can not do %d byte relocation"), size
);
918 return BFD_RELOC_NONE
;
922 * Here we decide which fixups can be adjusted to make them relative to
923 * the beginning of the section instead of the symbol. Basically we need
924 * to make sure that the dynamic relocations are done correctly, so in
925 * some cases we force the original symbol to be used.
928 tc_i386_fix_adjustable(fixP
)
932 /* Prevent all adjustments to global symbols. */
933 if (S_IS_EXTERN (fixP
->fx_addsy
))
935 if (S_IS_WEAK (fixP
->fx_addsy
))
938 /* adjust_reloc_syms doesn't know about the GOT */
939 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
940 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
941 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
942 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
943 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
948 #define reloc(SIZE,PCREL,OTHER) 0
949 #define BFD_RELOC_16 0
950 #define BFD_RELOC_32 0
951 #define BFD_RELOC_16_PCREL 0
952 #define BFD_RELOC_32_PCREL 0
953 #define BFD_RELOC_386_PLT32 0
954 #define BFD_RELOC_386_GOT32 0
955 #define BFD_RELOC_386_GOTOFF 0
959 intel_float_operand
PARAMS ((char *mnemonic
));
962 intel_float_operand (mnemonic
)
965 if (mnemonic
[0] == 'f' && mnemonic
[1] =='i')
968 if (mnemonic
[0] == 'f')
974 /* This is the guts of the machine-dependent assembler. LINE points to a
975 machine dependent instruction. This function is supposed to emit
976 the frags/bytes it assembles to. */
982 /* Points to template once we've found it. */
985 /* Count the size of the instruction generated. */
990 char mnemonic
[MAX_MNEM_SIZE
];
992 /* Initialize globals. */
993 memset (&i
, '\0', sizeof (i
));
994 for (j
= 0; j
< MAX_OPERANDS
; j
++)
995 i
.disp_reloc
[j
] = NO_RELOC
;
996 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
997 memset (im_expressions
, '\0', sizeof (im_expressions
));
998 save_stack_p
= save_stack
; /* reset stack pointer */
1000 /* First parse an instruction mnemonic & call i386_operand for the operands.
1001 We assume that the scrubber has arranged it so that line[0] is the valid
1002 start of a (possibly prefixed) mnemonic. */
1005 char *token_start
= l
;
1008 /* Non-zero if we found a prefix only acceptable with string insns. */
1009 const char *expecting_string_instruction
= NULL
;
1014 while ((*mnem_p
= mnemonic_chars
[(unsigned char) *l
]) != 0)
1017 if (mnem_p
>= mnemonic
+ sizeof (mnemonic
))
1019 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1024 if (!is_space_char (*l
)
1025 && *l
!= END_OF_INSN
1026 && *l
!= PREFIX_SEPARATOR
)
1028 as_bad (_("invalid character %s in mnemonic"),
1029 output_invalid (*l
));
1032 if (token_start
== l
)
1034 if (*l
== PREFIX_SEPARATOR
)
1035 as_bad (_("expecting prefix; got nothing"));
1037 as_bad (_("expecting mnemonic; got nothing"));
1041 /* Look up instruction (or prefix) via hash table. */
1042 current_templates
= hash_find (op_hash
, mnemonic
);
1044 if (*l
!= END_OF_INSN
1045 && (! is_space_char (*l
) || l
[1] != END_OF_INSN
)
1046 && current_templates
1047 && (current_templates
->start
->opcode_modifier
& IsPrefix
))
1049 /* If we are in 16-bit mode, do not allow addr16 or data16.
1050 Similarly, in 32-bit mode, do not allow addr32 or data32. */
1051 if ((current_templates
->start
->opcode_modifier
& (Size16
| Size32
))
1052 && (((current_templates
->start
->opcode_modifier
& Size32
) != 0)
1055 as_bad (_("redundant %s prefix"),
1056 current_templates
->start
->name
);
1059 /* Add prefix, checking for repeated prefixes. */
1060 switch (add_prefix (current_templates
->start
->base_opcode
))
1065 expecting_string_instruction
=
1066 current_templates
->start
->name
;
1069 /* Skip past PREFIX_SEPARATOR and reset token_start. */
1076 if (!current_templates
)
1078 /* See if we can get a match by trimming off a suffix. */
1081 case DWORD_MNEM_SUFFIX
:
1082 case WORD_MNEM_SUFFIX
:
1083 case BYTE_MNEM_SUFFIX
:
1084 case SHORT_MNEM_SUFFIX
:
1085 #if LONG_MNEM_SUFFIX != DWORD_MNEM_SUFFIX
1086 case LONG_MNEM_SUFFIX
:
1088 i
.suffix
= mnem_p
[-1];
1090 current_templates
= hash_find (op_hash
, mnemonic
);
1094 case INTEL_DWORD_MNEM_SUFFIX
:
1097 i
.suffix
= mnem_p
[-1];
1099 current_templates
= hash_find (op_hash
, mnemonic
);
1103 if (!current_templates
)
1105 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1110 /* check for rep/repne without a string instruction */
1111 if (expecting_string_instruction
1112 && !(current_templates
->start
->opcode_modifier
& IsString
))
1114 as_bad (_("expecting string instruction after `%s'"),
1115 expecting_string_instruction
);
1119 /* There may be operands to parse. */
1120 if (*l
!= END_OF_INSN
)
1122 /* parse operands */
1124 /* 1 if operand is pending after ','. */
1125 unsigned int expecting_operand
= 0;
1127 /* Non-zero if operand parens not balanced. */
1128 unsigned int paren_not_balanced
;
1132 /* skip optional white space before operand */
1133 if (is_space_char (*l
))
1135 if (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1137 as_bad (_("invalid character %s before operand %d"),
1138 output_invalid (*l
),
1142 token_start
= l
; /* after white space */
1143 paren_not_balanced
= 0;
1144 while (paren_not_balanced
|| *l
!= ',')
1146 if (*l
== END_OF_INSN
)
1148 if (paren_not_balanced
)
1151 as_bad (_("unbalanced parenthesis in operand %d."),
1154 as_bad (_("unbalanced brackets in operand %d."),
1159 break; /* we are done */
1161 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1163 as_bad (_("invalid character %s in operand %d"),
1164 output_invalid (*l
),
1171 ++paren_not_balanced
;
1173 --paren_not_balanced
;
1178 ++paren_not_balanced
;
1180 --paren_not_balanced
;
1184 if (l
!= token_start
)
1185 { /* yes, we've read in another operand */
1186 unsigned int operand_ok
;
1187 this_operand
= i
.operands
++;
1188 if (i
.operands
> MAX_OPERANDS
)
1190 as_bad (_("spurious operands; (%d operands/instruction max)"),
1194 /* now parse operand adding info to 'i' as we go along */
1195 END_STRING_AND_SAVE (l
);
1198 operand_ok
= i386_intel_operand (token_start
, intel_float_operand (mnemonic
));
1200 operand_ok
= i386_operand (token_start
);
1202 RESTORE_END_STRING (l
); /* restore old contents */
1208 if (expecting_operand
)
1210 expecting_operand_after_comma
:
1211 as_bad (_("expecting operand after ','; got nothing"));
1216 as_bad (_("expecting operand before ','; got nothing"));
1221 /* now *l must be either ',' or END_OF_INSN */
1224 if (*++l
== END_OF_INSN
)
1225 { /* just skip it, if it's \n complain */
1226 goto expecting_operand_after_comma
;
1228 expecting_operand
= 1;
1231 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1235 /* Now we've parsed the mnemonic into a set of templates, and have the
1238 Next, we find a template that matches the given insn,
1239 making sure the overlap of the given operands types is consistent
1240 with the template operand types. */
1242 #define MATCH(overlap, given, template) \
1244 && ((given) & BaseIndex) == ((overlap) & BaseIndex) \
1245 && ((given) & JumpAbsolute) == ((template) & JumpAbsolute))
1247 /* If given types r0 and r1 are registers they must be of the same type
1248 unless the expected operand type register overlap is null.
1249 Note that Acc in a template matches every size of reg. */
1250 #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \
1251 ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \
1252 ((g0) & Reg) == ((g1) & Reg) || \
1253 ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 )
1256 register unsigned int overlap0
, overlap1
;
1257 unsigned int overlap2
;
1258 unsigned int found_reverse_match
;
1261 /* All intel opcodes have reversed operands except for BOUND and ENTER */
1263 && (strcmp (mnemonic
, "enter") != 0)
1264 && (strcmp (mnemonic
, "bound") != 0)
1265 && (strncmp (mnemonic
, "fsub", 4) !=0)
1266 && (strncmp (mnemonic
, "fdiv", 4) !=0))
1268 const reg_entry
*temp_reg
= NULL
;
1269 expressionS
*temp_disp
= NULL
;
1270 expressionS
*temp_imm
= NULL
;
1271 unsigned int temp_type
;
1275 if (i
.operands
== 2)
1280 else if (i
.operands
== 3)
1288 temp_type
= i
.types
[xchg2
];
1289 if (temp_type
& (Reg
| FloatReg
))
1290 temp_reg
= i
.regs
[xchg2
];
1291 else if (temp_type
& Imm
)
1292 temp_imm
= i
.imms
[xchg2
];
1293 else if (temp_type
& Disp
)
1294 temp_disp
= i
.disps
[xchg2
];
1296 i
.types
[xchg2
] = i
.types
[xchg1
];
1298 if (i
.types
[xchg1
] & (Reg
| FloatReg
))
1300 i
.regs
[xchg2
] = i
.regs
[xchg1
];
1301 i
.regs
[xchg1
] = NULL
;
1303 else if (i
.types
[xchg2
] & Imm
)
1305 i
.imms
[xchg2
] = i
.imms
[xchg1
];
1306 i
.imms
[xchg1
] = NULL
;
1308 else if (i
.types
[xchg2
] & Disp
)
1310 i
.disps
[xchg2
] = i
.disps
[xchg1
];
1311 i
.disps
[xchg1
] = NULL
;
1314 if (temp_type
& (Reg
| FloatReg
))
1316 i
.regs
[xchg1
] = temp_reg
;
1317 if (! (i
.types
[xchg1
] & (Reg
| FloatReg
)))
1318 i
.regs
[xchg2
] = NULL
;
1320 else if (temp_type
& Imm
)
1322 i
.imms
[xchg1
] = temp_imm
;
1323 if (! (i
.types
[xchg1
] & Imm
))
1324 i
.imms
[xchg2
] = NULL
;
1326 else if (temp_type
& Disp
)
1328 i
.disps
[xchg1
] = temp_disp
;
1329 if (! (i
.types
[xchg1
] & Disp
))
1330 i
.disps
[xchg2
] = NULL
;
1333 i
.types
[xchg1
] = temp_type
;
1335 if (!strcmp(mnemonic
,"jmp")
1336 || !strcmp (mnemonic
, "call"))
1337 if ((i
.types
[0] & Reg
) || i
.types
[0] & BaseIndex
)
1338 i
.types
[0] |= JumpAbsolute
;
1344 found_reverse_match
= 0;
1345 suffix_check
= (i
.suffix
== BYTE_MNEM_SUFFIX
1347 : (i
.suffix
== WORD_MNEM_SUFFIX
1349 : (i
.suffix
== SHORT_MNEM_SUFFIX
1351 : (i
.suffix
== LONG_MNEM_SUFFIX
1353 : (i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
1355 : (i
.suffix
== LONG_DOUBLE_MNEM_SUFFIX
? No_xSuf
: 0))))));
1357 for (t
= current_templates
->start
;
1358 t
< current_templates
->end
;
1361 /* Must have right number of operands. */
1362 if (i
.operands
!= t
->operands
)
1365 /* For some opcodes, don't check the suffix */
1368 if (strcmp (t
->name
, "fnstcw")
1369 && strcmp (t
->name
, "fldcw")
1370 && (t
->opcode_modifier
& suffix_check
))
1373 /* Must not have disallowed suffix. */
1374 else if ((t
->opcode_modifier
& suffix_check
))
1377 else if (!t
->operands
)
1378 break; /* 0 operands always matches */
1380 overlap0
= i
.types
[0] & t
->operand_types
[0];
1381 switch (t
->operands
)
1384 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0]))
1389 overlap1
= i
.types
[1] & t
->operand_types
[1];
1390 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0])
1391 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[1])
1392 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1393 t
->operand_types
[0],
1394 overlap1
, i
.types
[1],
1395 t
->operand_types
[1]))
1398 /* check if other direction is valid ... */
1399 if ((t
->opcode_modifier
& (D
|FloatD
)) == 0)
1402 /* try reversing direction of operands */
1403 overlap0
= i
.types
[0] & t
->operand_types
[1];
1404 overlap1
= i
.types
[1] & t
->operand_types
[0];
1405 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[1])
1406 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[0])
1407 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1408 t
->operand_types
[1],
1409 overlap1
, i
.types
[1],
1410 t
->operand_types
[0]))
1412 /* does not match either direction */
1415 /* found_reverse_match holds which of D or FloatDR
1417 found_reverse_match
= t
->opcode_modifier
& (D
|FloatDR
);
1420 /* found a forward 2 operand match here */
1421 if (t
->operands
== 3)
1423 /* Here we make use of the fact that there are no
1424 reverse match 3 operand instructions, and all 3
1425 operand instructions only need to be checked for
1426 register consistency between operands 2 and 3. */
1427 overlap2
= i
.types
[2] & t
->operand_types
[2];
1428 if (!MATCH (overlap2
, i
.types
[2], t
->operand_types
[2])
1429 || !CONSISTENT_REGISTER_MATCH (overlap1
, i
.types
[1],
1430 t
->operand_types
[1],
1431 overlap2
, i
.types
[2],
1432 t
->operand_types
[2]))
1436 /* found either forward/reverse 2 or 3 operand match here:
1437 slip through to break */
1439 break; /* we've found a match; break out of loop */
1440 } /* for (t = ... */
1441 if (t
== current_templates
->end
)
1442 { /* we found no match */
1443 as_bad (_("suffix or operands invalid for `%s'"),
1444 current_templates
->start
->name
);
1448 if ((t
->opcode_modifier
& (IsPrefix
|IgnoreSize
)) == (IsPrefix
|IgnoreSize
))
1450 /* Warn them that a data or address size prefix doesn't affect
1451 assembly of the next line of code. */
1452 as_warn (_("stand-alone `%s' prefix"), t
->name
);
1455 /* Copy the template we found. */
1457 if (found_reverse_match
)
1459 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1460 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1464 if (i
.tm
.opcode_modifier
& FWait
)
1465 if (! add_prefix (FWAIT_OPCODE
))
1468 /* Check string instruction segment overrides */
1469 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1471 int mem_op
= (i
.types
[0] & AnyMem
) ? 0 : 1;
1472 if ((i
.tm
.operand_types
[mem_op
] & EsSeg
) != 0)
1474 if (i
.seg
[0] != NULL
&& i
.seg
[0] != &es
)
1476 as_bad (_("`%s' operand %d must use `%%es' segment"),
1481 /* There's only ever one segment override allowed per instruction.
1482 This instruction possibly has a legal segment override on the
1483 second operand, so copy the segment to where non-string
1484 instructions store it, allowing common code. */
1485 i
.seg
[0] = i
.seg
[1];
1487 else if ((i
.tm
.operand_types
[mem_op
+ 1] & EsSeg
) != 0)
1489 if (i
.seg
[1] != NULL
&& i
.seg
[1] != &es
)
1491 as_bad (_("`%s' operand %d must use `%%es' segment"),
1499 /* If matched instruction specifies an explicit instruction mnemonic
1501 if (i
.tm
.opcode_modifier
& (Size16
| Size32
))
1503 if (i
.tm
.opcode_modifier
& Size16
)
1504 i
.suffix
= WORD_MNEM_SUFFIX
;
1506 i
.suffix
= DWORD_MNEM_SUFFIX
;
1508 else if (i
.reg_operands
)
1510 /* If there's no instruction mnemonic suffix we try to invent one
1511 based on register operands. */
1514 /* We take i.suffix from the last register operand specified,
1515 Destination register type is more significant than source
1518 for (op
= i
.operands
; --op
>= 0; )
1519 if (i
.types
[op
] & Reg
)
1521 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_MNEM_SUFFIX
:
1522 (i
.types
[op
] & Reg16
) ? WORD_MNEM_SUFFIX
:
1527 else if (i
.suffix
== BYTE_MNEM_SUFFIX
)
1530 for (op
= i
.operands
; --op
>= 0; )
1532 /* If this is an eight bit register, it's OK. If it's
1533 the 16 or 32 bit version of an eight bit register,
1534 we will just use the low portion, and that's OK too. */
1535 if (i
.types
[op
] & Reg8
)
1538 /* movzx and movsx should not generate this warning. */
1540 && (i
.tm
.base_opcode
== 0xfb7
1541 || i
.tm
.base_opcode
== 0xfb6
1542 || i
.tm
.base_opcode
== 0xfbe
1543 || i
.tm
.base_opcode
== 0xfbf))
1546 if ((i
.types
[op
] & WordReg
) && i
.regs
[op
]->reg_num
< 4
1548 /* Check that the template allows eight bit regs
1549 This kills insns such as `orb $1,%edx', which
1550 maybe should be allowed. */
1551 && (i
.tm
.operand_types
[op
] & (Reg8
|InOutPortReg
))
1555 #if REGISTER_WARNINGS
1556 if ((i
.tm
.operand_types
[op
] & InOutPortReg
) == 0)
1557 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1558 (i
.regs
[op
] - (i
.types
[op
] & Reg16
? 8 : 16))->reg_name
,
1559 i
.regs
[op
]->reg_name
,
1564 /* Any other register is bad */
1565 if (i
.types
[op
] & (Reg
| RegMMX
| RegXMM
1567 | Control
| Debug
| Test
1568 | FloatReg
| FloatAcc
))
1570 as_bad (_("`%%%s' not allowed with `%s%c'"),
1571 i
.regs
[op
]->reg_name
,
1578 else if (i
.suffix
== DWORD_MNEM_SUFFIX
)
1581 for (op
= i
.operands
; --op
>= 0; )
1582 /* Reject eight bit registers, except where the template
1583 requires them. (eg. movzb) */
1584 if ((i
.types
[op
] & Reg8
) != 0
1585 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1587 as_bad (_("`%%%s' not allowed with `%s%c'"),
1588 i
.regs
[op
]->reg_name
,
1593 #if REGISTER_WARNINGS
1594 /* Warn if the e prefix on a general reg is missing. */
1595 else if ((i
.types
[op
] & Reg16
) != 0
1596 && (i
.tm
.operand_types
[op
] & (Reg32
|Acc
)) != 0)
1598 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1599 (i
.regs
[op
] + 8)->reg_name
,
1600 i
.regs
[op
]->reg_name
,
1605 else if (i
.suffix
== WORD_MNEM_SUFFIX
)
1608 for (op
= i
.operands
; --op
>= 0; )
1609 /* Reject eight bit registers, except where the template
1610 requires them. (eg. movzb) */
1611 if ((i
.types
[op
] & Reg8
) != 0
1612 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1614 as_bad (_("`%%%s' not allowed with `%s%c'"),
1615 i
.regs
[op
]->reg_name
,
1620 #if REGISTER_WARNINGS
1621 /* Warn if the e prefix on a general reg is present. */
1622 else if ((i
.types
[op
] & Reg32
) != 0
1623 && (i
.tm
.operand_types
[op
] & (Reg16
|Acc
)) != 0)
1625 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1626 (i
.regs
[op
] - 8)->reg_name
,
1627 i
.regs
[op
]->reg_name
,
1636 /* Make still unresolved immediate matches conform to size of immediate
1637 given in i.suffix. Note: overlap2 cannot be an immediate! */
1638 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1639 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1640 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1644 overlap0
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1645 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1647 else if (overlap0
== (Imm16
| Imm32
))
1650 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1654 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1658 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1659 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1660 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1664 overlap1
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1665 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1667 else if (overlap1
== (Imm16
| Imm32
))
1670 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1674 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1678 assert ((overlap2
& Imm
) == 0);
1680 i
.types
[0] = overlap0
;
1681 if (overlap0
& ImplicitRegister
)
1683 if (overlap0
& Imm1
)
1684 i
.imm_operands
= 0; /* kludge for shift insns */
1686 i
.types
[1] = overlap1
;
1687 if (overlap1
& ImplicitRegister
)
1690 i
.types
[2] = overlap2
;
1691 if (overlap2
& ImplicitRegister
)
1694 /* Finalize opcode. First, we change the opcode based on the operand
1695 size given by i.suffix: We need not change things for byte insns. */
1697 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1699 as_bad (_("no instruction mnemonic suffix given and no register operands; can't size instruction"));
1703 /* For movzx and movsx, need to check the register type */
1705 && (i
.tm
.base_opcode
== 0xfb6 || i
.tm
.base_opcode
== 0xfbe))
1706 if (i
.suffix
&& i
.suffix
== BYTE_MNEM_SUFFIX
)
1708 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1710 if ((i
.regs
[1]->reg_type
& Reg16
) != 0)
1711 if (!add_prefix (prefix
))
1715 if (i
.suffix
&& i
.suffix
!= BYTE_MNEM_SUFFIX
)
1717 /* It's not a byte, select word/dword operation. */
1718 if (i
.tm
.opcode_modifier
& W
)
1720 if (i
.tm
.opcode_modifier
& ShortForm
)
1721 i
.tm
.base_opcode
|= 8;
1723 i
.tm
.base_opcode
|= 1;
1725 /* Now select between word & dword operations via the operand
1726 size prefix, except for instructions that will ignore this
1728 if (((intel_syntax
&& (i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
))
1729 || i
.suffix
== DWORD_MNEM_SUFFIX
1730 || i
.suffix
== LONG_MNEM_SUFFIX
) == flag_16bit_code
1731 && !(i
.tm
.opcode_modifier
& IgnoreSize
))
1733 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1734 if (i
.tm
.opcode_modifier
& JumpByte
) /* jcxz, loop */
1735 prefix
= ADDR_PREFIX_OPCODE
;
1737 if (! add_prefix (prefix
))
1740 /* Size floating point instruction. */
1741 if (i
.suffix
== LONG_MNEM_SUFFIX
1742 || (intel_syntax
&& i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
))
1744 if (i
.tm
.opcode_modifier
& FloatMF
)
1745 i
.tm
.base_opcode
^= 4;
1748 if (intel_syntax
&& i
.suffix
== LONG_DOUBLE_MNEM_SUFFIX
)
1750 if (i
.tm
.opcode_modifier
& FloatMF
)
1751 i
.tm
.base_opcode
^= 2;
1755 if (i
.tm
.opcode_modifier
& ImmExt
)
1757 /* These AMD 3DNow! and Intel Katmai New Instructions have an
1758 opcode suffix which is coded in the same place as an 8-bit
1759 immediate field would be. Here we fake an 8-bit immediate
1760 operand from the opcode suffix stored in tm.extension_opcode. */
1764 assert(i
.imm_operands
== 0 && i
.operands
<= 2);
1766 exp
= &im_expressions
[i
.imm_operands
++];
1767 i
.imms
[i
.operands
] = exp
;
1768 i
.types
[i
.operands
++] = Imm8
;
1769 exp
->X_op
= O_constant
;
1770 exp
->X_add_number
= i
.tm
.extension_opcode
;
1771 i
.tm
.extension_opcode
= None
;
1774 /* For insns with operands there are more diddles to do to the opcode. */
1777 /* Default segment register this instruction will use
1778 for memory accesses. 0 means unknown.
1779 This is only for optimizing out unnecessary segment overrides. */
1780 const seg_entry
*default_seg
= 0;
1782 /* If we found a reverse match we must alter the opcode
1783 direction bit. found_reverse_match holds bits to change
1784 (different for int & float insns). */
1786 i
.tm
.base_opcode
^= found_reverse_match
;
1788 /* The imul $imm, %reg instruction is converted into
1789 imul $imm, %reg, %reg, and the clr %reg instruction
1790 is converted into xor %reg, %reg. */
1791 if (i
.tm
.opcode_modifier
& regKludge
)
1793 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1794 /* Pretend we saw the extra register operand. */
1795 i
.regs
[first_reg_op
+1] = i
.regs
[first_reg_op
];
1799 if (i
.tm
.opcode_modifier
& ShortForm
)
1801 /* The register or float register operand is in operand 0 or 1. */
1802 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1803 /* Register goes in low 3 bits of opcode. */
1804 i
.tm
.base_opcode
|= i
.regs
[op
]->reg_num
;
1805 if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1807 /* Warn about some common errors, but press on regardless.
1808 The first case can be generated by gcc (<= 2.8.1). */
1809 if (i
.operands
== 2)
1811 /* reversed arguments on faddp, fsubp, etc. */
1812 as_warn (_("translating to `%s %%%s,%%%s'"), i
.tm
.name
,
1813 i
.regs
[1]->reg_name
,
1814 i
.regs
[0]->reg_name
);
1818 /* extraneous `l' suffix on fp insn */
1819 as_warn (_("translating to `%s %%%s'"), i
.tm
.name
,
1820 i
.regs
[0]->reg_name
);
1824 else if (i
.tm
.opcode_modifier
& Modrm
)
1826 /* The opcode is completed (modulo i.tm.extension_opcode which
1827 must be put into the modrm byte).
1828 Now, we make the modrm & index base bytes based on all the
1829 info we've collected. */
1831 /* i.reg_operands MUST be the number of real register operands;
1832 implicit registers do not count. */
1833 if (i
.reg_operands
== 2)
1835 unsigned int source
, dest
;
1836 source
= ((i
.types
[0]
1837 & (Reg
| RegMMX
| RegXMM
1839 | Control
| Debug
| Test
))
1844 /* One of the register operands will be encoded in the
1845 i.tm.reg field, the other in the combined i.tm.mode
1846 and i.tm.regmem fields. If no form of this
1847 instruction supports a memory destination operand,
1848 then we assume the source operand may sometimes be
1849 a memory operand and so we need to store the
1850 destination in the i.rm.reg field. */
1851 if ((i
.tm
.operand_types
[dest
] & AnyMem
) == 0)
1853 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1854 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1858 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1859 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1863 { /* if it's not 2 reg operands... */
1866 unsigned int fake_zero_displacement
= 0;
1867 unsigned int op
= ((i
.types
[0] & AnyMem
)
1869 : (i
.types
[1] & AnyMem
) ? 1 : 2);
1876 if (! i
.disp_operands
)
1877 fake_zero_displacement
= 1;
1880 /* Operand is just <disp> */
1881 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
1883 i
.rm
.regmem
= NO_BASE_REGISTER_16
;
1884 i
.types
[op
] &= ~Disp
;
1885 i
.types
[op
] |= Disp16
;
1889 i
.rm
.regmem
= NO_BASE_REGISTER
;
1890 i
.types
[op
] &= ~Disp
;
1891 i
.types
[op
] |= Disp32
;
1894 else /* ! i.base_reg && i.index_reg */
1896 i
.sib
.index
= i
.index_reg
->reg_num
;
1897 i
.sib
.base
= NO_BASE_REGISTER
;
1898 i
.sib
.scale
= i
.log2_scale_factor
;
1899 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1900 i
.types
[op
] &= ~Disp
;
1901 i
.types
[op
] |= Disp32
; /* Must be 32 bit */
1904 else if (i
.base_reg
->reg_type
& Reg16
)
1906 switch (i
.base_reg
->reg_num
)
1911 else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */
1912 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6;
1919 if ((i
.types
[op
] & Disp
) == 0)
1921 /* fake (%bp) into 0(%bp) */
1922 i
.types
[op
] |= Disp8
;
1923 fake_zero_displacement
= 1;
1926 else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */
1927 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6 + 2;
1929 default: /* (%si) -> 4 or (%di) -> 5 */
1930 i
.rm
.regmem
= i
.base_reg
->reg_num
- 6 + 4;
1932 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1934 else /* i.base_reg and 32 bit mode */
1936 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1937 i
.sib
.base
= i
.base_reg
->reg_num
;
1938 if (i
.base_reg
->reg_num
== EBP_REG_NUM
)
1941 if (i
.disp_operands
== 0)
1943 fake_zero_displacement
= 1;
1944 i
.types
[op
] |= Disp8
;
1947 else if (i
.base_reg
->reg_num
== ESP_REG_NUM
)
1951 i
.sib
.scale
= i
.log2_scale_factor
;
1954 /* <disp>(%esp) becomes two byte modrm
1955 with no index register. We've already
1956 stored the code for esp in i.rm.regmem
1957 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1958 base register besides %esp will not use
1959 the extra modrm byte. */
1960 i
.sib
.index
= NO_INDEX_REGISTER
;
1961 #if ! SCALE1_WHEN_NO_INDEX
1962 /* Another case where we force the second
1964 if (i
.log2_scale_factor
)
1965 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1970 i
.sib
.index
= i
.index_reg
->reg_num
;
1971 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1973 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1976 if (fake_zero_displacement
)
1978 /* Fakes a zero displacement assuming that i.types[op]
1979 holds the correct displacement size. */
1982 exp
= &disp_expressions
[i
.disp_operands
++];
1984 exp
->X_op
= O_constant
;
1985 exp
->X_add_number
= 0;
1986 exp
->X_add_symbol
= (symbolS
*) 0;
1987 exp
->X_op_symbol
= (symbolS
*) 0;
1991 /* Fill in i.rm.reg or i.rm.regmem field with register
1992 operand (if any) based on i.tm.extension_opcode.
1993 Again, we must be careful to make sure that
1994 segment/control/debug/test/MMX registers are coded
1995 into the i.rm.reg field. */
2000 & (Reg
| RegMMX
| RegXMM
2002 | Control
| Debug
| Test
))
2005 & (Reg
| RegMMX
| RegXMM
2007 | Control
| Debug
| Test
))
2010 /* If there is an extension opcode to put here, the
2011 register number must be put into the regmem field. */
2012 if (i
.tm
.extension_opcode
!= None
)
2013 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
2015 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
2017 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
2018 we must set it to 3 to indicate this is a register
2019 operand in the regmem field. */
2020 if (!i
.mem_operands
)
2024 /* Fill in i.rm.reg field with extension opcode (if any). */
2025 if (i
.tm
.extension_opcode
!= None
)
2026 i
.rm
.reg
= i
.tm
.extension_opcode
;
2029 else if (i
.tm
.opcode_modifier
& (Seg2ShortForm
| Seg3ShortForm
))
2031 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
2033 as_bad (_("you can't `pop %%cs'"));
2036 i
.tm
.base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
2038 else if ((i
.tm
.base_opcode
& ~(D
|W
)) == MOV_AX_DISP32
)
2042 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
2044 /* For the string instructions that allow a segment override
2045 on one of their operands, the default segment is ds. */
2049 /* If a segment was explicitly specified,
2050 and the specified segment is not the default,
2051 use an opcode prefix to select it.
2052 If we never figured out what the default segment is,
2053 then default_seg will be zero at this point,
2054 and the specified segment prefix will always be used. */
2055 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
2057 if (! add_prefix (i
.seg
[0]->seg_prefix
))
2061 else if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
2063 /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc */
2064 as_warn (_("translating to `%sp'"), i
.tm
.name
);
2068 /* Handle conversion of 'int $3' --> special int3 insn. */
2069 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
2071 i
.tm
.base_opcode
= INT3_OPCODE
;
2075 /* We are ready to output the insn. */
2080 if (i
.tm
.opcode_modifier
& Jump
)
2082 long n
= (long) i
.disps
[0]->X_add_number
;
2083 int prefix
= (i
.prefix
[DATA_PREFIX
] != 0);
2091 if (flag_16bit_code
)
2094 if (!intel_syntax
&& (i
.prefixes
!= 0))
2095 as_warn (_("skipping prefixes on this instruction"));
2097 if (i
.disps
[0]->X_op
== O_constant
)
2099 if (fits_in_signed_byte (n
))
2103 p
[0] = i
.tm
.base_opcode
;
2108 /* Use 16-bit jumps only for 16-bit code,
2109 because text segments are limited to 64K anyway;
2110 Use 32-bit jumps for 32-bit code, because they're faster,
2111 and a 16-bit jump will clear the top 16 bits of %eip. */
2112 int jmp_size
= code16
? 2 : 4;
2113 if (code16
&& !fits_in_signed_word (n
))
2115 as_bad (_("16-bit jump out of range"));
2119 if (i
.tm
.base_opcode
== JUMP_PC_RELATIVE
)
2121 /* unconditional jump */
2122 insn_size
+= prefix
+ 1 + jmp_size
;
2123 p
= frag_more (prefix
+ 1 + jmp_size
);
2125 *p
++ = DATA_PREFIX_OPCODE
;
2127 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
2131 /* conditional jump */
2132 insn_size
+= prefix
+ 2 + jmp_size
;
2133 p
= frag_more (prefix
+ 2 + jmp_size
);
2135 *p
++ = DATA_PREFIX_OPCODE
;
2136 *p
++ = TWO_BYTE_OPCODE_ESCAPE
;
2137 *p
++ = i
.tm
.base_opcode
+ 0x10;
2138 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
2144 int size
= code16
? 2 : 4;
2146 /* It's a symbol; end frag & setup for relax.
2147 Make sure there are more than 6 chars left in the current frag;
2148 if not we'll have to start a new one. */
2149 frag_grow (prefix
+ 1 + 2 + size
);
2150 insn_size
+= 1 + prefix
;
2151 p
= frag_more (1 + prefix
);
2153 *p
++ = DATA_PREFIX_OPCODE
;
2154 *p
= i
.tm
.base_opcode
;
2155 frag_var (rs_machine_dependent
,
2156 prefix
+ 2 + size
, /* 2 opcode/prefix + displacement */
2158 ((unsigned char) *p
== JUMP_PC_RELATIVE
2159 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
) | code16
2160 : ENCODE_RELAX_STATE (COND_JUMP
, SMALL
) | code16
),
2161 i
.disps
[0]->X_add_symbol
,
2165 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
2167 int size
= (i
.tm
.opcode_modifier
& JumpByte
) ? 1 : 4;
2168 long n
= (long) i
.disps
[0]->X_add_number
;
2170 if (size
== 1) /* then this is a loop or jecxz type instruction */
2172 if (i
.prefix
[ADDR_PREFIX
])
2175 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
2183 if (i
.prefix
[DATA_PREFIX
])
2186 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
2190 if (flag_16bit_code
)
2197 if (!intel_syntax
&& (i
.prefixes
!= 0))
2198 as_warn (_("skipping prefixes on this instruction"));
2200 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2202 insn_size
+= 1 + size
;
2203 p
= frag_more (1 + size
);
2207 insn_size
+= 2 + size
; /* opcode can be at most two bytes */
2208 p
= frag_more (2 + size
);
2209 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2211 *p
++ = i
.tm
.base_opcode
& 0xff;
2213 if (i
.disps
[0]->X_op
== O_constant
)
2215 if (size
== 1 && !fits_in_signed_byte (n
))
2217 as_bad (_("`%s' only takes byte displacement; %ld shortened to %d"),
2220 else if (size
== 2 && !fits_in_signed_word (n
))
2222 as_bad (_("16-bit jump out of range"));
2225 md_number_to_chars (p
, (valueT
) n
, size
);
2229 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2230 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
2234 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
2238 int prefix
= i
.prefix
[DATA_PREFIX
] != 0;
2246 if (flag_16bit_code
)
2250 reloc_type
= BFD_RELOC_32
;
2254 reloc_type
= BFD_RELOC_16
;
2257 if (!intel_syntax
&& (i
.prefixes
!= 0))
2258 as_warn (_("skipping prefixes on this instruction"));
2260 insn_size
+= prefix
+ 1 + 2 + size
; /* 1 opcode; 2 segment; offset */
2261 p
= frag_more (prefix
+ 1 + 2 + size
);
2263 *p
++ = DATA_PREFIX_OPCODE
;
2264 *p
++ = i
.tm
.base_opcode
;
2265 if (i
.imms
[1]->X_op
== O_constant
)
2267 long n
= (long) i
.imms
[1]->X_add_number
;
2269 if (size
== 2 && !fits_in_unsigned_word (n
))
2271 as_bad (_("16-bit jump out of range"));
2274 md_number_to_chars (p
, (valueT
) n
, size
);
2277 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2278 i
.imms
[1], 0, reloc_type
);
2279 if (i
.imms
[0]->X_op
!= O_constant
)
2280 as_bad (_("can't handle non absolute segment in `%s'"),
2282 md_number_to_chars (p
+ size
, (valueT
) i
.imms
[0]->X_add_number
, 2);
2286 /* Output normal instructions here. */
2289 /* The prefix bytes. */
2291 q
< i
.prefix
+ sizeof (i
.prefix
) / sizeof (i
.prefix
[0]);
2298 md_number_to_chars (p
, (valueT
) *q
, 1);
2302 /* Now the opcode; be careful about word order here! */
2303 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2306 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
2308 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
2312 /* put out high byte first: can't use md_number_to_chars! */
2313 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2314 *p
= i
.tm
.base_opcode
& 0xff;
2317 { /* opcode is either 3 or 4 bytes */
2318 if (i
.tm
.base_opcode
& 0xff000000)
2322 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
2329 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
2330 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2331 *p
= (i
.tm
.base_opcode
) & 0xff;
2334 /* Now the modrm byte and sib byte (if present). */
2335 if (i
.tm
.opcode_modifier
& Modrm
)
2339 md_number_to_chars (p
,
2340 (valueT
) (i
.rm
.regmem
<< 0
2344 /* If i.rm.regmem == ESP (4)
2345 && i.rm.mode != (Register mode)
2347 ==> need second modrm byte. */
2348 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
2350 && !(i
.base_reg
&& (i
.base_reg
->reg_type
& Reg16
) != 0))
2354 md_number_to_chars (p
,
2355 (valueT
) (i
.sib
.base
<< 0
2357 | i
.sib
.scale
<< 6),
2362 if (i
.disp_operands
)
2364 register unsigned int n
;
2366 for (n
= 0; n
< i
.operands
; n
++)
2370 if (i
.disps
[n
]->X_op
== O_constant
)
2373 long val
= (long) i
.disps
[n
]->X_add_number
;
2375 if (i
.types
[n
] & (Disp8
| Disp16
))
2380 mask
= ~ (long) 0xffff;
2381 if (i
.types
[n
] & Disp8
)
2384 mask
= ~ (long) 0xff;
2387 if ((val
& mask
) != 0 && (val
& mask
) != mask
)
2388 as_warn (_("%ld shortened to %ld"),
2392 p
= frag_more (size
);
2393 md_number_to_chars (p
, (valueT
) val
, size
);
2395 else if (i
.types
[n
] & Disp32
)
2399 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
2401 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_32
));
2404 { /* must be Disp16 */
2407 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 2,
2409 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_16
));
2413 } /* end displacement output */
2415 /* output immediate */
2418 register unsigned int n
;
2420 for (n
= 0; n
< i
.operands
; n
++)
2424 if (i
.imms
[n
]->X_op
== O_constant
)
2427 long val
= (long) i
.imms
[n
]->X_add_number
;
2429 if (i
.types
[n
] & (Imm8
| Imm8S
| Imm16
))
2434 mask
= ~ (long) 0xffff;
2435 if (i
.types
[n
] & (Imm8
| Imm8S
))
2438 mask
= ~ (long) 0xff;
2440 if ((val
& mask
) != 0 && (val
& mask
) != mask
)
2441 as_warn (_("%ld shortened to %ld"),
2445 p
= frag_more (size
);
2446 md_number_to_chars (p
, (valueT
) val
, size
);
2449 { /* not absolute_section */
2450 /* Need a 32-bit fixup (don't support 8bit
2451 non-absolute ims). Try to support other
2457 if (i
.types
[n
] & (Imm8
| Imm8S
))
2459 else if (i
.types
[n
] & Imm16
)
2464 p
= frag_more (size
);
2465 r_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2466 #ifdef BFD_ASSEMBLER
2467 if (r_type
== BFD_RELOC_32
2469 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
2470 && (i
.imms
[n
]->X_op
== O_symbol
2471 || (i
.imms
[n
]->X_op
== O_add
2472 && ((symbol_get_value_expression
2473 (i
.imms
[n
]->X_op_symbol
)->X_op
)
2476 r_type
= BFD_RELOC_386_GOTPC
;
2477 i
.imms
[n
]->X_add_number
+= 3;
2480 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2481 i
.imms
[n
], pcrel
, r_type
);
2485 } /* end immediate output */
2493 #endif /* DEBUG386 */
2497 static int i386_is_reg
PARAMS ((char *));
2500 i386_is_reg (reg_string
)
2503 register char *s
= reg_string
;
2505 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
2507 if (is_space_char (*s
))
2511 while ((*p
++ = register_chars
[(unsigned char) *s
++]) != '\0')
2512 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
2515 if (!hash_find (reg_hash
, reg_name_given
))
2521 static int i386_immediate
PARAMS ((char *));
2524 i386_immediate (imm_start
)
2527 char *save_input_line_pointer
;
2531 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2533 as_bad (_("Only 1 or 2 immediate operands are allowed"));
2537 exp
= &im_expressions
[i
.imm_operands
++];
2538 i
.imms
[this_operand
] = exp
;
2540 if (is_space_char (*imm_start
))
2543 save_input_line_pointer
= input_line_pointer
;
2544 input_line_pointer
= imm_start
;
2549 * We can have operands of the form
2550 * <symbol>@GOTOFF+<nnn>
2551 * Take the easy way out here and copy everything
2552 * into a temporary buffer...
2556 cp
= strchr (input_line_pointer
, '@');
2563 /* GOT relocations are not supported in 16 bit mode */
2564 if (flag_16bit_code
)
2565 as_bad (_("GOT relocations not supported in 16 bit mode"));
2567 if (GOT_symbol
== NULL
)
2568 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2570 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2572 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2575 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2577 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2580 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2582 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2586 as_bad (_("Bad reloc specifier in expression"));
2588 /* Replace the relocation token with ' ', so that errors like
2589 foo@GOTOFF1 will be detected. */
2590 first
= cp
- input_line_pointer
;
2591 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2592 memcpy (tmpbuf
, input_line_pointer
, first
);
2593 tmpbuf
[first
] = ' ';
2594 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2595 input_line_pointer
= tmpbuf
;
2600 exp_seg
= expression (exp
);
2603 if (*input_line_pointer
)
2604 as_bad (_("Ignoring junk `%s' after expression"), input_line_pointer
);
2606 input_line_pointer
= save_input_line_pointer
;
2608 if (exp
->X_op
== O_absent
)
2610 /* missing or bad expr becomes absolute 0 */
2611 as_bad (_("Missing or invalid immediate expression `%s' taken as 0"),
2613 exp
->X_op
= O_constant
;
2614 exp
->X_add_number
= 0;
2615 exp
->X_add_symbol
= (symbolS
*) 0;
2616 exp
->X_op_symbol
= (symbolS
*) 0;
2617 i
.types
[this_operand
] |= Imm
;
2619 else if (exp
->X_op
== O_constant
)
2622 if (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0))
2625 i
.types
[this_operand
] |=
2626 (bigimm
| smallest_imm_type ((long) exp
->X_add_number
));
2628 /* If a suffix is given, this operand may be shortended. */
2631 case WORD_MNEM_SUFFIX
:
2632 i
.types
[this_operand
] |= Imm16
;
2634 case BYTE_MNEM_SUFFIX
:
2635 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2640 else if (exp_seg
!= text_section
2641 && exp_seg
!= data_section
2642 && exp_seg
!= bss_section
2643 && exp_seg
!= undefined_section
2644 #ifdef BFD_ASSEMBLER
2645 && !bfd_is_com_section (exp_seg
)
2649 as_bad (_("Unimplemented segment type %d in operand"), exp_seg
);
2655 /* This is an address. The size of the address will be
2656 determined later, depending on destination register,
2657 suffix, or the default for the section. We exclude
2658 Imm8S here so that `push $foo' and other instructions
2659 with an Imm8S form will use Imm16 or Imm32. */
2660 i
.types
[this_operand
] |= (Imm8
| Imm16
| Imm32
);
2666 static int i386_scale
PARAMS ((char *));
2672 if (!isdigit (*scale
))
2679 i
.log2_scale_factor
= 0;
2682 i
.log2_scale_factor
= 1;
2685 i
.log2_scale_factor
= 2;
2688 i
.log2_scale_factor
= 3;
2692 as_bad (_("expecting scale factor of 1, 2, 4, or 8: got `%s'"),
2696 if (i
.log2_scale_factor
!= 0 && ! i
.index_reg
)
2698 as_warn (_("scale factor of %d without an index register"),
2699 1 << i
.log2_scale_factor
);
2700 #if SCALE1_WHEN_NO_INDEX
2701 i
.log2_scale_factor
= 0;
2707 static int i386_displacement
PARAMS ((char *, char *));
2710 i386_displacement (disp_start
, disp_end
)
2714 register expressionS
*exp
;
2716 char *save_input_line_pointer
;
2717 int bigdisp
= Disp32
;
2719 /* All of the pieces of the displacement expression are handled together. */
2720 if (intel_syntax
&& i
.disp_operands
!= 0)
2723 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2725 i
.types
[this_operand
] |= bigdisp
;
2727 exp
= &disp_expressions
[i
.disp_operands
];
2728 i
.disps
[this_operand
] = exp
;
2729 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2731 save_input_line_pointer
= input_line_pointer
;
2732 input_line_pointer
= disp_start
;
2733 END_STRING_AND_SAVE (disp_end
);
2735 #ifndef GCC_ASM_O_HACK
2736 #define GCC_ASM_O_HACK 0
2739 END_STRING_AND_SAVE (disp_end
+ 1);
2740 if ((i
.types
[this_operand
] & BaseIndex
) != 0
2741 && displacement_string_end
[-1] == '+')
2743 /* This hack is to avoid a warning when using the "o"
2744 constraint within gcc asm statements.
2747 #define _set_tssldt_desc(n,addr,limit,type) \
2748 __asm__ __volatile__ ( \
2750 "movw %w1,2+%0\n\t" \
2752 "movb %b1,4+%0\n\t" \
2753 "movb %4,5+%0\n\t" \
2754 "movb $0,6+%0\n\t" \
2755 "movb %h1,7+%0\n\t" \
2757 : "=o"(*(n)) : "q" (addr), "ri"(limit), "i"(type))
2759 This works great except that the output assembler ends
2760 up looking a bit weird if it turns out that there is
2761 no offset. You end up producing code that looks like:
2774 So here we provide the missing zero.
2777 *displacement_string_end
= '0';
2783 * We can have operands of the form
2784 * <symbol>@GOTOFF+<nnn>
2785 * Take the easy way out here and copy everything
2786 * into a temporary buffer...
2790 cp
= strchr (input_line_pointer
, '@');
2797 /* GOT relocations are not supported in 16 bit mode */
2798 if (flag_16bit_code
)
2799 as_bad (_("GOT relocations not supported in 16 bit mode"));
2801 if (GOT_symbol
== NULL
)
2802 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2804 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2806 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2809 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2811 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2814 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2816 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2820 as_bad (_("Bad reloc specifier in expression"));
2822 /* Replace the relocation token with ' ', so that errors like
2823 foo@GOTOFF1 will be detected. */
2824 first
= cp
- input_line_pointer
;
2825 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2826 memcpy (tmpbuf
, input_line_pointer
, first
);
2827 tmpbuf
[first
] = ' ';
2828 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2829 input_line_pointer
= tmpbuf
;
2834 exp_seg
= expression (exp
);
2836 #ifdef BFD_ASSEMBLER
2837 /* We do this to make sure that the section symbol is in
2838 the symbol table. We will ultimately change the relocation
2839 to be relative to the beginning of the section */
2840 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2842 if (S_IS_LOCAL(exp
->X_add_symbol
)
2843 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2844 section_symbol (S_GET_SEGMENT (exp
->X_add_symbol
));
2845 assert (exp
->X_op
== O_symbol
);
2846 exp
->X_op
= O_subtract
;
2847 exp
->X_op_symbol
= GOT_symbol
;
2848 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2853 if (*input_line_pointer
)
2854 as_bad (_("Ignoring junk `%s' after expression"),
2855 input_line_pointer
);
2857 RESTORE_END_STRING (disp_end
+ 1);
2859 RESTORE_END_STRING (disp_end
);
2860 input_line_pointer
= save_input_line_pointer
;
2862 if (exp
->X_op
== O_constant
)
2864 if (fits_in_signed_byte (exp
->X_add_number
))
2865 i
.types
[this_operand
] |= Disp8
;
2868 else if (exp_seg
!= text_section
2869 && exp_seg
!= data_section
2870 && exp_seg
!= bss_section
2871 && exp_seg
!= undefined_section
)
2873 as_bad (_ ("Unimplemented segment type %d in operand"), exp_seg
);
2880 static int i386_operand_modifier
PARAMS ((char **, int));
2883 i386_operand_modifier (op_string
, got_a_float
)
2887 if (!strncasecmp (*op_string
, "BYTE PTR", 8))
2889 i
.suffix
= BYTE_MNEM_SUFFIX
;
2894 else if (!strncasecmp (*op_string
, "WORD PTR", 8))
2896 i
.suffix
= WORD_MNEM_SUFFIX
;
2901 else if (!strncasecmp (*op_string
, "DWORD PTR", 9))
2904 i
.suffix
= SHORT_MNEM_SUFFIX
;
2906 i
.suffix
= DWORD_MNEM_SUFFIX
;
2911 else if (!strncasecmp (*op_string
, "QWORD PTR", 9))
2913 i
.suffix
= INTEL_DWORD_MNEM_SUFFIX
;
2918 else if (!strncasecmp (*op_string
, "XWORD PTR", 9))
2920 i
.suffix
= LONG_DOUBLE_MNEM_SUFFIX
;
2925 else if (!strncasecmp (*op_string
, "SHORT", 5))
2931 else if (!strncasecmp (*op_string
, "OFFSET FLAT:", 12))
2937 else if (!strncasecmp (*op_string
, "FLAT", 4))
2943 else return NONE_FOUND
;
2946 static char * build_displacement_string
PARAMS ((int, char *));
2949 build_displacement_string (initial_disp
, op_string
)
2953 char *temp_string
= (char *) malloc (strlen (op_string
) + 1);
2954 char *end_of_operand_string
;
2958 temp_string
[0] = '\0';
2959 tc
= end_of_operand_string
= strchr (op_string
, '[');
2960 if ( initial_disp
&& !end_of_operand_string
)
2962 strcpy (temp_string
, op_string
);
2963 return (temp_string
);
2966 /* Build the whole displacement string */
2969 strncpy (temp_string
, op_string
, end_of_operand_string
- op_string
);
2970 temp_string
[end_of_operand_string
- op_string
] = '\0';
2974 temp_disp
= op_string
;
2976 while (*temp_disp
!= '\0')
2978 int add_minus
= (*temp_disp
== '-');
2980 if (*temp_disp
== '+' || *temp_disp
== '-' || *temp_disp
== '[')
2983 if (is_space_char (*temp_disp
))
2986 /* Don't consider registers */
2987 if (*temp_disp
!= REGISTER_PREFIX
2988 && !(allow_naked_reg
&& i386_is_reg (temp_disp
)))
2990 char *string_start
= temp_disp
;
2992 while (*temp_disp
!= ']'
2993 && *temp_disp
!= '+'
2994 && *temp_disp
!= '-'
2995 && *temp_disp
!= '*')
2999 strcat (temp_string
, "-");
3001 strcat (temp_string
, "+");
3003 strncat (temp_string
, string_start
, temp_disp
- string_start
);
3004 if (*temp_disp
== '+' || *temp_disp
== '-')
3008 while (*temp_disp
!= '\0'
3009 && *temp_disp
!= '+'
3010 && *temp_disp
!= '-')
3017 static int i386_parse_seg
PARAMS ((char *));
3020 i386_parse_seg (op_string
)
3023 if (is_space_char (*op_string
))
3026 /* Should be one of es, cs, ss, ds fs or gs */
3027 switch (*op_string
++)
3030 i
.seg
[i
.mem_operands
] = &es
;
3033 i
.seg
[i
.mem_operands
] = &cs
;
3036 i
.seg
[i
.mem_operands
] = &ss
;
3039 i
.seg
[i
.mem_operands
] = &ds
;
3042 i
.seg
[i
.mem_operands
] = &fs
;
3045 i
.seg
[i
.mem_operands
] = &gs
;
3048 as_bad (_("bad segment name `%s'"), op_string
);
3052 if (*op_string
++ != 's')
3054 as_bad (_("bad segment name `%s'"), op_string
);
3058 if (is_space_char (*op_string
))
3061 if (*op_string
!= ':')
3063 as_bad (_("bad segment name `%s'"), op_string
);
3071 static int i386_intel_memory_operand
PARAMS ((char *));
3074 i386_intel_memory_operand (op_string
)
3078 char *end_of_operand_string
;
3080 if (is_digit_char (*op_string
)
3081 && strchr (op_string
, '[') == 0)
3083 if (!i386_immediate (op_string
))
3089 /* Look for displacement preceding open bracket */
3090 if (*op_string
!= '[')
3095 end_seg
= strchr (op_string
, ':');
3098 if (!i386_parse_seg (op_string
))
3100 op_string
= end_seg
+ 1;
3103 temp_string
= build_displacement_string (true, op_string
);
3104 if (!i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3107 end_of_operand_string
= strchr (op_string
, '[');
3108 if (!end_of_operand_string
)
3109 end_of_operand_string
= op_string
+ strlen (op_string
);
3111 if (is_space_char (*end_of_operand_string
))
3112 --end_of_operand_string
;
3114 op_string
= end_of_operand_string
;
3117 if (*op_string
== '[')
3121 /* Pick off each component and figure out where it belongs */
3123 end_of_operand_string
= op_string
;
3125 while (*op_string
!= ']')
3128 while (*end_of_operand_string
!= '+'
3129 && *end_of_operand_string
!= '-'
3130 && *end_of_operand_string
!= '*'
3131 && *end_of_operand_string
!= ']')
3132 end_of_operand_string
++;
3134 if (*op_string
== '+')
3136 char *temp_string
= op_string
+ 1;
3137 if (is_space_char (*temp_string
))
3139 if (*temp_string
== REGISTER_PREFIX
3140 || (allow_naked_reg
&& i386_is_reg (temp_string
)))
3144 if (*op_string
== REGISTER_PREFIX
3145 || (allow_naked_reg
&& i386_is_reg (op_string
)))
3147 const reg_entry
*temp_reg
;
3150 END_STRING_AND_SAVE (end_of_operand_string
);
3151 temp_reg
= parse_register (op_string
, &end_op
);
3152 RESTORE_END_STRING (end_of_operand_string
);
3154 if (temp_reg
== NULL
)
3157 if (i
.base_reg
== NULL
)
3158 i
.base_reg
= temp_reg
;
3160 i
.index_reg
= temp_reg
;
3162 i
.types
[this_operand
] |= BaseIndex
;
3165 else if (is_digit_char (*op_string
) || *op_string
== '+' || *op_string
== '-')
3168 char *temp_string
= build_displacement_string (false, op_string
);
3170 if (*temp_string
== '+')
3173 if (!i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3177 end_of_operand_string
= op_string
;
3178 while (*end_of_operand_string
!= ']'
3179 && *end_of_operand_string
!= '+'
3180 && *end_of_operand_string
!= '-'
3181 && *end_of_operand_string
!= '*')
3182 ++end_of_operand_string
;
3184 else if (*op_string
== '*')
3188 if (i
.base_reg
&& !i
.index_reg
)
3190 i
.index_reg
= i
.base_reg
;
3194 if (!i386_scale (op_string
))
3197 op_string
= end_of_operand_string
;
3198 ++end_of_operand_string
;
3205 static int i386_intel_operand
PARAMS ((char *, int));
3208 i386_intel_operand (operand_string
, got_a_float
)
3209 char *operand_string
;
3212 char *op_string
= operand_string
;
3214 int operand_modifier
= i386_operand_modifier (&op_string
, got_a_float
);
3215 if (is_space_char (*op_string
))
3218 switch (operand_modifier
)
3225 if ((i
.mem_operands
== 1
3226 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3227 || i
.mem_operands
== 2)
3229 as_bad (_("too many memory references for `%s'"),
3230 current_templates
->start
->name
);
3234 if (!i386_intel_memory_operand (op_string
))
3243 if (!i386_immediate (op_string
))
3250 /* Should be register or immediate */
3251 if (is_digit_char (*op_string
)
3252 && strchr (op_string
, '[') == 0)
3254 if (!i386_immediate (op_string
))
3257 else if (*op_string
== REGISTER_PREFIX
3259 && i386_is_reg (op_string
)))
3262 register const reg_entry
* r
;
3265 r
= parse_register (op_string
, &end_op
);
3269 /* Check for a segment override by searching for ':' after a
3270 segment register. */
3272 if (is_space_char (*op_string
))
3274 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3279 i
.seg
[i
.mem_operands
] = &es
;
3282 i
.seg
[i
.mem_operands
] = &cs
;
3285 i
.seg
[i
.mem_operands
] = &ss
;
3288 i
.seg
[i
.mem_operands
] = &ds
;
3291 i
.seg
[i
.mem_operands
] = &fs
;
3294 i
.seg
[i
.mem_operands
] = &gs
;
3299 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3300 i
.regs
[this_operand
] = r
;
3307 if (!i386_intel_memory_operand (op_string
))
3315 /* Special case for (%dx) while doing input/output op. */
3317 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
3319 && i
.log2_scale_factor
== 0
3320 && i
.seg
[i
.mem_operands
] == 0
3321 && (i
.types
[this_operand
] & Disp
) == 0)
3323 i
.types
[this_operand
] = InOutPortReg
;
3326 /* Make sure the memory operand we've been dealt is valid. */
3327 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
3330 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
3331 != (Reg16
|BaseIndex
)))
3333 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
3334 != (Reg16
|BaseIndex
))
3336 && i
.base_reg
->reg_num
< 6
3337 && i
.index_reg
->reg_num
>= 6
3338 && i
.log2_scale_factor
== 0))))
3340 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3341 operand_string
, "16");
3348 && (i
.base_reg
->reg_type
& Reg32
) == 0)
3350 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
3351 != (Reg32
|BaseIndex
))))
3353 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3354 operand_string
, "32");
3361 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
3364 static int i386_operand
PARAMS ((char *));
3367 i386_operand (operand_string
)
3368 char *operand_string
;
3370 char *op_string
= operand_string
;
3372 if (is_space_char (*op_string
))
3375 /* We check for an absolute prefix (differentiating,
3376 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
3377 if (*op_string
== ABSOLUTE_PREFIX
)
3380 if (is_space_char (*op_string
))
3382 i
.types
[this_operand
] |= JumpAbsolute
;
3385 /* Check if operand is a register. */
3386 if (*op_string
== REGISTER_PREFIX
3387 || (allow_naked_reg
&& i386_is_reg (op_string
)))
3389 register const reg_entry
*r
;
3392 r
= parse_register (op_string
, &end_op
);
3396 /* Check for a segment override by searching for ':' after a
3397 segment register. */
3399 if (is_space_char (*op_string
))
3401 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3406 i
.seg
[i
.mem_operands
] = &es
;
3409 i
.seg
[i
.mem_operands
] = &cs
;
3412 i
.seg
[i
.mem_operands
] = &ss
;
3415 i
.seg
[i
.mem_operands
] = &ds
;
3418 i
.seg
[i
.mem_operands
] = &fs
;
3421 i
.seg
[i
.mem_operands
] = &gs
;
3425 /* Skip the ':' and whitespace. */
3427 if (is_space_char (*op_string
))
3430 /* Pretend given string starts here. */
3431 operand_string
= op_string
;
3432 if (!is_digit_char (*op_string
)
3433 && !is_identifier_char (*op_string
)
3434 && *op_string
!= '('
3435 && *op_string
!= ABSOLUTE_PREFIX
)
3437 as_bad (_("bad memory operand `%s'"), op_string
);
3440 /* Handle case of %es:*foo. */
3441 if (*op_string
== ABSOLUTE_PREFIX
)
3444 if (is_space_char (*op_string
))
3446 i
.types
[this_operand
] |= JumpAbsolute
;
3448 goto do_memory_reference
;
3452 as_bad (_("Junk `%s' after register"), op_string
);
3455 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3456 i
.regs
[this_operand
] = r
;
3459 else if (*op_string
== IMMEDIATE_PREFIX
)
3460 { /* ... or an immediate */
3462 if (i
.types
[this_operand
] & JumpAbsolute
)
3464 as_bad (_("Immediate operand illegal with absolute jump"));
3467 if (!i386_immediate (op_string
))
3470 else if (is_digit_char (*op_string
)
3471 || is_identifier_char (*op_string
)
3472 || *op_string
== '(' )
3474 /* This is a memory reference of some sort. */
3475 char *end_of_operand_string
;
3476 register char *base_string
;
3477 int found_base_index_form
;
3479 /* Start and end of displacement string expression (if found). */
3480 char *displacement_string_start
= NULL
;
3481 char *displacement_string_end
= NULL
;
3483 do_memory_reference
:
3485 if ((i
.mem_operands
== 1
3486 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3487 || i
.mem_operands
== 2)
3489 as_bad (_("too many memory references for `%s'"),
3490 current_templates
->start
->name
);
3494 /* Check for base index form. We detect the base index form by
3495 looking for an ')' at the end of the operand, searching
3496 for the '(' matching it, and finding a REGISTER_PREFIX or ','
3498 found_base_index_form
= 0;
3499 end_of_operand_string
= op_string
+ strlen (op_string
);
3501 --end_of_operand_string
;
3502 if (is_space_char (*end_of_operand_string
))
3503 --end_of_operand_string
;
3505 base_string
= end_of_operand_string
;
3507 if (*base_string
== ')')
3509 unsigned int parens_balanced
= 1;
3510 /* We've already checked that the number of left & right ()'s are
3511 equal, so this loop will not be infinite. */
3515 if (*base_string
== ')')
3517 if (*base_string
== '(')
3520 while (parens_balanced
);
3522 /* If there is a displacement set-up for it to be parsed later. */
3523 displacement_string_start
= op_string
;
3524 displacement_string_end
= base_string
;
3526 /* Skip past '(' and whitespace. */
3528 if (is_space_char (*base_string
))
3531 if (*base_string
== REGISTER_PREFIX
3532 || (allow_naked_reg
&& i386_is_reg (base_string
))
3533 || *base_string
== ',')
3534 found_base_index_form
= 1;
3537 /* If we can't parse a base index register expression, we've found
3538 a pure displacement expression. We set up displacement_string_start
3539 and displacement_string_end for the code below. */
3540 if (!found_base_index_form
)
3542 displacement_string_start
= op_string
;
3543 displacement_string_end
= end_of_operand_string
+ 1;
3547 i
.types
[this_operand
] |= BaseIndex
;
3549 /* Find base register (if any). */
3550 if (*base_string
!= ',')
3554 /* Trim off the closing ')' so that parse_register won't
3556 END_STRING_AND_SAVE (end_of_operand_string
);
3557 i
.base_reg
= parse_register (base_string
, &end_op
);
3558 RESTORE_END_STRING (end_of_operand_string
);
3560 if (i
.base_reg
== NULL
)
3563 base_string
= end_op
;
3564 if (is_space_char (*base_string
))
3568 /* There may be an index reg or scale factor here. */
3569 if (*base_string
== ',')
3572 if (is_space_char (*base_string
))
3575 if (*base_string
== REGISTER_PREFIX
3576 || (allow_naked_reg
&& i386_is_reg (base_string
)))
3580 END_STRING_AND_SAVE (end_of_operand_string
);
3581 i
.index_reg
= parse_register (base_string
, &end_op
);
3582 RESTORE_END_STRING (end_of_operand_string
);
3584 if (i
.index_reg
== NULL
)
3587 base_string
= end_op
;
3588 if (is_space_char (*base_string
))
3590 if (*base_string
== ',')
3593 if (is_space_char (*base_string
))
3596 else if (*base_string
!= ')' )
3598 as_bad (_("expecting `,' or `)' after index register in `%s'"),
3604 /* Check for scale factor. */
3605 if (isdigit ((unsigned char) *base_string
))
3607 if (!i386_scale (base_string
))
3611 if (is_space_char (*base_string
))
3613 if (*base_string
!= ')')
3615 as_bad (_("expecting `)' after scale factor in `%s'"),
3620 else if (!i
.index_reg
)
3622 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
3627 else if (*base_string
!= ')')
3629 as_bad (_("expecting `,' or `)' after base register in `%s'"),
3635 /* If there's an expression beginning the operand, parse it,
3636 assuming displacement_string_start and
3637 displacement_string_end are meaningful. */
3638 if (displacement_string_start
!= displacement_string_end
)
3640 if (!i386_displacement (displacement_string_start
,
3641 displacement_string_end
))
3645 /* Special case for (%dx) while doing input/output op. */
3647 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
3649 && i
.log2_scale_factor
== 0
3650 && i
.seg
[i
.mem_operands
] == 0
3651 && (i
.types
[this_operand
] & Disp
) == 0)
3653 i
.types
[this_operand
] = InOutPortReg
;
3656 /* Make sure the memory operand we've been dealt is valid. */
3657 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
3659 #if INFER_ADDR_PREFIX
3663 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
3664 != (Reg16
|BaseIndex
)))
3666 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
3667 != (Reg16
|BaseIndex
))
3669 && i
.base_reg
->reg_num
< 6
3670 && i
.index_reg
->reg_num
>= 6
3671 && i
.log2_scale_factor
== 0))))
3673 #if INFER_ADDR_PREFIX
3674 if (i
.prefix
[ADDR_PREFIX
] == 0)
3676 i
.prefix
[ADDR_PREFIX
] = ADDR_PREFIX_OPCODE
;
3682 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3683 operand_string
, "16");
3690 #if INFER_ADDR_PREFIX
3694 && (i
.base_reg
->reg_type
& Reg32
) == 0)
3696 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
3697 != (Reg32
|BaseIndex
))))
3699 #if INFER_ADDR_PREFIX
3700 if (i
.prefix
[ADDR_PREFIX
] == 0)
3702 i
.prefix
[ADDR_PREFIX
] = ADDR_PREFIX_OPCODE
;
3708 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3709 operand_string
, "32");
3717 { /* it's not a memory operand; argh! */
3718 as_bad (_("invalid char %s beginning operand %d `%s'"),
3719 output_invalid (*op_string
),
3724 return 1; /* normal return */
3728 * md_estimate_size_before_relax()
3730 * Called just before relax().
3731 * Any symbol that is now undefined will not become defined.
3732 * Return the correct fr_subtype in the frag.
3733 * Return the initial "guess for fr_var" to caller.
3734 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
3735 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
3736 * Although it may not be explicit in the frag, pretend fr_var starts with a
3740 md_estimate_size_before_relax (fragP
, segment
)
3741 register fragS
*fragP
;
3742 register segT segment
;
3744 register unsigned char *opcode
;
3745 register int old_fr_fix
;
3747 old_fr_fix
= fragP
->fr_fix
;
3748 opcode
= (unsigned char *) fragP
->fr_opcode
;
3749 /* We've already got fragP->fr_subtype right; all we have to do is
3750 check for un-relaxable symbols. */
3751 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
3753 /* symbol is undefined in this segment */
3754 int code16
= fragP
->fr_subtype
& CODE16
;
3755 int size
= code16
? 2 : 4;
3756 int pcrel_reloc
= code16
? BFD_RELOC_16_PCREL
: BFD_RELOC_32_PCREL
;
3760 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
3761 opcode
[0] = 0xe9; /* dword disp jmp */
3762 fragP
->fr_fix
+= size
;
3763 fix_new (fragP
, old_fr_fix
, size
,
3765 fragP
->fr_offset
, 1,
3766 (GOT_symbol
&& /* Not quite right - we should switch on
3767 presence of @PLT, but I cannot see how
3768 to get to that from here. We should have
3769 done this in md_assemble to really
3770 get it right all of the time, but I
3771 think it does not matter that much, as
3772 this will be right most of the time. ERY*/
3773 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3774 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
3778 /* This changes the byte-displacement jump 0x7N -->
3779 the dword-displacement jump 0x0f8N */
3780 opcode
[1] = opcode
[0] + 0x10;
3781 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
3782 fragP
->fr_fix
+= 1 + size
; /* we've added an opcode byte */
3783 fix_new (fragP
, old_fr_fix
+ 1, size
,
3785 fragP
->fr_offset
, 1,
3786 (GOT_symbol
&& /* Not quite right - we should switch on
3787 presence of @PLT, but I cannot see how
3788 to get to that from here. ERY */
3789 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3790 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
3795 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
3796 } /* md_estimate_size_before_relax() */
3799 * md_convert_frag();
3801 * Called after relax() is finished.
3802 * In: Address of frag.
3803 * fr_type == rs_machine_dependent.
3804 * fr_subtype is what the address relaxed to.
3806 * Out: Any fixSs and constants are set up.
3807 * Caller will turn frag into a ".space 0".
3809 #ifndef BFD_ASSEMBLER
3811 md_convert_frag (headers
, sec
, fragP
)
3812 object_headers
*headers
;
3814 register fragS
*fragP
;
3817 md_convert_frag (abfd
, sec
, fragP
)
3818 bfd
*abfd ATTRIBUTE_UNUSED
;
3819 segT sec ATTRIBUTE_UNUSED
;
3820 register fragS
*fragP
;
3823 register unsigned char *opcode
;
3824 unsigned char *where_to_put_displacement
= NULL
;
3825 unsigned int target_address
;
3826 unsigned int opcode_address
;
3827 unsigned int extension
= 0;
3828 int displacement_from_opcode_start
;
3830 opcode
= (unsigned char *) fragP
->fr_opcode
;
3832 /* Address we want to reach in file space. */
3833 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
3834 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
3835 target_address
+= symbol_get_frag (fragP
->fr_symbol
)->fr_address
;
3838 /* Address opcode resides at in file space. */
3839 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
3841 /* Displacement from opcode start to fill into instruction. */
3842 displacement_from_opcode_start
= target_address
- opcode_address
;
3844 switch (fragP
->fr_subtype
)
3846 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL
):
3847 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL16
):
3848 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
):
3849 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL16
):
3850 /* don't have to change opcode */
3851 extension
= 1; /* 1 opcode + 1 displacement */
3852 where_to_put_displacement
= &opcode
[1];
3855 case ENCODE_RELAX_STATE (COND_JUMP
, BIG
):
3856 extension
= 5; /* 2 opcode + 4 displacement */
3857 opcode
[1] = opcode
[0] + 0x10;
3858 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3859 where_to_put_displacement
= &opcode
[2];
3862 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
):
3863 extension
= 4; /* 1 opcode + 4 displacement */
3865 where_to_put_displacement
= &opcode
[1];
3868 case ENCODE_RELAX_STATE (COND_JUMP
, BIG16
):
3869 extension
= 3; /* 2 opcode + 2 displacement */
3870 opcode
[1] = opcode
[0] + 0x10;
3871 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3872 where_to_put_displacement
= &opcode
[2];
3875 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
):
3876 extension
= 2; /* 1 opcode + 2 displacement */
3878 where_to_put_displacement
= &opcode
[1];
3882 BAD_CASE (fragP
->fr_subtype
);
3885 /* now put displacement after opcode */
3886 md_number_to_chars ((char *) where_to_put_displacement
,
3887 (valueT
) (displacement_from_opcode_start
- extension
),
3888 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
3889 fragP
->fr_fix
+= extension
;
3893 int md_short_jump_size
= 2; /* size of byte displacement jmp */
3894 int md_long_jump_size
= 5; /* size of dword displacement jmp */
3895 const int md_reloc_size
= 8; /* Size of relocation record */
3898 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3900 addressT from_addr
, to_addr
;
3901 fragS
*frag ATTRIBUTE_UNUSED
;
3902 symbolS
*to_symbol ATTRIBUTE_UNUSED
;
3906 offset
= to_addr
- (from_addr
+ 2);
3907 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
3908 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
3912 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3914 addressT from_addr
, to_addr
;
3920 if (flag_do_long_jump
)
3922 offset
= to_addr
- S_GET_VALUE (to_symbol
);
3923 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
3924 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3925 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
3926 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
3930 offset
= to_addr
- (from_addr
+ 5);
3931 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
3932 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3936 /* Apply a fixup (fixS) to segment data, once it has been determined
3937 by our caller that we have all the info we need to fix it up.
3939 On the 386, immediates, displacements, and data pointers are all in
3940 the same (little-endian) format, so we don't need to care about which
3944 md_apply_fix3 (fixP
, valp
, seg
)
3945 fixS
*fixP
; /* The fix we're to put in. */
3946 valueT
*valp
; /* Pointer to the value of the bits. */
3947 segT seg
; /* Segment fix is from. */
3949 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3950 valueT value
= *valp
;
3952 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
3955 switch (fixP
->fx_r_type
)
3961 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3964 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
3967 fixP
->fx_r_type
= BFD_RELOC_8_PCREL
;
3973 * This is a hack. There should be a better way to
3976 if ((fixP
->fx_r_type
== BFD_RELOC_32_PCREL
3977 || fixP
->fx_r_type
== BFD_RELOC_16_PCREL
3978 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
)
3982 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3984 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
3987 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3989 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3990 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3991 && (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
3992 || symbol_section_p (fixP
->fx_addsy
))
3993 && ! S_IS_EXTERNAL (fixP
->fx_addsy
)
3994 && ! S_IS_WEAK (fixP
->fx_addsy
)
3995 && S_IS_DEFINED (fixP
->fx_addsy
)
3996 && ! S_IS_COMMON (fixP
->fx_addsy
))
3998 /* Yes, we add the values in twice. This is because
3999 bfd_perform_relocation subtracts them out again. I think
4000 bfd_perform_relocation is broken, but I don't dare change
4002 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4005 #if defined (OBJ_COFF) && defined (TE_PE)
4006 /* For some reason, the PE format does not store a section
4007 address offset for a PC relative symbol. */
4008 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
4009 value
+= md_pcrel_from (fixP
);
4013 /* Fix a few things - the dynamic linker expects certain values here,
4014 and we must not dissappoint it. */
4015 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4016 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
4018 switch (fixP
->fx_r_type
) {
4019 case BFD_RELOC_386_PLT32
:
4020 /* Make the jump instruction point to the address of the operand. At
4021 runtime we merely add the offset to the actual PLT entry. */
4024 case BFD_RELOC_386_GOTPC
:
4026 * This is tough to explain. We end up with this one if we have
4027 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
4028 * here is to obtain the absolute address of the GOT, and it is strongly
4029 * preferable from a performance point of view to avoid using a runtime
4030 * relocation for this. The actual sequence of instructions often look
4036 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
4038 * The call and pop essentially return the absolute address of
4039 * the label .L66 and store it in %ebx. The linker itself will
4040 * ultimately change the first operand of the addl so that %ebx points to
4041 * the GOT, but to keep things simple, the .o file must have this operand
4042 * set so that it generates not the absolute address of .L66, but the
4043 * absolute address of itself. This allows the linker itself simply
4044 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
4045 * added in, and the addend of the relocation is stored in the operand
4046 * field for the instruction itself.
4048 * Our job here is to fix the operand so that it would add the correct
4049 * offset so that %ebx would point to itself. The thing that is tricky is
4050 * that .-.L66 will point to the beginning of the instruction, so we need
4051 * to further modify the operand so that it will point to itself.
4052 * There are other cases where you have something like:
4054 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
4056 * and here no correction would be required. Internally in the assembler
4057 * we treat operands of this form as not being pcrel since the '.' is
4058 * explicitly mentioned, and I wonder whether it would simplify matters
4059 * to do it this way. Who knows. In earlier versions of the PIC patches,
4060 * the pcrel_adjust field was used to store the correction, but since the
4061 * expression is not pcrel, I felt it would be confusing to do it this way.
4065 case BFD_RELOC_386_GOT32
:
4066 value
= 0; /* Fully resolved at runtime. No addend. */
4068 case BFD_RELOC_386_GOTOFF
:
4071 case BFD_RELOC_VTABLE_INHERIT
:
4072 case BFD_RELOC_VTABLE_ENTRY
:
4079 #endif /* defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) */
4081 #endif /* defined (BFD_ASSEMBLER) && !defined (TE_Mach) */
4082 md_number_to_chars (p
, value
, fixP
->fx_size
);
4088 /* This is never used. */
4089 long /* Knows about the byte order in a word. */
4090 md_chars_to_number (con
, nbytes
)
4091 unsigned char con
[]; /* Low order byte 1st. */
4092 int nbytes
; /* Number of bytes in the input. */
4095 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
4097 retval
<<= BITS_PER_CHAR
;
4105 #define MAX_LITTLENUMS 6
4107 /* Turn the string pointed to by litP into a floating point constant of type
4108 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
4109 is stored in *sizeP . An error message is returned, or NULL on OK. */
4111 md_atof (type
, litP
, sizeP
)
4117 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
4118 LITTLENUM_TYPE
*wordP
;
4140 return _("Bad call to md_atof ()");
4142 t
= atof_ieee (input_line_pointer
, type
, words
);
4144 input_line_pointer
= t
;
4146 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
4147 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
4148 the bigendian 386. */
4149 for (wordP
= words
+ prec
- 1; prec
--;)
4151 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
4152 litP
+= sizeof (LITTLENUM_TYPE
);
4157 char output_invalid_buf
[8];
4159 static char * output_invalid
PARAMS ((int));
4166 sprintf (output_invalid_buf
, "'%c'", c
);
4168 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
4169 return output_invalid_buf
;
4172 /* REG_STRING starts *before* REGISTER_PREFIX. */
4174 static const reg_entry
* parse_register
PARAMS ((char *, char **));
4176 static const reg_entry
*
4177 parse_register (reg_string
, end_op
)
4181 register char *s
= reg_string
;
4183 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
4186 /* Skip possible REGISTER_PREFIX and possible whitespace. */
4187 if (*s
== REGISTER_PREFIX
)
4190 if (is_space_char (*s
))
4194 while ((*p
++ = register_chars
[(unsigned char) *s
++]) != '\0')
4196 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
4198 if (!allow_naked_reg
)
4201 as_bad (_("bad register name `%s'"), reg_name_given
);
4203 return (const reg_entry
*) NULL
;
4209 r
= (const reg_entry
*) hash_find (reg_hash
, reg_name_given
);
4213 if (!allow_naked_reg
)
4214 as_bad (_("bad register name `%s'"), reg_name_given
);
4215 return (const reg_entry
*) NULL
;
4222 CONST
char *md_shortopts
= "kmVQ:";
4224 CONST
char *md_shortopts
= "m";
4226 struct option md_longopts
[] = {
4227 {NULL
, no_argument
, NULL
, 0}
4229 size_t md_longopts_size
= sizeof (md_longopts
);
4232 md_parse_option (c
, arg
)
4234 char *arg ATTRIBUTE_UNUSED
;
4239 flag_do_long_jump
= 1;
4242 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4243 /* -k: Ignore for FreeBSD compatibility. */
4247 /* -V: SVR4 argument to print version ID. */
4249 print_version_id ();
4252 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
4253 should be emitted or not. FIXME: Not implemented. */
4265 md_show_usage (stream
)
4268 fprintf (stream
, _("\
4269 -m do long jump\n"));
4272 #ifdef BFD_ASSEMBLER
4273 #ifdef OBJ_MAYBE_ELF
4274 #ifdef OBJ_MAYBE_COFF
4276 /* Pick the target format to use. */
4279 i386_target_format ()
4281 switch (OUTPUT_FLAVOR
)
4283 case bfd_target_coff_flavour
:
4285 case bfd_target_elf_flavour
:
4286 return "elf32-i386";
4293 #endif /* OBJ_MAYBE_COFF */
4294 #endif /* OBJ_MAYBE_ELF */
4295 #endif /* BFD_ASSEMBLER */
4299 md_undefined_symbol (name
)
4302 if (*name
== '_' && *(name
+1) == 'G'
4303 && strcmp(name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4307 if (symbol_find (name
))
4308 as_bad (_("GOT already in symbol table"));
4309 GOT_symbol
= symbol_new (name
, undefined_section
,
4310 (valueT
) 0, &zero_address_frag
);
4317 /* Round up a section size to the appropriate boundary. */
4319 md_section_align (segment
, size
)
4320 segT segment ATTRIBUTE_UNUSED
;
4324 #ifdef BFD_ASSEMBLER
4325 /* For a.out, force the section size to be aligned. If we don't do
4326 this, BFD will align it for us, but it will not write out the
4327 final bytes of the section. This may be a bug in BFD, but it is
4328 easier to fix it here since that is how the other a.out targets
4332 align
= bfd_get_section_alignment (stdoutput
, segment
);
4333 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
4340 /* On the i386, PC-relative offsets are relative to the start of the
4341 next instruction. That is, the address of the offset, plus its
4342 size, since the offset is always the last part of the insn. */
4345 md_pcrel_from (fixP
)
4348 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4355 int ignore ATTRIBUTE_UNUSED
;
4359 temp
= get_absolute_expression ();
4360 subseg_set (bss_section
, (subsegT
) temp
);
4361 demand_empty_rest_of_line ();
4367 #ifdef BFD_ASSEMBLER
4370 i386_validate_fix (fixp
)
4373 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
4375 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
4381 tc_gen_reloc (section
, fixp
)
4382 asection
*section ATTRIBUTE_UNUSED
;
4386 bfd_reloc_code_real_type code
;
4388 switch (fixp
->fx_r_type
)
4390 case BFD_RELOC_386_PLT32
:
4391 case BFD_RELOC_386_GOT32
:
4392 case BFD_RELOC_386_GOTOFF
:
4393 case BFD_RELOC_386_GOTPC
:
4395 case BFD_RELOC_VTABLE_ENTRY
:
4396 case BFD_RELOC_VTABLE_INHERIT
:
4397 code
= fixp
->fx_r_type
;
4402 switch (fixp
->fx_size
)
4405 as_bad (_("Can not do %d byte pc-relative relocation"),
4407 code
= BFD_RELOC_32_PCREL
;
4409 case 1: code
= BFD_RELOC_8_PCREL
; break;
4410 case 2: code
= BFD_RELOC_16_PCREL
; break;
4411 case 4: code
= BFD_RELOC_32_PCREL
; break;
4416 switch (fixp
->fx_size
)
4419 as_bad (_("Can not do %d byte relocation"), fixp
->fx_size
);
4420 code
= BFD_RELOC_32
;
4422 case 1: code
= BFD_RELOC_8
; break;
4423 case 2: code
= BFD_RELOC_16
; break;
4424 case 4: code
= BFD_RELOC_32
; break;
4430 if (code
== BFD_RELOC_32
4432 && fixp
->fx_addsy
== GOT_symbol
)
4433 code
= BFD_RELOC_386_GOTPC
;
4435 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4436 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4437 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4439 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4440 /* HACK: Since i386 ELF uses Rel instead of Rela, encode the
4441 vtable entry to be used in the relocation's section offset. */
4442 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
4443 rel
->address
= fixp
->fx_offset
;
4446 rel
->addend
= fixp
->fx_addnumber
;
4450 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
4451 if (rel
->howto
== NULL
)
4453 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4454 _("Cannot represent relocation type %s"),
4455 bfd_get_reloc_code_name (code
));
4456 /* Set howto to a garbage value so that we can keep going. */
4457 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4458 assert (rel
->howto
!= NULL
);
4464 #else /* ! BFD_ASSEMBLER */
4466 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
4468 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
4471 relax_addressT segment_address_in_file
;
4474 * In: length of relocation (or of address) in chars: 1, 2 or 4.
4475 * Out: GNU LD relocation length code: 0, 1, or 2.
4478 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
4481 know (fixP
->fx_addsy
!= NULL
);
4483 md_number_to_chars (where
,
4484 (valueT
) (fixP
->fx_frag
->fr_address
4485 + fixP
->fx_where
- segment_address_in_file
),
4488 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
4489 ? S_GET_TYPE (fixP
->fx_addsy
)
4490 : fixP
->fx_addsy
->sy_number
);
4492 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
4493 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
4494 where
[4] = r_symbolnum
& 0x0ff;
4495 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
4496 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
4497 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
4500 #endif /* OBJ_AOUT or OBJ_BOUT */
4502 #if defined (I386COFF)
4505 tc_coff_fix2rtype (fixP
)
4508 if (fixP
->fx_r_type
== R_IMAGEBASE
)
4511 return (fixP
->fx_pcrel
?
4512 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
4513 fixP
->fx_size
== 2 ? R_PCRWORD
:
4515 (fixP
->fx_size
== 1 ? R_RELBYTE
:
4516 fixP
->fx_size
== 2 ? R_RELWORD
:
4521 tc_coff_sizemachdep (frag
)
4525 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
4530 #endif /* I386COFF */
4532 #endif /* ! BFD_ASSEMBLER */
4534 /* end of tc-i386.c */