1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 1999
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
33 #include "opcode/i386.h"
36 #define TC_RELOC(X,Y) (Y)
39 #ifndef REGISTER_WARNINGS
40 #define REGISTER_WARNINGS 1
43 #ifndef INFER_ADDR_PREFIX
44 #define INFER_ADDR_PREFIX 1
47 #ifndef SCALE1_WHEN_NO_INDEX
48 /* Specifying a scale factor besides 1 when there is no index is
49 futile. eg. `mov (%ebx,2),%al' does exactly the same as
50 `mov (%ebx),%al'. To slavishly follow what the programmer
51 specified, set SCALE1_WHEN_NO_INDEX to 0. */
52 #define SCALE1_WHEN_NO_INDEX 1
58 static unsigned int mode_from_disp_size
PARAMS ((unsigned int));
59 static int fits_in_signed_byte
PARAMS ((long));
60 static int fits_in_unsigned_byte
PARAMS ((long));
61 static int fits_in_unsigned_word
PARAMS ((long));
62 static int fits_in_signed_word
PARAMS ((long));
63 static int smallest_imm_type
PARAMS ((long));
64 static int add_prefix
PARAMS ((unsigned int));
65 static void set_16bit_code_flag
PARAMS ((int));
66 static void set_16bit_gcc_code_flag
PARAMS((int));
67 static void set_intel_syntax
PARAMS ((int));
70 static bfd_reloc_code_real_type reloc
71 PARAMS ((int, int, bfd_reloc_code_real_type
));
74 /* 'md_assemble ()' gathers together information and puts it into a
79 /* TM holds the template for the insn were currently assembling. */
82 /* SUFFIX holds the instruction mnemonic suffix if given.
83 (e.g. 'l' for 'movl') */
86 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
88 /* OPERANDS gives the number of given operands. */
89 unsigned int operands
;
91 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
92 of given register, displacement, memory operands and immediate
94 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
96 /* TYPES [i] is the type (see above #defines) which tells us how to
97 search through DISPS [i] & IMMS [i] & REGS [i] for the required
99 unsigned int types
[MAX_OPERANDS
];
101 /* Displacements (if given) for each operand. */
102 expressionS
*disps
[MAX_OPERANDS
];
104 /* Relocation type for operand */
106 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
108 int disp_reloc
[MAX_OPERANDS
];
111 /* Immediate operands (if given) for each operand. */
112 expressionS
*imms
[MAX_OPERANDS
];
114 /* Register operands (if given) for each operand. */
115 const reg_entry
*regs
[MAX_OPERANDS
];
117 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
118 the base index byte below. */
119 const reg_entry
*base_reg
;
120 const reg_entry
*index_reg
;
121 unsigned int log2_scale_factor
;
123 /* SEG gives the seg_entries of this insn. They are zero unless
124 explicit segment overrides are given. */
125 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
127 /* PREFIX holds all the given prefix opcodes (usually null).
128 PREFIXES is the number of prefix opcodes. */
129 unsigned int prefixes
;
130 unsigned char prefix
[MAX_PREFIXES
];
132 /* RM and SIB are the modrm byte and the sib byte where the
133 addressing modes of this insn are encoded. */
139 typedef struct _i386_insn i386_insn
;
141 /* List of chars besides those in app.c:symbol_chars that can start an
142 operand. Used to prevent the scrubber eating vital white-space. */
144 const char extra_symbol_chars
[] = "*%-(@";
146 const char extra_symbol_chars
[] = "*%-(";
149 /* This array holds the chars that always start a comment. If the
150 pre-processor is disabled, these aren't very useful */
151 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
152 /* Putting '/' here makes it impossible to use the divide operator.
153 However, we need it for compatibility with SVR4 systems. */
154 const char comment_chars
[] = "#/";
155 #define PREFIX_SEPARATOR '\\'
157 const char comment_chars
[] = "#";
158 #define PREFIX_SEPARATOR '/'
161 /* This array holds the chars that only start a comment at the beginning of
162 a line. If the line seems to have the form '# 123 filename'
163 .line and .file directives will appear in the pre-processed output */
164 /* Note that input_file.c hand checks for '#' at the beginning of the
165 first line of the input file. This is because the compiler outputs
166 #NO_APP at the beginning of its output. */
167 /* Also note that comments started like this one will always work if
168 '/' isn't otherwise defined. */
169 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
170 const char line_comment_chars
[] = "";
172 const char line_comment_chars
[] = "/";
175 const char line_separator_chars
[] = "";
177 /* Chars that can be used to separate mant from exp in floating point nums */
178 const char EXP_CHARS
[] = "eE";
180 /* Chars that mean this number is a floating point constant */
183 const char FLT_CHARS
[] = "fFdDxX";
185 /* tables for lexical analysis */
186 static char mnemonic_chars
[256];
187 static char register_chars
[256];
188 static char operand_chars
[256];
189 static char identifier_chars
[256];
190 static char digit_chars
[256];
193 #define is_mnemonic_char(x) (mnemonic_chars[(unsigned char) x])
194 #define is_operand_char(x) (operand_chars[(unsigned char) x])
195 #define is_register_char(x) (register_chars[(unsigned char) x])
196 #define is_space_char(x) ((x) == ' ')
197 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
198 #define is_digit_char(x) (digit_chars[(unsigned char) x])
200 /* put here all non-digit non-letter charcters that may occur in an operand */
201 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
203 /* md_assemble() always leaves the strings it's passed unaltered. To
204 effect this we maintain a stack of saved characters that we've smashed
205 with '\0's (indicating end of strings for various sub-fields of the
206 assembler instruction). */
207 static char save_stack
[32];
208 static char *save_stack_p
; /* stack pointer */
209 #define END_STRING_AND_SAVE(s) \
210 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
211 #define RESTORE_END_STRING(s) \
212 do { *(s) = *--save_stack_p; } while (0)
214 /* The instruction we're assembling. */
217 /* Possible templates for current insn. */
218 static const templates
*current_templates
;
220 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
221 static expressionS disp_expressions
[2], im_expressions
[2];
223 static int this_operand
; /* current operand we are working on */
225 static int flag_do_long_jump
; /* FIXME what does this do? */
227 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
229 static int intel_syntax
= 0; /* 1 for intel syntax, 0 if att syntax */
231 static int allow_naked_reg
= 0; /* 1 if register prefix % not required */
233 static char stackop_size
= '\0'; /* Used in 16 bit gcc mode to add an l
234 suffix to call, ret, enter, leave, push,
235 and pop instructions. */
237 /* Interface to relax_segment.
238 There are 2 relax states for 386 jump insns: one for conditional &
239 one for unconditional jumps. This is because the these two types
240 of jumps add different sizes to frags when we're figuring out what
241 sort of jump to choose to reach a given label. */
244 #define COND_JUMP 1 /* conditional jump */
245 #define UNCOND_JUMP 2 /* unconditional jump */
249 #define SMALL16 (SMALL|CODE16)
251 #define BIG16 (BIG|CODE16)
255 #define INLINE __inline__
261 #define ENCODE_RELAX_STATE(type,size) \
262 ((relax_substateT)((type<<2) | (size)))
263 #define SIZE_FROM_RELAX_STATE(s) \
264 ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) )
266 /* This table is used by relax_frag to promote short jumps to long
267 ones where necessary. SMALL (short) jumps may be promoted to BIG
268 (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We
269 don't allow a short jump in a 32 bit code segment to be promoted to
270 a 16 bit offset jump because it's slower (requires data size
271 prefix), and doesn't work, unless the destination is in the bottom
272 64k of the code segment (The top 16 bits of eip are zeroed). */
274 const relax_typeS md_relax_table
[] =
277 1) most positive reach of this state,
278 2) most negative reach of this state,
279 3) how many bytes this mode will add to the size of the current frag
280 4) which index into the table to try if we can't fit into this one.
287 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG
)},
288 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG16
)},
289 /* dword conditionals adds 4 bytes to frag:
290 1 extra opcode byte, 3 extra displacement bytes. */
292 /* word conditionals add 2 bytes to frag:
293 1 extra opcode byte, 1 extra displacement byte. */
296 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
)},
297 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
)},
298 /* dword jmp adds 3 bytes to frag:
299 0 extra opcode bytes, 3 extra displacement bytes. */
301 /* word jmp adds 1 byte to frag:
302 0 extra opcode bytes, 1 extra displacement byte. */
309 i386_align_code (fragP
, count
)
313 /* Various efficient no-op patterns for aligning code labels. */
314 /* Note: Don't try to assemble the instructions in the comments. */
315 /* 0L and 0w are not legal */
316 static const char f32_1
[] =
318 static const char f32_2
[] =
319 {0x89,0xf6}; /* movl %esi,%esi */
320 static const char f32_3
[] =
321 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
322 static const char f32_4
[] =
323 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
324 static const char f32_5
[] =
326 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
327 static const char f32_6
[] =
328 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
329 static const char f32_7
[] =
330 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
331 static const char f32_8
[] =
333 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
334 static const char f32_9
[] =
335 {0x89,0xf6, /* movl %esi,%esi */
336 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
337 static const char f32_10
[] =
338 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
339 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
340 static const char f32_11
[] =
341 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
342 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
343 static const char f32_12
[] =
344 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
345 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
346 static const char f32_13
[] =
347 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
348 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
349 static const char f32_14
[] =
350 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
351 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
352 static const char f32_15
[] =
353 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
354 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
355 static const char f16_3
[] =
356 {0x8d,0x74,0x00}; /* lea 0(%esi),%esi */
357 static const char f16_4
[] =
358 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
359 static const char f16_5
[] =
361 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
362 static const char f16_6
[] =
363 {0x89,0xf6, /* mov %si,%si */
364 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
365 static const char f16_7
[] =
366 {0x8d,0x74,0x00, /* lea 0(%si),%si */
367 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
368 static const char f16_8
[] =
369 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
370 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
371 static const char *const f32_patt
[] = {
372 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
373 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
375 static const char *const f16_patt
[] = {
376 f32_1
, f32_2
, f16_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
377 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
380 if (count
> 0 && count
<= 15)
384 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
385 f16_patt
[count
- 1], count
);
386 if (count
> 8) /* adjust jump offset */
387 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
390 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
391 f32_patt
[count
- 1], count
);
392 fragP
->fr_var
= count
;
396 static char *output_invalid
PARAMS ((int c
));
397 static int i386_operand
PARAMS ((char *operand_string
));
398 static int i386_intel_operand
PARAMS ((char *operand_string
, int got_a_float
));
399 static const reg_entry
*parse_register
PARAMS ((char *reg_string
,
403 static void s_bss
PARAMS ((int));
406 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
408 static INLINE
unsigned int
409 mode_from_disp_size (t
)
412 return (t
& Disp8
) ? 1 : (t
& (Disp16
|Disp32
)) ? 2 : 0;
416 fits_in_signed_byte (num
)
419 return (num
>= -128) && (num
<= 127);
420 } /* fits_in_signed_byte() */
423 fits_in_unsigned_byte (num
)
426 return (num
& 0xff) == num
;
427 } /* fits_in_unsigned_byte() */
430 fits_in_unsigned_word (num
)
433 return (num
& 0xffff) == num
;
434 } /* fits_in_unsigned_word() */
437 fits_in_signed_word (num
)
440 return (-32768 <= num
) && (num
<= 32767);
441 } /* fits_in_signed_word() */
444 smallest_imm_type (num
)
448 /* This code is disabled because all the Imm1 forms in the opcode table
449 are slower on the i486, and they're the versions with the implicitly
450 specified single-position displacement, which has another syntax if
451 you really want to use that form. If you really prefer to have the
452 one-byte-shorter Imm1 form despite these problems, re-enable this
455 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
457 return (fits_in_signed_byte (num
)
458 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
459 : fits_in_unsigned_byte (num
)
460 ? (Imm8
| Imm16
| Imm32
)
461 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
464 } /* smallest_imm_type() */
466 /* Returns 0 if attempting to add a prefix where one from the same
467 class already exists, 1 if non rep/repne added, 2 if rep/repne
481 case CS_PREFIX_OPCODE
:
482 case DS_PREFIX_OPCODE
:
483 case ES_PREFIX_OPCODE
:
484 case FS_PREFIX_OPCODE
:
485 case GS_PREFIX_OPCODE
:
486 case SS_PREFIX_OPCODE
:
490 case REPNE_PREFIX_OPCODE
:
491 case REPE_PREFIX_OPCODE
:
494 case LOCK_PREFIX_OPCODE
:
502 case ADDR_PREFIX_OPCODE
:
506 case DATA_PREFIX_OPCODE
:
513 as_bad (_("same type of prefix used twice"));
518 i
.prefix
[q
] = prefix
;
523 set_16bit_code_flag (new_16bit_code_flag
)
524 int new_16bit_code_flag
;
526 flag_16bit_code
= new_16bit_code_flag
;
531 set_16bit_gcc_code_flag (new_16bit_code_flag
)
532 int new_16bit_code_flag
;
534 flag_16bit_code
= new_16bit_code_flag
;
535 stackop_size
= new_16bit_code_flag
? 'l' : '\0';
539 set_intel_syntax (syntax_flag
)
542 /* Find out if register prefixing is specified. */
543 int ask_naked_reg
= 0;
546 if (! is_end_of_line
[(unsigned char) *input_line_pointer
])
548 char *string
= input_line_pointer
;
549 int e
= get_symbol_end ();
551 if (strcmp(string
, "prefix") == 0)
553 else if (strcmp(string
, "noprefix") == 0)
556 as_bad (_("Bad argument to syntax directive."));
557 *input_line_pointer
= e
;
559 demand_empty_rest_of_line ();
561 intel_syntax
= syntax_flag
;
563 if (ask_naked_reg
== 0)
566 allow_naked_reg
= (intel_syntax
567 && (bfd_get_symbol_leading_char (stdoutput
) != '\0'));
569 allow_naked_reg
= 0; /* conservative default */
573 allow_naked_reg
= (ask_naked_reg
< 0);
576 const pseudo_typeS md_pseudo_table
[] =
581 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
582 {"align", s_align_bytes
, 0},
584 {"align", s_align_ptwo
, 0},
586 {"ffloat", float_cons
, 'f'},
587 {"dfloat", float_cons
, 'd'},
588 {"tfloat", float_cons
, 'x'},
590 {"noopt", s_ignore
, 0},
591 {"optim", s_ignore
, 0},
592 {"code16gcc", set_16bit_gcc_code_flag
, 1},
593 {"code16", set_16bit_code_flag
, 1},
594 {"code32", set_16bit_code_flag
, 0},
595 {"intel_syntax", set_intel_syntax
, 1},
596 {"att_syntax", set_intel_syntax
, 0},
600 /* for interface with expression () */
601 extern char *input_line_pointer
;
603 /* hash table for instruction mnemonic lookup */
604 static struct hash_control
*op_hash
;
605 /* hash table for register lookup */
606 static struct hash_control
*reg_hash
;
612 const char *hash_err
;
614 /* initialize op_hash hash table */
615 op_hash
= hash_new ();
618 register const template *optab
;
619 register templates
*core_optab
;
621 optab
= i386_optab
; /* setup for loop */
622 core_optab
= (templates
*) xmalloc (sizeof (templates
));
623 core_optab
->start
= optab
;
628 if (optab
->name
== NULL
629 || strcmp (optab
->name
, (optab
- 1)->name
) != 0)
631 /* different name --> ship out current template list;
632 add to hash table; & begin anew */
633 core_optab
->end
= optab
;
634 hash_err
= hash_insert (op_hash
,
640 as_fatal (_("Internal Error: Can't hash %s: %s"),
644 if (optab
->name
== NULL
)
646 core_optab
= (templates
*) xmalloc (sizeof (templates
));
647 core_optab
->start
= optab
;
652 /* initialize reg_hash hash table */
653 reg_hash
= hash_new ();
655 register const reg_entry
*regtab
;
657 for (regtab
= i386_regtab
;
658 regtab
< i386_regtab
+ sizeof (i386_regtab
) / sizeof (i386_regtab
[0]);
661 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
667 /* fill in lexical tables: mnemonic_chars, operand_chars. */
672 for (c
= 0; c
< 256; c
++)
677 mnemonic_chars
[c
] = c
;
678 register_chars
[c
] = c
;
679 operand_chars
[c
] = c
;
681 else if (islower (c
))
683 mnemonic_chars
[c
] = c
;
684 register_chars
[c
] = c
;
685 operand_chars
[c
] = c
;
687 else if (isupper (c
))
689 mnemonic_chars
[c
] = tolower (c
);
690 register_chars
[c
] = mnemonic_chars
[c
];
691 operand_chars
[c
] = c
;
694 if (isalpha (c
) || isdigit (c
))
695 identifier_chars
[c
] = c
;
698 identifier_chars
[c
] = c
;
699 operand_chars
[c
] = c
;
704 identifier_chars
['@'] = '@';
706 register_chars
[')'] = ')';
707 register_chars
['('] = '(';
708 digit_chars
['-'] = '-';
709 identifier_chars
['_'] = '_';
710 identifier_chars
['.'] = '.';
712 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
713 operand_chars
[(unsigned char) *p
] = *p
;
716 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
717 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
719 record_alignment (text_section
, 2);
720 record_alignment (data_section
, 2);
721 record_alignment (bss_section
, 2);
727 i386_print_statistics (file
)
730 hash_print_statistics (file
, "i386 opcode", op_hash
);
731 hash_print_statistics (file
, "i386 register", reg_hash
);
737 /* debugging routines for md_assemble */
738 static void pi
PARAMS ((char *, i386_insn
*));
739 static void pte
PARAMS ((template *));
740 static void pt
PARAMS ((unsigned int));
741 static void pe
PARAMS ((expressionS
*));
742 static void ps
PARAMS ((symbolS
*));
749 register template *p
;
752 fprintf (stdout
, "%s: template ", line
);
754 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
755 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
756 fprintf (stdout
, " base %x index %x scale %x\n",
757 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
758 for (i
= 0; i
< x
->operands
; i
++)
760 fprintf (stdout
, " #%d: ", i
+ 1);
762 fprintf (stdout
, "\n");
764 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
| RegXMM
))
765 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
766 if (x
->types
[i
] & Imm
)
768 if (x
->types
[i
] & Disp
)
778 fprintf (stdout
, " %d operands ", t
->operands
);
779 fprintf (stdout
, "opcode %x ",
781 if (t
->extension_opcode
!= None
)
782 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
783 if (t
->opcode_modifier
& D
)
784 fprintf (stdout
, "D");
785 if (t
->opcode_modifier
& W
)
786 fprintf (stdout
, "W");
787 fprintf (stdout
, "\n");
788 for (i
= 0; i
< t
->operands
; i
++)
790 fprintf (stdout
, " #%d type ", i
+ 1);
791 pt (t
->operand_types
[i
]);
792 fprintf (stdout
, "\n");
800 fprintf (stdout
, " operation %d\n", e
->X_op
);
801 fprintf (stdout
, " add_number %ld (%lx)\n",
802 (long) e
->X_add_number
, (long) e
->X_add_number
);
805 fprintf (stdout
, " add_symbol ");
806 ps (e
->X_add_symbol
);
807 fprintf (stdout
, "\n");
811 fprintf (stdout
, " op_symbol ");
813 fprintf (stdout
, "\n");
821 fprintf (stdout
, "%s type %s%s",
823 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
824 segment_name (S_GET_SEGMENT (s
)));
843 { BaseIndex
, "BaseIndex" },
847 { InOutPortReg
, "InOutPortReg" },
848 { ShiftCount
, "ShiftCount" },
849 { Control
, "control reg" },
850 { Test
, "test reg" },
851 { Debug
, "debug reg" },
852 { FloatReg
, "FReg" },
853 { FloatAcc
, "FAcc" },
857 { JumpAbsolute
, "Jump Absolute" },
868 register struct type_name
*ty
;
872 fprintf (stdout
, _("Unknown"));
876 for (ty
= type_names
; ty
->mask
; ty
++)
878 fprintf (stdout
, "%s, ", ty
->tname
);
883 #endif /* DEBUG386 */
886 tc_i386_force_relocation (fixp
)
890 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
891 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
896 return fixp
->fx_r_type
==7;
901 static bfd_reloc_code_real_type reloc
902 PARAMS ((int, int, bfd_reloc_code_real_type
));
904 static bfd_reloc_code_real_type
905 reloc (size
, pcrel
, other
)
908 bfd_reloc_code_real_type other
;
910 if (other
!= NO_RELOC
) return other
;
916 case 1: return BFD_RELOC_8_PCREL
;
917 case 2: return BFD_RELOC_16_PCREL
;
918 case 4: return BFD_RELOC_32_PCREL
;
920 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
926 case 1: return BFD_RELOC_8
;
927 case 2: return BFD_RELOC_16
;
928 case 4: return BFD_RELOC_32
;
930 as_bad (_("Can not do %d byte relocation"), size
);
933 return BFD_RELOC_NONE
;
937 * Here we decide which fixups can be adjusted to make them relative to
938 * the beginning of the section instead of the symbol. Basically we need
939 * to make sure that the dynamic relocations are done correctly, so in
940 * some cases we force the original symbol to be used.
943 tc_i386_fix_adjustable(fixP
)
947 /* Prevent all adjustments to global symbols. */
948 if (S_IS_EXTERN (fixP
->fx_addsy
))
950 if (S_IS_WEAK (fixP
->fx_addsy
))
953 /* adjust_reloc_syms doesn't know about the GOT */
954 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
955 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
956 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
957 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
958 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
963 #define reloc(SIZE,PCREL,OTHER) 0
964 #define BFD_RELOC_16 0
965 #define BFD_RELOC_32 0
966 #define BFD_RELOC_16_PCREL 0
967 #define BFD_RELOC_32_PCREL 0
968 #define BFD_RELOC_386_PLT32 0
969 #define BFD_RELOC_386_GOT32 0
970 #define BFD_RELOC_386_GOTOFF 0
974 intel_float_operand
PARAMS ((char *mnemonic
));
977 intel_float_operand (mnemonic
)
980 if (mnemonic
[0] == 'f' && mnemonic
[1] =='i')
983 if (mnemonic
[0] == 'f')
989 /* This is the guts of the machine-dependent assembler. LINE points to a
990 machine dependent instruction. This function is supposed to emit
991 the frags/bytes it assembles to. */
997 /* Points to template once we've found it. */
1000 /* Count the size of the instruction generated. */
1005 char mnemonic
[MAX_MNEM_SIZE
];
1007 /* Initialize globals. */
1008 memset (&i
, '\0', sizeof (i
));
1009 for (j
= 0; j
< MAX_OPERANDS
; j
++)
1010 i
.disp_reloc
[j
] = NO_RELOC
;
1011 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
1012 memset (im_expressions
, '\0', sizeof (im_expressions
));
1013 save_stack_p
= save_stack
; /* reset stack pointer */
1015 /* First parse an instruction mnemonic & call i386_operand for the operands.
1016 We assume that the scrubber has arranged it so that line[0] is the valid
1017 start of a (possibly prefixed) mnemonic. */
1020 char *token_start
= l
;
1023 /* Non-zero if we found a prefix only acceptable with string insns. */
1024 const char *expecting_string_instruction
= NULL
;
1029 while ((*mnem_p
= mnemonic_chars
[(unsigned char) *l
]) != 0)
1032 if (mnem_p
>= mnemonic
+ sizeof (mnemonic
))
1034 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1039 if (!is_space_char (*l
)
1040 && *l
!= END_OF_INSN
1041 && *l
!= PREFIX_SEPARATOR
)
1043 as_bad (_("invalid character %s in mnemonic"),
1044 output_invalid (*l
));
1047 if (token_start
== l
)
1049 if (*l
== PREFIX_SEPARATOR
)
1050 as_bad (_("expecting prefix; got nothing"));
1052 as_bad (_("expecting mnemonic; got nothing"));
1056 /* Look up instruction (or prefix) via hash table. */
1057 current_templates
= hash_find (op_hash
, mnemonic
);
1059 if (*l
!= END_OF_INSN
1060 && (! is_space_char (*l
) || l
[1] != END_OF_INSN
)
1061 && current_templates
1062 && (current_templates
->start
->opcode_modifier
& IsPrefix
))
1064 /* If we are in 16-bit mode, do not allow addr16 or data16.
1065 Similarly, in 32-bit mode, do not allow addr32 or data32. */
1066 if ((current_templates
->start
->opcode_modifier
& (Size16
| Size32
))
1067 && (((current_templates
->start
->opcode_modifier
& Size32
) != 0)
1070 as_bad (_("redundant %s prefix"),
1071 current_templates
->start
->name
);
1074 /* Add prefix, checking for repeated prefixes. */
1075 switch (add_prefix (current_templates
->start
->base_opcode
))
1080 expecting_string_instruction
=
1081 current_templates
->start
->name
;
1084 /* Skip past PREFIX_SEPARATOR and reset token_start. */
1091 if (!current_templates
)
1093 /* See if we can get a match by trimming off a suffix. */
1096 case DWORD_MNEM_SUFFIX
:
1097 case WORD_MNEM_SUFFIX
:
1098 case BYTE_MNEM_SUFFIX
:
1099 case SHORT_MNEM_SUFFIX
:
1100 #if LONG_MNEM_SUFFIX != DWORD_MNEM_SUFFIX
1101 case LONG_MNEM_SUFFIX
:
1103 i
.suffix
= mnem_p
[-1];
1105 current_templates
= hash_find (op_hash
, mnemonic
);
1109 case INTEL_DWORD_MNEM_SUFFIX
:
1112 i
.suffix
= mnem_p
[-1];
1114 current_templates
= hash_find (op_hash
, mnemonic
);
1118 if (!current_templates
)
1120 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1125 /* check for rep/repne without a string instruction */
1126 if (expecting_string_instruction
1127 && !(current_templates
->start
->opcode_modifier
& IsString
))
1129 as_bad (_("expecting string instruction after `%s'"),
1130 expecting_string_instruction
);
1134 /* There may be operands to parse. */
1135 if (*l
!= END_OF_INSN
)
1137 /* parse operands */
1139 /* 1 if operand is pending after ','. */
1140 unsigned int expecting_operand
= 0;
1142 /* Non-zero if operand parens not balanced. */
1143 unsigned int paren_not_balanced
;
1147 /* skip optional white space before operand */
1148 if (is_space_char (*l
))
1150 if (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1152 as_bad (_("invalid character %s before operand %d"),
1153 output_invalid (*l
),
1157 token_start
= l
; /* after white space */
1158 paren_not_balanced
= 0;
1159 while (paren_not_balanced
|| *l
!= ',')
1161 if (*l
== END_OF_INSN
)
1163 if (paren_not_balanced
)
1166 as_bad (_("unbalanced parenthesis in operand %d."),
1169 as_bad (_("unbalanced brackets in operand %d."),
1174 break; /* we are done */
1176 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1178 as_bad (_("invalid character %s in operand %d"),
1179 output_invalid (*l
),
1186 ++paren_not_balanced
;
1188 --paren_not_balanced
;
1193 ++paren_not_balanced
;
1195 --paren_not_balanced
;
1199 if (l
!= token_start
)
1200 { /* yes, we've read in another operand */
1201 unsigned int operand_ok
;
1202 this_operand
= i
.operands
++;
1203 if (i
.operands
> MAX_OPERANDS
)
1205 as_bad (_("spurious operands; (%d operands/instruction max)"),
1209 /* now parse operand adding info to 'i' as we go along */
1210 END_STRING_AND_SAVE (l
);
1213 operand_ok
= i386_intel_operand (token_start
, intel_float_operand (mnemonic
));
1215 operand_ok
= i386_operand (token_start
);
1217 RESTORE_END_STRING (l
); /* restore old contents */
1223 if (expecting_operand
)
1225 expecting_operand_after_comma
:
1226 as_bad (_("expecting operand after ','; got nothing"));
1231 as_bad (_("expecting operand before ','; got nothing"));
1236 /* now *l must be either ',' or END_OF_INSN */
1239 if (*++l
== END_OF_INSN
)
1240 { /* just skip it, if it's \n complain */
1241 goto expecting_operand_after_comma
;
1243 expecting_operand
= 1;
1246 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1250 /* Now we've parsed the mnemonic into a set of templates, and have the
1253 Next, we find a template that matches the given insn,
1254 making sure the overlap of the given operands types is consistent
1255 with the template operand types. */
1257 #define MATCH(overlap, given, template) \
1259 && ((given) & BaseIndex) == ((overlap) & BaseIndex) \
1260 && ((given) & JumpAbsolute) == ((template) & JumpAbsolute))
1262 /* If given types r0 and r1 are registers they must be of the same type
1263 unless the expected operand type register overlap is null.
1264 Note that Acc in a template matches every size of reg. */
1265 #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \
1266 ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \
1267 ((g0) & Reg) == ((g1) & Reg) || \
1268 ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 )
1271 register unsigned int overlap0
, overlap1
;
1272 unsigned int overlap2
;
1273 unsigned int found_reverse_match
;
1276 /* All intel opcodes have reversed operands except for BOUND and ENTER */
1278 && (strcmp (mnemonic
, "enter") != 0)
1279 && (strcmp (mnemonic
, "bound") != 0)
1280 && (strncmp (mnemonic
, "fsub", 4) !=0)
1281 && (strncmp (mnemonic
, "fdiv", 4) !=0))
1283 const reg_entry
*temp_reg
= NULL
;
1284 expressionS
*temp_disp
= NULL
;
1285 expressionS
*temp_imm
= NULL
;
1286 unsigned int temp_type
;
1290 if (i
.operands
== 2)
1295 else if (i
.operands
== 3)
1303 temp_type
= i
.types
[xchg2
];
1304 if (temp_type
& (Reg
| FloatReg
))
1305 temp_reg
= i
.regs
[xchg2
];
1306 else if (temp_type
& Imm
)
1307 temp_imm
= i
.imms
[xchg2
];
1308 else if (temp_type
& Disp
)
1309 temp_disp
= i
.disps
[xchg2
];
1311 i
.types
[xchg2
] = i
.types
[xchg1
];
1313 if (i
.types
[xchg1
] & (Reg
| FloatReg
))
1315 i
.regs
[xchg2
] = i
.regs
[xchg1
];
1316 i
.regs
[xchg1
] = NULL
;
1318 else if (i
.types
[xchg2
] & Imm
)
1320 i
.imms
[xchg2
] = i
.imms
[xchg1
];
1321 i
.imms
[xchg1
] = NULL
;
1323 else if (i
.types
[xchg2
] & Disp
)
1325 i
.disps
[xchg2
] = i
.disps
[xchg1
];
1326 i
.disps
[xchg1
] = NULL
;
1329 if (temp_type
& (Reg
| FloatReg
))
1331 i
.regs
[xchg1
] = temp_reg
;
1332 if (! (i
.types
[xchg1
] & (Reg
| FloatReg
)))
1333 i
.regs
[xchg2
] = NULL
;
1335 else if (temp_type
& Imm
)
1337 i
.imms
[xchg1
] = temp_imm
;
1338 if (! (i
.types
[xchg1
] & Imm
))
1339 i
.imms
[xchg2
] = NULL
;
1341 else if (temp_type
& Disp
)
1343 i
.disps
[xchg1
] = temp_disp
;
1344 if (! (i
.types
[xchg1
] & Disp
))
1345 i
.disps
[xchg2
] = NULL
;
1348 i
.types
[xchg1
] = temp_type
;
1350 if (!strcmp(mnemonic
,"jmp")
1351 || !strcmp (mnemonic
, "call"))
1352 if ((i
.types
[0] & Reg
) || i
.types
[0] & BaseIndex
)
1353 i
.types
[0] |= JumpAbsolute
;
1359 found_reverse_match
= 0;
1360 suffix_check
= (i
.suffix
== BYTE_MNEM_SUFFIX
1362 : (i
.suffix
== WORD_MNEM_SUFFIX
1364 : (i
.suffix
== SHORT_MNEM_SUFFIX
1366 : (i
.suffix
== LONG_MNEM_SUFFIX
1368 : (i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
1370 : (i
.suffix
== LONG_DOUBLE_MNEM_SUFFIX
? No_xSuf
: 0))))));
1372 for (t
= current_templates
->start
;
1373 t
< current_templates
->end
;
1376 /* Must have right number of operands. */
1377 if (i
.operands
!= t
->operands
)
1380 /* For some opcodes, don't check the suffix */
1383 if (strcmp (t
->name
, "fnstcw")
1384 && strcmp (t
->name
, "fldcw")
1385 && (t
->opcode_modifier
& suffix_check
))
1388 /* Must not have disallowed suffix. */
1389 else if ((t
->opcode_modifier
& suffix_check
))
1392 else if (!t
->operands
)
1393 break; /* 0 operands always matches */
1395 overlap0
= i
.types
[0] & t
->operand_types
[0];
1396 switch (t
->operands
)
1399 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0]))
1404 overlap1
= i
.types
[1] & t
->operand_types
[1];
1405 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0])
1406 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[1])
1407 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1408 t
->operand_types
[0],
1409 overlap1
, i
.types
[1],
1410 t
->operand_types
[1]))
1413 /* check if other direction is valid ... */
1414 if ((t
->opcode_modifier
& (D
|FloatD
)) == 0)
1417 /* try reversing direction of operands */
1418 overlap0
= i
.types
[0] & t
->operand_types
[1];
1419 overlap1
= i
.types
[1] & t
->operand_types
[0];
1420 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[1])
1421 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[0])
1422 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1423 t
->operand_types
[1],
1424 overlap1
, i
.types
[1],
1425 t
->operand_types
[0]))
1427 /* does not match either direction */
1430 /* found_reverse_match holds which of D or FloatDR
1432 found_reverse_match
= t
->opcode_modifier
& (D
|FloatDR
);
1435 /* found a forward 2 operand match here */
1436 if (t
->operands
== 3)
1438 /* Here we make use of the fact that there are no
1439 reverse match 3 operand instructions, and all 3
1440 operand instructions only need to be checked for
1441 register consistency between operands 2 and 3. */
1442 overlap2
= i
.types
[2] & t
->operand_types
[2];
1443 if (!MATCH (overlap2
, i
.types
[2], t
->operand_types
[2])
1444 || !CONSISTENT_REGISTER_MATCH (overlap1
, i
.types
[1],
1445 t
->operand_types
[1],
1446 overlap2
, i
.types
[2],
1447 t
->operand_types
[2]))
1451 /* found either forward/reverse 2 or 3 operand match here:
1452 slip through to break */
1454 break; /* we've found a match; break out of loop */
1455 } /* for (t = ... */
1456 if (t
== current_templates
->end
)
1457 { /* we found no match */
1458 as_bad (_("suffix or operands invalid for `%s'"),
1459 current_templates
->start
->name
);
1463 if ((t
->opcode_modifier
& (IsPrefix
|IgnoreSize
)) == (IsPrefix
|IgnoreSize
))
1465 /* Warn them that a data or address size prefix doesn't affect
1466 assembly of the next line of code. */
1467 as_warn (_("stand-alone `%s' prefix"), t
->name
);
1470 /* Copy the template we found. */
1472 if (found_reverse_match
)
1474 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1475 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1479 if (i
.tm
.opcode_modifier
& FWait
)
1480 if (! add_prefix (FWAIT_OPCODE
))
1483 /* Check string instruction segment overrides */
1484 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1486 int mem_op
= (i
.types
[0] & AnyMem
) ? 0 : 1;
1487 if ((i
.tm
.operand_types
[mem_op
] & EsSeg
) != 0)
1489 if (i
.seg
[0] != NULL
&& i
.seg
[0] != &es
)
1491 as_bad (_("`%s' operand %d must use `%%es' segment"),
1496 /* There's only ever one segment override allowed per instruction.
1497 This instruction possibly has a legal segment override on the
1498 second operand, so copy the segment to where non-string
1499 instructions store it, allowing common code. */
1500 i
.seg
[0] = i
.seg
[1];
1502 else if ((i
.tm
.operand_types
[mem_op
+ 1] & EsSeg
) != 0)
1504 if (i
.seg
[1] != NULL
&& i
.seg
[1] != &es
)
1506 as_bad (_("`%s' operand %d must use `%%es' segment"),
1514 /* If matched instruction specifies an explicit instruction mnemonic
1516 if (i
.tm
.opcode_modifier
& (Size16
| Size32
))
1518 if (i
.tm
.opcode_modifier
& Size16
)
1519 i
.suffix
= WORD_MNEM_SUFFIX
;
1521 i
.suffix
= DWORD_MNEM_SUFFIX
;
1523 else if (i
.reg_operands
)
1525 /* If there's no instruction mnemonic suffix we try to invent one
1526 based on register operands. */
1529 /* We take i.suffix from the last register operand specified,
1530 Destination register type is more significant than source
1533 for (op
= i
.operands
; --op
>= 0; )
1534 if (i
.types
[op
] & Reg
)
1536 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_MNEM_SUFFIX
:
1537 (i
.types
[op
] & Reg16
) ? WORD_MNEM_SUFFIX
:
1542 else if (i
.suffix
== BYTE_MNEM_SUFFIX
)
1545 for (op
= i
.operands
; --op
>= 0; )
1547 /* If this is an eight bit register, it's OK. If it's
1548 the 16 or 32 bit version of an eight bit register,
1549 we will just use the low portion, and that's OK too. */
1550 if (i
.types
[op
] & Reg8
)
1553 /* movzx and movsx should not generate this warning. */
1555 && (i
.tm
.base_opcode
== 0xfb7
1556 || i
.tm
.base_opcode
== 0xfb6
1557 || i
.tm
.base_opcode
== 0xfbe
1558 || i
.tm
.base_opcode
== 0xfbf))
1561 if ((i
.types
[op
] & WordReg
) && i
.regs
[op
]->reg_num
< 4
1563 /* Check that the template allows eight bit regs
1564 This kills insns such as `orb $1,%edx', which
1565 maybe should be allowed. */
1566 && (i
.tm
.operand_types
[op
] & (Reg8
|InOutPortReg
))
1570 #if REGISTER_WARNINGS
1571 if ((i
.tm
.operand_types
[op
] & InOutPortReg
) == 0)
1572 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1573 (i
.regs
[op
] - (i
.types
[op
] & Reg16
? 8 : 16))->reg_name
,
1574 i
.regs
[op
]->reg_name
,
1579 /* Any other register is bad */
1580 if (i
.types
[op
] & (Reg
| RegMMX
| RegXMM
1582 | Control
| Debug
| Test
1583 | FloatReg
| FloatAcc
))
1585 as_bad (_("`%%%s' not allowed with `%s%c'"),
1586 i
.regs
[op
]->reg_name
,
1593 else if (i
.suffix
== DWORD_MNEM_SUFFIX
)
1596 for (op
= i
.operands
; --op
>= 0; )
1597 /* Reject eight bit registers, except where the template
1598 requires them. (eg. movzb) */
1599 if ((i
.types
[op
] & Reg8
) != 0
1600 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1602 as_bad (_("`%%%s' not allowed with `%s%c'"),
1603 i
.regs
[op
]->reg_name
,
1608 #if REGISTER_WARNINGS
1609 /* Warn if the e prefix on a general reg is missing. */
1610 else if ((i
.types
[op
] & Reg16
) != 0
1611 && (i
.tm
.operand_types
[op
] & (Reg32
|Acc
)) != 0)
1613 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1614 (i
.regs
[op
] + 8)->reg_name
,
1615 i
.regs
[op
]->reg_name
,
1620 else if (i
.suffix
== WORD_MNEM_SUFFIX
)
1623 for (op
= i
.operands
; --op
>= 0; )
1624 /* Reject eight bit registers, except where the template
1625 requires them. (eg. movzb) */
1626 if ((i
.types
[op
] & Reg8
) != 0
1627 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1629 as_bad (_("`%%%s' not allowed with `%s%c'"),
1630 i
.regs
[op
]->reg_name
,
1635 #if REGISTER_WARNINGS
1636 /* Warn if the e prefix on a general reg is present. */
1637 else if ((i
.types
[op
] & Reg32
) != 0
1638 && (i
.tm
.operand_types
[op
] & (Reg16
|Acc
)) != 0)
1640 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1641 (i
.regs
[op
] - 8)->reg_name
,
1642 i
.regs
[op
]->reg_name
,
1650 else if ((i
.tm
.opcode_modifier
& DefaultSize
) && !i
.suffix
)
1652 i
.suffix
= stackop_size
;
1655 /* Make still unresolved immediate matches conform to size of immediate
1656 given in i.suffix. Note: overlap2 cannot be an immediate! */
1657 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1658 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1659 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1663 overlap0
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1664 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1666 else if (overlap0
== (Imm16
| Imm32
))
1669 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1673 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1677 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1678 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1679 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1683 overlap1
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1684 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1686 else if (overlap1
== (Imm16
| Imm32
))
1689 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1693 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1697 assert ((overlap2
& Imm
) == 0);
1699 i
.types
[0] = overlap0
;
1700 if (overlap0
& ImplicitRegister
)
1702 if (overlap0
& Imm1
)
1703 i
.imm_operands
= 0; /* kludge for shift insns */
1705 i
.types
[1] = overlap1
;
1706 if (overlap1
& ImplicitRegister
)
1709 i
.types
[2] = overlap2
;
1710 if (overlap2
& ImplicitRegister
)
1713 /* Finalize opcode. First, we change the opcode based on the operand
1714 size given by i.suffix: We need not change things for byte insns. */
1716 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1718 as_bad (_("no instruction mnemonic suffix given and no register operands; can't size instruction"));
1722 /* For movzx and movsx, need to check the register type */
1724 && (i
.tm
.base_opcode
== 0xfb6 || i
.tm
.base_opcode
== 0xfbe))
1725 if (i
.suffix
&& i
.suffix
== BYTE_MNEM_SUFFIX
)
1727 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1729 if ((i
.regs
[1]->reg_type
& Reg16
) != 0)
1730 if (!add_prefix (prefix
))
1734 if (i
.suffix
&& i
.suffix
!= BYTE_MNEM_SUFFIX
)
1736 /* It's not a byte, select word/dword operation. */
1737 if (i
.tm
.opcode_modifier
& W
)
1739 if (i
.tm
.opcode_modifier
& ShortForm
)
1740 i
.tm
.base_opcode
|= 8;
1742 i
.tm
.base_opcode
|= 1;
1744 /* Now select between word & dword operations via the operand
1745 size prefix, except for instructions that will ignore this
1747 if (((intel_syntax
&& (i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
))
1748 || i
.suffix
== DWORD_MNEM_SUFFIX
1749 || i
.suffix
== LONG_MNEM_SUFFIX
) == flag_16bit_code
1750 && !(i
.tm
.opcode_modifier
& IgnoreSize
))
1752 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1753 if (i
.tm
.opcode_modifier
& JumpByte
) /* jcxz, loop */
1754 prefix
= ADDR_PREFIX_OPCODE
;
1756 if (! add_prefix (prefix
))
1759 /* Size floating point instruction. */
1760 if (i
.suffix
== LONG_MNEM_SUFFIX
1761 || (intel_syntax
&& i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
))
1763 if (i
.tm
.opcode_modifier
& FloatMF
)
1764 i
.tm
.base_opcode
^= 4;
1767 if (intel_syntax
&& i
.suffix
== LONG_DOUBLE_MNEM_SUFFIX
)
1769 if (i
.tm
.opcode_modifier
& FloatMF
)
1770 i
.tm
.base_opcode
^= 2;
1774 if (i
.tm
.opcode_modifier
& ImmExt
)
1776 /* These AMD 3DNow! and Intel Katmai New Instructions have an
1777 opcode suffix which is coded in the same place as an 8-bit
1778 immediate field would be. Here we fake an 8-bit immediate
1779 operand from the opcode suffix stored in tm.extension_opcode. */
1783 assert(i
.imm_operands
== 0 && i
.operands
<= 2);
1785 exp
= &im_expressions
[i
.imm_operands
++];
1786 i
.imms
[i
.operands
] = exp
;
1787 i
.types
[i
.operands
++] = Imm8
;
1788 exp
->X_op
= O_constant
;
1789 exp
->X_add_number
= i
.tm
.extension_opcode
;
1790 i
.tm
.extension_opcode
= None
;
1793 /* For insns with operands there are more diddles to do to the opcode. */
1796 /* Default segment register this instruction will use
1797 for memory accesses. 0 means unknown.
1798 This is only for optimizing out unnecessary segment overrides. */
1799 const seg_entry
*default_seg
= 0;
1801 /* If we found a reverse match we must alter the opcode
1802 direction bit. found_reverse_match holds bits to change
1803 (different for int & float insns). */
1805 i
.tm
.base_opcode
^= found_reverse_match
;
1807 /* The imul $imm, %reg instruction is converted into
1808 imul $imm, %reg, %reg, and the clr %reg instruction
1809 is converted into xor %reg, %reg. */
1810 if (i
.tm
.opcode_modifier
& regKludge
)
1812 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1813 /* Pretend we saw the extra register operand. */
1814 i
.regs
[first_reg_op
+1] = i
.regs
[first_reg_op
];
1818 if (i
.tm
.opcode_modifier
& ShortForm
)
1820 /* The register or float register operand is in operand 0 or 1. */
1821 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1822 /* Register goes in low 3 bits of opcode. */
1823 i
.tm
.base_opcode
|= i
.regs
[op
]->reg_num
;
1824 if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1826 /* Warn about some common errors, but press on regardless.
1827 The first case can be generated by gcc (<= 2.8.1). */
1828 if (i
.operands
== 2)
1830 /* reversed arguments on faddp, fsubp, etc. */
1831 as_warn (_("translating to `%s %%%s,%%%s'"), i
.tm
.name
,
1832 i
.regs
[1]->reg_name
,
1833 i
.regs
[0]->reg_name
);
1837 /* extraneous `l' suffix on fp insn */
1838 as_warn (_("translating to `%s %%%s'"), i
.tm
.name
,
1839 i
.regs
[0]->reg_name
);
1843 else if (i
.tm
.opcode_modifier
& Modrm
)
1845 /* The opcode is completed (modulo i.tm.extension_opcode which
1846 must be put into the modrm byte).
1847 Now, we make the modrm & index base bytes based on all the
1848 info we've collected. */
1850 /* i.reg_operands MUST be the number of real register operands;
1851 implicit registers do not count. */
1852 if (i
.reg_operands
== 2)
1854 unsigned int source
, dest
;
1855 source
= ((i
.types
[0]
1856 & (Reg
| RegMMX
| RegXMM
1858 | Control
| Debug
| Test
))
1863 /* One of the register operands will be encoded in the
1864 i.tm.reg field, the other in the combined i.tm.mode
1865 and i.tm.regmem fields. If no form of this
1866 instruction supports a memory destination operand,
1867 then we assume the source operand may sometimes be
1868 a memory operand and so we need to store the
1869 destination in the i.rm.reg field. */
1870 if ((i
.tm
.operand_types
[dest
] & AnyMem
) == 0)
1872 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1873 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1877 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1878 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1882 { /* if it's not 2 reg operands... */
1885 unsigned int fake_zero_displacement
= 0;
1886 unsigned int op
= ((i
.types
[0] & AnyMem
)
1888 : (i
.types
[1] & AnyMem
) ? 1 : 2);
1895 if (! i
.disp_operands
)
1896 fake_zero_displacement
= 1;
1899 /* Operand is just <disp> */
1900 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
1902 i
.rm
.regmem
= NO_BASE_REGISTER_16
;
1903 i
.types
[op
] &= ~Disp
;
1904 i
.types
[op
] |= Disp16
;
1908 i
.rm
.regmem
= NO_BASE_REGISTER
;
1909 i
.types
[op
] &= ~Disp
;
1910 i
.types
[op
] |= Disp32
;
1913 else /* ! i.base_reg && i.index_reg */
1915 i
.sib
.index
= i
.index_reg
->reg_num
;
1916 i
.sib
.base
= NO_BASE_REGISTER
;
1917 i
.sib
.scale
= i
.log2_scale_factor
;
1918 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1919 i
.types
[op
] &= ~Disp
;
1920 i
.types
[op
] |= Disp32
; /* Must be 32 bit */
1923 else if (i
.base_reg
->reg_type
& Reg16
)
1925 switch (i
.base_reg
->reg_num
)
1930 else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */
1931 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6;
1938 if ((i
.types
[op
] & Disp
) == 0)
1940 /* fake (%bp) into 0(%bp) */
1941 i
.types
[op
] |= Disp8
;
1942 fake_zero_displacement
= 1;
1945 else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */
1946 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6 + 2;
1948 default: /* (%si) -> 4 or (%di) -> 5 */
1949 i
.rm
.regmem
= i
.base_reg
->reg_num
- 6 + 4;
1951 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1953 else /* i.base_reg and 32 bit mode */
1955 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1956 i
.sib
.base
= i
.base_reg
->reg_num
;
1957 if (i
.base_reg
->reg_num
== EBP_REG_NUM
)
1960 if (i
.disp_operands
== 0)
1962 fake_zero_displacement
= 1;
1963 i
.types
[op
] |= Disp8
;
1966 else if (i
.base_reg
->reg_num
== ESP_REG_NUM
)
1970 i
.sib
.scale
= i
.log2_scale_factor
;
1973 /* <disp>(%esp) becomes two byte modrm
1974 with no index register. We've already
1975 stored the code for esp in i.rm.regmem
1976 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1977 base register besides %esp will not use
1978 the extra modrm byte. */
1979 i
.sib
.index
= NO_INDEX_REGISTER
;
1980 #if ! SCALE1_WHEN_NO_INDEX
1981 /* Another case where we force the second
1983 if (i
.log2_scale_factor
)
1984 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1989 i
.sib
.index
= i
.index_reg
->reg_num
;
1990 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1992 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1995 if (fake_zero_displacement
)
1997 /* Fakes a zero displacement assuming that i.types[op]
1998 holds the correct displacement size. */
2001 exp
= &disp_expressions
[i
.disp_operands
++];
2003 exp
->X_op
= O_constant
;
2004 exp
->X_add_number
= 0;
2005 exp
->X_add_symbol
= (symbolS
*) 0;
2006 exp
->X_op_symbol
= (symbolS
*) 0;
2010 /* Fill in i.rm.reg or i.rm.regmem field with register
2011 operand (if any) based on i.tm.extension_opcode.
2012 Again, we must be careful to make sure that
2013 segment/control/debug/test/MMX registers are coded
2014 into the i.rm.reg field. */
2019 & (Reg
| RegMMX
| RegXMM
2021 | Control
| Debug
| Test
))
2024 & (Reg
| RegMMX
| RegXMM
2026 | Control
| Debug
| Test
))
2029 /* If there is an extension opcode to put here, the
2030 register number must be put into the regmem field. */
2031 if (i
.tm
.extension_opcode
!= None
)
2032 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
2034 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
2036 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
2037 we must set it to 3 to indicate this is a register
2038 operand in the regmem field. */
2039 if (!i
.mem_operands
)
2043 /* Fill in i.rm.reg field with extension opcode (if any). */
2044 if (i
.tm
.extension_opcode
!= None
)
2045 i
.rm
.reg
= i
.tm
.extension_opcode
;
2048 else if (i
.tm
.opcode_modifier
& (Seg2ShortForm
| Seg3ShortForm
))
2050 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
2052 as_bad (_("you can't `pop %%cs'"));
2055 i
.tm
.base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
2057 else if ((i
.tm
.base_opcode
& ~(D
|W
)) == MOV_AX_DISP32
)
2061 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
2063 /* For the string instructions that allow a segment override
2064 on one of their operands, the default segment is ds. */
2068 /* If a segment was explicitly specified,
2069 and the specified segment is not the default,
2070 use an opcode prefix to select it.
2071 If we never figured out what the default segment is,
2072 then default_seg will be zero at this point,
2073 and the specified segment prefix will always be used. */
2074 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
2076 if (! add_prefix (i
.seg
[0]->seg_prefix
))
2080 else if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
2082 /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc. */
2083 as_warn (_("translating to `%sp'"), i
.tm
.name
);
2087 /* Handle conversion of 'int $3' --> special int3 insn. */
2088 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
2090 i
.tm
.base_opcode
= INT3_OPCODE
;
2094 /* We are ready to output the insn. */
2099 if (i
.tm
.opcode_modifier
& Jump
)
2101 long n
= (long) i
.disps
[0]->X_add_number
;
2102 int prefix
= (i
.prefix
[DATA_PREFIX
] != 0);
2110 if (flag_16bit_code
)
2113 if (!intel_syntax
&& (i
.prefixes
!= 0))
2114 as_warn (_("skipping prefixes on this instruction"));
2116 if (i
.disps
[0]->X_op
== O_constant
)
2118 if (fits_in_signed_byte (n
))
2122 p
[0] = i
.tm
.base_opcode
;
2127 /* Use 16-bit jumps only for 16-bit code,
2128 because text segments are limited to 64K anyway;
2129 Use 32-bit jumps for 32-bit code, because they're faster,
2130 and a 16-bit jump will clear the top 16 bits of %eip. */
2131 int jmp_size
= code16
? 2 : 4;
2132 if (code16
&& !fits_in_signed_word (n
))
2134 as_bad (_("16-bit jump out of range"));
2138 if (i
.tm
.base_opcode
== JUMP_PC_RELATIVE
)
2140 /* unconditional jump */
2141 insn_size
+= prefix
+ 1 + jmp_size
;
2142 p
= frag_more (prefix
+ 1 + jmp_size
);
2144 *p
++ = DATA_PREFIX_OPCODE
;
2146 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
2150 /* conditional jump */
2151 insn_size
+= prefix
+ 2 + jmp_size
;
2152 p
= frag_more (prefix
+ 2 + jmp_size
);
2154 *p
++ = DATA_PREFIX_OPCODE
;
2155 *p
++ = TWO_BYTE_OPCODE_ESCAPE
;
2156 *p
++ = i
.tm
.base_opcode
+ 0x10;
2157 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
2163 int size
= code16
? 2 : 4;
2165 /* It's a symbol; end frag & setup for relax.
2166 Make sure there are more than 6 chars left in the current frag;
2167 if not we'll have to start a new one. */
2168 frag_grow (prefix
+ 1 + 2 + size
);
2169 insn_size
+= 1 + prefix
;
2170 p
= frag_more (1 + prefix
);
2172 *p
++ = DATA_PREFIX_OPCODE
;
2173 *p
= i
.tm
.base_opcode
;
2174 frag_var (rs_machine_dependent
,
2175 prefix
+ 2 + size
, /* 2 opcode/prefix + displacement */
2177 ((unsigned char) *p
== JUMP_PC_RELATIVE
2178 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
) | code16
2179 : ENCODE_RELAX_STATE (COND_JUMP
, SMALL
) | code16
),
2180 i
.disps
[0]->X_add_symbol
,
2184 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
2186 int size
= (i
.tm
.opcode_modifier
& JumpByte
) ? 1 : 4;
2187 long n
= (long) i
.disps
[0]->X_add_number
;
2189 if (size
== 1) /* then this is a loop or jecxz type instruction */
2191 if (i
.prefix
[ADDR_PREFIX
])
2194 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
2202 if (i
.prefix
[DATA_PREFIX
])
2205 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
2209 if (flag_16bit_code
)
2216 if (!intel_syntax
&& (i
.prefixes
!= 0))
2217 as_warn (_("skipping prefixes on this instruction"));
2219 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2221 insn_size
+= 1 + size
;
2222 p
= frag_more (1 + size
);
2226 insn_size
+= 2 + size
; /* opcode can be at most two bytes */
2227 p
= frag_more (2 + size
);
2228 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2230 *p
++ = i
.tm
.base_opcode
& 0xff;
2232 if (i
.disps
[0]->X_op
== O_constant
)
2234 if (size
== 1 && !fits_in_signed_byte (n
))
2236 as_bad (_("`%s' only takes byte displacement; %ld shortened to %d"),
2239 else if (size
== 2 && !fits_in_signed_word (n
))
2241 as_bad (_("16-bit jump out of range"));
2244 md_number_to_chars (p
, (valueT
) n
, size
);
2248 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2249 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
2253 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
2257 int prefix
= i
.prefix
[DATA_PREFIX
] != 0;
2265 if (flag_16bit_code
)
2269 reloc_type
= BFD_RELOC_32
;
2273 reloc_type
= BFD_RELOC_16
;
2276 if (!intel_syntax
&& (i
.prefixes
!= 0))
2277 as_warn (_("skipping prefixes on this instruction"));
2279 insn_size
+= prefix
+ 1 + 2 + size
; /* 1 opcode; 2 segment; offset */
2280 p
= frag_more (prefix
+ 1 + 2 + size
);
2282 *p
++ = DATA_PREFIX_OPCODE
;
2283 *p
++ = i
.tm
.base_opcode
;
2284 if (i
.imms
[1]->X_op
== O_constant
)
2286 long n
= (long) i
.imms
[1]->X_add_number
;
2288 if (size
== 2 && !fits_in_unsigned_word (n
))
2290 as_bad (_("16-bit jump out of range"));
2293 md_number_to_chars (p
, (valueT
) n
, size
);
2296 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2297 i
.imms
[1], 0, reloc_type
);
2298 if (i
.imms
[0]->X_op
!= O_constant
)
2299 as_bad (_("can't handle non absolute segment in `%s'"),
2301 md_number_to_chars (p
+ size
, (valueT
) i
.imms
[0]->X_add_number
, 2);
2305 /* Output normal instructions here. */
2308 /* The prefix bytes. */
2310 q
< i
.prefix
+ sizeof (i
.prefix
) / sizeof (i
.prefix
[0]);
2317 md_number_to_chars (p
, (valueT
) *q
, 1);
2321 /* Now the opcode; be careful about word order here! */
2322 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2325 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
2327 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
2331 /* put out high byte first: can't use md_number_to_chars! */
2332 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2333 *p
= i
.tm
.base_opcode
& 0xff;
2336 { /* opcode is either 3 or 4 bytes */
2337 if (i
.tm
.base_opcode
& 0xff000000)
2341 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
2348 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
2349 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2350 *p
= (i
.tm
.base_opcode
) & 0xff;
2353 /* Now the modrm byte and sib byte (if present). */
2354 if (i
.tm
.opcode_modifier
& Modrm
)
2358 md_number_to_chars (p
,
2359 (valueT
) (i
.rm
.regmem
<< 0
2363 /* If i.rm.regmem == ESP (4)
2364 && i.rm.mode != (Register mode)
2366 ==> need second modrm byte. */
2367 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
2369 && !(i
.base_reg
&& (i
.base_reg
->reg_type
& Reg16
) != 0))
2373 md_number_to_chars (p
,
2374 (valueT
) (i
.sib
.base
<< 0
2376 | i
.sib
.scale
<< 6),
2381 if (i
.disp_operands
)
2383 register unsigned int n
;
2385 for (n
= 0; n
< i
.operands
; n
++)
2389 if (i
.disps
[n
]->X_op
== O_constant
)
2392 long val
= (long) i
.disps
[n
]->X_add_number
;
2394 if (i
.types
[n
] & (Disp8
| Disp16
))
2399 mask
= ~ (long) 0xffff;
2400 if (i
.types
[n
] & Disp8
)
2403 mask
= ~ (long) 0xff;
2406 if ((val
& mask
) != 0 && (val
& mask
) != mask
)
2407 as_warn (_("%ld shortened to %ld"),
2411 p
= frag_more (size
);
2412 md_number_to_chars (p
, (valueT
) val
, size
);
2414 else if (i
.types
[n
] & Disp32
)
2418 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
2420 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_32
));
2423 { /* must be Disp16 */
2426 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 2,
2428 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_16
));
2432 } /* end displacement output */
2434 /* output immediate */
2437 register unsigned int n
;
2439 for (n
= 0; n
< i
.operands
; n
++)
2443 if (i
.imms
[n
]->X_op
== O_constant
)
2446 long val
= (long) i
.imms
[n
]->X_add_number
;
2448 if (i
.types
[n
] & (Imm8
| Imm8S
| Imm16
))
2453 mask
= ~ (long) 0xffff;
2454 if (i
.types
[n
] & (Imm8
| Imm8S
))
2457 mask
= ~ (long) 0xff;
2459 if ((val
& mask
) != 0 && (val
& mask
) != mask
)
2460 as_warn (_("%ld shortened to %ld"),
2464 p
= frag_more (size
);
2465 md_number_to_chars (p
, (valueT
) val
, size
);
2468 { /* not absolute_section */
2469 /* Need a 32-bit fixup (don't support 8bit
2470 non-absolute ims). Try to support other
2476 if (i
.types
[n
] & (Imm8
| Imm8S
))
2478 else if (i
.types
[n
] & Imm16
)
2483 p
= frag_more (size
);
2484 r_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2485 #ifdef BFD_ASSEMBLER
2486 if (r_type
== BFD_RELOC_32
2488 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
2489 && (i
.imms
[n
]->X_op
== O_symbol
2490 || (i
.imms
[n
]->X_op
== O_add
2491 && ((symbol_get_value_expression
2492 (i
.imms
[n
]->X_op_symbol
)->X_op
)
2495 r_type
= BFD_RELOC_386_GOTPC
;
2496 i
.imms
[n
]->X_add_number
+= 3;
2499 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2500 i
.imms
[n
], pcrel
, r_type
);
2504 } /* end immediate output */
2512 #endif /* DEBUG386 */
2516 static int i386_is_reg
PARAMS ((char *));
2519 i386_is_reg (reg_string
)
2522 register char *s
= reg_string
;
2524 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
2526 if (is_space_char (*s
))
2530 while ((*p
++ = register_chars
[(unsigned char) *s
++]) != '\0')
2531 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
2534 if (!hash_find (reg_hash
, reg_name_given
))
2540 static int i386_immediate
PARAMS ((char *));
2543 i386_immediate (imm_start
)
2546 char *save_input_line_pointer
;
2550 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2552 as_bad (_("Only 1 or 2 immediate operands are allowed"));
2556 exp
= &im_expressions
[i
.imm_operands
++];
2557 i
.imms
[this_operand
] = exp
;
2559 if (is_space_char (*imm_start
))
2562 save_input_line_pointer
= input_line_pointer
;
2563 input_line_pointer
= imm_start
;
2568 * We can have operands of the form
2569 * <symbol>@GOTOFF+<nnn>
2570 * Take the easy way out here and copy everything
2571 * into a temporary buffer...
2575 cp
= strchr (input_line_pointer
, '@');
2582 /* GOT relocations are not supported in 16 bit mode */
2583 if (flag_16bit_code
)
2584 as_bad (_("GOT relocations not supported in 16 bit mode"));
2586 if (GOT_symbol
== NULL
)
2587 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2589 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2591 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2594 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2596 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2599 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2601 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2605 as_bad (_("Bad reloc specifier in expression"));
2607 /* Replace the relocation token with ' ', so that errors like
2608 foo@GOTOFF1 will be detected. */
2609 first
= cp
- input_line_pointer
;
2610 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2611 memcpy (tmpbuf
, input_line_pointer
, first
);
2612 tmpbuf
[first
] = ' ';
2613 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2614 input_line_pointer
= tmpbuf
;
2619 exp_seg
= expression (exp
);
2622 if (*input_line_pointer
)
2623 as_bad (_("Ignoring junk `%s' after expression"), input_line_pointer
);
2625 input_line_pointer
= save_input_line_pointer
;
2627 if (exp
->X_op
== O_absent
)
2629 /* missing or bad expr becomes absolute 0 */
2630 as_bad (_("Missing or invalid immediate expression `%s' taken as 0"),
2632 exp
->X_op
= O_constant
;
2633 exp
->X_add_number
= 0;
2634 exp
->X_add_symbol
= (symbolS
*) 0;
2635 exp
->X_op_symbol
= (symbolS
*) 0;
2636 i
.types
[this_operand
] |= Imm
;
2638 else if (exp
->X_op
== O_constant
)
2641 if (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0))
2644 i
.types
[this_operand
] |=
2645 (bigimm
| smallest_imm_type ((long) exp
->X_add_number
));
2647 /* If a suffix is given, this operand may be shortended. */
2650 case WORD_MNEM_SUFFIX
:
2651 i
.types
[this_operand
] |= Imm16
;
2653 case BYTE_MNEM_SUFFIX
:
2654 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2659 else if (exp_seg
!= text_section
2660 && exp_seg
!= data_section
2661 && exp_seg
!= bss_section
2662 && exp_seg
!= undefined_section
2663 #ifdef BFD_ASSEMBLER
2664 && !bfd_is_com_section (exp_seg
)
2668 as_bad (_("Unimplemented segment type %d in operand"), exp_seg
);
2674 /* This is an address. The size of the address will be
2675 determined later, depending on destination register,
2676 suffix, or the default for the section. We exclude
2677 Imm8S here so that `push $foo' and other instructions
2678 with an Imm8S form will use Imm16 or Imm32. */
2679 i
.types
[this_operand
] |= (Imm8
| Imm16
| Imm32
);
2685 static int i386_scale
PARAMS ((char *));
2691 if (!isdigit (*scale
))
2698 i
.log2_scale_factor
= 0;
2701 i
.log2_scale_factor
= 1;
2704 i
.log2_scale_factor
= 2;
2707 i
.log2_scale_factor
= 3;
2711 as_bad (_("expecting scale factor of 1, 2, 4, or 8: got `%s'"),
2715 if (i
.log2_scale_factor
!= 0 && ! i
.index_reg
)
2717 as_warn (_("scale factor of %d without an index register"),
2718 1 << i
.log2_scale_factor
);
2719 #if SCALE1_WHEN_NO_INDEX
2720 i
.log2_scale_factor
= 0;
2726 static int i386_displacement
PARAMS ((char *, char *));
2729 i386_displacement (disp_start
, disp_end
)
2733 register expressionS
*exp
;
2735 char *save_input_line_pointer
;
2736 int bigdisp
= Disp32
;
2738 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2740 i
.types
[this_operand
] |= bigdisp
;
2742 exp
= &disp_expressions
[i
.disp_operands
];
2743 i
.disps
[this_operand
] = exp
;
2744 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2746 save_input_line_pointer
= input_line_pointer
;
2747 input_line_pointer
= disp_start
;
2748 END_STRING_AND_SAVE (disp_end
);
2750 #ifndef GCC_ASM_O_HACK
2751 #define GCC_ASM_O_HACK 0
2754 END_STRING_AND_SAVE (disp_end
+ 1);
2755 if ((i
.types
[this_operand
] & BaseIndex
) != 0
2756 && displacement_string_end
[-1] == '+')
2758 /* This hack is to avoid a warning when using the "o"
2759 constraint within gcc asm statements.
2762 #define _set_tssldt_desc(n,addr,limit,type) \
2763 __asm__ __volatile__ ( \
2765 "movw %w1,2+%0\n\t" \
2767 "movb %b1,4+%0\n\t" \
2768 "movb %4,5+%0\n\t" \
2769 "movb $0,6+%0\n\t" \
2770 "movb %h1,7+%0\n\t" \
2772 : "=o"(*(n)) : "q" (addr), "ri"(limit), "i"(type))
2774 This works great except that the output assembler ends
2775 up looking a bit weird if it turns out that there is
2776 no offset. You end up producing code that looks like:
2789 So here we provide the missing zero.
2792 *displacement_string_end
= '0';
2798 * We can have operands of the form
2799 * <symbol>@GOTOFF+<nnn>
2800 * Take the easy way out here and copy everything
2801 * into a temporary buffer...
2805 cp
= strchr (input_line_pointer
, '@');
2812 /* GOT relocations are not supported in 16 bit mode */
2813 if (flag_16bit_code
)
2814 as_bad (_("GOT relocations not supported in 16 bit mode"));
2816 if (GOT_symbol
== NULL
)
2817 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2819 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2821 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2824 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2826 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2829 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2831 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2835 as_bad (_("Bad reloc specifier in expression"));
2837 /* Replace the relocation token with ' ', so that errors like
2838 foo@GOTOFF1 will be detected. */
2839 first
= cp
- input_line_pointer
;
2840 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2841 memcpy (tmpbuf
, input_line_pointer
, first
);
2842 tmpbuf
[first
] = ' ';
2843 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2844 input_line_pointer
= tmpbuf
;
2849 exp_seg
= expression (exp
);
2851 #ifdef BFD_ASSEMBLER
2852 /* We do this to make sure that the section symbol is in
2853 the symbol table. We will ultimately change the relocation
2854 to be relative to the beginning of the section */
2855 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2857 if (S_IS_LOCAL(exp
->X_add_symbol
)
2858 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2859 section_symbol (S_GET_SEGMENT (exp
->X_add_symbol
));
2860 assert (exp
->X_op
== O_symbol
);
2861 exp
->X_op
= O_subtract
;
2862 exp
->X_op_symbol
= GOT_symbol
;
2863 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2868 if (*input_line_pointer
)
2869 as_bad (_("Ignoring junk `%s' after expression"),
2870 input_line_pointer
);
2872 RESTORE_END_STRING (disp_end
+ 1);
2874 RESTORE_END_STRING (disp_end
);
2875 input_line_pointer
= save_input_line_pointer
;
2877 if (exp
->X_op
== O_constant
)
2879 if (fits_in_signed_byte (exp
->X_add_number
))
2880 i
.types
[this_operand
] |= Disp8
;
2883 else if (exp_seg
!= text_section
2884 && exp_seg
!= data_section
2885 && exp_seg
!= bss_section
2886 && exp_seg
!= undefined_section
)
2888 as_bad (_ ("Unimplemented segment type %d in operand"), exp_seg
);
2895 static int i386_operand_modifier
PARAMS ((char **, int));
2898 i386_operand_modifier (op_string
, got_a_float
)
2902 if (!strncasecmp (*op_string
, "BYTE PTR", 8))
2904 i
.suffix
= BYTE_MNEM_SUFFIX
;
2909 else if (!strncasecmp (*op_string
, "WORD PTR", 8))
2911 i
.suffix
= WORD_MNEM_SUFFIX
;
2916 else if (!strncasecmp (*op_string
, "DWORD PTR", 9))
2919 i
.suffix
= SHORT_MNEM_SUFFIX
;
2921 i
.suffix
= DWORD_MNEM_SUFFIX
;
2926 else if (!strncasecmp (*op_string
, "QWORD PTR", 9))
2928 i
.suffix
= INTEL_DWORD_MNEM_SUFFIX
;
2933 else if (!strncasecmp (*op_string
, "XWORD PTR", 9))
2935 i
.suffix
= LONG_DOUBLE_MNEM_SUFFIX
;
2940 else if (!strncasecmp (*op_string
, "SHORT", 5))
2946 else if (!strncasecmp (*op_string
, "OFFSET FLAT:", 12))
2952 else if (!strncasecmp (*op_string
, "FLAT", 4))
2958 else return NONE_FOUND
;
2961 static char * build_displacement_string
PARAMS ((int, char *));
2964 build_displacement_string (initial_disp
, op_string
)
2968 char *temp_string
= (char *) malloc (strlen (op_string
) + 1);
2969 char *end_of_operand_string
;
2973 temp_string
[0] = '\0';
2974 tc
= end_of_operand_string
= strchr (op_string
, '[');
2975 if ( initial_disp
&& !end_of_operand_string
)
2977 strcpy (temp_string
, op_string
);
2978 return (temp_string
);
2981 /* Build the whole displacement string */
2984 strncpy (temp_string
, op_string
, end_of_operand_string
- op_string
);
2985 temp_string
[end_of_operand_string
- op_string
] = '\0';
2989 temp_disp
= op_string
;
2991 while (*temp_disp
!= '\0')
2993 int add_minus
= (*temp_disp
== '-');
2995 if (*temp_disp
== '+' || *temp_disp
== '-' || *temp_disp
== '[')
2998 if (is_space_char (*temp_disp
))
3001 /* Don't consider registers */
3002 if (*temp_disp
!= REGISTER_PREFIX
3003 && !(allow_naked_reg
&& i386_is_reg (temp_disp
)))
3005 char *string_start
= temp_disp
;
3007 while (*temp_disp
!= ']'
3008 && *temp_disp
!= '+'
3009 && *temp_disp
!= '-'
3010 && *temp_disp
!= '*')
3014 strcat (temp_string
, "-");
3016 strcat (temp_string
, "+");
3018 strncat (temp_string
, string_start
, temp_disp
- string_start
);
3019 if (*temp_disp
== '+' || *temp_disp
== '-')
3023 while (*temp_disp
!= '\0'
3024 && *temp_disp
!= '+'
3025 && *temp_disp
!= '-')
3032 static int i386_parse_seg
PARAMS ((char *));
3035 i386_parse_seg (op_string
)
3038 if (is_space_char (*op_string
))
3041 /* Should be one of es, cs, ss, ds fs or gs */
3042 switch (*op_string
++)
3045 i
.seg
[i
.mem_operands
] = &es
;
3048 i
.seg
[i
.mem_operands
] = &cs
;
3051 i
.seg
[i
.mem_operands
] = &ss
;
3054 i
.seg
[i
.mem_operands
] = &ds
;
3057 i
.seg
[i
.mem_operands
] = &fs
;
3060 i
.seg
[i
.mem_operands
] = &gs
;
3063 as_bad (_("bad segment name `%s'"), op_string
);
3067 if (*op_string
++ != 's')
3069 as_bad (_("bad segment name `%s'"), op_string
);
3073 if (is_space_char (*op_string
))
3076 if (*op_string
!= ':')
3078 as_bad (_("bad segment name `%s'"), op_string
);
3086 static int i386_index_check
PARAMS((const char *));
3088 /* Make sure the memory operand we've been dealt is valid.
3089 Returns 1 on success, 0 on a failure.
3092 i386_index_check (operand_string
)
3093 const char *operand_string
;
3095 #if INFER_ADDR_PREFIX
3100 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0) ?
3101 /* 16 bit mode checks */
3103 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
3104 != (Reg16
|BaseIndex
)))
3106 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
3107 != (Reg16
|BaseIndex
))
3109 && i
.base_reg
->reg_num
< 6
3110 && i
.index_reg
->reg_num
>= 6
3111 && i
.log2_scale_factor
== 0)))) :
3112 /* 32 bit mode checks */
3114 && (i
.base_reg
->reg_type
& Reg32
) == 0)
3116 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
3117 != (Reg32
|BaseIndex
)))))
3119 #if INFER_ADDR_PREFIX
3120 if (i
.prefix
[ADDR_PREFIX
] == 0 && stackop_size
!= '\0')
3122 i
.prefix
[ADDR_PREFIX
] = ADDR_PREFIX_OPCODE
;
3129 as_bad (_("`%s' is not a valid base/index expression"),
3132 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3134 flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0) ? "16" : "32");
3140 static int i386_intel_memory_operand
PARAMS ((char *));
3143 i386_intel_memory_operand (operand_string
)
3144 char *operand_string
;
3146 char *op_string
= operand_string
;
3147 char *end_of_operand_string
;
3149 if ((i
.mem_operands
== 1
3150 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3151 || i
.mem_operands
== 2)
3153 as_bad (_("too many memory references for `%s'"),
3154 current_templates
->start
->name
);
3158 /* Look for displacement preceding open bracket */
3159 if (*op_string
!= '[')
3164 end_seg
= strchr (op_string
, ':');
3167 if (!i386_parse_seg (op_string
))
3169 op_string
= end_seg
+ 1;
3172 temp_string
= build_displacement_string (true, op_string
);
3174 if (i
.disp_operands
== 0 &&
3175 !i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3178 end_of_operand_string
= strchr (op_string
, '[');
3179 if (!end_of_operand_string
)
3180 end_of_operand_string
= op_string
+ strlen (op_string
);
3182 if (is_space_char (*end_of_operand_string
))
3183 --end_of_operand_string
;
3185 op_string
= end_of_operand_string
;
3188 if (*op_string
== '[')
3192 /* Pick off each component and figure out where it belongs */
3194 end_of_operand_string
= op_string
;
3196 while (*op_string
!= ']')
3199 while (*end_of_operand_string
!= '+'
3200 && *end_of_operand_string
!= '-'
3201 && *end_of_operand_string
!= '*'
3202 && *end_of_operand_string
!= ']')
3203 end_of_operand_string
++;
3205 if (*op_string
== '+')
3207 char *temp_string
= op_string
+ 1;
3208 if (is_space_char (*temp_string
))
3210 if (*temp_string
== REGISTER_PREFIX
3211 || (allow_naked_reg
&& i386_is_reg (temp_string
)))
3215 if (*op_string
== REGISTER_PREFIX
3216 || (allow_naked_reg
&& i386_is_reg (op_string
)))
3218 const reg_entry
*temp_reg
;
3221 END_STRING_AND_SAVE (end_of_operand_string
);
3222 temp_reg
= parse_register (op_string
, &end_op
);
3223 RESTORE_END_STRING (end_of_operand_string
);
3225 if (temp_reg
== NULL
)
3228 if (i
.base_reg
== NULL
)
3229 i
.base_reg
= temp_reg
;
3231 i
.index_reg
= temp_reg
;
3233 i
.types
[this_operand
] |= BaseIndex
;
3236 else if (is_digit_char (*op_string
) || *op_string
== '+' || *op_string
== '-')
3239 char *temp_string
= build_displacement_string (false, op_string
);
3241 if (*temp_string
== '+')
3244 if (i
.disp_operands
== 0 &&
3245 !i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3249 end_of_operand_string
= op_string
;
3250 while (*end_of_operand_string
!= ']'
3251 && *end_of_operand_string
!= '+'
3252 && *end_of_operand_string
!= '-'
3253 && *end_of_operand_string
!= '*')
3254 ++end_of_operand_string
;
3256 else if (*op_string
== '*')
3260 if (i
.base_reg
&& !i
.index_reg
)
3262 i
.index_reg
= i
.base_reg
;
3266 if (!i386_scale (op_string
))
3269 op_string
= end_of_operand_string
;
3270 ++end_of_operand_string
;
3274 if (i386_index_check (operand_string
) == 0)
3282 i386_intel_operand (operand_string
, got_a_float
)
3283 char *operand_string
;
3286 char *op_string
= operand_string
;
3288 int operand_modifier
= i386_operand_modifier (&op_string
, got_a_float
);
3289 if (is_space_char (*op_string
))
3292 switch (operand_modifier
)
3299 if (!i386_intel_memory_operand (op_string
))
3305 if (!i386_immediate (op_string
))
3311 /* Should be register or immediate */
3312 if (is_digit_char (*op_string
)
3313 && strchr (op_string
, '[') == 0)
3315 if (!i386_immediate (op_string
))
3318 else if (*op_string
== REGISTER_PREFIX
3320 && i386_is_reg (op_string
)))
3322 register const reg_entry
* r
;
3325 r
= parse_register (op_string
, &end_op
);
3329 /* Check for a segment override by searching for ':' after a
3330 segment register. */
3332 if (is_space_char (*op_string
))
3334 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3339 i
.seg
[i
.mem_operands
] = &es
;
3342 i
.seg
[i
.mem_operands
] = &cs
;
3345 i
.seg
[i
.mem_operands
] = &ss
;
3348 i
.seg
[i
.mem_operands
] = &ds
;
3351 i
.seg
[i
.mem_operands
] = &fs
;
3354 i
.seg
[i
.mem_operands
] = &gs
;
3359 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3360 i
.regs
[this_operand
] = r
;
3365 if (!i386_intel_memory_operand (op_string
))
3374 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
3378 i386_operand (operand_string
)
3379 char *operand_string
;
3381 char *op_string
= operand_string
;
3383 if (is_space_char (*op_string
))
3386 /* We check for an absolute prefix (differentiating,
3387 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
3388 if (*op_string
== ABSOLUTE_PREFIX
)
3391 if (is_space_char (*op_string
))
3393 i
.types
[this_operand
] |= JumpAbsolute
;
3396 /* Check if operand is a register. */
3397 if (*op_string
== REGISTER_PREFIX
3398 || (allow_naked_reg
&& i386_is_reg (op_string
)))
3400 register const reg_entry
*r
;
3403 r
= parse_register (op_string
, &end_op
);
3407 /* Check for a segment override by searching for ':' after a
3408 segment register. */
3410 if (is_space_char (*op_string
))
3412 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3417 i
.seg
[i
.mem_operands
] = &es
;
3420 i
.seg
[i
.mem_operands
] = &cs
;
3423 i
.seg
[i
.mem_operands
] = &ss
;
3426 i
.seg
[i
.mem_operands
] = &ds
;
3429 i
.seg
[i
.mem_operands
] = &fs
;
3432 i
.seg
[i
.mem_operands
] = &gs
;
3436 /* Skip the ':' and whitespace. */
3438 if (is_space_char (*op_string
))
3441 if (!is_digit_char (*op_string
)
3442 && !is_identifier_char (*op_string
)
3443 && *op_string
!= '('
3444 && *op_string
!= ABSOLUTE_PREFIX
)
3446 as_bad (_("bad memory operand `%s'"), op_string
);
3449 /* Handle case of %es:*foo. */
3450 if (*op_string
== ABSOLUTE_PREFIX
)
3453 if (is_space_char (*op_string
))
3455 i
.types
[this_operand
] |= JumpAbsolute
;
3457 goto do_memory_reference
;
3461 as_bad (_("Junk `%s' after register"), op_string
);
3464 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3465 i
.regs
[this_operand
] = r
;
3468 else if (*op_string
== IMMEDIATE_PREFIX
)
3469 { /* ... or an immediate */
3471 if (i
.types
[this_operand
] & JumpAbsolute
)
3473 as_bad (_("Immediate operand illegal with absolute jump"));
3476 if (!i386_immediate (op_string
))
3479 else if (is_digit_char (*op_string
)
3480 || is_identifier_char (*op_string
)
3481 || *op_string
== '(' )
3483 /* This is a memory reference of some sort. */
3484 char *end_of_operand_string
;
3485 register char *base_string
;
3486 int found_base_index_form
;
3488 /* Start and end of displacement string expression (if found). */
3489 char *displacement_string_start
;
3490 char *displacement_string_end
;
3492 do_memory_reference
:
3493 displacement_string_start
= NULL
;
3494 displacement_string_end
= NULL
;
3496 if ((i
.mem_operands
== 1
3497 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3498 || i
.mem_operands
== 2)
3500 as_bad (_("too many memory references for `%s'"),
3501 current_templates
->start
->name
);
3505 /* Check for base index form. We detect the base index form by
3506 looking for an ')' at the end of the operand, searching
3507 for the '(' matching it, and finding a REGISTER_PREFIX or ','
3509 found_base_index_form
= 0;
3510 end_of_operand_string
= op_string
+ strlen (op_string
);
3512 --end_of_operand_string
;
3513 if (is_space_char (*end_of_operand_string
))
3514 --end_of_operand_string
;
3516 base_string
= end_of_operand_string
;
3518 if (*base_string
== ')')
3520 unsigned int parens_balanced
= 1;
3521 /* We've already checked that the number of left & right ()'s are
3522 equal, so this loop will not be infinite. */
3526 if (*base_string
== ')')
3528 if (*base_string
== '(')
3531 while (parens_balanced
);
3533 /* If there is a displacement set-up for it to be parsed later. */
3534 displacement_string_start
= op_string
;
3535 displacement_string_end
= base_string
;
3537 /* Skip past '(' and whitespace. */
3539 if (is_space_char (*base_string
))
3542 if (*base_string
== REGISTER_PREFIX
3543 || (allow_naked_reg
&& i386_is_reg (base_string
))
3544 || *base_string
== ',')
3545 found_base_index_form
= 1;
3548 /* If we can't parse a base index register expression, we've found
3549 a pure displacement expression. We set up displacement_string_start
3550 and displacement_string_end for the code below. */
3551 if (!found_base_index_form
)
3553 displacement_string_start
= op_string
;
3554 displacement_string_end
= end_of_operand_string
+ 1;
3558 i
.types
[this_operand
] |= BaseIndex
;
3560 /* Find base register (if any). */
3561 if (*base_string
!= ',')
3565 /* Trim off the closing ')' so that parse_register won't
3567 END_STRING_AND_SAVE (end_of_operand_string
);
3568 i
.base_reg
= parse_register (base_string
, &end_op
);
3569 RESTORE_END_STRING (end_of_operand_string
);
3571 if (i
.base_reg
== NULL
)
3574 base_string
= end_op
;
3575 if (is_space_char (*base_string
))
3579 /* There may be an index reg or scale factor here. */
3580 if (*base_string
== ',')
3583 if (is_space_char (*base_string
))
3586 if (*base_string
== REGISTER_PREFIX
3587 || (allow_naked_reg
&& i386_is_reg (base_string
)))
3591 END_STRING_AND_SAVE (end_of_operand_string
);
3592 i
.index_reg
= parse_register (base_string
, &end_op
);
3593 RESTORE_END_STRING (end_of_operand_string
);
3595 if (i
.index_reg
== NULL
)
3598 base_string
= end_op
;
3599 if (is_space_char (*base_string
))
3601 if (*base_string
== ',')
3604 if (is_space_char (*base_string
))
3607 else if (*base_string
!= ')' )
3609 as_bad (_("expecting `,' or `)' after index register in `%s'"),
3615 /* Check for scale factor. */
3616 if (isdigit ((unsigned char) *base_string
))
3618 if (!i386_scale (base_string
))
3622 if (is_space_char (*base_string
))
3624 if (*base_string
!= ')')
3626 as_bad (_("expecting `)' after scale factor in `%s'"),
3631 else if (!i
.index_reg
)
3633 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
3638 else if (*base_string
!= ')')
3640 as_bad (_("expecting `,' or `)' after base register in `%s'"),
3646 /* If there's an expression beginning the operand, parse it,
3647 assuming displacement_string_start and
3648 displacement_string_end are meaningful. */
3649 if (displacement_string_start
!= displacement_string_end
)
3651 if (!i386_displacement (displacement_string_start
,
3652 displacement_string_end
))
3656 /* Special case for (%dx) while doing input/output op. */
3658 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
3660 && i
.log2_scale_factor
== 0
3661 && i
.seg
[i
.mem_operands
] == 0
3662 && (i
.types
[this_operand
] & Disp
) == 0)
3664 i
.types
[this_operand
] = InOutPortReg
;
3668 if (i386_index_check (operand_string
) == 0)
3673 { /* it's not a memory operand; argh! */
3674 as_bad (_("invalid char %s beginning operand %d `%s'"),
3675 output_invalid (*op_string
),
3680 return 1; /* normal return */
3684 * md_estimate_size_before_relax()
3686 * Called just before relax().
3687 * Any symbol that is now undefined will not become defined.
3688 * Return the correct fr_subtype in the frag.
3689 * Return the initial "guess for fr_var" to caller.
3690 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
3691 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
3692 * Although it may not be explicit in the frag, pretend fr_var starts with a
3696 md_estimate_size_before_relax (fragP
, segment
)
3697 register fragS
*fragP
;
3698 register segT segment
;
3700 register unsigned char *opcode
;
3701 register int old_fr_fix
;
3703 old_fr_fix
= fragP
->fr_fix
;
3704 opcode
= (unsigned char *) fragP
->fr_opcode
;
3705 /* We've already got fragP->fr_subtype right; all we have to do is
3706 check for un-relaxable symbols. */
3707 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
3709 /* symbol is undefined in this segment */
3710 int code16
= fragP
->fr_subtype
& CODE16
;
3711 int size
= code16
? 2 : 4;
3712 int pcrel_reloc
= code16
? BFD_RELOC_16_PCREL
: BFD_RELOC_32_PCREL
;
3716 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
3717 opcode
[0] = 0xe9; /* dword disp jmp */
3718 fragP
->fr_fix
+= size
;
3719 fix_new (fragP
, old_fr_fix
, size
,
3721 fragP
->fr_offset
, 1,
3722 (GOT_symbol
&& /* Not quite right - we should switch on
3723 presence of @PLT, but I cannot see how
3724 to get to that from here. We should have
3725 done this in md_assemble to really
3726 get it right all of the time, but I
3727 think it does not matter that much, as
3728 this will be right most of the time. ERY*/
3729 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3730 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
3734 /* This changes the byte-displacement jump 0x7N
3735 to the dword-displacement jump 0x0f8N. */
3736 opcode
[1] = opcode
[0] + 0x10;
3737 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
3738 fragP
->fr_fix
+= 1 + size
; /* we've added an opcode byte */
3739 fix_new (fragP
, old_fr_fix
+ 1, size
,
3741 fragP
->fr_offset
, 1,
3742 (GOT_symbol
&& /* Not quite right - we should switch on
3743 presence of @PLT, but I cannot see how
3744 to get to that from here. ERY */
3745 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3746 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
3751 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
3752 } /* md_estimate_size_before_relax() */
3755 * md_convert_frag();
3757 * Called after relax() is finished.
3758 * In: Address of frag.
3759 * fr_type == rs_machine_dependent.
3760 * fr_subtype is what the address relaxed to.
3762 * Out: Any fixSs and constants are set up.
3763 * Caller will turn frag into a ".space 0".
3765 #ifndef BFD_ASSEMBLER
3767 md_convert_frag (headers
, sec
, fragP
)
3768 object_headers
*headers ATTRIBUTE_UNUSED
;
3769 segT sec ATTRIBUTE_UNUSED
;
3770 register fragS
*fragP
;
3773 md_convert_frag (abfd
, sec
, fragP
)
3774 bfd
*abfd ATTRIBUTE_UNUSED
;
3775 segT sec ATTRIBUTE_UNUSED
;
3776 register fragS
*fragP
;
3779 register unsigned char *opcode
;
3780 unsigned char *where_to_put_displacement
= NULL
;
3781 unsigned int target_address
;
3782 unsigned int opcode_address
;
3783 unsigned int extension
= 0;
3784 int displacement_from_opcode_start
;
3786 opcode
= (unsigned char *) fragP
->fr_opcode
;
3788 /* Address we want to reach in file space. */
3789 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
3790 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
3791 target_address
+= symbol_get_frag (fragP
->fr_symbol
)->fr_address
;
3794 /* Address opcode resides at in file space. */
3795 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
3797 /* Displacement from opcode start to fill into instruction. */
3798 displacement_from_opcode_start
= target_address
- opcode_address
;
3800 switch (fragP
->fr_subtype
)
3802 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL
):
3803 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL16
):
3804 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
):
3805 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL16
):
3806 /* don't have to change opcode */
3807 extension
= 1; /* 1 opcode + 1 displacement */
3808 where_to_put_displacement
= &opcode
[1];
3811 case ENCODE_RELAX_STATE (COND_JUMP
, BIG
):
3812 extension
= 5; /* 2 opcode + 4 displacement */
3813 opcode
[1] = opcode
[0] + 0x10;
3814 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3815 where_to_put_displacement
= &opcode
[2];
3818 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
):
3819 extension
= 4; /* 1 opcode + 4 displacement */
3821 where_to_put_displacement
= &opcode
[1];
3824 case ENCODE_RELAX_STATE (COND_JUMP
, BIG16
):
3825 extension
= 3; /* 2 opcode + 2 displacement */
3826 opcode
[1] = opcode
[0] + 0x10;
3827 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3828 where_to_put_displacement
= &opcode
[2];
3831 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
):
3832 extension
= 2; /* 1 opcode + 2 displacement */
3834 where_to_put_displacement
= &opcode
[1];
3838 BAD_CASE (fragP
->fr_subtype
);
3841 /* now put displacement after opcode */
3842 md_number_to_chars ((char *) where_to_put_displacement
,
3843 (valueT
) (displacement_from_opcode_start
- extension
),
3844 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
3845 fragP
->fr_fix
+= extension
;
3849 int md_short_jump_size
= 2; /* size of byte displacement jmp */
3850 int md_long_jump_size
= 5; /* size of dword displacement jmp */
3851 const int md_reloc_size
= 8; /* Size of relocation record */
3854 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3856 addressT from_addr
, to_addr
;
3857 fragS
*frag ATTRIBUTE_UNUSED
;
3858 symbolS
*to_symbol ATTRIBUTE_UNUSED
;
3862 offset
= to_addr
- (from_addr
+ 2);
3863 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
3864 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
3868 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3870 addressT from_addr
, to_addr
;
3876 if (flag_do_long_jump
)
3878 offset
= to_addr
- S_GET_VALUE (to_symbol
);
3879 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
3880 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3881 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
3882 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
3886 offset
= to_addr
- (from_addr
+ 5);
3887 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
3888 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3892 /* Apply a fixup (fixS) to segment data, once it has been determined
3893 by our caller that we have all the info we need to fix it up.
3895 On the 386, immediates, displacements, and data pointers are all in
3896 the same (little-endian) format, so we don't need to care about which
3900 md_apply_fix3 (fixP
, valp
, seg
)
3901 fixS
*fixP
; /* The fix we're to put in. */
3902 valueT
*valp
; /* Pointer to the value of the bits. */
3903 segT seg ATTRIBUTE_UNUSED
; /* Segment fix is from. */
3905 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3906 valueT value
= *valp
;
3908 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
3911 switch (fixP
->fx_r_type
)
3917 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3920 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
3923 fixP
->fx_r_type
= BFD_RELOC_8_PCREL
;
3929 * This is a hack. There should be a better way to
3932 if ((fixP
->fx_r_type
== BFD_RELOC_32_PCREL
3933 || fixP
->fx_r_type
== BFD_RELOC_16_PCREL
3934 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
)
3938 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3940 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
3943 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3945 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3946 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3947 && (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
3948 || symbol_section_p (fixP
->fx_addsy
))
3949 && ! S_IS_EXTERNAL (fixP
->fx_addsy
)
3950 && ! S_IS_WEAK (fixP
->fx_addsy
)
3951 && S_IS_DEFINED (fixP
->fx_addsy
)
3952 && ! S_IS_COMMON (fixP
->fx_addsy
))
3954 /* Yes, we add the values in twice. This is because
3955 bfd_perform_relocation subtracts them out again. I think
3956 bfd_perform_relocation is broken, but I don't dare change
3958 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3961 #if defined (OBJ_COFF) && defined (TE_PE)
3962 /* For some reason, the PE format does not store a section
3963 address offset for a PC relative symbol. */
3964 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
3965 value
+= md_pcrel_from (fixP
);
3969 /* Fix a few things - the dynamic linker expects certain values here,
3970 and we must not dissappoint it. */
3971 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3972 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3974 switch (fixP
->fx_r_type
) {
3975 case BFD_RELOC_386_PLT32
:
3976 /* Make the jump instruction point to the address of the operand. At
3977 runtime we merely add the offset to the actual PLT entry. */
3980 case BFD_RELOC_386_GOTPC
:
3982 * This is tough to explain. We end up with this one if we have
3983 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
3984 * here is to obtain the absolute address of the GOT, and it is strongly
3985 * preferable from a performance point of view to avoid using a runtime
3986 * relocation for this. The actual sequence of instructions often look
3992 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
3994 * The call and pop essentially return the absolute address of
3995 * the label .L66 and store it in %ebx. The linker itself will
3996 * ultimately change the first operand of the addl so that %ebx points to
3997 * the GOT, but to keep things simple, the .o file must have this operand
3998 * set so that it generates not the absolute address of .L66, but the
3999 * absolute address of itself. This allows the linker itself simply
4000 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
4001 * added in, and the addend of the relocation is stored in the operand
4002 * field for the instruction itself.
4004 * Our job here is to fix the operand so that it would add the correct
4005 * offset so that %ebx would point to itself. The thing that is tricky is
4006 * that .-.L66 will point to the beginning of the instruction, so we need
4007 * to further modify the operand so that it will point to itself.
4008 * There are other cases where you have something like:
4010 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
4012 * and here no correction would be required. Internally in the assembler
4013 * we treat operands of this form as not being pcrel since the '.' is
4014 * explicitly mentioned, and I wonder whether it would simplify matters
4015 * to do it this way. Who knows. In earlier versions of the PIC patches,
4016 * the pcrel_adjust field was used to store the correction, but since the
4017 * expression is not pcrel, I felt it would be confusing to do it this way.
4021 case BFD_RELOC_386_GOT32
:
4022 value
= 0; /* Fully resolved at runtime. No addend. */
4024 case BFD_RELOC_386_GOTOFF
:
4027 case BFD_RELOC_VTABLE_INHERIT
:
4028 case BFD_RELOC_VTABLE_ENTRY
:
4035 #endif /* defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) */
4037 #endif /* defined (BFD_ASSEMBLER) && !defined (TE_Mach) */
4038 md_number_to_chars (p
, value
, fixP
->fx_size
);
4044 /* This is never used. */
4045 long /* Knows about the byte order in a word. */
4046 md_chars_to_number (con
, nbytes
)
4047 unsigned char con
[]; /* Low order byte 1st. */
4048 int nbytes
; /* Number of bytes in the input. */
4051 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
4053 retval
<<= BITS_PER_CHAR
;
4061 #define MAX_LITTLENUMS 6
4063 /* Turn the string pointed to by litP into a floating point constant of type
4064 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
4065 is stored in *sizeP . An error message is returned, or NULL on OK. */
4067 md_atof (type
, litP
, sizeP
)
4073 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
4074 LITTLENUM_TYPE
*wordP
;
4096 return _("Bad call to md_atof ()");
4098 t
= atof_ieee (input_line_pointer
, type
, words
);
4100 input_line_pointer
= t
;
4102 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
4103 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
4104 the bigendian 386. */
4105 for (wordP
= words
+ prec
- 1; prec
--;)
4107 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
4108 litP
+= sizeof (LITTLENUM_TYPE
);
4113 char output_invalid_buf
[8];
4115 static char * output_invalid
PARAMS ((int));
4122 sprintf (output_invalid_buf
, "'%c'", c
);
4124 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
4125 return output_invalid_buf
;
4128 /* REG_STRING starts *before* REGISTER_PREFIX. */
4130 static const reg_entry
* parse_register
PARAMS ((char *, char **));
4132 static const reg_entry
*
4133 parse_register (reg_string
, end_op
)
4137 register char *s
= reg_string
;
4139 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
4142 /* Skip possible REGISTER_PREFIX and possible whitespace. */
4143 if (*s
== REGISTER_PREFIX
)
4146 if (is_space_char (*s
))
4150 while ((*p
++ = register_chars
[(unsigned char) *s
++]) != '\0')
4152 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
4154 if (!allow_naked_reg
)
4157 as_bad (_("bad register name `%s'"), reg_name_given
);
4159 return (const reg_entry
*) NULL
;
4165 r
= (const reg_entry
*) hash_find (reg_hash
, reg_name_given
);
4169 if (!allow_naked_reg
)
4170 as_bad (_("bad register name `%s'"), reg_name_given
);
4171 return (const reg_entry
*) NULL
;
4178 CONST
char *md_shortopts
= "kmVQ:";
4180 CONST
char *md_shortopts
= "m";
4182 struct option md_longopts
[] = {
4183 {NULL
, no_argument
, NULL
, 0}
4185 size_t md_longopts_size
= sizeof (md_longopts
);
4188 md_parse_option (c
, arg
)
4190 char *arg ATTRIBUTE_UNUSED
;
4195 flag_do_long_jump
= 1;
4198 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4199 /* -k: Ignore for FreeBSD compatibility. */
4203 /* -V: SVR4 argument to print version ID. */
4205 print_version_id ();
4208 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
4209 should be emitted or not. FIXME: Not implemented. */
4221 md_show_usage (stream
)
4224 fprintf (stream
, _("\
4225 -m do long jump\n"));
4228 #ifdef BFD_ASSEMBLER
4229 #ifdef OBJ_MAYBE_ELF
4230 #ifdef OBJ_MAYBE_COFF
4232 /* Pick the target format to use. */
4235 i386_target_format ()
4237 switch (OUTPUT_FLAVOR
)
4239 case bfd_target_coff_flavour
:
4241 case bfd_target_elf_flavour
:
4242 return "elf32-i386";
4249 #endif /* OBJ_MAYBE_COFF */
4250 #endif /* OBJ_MAYBE_ELF */
4251 #endif /* BFD_ASSEMBLER */
4255 md_undefined_symbol (name
)
4258 if (*name
== '_' && *(name
+1) == 'G'
4259 && strcmp(name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4263 if (symbol_find (name
))
4264 as_bad (_("GOT already in symbol table"));
4265 GOT_symbol
= symbol_new (name
, undefined_section
,
4266 (valueT
) 0, &zero_address_frag
);
4273 /* Round up a section size to the appropriate boundary. */
4275 md_section_align (segment
, size
)
4276 segT segment ATTRIBUTE_UNUSED
;
4280 #ifdef BFD_ASSEMBLER
4281 /* For a.out, force the section size to be aligned. If we don't do
4282 this, BFD will align it for us, but it will not write out the
4283 final bytes of the section. This may be a bug in BFD, but it is
4284 easier to fix it here since that is how the other a.out targets
4288 align
= bfd_get_section_alignment (stdoutput
, segment
);
4289 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
4296 /* On the i386, PC-relative offsets are relative to the start of the
4297 next instruction. That is, the address of the offset, plus its
4298 size, since the offset is always the last part of the insn. */
4301 md_pcrel_from (fixP
)
4304 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4311 int ignore ATTRIBUTE_UNUSED
;
4315 temp
= get_absolute_expression ();
4316 subseg_set (bss_section
, (subsegT
) temp
);
4317 demand_empty_rest_of_line ();
4323 #ifdef BFD_ASSEMBLER
4326 i386_validate_fix (fixp
)
4329 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
4331 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
4337 tc_gen_reloc (section
, fixp
)
4338 asection
*section ATTRIBUTE_UNUSED
;
4342 bfd_reloc_code_real_type code
;
4344 switch (fixp
->fx_r_type
)
4346 case BFD_RELOC_386_PLT32
:
4347 case BFD_RELOC_386_GOT32
:
4348 case BFD_RELOC_386_GOTOFF
:
4349 case BFD_RELOC_386_GOTPC
:
4351 case BFD_RELOC_VTABLE_ENTRY
:
4352 case BFD_RELOC_VTABLE_INHERIT
:
4353 code
= fixp
->fx_r_type
;
4358 switch (fixp
->fx_size
)
4361 as_bad (_("Can not do %d byte pc-relative relocation"),
4363 code
= BFD_RELOC_32_PCREL
;
4365 case 1: code
= BFD_RELOC_8_PCREL
; break;
4366 case 2: code
= BFD_RELOC_16_PCREL
; break;
4367 case 4: code
= BFD_RELOC_32_PCREL
; break;
4372 switch (fixp
->fx_size
)
4375 as_bad (_("Can not do %d byte relocation"), fixp
->fx_size
);
4376 code
= BFD_RELOC_32
;
4378 case 1: code
= BFD_RELOC_8
; break;
4379 case 2: code
= BFD_RELOC_16
; break;
4380 case 4: code
= BFD_RELOC_32
; break;
4386 if (code
== BFD_RELOC_32
4388 && fixp
->fx_addsy
== GOT_symbol
)
4389 code
= BFD_RELOC_386_GOTPC
;
4391 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4392 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4393 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4395 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4396 /* HACK: Since i386 ELF uses Rel instead of Rela, encode the
4397 vtable entry to be used in the relocation's section offset. */
4398 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
4399 rel
->address
= fixp
->fx_offset
;
4402 rel
->addend
= fixp
->fx_addnumber
;
4406 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
4407 if (rel
->howto
== NULL
)
4409 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4410 _("Cannot represent relocation type %s"),
4411 bfd_get_reloc_code_name (code
));
4412 /* Set howto to a garbage value so that we can keep going. */
4413 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4414 assert (rel
->howto
!= NULL
);
4420 #else /* ! BFD_ASSEMBLER */
4422 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
4424 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
4427 relax_addressT segment_address_in_file
;
4430 * In: length of relocation (or of address) in chars: 1, 2 or 4.
4431 * Out: GNU LD relocation length code: 0, 1, or 2.
4434 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
4437 know (fixP
->fx_addsy
!= NULL
);
4439 md_number_to_chars (where
,
4440 (valueT
) (fixP
->fx_frag
->fr_address
4441 + fixP
->fx_where
- segment_address_in_file
),
4444 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
4445 ? S_GET_TYPE (fixP
->fx_addsy
)
4446 : fixP
->fx_addsy
->sy_number
);
4448 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
4449 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
4450 where
[4] = r_symbolnum
& 0x0ff;
4451 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
4452 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
4453 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
4456 #endif /* OBJ_AOUT or OBJ_BOUT */
4458 #if defined (I386COFF)
4461 tc_coff_fix2rtype (fixP
)
4464 if (fixP
->fx_r_type
== R_IMAGEBASE
)
4467 return (fixP
->fx_pcrel
?
4468 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
4469 fixP
->fx_size
== 2 ? R_PCRWORD
:
4471 (fixP
->fx_size
== 1 ? R_RELBYTE
:
4472 fixP
->fx_size
== 2 ? R_RELWORD
:
4477 tc_coff_sizemachdep (frag
)
4481 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
4486 #endif /* I386COFF */
4488 #endif /* ! BFD_ASSEMBLER */
4490 /* end of tc-i386.c */