1 /* i860.c -- Assemble for the I860
2 Copyright (C) 1989 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 #include "opcode/i860.h"
24 /* incorporated from i860.h */
25 enum reloc_type
/* NOTE: three bits max, see struct reloc_info_i860.r_type */
27 NO_RELOC
= 0, BRADDR
, LOW0
, LOW1
, LOW2
, LOW3
, LOW4
, SPLIT0
, SPLIT1
, SPLIT2
, RELOC_32
,
30 enum highlow_type
/* NOTE: two bits max, see reloc_info_i860.r_type */
32 NO_SPEC
= 0, PAIR
, HIGH
, HIGHADJ
,
35 struct reloc_info_i860
37 unsigned long r_address
;
39 * Using bit fields here is a bad idea because the order is not portable. :-(
41 unsigned int r_symbolnum
: 24;
42 unsigned int r_pcrel
: 1;
43 unsigned int r_extern
: 1;
44 /* combining the two field simplifies the argument passing in "new_fix()" */
45 /* and is compatible with the existing Sparc #ifdef's */
46 /* r_type: highlow_type - bits 5,4; reloc_type - bits 3-0 */
47 unsigned int r_type
: 6;
51 #define relocation_info reloc_info_i860
56 void md_number_to_chars();
59 void md_convert_frag();
60 void md_create_short_jump();
61 void md_create_long_jump();
62 int md_estimate_size_before_relax();
63 void md_number_to_imm();
64 void md_number_to_disp();
65 void md_number_to_field();
66 void md_ri_to_chars();
67 static void i860_ip();
68 void emit_machine_reloc();
70 int md_reloc_size
= sizeof(struct relocation_info
);
72 void (*md_emit_relocations
)() = emit_machine_reloc
;
74 const relax_typeS md_relax_table
[] = { 0 };
76 /* handle of the OPCODE hash table */
77 static struct hash_control
*op_hash
= NULL
;
79 static void s_dual(), s_enddual();
84 { "dual", s_dual
, 4 },
85 { "enddual", s_enddual
, 4 },
86 { "atmp", s_atmp
, 4 },
90 int md_short_jump_size
= 4;
91 int md_long_jump_size
= 4;
93 /* This array holds the chars that always start a comment. If the
94 pre-processor is disabled, these aren't very useful */
95 char comment_chars
[] = "!/"; /* JF removed '|' from comment_chars */
97 /* This array holds the chars that only start a comment at the beginning of
98 a line. If the line seems to have the form '# 123 filename'
99 .line and .file directives will appear in the pre-processed output */
100 /* Note that input_file.c hand checks for '#' at the beginning of the
101 first line of the input file. This is because the compiler outputs
102 #NO_APP at the beginning of its output. */
103 /* Also note that comments like this one will always work. */
104 char line_comment_chars
[] = "#/";
106 /* Chars that can be used to separate mant from exp in floating point nums */
107 char EXP_CHARS
[] = "eE";
109 /* Chars that mean this number is a floating point constant */
112 char FLT_CHARS
[] = "rRsSfFdDxXpP";
114 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
115 changed in read.c . Ideally it shouldn't have to know about it at all,
116 but nothing is ideal around here.
118 int size_reloc_info
= sizeof(struct relocation_info
);
120 static unsigned char octal
[256];
121 #define isoctal(c) octal[c]
122 static unsigned char toHex
[256];
126 unsigned long opcode
;
127 struct nlist
*nlistp
;
130 enum expand_type expand
;
131 enum highlow_type highlow
;
132 enum reloc_type reloc
;
136 static void print_insn(struct i860_it
*insn
);
137 static int getExpression(char *str
);
139 static void print_insn();
140 static int getExpression();
142 static char *expr_end
;
143 static char last_expand
; /* error if expansion after branch */
147 DUAL_OFF
= 0, DUAL_ON
, DUAL_DDOT
, DUAL_ONDDOT
,
149 static enum dual dual_mode
= DUAL_OFF
; /* dual-instruction mode */
152 s_dual() /* floating point instructions have dual set */
158 s_enddual() /* floating point instructions have dual set */
160 dual_mode
= DUAL_OFF
;
163 static int atmp
= 31; /* temporary register for pseudo's */
169 if (strncmp(input_line_pointer
, "sp", 2) == 0) {
170 input_line_pointer
+= 2;
173 else if (strncmp(input_line_pointer
, "fp", 2) == 0) {
174 input_line_pointer
+= 2;
177 else if (strncmp(input_line_pointer
, "r", 1) == 0) {
178 input_line_pointer
+= 1;
179 temp
= get_absolute_expression();
180 if (temp
>= 0 && temp
<= 31)
183 as_bad("Unknown temporary pseudo register");
186 as_bad("Unknown temporary pseudo register");
188 demand_empty_rest_of_line();
192 /* This function is called once, at assembler startup time. It should
193 set up all the tables, etc. that the MD part of the assembler will need. */
197 register char *retval
= NULL
;
199 register unsigned int i
= 0;
201 op_hash
= hash_new();
203 as_fatal("Virtual memory exhausted");
205 while (i
< NUMOPCODES
)
207 const char *name
= i860_opcodes
[i
].name
;
208 retval
= hash_insert(op_hash
, name
, &i860_opcodes
[i
]);
209 if(retval
!= NULL
&& *retval
!= '\0')
211 fprintf (stderr
, "internal error: can't hash `%s': %s\n",
212 i860_opcodes
[i
].name
, retval
);
217 if (i860_opcodes
[i
].match
& i860_opcodes
[i
].lose
)
219 fprintf (stderr
, "internal error: losing opcode: `%s' \"%s\"\n",
220 i860_opcodes
[i
].name
, i860_opcodes
[i
].args
);
224 } while (i
< NUMOPCODES
225 && !strcmp(i860_opcodes
[i
].name
, name
));
229 as_fatal("Broken assembler. No assembly attempted.");
231 for (i
= '0'; i
< '8'; ++i
)
233 for (i
= '0'; i
<= '9'; ++i
)
235 for (i
= 'a'; i
<= 'f'; ++i
)
236 toHex
[i
] = i
+ 10 - 'a';
237 for (i
= 'A'; i
<= 'F'; ++i
)
238 toHex
[i
] = i
+ 10 - 'A';
255 struct i860_it pseudo
[3];
260 /* check for expandable flag to produce pseudo-instructions */
261 if (the_insn
.expand
!= 0 && the_insn
.highlow
== NO_SPEC
) {
262 for (i
= 0; i
< 3; i
++)
263 pseudo
[i
] = the_insn
;
265 switch (the_insn
.expand
) {
272 if (the_insn
.exp
.X_add_symbol
== NULL
&&
273 the_insn
.exp
.X_subtract_symbol
== NULL
&&
274 (the_insn
.exp
.X_add_number
< (1 << 15) &&
275 the_insn
.exp
.X_add_number
>= -(1 << 15)))
277 /* or l%const,r0,ireg_dest */
278 pseudo
[0].opcode
= (the_insn
.opcode
& 0x001f0000) | 0xe4000000;
279 pseudo
[0].highlow
= PAIR
;
280 /* orh h%const,ireg_dest,ireg_dest */
281 pseudo
[1].opcode
= (the_insn
.opcode
& 0x03ffffff) | 0xec000000 |
282 ((the_insn
.opcode
& 0x001f0000) << 5);
283 pseudo
[1].highlow
= HIGH
;
288 if (the_insn
.exp
.X_add_symbol
== NULL
&&
289 the_insn
.exp
.X_subtract_symbol
== NULL
)
291 /* orh ha%addr_expr,r0,r31 */
292 pseudo
[0].opcode
= 0xec000000 | (atmp
<<16);
293 pseudo
[0].highlow
= HIGHADJ
;
294 pseudo
[0].reloc
= LOW0
; /* must overwrite */
295 /* l%addr_expr(r31),ireg_dest */
296 pseudo
[1].opcode
= (the_insn
.opcode
& ~0x003e0000) | (atmp
<< 21);
297 pseudo
[1].highlow
= PAIR
;
301 case E_U32
: /* 2nd version emulates Intel as, not doc. */
302 if (the_insn
.exp
.X_add_symbol
== NULL
&&
303 the_insn
.exp
.X_subtract_symbol
== NULL
&&
304 (the_insn
.exp
.X_add_number
< (1 << 16) &&
305 the_insn
.exp
.X_add_number
>= 0))
307 /* $(opcode)h h%const,ireg_src2,ireg_dest
308 pseudo[0].opcode = (the_insn.opcode & 0xf3ffffff) | 0x0c000000; */
309 /* $(opcode)h h%const,ireg_src2,r31 */
310 pseudo
[0].opcode
= (the_insn
.opcode
& 0xf3e0ffff) | 0x0c000000 |
312 pseudo
[0].highlow
= HIGH
;
313 /* $(opcode) l%const,ireg_dest,ireg_dest
314 pseudo[1].opcode = (the_insn.opcode & 0xf01f0000) | 0x04000000 |
315 ((the_insn.opcode & 0x001f0000) << 5); */
316 /* $(opcode) l%const,r31,ireg_dest */
317 pseudo
[1].opcode
= (the_insn
.opcode
& 0xf01f0000) | 0x04000000 |
319 pseudo
[1].highlow
= PAIR
;
323 case E_AND
: /* 2nd version emulates Intel as, not doc. */
324 if (the_insn
.exp
.X_add_symbol
== NULL
&&
325 the_insn
.exp
.X_subtract_symbol
== NULL
&&
326 (the_insn
.exp
.X_add_number
< (1 << 16) &&
327 the_insn
.exp
.X_add_number
>= 0))
329 /* andnot h%const,ireg_src2,ireg_dest
330 pseudo[0].opcode = (the_insn.opcode & 0x03ffffff) | 0xd4000000; */
331 /* andnot h%const,ireg_src2,r31 */
332 pseudo
[0].opcode
= (the_insn
.opcode
& 0x03e0ffff) | 0xd4000000 |
334 pseudo
[0].highlow
= HIGH
;
335 pseudo
[0].exp
.X_add_number
= -1 - the_insn
.exp
.X_add_number
;
336 /* andnot l%const,ireg_dest,ireg_dest
337 pseudo[1].opcode = (the_insn.opcode & 0x001f0000) | 0xd4000000 |
338 ((the_insn.opcode & 0x001f0000) << 5); */
339 /* andnot l%const,r31,ireg_dest */
340 pseudo
[1].opcode
= (the_insn
.opcode
& 0x001f0000) | 0xd4000000 |
342 pseudo
[1].highlow
= PAIR
;
343 pseudo
[1].exp
.X_add_number
= -1 - the_insn
.exp
.X_add_number
;
348 if (the_insn
.exp
.X_add_symbol
== NULL
&&
349 the_insn
.exp
.X_subtract_symbol
== NULL
&&
350 (the_insn
.exp
.X_add_number
< (1 << 15) &&
351 the_insn
.exp
.X_add_number
>= -(1 << 15)))
353 /* orh h%const,r0,r31 */
354 pseudo
[0].opcode
= 0xec000000 | (atmp
<< 16);
355 pseudo
[0].highlow
= HIGH
;
356 /* or l%const,r31,r31 */
357 pseudo
[1].opcode
= 0xe4000000 | (atmp
<< 21) | (atmp
<< 16);
358 pseudo
[1].highlow
= PAIR
;
359 /* r31,ireg_src2,ireg_dest */
360 pseudo
[2].opcode
= (the_insn
.opcode
& ~0x0400ffff) | (atmp
<< 11);
361 pseudo
[2].reloc
= NO_RELOC
;
366 as_fatal("failed sanity check.");
369 the_insn
= pseudo
[0];
370 /* check for expanded opcode after branch or in dual */
371 if (no_opcodes
> 1 && last_expand
== 1)
372 as_warn("Expanded opcode after delayed branch: `%s'", str
);
373 if (no_opcodes
> 1 && dual_mode
!= DUAL_OFF
)
374 as_warn("Expanded opcode in dual mode: `%s'", str
);
378 do { /* always produce at least one opcode */
380 /* put out the opcode */
381 md_number_to_chars(toP
, the_insn
.opcode
, 4);
383 /* check for expanded opcode after branch or in dual */
384 last_expand
= the_insn
.pcrel
;
386 /* put out the symbol-dependent stuff */
387 if (the_insn
.reloc
!= NO_RELOC
) {
389 frag_now
, /* which frag */
390 (toP
- frag_now
->fr_literal
), /* where */
392 the_insn
.exp
.X_add_symbol
,
393 the_insn
.exp
.X_subtract_symbol
,
394 the_insn
.exp
.X_add_number
,
396 /* merge bit fields into one argument */
397 (int)(((the_insn
.highlow
& 0x3) << 4) | (the_insn
.reloc
& 0xf))
400 the_insn
= pseudo
[++i
];
401 } while (--no_opcodes
> 0);
413 struct i860_opcode
*insn
;
415 unsigned long opcode
;
421 for (s
= str
; islower(*s
) || *s
== '.' || *s
== '3'; ++s
)
438 as_bad("Unknown opcode: `%s'", str
);
442 if (strncmp(str
, "d.", 2) == 0) { /* check for d. opcode prefix */
443 if (dual_mode
== DUAL_ON
)
444 dual_mode
= DUAL_ONDDOT
;
446 dual_mode
= DUAL_DDOT
;
450 if ((insn
= (struct i860_opcode
*) hash_find(op_hash
, str
)) == NULL
) {
451 if (dual_mode
== DUAL_DDOT
|| dual_mode
== DUAL_ONDDOT
)
453 as_bad("Unknown opcode: `%s'", str
);
461 opcode
= insn
->match
;
462 bzero(&the_insn
, sizeof(the_insn
));
463 the_insn
.reloc
= NO_RELOC
;
466 * Build the opcode, checking as we go to make
467 * sure that the operands match
469 for (args
= insn
->args
; ; ++args
) {
472 case '\0': /* end of args */
479 case '(': /* these must match exactly */
487 case '#': /* must be at least one digit */
489 while (isdigit(*s
)) {
496 case '1': /* next operand must be a register */
501 case 'f': /* frame pointer */
509 case 's': /* stack pointer */
517 case 'r': /* any register */
519 if (!isdigit(c
= *s
++)) {
523 if ((c
= 10 * (c
- '0') + (*s
++ - '0')) >= 32) {
532 default: /* not this opcode */
536 * Got the register, now figure out where
537 * it goes in the opcode.
542 opcode
|= mask
<< 11;
546 opcode
|= mask
<< 21;
550 opcode
|= mask
<< 16;
556 case 'e': /* next operand is a floating point register */
559 if (*s
++ == 'f' && isdigit(*s
)) {
562 mask
= 10 * (mask
- '0') + (*s
++ - '0');
572 opcode
|= mask
<< 11;
576 opcode
|= mask
<< 21;
580 opcode
|= mask
<< 16;
581 if (dual_mode
!= DUAL_OFF
)
582 opcode
|= (1 << 9); /* dual mode instruction */
583 if (dual_mode
== DUAL_DDOT
)
584 dual_mode
= DUAL_OFF
;
585 if (dual_mode
== DUAL_ONDDOT
)
587 if ((opcode
& (1 << 10)) && (mask
== ((opcode
>> 11) & 0x1f)))
588 as_warn("Fsr1 equals fdest with Pipelining");
594 case 'c': /* next operand must be a control register */
595 if (strncmp(s
, "fir", 3) == 0) {
600 if (strncmp(s
, "psr", 3) == 0) {
605 if (strncmp(s
, "dirbase", 7) == 0) {
610 if (strncmp(s
, "db", 2) == 0) {
615 if (strncmp(s
, "fsr", 3) == 0) {
620 if (strncmp(s
, "epsr", 4) == 0) {
627 case '5': /* 5 bit immediate in src1 */
628 bzero(&the_insn
, sizeof(the_insn
));
629 if ( !getExpression(s
)) {
631 if (the_insn
.exp
.X_add_number
& ~0x1f)
632 as_bad("5-bit immediate too large");
633 opcode
|= (the_insn
.exp
.X_add_number
& 0x1f) << 11;
634 bzero(&the_insn
, sizeof(the_insn
));
635 the_insn
.reloc
= NO_RELOC
;
640 case 'l': /* 26 bit immediate, relative branch */
641 the_insn
.reloc
= BRADDR
;
645 case 's': /* 16 bit immediate, split relative branch */
646 /* upper 5 bits of offset in dest field */
648 the_insn
.reloc
= SPLIT0
;
651 case 'S': /* 16 bit immediate, split (st), aligned */
652 if (opcode
& (1 << 28))
654 the_insn
.reloc
= SPLIT2
;
656 the_insn
.reloc
= SPLIT1
;
658 the_insn
.reloc
= SPLIT0
;
661 case 'I': /* 16 bit immediate, aligned */
662 if (opcode
& (1 << 28))
664 the_insn
.reloc
= LOW2
;
666 the_insn
.reloc
= LOW1
;
668 the_insn
.reloc
= LOW0
;
671 case 'i': /* 16 bit immediate */
672 the_insn
.reloc
= LOW0
;
679 if (strncmp(s
, "ha%", 3) == 0) {
680 the_insn
.highlow
= HIGHADJ
;
682 } else if (strncmp(s
, "h%", 2) == 0) {
683 the_insn
.highlow
= HIGH
;
685 } else if (strncmp(s
, "l%", 2) == 0) {
686 the_insn
.highlow
= PAIR
;
689 the_insn
.expand
= insn
->expand
;
691 /* Note that if the getExpression() fails, we will still have
692 created U entries in the symbol table for the 'symbols'
693 in the input string. Try not to create U symbols for
696 if ( !getExpression(s
)) {
703 as_fatal("failed sanity check.");
710 /* Args don't match. */
711 if (&insn
[1] - i860_opcodes
< NUMOPCODES
712 && !strcmp(insn
->name
, insn
[1].name
))
720 as_bad("Illegal operands");
727 the_insn
.opcode
= opcode
;
738 save_in
= input_line_pointer
;
739 input_line_pointer
= str
;
740 switch (seg
= expression(&the_insn
.exp
)) {
753 the_insn
.error
= "bad segment";
754 expr_end
= input_line_pointer
;
755 input_line_pointer
=save_in
;
758 expr_end
= input_line_pointer
;
759 input_line_pointer
= save_in
;
765 This is identical to the md_atof in m68k.c. I think this is right,
768 Turn a string in input_line_pointer into a floating point constant of type
769 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
770 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
773 /* Equal to MAX_PRECISION in atof-ieee.c */
774 #define MAX_LITTLENUMS 6
777 md_atof(type
,litP
,sizeP
)
783 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
784 LITTLENUM_TYPE
*wordP
;
816 return "Bad call to MD_ATOF()";
818 t
=atof_ieee(input_line_pointer
,type
,words
);
820 input_line_pointer
=t
;
821 *sizeP
=prec
* sizeof(LITTLENUM_TYPE
);
822 for(wordP
=words
;prec
--;) {
823 md_number_to_chars(litP
,(long)(*wordP
++),sizeof(LITTLENUM_TYPE
));
824 litP
+=sizeof(LITTLENUM_TYPE
);
826 return ""; /* Someone should teach Dean about null pointers */
830 * Write out big-endian.
833 md_number_to_chars(buf
,val
,n
)
850 as_fatal("failed sanity check.");
855 void md_number_to_imm(buf
,val
,n
, fixP
)
861 enum reloc_type reloc
= fixP
->fx_r_type
& 0xf;
862 enum highlow_type highlow
= (fixP
->fx_r_type
>> 4) & 0x3;
865 assert(n
== 4); /* always on i860 */
870 case HIGHADJ
: /* adjusts the high-order 16-bits */
876 case HIGH
: /* selects the high-order 16-bits */
880 case PAIR
: /* selects the low-order 16-bits */
891 case BRADDR
: /* br,call,bc,bc.t,bnc,bnc.t w/26-bit immediate */
892 if (fixP
->fx_pcrel
!= 1)
893 as_bad("26-bit branch w/o pc relative set: 0x%08x", val
);
894 val
>>= 2; /* align pcrel offset, see manual */
896 if (val
>= (1 << 25) || val
< -(1 << 25)) /* check for overflow */
897 as_bad("26-bit branch offset overflow: 0x%08x", val
);
898 buf
[0] = (buf
[0] & 0xfc) | ((val
>> 24) & 0x3);
904 case SPLIT2
: /* 16 bit immediate, 4-byte aligned */
906 as_bad("16-bit immediate 4-byte alignment error: 0x%08x", val
);
907 val
&= ~0x3; /* 4-byte align value */
909 case SPLIT1
: /* 16 bit immediate, 2-byte aligned */
911 as_bad("16-bit immediate 2-byte alignment error: 0x%08x", val
);
912 val
&= ~0x1; /* 2-byte align value */
914 case SPLIT0
: /* st,bla,bte,btne w/16-bit immediate */
915 if (fixP
->fx_pcrel
== 1)
916 val
>>= 2; /* align pcrel offset, see manual */
917 /* check for bounds */
918 if (highlow
!= PAIR
&& (val
>= (1 << 16) || val
< -(1 << 15)))
919 as_bad("16-bit branch offset overflow: 0x%08x", val
);
920 buf
[1] = (buf
[1] & ~0x1f) | ((val
>> 11) & 0x1f);
921 buf
[2] = (buf
[2] & ~0x7) | ((val
>> 8) & 0x7);
922 buf
[3] |= val
; /* perserve bottom opcode bits */
925 case LOW4
: /* fld,pfld,pst,flush 16-byte aligned */
927 as_bad("16-bit immediate 16-byte alignment error: 0x%08x", val
);
928 val
&= ~0xf; /* 16-byte align value */
930 case LOW3
: /* fld,pfld,pst,flush 8-byte aligned */
932 as_bad("16-bit immediate 8-byte alignment error: 0x%08x", val
);
933 val
&= ~0x7; /* 8-byte align value */
935 case LOW2
: /* 16 bit immediate, 4-byte aligned */
937 as_bad("16-bit immediate 4-byte alignment error: 0x%08x", val
);
938 val
&= ~0x3; /* 4-byte align value */
940 case LOW1
: /* 16 bit immediate, 2-byte aligned */
942 as_bad("16-bit immediate 2-byte alignment error: 0x%08x", val
);
943 val
&= ~0x1; /* 2-byte align value */
945 case LOW0
: /* 16 bit immediate, byte aligned */
946 /* check for bounds */
947 if (highlow
!= PAIR
&& (val
>= (1 << 16) || val
< -(1 << 15)))
948 as_bad("16-bit immediate overflow: 0x%08x", val
);
950 buf
[3] |= val
; /* perserve bottom opcode bits */
955 as_bad("bad relocation type: 0x%02x", reloc
);
961 /* should never be called for i860 */
963 md_create_short_jump(ptr
, from_addr
, to_addr
, frag
, to_symbol
)
965 long from_addr
, to_addr
;
969 as_fatal("i860_create_short_jmp\n");
972 /* should never be called for i860 */
974 md_number_to_disp(buf
,val
,n
)
978 as_fatal("md_number_to_disp\n");
981 /* should never be called for i860 */
983 md_number_to_field(buf
,val
,fix
)
988 as_fatal("i860_number_to_field\n");
991 /* the bit-field entries in the relocation_info struct plays hell
992 with the byte-order problems of cross-assembly. So as a hack,
993 I added this mach. dependent ri twiddler. Ugly, but it gets
995 /* on i860: first 4 bytes are normal unsigned long address, next three
996 bytes are index, most sig. byte first. Byte 7 is broken up with
997 bit 7 as pcrel, bit 6 as extern, and the lower six bits as
998 relocation type (highlow 5-4). Next 4 bytes are long addend. */
999 /* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */
1001 md_ri_to_chars(ri_p
, ri
)
1002 struct relocation_info
*ri_p
, ri
;
1005 unsigned char the_bytes
[sizeof(*ri_p
)];
1008 md_number_to_chars(the_bytes
, ri
.r_address
, sizeof(ri
.r_address
));
1009 /* now the fun stuff */
1010 the_bytes
[4] = (ri
.r_index
>> 16) & 0x0ff;
1011 the_bytes
[5] = (ri
.r_index
>> 8) & 0x0ff;
1012 the_bytes
[6] = ri
.r_index
& 0x0ff;
1013 the_bytes
[7] = ((ri
.r_extern
<< 7) & 0x80) | (0 & 0x60) | (ri
.r_type
& 0x1F);
1015 md_number_to_chars(&the_bytes
[8], ri
.r_addend
, sizeof(ri
.r_addend
));
1016 /* now put it back where you found it, Junior... */
1017 bcopy (the_bytes
, (char *)ri_p
, sizeof(*ri_p
));
1021 /* should never be called for i860 */
1023 md_convert_frag(headers
, fragP
)
1024 object_headers
*headers
;
1025 register fragS
*fragP
;
1027 as_fatal("i860_convert_frag\n");
1030 /* should never be called for i860 */
1032 md_create_long_jump(ptr
, from_addr
, to_addr
, frag
, to_symbol
)
1039 as_fatal("i860_create_long_jump\n");
1042 /* should never be called for i860 */
1044 md_estimate_size_before_relax(fragP
, segtype
)
1045 register fragS
*fragP
;
1048 as_fatal("i860_estimate_size_before_relax\n");
1051 /* for debugging only, must match enum reloc_type */
1052 static char *Reloc
[] = {
1065 static char *Highlow
[] = {
1073 struct i860_it
*insn
;
1076 fprintf(stderr
, "ERROR: %s\n");
1078 fprintf(stderr
, "opcode=0x%08x\t", insn
->opcode
);
1079 fprintf(stderr
, "expand=0x%08x\t", insn
->expand
);
1080 fprintf(stderr
, "reloc = %s\t", Reloc
[insn
->reloc
]);
1081 fprintf(stderr
, "highlow = %s\n", Highlow
[insn
->highlow
]);
1082 fprintf(stderr
, "exp = {\n");
1083 fprintf(stderr
, "\t\tX_add_symbol = %s\n",
1084 insn
->exp
.X_add_symbol
?
1085 (S_GET_NAME(insn
->exp
.X_add_symbol
) ?
1086 S_GET_NAME(insn
->exp
.X_add_symbol
) : "???") : "0");
1087 fprintf(stderr
, "\t\tX_sub_symbol = %s\n",
1088 insn
->exp
.X_subtract_symbol
?
1089 (S_GET_NAME(insn
->exp
.X_subtract_symbol
) ?
1090 S_GET_NAME(insn
->exp
.X_subtract_symbol
) : "???") : "0");
1091 fprintf(stderr
, "\t\tX_add_number = %d\n",
1092 insn
->exp
.X_add_number
);
1093 fprintf(stderr
, "}\n");
1098 md_parse_option(argP
,cntP
,vecP
)
1107 * I860 relocations are completely different, so it needs
1108 * this machine dependent routine to emit them.
1111 emit_machine_reloc(fixP
, segment_address_in_file
)
1112 register fixS
*fixP
;
1113 relax_addressT segment_address_in_file
;
1115 struct reloc_info_i860 ri
;
1116 register symbolS
*symbolP
;
1117 extern char *next_object_file_charP
;
1120 bzero((char *) &ri
, sizeof(ri
));
1121 for (; fixP
; fixP
= fixP
->fx_next
) {
1123 if (fixP
->fx_r_type
& ~0x3f) {
1124 as_fatal("fixP->fx_r_type = %d\n", fixP
->fx_r_type
);
1126 ri
.r_pcrel
= fixP
->fx_pcrel
;
1127 ri
.r_type
= fixP
->fx_r_type
;
1129 if ((symbolP
= fixP
->fx_addsy
) != NULL
) {
1130 ri
.r_address
= fixP
->fx_frag
->fr_address
+
1131 fixP
->fx_where
- segment_address_in_file
;
1132 if ((symbolP
->sy_type
& N_TYPE
) == N_UNDF
) {
1134 ri
.r_symbolnum
= symbolP
->sy_number
;
1137 ri
.r_symbolnum
= symbolP
->sy_type
& N_TYPE
;
1139 if (symbolP
&& symbolP
->sy_frag
) {
1140 ri
.r_addend
= symbolP
->sy_frag
->fr_address
;
1142 ri
.r_type
= fixP
->fx_r_type
;
1143 if (fixP
->fx_pcrel
) {
1144 /* preserve actual offset vs. pc + 4 */
1145 ri
.r_addend
-= (ri
.r_address
+ 4);
1147 ri
.r_addend
= fixP
->fx_addnumber
;
1150 md_ri_to_chars((char *) &ri
, ri
);
1151 append(&next_object_file_charP
, (char *)& ri
, sizeof(ri
));
1157 /* Parse an operand that is machine-specific.
1158 We just return without modifying the expression if we have nothing
1163 md_operand (expressionP
)
1164 expressionS
*expressionP
;
1168 /* We have no need to default values of symbols. */
1172 md_undefined_symbol (name
)
1178 /* Round up a section size to the appropriate boundary. */
1180 md_section_align (segment
, size
)
1184 return size
; /* Byte alignment is fine */
1187 /* Exactly what point is a PC-relative offset relative TO?
1188 On the i860, they're relative to the address of the offset, plus
1189 its size. (??? Is this right? FIXME-SOON!) */
1191 md_pcrel_from (fixP
)
1194 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
1198 md_apply_fix(fixP
, val
)
1202 char *place
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
1204 if (!fixP
->fx_bit_fixP
) {
1206 switch (fixP
->fx_im_disp
) {
1208 fixP
->fx_addnumber
= val
;
1209 md_number_to_imm(place
, val
, fixP
->fx_size
, fixP
);
1212 md_number_to_disp (place
,
1213 fixP
->fx_pcrel
? val
+fixP
->fx_pcrel_adjust
:val
,
1216 case 2: /* fix requested for .long .word etc */
1217 md_number_to_chars (place
, val
, fixP
->fx_size
);
1220 as_fatal("Internal error in md_apply_fix() in file \"%s\"", __FILE__
);
1221 } /* OVE: maybe one ought to put _imm _disp _chars in one md-func */
1223 md_number_to_field (place
, val
, fixP
->fx_bit_fixP
);
1227 } /* md_apply_fix() */
1235 /* end of tc-i860.c */