1 /* i860.c -- Assemble for the I860
2 Copyright (C) 1989 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 1, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
24 #include "i860-opcode.h"
26 /* incorporated from i860.h */
27 enum reloc_type
/* NOTE: three bits max, see struct reloc_info_i860.r_type */
29 NO_RELOC
= 0, BRADDR
, LOW0
, LOW1
, LOW2
, LOW3
, LOW4
, SPLIT0
, SPLIT1
, SPLIT2
, RELOC_32
,
32 enum highlow_type
/* NOTE: two bits max, see reloc_info_i860.r_type */
34 NO_SPEC
= 0, PAIR
, HIGH
, HIGHADJ
,
37 struct reloc_info_i860
39 unsigned long r_address
;
41 * Using bit fields here is a bad idea because the order is not portable. :-(
43 unsigned int r_symbolnum
: 24;
44 unsigned int r_pcrel
: 1;
45 unsigned int r_extern
: 1;
46 /* combining the two field simplifies the argument passing in "new_fix()" */
47 /* and is compatible with the existing Sparc #ifdef's */
48 /* r_type: highlow_type - bits 5,4; reloc_type - bits 3-0 */
49 unsigned int r_type
: 6;
53 #define relocation_info reloc_info_i860
58 void md_number_to_chars();
61 void md_convert_frag();
62 void md_create_short_jump();
63 void md_create_long_jump();
64 int md_estimate_size_before_relax();
65 void md_number_to_imm();
66 void md_number_to_disp();
67 void md_number_to_field();
68 void md_ri_to_chars();
69 static void i860_ip();
70 void emit_machine_reloc();
72 int md_reloc_size
= sizeof(struct relocation_info
);
74 void (*md_emit_relocations
)() = emit_machine_reloc
;
76 const relax_typeS md_relax_table
[] = { 0 };
78 /* handle of the OPCODE hash table */
79 static struct hash_control
*op_hash
= NULL
;
81 static void s_dual(), s_enddual();
86 { "dual", s_dual
, 4 },
87 { "enddual", s_enddual
, 4 },
88 { "atmp", s_atmp
, 4 },
92 int md_short_jump_size
= 4;
93 int md_long_jump_size
= 4;
95 /* This array holds the chars that always start a comment. If the
96 pre-processor is disabled, these aren't very useful */
97 char comment_chars
[] = "!/"; /* JF removed '|' from comment_chars */
99 /* This array holds the chars that only start a comment at the beginning of
100 a line. If the line seems to have the form '# 123 filename'
101 .line and .file directives will appear in the pre-processed output */
102 /* Note that input_file.c hand checks for '#' at the beginning of the
103 first line of the input file. This is because the compiler outputs
104 #NO_APP at the beginning of its output. */
105 /* Also note that comments like this one will always work. */
106 char line_comment_chars
[] = "#/";
108 /* Chars that can be used to separate mant from exp in floating point nums */
109 char EXP_CHARS
[] = "eE";
111 /* Chars that mean this number is a floating point constant */
114 char FLT_CHARS
[] = "rRsSfFdDxXpP";
116 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
117 changed in read.c . Ideally it shouldn't have to know about it at all,
118 but nothing is ideal around here.
120 int size_reloc_info
= sizeof(struct relocation_info
);
122 static unsigned char octal
[256];
123 #define isoctal(c) octal[c]
124 static unsigned char toHex
[256];
128 unsigned long opcode
;
129 struct nlist
*nlistp
;
132 enum expand_type expand
;
133 enum highlow_type highlow
;
134 enum reloc_type reloc
;
138 static void print_insn(struct i860_it
*insn
);
139 static int getExpression(char *str
);
141 static void print_insn();
142 static int getExpression();
144 static char *expr_end
;
145 static char last_expand
; /* error if expansion after branch */
149 DUAL_OFF
= 0, DUAL_ON
, DUAL_DDOT
, DUAL_ONDDOT
,
151 static enum dual dual_mode
= DUAL_OFF
; /* dual-instruction mode */
154 s_dual() /* floating point instructions have dual set */
160 s_enddual() /* floating point instructions have dual set */
162 dual_mode
= DUAL_OFF
;
165 static int atmp
= 31; /* temporary register for pseudo's */
171 if (strncmp(input_line_pointer
, "sp", 2) == 0) {
172 input_line_pointer
+= 2;
175 else if (strncmp(input_line_pointer
, "fp", 2) == 0) {
176 input_line_pointer
+= 2;
179 else if (strncmp(input_line_pointer
, "r", 1) == 0) {
180 input_line_pointer
+= 1;
181 temp
= get_absolute_expression();
182 if (temp
>= 0 && temp
<= 31)
185 as_bad("Unknown temporary pseudo register");
188 as_bad("Unknown temporary pseudo register");
190 demand_empty_rest_of_line();
194 /* This function is called once, at assembler startup time. It should
195 set up all the tables, etc. that the MD part of the assembler will need. */
199 register char *retval
= NULL
;
201 register unsigned int i
= 0;
203 op_hash
= hash_new();
205 as_fatal("Virtual memory exhausted");
207 while (i
< NUMOPCODES
)
209 const char *name
= i860_opcodes
[i
].name
;
210 retval
= hash_insert(op_hash
, name
, &i860_opcodes
[i
]);
211 if(retval
!= NULL
&& *retval
!= '\0')
213 fprintf (stderr
, "internal error: can't hash `%s': %s\n",
214 i860_opcodes
[i
].name
, retval
);
219 if (i860_opcodes
[i
].match
& i860_opcodes
[i
].lose
)
221 fprintf (stderr
, "internal error: losing opcode: `%s' \"%s\"\n",
222 i860_opcodes
[i
].name
, i860_opcodes
[i
].args
);
226 } while (i
< NUMOPCODES
227 && !strcmp(i860_opcodes
[i
].name
, name
));
231 as_fatal("Broken assembler. No assembly attempted.");
233 for (i
= '0'; i
< '8'; ++i
)
235 for (i
= '0'; i
<= '9'; ++i
)
237 for (i
= 'a'; i
<= 'f'; ++i
)
238 toHex
[i
] = i
+ 10 - 'a';
239 for (i
= 'A'; i
<= 'F'; ++i
)
240 toHex
[i
] = i
+ 10 - 'A';
257 struct i860_it pseudo
[3];
262 /* check for expandable flag to produce pseudo-instructions */
263 if (the_insn
.expand
!= 0 && the_insn
.highlow
== NO_SPEC
) {
264 for (i
= 0; i
< 3; i
++)
265 pseudo
[i
] = the_insn
;
267 switch (the_insn
.expand
) {
274 if (the_insn
.exp
.X_add_symbol
== NULL
&&
275 the_insn
.exp
.X_subtract_symbol
== NULL
&&
276 (the_insn
.exp
.X_add_number
< (1 << 15) &&
277 the_insn
.exp
.X_add_number
>= -(1 << 15)))
279 /* or l%const,r0,ireg_dest */
280 pseudo
[0].opcode
= (the_insn
.opcode
& 0x001f0000) | 0xe4000000;
281 pseudo
[0].highlow
= PAIR
;
282 /* orh h%const,ireg_dest,ireg_dest */
283 pseudo
[1].opcode
= (the_insn
.opcode
& 0x03ffffff) | 0xec000000 |
284 ((the_insn
.opcode
& 0x001f0000) << 5);
285 pseudo
[1].highlow
= HIGH
;
290 if (the_insn
.exp
.X_add_symbol
== NULL
&&
291 the_insn
.exp
.X_subtract_symbol
== NULL
)
293 /* orh ha%addr_expr,r0,r31 */
294 pseudo
[0].opcode
= 0xec000000 | (atmp
<<16);
295 pseudo
[0].highlow
= HIGHADJ
;
296 pseudo
[0].reloc
= LOW0
; /* must overwrite */
297 /* l%addr_expr(r31),ireg_dest */
298 pseudo
[1].opcode
= (the_insn
.opcode
& ~0x003e0000) | (atmp
<< 21);
299 pseudo
[1].highlow
= PAIR
;
303 case E_U32
: /* 2nd version emulates Intel as, not doc. */
304 if (the_insn
.exp
.X_add_symbol
== NULL
&&
305 the_insn
.exp
.X_subtract_symbol
== NULL
&&
306 (the_insn
.exp
.X_add_number
< (1 << 16) &&
307 the_insn
.exp
.X_add_number
>= 0))
309 /* $(opcode)h h%const,ireg_src2,ireg_dest
310 pseudo[0].opcode = (the_insn.opcode & 0xf3ffffff) | 0x0c000000; */
311 /* $(opcode)h h%const,ireg_src2,r31 */
312 pseudo
[0].opcode
= (the_insn
.opcode
& 0xf3e0ffff) | 0x0c000000 |
314 pseudo
[0].highlow
= HIGH
;
315 /* $(opcode) l%const,ireg_dest,ireg_dest
316 pseudo[1].opcode = (the_insn.opcode & 0xf01f0000) | 0x04000000 |
317 ((the_insn.opcode & 0x001f0000) << 5); */
318 /* $(opcode) l%const,r31,ireg_dest */
319 pseudo
[1].opcode
= (the_insn
.opcode
& 0xf01f0000) | 0x04000000 |
321 pseudo
[1].highlow
= PAIR
;
325 case E_AND
: /* 2nd version emulates Intel as, not doc. */
326 if (the_insn
.exp
.X_add_symbol
== NULL
&&
327 the_insn
.exp
.X_subtract_symbol
== NULL
&&
328 (the_insn
.exp
.X_add_number
< (1 << 16) &&
329 the_insn
.exp
.X_add_number
>= 0))
331 /* andnot h%const,ireg_src2,ireg_dest
332 pseudo[0].opcode = (the_insn.opcode & 0x03ffffff) | 0xd4000000; */
333 /* andnot h%const,ireg_src2,r31 */
334 pseudo
[0].opcode
= (the_insn
.opcode
& 0x03e0ffff) | 0xd4000000 |
336 pseudo
[0].highlow
= HIGH
;
337 pseudo
[0].exp
.X_add_number
= -1 - the_insn
.exp
.X_add_number
;
338 /* andnot l%const,ireg_dest,ireg_dest
339 pseudo[1].opcode = (the_insn.opcode & 0x001f0000) | 0xd4000000 |
340 ((the_insn.opcode & 0x001f0000) << 5); */
341 /* andnot l%const,r31,ireg_dest */
342 pseudo
[1].opcode
= (the_insn
.opcode
& 0x001f0000) | 0xd4000000 |
344 pseudo
[1].highlow
= PAIR
;
345 pseudo
[1].exp
.X_add_number
= -1 - the_insn
.exp
.X_add_number
;
350 if (the_insn
.exp
.X_add_symbol
== NULL
&&
351 the_insn
.exp
.X_subtract_symbol
== NULL
&&
352 (the_insn
.exp
.X_add_number
< (1 << 15) &&
353 the_insn
.exp
.X_add_number
>= -(1 << 15)))
355 /* orh h%const,r0,r31 */
356 pseudo
[0].opcode
= 0xec000000 | (atmp
<< 16);
357 pseudo
[0].highlow
= HIGH
;
358 /* or l%const,r31,r31 */
359 pseudo
[1].opcode
= 0xe4000000 | (atmp
<< 21) | (atmp
<< 16);
360 pseudo
[1].highlow
= PAIR
;
361 /* r31,ireg_src2,ireg_dest */
362 pseudo
[2].opcode
= (the_insn
.opcode
& ~0x0400ffff) | (atmp
<< 11);
363 pseudo
[2].reloc
= NO_RELOC
;
371 the_insn
= pseudo
[0];
372 /* check for expanded opcode after branch or in dual */
373 if (no_opcodes
> 1 && last_expand
== 1)
374 as_warn("Expanded opcode after delayed branch: `%s'", str
);
375 if (no_opcodes
> 1 && dual_mode
!= DUAL_OFF
)
376 as_warn("Expanded opcode in dual mode: `%s'", str
);
380 do { /* always produce at least one opcode */
382 /* put out the opcode */
383 md_number_to_chars(toP
, the_insn
.opcode
, 4);
385 /* check for expanded opcode after branch or in dual */
386 last_expand
= the_insn
.pcrel
;
388 /* put out the symbol-dependent stuff */
389 if (the_insn
.reloc
!= NO_RELOC
) {
391 frag_now
, /* which frag */
392 (toP
- frag_now
->fr_literal
), /* where */
394 the_insn
.exp
.X_add_symbol
,
395 the_insn
.exp
.X_subtract_symbol
,
396 the_insn
.exp
.X_add_number
,
398 /* merge bit fields into one argument */
399 (int)(((the_insn
.highlow
& 0x3) << 4) | (the_insn
.reloc
& 0xf))
402 the_insn
= pseudo
[++i
];
403 } while (--no_opcodes
> 0);
415 struct i860_opcode
*insn
;
417 unsigned long opcode
;
423 for (s
= str
; islower(*s
) || *s
== '.' || *s
== '3'; ++s
)
440 as_bad("Unknown opcode: `%s'", str
);
444 if (strncmp(str
, "d.", 2) == 0) { /* check for d. opcode prefix */
445 if (dual_mode
== DUAL_ON
)
446 dual_mode
= DUAL_ONDDOT
;
448 dual_mode
= DUAL_DDOT
;
452 if ((insn
= (struct i860_opcode
*) hash_find(op_hash
, str
)) == NULL
) {
453 if (dual_mode
== DUAL_DDOT
|| dual_mode
== DUAL_ONDDOT
)
455 as_bad("Unknown opcode: `%s'", str
);
463 opcode
= insn
->match
;
464 bzero(&the_insn
, sizeof(the_insn
));
465 the_insn
.reloc
= NO_RELOC
;
468 * Build the opcode, checking as we go to make
469 * sure that the operands match
471 for (args
= insn
->args
; ; ++args
) {
474 case '\0': /* end of args */
481 case '(': /* these must match exactly */
489 case '#': /* must be at least one digit */
491 while (isdigit(*s
)) {
498 case '1': /* next operand must be a register */
503 case 'f': /* frame pointer */
511 case 's': /* stack pointer */
519 case 'r': /* any register */
521 if (!isdigit(c
= *s
++)) {
525 if ((c
= 10 * (c
- '0') + (*s
++ - '0')) >= 32) {
534 default: /* not this opcode */
538 * Got the register, now figure out where
539 * it goes in the opcode.
544 opcode
|= mask
<< 11;
548 opcode
|= mask
<< 21;
552 opcode
|= mask
<< 16;
558 case 'e': /* next operand is a floating point register */
561 if (*s
++ == 'f' && isdigit(*s
)) {
564 mask
= 10 * (mask
- '0') + (*s
++ - '0');
574 opcode
|= mask
<< 11;
578 opcode
|= mask
<< 21;
582 opcode
|= mask
<< 16;
583 if (dual_mode
!= DUAL_OFF
)
584 opcode
|= (1 << 9); /* dual mode instruction */
585 if (dual_mode
== DUAL_DDOT
)
586 dual_mode
= DUAL_OFF
;
587 if (dual_mode
== DUAL_ONDDOT
)
589 if ((opcode
& (1 << 10)) && (mask
== ((opcode
>> 11) & 0x1f)))
590 as_warn("Fsr1 equals fdest with Pipelining");
596 case 'c': /* next operand must be a control register */
597 if (strncmp(s
, "fir", 3) == 0) {
602 if (strncmp(s
, "psr", 3) == 0) {
607 if (strncmp(s
, "dirbase", 7) == 0) {
612 if (strncmp(s
, "db", 2) == 0) {
617 if (strncmp(s
, "fsr", 3) == 0) {
622 if (strncmp(s
, "epsr", 4) == 0) {
629 case '5': /* 5 bit immediate in src1 */
630 bzero(&the_insn
, sizeof(the_insn
));
631 if ( !getExpression(s
)) {
633 if (the_insn
.exp
.X_add_number
& ~0x1f)
634 as_bad("5-bit immediate too large");
635 opcode
|= (the_insn
.exp
.X_add_number
& 0x1f) << 11;
636 bzero(&the_insn
, sizeof(the_insn
));
637 the_insn
.reloc
= NO_RELOC
;
642 case 'l': /* 26 bit immediate, relative branch */
643 the_insn
.reloc
= BRADDR
;
647 case 's': /* 16 bit immediate, split relative branch */
648 /* upper 5 bits of offset in dest field */
650 the_insn
.reloc
= SPLIT0
;
653 case 'S': /* 16 bit immediate, split (st), aligned */
654 if (opcode
& (1 << 28))
656 the_insn
.reloc
= SPLIT2
;
658 the_insn
.reloc
= SPLIT1
;
660 the_insn
.reloc
= SPLIT0
;
663 case 'I': /* 16 bit immediate, aligned */
664 if (opcode
& (1 << 28))
666 the_insn
.reloc
= LOW2
;
668 the_insn
.reloc
= LOW1
;
670 the_insn
.reloc
= LOW0
;
673 case 'i': /* 16 bit immediate */
674 the_insn
.reloc
= LOW0
;
681 if (strncmp(s
, "ha%", 3) == 0) {
682 the_insn
.highlow
= HIGHADJ
;
684 } else if (strncmp(s
, "h%", 2) == 0) {
685 the_insn
.highlow
= HIGH
;
687 } else if (strncmp(s
, "l%", 2) == 0) {
688 the_insn
.highlow
= PAIR
;
691 the_insn
.expand
= insn
->expand
;
693 /* Note that if the getExpression() fails, we will still have
694 created U entries in the symbol table for the 'symbols'
695 in the input string. Try not to create U symbols for
698 if ( !getExpression(s
)) {
712 /* Args don't match. */
713 if (&insn
[1] - i860_opcodes
< NUMOPCODES
714 && !strcmp(insn
->name
, insn
[1].name
))
722 as_bad("Illegal operands");
729 the_insn
.opcode
= opcode
;
740 save_in
= input_line_pointer
;
741 input_line_pointer
= str
;
742 switch (seg
= expression(&the_insn
.exp
)) {
755 the_insn
.error
= "bad segment";
756 expr_end
= input_line_pointer
;
757 input_line_pointer
=save_in
;
760 expr_end
= input_line_pointer
;
761 input_line_pointer
= save_in
;
767 This is identical to the md_atof in m68k.c. I think this is right,
770 Turn a string in input_line_pointer into a floating point constant of type
771 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
772 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
775 /* Equal to MAX_PRECISION in atof-ieee.c */
776 #define MAX_LITTLENUMS 6
779 md_atof(type
,litP
,sizeP
)
785 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
786 LITTLENUM_TYPE
*wordP
;
818 return "Bad call to MD_ATOF()";
820 t
=atof_ieee(input_line_pointer
,type
,words
);
822 input_line_pointer
=t
;
823 *sizeP
=prec
* sizeof(LITTLENUM_TYPE
);
824 for(wordP
=words
;prec
--;) {
825 md_number_to_chars(litP
,(long)(*wordP
++),sizeof(LITTLENUM_TYPE
));
826 litP
+=sizeof(LITTLENUM_TYPE
);
828 return ""; /* Someone should teach Dean about null pointers */
832 * Write out big-endian.
835 md_number_to_chars(buf
,val
,n
)
857 void md_number_to_imm(buf
,val
,n
, fixP
)
863 enum reloc_type reloc
= fixP
->fx_r_type
& 0xf;
864 enum highlow_type highlow
= (fixP
->fx_r_type
>> 4) & 0x3;
867 assert(n
== 4); /* always on i860 */
872 case HIGHADJ
: /* adjusts the high-order 16-bits */
878 case HIGH
: /* selects the high-order 16-bits */
882 case PAIR
: /* selects the low-order 16-bits */
893 case BRADDR
: /* br,call,bc,bc.t,bnc,bnc.t w/26-bit immediate */
894 if (fixP
->fx_pcrel
!= 1)
895 as_bad("26-bit branch w/o pc relative set: 0x%08x", val
);
896 val
>>= 2; /* align pcrel offset, see manual */
898 if (val
>= (1 << 25) || val
< -(1 << 25)) /* check for overflow */
899 as_bad("26-bit branch offset overflow: 0x%08x", val
);
900 buf
[0] = (buf
[0] & 0xfc) | ((val
>> 24) & 0x3);
906 case SPLIT2
: /* 16 bit immediate, 4-byte aligned */
908 as_bad("16-bit immediate 4-byte alignment error: 0x%08x", val
);
909 val
&= ~0x3; /* 4-byte align value */
911 case SPLIT1
: /* 16 bit immediate, 2-byte aligned */
913 as_bad("16-bit immediate 2-byte alignment error: 0x%08x", val
);
914 val
&= ~0x1; /* 2-byte align value */
916 case SPLIT0
: /* st,bla,bte,btne w/16-bit immediate */
917 if (fixP
->fx_pcrel
== 1)
918 val
>>= 2; /* align pcrel offset, see manual */
919 /* check for bounds */
920 if (highlow
!= PAIR
&& (val
>= (1 << 16) || val
< -(1 << 15)))
921 as_bad("16-bit branch offset overflow: 0x%08x", val
);
922 buf
[1] = (buf
[1] & ~0x1f) | ((val
>> 11) & 0x1f);
923 buf
[2] = (buf
[2] & ~0x7) | ((val
>> 8) & 0x7);
924 buf
[3] |= val
; /* perserve bottom opcode bits */
927 case LOW4
: /* fld,pfld,pst,flush 16-byte aligned */
929 as_bad("16-bit immediate 16-byte alignment error: 0x%08x", val
);
930 val
&= ~0xf; /* 16-byte align value */
932 case LOW3
: /* fld,pfld,pst,flush 8-byte aligned */
934 as_bad("16-bit immediate 8-byte alignment error: 0x%08x", val
);
935 val
&= ~0x7; /* 8-byte align value */
937 case LOW2
: /* 16 bit immediate, 4-byte aligned */
939 as_bad("16-bit immediate 4-byte alignment error: 0x%08x", val
);
940 val
&= ~0x3; /* 4-byte align value */
942 case LOW1
: /* 16 bit immediate, 2-byte aligned */
944 as_bad("16-bit immediate 2-byte alignment error: 0x%08x", val
);
945 val
&= ~0x1; /* 2-byte align value */
947 case LOW0
: /* 16 bit immediate, byte aligned */
948 /* check for bounds */
949 if (highlow
!= PAIR
&& (val
>= (1 << 16) || val
< -(1 << 15)))
950 as_bad("16-bit immediate overflow: 0x%08x", val
);
952 buf
[3] |= val
; /* perserve bottom opcode bits */
957 as_bad("bad relocation type: 0x%02x", reloc
);
963 /* should never be called for i860 */
965 md_create_short_jump(ptr
, from_addr
, to_addr
, frag
, to_symbol
)
967 long from_addr
, to_addr
;
971 fprintf(stderr
, "i860_create_short_jmp\n");
975 /* should never be called for i860 */
977 md_number_to_disp(buf
,val
,n
)
981 fprintf(stderr
, "md_number_to_disp\n");
985 /* should never be called for i860 */
987 md_number_to_field(buf
,val
,fix
)
992 fprintf(stderr
, "i860_number_to_field\n");
996 /* the bit-field entries in the relocation_info struct plays hell
997 with the byte-order problems of cross-assembly. So as a hack,
998 I added this mach. dependent ri twiddler. Ugly, but it gets
1000 /* on i860: first 4 bytes are normal unsigned long address, next three
1001 bytes are index, most sig. byte first. Byte 7 is broken up with
1002 bit 7 as pcrel, bit 6 as extern, and the lower six bits as
1003 relocation type (highlow 5-4). Next 4 bytes are long addend. */
1004 /* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */
1006 md_ri_to_chars(ri_p
, ri
)
1007 struct relocation_info
*ri_p
, ri
;
1010 unsigned char the_bytes
[sizeof(*ri_p
)];
1013 md_number_to_chars(the_bytes
, ri
.r_address
, sizeof(ri
.r_address
));
1014 /* now the fun stuff */
1015 the_bytes
[4] = (ri
.r_index
>> 16) & 0x0ff;
1016 the_bytes
[5] = (ri
.r_index
>> 8) & 0x0ff;
1017 the_bytes
[6] = ri
.r_index
& 0x0ff;
1018 the_bytes
[7] = ((ri
.r_extern
<< 7) & 0x80) | (0 & 0x60) | (ri
.r_type
& 0x1F);
1020 md_number_to_chars(&the_bytes
[8], ri
.r_addend
, sizeof(ri
.r_addend
));
1021 /* now put it back where you found it, Junior... */
1022 bcopy (the_bytes
, (char *)ri_p
, sizeof(*ri_p
));
1026 /* should never be called for i860 */
1028 md_convert_frag(fragP
)
1029 register fragS
*fragP
;
1031 fprintf(stderr
, "i860_convert_frag\n");
1035 /* should never be called for i860 */
1037 md_create_long_jump(ptr
, from_addr
, to_addr
, frag
, to_symbol
)
1044 fprintf(stderr
, "i860_create_long_jump\n");
1048 /* should never be called for i860 */
1050 md_estimate_size_before_relax(fragP
, segtype
)
1051 register fragS
*fragP
;
1054 fprintf(stderr
, "i860_estimate_size_before_relax\n");
1059 /* for debugging only, must match enum reloc_type */
1060 static char *Reloc
[] = {
1073 static char *Highlow
[] = {
1081 struct i860_it
*insn
;
1084 fprintf(stderr
, "ERROR: %s\n");
1086 fprintf(stderr
, "opcode=0x%08x\t", insn
->opcode
);
1087 fprintf(stderr
, "expand=0x%08x\t", insn
->expand
);
1088 fprintf(stderr
, "reloc = %s\t", Reloc
[insn
->reloc
]);
1089 fprintf(stderr
, "highlow = %s\n", Highlow
[insn
->highlow
]);
1090 fprintf(stderr
, "exp = {\n");
1091 fprintf(stderr
, "\t\tX_add_symbol = %s\n",
1092 insn
->exp
.X_add_symbol
?
1093 (S_GET_NAME(insn
->exp
.X_add_symbol
) ?
1094 S_GET_NAME(insn
->exp
.X_add_symbol
) : "???") : "0");
1095 fprintf(stderr
, "\t\tX_sub_symbol = %s\n",
1096 insn
->exp
.X_subtract_symbol
?
1097 (S_GET_NAME(insn
->exp
.X_subtract_symbol
) ?
1098 S_GET_NAME(insn
->exp
.X_subtract_symbol
) : "???") : "0");
1099 fprintf(stderr
, "\t\tX_add_number = %d\n",
1100 insn
->exp
.X_add_number
);
1101 fprintf(stderr
, "}\n");
1106 md_parse_option(argP
,cntP
,vecP
)
1115 * I860 relocations are completely different, so it needs
1116 * this machine dependent routine to emit them.
1119 emit_machine_reloc(fixP
, segment_address_in_file
)
1120 register fixS
*fixP
;
1121 relax_addressT segment_address_in_file
;
1123 struct reloc_info_i860 ri
;
1124 register symbolS
*symbolP
;
1125 extern char *next_object_file_charP
;
1128 bzero((char *) &ri
, sizeof(ri
));
1129 for (; fixP
; fixP
= fixP
->fx_next
) {
1131 if (fixP
->fx_r_type
& ~0x3f) {
1132 fprintf(stderr
, "fixP->fx_r_type = %d\n", fixP
->fx_r_type
);
1135 ri
.r_pcrel
= fixP
->fx_pcrel
;
1136 ri
.r_type
= fixP
->fx_r_type
;
1138 if ((symbolP
= fixP
->fx_addsy
) != NULL
) {
1139 ri
.r_address
= fixP
->fx_frag
->fr_address
+
1140 fixP
->fx_where
- segment_address_in_file
;
1141 if ((symbolP
->sy_type
& N_TYPE
) == N_UNDF
) {
1143 ri
.r_symbolnum
= symbolP
->sy_number
;
1146 ri
.r_symbolnum
= symbolP
->sy_type
& N_TYPE
;
1148 if (symbolP
&& symbolP
->sy_frag
) {
1149 ri
.r_addend
= symbolP
->sy_frag
->fr_address
;
1151 ri
.r_type
= fixP
->fx_r_type
;
1152 if (fixP
->fx_pcrel
) {
1153 /* preserve actual offset vs. pc + 4 */
1154 ri
.r_addend
-= (ri
.r_address
+ 4);
1156 ri
.r_addend
= fixP
->fx_addnumber
;
1159 md_ri_to_chars((char *) &ri
, ri
);
1160 append(&next_object_file_charP
, (char *)& ri
, sizeof(ri
));
1166 /* Parse an operand that is machine-specific.
1167 We just return without modifying the expression if we have nothing
1172 md_operand (expressionP
)
1173 expressionS
*expressionP
;
1177 /* We have no need to default values of symbols. */
1181 md_undefined_symbol (name
)
1187 /* Round up a section size to the appropriate boundary. */
1189 md_section_align (segment
, size
)
1193 return size
; /* Byte alignment is fine */
1196 /* Exactly what point is a PC-relative offset relative TO?
1197 On the i860, they're relative to the address of the offset, plus
1198 its size. (??? Is this right? FIXME-SOON!) */
1200 md_pcrel_from (fixP
)
1203 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
1207 md_apply_fix(fixP
, val
)
1211 char *place
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
1213 if (!fixP
->fx_bit_fixP
) {
1215 switch (fixP
->fx_im_disp
) {
1217 fixP
->fx_addnumber
= val
;
1218 md_number_to_imm(place
, val
, fixP
->fx_size
, fixP
);
1221 md_number_to_disp (place
,
1222 fixP
->fx_pcrel
? val
+fixP
->fx_pcrel_adjust
:val
,
1225 case 2: /* fix requested for .long .word etc */
1226 md_number_to_chars (place
, val
, fixP
->fx_size
);
1229 as_fatal("Internal error in md_apply_fix() in file \"%s\"", __FILE__
);
1230 } /* OVE: maybe one ought to put _imm _disp _chars in one md-func */
1232 md_number_to_field (place
, val
, fixP
->fx_bit_fixP
);
1236 } /* md_apply_fix() */
1240 * Revision 1.1 1991/04/04 18:16:48 rich
1243 * Revision 1.2 1991/03/30 17:11:32 rich
1244 * Updated md_create_short_jump calling protocol.