1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008, 2009, 2011, 2012 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
60 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
62 /* Some systems define MIN in, e.g., param.h. */
64 #define MIN(a,b) ((a) < (b) ? (a) : (b))
67 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
68 #define CURR_SLOT md.slot[md.curr_slot]
70 #define O_pseudo_fixup (O_max + 1)
74 /* IA-64 ABI section pseudo-ops. */
75 SPECIAL_SECTION_BSS
= 0,
77 SPECIAL_SECTION_SDATA
,
78 SPECIAL_SECTION_RODATA
,
79 SPECIAL_SECTION_COMMENT
,
80 SPECIAL_SECTION_UNWIND
,
81 SPECIAL_SECTION_UNWIND_INFO
,
82 /* HPUX specific section pseudo-ops. */
83 SPECIAL_SECTION_INIT_ARRAY
,
84 SPECIAL_SECTION_FINI_ARRAY
,
101 FUNC_LT_FPTR_RELATIVE
,
103 FUNC_LT_DTP_RELATIVE
,
107 FUNC_SLOTCOUNT_RELOC
,
114 REG_FR
= (REG_GR
+ 128),
115 REG_AR
= (REG_FR
+ 128),
116 REG_CR
= (REG_AR
+ 128),
117 REG_P
= (REG_CR
+ 128),
118 REG_BR
= (REG_P
+ 64),
119 REG_IP
= (REG_BR
+ 8),
126 /* The following are pseudo-registers for use by gas only. */
137 /* The following pseudo-registers are used for unwind directives only: */
145 DYNREG_GR
= 0, /* dynamic general purpose register */
146 DYNREG_FR
, /* dynamic floating point register */
147 DYNREG_PR
, /* dynamic predicate register */
151 enum operand_match_result
154 OPERAND_OUT_OF_RANGE
,
158 /* On the ia64, we can't know the address of a text label until the
159 instructions are packed into a bundle. To handle this, we keep
160 track of the list of labels that appear in front of each
164 struct label_fix
*next
;
166 bfd_boolean dw2_mark_labels
;
170 /* An internally used relocation. */
171 #define DUMMY_RELOC_IA64_SLOTCOUNT (BFD_RELOC_UNUSED + 1)
174 /* This is the endianness of the current section. */
175 extern int target_big_endian
;
177 /* This is the default endianness. */
178 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
180 void (*ia64_number_to_chars
) (char *, valueT
, int);
182 static void ia64_float_to_chars_bigendian (char *, LITTLENUM_TYPE
*, int);
183 static void ia64_float_to_chars_littleendian (char *, LITTLENUM_TYPE
*, int);
185 static void (*ia64_float_to_chars
) (char *, LITTLENUM_TYPE
*, int);
187 static struct hash_control
*alias_hash
;
188 static struct hash_control
*alias_name_hash
;
189 static struct hash_control
*secalias_hash
;
190 static struct hash_control
*secalias_name_hash
;
192 /* List of chars besides those in app.c:symbol_chars that can start an
193 operand. Used to prevent the scrubber eating vital white-space. */
194 const char ia64_symbol_chars
[] = "@?";
196 /* Characters which always start a comment. */
197 const char comment_chars
[] = "";
199 /* Characters which start a comment at the beginning of a line. */
200 const char line_comment_chars
[] = "#";
202 /* Characters which may be used to separate multiple commands on a
204 const char line_separator_chars
[] = ";{}";
206 /* Characters which are used to indicate an exponent in a floating
208 const char EXP_CHARS
[] = "eE";
210 /* Characters which mean that a number is a floating point constant,
212 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
214 /* ia64-specific option processing: */
216 const char *md_shortopts
= "m:N:x::";
218 struct option md_longopts
[] =
220 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
221 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
222 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
223 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
226 size_t md_longopts_size
= sizeof (md_longopts
);
230 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
231 struct hash_control
*reg_hash
; /* register name hash table */
232 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
233 struct hash_control
*const_hash
; /* constant hash table */
234 struct hash_control
*entry_hash
; /* code entry hint hash table */
236 /* If X_op is != O_absent, the registername for the instruction's
237 qualifying predicate. If NULL, p0 is assumed for instructions
238 that are predictable. */
241 /* Optimize for which CPU. */
248 /* What to do when hint.b is used. */
260 explicit_mode
: 1, /* which mode we're in */
261 default_explicit_mode
: 1, /* which mode is the default */
262 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
264 keep_pending_output
: 1;
266 /* What to do when something is wrong with unwind directives. */
269 unwind_check_warning
,
273 /* Each bundle consists of up to three instructions. We keep
274 track of four most recent instructions so we can correctly set
275 the end_of_insn_group for the last instruction in a bundle. */
277 int num_slots_in_use
;
281 end_of_insn_group
: 1,
282 manual_bundling_on
: 1,
283 manual_bundling_off
: 1,
284 loc_directive_seen
: 1;
285 signed char user_template
; /* user-selected template, if any */
286 unsigned char qp_regno
; /* qualifying predicate */
287 /* This duplicates a good fraction of "struct fix" but we
288 can't use a "struct fix" instead since we can't call
289 fix_new_exp() until we know the address of the instruction. */
293 bfd_reloc_code_real_type code
;
294 enum ia64_opnd opnd
; /* type of operand in need of fix */
295 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
296 expressionS expr
; /* the value to be inserted */
298 fixup
[2]; /* at most two fixups per insn */
299 struct ia64_opcode
*idesc
;
300 struct label_fix
*label_fixups
;
301 struct label_fix
*tag_fixups
;
302 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
305 unsigned int src_line
;
306 struct dwarf2_line_info debug_line
;
314 struct dynreg
*next
; /* next dynamic register */
316 unsigned short base
; /* the base register number */
317 unsigned short num_regs
; /* # of registers in this set */
319 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
321 flagword flags
; /* ELF-header flags */
324 unsigned hint
:1; /* is this hint currently valid? */
325 bfd_vma offset
; /* mem.offset offset */
326 bfd_vma base
; /* mem.offset base */
329 int path
; /* number of alt. entry points seen */
330 const char **entry_labels
; /* labels of all alternate paths in
331 the current DV-checking block. */
332 int maxpaths
; /* size currently allocated for
335 int pointer_size
; /* size in bytes of a pointer */
336 int pointer_size_shift
; /* shift size of a pointer for alignment */
338 symbolS
*indregsym
[IND_RR
- IND_CPUID
+ 1];
342 /* These are not const, because they are modified to MMI for non-itanium1
344 /* MFI bundle of nops. */
345 static unsigned char le_nop
[16] =
347 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
348 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
350 /* MFI bundle of nops with stop-bit. */
351 static unsigned char le_nop_stop
[16] =
353 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
354 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
357 /* application registers: */
363 #define AR_BSPSTORE 18
389 {"ar.k0", AR_K0
}, {"ar.k1", AR_K0
+ 1},
390 {"ar.k2", AR_K0
+ 2}, {"ar.k3", AR_K0
+ 3},
391 {"ar.k4", AR_K0
+ 4}, {"ar.k5", AR_K0
+ 5},
392 {"ar.k6", AR_K0
+ 6}, {"ar.k7", AR_K7
},
393 {"ar.rsc", AR_RSC
}, {"ar.bsp", AR_BSP
},
394 {"ar.bspstore", AR_BSPSTORE
}, {"ar.rnat", AR_RNAT
},
395 {"ar.fcr", AR_FCR
}, {"ar.eflag", AR_EFLAG
},
396 {"ar.csd", AR_CSD
}, {"ar.ssd", AR_SSD
},
397 {"ar.cflg", AR_CFLG
}, {"ar.fsr", AR_FSR
},
398 {"ar.fir", AR_FIR
}, {"ar.fdr", AR_FDR
},
399 {"ar.ccv", AR_CCV
}, {"ar.unat", AR_UNAT
},
400 {"ar.fpsr", AR_FPSR
}, {"ar.itc", AR_ITC
},
401 {"ar.ruc", AR_RUC
}, {"ar.pfs", AR_PFS
},
402 {"ar.lc", AR_LC
}, {"ar.ec", AR_EC
},
405 /* control registers: */
446 {"cr.gpta", CR_GPTA
},
447 {"cr.ipsr", CR_IPSR
},
451 {"cr.itir", CR_ITIR
},
452 {"cr.iipa", CR_IIPA
},
456 {"cr.iib0", CR_IIB0
},
457 {"cr.iib1", CR_IIB1
},
462 {"cr.irr0", CR_IRR0
},
463 {"cr.irr1", CR_IRR0
+ 1},
464 {"cr.irr2", CR_IRR0
+ 2},
465 {"cr.irr3", CR_IRR3
},
468 {"cr.cmcv", CR_CMCV
},
469 {"cr.lrr0", CR_LRR0
},
478 static const struct const_desc
485 /* PSR constant masks: */
488 {"psr.be", ((valueT
) 1) << 1},
489 {"psr.up", ((valueT
) 1) << 2},
490 {"psr.ac", ((valueT
) 1) << 3},
491 {"psr.mfl", ((valueT
) 1) << 4},
492 {"psr.mfh", ((valueT
) 1) << 5},
494 {"psr.ic", ((valueT
) 1) << 13},
495 {"psr.i", ((valueT
) 1) << 14},
496 {"psr.pk", ((valueT
) 1) << 15},
498 {"psr.dt", ((valueT
) 1) << 17},
499 {"psr.dfl", ((valueT
) 1) << 18},
500 {"psr.dfh", ((valueT
) 1) << 19},
501 {"psr.sp", ((valueT
) 1) << 20},
502 {"psr.pp", ((valueT
) 1) << 21},
503 {"psr.di", ((valueT
) 1) << 22},
504 {"psr.si", ((valueT
) 1) << 23},
505 {"psr.db", ((valueT
) 1) << 24},
506 {"psr.lp", ((valueT
) 1) << 25},
507 {"psr.tb", ((valueT
) 1) << 26},
508 {"psr.rt", ((valueT
) 1) << 27},
509 /* 28-31: reserved */
510 /* 32-33: cpl (current privilege level) */
511 {"psr.is", ((valueT
) 1) << 34},
512 {"psr.mc", ((valueT
) 1) << 35},
513 {"psr.it", ((valueT
) 1) << 36},
514 {"psr.id", ((valueT
) 1) << 37},
515 {"psr.da", ((valueT
) 1) << 38},
516 {"psr.dd", ((valueT
) 1) << 39},
517 {"psr.ss", ((valueT
) 1) << 40},
518 /* 41-42: ri (restart instruction) */
519 {"psr.ed", ((valueT
) 1) << 43},
520 {"psr.bn", ((valueT
) 1) << 44},
523 /* indirect register-sets/memory: */
532 { "CPUID", IND_CPUID
},
533 { "cpuid", IND_CPUID
},
545 /* Pseudo functions used to indicate relocation types (these functions
546 start with an at sign (@). */
568 /* reloc pseudo functions (these must come first!): */
569 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
570 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
571 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
572 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
573 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
574 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
575 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
576 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
577 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
578 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
579 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
580 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
581 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
582 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
583 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
584 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
585 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
587 { "slotcount", PSEUDO_FUNC_RELOC
, { 0 } },
590 /* mbtype4 constants: */
591 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
592 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
593 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
594 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
595 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
597 /* fclass constants: */
598 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
599 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
600 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
601 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
602 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
603 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
604 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
605 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
606 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
608 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
610 /* hint constants: */
611 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
613 /* unwind-related constants: */
614 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
615 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
616 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
617 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_GNU
} },
618 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
619 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
620 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
622 /* unwind-related registers: */
623 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
626 /* 41-bit nop opcodes (one per unit): */
627 static const bfd_vma nop
[IA64_NUM_UNITS
] =
629 0x0000000000LL
, /* NIL => break 0 */
630 0x0008000000LL
, /* I-unit nop */
631 0x0008000000LL
, /* M-unit nop */
632 0x4000000000LL
, /* B-unit nop */
633 0x0008000000LL
, /* F-unit nop */
634 0x0000000000LL
, /* L-"unit" nop immediate */
635 0x0008000000LL
, /* X-unit nop */
638 /* Can't be `const' as it's passed to input routines (which have the
639 habit of setting temporary sentinels. */
640 static char special_section_name
[][20] =
642 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
643 {".IA_64.unwind"}, {".IA_64.unwind_info"},
644 {".init_array"}, {".fini_array"}
647 /* The best template for a particular sequence of up to three
649 #define N IA64_NUM_TYPES
650 static unsigned char best_template
[N
][N
][N
];
653 /* Resource dependencies currently in effect */
655 int depind
; /* dependency index */
656 const struct ia64_dependency
*dependency
; /* actual dependency */
657 unsigned specific
:1, /* is this a specific bit/regno? */
658 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
659 int index
; /* specific regno/bit within dependency */
660 int note
; /* optional qualifying note (0 if none) */
664 int insn_srlz
; /* current insn serialization state */
665 int data_srlz
; /* current data serialization state */
666 int qp_regno
; /* qualifying predicate for this usage */
667 char *file
; /* what file marked this dependency */
668 unsigned int line
; /* what line marked this dependency */
669 struct mem_offset mem_offset
; /* optional memory offset hint */
670 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
671 int path
; /* corresponding code entry index */
673 static int regdepslen
= 0;
674 static int regdepstotlen
= 0;
675 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
676 static const char *dv_sem
[] = { "none", "implied", "impliedf",
677 "data", "instr", "specific", "stop", "other" };
678 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
680 /* Current state of PR mutexation */
681 static struct qpmutex
{
684 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
685 static int qp_mutexeslen
= 0;
686 static int qp_mutexestotlen
= 0;
687 static valueT qp_safe_across_calls
= 0;
689 /* Current state of PR implications */
690 static struct qp_imply
{
693 unsigned p2_branched
:1;
695 } *qp_implies
= NULL
;
696 static int qp_implieslen
= 0;
697 static int qp_impliestotlen
= 0;
699 /* Keep track of static GR values so that indirect register usage can
700 sometimes be tracked. */
711 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
717 /* Remember the alignment frag. */
718 static fragS
*align_frag
;
720 /* These are the routines required to output the various types of
723 /* A slot_number is a frag address plus the slot index (0-2). We use the
724 frag address here so that if there is a section switch in the middle of
725 a function, then instructions emitted to a different section are not
726 counted. Since there may be more than one frag for a function, this
727 means we also need to keep track of which frag this address belongs to
728 so we can compute inter-frag distances. This also nicely solves the
729 problem with nops emitted for align directives, which can't easily be
730 counted, but can easily be derived from frag sizes. */
732 typedef struct unw_rec_list
{
734 unsigned long slot_number
;
736 struct unw_rec_list
*next
;
739 #define SLOT_NUM_NOT_SET (unsigned)-1
741 /* Linked list of saved prologue counts. A very poor
742 implementation of a map from label numbers to prologue counts. */
743 typedef struct label_prologue_count
745 struct label_prologue_count
*next
;
746 unsigned long label_number
;
747 unsigned int prologue_count
;
748 } label_prologue_count
;
750 typedef struct proc_pending
753 struct proc_pending
*next
;
758 /* Maintain a list of unwind entries for the current function. */
762 /* Any unwind entries that should be attached to the current slot
763 that an insn is being constructed for. */
764 unw_rec_list
*current_entry
;
766 /* These are used to create the unwind table entry for this function. */
767 proc_pending proc_pending
;
768 symbolS
*info
; /* pointer to unwind info */
769 symbolS
*personality_routine
;
771 subsegT saved_text_subseg
;
772 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
774 /* TRUE if processing unwind directives in a prologue region. */
775 unsigned int prologue
: 1;
776 unsigned int prologue_mask
: 4;
777 unsigned int prologue_gr
: 7;
778 unsigned int body
: 1;
779 unsigned int insn
: 1;
780 unsigned int prologue_count
; /* number of .prologues seen so far */
781 /* Prologue counts at previous .label_state directives. */
782 struct label_prologue_count
* saved_prologue_counts
;
784 /* List of split up .save-s. */
785 unw_p_record
*pending_saves
;
788 /* The input value is a negated offset from psp, and specifies an address
789 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
790 must add 16 and divide by 4 to get the encoded value. */
792 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
794 typedef void (*vbyte_func
) (int, char *, char *);
796 /* Forward declarations: */
797 static void dot_alias (int);
798 static int parse_operand_and_eval (expressionS
*, int);
799 static void emit_one_bundle (void);
800 static bfd_reloc_code_real_type
ia64_gen_real_reloc_type (struct symbol
*,
801 bfd_reloc_code_real_type
);
802 static void insn_group_break (int, int, int);
803 static void add_qp_mutex (valueT
);
804 static void add_qp_imply (int, int);
805 static void clear_qp_mutex (valueT
);
806 static void clear_qp_implies (valueT
, valueT
);
807 static void print_dependency (const char *, int);
808 static void instruction_serialization (void);
809 static void data_serialization (void);
810 static void output_R3_format (vbyte_func
, unw_record_type
, unsigned long);
811 static void output_B3_format (vbyte_func
, unsigned long, unsigned long);
812 static void output_B4_format (vbyte_func
, unw_record_type
, unsigned long);
813 static void free_saved_prologue_counts (void);
815 /* Determine if application register REGNUM resides only in the integer
816 unit (as opposed to the memory unit). */
818 ar_is_only_in_integer_unit (int reg
)
821 return reg
>= 64 && reg
<= 111;
824 /* Determine if application register REGNUM resides only in the memory
825 unit (as opposed to the integer unit). */
827 ar_is_only_in_memory_unit (int reg
)
830 return reg
>= 0 && reg
<= 47;
833 /* Switch to section NAME and create section if necessary. It's
834 rather ugly that we have to manipulate input_line_pointer but I
835 don't see any other way to accomplish the same thing without
836 changing obj-elf.c (which may be the Right Thing, in the end). */
838 set_section (char *name
)
840 char *saved_input_line_pointer
;
842 saved_input_line_pointer
= input_line_pointer
;
843 input_line_pointer
= name
;
845 input_line_pointer
= saved_input_line_pointer
;
848 /* Map 's' to SHF_IA_64_SHORT. */
851 ia64_elf_section_letter (int letter
, char **ptr_msg
)
854 return SHF_IA_64_SHORT
;
855 else if (letter
== 'o')
856 return SHF_LINK_ORDER
;
858 else if (letter
== 'O')
859 return SHF_IA_64_VMS_OVERLAID
;
860 else if (letter
== 'g')
861 return SHF_IA_64_VMS_GLOBAL
;
864 *ptr_msg
= _("bad .section directive: want a,o,s,w,x,M,S,G,T in string");
868 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
871 ia64_elf_section_flags (flagword flags
,
873 int type ATTRIBUTE_UNUSED
)
875 if (attr
& SHF_IA_64_SHORT
)
876 flags
|= SEC_SMALL_DATA
;
881 ia64_elf_section_type (const char *str
, size_t len
)
883 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
885 if (STREQ (ELF_STRING_ia64_unwind_info
))
888 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
891 if (STREQ (ELF_STRING_ia64_unwind
))
892 return SHT_IA_64_UNWIND
;
894 if (STREQ (ELF_STRING_ia64_unwind_once
))
895 return SHT_IA_64_UNWIND
;
897 if (STREQ ("unwind"))
898 return SHT_IA_64_UNWIND
;
905 set_regstack (unsigned int ins
,
913 sof
= ins
+ locs
+ outs
;
916 as_bad (_("Size of frame exceeds maximum of 96 registers"));
921 as_warn (_("Size of rotating registers exceeds frame size"));
924 md
.in
.base
= REG_GR
+ 32;
925 md
.loc
.base
= md
.in
.base
+ ins
;
926 md
.out
.base
= md
.loc
.base
+ locs
;
928 md
.in
.num_regs
= ins
;
929 md
.loc
.num_regs
= locs
;
930 md
.out
.num_regs
= outs
;
931 md
.rot
.num_regs
= rots
;
936 ia64_flush_insns (void)
938 struct label_fix
*lfix
;
940 subsegT saved_subseg
;
944 if (!md
.last_text_seg
)
948 saved_subseg
= now_subseg
;
950 subseg_set (md
.last_text_seg
, 0);
952 while (md
.num_slots_in_use
> 0)
953 emit_one_bundle (); /* force out queued instructions */
955 /* In case there are labels following the last instruction, resolve
958 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
960 symbol_set_value_now (lfix
->sym
);
961 mark
|= lfix
->dw2_mark_labels
;
965 dwarf2_where (&CURR_SLOT
.debug_line
);
966 CURR_SLOT
.debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
967 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT
.debug_line
);
968 dwarf2_consume_line_info ();
970 CURR_SLOT
.label_fixups
= 0;
972 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
973 symbol_set_value_now (lfix
->sym
);
974 CURR_SLOT
.tag_fixups
= 0;
976 /* In case there are unwind directives following the last instruction,
977 resolve those now. We only handle prologue, body, and endp directives
978 here. Give an error for others. */
979 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
987 ptr
->slot_number
= (unsigned long) frag_more (0);
988 ptr
->slot_frag
= frag_now
;
991 /* Allow any record which doesn't have a "t" field (i.e.,
992 doesn't relate to a particular instruction). */
1008 as_bad (_("Unwind directive not followed by an instruction."));
1012 unwind
.current_entry
= NULL
;
1014 subseg_set (saved_seg
, saved_subseg
);
1016 if (md
.qp
.X_op
== O_register
)
1017 as_bad (_("qualifying predicate not followed by instruction"));
1021 ia64_do_align (int nbytes
)
1023 char *saved_input_line_pointer
= input_line_pointer
;
1025 input_line_pointer
= "";
1026 s_align_bytes (nbytes
);
1027 input_line_pointer
= saved_input_line_pointer
;
1031 ia64_cons_align (int nbytes
)
1035 char *saved_input_line_pointer
= input_line_pointer
;
1036 input_line_pointer
= "";
1037 s_align_bytes (nbytes
);
1038 input_line_pointer
= saved_input_line_pointer
;
1044 /* .vms_common section, symbol, size, alignment */
1047 obj_elf_vms_common (int ignore ATTRIBUTE_UNUSED
)
1056 segT current_seg
= now_seg
;
1057 subsegT current_subseg
= now_subseg
;
1061 sec_name
= obj_elf_section_name ();
1062 if (sec_name
== NULL
)
1067 if (*input_line_pointer
== ',')
1069 input_line_pointer
++;
1074 as_bad (_("expected ',' after section name"));
1075 ignore_rest_of_line ();
1079 sym_name
= input_line_pointer
;
1080 c
= get_symbol_end ();
1082 if (input_line_pointer
== sym_name
)
1084 *input_line_pointer
= c
;
1085 as_bad (_("expected symbol name"));
1086 ignore_rest_of_line ();
1090 symbolP
= symbol_find_or_make (sym_name
);
1091 *input_line_pointer
= c
;
1093 if ((S_IS_DEFINED (symbolP
) || symbol_equated_p (symbolP
))
1094 && !S_IS_COMMON (symbolP
))
1096 as_bad (_("Ignoring attempt to re-define symbol"));
1097 ignore_rest_of_line ();
1103 if (*input_line_pointer
== ',')
1105 input_line_pointer
++;
1110 as_bad (_("expected ',' after symbol name"));
1111 ignore_rest_of_line ();
1115 temp
= get_absolute_expression ();
1117 size
&= ((offsetT
) 2 << (stdoutput
->arch_info
->bits_per_address
- 1)) - 1;
1120 as_warn (_("size (%ld) out of range, ignored"), (long) temp
);
1121 ignore_rest_of_line ();
1127 if (*input_line_pointer
== ',')
1129 input_line_pointer
++;
1134 as_bad (_("expected ',' after symbol size"));
1135 ignore_rest_of_line ();
1139 log_align
= get_absolute_expression ();
1141 demand_empty_rest_of_line ();
1143 obj_elf_change_section
1144 (sec_name
, SHT_NOBITS
,
1145 SHF_ALLOC
| SHF_WRITE
| SHF_IA_64_VMS_OVERLAID
| SHF_IA_64_VMS_GLOBAL
,
1148 S_SET_VALUE (symbolP
, 0);
1149 S_SET_SIZE (symbolP
, size
);
1150 S_SET_EXTERNAL (symbolP
);
1151 S_SET_SEGMENT (symbolP
, now_seg
);
1153 symbol_get_bfdsym (symbolP
)->flags
|= BSF_OBJECT
;
1155 record_alignment (now_seg
, log_align
);
1157 cur_size
= bfd_section_size (stdoutput
, now_seg
);
1158 if ((int) size
> cur_size
)
1161 = frag_var (rs_fill
, 1, 1, (relax_substateT
)0, NULL
,
1162 (valueT
)size
- (valueT
)cur_size
, NULL
);
1164 bfd_section_size (stdoutput
, now_seg
) = size
;
1167 /* Switch back to current segment. */
1168 subseg_set (current_seg
, current_subseg
);
1170 #ifdef md_elf_section_change_hook
1171 md_elf_section_change_hook ();
1177 /* Output COUNT bytes to a memory location. */
1178 static char *vbyte_mem_ptr
= NULL
;
1181 output_vbyte_mem (int count
, char *ptr
, char *comment ATTRIBUTE_UNUSED
)
1184 if (vbyte_mem_ptr
== NULL
)
1189 for (x
= 0; x
< count
; x
++)
1190 *(vbyte_mem_ptr
++) = ptr
[x
];
1193 /* Count the number of bytes required for records. */
1194 static int vbyte_count
= 0;
1196 count_output (int count
,
1197 char *ptr ATTRIBUTE_UNUSED
,
1198 char *comment ATTRIBUTE_UNUSED
)
1200 vbyte_count
+= count
;
1204 output_R1_format (vbyte_func f
, unw_record_type rtype
, int rlen
)
1210 output_R3_format (f
, rtype
, rlen
);
1216 else if (rtype
!= prologue
)
1217 as_bad (_("record type is not valid"));
1219 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1220 (*f
) (1, &byte
, NULL
);
1224 output_R2_format (vbyte_func f
, int mask
, int grsave
, unsigned long rlen
)
1228 mask
= (mask
& 0x0f);
1229 grsave
= (grsave
& 0x7f);
1231 bytes
[0] = (UNW_R2
| (mask
>> 1));
1232 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1233 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1234 (*f
) (count
, bytes
, NULL
);
1238 output_R3_format (vbyte_func f
, unw_record_type rtype
, unsigned long rlen
)
1244 output_R1_format (f
, rtype
, rlen
);
1250 else if (rtype
!= prologue
)
1251 as_bad (_("record type is not valid"));
1252 bytes
[0] = (UNW_R3
| r
);
1253 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1254 (*f
) (count
+ 1, bytes
, NULL
);
1258 output_P1_format (vbyte_func f
, int brmask
)
1261 byte
= UNW_P1
| (brmask
& 0x1f);
1262 (*f
) (1, &byte
, NULL
);
1266 output_P2_format (vbyte_func f
, int brmask
, int gr
)
1269 brmask
= (brmask
& 0x1f);
1270 bytes
[0] = UNW_P2
| (brmask
>> 1);
1271 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1272 (*f
) (2, bytes
, NULL
);
1276 output_P3_format (vbyte_func f
, unw_record_type rtype
, int reg
)
1320 as_bad (_("Invalid record type for P3 format."));
1322 bytes
[0] = (UNW_P3
| (r
>> 1));
1323 bytes
[1] = (((r
& 1) << 7) | reg
);
1324 (*f
) (2, bytes
, NULL
);
1328 output_P4_format (vbyte_func f
, unsigned char *imask
, unsigned long imask_size
)
1331 (*f
) (imask_size
, (char *) imask
, NULL
);
1335 output_P5_format (vbyte_func f
, int grmask
, unsigned long frmask
)
1338 grmask
= (grmask
& 0x0f);
1341 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1342 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1343 bytes
[3] = (frmask
& 0x000000ff);
1344 (*f
) (4, bytes
, NULL
);
1348 output_P6_format (vbyte_func f
, unw_record_type rtype
, int rmask
)
1353 if (rtype
== gr_mem
)
1355 else if (rtype
!= fr_mem
)
1356 as_bad (_("Invalid record type for format P6"));
1357 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1358 (*f
) (1, &byte
, NULL
);
1362 output_P7_format (vbyte_func f
,
1363 unw_record_type rtype
,
1370 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1375 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1425 bytes
[0] = (UNW_P7
| r
);
1426 (*f
) (count
, bytes
, NULL
);
1430 output_P8_format (vbyte_func f
, unw_record_type rtype
, unsigned long t
)
1468 case bspstore_psprel
:
1471 case bspstore_sprel
:
1483 case priunat_when_gr
:
1486 case priunat_psprel
:
1492 case priunat_when_mem
:
1499 count
+= output_leb128 (bytes
+ 2, t
, 0);
1500 (*f
) (count
, bytes
, NULL
);
1504 output_P9_format (vbyte_func f
, int grmask
, int gr
)
1508 bytes
[1] = (grmask
& 0x0f);
1509 bytes
[2] = (gr
& 0x7f);
1510 (*f
) (3, bytes
, NULL
);
1514 output_P10_format (vbyte_func f
, int abi
, int context
)
1518 bytes
[1] = (abi
& 0xff);
1519 bytes
[2] = (context
& 0xff);
1520 (*f
) (3, bytes
, NULL
);
1524 output_B1_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1530 output_B4_format (f
, rtype
, label
);
1533 if (rtype
== copy_state
)
1535 else if (rtype
!= label_state
)
1536 as_bad (_("Invalid record type for format B1"));
1538 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1539 (*f
) (1, &byte
, NULL
);
1543 output_B2_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1549 output_B3_format (f
, ecount
, t
);
1552 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1553 count
+= output_leb128 (bytes
+ 1, t
, 0);
1554 (*f
) (count
, bytes
, NULL
);
1558 output_B3_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1564 output_B2_format (f
, ecount
, t
);
1568 count
+= output_leb128 (bytes
+ 1, t
, 0);
1569 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1570 (*f
) (count
, bytes
, NULL
);
1574 output_B4_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1581 output_B1_format (f
, rtype
, label
);
1585 if (rtype
== copy_state
)
1587 else if (rtype
!= label_state
)
1588 as_bad (_("Invalid record type for format B1"));
1590 bytes
[0] = (UNW_B4
| (r
<< 3));
1591 count
+= output_leb128 (bytes
+ 1, label
, 0);
1592 (*f
) (count
, bytes
, NULL
);
1596 format_ab_reg (int ab
, int reg
)
1601 ret
= (ab
<< 5) | reg
;
1606 output_X1_format (vbyte_func f
,
1607 unw_record_type rtype
,
1618 if (rtype
== spill_sprel
)
1620 else if (rtype
!= spill_psprel
)
1621 as_bad (_("Invalid record type for format X1"));
1622 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1623 count
+= output_leb128 (bytes
+ 2, t
, 0);
1624 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1625 (*f
) (count
, bytes
, NULL
);
1629 output_X2_format (vbyte_func f
,
1640 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1641 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1642 count
+= output_leb128 (bytes
+ 3, t
, 0);
1643 (*f
) (count
, bytes
, NULL
);
1647 output_X3_format (vbyte_func f
,
1648 unw_record_type rtype
,
1660 if (rtype
== spill_sprel_p
)
1662 else if (rtype
!= spill_psprel_p
)
1663 as_bad (_("Invalid record type for format X3"));
1664 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1665 bytes
[2] = format_ab_reg (ab
, reg
);
1666 count
+= output_leb128 (bytes
+ 3, t
, 0);
1667 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1668 (*f
) (count
, bytes
, NULL
);
1672 output_X4_format (vbyte_func f
,
1684 bytes
[1] = (qp
& 0x3f);
1685 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1686 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1687 count
+= output_leb128 (bytes
+ 4, t
, 0);
1688 (*f
) (count
, bytes
, NULL
);
1691 /* This function checks whether there are any outstanding .save-s and
1692 discards them if so. */
1695 check_pending_save (void)
1697 if (unwind
.pending_saves
)
1699 unw_rec_list
*cur
, *prev
;
1701 as_warn (_("Previous .save incomplete"));
1702 for (cur
= unwind
.list
, prev
= NULL
; cur
; )
1703 if (&cur
->r
.record
.p
== unwind
.pending_saves
)
1706 prev
->next
= cur
->next
;
1708 unwind
.list
= cur
->next
;
1709 if (cur
== unwind
.tail
)
1711 if (cur
== unwind
.current_entry
)
1712 unwind
.current_entry
= cur
->next
;
1713 /* Don't free the first discarded record, it's being used as
1714 terminator for (currently) br_gr and gr_gr processing, and
1715 also prevents leaving a dangling pointer to it in its
1717 cur
->r
.record
.p
.grmask
= 0;
1718 cur
->r
.record
.p
.brmask
= 0;
1719 cur
->r
.record
.p
.frmask
= 0;
1720 prev
= cur
->r
.record
.p
.next
;
1721 cur
->r
.record
.p
.next
= NULL
;
1733 cur
= cur
->r
.record
.p
.next
;
1736 unwind
.pending_saves
= NULL
;
1740 /* This function allocates a record list structure, and initializes fields. */
1742 static unw_rec_list
*
1743 alloc_record (unw_record_type t
)
1746 ptr
= xmalloc (sizeof (*ptr
));
1747 memset (ptr
, 0, sizeof (*ptr
));
1748 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1753 /* Dummy unwind record used for calculating the length of the last prologue or
1756 static unw_rec_list
*
1759 unw_rec_list
*ptr
= alloc_record (endp
);
1763 static unw_rec_list
*
1764 output_prologue (void)
1766 unw_rec_list
*ptr
= alloc_record (prologue
);
1767 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1771 static unw_rec_list
*
1772 output_prologue_gr (unsigned int saved_mask
, unsigned int reg
)
1774 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1775 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1776 ptr
->r
.record
.r
.grmask
= saved_mask
;
1777 ptr
->r
.record
.r
.grsave
= reg
;
1781 static unw_rec_list
*
1784 unw_rec_list
*ptr
= alloc_record (body
);
1788 static unw_rec_list
*
1789 output_mem_stack_f (unsigned int size
)
1791 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1792 ptr
->r
.record
.p
.size
= size
;
1796 static unw_rec_list
*
1797 output_mem_stack_v (void)
1799 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1803 static unw_rec_list
*
1804 output_psp_gr (unsigned int gr
)
1806 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1807 ptr
->r
.record
.p
.r
.gr
= gr
;
1811 static unw_rec_list
*
1812 output_psp_sprel (unsigned int offset
)
1814 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1815 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1819 static unw_rec_list
*
1820 output_rp_when (void)
1822 unw_rec_list
*ptr
= alloc_record (rp_when
);
1826 static unw_rec_list
*
1827 output_rp_gr (unsigned int gr
)
1829 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1830 ptr
->r
.record
.p
.r
.gr
= gr
;
1834 static unw_rec_list
*
1835 output_rp_br (unsigned int br
)
1837 unw_rec_list
*ptr
= alloc_record (rp_br
);
1838 ptr
->r
.record
.p
.r
.br
= br
;
1842 static unw_rec_list
*
1843 output_rp_psprel (unsigned int offset
)
1845 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1846 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1850 static unw_rec_list
*
1851 output_rp_sprel (unsigned int offset
)
1853 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1854 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1858 static unw_rec_list
*
1859 output_pfs_when (void)
1861 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1865 static unw_rec_list
*
1866 output_pfs_gr (unsigned int gr
)
1868 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1869 ptr
->r
.record
.p
.r
.gr
= gr
;
1873 static unw_rec_list
*
1874 output_pfs_psprel (unsigned int offset
)
1876 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1877 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1881 static unw_rec_list
*
1882 output_pfs_sprel (unsigned int offset
)
1884 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1885 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1889 static unw_rec_list
*
1890 output_preds_when (void)
1892 unw_rec_list
*ptr
= alloc_record (preds_when
);
1896 static unw_rec_list
*
1897 output_preds_gr (unsigned int gr
)
1899 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1900 ptr
->r
.record
.p
.r
.gr
= gr
;
1904 static unw_rec_list
*
1905 output_preds_psprel (unsigned int offset
)
1907 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1908 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1912 static unw_rec_list
*
1913 output_preds_sprel (unsigned int offset
)
1915 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1916 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1920 static unw_rec_list
*
1921 output_fr_mem (unsigned int mask
)
1923 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1924 unw_rec_list
*cur
= ptr
;
1926 ptr
->r
.record
.p
.frmask
= mask
;
1927 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1930 unw_rec_list
*prev
= cur
;
1932 /* Clear least significant set bit. */
1933 mask
&= ~(mask
& (~mask
+ 1));
1936 cur
= alloc_record (fr_mem
);
1937 cur
->r
.record
.p
.frmask
= mask
;
1938 /* Retain only least significant bit. */
1939 prev
->r
.record
.p
.frmask
^= mask
;
1940 prev
->r
.record
.p
.next
= cur
;
1944 static unw_rec_list
*
1945 output_frgr_mem (unsigned int gr_mask
, unsigned int fr_mask
)
1947 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1948 unw_rec_list
*cur
= ptr
;
1950 unwind
.pending_saves
= &cur
->r
.record
.p
;
1951 cur
->r
.record
.p
.frmask
= fr_mask
;
1954 unw_rec_list
*prev
= cur
;
1956 /* Clear least significant set bit. */
1957 fr_mask
&= ~(fr_mask
& (~fr_mask
+ 1));
1958 if (!gr_mask
&& !fr_mask
)
1960 cur
= alloc_record (frgr_mem
);
1961 cur
->r
.record
.p
.frmask
= fr_mask
;
1962 /* Retain only least significant bit. */
1963 prev
->r
.record
.p
.frmask
^= fr_mask
;
1964 prev
->r
.record
.p
.next
= cur
;
1966 cur
->r
.record
.p
.grmask
= gr_mask
;
1969 unw_rec_list
*prev
= cur
;
1971 /* Clear least significant set bit. */
1972 gr_mask
&= ~(gr_mask
& (~gr_mask
+ 1));
1975 cur
= alloc_record (frgr_mem
);
1976 cur
->r
.record
.p
.grmask
= gr_mask
;
1977 /* Retain only least significant bit. */
1978 prev
->r
.record
.p
.grmask
^= gr_mask
;
1979 prev
->r
.record
.p
.next
= cur
;
1983 static unw_rec_list
*
1984 output_gr_gr (unsigned int mask
, unsigned int reg
)
1986 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1987 unw_rec_list
*cur
= ptr
;
1989 ptr
->r
.record
.p
.grmask
= mask
;
1990 ptr
->r
.record
.p
.r
.gr
= reg
;
1991 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1994 unw_rec_list
*prev
= cur
;
1996 /* Clear least significant set bit. */
1997 mask
&= ~(mask
& (~mask
+ 1));
2000 cur
= alloc_record (gr_gr
);
2001 cur
->r
.record
.p
.grmask
= mask
;
2002 /* Indicate this record shouldn't be output. */
2003 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2004 /* Retain only least significant bit. */
2005 prev
->r
.record
.p
.grmask
^= mask
;
2006 prev
->r
.record
.p
.next
= cur
;
2010 static unw_rec_list
*
2011 output_gr_mem (unsigned int mask
)
2013 unw_rec_list
*ptr
= alloc_record (gr_mem
);
2014 unw_rec_list
*cur
= ptr
;
2016 ptr
->r
.record
.p
.grmask
= mask
;
2017 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2020 unw_rec_list
*prev
= cur
;
2022 /* Clear least significant set bit. */
2023 mask
&= ~(mask
& (~mask
+ 1));
2026 cur
= alloc_record (gr_mem
);
2027 cur
->r
.record
.p
.grmask
= mask
;
2028 /* Retain only least significant bit. */
2029 prev
->r
.record
.p
.grmask
^= mask
;
2030 prev
->r
.record
.p
.next
= cur
;
2034 static unw_rec_list
*
2035 output_br_mem (unsigned int mask
)
2037 unw_rec_list
*ptr
= alloc_record (br_mem
);
2038 unw_rec_list
*cur
= ptr
;
2040 ptr
->r
.record
.p
.brmask
= mask
;
2041 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2044 unw_rec_list
*prev
= cur
;
2046 /* Clear least significant set bit. */
2047 mask
&= ~(mask
& (~mask
+ 1));
2050 cur
= alloc_record (br_mem
);
2051 cur
->r
.record
.p
.brmask
= mask
;
2052 /* Retain only least significant bit. */
2053 prev
->r
.record
.p
.brmask
^= mask
;
2054 prev
->r
.record
.p
.next
= cur
;
2058 static unw_rec_list
*
2059 output_br_gr (unsigned int mask
, unsigned int reg
)
2061 unw_rec_list
*ptr
= alloc_record (br_gr
);
2062 unw_rec_list
*cur
= ptr
;
2064 ptr
->r
.record
.p
.brmask
= mask
;
2065 ptr
->r
.record
.p
.r
.gr
= reg
;
2066 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2069 unw_rec_list
*prev
= cur
;
2071 /* Clear least significant set bit. */
2072 mask
&= ~(mask
& (~mask
+ 1));
2075 cur
= alloc_record (br_gr
);
2076 cur
->r
.record
.p
.brmask
= mask
;
2077 /* Indicate this record shouldn't be output. */
2078 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2079 /* Retain only least significant bit. */
2080 prev
->r
.record
.p
.brmask
^= mask
;
2081 prev
->r
.record
.p
.next
= cur
;
2085 static unw_rec_list
*
2086 output_spill_base (unsigned int offset
)
2088 unw_rec_list
*ptr
= alloc_record (spill_base
);
2089 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2093 static unw_rec_list
*
2094 output_unat_when (void)
2096 unw_rec_list
*ptr
= alloc_record (unat_when
);
2100 static unw_rec_list
*
2101 output_unat_gr (unsigned int gr
)
2103 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2104 ptr
->r
.record
.p
.r
.gr
= gr
;
2108 static unw_rec_list
*
2109 output_unat_psprel (unsigned int offset
)
2111 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2112 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2116 static unw_rec_list
*
2117 output_unat_sprel (unsigned int offset
)
2119 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2120 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2124 static unw_rec_list
*
2125 output_lc_when (void)
2127 unw_rec_list
*ptr
= alloc_record (lc_when
);
2131 static unw_rec_list
*
2132 output_lc_gr (unsigned int gr
)
2134 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2135 ptr
->r
.record
.p
.r
.gr
= gr
;
2139 static unw_rec_list
*
2140 output_lc_psprel (unsigned int offset
)
2142 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2143 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2147 static unw_rec_list
*
2148 output_lc_sprel (unsigned int offset
)
2150 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2151 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2155 static unw_rec_list
*
2156 output_fpsr_when (void)
2158 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2162 static unw_rec_list
*
2163 output_fpsr_gr (unsigned int gr
)
2165 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2166 ptr
->r
.record
.p
.r
.gr
= gr
;
2170 static unw_rec_list
*
2171 output_fpsr_psprel (unsigned int offset
)
2173 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2174 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2178 static unw_rec_list
*
2179 output_fpsr_sprel (unsigned int offset
)
2181 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2182 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2186 static unw_rec_list
*
2187 output_priunat_when_gr (void)
2189 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2193 static unw_rec_list
*
2194 output_priunat_when_mem (void)
2196 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2200 static unw_rec_list
*
2201 output_priunat_gr (unsigned int gr
)
2203 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2204 ptr
->r
.record
.p
.r
.gr
= gr
;
2208 static unw_rec_list
*
2209 output_priunat_psprel (unsigned int offset
)
2211 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2212 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2216 static unw_rec_list
*
2217 output_priunat_sprel (unsigned int offset
)
2219 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2220 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2224 static unw_rec_list
*
2225 output_bsp_when (void)
2227 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2231 static unw_rec_list
*
2232 output_bsp_gr (unsigned int gr
)
2234 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2235 ptr
->r
.record
.p
.r
.gr
= gr
;
2239 static unw_rec_list
*
2240 output_bsp_psprel (unsigned int offset
)
2242 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2243 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2247 static unw_rec_list
*
2248 output_bsp_sprel (unsigned int offset
)
2250 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2251 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2255 static unw_rec_list
*
2256 output_bspstore_when (void)
2258 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2262 static unw_rec_list
*
2263 output_bspstore_gr (unsigned int gr
)
2265 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2266 ptr
->r
.record
.p
.r
.gr
= gr
;
2270 static unw_rec_list
*
2271 output_bspstore_psprel (unsigned int offset
)
2273 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2274 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2278 static unw_rec_list
*
2279 output_bspstore_sprel (unsigned int offset
)
2281 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2282 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2286 static unw_rec_list
*
2287 output_rnat_when (void)
2289 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2293 static unw_rec_list
*
2294 output_rnat_gr (unsigned int gr
)
2296 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2297 ptr
->r
.record
.p
.r
.gr
= gr
;
2301 static unw_rec_list
*
2302 output_rnat_psprel (unsigned int offset
)
2304 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2305 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2309 static unw_rec_list
*
2310 output_rnat_sprel (unsigned int offset
)
2312 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2313 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2317 static unw_rec_list
*
2318 output_unwabi (unsigned long abi
, unsigned long context
)
2320 unw_rec_list
*ptr
= alloc_record (unwabi
);
2321 ptr
->r
.record
.p
.abi
= abi
;
2322 ptr
->r
.record
.p
.context
= context
;
2326 static unw_rec_list
*
2327 output_epilogue (unsigned long ecount
)
2329 unw_rec_list
*ptr
= alloc_record (epilogue
);
2330 ptr
->r
.record
.b
.ecount
= ecount
;
2334 static unw_rec_list
*
2335 output_label_state (unsigned long label
)
2337 unw_rec_list
*ptr
= alloc_record (label_state
);
2338 ptr
->r
.record
.b
.label
= label
;
2342 static unw_rec_list
*
2343 output_copy_state (unsigned long label
)
2345 unw_rec_list
*ptr
= alloc_record (copy_state
);
2346 ptr
->r
.record
.b
.label
= label
;
2350 static unw_rec_list
*
2351 output_spill_psprel (unsigned int ab
,
2353 unsigned int offset
,
2354 unsigned int predicate
)
2356 unw_rec_list
*ptr
= alloc_record (predicate
? spill_psprel_p
: spill_psprel
);
2357 ptr
->r
.record
.x
.ab
= ab
;
2358 ptr
->r
.record
.x
.reg
= reg
;
2359 ptr
->r
.record
.x
.where
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2360 ptr
->r
.record
.x
.qp
= predicate
;
2364 static unw_rec_list
*
2365 output_spill_sprel (unsigned int ab
,
2367 unsigned int offset
,
2368 unsigned int predicate
)
2370 unw_rec_list
*ptr
= alloc_record (predicate
? spill_sprel_p
: spill_sprel
);
2371 ptr
->r
.record
.x
.ab
= ab
;
2372 ptr
->r
.record
.x
.reg
= reg
;
2373 ptr
->r
.record
.x
.where
.spoff
= offset
/ 4;
2374 ptr
->r
.record
.x
.qp
= predicate
;
2378 static unw_rec_list
*
2379 output_spill_reg (unsigned int ab
,
2381 unsigned int targ_reg
,
2383 unsigned int predicate
)
2385 unw_rec_list
*ptr
= alloc_record (predicate
? spill_reg_p
: spill_reg
);
2386 ptr
->r
.record
.x
.ab
= ab
;
2387 ptr
->r
.record
.x
.reg
= reg
;
2388 ptr
->r
.record
.x
.where
.reg
= targ_reg
;
2389 ptr
->r
.record
.x
.xy
= xy
;
2390 ptr
->r
.record
.x
.qp
= predicate
;
2394 /* Given a unw_rec_list process the correct format with the
2395 specified function. */
2398 process_one_record (unw_rec_list
*ptr
, vbyte_func f
)
2400 unsigned int fr_mask
, gr_mask
;
2402 switch (ptr
->r
.type
)
2404 /* This is a dummy record that takes up no space in the output. */
2412 /* These are taken care of by prologue/prologue_gr. */
2417 if (ptr
->r
.type
== prologue_gr
)
2418 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2419 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2421 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2423 /* Output descriptor(s) for union of register spills (if any). */
2424 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2425 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2428 if ((fr_mask
& ~0xfUL
) == 0)
2429 output_P6_format (f
, fr_mem
, fr_mask
);
2432 output_P5_format (f
, gr_mask
, fr_mask
);
2437 output_P6_format (f
, gr_mem
, gr_mask
);
2438 if (ptr
->r
.record
.r
.mask
.br_mem
)
2439 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2441 /* output imask descriptor if necessary: */
2442 if (ptr
->r
.record
.r
.mask
.i
)
2443 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2444 ptr
->r
.record
.r
.imask_size
);
2448 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2452 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2453 ptr
->r
.record
.p
.size
);
2466 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.r
.gr
);
2469 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.r
.br
);
2472 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.off
.sp
, 0);
2480 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2489 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
, 0);
2499 case bspstore_sprel
:
2501 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.sp
);
2504 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2506 const unw_rec_list
*cur
= ptr
;
2508 gr_mask
= cur
->r
.record
.p
.grmask
;
2509 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2510 gr_mask
|= cur
->r
.record
.p
.grmask
;
2511 output_P9_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2515 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2517 const unw_rec_list
*cur
= ptr
;
2519 gr_mask
= cur
->r
.record
.p
.brmask
;
2520 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2521 gr_mask
|= cur
->r
.record
.p
.brmask
;
2522 output_P2_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2526 as_bad (_("spill_mask record unimplemented."));
2528 case priunat_when_gr
:
2529 case priunat_when_mem
:
2533 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2535 case priunat_psprel
:
2537 case bspstore_psprel
:
2539 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
);
2542 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2545 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2549 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2552 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2553 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2554 ptr
->r
.record
.x
.where
.pspoff
);
2557 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2558 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2559 ptr
->r
.record
.x
.where
.spoff
);
2562 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2563 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2564 ptr
->r
.record
.x
.where
.reg
, ptr
->r
.record
.x
.t
);
2566 case spill_psprel_p
:
2567 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2568 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2569 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.pspoff
);
2572 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2573 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2574 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.spoff
);
2577 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2578 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2579 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.where
.reg
,
2583 as_bad (_("record_type_not_valid"));
2588 /* Given a unw_rec_list list, process all the records with
2589 the specified function. */
2591 process_unw_records (unw_rec_list
*list
, vbyte_func f
)
2594 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2595 process_one_record (ptr
, f
);
2598 /* Determine the size of a record list in bytes. */
2600 calc_record_size (unw_rec_list
*list
)
2603 process_unw_records (list
, count_output
);
2607 /* Return the number of bits set in the input value.
2608 Perhaps this has a better place... */
2609 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2610 # define popcount __builtin_popcount
2613 popcount (unsigned x
)
2615 static const unsigned char popcnt
[16] =
2623 if (x
< NELEMS (popcnt
))
2625 return popcnt
[x
% NELEMS (popcnt
)] + popcount (x
/ NELEMS (popcnt
));
2629 /* Update IMASK bitmask to reflect the fact that one or more registers
2630 of type TYPE are saved starting at instruction with index T. If N
2631 bits are set in REGMASK, it is assumed that instructions T through
2632 T+N-1 save these registers.
2636 1: instruction saves next fp reg
2637 2: instruction saves next general reg
2638 3: instruction saves next branch reg */
2640 set_imask (unw_rec_list
*region
,
2641 unsigned long regmask
,
2645 unsigned char *imask
;
2646 unsigned long imask_size
;
2650 imask
= region
->r
.record
.r
.mask
.i
;
2651 imask_size
= region
->r
.record
.r
.imask_size
;
2654 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2655 imask
= xmalloc (imask_size
);
2656 memset (imask
, 0, imask_size
);
2658 region
->r
.record
.r
.imask_size
= imask_size
;
2659 region
->r
.record
.r
.mask
.i
= imask
;
2663 pos
= 2 * (3 - t
% 4);
2666 if (i
>= imask_size
)
2668 as_bad (_("Ignoring attempt to spill beyond end of region"));
2672 imask
[i
] |= (type
& 0x3) << pos
;
2674 regmask
&= (regmask
- 1);
2684 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2685 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2686 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2689 static unsigned long
2690 slot_index (unsigned long slot_addr
,
2692 unsigned long first_addr
,
2696 unsigned long s_index
= 0;
2698 /* First time we are called, the initial address and frag are invalid. */
2699 if (first_addr
== 0)
2702 /* If the two addresses are in different frags, then we need to add in
2703 the remaining size of this frag, and then the entire size of intermediate
2705 while (slot_frag
!= first_frag
)
2707 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2711 /* We can get the final addresses only during and after
2713 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2714 s_index
+= 3 * ((first_frag
->fr_next
->fr_address
2715 - first_frag
->fr_address
2716 - first_frag
->fr_fix
) >> 4);
2719 /* We don't know what the final addresses will be. We try our
2720 best to estimate. */
2721 switch (first_frag
->fr_type
)
2727 as_fatal (_("Only constant space allocation is supported"));
2733 /* Take alignment into account. Assume the worst case
2734 before relaxation. */
2735 s_index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2739 if (first_frag
->fr_symbol
)
2741 as_fatal (_("Only constant offsets are supported"));
2745 s_index
+= 3 * (first_frag
->fr_offset
>> 4);
2749 /* Add in the full size of the frag converted to instruction slots. */
2750 s_index
+= 3 * (first_frag
->fr_fix
>> 4);
2751 /* Subtract away the initial part before first_addr. */
2752 s_index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2753 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2755 /* Move to the beginning of the next frag. */
2756 first_frag
= first_frag
->fr_next
;
2757 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2759 /* This can happen if there is section switching in the middle of a
2760 function, causing the frag chain for the function to be broken.
2761 It is too difficult to recover safely from this problem, so we just
2762 exit with an error. */
2763 if (first_frag
== NULL
)
2764 as_fatal (_("Section switching in code is not supported."));
2767 /* Add in the used part of the last frag. */
2768 s_index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2769 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2773 /* Optimize unwind record directives. */
2775 static unw_rec_list
*
2776 optimize_unw_records (unw_rec_list
*list
)
2781 /* If the only unwind record is ".prologue" or ".prologue" followed
2782 by ".body", then we can optimize the unwind directives away. */
2783 if (list
->r
.type
== prologue
2784 && (list
->next
->r
.type
== endp
2785 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2791 /* Given a complete record list, process any records which have
2792 unresolved fields, (ie length counts for a prologue). After
2793 this has been run, all necessary information should be available
2794 within each record to generate an image. */
2797 fixup_unw_records (unw_rec_list
*list
, int before_relax
)
2799 unw_rec_list
*ptr
, *region
= 0;
2800 unsigned long first_addr
= 0, rlen
= 0, t
;
2801 fragS
*first_frag
= 0;
2803 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2805 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2806 as_bad (_(" Insn slot not set in unwind record."));
2807 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2808 first_addr
, first_frag
, before_relax
);
2809 switch (ptr
->r
.type
)
2817 unsigned long last_addr
= 0;
2818 fragS
*last_frag
= NULL
;
2820 first_addr
= ptr
->slot_number
;
2821 first_frag
= ptr
->slot_frag
;
2822 /* Find either the next body/prologue start, or the end of
2823 the function, and determine the size of the region. */
2824 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2825 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2826 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2828 last_addr
= last
->slot_number
;
2829 last_frag
= last
->slot_frag
;
2832 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2834 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2835 if (ptr
->r
.type
== body
)
2836 /* End of region. */
2844 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2846 /* This happens when a memory-stack-less procedure uses a
2847 ".restore sp" directive at the end of a region to pop
2849 ptr
->r
.record
.b
.t
= 0;
2860 case priunat_when_gr
:
2861 case priunat_when_mem
:
2865 ptr
->r
.record
.p
.t
= t
;
2873 case spill_psprel_p
:
2874 ptr
->r
.record
.x
.t
= t
;
2880 as_bad (_("frgr_mem record before region record!"));
2883 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2884 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2885 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2886 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2891 as_bad (_("fr_mem record before region record!"));
2894 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2895 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2900 as_bad (_("gr_mem record before region record!"));
2903 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2904 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2909 as_bad (_("br_mem record before region record!"));
2912 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2913 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2919 as_bad (_("gr_gr record before region record!"));
2922 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2927 as_bad (_("br_gr record before region record!"));
2930 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2939 /* Estimate the size of a frag before relaxing. We only have one type of frag
2940 to handle here, which is the unwind info frag. */
2943 ia64_estimate_size_before_relax (fragS
*frag
,
2944 asection
*segtype ATTRIBUTE_UNUSED
)
2949 /* ??? This code is identical to the first part of ia64_convert_frag. */
2950 list
= (unw_rec_list
*) frag
->fr_opcode
;
2951 fixup_unw_records (list
, 0);
2953 len
= calc_record_size (list
);
2954 /* pad to pointer-size boundary. */
2955 pad
= len
% md
.pointer_size
;
2957 len
+= md
.pointer_size
- pad
;
2958 /* Add 8 for the header. */
2960 /* Add a pointer for the personality offset. */
2961 if (frag
->fr_offset
)
2962 size
+= md
.pointer_size
;
2964 /* fr_var carries the max_chars that we created the fragment with.
2965 We must, of course, have allocated enough memory earlier. */
2966 gas_assert (frag
->fr_var
>= size
);
2968 return frag
->fr_fix
+ size
;
2971 /* This function converts a rs_machine_dependent variant frag into a
2972 normal fill frag with the unwind image from the the record list. */
2974 ia64_convert_frag (fragS
*frag
)
2980 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2981 list
= (unw_rec_list
*) frag
->fr_opcode
;
2982 fixup_unw_records (list
, 0);
2984 len
= calc_record_size (list
);
2985 /* pad to pointer-size boundary. */
2986 pad
= len
% md
.pointer_size
;
2988 len
+= md
.pointer_size
- pad
;
2989 /* Add 8 for the header. */
2991 /* Add a pointer for the personality offset. */
2992 if (frag
->fr_offset
)
2993 size
+= md
.pointer_size
;
2995 /* fr_var carries the max_chars that we created the fragment with.
2996 We must, of course, have allocated enough memory earlier. */
2997 gas_assert (frag
->fr_var
>= size
);
2999 /* Initialize the header area. fr_offset is initialized with
3000 unwind.personality_routine. */
3001 if (frag
->fr_offset
)
3003 if (md
.flags
& EF_IA_64_ABI64
)
3004 flag_value
= (bfd_vma
) 3 << 32;
3006 /* 32-bit unwind info block. */
3007 flag_value
= (bfd_vma
) 0x1003 << 32;
3012 md_number_to_chars (frag
->fr_literal
,
3013 (((bfd_vma
) 1 << 48) /* Version. */
3014 | flag_value
/* U & E handler flags. */
3015 | (len
/ md
.pointer_size
)), /* Length. */
3018 /* Skip the header. */
3019 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
3020 process_unw_records (list
, output_vbyte_mem
);
3022 /* Fill the padding bytes with zeros. */
3024 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
3025 md
.pointer_size
- pad
);
3026 /* Fill the unwind personality with zeros. */
3027 if (frag
->fr_offset
)
3028 md_number_to_chars (frag
->fr_literal
+ size
- md
.pointer_size
, 0,
3031 frag
->fr_fix
+= size
;
3032 frag
->fr_type
= rs_fill
;
3034 frag
->fr_offset
= 0;
3038 parse_predicate_and_operand (expressionS
*e
, unsigned *qp
, const char *po
)
3040 int sep
= parse_operand_and_eval (e
, ',');
3042 *qp
= e
->X_add_number
- REG_P
;
3043 if (e
->X_op
!= O_register
|| *qp
> 63)
3045 as_bad (_("First operand to .%s must be a predicate"), po
);
3049 as_warn (_("Pointless use of p0 as first operand to .%s"), po
);
3051 sep
= parse_operand_and_eval (e
, ',');
3058 convert_expr_to_ab_reg (const expressionS
*e
,
3064 unsigned int reg
= e
->X_add_number
;
3066 *ab
= *regp
= 0; /* Anything valid is good here. */
3068 if (e
->X_op
!= O_register
)
3069 reg
= REG_GR
; /* Anything invalid is good here. */
3071 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
3074 *regp
= reg
- REG_GR
;
3076 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
3077 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
3080 *regp
= reg
- REG_FR
;
3082 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3085 *regp
= reg
- REG_BR
;
3092 case REG_PR
: *regp
= 0; break;
3093 case REG_PSP
: *regp
= 1; break;
3094 case REG_PRIUNAT
: *regp
= 2; break;
3095 case REG_BR
+ 0: *regp
= 3; break;
3096 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3097 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3098 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3099 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3100 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3101 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3102 case REG_AR
+ AR_LC
: *regp
= 10; break;
3105 as_bad (_("Operand %d to .%s must be a preserved register"), n
, po
);
3112 convert_expr_to_xy_reg (const expressionS
*e
,
3118 unsigned int reg
= e
->X_add_number
;
3120 *xy
= *regp
= 0; /* Anything valid is good here. */
3122 if (e
->X_op
!= O_register
)
3123 reg
= REG_GR
; /* Anything invalid is good here. */
3125 if (reg
>= (REG_GR
+ 1) && reg
<= (REG_GR
+ 127))
3128 *regp
= reg
- REG_GR
;
3130 else if (reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 127))
3133 *regp
= reg
- REG_FR
;
3135 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3138 *regp
= reg
- REG_BR
;
3141 as_bad (_("Operand %d to .%s must be a writable register"), n
, po
);
3147 /* The current frag is an alignment frag. */
3148 align_frag
= frag_now
;
3149 s_align_bytes (arg
);
3153 dot_radix (int dummy ATTRIBUTE_UNUSED
)
3160 if (is_it_end_of_statement ())
3162 radix
= input_line_pointer
;
3163 ch
= get_symbol_end ();
3164 ia64_canonicalize_symbol_name (radix
);
3165 if (strcasecmp (radix
, "C"))
3166 as_bad (_("Radix `%s' unsupported or invalid"), radix
);
3167 *input_line_pointer
= ch
;
3168 demand_empty_rest_of_line ();
3171 /* Helper function for .loc directives. If the assembler is not generating
3172 line number info, then we need to remember which instructions have a .loc
3173 directive, and only call dwarf2_gen_line_info for those instructions. */
3178 CURR_SLOT
.loc_directive_seen
= 1;
3179 dwarf2_directive_loc (x
);
3182 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3184 dot_special_section (int which
)
3186 set_section ((char *) special_section_name
[which
]);
3189 /* Return -1 for warning and 0 for error. */
3192 unwind_diagnostic (const char * region
, const char *directive
)
3194 if (md
.unwind_check
== unwind_check_warning
)
3196 as_warn (_(".%s outside of %s"), directive
, region
);
3201 as_bad (_(".%s outside of %s"), directive
, region
);
3202 ignore_rest_of_line ();
3207 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3208 a procedure but the unwind directive check is set to warning, 0 if
3209 a directive isn't in a procedure and the unwind directive check is set
3213 in_procedure (const char *directive
)
3215 if (unwind
.proc_pending
.sym
3216 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3218 return unwind_diagnostic ("procedure", directive
);
3221 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3222 a prologue but the unwind directive check is set to warning, 0 if
3223 a directive isn't in a prologue and the unwind directive check is set
3227 in_prologue (const char *directive
)
3229 int in
= in_procedure (directive
);
3231 if (in
> 0 && !unwind
.prologue
)
3232 in
= unwind_diagnostic ("prologue", directive
);
3233 check_pending_save ();
3237 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3238 a body but the unwind directive check is set to warning, 0 if
3239 a directive isn't in a body and the unwind directive check is set
3243 in_body (const char *directive
)
3245 int in
= in_procedure (directive
);
3247 if (in
> 0 && !unwind
.body
)
3248 in
= unwind_diagnostic ("body region", directive
);
3253 add_unwind_entry (unw_rec_list
*ptr
, int sep
)
3258 unwind
.tail
->next
= ptr
;
3263 /* The current entry can in fact be a chain of unwind entries. */
3264 if (unwind
.current_entry
== NULL
)
3265 unwind
.current_entry
= ptr
;
3268 /* The current entry can in fact be a chain of unwind entries. */
3269 if (unwind
.current_entry
== NULL
)
3270 unwind
.current_entry
= ptr
;
3274 /* Parse a tag permitted for the current directive. */
3278 ch
= get_symbol_end ();
3279 /* FIXME: For now, just issue a warning that this isn't implemented. */
3286 as_warn (_("Tags on unwind pseudo-ops aren't supported, yet"));
3289 *input_line_pointer
= ch
;
3291 if (sep
!= NOT_A_CHAR
)
3292 demand_empty_rest_of_line ();
3296 dot_fframe (int dummy ATTRIBUTE_UNUSED
)
3301 if (!in_prologue ("fframe"))
3304 sep
= parse_operand_and_eval (&e
, ',');
3306 if (e
.X_op
!= O_constant
)
3308 as_bad (_("First operand to .fframe must be a constant"));
3311 add_unwind_entry (output_mem_stack_f (e
.X_add_number
), sep
);
3315 dot_vframe (int dummy ATTRIBUTE_UNUSED
)
3321 if (!in_prologue ("vframe"))
3324 sep
= parse_operand_and_eval (&e
, ',');
3325 reg
= e
.X_add_number
- REG_GR
;
3326 if (e
.X_op
!= O_register
|| reg
> 127)
3328 as_bad (_("First operand to .vframe must be a general register"));
3331 add_unwind_entry (output_mem_stack_v (), sep
);
3332 if (! (unwind
.prologue_mask
& 2))
3333 add_unwind_entry (output_psp_gr (reg
), NOT_A_CHAR
);
3334 else if (reg
!= unwind
.prologue_gr
3335 + (unsigned) popcount (unwind
.prologue_mask
& (-2 << 1)))
3336 as_warn (_("Operand of .vframe contradicts .prologue"));
3340 dot_vframesp (int psp
)
3346 as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant"));
3348 if (!in_prologue ("vframesp"))
3351 sep
= parse_operand_and_eval (&e
, ',');
3352 if (e
.X_op
!= O_constant
)
3354 as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)"));
3357 add_unwind_entry (output_mem_stack_v (), sep
);
3358 add_unwind_entry (output_psp_sprel (e
.X_add_number
), NOT_A_CHAR
);
3362 dot_save (int dummy ATTRIBUTE_UNUSED
)
3365 unsigned reg1
, reg2
;
3368 if (!in_prologue ("save"))
3371 sep
= parse_operand_and_eval (&e1
, ',');
3373 sep
= parse_operand_and_eval (&e2
, ',');
3377 reg1
= e1
.X_add_number
;
3378 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3379 if (e1
.X_op
!= O_register
)
3381 as_bad (_("First operand to .save not a register"));
3382 reg1
= REG_PR
; /* Anything valid is good here. */
3384 reg2
= e2
.X_add_number
- REG_GR
;
3385 if (e2
.X_op
!= O_register
|| reg2
> 127)
3387 as_bad (_("Second operand to .save not a valid register"));
3392 case REG_AR
+ AR_BSP
:
3393 add_unwind_entry (output_bsp_when (), sep
);
3394 add_unwind_entry (output_bsp_gr (reg2
), NOT_A_CHAR
);
3396 case REG_AR
+ AR_BSPSTORE
:
3397 add_unwind_entry (output_bspstore_when (), sep
);
3398 add_unwind_entry (output_bspstore_gr (reg2
), NOT_A_CHAR
);
3400 case REG_AR
+ AR_RNAT
:
3401 add_unwind_entry (output_rnat_when (), sep
);
3402 add_unwind_entry (output_rnat_gr (reg2
), NOT_A_CHAR
);
3404 case REG_AR
+ AR_UNAT
:
3405 add_unwind_entry (output_unat_when (), sep
);
3406 add_unwind_entry (output_unat_gr (reg2
), NOT_A_CHAR
);
3408 case REG_AR
+ AR_FPSR
:
3409 add_unwind_entry (output_fpsr_when (), sep
);
3410 add_unwind_entry (output_fpsr_gr (reg2
), NOT_A_CHAR
);
3412 case REG_AR
+ AR_PFS
:
3413 add_unwind_entry (output_pfs_when (), sep
);
3414 if (! (unwind
.prologue_mask
& 4))
3415 add_unwind_entry (output_pfs_gr (reg2
), NOT_A_CHAR
);
3416 else if (reg2
!= unwind
.prologue_gr
3417 + (unsigned) popcount (unwind
.prologue_mask
& (-4 << 1)))
3418 as_warn (_("Second operand of .save contradicts .prologue"));
3420 case REG_AR
+ AR_LC
:
3421 add_unwind_entry (output_lc_when (), sep
);
3422 add_unwind_entry (output_lc_gr (reg2
), NOT_A_CHAR
);
3425 add_unwind_entry (output_rp_when (), sep
);
3426 if (! (unwind
.prologue_mask
& 8))
3427 add_unwind_entry (output_rp_gr (reg2
), NOT_A_CHAR
);
3428 else if (reg2
!= unwind
.prologue_gr
)
3429 as_warn (_("Second operand of .save contradicts .prologue"));
3432 add_unwind_entry (output_preds_when (), sep
);
3433 if (! (unwind
.prologue_mask
& 1))
3434 add_unwind_entry (output_preds_gr (reg2
), NOT_A_CHAR
);
3435 else if (reg2
!= unwind
.prologue_gr
3436 + (unsigned) popcount (unwind
.prologue_mask
& (-1 << 1)))
3437 as_warn (_("Second operand of .save contradicts .prologue"));
3440 add_unwind_entry (output_priunat_when_gr (), sep
);
3441 add_unwind_entry (output_priunat_gr (reg2
), NOT_A_CHAR
);
3444 as_bad (_("First operand to .save not a valid register"));
3445 add_unwind_entry (NULL
, sep
);
3451 dot_restore (int dummy ATTRIBUTE_UNUSED
)
3454 unsigned long ecount
; /* # of _additional_ regions to pop */
3457 if (!in_body ("restore"))
3460 sep
= parse_operand_and_eval (&e1
, ',');
3461 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3462 as_bad (_("First operand to .restore must be stack pointer (sp)"));
3468 sep
= parse_operand_and_eval (&e2
, ',');
3469 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3471 as_bad (_("Second operand to .restore must be a constant >= 0"));
3472 e2
.X_add_number
= 0;
3474 ecount
= e2
.X_add_number
;
3477 ecount
= unwind
.prologue_count
- 1;
3479 if (ecount
>= unwind
.prologue_count
)
3481 as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"),
3482 ecount
+ 1, unwind
.prologue_count
);
3486 add_unwind_entry (output_epilogue (ecount
), sep
);
3488 if (ecount
< unwind
.prologue_count
)
3489 unwind
.prologue_count
-= ecount
+ 1;
3491 unwind
.prologue_count
= 0;
3495 dot_restorereg (int pred
)
3497 unsigned int qp
, ab
, reg
;
3500 const char * const po
= pred
? "restorereg.p" : "restorereg";
3502 if (!in_procedure (po
))
3506 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3509 sep
= parse_operand_and_eval (&e
, ',');
3512 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3514 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0, qp
), sep
);
3517 static char *special_linkonce_name
[] =
3519 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3523 start_unwind_section (const segT text_seg
, int sec_index
)
3526 Use a slightly ugly scheme to derive the unwind section names from
3527 the text section name:
3529 text sect. unwind table sect.
3530 name: name: comments:
3531 ---------- ----------------- --------------------------------
3533 .text.foo .IA_64.unwind.text.foo
3534 .foo .IA_64.unwind.foo
3536 .gnu.linkonce.ia64unw.foo
3537 _info .IA_64.unwind_info gas issues error message (ditto)
3538 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3540 This mapping is done so that:
3542 (a) An object file with unwind info only in .text will use
3543 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3544 This follows the letter of the ABI and also ensures backwards
3545 compatibility with older toolchains.
3547 (b) An object file with unwind info in multiple text sections
3548 will use separate unwind sections for each text section.
3549 This allows us to properly set the "sh_info" and "sh_link"
3550 fields in SHT_IA_64_UNWIND as required by the ABI and also
3551 lets GNU ld support programs with multiple segments
3552 containing unwind info (as might be the case for certain
3553 embedded applications).
3555 (c) An error is issued if there would be a name clash.
3558 const char *text_name
, *sec_text_name
;
3560 const char *prefix
= special_section_name
[sec_index
];
3562 size_t prefix_len
, suffix_len
, sec_name_len
;
3564 sec_text_name
= segment_name (text_seg
);
3565 text_name
= sec_text_name
;
3566 if (strncmp (text_name
, "_info", 5) == 0)
3568 as_bad (_("Illegal section name `%s' (causes unwind section name clash)"),
3570 ignore_rest_of_line ();
3573 if (strcmp (text_name
, ".text") == 0)
3576 /* Build the unwind section name by appending the (possibly stripped)
3577 text section name to the unwind prefix. */
3579 if (strncmp (text_name
, ".gnu.linkonce.t.",
3580 sizeof (".gnu.linkonce.t.") - 1) == 0)
3582 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3583 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3586 prefix_len
= strlen (prefix
);
3587 suffix_len
= strlen (suffix
);
3588 sec_name_len
= prefix_len
+ suffix_len
;
3589 sec_name
= alloca (sec_name_len
+ 1);
3590 memcpy (sec_name
, prefix
, prefix_len
);
3591 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3592 sec_name
[sec_name_len
] = '\0';
3594 /* Handle COMDAT group. */
3595 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3596 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3599 size_t len
, group_name_len
;
3600 const char *group_name
= elf_group_name (text_seg
);
3602 if (group_name
== NULL
)
3604 as_bad (_("Group section `%s' has no group signature"),
3606 ignore_rest_of_line ();
3609 /* We have to construct a fake section directive. */
3610 group_name_len
= strlen (group_name
);
3612 + 16 /* ,"aG",@progbits, */
3613 + group_name_len
/* ,group_name */
3616 section
= alloca (len
+ 1);
3617 memcpy (section
, sec_name
, sec_name_len
);
3618 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3619 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3620 memcpy (section
+ len
- 7, ",comdat", 7);
3621 section
[len
] = '\0';
3622 set_section (section
);
3626 set_section (sec_name
);
3627 bfd_set_section_flags (stdoutput
, now_seg
,
3628 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3631 elf_linked_to_section (now_seg
) = text_seg
;
3635 generate_unwind_image (const segT text_seg
)
3640 /* Mark the end of the unwind info, so that we can compute the size of the
3641 last unwind region. */
3642 add_unwind_entry (output_endp (), NOT_A_CHAR
);
3644 /* Force out pending instructions, to make sure all unwind records have
3645 a valid slot_number field. */
3646 ia64_flush_insns ();
3648 /* Generate the unwind record. */
3649 list
= optimize_unw_records (unwind
.list
);
3650 fixup_unw_records (list
, 1);
3651 size
= calc_record_size (list
);
3653 if (size
> 0 || unwind
.force_unwind_entry
)
3655 unwind
.force_unwind_entry
= 0;
3656 /* pad to pointer-size boundary. */
3657 pad
= size
% md
.pointer_size
;
3659 size
+= md
.pointer_size
- pad
;
3660 /* Add 8 for the header. */
3662 /* Add a pointer for the personality offset. */
3663 if (unwind
.personality_routine
)
3664 size
+= md
.pointer_size
;
3667 /* If there are unwind records, switch sections, and output the info. */
3671 bfd_reloc_code_real_type reloc
;
3673 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3675 /* Make sure the section has 4 byte alignment for ILP32 and
3676 8 byte alignment for LP64. */
3677 frag_align (md
.pointer_size_shift
, 0, 0);
3678 record_alignment (now_seg
, md
.pointer_size_shift
);
3680 /* Set expression which points to start of unwind descriptor area. */
3681 unwind
.info
= expr_build_dot ();
3683 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3684 (offsetT
) (long) unwind
.personality_routine
,
3687 /* Add the personality address to the image. */
3688 if (unwind
.personality_routine
!= 0)
3690 exp
.X_op
= O_symbol
;
3691 exp
.X_add_symbol
= unwind
.personality_routine
;
3692 exp
.X_add_number
= 0;
3694 if (md
.flags
& EF_IA_64_BE
)
3696 if (md
.flags
& EF_IA_64_ABI64
)
3697 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3699 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3703 if (md
.flags
& EF_IA_64_ABI64
)
3704 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3706 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3709 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3710 md
.pointer_size
, &exp
, 0, reloc
);
3711 unwind
.personality_routine
= 0;
3715 free_saved_prologue_counts ();
3716 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3720 dot_handlerdata (int dummy ATTRIBUTE_UNUSED
)
3722 if (!in_procedure ("handlerdata"))
3724 unwind
.force_unwind_entry
= 1;
3726 /* Remember which segment we're in so we can switch back after .endp */
3727 unwind
.saved_text_seg
= now_seg
;
3728 unwind
.saved_text_subseg
= now_subseg
;
3730 /* Generate unwind info into unwind-info section and then leave that
3731 section as the currently active one so dataXX directives go into
3732 the language specific data area of the unwind info block. */
3733 generate_unwind_image (now_seg
);
3734 demand_empty_rest_of_line ();
3738 dot_unwentry (int dummy ATTRIBUTE_UNUSED
)
3740 if (!in_procedure ("unwentry"))
3742 unwind
.force_unwind_entry
= 1;
3743 demand_empty_rest_of_line ();
3747 dot_altrp (int dummy ATTRIBUTE_UNUSED
)
3752 if (!in_prologue ("altrp"))
3755 parse_operand_and_eval (&e
, 0);
3756 reg
= e
.X_add_number
- REG_BR
;
3757 if (e
.X_op
!= O_register
|| reg
> 7)
3759 as_bad (_("First operand to .altrp not a valid branch register"));
3762 add_unwind_entry (output_rp_br (reg
), 0);
3766 dot_savemem (int psprel
)
3771 const char * const po
= psprel
? "savepsp" : "savesp";
3773 if (!in_prologue (po
))
3776 sep
= parse_operand_and_eval (&e1
, ',');
3778 sep
= parse_operand_and_eval (&e2
, ',');
3782 reg1
= e1
.X_add_number
;
3783 val
= e2
.X_add_number
;
3785 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3786 if (e1
.X_op
!= O_register
)
3788 as_bad (_("First operand to .%s not a register"), po
);
3789 reg1
= REG_PR
; /* Anything valid is good here. */
3791 if (e2
.X_op
!= O_constant
)
3793 as_bad (_("Second operand to .%s not a constant"), po
);
3799 case REG_AR
+ AR_BSP
:
3800 add_unwind_entry (output_bsp_when (), sep
);
3801 add_unwind_entry ((psprel
3803 : output_bsp_sprel
) (val
), NOT_A_CHAR
);
3805 case REG_AR
+ AR_BSPSTORE
:
3806 add_unwind_entry (output_bspstore_when (), sep
);
3807 add_unwind_entry ((psprel
3808 ? output_bspstore_psprel
3809 : output_bspstore_sprel
) (val
), NOT_A_CHAR
);
3811 case REG_AR
+ AR_RNAT
:
3812 add_unwind_entry (output_rnat_when (), sep
);
3813 add_unwind_entry ((psprel
3814 ? output_rnat_psprel
3815 : output_rnat_sprel
) (val
), NOT_A_CHAR
);
3817 case REG_AR
+ AR_UNAT
:
3818 add_unwind_entry (output_unat_when (), sep
);
3819 add_unwind_entry ((psprel
3820 ? output_unat_psprel
3821 : output_unat_sprel
) (val
), NOT_A_CHAR
);
3823 case REG_AR
+ AR_FPSR
:
3824 add_unwind_entry (output_fpsr_when (), sep
);
3825 add_unwind_entry ((psprel
3826 ? output_fpsr_psprel
3827 : output_fpsr_sprel
) (val
), NOT_A_CHAR
);
3829 case REG_AR
+ AR_PFS
:
3830 add_unwind_entry (output_pfs_when (), sep
);
3831 add_unwind_entry ((psprel
3833 : output_pfs_sprel
) (val
), NOT_A_CHAR
);
3835 case REG_AR
+ AR_LC
:
3836 add_unwind_entry (output_lc_when (), sep
);
3837 add_unwind_entry ((psprel
3839 : output_lc_sprel
) (val
), NOT_A_CHAR
);
3842 add_unwind_entry (output_rp_when (), sep
);
3843 add_unwind_entry ((psprel
3845 : output_rp_sprel
) (val
), NOT_A_CHAR
);
3848 add_unwind_entry (output_preds_when (), sep
);
3849 add_unwind_entry ((psprel
3850 ? output_preds_psprel
3851 : output_preds_sprel
) (val
), NOT_A_CHAR
);
3854 add_unwind_entry (output_priunat_when_mem (), sep
);
3855 add_unwind_entry ((psprel
3856 ? output_priunat_psprel
3857 : output_priunat_sprel
) (val
), NOT_A_CHAR
);
3860 as_bad (_("First operand to .%s not a valid register"), po
);
3861 add_unwind_entry (NULL
, sep
);
3867 dot_saveg (int dummy ATTRIBUTE_UNUSED
)
3873 if (!in_prologue ("save.g"))
3876 sep
= parse_operand_and_eval (&e
, ',');
3878 grmask
= e
.X_add_number
;
3879 if (e
.X_op
!= O_constant
3880 || e
.X_add_number
<= 0
3881 || e
.X_add_number
> 0xf)
3883 as_bad (_("First operand to .save.g must be a positive 4-bit constant"));
3890 int n
= popcount (grmask
);
3892 parse_operand_and_eval (&e
, 0);
3893 reg
= e
.X_add_number
- REG_GR
;
3894 if (e
.X_op
!= O_register
|| reg
> 127)
3896 as_bad (_("Second operand to .save.g must be a general register"));
3899 else if (reg
> 128U - n
)
3901 as_bad (_("Second operand to .save.g must be the first of %d general registers"), n
);
3904 add_unwind_entry (output_gr_gr (grmask
, reg
), 0);
3907 add_unwind_entry (output_gr_mem (grmask
), 0);
3911 dot_savef (int dummy ATTRIBUTE_UNUSED
)
3915 if (!in_prologue ("save.f"))
3918 parse_operand_and_eval (&e
, 0);
3920 if (e
.X_op
!= O_constant
3921 || e
.X_add_number
<= 0
3922 || e
.X_add_number
> 0xfffff)
3924 as_bad (_("Operand to .save.f must be a positive 20-bit constant"));
3927 add_unwind_entry (output_fr_mem (e
.X_add_number
), 0);
3931 dot_saveb (int dummy ATTRIBUTE_UNUSED
)
3937 if (!in_prologue ("save.b"))
3940 sep
= parse_operand_and_eval (&e
, ',');
3942 brmask
= e
.X_add_number
;
3943 if (e
.X_op
!= O_constant
3944 || e
.X_add_number
<= 0
3945 || e
.X_add_number
> 0x1f)
3947 as_bad (_("First operand to .save.b must be a positive 5-bit constant"));
3954 int n
= popcount (brmask
);
3956 parse_operand_and_eval (&e
, 0);
3957 reg
= e
.X_add_number
- REG_GR
;
3958 if (e
.X_op
!= O_register
|| reg
> 127)
3960 as_bad (_("Second operand to .save.b must be a general register"));
3963 else if (reg
> 128U - n
)
3965 as_bad (_("Second operand to .save.b must be the first of %d general registers"), n
);
3968 add_unwind_entry (output_br_gr (brmask
, reg
), 0);
3971 add_unwind_entry (output_br_mem (brmask
), 0);
3975 dot_savegf (int dummy ATTRIBUTE_UNUSED
)
3979 if (!in_prologue ("save.gf"))
3982 if (parse_operand_and_eval (&e1
, ',') == ',')
3983 parse_operand_and_eval (&e2
, 0);
3987 if (e1
.X_op
!= O_constant
3988 || e1
.X_add_number
< 0
3989 || e1
.X_add_number
> 0xf)
3991 as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant"));
3993 e1
.X_add_number
= 0;
3995 if (e2
.X_op
!= O_constant
3996 || e2
.X_add_number
< 0
3997 || e2
.X_add_number
> 0xfffff)
3999 as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant"));
4001 e2
.X_add_number
= 0;
4003 if (e1
.X_op
== O_constant
4004 && e2
.X_op
== O_constant
4005 && e1
.X_add_number
== 0
4006 && e2
.X_add_number
== 0)
4007 as_bad (_("Operands to .save.gf may not be both zero"));
4009 add_unwind_entry (output_frgr_mem (e1
.X_add_number
, e2
.X_add_number
), 0);
4013 dot_spill (int dummy ATTRIBUTE_UNUSED
)
4017 if (!in_prologue ("spill"))
4020 parse_operand_and_eval (&e
, 0);
4022 if (e
.X_op
!= O_constant
)
4024 as_bad (_("Operand to .spill must be a constant"));
4027 add_unwind_entry (output_spill_base (e
.X_add_number
), 0);
4031 dot_spillreg (int pred
)
4034 unsigned int qp
, ab
, xy
, reg
, treg
;
4036 const char * const po
= pred
? "spillreg.p" : "spillreg";
4038 if (!in_procedure (po
))
4042 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4045 sep
= parse_operand_and_eval (&e
, ',');
4048 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4051 sep
= parse_operand_and_eval (&e
, ',');
4054 convert_expr_to_xy_reg (&e
, &xy
, &treg
, po
, 2 + pred
);
4056 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
, qp
), sep
);
4060 dot_spillmem (int psprel
)
4063 int pred
= (psprel
< 0), sep
;
4064 unsigned int qp
, ab
, reg
;
4070 po
= psprel
? "spillpsp.p" : "spillsp.p";
4073 po
= psprel
? "spillpsp" : "spillsp";
4075 if (!in_procedure (po
))
4079 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4082 sep
= parse_operand_and_eval (&e
, ',');
4085 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4088 sep
= parse_operand_and_eval (&e
, ',');
4091 if (e
.X_op
!= O_constant
)
4093 as_bad (_("Operand %d to .%s must be a constant"), 2 + pred
, po
);
4098 add_unwind_entry (output_spill_psprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4100 add_unwind_entry (output_spill_sprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4104 get_saved_prologue_count (unsigned long lbl
)
4106 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4108 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4112 return lpc
->prologue_count
;
4114 as_bad (_("Missing .label_state %ld"), lbl
);
4119 save_prologue_count (unsigned long lbl
, unsigned int count
)
4121 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4123 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4127 lpc
->prologue_count
= count
;
4130 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4132 new_lpc
->next
= unwind
.saved_prologue_counts
;
4133 new_lpc
->label_number
= lbl
;
4134 new_lpc
->prologue_count
= count
;
4135 unwind
.saved_prologue_counts
= new_lpc
;
4140 free_saved_prologue_counts ()
4142 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4143 label_prologue_count
*next
;
4152 unwind
.saved_prologue_counts
= NULL
;
4156 dot_label_state (int dummy ATTRIBUTE_UNUSED
)
4160 if (!in_body ("label_state"))
4163 parse_operand_and_eval (&e
, 0);
4164 if (e
.X_op
== O_constant
)
4165 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4168 as_bad (_("Operand to .label_state must be a constant"));
4171 add_unwind_entry (output_label_state (e
.X_add_number
), 0);
4175 dot_copy_state (int dummy ATTRIBUTE_UNUSED
)
4179 if (!in_body ("copy_state"))
4182 parse_operand_and_eval (&e
, 0);
4183 if (e
.X_op
== O_constant
)
4184 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4187 as_bad (_("Operand to .copy_state must be a constant"));
4190 add_unwind_entry (output_copy_state (e
.X_add_number
), 0);
4194 dot_unwabi (int dummy ATTRIBUTE_UNUSED
)
4199 if (!in_prologue ("unwabi"))
4202 sep
= parse_operand_and_eval (&e1
, ',');
4204 parse_operand_and_eval (&e2
, 0);
4208 if (e1
.X_op
!= O_constant
)
4210 as_bad (_("First operand to .unwabi must be a constant"));
4211 e1
.X_add_number
= 0;
4214 if (e2
.X_op
!= O_constant
)
4216 as_bad (_("Second operand to .unwabi must be a constant"));
4217 e2
.X_add_number
= 0;
4220 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
), 0);
4224 dot_personality (int dummy ATTRIBUTE_UNUSED
)
4227 if (!in_procedure ("personality"))
4230 name
= input_line_pointer
;
4231 c
= get_symbol_end ();
4232 p
= input_line_pointer
;
4233 unwind
.personality_routine
= symbol_find_or_make (name
);
4234 unwind
.force_unwind_entry
= 1;
4237 demand_empty_rest_of_line ();
4241 dot_proc (int dummy ATTRIBUTE_UNUSED
)
4245 proc_pending
*pending
, *last_pending
;
4247 if (unwind
.proc_pending
.sym
)
4249 (md
.unwind_check
== unwind_check_warning
4251 : as_bad
) (_("Missing .endp after previous .proc"));
4252 while (unwind
.proc_pending
.next
)
4254 pending
= unwind
.proc_pending
.next
;
4255 unwind
.proc_pending
.next
= pending
->next
;
4259 last_pending
= NULL
;
4261 /* Parse names of main and alternate entry points and mark them as
4262 function symbols: */
4266 name
= input_line_pointer
;
4267 c
= get_symbol_end ();
4268 p
= input_line_pointer
;
4270 as_bad (_("Empty argument of .proc"));
4273 sym
= symbol_find_or_make (name
);
4274 if (S_IS_DEFINED (sym
))
4275 as_bad (_("`%s' was already defined"), name
);
4276 else if (!last_pending
)
4278 unwind
.proc_pending
.sym
= sym
;
4279 last_pending
= &unwind
.proc_pending
;
4283 pending
= xmalloc (sizeof (*pending
));
4285 last_pending
= last_pending
->next
= pending
;
4287 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4291 if (*input_line_pointer
!= ',')
4293 ++input_line_pointer
;
4297 unwind
.proc_pending
.sym
= expr_build_dot ();
4298 last_pending
= &unwind
.proc_pending
;
4300 last_pending
->next
= NULL
;
4301 demand_empty_rest_of_line ();
4304 unwind
.prologue
= 0;
4305 unwind
.prologue_count
= 0;
4308 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4309 unwind
.personality_routine
= 0;
4313 dot_body (int dummy ATTRIBUTE_UNUSED
)
4315 if (!in_procedure ("body"))
4317 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4318 as_warn (_("Initial .body should precede any instructions"));
4319 check_pending_save ();
4321 unwind
.prologue
= 0;
4322 unwind
.prologue_mask
= 0;
4325 add_unwind_entry (output_body (), 0);
4329 dot_prologue (int dummy ATTRIBUTE_UNUSED
)
4331 unsigned mask
= 0, grsave
= 0;
4333 if (!in_procedure ("prologue"))
4335 if (unwind
.prologue
)
4337 as_bad (_(".prologue within prologue"));
4338 ignore_rest_of_line ();
4341 if (!unwind
.body
&& unwind
.insn
)
4342 as_warn (_("Initial .prologue should precede any instructions"));
4344 if (!is_it_end_of_statement ())
4347 int n
, sep
= parse_operand_and_eval (&e
, ',');
4349 if (e
.X_op
!= O_constant
4350 || e
.X_add_number
< 0
4351 || e
.X_add_number
> 0xf)
4352 as_bad (_("First operand to .prologue must be a positive 4-bit constant"));
4353 else if (e
.X_add_number
== 0)
4354 as_warn (_("Pointless use of zero first operand to .prologue"));
4356 mask
= e
.X_add_number
;
4357 n
= popcount (mask
);
4360 parse_operand_and_eval (&e
, 0);
4363 if (e
.X_op
== O_constant
4364 && e
.X_add_number
>= 0
4365 && e
.X_add_number
< 128)
4367 if (md
.unwind_check
== unwind_check_error
)
4368 as_warn (_("Using a constant as second operand to .prologue is deprecated"));
4369 grsave
= e
.X_add_number
;
4371 else if (e
.X_op
!= O_register
4372 || (grsave
= e
.X_add_number
- REG_GR
) > 127)
4374 as_bad (_("Second operand to .prologue must be a general register"));
4377 else if (grsave
> 128U - n
)
4379 as_bad (_("Second operand to .prologue must be the first of %d general registers"), n
);
4386 add_unwind_entry (output_prologue_gr (mask
, grsave
), 0);
4388 add_unwind_entry (output_prologue (), 0);
4390 unwind
.prologue
= 1;
4391 unwind
.prologue_mask
= mask
;
4392 unwind
.prologue_gr
= grsave
;
4394 ++unwind
.prologue_count
;
4398 dot_endp (int dummy ATTRIBUTE_UNUSED
)
4401 int bytes_per_address
;
4404 subsegT saved_subseg
;
4405 proc_pending
*pending
;
4406 int unwind_check
= md
.unwind_check
;
4408 md
.unwind_check
= unwind_check_error
;
4409 if (!in_procedure ("endp"))
4411 md
.unwind_check
= unwind_check
;
4413 if (unwind
.saved_text_seg
)
4415 saved_seg
= unwind
.saved_text_seg
;
4416 saved_subseg
= unwind
.saved_text_subseg
;
4417 unwind
.saved_text_seg
= NULL
;
4421 saved_seg
= now_seg
;
4422 saved_subseg
= now_subseg
;
4425 insn_group_break (1, 0, 0);
4427 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4429 generate_unwind_image (saved_seg
);
4431 if (unwind
.info
|| unwind
.force_unwind_entry
)
4435 subseg_set (md
.last_text_seg
, 0);
4436 proc_end
= expr_build_dot ();
4438 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4440 /* Make sure that section has 4 byte alignment for ILP32 and
4441 8 byte alignment for LP64. */
4442 record_alignment (now_seg
, md
.pointer_size_shift
);
4444 /* Need space for 3 pointers for procedure start, procedure end,
4446 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4447 where
= frag_now_fix () - (3 * md
.pointer_size
);
4448 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4450 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4451 e
.X_op
= O_pseudo_fixup
;
4452 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4454 if (!S_IS_LOCAL (unwind
.proc_pending
.sym
)
4455 && S_IS_DEFINED (unwind
.proc_pending
.sym
))
4456 e
.X_add_symbol
= symbol_temp_new (S_GET_SEGMENT (unwind
.proc_pending
.sym
),
4457 S_GET_VALUE (unwind
.proc_pending
.sym
),
4458 symbol_get_frag (unwind
.proc_pending
.sym
));
4460 e
.X_add_symbol
= unwind
.proc_pending
.sym
;
4461 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4463 e
.X_op
= O_pseudo_fixup
;
4464 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4466 e
.X_add_symbol
= proc_end
;
4467 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4468 bytes_per_address
, &e
);
4472 e
.X_op
= O_pseudo_fixup
;
4473 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4475 e
.X_add_symbol
= unwind
.info
;
4476 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4477 bytes_per_address
, &e
);
4480 subseg_set (saved_seg
, saved_subseg
);
4482 /* Set symbol sizes. */
4483 pending
= &unwind
.proc_pending
;
4484 if (S_GET_NAME (pending
->sym
))
4488 symbolS
*sym
= pending
->sym
;
4490 if (!S_IS_DEFINED (sym
))
4491 as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym
));
4492 else if (S_GET_SIZE (sym
) == 0
4493 && symbol_get_obj (sym
)->size
== NULL
)
4495 fragS
*frag
= symbol_get_frag (sym
);
4499 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4500 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4503 symbol_get_obj (sym
)->size
=
4504 (expressionS
*) xmalloc (sizeof (expressionS
));
4505 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4506 symbol_get_obj (sym
)->size
->X_add_symbol
4507 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4508 frag_now_fix (), frag_now
);
4509 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4510 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4514 } while ((pending
= pending
->next
) != NULL
);
4517 /* Parse names of main and alternate entry points. */
4523 name
= input_line_pointer
;
4524 c
= get_symbol_end ();
4525 p
= input_line_pointer
;
4527 (md
.unwind_check
== unwind_check_warning
4529 : as_bad
) (_("Empty argument of .endp"));
4532 symbolS
*sym
= symbol_find (name
);
4534 for (pending
= &unwind
.proc_pending
; pending
; pending
= pending
->next
)
4536 if (sym
== pending
->sym
)
4538 pending
->sym
= NULL
;
4542 if (!sym
|| !pending
)
4543 as_warn (_("`%s' was not specified with previous .proc"), name
);
4547 if (*input_line_pointer
!= ',')
4549 ++input_line_pointer
;
4551 demand_empty_rest_of_line ();
4553 /* Deliberately only checking for the main entry point here; the
4554 language spec even says all arguments to .endp are ignored. */
4555 if (unwind
.proc_pending
.sym
4556 && S_GET_NAME (unwind
.proc_pending
.sym
)
4557 && strcmp (S_GET_NAME (unwind
.proc_pending
.sym
), FAKE_LABEL_NAME
))
4558 as_warn (_("`%s' should be an operand to this .endp"),
4559 S_GET_NAME (unwind
.proc_pending
.sym
));
4560 while (unwind
.proc_pending
.next
)
4562 pending
= unwind
.proc_pending
.next
;
4563 unwind
.proc_pending
.next
= pending
->next
;
4566 unwind
.proc_pending
.sym
= unwind
.info
= NULL
;
4570 dot_template (int template_val
)
4572 CURR_SLOT
.user_template
= template_val
;
4576 dot_regstk (int dummy ATTRIBUTE_UNUSED
)
4578 int ins
, locs
, outs
, rots
;
4580 if (is_it_end_of_statement ())
4581 ins
= locs
= outs
= rots
= 0;
4584 ins
= get_absolute_expression ();
4585 if (*input_line_pointer
++ != ',')
4587 locs
= get_absolute_expression ();
4588 if (*input_line_pointer
++ != ',')
4590 outs
= get_absolute_expression ();
4591 if (*input_line_pointer
++ != ',')
4593 rots
= get_absolute_expression ();
4595 set_regstack (ins
, locs
, outs
, rots
);
4599 as_bad (_("Comma expected"));
4600 ignore_rest_of_line ();
4607 valueT num_alloced
= 0;
4608 struct dynreg
**drpp
, *dr
;
4609 int ch
, base_reg
= 0;
4615 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4616 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4617 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4621 /* First, remove existing names from hash table. */
4622 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4624 hash_delete (md
.dynreg_hash
, dr
->name
, FALSE
);
4625 /* FIXME: Free dr->name. */
4629 drpp
= &md
.dynreg
[type
];
4632 start
= input_line_pointer
;
4633 ch
= get_symbol_end ();
4634 len
= strlen (ia64_canonicalize_symbol_name (start
));
4635 *input_line_pointer
= ch
;
4638 if (*input_line_pointer
!= '[')
4640 as_bad (_("Expected '['"));
4643 ++input_line_pointer
; /* skip '[' */
4645 num_regs
= get_absolute_expression ();
4647 if (*input_line_pointer
++ != ']')
4649 as_bad (_("Expected ']'"));
4654 as_bad (_("Number of elements must be positive"));
4659 num_alloced
+= num_regs
;
4663 if (num_alloced
> md
.rot
.num_regs
)
4665 as_bad (_("Used more than the declared %d rotating registers"),
4671 if (num_alloced
> 96)
4673 as_bad (_("Used more than the available 96 rotating registers"));
4678 if (num_alloced
> 48)
4680 as_bad (_("Used more than the available 48 rotating registers"));
4691 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4692 memset (*drpp
, 0, sizeof (*dr
));
4695 name
= obstack_alloc (¬es
, len
+ 1);
4696 memcpy (name
, start
, len
);
4701 dr
->num_regs
= num_regs
;
4702 dr
->base
= base_reg
;
4704 base_reg
+= num_regs
;
4706 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4708 as_bad (_("Attempt to redefine register set `%s'"), name
);
4709 obstack_free (¬es
, name
);
4713 if (*input_line_pointer
!= ',')
4715 ++input_line_pointer
; /* skip comma */
4718 demand_empty_rest_of_line ();
4722 ignore_rest_of_line ();
4726 dot_byteorder (int byteorder
)
4728 segment_info_type
*seginfo
= seg_info (now_seg
);
4730 if (byteorder
== -1)
4732 if (seginfo
->tc_segment_info_data
.endian
== 0)
4733 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4734 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4737 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4739 if (target_big_endian
!= byteorder
)
4741 target_big_endian
= byteorder
;
4742 if (target_big_endian
)
4744 ia64_number_to_chars
= number_to_chars_bigendian
;
4745 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4749 ia64_number_to_chars
= number_to_chars_littleendian
;
4750 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4756 dot_psr (int dummy ATTRIBUTE_UNUSED
)
4763 option
= input_line_pointer
;
4764 ch
= get_symbol_end ();
4765 if (strcmp (option
, "lsb") == 0)
4766 md
.flags
&= ~EF_IA_64_BE
;
4767 else if (strcmp (option
, "msb") == 0)
4768 md
.flags
|= EF_IA_64_BE
;
4769 else if (strcmp (option
, "abi32") == 0)
4770 md
.flags
&= ~EF_IA_64_ABI64
;
4771 else if (strcmp (option
, "abi64") == 0)
4772 md
.flags
|= EF_IA_64_ABI64
;
4774 as_bad (_("Unknown psr option `%s'"), option
);
4775 *input_line_pointer
= ch
;
4778 if (*input_line_pointer
!= ',')
4781 ++input_line_pointer
;
4784 demand_empty_rest_of_line ();
4788 dot_ln (int dummy ATTRIBUTE_UNUSED
)
4790 new_logical_line (0, get_absolute_expression ());
4791 demand_empty_rest_of_line ();
4795 cross_section (int ref
, void (*builder
) (int), int ua
)
4798 int saved_auto_align
;
4799 unsigned int section_count
;
4802 start
= input_line_pointer
;
4808 name
= demand_copy_C_string (&len
);
4809 obstack_free(¬es
, name
);
4812 ignore_rest_of_line ();
4818 char c
= get_symbol_end ();
4820 if (input_line_pointer
== start
)
4822 as_bad (_("Missing section name"));
4823 ignore_rest_of_line ();
4826 *input_line_pointer
= c
;
4828 end
= input_line_pointer
;
4830 if (*input_line_pointer
!= ',')
4832 as_bad (_("Comma expected after section name"));
4833 ignore_rest_of_line ();
4837 end
= input_line_pointer
+ 1; /* skip comma */
4838 input_line_pointer
= start
;
4839 md
.keep_pending_output
= 1;
4840 section_count
= bfd_count_sections (stdoutput
);
4841 obj_elf_section (0);
4842 if (section_count
!= bfd_count_sections (stdoutput
))
4843 as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."));
4844 input_line_pointer
= end
;
4845 saved_auto_align
= md
.auto_align
;
4850 md
.auto_align
= saved_auto_align
;
4851 obj_elf_previous (0);
4852 md
.keep_pending_output
= 0;
4856 dot_xdata (int size
)
4858 cross_section (size
, cons
, 0);
4861 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4864 stmt_float_cons (int kind
)
4884 ia64_do_align (alignment
);
4889 stmt_cons_ua (int size
)
4891 int saved_auto_align
= md
.auto_align
;
4895 md
.auto_align
= saved_auto_align
;
4899 dot_xfloat_cons (int kind
)
4901 cross_section (kind
, stmt_float_cons
, 0);
4905 dot_xstringer (int zero
)
4907 cross_section (zero
, stringer
, 0);
4911 dot_xdata_ua (int size
)
4913 cross_section (size
, cons
, 1);
4917 dot_xfloat_cons_ua (int kind
)
4919 cross_section (kind
, float_cons
, 1);
4922 /* .reg.val <regname>,value */
4925 dot_reg_val (int dummy ATTRIBUTE_UNUSED
)
4929 expression_and_evaluate (®
);
4930 if (reg
.X_op
!= O_register
)
4932 as_bad (_("Register name expected"));
4933 ignore_rest_of_line ();
4935 else if (*input_line_pointer
++ != ',')
4937 as_bad (_("Comma expected"));
4938 ignore_rest_of_line ();
4942 valueT value
= get_absolute_expression ();
4943 int regno
= reg
.X_add_number
;
4944 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4945 as_warn (_("Register value annotation ignored"));
4948 gr_values
[regno
- REG_GR
].known
= 1;
4949 gr_values
[regno
- REG_GR
].value
= value
;
4950 gr_values
[regno
- REG_GR
].path
= md
.path
;
4953 demand_empty_rest_of_line ();
4958 .serialize.instruction
4961 dot_serialize (int type
)
4963 insn_group_break (0, 0, 0);
4965 instruction_serialization ();
4967 data_serialization ();
4968 insn_group_break (0, 0, 0);
4969 demand_empty_rest_of_line ();
4972 /* select dv checking mode
4977 A stop is inserted when changing modes
4981 dot_dv_mode (int type
)
4983 if (md
.manual_bundling
)
4984 as_warn (_("Directive invalid within a bundle"));
4986 if (type
== 'E' || type
== 'A')
4987 md
.mode_explicitly_set
= 0;
4989 md
.mode_explicitly_set
= 1;
4996 if (md
.explicit_mode
)
4997 insn_group_break (1, 0, 0);
4998 md
.explicit_mode
= 0;
5002 if (!md
.explicit_mode
)
5003 insn_group_break (1, 0, 0);
5004 md
.explicit_mode
= 1;
5008 if (md
.explicit_mode
!= md
.default_explicit_mode
)
5009 insn_group_break (1, 0, 0);
5010 md
.explicit_mode
= md
.default_explicit_mode
;
5011 md
.mode_explicitly_set
= 0;
5017 print_prmask (valueT mask
)
5021 for (regno
= 0; regno
< 64; regno
++)
5023 if (mask
& ((valueT
) 1 << regno
))
5025 fprintf (stderr
, "%s p%d", comma
, regno
);
5032 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5033 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5034 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5035 .pred.safe_across_calls p1 [, p2 [,...]]
5039 dot_pred_rel (int type
)
5043 int p1
= -1, p2
= -1;
5047 if (*input_line_pointer
== '"')
5050 char *form
= demand_copy_C_string (&len
);
5052 if (strcmp (form
, "mutex") == 0)
5054 else if (strcmp (form
, "clear") == 0)
5056 else if (strcmp (form
, "imply") == 0)
5058 obstack_free (¬es
, form
);
5060 else if (*input_line_pointer
== '@')
5062 char *form
= ++input_line_pointer
;
5063 char c
= get_symbol_end();
5065 if (strcmp (form
, "mutex") == 0)
5067 else if (strcmp (form
, "clear") == 0)
5069 else if (strcmp (form
, "imply") == 0)
5071 *input_line_pointer
= c
;
5075 as_bad (_("Missing predicate relation type"));
5076 ignore_rest_of_line ();
5081 as_bad (_("Unrecognized predicate relation type"));
5082 ignore_rest_of_line ();
5085 if (*input_line_pointer
== ',')
5086 ++input_line_pointer
;
5094 expressionS pr
, *pr1
, *pr2
;
5096 sep
= parse_operand_and_eval (&pr
, ',');
5097 if (pr
.X_op
== O_register
5098 && pr
.X_add_number
>= REG_P
5099 && pr
.X_add_number
<= REG_P
+ 63)
5101 regno
= pr
.X_add_number
- REG_P
;
5109 else if (type
!= 'i'
5110 && pr
.X_op
== O_subtract
5111 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5112 && pr1
->X_op
== O_register
5113 && pr1
->X_add_number
>= REG_P
5114 && pr1
->X_add_number
<= REG_P
+ 63
5115 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5116 && pr2
->X_op
== O_register
5117 && pr2
->X_add_number
>= REG_P
5118 && pr2
->X_add_number
<= REG_P
+ 63)
5123 regno
= pr1
->X_add_number
- REG_P
;
5124 stop
= pr2
->X_add_number
- REG_P
;
5127 as_bad (_("Bad register range"));
5128 ignore_rest_of_line ();
5131 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5132 count
+= stop
- regno
+ 1;
5136 as_bad (_("Predicate register expected"));
5137 ignore_rest_of_line ();
5141 as_warn (_("Duplicate predicate register ignored"));
5152 clear_qp_mutex (mask
);
5153 clear_qp_implies (mask
, (valueT
) 0);
5156 if (count
!= 2 || p1
== -1 || p2
== -1)
5157 as_bad (_("Predicate source and target required"));
5158 else if (p1
== 0 || p2
== 0)
5159 as_bad (_("Use of p0 is not valid in this context"));
5161 add_qp_imply (p1
, p2
);
5166 as_bad (_("At least two PR arguments expected"));
5171 as_bad (_("Use of p0 is not valid in this context"));
5174 add_qp_mutex (mask
);
5177 /* note that we don't override any existing relations */
5180 as_bad (_("At least one PR argument expected"));
5185 fprintf (stderr
, "Safe across calls: ");
5186 print_prmask (mask
);
5187 fprintf (stderr
, "\n");
5189 qp_safe_across_calls
= mask
;
5192 demand_empty_rest_of_line ();
5195 /* .entry label [, label [, ...]]
5196 Hint to DV code that the given labels are to be considered entry points.
5197 Otherwise, only global labels are considered entry points. */
5200 dot_entry (int dummy ATTRIBUTE_UNUSED
)
5209 name
= input_line_pointer
;
5210 c
= get_symbol_end ();
5211 symbolP
= symbol_find_or_make (name
);
5213 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (void *) symbolP
);
5215 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5218 *input_line_pointer
= c
;
5220 c
= *input_line_pointer
;
5223 input_line_pointer
++;
5225 if (*input_line_pointer
== '\n')
5231 demand_empty_rest_of_line ();
5234 /* .mem.offset offset, base
5235 "base" is used to distinguish between offsets from a different base. */
5238 dot_mem_offset (int dummy ATTRIBUTE_UNUSED
)
5240 md
.mem_offset
.hint
= 1;
5241 md
.mem_offset
.offset
= get_absolute_expression ();
5242 if (*input_line_pointer
!= ',')
5244 as_bad (_("Comma expected"));
5245 ignore_rest_of_line ();
5248 ++input_line_pointer
;
5249 md
.mem_offset
.base
= get_absolute_expression ();
5250 demand_empty_rest_of_line ();
5253 /* ia64-specific pseudo-ops: */
5254 const pseudo_typeS md_pseudo_table
[] =
5256 { "radix", dot_radix
, 0 },
5257 { "lcomm", s_lcomm_bytes
, 1 },
5258 { "loc", dot_loc
, 0 },
5259 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5260 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5261 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5262 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5263 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5264 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5265 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5266 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5267 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5268 { "proc", dot_proc
, 0 },
5269 { "body", dot_body
, 0 },
5270 { "prologue", dot_prologue
, 0 },
5271 { "endp", dot_endp
, 0 },
5273 { "fframe", dot_fframe
, 0 },
5274 { "vframe", dot_vframe
, 0 },
5275 { "vframesp", dot_vframesp
, 0 },
5276 { "vframepsp", dot_vframesp
, 1 },
5277 { "save", dot_save
, 0 },
5278 { "restore", dot_restore
, 0 },
5279 { "restorereg", dot_restorereg
, 0 },
5280 { "restorereg.p", dot_restorereg
, 1 },
5281 { "handlerdata", dot_handlerdata
, 0 },
5282 { "unwentry", dot_unwentry
, 0 },
5283 { "altrp", dot_altrp
, 0 },
5284 { "savesp", dot_savemem
, 0 },
5285 { "savepsp", dot_savemem
, 1 },
5286 { "save.g", dot_saveg
, 0 },
5287 { "save.f", dot_savef
, 0 },
5288 { "save.b", dot_saveb
, 0 },
5289 { "save.gf", dot_savegf
, 0 },
5290 { "spill", dot_spill
, 0 },
5291 { "spillreg", dot_spillreg
, 0 },
5292 { "spillsp", dot_spillmem
, 0 },
5293 { "spillpsp", dot_spillmem
, 1 },
5294 { "spillreg.p", dot_spillreg
, 1 },
5295 { "spillsp.p", dot_spillmem
, ~0 },
5296 { "spillpsp.p", dot_spillmem
, ~1 },
5297 { "label_state", dot_label_state
, 0 },
5298 { "copy_state", dot_copy_state
, 0 },
5299 { "unwabi", dot_unwabi
, 0 },
5300 { "personality", dot_personality
, 0 },
5301 { "mii", dot_template
, 0x0 },
5302 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5303 { "mlx", dot_template
, 0x2 },
5304 { "mmi", dot_template
, 0x4 },
5305 { "mfi", dot_template
, 0x6 },
5306 { "mmf", dot_template
, 0x7 },
5307 { "mib", dot_template
, 0x8 },
5308 { "mbb", dot_template
, 0x9 },
5309 { "bbb", dot_template
, 0xb },
5310 { "mmb", dot_template
, 0xc },
5311 { "mfb", dot_template
, 0xe },
5312 { "align", dot_align
, 0 },
5313 { "regstk", dot_regstk
, 0 },
5314 { "rotr", dot_rot
, DYNREG_GR
},
5315 { "rotf", dot_rot
, DYNREG_FR
},
5316 { "rotp", dot_rot
, DYNREG_PR
},
5317 { "lsb", dot_byteorder
, 0 },
5318 { "msb", dot_byteorder
, 1 },
5319 { "psr", dot_psr
, 0 },
5320 { "alias", dot_alias
, 0 },
5321 { "secalias", dot_alias
, 1 },
5322 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5324 { "xdata1", dot_xdata
, 1 },
5325 { "xdata2", dot_xdata
, 2 },
5326 { "xdata4", dot_xdata
, 4 },
5327 { "xdata8", dot_xdata
, 8 },
5328 { "xdata16", dot_xdata
, 16 },
5329 { "xreal4", dot_xfloat_cons
, 'f' },
5330 { "xreal8", dot_xfloat_cons
, 'd' },
5331 { "xreal10", dot_xfloat_cons
, 'x' },
5332 { "xreal16", dot_xfloat_cons
, 'X' },
5333 { "xstring", dot_xstringer
, 8 + 0 },
5334 { "xstringz", dot_xstringer
, 8 + 1 },
5336 /* unaligned versions: */
5337 { "xdata2.ua", dot_xdata_ua
, 2 },
5338 { "xdata4.ua", dot_xdata_ua
, 4 },
5339 { "xdata8.ua", dot_xdata_ua
, 8 },
5340 { "xdata16.ua", dot_xdata_ua
, 16 },
5341 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5342 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5343 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5344 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5346 /* annotations/DV checking support */
5347 { "entry", dot_entry
, 0 },
5348 { "mem.offset", dot_mem_offset
, 0 },
5349 { "pred.rel", dot_pred_rel
, 0 },
5350 { "pred.rel.clear", dot_pred_rel
, 'c' },
5351 { "pred.rel.imply", dot_pred_rel
, 'i' },
5352 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5353 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5354 { "reg.val", dot_reg_val
, 0 },
5355 { "serialize.data", dot_serialize
, 0 },
5356 { "serialize.instruction", dot_serialize
, 1 },
5357 { "auto", dot_dv_mode
, 'a' },
5358 { "explicit", dot_dv_mode
, 'e' },
5359 { "default", dot_dv_mode
, 'd' },
5361 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5362 IA-64 aligns data allocation pseudo-ops by default, so we have to
5363 tell it that these ones are supposed to be unaligned. Long term,
5364 should rewrite so that only IA-64 specific data allocation pseudo-ops
5365 are aligned by default. */
5366 {"2byte", stmt_cons_ua
, 2},
5367 {"4byte", stmt_cons_ua
, 4},
5368 {"8byte", stmt_cons_ua
, 8},
5371 {"vms_common", obj_elf_vms_common
, 0},
5377 static const struct pseudo_opcode
5380 void (*handler
) (int);
5385 /* these are more like pseudo-ops, but don't start with a dot */
5386 { "data1", cons
, 1 },
5387 { "data2", cons
, 2 },
5388 { "data4", cons
, 4 },
5389 { "data8", cons
, 8 },
5390 { "data16", cons
, 16 },
5391 { "real4", stmt_float_cons
, 'f' },
5392 { "real8", stmt_float_cons
, 'd' },
5393 { "real10", stmt_float_cons
, 'x' },
5394 { "real16", stmt_float_cons
, 'X' },
5395 { "string", stringer
, 8 + 0 },
5396 { "stringz", stringer
, 8 + 1 },
5398 /* unaligned versions: */
5399 { "data2.ua", stmt_cons_ua
, 2 },
5400 { "data4.ua", stmt_cons_ua
, 4 },
5401 { "data8.ua", stmt_cons_ua
, 8 },
5402 { "data16.ua", stmt_cons_ua
, 16 },
5403 { "real4.ua", float_cons
, 'f' },
5404 { "real8.ua", float_cons
, 'd' },
5405 { "real10.ua", float_cons
, 'x' },
5406 { "real16.ua", float_cons
, 'X' },
5409 /* Declare a register by creating a symbol for it and entering it in
5410 the symbol table. */
5413 declare_register (const char *name
, unsigned int regnum
)
5418 sym
= symbol_create (name
, reg_section
, regnum
, &zero_address_frag
);
5420 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (void *) sym
);
5422 as_fatal ("Inserting \"%s\" into register table failed: %s",
5429 declare_register_set (const char *prefix
,
5430 unsigned int num_regs
,
5431 unsigned int base_regnum
)
5436 for (i
= 0; i
< num_regs
; ++i
)
5438 snprintf (name
, sizeof (name
), "%s%u", prefix
, i
);
5439 declare_register (name
, base_regnum
+ i
);
5444 operand_width (enum ia64_opnd opnd
)
5446 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5447 unsigned int bits
= 0;
5451 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5452 bits
+= odesc
->field
[i
].bits
;
5457 static enum operand_match_result
5458 operand_match (const struct ia64_opcode
*idesc
, int res_index
, expressionS
*e
)
5460 enum ia64_opnd opnd
= idesc
->operands
[res_index
];
5461 int bits
, relocatable
= 0;
5462 struct insn_fix
*fix
;
5469 case IA64_OPND_AR_CCV
:
5470 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5471 return OPERAND_MATCH
;
5474 case IA64_OPND_AR_CSD
:
5475 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5476 return OPERAND_MATCH
;
5479 case IA64_OPND_AR_PFS
:
5480 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5481 return OPERAND_MATCH
;
5485 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5486 return OPERAND_MATCH
;
5490 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5491 return OPERAND_MATCH
;
5495 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5496 return OPERAND_MATCH
;
5499 case IA64_OPND_PR_ROT
:
5500 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5501 return OPERAND_MATCH
;
5505 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5506 return OPERAND_MATCH
;
5509 case IA64_OPND_PSR_L
:
5510 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5511 return OPERAND_MATCH
;
5514 case IA64_OPND_PSR_UM
:
5515 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5516 return OPERAND_MATCH
;
5520 if (e
->X_op
== O_constant
)
5522 if (e
->X_add_number
== 1)
5523 return OPERAND_MATCH
;
5525 return OPERAND_OUT_OF_RANGE
;
5530 if (e
->X_op
== O_constant
)
5532 if (e
->X_add_number
== 8)
5533 return OPERAND_MATCH
;
5535 return OPERAND_OUT_OF_RANGE
;
5540 if (e
->X_op
== O_constant
)
5542 if (e
->X_add_number
== 16)
5543 return OPERAND_MATCH
;
5545 return OPERAND_OUT_OF_RANGE
;
5549 /* register operands: */
5552 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5553 && e
->X_add_number
< REG_AR
+ 128)
5554 return OPERAND_MATCH
;
5559 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5560 && e
->X_add_number
< REG_BR
+ 8)
5561 return OPERAND_MATCH
;
5565 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5566 && e
->X_add_number
< REG_CR
+ 128)
5567 return OPERAND_MATCH
;
5574 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5575 && e
->X_add_number
< REG_FR
+ 128)
5576 return OPERAND_MATCH
;
5581 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5582 && e
->X_add_number
< REG_P
+ 64)
5583 return OPERAND_MATCH
;
5589 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5590 && e
->X_add_number
< REG_GR
+ 128)
5591 return OPERAND_MATCH
;
5594 case IA64_OPND_R3_2
:
5595 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5597 if (e
->X_add_number
< REG_GR
+ 4)
5598 return OPERAND_MATCH
;
5599 else if (e
->X_add_number
< REG_GR
+ 128)
5600 return OPERAND_OUT_OF_RANGE
;
5604 /* indirect operands: */
5605 case IA64_OPND_CPUID_R3
:
5606 case IA64_OPND_DBR_R3
:
5607 case IA64_OPND_DTR_R3
:
5608 case IA64_OPND_ITR_R3
:
5609 case IA64_OPND_IBR_R3
:
5610 case IA64_OPND_MSR_R3
:
5611 case IA64_OPND_PKR_R3
:
5612 case IA64_OPND_PMC_R3
:
5613 case IA64_OPND_PMD_R3
:
5614 case IA64_OPND_RR_R3
:
5615 if (e
->X_op
== O_index
&& e
->X_op_symbol
5616 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5617 == opnd
- IA64_OPND_CPUID_R3
))
5618 return OPERAND_MATCH
;
5622 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5623 return OPERAND_MATCH
;
5626 /* immediate operands: */
5627 case IA64_OPND_CNT2a
:
5628 case IA64_OPND_LEN4
:
5629 case IA64_OPND_LEN6
:
5630 bits
= operand_width (idesc
->operands
[res_index
]);
5631 if (e
->X_op
== O_constant
)
5633 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5634 return OPERAND_MATCH
;
5636 return OPERAND_OUT_OF_RANGE
;
5640 case IA64_OPND_CNT2b
:
5641 if (e
->X_op
== O_constant
)
5643 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5644 return OPERAND_MATCH
;
5646 return OPERAND_OUT_OF_RANGE
;
5650 case IA64_OPND_CNT2c
:
5651 val
= e
->X_add_number
;
5652 if (e
->X_op
== O_constant
)
5654 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5655 return OPERAND_MATCH
;
5657 return OPERAND_OUT_OF_RANGE
;
5662 /* SOR must be an integer multiple of 8 */
5663 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5664 return OPERAND_OUT_OF_RANGE
;
5667 if (e
->X_op
== O_constant
)
5669 if ((bfd_vma
) e
->X_add_number
<= 96)
5670 return OPERAND_MATCH
;
5672 return OPERAND_OUT_OF_RANGE
;
5676 case IA64_OPND_IMMU62
:
5677 if (e
->X_op
== O_constant
)
5679 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5680 return OPERAND_MATCH
;
5682 return OPERAND_OUT_OF_RANGE
;
5686 /* FIXME -- need 62-bit relocation type */
5687 as_bad (_("62-bit relocation not yet implemented"));
5691 case IA64_OPND_IMMU64
:
5692 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5693 || e
->X_op
== O_subtract
)
5695 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5696 fix
->code
= BFD_RELOC_IA64_IMM64
;
5697 if (e
->X_op
!= O_subtract
)
5699 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5700 if (e
->X_op
== O_pseudo_fixup
)
5704 fix
->opnd
= idesc
->operands
[res_index
];
5707 ++CURR_SLOT
.num_fixups
;
5708 return OPERAND_MATCH
;
5710 else if (e
->X_op
== O_constant
)
5711 return OPERAND_MATCH
;
5714 case IA64_OPND_IMMU5b
:
5715 if (e
->X_op
== O_constant
)
5717 val
= e
->X_add_number
;
5718 if (val
>= 32 && val
<= 63)
5719 return OPERAND_MATCH
;
5721 return OPERAND_OUT_OF_RANGE
;
5725 case IA64_OPND_CCNT5
:
5726 case IA64_OPND_CNT5
:
5727 case IA64_OPND_CNT6
:
5728 case IA64_OPND_CPOS6a
:
5729 case IA64_OPND_CPOS6b
:
5730 case IA64_OPND_CPOS6c
:
5731 case IA64_OPND_IMMU2
:
5732 case IA64_OPND_IMMU7a
:
5733 case IA64_OPND_IMMU7b
:
5734 case IA64_OPND_IMMU21
:
5735 case IA64_OPND_IMMU24
:
5736 case IA64_OPND_MBTYPE4
:
5737 case IA64_OPND_MHTYPE8
:
5738 case IA64_OPND_POS6
:
5739 bits
= operand_width (idesc
->operands
[res_index
]);
5740 if (e
->X_op
== O_constant
)
5742 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5743 return OPERAND_MATCH
;
5745 return OPERAND_OUT_OF_RANGE
;
5749 case IA64_OPND_IMMU9
:
5750 bits
= operand_width (idesc
->operands
[res_index
]);
5751 if (e
->X_op
== O_constant
)
5753 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5755 int lobits
= e
->X_add_number
& 0x3;
5756 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5757 e
->X_add_number
|= (bfd_vma
) 0x3;
5758 return OPERAND_MATCH
;
5761 return OPERAND_OUT_OF_RANGE
;
5765 case IA64_OPND_IMM44
:
5766 /* least 16 bits must be zero */
5767 if ((e
->X_add_number
& 0xffff) != 0)
5768 /* XXX technically, this is wrong: we should not be issuing warning
5769 messages until we're sure this instruction pattern is going to
5771 as_warn (_("lower 16 bits of mask ignored"));
5773 if (e
->X_op
== O_constant
)
5775 if (((e
->X_add_number
>= 0
5776 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5777 || (e
->X_add_number
< 0
5778 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5781 if (e
->X_add_number
>= 0
5782 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5784 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5786 return OPERAND_MATCH
;
5789 return OPERAND_OUT_OF_RANGE
;
5793 case IA64_OPND_IMM17
:
5794 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5795 if (e
->X_op
== O_constant
)
5797 if (((e
->X_add_number
>= 0
5798 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5799 || (e
->X_add_number
< 0
5800 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5803 if (e
->X_add_number
>= 0
5804 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5806 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5808 return OPERAND_MATCH
;
5811 return OPERAND_OUT_OF_RANGE
;
5815 case IA64_OPND_IMM14
:
5816 case IA64_OPND_IMM22
:
5818 case IA64_OPND_IMM1
:
5819 case IA64_OPND_IMM8
:
5820 case IA64_OPND_IMM8U4
:
5821 case IA64_OPND_IMM8M1
:
5822 case IA64_OPND_IMM8M1U4
:
5823 case IA64_OPND_IMM8M1U8
:
5824 case IA64_OPND_IMM9a
:
5825 case IA64_OPND_IMM9b
:
5826 bits
= operand_width (idesc
->operands
[res_index
]);
5827 if (relocatable
&& (e
->X_op
== O_symbol
5828 || e
->X_op
== O_subtract
5829 || e
->X_op
== O_pseudo_fixup
))
5831 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5833 if (idesc
->operands
[res_index
] == IA64_OPND_IMM14
)
5834 fix
->code
= BFD_RELOC_IA64_IMM14
;
5836 fix
->code
= BFD_RELOC_IA64_IMM22
;
5838 if (e
->X_op
!= O_subtract
)
5840 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5841 if (e
->X_op
== O_pseudo_fixup
)
5845 fix
->opnd
= idesc
->operands
[res_index
];
5848 ++CURR_SLOT
.num_fixups
;
5849 return OPERAND_MATCH
;
5851 else if (e
->X_op
!= O_constant
5852 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5853 return OPERAND_MISMATCH
;
5855 if (opnd
== IA64_OPND_IMM8M1U4
)
5857 /* Zero is not valid for unsigned compares that take an adjusted
5858 constant immediate range. */
5859 if (e
->X_add_number
== 0)
5860 return OPERAND_OUT_OF_RANGE
;
5862 /* Sign-extend 32-bit unsigned numbers, so that the following range
5863 checks will work. */
5864 val
= e
->X_add_number
;
5865 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5866 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5867 val
= ((val
<< 32) >> 32);
5869 /* Check for 0x100000000. This is valid because
5870 0x100000000-1 is the same as ((uint32_t) -1). */
5871 if (val
== ((bfd_signed_vma
) 1 << 32))
5872 return OPERAND_MATCH
;
5876 else if (opnd
== IA64_OPND_IMM8M1U8
)
5878 /* Zero is not valid for unsigned compares that take an adjusted
5879 constant immediate range. */
5880 if (e
->X_add_number
== 0)
5881 return OPERAND_OUT_OF_RANGE
;
5883 /* Check for 0x10000000000000000. */
5884 if (e
->X_op
== O_big
)
5886 if (generic_bignum
[0] == 0
5887 && generic_bignum
[1] == 0
5888 && generic_bignum
[2] == 0
5889 && generic_bignum
[3] == 0
5890 && generic_bignum
[4] == 1)
5891 return OPERAND_MATCH
;
5893 return OPERAND_OUT_OF_RANGE
;
5896 val
= e
->X_add_number
- 1;
5898 else if (opnd
== IA64_OPND_IMM8M1
)
5899 val
= e
->X_add_number
- 1;
5900 else if (opnd
== IA64_OPND_IMM8U4
)
5902 /* Sign-extend 32-bit unsigned numbers, so that the following range
5903 checks will work. */
5904 val
= e
->X_add_number
;
5905 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5906 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5907 val
= ((val
<< 32) >> 32);
5910 val
= e
->X_add_number
;
5912 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5913 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5914 return OPERAND_MATCH
;
5916 return OPERAND_OUT_OF_RANGE
;
5918 case IA64_OPND_INC3
:
5919 /* +/- 1, 4, 8, 16 */
5920 val
= e
->X_add_number
;
5923 if (e
->X_op
== O_constant
)
5925 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5926 return OPERAND_MATCH
;
5928 return OPERAND_OUT_OF_RANGE
;
5932 case IA64_OPND_TGT25
:
5933 case IA64_OPND_TGT25b
:
5934 case IA64_OPND_TGT25c
:
5935 case IA64_OPND_TGT64
:
5936 if (e
->X_op
== O_symbol
)
5938 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5939 if (opnd
== IA64_OPND_TGT25
)
5940 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5941 else if (opnd
== IA64_OPND_TGT25b
)
5942 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5943 else if (opnd
== IA64_OPND_TGT25c
)
5944 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5945 else if (opnd
== IA64_OPND_TGT64
)
5946 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5950 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5951 fix
->opnd
= idesc
->operands
[res_index
];
5954 ++CURR_SLOT
.num_fixups
;
5955 return OPERAND_MATCH
;
5957 case IA64_OPND_TAG13
:
5958 case IA64_OPND_TAG13b
:
5962 return OPERAND_MATCH
;
5965 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5966 /* There are no external relocs for TAG13/TAG13b fields, so we
5967 create a dummy reloc. This will not live past md_apply_fix. */
5968 fix
->code
= BFD_RELOC_UNUSED
;
5969 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5970 fix
->opnd
= idesc
->operands
[res_index
];
5973 ++CURR_SLOT
.num_fixups
;
5974 return OPERAND_MATCH
;
5981 case IA64_OPND_LDXMOV
:
5982 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5983 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5984 fix
->opnd
= idesc
->operands
[res_index
];
5987 ++CURR_SLOT
.num_fixups
;
5988 return OPERAND_MATCH
;
5993 return OPERAND_MISMATCH
;
5997 parse_operand (expressionS
*e
, int more
)
6001 memset (e
, 0, sizeof (*e
));
6005 sep
= *input_line_pointer
;
6006 if (more
&& (sep
== ',' || sep
== more
))
6007 ++input_line_pointer
;
6012 parse_operand_and_eval (expressionS
*e
, int more
)
6014 int sep
= parse_operand (e
, more
);
6015 resolve_expression (e
);
6020 parse_operand_maybe_eval (expressionS
*e
, int more
, enum ia64_opnd op
)
6022 int sep
= parse_operand (e
, more
);
6025 case IA64_OPND_IMM14
:
6026 case IA64_OPND_IMM22
:
6027 case IA64_OPND_IMMU64
:
6028 case IA64_OPND_TGT25
:
6029 case IA64_OPND_TGT25b
:
6030 case IA64_OPND_TGT25c
:
6031 case IA64_OPND_TGT64
:
6032 case IA64_OPND_TAG13
:
6033 case IA64_OPND_TAG13b
:
6034 case IA64_OPND_LDXMOV
:
6037 resolve_expression (e
);
6043 /* Returns the next entry in the opcode table that matches the one in
6044 IDESC, and frees the entry in IDESC. If no matching entry is
6045 found, NULL is returned instead. */
6047 static struct ia64_opcode
*
6048 get_next_opcode (struct ia64_opcode
*idesc
)
6050 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6051 ia64_free_opcode (idesc
);
6055 /* Parse the operands for the opcode and find the opcode variant that
6056 matches the specified operands, or NULL if no match is possible. */
6058 static struct ia64_opcode
*
6059 parse_operands (struct ia64_opcode
*idesc
)
6061 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6062 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6065 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6066 enum operand_match_result result
;
6068 char *first_arg
= 0, *end
, *saved_input_pointer
;
6071 gas_assert (strlen (idesc
->name
) <= 128);
6073 strcpy (mnemonic
, idesc
->name
);
6074 if (idesc
->operands
[2] == IA64_OPND_SOF
6075 || idesc
->operands
[1] == IA64_OPND_SOF
)
6077 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6078 can't parse the first operand until we have parsed the
6079 remaining operands of the "alloc" instruction. */
6081 first_arg
= input_line_pointer
;
6082 end
= strchr (input_line_pointer
, '=');
6085 as_bad (_("Expected separator `='"));
6088 input_line_pointer
= end
+ 1;
6095 if (i
< NELEMS (CURR_SLOT
.opnd
))
6097 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ i
, '=',
6098 idesc
->operands
[i
]);
6099 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6106 sep
= parse_operand (&dummy
, '=');
6107 if (dummy
.X_op
== O_absent
)
6113 if (sep
!= '=' && sep
!= ',')
6118 if (num_outputs
> 0)
6119 as_bad (_("Duplicate equal sign (=) in instruction"));
6121 num_outputs
= i
+ 1;
6126 as_bad (_("Illegal operand separator `%c'"), sep
);
6130 if (idesc
->operands
[2] == IA64_OPND_SOF
6131 || idesc
->operands
[1] == IA64_OPND_SOF
)
6133 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6134 Note, however, that due to that mapping operand numbers in error
6135 messages for any of the constant operands will not be correct. */
6136 know (strcmp (idesc
->name
, "alloc") == 0);
6137 /* The first operand hasn't been parsed/initialized, yet (but
6138 num_operands intentionally doesn't account for that). */
6139 i
= num_operands
> 4 ? 2 : 1;
6140 #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6141 ? CURR_SLOT.opnd[n].X_add_number \
6143 sof
= set_regstack (FORCE_CONST(i
),
6146 FORCE_CONST(i
+ 3));
6149 /* now we can parse the first arg: */
6150 saved_input_pointer
= input_line_pointer
;
6151 input_line_pointer
= first_arg
;
6152 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ 0, '=',
6153 idesc
->operands
[0]);
6155 --num_outputs
; /* force error */
6156 input_line_pointer
= saved_input_pointer
;
6158 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6159 if (CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6160 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
)
6161 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6162 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6164 CURR_SLOT
.opnd
[i
+ 1].X_op
= O_illegal
;
6165 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6168 highest_unmatched_operand
= -4;
6169 curr_out_of_range_pos
= -1;
6171 for (; idesc
; idesc
= get_next_opcode (idesc
))
6173 if (num_outputs
!= idesc
->num_outputs
)
6174 continue; /* mismatch in # of outputs */
6175 if (highest_unmatched_operand
< 0)
6176 highest_unmatched_operand
|= 1;
6177 if (num_operands
> NELEMS (idesc
->operands
)
6178 || (num_operands
< NELEMS (idesc
->operands
)
6179 && idesc
->operands
[num_operands
])
6180 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6181 continue; /* mismatch in number of arguments */
6182 if (highest_unmatched_operand
< 0)
6183 highest_unmatched_operand
|= 2;
6185 CURR_SLOT
.num_fixups
= 0;
6187 /* Try to match all operands. If we see an out-of-range operand,
6188 then continue trying to match the rest of the operands, since if
6189 the rest match, then this idesc will give the best error message. */
6191 out_of_range_pos
= -1;
6192 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6194 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6195 if (result
!= OPERAND_MATCH
)
6197 if (result
!= OPERAND_OUT_OF_RANGE
)
6199 if (out_of_range_pos
< 0)
6200 /* remember position of the first out-of-range operand: */
6201 out_of_range_pos
= i
;
6205 /* If we did not match all operands, or if at least one operand was
6206 out-of-range, then this idesc does not match. Keep track of which
6207 idesc matched the most operands before failing. If we have two
6208 idescs that failed at the same position, and one had an out-of-range
6209 operand, then prefer the out-of-range operand. Thus if we have
6210 "add r0=0x1000000,r1" we get an error saying the constant is out
6211 of range instead of an error saying that the constant should have been
6214 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6216 if (i
> highest_unmatched_operand
6217 || (i
== highest_unmatched_operand
6218 && out_of_range_pos
> curr_out_of_range_pos
))
6220 highest_unmatched_operand
= i
;
6221 if (out_of_range_pos
>= 0)
6223 expected_operand
= idesc
->operands
[out_of_range_pos
];
6224 error_pos
= out_of_range_pos
;
6228 expected_operand
= idesc
->operands
[i
];
6231 curr_out_of_range_pos
= out_of_range_pos
;
6240 if (expected_operand
)
6241 as_bad (_("Operand %u of `%s' should be %s"),
6242 error_pos
+ 1, mnemonic
,
6243 elf64_ia64_operands
[expected_operand
].desc
);
6244 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6245 as_bad (_("Wrong number of output operands"));
6246 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6247 as_bad (_("Wrong number of input operands"));
6249 as_bad (_("Operand mismatch"));
6253 /* Check that the instruction doesn't use
6254 - r0, f0, or f1 as output operands
6255 - the same predicate twice as output operands
6256 - r0 as address of a base update load or store
6257 - the same GR as output and address of a base update load
6258 - two even- or two odd-numbered FRs as output operands of a floating
6259 point parallel load.
6260 At most two (conflicting) output (or output-like) operands can exist,
6261 (floating point parallel loads have three outputs, but the base register,
6262 if updated, cannot conflict with the actual outputs). */
6264 for (i
= 0; i
< num_operands
; ++i
)
6269 switch (idesc
->operands
[i
])
6274 if (i
< num_outputs
)
6276 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6279 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6281 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6286 if (i
< num_outputs
)
6289 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6291 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6298 if (i
< num_outputs
)
6300 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6301 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6304 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6307 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6309 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6313 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6315 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6318 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6320 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6331 as_warn (_("Invalid use of `%c%d' as output operand"), reg_class
, regno
);
6334 as_warn (_("Invalid use of `r%d' as base update address operand"), regno
);
6340 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6345 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6350 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6358 as_warn (_("Invalid duplicate use of `%c%d'"), reg_class
, reg1
);
6360 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6361 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6362 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6363 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6364 && ! ((reg1
^ reg2
) & 1))
6365 as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"),
6366 reg1
- REG_FR
, reg2
- REG_FR
);
6367 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6368 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6369 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6370 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6371 as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"),
6372 reg1
- REG_FR
, reg2
- REG_FR
);
6377 build_insn (struct slot
*slot
, bfd_vma
*insnp
)
6379 const struct ia64_operand
*odesc
, *o2desc
;
6380 struct ia64_opcode
*idesc
= slot
->idesc
;
6386 insn
= idesc
->opcode
| slot
->qp_regno
;
6388 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6390 if (slot
->opnd
[i
].X_op
== O_register
6391 || slot
->opnd
[i
].X_op
== O_constant
6392 || slot
->opnd
[i
].X_op
== O_index
)
6393 val
= slot
->opnd
[i
].X_add_number
;
6394 else if (slot
->opnd
[i
].X_op
== O_big
)
6396 /* This must be the value 0x10000000000000000. */
6397 gas_assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6403 switch (idesc
->operands
[i
])
6405 case IA64_OPND_IMMU64
:
6406 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6407 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6408 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6409 | (((val
>> 63) & 0x1) << 36));
6412 case IA64_OPND_IMMU62
:
6413 val
&= 0x3fffffffffffffffULL
;
6414 if (val
!= slot
->opnd
[i
].X_add_number
)
6415 as_warn (_("Value truncated to 62 bits"));
6416 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6417 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6420 case IA64_OPND_TGT64
:
6422 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6423 insn
|= ((((val
>> 59) & 0x1) << 36)
6424 | (((val
>> 0) & 0xfffff) << 13));
6455 case IA64_OPND_R3_2
:
6456 case IA64_OPND_CPUID_R3
:
6457 case IA64_OPND_DBR_R3
:
6458 case IA64_OPND_DTR_R3
:
6459 case IA64_OPND_ITR_R3
:
6460 case IA64_OPND_IBR_R3
:
6462 case IA64_OPND_MSR_R3
:
6463 case IA64_OPND_PKR_R3
:
6464 case IA64_OPND_PMC_R3
:
6465 case IA64_OPND_PMD_R3
:
6466 case IA64_OPND_RR_R3
:
6474 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6475 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6477 as_bad_where (slot
->src_file
, slot
->src_line
,
6478 _("Bad operand value: %s"), err
);
6479 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6481 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6482 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6484 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6485 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6487 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6488 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6489 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6491 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6492 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6500 emit_one_bundle (void)
6502 int manual_bundling_off
= 0, manual_bundling
= 0;
6503 enum ia64_unit required_unit
, insn_unit
= 0;
6504 enum ia64_insn_type type
[3], insn_type
;
6505 unsigned int template_val
, orig_template
;
6506 bfd_vma insn
[3] = { -1, -1, -1 };
6507 struct ia64_opcode
*idesc
;
6508 int end_of_insn_group
= 0, user_template
= -1;
6509 int n
, i
, j
, first
, curr
, last_slot
;
6510 bfd_vma t0
= 0, t1
= 0;
6511 struct label_fix
*lfix
;
6512 bfd_boolean mark_label
;
6513 struct insn_fix
*ifix
;
6519 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6520 know (first
>= 0 && first
< NUM_SLOTS
);
6521 n
= MIN (3, md
.num_slots_in_use
);
6523 /* Determine template: user user_template if specified, best match
6526 if (md
.slot
[first
].user_template
>= 0)
6527 user_template
= template_val
= md
.slot
[first
].user_template
;
6530 /* Auto select appropriate template. */
6531 memset (type
, 0, sizeof (type
));
6533 for (i
= 0; i
< n
; ++i
)
6535 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6537 type
[i
] = md
.slot
[curr
].idesc
->type
;
6538 curr
= (curr
+ 1) % NUM_SLOTS
;
6540 template_val
= best_template
[type
[0]][type
[1]][type
[2]];
6543 /* initialize instructions with appropriate nops: */
6544 for (i
= 0; i
< 3; ++i
)
6545 insn
[i
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[i
]];
6549 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6550 from the start of the frag. */
6551 addr_mod
= frag_now_fix () & 15;
6552 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6553 as_bad (_("instruction address is not a multiple of 16"));
6554 frag_now
->insn_addr
= addr_mod
;
6555 frag_now
->has_code
= 1;
6557 /* now fill in slots with as many insns as possible: */
6559 idesc
= md
.slot
[curr
].idesc
;
6560 end_of_insn_group
= 0;
6562 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6564 /* If we have unwind records, we may need to update some now. */
6565 unw_rec_list
*ptr
= md
.slot
[curr
].unwind_record
;
6566 unw_rec_list
*end_ptr
= NULL
;
6570 /* Find the last prologue/body record in the list for the current
6571 insn, and set the slot number for all records up to that point.
6572 This needs to be done now, because prologue/body records refer to
6573 the current point, not the point after the instruction has been
6574 issued. This matters because there may have been nops emitted
6575 meanwhile. Any non-prologue non-body record followed by a
6576 prologue/body record must also refer to the current point. */
6577 unw_rec_list
*last_ptr
;
6579 for (j
= 1; end_ptr
== NULL
&& j
< md
.num_slots_in_use
; ++j
)
6580 end_ptr
= md
.slot
[(curr
+ j
) % NUM_SLOTS
].unwind_record
;
6581 for (last_ptr
= NULL
; ptr
!= end_ptr
; ptr
= ptr
->next
)
6582 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6583 || ptr
->r
.type
== body
)
6587 /* Make last_ptr point one after the last prologue/body
6589 last_ptr
= last_ptr
->next
;
6590 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6593 ptr
->slot_number
= (unsigned long) f
+ i
;
6594 ptr
->slot_frag
= frag_now
;
6596 /* Remove the initialized records, so that we won't accidentally
6597 update them again if we insert a nop and continue. */
6598 md
.slot
[curr
].unwind_record
= last_ptr
;
6602 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6603 if (md
.slot
[curr
].manual_bundling_on
)
6606 manual_bundling
= 1;
6608 break; /* Need to start a new bundle. */
6611 /* If this instruction specifies a template, then it must be the first
6612 instruction of a bundle. */
6613 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6616 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6618 if (manual_bundling
&& !manual_bundling_off
)
6620 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6621 _("`%s' must be last in bundle"), idesc
->name
);
6623 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6627 if (idesc
->flags
& IA64_OPCODE_LAST
)
6630 unsigned int required_template
;
6632 /* If we need a stop bit after an M slot, our only choice is
6633 template 5 (M;;MI). If we need a stop bit after a B
6634 slot, our only choice is to place it at the end of the
6635 bundle, because the only available templates are MIB,
6636 MBB, BBB, MMB, and MFB. We don't handle anything other
6637 than M and B slots because these are the only kind of
6638 instructions that can have the IA64_OPCODE_LAST bit set. */
6639 required_template
= template_val
;
6640 switch (idesc
->type
)
6644 required_template
= 5;
6652 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6653 _("Internal error: don't know how to force %s to end of instruction group"),
6659 && (i
> required_slot
6660 || (required_slot
== 2 && !manual_bundling_off
)
6661 || (user_template
>= 0
6662 /* Changing from MMI to M;MI is OK. */
6663 && (template_val
^ required_template
) > 1)))
6665 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6666 _("`%s' must be last in instruction group"),
6668 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6669 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6671 if (required_slot
< i
)
6672 /* Can't fit this instruction. */
6676 if (required_template
!= template_val
)
6678 /* If we switch the template, we need to reset the NOPs
6679 after slot i. The slot-types of the instructions ahead
6680 of i never change, so we don't need to worry about
6681 changing NOPs in front of this slot. */
6682 for (j
= i
; j
< 3; ++j
)
6683 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6685 /* We just picked a template that includes the stop bit in the
6686 middle, so we don't need another one emitted later. */
6687 md
.slot
[curr
].end_of_insn_group
= 0;
6689 template_val
= required_template
;
6691 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6693 if (manual_bundling
)
6695 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6696 _("Label must be first in a bundle"));
6697 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6699 /* This insn must go into the first slot of a bundle. */
6703 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6705 /* We need an instruction group boundary in the middle of a
6706 bundle. See if we can switch to an other template with
6707 an appropriate boundary. */
6709 orig_template
= template_val
;
6710 if (i
== 1 && (user_template
== 4
6711 || (user_template
< 0
6712 && (ia64_templ_desc
[template_val
].exec_unit
[0]
6716 end_of_insn_group
= 0;
6718 else if (i
== 2 && (user_template
== 0
6719 || (user_template
< 0
6720 && (ia64_templ_desc
[template_val
].exec_unit
[1]
6722 /* This test makes sure we don't switch the template if
6723 the next instruction is one that needs to be first in
6724 an instruction group. Since all those instructions are
6725 in the M group, there is no way such an instruction can
6726 fit in this bundle even if we switch the template. The
6727 reason we have to check for this is that otherwise we
6728 may end up generating "MI;;I M.." which has the deadly
6729 effect that the second M instruction is no longer the
6730 first in the group! --davidm 99/12/16 */
6731 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6734 end_of_insn_group
= 0;
6737 && user_template
== 0
6738 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6739 /* Use the next slot. */
6741 else if (curr
!= first
)
6742 /* can't fit this insn */
6745 if (template_val
!= orig_template
)
6746 /* if we switch the template, we need to reset the NOPs
6747 after slot i. The slot-types of the instructions ahead
6748 of i never change, so we don't need to worry about
6749 changing NOPs in front of this slot. */
6750 for (j
= i
; j
< 3; ++j
)
6751 insn
[j
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[j
]];
6753 required_unit
= ia64_templ_desc
[template_val
].exec_unit
[i
];
6755 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6756 if (idesc
->type
== IA64_TYPE_DYN
)
6758 enum ia64_opnd opnd1
, opnd2
;
6760 if ((strcmp (idesc
->name
, "nop") == 0)
6761 || (strcmp (idesc
->name
, "break") == 0))
6762 insn_unit
= required_unit
;
6763 else if (strcmp (idesc
->name
, "hint") == 0)
6765 insn_unit
= required_unit
;
6766 if (required_unit
== IA64_UNIT_B
)
6772 case hint_b_warning
:
6773 as_warn (_("hint in B unit may be treated as nop"));
6776 /* When manual bundling is off and there is no
6777 user template, we choose a different unit so
6778 that hint won't go into the current slot. We
6779 will fill the current bundle with nops and
6780 try to put hint into the next bundle. */
6781 if (!manual_bundling
&& user_template
< 0)
6782 insn_unit
= IA64_UNIT_I
;
6784 as_bad (_("hint in B unit can't be used"));
6789 else if (strcmp (idesc
->name
, "chk.s") == 0
6790 || strcmp (idesc
->name
, "mov") == 0)
6792 insn_unit
= IA64_UNIT_M
;
6793 if (required_unit
== IA64_UNIT_I
6794 || (required_unit
== IA64_UNIT_F
&& template_val
== 6))
6795 insn_unit
= IA64_UNIT_I
;
6798 as_fatal (_("emit_one_bundle: unexpected dynamic op"));
6800 snprintf (mnemonic
, sizeof (mnemonic
), "%s.%c",
6801 idesc
->name
, "?imbfxx"[insn_unit
]);
6802 opnd1
= idesc
->operands
[0];
6803 opnd2
= idesc
->operands
[1];
6804 ia64_free_opcode (idesc
);
6805 idesc
= ia64_find_opcode (mnemonic
);
6806 /* moves to/from ARs have collisions */
6807 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6809 while (idesc
!= NULL
6810 && (idesc
->operands
[0] != opnd1
6811 || idesc
->operands
[1] != opnd2
))
6812 idesc
= get_next_opcode (idesc
);
6814 md
.slot
[curr
].idesc
= idesc
;
6818 insn_type
= idesc
->type
;
6819 insn_unit
= IA64_UNIT_NIL
;
6823 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6824 insn_unit
= required_unit
;
6826 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6827 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6828 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6829 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6830 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6835 if (insn_unit
!= required_unit
)
6836 continue; /* Try next slot. */
6838 /* Now is a good time to fix up the labels for this insn. */
6840 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6842 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6843 symbol_set_frag (lfix
->sym
, frag_now
);
6844 mark_label
|= lfix
->dw2_mark_labels
;
6846 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6848 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6849 symbol_set_frag (lfix
->sym
, frag_now
);
6852 if (debug_type
== DEBUG_DWARF2
6853 || md
.slot
[curr
].loc_directive_seen
6856 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6858 md
.slot
[curr
].loc_directive_seen
= 0;
6860 md
.slot
[curr
].debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
6862 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6865 build_insn (md
.slot
+ curr
, insn
+ i
);
6867 ptr
= md
.slot
[curr
].unwind_record
;
6870 /* Set slot numbers for all remaining unwind records belonging to the
6871 current insn. There can not be any prologue/body unwind records
6873 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6875 ptr
->slot_number
= (unsigned long) f
+ i
;
6876 ptr
->slot_frag
= frag_now
;
6878 md
.slot
[curr
].unwind_record
= NULL
;
6881 if (required_unit
== IA64_UNIT_L
)
6884 /* skip one slot for long/X-unit instructions */
6887 --md
.num_slots_in_use
;
6890 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6892 ifix
= md
.slot
[curr
].fixup
+ j
;
6893 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6894 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6895 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6896 fix
->fx_file
= md
.slot
[curr
].src_file
;
6897 fix
->fx_line
= md
.slot
[curr
].src_line
;
6900 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6903 ia64_free_opcode (md
.slot
[curr
].idesc
);
6904 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6905 md
.slot
[curr
].user_template
= -1;
6907 if (manual_bundling_off
)
6909 manual_bundling
= 0;
6912 curr
= (curr
+ 1) % NUM_SLOTS
;
6913 idesc
= md
.slot
[curr
].idesc
;
6916 /* A user template was specified, but the first following instruction did
6917 not fit. This can happen with or without manual bundling. */
6918 if (md
.num_slots_in_use
> 0 && last_slot
< 0)
6920 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6921 _("`%s' does not fit into %s template"),
6922 idesc
->name
, ia64_templ_desc
[template_val
].name
);
6923 /* Drop first insn so we don't livelock. */
6924 --md
.num_slots_in_use
;
6925 know (curr
== first
);
6926 ia64_free_opcode (md
.slot
[curr
].idesc
);
6927 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6928 md
.slot
[curr
].user_template
= -1;
6930 else if (manual_bundling
> 0)
6932 if (md
.num_slots_in_use
> 0)
6935 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6936 _("`%s' does not fit into bundle"), idesc
->name
);
6941 if (template_val
== 2)
6943 else if (last_slot
== 0)
6944 where
= "slots 2 or 3";
6947 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6948 _("`%s' can't go in %s of %s template"),
6949 idesc
->name
, where
, ia64_templ_desc
[template_val
].name
);
6953 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6954 _("Missing '}' at end of file"));
6957 know (md
.num_slots_in_use
< NUM_SLOTS
);
6959 t0
= end_of_insn_group
| (template_val
<< 1) | (insn
[0] << 5) | (insn
[1] << 46);
6960 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6962 number_to_chars_littleendian (f
+ 0, t0
, 8);
6963 number_to_chars_littleendian (f
+ 8, t1
, 8);
6967 md_parse_option (int c
, char *arg
)
6972 /* Switches from the Intel assembler. */
6974 if (strcmp (arg
, "ilp64") == 0
6975 || strcmp (arg
, "lp64") == 0
6976 || strcmp (arg
, "p64") == 0)
6978 md
.flags
|= EF_IA_64_ABI64
;
6980 else if (strcmp (arg
, "ilp32") == 0)
6982 md
.flags
&= ~EF_IA_64_ABI64
;
6984 else if (strcmp (arg
, "le") == 0)
6986 md
.flags
&= ~EF_IA_64_BE
;
6987 default_big_endian
= 0;
6989 else if (strcmp (arg
, "be") == 0)
6991 md
.flags
|= EF_IA_64_BE
;
6992 default_big_endian
= 1;
6994 else if (strncmp (arg
, "unwind-check=", 13) == 0)
6997 if (strcmp (arg
, "warning") == 0)
6998 md
.unwind_check
= unwind_check_warning
;
6999 else if (strcmp (arg
, "error") == 0)
7000 md
.unwind_check
= unwind_check_error
;
7004 else if (strncmp (arg
, "hint.b=", 7) == 0)
7007 if (strcmp (arg
, "ok") == 0)
7008 md
.hint_b
= hint_b_ok
;
7009 else if (strcmp (arg
, "warning") == 0)
7010 md
.hint_b
= hint_b_warning
;
7011 else if (strcmp (arg
, "error") == 0)
7012 md
.hint_b
= hint_b_error
;
7016 else if (strncmp (arg
, "tune=", 5) == 0)
7019 if (strcmp (arg
, "itanium1") == 0)
7021 else if (strcmp (arg
, "itanium2") == 0)
7031 if (strcmp (arg
, "so") == 0)
7033 /* Suppress signon message. */
7035 else if (strcmp (arg
, "pi") == 0)
7037 /* Reject privileged instructions. FIXME */
7039 else if (strcmp (arg
, "us") == 0)
7041 /* Allow union of signed and unsigned range. FIXME */
7043 else if (strcmp (arg
, "close_fcalls") == 0)
7045 /* Do not resolve global function calls. */
7052 /* temp[="prefix"] Insert temporary labels into the object file
7053 symbol table prefixed by "prefix".
7054 Default prefix is ":temp:".
7059 /* indirect=<tgt> Assume unannotated indirect branches behavior
7060 according to <tgt> --
7061 exit: branch out from the current context (default)
7062 labels: all labels in context may be branch targets
7064 if (strncmp (arg
, "indirect=", 9) != 0)
7069 /* -X conflicts with an ignored option, use -x instead */
7071 if (!arg
|| strcmp (arg
, "explicit") == 0)
7073 /* set default mode to explicit */
7074 md
.default_explicit_mode
= 1;
7077 else if (strcmp (arg
, "auto") == 0)
7079 md
.default_explicit_mode
= 0;
7081 else if (strcmp (arg
, "none") == 0)
7085 else if (strcmp (arg
, "debug") == 0)
7089 else if (strcmp (arg
, "debugx") == 0)
7091 md
.default_explicit_mode
= 1;
7094 else if (strcmp (arg
, "debugn") == 0)
7101 as_bad (_("Unrecognized option '-x%s'"), arg
);
7106 /* nops Print nops statistics. */
7109 /* GNU specific switches for gcc. */
7110 case OPTION_MCONSTANT_GP
:
7111 md
.flags
|= EF_IA_64_CONS_GP
;
7114 case OPTION_MAUTO_PIC
:
7115 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7126 md_show_usage (FILE *stream
)
7130 --mconstant-gp mark output file as using the constant-GP model\n\
7131 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7132 --mauto-pic mark output file as using the constant-GP model\n\
7133 without function descriptors (sets ELF header flag\n\
7134 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7135 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7136 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7137 -mtune=[itanium1|itanium2]\n\
7138 tune for a specific CPU (default -mtune=itanium2)\n\
7139 -munwind-check=[warning|error]\n\
7140 unwind directive check (default -munwind-check=warning)\n\
7141 -mhint.b=[ok|warning|error]\n\
7142 hint.b check (default -mhint.b=error)\n\
7143 -x | -xexplicit turn on dependency violation checking\n"), stream
);
7144 /* Note for translators: "automagically" can be translated as "automatically" here. */
7146 -xauto automagically remove dependency violations (default)\n\
7147 -xnone turn off dependency violation checking\n\
7148 -xdebug debug dependency violation checker\n\
7149 -xdebugn debug dependency violation checker but turn off\n\
7150 dependency violation checking\n\
7151 -xdebugx debug dependency violation checker and turn on\n\
7152 dependency violation checking\n"),
7157 ia64_after_parse_args (void)
7159 if (debug_type
== DEBUG_STABS
)
7160 as_fatal (_("--gstabs is not supported for ia64"));
7163 /* Return true if TYPE fits in TEMPL at SLOT. */
7166 match (int templ
, int type
, int slot
)
7168 enum ia64_unit unit
;
7171 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7174 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7176 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7178 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7179 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7180 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7181 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7182 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7183 default: result
= 0; break;
7188 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7189 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7190 type M or I would fit in TEMPL at SLOT. */
7193 extra_goodness (int templ
, int slot
)
7198 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7200 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7206 if (match (templ
, IA64_TYPE_M
, slot
)
7207 || match (templ
, IA64_TYPE_I
, slot
))
7208 /* Favor M- and I-unit NOPs. We definitely want to avoid
7209 F-unit and B-unit may cause split-issue or less-than-optimal
7210 branch-prediction. */
7221 /* This function is called once, at assembler startup time. It sets
7222 up all the tables, etc. that the MD part of the assembler will need
7223 that can be determined before arguments are parsed. */
7227 int i
, j
, k
, t
, goodness
, best
, ok
;
7232 md
.explicit_mode
= md
.default_explicit_mode
;
7234 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7236 /* Make sure function pointers get initialized. */
7237 target_big_endian
= -1;
7238 dot_byteorder (default_big_endian
);
7240 alias_hash
= hash_new ();
7241 alias_name_hash
= hash_new ();
7242 secalias_hash
= hash_new ();
7243 secalias_name_hash
= hash_new ();
7245 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7246 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7247 &zero_address_frag
);
7249 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7250 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7251 &zero_address_frag
);
7253 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7254 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7255 &zero_address_frag
);
7257 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7258 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7259 &zero_address_frag
);
7261 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7262 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7263 &zero_address_frag
);
7265 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7266 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7267 &zero_address_frag
);
7269 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7270 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7271 &zero_address_frag
);
7273 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7274 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7275 &zero_address_frag
);
7277 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7278 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7279 &zero_address_frag
);
7281 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7282 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7283 &zero_address_frag
);
7285 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7286 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7287 &zero_address_frag
);
7289 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7290 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7291 &zero_address_frag
);
7293 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7294 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7295 &zero_address_frag
);
7297 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7298 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7299 &zero_address_frag
);
7301 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7302 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7303 &zero_address_frag
);
7305 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7306 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7307 &zero_address_frag
);
7309 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7310 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7311 &zero_address_frag
);
7314 pseudo_func
[FUNC_SLOTCOUNT_RELOC
].u
.sym
=
7315 symbol_new (".<slotcount>", undefined_section
, FUNC_SLOTCOUNT_RELOC
,
7316 &zero_address_frag
);
7319 if (md
.tune
!= itanium1
)
7321 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7323 le_nop_stop
[0] = 0x9;
7326 /* Compute the table of best templates. We compute goodness as a
7327 base 4 value, in which each match counts for 3. Match-failures
7328 result in NOPs and we use extra_goodness() to pick the execution
7329 units that are best suited for issuing the NOP. */
7330 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7331 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7332 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7335 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7338 if (match (t
, i
, 0))
7340 if (match (t
, j
, 1))
7342 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7343 goodness
= 3 + 3 + 3;
7345 goodness
= 3 + 3 + extra_goodness (t
, 2);
7347 else if (match (t
, j
, 2))
7348 goodness
= 3 + 3 + extra_goodness (t
, 1);
7352 goodness
+= extra_goodness (t
, 1);
7353 goodness
+= extra_goodness (t
, 2);
7356 else if (match (t
, i
, 1))
7358 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7361 goodness
= 3 + extra_goodness (t
, 2);
7363 else if (match (t
, i
, 2))
7364 goodness
= 3 + extra_goodness (t
, 1);
7366 if (goodness
> best
)
7369 best_template
[i
][j
][k
] = t
;
7374 #ifdef DEBUG_TEMPLATES
7375 /* For debugging changes to the best_template calculations. We don't care
7376 about combinations with invalid instructions, so start the loops at 1. */
7377 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7378 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7379 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7381 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7383 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7385 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7389 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7390 md
.slot
[i
].user_template
= -1;
7392 md
.pseudo_hash
= hash_new ();
7393 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7395 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7396 (void *) (pseudo_opcode
+ i
));
7398 as_fatal (_("ia64.md_begin: can't hash `%s': %s"),
7399 pseudo_opcode
[i
].name
, err
);
7402 md
.reg_hash
= hash_new ();
7403 md
.dynreg_hash
= hash_new ();
7404 md
.const_hash
= hash_new ();
7405 md
.entry_hash
= hash_new ();
7407 /* general registers: */
7408 declare_register_set ("r", 128, REG_GR
);
7409 declare_register ("gp", REG_GR
+ 1);
7410 declare_register ("sp", REG_GR
+ 12);
7411 declare_register ("tp", REG_GR
+ 13);
7412 declare_register_set ("ret", 4, REG_GR
+ 8);
7414 /* floating point registers: */
7415 declare_register_set ("f", 128, REG_FR
);
7416 declare_register_set ("farg", 8, REG_FR
+ 8);
7417 declare_register_set ("fret", 8, REG_FR
+ 8);
7419 /* branch registers: */
7420 declare_register_set ("b", 8, REG_BR
);
7421 declare_register ("rp", REG_BR
+ 0);
7423 /* predicate registers: */
7424 declare_register_set ("p", 64, REG_P
);
7425 declare_register ("pr", REG_PR
);
7426 declare_register ("pr.rot", REG_PR_ROT
);
7428 /* application registers: */
7429 declare_register_set ("ar", 128, REG_AR
);
7430 for (i
= 0; i
< NELEMS (ar
); ++i
)
7431 declare_register (ar
[i
].name
, REG_AR
+ ar
[i
].regnum
);
7433 /* control registers: */
7434 declare_register_set ("cr", 128, REG_CR
);
7435 for (i
= 0; i
< NELEMS (cr
); ++i
)
7436 declare_register (cr
[i
].name
, REG_CR
+ cr
[i
].regnum
);
7438 declare_register ("ip", REG_IP
);
7439 declare_register ("cfm", REG_CFM
);
7440 declare_register ("psr", REG_PSR
);
7441 declare_register ("psr.l", REG_PSR_L
);
7442 declare_register ("psr.um", REG_PSR_UM
);
7444 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7446 unsigned int regnum
= indirect_reg
[i
].regnum
;
7448 md
.indregsym
[regnum
- IND_CPUID
] = declare_register (indirect_reg
[i
].name
, regnum
);
7451 /* pseudo-registers used to specify unwind info: */
7452 declare_register ("psp", REG_PSP
);
7454 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7456 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7457 (void *) (const_bits
+ i
));
7459 as_fatal (_("Inserting \"%s\" into constant hash table failed: %s"),
7463 /* Set the architecture and machine depending on defaults and command line
7465 if (md
.flags
& EF_IA_64_ABI64
)
7466 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7468 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7471 as_warn (_("Could not set architecture and machine"));
7473 /* Set the pointer size and pointer shift size depending on md.flags */
7475 if (md
.flags
& EF_IA_64_ABI64
)
7477 md
.pointer_size
= 8; /* pointers are 8 bytes */
7478 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7482 md
.pointer_size
= 4; /* pointers are 4 bytes */
7483 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7486 md
.mem_offset
.hint
= 0;
7489 md
.entry_labels
= NULL
;
7492 /* Set the default options in md. Cannot do this in md_begin because
7493 that is called after md_parse_option which is where we set the
7494 options in md based on command line options. */
7497 ia64_init (int argc ATTRIBUTE_UNUSED
, char **argv ATTRIBUTE_UNUSED
)
7499 md
.flags
= MD_FLAGS_DEFAULT
;
7501 /* Don't turn on dependency checking for VMS, doesn't work. */
7504 /* FIXME: We should change it to unwind_check_error someday. */
7505 md
.unwind_check
= unwind_check_warning
;
7506 md
.hint_b
= hint_b_error
;
7510 /* Return a string for the target object file format. */
7513 ia64_target_format (void)
7515 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7517 if (md
.flags
& EF_IA_64_BE
)
7519 if (md
.flags
& EF_IA_64_ABI64
)
7520 #if defined(TE_AIX50)
7521 return "elf64-ia64-aix-big";
7522 #elif defined(TE_HPUX)
7523 return "elf64-ia64-hpux-big";
7525 return "elf64-ia64-big";
7528 #if defined(TE_AIX50)
7529 return "elf32-ia64-aix-big";
7530 #elif defined(TE_HPUX)
7531 return "elf32-ia64-hpux-big";
7533 return "elf32-ia64-big";
7538 if (md
.flags
& EF_IA_64_ABI64
)
7539 #if defined (TE_AIX50)
7540 return "elf64-ia64-aix-little";
7541 #elif defined (TE_VMS)
7543 md
.flags
|= EF_IA_64_ARCHVER_1
;
7544 return "elf64-ia64-vms";
7547 return "elf64-ia64-little";
7551 return "elf32-ia64-aix-little";
7553 return "elf32-ia64-little";
7558 return "unknown-format";
7562 ia64_end_of_source (void)
7564 /* terminate insn group upon reaching end of file: */
7565 insn_group_break (1, 0, 0);
7567 /* emits slots we haven't written yet: */
7568 ia64_flush_insns ();
7570 bfd_set_private_flags (stdoutput
, md
.flags
);
7572 md
.mem_offset
.hint
= 0;
7576 ia64_start_line (void)
7581 /* Make sure we don't reference input_line_pointer[-1] when that's
7587 if (md
.qp
.X_op
== O_register
)
7588 as_bad (_("qualifying predicate not followed by instruction"));
7589 md
.qp
.X_op
= O_absent
;
7591 if (ignore_input ())
7594 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7596 if (md
.detect_dv
&& !md
.explicit_mode
)
7603 as_warn (_("Explicit stops are ignored in auto mode"));
7607 insn_group_break (1, 0, 0);
7609 else if (input_line_pointer
[-1] == '{')
7611 if (md
.manual_bundling
)
7612 as_warn (_("Found '{' when manual bundling is already turned on"));
7614 CURR_SLOT
.manual_bundling_on
= 1;
7615 md
.manual_bundling
= 1;
7617 /* Bundling is only acceptable in explicit mode
7618 or when in default automatic mode. */
7619 if (md
.detect_dv
&& !md
.explicit_mode
)
7621 if (!md
.mode_explicitly_set
7622 && !md
.default_explicit_mode
)
7625 as_warn (_("Found '{' after explicit switch to automatic mode"));
7628 else if (input_line_pointer
[-1] == '}')
7630 if (!md
.manual_bundling
)
7631 as_warn (_("Found '}' when manual bundling is off"));
7633 PREV_SLOT
.manual_bundling_off
= 1;
7634 md
.manual_bundling
= 0;
7636 /* switch back to automatic mode, if applicable */
7639 && !md
.mode_explicitly_set
7640 && !md
.default_explicit_mode
)
7645 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7647 static int defining_tag
= 0;
7650 ia64_unrecognized_line (int ch
)
7655 expression_and_evaluate (&md
.qp
);
7656 if (*input_line_pointer
++ != ')')
7658 as_bad (_("Expected ')'"));
7661 if (md
.qp
.X_op
!= O_register
)
7663 as_bad (_("Qualifying predicate expected"));
7666 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7668 as_bad (_("Predicate register expected"));
7680 if (md
.qp
.X_op
== O_register
)
7682 as_bad (_("Tag must come before qualifying predicate."));
7686 /* This implements just enough of read_a_source_file in read.c to
7687 recognize labels. */
7688 if (is_name_beginner (*input_line_pointer
))
7690 s
= input_line_pointer
;
7691 c
= get_symbol_end ();
7693 else if (LOCAL_LABELS_FB
7694 && ISDIGIT (*input_line_pointer
))
7697 while (ISDIGIT (*input_line_pointer
))
7698 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7699 fb_label_instance_inc (temp
);
7700 s
= fb_label_name (temp
, 0);
7701 c
= *input_line_pointer
;
7710 /* Put ':' back for error messages' sake. */
7711 *input_line_pointer
++ = ':';
7712 as_bad (_("Expected ':'"));
7719 /* Put ':' back for error messages' sake. */
7720 *input_line_pointer
++ = ':';
7721 if (*input_line_pointer
++ != ']')
7723 as_bad (_("Expected ']'"));
7728 as_bad (_("Tag name expected"));
7738 /* Not a valid line. */
7743 ia64_frob_label (struct symbol
*sym
)
7745 struct label_fix
*fix
;
7747 /* Tags need special handling since they are not bundle breaks like
7751 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7753 fix
->next
= CURR_SLOT
.tag_fixups
;
7754 fix
->dw2_mark_labels
= FALSE
;
7755 CURR_SLOT
.tag_fixups
= fix
;
7760 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7762 md
.last_text_seg
= now_seg
;
7763 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7765 fix
->next
= CURR_SLOT
.label_fixups
;
7766 fix
->dw2_mark_labels
= dwarf2_loc_mark_labels
;
7767 CURR_SLOT
.label_fixups
= fix
;
7769 /* Keep track of how many code entry points we've seen. */
7770 if (md
.path
== md
.maxpaths
)
7773 md
.entry_labels
= (const char **)
7774 xrealloc ((void *) md
.entry_labels
,
7775 md
.maxpaths
* sizeof (char *));
7777 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7782 /* The HP-UX linker will give unresolved symbol errors for symbols
7783 that are declared but unused. This routine removes declared,
7784 unused symbols from an object. */
7786 ia64_frob_symbol (struct symbol
*sym
)
7788 if ((S_GET_SEGMENT (sym
) == bfd_und_section_ptr
&& ! symbol_used_p (sym
) &&
7789 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7790 || (S_GET_SEGMENT (sym
) == bfd_abs_section_ptr
7791 && ! S_IS_EXTERNAL (sym
)))
7798 ia64_flush_pending_output (void)
7800 if (!md
.keep_pending_output
7801 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7803 /* ??? This causes many unnecessary stop bits to be emitted.
7804 Unfortunately, it isn't clear if it is safe to remove this. */
7805 insn_group_break (1, 0, 0);
7806 ia64_flush_insns ();
7810 /* Do ia64-specific expression optimization. All that's done here is
7811 to transform index expressions that are either due to the indexing
7812 of rotating registers or due to the indexing of indirect register
7815 ia64_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
7819 resolve_expression (l
);
7820 if (l
->X_op
== O_register
)
7822 unsigned num_regs
= l
->X_add_number
>> 16;
7824 resolve_expression (r
);
7827 /* Left side is a .rotX-allocated register. */
7828 if (r
->X_op
!= O_constant
)
7830 as_bad (_("Rotating register index must be a non-negative constant"));
7831 r
->X_add_number
= 0;
7833 else if ((valueT
) r
->X_add_number
>= num_regs
)
7835 as_bad (_("Index out of range 0..%u"), num_regs
- 1);
7836 r
->X_add_number
= 0;
7838 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7841 else if (l
->X_add_number
>= IND_CPUID
&& l
->X_add_number
<= IND_RR
)
7843 if (r
->X_op
!= O_register
7844 || r
->X_add_number
< REG_GR
7845 || r
->X_add_number
> REG_GR
+ 127)
7847 as_bad (_("Indirect register index must be a general register"));
7848 r
->X_add_number
= REG_GR
;
7851 l
->X_op_symbol
= md
.indregsym
[l
->X_add_number
- IND_CPUID
];
7852 l
->X_add_number
= r
->X_add_number
;
7856 as_bad (_("Index can only be applied to rotating or indirect registers"));
7857 /* Fall back to some register use of which has as little as possible
7858 side effects, to minimize subsequent error messages. */
7859 l
->X_op
= O_register
;
7860 l
->X_add_number
= REG_GR
+ 3;
7865 ia64_parse_name (char *name
, expressionS
*e
, char *nextcharP
)
7867 struct const_desc
*cdesc
;
7868 struct dynreg
*dr
= 0;
7875 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7877 /* Find what relocation pseudo-function we're dealing with. */
7878 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7879 if (pseudo_func
[idx
].name
7880 && pseudo_func
[idx
].name
[0] == name
[1]
7881 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7883 pseudo_type
= pseudo_func
[idx
].type
;
7886 switch (pseudo_type
)
7888 case PSEUDO_FUNC_RELOC
:
7889 end
= input_line_pointer
;
7890 if (*nextcharP
!= '(')
7892 as_bad (_("Expected '('"));
7896 ++input_line_pointer
;
7898 if (*input_line_pointer
!= ')')
7900 as_bad (_("Missing ')'"));
7904 ++input_line_pointer
;
7906 if (idx
== FUNC_SLOTCOUNT_RELOC
)
7908 /* @slotcount can accept any expression. Canonicalize. */
7909 e
->X_add_symbol
= make_expr_symbol (e
);
7911 e
->X_add_number
= 0;
7914 if (e
->X_op
!= O_symbol
)
7916 if (e
->X_op
!= O_pseudo_fixup
)
7918 as_bad (_("Not a symbolic expression"));
7921 if (idx
!= FUNC_LT_RELATIVE
)
7923 as_bad (_("Illegal combination of relocation functions"));
7926 switch (S_GET_VALUE (e
->X_op_symbol
))
7928 case FUNC_FPTR_RELATIVE
:
7929 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7930 case FUNC_DTP_MODULE
:
7931 idx
= FUNC_LT_DTP_MODULE
; break;
7932 case FUNC_DTP_RELATIVE
:
7933 idx
= FUNC_LT_DTP_RELATIVE
; break;
7934 case FUNC_TP_RELATIVE
:
7935 idx
= FUNC_LT_TP_RELATIVE
; break;
7937 as_bad (_("Illegal combination of relocation functions"));
7941 /* Make sure gas doesn't get rid of local symbols that are used
7943 e
->X_op
= O_pseudo_fixup
;
7944 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7946 *nextcharP
= *input_line_pointer
;
7949 case PSEUDO_FUNC_CONST
:
7950 e
->X_op
= O_constant
;
7951 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7954 case PSEUDO_FUNC_REG
:
7955 e
->X_op
= O_register
;
7956 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7965 /* first see if NAME is a known register name: */
7966 sym
= hash_find (md
.reg_hash
, name
);
7969 e
->X_op
= O_register
;
7970 e
->X_add_number
= S_GET_VALUE (sym
);
7974 cdesc
= hash_find (md
.const_hash
, name
);
7977 e
->X_op
= O_constant
;
7978 e
->X_add_number
= cdesc
->value
;
7982 /* check for inN, locN, or outN: */
7987 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7995 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
8003 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
8014 /* Ignore register numbers with leading zeroes, except zero itself. */
8015 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
8017 unsigned long regnum
;
8019 /* The name is inN, locN, or outN; parse the register number. */
8020 regnum
= strtoul (name
+ idx
, &end
, 10);
8021 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
8023 if (regnum
>= dr
->num_regs
)
8026 as_bad (_("No current frame"));
8028 as_bad (_("Register number out of range 0..%u"),
8032 e
->X_op
= O_register
;
8033 e
->X_add_number
= dr
->base
+ regnum
;
8038 end
= alloca (strlen (name
) + 1);
8040 name
= ia64_canonicalize_symbol_name (end
);
8041 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8043 /* We've got ourselves the name of a rotating register set.
8044 Store the base register number in the low 16 bits of
8045 X_add_number and the size of the register set in the top 16
8047 e
->X_op
= O_register
;
8048 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8054 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8057 ia64_canonicalize_symbol_name (char *name
)
8059 size_t len
= strlen (name
), full
= len
;
8061 while (len
> 0 && name
[len
- 1] == '#')
8066 as_bad (_("Standalone `#' is illegal"));
8068 else if (len
< full
- 1)
8069 as_warn (_("Redundant `#' suffix operators"));
8074 /* Return true if idesc is a conditional branch instruction. This excludes
8075 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8076 because they always read/write resources regardless of the value of the
8077 qualifying predicate. br.ia must always use p0, and hence is always
8078 taken. Thus this function returns true for branches which can fall
8079 through, and which use no resources if they do fall through. */
8082 is_conditional_branch (struct ia64_opcode
*idesc
)
8084 /* br is a conditional branch. Everything that starts with br. except
8085 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8086 Everything that starts with brl is a conditional branch. */
8087 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8088 && (idesc
->name
[2] == '\0'
8089 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8090 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8091 || idesc
->name
[2] == 'l'
8092 /* br.cond, br.call, br.clr */
8093 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8094 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8095 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8098 /* Return whether the given opcode is a taken branch. If there's any doubt,
8102 is_taken_branch (struct ia64_opcode
*idesc
)
8104 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8105 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8108 /* Return whether the given opcode is an interruption or rfi. If there's any
8109 doubt, returns zero. */
8112 is_interruption_or_rfi (struct ia64_opcode
*idesc
)
8114 if (strcmp (idesc
->name
, "rfi") == 0)
8119 /* Returns the index of the given dependency in the opcode's list of chks, or
8120 -1 if there is no dependency. */
8123 depends_on (int depind
, struct ia64_opcode
*idesc
)
8126 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8127 for (i
= 0; i
< dep
->nchks
; i
++)
8129 if (depind
== DEP (dep
->chks
[i
]))
8135 /* Determine a set of specific resources used for a particular resource
8136 class. Returns the number of specific resources identified For those
8137 cases which are not determinable statically, the resource returned is
8140 Meanings of value in 'NOTE':
8141 1) only read/write when the register number is explicitly encoded in the
8143 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8144 accesses CFM when qualifying predicate is in the rotating region.
8145 3) general register value is used to specify an indirect register; not
8146 determinable statically.
8147 4) only read the given resource when bits 7:0 of the indirect index
8148 register value does not match the register number of the resource; not
8149 determinable statically.
8150 5) all rules are implementation specific.
8151 6) only when both the index specified by the reader and the index specified
8152 by the writer have the same value in bits 63:61; not determinable
8154 7) only access the specified resource when the corresponding mask bit is
8156 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8157 only read when these insns reference FR2-31
8158 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8159 written when these insns write FR32-127
8160 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8162 11) The target predicates are written independently of PR[qp], but source
8163 registers are only read if PR[qp] is true. Since the state of PR[qp]
8164 cannot statically be determined, all source registers are marked used.
8165 12) This insn only reads the specified predicate register when that
8166 register is the PR[qp].
8167 13) This reference to ld-c only applies to the GR whose value is loaded
8168 with data returned from memory, not the post-incremented address register.
8169 14) The RSE resource includes the implementation-specific RSE internal
8170 state resources. At least one (and possibly more) of these resources are
8171 read by each instruction listed in IC:rse-readers. At least one (and
8172 possibly more) of these resources are written by each insn listed in
8174 15+16) Represents reserved instructions, which the assembler does not
8176 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and
8177 mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up.
8179 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8180 this code; there are no dependency violations based on memory access.
8183 #define MAX_SPECS 256
8188 specify_resource (const struct ia64_dependency
*dep
,
8189 struct ia64_opcode
*idesc
,
8190 /* is this a DV chk or a DV reg? */
8192 /* returned specific resources */
8193 struct rsrc specs
[MAX_SPECS
],
8194 /* resource note for this insn's usage */
8196 /* which execution path to examine */
8204 if (dep
->mode
== IA64_DV_WAW
8205 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8206 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8209 /* template for any resources we identify */
8210 tmpl
.dependency
= dep
;
8212 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8213 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8214 tmpl
.link_to_qp_branch
= 1;
8215 tmpl
.mem_offset
.hint
= 0;
8216 tmpl
.mem_offset
.offset
= 0;
8217 tmpl
.mem_offset
.base
= 0;
8220 tmpl
.cmp_type
= CMP_NONE
;
8227 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8228 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8229 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8231 /* we don't need to track these */
8232 if (dep
->semantics
== IA64_DVS_NONE
)
8235 switch (dep
->specifier
)
8240 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8242 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8243 if (regno
>= 0 && regno
<= 7)
8245 specs
[count
] = tmpl
;
8246 specs
[count
++].index
= regno
;
8252 for (i
= 0; i
< 8; i
++)
8254 specs
[count
] = tmpl
;
8255 specs
[count
++].index
= i
;
8264 case IA64_RS_AR_UNAT
:
8265 /* This is a mov =AR or mov AR= instruction. */
8266 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8268 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8269 if (regno
== AR_UNAT
)
8271 specs
[count
++] = tmpl
;
8276 /* This is a spill/fill, or other instruction that modifies the
8279 /* Unless we can determine the specific bits used, mark the whole
8280 thing; bits 8:3 of the memory address indicate the bit used in
8281 UNAT. The .mem.offset hint may be used to eliminate a small
8282 subset of conflicts. */
8283 specs
[count
] = tmpl
;
8284 if (md
.mem_offset
.hint
)
8287 fprintf (stderr
, " Using hint for spill/fill\n");
8288 /* The index isn't actually used, just set it to something
8289 approximating the bit index. */
8290 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8291 specs
[count
].mem_offset
.hint
= 1;
8292 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8293 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8297 specs
[count
++].specific
= 0;
8305 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8307 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8308 if ((regno
>= 8 && regno
<= 15)
8309 || (regno
>= 20 && regno
<= 23)
8310 || (regno
>= 31 && regno
<= 39)
8311 || (regno
>= 41 && regno
<= 47)
8312 || (regno
>= 67 && regno
<= 111))
8314 specs
[count
] = tmpl
;
8315 specs
[count
++].index
= regno
;
8328 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8330 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8331 if ((regno
>= 48 && regno
<= 63)
8332 || (regno
>= 112 && regno
<= 127))
8334 specs
[count
] = tmpl
;
8335 specs
[count
++].index
= regno
;
8341 for (i
= 48; i
< 64; i
++)
8343 specs
[count
] = tmpl
;
8344 specs
[count
++].index
= i
;
8346 for (i
= 112; i
< 128; i
++)
8348 specs
[count
] = tmpl
;
8349 specs
[count
++].index
= i
;
8367 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8368 if (idesc
->operands
[i
] == IA64_OPND_B1
8369 || idesc
->operands
[i
] == IA64_OPND_B2
)
8371 specs
[count
] = tmpl
;
8372 specs
[count
++].index
=
8373 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8378 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8379 if (idesc
->operands
[i
] == IA64_OPND_B1
8380 || idesc
->operands
[i
] == IA64_OPND_B2
)
8382 specs
[count
] = tmpl
;
8383 specs
[count
++].index
=
8384 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8390 case IA64_RS_CPUID
: /* four or more registers */
8393 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8395 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8396 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8399 specs
[count
] = tmpl
;
8400 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8404 specs
[count
] = tmpl
;
8405 specs
[count
++].specific
= 0;
8415 case IA64_RS_DBR
: /* four or more registers */
8418 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8420 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8421 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8424 specs
[count
] = tmpl
;
8425 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8429 specs
[count
] = tmpl
;
8430 specs
[count
++].specific
= 0;
8434 else if (note
== 0 && !rsrc_write
)
8436 specs
[count
] = tmpl
;
8437 specs
[count
++].specific
= 0;
8445 case IA64_RS_IBR
: /* four or more registers */
8448 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8450 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8451 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8454 specs
[count
] = tmpl
;
8455 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8459 specs
[count
] = tmpl
;
8460 specs
[count
++].specific
= 0;
8473 /* These are implementation specific. Force all references to
8474 conflict with all other references. */
8475 specs
[count
] = tmpl
;
8476 specs
[count
++].specific
= 0;
8484 case IA64_RS_PKR
: /* 16 or more registers */
8485 if (note
== 3 || note
== 4)
8487 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8489 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8490 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8495 specs
[count
] = tmpl
;
8496 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8499 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8501 /* Uses all registers *except* the one in R3. */
8502 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8504 specs
[count
] = tmpl
;
8505 specs
[count
++].index
= i
;
8511 specs
[count
] = tmpl
;
8512 specs
[count
++].specific
= 0;
8519 specs
[count
] = tmpl
;
8520 specs
[count
++].specific
= 0;
8524 case IA64_RS_PMC
: /* four or more registers */
8527 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8528 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8531 int reg_index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8533 int regno
= CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_GR
;
8534 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8537 specs
[count
] = tmpl
;
8538 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8542 specs
[count
] = tmpl
;
8543 specs
[count
++].specific
= 0;
8553 case IA64_RS_PMD
: /* four or more registers */
8556 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8558 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8559 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8562 specs
[count
] = tmpl
;
8563 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8567 specs
[count
] = tmpl
;
8568 specs
[count
++].specific
= 0;
8578 case IA64_RS_RR
: /* eight registers */
8581 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8583 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8584 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8587 specs
[count
] = tmpl
;
8588 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8592 specs
[count
] = tmpl
;
8593 specs
[count
++].specific
= 0;
8597 else if (note
== 0 && !rsrc_write
)
8599 specs
[count
] = tmpl
;
8600 specs
[count
++].specific
= 0;
8608 case IA64_RS_CR_IRR
:
8611 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8612 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8614 && idesc
->operands
[1] == IA64_OPND_CR3
8617 for (i
= 0; i
< 4; i
++)
8619 specs
[count
] = tmpl
;
8620 specs
[count
++].index
= CR_IRR0
+ i
;
8626 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8627 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8629 && regno
<= CR_IRR3
)
8631 specs
[count
] = tmpl
;
8632 specs
[count
++].index
= regno
;
8641 case IA64_RS_CR_IIB
:
8648 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8649 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8650 && (regno
== CR_IIB0
|| regno
== CR_IIB1
))
8652 specs
[count
] = tmpl
;
8653 specs
[count
++].index
= regno
;
8658 case IA64_RS_CR_LRR
:
8665 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8666 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8667 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8669 specs
[count
] = tmpl
;
8670 specs
[count
++].index
= regno
;
8678 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8680 specs
[count
] = tmpl
;
8681 specs
[count
++].index
=
8682 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8697 else if (rsrc_write
)
8699 if (dep
->specifier
== IA64_RS_FRb
8700 && idesc
->operands
[0] == IA64_OPND_F1
)
8702 specs
[count
] = tmpl
;
8703 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8708 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8710 if (idesc
->operands
[i
] == IA64_OPND_F2
8711 || idesc
->operands
[i
] == IA64_OPND_F3
8712 || idesc
->operands
[i
] == IA64_OPND_F4
)
8714 specs
[count
] = tmpl
;
8715 specs
[count
++].index
=
8716 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8725 /* This reference applies only to the GR whose value is loaded with
8726 data returned from memory. */
8727 specs
[count
] = tmpl
;
8728 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8734 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8735 if (idesc
->operands
[i
] == IA64_OPND_R1
8736 || idesc
->operands
[i
] == IA64_OPND_R2
8737 || idesc
->operands
[i
] == IA64_OPND_R3
)
8739 specs
[count
] = tmpl
;
8740 specs
[count
++].index
=
8741 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8743 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8744 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8745 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8747 specs
[count
] = tmpl
;
8748 specs
[count
++].index
=
8749 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8754 /* Look for anything that reads a GR. */
8755 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8757 if (idesc
->operands
[i
] == IA64_OPND_MR3
8758 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8759 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8760 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8761 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8762 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8763 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8764 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8765 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8766 || ((i
>= idesc
->num_outputs
)
8767 && (idesc
->operands
[i
] == IA64_OPND_R1
8768 || idesc
->operands
[i
] == IA64_OPND_R2
8769 || idesc
->operands
[i
] == IA64_OPND_R3
8770 /* addl source register. */
8771 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8773 specs
[count
] = tmpl
;
8774 specs
[count
++].index
=
8775 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8786 /* This is the same as IA64_RS_PRr, except that the register range is
8787 from 1 - 15, and there are no rotating register reads/writes here. */
8791 for (i
= 1; i
< 16; i
++)
8793 specs
[count
] = tmpl
;
8794 specs
[count
++].index
= i
;
8800 /* Mark only those registers indicated by the mask. */
8803 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8804 for (i
= 1; i
< 16; i
++)
8805 if (mask
& ((valueT
) 1 << i
))
8807 specs
[count
] = tmpl
;
8808 specs
[count
++].index
= i
;
8816 else if (note
== 11) /* note 11 implies note 1 as well */
8820 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8822 if (idesc
->operands
[i
] == IA64_OPND_P1
8823 || idesc
->operands
[i
] == IA64_OPND_P2
)
8825 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8826 if (regno
>= 1 && regno
< 16)
8828 specs
[count
] = tmpl
;
8829 specs
[count
++].index
= regno
;
8839 else if (note
== 12)
8841 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8843 specs
[count
] = tmpl
;
8844 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8851 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8852 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8853 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8854 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8856 if ((idesc
->operands
[0] == IA64_OPND_P1
8857 || idesc
->operands
[0] == IA64_OPND_P2
)
8858 && p1
>= 1 && p1
< 16)
8860 specs
[count
] = tmpl
;
8861 specs
[count
].cmp_type
=
8862 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8863 specs
[count
++].index
= p1
;
8865 if ((idesc
->operands
[1] == IA64_OPND_P1
8866 || idesc
->operands
[1] == IA64_OPND_P2
)
8867 && p2
>= 1 && p2
< 16)
8869 specs
[count
] = tmpl
;
8870 specs
[count
].cmp_type
=
8871 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8872 specs
[count
++].index
= p2
;
8877 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8879 specs
[count
] = tmpl
;
8880 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8882 if (idesc
->operands
[1] == IA64_OPND_PR
)
8884 for (i
= 1; i
< 16; i
++)
8886 specs
[count
] = tmpl
;
8887 specs
[count
++].index
= i
;
8898 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8899 simplified cases of this. */
8903 for (i
= 16; i
< 63; i
++)
8905 specs
[count
] = tmpl
;
8906 specs
[count
++].index
= i
;
8912 /* Mark only those registers indicated by the mask. */
8914 && idesc
->operands
[0] == IA64_OPND_PR
)
8916 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8917 if (mask
& ((valueT
) 1 << 16))
8918 for (i
= 16; i
< 63; i
++)
8920 specs
[count
] = tmpl
;
8921 specs
[count
++].index
= i
;
8925 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8927 for (i
= 16; i
< 63; i
++)
8929 specs
[count
] = tmpl
;
8930 specs
[count
++].index
= i
;
8938 else if (note
== 11) /* note 11 implies note 1 as well */
8942 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8944 if (idesc
->operands
[i
] == IA64_OPND_P1
8945 || idesc
->operands
[i
] == IA64_OPND_P2
)
8947 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8948 if (regno
>= 16 && regno
< 63)
8950 specs
[count
] = tmpl
;
8951 specs
[count
++].index
= regno
;
8961 else if (note
== 12)
8963 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8965 specs
[count
] = tmpl
;
8966 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8973 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8974 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8975 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8976 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8978 if ((idesc
->operands
[0] == IA64_OPND_P1
8979 || idesc
->operands
[0] == IA64_OPND_P2
)
8980 && p1
>= 16 && p1
< 63)
8982 specs
[count
] = tmpl
;
8983 specs
[count
].cmp_type
=
8984 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8985 specs
[count
++].index
= p1
;
8987 if ((idesc
->operands
[1] == IA64_OPND_P1
8988 || idesc
->operands
[1] == IA64_OPND_P2
)
8989 && p2
>= 16 && p2
< 63)
8991 specs
[count
] = tmpl
;
8992 specs
[count
].cmp_type
=
8993 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8994 specs
[count
++].index
= p2
;
8999 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9001 specs
[count
] = tmpl
;
9002 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9004 if (idesc
->operands
[1] == IA64_OPND_PR
)
9006 for (i
= 16; i
< 63; i
++)
9008 specs
[count
] = tmpl
;
9009 specs
[count
++].index
= i
;
9021 /* Verify that the instruction is using the PSR bit indicated in
9025 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
9027 if (dep
->regindex
< 6)
9029 specs
[count
++] = tmpl
;
9032 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
9034 if (dep
->regindex
< 32
9035 || dep
->regindex
== 35
9036 || dep
->regindex
== 36
9037 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
9039 specs
[count
++] = tmpl
;
9042 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
9044 if (dep
->regindex
< 32
9045 || dep
->regindex
== 35
9046 || dep
->regindex
== 36
9047 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
9049 specs
[count
++] = tmpl
;
9054 /* Several PSR bits have very specific dependencies. */
9055 switch (dep
->regindex
)
9058 specs
[count
++] = tmpl
;
9063 specs
[count
++] = tmpl
;
9067 /* Only certain CR accesses use PSR.ic */
9068 if (idesc
->operands
[0] == IA64_OPND_CR3
9069 || idesc
->operands
[1] == IA64_OPND_CR3
)
9072 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9075 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_CR
;
9092 specs
[count
++] = tmpl
;
9101 specs
[count
++] = tmpl
;
9105 /* Only some AR accesses use cpl */
9106 if (idesc
->operands
[0] == IA64_OPND_AR3
9107 || idesc
->operands
[1] == IA64_OPND_AR3
)
9110 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9113 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_AR
;
9120 && regno
<= AR_K7
))))
9122 specs
[count
++] = tmpl
;
9127 specs
[count
++] = tmpl
;
9137 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9139 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9145 if (mask
& ((valueT
) 1 << dep
->regindex
))
9147 specs
[count
++] = tmpl
;
9152 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9153 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9154 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9155 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9157 if (idesc
->operands
[i
] == IA64_OPND_F1
9158 || idesc
->operands
[i
] == IA64_OPND_F2
9159 || idesc
->operands
[i
] == IA64_OPND_F3
9160 || idesc
->operands
[i
] == IA64_OPND_F4
)
9162 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9163 if (reg
>= min
&& reg
<= max
)
9165 specs
[count
++] = tmpl
;
9172 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9173 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9174 /* mfh is read on writes to FR32-127; mfl is read on writes to
9176 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9178 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9180 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9181 if (reg
>= min
&& reg
<= max
)
9183 specs
[count
++] = tmpl
;
9188 else if (note
== 10)
9190 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9192 if (idesc
->operands
[i
] == IA64_OPND_R1
9193 || idesc
->operands
[i
] == IA64_OPND_R2
9194 || idesc
->operands
[i
] == IA64_OPND_R3
)
9196 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9197 if (regno
>= 16 && regno
<= 31)
9199 specs
[count
++] = tmpl
;
9210 case IA64_RS_AR_FPSR
:
9211 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9213 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9214 if (regno
== AR_FPSR
)
9216 specs
[count
++] = tmpl
;
9221 specs
[count
++] = tmpl
;
9226 /* Handle all AR[REG] resources */
9227 if (note
== 0 || note
== 1)
9229 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9230 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9231 && regno
== dep
->regindex
)
9233 specs
[count
++] = tmpl
;
9235 /* other AR[REG] resources may be affected by AR accesses */
9236 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9239 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9240 switch (dep
->regindex
)
9246 if (regno
== AR_BSPSTORE
)
9248 specs
[count
++] = tmpl
;
9252 (regno
== AR_BSPSTORE
9253 || regno
== AR_RNAT
))
9255 specs
[count
++] = tmpl
;
9260 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9263 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9264 switch (dep
->regindex
)
9269 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9271 specs
[count
++] = tmpl
;
9278 specs
[count
++] = tmpl
;
9288 /* Handle all CR[REG] resources.
9289 ??? FIXME: The rule 17 isn't really handled correctly. */
9290 if (note
== 0 || note
== 1 || note
== 17)
9292 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9294 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9295 if (regno
== dep
->regindex
)
9297 specs
[count
++] = tmpl
;
9299 else if (!rsrc_write
)
9301 /* Reads from CR[IVR] affect other resources. */
9302 if (regno
== CR_IVR
)
9304 if ((dep
->regindex
>= CR_IRR0
9305 && dep
->regindex
<= CR_IRR3
)
9306 || dep
->regindex
== CR_TPR
)
9308 specs
[count
++] = tmpl
;
9315 specs
[count
++] = tmpl
;
9324 case IA64_RS_INSERVICE
:
9325 /* look for write of EOI (67) or read of IVR (65) */
9326 if ((idesc
->operands
[0] == IA64_OPND_CR3
9327 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9328 || (idesc
->operands
[1] == IA64_OPND_CR3
9329 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9331 specs
[count
++] = tmpl
;
9338 specs
[count
++] = tmpl
;
9349 specs
[count
++] = tmpl
;
9353 /* Check if any of the registers accessed are in the rotating region.
9354 mov to/from pr accesses CFM only when qp_regno is in the rotating
9356 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9358 if (idesc
->operands
[i
] == IA64_OPND_R1
9359 || idesc
->operands
[i
] == IA64_OPND_R2
9360 || idesc
->operands
[i
] == IA64_OPND_R3
)
9362 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9363 /* Assumes that md.rot.num_regs is always valid */
9364 if (md
.rot
.num_regs
> 0
9366 && num
< 31 + md
.rot
.num_regs
)
9368 specs
[count
] = tmpl
;
9369 specs
[count
++].specific
= 0;
9372 else if (idesc
->operands
[i
] == IA64_OPND_F1
9373 || idesc
->operands
[i
] == IA64_OPND_F2
9374 || idesc
->operands
[i
] == IA64_OPND_F3
9375 || idesc
->operands
[i
] == IA64_OPND_F4
)
9377 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9380 specs
[count
] = tmpl
;
9381 specs
[count
++].specific
= 0;
9384 else if (idesc
->operands
[i
] == IA64_OPND_P1
9385 || idesc
->operands
[i
] == IA64_OPND_P2
)
9387 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9390 specs
[count
] = tmpl
;
9391 specs
[count
++].specific
= 0;
9395 if (CURR_SLOT
.qp_regno
> 15)
9397 specs
[count
] = tmpl
;
9398 specs
[count
++].specific
= 0;
9403 /* This is the same as IA64_RS_PRr, except simplified to account for
9404 the fact that there is only one register. */
9408 specs
[count
++] = tmpl
;
9413 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9414 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9415 if (mask
& ((valueT
) 1 << 63))
9416 specs
[count
++] = tmpl
;
9418 else if (note
== 11)
9420 if ((idesc
->operands
[0] == IA64_OPND_P1
9421 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9422 || (idesc
->operands
[1] == IA64_OPND_P2
9423 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9425 specs
[count
++] = tmpl
;
9428 else if (note
== 12)
9430 if (CURR_SLOT
.qp_regno
== 63)
9432 specs
[count
++] = tmpl
;
9439 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9440 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9441 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9442 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9445 && (idesc
->operands
[0] == IA64_OPND_P1
9446 || idesc
->operands
[0] == IA64_OPND_P2
))
9448 specs
[count
] = tmpl
;
9449 specs
[count
++].cmp_type
=
9450 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9453 && (idesc
->operands
[1] == IA64_OPND_P1
9454 || idesc
->operands
[1] == IA64_OPND_P2
))
9456 specs
[count
] = tmpl
;
9457 specs
[count
++].cmp_type
=
9458 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9463 if (CURR_SLOT
.qp_regno
== 63)
9465 specs
[count
++] = tmpl
;
9476 /* FIXME we can identify some individual RSE written resources, but RSE
9477 read resources have not yet been completely identified, so for now
9478 treat RSE as a single resource */
9479 if (strncmp (idesc
->name
, "mov", 3) == 0)
9483 if (idesc
->operands
[0] == IA64_OPND_AR3
9484 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9486 specs
[count
++] = tmpl
;
9491 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9493 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9494 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9496 specs
[count
++] = tmpl
;
9499 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9501 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9502 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9503 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9505 specs
[count
++] = tmpl
;
9512 specs
[count
++] = tmpl
;
9517 /* FIXME -- do any of these need to be non-specific? */
9518 specs
[count
++] = tmpl
;
9522 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9529 /* Clear branch flags on marked resources. This breaks the link between the
9530 QP of the marking instruction and a subsequent branch on the same QP. */
9533 clear_qp_branch_flag (valueT mask
)
9536 for (i
= 0; i
< regdepslen
; i
++)
9538 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9539 if ((bit
& mask
) != 0)
9541 regdeps
[i
].link_to_qp_branch
= 0;
9546 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9547 any mutexes which contain one of the PRs and create new ones when
9551 update_qp_mutex (valueT mask
)
9557 while (i
< qp_mutexeslen
)
9559 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9561 /* If it destroys and creates the same mutex, do nothing. */
9562 if (qp_mutexes
[i
].prmask
== mask
9563 && qp_mutexes
[i
].path
== md
.path
)
9574 fprintf (stderr
, " Clearing mutex relation");
9575 print_prmask (qp_mutexes
[i
].prmask
);
9576 fprintf (stderr
, "\n");
9579 /* Deal with the old mutex with more than 3+ PRs only if
9580 the new mutex on the same execution path with it.
9582 FIXME: The 3+ mutex support is incomplete.
9583 dot_pred_rel () may be a better place to fix it. */
9584 if (qp_mutexes
[i
].path
== md
.path
)
9586 /* If it is a proper subset of the mutex, create a
9589 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9592 qp_mutexes
[i
].prmask
&= ~mask
;
9593 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9595 /* Modify the mutex if there are more than one
9603 /* Remove the mutex. */
9604 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9612 add_qp_mutex (mask
);
9617 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9619 Any changes to a PR clears the mutex relations which include that PR. */
9622 clear_qp_mutex (valueT mask
)
9627 while (i
< qp_mutexeslen
)
9629 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9633 fprintf (stderr
, " Clearing mutex relation");
9634 print_prmask (qp_mutexes
[i
].prmask
);
9635 fprintf (stderr
, "\n");
9637 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9644 /* Clear implies relations which contain PRs in the given masks.
9645 P1_MASK indicates the source of the implies relation, while P2_MASK
9646 indicates the implied PR. */
9649 clear_qp_implies (valueT p1_mask
, valueT p2_mask
)
9654 while (i
< qp_implieslen
)
9656 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9657 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9660 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9661 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9662 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9669 /* Add the PRs specified to the list of implied relations. */
9672 add_qp_imply (int p1
, int p2
)
9678 /* p0 is not meaningful here. */
9679 if (p1
== 0 || p2
== 0)
9685 /* If it exists already, ignore it. */
9686 for (i
= 0; i
< qp_implieslen
; i
++)
9688 if (qp_implies
[i
].p1
== p1
9689 && qp_implies
[i
].p2
== p2
9690 && qp_implies
[i
].path
== md
.path
9691 && !qp_implies
[i
].p2_branched
)
9695 if (qp_implieslen
== qp_impliestotlen
)
9697 qp_impliestotlen
+= 20;
9698 qp_implies
= (struct qp_imply
*)
9699 xrealloc ((void *) qp_implies
,
9700 qp_impliestotlen
* sizeof (struct qp_imply
));
9703 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9704 qp_implies
[qp_implieslen
].p1
= p1
;
9705 qp_implies
[qp_implieslen
].p2
= p2
;
9706 qp_implies
[qp_implieslen
].path
= md
.path
;
9707 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9709 /* Add in the implied transitive relations; for everything that p2 implies,
9710 make p1 imply that, too; for everything that implies p1, make it imply p2
9712 for (i
= 0; i
< qp_implieslen
; i
++)
9714 if (qp_implies
[i
].p1
== p2
)
9715 add_qp_imply (p1
, qp_implies
[i
].p2
);
9716 if (qp_implies
[i
].p2
== p1
)
9717 add_qp_imply (qp_implies
[i
].p1
, p2
);
9719 /* Add in mutex relations implied by this implies relation; for each mutex
9720 relation containing p2, duplicate it and replace p2 with p1. */
9721 bit
= (valueT
) 1 << p1
;
9722 mask
= (valueT
) 1 << p2
;
9723 for (i
= 0; i
< qp_mutexeslen
; i
++)
9725 if (qp_mutexes
[i
].prmask
& mask
)
9726 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9730 /* Add the PRs specified in the mask to the mutex list; this means that only
9731 one of the PRs can be true at any time. PR0 should never be included in
9735 add_qp_mutex (valueT mask
)
9740 if (qp_mutexeslen
== qp_mutexestotlen
)
9742 qp_mutexestotlen
+= 20;
9743 qp_mutexes
= (struct qpmutex
*)
9744 xrealloc ((void *) qp_mutexes
,
9745 qp_mutexestotlen
* sizeof (struct qpmutex
));
9749 fprintf (stderr
, " Registering mutex on");
9750 print_prmask (mask
);
9751 fprintf (stderr
, "\n");
9753 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9754 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9758 has_suffix_p (const char *name
, const char *suffix
)
9760 size_t namelen
= strlen (name
);
9761 size_t sufflen
= strlen (suffix
);
9763 if (namelen
<= sufflen
)
9765 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9769 clear_register_values (void)
9773 fprintf (stderr
, " Clearing register values\n");
9774 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9775 gr_values
[i
].known
= 0;
9778 /* Keep track of register values/changes which affect DV tracking.
9780 optimization note: should add a flag to classes of insns where otherwise we
9781 have to examine a group of strings to identify them. */
9784 note_register_values (struct ia64_opcode
*idesc
)
9786 valueT qp_changemask
= 0;
9789 /* Invalidate values for registers being written to. */
9790 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9792 if (idesc
->operands
[i
] == IA64_OPND_R1
9793 || idesc
->operands
[i
] == IA64_OPND_R2
9794 || idesc
->operands
[i
] == IA64_OPND_R3
)
9796 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9797 if (regno
> 0 && regno
< NELEMS (gr_values
))
9798 gr_values
[regno
].known
= 0;
9800 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9802 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9803 if (regno
> 0 && regno
< 4)
9804 gr_values
[regno
].known
= 0;
9806 else if (idesc
->operands
[i
] == IA64_OPND_P1
9807 || idesc
->operands
[i
] == IA64_OPND_P2
)
9809 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9810 qp_changemask
|= (valueT
) 1 << regno
;
9812 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9814 if (idesc
->operands
[2] & (valueT
) 0x10000)
9815 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9817 qp_changemask
= idesc
->operands
[2];
9820 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9822 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9823 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9825 qp_changemask
= idesc
->operands
[1];
9826 qp_changemask
&= ~(valueT
) 0xFFFF;
9831 /* Always clear qp branch flags on any PR change. */
9832 /* FIXME there may be exceptions for certain compares. */
9833 clear_qp_branch_flag (qp_changemask
);
9835 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9836 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9838 qp_changemask
|= ~(valueT
) 0xFFFF;
9839 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9841 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9842 gr_values
[i
].known
= 0;
9844 clear_qp_mutex (qp_changemask
);
9845 clear_qp_implies (qp_changemask
, qp_changemask
);
9847 /* After a call, all register values are undefined, except those marked
9849 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9850 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9852 /* FIXME keep GR values which are marked as "safe_across_calls" */
9853 clear_register_values ();
9854 clear_qp_mutex (~qp_safe_across_calls
);
9855 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9856 clear_qp_branch_flag (~qp_safe_across_calls
);
9858 else if (is_interruption_or_rfi (idesc
)
9859 || is_taken_branch (idesc
))
9861 clear_register_values ();
9862 clear_qp_mutex (~(valueT
) 0);
9863 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9865 /* Look for mutex and implies relations. */
9866 else if ((idesc
->operands
[0] == IA64_OPND_P1
9867 || idesc
->operands
[0] == IA64_OPND_P2
)
9868 && (idesc
->operands
[1] == IA64_OPND_P1
9869 || idesc
->operands
[1] == IA64_OPND_P2
))
9871 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9872 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9873 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9874 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9876 /* If both PRs are PR0, we can't really do anything. */
9877 if (p1
== 0 && p2
== 0)
9880 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9882 /* In general, clear mutexes and implies which include P1 or P2,
9883 with the following exceptions. */
9884 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9885 || has_suffix_p (idesc
->name
, ".and.orcm"))
9887 clear_qp_implies (p2mask
, p1mask
);
9889 else if (has_suffix_p (idesc
->name
, ".andcm")
9890 || has_suffix_p (idesc
->name
, ".and"))
9892 clear_qp_implies (0, p1mask
| p2mask
);
9894 else if (has_suffix_p (idesc
->name
, ".orcm")
9895 || has_suffix_p (idesc
->name
, ".or"))
9897 clear_qp_mutex (p1mask
| p2mask
);
9898 clear_qp_implies (p1mask
| p2mask
, 0);
9904 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9906 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9907 if (p1
== 0 || p2
== 0)
9908 clear_qp_mutex (p1mask
| p2mask
);
9910 added
= update_qp_mutex (p1mask
| p2mask
);
9912 if (CURR_SLOT
.qp_regno
== 0
9913 || has_suffix_p (idesc
->name
, ".unc"))
9915 if (added
== 0 && p1
&& p2
)
9916 add_qp_mutex (p1mask
| p2mask
);
9917 if (CURR_SLOT
.qp_regno
!= 0)
9920 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9922 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9927 /* Look for mov imm insns into GRs. */
9928 else if (idesc
->operands
[0] == IA64_OPND_R1
9929 && (idesc
->operands
[1] == IA64_OPND_IMM22
9930 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9931 && CURR_SLOT
.opnd
[1].X_op
== O_constant
9932 && (strcmp (idesc
->name
, "mov") == 0
9933 || strcmp (idesc
->name
, "movl") == 0))
9935 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9936 if (regno
> 0 && regno
< NELEMS (gr_values
))
9938 gr_values
[regno
].known
= 1;
9939 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9940 gr_values
[regno
].path
= md
.path
;
9943 fprintf (stderr
, " Know gr%d = ", regno
);
9944 fprintf_vma (stderr
, gr_values
[regno
].value
);
9945 fputs ("\n", stderr
);
9949 /* Look for dep.z imm insns. */
9950 else if (idesc
->operands
[0] == IA64_OPND_R1
9951 && idesc
->operands
[1] == IA64_OPND_IMM8
9952 && strcmp (idesc
->name
, "dep.z") == 0)
9954 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9955 if (regno
> 0 && regno
< NELEMS (gr_values
))
9957 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
9959 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
9960 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
9961 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
9962 gr_values
[regno
].known
= 1;
9963 gr_values
[regno
].value
= value
;
9964 gr_values
[regno
].path
= md
.path
;
9967 fprintf (stderr
, " Know gr%d = ", regno
);
9968 fprintf_vma (stderr
, gr_values
[regno
].value
);
9969 fputs ("\n", stderr
);
9975 clear_qp_mutex (qp_changemask
);
9976 clear_qp_implies (qp_changemask
, qp_changemask
);
9980 /* Return whether the given predicate registers are currently mutex. */
9983 qp_mutex (int p1
, int p2
, int path
)
9990 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9991 for (i
= 0; i
< qp_mutexeslen
; i
++)
9993 if (qp_mutexes
[i
].path
>= path
9994 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
10001 /* Return whether the given resource is in the given insn's list of chks
10002 Return 1 if the conflict is absolutely determined, 2 if it's a potential
10006 resources_match (struct rsrc
*rs
,
10007 struct ia64_opcode
*idesc
,
10012 struct rsrc specs
[MAX_SPECS
];
10015 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10016 we don't need to check. One exception is note 11, which indicates that
10017 target predicates are written regardless of PR[qp]. */
10018 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
10022 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
10023 while (count
-- > 0)
10025 /* UNAT checking is a bit more specific than other resources */
10026 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
10027 && specs
[count
].mem_offset
.hint
10028 && rs
->mem_offset
.hint
)
10030 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
10032 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
10033 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
10040 /* Skip apparent PR write conflicts where both writes are an AND or both
10041 writes are an OR. */
10042 if (rs
->dependency
->specifier
== IA64_RS_PR
10043 || rs
->dependency
->specifier
== IA64_RS_PRr
10044 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10046 if (specs
[count
].cmp_type
!= CMP_NONE
10047 && specs
[count
].cmp_type
== rs
->cmp_type
)
10050 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10051 dv_mode
[rs
->dependency
->mode
],
10052 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10053 specs
[count
].index
: 63);
10058 " %s on parallel compare conflict %s vs %s on PR%d\n",
10059 dv_mode
[rs
->dependency
->mode
],
10060 dv_cmp_type
[rs
->cmp_type
],
10061 dv_cmp_type
[specs
[count
].cmp_type
],
10062 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10063 specs
[count
].index
: 63);
10067 /* If either resource is not specific, conservatively assume a conflict
10069 if (!specs
[count
].specific
|| !rs
->specific
)
10071 else if (specs
[count
].index
== rs
->index
)
10078 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10079 insert a stop to create the break. Update all resource dependencies
10080 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10081 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10082 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10086 insn_group_break (int insert_stop
, int qp_regno
, int save_current
)
10090 if (insert_stop
&& md
.num_slots_in_use
> 0)
10091 PREV_SLOT
.end_of_insn_group
= 1;
10095 fprintf (stderr
, " Insn group break%s",
10096 (insert_stop
? " (w/stop)" : ""));
10098 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10099 fprintf (stderr
, "\n");
10103 while (i
< regdepslen
)
10105 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10108 && regdeps
[i
].qp_regno
!= qp_regno
)
10115 && CURR_SLOT
.src_file
== regdeps
[i
].file
10116 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10122 /* clear dependencies which are automatically cleared by a stop, or
10123 those that have reached the appropriate state of insn serialization */
10124 if (dep
->semantics
== IA64_DVS_IMPLIED
10125 || dep
->semantics
== IA64_DVS_IMPLIEDF
10126 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10128 print_dependency ("Removing", i
);
10129 regdeps
[i
] = regdeps
[--regdepslen
];
10133 if (dep
->semantics
== IA64_DVS_DATA
10134 || dep
->semantics
== IA64_DVS_INSTR
10135 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10137 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10138 regdeps
[i
].insn_srlz
= STATE_STOP
;
10139 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10140 regdeps
[i
].data_srlz
= STATE_STOP
;
10147 /* Add the given resource usage spec to the list of active dependencies. */
10150 mark_resource (struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
,
10151 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
,
10156 if (regdepslen
== regdepstotlen
)
10158 regdepstotlen
+= 20;
10159 regdeps
= (struct rsrc
*)
10160 xrealloc ((void *) regdeps
,
10161 regdepstotlen
* sizeof (struct rsrc
));
10164 regdeps
[regdepslen
] = *spec
;
10165 regdeps
[regdepslen
].depind
= depind
;
10166 regdeps
[regdepslen
].path
= path
;
10167 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10168 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10170 print_dependency ("Adding", regdepslen
);
10176 print_dependency (const char *action
, int depind
)
10180 fprintf (stderr
, " %s %s '%s'",
10181 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10182 (regdeps
[depind
].dependency
)->name
);
10183 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10184 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10185 if (regdeps
[depind
].mem_offset
.hint
)
10187 fputs (" ", stderr
);
10188 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10189 fputs ("+", stderr
);
10190 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10192 fprintf (stderr
, "\n");
10197 instruction_serialization (void)
10201 fprintf (stderr
, " Instruction serialization\n");
10202 for (i
= 0; i
< regdepslen
; i
++)
10203 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10204 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10208 data_serialization (void)
10212 fprintf (stderr
, " Data serialization\n");
10213 while (i
< regdepslen
)
10215 if (regdeps
[i
].data_srlz
== STATE_STOP
10216 /* Note: as of 991210, all "other" dependencies are cleared by a
10217 data serialization. This might change with new tables */
10218 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10220 print_dependency ("Removing", i
);
10221 regdeps
[i
] = regdeps
[--regdepslen
];
10228 /* Insert stops and serializations as needed to avoid DVs. */
10231 remove_marked_resource (struct rsrc
*rs
)
10233 switch (rs
->dependency
->semantics
)
10235 case IA64_DVS_SPECIFIC
:
10237 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10238 /* ...fall through... */
10239 case IA64_DVS_INSTR
:
10241 fprintf (stderr
, "Inserting instr serialization\n");
10242 if (rs
->insn_srlz
< STATE_STOP
)
10243 insn_group_break (1, 0, 0);
10244 if (rs
->insn_srlz
< STATE_SRLZ
)
10246 struct slot oldslot
= CURR_SLOT
;
10247 /* Manually jam a srlz.i insn into the stream */
10248 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10249 CURR_SLOT
.user_template
= -1;
10250 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10251 instruction_serialization ();
10252 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10253 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10254 emit_one_bundle ();
10255 CURR_SLOT
= oldslot
;
10257 insn_group_break (1, 0, 0);
10259 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10260 "other" types of DV are eliminated
10261 by a data serialization */
10262 case IA64_DVS_DATA
:
10264 fprintf (stderr
, "Inserting data serialization\n");
10265 if (rs
->data_srlz
< STATE_STOP
)
10266 insn_group_break (1, 0, 0);
10268 struct slot oldslot
= CURR_SLOT
;
10269 /* Manually jam a srlz.d insn into the stream */
10270 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10271 CURR_SLOT
.user_template
= -1;
10272 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10273 data_serialization ();
10274 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10275 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10276 emit_one_bundle ();
10277 CURR_SLOT
= oldslot
;
10280 case IA64_DVS_IMPLIED
:
10281 case IA64_DVS_IMPLIEDF
:
10283 fprintf (stderr
, "Inserting stop\n");
10284 insn_group_break (1, 0, 0);
10291 /* Check the resources used by the given opcode against the current dependency
10294 The check is run once for each execution path encountered. In this case,
10295 a unique execution path is the sequence of instructions following a code
10296 entry point, e.g. the following has three execution paths, one starting
10297 at L0, one at L1, and one at L2.
10306 check_dependencies (struct ia64_opcode
*idesc
)
10308 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10312 /* Note that the number of marked resources may change within the
10313 loop if in auto mode. */
10315 while (i
< regdepslen
)
10317 struct rsrc
*rs
= ®deps
[i
];
10318 const struct ia64_dependency
*dep
= rs
->dependency
;
10321 int start_over
= 0;
10323 if (dep
->semantics
== IA64_DVS_NONE
10324 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10330 note
= NOTE (opdeps
->chks
[chkind
]);
10332 /* Check this resource against each execution path seen thus far. */
10333 for (path
= 0; path
<= md
.path
; path
++)
10337 /* If the dependency wasn't on the path being checked, ignore it. */
10338 if (rs
->path
< path
)
10341 /* If the QP for this insn implies a QP which has branched, don't
10342 bother checking. Ed. NOTE: I don't think this check is terribly
10343 useful; what's the point of generating code which will only be
10344 reached if its QP is zero?
10345 This code was specifically inserted to handle the following code,
10346 based on notes from Intel's DV checking code, where p1 implies p2.
10352 if (CURR_SLOT
.qp_regno
!= 0)
10356 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10358 if (qp_implies
[implies
].path
>= path
10359 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10360 && qp_implies
[implies
].p2_branched
)
10370 if ((matchtype
= resources_match (rs
, idesc
, note
,
10371 CURR_SLOT
.qp_regno
, path
)) != 0)
10374 char pathmsg
[256] = "";
10375 char indexmsg
[256] = "";
10376 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10379 snprintf (pathmsg
, sizeof (pathmsg
),
10380 " when entry is at label '%s'",
10381 md
.entry_labels
[path
- 1]);
10382 if (matchtype
== 1 && rs
->index
>= 0)
10383 snprintf (indexmsg
, sizeof (indexmsg
),
10384 ", specific resource number is %d",
10386 snprintf (msg
, sizeof (msg
),
10387 "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10389 (certain
? "violates" : "may violate"),
10390 dv_mode
[dep
->mode
], dep
->name
,
10391 dv_sem
[dep
->semantics
],
10392 pathmsg
, indexmsg
);
10394 if (md
.explicit_mode
)
10396 as_warn ("%s", msg
);
10397 if (path
< md
.path
)
10398 as_warn (_("Only the first path encountering the conflict is reported"));
10399 as_warn_where (rs
->file
, rs
->line
,
10400 _("This is the location of the conflicting usage"));
10401 /* Don't bother checking other paths, to avoid duplicating
10402 the same warning */
10408 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10410 remove_marked_resource (rs
);
10412 /* since the set of dependencies has changed, start over */
10413 /* FIXME -- since we're removing dvs as we go, we
10414 probably don't really need to start over... */
10427 /* Register new dependencies based on the given opcode. */
10430 mark_resources (struct ia64_opcode
*idesc
)
10433 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10434 int add_only_qp_reads
= 0;
10436 /* A conditional branch only uses its resources if it is taken; if it is
10437 taken, we stop following that path. The other branch types effectively
10438 *always* write their resources. If it's not taken, register only QP
10440 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10442 add_only_qp_reads
= 1;
10446 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10448 for (i
= 0; i
< opdeps
->nregs
; i
++)
10450 const struct ia64_dependency
*dep
;
10451 struct rsrc specs
[MAX_SPECS
];
10456 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10457 note
= NOTE (opdeps
->regs
[i
]);
10459 if (add_only_qp_reads
10460 && !(dep
->mode
== IA64_DV_WAR
10461 && (dep
->specifier
== IA64_RS_PR
10462 || dep
->specifier
== IA64_RS_PRr
10463 || dep
->specifier
== IA64_RS_PR63
)))
10466 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10468 while (count
-- > 0)
10470 mark_resource (idesc
, dep
, &specs
[count
],
10471 DEP (opdeps
->regs
[i
]), md
.path
);
10474 /* The execution path may affect register values, which may in turn
10475 affect which indirect-access resources are accessed. */
10476 switch (dep
->specifier
)
10480 case IA64_RS_CPUID
:
10488 for (path
= 0; path
< md
.path
; path
++)
10490 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10491 while (count
-- > 0)
10492 mark_resource (idesc
, dep
, &specs
[count
],
10493 DEP (opdeps
->regs
[i
]), path
);
10500 /* Remove dependencies when they no longer apply. */
10503 update_dependencies (struct ia64_opcode
*idesc
)
10507 if (strcmp (idesc
->name
, "srlz.i") == 0)
10509 instruction_serialization ();
10511 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10513 data_serialization ();
10515 else if (is_interruption_or_rfi (idesc
)
10516 || is_taken_branch (idesc
))
10518 /* Although technically the taken branch doesn't clear dependencies
10519 which require a srlz.[id], we don't follow the branch; the next
10520 instruction is assumed to start with a clean slate. */
10524 else if (is_conditional_branch (idesc
)
10525 && CURR_SLOT
.qp_regno
!= 0)
10527 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10529 for (i
= 0; i
< qp_implieslen
; i
++)
10531 /* If the conditional branch's predicate is implied by the predicate
10532 in an existing dependency, remove that dependency. */
10533 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10536 /* Note that this implied predicate takes a branch so that if
10537 a later insn generates a DV but its predicate implies this
10538 one, we can avoid the false DV warning. */
10539 qp_implies
[i
].p2_branched
= 1;
10540 while (depind
< regdepslen
)
10542 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10544 print_dependency ("Removing", depind
);
10545 regdeps
[depind
] = regdeps
[--regdepslen
];
10552 /* Any marked resources which have this same predicate should be
10553 cleared, provided that the QP hasn't been modified between the
10554 marking instruction and the branch. */
10557 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10562 while (i
< regdepslen
)
10564 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10565 && regdeps
[i
].link_to_qp_branch
10566 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10567 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10569 /* Treat like a taken branch */
10570 print_dependency ("Removing", i
);
10571 regdeps
[i
] = regdeps
[--regdepslen
];
10580 /* Examine the current instruction for dependency violations. */
10583 check_dv (struct ia64_opcode
*idesc
)
10587 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10588 idesc
->name
, CURR_SLOT
.src_line
,
10589 idesc
->dependencies
->nchks
,
10590 idesc
->dependencies
->nregs
);
10593 /* Look through the list of currently marked resources; if the current
10594 instruction has the dependency in its chks list which uses that resource,
10595 check against the specific resources used. */
10596 check_dependencies (idesc
);
10598 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10599 then add them to the list of marked resources. */
10600 mark_resources (idesc
);
10602 /* There are several types of dependency semantics, and each has its own
10603 requirements for being cleared
10605 Instruction serialization (insns separated by interruption, rfi, or
10606 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10608 Data serialization (instruction serialization, or writer + srlz.d +
10609 reader, where writer and srlz.d are in separate groups) clears
10610 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10611 always be the case).
10613 Instruction group break (groups separated by stop, taken branch,
10614 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10616 update_dependencies (idesc
);
10618 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10619 warning. Keep track of as many as possible that are useful. */
10620 note_register_values (idesc
);
10622 /* We don't need or want this anymore. */
10623 md
.mem_offset
.hint
= 0;
10628 /* Translate one line of assembly. Pseudo ops and labels do not show
10631 md_assemble (char *str
)
10633 char *saved_input_line_pointer
, *mnemonic
;
10634 const struct pseudo_opcode
*pdesc
;
10635 struct ia64_opcode
*idesc
;
10636 unsigned char qp_regno
;
10637 unsigned int flags
;
10640 saved_input_line_pointer
= input_line_pointer
;
10641 input_line_pointer
= str
;
10643 /* extract the opcode (mnemonic): */
10645 mnemonic
= input_line_pointer
;
10646 ch
= get_symbol_end ();
10647 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10650 *input_line_pointer
= ch
;
10651 (*pdesc
->handler
) (pdesc
->arg
);
10655 /* Find the instruction descriptor matching the arguments. */
10657 idesc
= ia64_find_opcode (mnemonic
);
10658 *input_line_pointer
= ch
;
10661 as_bad (_("Unknown opcode `%s'"), mnemonic
);
10665 idesc
= parse_operands (idesc
);
10669 /* Handle the dynamic ops we can handle now: */
10670 if (idesc
->type
== IA64_TYPE_DYN
)
10672 if (strcmp (idesc
->name
, "add") == 0)
10674 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10675 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10679 ia64_free_opcode (idesc
);
10680 idesc
= ia64_find_opcode (mnemonic
);
10682 else if (strcmp (idesc
->name
, "mov") == 0)
10684 enum ia64_opnd opnd1
, opnd2
;
10687 opnd1
= idesc
->operands
[0];
10688 opnd2
= idesc
->operands
[1];
10689 if (opnd1
== IA64_OPND_AR3
)
10691 else if (opnd2
== IA64_OPND_AR3
)
10695 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10697 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10698 mnemonic
= "mov.i";
10699 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10700 mnemonic
= "mov.m";
10708 ia64_free_opcode (idesc
);
10709 idesc
= ia64_find_opcode (mnemonic
);
10710 while (idesc
!= NULL
10711 && (idesc
->operands
[0] != opnd1
10712 || idesc
->operands
[1] != opnd2
))
10713 idesc
= get_next_opcode (idesc
);
10717 else if (strcmp (idesc
->name
, "mov.i") == 0
10718 || strcmp (idesc
->name
, "mov.m") == 0)
10720 enum ia64_opnd opnd1
, opnd2
;
10723 opnd1
= idesc
->operands
[0];
10724 opnd2
= idesc
->operands
[1];
10725 if (opnd1
== IA64_OPND_AR3
)
10727 else if (opnd2
== IA64_OPND_AR3
)
10731 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10734 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10736 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10738 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10739 as_bad (_("AR %d can only be accessed by %c-unit"),
10740 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10744 else if (strcmp (idesc
->name
, "hint.b") == 0)
10750 case hint_b_warning
:
10751 as_warn (_("hint.b may be treated as nop"));
10754 as_bad (_("hint.b shouldn't be used"));
10760 if (md
.qp
.X_op
== O_register
)
10762 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10763 md
.qp
.X_op
= O_absent
;
10766 flags
= idesc
->flags
;
10768 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10770 /* The alignment frag has to end with a stop bit only if the
10771 next instruction after the alignment directive has to be
10772 the first instruction in an instruction group. */
10775 while (align_frag
->fr_type
!= rs_align_code
)
10777 align_frag
= align_frag
->fr_next
;
10781 /* align_frag can be NULL if there are directives in
10783 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10784 align_frag
->tc_frag_data
= 1;
10787 insn_group_break (1, 0, 0);
10791 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10793 as_bad (_("`%s' cannot be predicated"), idesc
->name
);
10797 /* Build the instruction. */
10798 CURR_SLOT
.qp_regno
= qp_regno
;
10799 CURR_SLOT
.idesc
= idesc
;
10800 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10801 dwarf2_where (&CURR_SLOT
.debug_line
);
10802 dwarf2_consume_line_info ();
10804 /* Add unwind entries, if there are any. */
10805 if (unwind
.current_entry
)
10807 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10808 unwind
.current_entry
= NULL
;
10810 if (unwind
.pending_saves
)
10812 if (unwind
.pending_saves
->next
)
10814 /* Attach the next pending save to the next slot so that its
10815 slot number will get set correctly. */
10816 add_unwind_entry (unwind
.pending_saves
->next
, NOT_A_CHAR
);
10817 unwind
.pending_saves
= &unwind
.pending_saves
->next
->r
.record
.p
;
10820 unwind
.pending_saves
= NULL
;
10822 if (unwind
.proc_pending
.sym
&& S_IS_DEFINED (unwind
.proc_pending
.sym
))
10825 /* Check for dependency violations. */
10829 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10830 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10831 emit_one_bundle ();
10833 if ((flags
& IA64_OPCODE_LAST
) != 0)
10834 insn_group_break (1, 0, 0);
10836 md
.last_text_seg
= now_seg
;
10839 input_line_pointer
= saved_input_line_pointer
;
10842 /* Called when symbol NAME cannot be found in the symbol table.
10843 Should be used for dynamic valued symbols only. */
10846 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
10851 /* Called for any expression that can not be recognized. When the
10852 function is called, `input_line_pointer' will point to the start of
10856 md_operand (expressionS
*e
)
10858 switch (*input_line_pointer
)
10861 ++input_line_pointer
;
10862 expression_and_evaluate (e
);
10863 if (*input_line_pointer
!= ']')
10865 as_bad (_("Closing bracket missing"));
10870 if (e
->X_op
!= O_register
10871 || e
->X_add_number
< REG_GR
10872 || e
->X_add_number
> REG_GR
+ 127)
10874 as_bad (_("Index must be a general register"));
10875 e
->X_add_number
= REG_GR
;
10878 ++input_line_pointer
;
10889 ignore_rest_of_line ();
10892 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10893 a section symbol plus some offset. For relocs involving @fptr(),
10894 directives we don't want such adjustments since we need to have the
10895 original symbol's name in the reloc. */
10897 ia64_fix_adjustable (fixS
*fix
)
10899 /* Prevent all adjustments to global symbols */
10900 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10903 switch (fix
->fx_r_type
)
10905 case BFD_RELOC_IA64_FPTR64I
:
10906 case BFD_RELOC_IA64_FPTR32MSB
:
10907 case BFD_RELOC_IA64_FPTR32LSB
:
10908 case BFD_RELOC_IA64_FPTR64MSB
:
10909 case BFD_RELOC_IA64_FPTR64LSB
:
10910 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10911 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10921 ia64_force_relocation (fixS
*fix
)
10923 switch (fix
->fx_r_type
)
10925 case BFD_RELOC_IA64_FPTR64I
:
10926 case BFD_RELOC_IA64_FPTR32MSB
:
10927 case BFD_RELOC_IA64_FPTR32LSB
:
10928 case BFD_RELOC_IA64_FPTR64MSB
:
10929 case BFD_RELOC_IA64_FPTR64LSB
:
10931 case BFD_RELOC_IA64_LTOFF22
:
10932 case BFD_RELOC_IA64_LTOFF64I
:
10933 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10934 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10935 case BFD_RELOC_IA64_PLTOFF22
:
10936 case BFD_RELOC_IA64_PLTOFF64I
:
10937 case BFD_RELOC_IA64_PLTOFF64MSB
:
10938 case BFD_RELOC_IA64_PLTOFF64LSB
:
10940 case BFD_RELOC_IA64_LTOFF22X
:
10941 case BFD_RELOC_IA64_LDXMOV
:
10948 return generic_force_reloc (fix
);
10951 /* Decide from what point a pc-relative relocation is relative to,
10952 relative to the pc-relative fixup. Er, relatively speaking. */
10954 ia64_pcrel_from_section (fixS
*fix
, segT sec
)
10956 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10958 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10965 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10967 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10971 exp
.X_op
= O_pseudo_fixup
;
10972 exp
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10973 exp
.X_add_number
= 0;
10974 exp
.X_add_symbol
= symbol
;
10975 emit_expr (&exp
, size
);
10978 /* This is called whenever some data item (not an instruction) needs a
10979 fixup. We pick the right reloc code depending on the byteorder
10980 currently in effect. */
10982 ia64_cons_fix_new (fragS
*f
, int where
, int nbytes
, expressionS
*exp
)
10984 bfd_reloc_code_real_type code
;
10989 /* There are no reloc for 8 and 16 bit quantities, but we allow
10990 them here since they will work fine as long as the expression
10991 is fully defined at the end of the pass over the source file. */
10992 case 1: code
= BFD_RELOC_8
; break;
10993 case 2: code
= BFD_RELOC_16
; break;
10995 if (target_big_endian
)
10996 code
= BFD_RELOC_IA64_DIR32MSB
;
10998 code
= BFD_RELOC_IA64_DIR32LSB
;
11002 /* In 32-bit mode, data8 could mean function descriptors too. */
11003 if (exp
->X_op
== O_pseudo_fixup
11004 && exp
->X_op_symbol
11005 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
11006 && !(md
.flags
& EF_IA_64_ABI64
))
11008 if (target_big_endian
)
11009 code
= BFD_RELOC_IA64_IPLTMSB
;
11011 code
= BFD_RELOC_IA64_IPLTLSB
;
11012 exp
->X_op
= O_symbol
;
11017 if (target_big_endian
)
11018 code
= BFD_RELOC_IA64_DIR64MSB
;
11020 code
= BFD_RELOC_IA64_DIR64LSB
;
11025 if (exp
->X_op
== O_pseudo_fixup
11026 && exp
->X_op_symbol
11027 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
11029 if (target_big_endian
)
11030 code
= BFD_RELOC_IA64_IPLTMSB
;
11032 code
= BFD_RELOC_IA64_IPLTLSB
;
11033 exp
->X_op
= O_symbol
;
11039 as_bad (_("Unsupported fixup size %d"), nbytes
);
11040 ignore_rest_of_line ();
11044 if (exp
->X_op
== O_pseudo_fixup
)
11046 exp
->X_op
= O_symbol
;
11047 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11048 /* ??? If code unchanged, unsupported. */
11051 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11052 /* We need to store the byte order in effect in case we're going
11053 to fix an 8 or 16 bit relocation (for which there no real
11054 relocs available). See md_apply_fix(). */
11055 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11058 /* Return the actual relocation we wish to associate with the pseudo
11059 reloc described by SYM and R_TYPE. SYM should be one of the
11060 symbols in the pseudo_func array, or NULL. */
11062 static bfd_reloc_code_real_type
11063 ia64_gen_real_reloc_type (struct symbol
*sym
, bfd_reloc_code_real_type r_type
)
11065 bfd_reloc_code_real_type newr
= 0;
11066 const char *type
= NULL
, *suffix
= "";
11073 switch (S_GET_VALUE (sym
))
11075 case FUNC_FPTR_RELATIVE
:
11078 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_FPTR64I
; break;
11079 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_FPTR32MSB
; break;
11080 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_FPTR32LSB
; break;
11081 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_FPTR64MSB
; break;
11082 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_FPTR64LSB
; break;
11083 default: type
= "FPTR"; break;
11087 case FUNC_GP_RELATIVE
:
11090 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_GPREL22
; break;
11091 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_GPREL64I
; break;
11092 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_GPREL32MSB
; break;
11093 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_GPREL32LSB
; break;
11094 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_GPREL64MSB
; break;
11095 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_GPREL64LSB
; break;
11096 default: type
= "GPREL"; break;
11100 case FUNC_LT_RELATIVE
:
11103 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22
; break;
11104 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_LTOFF64I
; break;
11105 default: type
= "LTOFF"; break;
11109 case FUNC_LT_RELATIVE_X
:
11112 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22X
; break;
11113 default: type
= "LTOFF"; suffix
= "X"; break;
11117 case FUNC_PC_RELATIVE
:
11120 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PCREL22
; break;
11121 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PCREL64I
; break;
11122 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_PCREL32MSB
; break;
11123 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_PCREL32LSB
; break;
11124 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PCREL64MSB
; break;
11125 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PCREL64LSB
; break;
11126 default: type
= "PCREL"; break;
11130 case FUNC_PLT_RELATIVE
:
11133 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PLTOFF22
; break;
11134 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PLTOFF64I
; break;
11135 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PLTOFF64MSB
;break;
11136 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PLTOFF64LSB
;break;
11137 default: type
= "PLTOFF"; break;
11141 case FUNC_SEC_RELATIVE
:
11144 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SECREL32MSB
;break;
11145 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SECREL32LSB
;break;
11146 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SECREL64MSB
;break;
11147 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SECREL64LSB
;break;
11148 default: type
= "SECREL"; break;
11152 case FUNC_SEG_RELATIVE
:
11155 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SEGREL32MSB
;break;
11156 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SEGREL32LSB
;break;
11157 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SEGREL64MSB
;break;
11158 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SEGREL64LSB
;break;
11159 default: type
= "SEGREL"; break;
11163 case FUNC_LTV_RELATIVE
:
11166 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_LTV32MSB
; break;
11167 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_LTV32LSB
; break;
11168 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_LTV64MSB
; break;
11169 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_LTV64LSB
; break;
11170 default: type
= "LTV"; break;
11174 case FUNC_LT_FPTR_RELATIVE
:
11177 case BFD_RELOC_IA64_IMM22
:
11178 newr
= BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11179 case BFD_RELOC_IA64_IMM64
:
11180 newr
= BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11181 case BFD_RELOC_IA64_DIR32MSB
:
11182 newr
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11183 case BFD_RELOC_IA64_DIR32LSB
:
11184 newr
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11185 case BFD_RELOC_IA64_DIR64MSB
:
11186 newr
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11187 case BFD_RELOC_IA64_DIR64LSB
:
11188 newr
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11190 type
= "LTOFF_FPTR"; break;
11194 case FUNC_TP_RELATIVE
:
11197 case BFD_RELOC_IA64_IMM14
: newr
= BFD_RELOC_IA64_TPREL14
; break;
11198 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_TPREL22
; break;
11199 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_TPREL64I
; break;
11200 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_TPREL64MSB
; break;
11201 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_TPREL64LSB
; break;
11202 default: type
= "TPREL"; break;
11206 case FUNC_LT_TP_RELATIVE
:
11209 case BFD_RELOC_IA64_IMM22
:
11210 newr
= BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11212 type
= "LTOFF_TPREL"; break;
11216 case FUNC_DTP_MODULE
:
11219 case BFD_RELOC_IA64_DIR64MSB
:
11220 newr
= BFD_RELOC_IA64_DTPMOD64MSB
; break;
11221 case BFD_RELOC_IA64_DIR64LSB
:
11222 newr
= BFD_RELOC_IA64_DTPMOD64LSB
; break;
11224 type
= "DTPMOD"; break;
11228 case FUNC_LT_DTP_MODULE
:
11231 case BFD_RELOC_IA64_IMM22
:
11232 newr
= BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11234 type
= "LTOFF_DTPMOD"; break;
11238 case FUNC_DTP_RELATIVE
:
11241 case BFD_RELOC_IA64_DIR32MSB
:
11242 newr
= BFD_RELOC_IA64_DTPREL32MSB
; break;
11243 case BFD_RELOC_IA64_DIR32LSB
:
11244 newr
= BFD_RELOC_IA64_DTPREL32LSB
; break;
11245 case BFD_RELOC_IA64_DIR64MSB
:
11246 newr
= BFD_RELOC_IA64_DTPREL64MSB
; break;
11247 case BFD_RELOC_IA64_DIR64LSB
:
11248 newr
= BFD_RELOC_IA64_DTPREL64LSB
; break;
11249 case BFD_RELOC_IA64_IMM14
:
11250 newr
= BFD_RELOC_IA64_DTPREL14
; break;
11251 case BFD_RELOC_IA64_IMM22
:
11252 newr
= BFD_RELOC_IA64_DTPREL22
; break;
11253 case BFD_RELOC_IA64_IMM64
:
11254 newr
= BFD_RELOC_IA64_DTPREL64I
; break;
11256 type
= "DTPREL"; break;
11260 case FUNC_LT_DTP_RELATIVE
:
11263 case BFD_RELOC_IA64_IMM22
:
11264 newr
= BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11266 type
= "LTOFF_DTPREL"; break;
11270 case FUNC_IPLT_RELOC
:
11273 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11274 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11275 default: type
= "IPLT"; break;
11280 case FUNC_SLOTCOUNT_RELOC
:
11281 return DUMMY_RELOC_IA64_SLOTCOUNT
;
11298 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11299 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11300 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11301 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11302 case BFD_RELOC_UNUSED
: width
= 13; break;
11303 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11304 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11305 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11309 /* This should be an error, but since previously there wasn't any
11310 diagnostic here, don't make it fail because of this for now. */
11311 as_warn (_("Cannot express %s%d%s relocation"), type
, width
, suffix
);
11316 /* Here is where generate the appropriate reloc for pseudo relocation
11319 ia64_validate_fix (fixS
*fix
)
11321 switch (fix
->fx_r_type
)
11323 case BFD_RELOC_IA64_FPTR64I
:
11324 case BFD_RELOC_IA64_FPTR32MSB
:
11325 case BFD_RELOC_IA64_FPTR64LSB
:
11326 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11327 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11328 if (fix
->fx_offset
!= 0)
11329 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11330 _("No addend allowed in @fptr() relocation"));
11338 fix_insn (fixS
*fix
, const struct ia64_operand
*odesc
, valueT value
)
11340 bfd_vma insn
[3], t0
, t1
, control_bits
;
11345 slot
= fix
->fx_where
& 0x3;
11346 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11348 /* Bundles are always in little-endian byte order */
11349 t0
= bfd_getl64 (fixpos
);
11350 t1
= bfd_getl64 (fixpos
+ 8);
11351 control_bits
= t0
& 0x1f;
11352 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11353 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11354 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11357 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11359 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11360 insn
[2] |= (((value
& 0x7f) << 13)
11361 | (((value
>> 7) & 0x1ff) << 27)
11362 | (((value
>> 16) & 0x1f) << 22)
11363 | (((value
>> 21) & 0x1) << 21)
11364 | (((value
>> 63) & 0x1) << 36));
11366 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11368 if (value
& ~0x3fffffffffffffffULL
)
11369 err
= _("integer operand out of range");
11370 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11371 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11373 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11376 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11377 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11378 | (((value
>> 0) & 0xfffff) << 13));
11381 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11384 as_bad_where (fix
->fx_file
, fix
->fx_line
, "%s", err
);
11386 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11387 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11388 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11389 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11392 /* Attempt to simplify or even eliminate a fixup. The return value is
11393 ignored; perhaps it was once meaningful, but now it is historical.
11394 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11396 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11400 md_apply_fix (fixS
*fix
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
11403 valueT value
= *valP
;
11405 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11409 switch (fix
->fx_r_type
)
11411 case BFD_RELOC_IA64_PCREL21B
: break;
11412 case BFD_RELOC_IA64_PCREL21BI
: break;
11413 case BFD_RELOC_IA64_PCREL21F
: break;
11414 case BFD_RELOC_IA64_PCREL21M
: break;
11415 case BFD_RELOC_IA64_PCREL60B
: break;
11416 case BFD_RELOC_IA64_PCREL22
: break;
11417 case BFD_RELOC_IA64_PCREL64I
: break;
11418 case BFD_RELOC_IA64_PCREL32MSB
: break;
11419 case BFD_RELOC_IA64_PCREL32LSB
: break;
11420 case BFD_RELOC_IA64_PCREL64MSB
: break;
11421 case BFD_RELOC_IA64_PCREL64LSB
: break;
11423 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11430 switch ((unsigned) fix
->fx_r_type
)
11432 case BFD_RELOC_UNUSED
:
11433 /* This must be a TAG13 or TAG13b operand. There are no external
11434 relocs defined for them, so we must give an error. */
11435 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11436 _("%s must have a constant value"),
11437 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11441 case BFD_RELOC_IA64_TPREL14
:
11442 case BFD_RELOC_IA64_TPREL22
:
11443 case BFD_RELOC_IA64_TPREL64I
:
11444 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11445 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11446 case BFD_RELOC_IA64_DTPREL14
:
11447 case BFD_RELOC_IA64_DTPREL22
:
11448 case BFD_RELOC_IA64_DTPREL64I
:
11449 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11450 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11454 case DUMMY_RELOC_IA64_SLOTCOUNT
:
11455 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11456 _("cannot resolve @slotcount parameter"));
11465 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11468 if (fix
->fx_r_type
== DUMMY_RELOC_IA64_SLOTCOUNT
)
11470 /* For @slotcount, convert an addresses difference to a slots
11474 v
= (value
>> 4) * 3;
11475 switch (value
& 0x0f)
11489 as_bad (_("invalid @slotcount value"));
11495 if (fix
->tc_fix_data
.bigendian
)
11496 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11498 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11503 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11508 /* Generate the BFD reloc to be stuck in the object file from the
11509 fixup used internally in the assembler. */
11512 tc_gen_reloc (asection
*sec ATTRIBUTE_UNUSED
, fixS
*fixp
)
11516 reloc
= xmalloc (sizeof (*reloc
));
11517 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11518 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11519 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11520 reloc
->addend
= fixp
->fx_offset
;
11521 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11525 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11526 _("Cannot represent %s relocation in object file"),
11527 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11534 /* Turn a string in input_line_pointer into a floating point constant
11535 of type TYPE, and store the appropriate bytes in *LIT. The number
11536 of LITTLENUMS emitted is stored in *SIZE. An error message is
11537 returned, or NULL on OK. */
11539 #define MAX_LITTLENUMS 5
11542 md_atof (int type
, char *lit
, int *size
)
11544 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11574 return _("Unrecognized or unsupported floating point constant");
11576 t
= atof_ieee (input_line_pointer
, type
, words
);
11578 input_line_pointer
= t
;
11580 (*ia64_float_to_chars
) (lit
, words
, prec
);
11584 /* It is 10 byte floating point with 6 byte padding. */
11585 memset (&lit
[10], 0, 6);
11586 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11589 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11594 /* Handle ia64 specific semantics of the align directive. */
11597 ia64_md_do_align (int n ATTRIBUTE_UNUSED
,
11598 const char *fill ATTRIBUTE_UNUSED
,
11599 int len ATTRIBUTE_UNUSED
,
11600 int max ATTRIBUTE_UNUSED
)
11602 if (subseg_text_p (now_seg
))
11603 ia64_flush_insns ();
11606 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11607 of an rs_align_code fragment. */
11610 ia64_handle_align (fragS
*fragp
)
11614 const unsigned char *nop_type
;
11616 if (fragp
->fr_type
!= rs_align_code
)
11619 /* Check if this frag has to end with a stop bit. */
11620 nop_type
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11622 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11623 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11625 /* If no paddings are needed, we check if we need a stop bit. */
11626 if (!bytes
&& fragp
->tc_frag_data
)
11628 if (fragp
->fr_fix
< 16)
11630 /* FIXME: It won't work with
11632 alloc r32=ar.pfs,1,2,4,0
11636 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11637 _("Can't add stop bit to mark end of instruction group"));
11640 /* Bundles are always in little-endian byte order. Make sure
11641 the previous bundle has the stop bit. */
11645 /* Make sure we are on a 16-byte boundary, in case someone has been
11646 putting data into a text section. */
11649 int fix
= bytes
& 15;
11650 memset (p
, 0, fix
);
11653 fragp
->fr_fix
+= fix
;
11656 /* Instruction bundles are always little-endian. */
11657 memcpy (p
, nop_type
, 16);
11658 fragp
->fr_var
= 16;
11662 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11667 number_to_chars_bigendian (lit
, (long) (*words
++),
11668 sizeof (LITTLENUM_TYPE
));
11669 lit
+= sizeof (LITTLENUM_TYPE
);
11674 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11679 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11680 sizeof (LITTLENUM_TYPE
));
11681 lit
+= sizeof (LITTLENUM_TYPE
);
11686 ia64_elf_section_change_hook (void)
11688 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11689 && elf_linked_to_section (now_seg
) == NULL
)
11690 elf_linked_to_section (now_seg
) = text_section
;
11691 dot_byteorder (-1);
11694 /* Check if a label should be made global. */
11696 ia64_check_label (symbolS
*label
)
11698 if (*input_line_pointer
== ':')
11700 S_SET_EXTERNAL (label
);
11701 input_line_pointer
++;
11705 /* Used to remember where .alias and .secalias directives are seen. We
11706 will rename symbol and section names when we are about to output
11707 the relocatable file. */
11710 char *file
; /* The file where the directive is seen. */
11711 unsigned int line
; /* The line number the directive is at. */
11712 const char *name
; /* The original name of the symbol. */
11715 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11716 .secalias. Otherwise, it is .alias. */
11718 dot_alias (int section
)
11720 char *name
, *alias
;
11724 const char *error_string
;
11727 struct hash_control
*ahash
, *nhash
;
11730 name
= input_line_pointer
;
11731 delim
= get_symbol_end ();
11732 end_name
= input_line_pointer
;
11735 if (name
== end_name
)
11737 as_bad (_("expected symbol name"));
11738 ignore_rest_of_line ();
11742 SKIP_WHITESPACE ();
11744 if (*input_line_pointer
!= ',')
11747 as_bad (_("expected comma after \"%s\""), name
);
11749 ignore_rest_of_line ();
11753 input_line_pointer
++;
11755 ia64_canonicalize_symbol_name (name
);
11757 /* We call demand_copy_C_string to check if alias string is valid.
11758 There should be a closing `"' and no `\0' in the string. */
11759 alias
= demand_copy_C_string (&len
);
11762 ignore_rest_of_line ();
11766 /* Make a copy of name string. */
11767 len
= strlen (name
) + 1;
11768 obstack_grow (¬es
, name
, len
);
11769 name
= obstack_finish (¬es
);
11774 ahash
= secalias_hash
;
11775 nhash
= secalias_name_hash
;
11780 ahash
= alias_hash
;
11781 nhash
= alias_name_hash
;
11784 /* Check if alias has been used before. */
11785 h
= (struct alias
*) hash_find (ahash
, alias
);
11788 if (strcmp (h
->name
, name
))
11789 as_bad (_("`%s' is already the alias of %s `%s'"),
11790 alias
, kind
, h
->name
);
11794 /* Check if name already has an alias. */
11795 a
= (const char *) hash_find (nhash
, name
);
11798 if (strcmp (a
, alias
))
11799 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11803 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11804 as_where (&h
->file
, &h
->line
);
11807 error_string
= hash_jam (ahash
, alias
, (void *) h
);
11810 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11811 alias
, kind
, error_string
);
11815 error_string
= hash_jam (nhash
, name
, (void *) alias
);
11818 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11819 alias
, kind
, error_string
);
11821 obstack_free (¬es
, name
);
11822 obstack_free (¬es
, alias
);
11825 demand_empty_rest_of_line ();
11828 /* It renames the original symbol name to its alias. */
11830 do_alias (const char *alias
, void *value
)
11832 struct alias
*h
= (struct alias
*) value
;
11833 symbolS
*sym
= symbol_find (h
->name
);
11838 /* Uses .alias extensively to alias CRTL functions to same with
11839 decc$ prefix. Sometimes function gets optimized away and a
11840 warning results, which should be suppressed. */
11841 if (strncmp (alias
, "decc$", 5) != 0)
11843 as_warn_where (h
->file
, h
->line
,
11844 _("symbol `%s' aliased to `%s' is not used"),
11848 S_SET_NAME (sym
, (char *) alias
);
11851 /* Called from write_object_file. */
11853 ia64_adjust_symtab (void)
11855 hash_traverse (alias_hash
, do_alias
);
11858 /* It renames the original section name to its alias. */
11860 do_secalias (const char *alias
, void *value
)
11862 struct alias
*h
= (struct alias
*) value
;
11863 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11866 as_warn_where (h
->file
, h
->line
,
11867 _("section `%s' aliased to `%s' is not used"),
11873 /* Called from write_object_file. */
11875 ia64_frob_file (void)
11877 hash_traverse (secalias_hash
, do_secalias
);
11881 #define NT_VMS_MHD 1
11882 #define NT_VMS_LNM 2
11884 /* Integrity VMS 8.x identifies it's ELF modules with a standard ELF
11887 /* Manufacture a VMS-like time string. */
11889 get_vms_time (char *Now
)
11895 pnt
= ctime (&timeb
);
11901 sprintf (Now
, "%2s-%3s-%s %s", pnt
+ 8, pnt
+ 4, pnt
+ 20, pnt
+ 11);
11905 ia64_vms_note (void)
11908 asection
*seg
= now_seg
;
11909 subsegT subseg
= now_subseg
;
11910 asection
*secp
= NULL
;
11915 /* Create the .note section. */
11917 secp
= subseg_new (".note", 0);
11918 bfd_set_section_flags (stdoutput
,
11920 SEC_HAS_CONTENTS
| SEC_READONLY
);
11922 /* Module header note (MHD). */
11923 bname
= xstrdup (lbasename (out_file_name
));
11924 if ((p
= strrchr (bname
, '.')))
11927 /* VMS note header is 24 bytes long. */
11928 p
= frag_more (8 + 8 + 8);
11929 number_to_chars_littleendian (p
+ 0, 8, 8);
11930 number_to_chars_littleendian (p
+ 8, 40 + strlen (bname
), 8);
11931 number_to_chars_littleendian (p
+ 16, NT_VMS_MHD
, 8);
11934 strcpy (p
, "IPF/VMS");
11936 p
= frag_more (17 + 17 + strlen (bname
) + 1 + 5);
11938 strcpy (p
+ 17, "24-FEB-2005 15:00");
11941 p
+= strlen (bname
) + 1;
11943 strcpy (p
, "V1.0");
11945 frag_align (3, 0, 0);
11947 /* Language processor name note. */
11948 sprintf (buf
, "GNU assembler version %s (%s) using BFD version %s",
11949 VERSION
, TARGET_ALIAS
, BFD_VERSION_STRING
);
11951 p
= frag_more (8 + 8 + 8);
11952 number_to_chars_littleendian (p
+ 0, 8, 8);
11953 number_to_chars_littleendian (p
+ 8, strlen (buf
) + 1, 8);
11954 number_to_chars_littleendian (p
+ 16, NT_VMS_LNM
, 8);
11957 strcpy (p
, "IPF/VMS");
11959 p
= frag_more (strlen (buf
) + 1);
11962 frag_align (3, 0, 0);
11964 secp
= subseg_new (".vms_display_name_info", 0);
11965 bfd_set_section_flags (stdoutput
,
11967 SEC_HAS_CONTENTS
| SEC_READONLY
);
11969 /* This symbol should be passed on the command line and be variable
11970 according to language. */
11971 sym
= symbol_new ("__gnat_vms_display_name@gnat_demangler_rtl",
11972 absolute_section
, 0, &zero_address_frag
);
11973 symbol_table_insert (sym
);
11974 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
| BSF_DYNAMIC
;
11977 /* Format 3 of VMS demangler Spec. */
11978 number_to_chars_littleendian (p
, 3, 4);
11981 /* Place holder for symbol table index of above symbol. */
11982 number_to_chars_littleendian (p
, -1, 4);
11984 frag_align (3, 0, 0);
11986 /* We probably can't restore the current segment, for there likely
11987 isn't one yet... */
11989 subseg_set (seg
, subseg
);
11992 #endif /* TE_VMS */