1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
53 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
54 #define MIN(a,b) ((a) < (b) ? (a) : (b))
57 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
58 #define CURR_SLOT md.slot[md.curr_slot]
60 #define O_pseudo_fixup (O_max + 1)
64 /* IA-64 ABI section pseudo-ops. */
65 SPECIAL_SECTION_BSS
= 0,
67 SPECIAL_SECTION_SDATA
,
68 SPECIAL_SECTION_RODATA
,
69 SPECIAL_SECTION_COMMENT
,
70 SPECIAL_SECTION_UNWIND
,
71 SPECIAL_SECTION_UNWIND_INFO
,
72 /* HPUX specific section pseudo-ops. */
73 SPECIAL_SECTION_INIT_ARRAY
,
74 SPECIAL_SECTION_FINI_ARRAY
,
91 FUNC_LT_FPTR_RELATIVE
,
101 REG_FR
= (REG_GR
+ 128),
102 REG_AR
= (REG_FR
+ 128),
103 REG_CR
= (REG_AR
+ 128),
104 REG_P
= (REG_CR
+ 128),
105 REG_BR
= (REG_P
+ 64),
106 REG_IP
= (REG_BR
+ 8),
113 /* The following are pseudo-registers for use by gas only. */
125 /* The following pseudo-registers are used for unwind directives only: */
133 DYNREG_GR
= 0, /* dynamic general purpose register */
134 DYNREG_FR
, /* dynamic floating point register */
135 DYNREG_PR
, /* dynamic predicate register */
139 enum operand_match_result
142 OPERAND_OUT_OF_RANGE
,
146 /* On the ia64, we can't know the address of a text label until the
147 instructions are packed into a bundle. To handle this, we keep
148 track of the list of labels that appear in front of each
152 struct label_fix
*next
;
156 extern int target_big_endian
;
158 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
160 static void ia64_float_to_chars_bigendian
161 PARAMS ((char *, LITTLENUM_TYPE
*, int));
162 static void ia64_float_to_chars_littleendian
163 PARAMS ((char *, LITTLENUM_TYPE
*, int));
164 static void (*ia64_float_to_chars
)
165 PARAMS ((char *, LITTLENUM_TYPE
*, int));
167 static struct hash_control
*alias_hash
;
168 static struct hash_control
*alias_name_hash
;
169 static struct hash_control
*secalias_hash
;
170 static struct hash_control
*secalias_name_hash
;
172 /* Characters which always start a comment. */
173 const char comment_chars
[] = "";
175 /* Characters which start a comment at the beginning of a line. */
176 const char line_comment_chars
[] = "#";
178 /* Characters which may be used to separate multiple commands on a
180 const char line_separator_chars
[] = ";";
182 /* Characters which are used to indicate an exponent in a floating
184 const char EXP_CHARS
[] = "eE";
186 /* Characters which mean that a number is a floating point constant,
188 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
190 /* ia64-specific option processing: */
192 const char *md_shortopts
= "m:N:x::";
194 struct option md_longopts
[] =
196 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
197 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
198 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
199 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
202 size_t md_longopts_size
= sizeof (md_longopts
);
206 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
207 struct hash_control
*reg_hash
; /* register name hash table */
208 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
209 struct hash_control
*const_hash
; /* constant hash table */
210 struct hash_control
*entry_hash
; /* code entry hint hash table */
212 symbolS
*regsym
[REG_NUM
];
214 /* If X_op is != O_absent, the registername for the instruction's
215 qualifying predicate. If NULL, p0 is assumed for instructions
216 that are predicatable. */
223 explicit_mode
: 1, /* which mode we're in */
224 default_explicit_mode
: 1, /* which mode is the default */
225 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
227 keep_pending_output
: 1;
229 /* Each bundle consists of up to three instructions. We keep
230 track of four most recent instructions so we can correctly set
231 the end_of_insn_group for the last instruction in a bundle. */
233 int num_slots_in_use
;
237 end_of_insn_group
: 1,
238 manual_bundling_on
: 1,
239 manual_bundling_off
: 1;
240 signed char user_template
; /* user-selected template, if any */
241 unsigned char qp_regno
; /* qualifying predicate */
242 /* This duplicates a good fraction of "struct fix" but we
243 can't use a "struct fix" instead since we can't call
244 fix_new_exp() until we know the address of the instruction. */
248 bfd_reloc_code_real_type code
;
249 enum ia64_opnd opnd
; /* type of operand in need of fix */
250 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
251 expressionS expr
; /* the value to be inserted */
253 fixup
[2]; /* at most two fixups per insn */
254 struct ia64_opcode
*idesc
;
255 struct label_fix
*label_fixups
;
256 struct label_fix
*tag_fixups
;
257 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
260 unsigned int src_line
;
261 struct dwarf2_line_info debug_line
;
269 struct dynreg
*next
; /* next dynamic register */
271 unsigned short base
; /* the base register number */
272 unsigned short num_regs
; /* # of registers in this set */
274 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
276 flagword flags
; /* ELF-header flags */
279 unsigned hint
:1; /* is this hint currently valid? */
280 bfd_vma offset
; /* mem.offset offset */
281 bfd_vma base
; /* mem.offset base */
284 int path
; /* number of alt. entry points seen */
285 const char **entry_labels
; /* labels of all alternate paths in
286 the current DV-checking block. */
287 int maxpaths
; /* size currently allocated for
289 /* Support for hardware errata workarounds. */
291 /* Record data about the last three insn groups. */
294 /* B-step workaround.
295 For each predicate register, this is set if the corresponding insn
296 group conditionally sets this register with one of the affected
299 /* B-step workaround.
300 For each general register, this is set if the corresponding insn
301 a) is conditional one one of the predicate registers for which
302 P_REG_SET is 1 in the corresponding entry of the previous group,
303 b) sets this general register with one of the affected
305 int g_reg_set_conditionally
[128];
309 int pointer_size
; /* size in bytes of a pointer */
310 int pointer_size_shift
; /* shift size of a pointer for alignment */
314 /* application registers: */
320 #define AR_BSPSTORE 18
335 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
336 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
337 {"ar.rsc", 16}, {"ar.bsp", 17},
338 {"ar.bspstore", 18}, {"ar.rnat", 19},
339 {"ar.fcr", 21}, {"ar.eflag", 24},
340 {"ar.csd", 25}, {"ar.ssd", 26},
341 {"ar.cflg", 27}, {"ar.fsr", 28},
342 {"ar.fir", 29}, {"ar.fdr", 30},
343 {"ar.ccv", 32}, {"ar.unat", 36},
344 {"ar.fpsr", 40}, {"ar.itc", 44},
345 {"ar.pfs", 64}, {"ar.lc", 65},
366 /* control registers: */
408 static const struct const_desc
415 /* PSR constant masks: */
418 {"psr.be", ((valueT
) 1) << 1},
419 {"psr.up", ((valueT
) 1) << 2},
420 {"psr.ac", ((valueT
) 1) << 3},
421 {"psr.mfl", ((valueT
) 1) << 4},
422 {"psr.mfh", ((valueT
) 1) << 5},
424 {"psr.ic", ((valueT
) 1) << 13},
425 {"psr.i", ((valueT
) 1) << 14},
426 {"psr.pk", ((valueT
) 1) << 15},
428 {"psr.dt", ((valueT
) 1) << 17},
429 {"psr.dfl", ((valueT
) 1) << 18},
430 {"psr.dfh", ((valueT
) 1) << 19},
431 {"psr.sp", ((valueT
) 1) << 20},
432 {"psr.pp", ((valueT
) 1) << 21},
433 {"psr.di", ((valueT
) 1) << 22},
434 {"psr.si", ((valueT
) 1) << 23},
435 {"psr.db", ((valueT
) 1) << 24},
436 {"psr.lp", ((valueT
) 1) << 25},
437 {"psr.tb", ((valueT
) 1) << 26},
438 {"psr.rt", ((valueT
) 1) << 27},
439 /* 28-31: reserved */
440 /* 32-33: cpl (current privilege level) */
441 {"psr.is", ((valueT
) 1) << 34},
442 {"psr.mc", ((valueT
) 1) << 35},
443 {"psr.it", ((valueT
) 1) << 36},
444 {"psr.id", ((valueT
) 1) << 37},
445 {"psr.da", ((valueT
) 1) << 38},
446 {"psr.dd", ((valueT
) 1) << 39},
447 {"psr.ss", ((valueT
) 1) << 40},
448 /* 41-42: ri (restart instruction) */
449 {"psr.ed", ((valueT
) 1) << 43},
450 {"psr.bn", ((valueT
) 1) << 44},
453 /* indirect register-sets/memory: */
462 { "CPUID", IND_CPUID
},
463 { "cpuid", IND_CPUID
},
475 /* Pseudo functions used to indicate relocation types (these functions
476 start with an at sign (@). */
498 /* reloc pseudo functions (these must come first!): */
499 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
500 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
501 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
502 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
503 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
504 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
505 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
506 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
507 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
508 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
509 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
510 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
511 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
512 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
513 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
514 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
515 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
517 /* mbtype4 constants: */
518 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
519 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
520 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
521 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
522 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
524 /* fclass constants: */
525 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
526 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
527 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
528 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
529 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
530 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
531 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
532 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
533 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
535 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
537 /* hint constants: */
538 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
540 /* unwind-related constants: */
541 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
542 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
543 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
544 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
545 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
546 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
547 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
549 /* unwind-related registers: */
550 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
553 /* 41-bit nop opcodes (one per unit): */
554 static const bfd_vma nop
[IA64_NUM_UNITS
] =
556 0x0000000000LL
, /* NIL => break 0 */
557 0x0008000000LL
, /* I-unit nop */
558 0x0008000000LL
, /* M-unit nop */
559 0x4000000000LL
, /* B-unit nop */
560 0x0008000000LL
, /* F-unit nop */
561 0x0008000000LL
, /* L-"unit" nop */
562 0x0008000000LL
, /* X-unit nop */
565 /* Can't be `const' as it's passed to input routines (which have the
566 habit of setting temporary sentinels. */
567 static char special_section_name
[][20] =
569 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
570 {".IA_64.unwind"}, {".IA_64.unwind_info"},
571 {".init_array"}, {".fini_array"}
574 static char *special_linkonce_name
[] =
576 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
579 /* The best template for a particular sequence of up to three
581 #define N IA64_NUM_TYPES
582 static unsigned char best_template
[N
][N
][N
];
585 /* Resource dependencies currently in effect */
587 int depind
; /* dependency index */
588 const struct ia64_dependency
*dependency
; /* actual dependency */
589 unsigned specific
:1, /* is this a specific bit/regno? */
590 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
591 int index
; /* specific regno/bit within dependency */
592 int note
; /* optional qualifying note (0 if none) */
596 int insn_srlz
; /* current insn serialization state */
597 int data_srlz
; /* current data serialization state */
598 int qp_regno
; /* qualifying predicate for this usage */
599 char *file
; /* what file marked this dependency */
600 unsigned int line
; /* what line marked this dependency */
601 struct mem_offset mem_offset
; /* optional memory offset hint */
602 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
603 int path
; /* corresponding code entry index */
605 static int regdepslen
= 0;
606 static int regdepstotlen
= 0;
607 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
608 static const char *dv_sem
[] = { "none", "implied", "impliedf",
609 "data", "instr", "specific", "stop", "other" };
610 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
612 /* Current state of PR mutexation */
613 static struct qpmutex
{
616 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
617 static int qp_mutexeslen
= 0;
618 static int qp_mutexestotlen
= 0;
619 static valueT qp_safe_across_calls
= 0;
621 /* Current state of PR implications */
622 static struct qp_imply
{
625 unsigned p2_branched
:1;
627 } *qp_implies
= NULL
;
628 static int qp_implieslen
= 0;
629 static int qp_impliestotlen
= 0;
631 /* Keep track of static GR values so that indirect register usage can
632 sometimes be tracked. */
637 } gr_values
[128] = {{ 1, 0, 0 }};
639 /* These are the routines required to output the various types of
642 /* A slot_number is a frag address plus the slot index (0-2). We use the
643 frag address here so that if there is a section switch in the middle of
644 a function, then instructions emitted to a different section are not
645 counted. Since there may be more than one frag for a function, this
646 means we also need to keep track of which frag this address belongs to
647 so we can compute inter-frag distances. This also nicely solves the
648 problem with nops emitted for align directives, which can't easily be
649 counted, but can easily be derived from frag sizes. */
651 typedef struct unw_rec_list
{
653 unsigned long slot_number
;
655 unsigned long next_slot_number
;
656 fragS
*next_slot_frag
;
657 struct unw_rec_list
*next
;
660 #define SLOT_NUM_NOT_SET (unsigned)-1
662 /* Linked list of saved prologue counts. A very poor
663 implementation of a map from label numbers to prologue counts. */
664 typedef struct label_prologue_count
666 struct label_prologue_count
*next
;
667 unsigned long label_number
;
668 unsigned int prologue_count
;
669 } label_prologue_count
;
673 /* Maintain a list of unwind entries for the current function. */
677 /* Any unwind entires that should be attached to the current slot
678 that an insn is being constructed for. */
679 unw_rec_list
*current_entry
;
681 /* These are used to create the unwind table entry for this function. */
684 symbolS
*info
; /* pointer to unwind info */
685 symbolS
*personality_routine
;
687 subsegT saved_text_subseg
;
688 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
690 /* TRUE if processing unwind directives in a prologue region. */
693 unsigned int prologue_count
; /* number of .prologues seen so far */
694 /* Prologue counts at previous .label_state directives. */
695 struct label_prologue_count
* saved_prologue_counts
;
698 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
700 /* Forward declarations: */
701 static int ar_is_in_integer_unit
PARAMS ((int regnum
));
702 static void set_section
PARAMS ((char *name
));
703 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
704 unsigned int, unsigned int));
705 static void dot_radix
PARAMS ((int));
706 static void dot_special_section
PARAMS ((int));
707 static void dot_proc
PARAMS ((int));
708 static void dot_fframe
PARAMS ((int));
709 static void dot_vframe
PARAMS ((int));
710 static void dot_vframesp
PARAMS ((int));
711 static void dot_vframepsp
PARAMS ((int));
712 static void dot_save
PARAMS ((int));
713 static void dot_restore
PARAMS ((int));
714 static void dot_restorereg
PARAMS ((int));
715 static void dot_restorereg_p
PARAMS ((int));
716 static void dot_handlerdata
PARAMS ((int));
717 static void dot_unwentry
PARAMS ((int));
718 static void dot_altrp
PARAMS ((int));
719 static void dot_savemem
PARAMS ((int));
720 static void dot_saveg
PARAMS ((int));
721 static void dot_savef
PARAMS ((int));
722 static void dot_saveb
PARAMS ((int));
723 static void dot_savegf
PARAMS ((int));
724 static void dot_spill
PARAMS ((int));
725 static void dot_spillreg
PARAMS ((int));
726 static void dot_spillmem
PARAMS ((int));
727 static void dot_spillreg_p
PARAMS ((int));
728 static void dot_spillmem_p
PARAMS ((int));
729 static void dot_label_state
PARAMS ((int));
730 static void dot_copy_state
PARAMS ((int));
731 static void dot_unwabi
PARAMS ((int));
732 static void dot_personality
PARAMS ((int));
733 static void dot_body
PARAMS ((int));
734 static void dot_prologue
PARAMS ((int));
735 static void dot_endp
PARAMS ((int));
736 static void dot_template
PARAMS ((int));
737 static void dot_regstk
PARAMS ((int));
738 static void dot_rot
PARAMS ((int));
739 static void dot_byteorder
PARAMS ((int));
740 static void dot_psr
PARAMS ((int));
741 static void dot_alias
PARAMS ((int));
742 static void dot_ln
PARAMS ((int));
743 static char *parse_section_name
PARAMS ((void));
744 static void dot_xdata
PARAMS ((int));
745 static void stmt_float_cons
PARAMS ((int));
746 static void stmt_cons_ua
PARAMS ((int));
747 static void dot_xfloat_cons
PARAMS ((int));
748 static void dot_xstringer
PARAMS ((int));
749 static void dot_xdata_ua
PARAMS ((int));
750 static void dot_xfloat_cons_ua
PARAMS ((int));
751 static void print_prmask
PARAMS ((valueT mask
));
752 static void dot_pred_rel
PARAMS ((int));
753 static void dot_reg_val
PARAMS ((int));
754 static void dot_dv_mode
PARAMS ((int));
755 static void dot_entry
PARAMS ((int));
756 static void dot_mem_offset
PARAMS ((int));
757 static void add_unwind_entry
PARAMS((unw_rec_list
*ptr
));
758 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
759 static void declare_register_set
PARAMS ((const char *, int, int));
760 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
761 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
764 static int parse_operand
PARAMS ((expressionS
*e
));
765 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
766 static int errata_nop_necessary_p
PARAMS ((struct slot
*, enum ia64_unit
));
767 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
768 static void emit_one_bundle
PARAMS ((void));
769 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
770 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
771 bfd_reloc_code_real_type r_type
));
772 static void insn_group_break
PARAMS ((int, int, int));
773 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
774 struct rsrc
*, int depind
, int path
));
775 static void add_qp_mutex
PARAMS((valueT mask
));
776 static void add_qp_imply
PARAMS((int p1
, int p2
));
777 static void clear_qp_branch_flag
PARAMS((valueT mask
));
778 static void clear_qp_mutex
PARAMS((valueT mask
));
779 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
780 static int has_suffix_p
PARAMS((const char *, const char *));
781 static void clear_register_values
PARAMS ((void));
782 static void print_dependency
PARAMS ((const char *action
, int depind
));
783 static void instruction_serialization
PARAMS ((void));
784 static void data_serialization
PARAMS ((void));
785 static void remove_marked_resource
PARAMS ((struct rsrc
*));
786 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
787 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
788 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
789 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
790 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
791 struct ia64_opcode
*, int, struct rsrc
[], int, int));
792 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
793 static void check_dependencies
PARAMS((struct ia64_opcode
*));
794 static void mark_resources
PARAMS((struct ia64_opcode
*));
795 static void update_dependencies
PARAMS((struct ia64_opcode
*));
796 static void note_register_values
PARAMS((struct ia64_opcode
*));
797 static int qp_mutex
PARAMS ((int, int, int));
798 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
799 static void output_vbyte_mem
PARAMS ((int, char *, char *));
800 static void count_output
PARAMS ((int, char *, char *));
801 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
802 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
803 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
804 static void output_P1_format
PARAMS ((vbyte_func
, int));
805 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
806 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
807 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
808 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
809 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
810 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
811 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
812 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
813 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
814 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
815 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
816 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
817 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
818 static char format_ab_reg
PARAMS ((int, int));
819 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
821 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
822 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
824 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
825 static unw_rec_list
*output_endp
PARAMS ((void));
826 static unw_rec_list
*output_prologue
PARAMS ((void));
827 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
828 static unw_rec_list
*output_body
PARAMS ((void));
829 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
830 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
831 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
832 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
833 static unw_rec_list
*output_rp_when
PARAMS ((void));
834 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
835 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
836 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
837 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
838 static unw_rec_list
*output_pfs_when
PARAMS ((void));
839 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
840 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
841 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
842 static unw_rec_list
*output_preds_when
PARAMS ((void));
843 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
844 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
845 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
846 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
847 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
848 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
849 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
850 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
851 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
852 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
853 static unw_rec_list
*output_unat_when
PARAMS ((void));
854 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
855 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
856 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
857 static unw_rec_list
*output_lc_when
PARAMS ((void));
858 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
859 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
860 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
861 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
862 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
863 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
864 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
865 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
866 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
867 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
868 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
869 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
870 static unw_rec_list
*output_bsp_when
PARAMS ((void));
871 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
872 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
873 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
874 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
875 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
876 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
877 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
878 static unw_rec_list
*output_rnat_when
PARAMS ((void));
879 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
880 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
881 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
882 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
883 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
884 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
885 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
886 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int));
887 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int));
888 static unw_rec_list
*output_spill_psprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
890 static unw_rec_list
*output_spill_sprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
892 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
894 static unw_rec_list
*output_spill_reg_p
PARAMS ((unsigned int, unsigned int, unsigned int,
895 unsigned int, unsigned int));
896 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
897 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
898 static int calc_record_size
PARAMS ((unw_rec_list
*));
899 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
900 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
901 unsigned long, fragS
*));
902 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
903 static void fixup_unw_records
PARAMS ((unw_rec_list
*));
904 static int convert_expr_to_ab_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
905 static int convert_expr_to_xy_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
906 static void generate_unwind_image
PARAMS ((const char *));
907 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
908 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
909 static void free_saved_prologue_counts
PARAMS ((void));
911 /* Build the unwind section name by appending the (possibly stripped)
912 text section NAME to the unwind PREFIX. The resulting string
913 pointer is assigned to RESULT. The string is allocated on the
914 stack, so this must be a macro... */
915 #define make_unw_section_name(special, text_name, result) \
917 const char *_prefix = special_section_name[special]; \
918 const char *_suffix = text_name; \
919 size_t _prefix_len, _suffix_len; \
921 if (strncmp (text_name, ".gnu.linkonce.t.", \
922 sizeof (".gnu.linkonce.t.") - 1) == 0) \
924 _prefix = special_linkonce_name[special - SPECIAL_SECTION_UNWIND]; \
925 _suffix += sizeof (".gnu.linkonce.t.") - 1; \
927 _prefix_len = strlen (_prefix), _suffix_len = strlen (_suffix); \
928 _result = alloca (_prefix_len + _suffix_len + 1); \
929 memcpy (_result, _prefix, _prefix_len); \
930 memcpy (_result + _prefix_len, _suffix, _suffix_len); \
931 _result[_prefix_len + _suffix_len] = '\0'; \
936 /* Determine if application register REGNUM resides in the integer
937 unit (as opposed to the memory unit). */
939 ar_is_in_integer_unit (reg
)
944 return (reg
== 64 /* pfs */
945 || reg
== 65 /* lc */
946 || reg
== 66 /* ec */
947 /* ??? ias accepts and puts these in the integer unit. */
948 || (reg
>= 112 && reg
<= 127));
951 /* Switch to section NAME and create section if necessary. It's
952 rather ugly that we have to manipulate input_line_pointer but I
953 don't see any other way to accomplish the same thing without
954 changing obj-elf.c (which may be the Right Thing, in the end). */
959 char *saved_input_line_pointer
;
961 saved_input_line_pointer
= input_line_pointer
;
962 input_line_pointer
= name
;
964 input_line_pointer
= saved_input_line_pointer
;
967 /* Map 's' to SHF_IA_64_SHORT. */
970 ia64_elf_section_letter (letter
, ptr_msg
)
975 return SHF_IA_64_SHORT
;
976 else if (letter
== 'o')
977 return SHF_LINK_ORDER
;
979 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
983 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
986 ia64_elf_section_flags (flags
, attr
, type
)
988 int attr
, type ATTRIBUTE_UNUSED
;
990 if (attr
& SHF_IA_64_SHORT
)
991 flags
|= SEC_SMALL_DATA
;
996 ia64_elf_section_type (str
, len
)
1000 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1002 if (STREQ (ELF_STRING_ia64_unwind_info
))
1003 return SHT_PROGBITS
;
1005 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
1006 return SHT_PROGBITS
;
1008 if (STREQ (ELF_STRING_ia64_unwind
))
1009 return SHT_IA_64_UNWIND
;
1011 if (STREQ (ELF_STRING_ia64_unwind_once
))
1012 return SHT_IA_64_UNWIND
;
1014 if (STREQ ("unwind"))
1015 return SHT_IA_64_UNWIND
;
1017 if (STREQ ("init_array"))
1018 return SHT_INIT_ARRAY
;
1020 if (STREQ ("fini_array"))
1021 return SHT_FINI_ARRAY
;
1028 set_regstack (ins
, locs
, outs
, rots
)
1029 unsigned int ins
, locs
, outs
, rots
;
1031 /* Size of frame. */
1034 sof
= ins
+ locs
+ outs
;
1037 as_bad ("Size of frame exceeds maximum of 96 registers");
1042 as_warn ("Size of rotating registers exceeds frame size");
1045 md
.in
.base
= REG_GR
+ 32;
1046 md
.loc
.base
= md
.in
.base
+ ins
;
1047 md
.out
.base
= md
.loc
.base
+ locs
;
1049 md
.in
.num_regs
= ins
;
1050 md
.loc
.num_regs
= locs
;
1051 md
.out
.num_regs
= outs
;
1052 md
.rot
.num_regs
= rots
;
1059 struct label_fix
*lfix
;
1061 subsegT saved_subseg
;
1064 if (!md
.last_text_seg
)
1067 saved_seg
= now_seg
;
1068 saved_subseg
= now_subseg
;
1070 subseg_set (md
.last_text_seg
, 0);
1072 while (md
.num_slots_in_use
> 0)
1073 emit_one_bundle (); /* force out queued instructions */
1075 /* In case there are labels following the last instruction, resolve
1077 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1079 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1080 symbol_set_frag (lfix
->sym
, frag_now
);
1082 CURR_SLOT
.label_fixups
= 0;
1083 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1085 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1086 symbol_set_frag (lfix
->sym
, frag_now
);
1088 CURR_SLOT
.tag_fixups
= 0;
1090 /* In case there are unwind directives following the last instruction,
1091 resolve those now. We only handle prologue, body, and endp directives
1092 here. Give an error for others. */
1093 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1095 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
1096 || ptr
->r
.type
== body
|| ptr
->r
.type
== endp
)
1098 ptr
->slot_number
= (unsigned long) frag_more (0);
1099 ptr
->slot_frag
= frag_now
;
1102 as_bad (_("Unwind directive not followed by an instruction."));
1104 unwind
.current_entry
= NULL
;
1106 subseg_set (saved_seg
, saved_subseg
);
1108 if (md
.qp
.X_op
== O_register
)
1109 as_bad ("qualifying predicate not followed by instruction");
1113 ia64_do_align (nbytes
)
1116 char *saved_input_line_pointer
= input_line_pointer
;
1118 input_line_pointer
= "";
1119 s_align_bytes (nbytes
);
1120 input_line_pointer
= saved_input_line_pointer
;
1124 ia64_cons_align (nbytes
)
1129 char *saved_input_line_pointer
= input_line_pointer
;
1130 input_line_pointer
= "";
1131 s_align_bytes (nbytes
);
1132 input_line_pointer
= saved_input_line_pointer
;
1136 /* Output COUNT bytes to a memory location. */
1137 static unsigned char *vbyte_mem_ptr
= NULL
;
1140 output_vbyte_mem (count
, ptr
, comment
)
1143 char *comment ATTRIBUTE_UNUSED
;
1146 if (vbyte_mem_ptr
== NULL
)
1151 for (x
= 0; x
< count
; x
++)
1152 *(vbyte_mem_ptr
++) = ptr
[x
];
1155 /* Count the number of bytes required for records. */
1156 static int vbyte_count
= 0;
1158 count_output (count
, ptr
, comment
)
1160 char *ptr ATTRIBUTE_UNUSED
;
1161 char *comment ATTRIBUTE_UNUSED
;
1163 vbyte_count
+= count
;
1167 output_R1_format (f
, rtype
, rlen
)
1169 unw_record_type rtype
;
1176 output_R3_format (f
, rtype
, rlen
);
1182 else if (rtype
!= prologue
)
1183 as_bad ("record type is not valid");
1185 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1186 (*f
) (1, &byte
, NULL
);
1190 output_R2_format (f
, mask
, grsave
, rlen
)
1197 mask
= (mask
& 0x0f);
1198 grsave
= (grsave
& 0x7f);
1200 bytes
[0] = (UNW_R2
| (mask
>> 1));
1201 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1202 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1203 (*f
) (count
, bytes
, NULL
);
1207 output_R3_format (f
, rtype
, rlen
)
1209 unw_record_type rtype
;
1216 output_R1_format (f
, rtype
, rlen
);
1222 else if (rtype
!= prologue
)
1223 as_bad ("record type is not valid");
1224 bytes
[0] = (UNW_R3
| r
);
1225 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1226 (*f
) (count
+ 1, bytes
, NULL
);
1230 output_P1_format (f
, brmask
)
1235 byte
= UNW_P1
| (brmask
& 0x1f);
1236 (*f
) (1, &byte
, NULL
);
1240 output_P2_format (f
, brmask
, gr
)
1246 brmask
= (brmask
& 0x1f);
1247 bytes
[0] = UNW_P2
| (brmask
>> 1);
1248 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1249 (*f
) (2, bytes
, NULL
);
1253 output_P3_format (f
, rtype
, reg
)
1255 unw_record_type rtype
;
1300 as_bad ("Invalid record type for P3 format.");
1302 bytes
[0] = (UNW_P3
| (r
>> 1));
1303 bytes
[1] = (((r
& 1) << 7) | reg
);
1304 (*f
) (2, bytes
, NULL
);
1308 output_P4_format (f
, imask
, imask_size
)
1310 unsigned char *imask
;
1311 unsigned long imask_size
;
1314 (*f
) (imask_size
, imask
, NULL
);
1318 output_P5_format (f
, grmask
, frmask
)
1321 unsigned long frmask
;
1324 grmask
= (grmask
& 0x0f);
1327 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1328 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1329 bytes
[3] = (frmask
& 0x000000ff);
1330 (*f
) (4, bytes
, NULL
);
1334 output_P6_format (f
, rtype
, rmask
)
1336 unw_record_type rtype
;
1342 if (rtype
== gr_mem
)
1344 else if (rtype
!= fr_mem
)
1345 as_bad ("Invalid record type for format P6");
1346 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1347 (*f
) (1, &byte
, NULL
);
1351 output_P7_format (f
, rtype
, w1
, w2
)
1353 unw_record_type rtype
;
1360 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1365 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1415 bytes
[0] = (UNW_P7
| r
);
1416 (*f
) (count
, bytes
, NULL
);
1420 output_P8_format (f
, rtype
, t
)
1422 unw_record_type rtype
;
1461 case bspstore_psprel
:
1464 case bspstore_sprel
:
1476 case priunat_when_gr
:
1479 case priunat_psprel
:
1485 case priunat_when_mem
:
1492 count
+= output_leb128 (bytes
+ 2, t
, 0);
1493 (*f
) (count
, bytes
, NULL
);
1497 output_P9_format (f
, grmask
, gr
)
1504 bytes
[1] = (grmask
& 0x0f);
1505 bytes
[2] = (gr
& 0x7f);
1506 (*f
) (3, bytes
, NULL
);
1510 output_P10_format (f
, abi
, context
)
1517 bytes
[1] = (abi
& 0xff);
1518 bytes
[2] = (context
& 0xff);
1519 (*f
) (3, bytes
, NULL
);
1523 output_B1_format (f
, rtype
, label
)
1525 unw_record_type rtype
;
1526 unsigned long label
;
1532 output_B4_format (f
, rtype
, label
);
1535 if (rtype
== copy_state
)
1537 else if (rtype
!= label_state
)
1538 as_bad ("Invalid record type for format B1");
1540 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1541 (*f
) (1, &byte
, NULL
);
1545 output_B2_format (f
, ecount
, t
)
1547 unsigned long ecount
;
1554 output_B3_format (f
, ecount
, t
);
1557 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1558 count
+= output_leb128 (bytes
+ 1, t
, 0);
1559 (*f
) (count
, bytes
, NULL
);
1563 output_B3_format (f
, ecount
, t
)
1565 unsigned long ecount
;
1572 output_B2_format (f
, ecount
, t
);
1576 count
+= output_leb128 (bytes
+ 1, t
, 0);
1577 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1578 (*f
) (count
, bytes
, NULL
);
1582 output_B4_format (f
, rtype
, label
)
1584 unw_record_type rtype
;
1585 unsigned long label
;
1592 output_B1_format (f
, rtype
, label
);
1596 if (rtype
== copy_state
)
1598 else if (rtype
!= label_state
)
1599 as_bad ("Invalid record type for format B1");
1601 bytes
[0] = (UNW_B4
| (r
<< 3));
1602 count
+= output_leb128 (bytes
+ 1, label
, 0);
1603 (*f
) (count
, bytes
, NULL
);
1607 format_ab_reg (ab
, reg
)
1614 ret
= (ab
<< 5) | reg
;
1619 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1621 unw_record_type rtype
;
1631 if (rtype
== spill_sprel
)
1633 else if (rtype
!= spill_psprel
)
1634 as_bad ("Invalid record type for format X1");
1635 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1636 count
+= output_leb128 (bytes
+ 2, t
, 0);
1637 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1638 (*f
) (count
, bytes
, NULL
);
1642 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1651 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1652 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1653 count
+= output_leb128 (bytes
+ 3, t
, 0);
1654 (*f
) (count
, bytes
, NULL
);
1658 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1660 unw_record_type rtype
;
1671 if (rtype
== spill_sprel_p
)
1673 else if (rtype
!= spill_psprel_p
)
1674 as_bad ("Invalid record type for format X3");
1675 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1676 bytes
[2] = format_ab_reg (ab
, reg
);
1677 count
+= output_leb128 (bytes
+ 3, t
, 0);
1678 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1679 (*f
) (count
, bytes
, NULL
);
1683 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1693 bytes
[1] = (qp
& 0x3f);
1694 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1695 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1696 count
+= output_leb128 (bytes
+ 4, t
, 0);
1697 (*f
) (count
, bytes
, NULL
);
1700 /* This function allocates a record list structure, and initializes fields. */
1702 static unw_rec_list
*
1703 alloc_record (unw_record_type t
)
1706 ptr
= xmalloc (sizeof (*ptr
));
1708 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1710 ptr
->next_slot_number
= 0;
1711 ptr
->next_slot_frag
= 0;
1715 /* Dummy unwind record used for calculating the length of the last prologue or
1718 static unw_rec_list
*
1721 unw_rec_list
*ptr
= alloc_record (endp
);
1725 static unw_rec_list
*
1728 unw_rec_list
*ptr
= alloc_record (prologue
);
1729 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1733 static unw_rec_list
*
1734 output_prologue_gr (saved_mask
, reg
)
1735 unsigned int saved_mask
;
1738 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1739 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1740 ptr
->r
.record
.r
.grmask
= saved_mask
;
1741 ptr
->r
.record
.r
.grsave
= reg
;
1745 static unw_rec_list
*
1748 unw_rec_list
*ptr
= alloc_record (body
);
1752 static unw_rec_list
*
1753 output_mem_stack_f (size
)
1756 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1757 ptr
->r
.record
.p
.size
= size
;
1761 static unw_rec_list
*
1762 output_mem_stack_v ()
1764 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1768 static unw_rec_list
*
1772 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1773 ptr
->r
.record
.p
.gr
= gr
;
1777 static unw_rec_list
*
1778 output_psp_sprel (offset
)
1779 unsigned int offset
;
1781 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1782 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1786 static unw_rec_list
*
1789 unw_rec_list
*ptr
= alloc_record (rp_when
);
1793 static unw_rec_list
*
1797 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1798 ptr
->r
.record
.p
.gr
= gr
;
1802 static unw_rec_list
*
1806 unw_rec_list
*ptr
= alloc_record (rp_br
);
1807 ptr
->r
.record
.p
.br
= br
;
1811 static unw_rec_list
*
1812 output_rp_psprel (offset
)
1813 unsigned int offset
;
1815 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1816 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1820 static unw_rec_list
*
1821 output_rp_sprel (offset
)
1822 unsigned int offset
;
1824 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1825 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1829 static unw_rec_list
*
1832 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1836 static unw_rec_list
*
1840 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1841 ptr
->r
.record
.p
.gr
= gr
;
1845 static unw_rec_list
*
1846 output_pfs_psprel (offset
)
1847 unsigned int offset
;
1849 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1850 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1854 static unw_rec_list
*
1855 output_pfs_sprel (offset
)
1856 unsigned int offset
;
1858 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1859 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1863 static unw_rec_list
*
1864 output_preds_when ()
1866 unw_rec_list
*ptr
= alloc_record (preds_when
);
1870 static unw_rec_list
*
1871 output_preds_gr (gr
)
1874 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1875 ptr
->r
.record
.p
.gr
= gr
;
1879 static unw_rec_list
*
1880 output_preds_psprel (offset
)
1881 unsigned int offset
;
1883 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1884 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1888 static unw_rec_list
*
1889 output_preds_sprel (offset
)
1890 unsigned int offset
;
1892 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1893 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1897 static unw_rec_list
*
1898 output_fr_mem (mask
)
1901 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1902 ptr
->r
.record
.p
.rmask
= mask
;
1906 static unw_rec_list
*
1907 output_frgr_mem (gr_mask
, fr_mask
)
1908 unsigned int gr_mask
;
1909 unsigned int fr_mask
;
1911 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1912 ptr
->r
.record
.p
.grmask
= gr_mask
;
1913 ptr
->r
.record
.p
.frmask
= fr_mask
;
1917 static unw_rec_list
*
1918 output_gr_gr (mask
, reg
)
1922 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1923 ptr
->r
.record
.p
.grmask
= mask
;
1924 ptr
->r
.record
.p
.gr
= reg
;
1928 static unw_rec_list
*
1929 output_gr_mem (mask
)
1932 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1933 ptr
->r
.record
.p
.rmask
= mask
;
1937 static unw_rec_list
*
1938 output_br_mem (unsigned int mask
)
1940 unw_rec_list
*ptr
= alloc_record (br_mem
);
1941 ptr
->r
.record
.p
.brmask
= mask
;
1945 static unw_rec_list
*
1946 output_br_gr (save_mask
, reg
)
1947 unsigned int save_mask
;
1950 unw_rec_list
*ptr
= alloc_record (br_gr
);
1951 ptr
->r
.record
.p
.brmask
= save_mask
;
1952 ptr
->r
.record
.p
.gr
= reg
;
1956 static unw_rec_list
*
1957 output_spill_base (offset
)
1958 unsigned int offset
;
1960 unw_rec_list
*ptr
= alloc_record (spill_base
);
1961 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1965 static unw_rec_list
*
1968 unw_rec_list
*ptr
= alloc_record (unat_when
);
1972 static unw_rec_list
*
1976 unw_rec_list
*ptr
= alloc_record (unat_gr
);
1977 ptr
->r
.record
.p
.gr
= gr
;
1981 static unw_rec_list
*
1982 output_unat_psprel (offset
)
1983 unsigned int offset
;
1985 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
1986 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1990 static unw_rec_list
*
1991 output_unat_sprel (offset
)
1992 unsigned int offset
;
1994 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
1995 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1999 static unw_rec_list
*
2002 unw_rec_list
*ptr
= alloc_record (lc_when
);
2006 static unw_rec_list
*
2010 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2011 ptr
->r
.record
.p
.gr
= gr
;
2015 static unw_rec_list
*
2016 output_lc_psprel (offset
)
2017 unsigned int offset
;
2019 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2020 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2024 static unw_rec_list
*
2025 output_lc_sprel (offset
)
2026 unsigned int offset
;
2028 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2029 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2033 static unw_rec_list
*
2036 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2040 static unw_rec_list
*
2044 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2045 ptr
->r
.record
.p
.gr
= gr
;
2049 static unw_rec_list
*
2050 output_fpsr_psprel (offset
)
2051 unsigned int offset
;
2053 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2054 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2058 static unw_rec_list
*
2059 output_fpsr_sprel (offset
)
2060 unsigned int offset
;
2062 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2063 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2067 static unw_rec_list
*
2068 output_priunat_when_gr ()
2070 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2074 static unw_rec_list
*
2075 output_priunat_when_mem ()
2077 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2081 static unw_rec_list
*
2082 output_priunat_gr (gr
)
2085 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2086 ptr
->r
.record
.p
.gr
= gr
;
2090 static unw_rec_list
*
2091 output_priunat_psprel (offset
)
2092 unsigned int offset
;
2094 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2095 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2099 static unw_rec_list
*
2100 output_priunat_sprel (offset
)
2101 unsigned int offset
;
2103 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2104 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2108 static unw_rec_list
*
2111 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2115 static unw_rec_list
*
2119 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2120 ptr
->r
.record
.p
.gr
= gr
;
2124 static unw_rec_list
*
2125 output_bsp_psprel (offset
)
2126 unsigned int offset
;
2128 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2129 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2133 static unw_rec_list
*
2134 output_bsp_sprel (offset
)
2135 unsigned int offset
;
2137 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2138 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2142 static unw_rec_list
*
2143 output_bspstore_when ()
2145 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2149 static unw_rec_list
*
2150 output_bspstore_gr (gr
)
2153 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2154 ptr
->r
.record
.p
.gr
= gr
;
2158 static unw_rec_list
*
2159 output_bspstore_psprel (offset
)
2160 unsigned int offset
;
2162 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2163 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2167 static unw_rec_list
*
2168 output_bspstore_sprel (offset
)
2169 unsigned int offset
;
2171 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2172 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2176 static unw_rec_list
*
2179 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2183 static unw_rec_list
*
2187 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2188 ptr
->r
.record
.p
.gr
= gr
;
2192 static unw_rec_list
*
2193 output_rnat_psprel (offset
)
2194 unsigned int offset
;
2196 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2197 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2201 static unw_rec_list
*
2202 output_rnat_sprel (offset
)
2203 unsigned int offset
;
2205 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2206 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2210 static unw_rec_list
*
2211 output_unwabi (abi
, context
)
2213 unsigned long context
;
2215 unw_rec_list
*ptr
= alloc_record (unwabi
);
2216 ptr
->r
.record
.p
.abi
= abi
;
2217 ptr
->r
.record
.p
.context
= context
;
2221 static unw_rec_list
*
2222 output_epilogue (unsigned long ecount
)
2224 unw_rec_list
*ptr
= alloc_record (epilogue
);
2225 ptr
->r
.record
.b
.ecount
= ecount
;
2229 static unw_rec_list
*
2230 output_label_state (unsigned long label
)
2232 unw_rec_list
*ptr
= alloc_record (label_state
);
2233 ptr
->r
.record
.b
.label
= label
;
2237 static unw_rec_list
*
2238 output_copy_state (unsigned long label
)
2240 unw_rec_list
*ptr
= alloc_record (copy_state
);
2241 ptr
->r
.record
.b
.label
= label
;
2245 static unw_rec_list
*
2246 output_spill_psprel (ab
, reg
, offset
)
2249 unsigned int offset
;
2251 unw_rec_list
*ptr
= alloc_record (spill_psprel
);
2252 ptr
->r
.record
.x
.ab
= ab
;
2253 ptr
->r
.record
.x
.reg
= reg
;
2254 ptr
->r
.record
.x
.pspoff
= offset
/ 4;
2258 static unw_rec_list
*
2259 output_spill_sprel (ab
, reg
, offset
)
2262 unsigned int offset
;
2264 unw_rec_list
*ptr
= alloc_record (spill_sprel
);
2265 ptr
->r
.record
.x
.ab
= ab
;
2266 ptr
->r
.record
.x
.reg
= reg
;
2267 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2271 static unw_rec_list
*
2272 output_spill_psprel_p (ab
, reg
, offset
, predicate
)
2275 unsigned int offset
;
2276 unsigned int predicate
;
2278 unw_rec_list
*ptr
= alloc_record (spill_psprel_p
);
2279 ptr
->r
.record
.x
.ab
= ab
;
2280 ptr
->r
.record
.x
.reg
= reg
;
2281 ptr
->r
.record
.x
.pspoff
= offset
/ 4;
2282 ptr
->r
.record
.x
.qp
= predicate
;
2286 static unw_rec_list
*
2287 output_spill_sprel_p (ab
, reg
, offset
, predicate
)
2290 unsigned int offset
;
2291 unsigned int predicate
;
2293 unw_rec_list
*ptr
= alloc_record (spill_sprel_p
);
2294 ptr
->r
.record
.x
.ab
= ab
;
2295 ptr
->r
.record
.x
.reg
= reg
;
2296 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2297 ptr
->r
.record
.x
.qp
= predicate
;
2301 static unw_rec_list
*
2302 output_spill_reg (ab
, reg
, targ_reg
, xy
)
2305 unsigned int targ_reg
;
2308 unw_rec_list
*ptr
= alloc_record (spill_reg
);
2309 ptr
->r
.record
.x
.ab
= ab
;
2310 ptr
->r
.record
.x
.reg
= reg
;
2311 ptr
->r
.record
.x
.treg
= targ_reg
;
2312 ptr
->r
.record
.x
.xy
= xy
;
2316 static unw_rec_list
*
2317 output_spill_reg_p (ab
, reg
, targ_reg
, xy
, predicate
)
2320 unsigned int targ_reg
;
2322 unsigned int predicate
;
2324 unw_rec_list
*ptr
= alloc_record (spill_reg_p
);
2325 ptr
->r
.record
.x
.ab
= ab
;
2326 ptr
->r
.record
.x
.reg
= reg
;
2327 ptr
->r
.record
.x
.treg
= targ_reg
;
2328 ptr
->r
.record
.x
.xy
= xy
;
2329 ptr
->r
.record
.x
.qp
= predicate
;
2333 /* Given a unw_rec_list process the correct format with the
2334 specified function. */
2337 process_one_record (ptr
, f
)
2341 unsigned long fr_mask
, gr_mask
;
2343 switch (ptr
->r
.type
)
2345 /* This is a dummy record that takes up no space in the output. */
2353 /* These are taken care of by prologue/prologue_gr. */
2358 if (ptr
->r
.type
== prologue_gr
)
2359 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2360 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2362 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2364 /* Output descriptor(s) for union of register spills (if any). */
2365 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2366 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2369 if ((fr_mask
& ~0xfUL
) == 0)
2370 output_P6_format (f
, fr_mem
, fr_mask
);
2373 output_P5_format (f
, gr_mask
, fr_mask
);
2378 output_P6_format (f
, gr_mem
, gr_mask
);
2379 if (ptr
->r
.record
.r
.mask
.br_mem
)
2380 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2382 /* output imask descriptor if necessary: */
2383 if (ptr
->r
.record
.r
.mask
.i
)
2384 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2385 ptr
->r
.record
.r
.imask_size
);
2389 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2393 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2394 ptr
->r
.record
.p
.size
);
2407 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2410 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2413 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2421 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2430 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2440 case bspstore_sprel
:
2442 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2445 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2448 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2451 as_bad ("spill_mask record unimplemented.");
2453 case priunat_when_gr
:
2454 case priunat_when_mem
:
2458 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2460 case priunat_psprel
:
2462 case bspstore_psprel
:
2464 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2467 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2470 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2474 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2477 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2478 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2479 ptr
->r
.record
.x
.pspoff
);
2482 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2483 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2484 ptr
->r
.record
.x
.spoff
);
2487 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2488 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2489 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2491 case spill_psprel_p
:
2492 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2493 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2494 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2497 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2498 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2499 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2502 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2503 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2504 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2508 as_bad ("record_type_not_valid");
2513 /* Given a unw_rec_list list, process all the records with
2514 the specified function. */
2516 process_unw_records (list
, f
)
2521 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2522 process_one_record (ptr
, f
);
2525 /* Determine the size of a record list in bytes. */
2527 calc_record_size (list
)
2531 process_unw_records (list
, count_output
);
2535 /* Update IMASK bitmask to reflect the fact that one or more registers
2536 of type TYPE are saved starting at instruction with index T. If N
2537 bits are set in REGMASK, it is assumed that instructions T through
2538 T+N-1 save these registers.
2542 1: instruction saves next fp reg
2543 2: instruction saves next general reg
2544 3: instruction saves next branch reg */
2546 set_imask (region
, regmask
, t
, type
)
2547 unw_rec_list
*region
;
2548 unsigned long regmask
;
2552 unsigned char *imask
;
2553 unsigned long imask_size
;
2557 imask
= region
->r
.record
.r
.mask
.i
;
2558 imask_size
= region
->r
.record
.r
.imask_size
;
2561 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2562 imask
= xmalloc (imask_size
);
2563 memset (imask
, 0, imask_size
);
2565 region
->r
.record
.r
.imask_size
= imask_size
;
2566 region
->r
.record
.r
.mask
.i
= imask
;
2570 pos
= 2 * (3 - t
% 4);
2573 if (i
>= imask_size
)
2575 as_bad ("Ignoring attempt to spill beyond end of region");
2579 imask
[i
] |= (type
& 0x3) << pos
;
2581 regmask
&= (regmask
- 1);
2591 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2592 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2593 containing FIRST_ADDR. */
2596 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
)
2597 unsigned long slot_addr
;
2599 unsigned long first_addr
;
2602 unsigned long index
= 0;
2604 /* First time we are called, the initial address and frag are invalid. */
2605 if (first_addr
== 0)
2608 /* If the two addresses are in different frags, then we need to add in
2609 the remaining size of this frag, and then the entire size of intermediate
2611 while (slot_frag
!= first_frag
)
2613 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2617 /* We can get the final addresses only after relaxation is
2619 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2620 index
+= 3 * ((first_frag
->fr_next
->fr_address
2621 - first_frag
->fr_address
2622 - first_frag
->fr_fix
) >> 4);
2625 /* We don't know what the final addresses will be. We try our
2626 best to estimate. */
2627 switch (first_frag
->fr_type
)
2633 as_fatal ("only constant space allocation is supported");
2639 /* Take alignment into account. Assume the worst case
2640 before relaxation. */
2641 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2645 if (first_frag
->fr_symbol
)
2647 as_fatal ("only constant offsets are supported");
2651 index
+= 3 * (first_frag
->fr_offset
>> 4);
2655 /* Add in the full size of the frag converted to instruction slots. */
2656 index
+= 3 * (first_frag
->fr_fix
>> 4);
2657 /* Subtract away the initial part before first_addr. */
2658 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2659 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2661 /* Move to the beginning of the next frag. */
2662 first_frag
= first_frag
->fr_next
;
2663 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2666 /* Add in the used part of the last frag. */
2667 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2668 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2672 /* Optimize unwind record directives. */
2674 static unw_rec_list
*
2675 optimize_unw_records (list
)
2681 /* If the only unwind record is ".prologue" or ".prologue" followed
2682 by ".body", then we can optimize the unwind directives away. */
2683 if (list
->r
.type
== prologue
2684 && (list
->next
->r
.type
== endp
2685 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2691 /* Given a complete record list, process any records which have
2692 unresolved fields, (ie length counts for a prologue). After
2693 this has been run, all necessary information should be available
2694 within each record to generate an image. */
2697 fixup_unw_records (list
)
2700 unw_rec_list
*ptr
, *region
= 0;
2701 unsigned long first_addr
= 0, rlen
= 0, t
;
2702 fragS
*first_frag
= 0;
2704 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2706 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2707 as_bad (" Insn slot not set in unwind record.");
2708 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2709 first_addr
, first_frag
);
2710 switch (ptr
->r
.type
)
2718 unsigned long last_addr
= 0;
2719 fragS
*last_frag
= NULL
;
2721 first_addr
= ptr
->slot_number
;
2722 first_frag
= ptr
->slot_frag
;
2723 /* Find either the next body/prologue start, or the end of
2724 the function, and determine the size of the region. */
2725 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2726 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2727 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2729 last_addr
= last
->slot_number
;
2730 last_frag
= last
->slot_frag
;
2733 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
);
2734 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2735 if (ptr
->r
.type
== body
)
2736 /* End of region. */
2743 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2754 case priunat_when_gr
:
2755 case priunat_when_mem
:
2759 ptr
->r
.record
.p
.t
= t
;
2767 case spill_psprel_p
:
2768 ptr
->r
.record
.x
.t
= t
;
2774 as_bad ("frgr_mem record before region record!\n");
2777 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2778 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2779 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2780 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2785 as_bad ("fr_mem record before region record!\n");
2788 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2789 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2794 as_bad ("gr_mem record before region record!\n");
2797 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2798 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2803 as_bad ("br_mem record before region record!\n");
2806 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2807 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2813 as_bad ("gr_gr record before region record!\n");
2816 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2821 as_bad ("br_gr record before region record!\n");
2824 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2833 /* This function converts a rs_machine_dependent variant frag into a
2834 normal fill frag with the unwind image from the the record list. */
2836 ia64_convert_frag (fragS
*frag
)
2842 list
= (unw_rec_list
*) frag
->fr_opcode
;
2843 fixup_unw_records (list
);
2845 len
= calc_record_size (list
);
2846 /* pad to pointer-size boundary. */
2847 pad
= len
% md
.pointer_size
;
2849 len
+= md
.pointer_size
- pad
;
2850 /* Add 8 for the header + a pointer for the personality offset. */
2851 size
= len
+ 8 + md
.pointer_size
;
2853 /* fr_var carries the max_chars that we created the fragment with.
2854 We must, of course, have allocated enough memory earlier. */
2855 assert (frag
->fr_var
>= size
);
2857 /* Initialize the header area. fr_offset is initialized with
2858 unwind.personality_routine. */
2859 if (frag
->fr_offset
)
2861 if (md
.flags
& EF_IA_64_ABI64
)
2862 flag_value
= (bfd_vma
) 3 << 32;
2864 /* 32-bit unwind info block. */
2865 flag_value
= (bfd_vma
) 0x1003 << 32;
2870 md_number_to_chars (frag
->fr_literal
,
2871 (((bfd_vma
) 1 << 48) /* Version. */
2872 | flag_value
/* U & E handler flags. */
2873 | (len
/ md
.pointer_size
)), /* Length. */
2876 /* Skip the header. */
2877 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
2878 process_unw_records (list
, output_vbyte_mem
);
2880 /* Fill the padding bytes with zeros. */
2882 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
2883 md
.pointer_size
- pad
);
2885 frag
->fr_fix
+= size
;
2886 frag
->fr_type
= rs_fill
;
2888 frag
->fr_offset
= 0;
2892 convert_expr_to_ab_reg (e
, ab
, regp
)
2899 if (e
->X_op
!= O_register
)
2902 reg
= e
->X_add_number
;
2903 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2906 *regp
= reg
- REG_GR
;
2908 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
2909 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
2912 *regp
= reg
- REG_FR
;
2914 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
2917 *regp
= reg
- REG_BR
;
2924 case REG_PR
: *regp
= 0; break;
2925 case REG_PSP
: *regp
= 1; break;
2926 case REG_PRIUNAT
: *regp
= 2; break;
2927 case REG_BR
+ 0: *regp
= 3; break;
2928 case REG_AR
+ AR_BSP
: *regp
= 4; break;
2929 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
2930 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
2931 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
2932 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
2933 case REG_AR
+ AR_PFS
: *regp
= 9; break;
2934 case REG_AR
+ AR_LC
: *regp
= 10; break;
2944 convert_expr_to_xy_reg (e
, xy
, regp
)
2951 if (e
->X_op
!= O_register
)
2954 reg
= e
->X_add_number
;
2956 if (/* reg >= REG_GR && */ reg
<= (REG_GR
+ 127))
2959 *regp
= reg
- REG_GR
;
2961 else if (reg
>= REG_FR
&& reg
<= (REG_FR
+ 127))
2964 *regp
= reg
- REG_FR
;
2966 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
2969 *regp
= reg
- REG_BR
;
2978 int dummy ATTRIBUTE_UNUSED
;
2983 radix
= *input_line_pointer
++;
2985 if (radix
!= 'C' && !is_end_of_line
[(unsigned char) radix
])
2987 as_bad ("Radix `%c' unsupported", *input_line_pointer
);
2988 ignore_rest_of_line ();
2993 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
2995 dot_special_section (which
)
2998 set_section ((char *) special_section_name
[which
]);
3002 add_unwind_entry (ptr
)
3006 unwind
.tail
->next
= ptr
;
3011 /* The current entry can in fact be a chain of unwind entries. */
3012 if (unwind
.current_entry
== NULL
)
3013 unwind
.current_entry
= ptr
;
3018 int dummy ATTRIBUTE_UNUSED
;
3024 if (e
.X_op
!= O_constant
)
3025 as_bad ("Operand to .fframe must be a constant");
3027 add_unwind_entry (output_mem_stack_f (e
.X_add_number
));
3032 int dummy ATTRIBUTE_UNUSED
;
3038 reg
= e
.X_add_number
- REG_GR
;
3039 if (e
.X_op
== O_register
&& reg
< 128)
3041 add_unwind_entry (output_mem_stack_v ());
3042 if (! (unwind
.prologue_mask
& 2))
3043 add_unwind_entry (output_psp_gr (reg
));
3046 as_bad ("First operand to .vframe must be a general register");
3050 dot_vframesp (dummy
)
3051 int dummy ATTRIBUTE_UNUSED
;
3056 if (e
.X_op
== O_constant
)
3058 add_unwind_entry (output_mem_stack_v ());
3059 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3062 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3066 dot_vframepsp (dummy
)
3067 int dummy ATTRIBUTE_UNUSED
;
3072 if (e
.X_op
== O_constant
)
3074 add_unwind_entry (output_mem_stack_v ());
3075 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3078 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3083 int dummy ATTRIBUTE_UNUSED
;
3089 sep
= parse_operand (&e1
);
3091 as_bad ("No second operand to .save");
3092 sep
= parse_operand (&e2
);
3094 reg1
= e1
.X_add_number
;
3095 reg2
= e2
.X_add_number
- REG_GR
;
3097 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3098 if (e1
.X_op
== O_register
)
3100 if (e2
.X_op
== O_register
&& reg2
>= 0 && reg2
< 128)
3104 case REG_AR
+ AR_BSP
:
3105 add_unwind_entry (output_bsp_when ());
3106 add_unwind_entry (output_bsp_gr (reg2
));
3108 case REG_AR
+ AR_BSPSTORE
:
3109 add_unwind_entry (output_bspstore_when ());
3110 add_unwind_entry (output_bspstore_gr (reg2
));
3112 case REG_AR
+ AR_RNAT
:
3113 add_unwind_entry (output_rnat_when ());
3114 add_unwind_entry (output_rnat_gr (reg2
));
3116 case REG_AR
+ AR_UNAT
:
3117 add_unwind_entry (output_unat_when ());
3118 add_unwind_entry (output_unat_gr (reg2
));
3120 case REG_AR
+ AR_FPSR
:
3121 add_unwind_entry (output_fpsr_when ());
3122 add_unwind_entry (output_fpsr_gr (reg2
));
3124 case REG_AR
+ AR_PFS
:
3125 add_unwind_entry (output_pfs_when ());
3126 if (! (unwind
.prologue_mask
& 4))
3127 add_unwind_entry (output_pfs_gr (reg2
));
3129 case REG_AR
+ AR_LC
:
3130 add_unwind_entry (output_lc_when ());
3131 add_unwind_entry (output_lc_gr (reg2
));
3134 add_unwind_entry (output_rp_when ());
3135 if (! (unwind
.prologue_mask
& 8))
3136 add_unwind_entry (output_rp_gr (reg2
));
3139 add_unwind_entry (output_preds_when ());
3140 if (! (unwind
.prologue_mask
& 1))
3141 add_unwind_entry (output_preds_gr (reg2
));
3144 add_unwind_entry (output_priunat_when_gr ());
3145 add_unwind_entry (output_priunat_gr (reg2
));
3148 as_bad ("First operand not a valid register");
3152 as_bad (" Second operand not a valid register");
3155 as_bad ("First operand not a register");
3160 int dummy ATTRIBUTE_UNUSED
;
3163 unsigned long ecount
; /* # of _additional_ regions to pop */
3166 sep
= parse_operand (&e1
);
3167 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3169 as_bad ("First operand to .restore must be stack pointer (sp)");
3175 parse_operand (&e2
);
3176 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3178 as_bad ("Second operand to .restore must be a constant >= 0");
3181 ecount
= e2
.X_add_number
;
3184 ecount
= unwind
.prologue_count
- 1;
3186 if (ecount
>= unwind
.prologue_count
)
3188 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3189 ecount
+ 1, unwind
.prologue_count
);
3193 add_unwind_entry (output_epilogue (ecount
));
3195 if (ecount
< unwind
.prologue_count
)
3196 unwind
.prologue_count
-= ecount
+ 1;
3198 unwind
.prologue_count
= 0;
3202 dot_restorereg (dummy
)
3203 int dummy ATTRIBUTE_UNUSED
;
3205 unsigned int ab
, reg
;
3210 if (!convert_expr_to_ab_reg (&e
, &ab
, ®
))
3212 as_bad ("First operand to .restorereg must be a preserved register");
3215 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0));
3219 dot_restorereg_p (dummy
)
3220 int dummy ATTRIBUTE_UNUSED
;
3222 unsigned int qp
, ab
, reg
;
3226 sep
= parse_operand (&e1
);
3229 as_bad ("No second operand to .restorereg.p");
3233 parse_operand (&e2
);
3235 qp
= e1
.X_add_number
- REG_P
;
3236 if (e1
.X_op
!= O_register
|| qp
> 63)
3238 as_bad ("First operand to .restorereg.p must be a predicate");
3242 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3244 as_bad ("Second operand to .restorereg.p must be a preserved register");
3247 add_unwind_entry (output_spill_reg_p (ab
, reg
, 0, 0, qp
));
3251 generate_unwind_image (text_name
)
3252 const char *text_name
;
3257 /* Mark the end of the unwind info, so that we can compute the size of the
3258 last unwind region. */
3259 add_unwind_entry (output_endp ());
3261 /* Force out pending instructions, to make sure all unwind records have
3262 a valid slot_number field. */
3263 ia64_flush_insns ();
3265 /* Generate the unwind record. */
3266 list
= optimize_unw_records (unwind
.list
);
3267 fixup_unw_records (list
);
3268 size
= calc_record_size (list
);
3270 if (size
> 0 || unwind
.force_unwind_entry
)
3272 unwind
.force_unwind_entry
= 0;
3273 /* pad to pointer-size boundary. */
3274 pad
= size
% md
.pointer_size
;
3276 size
+= md
.pointer_size
- pad
;
3277 /* Add 8 for the header + a pointer for the personality
3279 size
+= 8 + md
.pointer_size
;
3282 /* If there are unwind records, switch sections, and output the info. */
3287 bfd_reloc_code_real_type reloc
;
3289 make_unw_section_name (SPECIAL_SECTION_UNWIND_INFO
, text_name
, sec_name
);
3290 set_section (sec_name
);
3291 bfd_set_section_flags (stdoutput
, now_seg
,
3292 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3294 /* Make sure the section has 4 byte alignment for ILP32 and
3295 8 byte alignment for LP64. */
3296 frag_align (md
.pointer_size_shift
, 0, 0);
3297 record_alignment (now_seg
, md
.pointer_size_shift
);
3299 /* Set expression which points to start of unwind descriptor area. */
3300 unwind
.info
= expr_build_dot ();
3302 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3303 (offsetT
) unwind
.personality_routine
, (char *) list
);
3305 /* Add the personality address to the image. */
3306 if (unwind
.personality_routine
!= 0)
3308 exp
.X_op
= O_symbol
;
3309 exp
.X_add_symbol
= unwind
.personality_routine
;
3310 exp
.X_add_number
= 0;
3312 if (md
.flags
& EF_IA_64_BE
)
3314 if (md
.flags
& EF_IA_64_ABI64
)
3315 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3317 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3321 if (md
.flags
& EF_IA_64_ABI64
)
3322 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3324 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3327 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3328 md
.pointer_size
, &exp
, 0, reloc
);
3329 unwind
.personality_routine
= 0;
3333 free_saved_prologue_counts ();
3334 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3338 dot_handlerdata (dummy
)
3339 int dummy ATTRIBUTE_UNUSED
;
3341 const char *text_name
= segment_name (now_seg
);
3343 /* If text section name starts with ".text" (which it should),
3344 strip this prefix off. */
3345 if (strcmp (text_name
, ".text") == 0)
3348 unwind
.force_unwind_entry
= 1;
3350 /* Remember which segment we're in so we can switch back after .endp */
3351 unwind
.saved_text_seg
= now_seg
;
3352 unwind
.saved_text_subseg
= now_subseg
;
3354 /* Generate unwind info into unwind-info section and then leave that
3355 section as the currently active one so dataXX directives go into
3356 the language specific data area of the unwind info block. */
3357 generate_unwind_image (text_name
);
3358 demand_empty_rest_of_line ();
3362 dot_unwentry (dummy
)
3363 int dummy ATTRIBUTE_UNUSED
;
3365 unwind
.force_unwind_entry
= 1;
3366 demand_empty_rest_of_line ();
3371 int dummy ATTRIBUTE_UNUSED
;
3377 reg
= e
.X_add_number
- REG_BR
;
3378 if (e
.X_op
== O_register
&& reg
< 8)
3379 add_unwind_entry (output_rp_br (reg
));
3381 as_bad ("First operand not a valid branch register");
3385 dot_savemem (psprel
)
3392 sep
= parse_operand (&e1
);
3394 as_bad ("No second operand to .save%ssp", psprel
? "p" : "");
3395 sep
= parse_operand (&e2
);
3397 reg1
= e1
.X_add_number
;
3398 val
= e2
.X_add_number
;
3400 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3401 if (e1
.X_op
== O_register
)
3403 if (e2
.X_op
== O_constant
)
3407 case REG_AR
+ AR_BSP
:
3408 add_unwind_entry (output_bsp_when ());
3409 add_unwind_entry ((psprel
3411 : output_bsp_sprel
) (val
));
3413 case REG_AR
+ AR_BSPSTORE
:
3414 add_unwind_entry (output_bspstore_when ());
3415 add_unwind_entry ((psprel
3416 ? output_bspstore_psprel
3417 : output_bspstore_sprel
) (val
));
3419 case REG_AR
+ AR_RNAT
:
3420 add_unwind_entry (output_rnat_when ());
3421 add_unwind_entry ((psprel
3422 ? output_rnat_psprel
3423 : output_rnat_sprel
) (val
));
3425 case REG_AR
+ AR_UNAT
:
3426 add_unwind_entry (output_unat_when ());
3427 add_unwind_entry ((psprel
3428 ? output_unat_psprel
3429 : output_unat_sprel
) (val
));
3431 case REG_AR
+ AR_FPSR
:
3432 add_unwind_entry (output_fpsr_when ());
3433 add_unwind_entry ((psprel
3434 ? output_fpsr_psprel
3435 : output_fpsr_sprel
) (val
));
3437 case REG_AR
+ AR_PFS
:
3438 add_unwind_entry (output_pfs_when ());
3439 add_unwind_entry ((psprel
3441 : output_pfs_sprel
) (val
));
3443 case REG_AR
+ AR_LC
:
3444 add_unwind_entry (output_lc_when ());
3445 add_unwind_entry ((psprel
3447 : output_lc_sprel
) (val
));
3450 add_unwind_entry (output_rp_when ());
3451 add_unwind_entry ((psprel
3453 : output_rp_sprel
) (val
));
3456 add_unwind_entry (output_preds_when ());
3457 add_unwind_entry ((psprel
3458 ? output_preds_psprel
3459 : output_preds_sprel
) (val
));
3462 add_unwind_entry (output_priunat_when_mem ());
3463 add_unwind_entry ((psprel
3464 ? output_priunat_psprel
3465 : output_priunat_sprel
) (val
));
3468 as_bad ("First operand not a valid register");
3472 as_bad (" Second operand not a valid constant");
3475 as_bad ("First operand not a register");
3480 int dummy ATTRIBUTE_UNUSED
;
3484 sep
= parse_operand (&e1
);
3486 parse_operand (&e2
);
3488 if (e1
.X_op
!= O_constant
)
3489 as_bad ("First operand to .save.g must be a constant.");
3492 int grmask
= e1
.X_add_number
;
3494 add_unwind_entry (output_gr_mem (grmask
));
3497 int reg
= e2
.X_add_number
- REG_GR
;
3498 if (e2
.X_op
== O_register
&& reg
>= 0 && reg
< 128)
3499 add_unwind_entry (output_gr_gr (grmask
, reg
));
3501 as_bad ("Second operand is an invalid register.");
3508 int dummy ATTRIBUTE_UNUSED
;
3512 sep
= parse_operand (&e1
);
3514 if (e1
.X_op
!= O_constant
)
3515 as_bad ("Operand to .save.f must be a constant.");
3517 add_unwind_entry (output_fr_mem (e1
.X_add_number
));
3522 int dummy ATTRIBUTE_UNUSED
;
3529 sep
= parse_operand (&e1
);
3530 if (e1
.X_op
!= O_constant
)
3532 as_bad ("First operand to .save.b must be a constant.");
3535 brmask
= e1
.X_add_number
;
3539 sep
= parse_operand (&e2
);
3540 reg
= e2
.X_add_number
- REG_GR
;
3541 if (e2
.X_op
!= O_register
|| reg
> 127)
3543 as_bad ("Second operand to .save.b must be a general register.");
3546 add_unwind_entry (output_br_gr (brmask
, e2
.X_add_number
));
3549 add_unwind_entry (output_br_mem (brmask
));
3551 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3552 ignore_rest_of_line ();
3557 int dummy ATTRIBUTE_UNUSED
;
3561 sep
= parse_operand (&e1
);
3563 parse_operand (&e2
);
3565 if (e1
.X_op
!= O_constant
|| sep
!= ',' || e2
.X_op
!= O_constant
)
3566 as_bad ("Both operands of .save.gf must be constants.");
3569 int grmask
= e1
.X_add_number
;
3570 int frmask
= e2
.X_add_number
;
3571 add_unwind_entry (output_frgr_mem (grmask
, frmask
));
3577 int dummy ATTRIBUTE_UNUSED
;
3582 sep
= parse_operand (&e
);
3583 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3584 ignore_rest_of_line ();
3586 if (e
.X_op
!= O_constant
)
3587 as_bad ("Operand to .spill must be a constant");
3589 add_unwind_entry (output_spill_base (e
.X_add_number
));
3593 dot_spillreg (dummy
)
3594 int dummy ATTRIBUTE_UNUSED
;
3596 int sep
, ab
, xy
, reg
, treg
;
3599 sep
= parse_operand (&e1
);
3602 as_bad ("No second operand to .spillreg");
3606 parse_operand (&e2
);
3608 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3610 as_bad ("First operand to .spillreg must be a preserved register");
3614 if (!convert_expr_to_xy_reg (&e2
, &xy
, &treg
))
3616 as_bad ("Second operand to .spillreg must be a register");
3620 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
));
3624 dot_spillmem (psprel
)
3630 sep
= parse_operand (&e1
);
3633 as_bad ("Second operand missing");
3637 parse_operand (&e2
);
3639 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3641 as_bad ("First operand to .spill%s must be a preserved register",
3642 psprel
? "psp" : "sp");
3646 if (e2
.X_op
!= O_constant
)
3648 as_bad ("Second operand to .spill%s must be a constant",
3649 psprel
? "psp" : "sp");
3654 add_unwind_entry (output_spill_psprel (ab
, reg
, e2
.X_add_number
));
3656 add_unwind_entry (output_spill_sprel (ab
, reg
, e2
.X_add_number
));
3660 dot_spillreg_p (dummy
)
3661 int dummy ATTRIBUTE_UNUSED
;
3663 int sep
, ab
, xy
, reg
, treg
;
3664 expressionS e1
, e2
, e3
;
3667 sep
= parse_operand (&e1
);
3670 as_bad ("No second and third operand to .spillreg.p");
3674 sep
= parse_operand (&e2
);
3677 as_bad ("No third operand to .spillreg.p");
3681 parse_operand (&e3
);
3683 qp
= e1
.X_add_number
- REG_P
;
3685 if (e1
.X_op
!= O_register
|| qp
> 63)
3687 as_bad ("First operand to .spillreg.p must be a predicate");
3691 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3693 as_bad ("Second operand to .spillreg.p must be a preserved register");
3697 if (!convert_expr_to_xy_reg (&e3
, &xy
, &treg
))
3699 as_bad ("Third operand to .spillreg.p must be a register");
3703 add_unwind_entry (output_spill_reg_p (ab
, reg
, treg
, xy
, qp
));
3707 dot_spillmem_p (psprel
)
3710 expressionS e1
, e2
, e3
;
3714 sep
= parse_operand (&e1
);
3717 as_bad ("Second operand missing");
3721 parse_operand (&e2
);
3724 as_bad ("Second operand missing");
3728 parse_operand (&e3
);
3730 qp
= e1
.X_add_number
- REG_P
;
3731 if (e1
.X_op
!= O_register
|| qp
> 63)
3733 as_bad ("First operand to .spill%s_p must be a predicate",
3734 psprel
? "psp" : "sp");
3738 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3740 as_bad ("Second operand to .spill%s_p must be a preserved register",
3741 psprel
? "psp" : "sp");
3745 if (e3
.X_op
!= O_constant
)
3747 as_bad ("Third operand to .spill%s_p must be a constant",
3748 psprel
? "psp" : "sp");
3753 add_unwind_entry (output_spill_psprel_p (ab
, reg
, e3
.X_add_number
, qp
));
3755 add_unwind_entry (output_spill_sprel_p (ab
, reg
, e3
.X_add_number
, qp
));
3759 get_saved_prologue_count (lbl
)
3762 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3764 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
3768 return lpc
->prologue_count
;
3770 as_bad ("Missing .label_state %ld", lbl
);
3775 save_prologue_count (lbl
, count
)
3779 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3781 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
3785 lpc
->prologue_count
= count
;
3788 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
3790 new_lpc
->next
= unwind
.saved_prologue_counts
;
3791 new_lpc
->label_number
= lbl
;
3792 new_lpc
->prologue_count
= count
;
3793 unwind
.saved_prologue_counts
= new_lpc
;
3798 free_saved_prologue_counts ()
3800 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3801 label_prologue_count
*next
;
3810 unwind
.saved_prologue_counts
= NULL
;
3814 dot_label_state (dummy
)
3815 int dummy ATTRIBUTE_UNUSED
;
3820 if (e
.X_op
!= O_constant
)
3822 as_bad ("Operand to .label_state must be a constant");
3825 add_unwind_entry (output_label_state (e
.X_add_number
));
3826 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
3830 dot_copy_state (dummy
)
3831 int dummy ATTRIBUTE_UNUSED
;
3836 if (e
.X_op
!= O_constant
)
3838 as_bad ("Operand to .copy_state must be a constant");
3841 add_unwind_entry (output_copy_state (e
.X_add_number
));
3842 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
3847 int dummy ATTRIBUTE_UNUSED
;
3852 sep
= parse_operand (&e1
);
3855 as_bad ("Second operand to .unwabi missing");
3858 sep
= parse_operand (&e2
);
3859 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3860 ignore_rest_of_line ();
3862 if (e1
.X_op
!= O_constant
)
3864 as_bad ("First operand to .unwabi must be a constant");
3868 if (e2
.X_op
!= O_constant
)
3870 as_bad ("Second operand to .unwabi must be a constant");
3874 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
));
3878 dot_personality (dummy
)
3879 int dummy ATTRIBUTE_UNUSED
;
3883 name
= input_line_pointer
;
3884 c
= get_symbol_end ();
3885 p
= input_line_pointer
;
3886 unwind
.personality_routine
= symbol_find_or_make (name
);
3887 unwind
.force_unwind_entry
= 1;
3890 demand_empty_rest_of_line ();
3895 int dummy ATTRIBUTE_UNUSED
;
3900 unwind
.proc_start
= expr_build_dot ();
3901 /* Parse names of main and alternate entry points and mark them as
3902 function symbols: */
3906 name
= input_line_pointer
;
3907 c
= get_symbol_end ();
3908 p
= input_line_pointer
;
3909 sym
= symbol_find_or_make (name
);
3910 if (unwind
.proc_start
== 0)
3912 unwind
.proc_start
= sym
;
3914 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
3917 if (*input_line_pointer
!= ',')
3919 ++input_line_pointer
;
3921 demand_empty_rest_of_line ();
3924 unwind
.prologue_count
= 0;
3925 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3926 unwind
.personality_routine
= 0;
3931 int dummy ATTRIBUTE_UNUSED
;
3933 unwind
.prologue
= 0;
3934 unwind
.prologue_mask
= 0;
3936 add_unwind_entry (output_body ());
3937 demand_empty_rest_of_line ();
3941 dot_prologue (dummy
)
3942 int dummy ATTRIBUTE_UNUSED
;
3945 int mask
= 0, grsave
= 0;
3947 if (!is_it_end_of_statement ())
3950 sep
= parse_operand (&e1
);
3952 as_bad ("No second operand to .prologue");
3953 sep
= parse_operand (&e2
);
3954 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3955 ignore_rest_of_line ();
3957 if (e1
.X_op
== O_constant
)
3959 mask
= e1
.X_add_number
;
3961 if (e2
.X_op
== O_constant
)
3962 grsave
= e2
.X_add_number
;
3963 else if (e2
.X_op
== O_register
3964 && (grsave
= e2
.X_add_number
- REG_GR
) < 128)
3967 as_bad ("Second operand not a constant or general register");
3969 add_unwind_entry (output_prologue_gr (mask
, grsave
));
3972 as_bad ("First operand not a constant");
3975 add_unwind_entry (output_prologue ());
3977 unwind
.prologue
= 1;
3978 unwind
.prologue_mask
= mask
;
3979 ++unwind
.prologue_count
;
3984 int dummy ATTRIBUTE_UNUSED
;
3988 int bytes_per_address
;
3991 subsegT saved_subseg
;
3992 const char *sec_name
, *text_name
;
3996 if (unwind
.saved_text_seg
)
3998 saved_seg
= unwind
.saved_text_seg
;
3999 saved_subseg
= unwind
.saved_text_subseg
;
4000 unwind
.saved_text_seg
= NULL
;
4004 saved_seg
= now_seg
;
4005 saved_subseg
= now_subseg
;
4009 Use a slightly ugly scheme to derive the unwind section names from
4010 the text section name:
4012 text sect. unwind table sect.
4013 name: name: comments:
4014 ---------- ----------------- --------------------------------
4016 .text.foo .IA_64.unwind.text.foo
4017 .foo .IA_64.unwind.foo
4019 .gnu.linkonce.ia64unw.foo
4020 _info .IA_64.unwind_info gas issues error message (ditto)
4021 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
4023 This mapping is done so that:
4025 (a) An object file with unwind info only in .text will use
4026 unwind section names .IA_64.unwind and .IA_64.unwind_info.
4027 This follows the letter of the ABI and also ensures backwards
4028 compatibility with older toolchains.
4030 (b) An object file with unwind info in multiple text sections
4031 will use separate unwind sections for each text section.
4032 This allows us to properly set the "sh_info" and "sh_link"
4033 fields in SHT_IA_64_UNWIND as required by the ABI and also
4034 lets GNU ld support programs with multiple segments
4035 containing unwind info (as might be the case for certain
4036 embedded applications).
4038 (c) An error is issued if there would be a name clash.
4040 text_name
= segment_name (saved_seg
);
4041 if (strncmp (text_name
, "_info", 5) == 0)
4043 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
4045 ignore_rest_of_line ();
4048 if (strcmp (text_name
, ".text") == 0)
4051 insn_group_break (1, 0, 0);
4053 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4055 generate_unwind_image (text_name
);
4057 if (unwind
.info
|| unwind
.force_unwind_entry
)
4059 subseg_set (md
.last_text_seg
, 0);
4060 unwind
.proc_end
= expr_build_dot ();
4062 make_unw_section_name (SPECIAL_SECTION_UNWIND
, text_name
, sec_name
);
4063 set_section ((char *) sec_name
);
4064 bfd_set_section_flags (stdoutput
, now_seg
,
4065 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
4067 /* Make sure that section has 4 byte alignment for ILP32 and
4068 8 byte alignment for LP64. */
4069 record_alignment (now_seg
, md
.pointer_size_shift
);
4071 /* Need space for 3 pointers for procedure start, procedure end,
4073 ptr
= frag_more (3 * md
.pointer_size
);
4074 where
= frag_now_fix () - (3 * md
.pointer_size
);
4075 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4077 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4078 e
.X_op
= O_pseudo_fixup
;
4079 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4081 e
.X_add_symbol
= unwind
.proc_start
;
4082 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4084 e
.X_op
= O_pseudo_fixup
;
4085 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4087 e
.X_add_symbol
= unwind
.proc_end
;
4088 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4089 bytes_per_address
, &e
);
4093 e
.X_op
= O_pseudo_fixup
;
4094 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4096 e
.X_add_symbol
= unwind
.info
;
4097 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4098 bytes_per_address
, &e
);
4101 md_number_to_chars (ptr
+ (bytes_per_address
* 2), 0,
4105 subseg_set (saved_seg
, saved_subseg
);
4107 /* Parse names of main and alternate entry points and set symbol sizes. */
4111 name
= input_line_pointer
;
4112 c
= get_symbol_end ();
4113 p
= input_line_pointer
;
4114 sym
= symbol_find (name
);
4115 if (sym
&& unwind
.proc_start
4116 && (symbol_get_bfdsym (sym
)->flags
& BSF_FUNCTION
)
4117 && S_GET_SIZE (sym
) == 0 && symbol_get_obj (sym
)->size
== NULL
)
4119 fragS
*fr
= symbol_get_frag (unwind
.proc_start
);
4120 fragS
*frag
= symbol_get_frag (sym
);
4122 /* Check whether the function label is at or beyond last
4124 while (fr
&& fr
!= frag
)
4128 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4129 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4132 symbol_get_obj (sym
)->size
=
4133 (expressionS
*) xmalloc (sizeof (expressionS
));
4134 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4135 symbol_get_obj (sym
)->size
->X_add_symbol
4136 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4137 frag_now_fix (), frag_now
);
4138 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4139 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4145 if (*input_line_pointer
!= ',')
4147 ++input_line_pointer
;
4149 demand_empty_rest_of_line ();
4150 unwind
.proc_start
= unwind
.proc_end
= unwind
.info
= 0;
4154 dot_template (template)
4157 CURR_SLOT
.user_template
= template;
4162 int dummy ATTRIBUTE_UNUSED
;
4164 int ins
, locs
, outs
, rots
;
4166 if (is_it_end_of_statement ())
4167 ins
= locs
= outs
= rots
= 0;
4170 ins
= get_absolute_expression ();
4171 if (*input_line_pointer
++ != ',')
4173 locs
= get_absolute_expression ();
4174 if (*input_line_pointer
++ != ',')
4176 outs
= get_absolute_expression ();
4177 if (*input_line_pointer
++ != ',')
4179 rots
= get_absolute_expression ();
4181 set_regstack (ins
, locs
, outs
, rots
);
4185 as_bad ("Comma expected");
4186 ignore_rest_of_line ();
4193 unsigned num_regs
, num_alloced
= 0;
4194 struct dynreg
**drpp
, *dr
;
4195 int ch
, base_reg
= 0;
4201 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4202 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4203 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4207 /* First, remove existing names from hash table. */
4208 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4210 hash_delete (md
.dynreg_hash
, dr
->name
);
4214 drpp
= &md
.dynreg
[type
];
4217 start
= input_line_pointer
;
4218 ch
= get_symbol_end ();
4219 *input_line_pointer
= ch
;
4220 len
= (input_line_pointer
- start
);
4223 if (*input_line_pointer
!= '[')
4225 as_bad ("Expected '['");
4228 ++input_line_pointer
; /* skip '[' */
4230 num_regs
= get_absolute_expression ();
4232 if (*input_line_pointer
++ != ']')
4234 as_bad ("Expected ']'");
4239 num_alloced
+= num_regs
;
4243 if (num_alloced
> md
.rot
.num_regs
)
4245 as_bad ("Used more than the declared %d rotating registers",
4251 if (num_alloced
> 96)
4253 as_bad ("Used more than the available 96 rotating registers");
4258 if (num_alloced
> 48)
4260 as_bad ("Used more than the available 48 rotating registers");
4269 name
= obstack_alloc (¬es
, len
+ 1);
4270 memcpy (name
, start
, len
);
4275 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4276 memset (*drpp
, 0, sizeof (*dr
));
4281 dr
->num_regs
= num_regs
;
4282 dr
->base
= base_reg
;
4284 base_reg
+= num_regs
;
4286 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4288 as_bad ("Attempt to redefine register set `%s'", name
);
4292 if (*input_line_pointer
!= ',')
4294 ++input_line_pointer
; /* skip comma */
4297 demand_empty_rest_of_line ();
4301 ignore_rest_of_line ();
4305 dot_byteorder (byteorder
)
4308 segment_info_type
*seginfo
= seg_info (now_seg
);
4310 if (byteorder
== -1)
4312 if (seginfo
->tc_segment_info_data
.endian
== 0)
4313 seginfo
->tc_segment_info_data
.endian
4314 = TARGET_BYTES_BIG_ENDIAN
? 1 : 2;
4315 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4318 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4320 if (target_big_endian
!= byteorder
)
4322 target_big_endian
= byteorder
;
4323 if (target_big_endian
)
4325 ia64_number_to_chars
= number_to_chars_bigendian
;
4326 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4330 ia64_number_to_chars
= number_to_chars_littleendian
;
4331 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4338 int dummy ATTRIBUTE_UNUSED
;
4345 option
= input_line_pointer
;
4346 ch
= get_symbol_end ();
4347 if (strcmp (option
, "lsb") == 0)
4348 md
.flags
&= ~EF_IA_64_BE
;
4349 else if (strcmp (option
, "msb") == 0)
4350 md
.flags
|= EF_IA_64_BE
;
4351 else if (strcmp (option
, "abi32") == 0)
4352 md
.flags
&= ~EF_IA_64_ABI64
;
4353 else if (strcmp (option
, "abi64") == 0)
4354 md
.flags
|= EF_IA_64_ABI64
;
4356 as_bad ("Unknown psr option `%s'", option
);
4357 *input_line_pointer
= ch
;
4360 if (*input_line_pointer
!= ',')
4363 ++input_line_pointer
;
4366 demand_empty_rest_of_line ();
4371 int dummy ATTRIBUTE_UNUSED
;
4373 new_logical_line (0, get_absolute_expression ());
4374 demand_empty_rest_of_line ();
4378 parse_section_name ()
4384 if (*input_line_pointer
!= '"')
4386 as_bad ("Missing section name");
4387 ignore_rest_of_line ();
4390 name
= demand_copy_C_string (&len
);
4393 ignore_rest_of_line ();
4397 if (*input_line_pointer
!= ',')
4399 as_bad ("Comma expected after section name");
4400 ignore_rest_of_line ();
4403 ++input_line_pointer
; /* skip comma */
4411 char *name
= parse_section_name ();
4415 md
.keep_pending_output
= 1;
4418 obj_elf_previous (0);
4419 md
.keep_pending_output
= 0;
4422 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4425 stmt_float_cons (kind
)
4446 ia64_do_align (alignment
);
4454 int saved_auto_align
= md
.auto_align
;
4458 md
.auto_align
= saved_auto_align
;
4462 dot_xfloat_cons (kind
)
4465 char *name
= parse_section_name ();
4469 md
.keep_pending_output
= 1;
4471 stmt_float_cons (kind
);
4472 obj_elf_previous (0);
4473 md
.keep_pending_output
= 0;
4477 dot_xstringer (zero
)
4480 char *name
= parse_section_name ();
4484 md
.keep_pending_output
= 1;
4487 obj_elf_previous (0);
4488 md
.keep_pending_output
= 0;
4495 int saved_auto_align
= md
.auto_align
;
4496 char *name
= parse_section_name ();
4500 md
.keep_pending_output
= 1;
4504 md
.auto_align
= saved_auto_align
;
4505 obj_elf_previous (0);
4506 md
.keep_pending_output
= 0;
4510 dot_xfloat_cons_ua (kind
)
4513 int saved_auto_align
= md
.auto_align
;
4514 char *name
= parse_section_name ();
4518 md
.keep_pending_output
= 1;
4521 stmt_float_cons (kind
);
4522 md
.auto_align
= saved_auto_align
;
4523 obj_elf_previous (0);
4524 md
.keep_pending_output
= 0;
4527 /* .reg.val <regname>,value */
4531 int dummy ATTRIBUTE_UNUSED
;
4536 if (reg
.X_op
!= O_register
)
4538 as_bad (_("Register name expected"));
4539 ignore_rest_of_line ();
4541 else if (*input_line_pointer
++ != ',')
4543 as_bad (_("Comma expected"));
4544 ignore_rest_of_line ();
4548 valueT value
= get_absolute_expression ();
4549 int regno
= reg
.X_add_number
;
4550 if (regno
< REG_GR
|| regno
> REG_GR
+ 128)
4551 as_warn (_("Register value annotation ignored"));
4554 gr_values
[regno
- REG_GR
].known
= 1;
4555 gr_values
[regno
- REG_GR
].value
= value
;
4556 gr_values
[regno
- REG_GR
].path
= md
.path
;
4559 demand_empty_rest_of_line ();
4562 /* select dv checking mode
4567 A stop is inserted when changing modes
4574 if (md
.manual_bundling
)
4575 as_warn (_("Directive invalid within a bundle"));
4577 if (type
== 'E' || type
== 'A')
4578 md
.mode_explicitly_set
= 0;
4580 md
.mode_explicitly_set
= 1;
4587 if (md
.explicit_mode
)
4588 insn_group_break (1, 0, 0);
4589 md
.explicit_mode
= 0;
4593 if (!md
.explicit_mode
)
4594 insn_group_break (1, 0, 0);
4595 md
.explicit_mode
= 1;
4599 if (md
.explicit_mode
!= md
.default_explicit_mode
)
4600 insn_group_break (1, 0, 0);
4601 md
.explicit_mode
= md
.default_explicit_mode
;
4602 md
.mode_explicitly_set
= 0;
4613 for (regno
= 0; regno
< 64; regno
++)
4615 if (mask
& ((valueT
) 1 << regno
))
4617 fprintf (stderr
, "%s p%d", comma
, regno
);
4624 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4625 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4626 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4627 .pred.safe_across_calls p1 [, p2 [,...]]
4636 int p1
= -1, p2
= -1;
4640 if (*input_line_pointer
!= '"')
4642 as_bad (_("Missing predicate relation type"));
4643 ignore_rest_of_line ();
4649 char *form
= demand_copy_C_string (&len
);
4650 if (strcmp (form
, "mutex") == 0)
4652 else if (strcmp (form
, "clear") == 0)
4654 else if (strcmp (form
, "imply") == 0)
4658 as_bad (_("Unrecognized predicate relation type"));
4659 ignore_rest_of_line ();
4663 if (*input_line_pointer
== ',')
4664 ++input_line_pointer
;
4674 if (TOUPPER (*input_line_pointer
) != 'P'
4675 || (regno
= atoi (++input_line_pointer
)) < 0
4678 as_bad (_("Predicate register expected"));
4679 ignore_rest_of_line ();
4682 while (ISDIGIT (*input_line_pointer
))
4683 ++input_line_pointer
;
4690 as_warn (_("Duplicate predicate register ignored"));
4693 /* See if it's a range. */
4694 if (*input_line_pointer
== '-')
4697 ++input_line_pointer
;
4699 if (TOUPPER (*input_line_pointer
) != 'P'
4700 || (regno
= atoi (++input_line_pointer
)) < 0
4703 as_bad (_("Predicate register expected"));
4704 ignore_rest_of_line ();
4707 while (ISDIGIT (*input_line_pointer
))
4708 ++input_line_pointer
;
4712 as_bad (_("Bad register range"));
4713 ignore_rest_of_line ();
4724 if (*input_line_pointer
!= ',')
4726 ++input_line_pointer
;
4735 clear_qp_mutex (mask
);
4736 clear_qp_implies (mask
, (valueT
) 0);
4739 if (count
!= 2 || p1
== -1 || p2
== -1)
4740 as_bad (_("Predicate source and target required"));
4741 else if (p1
== 0 || p2
== 0)
4742 as_bad (_("Use of p0 is not valid in this context"));
4744 add_qp_imply (p1
, p2
);
4749 as_bad (_("At least two PR arguments expected"));
4754 as_bad (_("Use of p0 is not valid in this context"));
4757 add_qp_mutex (mask
);
4760 /* note that we don't override any existing relations */
4763 as_bad (_("At least one PR argument expected"));
4768 fprintf (stderr
, "Safe across calls: ");
4769 print_prmask (mask
);
4770 fprintf (stderr
, "\n");
4772 qp_safe_across_calls
= mask
;
4775 demand_empty_rest_of_line ();
4778 /* .entry label [, label [, ...]]
4779 Hint to DV code that the given labels are to be considered entry points.
4780 Otherwise, only global labels are considered entry points. */
4784 int dummy ATTRIBUTE_UNUSED
;
4793 name
= input_line_pointer
;
4794 c
= get_symbol_end ();
4795 symbolP
= symbol_find_or_make (name
);
4797 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
4799 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
4802 *input_line_pointer
= c
;
4804 c
= *input_line_pointer
;
4807 input_line_pointer
++;
4809 if (*input_line_pointer
== '\n')
4815 demand_empty_rest_of_line ();
4818 /* .mem.offset offset, base
4819 "base" is used to distinguish between offsets from a different base. */
4822 dot_mem_offset (dummy
)
4823 int dummy ATTRIBUTE_UNUSED
;
4825 md
.mem_offset
.hint
= 1;
4826 md
.mem_offset
.offset
= get_absolute_expression ();
4827 if (*input_line_pointer
!= ',')
4829 as_bad (_("Comma expected"));
4830 ignore_rest_of_line ();
4833 ++input_line_pointer
;
4834 md
.mem_offset
.base
= get_absolute_expression ();
4835 demand_empty_rest_of_line ();
4838 /* ia64-specific pseudo-ops: */
4839 const pseudo_typeS md_pseudo_table
[] =
4841 { "radix", dot_radix
, 0 },
4842 { "lcomm", s_lcomm_bytes
, 1 },
4843 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
4844 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
4845 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
4846 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
4847 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
4848 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
4849 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
4850 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
4851 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
4852 { "proc", dot_proc
, 0 },
4853 { "body", dot_body
, 0 },
4854 { "prologue", dot_prologue
, 0 },
4855 { "endp", dot_endp
, 0 },
4857 { "fframe", dot_fframe
, 0 },
4858 { "vframe", dot_vframe
, 0 },
4859 { "vframesp", dot_vframesp
, 0 },
4860 { "vframepsp", dot_vframepsp
, 0 },
4861 { "save", dot_save
, 0 },
4862 { "restore", dot_restore
, 0 },
4863 { "restorereg", dot_restorereg
, 0 },
4864 { "restorereg.p", dot_restorereg_p
, 0 },
4865 { "handlerdata", dot_handlerdata
, 0 },
4866 { "unwentry", dot_unwentry
, 0 },
4867 { "altrp", dot_altrp
, 0 },
4868 { "savesp", dot_savemem
, 0 },
4869 { "savepsp", dot_savemem
, 1 },
4870 { "save.g", dot_saveg
, 0 },
4871 { "save.f", dot_savef
, 0 },
4872 { "save.b", dot_saveb
, 0 },
4873 { "save.gf", dot_savegf
, 0 },
4874 { "spill", dot_spill
, 0 },
4875 { "spillreg", dot_spillreg
, 0 },
4876 { "spillsp", dot_spillmem
, 0 },
4877 { "spillpsp", dot_spillmem
, 1 },
4878 { "spillreg.p", dot_spillreg_p
, 0 },
4879 { "spillsp.p", dot_spillmem_p
, 0 },
4880 { "spillpsp.p", dot_spillmem_p
, 1 },
4881 { "label_state", dot_label_state
, 0 },
4882 { "copy_state", dot_copy_state
, 0 },
4883 { "unwabi", dot_unwabi
, 0 },
4884 { "personality", dot_personality
, 0 },
4886 { "estate", dot_estate
, 0 },
4888 { "mii", dot_template
, 0x0 },
4889 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
4890 { "mlx", dot_template
, 0x2 },
4891 { "mmi", dot_template
, 0x4 },
4892 { "mfi", dot_template
, 0x6 },
4893 { "mmf", dot_template
, 0x7 },
4894 { "mib", dot_template
, 0x8 },
4895 { "mbb", dot_template
, 0x9 },
4896 { "bbb", dot_template
, 0xb },
4897 { "mmb", dot_template
, 0xc },
4898 { "mfb", dot_template
, 0xe },
4900 { "lb", dot_scope
, 0 },
4901 { "le", dot_scope
, 1 },
4903 { "align", s_align_bytes
, 0 },
4904 { "regstk", dot_regstk
, 0 },
4905 { "rotr", dot_rot
, DYNREG_GR
},
4906 { "rotf", dot_rot
, DYNREG_FR
},
4907 { "rotp", dot_rot
, DYNREG_PR
},
4908 { "lsb", dot_byteorder
, 0 },
4909 { "msb", dot_byteorder
, 1 },
4910 { "psr", dot_psr
, 0 },
4911 { "alias", dot_alias
, 0 },
4912 { "secalias", dot_alias
, 1 },
4913 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
4915 { "xdata1", dot_xdata
, 1 },
4916 { "xdata2", dot_xdata
, 2 },
4917 { "xdata4", dot_xdata
, 4 },
4918 { "xdata8", dot_xdata
, 8 },
4919 { "xreal4", dot_xfloat_cons
, 'f' },
4920 { "xreal8", dot_xfloat_cons
, 'd' },
4921 { "xreal10", dot_xfloat_cons
, 'x' },
4922 { "xreal16", dot_xfloat_cons
, 'X' },
4923 { "xstring", dot_xstringer
, 0 },
4924 { "xstringz", dot_xstringer
, 1 },
4926 /* unaligned versions: */
4927 { "xdata2.ua", dot_xdata_ua
, 2 },
4928 { "xdata4.ua", dot_xdata_ua
, 4 },
4929 { "xdata8.ua", dot_xdata_ua
, 8 },
4930 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
4931 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
4932 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
4933 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
4935 /* annotations/DV checking support */
4936 { "entry", dot_entry
, 0 },
4937 { "mem.offset", dot_mem_offset
, 0 },
4938 { "pred.rel", dot_pred_rel
, 0 },
4939 { "pred.rel.clear", dot_pred_rel
, 'c' },
4940 { "pred.rel.imply", dot_pred_rel
, 'i' },
4941 { "pred.rel.mutex", dot_pred_rel
, 'm' },
4942 { "pred.safe_across_calls", dot_pred_rel
, 's' },
4943 { "reg.val", dot_reg_val
, 0 },
4944 { "auto", dot_dv_mode
, 'a' },
4945 { "explicit", dot_dv_mode
, 'e' },
4946 { "default", dot_dv_mode
, 'd' },
4948 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
4949 IA-64 aligns data allocation pseudo-ops by default, so we have to
4950 tell it that these ones are supposed to be unaligned. Long term,
4951 should rewrite so that only IA-64 specific data allocation pseudo-ops
4952 are aligned by default. */
4953 {"2byte", stmt_cons_ua
, 2},
4954 {"4byte", stmt_cons_ua
, 4},
4955 {"8byte", stmt_cons_ua
, 8},
4960 static const struct pseudo_opcode
4963 void (*handler
) (int);
4968 /* these are more like pseudo-ops, but don't start with a dot */
4969 { "data1", cons
, 1 },
4970 { "data2", cons
, 2 },
4971 { "data4", cons
, 4 },
4972 { "data8", cons
, 8 },
4973 { "data16", cons
, 16 },
4974 { "real4", stmt_float_cons
, 'f' },
4975 { "real8", stmt_float_cons
, 'd' },
4976 { "real10", stmt_float_cons
, 'x' },
4977 { "real16", stmt_float_cons
, 'X' },
4978 { "string", stringer
, 0 },
4979 { "stringz", stringer
, 1 },
4981 /* unaligned versions: */
4982 { "data2.ua", stmt_cons_ua
, 2 },
4983 { "data4.ua", stmt_cons_ua
, 4 },
4984 { "data8.ua", stmt_cons_ua
, 8 },
4985 { "data16.ua", stmt_cons_ua
, 16 },
4986 { "real4.ua", float_cons
, 'f' },
4987 { "real8.ua", float_cons
, 'd' },
4988 { "real10.ua", float_cons
, 'x' },
4989 { "real16.ua", float_cons
, 'X' },
4992 /* Declare a register by creating a symbol for it and entering it in
4993 the symbol table. */
4996 declare_register (name
, regnum
)
5003 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
5005 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5007 as_fatal ("Inserting \"%s\" into register table failed: %s",
5014 declare_register_set (prefix
, num_regs
, base_regnum
)
5022 for (i
= 0; i
< num_regs
; ++i
)
5024 sprintf (name
, "%s%u", prefix
, i
);
5025 declare_register (name
, base_regnum
+ i
);
5030 operand_width (opnd
)
5031 enum ia64_opnd opnd
;
5033 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5034 unsigned int bits
= 0;
5038 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5039 bits
+= odesc
->field
[i
].bits
;
5044 static enum operand_match_result
5045 operand_match (idesc
, index
, e
)
5046 const struct ia64_opcode
*idesc
;
5050 enum ia64_opnd opnd
= idesc
->operands
[index
];
5051 int bits
, relocatable
= 0;
5052 struct insn_fix
*fix
;
5059 case IA64_OPND_AR_CCV
:
5060 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5061 return OPERAND_MATCH
;
5064 case IA64_OPND_AR_CSD
:
5065 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5066 return OPERAND_MATCH
;
5069 case IA64_OPND_AR_PFS
:
5070 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5071 return OPERAND_MATCH
;
5075 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5076 return OPERAND_MATCH
;
5080 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5081 return OPERAND_MATCH
;
5085 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5086 return OPERAND_MATCH
;
5089 case IA64_OPND_PR_ROT
:
5090 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5091 return OPERAND_MATCH
;
5095 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5096 return OPERAND_MATCH
;
5099 case IA64_OPND_PSR_L
:
5100 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5101 return OPERAND_MATCH
;
5104 case IA64_OPND_PSR_UM
:
5105 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5106 return OPERAND_MATCH
;
5110 if (e
->X_op
== O_constant
)
5112 if (e
->X_add_number
== 1)
5113 return OPERAND_MATCH
;
5115 return OPERAND_OUT_OF_RANGE
;
5120 if (e
->X_op
== O_constant
)
5122 if (e
->X_add_number
== 8)
5123 return OPERAND_MATCH
;
5125 return OPERAND_OUT_OF_RANGE
;
5130 if (e
->X_op
== O_constant
)
5132 if (e
->X_add_number
== 16)
5133 return OPERAND_MATCH
;
5135 return OPERAND_OUT_OF_RANGE
;
5139 /* register operands: */
5142 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5143 && e
->X_add_number
< REG_AR
+ 128)
5144 return OPERAND_MATCH
;
5149 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5150 && e
->X_add_number
< REG_BR
+ 8)
5151 return OPERAND_MATCH
;
5155 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5156 && e
->X_add_number
< REG_CR
+ 128)
5157 return OPERAND_MATCH
;
5164 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5165 && e
->X_add_number
< REG_FR
+ 128)
5166 return OPERAND_MATCH
;
5171 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5172 && e
->X_add_number
< REG_P
+ 64)
5173 return OPERAND_MATCH
;
5179 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5180 && e
->X_add_number
< REG_GR
+ 128)
5181 return OPERAND_MATCH
;
5184 case IA64_OPND_R3_2
:
5185 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5187 if (e
->X_add_number
< REG_GR
+ 4)
5188 return OPERAND_MATCH
;
5189 else if (e
->X_add_number
< REG_GR
+ 128)
5190 return OPERAND_OUT_OF_RANGE
;
5194 /* indirect operands: */
5195 case IA64_OPND_CPUID_R3
:
5196 case IA64_OPND_DBR_R3
:
5197 case IA64_OPND_DTR_R3
:
5198 case IA64_OPND_ITR_R3
:
5199 case IA64_OPND_IBR_R3
:
5200 case IA64_OPND_MSR_R3
:
5201 case IA64_OPND_PKR_R3
:
5202 case IA64_OPND_PMC_R3
:
5203 case IA64_OPND_PMD_R3
:
5204 case IA64_OPND_RR_R3
:
5205 if (e
->X_op
== O_index
&& e
->X_op_symbol
5206 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5207 == opnd
- IA64_OPND_CPUID_R3
))
5208 return OPERAND_MATCH
;
5212 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5213 return OPERAND_MATCH
;
5216 /* immediate operands: */
5217 case IA64_OPND_CNT2a
:
5218 case IA64_OPND_LEN4
:
5219 case IA64_OPND_LEN6
:
5220 bits
= operand_width (idesc
->operands
[index
]);
5221 if (e
->X_op
== O_constant
)
5223 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5224 return OPERAND_MATCH
;
5226 return OPERAND_OUT_OF_RANGE
;
5230 case IA64_OPND_CNT2b
:
5231 if (e
->X_op
== O_constant
)
5233 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5234 return OPERAND_MATCH
;
5236 return OPERAND_OUT_OF_RANGE
;
5240 case IA64_OPND_CNT2c
:
5241 val
= e
->X_add_number
;
5242 if (e
->X_op
== O_constant
)
5244 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5245 return OPERAND_MATCH
;
5247 return OPERAND_OUT_OF_RANGE
;
5252 /* SOR must be an integer multiple of 8 */
5253 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5254 return OPERAND_OUT_OF_RANGE
;
5257 if (e
->X_op
== O_constant
)
5259 if ((bfd_vma
) e
->X_add_number
<= 96)
5260 return OPERAND_MATCH
;
5262 return OPERAND_OUT_OF_RANGE
;
5266 case IA64_OPND_IMMU62
:
5267 if (e
->X_op
== O_constant
)
5269 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5270 return OPERAND_MATCH
;
5272 return OPERAND_OUT_OF_RANGE
;
5276 /* FIXME -- need 62-bit relocation type */
5277 as_bad (_("62-bit relocation not yet implemented"));
5281 case IA64_OPND_IMMU64
:
5282 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5283 || e
->X_op
== O_subtract
)
5285 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5286 fix
->code
= BFD_RELOC_IA64_IMM64
;
5287 if (e
->X_op
!= O_subtract
)
5289 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5290 if (e
->X_op
== O_pseudo_fixup
)
5294 fix
->opnd
= idesc
->operands
[index
];
5297 ++CURR_SLOT
.num_fixups
;
5298 return OPERAND_MATCH
;
5300 else if (e
->X_op
== O_constant
)
5301 return OPERAND_MATCH
;
5304 case IA64_OPND_CCNT5
:
5305 case IA64_OPND_CNT5
:
5306 case IA64_OPND_CNT6
:
5307 case IA64_OPND_CPOS6a
:
5308 case IA64_OPND_CPOS6b
:
5309 case IA64_OPND_CPOS6c
:
5310 case IA64_OPND_IMMU2
:
5311 case IA64_OPND_IMMU7a
:
5312 case IA64_OPND_IMMU7b
:
5313 case IA64_OPND_IMMU21
:
5314 case IA64_OPND_IMMU24
:
5315 case IA64_OPND_MBTYPE4
:
5316 case IA64_OPND_MHTYPE8
:
5317 case IA64_OPND_POS6
:
5318 bits
= operand_width (idesc
->operands
[index
]);
5319 if (e
->X_op
== O_constant
)
5321 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5322 return OPERAND_MATCH
;
5324 return OPERAND_OUT_OF_RANGE
;
5328 case IA64_OPND_IMMU9
:
5329 bits
= operand_width (idesc
->operands
[index
]);
5330 if (e
->X_op
== O_constant
)
5332 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5334 int lobits
= e
->X_add_number
& 0x3;
5335 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5336 e
->X_add_number
|= (bfd_vma
) 0x3;
5337 return OPERAND_MATCH
;
5340 return OPERAND_OUT_OF_RANGE
;
5344 case IA64_OPND_IMM44
:
5345 /* least 16 bits must be zero */
5346 if ((e
->X_add_number
& 0xffff) != 0)
5347 /* XXX technically, this is wrong: we should not be issuing warning
5348 messages until we're sure this instruction pattern is going to
5350 as_warn (_("lower 16 bits of mask ignored"));
5352 if (e
->X_op
== O_constant
)
5354 if (((e
->X_add_number
>= 0
5355 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5356 || (e
->X_add_number
< 0
5357 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5360 if (e
->X_add_number
>= 0
5361 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5363 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5365 return OPERAND_MATCH
;
5368 return OPERAND_OUT_OF_RANGE
;
5372 case IA64_OPND_IMM17
:
5373 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5374 if (e
->X_op
== O_constant
)
5376 if (((e
->X_add_number
>= 0
5377 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5378 || (e
->X_add_number
< 0
5379 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5382 if (e
->X_add_number
>= 0
5383 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5385 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5387 return OPERAND_MATCH
;
5390 return OPERAND_OUT_OF_RANGE
;
5394 case IA64_OPND_IMM14
:
5395 case IA64_OPND_IMM22
:
5397 case IA64_OPND_IMM1
:
5398 case IA64_OPND_IMM8
:
5399 case IA64_OPND_IMM8U4
:
5400 case IA64_OPND_IMM8M1
:
5401 case IA64_OPND_IMM8M1U4
:
5402 case IA64_OPND_IMM8M1U8
:
5403 case IA64_OPND_IMM9a
:
5404 case IA64_OPND_IMM9b
:
5405 bits
= operand_width (idesc
->operands
[index
]);
5406 if (relocatable
&& (e
->X_op
== O_symbol
5407 || e
->X_op
== O_subtract
5408 || e
->X_op
== O_pseudo_fixup
))
5410 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5412 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5413 fix
->code
= BFD_RELOC_IA64_IMM14
;
5415 fix
->code
= BFD_RELOC_IA64_IMM22
;
5417 if (e
->X_op
!= O_subtract
)
5419 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5420 if (e
->X_op
== O_pseudo_fixup
)
5424 fix
->opnd
= idesc
->operands
[index
];
5427 ++CURR_SLOT
.num_fixups
;
5428 return OPERAND_MATCH
;
5430 else if (e
->X_op
!= O_constant
5431 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5432 return OPERAND_MISMATCH
;
5434 if (opnd
== IA64_OPND_IMM8M1U4
)
5436 /* Zero is not valid for unsigned compares that take an adjusted
5437 constant immediate range. */
5438 if (e
->X_add_number
== 0)
5439 return OPERAND_OUT_OF_RANGE
;
5441 /* Sign-extend 32-bit unsigned numbers, so that the following range
5442 checks will work. */
5443 val
= e
->X_add_number
;
5444 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5445 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5446 val
= ((val
<< 32) >> 32);
5448 /* Check for 0x100000000. This is valid because
5449 0x100000000-1 is the same as ((uint32_t) -1). */
5450 if (val
== ((bfd_signed_vma
) 1 << 32))
5451 return OPERAND_MATCH
;
5455 else if (opnd
== IA64_OPND_IMM8M1U8
)
5457 /* Zero is not valid for unsigned compares that take an adjusted
5458 constant immediate range. */
5459 if (e
->X_add_number
== 0)
5460 return OPERAND_OUT_OF_RANGE
;
5462 /* Check for 0x10000000000000000. */
5463 if (e
->X_op
== O_big
)
5465 if (generic_bignum
[0] == 0
5466 && generic_bignum
[1] == 0
5467 && generic_bignum
[2] == 0
5468 && generic_bignum
[3] == 0
5469 && generic_bignum
[4] == 1)
5470 return OPERAND_MATCH
;
5472 return OPERAND_OUT_OF_RANGE
;
5475 val
= e
->X_add_number
- 1;
5477 else if (opnd
== IA64_OPND_IMM8M1
)
5478 val
= e
->X_add_number
- 1;
5479 else if (opnd
== IA64_OPND_IMM8U4
)
5481 /* Sign-extend 32-bit unsigned numbers, so that the following range
5482 checks will work. */
5483 val
= e
->X_add_number
;
5484 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5485 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5486 val
= ((val
<< 32) >> 32);
5489 val
= e
->X_add_number
;
5491 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5492 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5493 return OPERAND_MATCH
;
5495 return OPERAND_OUT_OF_RANGE
;
5497 case IA64_OPND_INC3
:
5498 /* +/- 1, 4, 8, 16 */
5499 val
= e
->X_add_number
;
5502 if (e
->X_op
== O_constant
)
5504 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5505 return OPERAND_MATCH
;
5507 return OPERAND_OUT_OF_RANGE
;
5511 case IA64_OPND_TGT25
:
5512 case IA64_OPND_TGT25b
:
5513 case IA64_OPND_TGT25c
:
5514 case IA64_OPND_TGT64
:
5515 if (e
->X_op
== O_symbol
)
5517 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5518 if (opnd
== IA64_OPND_TGT25
)
5519 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5520 else if (opnd
== IA64_OPND_TGT25b
)
5521 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5522 else if (opnd
== IA64_OPND_TGT25c
)
5523 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5524 else if (opnd
== IA64_OPND_TGT64
)
5525 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5529 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5530 fix
->opnd
= idesc
->operands
[index
];
5533 ++CURR_SLOT
.num_fixups
;
5534 return OPERAND_MATCH
;
5536 case IA64_OPND_TAG13
:
5537 case IA64_OPND_TAG13b
:
5541 return OPERAND_MATCH
;
5544 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5545 /* There are no external relocs for TAG13/TAG13b fields, so we
5546 create a dummy reloc. This will not live past md_apply_fix3. */
5547 fix
->code
= BFD_RELOC_UNUSED
;
5548 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5549 fix
->opnd
= idesc
->operands
[index
];
5552 ++CURR_SLOT
.num_fixups
;
5553 return OPERAND_MATCH
;
5560 case IA64_OPND_LDXMOV
:
5561 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5562 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5563 fix
->opnd
= idesc
->operands
[index
];
5566 ++CURR_SLOT
.num_fixups
;
5567 return OPERAND_MATCH
;
5572 return OPERAND_MISMATCH
;
5581 memset (e
, 0, sizeof (*e
));
5584 if (*input_line_pointer
!= '}')
5586 sep
= *input_line_pointer
++;
5590 if (!md
.manual_bundling
)
5591 as_warn ("Found '}' when manual bundling is off");
5593 CURR_SLOT
.manual_bundling_off
= 1;
5594 md
.manual_bundling
= 0;
5600 /* Returns the next entry in the opcode table that matches the one in
5601 IDESC, and frees the entry in IDESC. If no matching entry is
5602 found, NULL is returned instead. */
5604 static struct ia64_opcode
*
5605 get_next_opcode (struct ia64_opcode
*idesc
)
5607 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
5608 ia64_free_opcode (idesc
);
5612 /* Parse the operands for the opcode and find the opcode variant that
5613 matches the specified operands, or NULL if no match is possible. */
5615 static struct ia64_opcode
*
5616 parse_operands (idesc
)
5617 struct ia64_opcode
*idesc
;
5619 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
5620 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
5621 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
5622 enum operand_match_result result
;
5624 char *first_arg
= 0, *end
, *saved_input_pointer
;
5627 assert (strlen (idesc
->name
) <= 128);
5629 strcpy (mnemonic
, idesc
->name
);
5630 if (idesc
->operands
[2] == IA64_OPND_SOF
)
5632 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5633 can't parse the first operand until we have parsed the
5634 remaining operands of the "alloc" instruction. */
5636 first_arg
= input_line_pointer
;
5637 end
= strchr (input_line_pointer
, '=');
5640 as_bad ("Expected separator `='");
5643 input_line_pointer
= end
+ 1;
5648 for (; i
< NELEMS (CURR_SLOT
.opnd
); ++i
)
5650 sep
= parse_operand (CURR_SLOT
.opnd
+ i
);
5651 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
5656 if (sep
!= '=' && sep
!= ',')
5661 if (num_outputs
> 0)
5662 as_bad ("Duplicate equal sign (=) in instruction");
5664 num_outputs
= i
+ 1;
5669 as_bad ("Illegal operand separator `%c'", sep
);
5673 if (idesc
->operands
[2] == IA64_OPND_SOF
)
5675 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5676 know (strcmp (idesc
->name
, "alloc") == 0);
5677 if (num_operands
== 5 /* first_arg not included in this count! */
5678 && CURR_SLOT
.opnd
[2].X_op
== O_constant
5679 && CURR_SLOT
.opnd
[3].X_op
== O_constant
5680 && CURR_SLOT
.opnd
[4].X_op
== O_constant
5681 && CURR_SLOT
.opnd
[5].X_op
== O_constant
)
5683 sof
= set_regstack (CURR_SLOT
.opnd
[2].X_add_number
,
5684 CURR_SLOT
.opnd
[3].X_add_number
,
5685 CURR_SLOT
.opnd
[4].X_add_number
,
5686 CURR_SLOT
.opnd
[5].X_add_number
);
5688 /* now we can parse the first arg: */
5689 saved_input_pointer
= input_line_pointer
;
5690 input_line_pointer
= first_arg
;
5691 sep
= parse_operand (CURR_SLOT
.opnd
+ 0);
5693 --num_outputs
; /* force error */
5694 input_line_pointer
= saved_input_pointer
;
5696 CURR_SLOT
.opnd
[2].X_add_number
= sof
;
5697 CURR_SLOT
.opnd
[3].X_add_number
5698 = sof
- CURR_SLOT
.opnd
[4].X_add_number
;
5699 CURR_SLOT
.opnd
[4] = CURR_SLOT
.opnd
[5];
5703 highest_unmatched_operand
= 0;
5704 curr_out_of_range_pos
= -1;
5706 expected_operand
= idesc
->operands
[0];
5707 for (; idesc
; idesc
= get_next_opcode (idesc
))
5709 if (num_outputs
!= idesc
->num_outputs
)
5710 continue; /* mismatch in # of outputs */
5712 CURR_SLOT
.num_fixups
= 0;
5714 /* Try to match all operands. If we see an out-of-range operand,
5715 then continue trying to match the rest of the operands, since if
5716 the rest match, then this idesc will give the best error message. */
5718 out_of_range_pos
= -1;
5719 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
5721 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
5722 if (result
!= OPERAND_MATCH
)
5724 if (result
!= OPERAND_OUT_OF_RANGE
)
5726 if (out_of_range_pos
< 0)
5727 /* remember position of the first out-of-range operand: */
5728 out_of_range_pos
= i
;
5732 /* If we did not match all operands, or if at least one operand was
5733 out-of-range, then this idesc does not match. Keep track of which
5734 idesc matched the most operands before failing. If we have two
5735 idescs that failed at the same position, and one had an out-of-range
5736 operand, then prefer the out-of-range operand. Thus if we have
5737 "add r0=0x1000000,r1" we get an error saying the constant is out
5738 of range instead of an error saying that the constant should have been
5741 if (i
!= num_operands
|| out_of_range_pos
>= 0)
5743 if (i
> highest_unmatched_operand
5744 || (i
== highest_unmatched_operand
5745 && out_of_range_pos
> curr_out_of_range_pos
))
5747 highest_unmatched_operand
= i
;
5748 if (out_of_range_pos
>= 0)
5750 expected_operand
= idesc
->operands
[out_of_range_pos
];
5751 error_pos
= out_of_range_pos
;
5755 expected_operand
= idesc
->operands
[i
];
5758 curr_out_of_range_pos
= out_of_range_pos
;
5763 if (num_operands
< NELEMS (idesc
->operands
)
5764 && idesc
->operands
[num_operands
])
5765 continue; /* mismatch in number of arguments */
5771 if (expected_operand
)
5772 as_bad ("Operand %u of `%s' should be %s",
5773 error_pos
+ 1, mnemonic
,
5774 elf64_ia64_operands
[expected_operand
].desc
);
5776 as_bad ("Operand mismatch");
5782 /* Keep track of state necessary to determine whether a NOP is necessary
5783 to avoid an erratum in A and B step Itanium chips, and return 1 if we
5784 detect a case where additional NOPs may be necessary. */
5786 errata_nop_necessary_p (slot
, insn_unit
)
5788 enum ia64_unit insn_unit
;
5791 struct group
*this_group
= md
.last_groups
+ md
.group_idx
;
5792 struct group
*prev_group
= md
.last_groups
+ (md
.group_idx
+ 2) % 3;
5793 struct ia64_opcode
*idesc
= slot
->idesc
;
5795 /* Test whether this could be the first insn in a problematic sequence. */
5796 if (insn_unit
== IA64_UNIT_F
)
5798 for (i
= 0; i
< idesc
->num_outputs
; i
++)
5799 if (idesc
->operands
[i
] == IA64_OPND_P1
5800 || idesc
->operands
[i
] == IA64_OPND_P2
)
5802 int regno
= slot
->opnd
[i
].X_add_number
- REG_P
;
5803 /* Ignore invalid operands; they generate errors elsewhere. */
5806 this_group
->p_reg_set
[regno
] = 1;
5810 /* Test whether this could be the second insn in a problematic sequence. */
5811 if (insn_unit
== IA64_UNIT_M
&& slot
->qp_regno
> 0
5812 && prev_group
->p_reg_set
[slot
->qp_regno
])
5814 for (i
= 0; i
< idesc
->num_outputs
; i
++)
5815 if (idesc
->operands
[i
] == IA64_OPND_R1
5816 || idesc
->operands
[i
] == IA64_OPND_R2
5817 || idesc
->operands
[i
] == IA64_OPND_R3
)
5819 int regno
= slot
->opnd
[i
].X_add_number
- REG_GR
;
5820 /* Ignore invalid operands; they generate errors elsewhere. */
5823 if (strncmp (idesc
->name
, "add", 3) != 0
5824 && strncmp (idesc
->name
, "sub", 3) != 0
5825 && strncmp (idesc
->name
, "shladd", 6) != 0
5826 && (idesc
->flags
& IA64_OPCODE_POSTINC
) == 0)
5827 this_group
->g_reg_set_conditionally
[regno
] = 1;
5831 /* Test whether this could be the third insn in a problematic sequence. */
5832 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; i
++)
5834 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
5835 idesc
->operands
[i
] == IA64_OPND_R3
5836 /* For mov indirect. */
5837 || idesc
->operands
[i
] == IA64_OPND_RR_R3
5838 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
5839 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
5840 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
5841 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
5842 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
5843 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
5844 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
5846 || idesc
->operands
[i
] == IA64_OPND_ITR_R3
5847 || idesc
->operands
[i
] == IA64_OPND_DTR_R3
5848 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
5849 || idesc
->operands
[i
] == IA64_OPND_MR3
)
5851 int regno
= slot
->opnd
[i
].X_add_number
- REG_GR
;
5852 /* Ignore invalid operands; they generate errors elsewhere. */
5855 if (idesc
->operands
[i
] == IA64_OPND_R3
)
5857 if (strcmp (idesc
->name
, "fc") != 0
5858 && strcmp (idesc
->name
, "tak") != 0
5859 && strcmp (idesc
->name
, "thash") != 0
5860 && strcmp (idesc
->name
, "tpa") != 0
5861 && strcmp (idesc
->name
, "ttag") != 0
5862 && strncmp (idesc
->name
, "ptr", 3) != 0
5863 && strncmp (idesc
->name
, "ptc", 3) != 0
5864 && strncmp (idesc
->name
, "probe", 5) != 0)
5867 if (prev_group
->g_reg_set_conditionally
[regno
])
5875 build_insn (slot
, insnp
)
5879 const struct ia64_operand
*odesc
, *o2desc
;
5880 struct ia64_opcode
*idesc
= slot
->idesc
;
5881 bfd_signed_vma insn
, val
;
5885 insn
= idesc
->opcode
| slot
->qp_regno
;
5887 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
5889 if (slot
->opnd
[i
].X_op
== O_register
5890 || slot
->opnd
[i
].X_op
== O_constant
5891 || slot
->opnd
[i
].X_op
== O_index
)
5892 val
= slot
->opnd
[i
].X_add_number
;
5893 else if (slot
->opnd
[i
].X_op
== O_big
)
5895 /* This must be the value 0x10000000000000000. */
5896 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
5902 switch (idesc
->operands
[i
])
5904 case IA64_OPND_IMMU64
:
5905 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
5906 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
5907 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
5908 | (((val
>> 63) & 0x1) << 36));
5911 case IA64_OPND_IMMU62
:
5912 val
&= 0x3fffffffffffffffULL
;
5913 if (val
!= slot
->opnd
[i
].X_add_number
)
5914 as_warn (_("Value truncated to 62 bits"));
5915 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
5916 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
5919 case IA64_OPND_TGT64
:
5921 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
5922 insn
|= ((((val
>> 59) & 0x1) << 36)
5923 | (((val
>> 0) & 0xfffff) << 13));
5954 case IA64_OPND_R3_2
:
5955 case IA64_OPND_CPUID_R3
:
5956 case IA64_OPND_DBR_R3
:
5957 case IA64_OPND_DTR_R3
:
5958 case IA64_OPND_ITR_R3
:
5959 case IA64_OPND_IBR_R3
:
5961 case IA64_OPND_MSR_R3
:
5962 case IA64_OPND_PKR_R3
:
5963 case IA64_OPND_PMC_R3
:
5964 case IA64_OPND_PMD_R3
:
5965 case IA64_OPND_RR_R3
:
5973 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
5974 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
5976 as_bad_where (slot
->src_file
, slot
->src_line
,
5977 "Bad operand value: %s", err
);
5978 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
5980 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
5981 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
5983 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
5984 (*o2desc
->insert
) (o2desc
, val
, &insn
);
5986 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
5987 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
5988 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
5990 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
5991 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6001 unsigned int manual_bundling_on
= 0, manual_bundling_off
= 0;
6002 unsigned int manual_bundling
= 0;
6003 enum ia64_unit required_unit
, insn_unit
= 0;
6004 enum ia64_insn_type type
[3], insn_type
;
6005 unsigned int template, orig_template
;
6006 bfd_vma insn
[3] = { -1, -1, -1 };
6007 struct ia64_opcode
*idesc
;
6008 int end_of_insn_group
= 0, user_template
= -1;
6009 int n
, i
, j
, first
, curr
;
6010 unw_rec_list
*ptr
, *last_ptr
, *end_ptr
;
6011 bfd_vma t0
= 0, t1
= 0;
6012 struct label_fix
*lfix
;
6013 struct insn_fix
*ifix
;
6018 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6019 know (first
>= 0 & first
< NUM_SLOTS
);
6020 n
= MIN (3, md
.num_slots_in_use
);
6022 /* Determine template: user user_template if specified, best match
6025 if (md
.slot
[first
].user_template
>= 0)
6026 user_template
= template = md
.slot
[first
].user_template
;
6029 /* Auto select appropriate template. */
6030 memset (type
, 0, sizeof (type
));
6032 for (i
= 0; i
< n
; ++i
)
6034 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6036 type
[i
] = md
.slot
[curr
].idesc
->type
;
6037 curr
= (curr
+ 1) % NUM_SLOTS
;
6039 template = best_template
[type
[0]][type
[1]][type
[2]];
6042 /* initialize instructions with appropriate nops: */
6043 for (i
= 0; i
< 3; ++i
)
6044 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6048 /* now fill in slots with as many insns as possible: */
6050 idesc
= md
.slot
[curr
].idesc
;
6051 end_of_insn_group
= 0;
6052 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6054 /* If we have unwind records, we may need to update some now. */
6055 ptr
= md
.slot
[curr
].unwind_record
;
6058 /* Find the last prologue/body record in the list for the current
6059 insn, and set the slot number for all records up to that point.
6060 This needs to be done now, because prologue/body records refer to
6061 the current point, not the point after the instruction has been
6062 issued. This matters because there may have been nops emitted
6063 meanwhile. Any non-prologue non-body record followed by a
6064 prologue/body record must also refer to the current point. */
6066 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6067 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6068 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6069 || ptr
->r
.type
== body
)
6073 /* Make last_ptr point one after the last prologue/body
6075 last_ptr
= last_ptr
->next
;
6076 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6079 ptr
->slot_number
= (unsigned long) f
+ i
;
6080 ptr
->slot_frag
= frag_now
;
6082 /* Remove the initialized records, so that we won't accidentally
6083 update them again if we insert a nop and continue. */
6084 md
.slot
[curr
].unwind_record
= last_ptr
;
6088 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6090 if (manual_bundling
&& i
!= 2)
6091 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6092 "`%s' must be last in bundle", idesc
->name
);
6096 if (idesc
->flags
& IA64_OPCODE_LAST
)
6099 unsigned int required_template
;
6101 /* If we need a stop bit after an M slot, our only choice is
6102 template 5 (M;;MI). If we need a stop bit after a B
6103 slot, our only choice is to place it at the end of the
6104 bundle, because the only available templates are MIB,
6105 MBB, BBB, MMB, and MFB. We don't handle anything other
6106 than M and B slots because these are the only kind of
6107 instructions that can have the IA64_OPCODE_LAST bit set. */
6108 required_template
= template;
6109 switch (idesc
->type
)
6113 required_template
= 5;
6121 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6122 "Internal error: don't know how to force %s to end"
6123 "of instruction group", idesc
->name
);
6127 if (manual_bundling
&& i
!= required_slot
)
6128 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6129 "`%s' must be last in instruction group",
6131 if (required_slot
< i
)
6132 /* Can't fit this instruction. */
6136 if (required_template
!= template)
6138 /* If we switch the template, we need to reset the NOPs
6139 after slot i. The slot-types of the instructions ahead
6140 of i never change, so we don't need to worry about
6141 changing NOPs in front of this slot. */
6142 for (j
= i
; j
< 3; ++j
)
6143 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6145 template = required_template
;
6147 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6149 if (manual_bundling_on
)
6150 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6151 "Label must be first in a bundle");
6152 /* This insn must go into the first slot of a bundle. */
6156 manual_bundling_on
= md
.slot
[curr
].manual_bundling_on
;
6157 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6159 if (manual_bundling_on
)
6162 manual_bundling
= 1;
6164 break; /* need to start a new bundle */
6167 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6169 /* We need an instruction group boundary in the middle of a
6170 bundle. See if we can switch to an other template with
6171 an appropriate boundary. */
6173 orig_template
= template;
6174 if (i
== 1 && (user_template
== 4
6175 || (user_template
< 0
6176 && (ia64_templ_desc
[template].exec_unit
[0]
6180 end_of_insn_group
= 0;
6182 else if (i
== 2 && (user_template
== 0
6183 || (user_template
< 0
6184 && (ia64_templ_desc
[template].exec_unit
[1]
6186 /* This test makes sure we don't switch the template if
6187 the next instruction is one that needs to be first in
6188 an instruction group. Since all those instructions are
6189 in the M group, there is no way such an instruction can
6190 fit in this bundle even if we switch the template. The
6191 reason we have to check for this is that otherwise we
6192 may end up generating "MI;;I M.." which has the deadly
6193 effect that the second M instruction is no longer the
6194 first in the bundle! --davidm 99/12/16 */
6195 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6198 end_of_insn_group
= 0;
6200 else if (curr
!= first
)
6201 /* can't fit this insn */
6204 if (template != orig_template
)
6205 /* if we switch the template, we need to reset the NOPs
6206 after slot i. The slot-types of the instructions ahead
6207 of i never change, so we don't need to worry about
6208 changing NOPs in front of this slot. */
6209 for (j
= i
; j
< 3; ++j
)
6210 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6212 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6214 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6215 if (idesc
->type
== IA64_TYPE_DYN
)
6217 if ((strcmp (idesc
->name
, "nop") == 0)
6218 || (strcmp (idesc
->name
, "hint") == 0)
6219 || (strcmp (idesc
->name
, "break") == 0))
6220 insn_unit
= required_unit
;
6221 else if (strcmp (idesc
->name
, "chk.s") == 0)
6223 insn_unit
= IA64_UNIT_M
;
6224 if (required_unit
== IA64_UNIT_I
)
6225 insn_unit
= IA64_UNIT_I
;
6228 as_fatal ("emit_one_bundle: unexpected dynamic op");
6230 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbf??"[insn_unit
]);
6231 ia64_free_opcode (idesc
);
6232 md
.slot
[curr
].idesc
= idesc
= ia64_find_opcode (mnemonic
);
6234 know (!idesc
->next
); /* no resolved dynamic ops have collisions */
6239 insn_type
= idesc
->type
;
6240 insn_unit
= IA64_UNIT_NIL
;
6244 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6245 insn_unit
= required_unit
;
6247 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6248 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6249 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6250 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6251 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6256 if (insn_unit
!= required_unit
)
6258 if (required_unit
== IA64_UNIT_L
6259 && insn_unit
== IA64_UNIT_I
6260 && !(idesc
->flags
& IA64_OPCODE_X_IN_MLX
))
6262 /* we got ourselves an MLX template but the current
6263 instruction isn't an X-unit, or an I-unit instruction
6264 that can go into the X slot of an MLX template. Duh. */
6265 if (md
.num_slots_in_use
>= NUM_SLOTS
)
6267 as_bad_where (md
.slot
[curr
].src_file
,
6268 md
.slot
[curr
].src_line
,
6269 "`%s' can't go in X slot of "
6270 "MLX template", idesc
->name
);
6271 /* drop this insn so we don't livelock: */
6272 --md
.num_slots_in_use
;
6276 continue; /* try next slot */
6282 addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6283 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6286 if (errata_nop_necessary_p (md
.slot
+ curr
, insn_unit
))
6287 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6289 build_insn (md
.slot
+ curr
, insn
+ i
);
6291 ptr
= md
.slot
[curr
].unwind_record
;
6294 /* Set slot numbers for all remaining unwind records belonging to the
6295 current insn. There can not be any prologue/body unwind records
6297 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6298 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6300 ptr
->slot_number
= (unsigned long) f
+ i
;
6301 ptr
->slot_frag
= frag_now
;
6303 md
.slot
[curr
].unwind_record
= NULL
;
6306 if (required_unit
== IA64_UNIT_L
)
6309 /* skip one slot for long/X-unit instructions */
6312 --md
.num_slots_in_use
;
6314 /* now is a good time to fix up the labels for this insn: */
6315 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6317 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6318 symbol_set_frag (lfix
->sym
, frag_now
);
6320 /* and fix up the tags also. */
6321 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6323 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6324 symbol_set_frag (lfix
->sym
, frag_now
);
6327 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6329 ifix
= md
.slot
[curr
].fixup
+ j
;
6330 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6331 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6332 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6333 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6334 fix
->fx_file
= md
.slot
[curr
].src_file
;
6335 fix
->fx_line
= md
.slot
[curr
].src_line
;
6338 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6340 if (end_of_insn_group
)
6342 md
.group_idx
= (md
.group_idx
+ 1) % 3;
6343 memset (md
.last_groups
+ md
.group_idx
, 0, sizeof md
.last_groups
[0]);
6347 ia64_free_opcode (md
.slot
[curr
].idesc
);
6348 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6349 md
.slot
[curr
].user_template
= -1;
6351 if (manual_bundling_off
)
6353 manual_bundling
= 0;
6356 curr
= (curr
+ 1) % NUM_SLOTS
;
6357 idesc
= md
.slot
[curr
].idesc
;
6359 if (manual_bundling
)
6361 if (md
.num_slots_in_use
> 0)
6362 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6363 "`%s' does not fit into %s template",
6364 idesc
->name
, ia64_templ_desc
[template].name
);
6366 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6367 "Missing '}' at end of file");
6369 know (md
.num_slots_in_use
< NUM_SLOTS
);
6371 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6372 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6374 number_to_chars_littleendian (f
+ 0, t0
, 8);
6375 number_to_chars_littleendian (f
+ 8, t1
, 8);
6379 unwind
.list
->next_slot_number
= (unsigned long) f
+ 16;
6380 unwind
.list
->next_slot_frag
= frag_now
;
6385 md_parse_option (c
, arg
)
6392 /* Switches from the Intel assembler. */
6394 if (strcmp (arg
, "ilp64") == 0
6395 || strcmp (arg
, "lp64") == 0
6396 || strcmp (arg
, "p64") == 0)
6398 md
.flags
|= EF_IA_64_ABI64
;
6400 else if (strcmp (arg
, "ilp32") == 0)
6402 md
.flags
&= ~EF_IA_64_ABI64
;
6404 else if (strcmp (arg
, "le") == 0)
6406 md
.flags
&= ~EF_IA_64_BE
;
6408 else if (strcmp (arg
, "be") == 0)
6410 md
.flags
|= EF_IA_64_BE
;
6417 if (strcmp (arg
, "so") == 0)
6419 /* Suppress signon message. */
6421 else if (strcmp (arg
, "pi") == 0)
6423 /* Reject privileged instructions. FIXME */
6425 else if (strcmp (arg
, "us") == 0)
6427 /* Allow union of signed and unsigned range. FIXME */
6429 else if (strcmp (arg
, "close_fcalls") == 0)
6431 /* Do not resolve global function calls. */
6438 /* temp[="prefix"] Insert temporary labels into the object file
6439 symbol table prefixed by "prefix".
6440 Default prefix is ":temp:".
6445 /* indirect=<tgt> Assume unannotated indirect branches behavior
6446 according to <tgt> --
6447 exit: branch out from the current context (default)
6448 labels: all labels in context may be branch targets
6450 if (strncmp (arg
, "indirect=", 9) != 0)
6455 /* -X conflicts with an ignored option, use -x instead */
6457 if (!arg
|| strcmp (arg
, "explicit") == 0)
6459 /* set default mode to explicit */
6460 md
.default_explicit_mode
= 1;
6463 else if (strcmp (arg
, "auto") == 0)
6465 md
.default_explicit_mode
= 0;
6467 else if (strcmp (arg
, "debug") == 0)
6471 else if (strcmp (arg
, "debugx") == 0)
6473 md
.default_explicit_mode
= 1;
6478 as_bad (_("Unrecognized option '-x%s'"), arg
);
6483 /* nops Print nops statistics. */
6486 /* GNU specific switches for gcc. */
6487 case OPTION_MCONSTANT_GP
:
6488 md
.flags
|= EF_IA_64_CONS_GP
;
6491 case OPTION_MAUTO_PIC
:
6492 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
6503 md_show_usage (stream
)
6508 --mconstant-gp mark output file as using the constant-GP model\n\
6509 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6510 --mauto-pic mark output file as using the constant-GP model\n\
6511 without function descriptors (sets ELF header flag\n\
6512 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6513 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6514 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6515 -x | -xexplicit turn on dependency violation checking (default)\n\
6516 -xauto automagically remove dependency violations\n\
6517 -xdebug debug dependency violation checker\n"),
6522 ia64_after_parse_args ()
6524 if (debug_type
== DEBUG_STABS
)
6525 as_fatal (_("--gstabs is not supported for ia64"));
6528 /* Return true if TYPE fits in TEMPL at SLOT. */
6531 match (int templ
, int type
, int slot
)
6533 enum ia64_unit unit
;
6536 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
6539 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
6541 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
6543 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
6544 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
6545 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
6546 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
6547 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
6548 default: result
= 0; break;
6553 /* Add a bit of extra goodness if a nop of type F or B would fit
6554 in TEMPL at SLOT. */
6557 extra_goodness (int templ
, int slot
)
6559 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
6561 if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
6566 /* This function is called once, at assembler startup time. It sets
6567 up all the tables, etc. that the MD part of the assembler will need
6568 that can be determined before arguments are parsed. */
6572 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
6577 md
.explicit_mode
= md
.default_explicit_mode
;
6579 bfd_set_section_alignment (stdoutput
, text_section
, 4);
6581 /* Make sure function pointers get initialized. */
6582 target_big_endian
= -1;
6583 dot_byteorder (TARGET_BYTES_BIG_ENDIAN
);
6585 alias_hash
= hash_new ();
6586 alias_name_hash
= hash_new ();
6587 secalias_hash
= hash_new ();
6588 secalias_name_hash
= hash_new ();
6590 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
6591 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
6592 &zero_address_frag
);
6594 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
6595 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
6596 &zero_address_frag
);
6598 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
6599 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
6600 &zero_address_frag
);
6602 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
6603 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
6604 &zero_address_frag
);
6606 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
6607 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
6608 &zero_address_frag
);
6610 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
6611 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
6612 &zero_address_frag
);
6614 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
6615 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
6616 &zero_address_frag
);
6618 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
6619 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
6620 &zero_address_frag
);
6622 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
6623 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
6624 &zero_address_frag
);
6626 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
6627 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
6628 &zero_address_frag
);
6630 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
6631 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
6632 &zero_address_frag
);
6634 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
6635 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
6636 &zero_address_frag
);
6638 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
6639 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
6640 &zero_address_frag
);
6642 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
6643 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
6644 &zero_address_frag
);
6646 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
6647 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
6648 &zero_address_frag
);
6650 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
6651 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
6652 &zero_address_frag
);
6654 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
6655 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
6656 &zero_address_frag
);
6658 /* Compute the table of best templates. We compute goodness as a
6659 base 4 value, in which each match counts for 3, each F counts
6660 for 2, each B counts for 1. This should maximize the number of
6661 F and B nops in the chosen bundles, which is good because these
6662 pipelines are least likely to be overcommitted. */
6663 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
6664 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
6665 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
6668 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
6671 if (match (t
, i
, 0))
6673 if (match (t
, j
, 1))
6675 if (match (t
, k
, 2))
6676 goodness
= 3 + 3 + 3;
6678 goodness
= 3 + 3 + extra_goodness (t
, 2);
6680 else if (match (t
, j
, 2))
6681 goodness
= 3 + 3 + extra_goodness (t
, 1);
6685 goodness
+= extra_goodness (t
, 1);
6686 goodness
+= extra_goodness (t
, 2);
6689 else if (match (t
, i
, 1))
6691 if (match (t
, j
, 2))
6694 goodness
= 3 + extra_goodness (t
, 2);
6696 else if (match (t
, i
, 2))
6697 goodness
= 3 + extra_goodness (t
, 1);
6699 if (goodness
> best
)
6702 best_template
[i
][j
][k
] = t
;
6707 for (i
= 0; i
< NUM_SLOTS
; ++i
)
6708 md
.slot
[i
].user_template
= -1;
6710 md
.pseudo_hash
= hash_new ();
6711 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
6713 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
6714 (void *) (pseudo_opcode
+ i
));
6716 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6717 pseudo_opcode
[i
].name
, err
);
6720 md
.reg_hash
= hash_new ();
6721 md
.dynreg_hash
= hash_new ();
6722 md
.const_hash
= hash_new ();
6723 md
.entry_hash
= hash_new ();
6725 /* general registers: */
6728 for (i
= 0; i
< total
; ++i
)
6730 sprintf (name
, "r%d", i
- REG_GR
);
6731 md
.regsym
[i
] = declare_register (name
, i
);
6734 /* floating point registers: */
6736 for (; i
< total
; ++i
)
6738 sprintf (name
, "f%d", i
- REG_FR
);
6739 md
.regsym
[i
] = declare_register (name
, i
);
6742 /* application registers: */
6745 for (; i
< total
; ++i
)
6747 sprintf (name
, "ar%d", i
- REG_AR
);
6748 md
.regsym
[i
] = declare_register (name
, i
);
6751 /* control registers: */
6754 for (; i
< total
; ++i
)
6756 sprintf (name
, "cr%d", i
- REG_CR
);
6757 md
.regsym
[i
] = declare_register (name
, i
);
6760 /* predicate registers: */
6762 for (; i
< total
; ++i
)
6764 sprintf (name
, "p%d", i
- REG_P
);
6765 md
.regsym
[i
] = declare_register (name
, i
);
6768 /* branch registers: */
6770 for (; i
< total
; ++i
)
6772 sprintf (name
, "b%d", i
- REG_BR
);
6773 md
.regsym
[i
] = declare_register (name
, i
);
6776 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
6777 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
6778 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
6779 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
6780 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
6781 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
6782 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
6784 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
6786 regnum
= indirect_reg
[i
].regnum
;
6787 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
6790 /* define synonyms for application registers: */
6791 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
6792 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
6793 REG_AR
+ ar
[i
- REG_AR
].regnum
);
6795 /* define synonyms for control registers: */
6796 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
6797 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
6798 REG_CR
+ cr
[i
- REG_CR
].regnum
);
6800 declare_register ("gp", REG_GR
+ 1);
6801 declare_register ("sp", REG_GR
+ 12);
6802 declare_register ("rp", REG_BR
+ 0);
6804 /* pseudo-registers used to specify unwind info: */
6805 declare_register ("psp", REG_PSP
);
6807 declare_register_set ("ret", 4, REG_GR
+ 8);
6808 declare_register_set ("farg", 8, REG_FR
+ 8);
6809 declare_register_set ("fret", 8, REG_FR
+ 8);
6811 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
6813 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
6814 (PTR
) (const_bits
+ i
));
6816 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
6820 /* Set the architecture and machine depending on defaults and command line
6822 if (md
.flags
& EF_IA_64_ABI64
)
6823 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
6825 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
6828 as_warn (_("Could not set architecture and machine"));
6830 /* Set the pointer size and pointer shift size depending on md.flags */
6832 if (md
.flags
& EF_IA_64_ABI64
)
6834 md
.pointer_size
= 8; /* pointers are 8 bytes */
6835 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
6839 md
.pointer_size
= 4; /* pointers are 4 bytes */
6840 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
6843 md
.mem_offset
.hint
= 0;
6846 md
.entry_labels
= NULL
;
6849 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
6850 because that is called after md_parse_option which is where we do the
6851 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
6852 default endianness. */
6855 ia64_init (argc
, argv
)
6856 int argc ATTRIBUTE_UNUSED
;
6857 char **argv ATTRIBUTE_UNUSED
;
6859 md
.flags
= MD_FLAGS_DEFAULT
;
6862 /* Return a string for the target object file format. */
6865 ia64_target_format ()
6867 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
6869 if (md
.flags
& EF_IA_64_BE
)
6871 if (md
.flags
& EF_IA_64_ABI64
)
6872 #if defined(TE_AIX50)
6873 return "elf64-ia64-aix-big";
6874 #elif defined(TE_HPUX)
6875 return "elf64-ia64-hpux-big";
6877 return "elf64-ia64-big";
6880 #if defined(TE_AIX50)
6881 return "elf32-ia64-aix-big";
6882 #elif defined(TE_HPUX)
6883 return "elf32-ia64-hpux-big";
6885 return "elf32-ia64-big";
6890 if (md
.flags
& EF_IA_64_ABI64
)
6892 return "elf64-ia64-aix-little";
6894 return "elf64-ia64-little";
6898 return "elf32-ia64-aix-little";
6900 return "elf32-ia64-little";
6905 return "unknown-format";
6909 ia64_end_of_source ()
6911 /* terminate insn group upon reaching end of file: */
6912 insn_group_break (1, 0, 0);
6914 /* emits slots we haven't written yet: */
6915 ia64_flush_insns ();
6917 bfd_set_private_flags (stdoutput
, md
.flags
);
6919 md
.mem_offset
.hint
= 0;
6925 if (md
.qp
.X_op
== O_register
)
6926 as_bad ("qualifying predicate not followed by instruction");
6927 md
.qp
.X_op
= O_absent
;
6929 if (ignore_input ())
6932 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
6934 if (md
.detect_dv
&& !md
.explicit_mode
)
6935 as_warn (_("Explicit stops are ignored in auto mode"));
6937 insn_group_break (1, 0, 0);
6941 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
6943 static int defining_tag
= 0;
6946 ia64_unrecognized_line (ch
)
6952 expression (&md
.qp
);
6953 if (*input_line_pointer
++ != ')')
6955 as_bad ("Expected ')'");
6958 if (md
.qp
.X_op
!= O_register
)
6960 as_bad ("Qualifying predicate expected");
6963 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
6965 as_bad ("Predicate register expected");
6971 if (md
.manual_bundling
)
6972 as_warn ("Found '{' when manual bundling is already turned on");
6974 CURR_SLOT
.manual_bundling_on
= 1;
6975 md
.manual_bundling
= 1;
6977 /* Bundling is only acceptable in explicit mode
6978 or when in default automatic mode. */
6979 if (md
.detect_dv
&& !md
.explicit_mode
)
6981 if (!md
.mode_explicitly_set
6982 && !md
.default_explicit_mode
)
6985 as_warn (_("Found '{' after explicit switch to automatic mode"));
6990 if (!md
.manual_bundling
)
6991 as_warn ("Found '}' when manual bundling is off");
6993 PREV_SLOT
.manual_bundling_off
= 1;
6994 md
.manual_bundling
= 0;
6996 /* switch back to automatic mode, if applicable */
6999 && !md
.mode_explicitly_set
7000 && !md
.default_explicit_mode
)
7003 /* Allow '{' to follow on the same line. We also allow ";;", but that
7004 happens automatically because ';' is an end of line marker. */
7006 if (input_line_pointer
[0] == '{')
7008 input_line_pointer
++;
7009 return ia64_unrecognized_line ('{');
7012 demand_empty_rest_of_line ();
7022 if (md
.qp
.X_op
== O_register
)
7024 as_bad ("Tag must come before qualifying predicate.");
7028 /* This implements just enough of read_a_source_file in read.c to
7029 recognize labels. */
7030 if (is_name_beginner (*input_line_pointer
))
7032 s
= input_line_pointer
;
7033 c
= get_symbol_end ();
7035 else if (LOCAL_LABELS_FB
7036 && ISDIGIT (*input_line_pointer
))
7039 while (ISDIGIT (*input_line_pointer
))
7040 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7041 fb_label_instance_inc (temp
);
7042 s
= fb_label_name (temp
, 0);
7043 c
= *input_line_pointer
;
7052 /* Put ':' back for error messages' sake. */
7053 *input_line_pointer
++ = ':';
7054 as_bad ("Expected ':'");
7061 /* Put ':' back for error messages' sake. */
7062 *input_line_pointer
++ = ':';
7063 if (*input_line_pointer
++ != ']')
7065 as_bad ("Expected ']'");
7070 as_bad ("Tag name expected");
7080 /* Not a valid line. */
7085 ia64_frob_label (sym
)
7088 struct label_fix
*fix
;
7090 /* Tags need special handling since they are not bundle breaks like
7094 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7096 fix
->next
= CURR_SLOT
.tag_fixups
;
7097 CURR_SLOT
.tag_fixups
= fix
;
7102 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7104 md
.last_text_seg
= now_seg
;
7105 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7107 fix
->next
= CURR_SLOT
.label_fixups
;
7108 CURR_SLOT
.label_fixups
= fix
;
7110 /* Keep track of how many code entry points we've seen. */
7111 if (md
.path
== md
.maxpaths
)
7114 md
.entry_labels
= (const char **)
7115 xrealloc ((void *) md
.entry_labels
,
7116 md
.maxpaths
* sizeof (char *));
7118 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7123 ia64_flush_pending_output ()
7125 if (!md
.keep_pending_output
7126 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7128 /* ??? This causes many unnecessary stop bits to be emitted.
7129 Unfortunately, it isn't clear if it is safe to remove this. */
7130 insn_group_break (1, 0, 0);
7131 ia64_flush_insns ();
7135 /* Do ia64-specific expression optimization. All that's done here is
7136 to transform index expressions that are either due to the indexing
7137 of rotating registers or due to the indexing of indirect register
7140 ia64_optimize_expr (l
, op
, r
)
7149 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
7151 num_regs
= (l
->X_add_number
>> 16);
7152 if ((unsigned) r
->X_add_number
>= num_regs
)
7155 as_bad ("No current frame");
7157 as_bad ("Index out of range 0..%u", num_regs
- 1);
7158 r
->X_add_number
= 0;
7160 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7163 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
7165 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
7166 || l
->X_add_number
== IND_MEM
)
7168 as_bad ("Indirect register set name expected");
7169 l
->X_add_number
= IND_CPUID
;
7172 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
7173 l
->X_add_number
= r
->X_add_number
;
7181 ia64_parse_name (name
, e
)
7185 struct const_desc
*cdesc
;
7186 struct dynreg
*dr
= 0;
7187 unsigned int regnum
;
7191 /* first see if NAME is a known register name: */
7192 sym
= hash_find (md
.reg_hash
, name
);
7195 e
->X_op
= O_register
;
7196 e
->X_add_number
= S_GET_VALUE (sym
);
7200 cdesc
= hash_find (md
.const_hash
, name
);
7203 e
->X_op
= O_constant
;
7204 e
->X_add_number
= cdesc
->value
;
7208 /* check for inN, locN, or outN: */
7212 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7220 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
7228 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
7241 /* The name is inN, locN, or outN; parse the register number. */
7242 regnum
= strtoul (name
, &end
, 10);
7243 if (end
> name
&& *end
== '\0')
7245 if ((unsigned) regnum
>= dr
->num_regs
)
7248 as_bad ("No current frame");
7250 as_bad ("Register number out of range 0..%u",
7254 e
->X_op
= O_register
;
7255 e
->X_add_number
= dr
->base
+ regnum
;
7260 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
7262 /* We've got ourselves the name of a rotating register set.
7263 Store the base register number in the low 16 bits of
7264 X_add_number and the size of the register set in the top 16
7266 e
->X_op
= O_register
;
7267 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
7273 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7276 ia64_canonicalize_symbol_name (name
)
7279 size_t len
= strlen (name
);
7280 if (len
> 1 && name
[len
- 1] == '#')
7281 name
[len
- 1] = '\0';
7285 /* Return true if idesc is a conditional branch instruction. This excludes
7286 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7287 because they always read/write resources regardless of the value of the
7288 qualifying predicate. br.ia must always use p0, and hence is always
7289 taken. Thus this function returns true for branches which can fall
7290 through, and which use no resources if they do fall through. */
7293 is_conditional_branch (idesc
)
7294 struct ia64_opcode
*idesc
;
7296 /* br is a conditional branch. Everything that starts with br. except
7297 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7298 Everything that starts with brl is a conditional branch. */
7299 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
7300 && (idesc
->name
[2] == '\0'
7301 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
7302 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
7303 || idesc
->name
[2] == 'l'
7304 /* br.cond, br.call, br.clr */
7305 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
7306 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
7307 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
7310 /* Return whether the given opcode is a taken branch. If there's any doubt,
7314 is_taken_branch (idesc
)
7315 struct ia64_opcode
*idesc
;
7317 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
7318 || strncmp (idesc
->name
, "br.ia", 5) == 0);
7321 /* Return whether the given opcode is an interruption or rfi. If there's any
7322 doubt, returns zero. */
7325 is_interruption_or_rfi (idesc
)
7326 struct ia64_opcode
*idesc
;
7328 if (strcmp (idesc
->name
, "rfi") == 0)
7333 /* Returns the index of the given dependency in the opcode's list of chks, or
7334 -1 if there is no dependency. */
7337 depends_on (depind
, idesc
)
7339 struct ia64_opcode
*idesc
;
7342 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
7343 for (i
= 0; i
< dep
->nchks
; i
++)
7345 if (depind
== DEP (dep
->chks
[i
]))
7351 /* Determine a set of specific resources used for a particular resource
7352 class. Returns the number of specific resources identified For those
7353 cases which are not determinable statically, the resource returned is
7356 Meanings of value in 'NOTE':
7357 1) only read/write when the register number is explicitly encoded in the
7359 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7360 accesses CFM when qualifying predicate is in the rotating region.
7361 3) general register value is used to specify an indirect register; not
7362 determinable statically.
7363 4) only read the given resource when bits 7:0 of the indirect index
7364 register value does not match the register number of the resource; not
7365 determinable statically.
7366 5) all rules are implementation specific.
7367 6) only when both the index specified by the reader and the index specified
7368 by the writer have the same value in bits 63:61; not determinable
7370 7) only access the specified resource when the corresponding mask bit is
7372 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7373 only read when these insns reference FR2-31
7374 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7375 written when these insns write FR32-127
7376 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7378 11) The target predicates are written independently of PR[qp], but source
7379 registers are only read if PR[qp] is true. Since the state of PR[qp]
7380 cannot statically be determined, all source registers are marked used.
7381 12) This insn only reads the specified predicate register when that
7382 register is the PR[qp].
7383 13) This reference to ld-c only applies to teh GR whose value is loaded
7384 with data returned from memory, not the post-incremented address register.
7385 14) The RSE resource includes the implementation-specific RSE internal
7386 state resources. At least one (and possibly more) of these resources are
7387 read by each instruction listed in IC:rse-readers. At least one (and
7388 possibly more) of these resources are written by each insn listed in
7390 15+16) Represents reserved instructions, which the assembler does not
7393 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7394 this code; there are no dependency violations based on memory access.
7397 #define MAX_SPECS 256
7402 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
7403 const struct ia64_dependency
*dep
;
7404 struct ia64_opcode
*idesc
;
7405 int type
; /* is this a DV chk or a DV reg? */
7406 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
7407 int note
; /* resource note for this insn's usage */
7408 int path
; /* which execution path to examine */
7415 if (dep
->mode
== IA64_DV_WAW
7416 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
7417 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
7420 /* template for any resources we identify */
7421 tmpl
.dependency
= dep
;
7423 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
7424 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
7425 tmpl
.link_to_qp_branch
= 1;
7426 tmpl
.mem_offset
.hint
= 0;
7429 tmpl
.cmp_type
= CMP_NONE
;
7432 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7433 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7434 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7436 /* we don't need to track these */
7437 if (dep
->semantics
== IA64_DVS_NONE
)
7440 switch (dep
->specifier
)
7445 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7447 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7448 if (regno
>= 0 && regno
<= 7)
7450 specs
[count
] = tmpl
;
7451 specs
[count
++].index
= regno
;
7457 for (i
= 0; i
< 8; i
++)
7459 specs
[count
] = tmpl
;
7460 specs
[count
++].index
= i
;
7469 case IA64_RS_AR_UNAT
:
7470 /* This is a mov =AR or mov AR= instruction. */
7471 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7473 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7474 if (regno
== AR_UNAT
)
7476 specs
[count
++] = tmpl
;
7481 /* This is a spill/fill, or other instruction that modifies the
7484 /* Unless we can determine the specific bits used, mark the whole
7485 thing; bits 8:3 of the memory address indicate the bit used in
7486 UNAT. The .mem.offset hint may be used to eliminate a small
7487 subset of conflicts. */
7488 specs
[count
] = tmpl
;
7489 if (md
.mem_offset
.hint
)
7492 fprintf (stderr
, " Using hint for spill/fill\n");
7493 /* The index isn't actually used, just set it to something
7494 approximating the bit index. */
7495 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
7496 specs
[count
].mem_offset
.hint
= 1;
7497 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
7498 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
7502 specs
[count
++].specific
= 0;
7510 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7512 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7513 if ((regno
>= 8 && regno
<= 15)
7514 || (regno
>= 20 && regno
<= 23)
7515 || (regno
>= 31 && regno
<= 39)
7516 || (regno
>= 41 && regno
<= 47)
7517 || (regno
>= 67 && regno
<= 111))
7519 specs
[count
] = tmpl
;
7520 specs
[count
++].index
= regno
;
7533 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7535 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7536 if ((regno
>= 48 && regno
<= 63)
7537 || (regno
>= 112 && regno
<= 127))
7539 specs
[count
] = tmpl
;
7540 specs
[count
++].index
= regno
;
7546 for (i
= 48; i
< 64; i
++)
7548 specs
[count
] = tmpl
;
7549 specs
[count
++].index
= i
;
7551 for (i
= 112; i
< 128; i
++)
7553 specs
[count
] = tmpl
;
7554 specs
[count
++].index
= i
;
7572 for (i
= 0; i
< idesc
->num_outputs
; i
++)
7573 if (idesc
->operands
[i
] == IA64_OPND_B1
7574 || idesc
->operands
[i
] == IA64_OPND_B2
)
7576 specs
[count
] = tmpl
;
7577 specs
[count
++].index
=
7578 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7583 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
7584 if (idesc
->operands
[i
] == IA64_OPND_B1
7585 || idesc
->operands
[i
] == IA64_OPND_B2
)
7587 specs
[count
] = tmpl
;
7588 specs
[count
++].index
=
7589 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7595 case IA64_RS_CPUID
: /* four or more registers */
7598 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
7600 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7601 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7604 specs
[count
] = tmpl
;
7605 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7609 specs
[count
] = tmpl
;
7610 specs
[count
++].specific
= 0;
7620 case IA64_RS_DBR
: /* four or more registers */
7623 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
7625 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7626 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7629 specs
[count
] = tmpl
;
7630 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7634 specs
[count
] = tmpl
;
7635 specs
[count
++].specific
= 0;
7639 else if (note
== 0 && !rsrc_write
)
7641 specs
[count
] = tmpl
;
7642 specs
[count
++].specific
= 0;
7650 case IA64_RS_IBR
: /* four or more registers */
7653 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
7655 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7656 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7659 specs
[count
] = tmpl
;
7660 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7664 specs
[count
] = tmpl
;
7665 specs
[count
++].specific
= 0;
7678 /* These are implementation specific. Force all references to
7679 conflict with all other references. */
7680 specs
[count
] = tmpl
;
7681 specs
[count
++].specific
= 0;
7689 case IA64_RS_PKR
: /* 16 or more registers */
7690 if (note
== 3 || note
== 4)
7692 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
7694 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7695 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7700 specs
[count
] = tmpl
;
7701 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7704 for (i
= 0; i
< NELEMS (gr_values
); i
++)
7706 /* Uses all registers *except* the one in R3. */
7707 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
7709 specs
[count
] = tmpl
;
7710 specs
[count
++].index
= i
;
7716 specs
[count
] = tmpl
;
7717 specs
[count
++].specific
= 0;
7724 specs
[count
] = tmpl
;
7725 specs
[count
++].specific
= 0;
7729 case IA64_RS_PMC
: /* four or more registers */
7732 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
7733 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
7736 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
7738 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
7739 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7742 specs
[count
] = tmpl
;
7743 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7747 specs
[count
] = tmpl
;
7748 specs
[count
++].specific
= 0;
7758 case IA64_RS_PMD
: /* four or more registers */
7761 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
7763 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7764 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7767 specs
[count
] = tmpl
;
7768 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7772 specs
[count
] = tmpl
;
7773 specs
[count
++].specific
= 0;
7783 case IA64_RS_RR
: /* eight registers */
7786 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
7788 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7789 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7792 specs
[count
] = tmpl
;
7793 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
7797 specs
[count
] = tmpl
;
7798 specs
[count
++].specific
= 0;
7802 else if (note
== 0 && !rsrc_write
)
7804 specs
[count
] = tmpl
;
7805 specs
[count
++].specific
= 0;
7813 case IA64_RS_CR_IRR
:
7816 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
7817 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
7819 && idesc
->operands
[1] == IA64_OPND_CR3
7822 for (i
= 0; i
< 4; i
++)
7824 specs
[count
] = tmpl
;
7825 specs
[count
++].index
= CR_IRR0
+ i
;
7831 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
7832 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
7834 && regno
<= CR_IRR3
)
7836 specs
[count
] = tmpl
;
7837 specs
[count
++].index
= regno
;
7846 case IA64_RS_CR_LRR
:
7853 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
7854 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
7855 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
7857 specs
[count
] = tmpl
;
7858 specs
[count
++].index
= regno
;
7866 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
7868 specs
[count
] = tmpl
;
7869 specs
[count
++].index
=
7870 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
7885 else if (rsrc_write
)
7887 if (dep
->specifier
== IA64_RS_FRb
7888 && idesc
->operands
[0] == IA64_OPND_F1
)
7890 specs
[count
] = tmpl
;
7891 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
7896 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
7898 if (idesc
->operands
[i
] == IA64_OPND_F2
7899 || idesc
->operands
[i
] == IA64_OPND_F3
7900 || idesc
->operands
[i
] == IA64_OPND_F4
)
7902 specs
[count
] = tmpl
;
7903 specs
[count
++].index
=
7904 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
7913 /* This reference applies only to the GR whose value is loaded with
7914 data returned from memory. */
7915 specs
[count
] = tmpl
;
7916 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
7922 for (i
= 0; i
< idesc
->num_outputs
; i
++)
7923 if (idesc
->operands
[i
] == IA64_OPND_R1
7924 || idesc
->operands
[i
] == IA64_OPND_R2
7925 || idesc
->operands
[i
] == IA64_OPND_R3
)
7927 specs
[count
] = tmpl
;
7928 specs
[count
++].index
=
7929 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
7931 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
7932 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
7933 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
7935 specs
[count
] = tmpl
;
7936 specs
[count
++].index
=
7937 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
7942 /* Look for anything that reads a GR. */
7943 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
7945 if (idesc
->operands
[i
] == IA64_OPND_MR3
7946 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
7947 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
7948 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
7949 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
7950 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
7951 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
7952 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
7953 || idesc
->operands
[i
] == IA64_OPND_RR_R3
7954 || ((i
>= idesc
->num_outputs
)
7955 && (idesc
->operands
[i
] == IA64_OPND_R1
7956 || idesc
->operands
[i
] == IA64_OPND_R2
7957 || idesc
->operands
[i
] == IA64_OPND_R3
7958 /* addl source register. */
7959 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
7961 specs
[count
] = tmpl
;
7962 specs
[count
++].index
=
7963 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
7974 /* This is the same as IA64_RS_PRr, except that the register range is
7975 from 1 - 15, and there are no rotating register reads/writes here. */
7979 for (i
= 1; i
< 16; i
++)
7981 specs
[count
] = tmpl
;
7982 specs
[count
++].index
= i
;
7988 /* Mark only those registers indicated by the mask. */
7991 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
7992 for (i
= 1; i
< 16; i
++)
7993 if (mask
& ((valueT
) 1 << i
))
7995 specs
[count
] = tmpl
;
7996 specs
[count
++].index
= i
;
8004 else if (note
== 11) /* note 11 implies note 1 as well */
8008 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8010 if (idesc
->operands
[i
] == IA64_OPND_P1
8011 || idesc
->operands
[i
] == IA64_OPND_P2
)
8013 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8014 if (regno
>= 1 && regno
< 16)
8016 specs
[count
] = tmpl
;
8017 specs
[count
++].index
= regno
;
8027 else if (note
== 12)
8029 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8031 specs
[count
] = tmpl
;
8032 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8039 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8040 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8041 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8042 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8044 if ((idesc
->operands
[0] == IA64_OPND_P1
8045 || idesc
->operands
[0] == IA64_OPND_P2
)
8046 && p1
>= 1 && p1
< 16)
8048 specs
[count
] = tmpl
;
8049 specs
[count
].cmp_type
=
8050 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8051 specs
[count
++].index
= p1
;
8053 if ((idesc
->operands
[1] == IA64_OPND_P1
8054 || idesc
->operands
[1] == IA64_OPND_P2
)
8055 && p2
>= 1 && p2
< 16)
8057 specs
[count
] = tmpl
;
8058 specs
[count
].cmp_type
=
8059 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8060 specs
[count
++].index
= p2
;
8065 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8067 specs
[count
] = tmpl
;
8068 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8070 if (idesc
->operands
[1] == IA64_OPND_PR
)
8072 for (i
= 1; i
< 16; i
++)
8074 specs
[count
] = tmpl
;
8075 specs
[count
++].index
= i
;
8086 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8087 simplified cases of this. */
8091 for (i
= 16; i
< 63; i
++)
8093 specs
[count
] = tmpl
;
8094 specs
[count
++].index
= i
;
8100 /* Mark only those registers indicated by the mask. */
8102 && idesc
->operands
[0] == IA64_OPND_PR
)
8104 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8105 if (mask
& ((valueT
) 1 << 16))
8106 for (i
= 16; i
< 63; i
++)
8108 specs
[count
] = tmpl
;
8109 specs
[count
++].index
= i
;
8113 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8115 for (i
= 16; i
< 63; i
++)
8117 specs
[count
] = tmpl
;
8118 specs
[count
++].index
= i
;
8126 else if (note
== 11) /* note 11 implies note 1 as well */
8130 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8132 if (idesc
->operands
[i
] == IA64_OPND_P1
8133 || idesc
->operands
[i
] == IA64_OPND_P2
)
8135 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8136 if (regno
>= 16 && regno
< 63)
8138 specs
[count
] = tmpl
;
8139 specs
[count
++].index
= regno
;
8149 else if (note
== 12)
8151 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8153 specs
[count
] = tmpl
;
8154 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8161 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8162 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8163 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8164 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8166 if ((idesc
->operands
[0] == IA64_OPND_P1
8167 || idesc
->operands
[0] == IA64_OPND_P2
)
8168 && p1
>= 16 && p1
< 63)
8170 specs
[count
] = tmpl
;
8171 specs
[count
].cmp_type
=
8172 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8173 specs
[count
++].index
= p1
;
8175 if ((idesc
->operands
[1] == IA64_OPND_P1
8176 || idesc
->operands
[1] == IA64_OPND_P2
)
8177 && p2
>= 16 && p2
< 63)
8179 specs
[count
] = tmpl
;
8180 specs
[count
].cmp_type
=
8181 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8182 specs
[count
++].index
= p2
;
8187 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8189 specs
[count
] = tmpl
;
8190 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8192 if (idesc
->operands
[1] == IA64_OPND_PR
)
8194 for (i
= 16; i
< 63; i
++)
8196 specs
[count
] = tmpl
;
8197 specs
[count
++].index
= i
;
8209 /* Verify that the instruction is using the PSR bit indicated in
8213 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
8215 if (dep
->regindex
< 6)
8217 specs
[count
++] = tmpl
;
8220 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
8222 if (dep
->regindex
< 32
8223 || dep
->regindex
== 35
8224 || dep
->regindex
== 36
8225 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
8227 specs
[count
++] = tmpl
;
8230 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
8232 if (dep
->regindex
< 32
8233 || dep
->regindex
== 35
8234 || dep
->regindex
== 36
8235 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
8237 specs
[count
++] = tmpl
;
8242 /* Several PSR bits have very specific dependencies. */
8243 switch (dep
->regindex
)
8246 specs
[count
++] = tmpl
;
8251 specs
[count
++] = tmpl
;
8255 /* Only certain CR accesses use PSR.ic */
8256 if (idesc
->operands
[0] == IA64_OPND_CR3
8257 || idesc
->operands
[1] == IA64_OPND_CR3
)
8260 ((idesc
->operands
[0] == IA64_OPND_CR3
)
8263 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
8278 specs
[count
++] = tmpl
;
8287 specs
[count
++] = tmpl
;
8291 /* Only some AR accesses use cpl */
8292 if (idesc
->operands
[0] == IA64_OPND_AR3
8293 || idesc
->operands
[1] == IA64_OPND_AR3
)
8296 ((idesc
->operands
[0] == IA64_OPND_AR3
)
8299 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
8306 && regno
<= AR_K7
))))
8308 specs
[count
++] = tmpl
;
8313 specs
[count
++] = tmpl
;
8323 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
8325 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
8331 if (mask
& ((valueT
) 1 << dep
->regindex
))
8333 specs
[count
++] = tmpl
;
8338 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
8339 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
8340 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8341 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8343 if (idesc
->operands
[i
] == IA64_OPND_F1
8344 || idesc
->operands
[i
] == IA64_OPND_F2
8345 || idesc
->operands
[i
] == IA64_OPND_F3
8346 || idesc
->operands
[i
] == IA64_OPND_F4
)
8348 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8349 if (reg
>= min
&& reg
<= max
)
8351 specs
[count
++] = tmpl
;
8358 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
8359 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
8360 /* mfh is read on writes to FR32-127; mfl is read on writes to
8362 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8364 if (idesc
->operands
[i
] == IA64_OPND_F1
)
8366 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8367 if (reg
>= min
&& reg
<= max
)
8369 specs
[count
++] = tmpl
;
8374 else if (note
== 10)
8376 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8378 if (idesc
->operands
[i
] == IA64_OPND_R1
8379 || idesc
->operands
[i
] == IA64_OPND_R2
8380 || idesc
->operands
[i
] == IA64_OPND_R3
)
8382 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8383 if (regno
>= 16 && regno
<= 31)
8385 specs
[count
++] = tmpl
;
8396 case IA64_RS_AR_FPSR
:
8397 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8399 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8400 if (regno
== AR_FPSR
)
8402 specs
[count
++] = tmpl
;
8407 specs
[count
++] = tmpl
;
8412 /* Handle all AR[REG] resources */
8413 if (note
== 0 || note
== 1)
8415 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8416 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
8417 && regno
== dep
->regindex
)
8419 specs
[count
++] = tmpl
;
8421 /* other AR[REG] resources may be affected by AR accesses */
8422 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
8425 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
8426 switch (dep
->regindex
)
8432 if (regno
== AR_BSPSTORE
)
8434 specs
[count
++] = tmpl
;
8438 (regno
== AR_BSPSTORE
8439 || regno
== AR_RNAT
))
8441 specs
[count
++] = tmpl
;
8446 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
8449 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
8450 switch (dep
->regindex
)
8455 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
8457 specs
[count
++] = tmpl
;
8464 specs
[count
++] = tmpl
;
8474 /* Handle all CR[REG] resources */
8475 if (note
== 0 || note
== 1)
8477 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8479 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8480 if (regno
== dep
->regindex
)
8482 specs
[count
++] = tmpl
;
8484 else if (!rsrc_write
)
8486 /* Reads from CR[IVR] affect other resources. */
8487 if (regno
== CR_IVR
)
8489 if ((dep
->regindex
>= CR_IRR0
8490 && dep
->regindex
<= CR_IRR3
)
8491 || dep
->regindex
== CR_TPR
)
8493 specs
[count
++] = tmpl
;
8500 specs
[count
++] = tmpl
;
8509 case IA64_RS_INSERVICE
:
8510 /* look for write of EOI (67) or read of IVR (65) */
8511 if ((idesc
->operands
[0] == IA64_OPND_CR3
8512 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
8513 || (idesc
->operands
[1] == IA64_OPND_CR3
8514 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
8516 specs
[count
++] = tmpl
;
8523 specs
[count
++] = tmpl
;
8534 specs
[count
++] = tmpl
;
8538 /* Check if any of the registers accessed are in the rotating region.
8539 mov to/from pr accesses CFM only when qp_regno is in the rotating
8541 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8543 if (idesc
->operands
[i
] == IA64_OPND_R1
8544 || idesc
->operands
[i
] == IA64_OPND_R2
8545 || idesc
->operands
[i
] == IA64_OPND_R3
)
8547 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8548 /* Assumes that md.rot.num_regs is always valid */
8549 if (md
.rot
.num_regs
> 0
8551 && num
< 31 + md
.rot
.num_regs
)
8553 specs
[count
] = tmpl
;
8554 specs
[count
++].specific
= 0;
8557 else if (idesc
->operands
[i
] == IA64_OPND_F1
8558 || idesc
->operands
[i
] == IA64_OPND_F2
8559 || idesc
->operands
[i
] == IA64_OPND_F3
8560 || idesc
->operands
[i
] == IA64_OPND_F4
)
8562 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8565 specs
[count
] = tmpl
;
8566 specs
[count
++].specific
= 0;
8569 else if (idesc
->operands
[i
] == IA64_OPND_P1
8570 || idesc
->operands
[i
] == IA64_OPND_P2
)
8572 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8575 specs
[count
] = tmpl
;
8576 specs
[count
++].specific
= 0;
8580 if (CURR_SLOT
.qp_regno
> 15)
8582 specs
[count
] = tmpl
;
8583 specs
[count
++].specific
= 0;
8588 /* This is the same as IA64_RS_PRr, except simplified to account for
8589 the fact that there is only one register. */
8593 specs
[count
++] = tmpl
;
8598 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
8599 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8600 if (mask
& ((valueT
) 1 << 63))
8601 specs
[count
++] = tmpl
;
8603 else if (note
== 11)
8605 if ((idesc
->operands
[0] == IA64_OPND_P1
8606 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
8607 || (idesc
->operands
[1] == IA64_OPND_P2
8608 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
8610 specs
[count
++] = tmpl
;
8613 else if (note
== 12)
8615 if (CURR_SLOT
.qp_regno
== 63)
8617 specs
[count
++] = tmpl
;
8624 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8625 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8626 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8627 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8630 && (idesc
->operands
[0] == IA64_OPND_P1
8631 || idesc
->operands
[0] == IA64_OPND_P2
))
8633 specs
[count
] = tmpl
;
8634 specs
[count
++].cmp_type
=
8635 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8638 && (idesc
->operands
[1] == IA64_OPND_P1
8639 || idesc
->operands
[1] == IA64_OPND_P2
))
8641 specs
[count
] = tmpl
;
8642 specs
[count
++].cmp_type
=
8643 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8648 if (CURR_SLOT
.qp_regno
== 63)
8650 specs
[count
++] = tmpl
;
8661 /* FIXME we can identify some individual RSE written resources, but RSE
8662 read resources have not yet been completely identified, so for now
8663 treat RSE as a single resource */
8664 if (strncmp (idesc
->name
, "mov", 3) == 0)
8668 if (idesc
->operands
[0] == IA64_OPND_AR3
8669 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
8671 specs
[count
] = tmpl
;
8672 specs
[count
++].index
= 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8677 if (idesc
->operands
[0] == IA64_OPND_AR3
)
8679 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
8680 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
8682 specs
[count
++] = tmpl
;
8685 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
8687 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
8688 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
8689 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
8691 specs
[count
++] = tmpl
;
8698 specs
[count
++] = tmpl
;
8703 /* FIXME -- do any of these need to be non-specific? */
8704 specs
[count
++] = tmpl
;
8708 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
8715 /* Clear branch flags on marked resources. This breaks the link between the
8716 QP of the marking instruction and a subsequent branch on the same QP. */
8719 clear_qp_branch_flag (mask
)
8723 for (i
= 0; i
< regdepslen
; i
++)
8725 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
8726 if ((bit
& mask
) != 0)
8728 regdeps
[i
].link_to_qp_branch
= 0;
8733 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
8734 any mutexes which contain one of the PRs and create new ones when
8738 update_qp_mutex (valueT mask
)
8744 while (i
< qp_mutexeslen
)
8746 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
8748 /* If it destroys and creates the same mutex, do nothing. */
8749 if (qp_mutexes
[i
].prmask
== mask
8750 && qp_mutexes
[i
].path
== md
.path
)
8761 fprintf (stderr
, " Clearing mutex relation");
8762 print_prmask (qp_mutexes
[i
].prmask
);
8763 fprintf (stderr
, "\n");
8766 /* Deal with the old mutex with more than 3+ PRs only if
8767 the new mutex on the same execution path with it.
8769 FIXME: The 3+ mutex support is incomplete.
8770 dot_pred_rel () may be a better place to fix it. */
8771 if (qp_mutexes
[i
].path
== md
.path
)
8773 /* If it is a proper subset of the mutex, create a
8776 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
8779 qp_mutexes
[i
].prmask
&= ~mask
;
8780 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
8782 /* Modify the mutex if there are more than one
8790 /* Remove the mutex. */
8791 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
8799 add_qp_mutex (mask
);
8804 /* Remove any mutexes which contain any of the PRs indicated in the mask.
8806 Any changes to a PR clears the mutex relations which include that PR. */
8809 clear_qp_mutex (mask
)
8815 while (i
< qp_mutexeslen
)
8817 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
8821 fprintf (stderr
, " Clearing mutex relation");
8822 print_prmask (qp_mutexes
[i
].prmask
);
8823 fprintf (stderr
, "\n");
8825 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
8832 /* Clear implies relations which contain PRs in the given masks.
8833 P1_MASK indicates the source of the implies relation, while P2_MASK
8834 indicates the implied PR. */
8837 clear_qp_implies (p1_mask
, p2_mask
)
8844 while (i
< qp_implieslen
)
8846 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
8847 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
8850 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
8851 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
8852 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
8859 /* Add the PRs specified to the list of implied relations. */
8862 add_qp_imply (p1
, p2
)
8869 /* p0 is not meaningful here. */
8870 if (p1
== 0 || p2
== 0)
8876 /* If it exists already, ignore it. */
8877 for (i
= 0; i
< qp_implieslen
; i
++)
8879 if (qp_implies
[i
].p1
== p1
8880 && qp_implies
[i
].p2
== p2
8881 && qp_implies
[i
].path
== md
.path
8882 && !qp_implies
[i
].p2_branched
)
8886 if (qp_implieslen
== qp_impliestotlen
)
8888 qp_impliestotlen
+= 20;
8889 qp_implies
= (struct qp_imply
*)
8890 xrealloc ((void *) qp_implies
,
8891 qp_impliestotlen
* sizeof (struct qp_imply
));
8894 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
8895 qp_implies
[qp_implieslen
].p1
= p1
;
8896 qp_implies
[qp_implieslen
].p2
= p2
;
8897 qp_implies
[qp_implieslen
].path
= md
.path
;
8898 qp_implies
[qp_implieslen
++].p2_branched
= 0;
8900 /* Add in the implied transitive relations; for everything that p2 implies,
8901 make p1 imply that, too; for everything that implies p1, make it imply p2
8903 for (i
= 0; i
< qp_implieslen
; i
++)
8905 if (qp_implies
[i
].p1
== p2
)
8906 add_qp_imply (p1
, qp_implies
[i
].p2
);
8907 if (qp_implies
[i
].p2
== p1
)
8908 add_qp_imply (qp_implies
[i
].p1
, p2
);
8910 /* Add in mutex relations implied by this implies relation; for each mutex
8911 relation containing p2, duplicate it and replace p2 with p1. */
8912 bit
= (valueT
) 1 << p1
;
8913 mask
= (valueT
) 1 << p2
;
8914 for (i
= 0; i
< qp_mutexeslen
; i
++)
8916 if (qp_mutexes
[i
].prmask
& mask
)
8917 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
8921 /* Add the PRs specified in the mask to the mutex list; this means that only
8922 one of the PRs can be true at any time. PR0 should never be included in
8932 if (qp_mutexeslen
== qp_mutexestotlen
)
8934 qp_mutexestotlen
+= 20;
8935 qp_mutexes
= (struct qpmutex
*)
8936 xrealloc ((void *) qp_mutexes
,
8937 qp_mutexestotlen
* sizeof (struct qpmutex
));
8941 fprintf (stderr
, " Registering mutex on");
8942 print_prmask (mask
);
8943 fprintf (stderr
, "\n");
8945 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
8946 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
8950 has_suffix_p (name
, suffix
)
8954 size_t namelen
= strlen (name
);
8955 size_t sufflen
= strlen (suffix
);
8957 if (namelen
<= sufflen
)
8959 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
8963 clear_register_values ()
8967 fprintf (stderr
, " Clearing register values\n");
8968 for (i
= 1; i
< NELEMS (gr_values
); i
++)
8969 gr_values
[i
].known
= 0;
8972 /* Keep track of register values/changes which affect DV tracking.
8974 optimization note: should add a flag to classes of insns where otherwise we
8975 have to examine a group of strings to identify them. */
8978 note_register_values (idesc
)
8979 struct ia64_opcode
*idesc
;
8981 valueT qp_changemask
= 0;
8984 /* Invalidate values for registers being written to. */
8985 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8987 if (idesc
->operands
[i
] == IA64_OPND_R1
8988 || idesc
->operands
[i
] == IA64_OPND_R2
8989 || idesc
->operands
[i
] == IA64_OPND_R3
)
8991 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8992 if (regno
> 0 && regno
< NELEMS (gr_values
))
8993 gr_values
[regno
].known
= 0;
8995 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
8997 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8998 if (regno
> 0 && regno
< 4)
8999 gr_values
[regno
].known
= 0;
9001 else if (idesc
->operands
[i
] == IA64_OPND_P1
9002 || idesc
->operands
[i
] == IA64_OPND_P2
)
9004 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9005 qp_changemask
|= (valueT
) 1 << regno
;
9007 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9009 if (idesc
->operands
[2] & (valueT
) 0x10000)
9010 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9012 qp_changemask
= idesc
->operands
[2];
9015 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9017 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9018 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9020 qp_changemask
= idesc
->operands
[1];
9021 qp_changemask
&= ~(valueT
) 0xFFFF;
9026 /* Always clear qp branch flags on any PR change. */
9027 /* FIXME there may be exceptions for certain compares. */
9028 clear_qp_branch_flag (qp_changemask
);
9030 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9031 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9033 qp_changemask
|= ~(valueT
) 0xFFFF;
9034 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9036 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9037 gr_values
[i
].known
= 0;
9039 clear_qp_mutex (qp_changemask
);
9040 clear_qp_implies (qp_changemask
, qp_changemask
);
9042 /* After a call, all register values are undefined, except those marked
9044 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9045 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9047 /* FIXME keep GR values which are marked as "safe_across_calls" */
9048 clear_register_values ();
9049 clear_qp_mutex (~qp_safe_across_calls
);
9050 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9051 clear_qp_branch_flag (~qp_safe_across_calls
);
9053 else if (is_interruption_or_rfi (idesc
)
9054 || is_taken_branch (idesc
))
9056 clear_register_values ();
9057 clear_qp_mutex (~(valueT
) 0);
9058 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9060 /* Look for mutex and implies relations. */
9061 else if ((idesc
->operands
[0] == IA64_OPND_P1
9062 || idesc
->operands
[0] == IA64_OPND_P2
)
9063 && (idesc
->operands
[1] == IA64_OPND_P1
9064 || idesc
->operands
[1] == IA64_OPND_P2
))
9066 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9067 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9068 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9069 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9071 /* If both PRs are PR0, we can't really do anything. */
9072 if (p1
== 0 && p2
== 0)
9075 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9077 /* In general, clear mutexes and implies which include P1 or P2,
9078 with the following exceptions. */
9079 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9080 || has_suffix_p (idesc
->name
, ".and.orcm"))
9082 clear_qp_implies (p2mask
, p1mask
);
9084 else if (has_suffix_p (idesc
->name
, ".andcm")
9085 || has_suffix_p (idesc
->name
, ".and"))
9087 clear_qp_implies (0, p1mask
| p2mask
);
9089 else if (has_suffix_p (idesc
->name
, ".orcm")
9090 || has_suffix_p (idesc
->name
, ".or"))
9092 clear_qp_mutex (p1mask
| p2mask
);
9093 clear_qp_implies (p1mask
| p2mask
, 0);
9099 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9101 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9102 if (p1
== 0 || p2
== 0)
9103 clear_qp_mutex (p1mask
| p2mask
);
9105 added
= update_qp_mutex (p1mask
| p2mask
);
9107 if (CURR_SLOT
.qp_regno
== 0
9108 || has_suffix_p (idesc
->name
, ".unc"))
9110 if (added
== 0 && p1
&& p2
)
9111 add_qp_mutex (p1mask
| p2mask
);
9112 if (CURR_SLOT
.qp_regno
!= 0)
9115 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9117 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9122 /* Look for mov imm insns into GRs. */
9123 else if (idesc
->operands
[0] == IA64_OPND_R1
9124 && (idesc
->operands
[1] == IA64_OPND_IMM22
9125 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9126 && (strcmp (idesc
->name
, "mov") == 0
9127 || strcmp (idesc
->name
, "movl") == 0))
9129 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9130 if (regno
> 0 && regno
< NELEMS (gr_values
))
9132 gr_values
[regno
].known
= 1;
9133 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9134 gr_values
[regno
].path
= md
.path
;
9137 fprintf (stderr
, " Know gr%d = ", regno
);
9138 fprintf_vma (stderr
, gr_values
[regno
].value
);
9139 fputs ("\n", stderr
);
9145 clear_qp_mutex (qp_changemask
);
9146 clear_qp_implies (qp_changemask
, qp_changemask
);
9150 /* Return whether the given predicate registers are currently mutex. */
9153 qp_mutex (p1
, p2
, path
)
9163 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9164 for (i
= 0; i
< qp_mutexeslen
; i
++)
9166 if (qp_mutexes
[i
].path
>= path
9167 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9174 /* Return whether the given resource is in the given insn's list of chks
9175 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9179 resources_match (rs
, idesc
, note
, qp_regno
, path
)
9181 struct ia64_opcode
*idesc
;
9186 struct rsrc specs
[MAX_SPECS
];
9189 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9190 we don't need to check. One exception is note 11, which indicates that
9191 target predicates are written regardless of PR[qp]. */
9192 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
9196 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
9199 /* UNAT checking is a bit more specific than other resources */
9200 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
9201 && specs
[count
].mem_offset
.hint
9202 && rs
->mem_offset
.hint
)
9204 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
9206 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
9207 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
9214 /* Skip apparent PR write conflicts where both writes are an AND or both
9215 writes are an OR. */
9216 if (rs
->dependency
->specifier
== IA64_RS_PR
9217 || rs
->dependency
->specifier
== IA64_RS_PRr
9218 || rs
->dependency
->specifier
== IA64_RS_PR63
)
9220 if (specs
[count
].cmp_type
!= CMP_NONE
9221 && specs
[count
].cmp_type
== rs
->cmp_type
)
9224 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
9225 dv_mode
[rs
->dependency
->mode
],
9226 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9227 specs
[count
].index
: 63);
9232 " %s on parallel compare conflict %s vs %s on PR%d\n",
9233 dv_mode
[rs
->dependency
->mode
],
9234 dv_cmp_type
[rs
->cmp_type
],
9235 dv_cmp_type
[specs
[count
].cmp_type
],
9236 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9237 specs
[count
].index
: 63);
9241 /* If either resource is not specific, conservatively assume a conflict
9243 if (!specs
[count
].specific
|| !rs
->specific
)
9245 else if (specs
[count
].index
== rs
->index
)
9250 fprintf (stderr
, " No %s conflicts\n", rs
->dependency
->name
);
9256 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9257 insert a stop to create the break. Update all resource dependencies
9258 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9259 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9260 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9264 insn_group_break (insert_stop
, qp_regno
, save_current
)
9271 if (insert_stop
&& md
.num_slots_in_use
> 0)
9272 PREV_SLOT
.end_of_insn_group
= 1;
9276 fprintf (stderr
, " Insn group break%s",
9277 (insert_stop
? " (w/stop)" : ""));
9279 fprintf (stderr
, " effective for QP=%d", qp_regno
);
9280 fprintf (stderr
, "\n");
9284 while (i
< regdepslen
)
9286 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
9289 && regdeps
[i
].qp_regno
!= qp_regno
)
9296 && CURR_SLOT
.src_file
== regdeps
[i
].file
9297 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
9303 /* clear dependencies which are automatically cleared by a stop, or
9304 those that have reached the appropriate state of insn serialization */
9305 if (dep
->semantics
== IA64_DVS_IMPLIED
9306 || dep
->semantics
== IA64_DVS_IMPLIEDF
9307 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
9309 print_dependency ("Removing", i
);
9310 regdeps
[i
] = regdeps
[--regdepslen
];
9314 if (dep
->semantics
== IA64_DVS_DATA
9315 || dep
->semantics
== IA64_DVS_INSTR
9316 || dep
->semantics
== IA64_DVS_SPECIFIC
)
9318 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
9319 regdeps
[i
].insn_srlz
= STATE_STOP
;
9320 if (regdeps
[i
].data_srlz
== STATE_NONE
)
9321 regdeps
[i
].data_srlz
= STATE_STOP
;
9328 /* Add the given resource usage spec to the list of active dependencies. */
9331 mark_resource (idesc
, dep
, spec
, depind
, path
)
9332 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
9333 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
9338 if (regdepslen
== regdepstotlen
)
9340 regdepstotlen
+= 20;
9341 regdeps
= (struct rsrc
*)
9342 xrealloc ((void *) regdeps
,
9343 regdepstotlen
* sizeof (struct rsrc
));
9346 regdeps
[regdepslen
] = *spec
;
9347 regdeps
[regdepslen
].depind
= depind
;
9348 regdeps
[regdepslen
].path
= path
;
9349 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
9350 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
9352 print_dependency ("Adding", regdepslen
);
9358 print_dependency (action
, depind
)
9364 fprintf (stderr
, " %s %s '%s'",
9365 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
9366 (regdeps
[depind
].dependency
)->name
);
9367 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
!= 0)
9368 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
9369 if (regdeps
[depind
].mem_offset
.hint
)
9371 fputs (" ", stderr
);
9372 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
9373 fputs ("+", stderr
);
9374 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
9376 fprintf (stderr
, "\n");
9381 instruction_serialization ()
9385 fprintf (stderr
, " Instruction serialization\n");
9386 for (i
= 0; i
< regdepslen
; i
++)
9387 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
9388 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
9392 data_serialization ()
9396 fprintf (stderr
, " Data serialization\n");
9397 while (i
< regdepslen
)
9399 if (regdeps
[i
].data_srlz
== STATE_STOP
9400 /* Note: as of 991210, all "other" dependencies are cleared by a
9401 data serialization. This might change with new tables */
9402 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
9404 print_dependency ("Removing", i
);
9405 regdeps
[i
] = regdeps
[--regdepslen
];
9412 /* Insert stops and serializations as needed to avoid DVs. */
9415 remove_marked_resource (rs
)
9418 switch (rs
->dependency
->semantics
)
9420 case IA64_DVS_SPECIFIC
:
9422 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
9423 /* ...fall through... */
9424 case IA64_DVS_INSTR
:
9426 fprintf (stderr
, "Inserting instr serialization\n");
9427 if (rs
->insn_srlz
< STATE_STOP
)
9428 insn_group_break (1, 0, 0);
9429 if (rs
->insn_srlz
< STATE_SRLZ
)
9431 int oldqp
= CURR_SLOT
.qp_regno
;
9432 struct ia64_opcode
*oldidesc
= CURR_SLOT
.idesc
;
9433 /* Manually jam a srlz.i insn into the stream */
9434 CURR_SLOT
.qp_regno
= 0;
9435 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
9436 instruction_serialization ();
9437 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9438 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9440 CURR_SLOT
.qp_regno
= oldqp
;
9441 CURR_SLOT
.idesc
= oldidesc
;
9443 insn_group_break (1, 0, 0);
9445 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
9446 "other" types of DV are eliminated
9447 by a data serialization */
9450 fprintf (stderr
, "Inserting data serialization\n");
9451 if (rs
->data_srlz
< STATE_STOP
)
9452 insn_group_break (1, 0, 0);
9454 int oldqp
= CURR_SLOT
.qp_regno
;
9455 struct ia64_opcode
*oldidesc
= CURR_SLOT
.idesc
;
9456 /* Manually jam a srlz.d insn into the stream */
9457 CURR_SLOT
.qp_regno
= 0;
9458 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
9459 data_serialization ();
9460 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9461 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9463 CURR_SLOT
.qp_regno
= oldqp
;
9464 CURR_SLOT
.idesc
= oldidesc
;
9467 case IA64_DVS_IMPLIED
:
9468 case IA64_DVS_IMPLIEDF
:
9470 fprintf (stderr
, "Inserting stop\n");
9471 insn_group_break (1, 0, 0);
9478 /* Check the resources used by the given opcode against the current dependency
9481 The check is run once for each execution path encountered. In this case,
9482 a unique execution path is the sequence of instructions following a code
9483 entry point, e.g. the following has three execution paths, one starting
9484 at L0, one at L1, and one at L2.
9493 check_dependencies (idesc
)
9494 struct ia64_opcode
*idesc
;
9496 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
9500 /* Note that the number of marked resources may change within the
9501 loop if in auto mode. */
9503 while (i
< regdepslen
)
9505 struct rsrc
*rs
= ®deps
[i
];
9506 const struct ia64_dependency
*dep
= rs
->dependency
;
9511 if (dep
->semantics
== IA64_DVS_NONE
9512 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
9518 note
= NOTE (opdeps
->chks
[chkind
]);
9520 /* Check this resource against each execution path seen thus far. */
9521 for (path
= 0; path
<= md
.path
; path
++)
9525 /* If the dependency wasn't on the path being checked, ignore it. */
9526 if (rs
->path
< path
)
9529 /* If the QP for this insn implies a QP which has branched, don't
9530 bother checking. Ed. NOTE: I don't think this check is terribly
9531 useful; what's the point of generating code which will only be
9532 reached if its QP is zero?
9533 This code was specifically inserted to handle the following code,
9534 based on notes from Intel's DV checking code, where p1 implies p2.
9540 if (CURR_SLOT
.qp_regno
!= 0)
9544 for (implies
= 0; implies
< qp_implieslen
; implies
++)
9546 if (qp_implies
[implies
].path
>= path
9547 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
9548 && qp_implies
[implies
].p2_branched
)
9558 if ((matchtype
= resources_match (rs
, idesc
, note
,
9559 CURR_SLOT
.qp_regno
, path
)) != 0)
9562 char pathmsg
[256] = "";
9563 char indexmsg
[256] = "";
9564 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
9567 sprintf (pathmsg
, " when entry is at label '%s'",
9568 md
.entry_labels
[path
- 1]);
9569 if (rs
->specific
&& rs
->index
!= 0)
9570 sprintf (indexmsg
, ", specific resource number is %d",
9572 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9574 (certain
? "violates" : "may violate"),
9575 dv_mode
[dep
->mode
], dep
->name
,
9576 dv_sem
[dep
->semantics
],
9579 if (md
.explicit_mode
)
9581 as_warn ("%s", msg
);
9583 as_warn (_("Only the first path encountering the conflict "
9585 as_warn_where (rs
->file
, rs
->line
,
9586 _("This is the location of the "
9587 "conflicting usage"));
9588 /* Don't bother checking other paths, to avoid duplicating
9595 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
9597 remove_marked_resource (rs
);
9599 /* since the set of dependencies has changed, start over */
9600 /* FIXME -- since we're removing dvs as we go, we
9601 probably don't really need to start over... */
9614 /* Register new dependencies based on the given opcode. */
9617 mark_resources (idesc
)
9618 struct ia64_opcode
*idesc
;
9621 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
9622 int add_only_qp_reads
= 0;
9624 /* A conditional branch only uses its resources if it is taken; if it is
9625 taken, we stop following that path. The other branch types effectively
9626 *always* write their resources. If it's not taken, register only QP
9628 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
9630 add_only_qp_reads
= 1;
9634 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
9636 for (i
= 0; i
< opdeps
->nregs
; i
++)
9638 const struct ia64_dependency
*dep
;
9639 struct rsrc specs
[MAX_SPECS
];
9644 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
9645 note
= NOTE (opdeps
->regs
[i
]);
9647 if (add_only_qp_reads
9648 && !(dep
->mode
== IA64_DV_WAR
9649 && (dep
->specifier
== IA64_RS_PR
9650 || dep
->specifier
== IA64_RS_PRr
9651 || dep
->specifier
== IA64_RS_PR63
)))
9654 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
9657 if (md
.debug_dv
&& !count
)
9658 fprintf (stderr
, " No %s %s usage found (path %d)\n",
9659 dv_mode
[dep
->mode
], dep
->name
, md
.path
);
9664 mark_resource (idesc
, dep
, &specs
[count
],
9665 DEP (opdeps
->regs
[i
]), md
.path
);
9668 /* The execution path may affect register values, which may in turn
9669 affect which indirect-access resources are accessed. */
9670 switch (dep
->specifier
)
9682 for (path
= 0; path
< md
.path
; path
++)
9684 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
9686 mark_resource (idesc
, dep
, &specs
[count
],
9687 DEP (opdeps
->regs
[i
]), path
);
9694 /* Remove dependencies when they no longer apply. */
9697 update_dependencies (idesc
)
9698 struct ia64_opcode
*idesc
;
9702 if (strcmp (idesc
->name
, "srlz.i") == 0)
9704 instruction_serialization ();
9706 else if (strcmp (idesc
->name
, "srlz.d") == 0)
9708 data_serialization ();
9710 else if (is_interruption_or_rfi (idesc
)
9711 || is_taken_branch (idesc
))
9713 /* Although technically the taken branch doesn't clear dependencies
9714 which require a srlz.[id], we don't follow the branch; the next
9715 instruction is assumed to start with a clean slate. */
9719 else if (is_conditional_branch (idesc
)
9720 && CURR_SLOT
.qp_regno
!= 0)
9722 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
9724 for (i
= 0; i
< qp_implieslen
; i
++)
9726 /* If the conditional branch's predicate is implied by the predicate
9727 in an existing dependency, remove that dependency. */
9728 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
9731 /* Note that this implied predicate takes a branch so that if
9732 a later insn generates a DV but its predicate implies this
9733 one, we can avoid the false DV warning. */
9734 qp_implies
[i
].p2_branched
= 1;
9735 while (depind
< regdepslen
)
9737 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
9739 print_dependency ("Removing", depind
);
9740 regdeps
[depind
] = regdeps
[--regdepslen
];
9747 /* Any marked resources which have this same predicate should be
9748 cleared, provided that the QP hasn't been modified between the
9749 marking instruction and the branch. */
9752 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
9757 while (i
< regdepslen
)
9759 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
9760 && regdeps
[i
].link_to_qp_branch
9761 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
9762 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
9764 /* Treat like a taken branch */
9765 print_dependency ("Removing", i
);
9766 regdeps
[i
] = regdeps
[--regdepslen
];
9775 /* Examine the current instruction for dependency violations. */
9779 struct ia64_opcode
*idesc
;
9783 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
9784 idesc
->name
, CURR_SLOT
.src_line
,
9785 idesc
->dependencies
->nchks
,
9786 idesc
->dependencies
->nregs
);
9789 /* Look through the list of currently marked resources; if the current
9790 instruction has the dependency in its chks list which uses that resource,
9791 check against the specific resources used. */
9792 check_dependencies (idesc
);
9794 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
9795 then add them to the list of marked resources. */
9796 mark_resources (idesc
);
9798 /* There are several types of dependency semantics, and each has its own
9799 requirements for being cleared
9801 Instruction serialization (insns separated by interruption, rfi, or
9802 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
9804 Data serialization (instruction serialization, or writer + srlz.d +
9805 reader, where writer and srlz.d are in separate groups) clears
9806 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
9807 always be the case).
9809 Instruction group break (groups separated by stop, taken branch,
9810 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
9812 update_dependencies (idesc
);
9814 /* Sometimes, knowing a register value allows us to avoid giving a false DV
9815 warning. Keep track of as many as possible that are useful. */
9816 note_register_values (idesc
);
9818 /* We don't need or want this anymore. */
9819 md
.mem_offset
.hint
= 0;
9824 /* Translate one line of assembly. Pseudo ops and labels do not show
9830 char *saved_input_line_pointer
, *mnemonic
;
9831 const struct pseudo_opcode
*pdesc
;
9832 struct ia64_opcode
*idesc
;
9833 unsigned char qp_regno
;
9837 saved_input_line_pointer
= input_line_pointer
;
9838 input_line_pointer
= str
;
9840 /* extract the opcode (mnemonic): */
9842 mnemonic
= input_line_pointer
;
9843 ch
= get_symbol_end ();
9844 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
9847 *input_line_pointer
= ch
;
9848 (*pdesc
->handler
) (pdesc
->arg
);
9852 /* Find the instruction descriptor matching the arguments. */
9854 idesc
= ia64_find_opcode (mnemonic
);
9855 *input_line_pointer
= ch
;
9858 as_bad ("Unknown opcode `%s'", mnemonic
);
9862 idesc
= parse_operands (idesc
);
9866 /* Handle the dynamic ops we can handle now: */
9867 if (idesc
->type
== IA64_TYPE_DYN
)
9869 if (strcmp (idesc
->name
, "add") == 0)
9871 if (CURR_SLOT
.opnd
[2].X_op
== O_register
9872 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
9876 ia64_free_opcode (idesc
);
9877 idesc
= ia64_find_opcode (mnemonic
);
9879 know (!idesc
->next
);
9882 else if (strcmp (idesc
->name
, "mov") == 0)
9884 enum ia64_opnd opnd1
, opnd2
;
9887 opnd1
= idesc
->operands
[0];
9888 opnd2
= idesc
->operands
[1];
9889 if (opnd1
== IA64_OPND_AR3
)
9891 else if (opnd2
== IA64_OPND_AR3
)
9895 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
9896 && ar_is_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
9900 ia64_free_opcode (idesc
);
9901 idesc
= ia64_find_opcode (mnemonic
);
9902 while (idesc
!= NULL
9903 && (idesc
->operands
[0] != opnd1
9904 || idesc
->operands
[1] != opnd2
))
9905 idesc
= get_next_opcode (idesc
);
9910 if (md
.qp
.X_op
== O_register
)
9912 qp_regno
= md
.qp
.X_add_number
- REG_P
;
9913 md
.qp
.X_op
= O_absent
;
9916 flags
= idesc
->flags
;
9918 if ((flags
& IA64_OPCODE_FIRST
) != 0)
9919 insn_group_break (1, 0, 0);
9921 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
9923 as_bad ("`%s' cannot be predicated", idesc
->name
);
9927 /* Build the instruction. */
9928 CURR_SLOT
.qp_regno
= qp_regno
;
9929 CURR_SLOT
.idesc
= idesc
;
9930 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
9931 dwarf2_where (&CURR_SLOT
.debug_line
);
9933 /* Add unwind entry, if there is one. */
9934 if (unwind
.current_entry
)
9936 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
9937 unwind
.current_entry
= NULL
;
9940 /* Check for dependency violations. */
9944 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9945 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9948 if ((flags
& IA64_OPCODE_LAST
) != 0)
9949 insn_group_break (1, 0, 0);
9951 md
.last_text_seg
= now_seg
;
9954 input_line_pointer
= saved_input_line_pointer
;
9957 /* Called when symbol NAME cannot be found in the symbol table.
9958 Should be used for dynamic valued symbols only. */
9961 md_undefined_symbol (name
)
9962 char *name ATTRIBUTE_UNUSED
;
9967 /* Called for any expression that can not be recognized. When the
9968 function is called, `input_line_pointer' will point to the start of
9975 enum pseudo_type pseudo_type
;
9980 switch (*input_line_pointer
)
9983 /* Find what relocation pseudo-function we're dealing with. */
9985 ch
= *++input_line_pointer
;
9986 for (i
= 0; i
< NELEMS (pseudo_func
); ++i
)
9987 if (pseudo_func
[i
].name
&& pseudo_func
[i
].name
[0] == ch
)
9989 len
= strlen (pseudo_func
[i
].name
);
9990 if (strncmp (pseudo_func
[i
].name
+ 1,
9991 input_line_pointer
+ 1, len
- 1) == 0
9992 && !is_part_of_name (input_line_pointer
[len
]))
9994 input_line_pointer
+= len
;
9995 pseudo_type
= pseudo_func
[i
].type
;
9999 switch (pseudo_type
)
10001 case PSEUDO_FUNC_RELOC
:
10002 SKIP_WHITESPACE ();
10003 if (*input_line_pointer
!= '(')
10005 as_bad ("Expected '('");
10009 ++input_line_pointer
;
10011 if (*input_line_pointer
++ != ')')
10013 as_bad ("Missing ')'");
10016 if (e
->X_op
!= O_symbol
)
10018 if (e
->X_op
!= O_pseudo_fixup
)
10020 as_bad ("Not a symbolic expression");
10023 if (i
!= FUNC_LT_RELATIVE
)
10025 as_bad ("Illegal combination of relocation functions");
10028 switch (S_GET_VALUE (e
->X_op_symbol
))
10030 case FUNC_FPTR_RELATIVE
:
10031 i
= FUNC_LT_FPTR_RELATIVE
; break;
10032 case FUNC_DTP_MODULE
:
10033 i
= FUNC_LT_DTP_MODULE
; break;
10034 case FUNC_DTP_RELATIVE
:
10035 i
= FUNC_LT_DTP_RELATIVE
; break;
10036 case FUNC_TP_RELATIVE
:
10037 i
= FUNC_LT_TP_RELATIVE
; break;
10039 as_bad ("Illegal combination of relocation functions");
10043 /* Make sure gas doesn't get rid of local symbols that are used
10045 e
->X_op
= O_pseudo_fixup
;
10046 e
->X_op_symbol
= pseudo_func
[i
].u
.sym
;
10049 case PSEUDO_FUNC_CONST
:
10050 e
->X_op
= O_constant
;
10051 e
->X_add_number
= pseudo_func
[i
].u
.ival
;
10054 case PSEUDO_FUNC_REG
:
10055 e
->X_op
= O_register
;
10056 e
->X_add_number
= pseudo_func
[i
].u
.ival
;
10060 name
= input_line_pointer
- 1;
10062 as_bad ("Unknown pseudo function `%s'", name
);
10068 ++input_line_pointer
;
10070 if (*input_line_pointer
!= ']')
10072 as_bad ("Closing bracket misssing");
10077 if (e
->X_op
!= O_register
)
10078 as_bad ("Register expected as index");
10080 ++input_line_pointer
;
10091 ignore_rest_of_line ();
10094 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10095 a section symbol plus some offset. For relocs involving @fptr(),
10096 directives we don't want such adjustments since we need to have the
10097 original symbol's name in the reloc. */
10099 ia64_fix_adjustable (fix
)
10102 /* Prevent all adjustments to global symbols */
10103 if (S_IS_EXTERN (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10106 switch (fix
->fx_r_type
)
10108 case BFD_RELOC_IA64_FPTR64I
:
10109 case BFD_RELOC_IA64_FPTR32MSB
:
10110 case BFD_RELOC_IA64_FPTR32LSB
:
10111 case BFD_RELOC_IA64_FPTR64MSB
:
10112 case BFD_RELOC_IA64_FPTR64LSB
:
10113 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10114 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10124 ia64_force_relocation (fix
)
10127 switch (fix
->fx_r_type
)
10129 case BFD_RELOC_IA64_FPTR64I
:
10130 case BFD_RELOC_IA64_FPTR32MSB
:
10131 case BFD_RELOC_IA64_FPTR32LSB
:
10132 case BFD_RELOC_IA64_FPTR64MSB
:
10133 case BFD_RELOC_IA64_FPTR64LSB
:
10135 case BFD_RELOC_IA64_LTOFF22
:
10136 case BFD_RELOC_IA64_LTOFF64I
:
10137 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10138 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10139 case BFD_RELOC_IA64_PLTOFF22
:
10140 case BFD_RELOC_IA64_PLTOFF64I
:
10141 case BFD_RELOC_IA64_PLTOFF64MSB
:
10142 case BFD_RELOC_IA64_PLTOFF64LSB
:
10144 case BFD_RELOC_IA64_LTOFF22X
:
10145 case BFD_RELOC_IA64_LDXMOV
:
10152 return generic_force_reloc (fix
);
10155 /* Decide from what point a pc-relative relocation is relative to,
10156 relative to the pc-relative fixup. Er, relatively speaking. */
10158 ia64_pcrel_from_section (fix
, sec
)
10162 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10164 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10171 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10173 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10177 expr
.X_op
= O_pseudo_fixup
;
10178 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10179 expr
.X_add_number
= 0;
10180 expr
.X_add_symbol
= symbol
;
10181 emit_expr (&expr
, size
);
10184 /* This is called whenever some data item (not an instruction) needs a
10185 fixup. We pick the right reloc code depending on the byteorder
10186 currently in effect. */
10188 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
10194 bfd_reloc_code_real_type code
;
10199 /* There are no reloc for 8 and 16 bit quantities, but we allow
10200 them here since they will work fine as long as the expression
10201 is fully defined at the end of the pass over the source file. */
10202 case 1: code
= BFD_RELOC_8
; break;
10203 case 2: code
= BFD_RELOC_16
; break;
10205 if (target_big_endian
)
10206 code
= BFD_RELOC_IA64_DIR32MSB
;
10208 code
= BFD_RELOC_IA64_DIR32LSB
;
10212 /* In 32-bit mode, data8 could mean function descriptors too. */
10213 if (exp
->X_op
== O_pseudo_fixup
10214 && exp
->X_op_symbol
10215 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
10216 && !(md
.flags
& EF_IA_64_ABI64
))
10218 if (target_big_endian
)
10219 code
= BFD_RELOC_IA64_IPLTMSB
;
10221 code
= BFD_RELOC_IA64_IPLTLSB
;
10222 exp
->X_op
= O_symbol
;
10227 if (target_big_endian
)
10228 code
= BFD_RELOC_IA64_DIR64MSB
;
10230 code
= BFD_RELOC_IA64_DIR64LSB
;
10235 if (exp
->X_op
== O_pseudo_fixup
10236 && exp
->X_op_symbol
10237 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
10239 if (target_big_endian
)
10240 code
= BFD_RELOC_IA64_IPLTMSB
;
10242 code
= BFD_RELOC_IA64_IPLTLSB
;
10243 exp
->X_op
= O_symbol
;
10249 as_bad ("Unsupported fixup size %d", nbytes
);
10250 ignore_rest_of_line ();
10254 if (exp
->X_op
== O_pseudo_fixup
)
10256 exp
->X_op
= O_symbol
;
10257 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
10258 /* ??? If code unchanged, unsupported. */
10261 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
10262 /* We need to store the byte order in effect in case we're going
10263 to fix an 8 or 16 bit relocation (for which there no real
10264 relocs available). See md_apply_fix3(). */
10265 fix
->tc_fix_data
.bigendian
= target_big_endian
;
10268 /* Return the actual relocation we wish to associate with the pseudo
10269 reloc described by SYM and R_TYPE. SYM should be one of the
10270 symbols in the pseudo_func array, or NULL. */
10272 static bfd_reloc_code_real_type
10273 ia64_gen_real_reloc_type (sym
, r_type
)
10274 struct symbol
*sym
;
10275 bfd_reloc_code_real_type r_type
;
10277 bfd_reloc_code_real_type
new = 0;
10284 switch (S_GET_VALUE (sym
))
10286 case FUNC_FPTR_RELATIVE
:
10289 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
10290 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
10291 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
10292 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
10293 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
10298 case FUNC_GP_RELATIVE
:
10301 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
10302 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
10303 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
10304 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
10305 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
10306 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
10311 case FUNC_LT_RELATIVE
:
10314 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
10315 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
10320 case FUNC_LT_RELATIVE_X
:
10323 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
10328 case FUNC_PC_RELATIVE
:
10331 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
10332 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
10333 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
10334 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
10335 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
10336 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
10341 case FUNC_PLT_RELATIVE
:
10344 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
10345 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
10346 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
10347 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
10352 case FUNC_SEC_RELATIVE
:
10355 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
10356 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
10357 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
10358 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
10363 case FUNC_SEG_RELATIVE
:
10366 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
10367 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
10368 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
10369 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
10374 case FUNC_LTV_RELATIVE
:
10377 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
10378 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
10379 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
10380 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
10385 case FUNC_LT_FPTR_RELATIVE
:
10388 case BFD_RELOC_IA64_IMM22
:
10389 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
10390 case BFD_RELOC_IA64_IMM64
:
10391 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
10397 case FUNC_TP_RELATIVE
:
10400 case BFD_RELOC_IA64_IMM14
:
10401 new = BFD_RELOC_IA64_TPREL14
; break;
10402 case BFD_RELOC_IA64_IMM22
:
10403 new = BFD_RELOC_IA64_TPREL22
; break;
10404 case BFD_RELOC_IA64_IMM64
:
10405 new = BFD_RELOC_IA64_TPREL64I
; break;
10411 case FUNC_LT_TP_RELATIVE
:
10414 case BFD_RELOC_IA64_IMM22
:
10415 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
10421 case FUNC_LT_DTP_MODULE
:
10424 case BFD_RELOC_IA64_IMM22
:
10425 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
10431 case FUNC_DTP_RELATIVE
:
10434 case BFD_RELOC_IA64_DIR64MSB
:
10435 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
10436 case BFD_RELOC_IA64_DIR64LSB
:
10437 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
10438 case BFD_RELOC_IA64_IMM14
:
10439 new = BFD_RELOC_IA64_DTPREL14
; break;
10440 case BFD_RELOC_IA64_IMM22
:
10441 new = BFD_RELOC_IA64_DTPREL22
; break;
10442 case BFD_RELOC_IA64_IMM64
:
10443 new = BFD_RELOC_IA64_DTPREL64I
; break;
10449 case FUNC_LT_DTP_RELATIVE
:
10452 case BFD_RELOC_IA64_IMM22
:
10453 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
10459 case FUNC_IPLT_RELOC
:
10466 /* Hmmmm. Should this ever occur? */
10473 /* Here is where generate the appropriate reloc for pseudo relocation
10476 ia64_validate_fix (fix
)
10479 switch (fix
->fx_r_type
)
10481 case BFD_RELOC_IA64_FPTR64I
:
10482 case BFD_RELOC_IA64_FPTR32MSB
:
10483 case BFD_RELOC_IA64_FPTR64LSB
:
10484 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10485 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10486 if (fix
->fx_offset
!= 0)
10487 as_bad_where (fix
->fx_file
, fix
->fx_line
,
10488 "No addend allowed in @fptr() relocation");
10496 fix_insn (fix
, odesc
, value
)
10498 const struct ia64_operand
*odesc
;
10501 bfd_vma insn
[3], t0
, t1
, control_bits
;
10506 slot
= fix
->fx_where
& 0x3;
10507 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
10509 /* Bundles are always in little-endian byte order */
10510 t0
= bfd_getl64 (fixpos
);
10511 t1
= bfd_getl64 (fixpos
+ 8);
10512 control_bits
= t0
& 0x1f;
10513 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
10514 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
10515 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
10518 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
10520 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
10521 insn
[2] |= (((value
& 0x7f) << 13)
10522 | (((value
>> 7) & 0x1ff) << 27)
10523 | (((value
>> 16) & 0x1f) << 22)
10524 | (((value
>> 21) & 0x1) << 21)
10525 | (((value
>> 63) & 0x1) << 36));
10527 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
10529 if (value
& ~0x3fffffffffffffffULL
)
10530 err
= "integer operand out of range";
10531 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
10532 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
10534 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
10537 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
10538 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
10539 | (((value
>> 0) & 0xfffff) << 13));
10542 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
10545 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
10547 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
10548 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
10549 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
10550 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
10553 /* Attempt to simplify or even eliminate a fixup. The return value is
10554 ignored; perhaps it was once meaningful, but now it is historical.
10555 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10557 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10561 md_apply_fix3 (fix
, valP
, seg
)
10564 segT seg ATTRIBUTE_UNUSED
;
10567 valueT value
= *valP
;
10569 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
10573 switch (fix
->fx_r_type
)
10575 case BFD_RELOC_IA64_DIR32MSB
:
10576 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32MSB
;
10579 case BFD_RELOC_IA64_DIR32LSB
:
10580 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32LSB
;
10583 case BFD_RELOC_IA64_DIR64MSB
:
10584 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64MSB
;
10587 case BFD_RELOC_IA64_DIR64LSB
:
10588 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64LSB
;
10597 switch (fix
->fx_r_type
)
10599 case BFD_RELOC_UNUSED
:
10600 /* This must be a TAG13 or TAG13b operand. There are no external
10601 relocs defined for them, so we must give an error. */
10602 as_bad_where (fix
->fx_file
, fix
->fx_line
,
10603 "%s must have a constant value",
10604 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
10608 case BFD_RELOC_IA64_TPREL14
:
10609 case BFD_RELOC_IA64_TPREL22
:
10610 case BFD_RELOC_IA64_TPREL64I
:
10611 case BFD_RELOC_IA64_LTOFF_TPREL22
:
10612 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
10613 case BFD_RELOC_IA64_DTPREL14
:
10614 case BFD_RELOC_IA64_DTPREL22
:
10615 case BFD_RELOC_IA64_DTPREL64I
:
10616 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
10617 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
10624 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
10626 if (fix
->tc_fix_data
.bigendian
)
10627 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
10629 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
10634 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
10639 /* Generate the BFD reloc to be stuck in the object file from the
10640 fixup used internally in the assembler. */
10643 tc_gen_reloc (sec
, fixp
)
10644 asection
*sec ATTRIBUTE_UNUSED
;
10649 reloc
= xmalloc (sizeof (*reloc
));
10650 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
10651 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
10652 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
10653 reloc
->addend
= fixp
->fx_offset
;
10654 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
10658 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
10659 "Cannot represent %s relocation in object file",
10660 bfd_get_reloc_code_name (fixp
->fx_r_type
));
10665 /* Turn a string in input_line_pointer into a floating point constant
10666 of type TYPE, and store the appropriate bytes in *LIT. The number
10667 of LITTLENUMS emitted is stored in *SIZE. An error message is
10668 returned, or NULL on OK. */
10670 #define MAX_LITTLENUMS 5
10673 md_atof (type
, lit
, size
)
10678 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
10708 return "Bad call to MD_ATOF()";
10710 t
= atof_ieee (input_line_pointer
, type
, words
);
10712 input_line_pointer
= t
;
10714 (*ia64_float_to_chars
) (lit
, words
, prec
);
10718 /* It is 10 byte floating point with 6 byte padding. */
10719 memset (&lit
[10], 0, 6);
10720 *size
= 8 * sizeof (LITTLENUM_TYPE
);
10723 *size
= prec
* sizeof (LITTLENUM_TYPE
);
10728 /* Handle ia64 specific semantics of the align directive. */
10731 ia64_md_do_align (n
, fill
, len
, max
)
10732 int n ATTRIBUTE_UNUSED
;
10733 const char *fill ATTRIBUTE_UNUSED
;
10734 int len ATTRIBUTE_UNUSED
;
10735 int max ATTRIBUTE_UNUSED
;
10737 if (subseg_text_p (now_seg
))
10738 ia64_flush_insns ();
10741 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
10742 of an rs_align_code fragment. */
10745 ia64_handle_align (fragp
)
10748 /* Use mfi bundle of nops with no stop bits. */
10749 static const unsigned char le_nop
[]
10750 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10751 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10756 if (fragp
->fr_type
!= rs_align_code
)
10759 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
10760 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
10762 /* Make sure we are on a 16-byte boundary, in case someone has been
10763 putting data into a text section. */
10766 int fix
= bytes
& 15;
10767 memset (p
, 0, fix
);
10770 fragp
->fr_fix
+= fix
;
10773 /* Instruction bundles are always little-endian. */
10774 memcpy (p
, le_nop
, 16);
10775 fragp
->fr_var
= 16;
10779 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
10784 number_to_chars_bigendian (lit
, (long) (*words
++),
10785 sizeof (LITTLENUM_TYPE
));
10786 lit
+= sizeof (LITTLENUM_TYPE
);
10791 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
10796 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
10797 sizeof (LITTLENUM_TYPE
));
10798 lit
+= sizeof (LITTLENUM_TYPE
);
10803 ia64_elf_section_change_hook (void)
10805 dot_byteorder (-1);
10808 /* Check if a label should be made global. */
10810 ia64_check_label (symbolS
*label
)
10812 if (*input_line_pointer
== ':')
10814 S_SET_EXTERNAL (label
);
10815 input_line_pointer
++;
10819 /* Used to remember where .alias and .secalias directives are seen. We
10820 will rename symbol and section names when we are about to output
10821 the relocatable file. */
10824 char *file
; /* The file where the directive is seen. */
10825 unsigned int line
; /* The line number the directive is at. */
10826 const char *name
; /* The orignale name of the symbol. */
10829 /* Called for .alias and .secalias directives. If SECTION is 1, it is
10830 .secalias. Otherwise, it is .alias. */
10832 dot_alias (int section
)
10834 char *name
, *alias
;
10838 const char *error_string
;
10841 struct hash_control
*ahash
, *nhash
;
10844 name
= input_line_pointer
;
10845 delim
= get_symbol_end ();
10846 end_name
= input_line_pointer
;
10849 if (name
== end_name
)
10851 as_bad (_("expected symbol name"));
10852 discard_rest_of_line ();
10856 SKIP_WHITESPACE ();
10858 if (*input_line_pointer
!= ',')
10861 as_bad (_("expected comma after \"%s\""), name
);
10863 ignore_rest_of_line ();
10867 input_line_pointer
++;
10870 /* We call demand_copy_C_string to check if alias string is valid.
10871 There should be a closing `"' and no `\0' in the string. */
10872 alias
= demand_copy_C_string (&len
);
10875 ignore_rest_of_line ();
10879 /* Make a copy of name string. */
10880 len
= strlen (name
) + 1;
10881 obstack_grow (¬es
, name
, len
);
10882 name
= obstack_finish (¬es
);
10887 ahash
= secalias_hash
;
10888 nhash
= secalias_name_hash
;
10893 ahash
= alias_hash
;
10894 nhash
= alias_name_hash
;
10897 /* Check if alias has been used before. */
10898 h
= (struct alias
*) hash_find (ahash
, alias
);
10901 if (strcmp (h
->name
, name
))
10902 as_bad (_("`%s' is already the alias of %s `%s'"),
10903 alias
, kind
, h
->name
);
10907 /* Check if name already has an alias. */
10908 a
= (const char *) hash_find (nhash
, name
);
10911 if (strcmp (a
, alias
))
10912 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
10916 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
10917 as_where (&h
->file
, &h
->line
);
10920 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
10923 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
10924 alias
, kind
, error_string
);
10928 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
10931 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
10932 alias
, kind
, error_string
);
10934 obstack_free (¬es
, name
);
10935 obstack_free (¬es
, alias
);
10938 demand_empty_rest_of_line ();
10941 /* It renames the original symbol name to its alias. */
10943 do_alias (const char *alias
, PTR value
)
10945 struct alias
*h
= (struct alias
*) value
;
10946 symbolS
*sym
= symbol_find (h
->name
);
10949 as_warn_where (h
->file
, h
->line
,
10950 _("symbol `%s' aliased to `%s' is not used"),
10953 S_SET_NAME (sym
, (char *) alias
);
10956 /* Called from write_object_file. */
10958 ia64_adjust_symtab (void)
10960 hash_traverse (alias_hash
, do_alias
);
10963 /* It renames the original section name to its alias. */
10965 do_secalias (const char *alias
, PTR value
)
10967 struct alias
*h
= (struct alias
*) value
;
10968 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
10971 as_warn_where (h
->file
, h
->line
,
10972 _("section `%s' aliased to `%s' is not used"),
10978 /* Called from write_object_file. */
10980 ia64_frob_file (void)
10982 hash_traverse (secalias_hash
, do_secalias
);