1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
58 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
60 /* Some systems define MIN in, e.g., param.h. */
62 #define MIN(a,b) ((a) < (b) ? (a) : (b))
65 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66 #define CURR_SLOT md.slot[md.curr_slot]
68 #define O_pseudo_fixup (O_max + 1)
72 /* IA-64 ABI section pseudo-ops. */
73 SPECIAL_SECTION_BSS
= 0,
75 SPECIAL_SECTION_SDATA
,
76 SPECIAL_SECTION_RODATA
,
77 SPECIAL_SECTION_COMMENT
,
78 SPECIAL_SECTION_UNWIND
,
79 SPECIAL_SECTION_UNWIND_INFO
,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY
,
82 SPECIAL_SECTION_FINI_ARRAY
,
99 FUNC_LT_FPTR_RELATIVE
,
101 FUNC_LT_DTP_RELATIVE
,
109 REG_FR
= (REG_GR
+ 128),
110 REG_AR
= (REG_FR
+ 128),
111 REG_CR
= (REG_AR
+ 128),
112 REG_P
= (REG_CR
+ 128),
113 REG_BR
= (REG_P
+ 64),
114 REG_IP
= (REG_BR
+ 8),
121 /* The following are pseudo-registers for use by gas only. */
133 /* The following pseudo-registers are used for unwind directives only: */
141 DYNREG_GR
= 0, /* dynamic general purpose register */
142 DYNREG_FR
, /* dynamic floating point register */
143 DYNREG_PR
, /* dynamic predicate register */
147 enum operand_match_result
150 OPERAND_OUT_OF_RANGE
,
154 /* On the ia64, we can't know the address of a text label until the
155 instructions are packed into a bundle. To handle this, we keep
156 track of the list of labels that appear in front of each
160 struct label_fix
*next
;
164 /* This is the endianness of the current section. */
165 extern int target_big_endian
;
167 /* This is the default endianness. */
168 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
170 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
172 static void ia64_float_to_chars_bigendian
173 PARAMS ((char *, LITTLENUM_TYPE
*, int));
174 static void ia64_float_to_chars_littleendian
175 PARAMS ((char *, LITTLENUM_TYPE
*, int));
176 static void (*ia64_float_to_chars
)
177 PARAMS ((char *, LITTLENUM_TYPE
*, int));
179 static struct hash_control
*alias_hash
;
180 static struct hash_control
*alias_name_hash
;
181 static struct hash_control
*secalias_hash
;
182 static struct hash_control
*secalias_name_hash
;
184 /* List of chars besides those in app.c:symbol_chars that can start an
185 operand. Used to prevent the scrubber eating vital white-space. */
186 const char ia64_symbol_chars
[] = "@?";
188 /* Characters which always start a comment. */
189 const char comment_chars
[] = "";
191 /* Characters which start a comment at the beginning of a line. */
192 const char line_comment_chars
[] = "#";
194 /* Characters which may be used to separate multiple commands on a
196 const char line_separator_chars
[] = ";";
198 /* Characters which are used to indicate an exponent in a floating
200 const char EXP_CHARS
[] = "eE";
202 /* Characters which mean that a number is a floating point constant,
204 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
206 /* ia64-specific option processing: */
208 const char *md_shortopts
= "m:N:x::";
210 struct option md_longopts
[] =
212 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
213 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
214 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
215 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
218 size_t md_longopts_size
= sizeof (md_longopts
);
222 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
223 struct hash_control
*reg_hash
; /* register name hash table */
224 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
225 struct hash_control
*const_hash
; /* constant hash table */
226 struct hash_control
*entry_hash
; /* code entry hint hash table */
228 symbolS
*regsym
[REG_NUM
];
230 /* If X_op is != O_absent, the registername for the instruction's
231 qualifying predicate. If NULL, p0 is assumed for instructions
232 that are predicatable. */
235 /* Optimize for which CPU. */
242 /* What to do when hint.b is used. */
254 explicit_mode
: 1, /* which mode we're in */
255 default_explicit_mode
: 1, /* which mode is the default */
256 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
258 keep_pending_output
: 1;
260 /* What to do when something is wrong with unwind directives. */
263 unwind_check_warning
,
267 /* Each bundle consists of up to three instructions. We keep
268 track of four most recent instructions so we can correctly set
269 the end_of_insn_group for the last instruction in a bundle. */
271 int num_slots_in_use
;
275 end_of_insn_group
: 1,
276 manual_bundling_on
: 1,
277 manual_bundling_off
: 1,
278 loc_directive_seen
: 1;
279 signed char user_template
; /* user-selected template, if any */
280 unsigned char qp_regno
; /* qualifying predicate */
281 /* This duplicates a good fraction of "struct fix" but we
282 can't use a "struct fix" instead since we can't call
283 fix_new_exp() until we know the address of the instruction. */
287 bfd_reloc_code_real_type code
;
288 enum ia64_opnd opnd
; /* type of operand in need of fix */
289 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
290 expressionS expr
; /* the value to be inserted */
292 fixup
[2]; /* at most two fixups per insn */
293 struct ia64_opcode
*idesc
;
294 struct label_fix
*label_fixups
;
295 struct label_fix
*tag_fixups
;
296 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
299 unsigned int src_line
;
300 struct dwarf2_line_info debug_line
;
308 struct dynreg
*next
; /* next dynamic register */
310 unsigned short base
; /* the base register number */
311 unsigned short num_regs
; /* # of registers in this set */
313 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
315 flagword flags
; /* ELF-header flags */
318 unsigned hint
:1; /* is this hint currently valid? */
319 bfd_vma offset
; /* mem.offset offset */
320 bfd_vma base
; /* mem.offset base */
323 int path
; /* number of alt. entry points seen */
324 const char **entry_labels
; /* labels of all alternate paths in
325 the current DV-checking block. */
326 int maxpaths
; /* size currently allocated for
329 int pointer_size
; /* size in bytes of a pointer */
330 int pointer_size_shift
; /* shift size of a pointer for alignment */
334 /* These are not const, because they are modified to MMI for non-itanium1
336 /* MFI bundle of nops. */
337 static unsigned char le_nop
[16] =
339 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
340 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
342 /* MFI bundle of nops with stop-bit. */
343 static unsigned char le_nop_stop
[16] =
345 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
349 /* application registers: */
355 #define AR_BSPSTORE 18
370 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
371 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
372 {"ar.rsc", 16}, {"ar.bsp", 17},
373 {"ar.bspstore", 18}, {"ar.rnat", 19},
374 {"ar.fcr", 21}, {"ar.eflag", 24},
375 {"ar.csd", 25}, {"ar.ssd", 26},
376 {"ar.cflg", 27}, {"ar.fsr", 28},
377 {"ar.fir", 29}, {"ar.fdr", 30},
378 {"ar.ccv", 32}, {"ar.unat", 36},
379 {"ar.fpsr", 40}, {"ar.itc", 44},
380 {"ar.pfs", 64}, {"ar.lc", 65},
401 /* control registers: */
443 static const struct const_desc
450 /* PSR constant masks: */
453 {"psr.be", ((valueT
) 1) << 1},
454 {"psr.up", ((valueT
) 1) << 2},
455 {"psr.ac", ((valueT
) 1) << 3},
456 {"psr.mfl", ((valueT
) 1) << 4},
457 {"psr.mfh", ((valueT
) 1) << 5},
459 {"psr.ic", ((valueT
) 1) << 13},
460 {"psr.i", ((valueT
) 1) << 14},
461 {"psr.pk", ((valueT
) 1) << 15},
463 {"psr.dt", ((valueT
) 1) << 17},
464 {"psr.dfl", ((valueT
) 1) << 18},
465 {"psr.dfh", ((valueT
) 1) << 19},
466 {"psr.sp", ((valueT
) 1) << 20},
467 {"psr.pp", ((valueT
) 1) << 21},
468 {"psr.di", ((valueT
) 1) << 22},
469 {"psr.si", ((valueT
) 1) << 23},
470 {"psr.db", ((valueT
) 1) << 24},
471 {"psr.lp", ((valueT
) 1) << 25},
472 {"psr.tb", ((valueT
) 1) << 26},
473 {"psr.rt", ((valueT
) 1) << 27},
474 /* 28-31: reserved */
475 /* 32-33: cpl (current privilege level) */
476 {"psr.is", ((valueT
) 1) << 34},
477 {"psr.mc", ((valueT
) 1) << 35},
478 {"psr.it", ((valueT
) 1) << 36},
479 {"psr.id", ((valueT
) 1) << 37},
480 {"psr.da", ((valueT
) 1) << 38},
481 {"psr.dd", ((valueT
) 1) << 39},
482 {"psr.ss", ((valueT
) 1) << 40},
483 /* 41-42: ri (restart instruction) */
484 {"psr.ed", ((valueT
) 1) << 43},
485 {"psr.bn", ((valueT
) 1) << 44},
488 /* indirect register-sets/memory: */
497 { "CPUID", IND_CPUID
},
498 { "cpuid", IND_CPUID
},
510 /* Pseudo functions used to indicate relocation types (these functions
511 start with an at sign (@). */
533 /* reloc pseudo functions (these must come first!): */
534 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
535 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
536 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
537 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
538 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
539 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
540 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
541 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
542 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
543 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
544 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
545 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
546 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
547 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
548 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
549 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
550 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
552 /* mbtype4 constants: */
553 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
554 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
555 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
556 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
557 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
559 /* fclass constants: */
560 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
561 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
562 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
563 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
564 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
565 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
566 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
567 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
568 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
570 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
572 /* hint constants: */
573 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
575 /* unwind-related constants: */
576 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
577 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
578 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
579 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
580 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
581 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
582 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
584 /* unwind-related registers: */
585 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
588 /* 41-bit nop opcodes (one per unit): */
589 static const bfd_vma nop
[IA64_NUM_UNITS
] =
591 0x0000000000LL
, /* NIL => break 0 */
592 0x0008000000LL
, /* I-unit nop */
593 0x0008000000LL
, /* M-unit nop */
594 0x4000000000LL
, /* B-unit nop */
595 0x0008000000LL
, /* F-unit nop */
596 0x0008000000LL
, /* L-"unit" nop */
597 0x0008000000LL
, /* X-unit nop */
600 /* Can't be `const' as it's passed to input routines (which have the
601 habit of setting temporary sentinels. */
602 static char special_section_name
[][20] =
604 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
605 {".IA_64.unwind"}, {".IA_64.unwind_info"},
606 {".init_array"}, {".fini_array"}
609 /* The best template for a particular sequence of up to three
611 #define N IA64_NUM_TYPES
612 static unsigned char best_template
[N
][N
][N
];
615 /* Resource dependencies currently in effect */
617 int depind
; /* dependency index */
618 const struct ia64_dependency
*dependency
; /* actual dependency */
619 unsigned specific
:1, /* is this a specific bit/regno? */
620 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
621 int index
; /* specific regno/bit within dependency */
622 int note
; /* optional qualifying note (0 if none) */
626 int insn_srlz
; /* current insn serialization state */
627 int data_srlz
; /* current data serialization state */
628 int qp_regno
; /* qualifying predicate for this usage */
629 char *file
; /* what file marked this dependency */
630 unsigned int line
; /* what line marked this dependency */
631 struct mem_offset mem_offset
; /* optional memory offset hint */
632 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
633 int path
; /* corresponding code entry index */
635 static int regdepslen
= 0;
636 static int regdepstotlen
= 0;
637 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
638 static const char *dv_sem
[] = { "none", "implied", "impliedf",
639 "data", "instr", "specific", "stop", "other" };
640 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
642 /* Current state of PR mutexation */
643 static struct qpmutex
{
646 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
647 static int qp_mutexeslen
= 0;
648 static int qp_mutexestotlen
= 0;
649 static valueT qp_safe_across_calls
= 0;
651 /* Current state of PR implications */
652 static struct qp_imply
{
655 unsigned p2_branched
:1;
657 } *qp_implies
= NULL
;
658 static int qp_implieslen
= 0;
659 static int qp_impliestotlen
= 0;
661 /* Keep track of static GR values so that indirect register usage can
662 sometimes be tracked. */
673 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
679 /* Remember the alignment frag. */
680 static fragS
*align_frag
;
682 /* These are the routines required to output the various types of
685 /* A slot_number is a frag address plus the slot index (0-2). We use the
686 frag address here so that if there is a section switch in the middle of
687 a function, then instructions emitted to a different section are not
688 counted. Since there may be more than one frag for a function, this
689 means we also need to keep track of which frag this address belongs to
690 so we can compute inter-frag distances. This also nicely solves the
691 problem with nops emitted for align directives, which can't easily be
692 counted, but can easily be derived from frag sizes. */
694 typedef struct unw_rec_list
{
696 unsigned long slot_number
;
698 struct unw_rec_list
*next
;
701 #define SLOT_NUM_NOT_SET (unsigned)-1
703 /* Linked list of saved prologue counts. A very poor
704 implementation of a map from label numbers to prologue counts. */
705 typedef struct label_prologue_count
707 struct label_prologue_count
*next
;
708 unsigned long label_number
;
709 unsigned int prologue_count
;
710 } label_prologue_count
;
714 /* Maintain a list of unwind entries for the current function. */
718 /* Any unwind entires that should be attached to the current slot
719 that an insn is being constructed for. */
720 unw_rec_list
*current_entry
;
722 /* These are used to create the unwind table entry for this function. */
724 symbolS
*info
; /* pointer to unwind info */
725 symbolS
*personality_routine
;
727 subsegT saved_text_subseg
;
728 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
730 /* TRUE if processing unwind directives in a prologue region. */
731 unsigned int prologue
: 1;
732 unsigned int prologue_mask
: 4;
733 unsigned int body
: 1;
734 unsigned int insn
: 1;
735 unsigned int prologue_count
; /* number of .prologues seen so far */
736 /* Prologue counts at previous .label_state directives. */
737 struct label_prologue_count
* saved_prologue_counts
;
740 /* The input value is a negated offset from psp, and specifies an address
741 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
742 must add 16 and divide by 4 to get the encoded value. */
744 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
746 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
748 /* Forward declarations: */
749 static void set_section
PARAMS ((char *name
));
750 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
751 unsigned int, unsigned int));
752 static void dot_align (int);
753 static void dot_radix
PARAMS ((int));
754 static void dot_special_section
PARAMS ((int));
755 static void dot_proc
PARAMS ((int));
756 static void dot_fframe
PARAMS ((int));
757 static void dot_vframe
PARAMS ((int));
758 static void dot_vframesp
PARAMS ((int));
759 static void dot_vframepsp
PARAMS ((int));
760 static void dot_save
PARAMS ((int));
761 static void dot_restore
PARAMS ((int));
762 static void dot_restorereg
PARAMS ((int));
763 static void dot_restorereg_p
PARAMS ((int));
764 static void dot_handlerdata
PARAMS ((int));
765 static void dot_unwentry
PARAMS ((int));
766 static void dot_altrp
PARAMS ((int));
767 static void dot_savemem
PARAMS ((int));
768 static void dot_saveg
PARAMS ((int));
769 static void dot_savef
PARAMS ((int));
770 static void dot_saveb
PARAMS ((int));
771 static void dot_savegf
PARAMS ((int));
772 static void dot_spill
PARAMS ((int));
773 static void dot_spillreg
PARAMS ((int));
774 static void dot_spillmem
PARAMS ((int));
775 static void dot_spillreg_p
PARAMS ((int));
776 static void dot_spillmem_p
PARAMS ((int));
777 static void dot_label_state
PARAMS ((int));
778 static void dot_copy_state
PARAMS ((int));
779 static void dot_unwabi
PARAMS ((int));
780 static void dot_personality
PARAMS ((int));
781 static void dot_body
PARAMS ((int));
782 static void dot_prologue
PARAMS ((int));
783 static void dot_endp
PARAMS ((int));
784 static void dot_template
PARAMS ((int));
785 static void dot_regstk
PARAMS ((int));
786 static void dot_rot
PARAMS ((int));
787 static void dot_byteorder
PARAMS ((int));
788 static void dot_psr
PARAMS ((int));
789 static void dot_alias
PARAMS ((int));
790 static void dot_ln
PARAMS ((int));
791 static void cross_section
PARAMS ((int ref
, void (*cons
) PARAMS((int)), int ua
));
792 static void dot_xdata
PARAMS ((int));
793 static void stmt_float_cons
PARAMS ((int));
794 static void stmt_cons_ua
PARAMS ((int));
795 static void dot_xfloat_cons
PARAMS ((int));
796 static void dot_xstringer
PARAMS ((int));
797 static void dot_xdata_ua
PARAMS ((int));
798 static void dot_xfloat_cons_ua
PARAMS ((int));
799 static void print_prmask
PARAMS ((valueT mask
));
800 static void dot_pred_rel
PARAMS ((int));
801 static void dot_reg_val
PARAMS ((int));
802 static void dot_serialize
PARAMS ((int));
803 static void dot_dv_mode
PARAMS ((int));
804 static void dot_entry
PARAMS ((int));
805 static void dot_mem_offset
PARAMS ((int));
806 static void add_unwind_entry
PARAMS((unw_rec_list
*ptr
));
807 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
808 static void declare_register_set
PARAMS ((const char *, int, int));
809 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
810 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
813 static int parse_operand
PARAMS ((expressionS
*e
));
814 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
815 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
816 static void emit_one_bundle
PARAMS ((void));
817 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
818 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
819 bfd_reloc_code_real_type r_type
));
820 static void insn_group_break
PARAMS ((int, int, int));
821 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
822 struct rsrc
*, int depind
, int path
));
823 static void add_qp_mutex
PARAMS((valueT mask
));
824 static void add_qp_imply
PARAMS((int p1
, int p2
));
825 static void clear_qp_branch_flag
PARAMS((valueT mask
));
826 static void clear_qp_mutex
PARAMS((valueT mask
));
827 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
828 static int has_suffix_p
PARAMS((const char *, const char *));
829 static void clear_register_values
PARAMS ((void));
830 static void print_dependency
PARAMS ((const char *action
, int depind
));
831 static void instruction_serialization
PARAMS ((void));
832 static void data_serialization
PARAMS ((void));
833 static void remove_marked_resource
PARAMS ((struct rsrc
*));
834 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
835 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
836 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
837 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
838 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
839 struct ia64_opcode
*, int, struct rsrc
[], int, int));
840 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
841 static void check_dependencies
PARAMS((struct ia64_opcode
*));
842 static void mark_resources
PARAMS((struct ia64_opcode
*));
843 static void update_dependencies
PARAMS((struct ia64_opcode
*));
844 static void note_register_values
PARAMS((struct ia64_opcode
*));
845 static int qp_mutex
PARAMS ((int, int, int));
846 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
847 static void output_vbyte_mem
PARAMS ((int, char *, char *));
848 static void count_output
PARAMS ((int, char *, char *));
849 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
850 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
851 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
852 static void output_P1_format
PARAMS ((vbyte_func
, int));
853 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
854 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
855 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
856 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
857 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
858 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
859 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
860 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
861 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
862 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
863 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
864 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
865 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
866 static char format_ab_reg
PARAMS ((int, int));
867 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
869 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
870 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
872 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
873 static unw_rec_list
*output_endp
PARAMS ((void));
874 static unw_rec_list
*output_prologue
PARAMS ((void));
875 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
876 static unw_rec_list
*output_body
PARAMS ((void));
877 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
878 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
879 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
880 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
881 static unw_rec_list
*output_rp_when
PARAMS ((void));
882 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
883 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
884 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
885 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
886 static unw_rec_list
*output_pfs_when
PARAMS ((void));
887 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
888 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
889 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
890 static unw_rec_list
*output_preds_when
PARAMS ((void));
891 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
892 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
893 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
894 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
895 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
896 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
897 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
898 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
899 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
900 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
901 static unw_rec_list
*output_unat_when
PARAMS ((void));
902 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
903 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
904 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
905 static unw_rec_list
*output_lc_when
PARAMS ((void));
906 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
907 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
908 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
909 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
910 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
911 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
912 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
913 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
914 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
915 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
916 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
917 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
918 static unw_rec_list
*output_bsp_when
PARAMS ((void));
919 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
920 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
921 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
922 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
923 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
924 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
925 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
926 static unw_rec_list
*output_rnat_when
PARAMS ((void));
927 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
928 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
929 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
930 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
931 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
932 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
933 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
934 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int));
935 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int));
936 static unw_rec_list
*output_spill_psprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
938 static unw_rec_list
*output_spill_sprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
940 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
942 static unw_rec_list
*output_spill_reg_p
PARAMS ((unsigned int, unsigned int, unsigned int,
943 unsigned int, unsigned int));
944 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
945 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
946 static int calc_record_size
PARAMS ((unw_rec_list
*));
947 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
948 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
949 unsigned long, fragS
*,
951 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
952 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
953 static int convert_expr_to_ab_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
954 static int convert_expr_to_xy_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
955 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
956 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
957 static void free_saved_prologue_counts
PARAMS ((void));
959 /* Determine if application register REGNUM resides only in the integer
960 unit (as opposed to the memory unit). */
962 ar_is_only_in_integer_unit (int reg
)
965 return reg
>= 64 && reg
<= 111;
968 /* Determine if application register REGNUM resides only in the memory
969 unit (as opposed to the integer unit). */
971 ar_is_only_in_memory_unit (int reg
)
974 return reg
>= 0 && reg
<= 47;
977 /* Switch to section NAME and create section if necessary. It's
978 rather ugly that we have to manipulate input_line_pointer but I
979 don't see any other way to accomplish the same thing without
980 changing obj-elf.c (which may be the Right Thing, in the end). */
985 char *saved_input_line_pointer
;
987 saved_input_line_pointer
= input_line_pointer
;
988 input_line_pointer
= name
;
990 input_line_pointer
= saved_input_line_pointer
;
993 /* Map 's' to SHF_IA_64_SHORT. */
996 ia64_elf_section_letter (letter
, ptr_msg
)
1001 return SHF_IA_64_SHORT
;
1002 else if (letter
== 'o')
1003 return SHF_LINK_ORDER
;
1005 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1009 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1012 ia64_elf_section_flags (flags
, attr
, type
)
1014 int attr
, type ATTRIBUTE_UNUSED
;
1016 if (attr
& SHF_IA_64_SHORT
)
1017 flags
|= SEC_SMALL_DATA
;
1022 ia64_elf_section_type (str
, len
)
1026 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1028 if (STREQ (ELF_STRING_ia64_unwind_info
))
1029 return SHT_PROGBITS
;
1031 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
1032 return SHT_PROGBITS
;
1034 if (STREQ (ELF_STRING_ia64_unwind
))
1035 return SHT_IA_64_UNWIND
;
1037 if (STREQ (ELF_STRING_ia64_unwind_once
))
1038 return SHT_IA_64_UNWIND
;
1040 if (STREQ ("unwind"))
1041 return SHT_IA_64_UNWIND
;
1048 set_regstack (ins
, locs
, outs
, rots
)
1049 unsigned int ins
, locs
, outs
, rots
;
1051 /* Size of frame. */
1054 sof
= ins
+ locs
+ outs
;
1057 as_bad ("Size of frame exceeds maximum of 96 registers");
1062 as_warn ("Size of rotating registers exceeds frame size");
1065 md
.in
.base
= REG_GR
+ 32;
1066 md
.loc
.base
= md
.in
.base
+ ins
;
1067 md
.out
.base
= md
.loc
.base
+ locs
;
1069 md
.in
.num_regs
= ins
;
1070 md
.loc
.num_regs
= locs
;
1071 md
.out
.num_regs
= outs
;
1072 md
.rot
.num_regs
= rots
;
1079 struct label_fix
*lfix
;
1081 subsegT saved_subseg
;
1084 if (!md
.last_text_seg
)
1087 saved_seg
= now_seg
;
1088 saved_subseg
= now_subseg
;
1090 subseg_set (md
.last_text_seg
, 0);
1092 while (md
.num_slots_in_use
> 0)
1093 emit_one_bundle (); /* force out queued instructions */
1095 /* In case there are labels following the last instruction, resolve
1097 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1099 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1100 symbol_set_frag (lfix
->sym
, frag_now
);
1102 CURR_SLOT
.label_fixups
= 0;
1103 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1105 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1106 symbol_set_frag (lfix
->sym
, frag_now
);
1108 CURR_SLOT
.tag_fixups
= 0;
1110 /* In case there are unwind directives following the last instruction,
1111 resolve those now. We only handle prologue, body, and endp directives
1112 here. Give an error for others. */
1113 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1115 switch (ptr
->r
.type
)
1121 ptr
->slot_number
= (unsigned long) frag_more (0);
1122 ptr
->slot_frag
= frag_now
;
1125 /* Allow any record which doesn't have a "t" field (i.e.,
1126 doesn't relate to a particular instruction). */
1142 as_bad (_("Unwind directive not followed by an instruction."));
1146 unwind
.current_entry
= NULL
;
1148 subseg_set (saved_seg
, saved_subseg
);
1150 if (md
.qp
.X_op
== O_register
)
1151 as_bad ("qualifying predicate not followed by instruction");
1155 ia64_do_align (int nbytes
)
1157 char *saved_input_line_pointer
= input_line_pointer
;
1159 input_line_pointer
= "";
1160 s_align_bytes (nbytes
);
1161 input_line_pointer
= saved_input_line_pointer
;
1165 ia64_cons_align (nbytes
)
1170 char *saved_input_line_pointer
= input_line_pointer
;
1171 input_line_pointer
= "";
1172 s_align_bytes (nbytes
);
1173 input_line_pointer
= saved_input_line_pointer
;
1177 /* Output COUNT bytes to a memory location. */
1178 static char *vbyte_mem_ptr
= NULL
;
1181 output_vbyte_mem (count
, ptr
, comment
)
1184 char *comment ATTRIBUTE_UNUSED
;
1187 if (vbyte_mem_ptr
== NULL
)
1192 for (x
= 0; x
< count
; x
++)
1193 *(vbyte_mem_ptr
++) = ptr
[x
];
1196 /* Count the number of bytes required for records. */
1197 static int vbyte_count
= 0;
1199 count_output (count
, ptr
, comment
)
1201 char *ptr ATTRIBUTE_UNUSED
;
1202 char *comment ATTRIBUTE_UNUSED
;
1204 vbyte_count
+= count
;
1208 output_R1_format (f
, rtype
, rlen
)
1210 unw_record_type rtype
;
1217 output_R3_format (f
, rtype
, rlen
);
1223 else if (rtype
!= prologue
)
1224 as_bad ("record type is not valid");
1226 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1227 (*f
) (1, &byte
, NULL
);
1231 output_R2_format (f
, mask
, grsave
, rlen
)
1238 mask
= (mask
& 0x0f);
1239 grsave
= (grsave
& 0x7f);
1241 bytes
[0] = (UNW_R2
| (mask
>> 1));
1242 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1243 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1244 (*f
) (count
, bytes
, NULL
);
1248 output_R3_format (f
, rtype
, rlen
)
1250 unw_record_type rtype
;
1257 output_R1_format (f
, rtype
, rlen
);
1263 else if (rtype
!= prologue
)
1264 as_bad ("record type is not valid");
1265 bytes
[0] = (UNW_R3
| r
);
1266 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1267 (*f
) (count
+ 1, bytes
, NULL
);
1271 output_P1_format (f
, brmask
)
1276 byte
= UNW_P1
| (brmask
& 0x1f);
1277 (*f
) (1, &byte
, NULL
);
1281 output_P2_format (f
, brmask
, gr
)
1287 brmask
= (brmask
& 0x1f);
1288 bytes
[0] = UNW_P2
| (brmask
>> 1);
1289 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1290 (*f
) (2, bytes
, NULL
);
1294 output_P3_format (f
, rtype
, reg
)
1296 unw_record_type rtype
;
1341 as_bad ("Invalid record type for P3 format.");
1343 bytes
[0] = (UNW_P3
| (r
>> 1));
1344 bytes
[1] = (((r
& 1) << 7) | reg
);
1345 (*f
) (2, bytes
, NULL
);
1349 output_P4_format (f
, imask
, imask_size
)
1351 unsigned char *imask
;
1352 unsigned long imask_size
;
1355 (*f
) (imask_size
, (char *) imask
, NULL
);
1359 output_P5_format (f
, grmask
, frmask
)
1362 unsigned long frmask
;
1365 grmask
= (grmask
& 0x0f);
1368 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1369 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1370 bytes
[3] = (frmask
& 0x000000ff);
1371 (*f
) (4, bytes
, NULL
);
1375 output_P6_format (f
, rtype
, rmask
)
1377 unw_record_type rtype
;
1383 if (rtype
== gr_mem
)
1385 else if (rtype
!= fr_mem
)
1386 as_bad ("Invalid record type for format P6");
1387 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1388 (*f
) (1, &byte
, NULL
);
1392 output_P7_format (f
, rtype
, w1
, w2
)
1394 unw_record_type rtype
;
1401 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1406 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1456 bytes
[0] = (UNW_P7
| r
);
1457 (*f
) (count
, bytes
, NULL
);
1461 output_P8_format (f
, rtype
, t
)
1463 unw_record_type rtype
;
1502 case bspstore_psprel
:
1505 case bspstore_sprel
:
1517 case priunat_when_gr
:
1520 case priunat_psprel
:
1526 case priunat_when_mem
:
1533 count
+= output_leb128 (bytes
+ 2, t
, 0);
1534 (*f
) (count
, bytes
, NULL
);
1538 output_P9_format (f
, grmask
, gr
)
1545 bytes
[1] = (grmask
& 0x0f);
1546 bytes
[2] = (gr
& 0x7f);
1547 (*f
) (3, bytes
, NULL
);
1551 output_P10_format (f
, abi
, context
)
1558 bytes
[1] = (abi
& 0xff);
1559 bytes
[2] = (context
& 0xff);
1560 (*f
) (3, bytes
, NULL
);
1564 output_B1_format (f
, rtype
, label
)
1566 unw_record_type rtype
;
1567 unsigned long label
;
1573 output_B4_format (f
, rtype
, label
);
1576 if (rtype
== copy_state
)
1578 else if (rtype
!= label_state
)
1579 as_bad ("Invalid record type for format B1");
1581 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1582 (*f
) (1, &byte
, NULL
);
1586 output_B2_format (f
, ecount
, t
)
1588 unsigned long ecount
;
1595 output_B3_format (f
, ecount
, t
);
1598 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1599 count
+= output_leb128 (bytes
+ 1, t
, 0);
1600 (*f
) (count
, bytes
, NULL
);
1604 output_B3_format (f
, ecount
, t
)
1606 unsigned long ecount
;
1613 output_B2_format (f
, ecount
, t
);
1617 count
+= output_leb128 (bytes
+ 1, t
, 0);
1618 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1619 (*f
) (count
, bytes
, NULL
);
1623 output_B4_format (f
, rtype
, label
)
1625 unw_record_type rtype
;
1626 unsigned long label
;
1633 output_B1_format (f
, rtype
, label
);
1637 if (rtype
== copy_state
)
1639 else if (rtype
!= label_state
)
1640 as_bad ("Invalid record type for format B1");
1642 bytes
[0] = (UNW_B4
| (r
<< 3));
1643 count
+= output_leb128 (bytes
+ 1, label
, 0);
1644 (*f
) (count
, bytes
, NULL
);
1648 format_ab_reg (ab
, reg
)
1655 ret
= (ab
<< 5) | reg
;
1660 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1662 unw_record_type rtype
;
1672 if (rtype
== spill_sprel
)
1674 else if (rtype
!= spill_psprel
)
1675 as_bad ("Invalid record type for format X1");
1676 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1677 count
+= output_leb128 (bytes
+ 2, t
, 0);
1678 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1679 (*f
) (count
, bytes
, NULL
);
1683 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1692 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1693 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1694 count
+= output_leb128 (bytes
+ 3, t
, 0);
1695 (*f
) (count
, bytes
, NULL
);
1699 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1701 unw_record_type rtype
;
1712 if (rtype
== spill_sprel_p
)
1714 else if (rtype
!= spill_psprel_p
)
1715 as_bad ("Invalid record type for format X3");
1716 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1717 bytes
[2] = format_ab_reg (ab
, reg
);
1718 count
+= output_leb128 (bytes
+ 3, t
, 0);
1719 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1720 (*f
) (count
, bytes
, NULL
);
1724 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1734 bytes
[1] = (qp
& 0x3f);
1735 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1736 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1737 count
+= output_leb128 (bytes
+ 4, t
, 0);
1738 (*f
) (count
, bytes
, NULL
);
1741 /* This function allocates a record list structure, and initializes fields. */
1743 static unw_rec_list
*
1744 alloc_record (unw_record_type t
)
1747 ptr
= xmalloc (sizeof (*ptr
));
1749 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1754 /* Dummy unwind record used for calculating the length of the last prologue or
1757 static unw_rec_list
*
1760 unw_rec_list
*ptr
= alloc_record (endp
);
1764 static unw_rec_list
*
1767 unw_rec_list
*ptr
= alloc_record (prologue
);
1768 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1772 static unw_rec_list
*
1773 output_prologue_gr (saved_mask
, reg
)
1774 unsigned int saved_mask
;
1777 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1778 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1779 ptr
->r
.record
.r
.grmask
= saved_mask
;
1780 ptr
->r
.record
.r
.grsave
= reg
;
1784 static unw_rec_list
*
1787 unw_rec_list
*ptr
= alloc_record (body
);
1791 static unw_rec_list
*
1792 output_mem_stack_f (size
)
1795 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1796 ptr
->r
.record
.p
.size
= size
;
1800 static unw_rec_list
*
1801 output_mem_stack_v ()
1803 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1807 static unw_rec_list
*
1811 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1812 ptr
->r
.record
.p
.gr
= gr
;
1816 static unw_rec_list
*
1817 output_psp_sprel (offset
)
1818 unsigned int offset
;
1820 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1821 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1825 static unw_rec_list
*
1828 unw_rec_list
*ptr
= alloc_record (rp_when
);
1832 static unw_rec_list
*
1836 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1837 ptr
->r
.record
.p
.gr
= gr
;
1841 static unw_rec_list
*
1845 unw_rec_list
*ptr
= alloc_record (rp_br
);
1846 ptr
->r
.record
.p
.br
= br
;
1850 static unw_rec_list
*
1851 output_rp_psprel (offset
)
1852 unsigned int offset
;
1854 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1855 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1859 static unw_rec_list
*
1860 output_rp_sprel (offset
)
1861 unsigned int offset
;
1863 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1864 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1868 static unw_rec_list
*
1871 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1875 static unw_rec_list
*
1879 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1880 ptr
->r
.record
.p
.gr
= gr
;
1884 static unw_rec_list
*
1885 output_pfs_psprel (offset
)
1886 unsigned int offset
;
1888 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1889 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1893 static unw_rec_list
*
1894 output_pfs_sprel (offset
)
1895 unsigned int offset
;
1897 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1898 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1902 static unw_rec_list
*
1903 output_preds_when ()
1905 unw_rec_list
*ptr
= alloc_record (preds_when
);
1909 static unw_rec_list
*
1910 output_preds_gr (gr
)
1913 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1914 ptr
->r
.record
.p
.gr
= gr
;
1918 static unw_rec_list
*
1919 output_preds_psprel (offset
)
1920 unsigned int offset
;
1922 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1923 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1927 static unw_rec_list
*
1928 output_preds_sprel (offset
)
1929 unsigned int offset
;
1931 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1932 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1936 static unw_rec_list
*
1937 output_fr_mem (mask
)
1940 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1941 ptr
->r
.record
.p
.rmask
= mask
;
1945 static unw_rec_list
*
1946 output_frgr_mem (gr_mask
, fr_mask
)
1947 unsigned int gr_mask
;
1948 unsigned int fr_mask
;
1950 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1951 ptr
->r
.record
.p
.grmask
= gr_mask
;
1952 ptr
->r
.record
.p
.frmask
= fr_mask
;
1956 static unw_rec_list
*
1957 output_gr_gr (mask
, reg
)
1961 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1962 ptr
->r
.record
.p
.grmask
= mask
;
1963 ptr
->r
.record
.p
.gr
= reg
;
1967 static unw_rec_list
*
1968 output_gr_mem (mask
)
1971 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1972 ptr
->r
.record
.p
.rmask
= mask
;
1976 static unw_rec_list
*
1977 output_br_mem (unsigned int mask
)
1979 unw_rec_list
*ptr
= alloc_record (br_mem
);
1980 ptr
->r
.record
.p
.brmask
= mask
;
1984 static unw_rec_list
*
1985 output_br_gr (save_mask
, reg
)
1986 unsigned int save_mask
;
1989 unw_rec_list
*ptr
= alloc_record (br_gr
);
1990 ptr
->r
.record
.p
.brmask
= save_mask
;
1991 ptr
->r
.record
.p
.gr
= reg
;
1995 static unw_rec_list
*
1996 output_spill_base (offset
)
1997 unsigned int offset
;
1999 unw_rec_list
*ptr
= alloc_record (spill_base
);
2000 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2004 static unw_rec_list
*
2007 unw_rec_list
*ptr
= alloc_record (unat_when
);
2011 static unw_rec_list
*
2015 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2016 ptr
->r
.record
.p
.gr
= gr
;
2020 static unw_rec_list
*
2021 output_unat_psprel (offset
)
2022 unsigned int offset
;
2024 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2025 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2029 static unw_rec_list
*
2030 output_unat_sprel (offset
)
2031 unsigned int offset
;
2033 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2034 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2038 static unw_rec_list
*
2041 unw_rec_list
*ptr
= alloc_record (lc_when
);
2045 static unw_rec_list
*
2049 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2050 ptr
->r
.record
.p
.gr
= gr
;
2054 static unw_rec_list
*
2055 output_lc_psprel (offset
)
2056 unsigned int offset
;
2058 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2059 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2063 static unw_rec_list
*
2064 output_lc_sprel (offset
)
2065 unsigned int offset
;
2067 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2068 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2072 static unw_rec_list
*
2075 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2079 static unw_rec_list
*
2083 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2084 ptr
->r
.record
.p
.gr
= gr
;
2088 static unw_rec_list
*
2089 output_fpsr_psprel (offset
)
2090 unsigned int offset
;
2092 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2093 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2097 static unw_rec_list
*
2098 output_fpsr_sprel (offset
)
2099 unsigned int offset
;
2101 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2102 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2106 static unw_rec_list
*
2107 output_priunat_when_gr ()
2109 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2113 static unw_rec_list
*
2114 output_priunat_when_mem ()
2116 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2120 static unw_rec_list
*
2121 output_priunat_gr (gr
)
2124 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2125 ptr
->r
.record
.p
.gr
= gr
;
2129 static unw_rec_list
*
2130 output_priunat_psprel (offset
)
2131 unsigned int offset
;
2133 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2134 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2138 static unw_rec_list
*
2139 output_priunat_sprel (offset
)
2140 unsigned int offset
;
2142 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2143 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2147 static unw_rec_list
*
2150 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2154 static unw_rec_list
*
2158 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2159 ptr
->r
.record
.p
.gr
= gr
;
2163 static unw_rec_list
*
2164 output_bsp_psprel (offset
)
2165 unsigned int offset
;
2167 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2168 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2172 static unw_rec_list
*
2173 output_bsp_sprel (offset
)
2174 unsigned int offset
;
2176 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2177 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2181 static unw_rec_list
*
2182 output_bspstore_when ()
2184 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2188 static unw_rec_list
*
2189 output_bspstore_gr (gr
)
2192 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2193 ptr
->r
.record
.p
.gr
= gr
;
2197 static unw_rec_list
*
2198 output_bspstore_psprel (offset
)
2199 unsigned int offset
;
2201 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2202 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2206 static unw_rec_list
*
2207 output_bspstore_sprel (offset
)
2208 unsigned int offset
;
2210 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2211 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2215 static unw_rec_list
*
2218 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2222 static unw_rec_list
*
2226 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2227 ptr
->r
.record
.p
.gr
= gr
;
2231 static unw_rec_list
*
2232 output_rnat_psprel (offset
)
2233 unsigned int offset
;
2235 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2236 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2240 static unw_rec_list
*
2241 output_rnat_sprel (offset
)
2242 unsigned int offset
;
2244 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2245 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2249 static unw_rec_list
*
2250 output_unwabi (abi
, context
)
2252 unsigned long context
;
2254 unw_rec_list
*ptr
= alloc_record (unwabi
);
2255 ptr
->r
.record
.p
.abi
= abi
;
2256 ptr
->r
.record
.p
.context
= context
;
2260 static unw_rec_list
*
2261 output_epilogue (unsigned long ecount
)
2263 unw_rec_list
*ptr
= alloc_record (epilogue
);
2264 ptr
->r
.record
.b
.ecount
= ecount
;
2268 static unw_rec_list
*
2269 output_label_state (unsigned long label
)
2271 unw_rec_list
*ptr
= alloc_record (label_state
);
2272 ptr
->r
.record
.b
.label
= label
;
2276 static unw_rec_list
*
2277 output_copy_state (unsigned long label
)
2279 unw_rec_list
*ptr
= alloc_record (copy_state
);
2280 ptr
->r
.record
.b
.label
= label
;
2284 static unw_rec_list
*
2285 output_spill_psprel (ab
, reg
, offset
)
2288 unsigned int offset
;
2290 unw_rec_list
*ptr
= alloc_record (spill_psprel
);
2291 ptr
->r
.record
.x
.ab
= ab
;
2292 ptr
->r
.record
.x
.reg
= reg
;
2293 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2297 static unw_rec_list
*
2298 output_spill_sprel (ab
, reg
, offset
)
2301 unsigned int offset
;
2303 unw_rec_list
*ptr
= alloc_record (spill_sprel
);
2304 ptr
->r
.record
.x
.ab
= ab
;
2305 ptr
->r
.record
.x
.reg
= reg
;
2306 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2310 static unw_rec_list
*
2311 output_spill_psprel_p (ab
, reg
, offset
, predicate
)
2314 unsigned int offset
;
2315 unsigned int predicate
;
2317 unw_rec_list
*ptr
= alloc_record (spill_psprel_p
);
2318 ptr
->r
.record
.x
.ab
= ab
;
2319 ptr
->r
.record
.x
.reg
= reg
;
2320 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2321 ptr
->r
.record
.x
.qp
= predicate
;
2325 static unw_rec_list
*
2326 output_spill_sprel_p (ab
, reg
, offset
, predicate
)
2329 unsigned int offset
;
2330 unsigned int predicate
;
2332 unw_rec_list
*ptr
= alloc_record (spill_sprel_p
);
2333 ptr
->r
.record
.x
.ab
= ab
;
2334 ptr
->r
.record
.x
.reg
= reg
;
2335 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2336 ptr
->r
.record
.x
.qp
= predicate
;
2340 static unw_rec_list
*
2341 output_spill_reg (ab
, reg
, targ_reg
, xy
)
2344 unsigned int targ_reg
;
2347 unw_rec_list
*ptr
= alloc_record (spill_reg
);
2348 ptr
->r
.record
.x
.ab
= ab
;
2349 ptr
->r
.record
.x
.reg
= reg
;
2350 ptr
->r
.record
.x
.treg
= targ_reg
;
2351 ptr
->r
.record
.x
.xy
= xy
;
2355 static unw_rec_list
*
2356 output_spill_reg_p (ab
, reg
, targ_reg
, xy
, predicate
)
2359 unsigned int targ_reg
;
2361 unsigned int predicate
;
2363 unw_rec_list
*ptr
= alloc_record (spill_reg_p
);
2364 ptr
->r
.record
.x
.ab
= ab
;
2365 ptr
->r
.record
.x
.reg
= reg
;
2366 ptr
->r
.record
.x
.treg
= targ_reg
;
2367 ptr
->r
.record
.x
.xy
= xy
;
2368 ptr
->r
.record
.x
.qp
= predicate
;
2372 /* Given a unw_rec_list process the correct format with the
2373 specified function. */
2376 process_one_record (ptr
, f
)
2380 unsigned long fr_mask
, gr_mask
;
2382 switch (ptr
->r
.type
)
2384 /* This is a dummy record that takes up no space in the output. */
2392 /* These are taken care of by prologue/prologue_gr. */
2397 if (ptr
->r
.type
== prologue_gr
)
2398 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2399 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2401 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2403 /* Output descriptor(s) for union of register spills (if any). */
2404 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2405 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2408 if ((fr_mask
& ~0xfUL
) == 0)
2409 output_P6_format (f
, fr_mem
, fr_mask
);
2412 output_P5_format (f
, gr_mask
, fr_mask
);
2417 output_P6_format (f
, gr_mem
, gr_mask
);
2418 if (ptr
->r
.record
.r
.mask
.br_mem
)
2419 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2421 /* output imask descriptor if necessary: */
2422 if (ptr
->r
.record
.r
.mask
.i
)
2423 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2424 ptr
->r
.record
.r
.imask_size
);
2428 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2432 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2433 ptr
->r
.record
.p
.size
);
2446 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2449 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2452 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2460 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2469 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2479 case bspstore_sprel
:
2481 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2484 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2487 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2490 as_bad ("spill_mask record unimplemented.");
2492 case priunat_when_gr
:
2493 case priunat_when_mem
:
2497 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2499 case priunat_psprel
:
2501 case bspstore_psprel
:
2503 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2506 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2509 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2513 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2516 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2517 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2518 ptr
->r
.record
.x
.pspoff
);
2521 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2522 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2523 ptr
->r
.record
.x
.spoff
);
2526 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2527 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2528 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2530 case spill_psprel_p
:
2531 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2532 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2533 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2536 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2537 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2538 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2541 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2542 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2543 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2547 as_bad ("record_type_not_valid");
2552 /* Given a unw_rec_list list, process all the records with
2553 the specified function. */
2555 process_unw_records (list
, f
)
2560 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2561 process_one_record (ptr
, f
);
2564 /* Determine the size of a record list in bytes. */
2566 calc_record_size (list
)
2570 process_unw_records (list
, count_output
);
2574 /* Update IMASK bitmask to reflect the fact that one or more registers
2575 of type TYPE are saved starting at instruction with index T. If N
2576 bits are set in REGMASK, it is assumed that instructions T through
2577 T+N-1 save these registers.
2581 1: instruction saves next fp reg
2582 2: instruction saves next general reg
2583 3: instruction saves next branch reg */
2585 set_imask (region
, regmask
, t
, type
)
2586 unw_rec_list
*region
;
2587 unsigned long regmask
;
2591 unsigned char *imask
;
2592 unsigned long imask_size
;
2596 imask
= region
->r
.record
.r
.mask
.i
;
2597 imask_size
= region
->r
.record
.r
.imask_size
;
2600 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2601 imask
= xmalloc (imask_size
);
2602 memset (imask
, 0, imask_size
);
2604 region
->r
.record
.r
.imask_size
= imask_size
;
2605 region
->r
.record
.r
.mask
.i
= imask
;
2609 pos
= 2 * (3 - t
% 4);
2612 if (i
>= imask_size
)
2614 as_bad ("Ignoring attempt to spill beyond end of region");
2618 imask
[i
] |= (type
& 0x3) << pos
;
2620 regmask
&= (regmask
- 1);
2630 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2631 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2632 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2636 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2637 unsigned long slot_addr
;
2639 unsigned long first_addr
;
2643 unsigned long index
= 0;
2645 /* First time we are called, the initial address and frag are invalid. */
2646 if (first_addr
== 0)
2649 /* If the two addresses are in different frags, then we need to add in
2650 the remaining size of this frag, and then the entire size of intermediate
2652 while (slot_frag
!= first_frag
)
2654 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2658 /* We can get the final addresses only during and after
2660 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2661 index
+= 3 * ((first_frag
->fr_next
->fr_address
2662 - first_frag
->fr_address
2663 - first_frag
->fr_fix
) >> 4);
2666 /* We don't know what the final addresses will be. We try our
2667 best to estimate. */
2668 switch (first_frag
->fr_type
)
2674 as_fatal ("only constant space allocation is supported");
2680 /* Take alignment into account. Assume the worst case
2681 before relaxation. */
2682 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2686 if (first_frag
->fr_symbol
)
2688 as_fatal ("only constant offsets are supported");
2692 index
+= 3 * (first_frag
->fr_offset
>> 4);
2696 /* Add in the full size of the frag converted to instruction slots. */
2697 index
+= 3 * (first_frag
->fr_fix
>> 4);
2698 /* Subtract away the initial part before first_addr. */
2699 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2700 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2702 /* Move to the beginning of the next frag. */
2703 first_frag
= first_frag
->fr_next
;
2704 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2707 /* Add in the used part of the last frag. */
2708 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2709 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2713 /* Optimize unwind record directives. */
2715 static unw_rec_list
*
2716 optimize_unw_records (list
)
2722 /* If the only unwind record is ".prologue" or ".prologue" followed
2723 by ".body", then we can optimize the unwind directives away. */
2724 if (list
->r
.type
== prologue
2725 && (list
->next
->r
.type
== endp
2726 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2732 /* Given a complete record list, process any records which have
2733 unresolved fields, (ie length counts for a prologue). After
2734 this has been run, all necessary information should be available
2735 within each record to generate an image. */
2738 fixup_unw_records (list
, before_relax
)
2742 unw_rec_list
*ptr
, *region
= 0;
2743 unsigned long first_addr
= 0, rlen
= 0, t
;
2744 fragS
*first_frag
= 0;
2746 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2748 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2749 as_bad (" Insn slot not set in unwind record.");
2750 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2751 first_addr
, first_frag
, before_relax
);
2752 switch (ptr
->r
.type
)
2760 unsigned long last_addr
= 0;
2761 fragS
*last_frag
= NULL
;
2763 first_addr
= ptr
->slot_number
;
2764 first_frag
= ptr
->slot_frag
;
2765 /* Find either the next body/prologue start, or the end of
2766 the function, and determine the size of the region. */
2767 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2768 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2769 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2771 last_addr
= last
->slot_number
;
2772 last_frag
= last
->slot_frag
;
2775 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2777 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2778 if (ptr
->r
.type
== body
)
2779 /* End of region. */
2787 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2789 /* This happens when a memory-stack-less procedure uses a
2790 ".restore sp" directive at the end of a region to pop
2792 ptr
->r
.record
.b
.t
= 0;
2803 case priunat_when_gr
:
2804 case priunat_when_mem
:
2808 ptr
->r
.record
.p
.t
= t
;
2816 case spill_psprel_p
:
2817 ptr
->r
.record
.x
.t
= t
;
2823 as_bad ("frgr_mem record before region record!");
2826 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2827 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2828 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2829 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2834 as_bad ("fr_mem record before region record!");
2837 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2838 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2843 as_bad ("gr_mem record before region record!");
2846 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2847 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2852 as_bad ("br_mem record before region record!");
2855 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2856 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2862 as_bad ("gr_gr record before region record!");
2865 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2870 as_bad ("br_gr record before region record!");
2873 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2882 /* Estimate the size of a frag before relaxing. We only have one type of frag
2883 to handle here, which is the unwind info frag. */
2886 ia64_estimate_size_before_relax (fragS
*frag
,
2887 asection
*segtype ATTRIBUTE_UNUSED
)
2892 /* ??? This code is identical to the first part of ia64_convert_frag. */
2893 list
= (unw_rec_list
*) frag
->fr_opcode
;
2894 fixup_unw_records (list
, 0);
2896 len
= calc_record_size (list
);
2897 /* pad to pointer-size boundary. */
2898 pad
= len
% md
.pointer_size
;
2900 len
+= md
.pointer_size
- pad
;
2901 /* Add 8 for the header. */
2903 /* Add a pointer for the personality offset. */
2904 if (frag
->fr_offset
)
2905 size
+= md
.pointer_size
;
2907 /* fr_var carries the max_chars that we created the fragment with.
2908 We must, of course, have allocated enough memory earlier. */
2909 assert (frag
->fr_var
>= size
);
2911 return frag
->fr_fix
+ size
;
2914 /* This function converts a rs_machine_dependent variant frag into a
2915 normal fill frag with the unwind image from the the record list. */
2917 ia64_convert_frag (fragS
*frag
)
2923 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2924 list
= (unw_rec_list
*) frag
->fr_opcode
;
2925 fixup_unw_records (list
, 0);
2927 len
= calc_record_size (list
);
2928 /* pad to pointer-size boundary. */
2929 pad
= len
% md
.pointer_size
;
2931 len
+= md
.pointer_size
- pad
;
2932 /* Add 8 for the header. */
2934 /* Add a pointer for the personality offset. */
2935 if (frag
->fr_offset
)
2936 size
+= md
.pointer_size
;
2938 /* fr_var carries the max_chars that we created the fragment with.
2939 We must, of course, have allocated enough memory earlier. */
2940 assert (frag
->fr_var
>= size
);
2942 /* Initialize the header area. fr_offset is initialized with
2943 unwind.personality_routine. */
2944 if (frag
->fr_offset
)
2946 if (md
.flags
& EF_IA_64_ABI64
)
2947 flag_value
= (bfd_vma
) 3 << 32;
2949 /* 32-bit unwind info block. */
2950 flag_value
= (bfd_vma
) 0x1003 << 32;
2955 md_number_to_chars (frag
->fr_literal
,
2956 (((bfd_vma
) 1 << 48) /* Version. */
2957 | flag_value
/* U & E handler flags. */
2958 | (len
/ md
.pointer_size
)), /* Length. */
2961 /* Skip the header. */
2962 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
2963 process_unw_records (list
, output_vbyte_mem
);
2965 /* Fill the padding bytes with zeros. */
2967 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
2968 md
.pointer_size
- pad
);
2970 frag
->fr_fix
+= size
;
2971 frag
->fr_type
= rs_fill
;
2973 frag
->fr_offset
= 0;
2977 convert_expr_to_ab_reg (e
, ab
, regp
)
2984 if (e
->X_op
!= O_register
)
2987 reg
= e
->X_add_number
;
2988 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2991 *regp
= reg
- REG_GR
;
2993 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
2994 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
2997 *regp
= reg
- REG_FR
;
2999 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3002 *regp
= reg
- REG_BR
;
3009 case REG_PR
: *regp
= 0; break;
3010 case REG_PSP
: *regp
= 1; break;
3011 case REG_PRIUNAT
: *regp
= 2; break;
3012 case REG_BR
+ 0: *regp
= 3; break;
3013 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3014 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3015 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3016 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3017 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3018 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3019 case REG_AR
+ AR_LC
: *regp
= 10; break;
3029 convert_expr_to_xy_reg (e
, xy
, regp
)
3036 if (e
->X_op
!= O_register
)
3039 reg
= e
->X_add_number
;
3041 if (/* reg >= REG_GR && */ reg
<= (REG_GR
+ 127))
3044 *regp
= reg
- REG_GR
;
3046 else if (reg
>= REG_FR
&& reg
<= (REG_FR
+ 127))
3049 *regp
= reg
- REG_FR
;
3051 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3054 *regp
= reg
- REG_BR
;
3064 /* The current frag is an alignment frag. */
3065 align_frag
= frag_now
;
3066 s_align_bytes (arg
);
3071 int dummy ATTRIBUTE_UNUSED
;
3076 radix
= *input_line_pointer
++;
3078 if (radix
!= 'C' && !is_end_of_line
[(unsigned char) radix
])
3080 as_bad ("Radix `%c' unsupported", *input_line_pointer
);
3081 ignore_rest_of_line ();
3086 /* Helper function for .loc directives. If the assembler is not generating
3087 line number info, then we need to remember which instructions have a .loc
3088 directive, and only call dwarf2_gen_line_info for those instructions. */
3093 CURR_SLOT
.loc_directive_seen
= 1;
3094 dwarf2_directive_loc (x
);
3097 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3099 dot_special_section (which
)
3102 set_section ((char *) special_section_name
[which
]);
3105 /* Return -1 for warning and 0 for error. */
3108 unwind_diagnostic (const char * region
, const char *directive
)
3110 if (md
.unwind_check
== unwind_check_warning
)
3112 as_warn (".%s outside of %s", directive
, region
);
3117 as_bad (".%s outside of %s", directive
, region
);
3118 ignore_rest_of_line ();
3123 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3124 a procedure but the unwind directive check is set to warning, 0 if
3125 a directive isn't in a procedure and the unwind directive check is set
3129 in_procedure (const char *directive
)
3131 if (unwind
.proc_start
3132 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3134 return unwind_diagnostic ("procedure", directive
);
3137 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3138 a prologue but the unwind directive check is set to warning, 0 if
3139 a directive isn't in a prologue and the unwind directive check is set
3143 in_prologue (const char *directive
)
3145 int in
= in_procedure (directive
);
3148 /* We are in a procedure. Check if we are in a prologue. */
3149 if (unwind
.prologue
)
3151 /* We only want to issue one message. */
3153 return unwind_diagnostic ("prologue", directive
);
3160 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3161 a body but the unwind directive check is set to warning, 0 if
3162 a directive isn't in a body and the unwind directive check is set
3166 in_body (const char *directive
)
3168 int in
= in_procedure (directive
);
3171 /* We are in a procedure. Check if we are in a body. */
3174 /* We only want to issue one message. */
3176 return unwind_diagnostic ("body region", directive
);
3184 add_unwind_entry (ptr
)
3188 unwind
.tail
->next
= ptr
;
3193 /* The current entry can in fact be a chain of unwind entries. */
3194 if (unwind
.current_entry
== NULL
)
3195 unwind
.current_entry
= ptr
;
3200 int dummy ATTRIBUTE_UNUSED
;
3204 if (!in_prologue ("fframe"))
3209 if (e
.X_op
!= O_constant
)
3210 as_bad ("Operand to .fframe must be a constant");
3212 add_unwind_entry (output_mem_stack_f (e
.X_add_number
));
3217 int dummy ATTRIBUTE_UNUSED
;
3222 if (!in_prologue ("vframe"))
3226 reg
= e
.X_add_number
- REG_GR
;
3227 if (e
.X_op
== O_register
&& reg
< 128)
3229 add_unwind_entry (output_mem_stack_v ());
3230 if (! (unwind
.prologue_mask
& 2))
3231 add_unwind_entry (output_psp_gr (reg
));
3234 as_bad ("First operand to .vframe must be a general register");
3238 dot_vframesp (dummy
)
3239 int dummy ATTRIBUTE_UNUSED
;
3243 if (!in_prologue ("vframesp"))
3247 if (e
.X_op
== O_constant
)
3249 add_unwind_entry (output_mem_stack_v ());
3250 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3253 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3257 dot_vframepsp (dummy
)
3258 int dummy ATTRIBUTE_UNUSED
;
3262 if (!in_prologue ("vframepsp"))
3266 if (e
.X_op
== O_constant
)
3268 add_unwind_entry (output_mem_stack_v ());
3269 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3272 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3277 int dummy ATTRIBUTE_UNUSED
;
3283 if (!in_prologue ("save"))
3286 sep
= parse_operand (&e1
);
3288 as_bad ("No second operand to .save");
3289 sep
= parse_operand (&e2
);
3291 reg1
= e1
.X_add_number
;
3292 reg2
= e2
.X_add_number
- REG_GR
;
3294 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3295 if (e1
.X_op
== O_register
)
3297 if (e2
.X_op
== O_register
&& reg2
>= 0 && reg2
< 128)
3301 case REG_AR
+ AR_BSP
:
3302 add_unwind_entry (output_bsp_when ());
3303 add_unwind_entry (output_bsp_gr (reg2
));
3305 case REG_AR
+ AR_BSPSTORE
:
3306 add_unwind_entry (output_bspstore_when ());
3307 add_unwind_entry (output_bspstore_gr (reg2
));
3309 case REG_AR
+ AR_RNAT
:
3310 add_unwind_entry (output_rnat_when ());
3311 add_unwind_entry (output_rnat_gr (reg2
));
3313 case REG_AR
+ AR_UNAT
:
3314 add_unwind_entry (output_unat_when ());
3315 add_unwind_entry (output_unat_gr (reg2
));
3317 case REG_AR
+ AR_FPSR
:
3318 add_unwind_entry (output_fpsr_when ());
3319 add_unwind_entry (output_fpsr_gr (reg2
));
3321 case REG_AR
+ AR_PFS
:
3322 add_unwind_entry (output_pfs_when ());
3323 if (! (unwind
.prologue_mask
& 4))
3324 add_unwind_entry (output_pfs_gr (reg2
));
3326 case REG_AR
+ AR_LC
:
3327 add_unwind_entry (output_lc_when ());
3328 add_unwind_entry (output_lc_gr (reg2
));
3331 add_unwind_entry (output_rp_when ());
3332 if (! (unwind
.prologue_mask
& 8))
3333 add_unwind_entry (output_rp_gr (reg2
));
3336 add_unwind_entry (output_preds_when ());
3337 if (! (unwind
.prologue_mask
& 1))
3338 add_unwind_entry (output_preds_gr (reg2
));
3341 add_unwind_entry (output_priunat_when_gr ());
3342 add_unwind_entry (output_priunat_gr (reg2
));
3345 as_bad ("First operand not a valid register");
3349 as_bad (" Second operand not a valid register");
3352 as_bad ("First operand not a register");
3357 int dummy ATTRIBUTE_UNUSED
;
3360 unsigned long ecount
; /* # of _additional_ regions to pop */
3363 if (!in_body ("restore"))
3366 sep
= parse_operand (&e1
);
3367 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3369 as_bad ("First operand to .restore must be stack pointer (sp)");
3375 parse_operand (&e2
);
3376 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3378 as_bad ("Second operand to .restore must be a constant >= 0");
3381 ecount
= e2
.X_add_number
;
3384 ecount
= unwind
.prologue_count
- 1;
3386 if (ecount
>= unwind
.prologue_count
)
3388 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3389 ecount
+ 1, unwind
.prologue_count
);
3393 add_unwind_entry (output_epilogue (ecount
));
3395 if (ecount
< unwind
.prologue_count
)
3396 unwind
.prologue_count
-= ecount
+ 1;
3398 unwind
.prologue_count
= 0;
3402 dot_restorereg (dummy
)
3403 int dummy ATTRIBUTE_UNUSED
;
3405 unsigned int ab
, reg
;
3408 if (!in_procedure ("restorereg"))
3413 if (!convert_expr_to_ab_reg (&e
, &ab
, ®
))
3415 as_bad ("First operand to .restorereg must be a preserved register");
3418 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0));
3422 dot_restorereg_p (dummy
)
3423 int dummy ATTRIBUTE_UNUSED
;
3425 unsigned int qp
, ab
, reg
;
3429 if (!in_procedure ("restorereg.p"))
3432 sep
= parse_operand (&e1
);
3435 as_bad ("No second operand to .restorereg.p");
3439 parse_operand (&e2
);
3441 qp
= e1
.X_add_number
- REG_P
;
3442 if (e1
.X_op
!= O_register
|| qp
> 63)
3444 as_bad ("First operand to .restorereg.p must be a predicate");
3448 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3450 as_bad ("Second operand to .restorereg.p must be a preserved register");
3453 add_unwind_entry (output_spill_reg_p (ab
, reg
, 0, 0, qp
));
3456 static char *special_linkonce_name
[] =
3458 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3462 start_unwind_section (const segT text_seg
, int sec_index
)
3465 Use a slightly ugly scheme to derive the unwind section names from
3466 the text section name:
3468 text sect. unwind table sect.
3469 name: name: comments:
3470 ---------- ----------------- --------------------------------
3472 .text.foo .IA_64.unwind.text.foo
3473 .foo .IA_64.unwind.foo
3475 .gnu.linkonce.ia64unw.foo
3476 _info .IA_64.unwind_info gas issues error message (ditto)
3477 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3479 This mapping is done so that:
3481 (a) An object file with unwind info only in .text will use
3482 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3483 This follows the letter of the ABI and also ensures backwards
3484 compatibility with older toolchains.
3486 (b) An object file with unwind info in multiple text sections
3487 will use separate unwind sections for each text section.
3488 This allows us to properly set the "sh_info" and "sh_link"
3489 fields in SHT_IA_64_UNWIND as required by the ABI and also
3490 lets GNU ld support programs with multiple segments
3491 containing unwind info (as might be the case for certain
3492 embedded applications).
3494 (c) An error is issued if there would be a name clash.
3497 const char *text_name
, *sec_text_name
;
3499 const char *prefix
= special_section_name
[sec_index
];
3501 size_t prefix_len
, suffix_len
, sec_name_len
;
3503 sec_text_name
= segment_name (text_seg
);
3504 text_name
= sec_text_name
;
3505 if (strncmp (text_name
, "_info", 5) == 0)
3507 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3509 ignore_rest_of_line ();
3512 if (strcmp (text_name
, ".text") == 0)
3515 /* Build the unwind section name by appending the (possibly stripped)
3516 text section name to the unwind prefix. */
3518 if (strncmp (text_name
, ".gnu.linkonce.t.",
3519 sizeof (".gnu.linkonce.t.") - 1) == 0)
3521 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3522 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3525 prefix_len
= strlen (prefix
);
3526 suffix_len
= strlen (suffix
);
3527 sec_name_len
= prefix_len
+ suffix_len
;
3528 sec_name
= alloca (sec_name_len
+ 1);
3529 memcpy (sec_name
, prefix
, prefix_len
);
3530 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3531 sec_name
[sec_name_len
] = '\0';
3533 /* Handle COMDAT group. */
3534 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3535 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3538 size_t len
, group_name_len
;
3539 const char *group_name
= elf_group_name (text_seg
);
3541 if (group_name
== NULL
)
3543 as_bad ("Group section `%s' has no group signature",
3545 ignore_rest_of_line ();
3548 /* We have to construct a fake section directive. */
3549 group_name_len
= strlen (group_name
);
3551 + 16 /* ,"aG",@progbits, */
3552 + group_name_len
/* ,group_name */
3555 section
= alloca (len
+ 1);
3556 memcpy (section
, sec_name
, sec_name_len
);
3557 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3558 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3559 memcpy (section
+ len
- 7, ",comdat", 7);
3560 section
[len
] = '\0';
3561 set_section (section
);
3565 set_section (sec_name
);
3566 bfd_set_section_flags (stdoutput
, now_seg
,
3567 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3570 elf_linked_to_section (now_seg
) = text_seg
;
3574 generate_unwind_image (const segT text_seg
)
3579 /* Mark the end of the unwind info, so that we can compute the size of the
3580 last unwind region. */
3581 add_unwind_entry (output_endp ());
3583 /* Force out pending instructions, to make sure all unwind records have
3584 a valid slot_number field. */
3585 ia64_flush_insns ();
3587 /* Generate the unwind record. */
3588 list
= optimize_unw_records (unwind
.list
);
3589 fixup_unw_records (list
, 1);
3590 size
= calc_record_size (list
);
3592 if (size
> 0 || unwind
.force_unwind_entry
)
3594 unwind
.force_unwind_entry
= 0;
3595 /* pad to pointer-size boundary. */
3596 pad
= size
% md
.pointer_size
;
3598 size
+= md
.pointer_size
- pad
;
3599 /* Add 8 for the header. */
3601 /* Add a pointer for the personality offset. */
3602 if (unwind
.personality_routine
)
3603 size
+= md
.pointer_size
;
3606 /* If there are unwind records, switch sections, and output the info. */
3610 bfd_reloc_code_real_type reloc
;
3612 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3614 /* Make sure the section has 4 byte alignment for ILP32 and
3615 8 byte alignment for LP64. */
3616 frag_align (md
.pointer_size_shift
, 0, 0);
3617 record_alignment (now_seg
, md
.pointer_size_shift
);
3619 /* Set expression which points to start of unwind descriptor area. */
3620 unwind
.info
= expr_build_dot ();
3622 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3623 (offsetT
) (long) unwind
.personality_routine
,
3626 /* Add the personality address to the image. */
3627 if (unwind
.personality_routine
!= 0)
3629 exp
.X_op
= O_symbol
;
3630 exp
.X_add_symbol
= unwind
.personality_routine
;
3631 exp
.X_add_number
= 0;
3633 if (md
.flags
& EF_IA_64_BE
)
3635 if (md
.flags
& EF_IA_64_ABI64
)
3636 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3638 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3642 if (md
.flags
& EF_IA_64_ABI64
)
3643 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3645 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3648 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3649 md
.pointer_size
, &exp
, 0, reloc
);
3650 unwind
.personality_routine
= 0;
3654 free_saved_prologue_counts ();
3655 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3659 dot_handlerdata (dummy
)
3660 int dummy ATTRIBUTE_UNUSED
;
3662 if (!in_procedure ("handlerdata"))
3664 unwind
.force_unwind_entry
= 1;
3666 /* Remember which segment we're in so we can switch back after .endp */
3667 unwind
.saved_text_seg
= now_seg
;
3668 unwind
.saved_text_subseg
= now_subseg
;
3670 /* Generate unwind info into unwind-info section and then leave that
3671 section as the currently active one so dataXX directives go into
3672 the language specific data area of the unwind info block. */
3673 generate_unwind_image (now_seg
);
3674 demand_empty_rest_of_line ();
3678 dot_unwentry (dummy
)
3679 int dummy ATTRIBUTE_UNUSED
;
3681 if (!in_procedure ("unwentry"))
3683 unwind
.force_unwind_entry
= 1;
3684 demand_empty_rest_of_line ();
3689 int dummy ATTRIBUTE_UNUSED
;
3694 if (!in_prologue ("altrp"))
3698 reg
= e
.X_add_number
- REG_BR
;
3699 if (e
.X_op
== O_register
&& reg
< 8)
3700 add_unwind_entry (output_rp_br (reg
));
3702 as_bad ("First operand not a valid branch register");
3706 dot_savemem (psprel
)
3713 if (!in_prologue (psprel
? "savepsp" : "savesp"))
3716 sep
= parse_operand (&e1
);
3718 as_bad ("No second operand to .save%ssp", psprel
? "p" : "");
3719 sep
= parse_operand (&e2
);
3721 reg1
= e1
.X_add_number
;
3722 val
= e2
.X_add_number
;
3724 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3725 if (e1
.X_op
== O_register
)
3727 if (e2
.X_op
== O_constant
)
3731 case REG_AR
+ AR_BSP
:
3732 add_unwind_entry (output_bsp_when ());
3733 add_unwind_entry ((psprel
3735 : output_bsp_sprel
) (val
));
3737 case REG_AR
+ AR_BSPSTORE
:
3738 add_unwind_entry (output_bspstore_when ());
3739 add_unwind_entry ((psprel
3740 ? output_bspstore_psprel
3741 : output_bspstore_sprel
) (val
));
3743 case REG_AR
+ AR_RNAT
:
3744 add_unwind_entry (output_rnat_when ());
3745 add_unwind_entry ((psprel
3746 ? output_rnat_psprel
3747 : output_rnat_sprel
) (val
));
3749 case REG_AR
+ AR_UNAT
:
3750 add_unwind_entry (output_unat_when ());
3751 add_unwind_entry ((psprel
3752 ? output_unat_psprel
3753 : output_unat_sprel
) (val
));
3755 case REG_AR
+ AR_FPSR
:
3756 add_unwind_entry (output_fpsr_when ());
3757 add_unwind_entry ((psprel
3758 ? output_fpsr_psprel
3759 : output_fpsr_sprel
) (val
));
3761 case REG_AR
+ AR_PFS
:
3762 add_unwind_entry (output_pfs_when ());
3763 add_unwind_entry ((psprel
3765 : output_pfs_sprel
) (val
));
3767 case REG_AR
+ AR_LC
:
3768 add_unwind_entry (output_lc_when ());
3769 add_unwind_entry ((psprel
3771 : output_lc_sprel
) (val
));
3774 add_unwind_entry (output_rp_when ());
3775 add_unwind_entry ((psprel
3777 : output_rp_sprel
) (val
));
3780 add_unwind_entry (output_preds_when ());
3781 add_unwind_entry ((psprel
3782 ? output_preds_psprel
3783 : output_preds_sprel
) (val
));
3786 add_unwind_entry (output_priunat_when_mem ());
3787 add_unwind_entry ((psprel
3788 ? output_priunat_psprel
3789 : output_priunat_sprel
) (val
));
3792 as_bad ("First operand not a valid register");
3796 as_bad (" Second operand not a valid constant");
3799 as_bad ("First operand not a register");
3804 int dummy ATTRIBUTE_UNUSED
;
3809 if (!in_prologue ("save.g"))
3812 sep
= parse_operand (&e1
);
3814 parse_operand (&e2
);
3816 if (e1
.X_op
!= O_constant
)
3817 as_bad ("First operand to .save.g must be a constant.");
3820 int grmask
= e1
.X_add_number
;
3822 add_unwind_entry (output_gr_mem (grmask
));
3825 int reg
= e2
.X_add_number
- REG_GR
;
3826 if (e2
.X_op
== O_register
&& reg
>= 0 && reg
< 128)
3827 add_unwind_entry (output_gr_gr (grmask
, reg
));
3829 as_bad ("Second operand is an invalid register.");
3836 int dummy ATTRIBUTE_UNUSED
;
3841 if (!in_prologue ("save.f"))
3844 sep
= parse_operand (&e1
);
3846 if (e1
.X_op
!= O_constant
)
3847 as_bad ("Operand to .save.f must be a constant.");
3849 add_unwind_entry (output_fr_mem (e1
.X_add_number
));
3854 int dummy ATTRIBUTE_UNUSED
;
3861 if (!in_prologue ("save.b"))
3864 sep
= parse_operand (&e1
);
3865 if (e1
.X_op
!= O_constant
)
3867 as_bad ("First operand to .save.b must be a constant.");
3870 brmask
= e1
.X_add_number
;
3874 sep
= parse_operand (&e2
);
3875 reg
= e2
.X_add_number
- REG_GR
;
3876 if (e2
.X_op
!= O_register
|| reg
> 127)
3878 as_bad ("Second operand to .save.b must be a general register.");
3881 add_unwind_entry (output_br_gr (brmask
, e2
.X_add_number
));
3884 add_unwind_entry (output_br_mem (brmask
));
3886 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3887 demand_empty_rest_of_line ();
3892 int dummy ATTRIBUTE_UNUSED
;
3897 if (!in_prologue ("save.gf"))
3900 sep
= parse_operand (&e1
);
3902 parse_operand (&e2
);
3904 if (e1
.X_op
!= O_constant
|| sep
!= ',' || e2
.X_op
!= O_constant
)
3905 as_bad ("Both operands of .save.gf must be constants.");
3908 int grmask
= e1
.X_add_number
;
3909 int frmask
= e2
.X_add_number
;
3910 add_unwind_entry (output_frgr_mem (grmask
, frmask
));
3916 int dummy ATTRIBUTE_UNUSED
;
3921 if (!in_prologue ("spill"))
3924 sep
= parse_operand (&e
);
3925 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3926 demand_empty_rest_of_line ();
3928 if (e
.X_op
!= O_constant
)
3929 as_bad ("Operand to .spill must be a constant");
3931 add_unwind_entry (output_spill_base (e
.X_add_number
));
3935 dot_spillreg (dummy
)
3936 int dummy ATTRIBUTE_UNUSED
;
3939 unsigned int ab
, xy
, reg
, treg
;
3942 if (!in_procedure ("spillreg"))
3945 sep
= parse_operand (&e1
);
3948 as_bad ("No second operand to .spillreg");
3952 parse_operand (&e2
);
3954 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3956 as_bad ("First operand to .spillreg must be a preserved register");
3960 if (!convert_expr_to_xy_reg (&e2
, &xy
, &treg
))
3962 as_bad ("Second operand to .spillreg must be a register");
3966 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
));
3970 dot_spillmem (psprel
)
3975 unsigned int ab
, reg
;
3977 if (!in_procedure ("spillmem"))
3980 sep
= parse_operand (&e1
);
3983 as_bad ("Second operand missing");
3987 parse_operand (&e2
);
3989 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3991 as_bad ("First operand to .spill%s must be a preserved register",
3992 psprel
? "psp" : "sp");
3996 if (e2
.X_op
!= O_constant
)
3998 as_bad ("Second operand to .spill%s must be a constant",
3999 psprel
? "psp" : "sp");
4004 add_unwind_entry (output_spill_psprel (ab
, reg
, e2
.X_add_number
));
4006 add_unwind_entry (output_spill_sprel (ab
, reg
, e2
.X_add_number
));
4010 dot_spillreg_p (dummy
)
4011 int dummy ATTRIBUTE_UNUSED
;
4014 unsigned int ab
, xy
, reg
, treg
;
4015 expressionS e1
, e2
, e3
;
4018 if (!in_procedure ("spillreg.p"))
4021 sep
= parse_operand (&e1
);
4024 as_bad ("No second and third operand to .spillreg.p");
4028 sep
= parse_operand (&e2
);
4031 as_bad ("No third operand to .spillreg.p");
4035 parse_operand (&e3
);
4037 qp
= e1
.X_add_number
- REG_P
;
4039 if (e1
.X_op
!= O_register
|| qp
> 63)
4041 as_bad ("First operand to .spillreg.p must be a predicate");
4045 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4047 as_bad ("Second operand to .spillreg.p must be a preserved register");
4051 if (!convert_expr_to_xy_reg (&e3
, &xy
, &treg
))
4053 as_bad ("Third operand to .spillreg.p must be a register");
4057 add_unwind_entry (output_spill_reg_p (ab
, reg
, treg
, xy
, qp
));
4061 dot_spillmem_p (psprel
)
4064 expressionS e1
, e2
, e3
;
4066 unsigned int ab
, reg
;
4069 if (!in_procedure ("spillmem.p"))
4072 sep
= parse_operand (&e1
);
4075 as_bad ("Second operand missing");
4079 parse_operand (&e2
);
4082 as_bad ("Second operand missing");
4086 parse_operand (&e3
);
4088 qp
= e1
.X_add_number
- REG_P
;
4089 if (e1
.X_op
!= O_register
|| qp
> 63)
4091 as_bad ("First operand to .spill%s_p must be a predicate",
4092 psprel
? "psp" : "sp");
4096 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4098 as_bad ("Second operand to .spill%s_p must be a preserved register",
4099 psprel
? "psp" : "sp");
4103 if (e3
.X_op
!= O_constant
)
4105 as_bad ("Third operand to .spill%s_p must be a constant",
4106 psprel
? "psp" : "sp");
4111 add_unwind_entry (output_spill_psprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4113 add_unwind_entry (output_spill_sprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4117 get_saved_prologue_count (lbl
)
4120 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4122 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4126 return lpc
->prologue_count
;
4128 as_bad ("Missing .label_state %ld", lbl
);
4133 save_prologue_count (lbl
, count
)
4137 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4139 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4143 lpc
->prologue_count
= count
;
4146 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4148 new_lpc
->next
= unwind
.saved_prologue_counts
;
4149 new_lpc
->label_number
= lbl
;
4150 new_lpc
->prologue_count
= count
;
4151 unwind
.saved_prologue_counts
= new_lpc
;
4156 free_saved_prologue_counts ()
4158 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4159 label_prologue_count
*next
;
4168 unwind
.saved_prologue_counts
= NULL
;
4172 dot_label_state (dummy
)
4173 int dummy ATTRIBUTE_UNUSED
;
4177 if (!in_body ("label_state"))
4181 if (e
.X_op
!= O_constant
)
4183 as_bad ("Operand to .label_state must be a constant");
4186 add_unwind_entry (output_label_state (e
.X_add_number
));
4187 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4191 dot_copy_state (dummy
)
4192 int dummy ATTRIBUTE_UNUSED
;
4196 if (!in_body ("copy_state"))
4200 if (e
.X_op
!= O_constant
)
4202 as_bad ("Operand to .copy_state must be a constant");
4205 add_unwind_entry (output_copy_state (e
.X_add_number
));
4206 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4211 int dummy ATTRIBUTE_UNUSED
;
4216 if (!in_procedure ("unwabi"))
4219 sep
= parse_operand (&e1
);
4222 as_bad ("Second operand to .unwabi missing");
4225 sep
= parse_operand (&e2
);
4226 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4227 demand_empty_rest_of_line ();
4229 if (e1
.X_op
!= O_constant
)
4231 as_bad ("First operand to .unwabi must be a constant");
4235 if (e2
.X_op
!= O_constant
)
4237 as_bad ("Second operand to .unwabi must be a constant");
4241 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
));
4245 dot_personality (dummy
)
4246 int dummy ATTRIBUTE_UNUSED
;
4249 if (!in_procedure ("personality"))
4252 name
= input_line_pointer
;
4253 c
= get_symbol_end ();
4254 p
= input_line_pointer
;
4255 unwind
.personality_routine
= symbol_find_or_make (name
);
4256 unwind
.force_unwind_entry
= 1;
4259 demand_empty_rest_of_line ();
4264 int dummy ATTRIBUTE_UNUSED
;
4269 unwind
.proc_start
= 0;
4270 /* Parse names of main and alternate entry points and mark them as
4271 function symbols: */
4275 name
= input_line_pointer
;
4276 c
= get_symbol_end ();
4277 p
= input_line_pointer
;
4279 as_bad ("Empty argument of .proc");
4282 sym
= symbol_find_or_make (name
);
4283 if (S_IS_DEFINED (sym
))
4284 as_bad ("`%s' was already defined", name
);
4285 else if (unwind
.proc_start
== 0)
4287 unwind
.proc_start
= sym
;
4289 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4293 if (*input_line_pointer
!= ',')
4295 ++input_line_pointer
;
4297 if (unwind
.proc_start
== 0)
4298 unwind
.proc_start
= expr_build_dot ();
4299 demand_empty_rest_of_line ();
4302 unwind
.prologue
= 0;
4303 unwind
.prologue_count
= 0;
4306 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4307 unwind
.personality_routine
= 0;
4312 int dummy ATTRIBUTE_UNUSED
;
4314 if (!in_procedure ("body"))
4316 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4317 as_warn ("Initial .body should precede any instructions");
4319 unwind
.prologue
= 0;
4320 unwind
.prologue_mask
= 0;
4323 add_unwind_entry (output_body ());
4324 demand_empty_rest_of_line ();
4328 dot_prologue (dummy
)
4329 int dummy ATTRIBUTE_UNUSED
;
4332 int mask
= 0, grsave
= 0;
4334 if (!in_procedure ("prologue"))
4336 if (unwind
.prologue
)
4338 as_bad (".prologue within prologue");
4339 ignore_rest_of_line ();
4342 if (!unwind
.body
&& unwind
.insn
)
4343 as_warn ("Initial .prologue should precede any instructions");
4345 if (!is_it_end_of_statement ())
4348 sep
= parse_operand (&e1
);
4350 as_bad ("No second operand to .prologue");
4351 sep
= parse_operand (&e2
);
4352 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4353 demand_empty_rest_of_line ();
4355 if (e1
.X_op
== O_constant
)
4357 mask
= e1
.X_add_number
;
4359 if (e2
.X_op
== O_constant
)
4360 grsave
= e2
.X_add_number
;
4361 else if (e2
.X_op
== O_register
4362 && (grsave
= e2
.X_add_number
- REG_GR
) < 128)
4365 as_bad ("Second operand not a constant or general register");
4367 add_unwind_entry (output_prologue_gr (mask
, grsave
));
4370 as_bad ("First operand not a constant");
4373 add_unwind_entry (output_prologue ());
4375 unwind
.prologue
= 1;
4376 unwind
.prologue_mask
= mask
;
4378 ++unwind
.prologue_count
;
4383 int dummy ATTRIBUTE_UNUSED
;
4387 int bytes_per_address
;
4390 subsegT saved_subseg
;
4391 char *name
, *default_name
, *p
, c
;
4393 int unwind_check
= md
.unwind_check
;
4395 md
.unwind_check
= unwind_check_error
;
4396 if (!in_procedure ("endp"))
4398 md
.unwind_check
= unwind_check
;
4400 if (unwind
.saved_text_seg
)
4402 saved_seg
= unwind
.saved_text_seg
;
4403 saved_subseg
= unwind
.saved_text_subseg
;
4404 unwind
.saved_text_seg
= NULL
;
4408 saved_seg
= now_seg
;
4409 saved_subseg
= now_subseg
;
4412 insn_group_break (1, 0, 0);
4414 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4416 generate_unwind_image (saved_seg
);
4418 if (unwind
.info
|| unwind
.force_unwind_entry
)
4422 subseg_set (md
.last_text_seg
, 0);
4423 proc_end
= expr_build_dot ();
4425 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4427 /* Make sure that section has 4 byte alignment for ILP32 and
4428 8 byte alignment for LP64. */
4429 record_alignment (now_seg
, md
.pointer_size_shift
);
4431 /* Need space for 3 pointers for procedure start, procedure end,
4433 ptr
= frag_more (3 * md
.pointer_size
);
4434 where
= frag_now_fix () - (3 * md
.pointer_size
);
4435 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4437 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4438 e
.X_op
= O_pseudo_fixup
;
4439 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4441 if (!S_IS_LOCAL (unwind
.proc_start
)
4442 && S_IS_DEFINED (unwind
.proc_start
))
4443 e
.X_add_symbol
= symbol_temp_new (S_GET_SEGMENT (unwind
.proc_start
),
4444 S_GET_VALUE (unwind
.proc_start
),
4445 symbol_get_frag (unwind
.proc_start
));
4447 e
.X_add_symbol
= unwind
.proc_start
;
4448 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4450 e
.X_op
= O_pseudo_fixup
;
4451 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4453 e
.X_add_symbol
= proc_end
;
4454 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4455 bytes_per_address
, &e
);
4459 e
.X_op
= O_pseudo_fixup
;
4460 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4462 e
.X_add_symbol
= unwind
.info
;
4463 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4464 bytes_per_address
, &e
);
4467 md_number_to_chars (ptr
+ (bytes_per_address
* 2), 0,
4471 subseg_set (saved_seg
, saved_subseg
);
4473 if (unwind
.proc_start
)
4474 default_name
= (char *) S_GET_NAME (unwind
.proc_start
);
4476 default_name
= NULL
;
4478 /* Parse names of main and alternate entry points and set symbol sizes. */
4482 name
= input_line_pointer
;
4483 c
= get_symbol_end ();
4484 p
= input_line_pointer
;
4487 if (md
.unwind_check
== unwind_check_warning
)
4491 as_warn ("Empty argument of .endp. Use the default name `%s'",
4493 name
= default_name
;
4496 as_warn ("Empty argument of .endp");
4499 as_bad ("Empty argument of .endp");
4503 sym
= symbol_find (name
);
4505 && md
.unwind_check
== unwind_check_warning
4507 && default_name
!= name
)
4509 /* We have a bad name. Try the default one if needed. */
4510 as_warn ("`%s' was not defined within procedure. Use the default name `%s'",
4511 name
, default_name
);
4512 name
= default_name
;
4513 sym
= symbol_find (name
);
4515 if (!sym
|| !S_IS_DEFINED (sym
))
4516 as_bad ("`%s' was not defined within procedure", name
);
4517 else if (unwind
.proc_start
4518 && (symbol_get_bfdsym (sym
)->flags
& BSF_FUNCTION
)
4519 && S_GET_SIZE (sym
) == 0 && symbol_get_obj (sym
)->size
== NULL
)
4521 fragS
*fr
= symbol_get_frag (unwind
.proc_start
);
4522 fragS
*frag
= symbol_get_frag (sym
);
4524 /* Check whether the function label is at or beyond last
4526 while (fr
&& fr
!= frag
)
4530 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4531 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4534 symbol_get_obj (sym
)->size
=
4535 (expressionS
*) xmalloc (sizeof (expressionS
));
4536 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4537 symbol_get_obj (sym
)->size
->X_add_symbol
4538 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4539 frag_now_fix (), frag_now
);
4540 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4541 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4548 if (*input_line_pointer
!= ',')
4550 ++input_line_pointer
;
4552 demand_empty_rest_of_line ();
4553 unwind
.proc_start
= unwind
.info
= 0;
4557 dot_template (template)
4560 CURR_SLOT
.user_template
= template;
4565 int dummy ATTRIBUTE_UNUSED
;
4567 int ins
, locs
, outs
, rots
;
4569 if (is_it_end_of_statement ())
4570 ins
= locs
= outs
= rots
= 0;
4573 ins
= get_absolute_expression ();
4574 if (*input_line_pointer
++ != ',')
4576 locs
= get_absolute_expression ();
4577 if (*input_line_pointer
++ != ',')
4579 outs
= get_absolute_expression ();
4580 if (*input_line_pointer
++ != ',')
4582 rots
= get_absolute_expression ();
4584 set_regstack (ins
, locs
, outs
, rots
);
4588 as_bad ("Comma expected");
4589 ignore_rest_of_line ();
4596 unsigned num_regs
, num_alloced
= 0;
4597 struct dynreg
**drpp
, *dr
;
4598 int ch
, base_reg
= 0;
4604 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4605 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4606 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4610 /* First, remove existing names from hash table. */
4611 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4613 hash_delete (md
.dynreg_hash
, dr
->name
);
4614 /* FIXME: Free dr->name. */
4618 drpp
= &md
.dynreg
[type
];
4621 start
= input_line_pointer
;
4622 ch
= get_symbol_end ();
4623 len
= strlen (ia64_canonicalize_symbol_name (start
));
4624 *input_line_pointer
= ch
;
4627 if (*input_line_pointer
!= '[')
4629 as_bad ("Expected '['");
4632 ++input_line_pointer
; /* skip '[' */
4634 num_regs
= get_absolute_expression ();
4636 if (*input_line_pointer
++ != ']')
4638 as_bad ("Expected ']'");
4643 num_alloced
+= num_regs
;
4647 if (num_alloced
> md
.rot
.num_regs
)
4649 as_bad ("Used more than the declared %d rotating registers",
4655 if (num_alloced
> 96)
4657 as_bad ("Used more than the available 96 rotating registers");
4662 if (num_alloced
> 48)
4664 as_bad ("Used more than the available 48 rotating registers");
4675 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4676 memset (*drpp
, 0, sizeof (*dr
));
4679 name
= obstack_alloc (¬es
, len
+ 1);
4680 memcpy (name
, start
, len
);
4685 dr
->num_regs
= num_regs
;
4686 dr
->base
= base_reg
;
4688 base_reg
+= num_regs
;
4690 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4692 as_bad ("Attempt to redefine register set `%s'", name
);
4693 obstack_free (¬es
, name
);
4697 if (*input_line_pointer
!= ',')
4699 ++input_line_pointer
; /* skip comma */
4702 demand_empty_rest_of_line ();
4706 ignore_rest_of_line ();
4710 dot_byteorder (byteorder
)
4713 segment_info_type
*seginfo
= seg_info (now_seg
);
4715 if (byteorder
== -1)
4717 if (seginfo
->tc_segment_info_data
.endian
== 0)
4718 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4719 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4722 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4724 if (target_big_endian
!= byteorder
)
4726 target_big_endian
= byteorder
;
4727 if (target_big_endian
)
4729 ia64_number_to_chars
= number_to_chars_bigendian
;
4730 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4734 ia64_number_to_chars
= number_to_chars_littleendian
;
4735 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4742 int dummy ATTRIBUTE_UNUSED
;
4749 option
= input_line_pointer
;
4750 ch
= get_symbol_end ();
4751 if (strcmp (option
, "lsb") == 0)
4752 md
.flags
&= ~EF_IA_64_BE
;
4753 else if (strcmp (option
, "msb") == 0)
4754 md
.flags
|= EF_IA_64_BE
;
4755 else if (strcmp (option
, "abi32") == 0)
4756 md
.flags
&= ~EF_IA_64_ABI64
;
4757 else if (strcmp (option
, "abi64") == 0)
4758 md
.flags
|= EF_IA_64_ABI64
;
4760 as_bad ("Unknown psr option `%s'", option
);
4761 *input_line_pointer
= ch
;
4764 if (*input_line_pointer
!= ',')
4767 ++input_line_pointer
;
4770 demand_empty_rest_of_line ();
4775 int dummy ATTRIBUTE_UNUSED
;
4777 new_logical_line (0, get_absolute_expression ());
4778 demand_empty_rest_of_line ();
4782 cross_section (ref
, cons
, ua
)
4784 void (*cons
) PARAMS((int));
4788 int saved_auto_align
;
4789 unsigned int section_count
;
4792 start
= input_line_pointer
;
4798 name
= demand_copy_C_string (&len
);
4799 obstack_free(¬es
, name
);
4802 ignore_rest_of_line ();
4808 char c
= get_symbol_end ();
4810 if (input_line_pointer
== start
)
4812 as_bad ("Missing section name");
4813 ignore_rest_of_line ();
4816 *input_line_pointer
= c
;
4818 end
= input_line_pointer
;
4820 if (*input_line_pointer
!= ',')
4822 as_bad ("Comma expected after section name");
4823 ignore_rest_of_line ();
4827 end
= input_line_pointer
+ 1; /* skip comma */
4828 input_line_pointer
= start
;
4829 md
.keep_pending_output
= 1;
4830 section_count
= bfd_count_sections(stdoutput
);
4831 obj_elf_section (0);
4832 if (section_count
!= bfd_count_sections(stdoutput
))
4833 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
4834 input_line_pointer
= end
;
4835 saved_auto_align
= md
.auto_align
;
4840 md
.auto_align
= saved_auto_align
;
4841 obj_elf_previous (0);
4842 md
.keep_pending_output
= 0;
4849 cross_section (size
, cons
, 0);
4852 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4855 stmt_float_cons (kind
)
4876 ia64_do_align (alignment
);
4884 int saved_auto_align
= md
.auto_align
;
4888 md
.auto_align
= saved_auto_align
;
4892 dot_xfloat_cons (kind
)
4895 cross_section (kind
, stmt_float_cons
, 0);
4899 dot_xstringer (zero
)
4902 cross_section (zero
, stringer
, 0);
4909 cross_section (size
, cons
, 1);
4913 dot_xfloat_cons_ua (kind
)
4916 cross_section (kind
, float_cons
, 1);
4919 /* .reg.val <regname>,value */
4923 int dummy ATTRIBUTE_UNUSED
;
4928 if (reg
.X_op
!= O_register
)
4930 as_bad (_("Register name expected"));
4931 ignore_rest_of_line ();
4933 else if (*input_line_pointer
++ != ',')
4935 as_bad (_("Comma expected"));
4936 ignore_rest_of_line ();
4940 valueT value
= get_absolute_expression ();
4941 int regno
= reg
.X_add_number
;
4942 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4943 as_warn (_("Register value annotation ignored"));
4946 gr_values
[regno
- REG_GR
].known
= 1;
4947 gr_values
[regno
- REG_GR
].value
= value
;
4948 gr_values
[regno
- REG_GR
].path
= md
.path
;
4951 demand_empty_rest_of_line ();
4956 .serialize.instruction
4959 dot_serialize (type
)
4962 insn_group_break (0, 0, 0);
4964 instruction_serialization ();
4966 data_serialization ();
4967 insn_group_break (0, 0, 0);
4968 demand_empty_rest_of_line ();
4971 /* select dv checking mode
4976 A stop is inserted when changing modes
4983 if (md
.manual_bundling
)
4984 as_warn (_("Directive invalid within a bundle"));
4986 if (type
== 'E' || type
== 'A')
4987 md
.mode_explicitly_set
= 0;
4989 md
.mode_explicitly_set
= 1;
4996 if (md
.explicit_mode
)
4997 insn_group_break (1, 0, 0);
4998 md
.explicit_mode
= 0;
5002 if (!md
.explicit_mode
)
5003 insn_group_break (1, 0, 0);
5004 md
.explicit_mode
= 1;
5008 if (md
.explicit_mode
!= md
.default_explicit_mode
)
5009 insn_group_break (1, 0, 0);
5010 md
.explicit_mode
= md
.default_explicit_mode
;
5011 md
.mode_explicitly_set
= 0;
5022 for (regno
= 0; regno
< 64; regno
++)
5024 if (mask
& ((valueT
) 1 << regno
))
5026 fprintf (stderr
, "%s p%d", comma
, regno
);
5033 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5034 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5035 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5036 .pred.safe_across_calls p1 [, p2 [,...]]
5045 int p1
= -1, p2
= -1;
5049 if (*input_line_pointer
== '"')
5052 char *form
= demand_copy_C_string (&len
);
5054 if (strcmp (form
, "mutex") == 0)
5056 else if (strcmp (form
, "clear") == 0)
5058 else if (strcmp (form
, "imply") == 0)
5060 obstack_free (¬es
, form
);
5062 else if (*input_line_pointer
== '@')
5064 char *form
= ++input_line_pointer
;
5065 char c
= get_symbol_end();
5067 if (strcmp (form
, "mutex") == 0)
5069 else if (strcmp (form
, "clear") == 0)
5071 else if (strcmp (form
, "imply") == 0)
5073 *input_line_pointer
= c
;
5077 as_bad (_("Missing predicate relation type"));
5078 ignore_rest_of_line ();
5083 as_bad (_("Unrecognized predicate relation type"));
5084 ignore_rest_of_line ();
5087 if (*input_line_pointer
== ',')
5088 ++input_line_pointer
;
5097 expressionS pr
, *pr1
, *pr2
;
5100 if (pr
.X_op
== O_register
5101 && pr
.X_add_number
>= REG_P
5102 && pr
.X_add_number
<= REG_P
+ 63)
5104 regno
= pr
.X_add_number
- REG_P
;
5112 else if (type
!= 'i'
5113 && pr
.X_op
== O_subtract
5114 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5115 && pr1
->X_op
== O_register
5116 && pr1
->X_add_number
>= REG_P
5117 && pr1
->X_add_number
<= REG_P
+ 63
5118 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5119 && pr2
->X_op
== O_register
5120 && pr2
->X_add_number
>= REG_P
5121 && pr2
->X_add_number
<= REG_P
+ 63)
5126 regno
= pr1
->X_add_number
- REG_P
;
5127 stop
= pr2
->X_add_number
- REG_P
;
5130 as_bad (_("Bad register range"));
5131 ignore_rest_of_line ();
5134 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5135 count
+= stop
- regno
+ 1;
5139 as_bad (_("Predicate register expected"));
5140 ignore_rest_of_line ();
5144 as_warn (_("Duplicate predicate register ignored"));
5146 if (*input_line_pointer
!= ',')
5148 ++input_line_pointer
;
5157 clear_qp_mutex (mask
);
5158 clear_qp_implies (mask
, (valueT
) 0);
5161 if (count
!= 2 || p1
== -1 || p2
== -1)
5162 as_bad (_("Predicate source and target required"));
5163 else if (p1
== 0 || p2
== 0)
5164 as_bad (_("Use of p0 is not valid in this context"));
5166 add_qp_imply (p1
, p2
);
5171 as_bad (_("At least two PR arguments expected"));
5176 as_bad (_("Use of p0 is not valid in this context"));
5179 add_qp_mutex (mask
);
5182 /* note that we don't override any existing relations */
5185 as_bad (_("At least one PR argument expected"));
5190 fprintf (stderr
, "Safe across calls: ");
5191 print_prmask (mask
);
5192 fprintf (stderr
, "\n");
5194 qp_safe_across_calls
= mask
;
5197 demand_empty_rest_of_line ();
5200 /* .entry label [, label [, ...]]
5201 Hint to DV code that the given labels are to be considered entry points.
5202 Otherwise, only global labels are considered entry points. */
5206 int dummy ATTRIBUTE_UNUSED
;
5215 name
= input_line_pointer
;
5216 c
= get_symbol_end ();
5217 symbolP
= symbol_find_or_make (name
);
5219 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
5221 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5224 *input_line_pointer
= c
;
5226 c
= *input_line_pointer
;
5229 input_line_pointer
++;
5231 if (*input_line_pointer
== '\n')
5237 demand_empty_rest_of_line ();
5240 /* .mem.offset offset, base
5241 "base" is used to distinguish between offsets from a different base. */
5244 dot_mem_offset (dummy
)
5245 int dummy ATTRIBUTE_UNUSED
;
5247 md
.mem_offset
.hint
= 1;
5248 md
.mem_offset
.offset
= get_absolute_expression ();
5249 if (*input_line_pointer
!= ',')
5251 as_bad (_("Comma expected"));
5252 ignore_rest_of_line ();
5255 ++input_line_pointer
;
5256 md
.mem_offset
.base
= get_absolute_expression ();
5257 demand_empty_rest_of_line ();
5260 /* ia64-specific pseudo-ops: */
5261 const pseudo_typeS md_pseudo_table
[] =
5263 { "radix", dot_radix
, 0 },
5264 { "lcomm", s_lcomm_bytes
, 1 },
5265 { "loc", dot_loc
, 0 },
5266 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5267 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5268 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5269 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5270 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5271 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5272 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5273 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5274 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5275 { "proc", dot_proc
, 0 },
5276 { "body", dot_body
, 0 },
5277 { "prologue", dot_prologue
, 0 },
5278 { "endp", dot_endp
, 0 },
5280 { "fframe", dot_fframe
, 0 },
5281 { "vframe", dot_vframe
, 0 },
5282 { "vframesp", dot_vframesp
, 0 },
5283 { "vframepsp", dot_vframepsp
, 0 },
5284 { "save", dot_save
, 0 },
5285 { "restore", dot_restore
, 0 },
5286 { "restorereg", dot_restorereg
, 0 },
5287 { "restorereg.p", dot_restorereg_p
, 0 },
5288 { "handlerdata", dot_handlerdata
, 0 },
5289 { "unwentry", dot_unwentry
, 0 },
5290 { "altrp", dot_altrp
, 0 },
5291 { "savesp", dot_savemem
, 0 },
5292 { "savepsp", dot_savemem
, 1 },
5293 { "save.g", dot_saveg
, 0 },
5294 { "save.f", dot_savef
, 0 },
5295 { "save.b", dot_saveb
, 0 },
5296 { "save.gf", dot_savegf
, 0 },
5297 { "spill", dot_spill
, 0 },
5298 { "spillreg", dot_spillreg
, 0 },
5299 { "spillsp", dot_spillmem
, 0 },
5300 { "spillpsp", dot_spillmem
, 1 },
5301 { "spillreg.p", dot_spillreg_p
, 0 },
5302 { "spillsp.p", dot_spillmem_p
, 0 },
5303 { "spillpsp.p", dot_spillmem_p
, 1 },
5304 { "label_state", dot_label_state
, 0 },
5305 { "copy_state", dot_copy_state
, 0 },
5306 { "unwabi", dot_unwabi
, 0 },
5307 { "personality", dot_personality
, 0 },
5308 { "mii", dot_template
, 0x0 },
5309 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5310 { "mlx", dot_template
, 0x2 },
5311 { "mmi", dot_template
, 0x4 },
5312 { "mfi", dot_template
, 0x6 },
5313 { "mmf", dot_template
, 0x7 },
5314 { "mib", dot_template
, 0x8 },
5315 { "mbb", dot_template
, 0x9 },
5316 { "bbb", dot_template
, 0xb },
5317 { "mmb", dot_template
, 0xc },
5318 { "mfb", dot_template
, 0xe },
5319 { "align", dot_align
, 0 },
5320 { "regstk", dot_regstk
, 0 },
5321 { "rotr", dot_rot
, DYNREG_GR
},
5322 { "rotf", dot_rot
, DYNREG_FR
},
5323 { "rotp", dot_rot
, DYNREG_PR
},
5324 { "lsb", dot_byteorder
, 0 },
5325 { "msb", dot_byteorder
, 1 },
5326 { "psr", dot_psr
, 0 },
5327 { "alias", dot_alias
, 0 },
5328 { "secalias", dot_alias
, 1 },
5329 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5331 { "xdata1", dot_xdata
, 1 },
5332 { "xdata2", dot_xdata
, 2 },
5333 { "xdata4", dot_xdata
, 4 },
5334 { "xdata8", dot_xdata
, 8 },
5335 { "xdata16", dot_xdata
, 16 },
5336 { "xreal4", dot_xfloat_cons
, 'f' },
5337 { "xreal8", dot_xfloat_cons
, 'd' },
5338 { "xreal10", dot_xfloat_cons
, 'x' },
5339 { "xreal16", dot_xfloat_cons
, 'X' },
5340 { "xstring", dot_xstringer
, 0 },
5341 { "xstringz", dot_xstringer
, 1 },
5343 /* unaligned versions: */
5344 { "xdata2.ua", dot_xdata_ua
, 2 },
5345 { "xdata4.ua", dot_xdata_ua
, 4 },
5346 { "xdata8.ua", dot_xdata_ua
, 8 },
5347 { "xdata16.ua", dot_xdata_ua
, 16 },
5348 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5349 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5350 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5351 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5353 /* annotations/DV checking support */
5354 { "entry", dot_entry
, 0 },
5355 { "mem.offset", dot_mem_offset
, 0 },
5356 { "pred.rel", dot_pred_rel
, 0 },
5357 { "pred.rel.clear", dot_pred_rel
, 'c' },
5358 { "pred.rel.imply", dot_pred_rel
, 'i' },
5359 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5360 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5361 { "reg.val", dot_reg_val
, 0 },
5362 { "serialize.data", dot_serialize
, 0 },
5363 { "serialize.instruction", dot_serialize
, 1 },
5364 { "auto", dot_dv_mode
, 'a' },
5365 { "explicit", dot_dv_mode
, 'e' },
5366 { "default", dot_dv_mode
, 'd' },
5368 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5369 IA-64 aligns data allocation pseudo-ops by default, so we have to
5370 tell it that these ones are supposed to be unaligned. Long term,
5371 should rewrite so that only IA-64 specific data allocation pseudo-ops
5372 are aligned by default. */
5373 {"2byte", stmt_cons_ua
, 2},
5374 {"4byte", stmt_cons_ua
, 4},
5375 {"8byte", stmt_cons_ua
, 8},
5380 static const struct pseudo_opcode
5383 void (*handler
) (int);
5388 /* these are more like pseudo-ops, but don't start with a dot */
5389 { "data1", cons
, 1 },
5390 { "data2", cons
, 2 },
5391 { "data4", cons
, 4 },
5392 { "data8", cons
, 8 },
5393 { "data16", cons
, 16 },
5394 { "real4", stmt_float_cons
, 'f' },
5395 { "real8", stmt_float_cons
, 'd' },
5396 { "real10", stmt_float_cons
, 'x' },
5397 { "real16", stmt_float_cons
, 'X' },
5398 { "string", stringer
, 0 },
5399 { "stringz", stringer
, 1 },
5401 /* unaligned versions: */
5402 { "data2.ua", stmt_cons_ua
, 2 },
5403 { "data4.ua", stmt_cons_ua
, 4 },
5404 { "data8.ua", stmt_cons_ua
, 8 },
5405 { "data16.ua", stmt_cons_ua
, 16 },
5406 { "real4.ua", float_cons
, 'f' },
5407 { "real8.ua", float_cons
, 'd' },
5408 { "real10.ua", float_cons
, 'x' },
5409 { "real16.ua", float_cons
, 'X' },
5412 /* Declare a register by creating a symbol for it and entering it in
5413 the symbol table. */
5416 declare_register (name
, regnum
)
5423 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
5425 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5427 as_fatal ("Inserting \"%s\" into register table failed: %s",
5434 declare_register_set (prefix
, num_regs
, base_regnum
)
5442 for (i
= 0; i
< num_regs
; ++i
)
5444 sprintf (name
, "%s%u", prefix
, i
);
5445 declare_register (name
, base_regnum
+ i
);
5450 operand_width (opnd
)
5451 enum ia64_opnd opnd
;
5453 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5454 unsigned int bits
= 0;
5458 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5459 bits
+= odesc
->field
[i
].bits
;
5464 static enum operand_match_result
5465 operand_match (idesc
, index
, e
)
5466 const struct ia64_opcode
*idesc
;
5470 enum ia64_opnd opnd
= idesc
->operands
[index
];
5471 int bits
, relocatable
= 0;
5472 struct insn_fix
*fix
;
5479 case IA64_OPND_AR_CCV
:
5480 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5481 return OPERAND_MATCH
;
5484 case IA64_OPND_AR_CSD
:
5485 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5486 return OPERAND_MATCH
;
5489 case IA64_OPND_AR_PFS
:
5490 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5491 return OPERAND_MATCH
;
5495 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5496 return OPERAND_MATCH
;
5500 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5501 return OPERAND_MATCH
;
5505 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5506 return OPERAND_MATCH
;
5509 case IA64_OPND_PR_ROT
:
5510 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5511 return OPERAND_MATCH
;
5515 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5516 return OPERAND_MATCH
;
5519 case IA64_OPND_PSR_L
:
5520 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5521 return OPERAND_MATCH
;
5524 case IA64_OPND_PSR_UM
:
5525 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5526 return OPERAND_MATCH
;
5530 if (e
->X_op
== O_constant
)
5532 if (e
->X_add_number
== 1)
5533 return OPERAND_MATCH
;
5535 return OPERAND_OUT_OF_RANGE
;
5540 if (e
->X_op
== O_constant
)
5542 if (e
->X_add_number
== 8)
5543 return OPERAND_MATCH
;
5545 return OPERAND_OUT_OF_RANGE
;
5550 if (e
->X_op
== O_constant
)
5552 if (e
->X_add_number
== 16)
5553 return OPERAND_MATCH
;
5555 return OPERAND_OUT_OF_RANGE
;
5559 /* register operands: */
5562 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5563 && e
->X_add_number
< REG_AR
+ 128)
5564 return OPERAND_MATCH
;
5569 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5570 && e
->X_add_number
< REG_BR
+ 8)
5571 return OPERAND_MATCH
;
5575 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5576 && e
->X_add_number
< REG_CR
+ 128)
5577 return OPERAND_MATCH
;
5584 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5585 && e
->X_add_number
< REG_FR
+ 128)
5586 return OPERAND_MATCH
;
5591 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5592 && e
->X_add_number
< REG_P
+ 64)
5593 return OPERAND_MATCH
;
5599 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5600 && e
->X_add_number
< REG_GR
+ 128)
5601 return OPERAND_MATCH
;
5604 case IA64_OPND_R3_2
:
5605 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5607 if (e
->X_add_number
< REG_GR
+ 4)
5608 return OPERAND_MATCH
;
5609 else if (e
->X_add_number
< REG_GR
+ 128)
5610 return OPERAND_OUT_OF_RANGE
;
5614 /* indirect operands: */
5615 case IA64_OPND_CPUID_R3
:
5616 case IA64_OPND_DBR_R3
:
5617 case IA64_OPND_DTR_R3
:
5618 case IA64_OPND_ITR_R3
:
5619 case IA64_OPND_IBR_R3
:
5620 case IA64_OPND_MSR_R3
:
5621 case IA64_OPND_PKR_R3
:
5622 case IA64_OPND_PMC_R3
:
5623 case IA64_OPND_PMD_R3
:
5624 case IA64_OPND_RR_R3
:
5625 if (e
->X_op
== O_index
&& e
->X_op_symbol
5626 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5627 == opnd
- IA64_OPND_CPUID_R3
))
5628 return OPERAND_MATCH
;
5632 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5633 return OPERAND_MATCH
;
5636 /* immediate operands: */
5637 case IA64_OPND_CNT2a
:
5638 case IA64_OPND_LEN4
:
5639 case IA64_OPND_LEN6
:
5640 bits
= operand_width (idesc
->operands
[index
]);
5641 if (e
->X_op
== O_constant
)
5643 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5644 return OPERAND_MATCH
;
5646 return OPERAND_OUT_OF_RANGE
;
5650 case IA64_OPND_CNT2b
:
5651 if (e
->X_op
== O_constant
)
5653 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5654 return OPERAND_MATCH
;
5656 return OPERAND_OUT_OF_RANGE
;
5660 case IA64_OPND_CNT2c
:
5661 val
= e
->X_add_number
;
5662 if (e
->X_op
== O_constant
)
5664 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5665 return OPERAND_MATCH
;
5667 return OPERAND_OUT_OF_RANGE
;
5672 /* SOR must be an integer multiple of 8 */
5673 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5674 return OPERAND_OUT_OF_RANGE
;
5677 if (e
->X_op
== O_constant
)
5679 if ((bfd_vma
) e
->X_add_number
<= 96)
5680 return OPERAND_MATCH
;
5682 return OPERAND_OUT_OF_RANGE
;
5686 case IA64_OPND_IMMU62
:
5687 if (e
->X_op
== O_constant
)
5689 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5690 return OPERAND_MATCH
;
5692 return OPERAND_OUT_OF_RANGE
;
5696 /* FIXME -- need 62-bit relocation type */
5697 as_bad (_("62-bit relocation not yet implemented"));
5701 case IA64_OPND_IMMU64
:
5702 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5703 || e
->X_op
== O_subtract
)
5705 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5706 fix
->code
= BFD_RELOC_IA64_IMM64
;
5707 if (e
->X_op
!= O_subtract
)
5709 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5710 if (e
->X_op
== O_pseudo_fixup
)
5714 fix
->opnd
= idesc
->operands
[index
];
5717 ++CURR_SLOT
.num_fixups
;
5718 return OPERAND_MATCH
;
5720 else if (e
->X_op
== O_constant
)
5721 return OPERAND_MATCH
;
5724 case IA64_OPND_CCNT5
:
5725 case IA64_OPND_CNT5
:
5726 case IA64_OPND_CNT6
:
5727 case IA64_OPND_CPOS6a
:
5728 case IA64_OPND_CPOS6b
:
5729 case IA64_OPND_CPOS6c
:
5730 case IA64_OPND_IMMU2
:
5731 case IA64_OPND_IMMU7a
:
5732 case IA64_OPND_IMMU7b
:
5733 case IA64_OPND_IMMU21
:
5734 case IA64_OPND_IMMU24
:
5735 case IA64_OPND_MBTYPE4
:
5736 case IA64_OPND_MHTYPE8
:
5737 case IA64_OPND_POS6
:
5738 bits
= operand_width (idesc
->operands
[index
]);
5739 if (e
->X_op
== O_constant
)
5741 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5742 return OPERAND_MATCH
;
5744 return OPERAND_OUT_OF_RANGE
;
5748 case IA64_OPND_IMMU9
:
5749 bits
= operand_width (idesc
->operands
[index
]);
5750 if (e
->X_op
== O_constant
)
5752 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5754 int lobits
= e
->X_add_number
& 0x3;
5755 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5756 e
->X_add_number
|= (bfd_vma
) 0x3;
5757 return OPERAND_MATCH
;
5760 return OPERAND_OUT_OF_RANGE
;
5764 case IA64_OPND_IMM44
:
5765 /* least 16 bits must be zero */
5766 if ((e
->X_add_number
& 0xffff) != 0)
5767 /* XXX technically, this is wrong: we should not be issuing warning
5768 messages until we're sure this instruction pattern is going to
5770 as_warn (_("lower 16 bits of mask ignored"));
5772 if (e
->X_op
== O_constant
)
5774 if (((e
->X_add_number
>= 0
5775 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5776 || (e
->X_add_number
< 0
5777 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5780 if (e
->X_add_number
>= 0
5781 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5783 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5785 return OPERAND_MATCH
;
5788 return OPERAND_OUT_OF_RANGE
;
5792 case IA64_OPND_IMM17
:
5793 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5794 if (e
->X_op
== O_constant
)
5796 if (((e
->X_add_number
>= 0
5797 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5798 || (e
->X_add_number
< 0
5799 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5802 if (e
->X_add_number
>= 0
5803 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5805 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5807 return OPERAND_MATCH
;
5810 return OPERAND_OUT_OF_RANGE
;
5814 case IA64_OPND_IMM14
:
5815 case IA64_OPND_IMM22
:
5817 case IA64_OPND_IMM1
:
5818 case IA64_OPND_IMM8
:
5819 case IA64_OPND_IMM8U4
:
5820 case IA64_OPND_IMM8M1
:
5821 case IA64_OPND_IMM8M1U4
:
5822 case IA64_OPND_IMM8M1U8
:
5823 case IA64_OPND_IMM9a
:
5824 case IA64_OPND_IMM9b
:
5825 bits
= operand_width (idesc
->operands
[index
]);
5826 if (relocatable
&& (e
->X_op
== O_symbol
5827 || e
->X_op
== O_subtract
5828 || e
->X_op
== O_pseudo_fixup
))
5830 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5832 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5833 fix
->code
= BFD_RELOC_IA64_IMM14
;
5835 fix
->code
= BFD_RELOC_IA64_IMM22
;
5837 if (e
->X_op
!= O_subtract
)
5839 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5840 if (e
->X_op
== O_pseudo_fixup
)
5844 fix
->opnd
= idesc
->operands
[index
];
5847 ++CURR_SLOT
.num_fixups
;
5848 return OPERAND_MATCH
;
5850 else if (e
->X_op
!= O_constant
5851 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5852 return OPERAND_MISMATCH
;
5854 if (opnd
== IA64_OPND_IMM8M1U4
)
5856 /* Zero is not valid for unsigned compares that take an adjusted
5857 constant immediate range. */
5858 if (e
->X_add_number
== 0)
5859 return OPERAND_OUT_OF_RANGE
;
5861 /* Sign-extend 32-bit unsigned numbers, so that the following range
5862 checks will work. */
5863 val
= e
->X_add_number
;
5864 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5865 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5866 val
= ((val
<< 32) >> 32);
5868 /* Check for 0x100000000. This is valid because
5869 0x100000000-1 is the same as ((uint32_t) -1). */
5870 if (val
== ((bfd_signed_vma
) 1 << 32))
5871 return OPERAND_MATCH
;
5875 else if (opnd
== IA64_OPND_IMM8M1U8
)
5877 /* Zero is not valid for unsigned compares that take an adjusted
5878 constant immediate range. */
5879 if (e
->X_add_number
== 0)
5880 return OPERAND_OUT_OF_RANGE
;
5882 /* Check for 0x10000000000000000. */
5883 if (e
->X_op
== O_big
)
5885 if (generic_bignum
[0] == 0
5886 && generic_bignum
[1] == 0
5887 && generic_bignum
[2] == 0
5888 && generic_bignum
[3] == 0
5889 && generic_bignum
[4] == 1)
5890 return OPERAND_MATCH
;
5892 return OPERAND_OUT_OF_RANGE
;
5895 val
= e
->X_add_number
- 1;
5897 else if (opnd
== IA64_OPND_IMM8M1
)
5898 val
= e
->X_add_number
- 1;
5899 else if (opnd
== IA64_OPND_IMM8U4
)
5901 /* Sign-extend 32-bit unsigned numbers, so that the following range
5902 checks will work. */
5903 val
= e
->X_add_number
;
5904 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5905 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5906 val
= ((val
<< 32) >> 32);
5909 val
= e
->X_add_number
;
5911 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5912 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5913 return OPERAND_MATCH
;
5915 return OPERAND_OUT_OF_RANGE
;
5917 case IA64_OPND_INC3
:
5918 /* +/- 1, 4, 8, 16 */
5919 val
= e
->X_add_number
;
5922 if (e
->X_op
== O_constant
)
5924 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5925 return OPERAND_MATCH
;
5927 return OPERAND_OUT_OF_RANGE
;
5931 case IA64_OPND_TGT25
:
5932 case IA64_OPND_TGT25b
:
5933 case IA64_OPND_TGT25c
:
5934 case IA64_OPND_TGT64
:
5935 if (e
->X_op
== O_symbol
)
5937 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5938 if (opnd
== IA64_OPND_TGT25
)
5939 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5940 else if (opnd
== IA64_OPND_TGT25b
)
5941 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5942 else if (opnd
== IA64_OPND_TGT25c
)
5943 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5944 else if (opnd
== IA64_OPND_TGT64
)
5945 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5949 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5950 fix
->opnd
= idesc
->operands
[index
];
5953 ++CURR_SLOT
.num_fixups
;
5954 return OPERAND_MATCH
;
5956 case IA64_OPND_TAG13
:
5957 case IA64_OPND_TAG13b
:
5961 return OPERAND_MATCH
;
5964 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5965 /* There are no external relocs for TAG13/TAG13b fields, so we
5966 create a dummy reloc. This will not live past md_apply_fix3. */
5967 fix
->code
= BFD_RELOC_UNUSED
;
5968 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5969 fix
->opnd
= idesc
->operands
[index
];
5972 ++CURR_SLOT
.num_fixups
;
5973 return OPERAND_MATCH
;
5980 case IA64_OPND_LDXMOV
:
5981 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5982 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5983 fix
->opnd
= idesc
->operands
[index
];
5986 ++CURR_SLOT
.num_fixups
;
5987 return OPERAND_MATCH
;
5992 return OPERAND_MISMATCH
;
6001 memset (e
, 0, sizeof (*e
));
6004 if (*input_line_pointer
!= '}')
6006 sep
= *input_line_pointer
++;
6010 if (!md
.manual_bundling
)
6011 as_warn ("Found '}' when manual bundling is off");
6013 CURR_SLOT
.manual_bundling_off
= 1;
6014 md
.manual_bundling
= 0;
6020 /* Returns the next entry in the opcode table that matches the one in
6021 IDESC, and frees the entry in IDESC. If no matching entry is
6022 found, NULL is returned instead. */
6024 static struct ia64_opcode
*
6025 get_next_opcode (struct ia64_opcode
*idesc
)
6027 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6028 ia64_free_opcode (idesc
);
6032 /* Parse the operands for the opcode and find the opcode variant that
6033 matches the specified operands, or NULL if no match is possible. */
6035 static struct ia64_opcode
*
6036 parse_operands (idesc
)
6037 struct ia64_opcode
*idesc
;
6039 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6040 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6043 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6044 enum operand_match_result result
;
6046 char *first_arg
= 0, *end
, *saved_input_pointer
;
6049 assert (strlen (idesc
->name
) <= 128);
6051 strcpy (mnemonic
, idesc
->name
);
6052 if (idesc
->operands
[2] == IA64_OPND_SOF
6053 || idesc
->operands
[1] == IA64_OPND_SOF
)
6055 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6056 can't parse the first operand until we have parsed the
6057 remaining operands of the "alloc" instruction. */
6059 first_arg
= input_line_pointer
;
6060 end
= strchr (input_line_pointer
, '=');
6063 as_bad ("Expected separator `='");
6066 input_line_pointer
= end
+ 1;
6073 if (i
< NELEMS (CURR_SLOT
.opnd
))
6075 sep
= parse_operand (CURR_SLOT
.opnd
+ i
);
6076 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6083 sep
= parse_operand (&dummy
);
6084 if (dummy
.X_op
== O_absent
)
6090 if (sep
!= '=' && sep
!= ',')
6095 if (num_outputs
> 0)
6096 as_bad ("Duplicate equal sign (=) in instruction");
6098 num_outputs
= i
+ 1;
6103 as_bad ("Illegal operand separator `%c'", sep
);
6107 if (idesc
->operands
[2] == IA64_OPND_SOF
6108 || idesc
->operands
[1] == IA64_OPND_SOF
)
6110 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6111 know (strcmp (idesc
->name
, "alloc") == 0);
6112 i
= (CURR_SLOT
.opnd
[1].X_op
== O_register
6113 && CURR_SLOT
.opnd
[1].X_add_number
== REG_AR
+ AR_PFS
) ? 2 : 1;
6114 if (num_operands
== i
+ 3 /* first_arg not included in this count! */
6115 && CURR_SLOT
.opnd
[i
].X_op
== O_constant
6116 && CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6117 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
6118 && CURR_SLOT
.opnd
[i
+ 3].X_op
== O_constant
)
6120 sof
= set_regstack (CURR_SLOT
.opnd
[i
].X_add_number
,
6121 CURR_SLOT
.opnd
[i
+ 1].X_add_number
,
6122 CURR_SLOT
.opnd
[i
+ 2].X_add_number
,
6123 CURR_SLOT
.opnd
[i
+ 3].X_add_number
);
6125 /* now we can parse the first arg: */
6126 saved_input_pointer
= input_line_pointer
;
6127 input_line_pointer
= first_arg
;
6128 sep
= parse_operand (CURR_SLOT
.opnd
+ 0);
6130 --num_outputs
; /* force error */
6131 input_line_pointer
= saved_input_pointer
;
6133 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6134 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6135 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6136 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6140 highest_unmatched_operand
= -4;
6141 curr_out_of_range_pos
= -1;
6143 for (; idesc
; idesc
= get_next_opcode (idesc
))
6145 if (num_outputs
!= idesc
->num_outputs
)
6146 continue; /* mismatch in # of outputs */
6147 if (highest_unmatched_operand
< 0)
6148 highest_unmatched_operand
|= 1;
6149 if (num_operands
> NELEMS (idesc
->operands
)
6150 || (num_operands
< NELEMS (idesc
->operands
)
6151 && idesc
->operands
[num_operands
])
6152 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6153 continue; /* mismatch in number of arguments */
6154 if (highest_unmatched_operand
< 0)
6155 highest_unmatched_operand
|= 2;
6157 CURR_SLOT
.num_fixups
= 0;
6159 /* Try to match all operands. If we see an out-of-range operand,
6160 then continue trying to match the rest of the operands, since if
6161 the rest match, then this idesc will give the best error message. */
6163 out_of_range_pos
= -1;
6164 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6166 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6167 if (result
!= OPERAND_MATCH
)
6169 if (result
!= OPERAND_OUT_OF_RANGE
)
6171 if (out_of_range_pos
< 0)
6172 /* remember position of the first out-of-range operand: */
6173 out_of_range_pos
= i
;
6177 /* If we did not match all operands, or if at least one operand was
6178 out-of-range, then this idesc does not match. Keep track of which
6179 idesc matched the most operands before failing. If we have two
6180 idescs that failed at the same position, and one had an out-of-range
6181 operand, then prefer the out-of-range operand. Thus if we have
6182 "add r0=0x1000000,r1" we get an error saying the constant is out
6183 of range instead of an error saying that the constant should have been
6186 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6188 if (i
> highest_unmatched_operand
6189 || (i
== highest_unmatched_operand
6190 && out_of_range_pos
> curr_out_of_range_pos
))
6192 highest_unmatched_operand
= i
;
6193 if (out_of_range_pos
>= 0)
6195 expected_operand
= idesc
->operands
[out_of_range_pos
];
6196 error_pos
= out_of_range_pos
;
6200 expected_operand
= idesc
->operands
[i
];
6203 curr_out_of_range_pos
= out_of_range_pos
;
6212 if (expected_operand
)
6213 as_bad ("Operand %u of `%s' should be %s",
6214 error_pos
+ 1, mnemonic
,
6215 elf64_ia64_operands
[expected_operand
].desc
);
6216 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6217 as_bad ("Wrong number of output operands");
6218 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6219 as_bad ("Wrong number of input operands");
6221 as_bad ("Operand mismatch");
6225 /* Check that the instruction doesn't use
6226 - r0, f0, or f1 as output operands
6227 - the same predicate twice as output operands
6228 - r0 as address of a base update load or store
6229 - the same GR as output and address of a base update load
6230 - two even- or two odd-numbered FRs as output operands of a floating
6231 point parallel load.
6232 At most two (conflicting) output (or output-like) operands can exist,
6233 (floating point parallel loads have three outputs, but the base register,
6234 if updated, cannot conflict with the actual outputs). */
6236 for (i
= 0; i
< num_operands
; ++i
)
6241 switch (idesc
->operands
[i
])
6246 if (i
< num_outputs
)
6248 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6251 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6253 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6258 if (i
< num_outputs
)
6261 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6263 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6270 if (i
< num_outputs
)
6272 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6273 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6276 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6279 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6281 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6285 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6287 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6290 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6292 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6303 as_warn ("Invalid use of `%c%d' as output operand", reg_class
, regno
);
6306 as_warn ("Invalid use of `r%d' as base update address operand", regno
);
6312 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6317 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6322 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6330 as_warn ("Invalid duplicate use of `%c%d'", reg_class
, reg1
);
6332 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6333 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6334 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6335 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6336 && ! ((reg1
^ reg2
) & 1))
6337 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6338 reg1
- REG_FR
, reg2
- REG_FR
);
6339 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6340 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6341 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6342 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6343 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6344 reg1
- REG_FR
, reg2
- REG_FR
);
6349 build_insn (slot
, insnp
)
6353 const struct ia64_operand
*odesc
, *o2desc
;
6354 struct ia64_opcode
*idesc
= slot
->idesc
;
6360 insn
= idesc
->opcode
| slot
->qp_regno
;
6362 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6364 if (slot
->opnd
[i
].X_op
== O_register
6365 || slot
->opnd
[i
].X_op
== O_constant
6366 || slot
->opnd
[i
].X_op
== O_index
)
6367 val
= slot
->opnd
[i
].X_add_number
;
6368 else if (slot
->opnd
[i
].X_op
== O_big
)
6370 /* This must be the value 0x10000000000000000. */
6371 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6377 switch (idesc
->operands
[i
])
6379 case IA64_OPND_IMMU64
:
6380 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6381 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6382 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6383 | (((val
>> 63) & 0x1) << 36));
6386 case IA64_OPND_IMMU62
:
6387 val
&= 0x3fffffffffffffffULL
;
6388 if (val
!= slot
->opnd
[i
].X_add_number
)
6389 as_warn (_("Value truncated to 62 bits"));
6390 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6391 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6394 case IA64_OPND_TGT64
:
6396 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6397 insn
|= ((((val
>> 59) & 0x1) << 36)
6398 | (((val
>> 0) & 0xfffff) << 13));
6429 case IA64_OPND_R3_2
:
6430 case IA64_OPND_CPUID_R3
:
6431 case IA64_OPND_DBR_R3
:
6432 case IA64_OPND_DTR_R3
:
6433 case IA64_OPND_ITR_R3
:
6434 case IA64_OPND_IBR_R3
:
6436 case IA64_OPND_MSR_R3
:
6437 case IA64_OPND_PKR_R3
:
6438 case IA64_OPND_PMC_R3
:
6439 case IA64_OPND_PMD_R3
:
6440 case IA64_OPND_RR_R3
:
6448 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6449 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6451 as_bad_where (slot
->src_file
, slot
->src_line
,
6452 "Bad operand value: %s", err
);
6453 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6455 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6456 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6458 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6459 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6461 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6462 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6463 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6465 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6466 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6476 int manual_bundling_off
= 0, manual_bundling
= 0;
6477 enum ia64_unit required_unit
, insn_unit
= 0;
6478 enum ia64_insn_type type
[3], insn_type
;
6479 unsigned int template, orig_template
;
6480 bfd_vma insn
[3] = { -1, -1, -1 };
6481 struct ia64_opcode
*idesc
;
6482 int end_of_insn_group
= 0, user_template
= -1;
6483 int n
, i
, j
, first
, curr
, last_slot
;
6484 unw_rec_list
*ptr
, *last_ptr
, *end_ptr
;
6485 bfd_vma t0
= 0, t1
= 0;
6486 struct label_fix
*lfix
;
6487 struct insn_fix
*ifix
;
6493 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6494 know (first
>= 0 & first
< NUM_SLOTS
);
6495 n
= MIN (3, md
.num_slots_in_use
);
6497 /* Determine template: user user_template if specified, best match
6500 if (md
.slot
[first
].user_template
>= 0)
6501 user_template
= template = md
.slot
[first
].user_template
;
6504 /* Auto select appropriate template. */
6505 memset (type
, 0, sizeof (type
));
6507 for (i
= 0; i
< n
; ++i
)
6509 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6511 type
[i
] = md
.slot
[curr
].idesc
->type
;
6512 curr
= (curr
+ 1) % NUM_SLOTS
;
6514 template = best_template
[type
[0]][type
[1]][type
[2]];
6517 /* initialize instructions with appropriate nops: */
6518 for (i
= 0; i
< 3; ++i
)
6519 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6523 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6524 from the start of the frag. */
6525 addr_mod
= frag_now_fix () & 15;
6526 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6527 as_bad (_("instruction address is not a multiple of 16"));
6528 frag_now
->insn_addr
= addr_mod
;
6529 frag_now
->has_code
= 1;
6531 /* now fill in slots with as many insns as possible: */
6533 idesc
= md
.slot
[curr
].idesc
;
6534 end_of_insn_group
= 0;
6536 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6538 /* If we have unwind records, we may need to update some now. */
6539 ptr
= md
.slot
[curr
].unwind_record
;
6542 /* Find the last prologue/body record in the list for the current
6543 insn, and set the slot number for all records up to that point.
6544 This needs to be done now, because prologue/body records refer to
6545 the current point, not the point after the instruction has been
6546 issued. This matters because there may have been nops emitted
6547 meanwhile. Any non-prologue non-body record followed by a
6548 prologue/body record must also refer to the current point. */
6550 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6551 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6552 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6553 || ptr
->r
.type
== body
)
6557 /* Make last_ptr point one after the last prologue/body
6559 last_ptr
= last_ptr
->next
;
6560 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6563 ptr
->slot_number
= (unsigned long) f
+ i
;
6564 ptr
->slot_frag
= frag_now
;
6566 /* Remove the initialized records, so that we won't accidentally
6567 update them again if we insert a nop and continue. */
6568 md
.slot
[curr
].unwind_record
= last_ptr
;
6572 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6573 if (md
.slot
[curr
].manual_bundling_on
)
6576 manual_bundling
= 1;
6578 break; /* Need to start a new bundle. */
6581 /* If this instruction specifies a template, then it must be the first
6582 instruction of a bundle. */
6583 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6586 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6588 if (manual_bundling
&& !manual_bundling_off
)
6590 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6591 "`%s' must be last in bundle", idesc
->name
);
6593 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6597 if (idesc
->flags
& IA64_OPCODE_LAST
)
6600 unsigned int required_template
;
6602 /* If we need a stop bit after an M slot, our only choice is
6603 template 5 (M;;MI). If we need a stop bit after a B
6604 slot, our only choice is to place it at the end of the
6605 bundle, because the only available templates are MIB,
6606 MBB, BBB, MMB, and MFB. We don't handle anything other
6607 than M and B slots because these are the only kind of
6608 instructions that can have the IA64_OPCODE_LAST bit set. */
6609 required_template
= template;
6610 switch (idesc
->type
)
6614 required_template
= 5;
6622 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6623 "Internal error: don't know how to force %s to end"
6624 "of instruction group", idesc
->name
);
6629 && (i
> required_slot
6630 || (required_slot
== 2 && !manual_bundling_off
)
6631 || (user_template
>= 0
6632 /* Changing from MMI to M;MI is OK. */
6633 && (template ^ required_template
) > 1)))
6635 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6636 "`%s' must be last in instruction group",
6638 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6639 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6641 if (required_slot
< i
)
6642 /* Can't fit this instruction. */
6646 if (required_template
!= template)
6648 /* If we switch the template, we need to reset the NOPs
6649 after slot i. The slot-types of the instructions ahead
6650 of i never change, so we don't need to worry about
6651 changing NOPs in front of this slot. */
6652 for (j
= i
; j
< 3; ++j
)
6653 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6655 template = required_template
;
6657 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6659 if (manual_bundling
)
6661 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6662 "Label must be first in a bundle");
6663 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6665 /* This insn must go into the first slot of a bundle. */
6669 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6671 /* We need an instruction group boundary in the middle of a
6672 bundle. See if we can switch to an other template with
6673 an appropriate boundary. */
6675 orig_template
= template;
6676 if (i
== 1 && (user_template
== 4
6677 || (user_template
< 0
6678 && (ia64_templ_desc
[template].exec_unit
[0]
6682 end_of_insn_group
= 0;
6684 else if (i
== 2 && (user_template
== 0
6685 || (user_template
< 0
6686 && (ia64_templ_desc
[template].exec_unit
[1]
6688 /* This test makes sure we don't switch the template if
6689 the next instruction is one that needs to be first in
6690 an instruction group. Since all those instructions are
6691 in the M group, there is no way such an instruction can
6692 fit in this bundle even if we switch the template. The
6693 reason we have to check for this is that otherwise we
6694 may end up generating "MI;;I M.." which has the deadly
6695 effect that the second M instruction is no longer the
6696 first in the group! --davidm 99/12/16 */
6697 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6700 end_of_insn_group
= 0;
6703 && user_template
== 0
6704 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6705 /* Use the next slot. */
6707 else if (curr
!= first
)
6708 /* can't fit this insn */
6711 if (template != orig_template
)
6712 /* if we switch the template, we need to reset the NOPs
6713 after slot i. The slot-types of the instructions ahead
6714 of i never change, so we don't need to worry about
6715 changing NOPs in front of this slot. */
6716 for (j
= i
; j
< 3; ++j
)
6717 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6719 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6721 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6722 if (idesc
->type
== IA64_TYPE_DYN
)
6724 enum ia64_opnd opnd1
, opnd2
;
6726 if ((strcmp (idesc
->name
, "nop") == 0)
6727 || (strcmp (idesc
->name
, "break") == 0))
6728 insn_unit
= required_unit
;
6729 else if (strcmp (idesc
->name
, "hint") == 0)
6731 insn_unit
= required_unit
;
6732 if (required_unit
== IA64_UNIT_B
)
6738 case hint_b_warning
:
6739 as_warn ("hint in B unit may be treated as nop");
6742 /* When manual bundling is off and there is no
6743 user template, we choose a different unit so
6744 that hint won't go into the current slot. We
6745 will fill the current bundle with nops and
6746 try to put hint into the next bundle. */
6747 if (!manual_bundling
&& user_template
< 0)
6748 insn_unit
= IA64_UNIT_I
;
6750 as_bad ("hint in B unit can't be used");
6755 else if (strcmp (idesc
->name
, "chk.s") == 0
6756 || strcmp (idesc
->name
, "mov") == 0)
6758 insn_unit
= IA64_UNIT_M
;
6759 if (required_unit
== IA64_UNIT_I
6760 || (required_unit
== IA64_UNIT_F
&& template == 6))
6761 insn_unit
= IA64_UNIT_I
;
6764 as_fatal ("emit_one_bundle: unexpected dynamic op");
6766 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbfxx"[insn_unit
]);
6767 opnd1
= idesc
->operands
[0];
6768 opnd2
= idesc
->operands
[1];
6769 ia64_free_opcode (idesc
);
6770 idesc
= ia64_find_opcode (mnemonic
);
6771 /* moves to/from ARs have collisions */
6772 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6774 while (idesc
!= NULL
6775 && (idesc
->operands
[0] != opnd1
6776 || idesc
->operands
[1] != opnd2
))
6777 idesc
= get_next_opcode (idesc
);
6779 md
.slot
[curr
].idesc
= idesc
;
6783 insn_type
= idesc
->type
;
6784 insn_unit
= IA64_UNIT_NIL
;
6788 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6789 insn_unit
= required_unit
;
6791 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6792 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6793 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6794 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6795 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6800 if (insn_unit
!= required_unit
)
6801 continue; /* Try next slot. */
6803 if (debug_type
== DEBUG_DWARF2
|| md
.slot
[curr
].loc_directive_seen
)
6805 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6807 md
.slot
[curr
].loc_directive_seen
= 0;
6808 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6811 build_insn (md
.slot
+ curr
, insn
+ i
);
6813 ptr
= md
.slot
[curr
].unwind_record
;
6816 /* Set slot numbers for all remaining unwind records belonging to the
6817 current insn. There can not be any prologue/body unwind records
6819 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6820 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6822 ptr
->slot_number
= (unsigned long) f
+ i
;
6823 ptr
->slot_frag
= frag_now
;
6825 md
.slot
[curr
].unwind_record
= NULL
;
6828 if (required_unit
== IA64_UNIT_L
)
6831 /* skip one slot for long/X-unit instructions */
6834 --md
.num_slots_in_use
;
6837 /* now is a good time to fix up the labels for this insn: */
6838 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6840 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6841 symbol_set_frag (lfix
->sym
, frag_now
);
6843 /* and fix up the tags also. */
6844 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6846 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6847 symbol_set_frag (lfix
->sym
, frag_now
);
6850 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6852 ifix
= md
.slot
[curr
].fixup
+ j
;
6853 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6854 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6855 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6856 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6857 fix
->fx_file
= md
.slot
[curr
].src_file
;
6858 fix
->fx_line
= md
.slot
[curr
].src_line
;
6861 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6864 ia64_free_opcode (md
.slot
[curr
].idesc
);
6865 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6866 md
.slot
[curr
].user_template
= -1;
6868 if (manual_bundling_off
)
6870 manual_bundling
= 0;
6873 curr
= (curr
+ 1) % NUM_SLOTS
;
6874 idesc
= md
.slot
[curr
].idesc
;
6876 if (manual_bundling
> 0)
6878 if (md
.num_slots_in_use
> 0)
6881 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6882 "`%s' does not fit into bundle", idesc
->name
);
6883 else if (last_slot
< 0)
6885 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6886 "`%s' does not fit into %s template",
6887 idesc
->name
, ia64_templ_desc
[template].name
);
6888 /* Drop first insn so we don't livelock. */
6889 --md
.num_slots_in_use
;
6890 know (curr
== first
);
6891 ia64_free_opcode (md
.slot
[curr
].idesc
);
6892 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6893 md
.slot
[curr
].user_template
= -1;
6901 else if (last_slot
== 0)
6902 where
= "slots 2 or 3";
6905 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6906 "`%s' can't go in %s of %s template",
6907 idesc
->name
, where
, ia64_templ_desc
[template].name
);
6911 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6912 "Missing '}' at end of file");
6914 know (md
.num_slots_in_use
< NUM_SLOTS
);
6916 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6917 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6919 number_to_chars_littleendian (f
+ 0, t0
, 8);
6920 number_to_chars_littleendian (f
+ 8, t1
, 8);
6924 md_parse_option (c
, arg
)
6931 /* Switches from the Intel assembler. */
6933 if (strcmp (arg
, "ilp64") == 0
6934 || strcmp (arg
, "lp64") == 0
6935 || strcmp (arg
, "p64") == 0)
6937 md
.flags
|= EF_IA_64_ABI64
;
6939 else if (strcmp (arg
, "ilp32") == 0)
6941 md
.flags
&= ~EF_IA_64_ABI64
;
6943 else if (strcmp (arg
, "le") == 0)
6945 md
.flags
&= ~EF_IA_64_BE
;
6946 default_big_endian
= 0;
6948 else if (strcmp (arg
, "be") == 0)
6950 md
.flags
|= EF_IA_64_BE
;
6951 default_big_endian
= 1;
6953 else if (strncmp (arg
, "unwind-check=", 13) == 0)
6956 if (strcmp (arg
, "warning") == 0)
6957 md
.unwind_check
= unwind_check_warning
;
6958 else if (strcmp (arg
, "error") == 0)
6959 md
.unwind_check
= unwind_check_error
;
6963 else if (strncmp (arg
, "hint.b=", 7) == 0)
6966 if (strcmp (arg
, "ok") == 0)
6967 md
.hint_b
= hint_b_ok
;
6968 else if (strcmp (arg
, "warning") == 0)
6969 md
.hint_b
= hint_b_warning
;
6970 else if (strcmp (arg
, "error") == 0)
6971 md
.hint_b
= hint_b_error
;
6975 else if (strncmp (arg
, "tune=", 5) == 0)
6978 if (strcmp (arg
, "itanium1") == 0)
6980 else if (strcmp (arg
, "itanium2") == 0)
6990 if (strcmp (arg
, "so") == 0)
6992 /* Suppress signon message. */
6994 else if (strcmp (arg
, "pi") == 0)
6996 /* Reject privileged instructions. FIXME */
6998 else if (strcmp (arg
, "us") == 0)
7000 /* Allow union of signed and unsigned range. FIXME */
7002 else if (strcmp (arg
, "close_fcalls") == 0)
7004 /* Do not resolve global function calls. */
7011 /* temp[="prefix"] Insert temporary labels into the object file
7012 symbol table prefixed by "prefix".
7013 Default prefix is ":temp:".
7018 /* indirect=<tgt> Assume unannotated indirect branches behavior
7019 according to <tgt> --
7020 exit: branch out from the current context (default)
7021 labels: all labels in context may be branch targets
7023 if (strncmp (arg
, "indirect=", 9) != 0)
7028 /* -X conflicts with an ignored option, use -x instead */
7030 if (!arg
|| strcmp (arg
, "explicit") == 0)
7032 /* set default mode to explicit */
7033 md
.default_explicit_mode
= 1;
7036 else if (strcmp (arg
, "auto") == 0)
7038 md
.default_explicit_mode
= 0;
7040 else if (strcmp (arg
, "none") == 0)
7044 else if (strcmp (arg
, "debug") == 0)
7048 else if (strcmp (arg
, "debugx") == 0)
7050 md
.default_explicit_mode
= 1;
7053 else if (strcmp (arg
, "debugn") == 0)
7060 as_bad (_("Unrecognized option '-x%s'"), arg
);
7065 /* nops Print nops statistics. */
7068 /* GNU specific switches for gcc. */
7069 case OPTION_MCONSTANT_GP
:
7070 md
.flags
|= EF_IA_64_CONS_GP
;
7073 case OPTION_MAUTO_PIC
:
7074 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7085 md_show_usage (stream
)
7090 --mconstant-gp mark output file as using the constant-GP model\n\
7091 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7092 --mauto-pic mark output file as using the constant-GP model\n\
7093 without function descriptors (sets ELF header flag\n\
7094 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7095 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7096 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7097 -mtune=[itanium1|itanium2]\n\
7098 tune for a specific CPU (default -mtune=itanium2)\n\
7099 -munwind-check=[warning|error]\n\
7100 unwind directive check (default -munwind-check=warning)\n\
7101 -mhint.b=[ok|warning|error]\n\
7102 hint.b check (default -mhint.b=error)\n\
7103 -x | -xexplicit turn on dependency violation checking\n\
7104 -xauto automagically remove dependency violations (default)\n\
7105 -xnone turn off dependency violation checking\n\
7106 -xdebug debug dependency violation checker\n\
7107 -xdebugn debug dependency violation checker but turn off\n\
7108 dependency violation checking\n\
7109 -xdebugx debug dependency violation checker and turn on\n\
7110 dependency violation checking\n"),
7115 ia64_after_parse_args ()
7117 if (debug_type
== DEBUG_STABS
)
7118 as_fatal (_("--gstabs is not supported for ia64"));
7121 /* Return true if TYPE fits in TEMPL at SLOT. */
7124 match (int templ
, int type
, int slot
)
7126 enum ia64_unit unit
;
7129 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7132 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7134 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7136 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7137 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7138 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7139 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7140 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7141 default: result
= 0; break;
7146 /* Add a bit of extra goodness if a nop of type F or B would fit
7147 in TEMPL at SLOT. */
7150 extra_goodness (int templ
, int slot
)
7155 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7157 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7163 if (match (templ
, IA64_TYPE_M
, slot
)
7164 || match (templ
, IA64_TYPE_I
, slot
))
7165 /* Favor M- and I-unit NOPs. We definitely want to avoid
7166 F-unit and B-unit may cause split-issue or less-than-optimal
7167 branch-prediction. */
7178 /* This function is called once, at assembler startup time. It sets
7179 up all the tables, etc. that the MD part of the assembler will need
7180 that can be determined before arguments are parsed. */
7184 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
7189 md
.explicit_mode
= md
.default_explicit_mode
;
7191 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7193 /* Make sure function pointers get initialized. */
7194 target_big_endian
= -1;
7195 dot_byteorder (default_big_endian
);
7197 alias_hash
= hash_new ();
7198 alias_name_hash
= hash_new ();
7199 secalias_hash
= hash_new ();
7200 secalias_name_hash
= hash_new ();
7202 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7203 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7204 &zero_address_frag
);
7206 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7207 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7208 &zero_address_frag
);
7210 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7211 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7212 &zero_address_frag
);
7214 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7215 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7216 &zero_address_frag
);
7218 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7219 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7220 &zero_address_frag
);
7222 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7223 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7224 &zero_address_frag
);
7226 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7227 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7228 &zero_address_frag
);
7230 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7231 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7232 &zero_address_frag
);
7234 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7235 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7236 &zero_address_frag
);
7238 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7239 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7240 &zero_address_frag
);
7242 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7243 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7244 &zero_address_frag
);
7246 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7247 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7248 &zero_address_frag
);
7250 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7251 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7252 &zero_address_frag
);
7254 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7255 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7256 &zero_address_frag
);
7258 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7259 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7260 &zero_address_frag
);
7262 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7263 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7264 &zero_address_frag
);
7266 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7267 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7268 &zero_address_frag
);
7270 if (md
.tune
!= itanium1
)
7272 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7274 le_nop_stop
[0] = 0x9;
7277 /* Compute the table of best templates. We compute goodness as a
7278 base 4 value, in which each match counts for 3. Match-failures
7279 result in NOPs and we use extra_goodness() to pick the execution
7280 units that are best suited for issuing the NOP. */
7281 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7282 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7283 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7286 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7289 if (match (t
, i
, 0))
7291 if (match (t
, j
, 1))
7293 if (match (t
, k
, 2))
7294 goodness
= 3 + 3 + 3;
7296 goodness
= 3 + 3 + extra_goodness (t
, 2);
7298 else if (match (t
, j
, 2))
7299 goodness
= 3 + 3 + extra_goodness (t
, 1);
7303 goodness
+= extra_goodness (t
, 1);
7304 goodness
+= extra_goodness (t
, 2);
7307 else if (match (t
, i
, 1))
7309 if (match (t
, j
, 2))
7312 goodness
= 3 + extra_goodness (t
, 2);
7314 else if (match (t
, i
, 2))
7315 goodness
= 3 + extra_goodness (t
, 1);
7317 if (goodness
> best
)
7320 best_template
[i
][j
][k
] = t
;
7325 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7326 md
.slot
[i
].user_template
= -1;
7328 md
.pseudo_hash
= hash_new ();
7329 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7331 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7332 (void *) (pseudo_opcode
+ i
));
7334 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7335 pseudo_opcode
[i
].name
, err
);
7338 md
.reg_hash
= hash_new ();
7339 md
.dynreg_hash
= hash_new ();
7340 md
.const_hash
= hash_new ();
7341 md
.entry_hash
= hash_new ();
7343 /* general registers: */
7346 for (i
= 0; i
< total
; ++i
)
7348 sprintf (name
, "r%d", i
- REG_GR
);
7349 md
.regsym
[i
] = declare_register (name
, i
);
7352 /* floating point registers: */
7354 for (; i
< total
; ++i
)
7356 sprintf (name
, "f%d", i
- REG_FR
);
7357 md
.regsym
[i
] = declare_register (name
, i
);
7360 /* application registers: */
7363 for (; i
< total
; ++i
)
7365 sprintf (name
, "ar%d", i
- REG_AR
);
7366 md
.regsym
[i
] = declare_register (name
, i
);
7369 /* control registers: */
7372 for (; i
< total
; ++i
)
7374 sprintf (name
, "cr%d", i
- REG_CR
);
7375 md
.regsym
[i
] = declare_register (name
, i
);
7378 /* predicate registers: */
7380 for (; i
< total
; ++i
)
7382 sprintf (name
, "p%d", i
- REG_P
);
7383 md
.regsym
[i
] = declare_register (name
, i
);
7386 /* branch registers: */
7388 for (; i
< total
; ++i
)
7390 sprintf (name
, "b%d", i
- REG_BR
);
7391 md
.regsym
[i
] = declare_register (name
, i
);
7394 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
7395 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
7396 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
7397 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
7398 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
7399 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
7400 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
7402 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7404 regnum
= indirect_reg
[i
].regnum
;
7405 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
7408 /* define synonyms for application registers: */
7409 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
7410 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
7411 REG_AR
+ ar
[i
- REG_AR
].regnum
);
7413 /* define synonyms for control registers: */
7414 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
7415 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
7416 REG_CR
+ cr
[i
- REG_CR
].regnum
);
7418 declare_register ("gp", REG_GR
+ 1);
7419 declare_register ("sp", REG_GR
+ 12);
7420 declare_register ("rp", REG_BR
+ 0);
7422 /* pseudo-registers used to specify unwind info: */
7423 declare_register ("psp", REG_PSP
);
7425 declare_register_set ("ret", 4, REG_GR
+ 8);
7426 declare_register_set ("farg", 8, REG_FR
+ 8);
7427 declare_register_set ("fret", 8, REG_FR
+ 8);
7429 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7431 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7432 (PTR
) (const_bits
+ i
));
7434 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7438 /* Set the architecture and machine depending on defaults and command line
7440 if (md
.flags
& EF_IA_64_ABI64
)
7441 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7443 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7446 as_warn (_("Could not set architecture and machine"));
7448 /* Set the pointer size and pointer shift size depending on md.flags */
7450 if (md
.flags
& EF_IA_64_ABI64
)
7452 md
.pointer_size
= 8; /* pointers are 8 bytes */
7453 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7457 md
.pointer_size
= 4; /* pointers are 4 bytes */
7458 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7461 md
.mem_offset
.hint
= 0;
7464 md
.entry_labels
= NULL
;
7467 /* Set the default options in md. Cannot do this in md_begin because
7468 that is called after md_parse_option which is where we set the
7469 options in md based on command line options. */
7472 ia64_init (argc
, argv
)
7473 int argc ATTRIBUTE_UNUSED
;
7474 char **argv ATTRIBUTE_UNUSED
;
7476 md
.flags
= MD_FLAGS_DEFAULT
;
7478 /* FIXME: We should change it to unwind_check_error someday. */
7479 md
.unwind_check
= unwind_check_warning
;
7480 md
.hint_b
= hint_b_error
;
7484 /* Return a string for the target object file format. */
7487 ia64_target_format ()
7489 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7491 if (md
.flags
& EF_IA_64_BE
)
7493 if (md
.flags
& EF_IA_64_ABI64
)
7494 #if defined(TE_AIX50)
7495 return "elf64-ia64-aix-big";
7496 #elif defined(TE_HPUX)
7497 return "elf64-ia64-hpux-big";
7499 return "elf64-ia64-big";
7502 #if defined(TE_AIX50)
7503 return "elf32-ia64-aix-big";
7504 #elif defined(TE_HPUX)
7505 return "elf32-ia64-hpux-big";
7507 return "elf32-ia64-big";
7512 if (md
.flags
& EF_IA_64_ABI64
)
7514 return "elf64-ia64-aix-little";
7516 return "elf64-ia64-little";
7520 return "elf32-ia64-aix-little";
7522 return "elf32-ia64-little";
7527 return "unknown-format";
7531 ia64_end_of_source ()
7533 /* terminate insn group upon reaching end of file: */
7534 insn_group_break (1, 0, 0);
7536 /* emits slots we haven't written yet: */
7537 ia64_flush_insns ();
7539 bfd_set_private_flags (stdoutput
, md
.flags
);
7541 md
.mem_offset
.hint
= 0;
7547 if (md
.qp
.X_op
== O_register
)
7548 as_bad ("qualifying predicate not followed by instruction");
7549 md
.qp
.X_op
= O_absent
;
7551 if (ignore_input ())
7554 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7556 if (md
.detect_dv
&& !md
.explicit_mode
)
7563 as_warn (_("Explicit stops are ignored in auto mode"));
7567 insn_group_break (1, 0, 0);
7571 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7573 static int defining_tag
= 0;
7576 ia64_unrecognized_line (ch
)
7582 expression (&md
.qp
);
7583 if (*input_line_pointer
++ != ')')
7585 as_bad ("Expected ')'");
7588 if (md
.qp
.X_op
!= O_register
)
7590 as_bad ("Qualifying predicate expected");
7593 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7595 as_bad ("Predicate register expected");
7601 if (md
.manual_bundling
)
7602 as_warn ("Found '{' when manual bundling is already turned on");
7604 CURR_SLOT
.manual_bundling_on
= 1;
7605 md
.manual_bundling
= 1;
7607 /* Bundling is only acceptable in explicit mode
7608 or when in default automatic mode. */
7609 if (md
.detect_dv
&& !md
.explicit_mode
)
7611 if (!md
.mode_explicitly_set
7612 && !md
.default_explicit_mode
)
7615 as_warn (_("Found '{' after explicit switch to automatic mode"));
7620 if (!md
.manual_bundling
)
7621 as_warn ("Found '}' when manual bundling is off");
7623 PREV_SLOT
.manual_bundling_off
= 1;
7624 md
.manual_bundling
= 0;
7626 /* switch back to automatic mode, if applicable */
7629 && !md
.mode_explicitly_set
7630 && !md
.default_explicit_mode
)
7633 /* Allow '{' to follow on the same line. We also allow ";;", but that
7634 happens automatically because ';' is an end of line marker. */
7636 if (input_line_pointer
[0] == '{')
7638 input_line_pointer
++;
7639 return ia64_unrecognized_line ('{');
7642 demand_empty_rest_of_line ();
7652 if (md
.qp
.X_op
== O_register
)
7654 as_bad ("Tag must come before qualifying predicate.");
7658 /* This implements just enough of read_a_source_file in read.c to
7659 recognize labels. */
7660 if (is_name_beginner (*input_line_pointer
))
7662 s
= input_line_pointer
;
7663 c
= get_symbol_end ();
7665 else if (LOCAL_LABELS_FB
7666 && ISDIGIT (*input_line_pointer
))
7669 while (ISDIGIT (*input_line_pointer
))
7670 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7671 fb_label_instance_inc (temp
);
7672 s
= fb_label_name (temp
, 0);
7673 c
= *input_line_pointer
;
7682 /* Put ':' back for error messages' sake. */
7683 *input_line_pointer
++ = ':';
7684 as_bad ("Expected ':'");
7691 /* Put ':' back for error messages' sake. */
7692 *input_line_pointer
++ = ':';
7693 if (*input_line_pointer
++ != ']')
7695 as_bad ("Expected ']'");
7700 as_bad ("Tag name expected");
7710 /* Not a valid line. */
7715 ia64_frob_label (sym
)
7718 struct label_fix
*fix
;
7720 /* Tags need special handling since they are not bundle breaks like
7724 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7726 fix
->next
= CURR_SLOT
.tag_fixups
;
7727 CURR_SLOT
.tag_fixups
= fix
;
7732 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7734 md
.last_text_seg
= now_seg
;
7735 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7737 fix
->next
= CURR_SLOT
.label_fixups
;
7738 CURR_SLOT
.label_fixups
= fix
;
7740 /* Keep track of how many code entry points we've seen. */
7741 if (md
.path
== md
.maxpaths
)
7744 md
.entry_labels
= (const char **)
7745 xrealloc ((void *) md
.entry_labels
,
7746 md
.maxpaths
* sizeof (char *));
7748 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7753 /* The HP-UX linker will give unresolved symbol errors for symbols
7754 that are declared but unused. This routine removes declared,
7755 unused symbols from an object. */
7757 ia64_frob_symbol (sym
)
7760 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7761 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7762 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7763 && ! S_IS_EXTERNAL (sym
)))
7770 ia64_flush_pending_output ()
7772 if (!md
.keep_pending_output
7773 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7775 /* ??? This causes many unnecessary stop bits to be emitted.
7776 Unfortunately, it isn't clear if it is safe to remove this. */
7777 insn_group_break (1, 0, 0);
7778 ia64_flush_insns ();
7782 /* Do ia64-specific expression optimization. All that's done here is
7783 to transform index expressions that are either due to the indexing
7784 of rotating registers or due to the indexing of indirect register
7787 ia64_optimize_expr (l
, op
, r
)
7796 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
7798 num_regs
= (l
->X_add_number
>> 16);
7799 if ((unsigned) r
->X_add_number
>= num_regs
)
7802 as_bad ("No current frame");
7804 as_bad ("Index out of range 0..%u", num_regs
- 1);
7805 r
->X_add_number
= 0;
7807 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7810 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
7812 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
7813 || l
->X_add_number
== IND_MEM
)
7815 as_bad ("Indirect register set name expected");
7816 l
->X_add_number
= IND_CPUID
;
7819 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
7820 l
->X_add_number
= r
->X_add_number
;
7828 ia64_parse_name (name
, e
, nextcharP
)
7833 struct const_desc
*cdesc
;
7834 struct dynreg
*dr
= 0;
7841 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7843 /* Find what relocation pseudo-function we're dealing with. */
7844 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7845 if (pseudo_func
[idx
].name
7846 && pseudo_func
[idx
].name
[0] == name
[1]
7847 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7849 pseudo_type
= pseudo_func
[idx
].type
;
7852 switch (pseudo_type
)
7854 case PSEUDO_FUNC_RELOC
:
7855 end
= input_line_pointer
;
7856 if (*nextcharP
!= '(')
7858 as_bad ("Expected '('");
7862 ++input_line_pointer
;
7864 if (*input_line_pointer
!= ')')
7866 as_bad ("Missing ')'");
7870 ++input_line_pointer
;
7871 if (e
->X_op
!= O_symbol
)
7873 if (e
->X_op
!= O_pseudo_fixup
)
7875 as_bad ("Not a symbolic expression");
7878 if (idx
!= FUNC_LT_RELATIVE
)
7880 as_bad ("Illegal combination of relocation functions");
7883 switch (S_GET_VALUE (e
->X_op_symbol
))
7885 case FUNC_FPTR_RELATIVE
:
7886 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7887 case FUNC_DTP_MODULE
:
7888 idx
= FUNC_LT_DTP_MODULE
; break;
7889 case FUNC_DTP_RELATIVE
:
7890 idx
= FUNC_LT_DTP_RELATIVE
; break;
7891 case FUNC_TP_RELATIVE
:
7892 idx
= FUNC_LT_TP_RELATIVE
; break;
7894 as_bad ("Illegal combination of relocation functions");
7898 /* Make sure gas doesn't get rid of local symbols that are used
7900 e
->X_op
= O_pseudo_fixup
;
7901 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7903 *nextcharP
= *input_line_pointer
;
7906 case PSEUDO_FUNC_CONST
:
7907 e
->X_op
= O_constant
;
7908 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7911 case PSEUDO_FUNC_REG
:
7912 e
->X_op
= O_register
;
7913 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7922 /* first see if NAME is a known register name: */
7923 sym
= hash_find (md
.reg_hash
, name
);
7926 e
->X_op
= O_register
;
7927 e
->X_add_number
= S_GET_VALUE (sym
);
7931 cdesc
= hash_find (md
.const_hash
, name
);
7934 e
->X_op
= O_constant
;
7935 e
->X_add_number
= cdesc
->value
;
7939 /* check for inN, locN, or outN: */
7944 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7952 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
7960 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
7971 /* Ignore register numbers with leading zeroes, except zero itself. */
7972 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
7974 unsigned long regnum
;
7976 /* The name is inN, locN, or outN; parse the register number. */
7977 regnum
= strtoul (name
+ idx
, &end
, 10);
7978 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
7980 if (regnum
>= dr
->num_regs
)
7983 as_bad ("No current frame");
7985 as_bad ("Register number out of range 0..%u",
7989 e
->X_op
= O_register
;
7990 e
->X_add_number
= dr
->base
+ regnum
;
7995 end
= alloca (strlen (name
) + 1);
7997 name
= ia64_canonicalize_symbol_name (end
);
7998 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8000 /* We've got ourselves the name of a rotating register set.
8001 Store the base register number in the low 16 bits of
8002 X_add_number and the size of the register set in the top 16
8004 e
->X_op
= O_register
;
8005 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8011 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8014 ia64_canonicalize_symbol_name (name
)
8017 size_t len
= strlen (name
), full
= len
;
8019 while (len
> 0 && name
[len
- 1] == '#')
8024 as_bad ("Standalone `#' is illegal");
8026 else if (len
< full
- 1)
8027 as_warn ("Redundant `#' suffix operators");
8032 /* Return true if idesc is a conditional branch instruction. This excludes
8033 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8034 because they always read/write resources regardless of the value of the
8035 qualifying predicate. br.ia must always use p0, and hence is always
8036 taken. Thus this function returns true for branches which can fall
8037 through, and which use no resources if they do fall through. */
8040 is_conditional_branch (idesc
)
8041 struct ia64_opcode
*idesc
;
8043 /* br is a conditional branch. Everything that starts with br. except
8044 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8045 Everything that starts with brl is a conditional branch. */
8046 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8047 && (idesc
->name
[2] == '\0'
8048 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8049 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8050 || idesc
->name
[2] == 'l'
8051 /* br.cond, br.call, br.clr */
8052 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8053 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8054 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8057 /* Return whether the given opcode is a taken branch. If there's any doubt,
8061 is_taken_branch (idesc
)
8062 struct ia64_opcode
*idesc
;
8064 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8065 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8068 /* Return whether the given opcode is an interruption or rfi. If there's any
8069 doubt, returns zero. */
8072 is_interruption_or_rfi (idesc
)
8073 struct ia64_opcode
*idesc
;
8075 if (strcmp (idesc
->name
, "rfi") == 0)
8080 /* Returns the index of the given dependency in the opcode's list of chks, or
8081 -1 if there is no dependency. */
8084 depends_on (depind
, idesc
)
8086 struct ia64_opcode
*idesc
;
8089 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8090 for (i
= 0; i
< dep
->nchks
; i
++)
8092 if (depind
== DEP (dep
->chks
[i
]))
8098 /* Determine a set of specific resources used for a particular resource
8099 class. Returns the number of specific resources identified For those
8100 cases which are not determinable statically, the resource returned is
8103 Meanings of value in 'NOTE':
8104 1) only read/write when the register number is explicitly encoded in the
8106 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8107 accesses CFM when qualifying predicate is in the rotating region.
8108 3) general register value is used to specify an indirect register; not
8109 determinable statically.
8110 4) only read the given resource when bits 7:0 of the indirect index
8111 register value does not match the register number of the resource; not
8112 determinable statically.
8113 5) all rules are implementation specific.
8114 6) only when both the index specified by the reader and the index specified
8115 by the writer have the same value in bits 63:61; not determinable
8117 7) only access the specified resource when the corresponding mask bit is
8119 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8120 only read when these insns reference FR2-31
8121 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8122 written when these insns write FR32-127
8123 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8125 11) The target predicates are written independently of PR[qp], but source
8126 registers are only read if PR[qp] is true. Since the state of PR[qp]
8127 cannot statically be determined, all source registers are marked used.
8128 12) This insn only reads the specified predicate register when that
8129 register is the PR[qp].
8130 13) This reference to ld-c only applies to teh GR whose value is loaded
8131 with data returned from memory, not the post-incremented address register.
8132 14) The RSE resource includes the implementation-specific RSE internal
8133 state resources. At least one (and possibly more) of these resources are
8134 read by each instruction listed in IC:rse-readers. At least one (and
8135 possibly more) of these resources are written by each insn listed in
8137 15+16) Represents reserved instructions, which the assembler does not
8140 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8141 this code; there are no dependency violations based on memory access.
8144 #define MAX_SPECS 256
8149 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
8150 const struct ia64_dependency
*dep
;
8151 struct ia64_opcode
*idesc
;
8152 int type
; /* is this a DV chk or a DV reg? */
8153 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
8154 int note
; /* resource note for this insn's usage */
8155 int path
; /* which execution path to examine */
8162 if (dep
->mode
== IA64_DV_WAW
8163 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8164 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8167 /* template for any resources we identify */
8168 tmpl
.dependency
= dep
;
8170 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8171 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8172 tmpl
.link_to_qp_branch
= 1;
8173 tmpl
.mem_offset
.hint
= 0;
8174 tmpl
.mem_offset
.offset
= 0;
8175 tmpl
.mem_offset
.base
= 0;
8178 tmpl
.cmp_type
= CMP_NONE
;
8185 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8186 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8187 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8189 /* we don't need to track these */
8190 if (dep
->semantics
== IA64_DVS_NONE
)
8193 switch (dep
->specifier
)
8198 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8200 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8201 if (regno
>= 0 && regno
<= 7)
8203 specs
[count
] = tmpl
;
8204 specs
[count
++].index
= regno
;
8210 for (i
= 0; i
< 8; i
++)
8212 specs
[count
] = tmpl
;
8213 specs
[count
++].index
= i
;
8222 case IA64_RS_AR_UNAT
:
8223 /* This is a mov =AR or mov AR= instruction. */
8224 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8226 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8227 if (regno
== AR_UNAT
)
8229 specs
[count
++] = tmpl
;
8234 /* This is a spill/fill, or other instruction that modifies the
8237 /* Unless we can determine the specific bits used, mark the whole
8238 thing; bits 8:3 of the memory address indicate the bit used in
8239 UNAT. The .mem.offset hint may be used to eliminate a small
8240 subset of conflicts. */
8241 specs
[count
] = tmpl
;
8242 if (md
.mem_offset
.hint
)
8245 fprintf (stderr
, " Using hint for spill/fill\n");
8246 /* The index isn't actually used, just set it to something
8247 approximating the bit index. */
8248 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8249 specs
[count
].mem_offset
.hint
= 1;
8250 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8251 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8255 specs
[count
++].specific
= 0;
8263 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8265 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8266 if ((regno
>= 8 && regno
<= 15)
8267 || (regno
>= 20 && regno
<= 23)
8268 || (regno
>= 31 && regno
<= 39)
8269 || (regno
>= 41 && regno
<= 47)
8270 || (regno
>= 67 && regno
<= 111))
8272 specs
[count
] = tmpl
;
8273 specs
[count
++].index
= regno
;
8286 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8288 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8289 if ((regno
>= 48 && regno
<= 63)
8290 || (regno
>= 112 && regno
<= 127))
8292 specs
[count
] = tmpl
;
8293 specs
[count
++].index
= regno
;
8299 for (i
= 48; i
< 64; i
++)
8301 specs
[count
] = tmpl
;
8302 specs
[count
++].index
= i
;
8304 for (i
= 112; i
< 128; i
++)
8306 specs
[count
] = tmpl
;
8307 specs
[count
++].index
= i
;
8325 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8326 if (idesc
->operands
[i
] == IA64_OPND_B1
8327 || idesc
->operands
[i
] == IA64_OPND_B2
)
8329 specs
[count
] = tmpl
;
8330 specs
[count
++].index
=
8331 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8336 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8337 if (idesc
->operands
[i
] == IA64_OPND_B1
8338 || idesc
->operands
[i
] == IA64_OPND_B2
)
8340 specs
[count
] = tmpl
;
8341 specs
[count
++].index
=
8342 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8348 case IA64_RS_CPUID
: /* four or more registers */
8351 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8353 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8354 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8357 specs
[count
] = tmpl
;
8358 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8362 specs
[count
] = tmpl
;
8363 specs
[count
++].specific
= 0;
8373 case IA64_RS_DBR
: /* four or more registers */
8376 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8378 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8379 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8382 specs
[count
] = tmpl
;
8383 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8387 specs
[count
] = tmpl
;
8388 specs
[count
++].specific
= 0;
8392 else if (note
== 0 && !rsrc_write
)
8394 specs
[count
] = tmpl
;
8395 specs
[count
++].specific
= 0;
8403 case IA64_RS_IBR
: /* four or more registers */
8406 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8408 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8409 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8412 specs
[count
] = tmpl
;
8413 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8417 specs
[count
] = tmpl
;
8418 specs
[count
++].specific
= 0;
8431 /* These are implementation specific. Force all references to
8432 conflict with all other references. */
8433 specs
[count
] = tmpl
;
8434 specs
[count
++].specific
= 0;
8442 case IA64_RS_PKR
: /* 16 or more registers */
8443 if (note
== 3 || note
== 4)
8445 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8447 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8448 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8453 specs
[count
] = tmpl
;
8454 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8457 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8459 /* Uses all registers *except* the one in R3. */
8460 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8462 specs
[count
] = tmpl
;
8463 specs
[count
++].index
= i
;
8469 specs
[count
] = tmpl
;
8470 specs
[count
++].specific
= 0;
8477 specs
[count
] = tmpl
;
8478 specs
[count
++].specific
= 0;
8482 case IA64_RS_PMC
: /* four or more registers */
8485 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8486 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8489 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8491 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
8492 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8495 specs
[count
] = tmpl
;
8496 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8500 specs
[count
] = tmpl
;
8501 specs
[count
++].specific
= 0;
8511 case IA64_RS_PMD
: /* four or more registers */
8514 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8516 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8517 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8520 specs
[count
] = tmpl
;
8521 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8525 specs
[count
] = tmpl
;
8526 specs
[count
++].specific
= 0;
8536 case IA64_RS_RR
: /* eight registers */
8539 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8541 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8542 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8545 specs
[count
] = tmpl
;
8546 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8550 specs
[count
] = tmpl
;
8551 specs
[count
++].specific
= 0;
8555 else if (note
== 0 && !rsrc_write
)
8557 specs
[count
] = tmpl
;
8558 specs
[count
++].specific
= 0;
8566 case IA64_RS_CR_IRR
:
8569 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8570 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8572 && idesc
->operands
[1] == IA64_OPND_CR3
8575 for (i
= 0; i
< 4; i
++)
8577 specs
[count
] = tmpl
;
8578 specs
[count
++].index
= CR_IRR0
+ i
;
8584 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8585 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8587 && regno
<= CR_IRR3
)
8589 specs
[count
] = tmpl
;
8590 specs
[count
++].index
= regno
;
8599 case IA64_RS_CR_LRR
:
8606 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8607 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8608 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8610 specs
[count
] = tmpl
;
8611 specs
[count
++].index
= regno
;
8619 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8621 specs
[count
] = tmpl
;
8622 specs
[count
++].index
=
8623 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8638 else if (rsrc_write
)
8640 if (dep
->specifier
== IA64_RS_FRb
8641 && idesc
->operands
[0] == IA64_OPND_F1
)
8643 specs
[count
] = tmpl
;
8644 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8649 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8651 if (idesc
->operands
[i
] == IA64_OPND_F2
8652 || idesc
->operands
[i
] == IA64_OPND_F3
8653 || idesc
->operands
[i
] == IA64_OPND_F4
)
8655 specs
[count
] = tmpl
;
8656 specs
[count
++].index
=
8657 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8666 /* This reference applies only to the GR whose value is loaded with
8667 data returned from memory. */
8668 specs
[count
] = tmpl
;
8669 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8675 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8676 if (idesc
->operands
[i
] == IA64_OPND_R1
8677 || idesc
->operands
[i
] == IA64_OPND_R2
8678 || idesc
->operands
[i
] == IA64_OPND_R3
)
8680 specs
[count
] = tmpl
;
8681 specs
[count
++].index
=
8682 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8684 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8685 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8686 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8688 specs
[count
] = tmpl
;
8689 specs
[count
++].index
=
8690 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8695 /* Look for anything that reads a GR. */
8696 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8698 if (idesc
->operands
[i
] == IA64_OPND_MR3
8699 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8700 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8701 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8702 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8703 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8704 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8705 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8706 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8707 || ((i
>= idesc
->num_outputs
)
8708 && (idesc
->operands
[i
] == IA64_OPND_R1
8709 || idesc
->operands
[i
] == IA64_OPND_R2
8710 || idesc
->operands
[i
] == IA64_OPND_R3
8711 /* addl source register. */
8712 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8714 specs
[count
] = tmpl
;
8715 specs
[count
++].index
=
8716 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8727 /* This is the same as IA64_RS_PRr, except that the register range is
8728 from 1 - 15, and there are no rotating register reads/writes here. */
8732 for (i
= 1; i
< 16; i
++)
8734 specs
[count
] = tmpl
;
8735 specs
[count
++].index
= i
;
8741 /* Mark only those registers indicated by the mask. */
8744 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8745 for (i
= 1; i
< 16; i
++)
8746 if (mask
& ((valueT
) 1 << i
))
8748 specs
[count
] = tmpl
;
8749 specs
[count
++].index
= i
;
8757 else if (note
== 11) /* note 11 implies note 1 as well */
8761 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8763 if (idesc
->operands
[i
] == IA64_OPND_P1
8764 || idesc
->operands
[i
] == IA64_OPND_P2
)
8766 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8767 if (regno
>= 1 && regno
< 16)
8769 specs
[count
] = tmpl
;
8770 specs
[count
++].index
= regno
;
8780 else if (note
== 12)
8782 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8784 specs
[count
] = tmpl
;
8785 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8792 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8793 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8794 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8795 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8797 if ((idesc
->operands
[0] == IA64_OPND_P1
8798 || idesc
->operands
[0] == IA64_OPND_P2
)
8799 && p1
>= 1 && p1
< 16)
8801 specs
[count
] = tmpl
;
8802 specs
[count
].cmp_type
=
8803 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8804 specs
[count
++].index
= p1
;
8806 if ((idesc
->operands
[1] == IA64_OPND_P1
8807 || idesc
->operands
[1] == IA64_OPND_P2
)
8808 && p2
>= 1 && p2
< 16)
8810 specs
[count
] = tmpl
;
8811 specs
[count
].cmp_type
=
8812 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8813 specs
[count
++].index
= p2
;
8818 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8820 specs
[count
] = tmpl
;
8821 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8823 if (idesc
->operands
[1] == IA64_OPND_PR
)
8825 for (i
= 1; i
< 16; i
++)
8827 specs
[count
] = tmpl
;
8828 specs
[count
++].index
= i
;
8839 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8840 simplified cases of this. */
8844 for (i
= 16; i
< 63; i
++)
8846 specs
[count
] = tmpl
;
8847 specs
[count
++].index
= i
;
8853 /* Mark only those registers indicated by the mask. */
8855 && idesc
->operands
[0] == IA64_OPND_PR
)
8857 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8858 if (mask
& ((valueT
) 1 << 16))
8859 for (i
= 16; i
< 63; i
++)
8861 specs
[count
] = tmpl
;
8862 specs
[count
++].index
= i
;
8866 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8868 for (i
= 16; i
< 63; i
++)
8870 specs
[count
] = tmpl
;
8871 specs
[count
++].index
= i
;
8879 else if (note
== 11) /* note 11 implies note 1 as well */
8883 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8885 if (idesc
->operands
[i
] == IA64_OPND_P1
8886 || idesc
->operands
[i
] == IA64_OPND_P2
)
8888 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8889 if (regno
>= 16 && regno
< 63)
8891 specs
[count
] = tmpl
;
8892 specs
[count
++].index
= regno
;
8902 else if (note
== 12)
8904 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8906 specs
[count
] = tmpl
;
8907 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8914 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8915 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8916 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8917 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8919 if ((idesc
->operands
[0] == IA64_OPND_P1
8920 || idesc
->operands
[0] == IA64_OPND_P2
)
8921 && p1
>= 16 && p1
< 63)
8923 specs
[count
] = tmpl
;
8924 specs
[count
].cmp_type
=
8925 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8926 specs
[count
++].index
= p1
;
8928 if ((idesc
->operands
[1] == IA64_OPND_P1
8929 || idesc
->operands
[1] == IA64_OPND_P2
)
8930 && p2
>= 16 && p2
< 63)
8932 specs
[count
] = tmpl
;
8933 specs
[count
].cmp_type
=
8934 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8935 specs
[count
++].index
= p2
;
8940 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8942 specs
[count
] = tmpl
;
8943 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8945 if (idesc
->operands
[1] == IA64_OPND_PR
)
8947 for (i
= 16; i
< 63; i
++)
8949 specs
[count
] = tmpl
;
8950 specs
[count
++].index
= i
;
8962 /* Verify that the instruction is using the PSR bit indicated in
8966 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
8968 if (dep
->regindex
< 6)
8970 specs
[count
++] = tmpl
;
8973 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
8975 if (dep
->regindex
< 32
8976 || dep
->regindex
== 35
8977 || dep
->regindex
== 36
8978 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
8980 specs
[count
++] = tmpl
;
8983 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
8985 if (dep
->regindex
< 32
8986 || dep
->regindex
== 35
8987 || dep
->regindex
== 36
8988 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
8990 specs
[count
++] = tmpl
;
8995 /* Several PSR bits have very specific dependencies. */
8996 switch (dep
->regindex
)
8999 specs
[count
++] = tmpl
;
9004 specs
[count
++] = tmpl
;
9008 /* Only certain CR accesses use PSR.ic */
9009 if (idesc
->operands
[0] == IA64_OPND_CR3
9010 || idesc
->operands
[1] == IA64_OPND_CR3
)
9013 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9016 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
9031 specs
[count
++] = tmpl
;
9040 specs
[count
++] = tmpl
;
9044 /* Only some AR accesses use cpl */
9045 if (idesc
->operands
[0] == IA64_OPND_AR3
9046 || idesc
->operands
[1] == IA64_OPND_AR3
)
9049 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9052 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
9059 && regno
<= AR_K7
))))
9061 specs
[count
++] = tmpl
;
9066 specs
[count
++] = tmpl
;
9076 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9078 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9084 if (mask
& ((valueT
) 1 << dep
->regindex
))
9086 specs
[count
++] = tmpl
;
9091 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9092 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9093 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9094 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9096 if (idesc
->operands
[i
] == IA64_OPND_F1
9097 || idesc
->operands
[i
] == IA64_OPND_F2
9098 || idesc
->operands
[i
] == IA64_OPND_F3
9099 || idesc
->operands
[i
] == IA64_OPND_F4
)
9101 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9102 if (reg
>= min
&& reg
<= max
)
9104 specs
[count
++] = tmpl
;
9111 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9112 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9113 /* mfh is read on writes to FR32-127; mfl is read on writes to
9115 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9117 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9119 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9120 if (reg
>= min
&& reg
<= max
)
9122 specs
[count
++] = tmpl
;
9127 else if (note
== 10)
9129 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9131 if (idesc
->operands
[i
] == IA64_OPND_R1
9132 || idesc
->operands
[i
] == IA64_OPND_R2
9133 || idesc
->operands
[i
] == IA64_OPND_R3
)
9135 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9136 if (regno
>= 16 && regno
<= 31)
9138 specs
[count
++] = tmpl
;
9149 case IA64_RS_AR_FPSR
:
9150 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9152 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9153 if (regno
== AR_FPSR
)
9155 specs
[count
++] = tmpl
;
9160 specs
[count
++] = tmpl
;
9165 /* Handle all AR[REG] resources */
9166 if (note
== 0 || note
== 1)
9168 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9169 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9170 && regno
== dep
->regindex
)
9172 specs
[count
++] = tmpl
;
9174 /* other AR[REG] resources may be affected by AR accesses */
9175 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9178 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9179 switch (dep
->regindex
)
9185 if (regno
== AR_BSPSTORE
)
9187 specs
[count
++] = tmpl
;
9191 (regno
== AR_BSPSTORE
9192 || regno
== AR_RNAT
))
9194 specs
[count
++] = tmpl
;
9199 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9202 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9203 switch (dep
->regindex
)
9208 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9210 specs
[count
++] = tmpl
;
9217 specs
[count
++] = tmpl
;
9227 /* Handle all CR[REG] resources */
9228 if (note
== 0 || note
== 1)
9230 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9232 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9233 if (regno
== dep
->regindex
)
9235 specs
[count
++] = tmpl
;
9237 else if (!rsrc_write
)
9239 /* Reads from CR[IVR] affect other resources. */
9240 if (regno
== CR_IVR
)
9242 if ((dep
->regindex
>= CR_IRR0
9243 && dep
->regindex
<= CR_IRR3
)
9244 || dep
->regindex
== CR_TPR
)
9246 specs
[count
++] = tmpl
;
9253 specs
[count
++] = tmpl
;
9262 case IA64_RS_INSERVICE
:
9263 /* look for write of EOI (67) or read of IVR (65) */
9264 if ((idesc
->operands
[0] == IA64_OPND_CR3
9265 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9266 || (idesc
->operands
[1] == IA64_OPND_CR3
9267 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9269 specs
[count
++] = tmpl
;
9276 specs
[count
++] = tmpl
;
9287 specs
[count
++] = tmpl
;
9291 /* Check if any of the registers accessed are in the rotating region.
9292 mov to/from pr accesses CFM only when qp_regno is in the rotating
9294 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9296 if (idesc
->operands
[i
] == IA64_OPND_R1
9297 || idesc
->operands
[i
] == IA64_OPND_R2
9298 || idesc
->operands
[i
] == IA64_OPND_R3
)
9300 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9301 /* Assumes that md.rot.num_regs is always valid */
9302 if (md
.rot
.num_regs
> 0
9304 && num
< 31 + md
.rot
.num_regs
)
9306 specs
[count
] = tmpl
;
9307 specs
[count
++].specific
= 0;
9310 else if (idesc
->operands
[i
] == IA64_OPND_F1
9311 || idesc
->operands
[i
] == IA64_OPND_F2
9312 || idesc
->operands
[i
] == IA64_OPND_F3
9313 || idesc
->operands
[i
] == IA64_OPND_F4
)
9315 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9318 specs
[count
] = tmpl
;
9319 specs
[count
++].specific
= 0;
9322 else if (idesc
->operands
[i
] == IA64_OPND_P1
9323 || idesc
->operands
[i
] == IA64_OPND_P2
)
9325 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9328 specs
[count
] = tmpl
;
9329 specs
[count
++].specific
= 0;
9333 if (CURR_SLOT
.qp_regno
> 15)
9335 specs
[count
] = tmpl
;
9336 specs
[count
++].specific
= 0;
9341 /* This is the same as IA64_RS_PRr, except simplified to account for
9342 the fact that there is only one register. */
9346 specs
[count
++] = tmpl
;
9351 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9352 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9353 if (mask
& ((valueT
) 1 << 63))
9354 specs
[count
++] = tmpl
;
9356 else if (note
== 11)
9358 if ((idesc
->operands
[0] == IA64_OPND_P1
9359 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9360 || (idesc
->operands
[1] == IA64_OPND_P2
9361 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9363 specs
[count
++] = tmpl
;
9366 else if (note
== 12)
9368 if (CURR_SLOT
.qp_regno
== 63)
9370 specs
[count
++] = tmpl
;
9377 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9378 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9379 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9380 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9383 && (idesc
->operands
[0] == IA64_OPND_P1
9384 || idesc
->operands
[0] == IA64_OPND_P2
))
9386 specs
[count
] = tmpl
;
9387 specs
[count
++].cmp_type
=
9388 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9391 && (idesc
->operands
[1] == IA64_OPND_P1
9392 || idesc
->operands
[1] == IA64_OPND_P2
))
9394 specs
[count
] = tmpl
;
9395 specs
[count
++].cmp_type
=
9396 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9401 if (CURR_SLOT
.qp_regno
== 63)
9403 specs
[count
++] = tmpl
;
9414 /* FIXME we can identify some individual RSE written resources, but RSE
9415 read resources have not yet been completely identified, so for now
9416 treat RSE as a single resource */
9417 if (strncmp (idesc
->name
, "mov", 3) == 0)
9421 if (idesc
->operands
[0] == IA64_OPND_AR3
9422 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9424 specs
[count
++] = tmpl
;
9429 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9431 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9432 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9434 specs
[count
++] = tmpl
;
9437 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9439 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9440 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9441 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9443 specs
[count
++] = tmpl
;
9450 specs
[count
++] = tmpl
;
9455 /* FIXME -- do any of these need to be non-specific? */
9456 specs
[count
++] = tmpl
;
9460 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9467 /* Clear branch flags on marked resources. This breaks the link between the
9468 QP of the marking instruction and a subsequent branch on the same QP. */
9471 clear_qp_branch_flag (mask
)
9475 for (i
= 0; i
< regdepslen
; i
++)
9477 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9478 if ((bit
& mask
) != 0)
9480 regdeps
[i
].link_to_qp_branch
= 0;
9485 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9486 any mutexes which contain one of the PRs and create new ones when
9490 update_qp_mutex (valueT mask
)
9496 while (i
< qp_mutexeslen
)
9498 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9500 /* If it destroys and creates the same mutex, do nothing. */
9501 if (qp_mutexes
[i
].prmask
== mask
9502 && qp_mutexes
[i
].path
== md
.path
)
9513 fprintf (stderr
, " Clearing mutex relation");
9514 print_prmask (qp_mutexes
[i
].prmask
);
9515 fprintf (stderr
, "\n");
9518 /* Deal with the old mutex with more than 3+ PRs only if
9519 the new mutex on the same execution path with it.
9521 FIXME: The 3+ mutex support is incomplete.
9522 dot_pred_rel () may be a better place to fix it. */
9523 if (qp_mutexes
[i
].path
== md
.path
)
9525 /* If it is a proper subset of the mutex, create a
9528 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9531 qp_mutexes
[i
].prmask
&= ~mask
;
9532 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9534 /* Modify the mutex if there are more than one
9542 /* Remove the mutex. */
9543 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9551 add_qp_mutex (mask
);
9556 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9558 Any changes to a PR clears the mutex relations which include that PR. */
9561 clear_qp_mutex (mask
)
9567 while (i
< qp_mutexeslen
)
9569 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9573 fprintf (stderr
, " Clearing mutex relation");
9574 print_prmask (qp_mutexes
[i
].prmask
);
9575 fprintf (stderr
, "\n");
9577 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9584 /* Clear implies relations which contain PRs in the given masks.
9585 P1_MASK indicates the source of the implies relation, while P2_MASK
9586 indicates the implied PR. */
9589 clear_qp_implies (p1_mask
, p2_mask
)
9596 while (i
< qp_implieslen
)
9598 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9599 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9602 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9603 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9604 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9611 /* Add the PRs specified to the list of implied relations. */
9614 add_qp_imply (p1
, p2
)
9621 /* p0 is not meaningful here. */
9622 if (p1
== 0 || p2
== 0)
9628 /* If it exists already, ignore it. */
9629 for (i
= 0; i
< qp_implieslen
; i
++)
9631 if (qp_implies
[i
].p1
== p1
9632 && qp_implies
[i
].p2
== p2
9633 && qp_implies
[i
].path
== md
.path
9634 && !qp_implies
[i
].p2_branched
)
9638 if (qp_implieslen
== qp_impliestotlen
)
9640 qp_impliestotlen
+= 20;
9641 qp_implies
= (struct qp_imply
*)
9642 xrealloc ((void *) qp_implies
,
9643 qp_impliestotlen
* sizeof (struct qp_imply
));
9646 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9647 qp_implies
[qp_implieslen
].p1
= p1
;
9648 qp_implies
[qp_implieslen
].p2
= p2
;
9649 qp_implies
[qp_implieslen
].path
= md
.path
;
9650 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9652 /* Add in the implied transitive relations; for everything that p2 implies,
9653 make p1 imply that, too; for everything that implies p1, make it imply p2
9655 for (i
= 0; i
< qp_implieslen
; i
++)
9657 if (qp_implies
[i
].p1
== p2
)
9658 add_qp_imply (p1
, qp_implies
[i
].p2
);
9659 if (qp_implies
[i
].p2
== p1
)
9660 add_qp_imply (qp_implies
[i
].p1
, p2
);
9662 /* Add in mutex relations implied by this implies relation; for each mutex
9663 relation containing p2, duplicate it and replace p2 with p1. */
9664 bit
= (valueT
) 1 << p1
;
9665 mask
= (valueT
) 1 << p2
;
9666 for (i
= 0; i
< qp_mutexeslen
; i
++)
9668 if (qp_mutexes
[i
].prmask
& mask
)
9669 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9673 /* Add the PRs specified in the mask to the mutex list; this means that only
9674 one of the PRs can be true at any time. PR0 should never be included in
9684 if (qp_mutexeslen
== qp_mutexestotlen
)
9686 qp_mutexestotlen
+= 20;
9687 qp_mutexes
= (struct qpmutex
*)
9688 xrealloc ((void *) qp_mutexes
,
9689 qp_mutexestotlen
* sizeof (struct qpmutex
));
9693 fprintf (stderr
, " Registering mutex on");
9694 print_prmask (mask
);
9695 fprintf (stderr
, "\n");
9697 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9698 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9702 has_suffix_p (name
, suffix
)
9706 size_t namelen
= strlen (name
);
9707 size_t sufflen
= strlen (suffix
);
9709 if (namelen
<= sufflen
)
9711 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9715 clear_register_values ()
9719 fprintf (stderr
, " Clearing register values\n");
9720 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9721 gr_values
[i
].known
= 0;
9724 /* Keep track of register values/changes which affect DV tracking.
9726 optimization note: should add a flag to classes of insns where otherwise we
9727 have to examine a group of strings to identify them. */
9730 note_register_values (idesc
)
9731 struct ia64_opcode
*idesc
;
9733 valueT qp_changemask
= 0;
9736 /* Invalidate values for registers being written to. */
9737 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9739 if (idesc
->operands
[i
] == IA64_OPND_R1
9740 || idesc
->operands
[i
] == IA64_OPND_R2
9741 || idesc
->operands
[i
] == IA64_OPND_R3
)
9743 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9744 if (regno
> 0 && regno
< NELEMS (gr_values
))
9745 gr_values
[regno
].known
= 0;
9747 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9749 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9750 if (regno
> 0 && regno
< 4)
9751 gr_values
[regno
].known
= 0;
9753 else if (idesc
->operands
[i
] == IA64_OPND_P1
9754 || idesc
->operands
[i
] == IA64_OPND_P2
)
9756 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9757 qp_changemask
|= (valueT
) 1 << regno
;
9759 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9761 if (idesc
->operands
[2] & (valueT
) 0x10000)
9762 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9764 qp_changemask
= idesc
->operands
[2];
9767 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9769 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9770 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9772 qp_changemask
= idesc
->operands
[1];
9773 qp_changemask
&= ~(valueT
) 0xFFFF;
9778 /* Always clear qp branch flags on any PR change. */
9779 /* FIXME there may be exceptions for certain compares. */
9780 clear_qp_branch_flag (qp_changemask
);
9782 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9783 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9785 qp_changemask
|= ~(valueT
) 0xFFFF;
9786 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9788 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9789 gr_values
[i
].known
= 0;
9791 clear_qp_mutex (qp_changemask
);
9792 clear_qp_implies (qp_changemask
, qp_changemask
);
9794 /* After a call, all register values are undefined, except those marked
9796 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9797 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9799 /* FIXME keep GR values which are marked as "safe_across_calls" */
9800 clear_register_values ();
9801 clear_qp_mutex (~qp_safe_across_calls
);
9802 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9803 clear_qp_branch_flag (~qp_safe_across_calls
);
9805 else if (is_interruption_or_rfi (idesc
)
9806 || is_taken_branch (idesc
))
9808 clear_register_values ();
9809 clear_qp_mutex (~(valueT
) 0);
9810 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9812 /* Look for mutex and implies relations. */
9813 else if ((idesc
->operands
[0] == IA64_OPND_P1
9814 || idesc
->operands
[0] == IA64_OPND_P2
)
9815 && (idesc
->operands
[1] == IA64_OPND_P1
9816 || idesc
->operands
[1] == IA64_OPND_P2
))
9818 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9819 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9820 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9821 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9823 /* If both PRs are PR0, we can't really do anything. */
9824 if (p1
== 0 && p2
== 0)
9827 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9829 /* In general, clear mutexes and implies which include P1 or P2,
9830 with the following exceptions. */
9831 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9832 || has_suffix_p (idesc
->name
, ".and.orcm"))
9834 clear_qp_implies (p2mask
, p1mask
);
9836 else if (has_suffix_p (idesc
->name
, ".andcm")
9837 || has_suffix_p (idesc
->name
, ".and"))
9839 clear_qp_implies (0, p1mask
| p2mask
);
9841 else if (has_suffix_p (idesc
->name
, ".orcm")
9842 || has_suffix_p (idesc
->name
, ".or"))
9844 clear_qp_mutex (p1mask
| p2mask
);
9845 clear_qp_implies (p1mask
| p2mask
, 0);
9851 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9853 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9854 if (p1
== 0 || p2
== 0)
9855 clear_qp_mutex (p1mask
| p2mask
);
9857 added
= update_qp_mutex (p1mask
| p2mask
);
9859 if (CURR_SLOT
.qp_regno
== 0
9860 || has_suffix_p (idesc
->name
, ".unc"))
9862 if (added
== 0 && p1
&& p2
)
9863 add_qp_mutex (p1mask
| p2mask
);
9864 if (CURR_SLOT
.qp_regno
!= 0)
9867 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9869 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9874 /* Look for mov imm insns into GRs. */
9875 else if (idesc
->operands
[0] == IA64_OPND_R1
9876 && (idesc
->operands
[1] == IA64_OPND_IMM22
9877 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9878 && CURR_SLOT
.opnd
[1].X_op
== O_constant
9879 && (strcmp (idesc
->name
, "mov") == 0
9880 || strcmp (idesc
->name
, "movl") == 0))
9882 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9883 if (regno
> 0 && regno
< NELEMS (gr_values
))
9885 gr_values
[regno
].known
= 1;
9886 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9887 gr_values
[regno
].path
= md
.path
;
9890 fprintf (stderr
, " Know gr%d = ", regno
);
9891 fprintf_vma (stderr
, gr_values
[regno
].value
);
9892 fputs ("\n", stderr
);
9896 /* Look for dep.z imm insns. */
9897 else if (idesc
->operands
[0] == IA64_OPND_R1
9898 && idesc
->operands
[1] == IA64_OPND_IMM8
9899 && strcmp (idesc
->name
, "dep.z") == 0)
9901 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9902 if (regno
> 0 && regno
< NELEMS (gr_values
))
9904 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
9906 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
9907 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
9908 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
9909 gr_values
[regno
].known
= 1;
9910 gr_values
[regno
].value
= value
;
9911 gr_values
[regno
].path
= md
.path
;
9914 fprintf (stderr
, " Know gr%d = ", regno
);
9915 fprintf_vma (stderr
, gr_values
[regno
].value
);
9916 fputs ("\n", stderr
);
9922 clear_qp_mutex (qp_changemask
);
9923 clear_qp_implies (qp_changemask
, qp_changemask
);
9927 /* Return whether the given predicate registers are currently mutex. */
9930 qp_mutex (p1
, p2
, path
)
9940 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9941 for (i
= 0; i
< qp_mutexeslen
; i
++)
9943 if (qp_mutexes
[i
].path
>= path
9944 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9951 /* Return whether the given resource is in the given insn's list of chks
9952 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9956 resources_match (rs
, idesc
, note
, qp_regno
, path
)
9958 struct ia64_opcode
*idesc
;
9963 struct rsrc specs
[MAX_SPECS
];
9966 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9967 we don't need to check. One exception is note 11, which indicates that
9968 target predicates are written regardless of PR[qp]. */
9969 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
9973 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
9976 /* UNAT checking is a bit more specific than other resources */
9977 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
9978 && specs
[count
].mem_offset
.hint
9979 && rs
->mem_offset
.hint
)
9981 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
9983 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
9984 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
9991 /* Skip apparent PR write conflicts where both writes are an AND or both
9992 writes are an OR. */
9993 if (rs
->dependency
->specifier
== IA64_RS_PR
9994 || rs
->dependency
->specifier
== IA64_RS_PRr
9995 || rs
->dependency
->specifier
== IA64_RS_PR63
)
9997 if (specs
[count
].cmp_type
!= CMP_NONE
9998 && specs
[count
].cmp_type
== rs
->cmp_type
)
10001 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10002 dv_mode
[rs
->dependency
->mode
],
10003 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10004 specs
[count
].index
: 63);
10009 " %s on parallel compare conflict %s vs %s on PR%d\n",
10010 dv_mode
[rs
->dependency
->mode
],
10011 dv_cmp_type
[rs
->cmp_type
],
10012 dv_cmp_type
[specs
[count
].cmp_type
],
10013 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10014 specs
[count
].index
: 63);
10018 /* If either resource is not specific, conservatively assume a conflict
10020 if (!specs
[count
].specific
|| !rs
->specific
)
10022 else if (specs
[count
].index
== rs
->index
)
10029 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10030 insert a stop to create the break. Update all resource dependencies
10031 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10032 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10033 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10037 insn_group_break (insert_stop
, qp_regno
, save_current
)
10044 if (insert_stop
&& md
.num_slots_in_use
> 0)
10045 PREV_SLOT
.end_of_insn_group
= 1;
10049 fprintf (stderr
, " Insn group break%s",
10050 (insert_stop
? " (w/stop)" : ""));
10052 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10053 fprintf (stderr
, "\n");
10057 while (i
< regdepslen
)
10059 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10062 && regdeps
[i
].qp_regno
!= qp_regno
)
10069 && CURR_SLOT
.src_file
== regdeps
[i
].file
10070 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10076 /* clear dependencies which are automatically cleared by a stop, or
10077 those that have reached the appropriate state of insn serialization */
10078 if (dep
->semantics
== IA64_DVS_IMPLIED
10079 || dep
->semantics
== IA64_DVS_IMPLIEDF
10080 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10082 print_dependency ("Removing", i
);
10083 regdeps
[i
] = regdeps
[--regdepslen
];
10087 if (dep
->semantics
== IA64_DVS_DATA
10088 || dep
->semantics
== IA64_DVS_INSTR
10089 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10091 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10092 regdeps
[i
].insn_srlz
= STATE_STOP
;
10093 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10094 regdeps
[i
].data_srlz
= STATE_STOP
;
10101 /* Add the given resource usage spec to the list of active dependencies. */
10104 mark_resource (idesc
, dep
, spec
, depind
, path
)
10105 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
10106 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
10111 if (regdepslen
== regdepstotlen
)
10113 regdepstotlen
+= 20;
10114 regdeps
= (struct rsrc
*)
10115 xrealloc ((void *) regdeps
,
10116 regdepstotlen
* sizeof (struct rsrc
));
10119 regdeps
[regdepslen
] = *spec
;
10120 regdeps
[regdepslen
].depind
= depind
;
10121 regdeps
[regdepslen
].path
= path
;
10122 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10123 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10125 print_dependency ("Adding", regdepslen
);
10131 print_dependency (action
, depind
)
10132 const char *action
;
10137 fprintf (stderr
, " %s %s '%s'",
10138 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10139 (regdeps
[depind
].dependency
)->name
);
10140 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10141 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10142 if (regdeps
[depind
].mem_offset
.hint
)
10144 fputs (" ", stderr
);
10145 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10146 fputs ("+", stderr
);
10147 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10149 fprintf (stderr
, "\n");
10154 instruction_serialization ()
10158 fprintf (stderr
, " Instruction serialization\n");
10159 for (i
= 0; i
< regdepslen
; i
++)
10160 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10161 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10165 data_serialization ()
10169 fprintf (stderr
, " Data serialization\n");
10170 while (i
< regdepslen
)
10172 if (regdeps
[i
].data_srlz
== STATE_STOP
10173 /* Note: as of 991210, all "other" dependencies are cleared by a
10174 data serialization. This might change with new tables */
10175 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10177 print_dependency ("Removing", i
);
10178 regdeps
[i
] = regdeps
[--regdepslen
];
10185 /* Insert stops and serializations as needed to avoid DVs. */
10188 remove_marked_resource (rs
)
10191 switch (rs
->dependency
->semantics
)
10193 case IA64_DVS_SPECIFIC
:
10195 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10196 /* ...fall through... */
10197 case IA64_DVS_INSTR
:
10199 fprintf (stderr
, "Inserting instr serialization\n");
10200 if (rs
->insn_srlz
< STATE_STOP
)
10201 insn_group_break (1, 0, 0);
10202 if (rs
->insn_srlz
< STATE_SRLZ
)
10204 struct slot oldslot
= CURR_SLOT
;
10205 /* Manually jam a srlz.i insn into the stream */
10206 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10207 CURR_SLOT
.user_template
= -1;
10208 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10209 instruction_serialization ();
10210 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10211 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10212 emit_one_bundle ();
10213 CURR_SLOT
= oldslot
;
10215 insn_group_break (1, 0, 0);
10217 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10218 "other" types of DV are eliminated
10219 by a data serialization */
10220 case IA64_DVS_DATA
:
10222 fprintf (stderr
, "Inserting data serialization\n");
10223 if (rs
->data_srlz
< STATE_STOP
)
10224 insn_group_break (1, 0, 0);
10226 struct slot oldslot
= CURR_SLOT
;
10227 /* Manually jam a srlz.d insn into the stream */
10228 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10229 CURR_SLOT
.user_template
= -1;
10230 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10231 data_serialization ();
10232 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10233 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10234 emit_one_bundle ();
10235 CURR_SLOT
= oldslot
;
10238 case IA64_DVS_IMPLIED
:
10239 case IA64_DVS_IMPLIEDF
:
10241 fprintf (stderr
, "Inserting stop\n");
10242 insn_group_break (1, 0, 0);
10249 /* Check the resources used by the given opcode against the current dependency
10252 The check is run once for each execution path encountered. In this case,
10253 a unique execution path is the sequence of instructions following a code
10254 entry point, e.g. the following has three execution paths, one starting
10255 at L0, one at L1, and one at L2.
10264 check_dependencies (idesc
)
10265 struct ia64_opcode
*idesc
;
10267 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10271 /* Note that the number of marked resources may change within the
10272 loop if in auto mode. */
10274 while (i
< regdepslen
)
10276 struct rsrc
*rs
= ®deps
[i
];
10277 const struct ia64_dependency
*dep
= rs
->dependency
;
10280 int start_over
= 0;
10282 if (dep
->semantics
== IA64_DVS_NONE
10283 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10289 note
= NOTE (opdeps
->chks
[chkind
]);
10291 /* Check this resource against each execution path seen thus far. */
10292 for (path
= 0; path
<= md
.path
; path
++)
10296 /* If the dependency wasn't on the path being checked, ignore it. */
10297 if (rs
->path
< path
)
10300 /* If the QP for this insn implies a QP which has branched, don't
10301 bother checking. Ed. NOTE: I don't think this check is terribly
10302 useful; what's the point of generating code which will only be
10303 reached if its QP is zero?
10304 This code was specifically inserted to handle the following code,
10305 based on notes from Intel's DV checking code, where p1 implies p2.
10311 if (CURR_SLOT
.qp_regno
!= 0)
10315 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10317 if (qp_implies
[implies
].path
>= path
10318 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10319 && qp_implies
[implies
].p2_branched
)
10329 if ((matchtype
= resources_match (rs
, idesc
, note
,
10330 CURR_SLOT
.qp_regno
, path
)) != 0)
10333 char pathmsg
[256] = "";
10334 char indexmsg
[256] = "";
10335 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10338 sprintf (pathmsg
, " when entry is at label '%s'",
10339 md
.entry_labels
[path
- 1]);
10340 if (matchtype
== 1 && rs
->index
>= 0)
10341 sprintf (indexmsg
, ", specific resource number is %d",
10343 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10345 (certain
? "violates" : "may violate"),
10346 dv_mode
[dep
->mode
], dep
->name
,
10347 dv_sem
[dep
->semantics
],
10348 pathmsg
, indexmsg
);
10350 if (md
.explicit_mode
)
10352 as_warn ("%s", msg
);
10353 if (path
< md
.path
)
10354 as_warn (_("Only the first path encountering the conflict "
10356 as_warn_where (rs
->file
, rs
->line
,
10357 _("This is the location of the "
10358 "conflicting usage"));
10359 /* Don't bother checking other paths, to avoid duplicating
10360 the same warning */
10366 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10368 remove_marked_resource (rs
);
10370 /* since the set of dependencies has changed, start over */
10371 /* FIXME -- since we're removing dvs as we go, we
10372 probably don't really need to start over... */
10385 /* Register new dependencies based on the given opcode. */
10388 mark_resources (idesc
)
10389 struct ia64_opcode
*idesc
;
10392 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10393 int add_only_qp_reads
= 0;
10395 /* A conditional branch only uses its resources if it is taken; if it is
10396 taken, we stop following that path. The other branch types effectively
10397 *always* write their resources. If it's not taken, register only QP
10399 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10401 add_only_qp_reads
= 1;
10405 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10407 for (i
= 0; i
< opdeps
->nregs
; i
++)
10409 const struct ia64_dependency
*dep
;
10410 struct rsrc specs
[MAX_SPECS
];
10415 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10416 note
= NOTE (opdeps
->regs
[i
]);
10418 if (add_only_qp_reads
10419 && !(dep
->mode
== IA64_DV_WAR
10420 && (dep
->specifier
== IA64_RS_PR
10421 || dep
->specifier
== IA64_RS_PRr
10422 || dep
->specifier
== IA64_RS_PR63
)))
10425 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10427 while (count
-- > 0)
10429 mark_resource (idesc
, dep
, &specs
[count
],
10430 DEP (opdeps
->regs
[i
]), md
.path
);
10433 /* The execution path may affect register values, which may in turn
10434 affect which indirect-access resources are accessed. */
10435 switch (dep
->specifier
)
10439 case IA64_RS_CPUID
:
10447 for (path
= 0; path
< md
.path
; path
++)
10449 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10450 while (count
-- > 0)
10451 mark_resource (idesc
, dep
, &specs
[count
],
10452 DEP (opdeps
->regs
[i
]), path
);
10459 /* Remove dependencies when they no longer apply. */
10462 update_dependencies (idesc
)
10463 struct ia64_opcode
*idesc
;
10467 if (strcmp (idesc
->name
, "srlz.i") == 0)
10469 instruction_serialization ();
10471 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10473 data_serialization ();
10475 else if (is_interruption_or_rfi (idesc
)
10476 || is_taken_branch (idesc
))
10478 /* Although technically the taken branch doesn't clear dependencies
10479 which require a srlz.[id], we don't follow the branch; the next
10480 instruction is assumed to start with a clean slate. */
10484 else if (is_conditional_branch (idesc
)
10485 && CURR_SLOT
.qp_regno
!= 0)
10487 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10489 for (i
= 0; i
< qp_implieslen
; i
++)
10491 /* If the conditional branch's predicate is implied by the predicate
10492 in an existing dependency, remove that dependency. */
10493 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10496 /* Note that this implied predicate takes a branch so that if
10497 a later insn generates a DV but its predicate implies this
10498 one, we can avoid the false DV warning. */
10499 qp_implies
[i
].p2_branched
= 1;
10500 while (depind
< regdepslen
)
10502 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10504 print_dependency ("Removing", depind
);
10505 regdeps
[depind
] = regdeps
[--regdepslen
];
10512 /* Any marked resources which have this same predicate should be
10513 cleared, provided that the QP hasn't been modified between the
10514 marking instruction and the branch. */
10517 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10522 while (i
< regdepslen
)
10524 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10525 && regdeps
[i
].link_to_qp_branch
10526 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10527 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10529 /* Treat like a taken branch */
10530 print_dependency ("Removing", i
);
10531 regdeps
[i
] = regdeps
[--regdepslen
];
10540 /* Examine the current instruction for dependency violations. */
10544 struct ia64_opcode
*idesc
;
10548 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10549 idesc
->name
, CURR_SLOT
.src_line
,
10550 idesc
->dependencies
->nchks
,
10551 idesc
->dependencies
->nregs
);
10554 /* Look through the list of currently marked resources; if the current
10555 instruction has the dependency in its chks list which uses that resource,
10556 check against the specific resources used. */
10557 check_dependencies (idesc
);
10559 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10560 then add them to the list of marked resources. */
10561 mark_resources (idesc
);
10563 /* There are several types of dependency semantics, and each has its own
10564 requirements for being cleared
10566 Instruction serialization (insns separated by interruption, rfi, or
10567 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10569 Data serialization (instruction serialization, or writer + srlz.d +
10570 reader, where writer and srlz.d are in separate groups) clears
10571 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10572 always be the case).
10574 Instruction group break (groups separated by stop, taken branch,
10575 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10577 update_dependencies (idesc
);
10579 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10580 warning. Keep track of as many as possible that are useful. */
10581 note_register_values (idesc
);
10583 /* We don't need or want this anymore. */
10584 md
.mem_offset
.hint
= 0;
10589 /* Translate one line of assembly. Pseudo ops and labels do not show
10595 char *saved_input_line_pointer
, *mnemonic
;
10596 const struct pseudo_opcode
*pdesc
;
10597 struct ia64_opcode
*idesc
;
10598 unsigned char qp_regno
;
10599 unsigned int flags
;
10602 saved_input_line_pointer
= input_line_pointer
;
10603 input_line_pointer
= str
;
10605 /* extract the opcode (mnemonic): */
10607 mnemonic
= input_line_pointer
;
10608 ch
= get_symbol_end ();
10609 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10612 *input_line_pointer
= ch
;
10613 (*pdesc
->handler
) (pdesc
->arg
);
10617 /* Find the instruction descriptor matching the arguments. */
10619 idesc
= ia64_find_opcode (mnemonic
);
10620 *input_line_pointer
= ch
;
10623 as_bad ("Unknown opcode `%s'", mnemonic
);
10627 idesc
= parse_operands (idesc
);
10631 /* Handle the dynamic ops we can handle now: */
10632 if (idesc
->type
== IA64_TYPE_DYN
)
10634 if (strcmp (idesc
->name
, "add") == 0)
10636 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10637 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10641 ia64_free_opcode (idesc
);
10642 idesc
= ia64_find_opcode (mnemonic
);
10644 else if (strcmp (idesc
->name
, "mov") == 0)
10646 enum ia64_opnd opnd1
, opnd2
;
10649 opnd1
= idesc
->operands
[0];
10650 opnd2
= idesc
->operands
[1];
10651 if (opnd1
== IA64_OPND_AR3
)
10653 else if (opnd2
== IA64_OPND_AR3
)
10657 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10659 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10660 mnemonic
= "mov.i";
10661 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10662 mnemonic
= "mov.m";
10670 ia64_free_opcode (idesc
);
10671 idesc
= ia64_find_opcode (mnemonic
);
10672 while (idesc
!= NULL
10673 && (idesc
->operands
[0] != opnd1
10674 || idesc
->operands
[1] != opnd2
))
10675 idesc
= get_next_opcode (idesc
);
10679 else if (strcmp (idesc
->name
, "mov.i") == 0
10680 || strcmp (idesc
->name
, "mov.m") == 0)
10682 enum ia64_opnd opnd1
, opnd2
;
10685 opnd1
= idesc
->operands
[0];
10686 opnd2
= idesc
->operands
[1];
10687 if (opnd1
== IA64_OPND_AR3
)
10689 else if (opnd2
== IA64_OPND_AR3
)
10693 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10696 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10698 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10700 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10701 as_bad ("AR %d can only be accessed by %c-unit",
10702 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10706 else if (strcmp (idesc
->name
, "hint.b") == 0)
10712 case hint_b_warning
:
10713 as_warn ("hint.b may be treated as nop");
10716 as_bad ("hint.b shouldn't be used");
10722 if (md
.qp
.X_op
== O_register
)
10724 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10725 md
.qp
.X_op
= O_absent
;
10728 flags
= idesc
->flags
;
10730 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10732 /* The alignment frag has to end with a stop bit only if the
10733 next instruction after the alignment directive has to be
10734 the first instruction in an instruction group. */
10737 while (align_frag
->fr_type
!= rs_align_code
)
10739 align_frag
= align_frag
->fr_next
;
10743 /* align_frag can be NULL if there are directives in
10745 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10746 align_frag
->tc_frag_data
= 1;
10749 insn_group_break (1, 0, 0);
10753 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10755 as_bad ("`%s' cannot be predicated", idesc
->name
);
10759 /* Build the instruction. */
10760 CURR_SLOT
.qp_regno
= qp_regno
;
10761 CURR_SLOT
.idesc
= idesc
;
10762 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10763 dwarf2_where (&CURR_SLOT
.debug_line
);
10765 /* Add unwind entry, if there is one. */
10766 if (unwind
.current_entry
)
10768 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10769 unwind
.current_entry
= NULL
;
10771 if (unwind
.proc_start
&& S_IS_DEFINED (unwind
.proc_start
))
10774 /* Check for dependency violations. */
10778 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10779 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10780 emit_one_bundle ();
10782 if ((flags
& IA64_OPCODE_LAST
) != 0)
10783 insn_group_break (1, 0, 0);
10785 md
.last_text_seg
= now_seg
;
10788 input_line_pointer
= saved_input_line_pointer
;
10791 /* Called when symbol NAME cannot be found in the symbol table.
10792 Should be used for dynamic valued symbols only. */
10795 md_undefined_symbol (name
)
10796 char *name ATTRIBUTE_UNUSED
;
10801 /* Called for any expression that can not be recognized. When the
10802 function is called, `input_line_pointer' will point to the start of
10809 switch (*input_line_pointer
)
10812 ++input_line_pointer
;
10814 if (*input_line_pointer
!= ']')
10816 as_bad ("Closing bracket missing");
10821 if (e
->X_op
!= O_register
)
10822 as_bad ("Register expected as index");
10824 ++input_line_pointer
;
10835 ignore_rest_of_line ();
10838 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10839 a section symbol plus some offset. For relocs involving @fptr(),
10840 directives we don't want such adjustments since we need to have the
10841 original symbol's name in the reloc. */
10843 ia64_fix_adjustable (fix
)
10846 /* Prevent all adjustments to global symbols */
10847 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10850 switch (fix
->fx_r_type
)
10852 case BFD_RELOC_IA64_FPTR64I
:
10853 case BFD_RELOC_IA64_FPTR32MSB
:
10854 case BFD_RELOC_IA64_FPTR32LSB
:
10855 case BFD_RELOC_IA64_FPTR64MSB
:
10856 case BFD_RELOC_IA64_FPTR64LSB
:
10857 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10858 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10868 ia64_force_relocation (fix
)
10871 switch (fix
->fx_r_type
)
10873 case BFD_RELOC_IA64_FPTR64I
:
10874 case BFD_RELOC_IA64_FPTR32MSB
:
10875 case BFD_RELOC_IA64_FPTR32LSB
:
10876 case BFD_RELOC_IA64_FPTR64MSB
:
10877 case BFD_RELOC_IA64_FPTR64LSB
:
10879 case BFD_RELOC_IA64_LTOFF22
:
10880 case BFD_RELOC_IA64_LTOFF64I
:
10881 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10882 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10883 case BFD_RELOC_IA64_PLTOFF22
:
10884 case BFD_RELOC_IA64_PLTOFF64I
:
10885 case BFD_RELOC_IA64_PLTOFF64MSB
:
10886 case BFD_RELOC_IA64_PLTOFF64LSB
:
10888 case BFD_RELOC_IA64_LTOFF22X
:
10889 case BFD_RELOC_IA64_LDXMOV
:
10896 return generic_force_reloc (fix
);
10899 /* Decide from what point a pc-relative relocation is relative to,
10900 relative to the pc-relative fixup. Er, relatively speaking. */
10902 ia64_pcrel_from_section (fix
, sec
)
10906 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10908 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10915 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10917 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10921 expr
.X_op
= O_pseudo_fixup
;
10922 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10923 expr
.X_add_number
= 0;
10924 expr
.X_add_symbol
= symbol
;
10925 emit_expr (&expr
, size
);
10928 /* This is called whenever some data item (not an instruction) needs a
10929 fixup. We pick the right reloc code depending on the byteorder
10930 currently in effect. */
10932 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
10938 bfd_reloc_code_real_type code
;
10943 /* There are no reloc for 8 and 16 bit quantities, but we allow
10944 them here since they will work fine as long as the expression
10945 is fully defined at the end of the pass over the source file. */
10946 case 1: code
= BFD_RELOC_8
; break;
10947 case 2: code
= BFD_RELOC_16
; break;
10949 if (target_big_endian
)
10950 code
= BFD_RELOC_IA64_DIR32MSB
;
10952 code
= BFD_RELOC_IA64_DIR32LSB
;
10956 /* In 32-bit mode, data8 could mean function descriptors too. */
10957 if (exp
->X_op
== O_pseudo_fixup
10958 && exp
->X_op_symbol
10959 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
10960 && !(md
.flags
& EF_IA_64_ABI64
))
10962 if (target_big_endian
)
10963 code
= BFD_RELOC_IA64_IPLTMSB
;
10965 code
= BFD_RELOC_IA64_IPLTLSB
;
10966 exp
->X_op
= O_symbol
;
10971 if (target_big_endian
)
10972 code
= BFD_RELOC_IA64_DIR64MSB
;
10974 code
= BFD_RELOC_IA64_DIR64LSB
;
10979 if (exp
->X_op
== O_pseudo_fixup
10980 && exp
->X_op_symbol
10981 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
10983 if (target_big_endian
)
10984 code
= BFD_RELOC_IA64_IPLTMSB
;
10986 code
= BFD_RELOC_IA64_IPLTLSB
;
10987 exp
->X_op
= O_symbol
;
10993 as_bad ("Unsupported fixup size %d", nbytes
);
10994 ignore_rest_of_line ();
10998 if (exp
->X_op
== O_pseudo_fixup
)
11000 exp
->X_op
= O_symbol
;
11001 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11002 /* ??? If code unchanged, unsupported. */
11005 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11006 /* We need to store the byte order in effect in case we're going
11007 to fix an 8 or 16 bit relocation (for which there no real
11008 relocs available). See md_apply_fix3(). */
11009 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11012 /* Return the actual relocation we wish to associate with the pseudo
11013 reloc described by SYM and R_TYPE. SYM should be one of the
11014 symbols in the pseudo_func array, or NULL. */
11016 static bfd_reloc_code_real_type
11017 ia64_gen_real_reloc_type (sym
, r_type
)
11018 struct symbol
*sym
;
11019 bfd_reloc_code_real_type r_type
;
11021 bfd_reloc_code_real_type
new = 0;
11022 const char *type
= NULL
, *suffix
= "";
11029 switch (S_GET_VALUE (sym
))
11031 case FUNC_FPTR_RELATIVE
:
11034 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
11035 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
11036 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
11037 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
11038 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
11039 default: type
= "FPTR"; break;
11043 case FUNC_GP_RELATIVE
:
11046 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
11047 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
11048 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
11049 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
11050 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
11051 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
11052 default: type
= "GPREL"; break;
11056 case FUNC_LT_RELATIVE
:
11059 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
11060 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
11061 default: type
= "LTOFF"; break;
11065 case FUNC_LT_RELATIVE_X
:
11068 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
11069 default: type
= "LTOFF"; suffix
= "X"; break;
11073 case FUNC_PC_RELATIVE
:
11076 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
11077 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
11078 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
11079 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
11080 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
11081 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
11082 default: type
= "PCREL"; break;
11086 case FUNC_PLT_RELATIVE
:
11089 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
11090 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
11091 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
11092 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
11093 default: type
= "PLTOFF"; break;
11097 case FUNC_SEC_RELATIVE
:
11100 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
11101 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
11102 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
11103 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
11104 default: type
= "SECREL"; break;
11108 case FUNC_SEG_RELATIVE
:
11111 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
11112 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
11113 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
11114 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
11115 default: type
= "SEGREL"; break;
11119 case FUNC_LTV_RELATIVE
:
11122 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
11123 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
11124 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
11125 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
11126 default: type
= "LTV"; break;
11130 case FUNC_LT_FPTR_RELATIVE
:
11133 case BFD_RELOC_IA64_IMM22
:
11134 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11135 case BFD_RELOC_IA64_IMM64
:
11136 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11137 case BFD_RELOC_IA64_DIR32MSB
:
11138 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11139 case BFD_RELOC_IA64_DIR32LSB
:
11140 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11141 case BFD_RELOC_IA64_DIR64MSB
:
11142 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11143 case BFD_RELOC_IA64_DIR64LSB
:
11144 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11146 type
= "LTOFF_FPTR"; break;
11150 case FUNC_TP_RELATIVE
:
11153 case BFD_RELOC_IA64_IMM14
: new = BFD_RELOC_IA64_TPREL14
; break;
11154 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_TPREL22
; break;
11155 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_TPREL64I
; break;
11156 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_TPREL64MSB
; break;
11157 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_TPREL64LSB
; break;
11158 default: type
= "TPREL"; break;
11162 case FUNC_LT_TP_RELATIVE
:
11165 case BFD_RELOC_IA64_IMM22
:
11166 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11168 type
= "LTOFF_TPREL"; break;
11172 case FUNC_DTP_MODULE
:
11175 case BFD_RELOC_IA64_DIR64MSB
:
11176 new = BFD_RELOC_IA64_DTPMOD64MSB
; break;
11177 case BFD_RELOC_IA64_DIR64LSB
:
11178 new = BFD_RELOC_IA64_DTPMOD64LSB
; break;
11180 type
= "DTPMOD"; break;
11184 case FUNC_LT_DTP_MODULE
:
11187 case BFD_RELOC_IA64_IMM22
:
11188 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11190 type
= "LTOFF_DTPMOD"; break;
11194 case FUNC_DTP_RELATIVE
:
11197 case BFD_RELOC_IA64_DIR32MSB
:
11198 new = BFD_RELOC_IA64_DTPREL32MSB
; break;
11199 case BFD_RELOC_IA64_DIR32LSB
:
11200 new = BFD_RELOC_IA64_DTPREL32LSB
; break;
11201 case BFD_RELOC_IA64_DIR64MSB
:
11202 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
11203 case BFD_RELOC_IA64_DIR64LSB
:
11204 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
11205 case BFD_RELOC_IA64_IMM14
:
11206 new = BFD_RELOC_IA64_DTPREL14
; break;
11207 case BFD_RELOC_IA64_IMM22
:
11208 new = BFD_RELOC_IA64_DTPREL22
; break;
11209 case BFD_RELOC_IA64_IMM64
:
11210 new = BFD_RELOC_IA64_DTPREL64I
; break;
11212 type
= "DTPREL"; break;
11216 case FUNC_LT_DTP_RELATIVE
:
11219 case BFD_RELOC_IA64_IMM22
:
11220 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11222 type
= "LTOFF_DTPREL"; break;
11226 case FUNC_IPLT_RELOC
:
11229 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11230 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11231 default: type
= "IPLT"; break;
11249 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11250 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11251 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11252 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11253 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11254 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11255 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11259 /* This should be an error, but since previously there wasn't any
11260 diagnostic here, dont't make it fail because of this for now. */
11261 as_warn ("Cannot express %s%d%s relocation", type
, width
, suffix
);
11266 /* Here is where generate the appropriate reloc for pseudo relocation
11269 ia64_validate_fix (fix
)
11272 switch (fix
->fx_r_type
)
11274 case BFD_RELOC_IA64_FPTR64I
:
11275 case BFD_RELOC_IA64_FPTR32MSB
:
11276 case BFD_RELOC_IA64_FPTR64LSB
:
11277 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11278 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11279 if (fix
->fx_offset
!= 0)
11280 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11281 "No addend allowed in @fptr() relocation");
11289 fix_insn (fix
, odesc
, value
)
11291 const struct ia64_operand
*odesc
;
11294 bfd_vma insn
[3], t0
, t1
, control_bits
;
11299 slot
= fix
->fx_where
& 0x3;
11300 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11302 /* Bundles are always in little-endian byte order */
11303 t0
= bfd_getl64 (fixpos
);
11304 t1
= bfd_getl64 (fixpos
+ 8);
11305 control_bits
= t0
& 0x1f;
11306 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11307 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11308 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11311 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11313 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11314 insn
[2] |= (((value
& 0x7f) << 13)
11315 | (((value
>> 7) & 0x1ff) << 27)
11316 | (((value
>> 16) & 0x1f) << 22)
11317 | (((value
>> 21) & 0x1) << 21)
11318 | (((value
>> 63) & 0x1) << 36));
11320 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11322 if (value
& ~0x3fffffffffffffffULL
)
11323 err
= "integer operand out of range";
11324 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11325 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11327 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11330 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11331 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11332 | (((value
>> 0) & 0xfffff) << 13));
11335 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11338 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
11340 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11341 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11342 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11343 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11346 /* Attempt to simplify or even eliminate a fixup. The return value is
11347 ignored; perhaps it was once meaningful, but now it is historical.
11348 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11350 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11354 md_apply_fix3 (fix
, valP
, seg
)
11357 segT seg ATTRIBUTE_UNUSED
;
11360 valueT value
= *valP
;
11362 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11366 switch (fix
->fx_r_type
)
11368 case BFD_RELOC_IA64_PCREL21B
: break;
11369 case BFD_RELOC_IA64_PCREL21BI
: break;
11370 case BFD_RELOC_IA64_PCREL21F
: break;
11371 case BFD_RELOC_IA64_PCREL21M
: break;
11372 case BFD_RELOC_IA64_PCREL60B
: break;
11373 case BFD_RELOC_IA64_PCREL22
: break;
11374 case BFD_RELOC_IA64_PCREL64I
: break;
11375 case BFD_RELOC_IA64_PCREL32MSB
: break;
11376 case BFD_RELOC_IA64_PCREL32LSB
: break;
11377 case BFD_RELOC_IA64_PCREL64MSB
: break;
11378 case BFD_RELOC_IA64_PCREL64LSB
: break;
11380 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11387 switch (fix
->fx_r_type
)
11389 case BFD_RELOC_UNUSED
:
11390 /* This must be a TAG13 or TAG13b operand. There are no external
11391 relocs defined for them, so we must give an error. */
11392 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11393 "%s must have a constant value",
11394 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11398 case BFD_RELOC_IA64_TPREL14
:
11399 case BFD_RELOC_IA64_TPREL22
:
11400 case BFD_RELOC_IA64_TPREL64I
:
11401 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11402 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11403 case BFD_RELOC_IA64_DTPREL14
:
11404 case BFD_RELOC_IA64_DTPREL22
:
11405 case BFD_RELOC_IA64_DTPREL64I
:
11406 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11407 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11414 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11416 if (fix
->tc_fix_data
.bigendian
)
11417 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11419 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11424 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11429 /* Generate the BFD reloc to be stuck in the object file from the
11430 fixup used internally in the assembler. */
11433 tc_gen_reloc (sec
, fixp
)
11434 asection
*sec ATTRIBUTE_UNUSED
;
11439 reloc
= xmalloc (sizeof (*reloc
));
11440 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11441 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11442 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11443 reloc
->addend
= fixp
->fx_offset
;
11444 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11448 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11449 "Cannot represent %s relocation in object file",
11450 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11455 /* Turn a string in input_line_pointer into a floating point constant
11456 of type TYPE, and store the appropriate bytes in *LIT. The number
11457 of LITTLENUMS emitted is stored in *SIZE. An error message is
11458 returned, or NULL on OK. */
11460 #define MAX_LITTLENUMS 5
11463 md_atof (type
, lit
, size
)
11468 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11498 return "Bad call to MD_ATOF()";
11500 t
= atof_ieee (input_line_pointer
, type
, words
);
11502 input_line_pointer
= t
;
11504 (*ia64_float_to_chars
) (lit
, words
, prec
);
11508 /* It is 10 byte floating point with 6 byte padding. */
11509 memset (&lit
[10], 0, 6);
11510 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11513 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11518 /* Handle ia64 specific semantics of the align directive. */
11521 ia64_md_do_align (n
, fill
, len
, max
)
11522 int n ATTRIBUTE_UNUSED
;
11523 const char *fill ATTRIBUTE_UNUSED
;
11524 int len ATTRIBUTE_UNUSED
;
11525 int max ATTRIBUTE_UNUSED
;
11527 if (subseg_text_p (now_seg
))
11528 ia64_flush_insns ();
11531 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11532 of an rs_align_code fragment. */
11535 ia64_handle_align (fragp
)
11540 const unsigned char *nop
;
11542 if (fragp
->fr_type
!= rs_align_code
)
11545 /* Check if this frag has to end with a stop bit. */
11546 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11548 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11549 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11551 /* If no paddings are needed, we check if we need a stop bit. */
11552 if (!bytes
&& fragp
->tc_frag_data
)
11554 if (fragp
->fr_fix
< 16)
11556 /* FIXME: It won't work with
11558 alloc r32=ar.pfs,1,2,4,0
11562 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11563 _("Can't add stop bit to mark end of instruction group"));
11566 /* Bundles are always in little-endian byte order. Make sure
11567 the previous bundle has the stop bit. */
11571 /* Make sure we are on a 16-byte boundary, in case someone has been
11572 putting data into a text section. */
11575 int fix
= bytes
& 15;
11576 memset (p
, 0, fix
);
11579 fragp
->fr_fix
+= fix
;
11582 /* Instruction bundles are always little-endian. */
11583 memcpy (p
, nop
, 16);
11584 fragp
->fr_var
= 16;
11588 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11593 number_to_chars_bigendian (lit
, (long) (*words
++),
11594 sizeof (LITTLENUM_TYPE
));
11595 lit
+= sizeof (LITTLENUM_TYPE
);
11600 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11605 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11606 sizeof (LITTLENUM_TYPE
));
11607 lit
+= sizeof (LITTLENUM_TYPE
);
11612 ia64_elf_section_change_hook (void)
11614 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11615 && elf_linked_to_section (now_seg
) == NULL
)
11616 elf_linked_to_section (now_seg
) = text_section
;
11617 dot_byteorder (-1);
11620 /* Check if a label should be made global. */
11622 ia64_check_label (symbolS
*label
)
11624 if (*input_line_pointer
== ':')
11626 S_SET_EXTERNAL (label
);
11627 input_line_pointer
++;
11631 /* Used to remember where .alias and .secalias directives are seen. We
11632 will rename symbol and section names when we are about to output
11633 the relocatable file. */
11636 char *file
; /* The file where the directive is seen. */
11637 unsigned int line
; /* The line number the directive is at. */
11638 const char *name
; /* The orignale name of the symbol. */
11641 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11642 .secalias. Otherwise, it is .alias. */
11644 dot_alias (int section
)
11646 char *name
, *alias
;
11650 const char *error_string
;
11653 struct hash_control
*ahash
, *nhash
;
11656 name
= input_line_pointer
;
11657 delim
= get_symbol_end ();
11658 end_name
= input_line_pointer
;
11661 if (name
== end_name
)
11663 as_bad (_("expected symbol name"));
11664 discard_rest_of_line ();
11668 SKIP_WHITESPACE ();
11670 if (*input_line_pointer
!= ',')
11673 as_bad (_("expected comma after \"%s\""), name
);
11675 ignore_rest_of_line ();
11679 input_line_pointer
++;
11681 ia64_canonicalize_symbol_name (name
);
11683 /* We call demand_copy_C_string to check if alias string is valid.
11684 There should be a closing `"' and no `\0' in the string. */
11685 alias
= demand_copy_C_string (&len
);
11688 ignore_rest_of_line ();
11692 /* Make a copy of name string. */
11693 len
= strlen (name
) + 1;
11694 obstack_grow (¬es
, name
, len
);
11695 name
= obstack_finish (¬es
);
11700 ahash
= secalias_hash
;
11701 nhash
= secalias_name_hash
;
11706 ahash
= alias_hash
;
11707 nhash
= alias_name_hash
;
11710 /* Check if alias has been used before. */
11711 h
= (struct alias
*) hash_find (ahash
, alias
);
11714 if (strcmp (h
->name
, name
))
11715 as_bad (_("`%s' is already the alias of %s `%s'"),
11716 alias
, kind
, h
->name
);
11720 /* Check if name already has an alias. */
11721 a
= (const char *) hash_find (nhash
, name
);
11724 if (strcmp (a
, alias
))
11725 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11729 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11730 as_where (&h
->file
, &h
->line
);
11733 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11736 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11737 alias
, kind
, error_string
);
11741 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11744 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11745 alias
, kind
, error_string
);
11747 obstack_free (¬es
, name
);
11748 obstack_free (¬es
, alias
);
11751 demand_empty_rest_of_line ();
11754 /* It renames the original symbol name to its alias. */
11756 do_alias (const char *alias
, PTR value
)
11758 struct alias
*h
= (struct alias
*) value
;
11759 symbolS
*sym
= symbol_find (h
->name
);
11762 as_warn_where (h
->file
, h
->line
,
11763 _("symbol `%s' aliased to `%s' is not used"),
11766 S_SET_NAME (sym
, (char *) alias
);
11769 /* Called from write_object_file. */
11771 ia64_adjust_symtab (void)
11773 hash_traverse (alias_hash
, do_alias
);
11776 /* It renames the original section name to its alias. */
11778 do_secalias (const char *alias
, PTR value
)
11780 struct alias
*h
= (struct alias
*) value
;
11781 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11784 as_warn_where (h
->file
, h
->line
,
11785 _("section `%s' aliased to `%s' is not used"),
11791 /* Called from write_object_file. */
11793 ia64_frob_file (void)
11795 hash_traverse (secalias_hash
, do_secalias
);