1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
58 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
60 /* Some systems define MIN in, e.g., param.h. */
62 #define MIN(a,b) ((a) < (b) ? (a) : (b))
65 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66 #define CURR_SLOT md.slot[md.curr_slot]
68 #define O_pseudo_fixup (O_max + 1)
72 /* IA-64 ABI section pseudo-ops. */
73 SPECIAL_SECTION_BSS
= 0,
75 SPECIAL_SECTION_SDATA
,
76 SPECIAL_SECTION_RODATA
,
77 SPECIAL_SECTION_COMMENT
,
78 SPECIAL_SECTION_UNWIND
,
79 SPECIAL_SECTION_UNWIND_INFO
,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY
,
82 SPECIAL_SECTION_FINI_ARRAY
,
99 FUNC_LT_FPTR_RELATIVE
,
101 FUNC_LT_DTP_RELATIVE
,
109 REG_FR
= (REG_GR
+ 128),
110 REG_AR
= (REG_FR
+ 128),
111 REG_CR
= (REG_AR
+ 128),
112 REG_P
= (REG_CR
+ 128),
113 REG_BR
= (REG_P
+ 64),
114 REG_IP
= (REG_BR
+ 8),
121 /* The following are pseudo-registers for use by gas only. */
133 /* The following pseudo-registers are used for unwind directives only: */
141 DYNREG_GR
= 0, /* dynamic general purpose register */
142 DYNREG_FR
, /* dynamic floating point register */
143 DYNREG_PR
, /* dynamic predicate register */
147 enum operand_match_result
150 OPERAND_OUT_OF_RANGE
,
154 /* On the ia64, we can't know the address of a text label until the
155 instructions are packed into a bundle. To handle this, we keep
156 track of the list of labels that appear in front of each
160 struct label_fix
*next
;
164 /* This is the endianness of the current section. */
165 extern int target_big_endian
;
167 /* This is the default endianness. */
168 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
170 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
172 static void ia64_float_to_chars_bigendian
173 PARAMS ((char *, LITTLENUM_TYPE
*, int));
174 static void ia64_float_to_chars_littleendian
175 PARAMS ((char *, LITTLENUM_TYPE
*, int));
176 static void (*ia64_float_to_chars
)
177 PARAMS ((char *, LITTLENUM_TYPE
*, int));
179 static struct hash_control
*alias_hash
;
180 static struct hash_control
*alias_name_hash
;
181 static struct hash_control
*secalias_hash
;
182 static struct hash_control
*secalias_name_hash
;
184 /* List of chars besides those in app.c:symbol_chars that can start an
185 operand. Used to prevent the scrubber eating vital white-space. */
186 const char ia64_symbol_chars
[] = "@?";
188 /* Characters which always start a comment. */
189 const char comment_chars
[] = "";
191 /* Characters which start a comment at the beginning of a line. */
192 const char line_comment_chars
[] = "#";
194 /* Characters which may be used to separate multiple commands on a
196 const char line_separator_chars
[] = ";";
198 /* Characters which are used to indicate an exponent in a floating
200 const char EXP_CHARS
[] = "eE";
202 /* Characters which mean that a number is a floating point constant,
204 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
206 /* ia64-specific option processing: */
208 const char *md_shortopts
= "m:N:x::";
210 struct option md_longopts
[] =
212 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
213 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
214 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
215 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
218 size_t md_longopts_size
= sizeof (md_longopts
);
222 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
223 struct hash_control
*reg_hash
; /* register name hash table */
224 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
225 struct hash_control
*const_hash
; /* constant hash table */
226 struct hash_control
*entry_hash
; /* code entry hint hash table */
228 symbolS
*regsym
[REG_NUM
];
230 /* If X_op is != O_absent, the registername for the instruction's
231 qualifying predicate. If NULL, p0 is assumed for instructions
232 that are predicatable. */
235 /* Optimize for which CPU. */
242 /* What to do when hint.b is used. */
254 explicit_mode
: 1, /* which mode we're in */
255 default_explicit_mode
: 1, /* which mode is the default */
256 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
258 keep_pending_output
: 1;
260 /* What to do when something is wrong with unwind directives. */
263 unwind_check_warning
,
267 /* Each bundle consists of up to three instructions. We keep
268 track of four most recent instructions so we can correctly set
269 the end_of_insn_group for the last instruction in a bundle. */
271 int num_slots_in_use
;
275 end_of_insn_group
: 1,
276 manual_bundling_on
: 1,
277 manual_bundling_off
: 1,
278 loc_directive_seen
: 1;
279 signed char user_template
; /* user-selected template, if any */
280 unsigned char qp_regno
; /* qualifying predicate */
281 /* This duplicates a good fraction of "struct fix" but we
282 can't use a "struct fix" instead since we can't call
283 fix_new_exp() until we know the address of the instruction. */
287 bfd_reloc_code_real_type code
;
288 enum ia64_opnd opnd
; /* type of operand in need of fix */
289 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
290 expressionS expr
; /* the value to be inserted */
292 fixup
[2]; /* at most two fixups per insn */
293 struct ia64_opcode
*idesc
;
294 struct label_fix
*label_fixups
;
295 struct label_fix
*tag_fixups
;
296 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
299 unsigned int src_line
;
300 struct dwarf2_line_info debug_line
;
308 struct dynreg
*next
; /* next dynamic register */
310 unsigned short base
; /* the base register number */
311 unsigned short num_regs
; /* # of registers in this set */
313 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
315 flagword flags
; /* ELF-header flags */
318 unsigned hint
:1; /* is this hint currently valid? */
319 bfd_vma offset
; /* mem.offset offset */
320 bfd_vma base
; /* mem.offset base */
323 int path
; /* number of alt. entry points seen */
324 const char **entry_labels
; /* labels of all alternate paths in
325 the current DV-checking block. */
326 int maxpaths
; /* size currently allocated for
329 int pointer_size
; /* size in bytes of a pointer */
330 int pointer_size_shift
; /* shift size of a pointer for alignment */
334 /* These are not const, because they are modified to MMI for non-itanium1
336 /* MFI bundle of nops. */
337 static unsigned char le_nop
[16] =
339 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
340 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
342 /* MFI bundle of nops with stop-bit. */
343 static unsigned char le_nop_stop
[16] =
345 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
349 /* application registers: */
355 #define AR_BSPSTORE 18
370 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
371 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
372 {"ar.rsc", 16}, {"ar.bsp", 17},
373 {"ar.bspstore", 18}, {"ar.rnat", 19},
374 {"ar.fcr", 21}, {"ar.eflag", 24},
375 {"ar.csd", 25}, {"ar.ssd", 26},
376 {"ar.cflg", 27}, {"ar.fsr", 28},
377 {"ar.fir", 29}, {"ar.fdr", 30},
378 {"ar.ccv", 32}, {"ar.unat", 36},
379 {"ar.fpsr", 40}, {"ar.itc", 44},
380 {"ar.pfs", 64}, {"ar.lc", 65},
401 /* control registers: */
443 static const struct const_desc
450 /* PSR constant masks: */
453 {"psr.be", ((valueT
) 1) << 1},
454 {"psr.up", ((valueT
) 1) << 2},
455 {"psr.ac", ((valueT
) 1) << 3},
456 {"psr.mfl", ((valueT
) 1) << 4},
457 {"psr.mfh", ((valueT
) 1) << 5},
459 {"psr.ic", ((valueT
) 1) << 13},
460 {"psr.i", ((valueT
) 1) << 14},
461 {"psr.pk", ((valueT
) 1) << 15},
463 {"psr.dt", ((valueT
) 1) << 17},
464 {"psr.dfl", ((valueT
) 1) << 18},
465 {"psr.dfh", ((valueT
) 1) << 19},
466 {"psr.sp", ((valueT
) 1) << 20},
467 {"psr.pp", ((valueT
) 1) << 21},
468 {"psr.di", ((valueT
) 1) << 22},
469 {"psr.si", ((valueT
) 1) << 23},
470 {"psr.db", ((valueT
) 1) << 24},
471 {"psr.lp", ((valueT
) 1) << 25},
472 {"psr.tb", ((valueT
) 1) << 26},
473 {"psr.rt", ((valueT
) 1) << 27},
474 /* 28-31: reserved */
475 /* 32-33: cpl (current privilege level) */
476 {"psr.is", ((valueT
) 1) << 34},
477 {"psr.mc", ((valueT
) 1) << 35},
478 {"psr.it", ((valueT
) 1) << 36},
479 {"psr.id", ((valueT
) 1) << 37},
480 {"psr.da", ((valueT
) 1) << 38},
481 {"psr.dd", ((valueT
) 1) << 39},
482 {"psr.ss", ((valueT
) 1) << 40},
483 /* 41-42: ri (restart instruction) */
484 {"psr.ed", ((valueT
) 1) << 43},
485 {"psr.bn", ((valueT
) 1) << 44},
488 /* indirect register-sets/memory: */
497 { "CPUID", IND_CPUID
},
498 { "cpuid", IND_CPUID
},
510 /* Pseudo functions used to indicate relocation types (these functions
511 start with an at sign (@). */
533 /* reloc pseudo functions (these must come first!): */
534 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
535 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
536 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
537 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
538 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
539 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
540 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
541 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
542 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
543 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
544 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
545 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
546 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
547 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
548 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
549 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
550 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
552 /* mbtype4 constants: */
553 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
554 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
555 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
556 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
557 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
559 /* fclass constants: */
560 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
561 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
562 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
563 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
564 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
565 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
566 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
567 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
568 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
570 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
572 /* hint constants: */
573 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
575 /* unwind-related constants: */
576 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
577 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
578 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
579 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
580 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
581 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
582 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
584 /* unwind-related registers: */
585 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
588 /* 41-bit nop opcodes (one per unit): */
589 static const bfd_vma nop
[IA64_NUM_UNITS
] =
591 0x0000000000LL
, /* NIL => break 0 */
592 0x0008000000LL
, /* I-unit nop */
593 0x0008000000LL
, /* M-unit nop */
594 0x4000000000LL
, /* B-unit nop */
595 0x0008000000LL
, /* F-unit nop */
596 0x0008000000LL
, /* L-"unit" nop */
597 0x0008000000LL
, /* X-unit nop */
600 /* Can't be `const' as it's passed to input routines (which have the
601 habit of setting temporary sentinels. */
602 static char special_section_name
[][20] =
604 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
605 {".IA_64.unwind"}, {".IA_64.unwind_info"},
606 {".init_array"}, {".fini_array"}
609 /* The best template for a particular sequence of up to three
611 #define N IA64_NUM_TYPES
612 static unsigned char best_template
[N
][N
][N
];
615 /* Resource dependencies currently in effect */
617 int depind
; /* dependency index */
618 const struct ia64_dependency
*dependency
; /* actual dependency */
619 unsigned specific
:1, /* is this a specific bit/regno? */
620 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
621 int index
; /* specific regno/bit within dependency */
622 int note
; /* optional qualifying note (0 if none) */
626 int insn_srlz
; /* current insn serialization state */
627 int data_srlz
; /* current data serialization state */
628 int qp_regno
; /* qualifying predicate for this usage */
629 char *file
; /* what file marked this dependency */
630 unsigned int line
; /* what line marked this dependency */
631 struct mem_offset mem_offset
; /* optional memory offset hint */
632 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
633 int path
; /* corresponding code entry index */
635 static int regdepslen
= 0;
636 static int regdepstotlen
= 0;
637 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
638 static const char *dv_sem
[] = { "none", "implied", "impliedf",
639 "data", "instr", "specific", "stop", "other" };
640 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
642 /* Current state of PR mutexation */
643 static struct qpmutex
{
646 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
647 static int qp_mutexeslen
= 0;
648 static int qp_mutexestotlen
= 0;
649 static valueT qp_safe_across_calls
= 0;
651 /* Current state of PR implications */
652 static struct qp_imply
{
655 unsigned p2_branched
:1;
657 } *qp_implies
= NULL
;
658 static int qp_implieslen
= 0;
659 static int qp_impliestotlen
= 0;
661 /* Keep track of static GR values so that indirect register usage can
662 sometimes be tracked. */
673 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
679 /* Remember the alignment frag. */
680 static fragS
*align_frag
;
682 /* These are the routines required to output the various types of
685 /* A slot_number is a frag address plus the slot index (0-2). We use the
686 frag address here so that if there is a section switch in the middle of
687 a function, then instructions emitted to a different section are not
688 counted. Since there may be more than one frag for a function, this
689 means we also need to keep track of which frag this address belongs to
690 so we can compute inter-frag distances. This also nicely solves the
691 problem with nops emitted for align directives, which can't easily be
692 counted, but can easily be derived from frag sizes. */
694 typedef struct unw_rec_list
{
696 unsigned long slot_number
;
698 unsigned long next_slot_number
;
699 fragS
*next_slot_frag
;
700 struct unw_rec_list
*next
;
703 #define SLOT_NUM_NOT_SET (unsigned)-1
705 /* Linked list of saved prologue counts. A very poor
706 implementation of a map from label numbers to prologue counts. */
707 typedef struct label_prologue_count
709 struct label_prologue_count
*next
;
710 unsigned long label_number
;
711 unsigned int prologue_count
;
712 } label_prologue_count
;
716 /* Maintain a list of unwind entries for the current function. */
720 /* Any unwind entires that should be attached to the current slot
721 that an insn is being constructed for. */
722 unw_rec_list
*current_entry
;
724 /* These are used to create the unwind table entry for this function. */
726 symbolS
*info
; /* pointer to unwind info */
727 symbolS
*personality_routine
;
729 subsegT saved_text_subseg
;
730 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
732 /* TRUE if processing unwind directives in a prologue region. */
733 unsigned int prologue
: 1;
734 unsigned int prologue_mask
: 4;
735 unsigned int body
: 1;
736 unsigned int insn
: 1;
737 unsigned int prologue_count
; /* number of .prologues seen so far */
738 /* Prologue counts at previous .label_state directives. */
739 struct label_prologue_count
* saved_prologue_counts
;
742 /* The input value is a negated offset from psp, and specifies an address
743 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
744 must add 16 and divide by 4 to get the encoded value. */
746 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
748 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
750 /* Forward declarations: */
751 static void set_section
PARAMS ((char *name
));
752 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
753 unsigned int, unsigned int));
754 static void dot_align (int);
755 static void dot_radix
PARAMS ((int));
756 static void dot_special_section
PARAMS ((int));
757 static void dot_proc
PARAMS ((int));
758 static void dot_fframe
PARAMS ((int));
759 static void dot_vframe
PARAMS ((int));
760 static void dot_vframesp
PARAMS ((int));
761 static void dot_vframepsp
PARAMS ((int));
762 static void dot_save
PARAMS ((int));
763 static void dot_restore
PARAMS ((int));
764 static void dot_restorereg
PARAMS ((int));
765 static void dot_restorereg_p
PARAMS ((int));
766 static void dot_handlerdata
PARAMS ((int));
767 static void dot_unwentry
PARAMS ((int));
768 static void dot_altrp
PARAMS ((int));
769 static void dot_savemem
PARAMS ((int));
770 static void dot_saveg
PARAMS ((int));
771 static void dot_savef
PARAMS ((int));
772 static void dot_saveb
PARAMS ((int));
773 static void dot_savegf
PARAMS ((int));
774 static void dot_spill
PARAMS ((int));
775 static void dot_spillreg
PARAMS ((int));
776 static void dot_spillmem
PARAMS ((int));
777 static void dot_spillreg_p
PARAMS ((int));
778 static void dot_spillmem_p
PARAMS ((int));
779 static void dot_label_state
PARAMS ((int));
780 static void dot_copy_state
PARAMS ((int));
781 static void dot_unwabi
PARAMS ((int));
782 static void dot_personality
PARAMS ((int));
783 static void dot_body
PARAMS ((int));
784 static void dot_prologue
PARAMS ((int));
785 static void dot_endp
PARAMS ((int));
786 static void dot_template
PARAMS ((int));
787 static void dot_regstk
PARAMS ((int));
788 static void dot_rot
PARAMS ((int));
789 static void dot_byteorder
PARAMS ((int));
790 static void dot_psr
PARAMS ((int));
791 static void dot_alias
PARAMS ((int));
792 static void dot_ln
PARAMS ((int));
793 static void cross_section
PARAMS ((int ref
, void (*cons
) PARAMS((int)), int ua
));
794 static void dot_xdata
PARAMS ((int));
795 static void stmt_float_cons
PARAMS ((int));
796 static void stmt_cons_ua
PARAMS ((int));
797 static void dot_xfloat_cons
PARAMS ((int));
798 static void dot_xstringer
PARAMS ((int));
799 static void dot_xdata_ua
PARAMS ((int));
800 static void dot_xfloat_cons_ua
PARAMS ((int));
801 static void print_prmask
PARAMS ((valueT mask
));
802 static void dot_pred_rel
PARAMS ((int));
803 static void dot_reg_val
PARAMS ((int));
804 static void dot_serialize
PARAMS ((int));
805 static void dot_dv_mode
PARAMS ((int));
806 static void dot_entry
PARAMS ((int));
807 static void dot_mem_offset
PARAMS ((int));
808 static void add_unwind_entry
PARAMS((unw_rec_list
*ptr
));
809 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
810 static void declare_register_set
PARAMS ((const char *, int, int));
811 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
812 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
815 static int parse_operand
PARAMS ((expressionS
*e
));
816 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
817 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
818 static void emit_one_bundle
PARAMS ((void));
819 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
820 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
821 bfd_reloc_code_real_type r_type
));
822 static void insn_group_break
PARAMS ((int, int, int));
823 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
824 struct rsrc
*, int depind
, int path
));
825 static void add_qp_mutex
PARAMS((valueT mask
));
826 static void add_qp_imply
PARAMS((int p1
, int p2
));
827 static void clear_qp_branch_flag
PARAMS((valueT mask
));
828 static void clear_qp_mutex
PARAMS((valueT mask
));
829 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
830 static int has_suffix_p
PARAMS((const char *, const char *));
831 static void clear_register_values
PARAMS ((void));
832 static void print_dependency
PARAMS ((const char *action
, int depind
));
833 static void instruction_serialization
PARAMS ((void));
834 static void data_serialization
PARAMS ((void));
835 static void remove_marked_resource
PARAMS ((struct rsrc
*));
836 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
837 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
838 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
839 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
840 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
841 struct ia64_opcode
*, int, struct rsrc
[], int, int));
842 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
843 static void check_dependencies
PARAMS((struct ia64_opcode
*));
844 static void mark_resources
PARAMS((struct ia64_opcode
*));
845 static void update_dependencies
PARAMS((struct ia64_opcode
*));
846 static void note_register_values
PARAMS((struct ia64_opcode
*));
847 static int qp_mutex
PARAMS ((int, int, int));
848 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
849 static void output_vbyte_mem
PARAMS ((int, char *, char *));
850 static void count_output
PARAMS ((int, char *, char *));
851 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
852 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
853 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
854 static void output_P1_format
PARAMS ((vbyte_func
, int));
855 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
856 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
857 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
858 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
859 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
860 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
861 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
862 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
863 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
864 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
865 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
866 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
867 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
868 static char format_ab_reg
PARAMS ((int, int));
869 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
871 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
872 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
874 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
875 static unw_rec_list
*output_endp
PARAMS ((void));
876 static unw_rec_list
*output_prologue
PARAMS ((void));
877 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
878 static unw_rec_list
*output_body
PARAMS ((void));
879 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
880 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
881 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
882 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
883 static unw_rec_list
*output_rp_when
PARAMS ((void));
884 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
885 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
886 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
887 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
888 static unw_rec_list
*output_pfs_when
PARAMS ((void));
889 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
890 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
891 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
892 static unw_rec_list
*output_preds_when
PARAMS ((void));
893 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
894 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
895 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
896 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
897 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
898 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
899 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
900 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
901 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
902 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
903 static unw_rec_list
*output_unat_when
PARAMS ((void));
904 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
905 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
906 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
907 static unw_rec_list
*output_lc_when
PARAMS ((void));
908 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
909 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
910 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
911 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
912 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
913 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
914 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
915 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
916 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
917 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
918 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
919 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
920 static unw_rec_list
*output_bsp_when
PARAMS ((void));
921 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
922 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
923 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
924 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
925 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
926 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
927 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
928 static unw_rec_list
*output_rnat_when
PARAMS ((void));
929 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
930 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
931 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
932 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
933 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
934 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
935 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
936 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int));
937 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int));
938 static unw_rec_list
*output_spill_psprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
940 static unw_rec_list
*output_spill_sprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
942 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
944 static unw_rec_list
*output_spill_reg_p
PARAMS ((unsigned int, unsigned int, unsigned int,
945 unsigned int, unsigned int));
946 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
947 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
948 static int calc_record_size
PARAMS ((unw_rec_list
*));
949 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
950 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
951 unsigned long, fragS
*,
953 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
954 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
955 static int convert_expr_to_ab_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
956 static int convert_expr_to_xy_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
957 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
958 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
959 static void free_saved_prologue_counts
PARAMS ((void));
961 /* Determine if application register REGNUM resides only in the integer
962 unit (as opposed to the memory unit). */
964 ar_is_only_in_integer_unit (int reg
)
967 return reg
>= 64 && reg
<= 111;
970 /* Determine if application register REGNUM resides only in the memory
971 unit (as opposed to the integer unit). */
973 ar_is_only_in_memory_unit (int reg
)
976 return reg
>= 0 && reg
<= 47;
979 /* Switch to section NAME and create section if necessary. It's
980 rather ugly that we have to manipulate input_line_pointer but I
981 don't see any other way to accomplish the same thing without
982 changing obj-elf.c (which may be the Right Thing, in the end). */
987 char *saved_input_line_pointer
;
989 saved_input_line_pointer
= input_line_pointer
;
990 input_line_pointer
= name
;
992 input_line_pointer
= saved_input_line_pointer
;
995 /* Map 's' to SHF_IA_64_SHORT. */
998 ia64_elf_section_letter (letter
, ptr_msg
)
1003 return SHF_IA_64_SHORT
;
1004 else if (letter
== 'o')
1005 return SHF_LINK_ORDER
;
1007 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1011 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1014 ia64_elf_section_flags (flags
, attr
, type
)
1016 int attr
, type ATTRIBUTE_UNUSED
;
1018 if (attr
& SHF_IA_64_SHORT
)
1019 flags
|= SEC_SMALL_DATA
;
1024 ia64_elf_section_type (str
, len
)
1028 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1030 if (STREQ (ELF_STRING_ia64_unwind_info
))
1031 return SHT_PROGBITS
;
1033 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
1034 return SHT_PROGBITS
;
1036 if (STREQ (ELF_STRING_ia64_unwind
))
1037 return SHT_IA_64_UNWIND
;
1039 if (STREQ (ELF_STRING_ia64_unwind_once
))
1040 return SHT_IA_64_UNWIND
;
1042 if (STREQ ("unwind"))
1043 return SHT_IA_64_UNWIND
;
1050 set_regstack (ins
, locs
, outs
, rots
)
1051 unsigned int ins
, locs
, outs
, rots
;
1053 /* Size of frame. */
1056 sof
= ins
+ locs
+ outs
;
1059 as_bad ("Size of frame exceeds maximum of 96 registers");
1064 as_warn ("Size of rotating registers exceeds frame size");
1067 md
.in
.base
= REG_GR
+ 32;
1068 md
.loc
.base
= md
.in
.base
+ ins
;
1069 md
.out
.base
= md
.loc
.base
+ locs
;
1071 md
.in
.num_regs
= ins
;
1072 md
.loc
.num_regs
= locs
;
1073 md
.out
.num_regs
= outs
;
1074 md
.rot
.num_regs
= rots
;
1081 struct label_fix
*lfix
;
1083 subsegT saved_subseg
;
1086 if (!md
.last_text_seg
)
1089 saved_seg
= now_seg
;
1090 saved_subseg
= now_subseg
;
1092 subseg_set (md
.last_text_seg
, 0);
1094 while (md
.num_slots_in_use
> 0)
1095 emit_one_bundle (); /* force out queued instructions */
1097 /* In case there are labels following the last instruction, resolve
1099 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1101 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1102 symbol_set_frag (lfix
->sym
, frag_now
);
1104 CURR_SLOT
.label_fixups
= 0;
1105 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1107 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1108 symbol_set_frag (lfix
->sym
, frag_now
);
1110 CURR_SLOT
.tag_fixups
= 0;
1112 /* In case there are unwind directives following the last instruction,
1113 resolve those now. We only handle prologue, body, and endp directives
1114 here. Give an error for others. */
1115 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1117 switch (ptr
->r
.type
)
1123 ptr
->slot_number
= (unsigned long) frag_more (0);
1124 ptr
->slot_frag
= frag_now
;
1127 /* Allow any record which doesn't have a "t" field (i.e.,
1128 doesn't relate to a particular instruction). */
1144 as_bad (_("Unwind directive not followed by an instruction."));
1148 unwind
.current_entry
= NULL
;
1150 subseg_set (saved_seg
, saved_subseg
);
1152 if (md
.qp
.X_op
== O_register
)
1153 as_bad ("qualifying predicate not followed by instruction");
1157 ia64_do_align (int nbytes
)
1159 char *saved_input_line_pointer
= input_line_pointer
;
1161 input_line_pointer
= "";
1162 s_align_bytes (nbytes
);
1163 input_line_pointer
= saved_input_line_pointer
;
1167 ia64_cons_align (nbytes
)
1172 char *saved_input_line_pointer
= input_line_pointer
;
1173 input_line_pointer
= "";
1174 s_align_bytes (nbytes
);
1175 input_line_pointer
= saved_input_line_pointer
;
1179 /* Output COUNT bytes to a memory location. */
1180 static char *vbyte_mem_ptr
= NULL
;
1183 output_vbyte_mem (count
, ptr
, comment
)
1186 char *comment ATTRIBUTE_UNUSED
;
1189 if (vbyte_mem_ptr
== NULL
)
1194 for (x
= 0; x
< count
; x
++)
1195 *(vbyte_mem_ptr
++) = ptr
[x
];
1198 /* Count the number of bytes required for records. */
1199 static int vbyte_count
= 0;
1201 count_output (count
, ptr
, comment
)
1203 char *ptr ATTRIBUTE_UNUSED
;
1204 char *comment ATTRIBUTE_UNUSED
;
1206 vbyte_count
+= count
;
1210 output_R1_format (f
, rtype
, rlen
)
1212 unw_record_type rtype
;
1219 output_R3_format (f
, rtype
, rlen
);
1225 else if (rtype
!= prologue
)
1226 as_bad ("record type is not valid");
1228 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1229 (*f
) (1, &byte
, NULL
);
1233 output_R2_format (f
, mask
, grsave
, rlen
)
1240 mask
= (mask
& 0x0f);
1241 grsave
= (grsave
& 0x7f);
1243 bytes
[0] = (UNW_R2
| (mask
>> 1));
1244 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1245 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1246 (*f
) (count
, bytes
, NULL
);
1250 output_R3_format (f
, rtype
, rlen
)
1252 unw_record_type rtype
;
1259 output_R1_format (f
, rtype
, rlen
);
1265 else if (rtype
!= prologue
)
1266 as_bad ("record type is not valid");
1267 bytes
[0] = (UNW_R3
| r
);
1268 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1269 (*f
) (count
+ 1, bytes
, NULL
);
1273 output_P1_format (f
, brmask
)
1278 byte
= UNW_P1
| (brmask
& 0x1f);
1279 (*f
) (1, &byte
, NULL
);
1283 output_P2_format (f
, brmask
, gr
)
1289 brmask
= (brmask
& 0x1f);
1290 bytes
[0] = UNW_P2
| (brmask
>> 1);
1291 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1292 (*f
) (2, bytes
, NULL
);
1296 output_P3_format (f
, rtype
, reg
)
1298 unw_record_type rtype
;
1343 as_bad ("Invalid record type for P3 format.");
1345 bytes
[0] = (UNW_P3
| (r
>> 1));
1346 bytes
[1] = (((r
& 1) << 7) | reg
);
1347 (*f
) (2, bytes
, NULL
);
1351 output_P4_format (f
, imask
, imask_size
)
1353 unsigned char *imask
;
1354 unsigned long imask_size
;
1357 (*f
) (imask_size
, (char *) imask
, NULL
);
1361 output_P5_format (f
, grmask
, frmask
)
1364 unsigned long frmask
;
1367 grmask
= (grmask
& 0x0f);
1370 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1371 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1372 bytes
[3] = (frmask
& 0x000000ff);
1373 (*f
) (4, bytes
, NULL
);
1377 output_P6_format (f
, rtype
, rmask
)
1379 unw_record_type rtype
;
1385 if (rtype
== gr_mem
)
1387 else if (rtype
!= fr_mem
)
1388 as_bad ("Invalid record type for format P6");
1389 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1390 (*f
) (1, &byte
, NULL
);
1394 output_P7_format (f
, rtype
, w1
, w2
)
1396 unw_record_type rtype
;
1403 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1408 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1458 bytes
[0] = (UNW_P7
| r
);
1459 (*f
) (count
, bytes
, NULL
);
1463 output_P8_format (f
, rtype
, t
)
1465 unw_record_type rtype
;
1504 case bspstore_psprel
:
1507 case bspstore_sprel
:
1519 case priunat_when_gr
:
1522 case priunat_psprel
:
1528 case priunat_when_mem
:
1535 count
+= output_leb128 (bytes
+ 2, t
, 0);
1536 (*f
) (count
, bytes
, NULL
);
1540 output_P9_format (f
, grmask
, gr
)
1547 bytes
[1] = (grmask
& 0x0f);
1548 bytes
[2] = (gr
& 0x7f);
1549 (*f
) (3, bytes
, NULL
);
1553 output_P10_format (f
, abi
, context
)
1560 bytes
[1] = (abi
& 0xff);
1561 bytes
[2] = (context
& 0xff);
1562 (*f
) (3, bytes
, NULL
);
1566 output_B1_format (f
, rtype
, label
)
1568 unw_record_type rtype
;
1569 unsigned long label
;
1575 output_B4_format (f
, rtype
, label
);
1578 if (rtype
== copy_state
)
1580 else if (rtype
!= label_state
)
1581 as_bad ("Invalid record type for format B1");
1583 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1584 (*f
) (1, &byte
, NULL
);
1588 output_B2_format (f
, ecount
, t
)
1590 unsigned long ecount
;
1597 output_B3_format (f
, ecount
, t
);
1600 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1601 count
+= output_leb128 (bytes
+ 1, t
, 0);
1602 (*f
) (count
, bytes
, NULL
);
1606 output_B3_format (f
, ecount
, t
)
1608 unsigned long ecount
;
1615 output_B2_format (f
, ecount
, t
);
1619 count
+= output_leb128 (bytes
+ 1, t
, 0);
1620 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1621 (*f
) (count
, bytes
, NULL
);
1625 output_B4_format (f
, rtype
, label
)
1627 unw_record_type rtype
;
1628 unsigned long label
;
1635 output_B1_format (f
, rtype
, label
);
1639 if (rtype
== copy_state
)
1641 else if (rtype
!= label_state
)
1642 as_bad ("Invalid record type for format B1");
1644 bytes
[0] = (UNW_B4
| (r
<< 3));
1645 count
+= output_leb128 (bytes
+ 1, label
, 0);
1646 (*f
) (count
, bytes
, NULL
);
1650 format_ab_reg (ab
, reg
)
1657 ret
= (ab
<< 5) | reg
;
1662 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1664 unw_record_type rtype
;
1674 if (rtype
== spill_sprel
)
1676 else if (rtype
!= spill_psprel
)
1677 as_bad ("Invalid record type for format X1");
1678 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1679 count
+= output_leb128 (bytes
+ 2, t
, 0);
1680 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1681 (*f
) (count
, bytes
, NULL
);
1685 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1694 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1695 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1696 count
+= output_leb128 (bytes
+ 3, t
, 0);
1697 (*f
) (count
, bytes
, NULL
);
1701 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1703 unw_record_type rtype
;
1714 if (rtype
== spill_sprel_p
)
1716 else if (rtype
!= spill_psprel_p
)
1717 as_bad ("Invalid record type for format X3");
1718 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1719 bytes
[2] = format_ab_reg (ab
, reg
);
1720 count
+= output_leb128 (bytes
+ 3, t
, 0);
1721 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1722 (*f
) (count
, bytes
, NULL
);
1726 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1736 bytes
[1] = (qp
& 0x3f);
1737 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1738 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1739 count
+= output_leb128 (bytes
+ 4, t
, 0);
1740 (*f
) (count
, bytes
, NULL
);
1743 /* This function allocates a record list structure, and initializes fields. */
1745 static unw_rec_list
*
1746 alloc_record (unw_record_type t
)
1749 ptr
= xmalloc (sizeof (*ptr
));
1751 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1753 ptr
->next_slot_number
= 0;
1754 ptr
->next_slot_frag
= 0;
1758 /* Dummy unwind record used for calculating the length of the last prologue or
1761 static unw_rec_list
*
1764 unw_rec_list
*ptr
= alloc_record (endp
);
1768 static unw_rec_list
*
1771 unw_rec_list
*ptr
= alloc_record (prologue
);
1772 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1776 static unw_rec_list
*
1777 output_prologue_gr (saved_mask
, reg
)
1778 unsigned int saved_mask
;
1781 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1782 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1783 ptr
->r
.record
.r
.grmask
= saved_mask
;
1784 ptr
->r
.record
.r
.grsave
= reg
;
1788 static unw_rec_list
*
1791 unw_rec_list
*ptr
= alloc_record (body
);
1795 static unw_rec_list
*
1796 output_mem_stack_f (size
)
1799 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1800 ptr
->r
.record
.p
.size
= size
;
1804 static unw_rec_list
*
1805 output_mem_stack_v ()
1807 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1811 static unw_rec_list
*
1815 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1816 ptr
->r
.record
.p
.gr
= gr
;
1820 static unw_rec_list
*
1821 output_psp_sprel (offset
)
1822 unsigned int offset
;
1824 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1825 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1829 static unw_rec_list
*
1832 unw_rec_list
*ptr
= alloc_record (rp_when
);
1836 static unw_rec_list
*
1840 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1841 ptr
->r
.record
.p
.gr
= gr
;
1845 static unw_rec_list
*
1849 unw_rec_list
*ptr
= alloc_record (rp_br
);
1850 ptr
->r
.record
.p
.br
= br
;
1854 static unw_rec_list
*
1855 output_rp_psprel (offset
)
1856 unsigned int offset
;
1858 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1859 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1863 static unw_rec_list
*
1864 output_rp_sprel (offset
)
1865 unsigned int offset
;
1867 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1868 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1872 static unw_rec_list
*
1875 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1879 static unw_rec_list
*
1883 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1884 ptr
->r
.record
.p
.gr
= gr
;
1888 static unw_rec_list
*
1889 output_pfs_psprel (offset
)
1890 unsigned int offset
;
1892 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1893 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1897 static unw_rec_list
*
1898 output_pfs_sprel (offset
)
1899 unsigned int offset
;
1901 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1902 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1906 static unw_rec_list
*
1907 output_preds_when ()
1909 unw_rec_list
*ptr
= alloc_record (preds_when
);
1913 static unw_rec_list
*
1914 output_preds_gr (gr
)
1917 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1918 ptr
->r
.record
.p
.gr
= gr
;
1922 static unw_rec_list
*
1923 output_preds_psprel (offset
)
1924 unsigned int offset
;
1926 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1927 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1931 static unw_rec_list
*
1932 output_preds_sprel (offset
)
1933 unsigned int offset
;
1935 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1936 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1940 static unw_rec_list
*
1941 output_fr_mem (mask
)
1944 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1945 ptr
->r
.record
.p
.rmask
= mask
;
1949 static unw_rec_list
*
1950 output_frgr_mem (gr_mask
, fr_mask
)
1951 unsigned int gr_mask
;
1952 unsigned int fr_mask
;
1954 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1955 ptr
->r
.record
.p
.grmask
= gr_mask
;
1956 ptr
->r
.record
.p
.frmask
= fr_mask
;
1960 static unw_rec_list
*
1961 output_gr_gr (mask
, reg
)
1965 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1966 ptr
->r
.record
.p
.grmask
= mask
;
1967 ptr
->r
.record
.p
.gr
= reg
;
1971 static unw_rec_list
*
1972 output_gr_mem (mask
)
1975 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1976 ptr
->r
.record
.p
.rmask
= mask
;
1980 static unw_rec_list
*
1981 output_br_mem (unsigned int mask
)
1983 unw_rec_list
*ptr
= alloc_record (br_mem
);
1984 ptr
->r
.record
.p
.brmask
= mask
;
1988 static unw_rec_list
*
1989 output_br_gr (save_mask
, reg
)
1990 unsigned int save_mask
;
1993 unw_rec_list
*ptr
= alloc_record (br_gr
);
1994 ptr
->r
.record
.p
.brmask
= save_mask
;
1995 ptr
->r
.record
.p
.gr
= reg
;
1999 static unw_rec_list
*
2000 output_spill_base (offset
)
2001 unsigned int offset
;
2003 unw_rec_list
*ptr
= alloc_record (spill_base
);
2004 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2008 static unw_rec_list
*
2011 unw_rec_list
*ptr
= alloc_record (unat_when
);
2015 static unw_rec_list
*
2019 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2020 ptr
->r
.record
.p
.gr
= gr
;
2024 static unw_rec_list
*
2025 output_unat_psprel (offset
)
2026 unsigned int offset
;
2028 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2029 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2033 static unw_rec_list
*
2034 output_unat_sprel (offset
)
2035 unsigned int offset
;
2037 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2038 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2042 static unw_rec_list
*
2045 unw_rec_list
*ptr
= alloc_record (lc_when
);
2049 static unw_rec_list
*
2053 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2054 ptr
->r
.record
.p
.gr
= gr
;
2058 static unw_rec_list
*
2059 output_lc_psprel (offset
)
2060 unsigned int offset
;
2062 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2063 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2067 static unw_rec_list
*
2068 output_lc_sprel (offset
)
2069 unsigned int offset
;
2071 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2072 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2076 static unw_rec_list
*
2079 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2083 static unw_rec_list
*
2087 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2088 ptr
->r
.record
.p
.gr
= gr
;
2092 static unw_rec_list
*
2093 output_fpsr_psprel (offset
)
2094 unsigned int offset
;
2096 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2097 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2101 static unw_rec_list
*
2102 output_fpsr_sprel (offset
)
2103 unsigned int offset
;
2105 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2106 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2110 static unw_rec_list
*
2111 output_priunat_when_gr ()
2113 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2117 static unw_rec_list
*
2118 output_priunat_when_mem ()
2120 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2124 static unw_rec_list
*
2125 output_priunat_gr (gr
)
2128 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2129 ptr
->r
.record
.p
.gr
= gr
;
2133 static unw_rec_list
*
2134 output_priunat_psprel (offset
)
2135 unsigned int offset
;
2137 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2138 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2142 static unw_rec_list
*
2143 output_priunat_sprel (offset
)
2144 unsigned int offset
;
2146 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2147 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2151 static unw_rec_list
*
2154 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2158 static unw_rec_list
*
2162 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2163 ptr
->r
.record
.p
.gr
= gr
;
2167 static unw_rec_list
*
2168 output_bsp_psprel (offset
)
2169 unsigned int offset
;
2171 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2172 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2176 static unw_rec_list
*
2177 output_bsp_sprel (offset
)
2178 unsigned int offset
;
2180 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2181 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2185 static unw_rec_list
*
2186 output_bspstore_when ()
2188 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2192 static unw_rec_list
*
2193 output_bspstore_gr (gr
)
2196 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2197 ptr
->r
.record
.p
.gr
= gr
;
2201 static unw_rec_list
*
2202 output_bspstore_psprel (offset
)
2203 unsigned int offset
;
2205 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2206 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2210 static unw_rec_list
*
2211 output_bspstore_sprel (offset
)
2212 unsigned int offset
;
2214 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2215 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2219 static unw_rec_list
*
2222 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2226 static unw_rec_list
*
2230 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2231 ptr
->r
.record
.p
.gr
= gr
;
2235 static unw_rec_list
*
2236 output_rnat_psprel (offset
)
2237 unsigned int offset
;
2239 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2240 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2244 static unw_rec_list
*
2245 output_rnat_sprel (offset
)
2246 unsigned int offset
;
2248 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2249 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2253 static unw_rec_list
*
2254 output_unwabi (abi
, context
)
2256 unsigned long context
;
2258 unw_rec_list
*ptr
= alloc_record (unwabi
);
2259 ptr
->r
.record
.p
.abi
= abi
;
2260 ptr
->r
.record
.p
.context
= context
;
2264 static unw_rec_list
*
2265 output_epilogue (unsigned long ecount
)
2267 unw_rec_list
*ptr
= alloc_record (epilogue
);
2268 ptr
->r
.record
.b
.ecount
= ecount
;
2272 static unw_rec_list
*
2273 output_label_state (unsigned long label
)
2275 unw_rec_list
*ptr
= alloc_record (label_state
);
2276 ptr
->r
.record
.b
.label
= label
;
2280 static unw_rec_list
*
2281 output_copy_state (unsigned long label
)
2283 unw_rec_list
*ptr
= alloc_record (copy_state
);
2284 ptr
->r
.record
.b
.label
= label
;
2288 static unw_rec_list
*
2289 output_spill_psprel (ab
, reg
, offset
)
2292 unsigned int offset
;
2294 unw_rec_list
*ptr
= alloc_record (spill_psprel
);
2295 ptr
->r
.record
.x
.ab
= ab
;
2296 ptr
->r
.record
.x
.reg
= reg
;
2297 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2301 static unw_rec_list
*
2302 output_spill_sprel (ab
, reg
, offset
)
2305 unsigned int offset
;
2307 unw_rec_list
*ptr
= alloc_record (spill_sprel
);
2308 ptr
->r
.record
.x
.ab
= ab
;
2309 ptr
->r
.record
.x
.reg
= reg
;
2310 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2314 static unw_rec_list
*
2315 output_spill_psprel_p (ab
, reg
, offset
, predicate
)
2318 unsigned int offset
;
2319 unsigned int predicate
;
2321 unw_rec_list
*ptr
= alloc_record (spill_psprel_p
);
2322 ptr
->r
.record
.x
.ab
= ab
;
2323 ptr
->r
.record
.x
.reg
= reg
;
2324 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2325 ptr
->r
.record
.x
.qp
= predicate
;
2329 static unw_rec_list
*
2330 output_spill_sprel_p (ab
, reg
, offset
, predicate
)
2333 unsigned int offset
;
2334 unsigned int predicate
;
2336 unw_rec_list
*ptr
= alloc_record (spill_sprel_p
);
2337 ptr
->r
.record
.x
.ab
= ab
;
2338 ptr
->r
.record
.x
.reg
= reg
;
2339 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2340 ptr
->r
.record
.x
.qp
= predicate
;
2344 static unw_rec_list
*
2345 output_spill_reg (ab
, reg
, targ_reg
, xy
)
2348 unsigned int targ_reg
;
2351 unw_rec_list
*ptr
= alloc_record (spill_reg
);
2352 ptr
->r
.record
.x
.ab
= ab
;
2353 ptr
->r
.record
.x
.reg
= reg
;
2354 ptr
->r
.record
.x
.treg
= targ_reg
;
2355 ptr
->r
.record
.x
.xy
= xy
;
2359 static unw_rec_list
*
2360 output_spill_reg_p (ab
, reg
, targ_reg
, xy
, predicate
)
2363 unsigned int targ_reg
;
2365 unsigned int predicate
;
2367 unw_rec_list
*ptr
= alloc_record (spill_reg_p
);
2368 ptr
->r
.record
.x
.ab
= ab
;
2369 ptr
->r
.record
.x
.reg
= reg
;
2370 ptr
->r
.record
.x
.treg
= targ_reg
;
2371 ptr
->r
.record
.x
.xy
= xy
;
2372 ptr
->r
.record
.x
.qp
= predicate
;
2376 /* Given a unw_rec_list process the correct format with the
2377 specified function. */
2380 process_one_record (ptr
, f
)
2384 unsigned long fr_mask
, gr_mask
;
2386 switch (ptr
->r
.type
)
2388 /* This is a dummy record that takes up no space in the output. */
2396 /* These are taken care of by prologue/prologue_gr. */
2401 if (ptr
->r
.type
== prologue_gr
)
2402 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2403 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2405 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2407 /* Output descriptor(s) for union of register spills (if any). */
2408 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2409 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2412 if ((fr_mask
& ~0xfUL
) == 0)
2413 output_P6_format (f
, fr_mem
, fr_mask
);
2416 output_P5_format (f
, gr_mask
, fr_mask
);
2421 output_P6_format (f
, gr_mem
, gr_mask
);
2422 if (ptr
->r
.record
.r
.mask
.br_mem
)
2423 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2425 /* output imask descriptor if necessary: */
2426 if (ptr
->r
.record
.r
.mask
.i
)
2427 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2428 ptr
->r
.record
.r
.imask_size
);
2432 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2436 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2437 ptr
->r
.record
.p
.size
);
2450 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2453 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2456 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2464 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2473 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2483 case bspstore_sprel
:
2485 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2488 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2491 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2494 as_bad ("spill_mask record unimplemented.");
2496 case priunat_when_gr
:
2497 case priunat_when_mem
:
2501 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2503 case priunat_psprel
:
2505 case bspstore_psprel
:
2507 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2510 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2513 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2517 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2520 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2521 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2522 ptr
->r
.record
.x
.pspoff
);
2525 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2526 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2527 ptr
->r
.record
.x
.spoff
);
2530 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2531 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2532 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2534 case spill_psprel_p
:
2535 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2536 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2537 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2540 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2541 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2542 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2545 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2546 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2547 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2551 as_bad ("record_type_not_valid");
2556 /* Given a unw_rec_list list, process all the records with
2557 the specified function. */
2559 process_unw_records (list
, f
)
2564 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2565 process_one_record (ptr
, f
);
2568 /* Determine the size of a record list in bytes. */
2570 calc_record_size (list
)
2574 process_unw_records (list
, count_output
);
2578 /* Update IMASK bitmask to reflect the fact that one or more registers
2579 of type TYPE are saved starting at instruction with index T. If N
2580 bits are set in REGMASK, it is assumed that instructions T through
2581 T+N-1 save these registers.
2585 1: instruction saves next fp reg
2586 2: instruction saves next general reg
2587 3: instruction saves next branch reg */
2589 set_imask (region
, regmask
, t
, type
)
2590 unw_rec_list
*region
;
2591 unsigned long regmask
;
2595 unsigned char *imask
;
2596 unsigned long imask_size
;
2600 imask
= region
->r
.record
.r
.mask
.i
;
2601 imask_size
= region
->r
.record
.r
.imask_size
;
2604 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2605 imask
= xmalloc (imask_size
);
2606 memset (imask
, 0, imask_size
);
2608 region
->r
.record
.r
.imask_size
= imask_size
;
2609 region
->r
.record
.r
.mask
.i
= imask
;
2613 pos
= 2 * (3 - t
% 4);
2616 if (i
>= imask_size
)
2618 as_bad ("Ignoring attempt to spill beyond end of region");
2622 imask
[i
] |= (type
& 0x3) << pos
;
2624 regmask
&= (regmask
- 1);
2634 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2635 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2636 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2640 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2641 unsigned long slot_addr
;
2643 unsigned long first_addr
;
2647 unsigned long index
= 0;
2649 /* First time we are called, the initial address and frag are invalid. */
2650 if (first_addr
== 0)
2653 /* If the two addresses are in different frags, then we need to add in
2654 the remaining size of this frag, and then the entire size of intermediate
2656 while (slot_frag
!= first_frag
)
2658 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2662 /* We can get the final addresses only during and after
2664 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2665 index
+= 3 * ((first_frag
->fr_next
->fr_address
2666 - first_frag
->fr_address
2667 - first_frag
->fr_fix
) >> 4);
2670 /* We don't know what the final addresses will be. We try our
2671 best to estimate. */
2672 switch (first_frag
->fr_type
)
2678 as_fatal ("only constant space allocation is supported");
2684 /* Take alignment into account. Assume the worst case
2685 before relaxation. */
2686 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2690 if (first_frag
->fr_symbol
)
2692 as_fatal ("only constant offsets are supported");
2696 index
+= 3 * (first_frag
->fr_offset
>> 4);
2700 /* Add in the full size of the frag converted to instruction slots. */
2701 index
+= 3 * (first_frag
->fr_fix
>> 4);
2702 /* Subtract away the initial part before first_addr. */
2703 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2704 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2706 /* Move to the beginning of the next frag. */
2707 first_frag
= first_frag
->fr_next
;
2708 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2711 /* Add in the used part of the last frag. */
2712 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2713 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2717 /* Optimize unwind record directives. */
2719 static unw_rec_list
*
2720 optimize_unw_records (list
)
2726 /* If the only unwind record is ".prologue" or ".prologue" followed
2727 by ".body", then we can optimize the unwind directives away. */
2728 if (list
->r
.type
== prologue
2729 && (list
->next
->r
.type
== endp
2730 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2736 /* Given a complete record list, process any records which have
2737 unresolved fields, (ie length counts for a prologue). After
2738 this has been run, all necessary information should be available
2739 within each record to generate an image. */
2742 fixup_unw_records (list
, before_relax
)
2746 unw_rec_list
*ptr
, *region
= 0;
2747 unsigned long first_addr
= 0, rlen
= 0, t
;
2748 fragS
*first_frag
= 0;
2750 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2752 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2753 as_bad (" Insn slot not set in unwind record.");
2754 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2755 first_addr
, first_frag
, before_relax
);
2756 switch (ptr
->r
.type
)
2764 unsigned long last_addr
= 0;
2765 fragS
*last_frag
= NULL
;
2767 first_addr
= ptr
->slot_number
;
2768 first_frag
= ptr
->slot_frag
;
2769 /* Find either the next body/prologue start, or the end of
2770 the function, and determine the size of the region. */
2771 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2772 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2773 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2775 last_addr
= last
->slot_number
;
2776 last_frag
= last
->slot_frag
;
2779 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2781 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2782 if (ptr
->r
.type
== body
)
2783 /* End of region. */
2791 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2793 /* This happens when a memory-stack-less procedure uses a
2794 ".restore sp" directive at the end of a region to pop
2796 ptr
->r
.record
.b
.t
= 0;
2807 case priunat_when_gr
:
2808 case priunat_when_mem
:
2812 ptr
->r
.record
.p
.t
= t
;
2820 case spill_psprel_p
:
2821 ptr
->r
.record
.x
.t
= t
;
2827 as_bad ("frgr_mem record before region record!");
2830 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2831 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2832 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2833 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2838 as_bad ("fr_mem record before region record!");
2841 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2842 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2847 as_bad ("gr_mem record before region record!");
2850 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2851 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2856 as_bad ("br_mem record before region record!");
2859 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2860 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2866 as_bad ("gr_gr record before region record!");
2869 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2874 as_bad ("br_gr record before region record!");
2877 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2886 /* Estimate the size of a frag before relaxing. We only have one type of frag
2887 to handle here, which is the unwind info frag. */
2890 ia64_estimate_size_before_relax (fragS
*frag
,
2891 asection
*segtype ATTRIBUTE_UNUSED
)
2896 /* ??? This code is identical to the first part of ia64_convert_frag. */
2897 list
= (unw_rec_list
*) frag
->fr_opcode
;
2898 fixup_unw_records (list
, 0);
2900 len
= calc_record_size (list
);
2901 /* pad to pointer-size boundary. */
2902 pad
= len
% md
.pointer_size
;
2904 len
+= md
.pointer_size
- pad
;
2905 /* Add 8 for the header. */
2907 /* Add a pointer for the personality offset. */
2908 if (frag
->fr_offset
)
2909 size
+= md
.pointer_size
;
2911 /* fr_var carries the max_chars that we created the fragment with.
2912 We must, of course, have allocated enough memory earlier. */
2913 assert (frag
->fr_var
>= size
);
2915 return frag
->fr_fix
+ size
;
2918 /* This function converts a rs_machine_dependent variant frag into a
2919 normal fill frag with the unwind image from the the record list. */
2921 ia64_convert_frag (fragS
*frag
)
2927 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2928 list
= (unw_rec_list
*) frag
->fr_opcode
;
2929 fixup_unw_records (list
, 0);
2931 len
= calc_record_size (list
);
2932 /* pad to pointer-size boundary. */
2933 pad
= len
% md
.pointer_size
;
2935 len
+= md
.pointer_size
- pad
;
2936 /* Add 8 for the header. */
2938 /* Add a pointer for the personality offset. */
2939 if (frag
->fr_offset
)
2940 size
+= md
.pointer_size
;
2942 /* fr_var carries the max_chars that we created the fragment with.
2943 We must, of course, have allocated enough memory earlier. */
2944 assert (frag
->fr_var
>= size
);
2946 /* Initialize the header area. fr_offset is initialized with
2947 unwind.personality_routine. */
2948 if (frag
->fr_offset
)
2950 if (md
.flags
& EF_IA_64_ABI64
)
2951 flag_value
= (bfd_vma
) 3 << 32;
2953 /* 32-bit unwind info block. */
2954 flag_value
= (bfd_vma
) 0x1003 << 32;
2959 md_number_to_chars (frag
->fr_literal
,
2960 (((bfd_vma
) 1 << 48) /* Version. */
2961 | flag_value
/* U & E handler flags. */
2962 | (len
/ md
.pointer_size
)), /* Length. */
2965 /* Skip the header. */
2966 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
2967 process_unw_records (list
, output_vbyte_mem
);
2969 /* Fill the padding bytes with zeros. */
2971 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
2972 md
.pointer_size
- pad
);
2974 frag
->fr_fix
+= size
;
2975 frag
->fr_type
= rs_fill
;
2977 frag
->fr_offset
= 0;
2981 convert_expr_to_ab_reg (e
, ab
, regp
)
2988 if (e
->X_op
!= O_register
)
2991 reg
= e
->X_add_number
;
2992 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2995 *regp
= reg
- REG_GR
;
2997 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
2998 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
3001 *regp
= reg
- REG_FR
;
3003 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3006 *regp
= reg
- REG_BR
;
3013 case REG_PR
: *regp
= 0; break;
3014 case REG_PSP
: *regp
= 1; break;
3015 case REG_PRIUNAT
: *regp
= 2; break;
3016 case REG_BR
+ 0: *regp
= 3; break;
3017 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3018 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3019 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3020 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3021 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3022 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3023 case REG_AR
+ AR_LC
: *regp
= 10; break;
3033 convert_expr_to_xy_reg (e
, xy
, regp
)
3040 if (e
->X_op
!= O_register
)
3043 reg
= e
->X_add_number
;
3045 if (/* reg >= REG_GR && */ reg
<= (REG_GR
+ 127))
3048 *regp
= reg
- REG_GR
;
3050 else if (reg
>= REG_FR
&& reg
<= (REG_FR
+ 127))
3053 *regp
= reg
- REG_FR
;
3055 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3058 *regp
= reg
- REG_BR
;
3068 /* The current frag is an alignment frag. */
3069 align_frag
= frag_now
;
3070 s_align_bytes (arg
);
3075 int dummy ATTRIBUTE_UNUSED
;
3080 radix
= *input_line_pointer
++;
3082 if (radix
!= 'C' && !is_end_of_line
[(unsigned char) radix
])
3084 as_bad ("Radix `%c' unsupported", *input_line_pointer
);
3085 ignore_rest_of_line ();
3090 /* Helper function for .loc directives. If the assembler is not generating
3091 line number info, then we need to remember which instructions have a .loc
3092 directive, and only call dwarf2_gen_line_info for those instructions. */
3097 CURR_SLOT
.loc_directive_seen
= 1;
3098 dwarf2_directive_loc (x
);
3101 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3103 dot_special_section (which
)
3106 set_section ((char *) special_section_name
[which
]);
3109 /* Return -1 for warning and 0 for error. */
3112 unwind_diagnostic (const char * region
, const char *directive
)
3114 if (md
.unwind_check
== unwind_check_warning
)
3116 as_warn (".%s outside of %s", directive
, region
);
3121 as_bad (".%s outside of %s", directive
, region
);
3122 ignore_rest_of_line ();
3127 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3128 a procedure but the unwind directive check is set to warning, 0 if
3129 a directive isn't in a procedure and the unwind directive check is set
3133 in_procedure (const char *directive
)
3135 if (unwind
.proc_start
3136 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3138 return unwind_diagnostic ("procedure", directive
);
3141 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3142 a prologue but the unwind directive check is set to warning, 0 if
3143 a directive isn't in a prologue and the unwind directive check is set
3147 in_prologue (const char *directive
)
3149 int in
= in_procedure (directive
);
3152 /* We are in a procedure. Check if we are in a prologue. */
3153 if (unwind
.prologue
)
3155 /* We only want to issue one message. */
3157 return unwind_diagnostic ("prologue", directive
);
3164 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3165 a body but the unwind directive check is set to warning, 0 if
3166 a directive isn't in a body and the unwind directive check is set
3170 in_body (const char *directive
)
3172 int in
= in_procedure (directive
);
3175 /* We are in a procedure. Check if we are in a body. */
3178 /* We only want to issue one message. */
3180 return unwind_diagnostic ("body region", directive
);
3188 add_unwind_entry (ptr
)
3192 unwind
.tail
->next
= ptr
;
3197 /* The current entry can in fact be a chain of unwind entries. */
3198 if (unwind
.current_entry
== NULL
)
3199 unwind
.current_entry
= ptr
;
3204 int dummy ATTRIBUTE_UNUSED
;
3208 if (!in_prologue ("fframe"))
3213 if (e
.X_op
!= O_constant
)
3214 as_bad ("Operand to .fframe must be a constant");
3216 add_unwind_entry (output_mem_stack_f (e
.X_add_number
));
3221 int dummy ATTRIBUTE_UNUSED
;
3226 if (!in_prologue ("vframe"))
3230 reg
= e
.X_add_number
- REG_GR
;
3231 if (e
.X_op
== O_register
&& reg
< 128)
3233 add_unwind_entry (output_mem_stack_v ());
3234 if (! (unwind
.prologue_mask
& 2))
3235 add_unwind_entry (output_psp_gr (reg
));
3238 as_bad ("First operand to .vframe must be a general register");
3242 dot_vframesp (dummy
)
3243 int dummy ATTRIBUTE_UNUSED
;
3247 if (!in_prologue ("vframesp"))
3251 if (e
.X_op
== O_constant
)
3253 add_unwind_entry (output_mem_stack_v ());
3254 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3257 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3261 dot_vframepsp (dummy
)
3262 int dummy ATTRIBUTE_UNUSED
;
3266 if (!in_prologue ("vframepsp"))
3270 if (e
.X_op
== O_constant
)
3272 add_unwind_entry (output_mem_stack_v ());
3273 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3276 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3281 int dummy ATTRIBUTE_UNUSED
;
3287 if (!in_prologue ("save"))
3290 sep
= parse_operand (&e1
);
3292 as_bad ("No second operand to .save");
3293 sep
= parse_operand (&e2
);
3295 reg1
= e1
.X_add_number
;
3296 reg2
= e2
.X_add_number
- REG_GR
;
3298 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3299 if (e1
.X_op
== O_register
)
3301 if (e2
.X_op
== O_register
&& reg2
>= 0 && reg2
< 128)
3305 case REG_AR
+ AR_BSP
:
3306 add_unwind_entry (output_bsp_when ());
3307 add_unwind_entry (output_bsp_gr (reg2
));
3309 case REG_AR
+ AR_BSPSTORE
:
3310 add_unwind_entry (output_bspstore_when ());
3311 add_unwind_entry (output_bspstore_gr (reg2
));
3313 case REG_AR
+ AR_RNAT
:
3314 add_unwind_entry (output_rnat_when ());
3315 add_unwind_entry (output_rnat_gr (reg2
));
3317 case REG_AR
+ AR_UNAT
:
3318 add_unwind_entry (output_unat_when ());
3319 add_unwind_entry (output_unat_gr (reg2
));
3321 case REG_AR
+ AR_FPSR
:
3322 add_unwind_entry (output_fpsr_when ());
3323 add_unwind_entry (output_fpsr_gr (reg2
));
3325 case REG_AR
+ AR_PFS
:
3326 add_unwind_entry (output_pfs_when ());
3327 if (! (unwind
.prologue_mask
& 4))
3328 add_unwind_entry (output_pfs_gr (reg2
));
3330 case REG_AR
+ AR_LC
:
3331 add_unwind_entry (output_lc_when ());
3332 add_unwind_entry (output_lc_gr (reg2
));
3335 add_unwind_entry (output_rp_when ());
3336 if (! (unwind
.prologue_mask
& 8))
3337 add_unwind_entry (output_rp_gr (reg2
));
3340 add_unwind_entry (output_preds_when ());
3341 if (! (unwind
.prologue_mask
& 1))
3342 add_unwind_entry (output_preds_gr (reg2
));
3345 add_unwind_entry (output_priunat_when_gr ());
3346 add_unwind_entry (output_priunat_gr (reg2
));
3349 as_bad ("First operand not a valid register");
3353 as_bad (" Second operand not a valid register");
3356 as_bad ("First operand not a register");
3361 int dummy ATTRIBUTE_UNUSED
;
3364 unsigned long ecount
; /* # of _additional_ regions to pop */
3367 if (!in_body ("restore"))
3370 sep
= parse_operand (&e1
);
3371 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3373 as_bad ("First operand to .restore must be stack pointer (sp)");
3379 parse_operand (&e2
);
3380 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3382 as_bad ("Second operand to .restore must be a constant >= 0");
3385 ecount
= e2
.X_add_number
;
3388 ecount
= unwind
.prologue_count
- 1;
3390 if (ecount
>= unwind
.prologue_count
)
3392 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3393 ecount
+ 1, unwind
.prologue_count
);
3397 add_unwind_entry (output_epilogue (ecount
));
3399 if (ecount
< unwind
.prologue_count
)
3400 unwind
.prologue_count
-= ecount
+ 1;
3402 unwind
.prologue_count
= 0;
3406 dot_restorereg (dummy
)
3407 int dummy ATTRIBUTE_UNUSED
;
3409 unsigned int ab
, reg
;
3412 if (!in_procedure ("restorereg"))
3417 if (!convert_expr_to_ab_reg (&e
, &ab
, ®
))
3419 as_bad ("First operand to .restorereg must be a preserved register");
3422 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0));
3426 dot_restorereg_p (dummy
)
3427 int dummy ATTRIBUTE_UNUSED
;
3429 unsigned int qp
, ab
, reg
;
3433 if (!in_procedure ("restorereg.p"))
3436 sep
= parse_operand (&e1
);
3439 as_bad ("No second operand to .restorereg.p");
3443 parse_operand (&e2
);
3445 qp
= e1
.X_add_number
- REG_P
;
3446 if (e1
.X_op
!= O_register
|| qp
> 63)
3448 as_bad ("First operand to .restorereg.p must be a predicate");
3452 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3454 as_bad ("Second operand to .restorereg.p must be a preserved register");
3457 add_unwind_entry (output_spill_reg_p (ab
, reg
, 0, 0, qp
));
3460 static char *special_linkonce_name
[] =
3462 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3466 start_unwind_section (const segT text_seg
, int sec_index
)
3469 Use a slightly ugly scheme to derive the unwind section names from
3470 the text section name:
3472 text sect. unwind table sect.
3473 name: name: comments:
3474 ---------- ----------------- --------------------------------
3476 .text.foo .IA_64.unwind.text.foo
3477 .foo .IA_64.unwind.foo
3479 .gnu.linkonce.ia64unw.foo
3480 _info .IA_64.unwind_info gas issues error message (ditto)
3481 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3483 This mapping is done so that:
3485 (a) An object file with unwind info only in .text will use
3486 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3487 This follows the letter of the ABI and also ensures backwards
3488 compatibility with older toolchains.
3490 (b) An object file with unwind info in multiple text sections
3491 will use separate unwind sections for each text section.
3492 This allows us to properly set the "sh_info" and "sh_link"
3493 fields in SHT_IA_64_UNWIND as required by the ABI and also
3494 lets GNU ld support programs with multiple segments
3495 containing unwind info (as might be the case for certain
3496 embedded applications).
3498 (c) An error is issued if there would be a name clash.
3501 const char *text_name
, *sec_text_name
;
3503 const char *prefix
= special_section_name
[sec_index
];
3505 size_t prefix_len
, suffix_len
, sec_name_len
;
3507 sec_text_name
= segment_name (text_seg
);
3508 text_name
= sec_text_name
;
3509 if (strncmp (text_name
, "_info", 5) == 0)
3511 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3513 ignore_rest_of_line ();
3516 if (strcmp (text_name
, ".text") == 0)
3519 /* Build the unwind section name by appending the (possibly stripped)
3520 text section name to the unwind prefix. */
3522 if (strncmp (text_name
, ".gnu.linkonce.t.",
3523 sizeof (".gnu.linkonce.t.") - 1) == 0)
3525 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3526 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3529 prefix_len
= strlen (prefix
);
3530 suffix_len
= strlen (suffix
);
3531 sec_name_len
= prefix_len
+ suffix_len
;
3532 sec_name
= alloca (sec_name_len
+ 1);
3533 memcpy (sec_name
, prefix
, prefix_len
);
3534 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3535 sec_name
[sec_name_len
] = '\0';
3537 /* Handle COMDAT group. */
3538 if (suffix
== text_name
&& (text_seg
->flags
& SEC_LINK_ONCE
) != 0)
3541 size_t len
, group_name_len
;
3542 const char *group_name
= elf_group_name (text_seg
);
3544 if (group_name
== NULL
)
3546 as_bad ("Group section `%s' has no group signature",
3548 ignore_rest_of_line ();
3551 /* We have to construct a fake section directive. */
3552 group_name_len
= strlen (group_name
);
3554 + 16 /* ,"aG",@progbits, */
3555 + group_name_len
/* ,group_name */
3558 section
= alloca (len
+ 1);
3559 memcpy (section
, sec_name
, sec_name_len
);
3560 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3561 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3562 memcpy (section
+ len
- 7, ",comdat", 7);
3563 section
[len
] = '\0';
3564 set_section (section
);
3568 set_section (sec_name
);
3569 bfd_set_section_flags (stdoutput
, now_seg
,
3570 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3573 elf_linked_to_section (now_seg
) = text_seg
;
3577 generate_unwind_image (const segT text_seg
)
3582 /* Mark the end of the unwind info, so that we can compute the size of the
3583 last unwind region. */
3584 add_unwind_entry (output_endp ());
3586 /* Force out pending instructions, to make sure all unwind records have
3587 a valid slot_number field. */
3588 ia64_flush_insns ();
3590 /* Generate the unwind record. */
3591 list
= optimize_unw_records (unwind
.list
);
3592 fixup_unw_records (list
, 1);
3593 size
= calc_record_size (list
);
3595 if (size
> 0 || unwind
.force_unwind_entry
)
3597 unwind
.force_unwind_entry
= 0;
3598 /* pad to pointer-size boundary. */
3599 pad
= size
% md
.pointer_size
;
3601 size
+= md
.pointer_size
- pad
;
3602 /* Add 8 for the header. */
3604 /* Add a pointer for the personality offset. */
3605 if (unwind
.personality_routine
)
3606 size
+= md
.pointer_size
;
3609 /* If there are unwind records, switch sections, and output the info. */
3613 bfd_reloc_code_real_type reloc
;
3615 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3617 /* Make sure the section has 4 byte alignment for ILP32 and
3618 8 byte alignment for LP64. */
3619 frag_align (md
.pointer_size_shift
, 0, 0);
3620 record_alignment (now_seg
, md
.pointer_size_shift
);
3622 /* Set expression which points to start of unwind descriptor area. */
3623 unwind
.info
= expr_build_dot ();
3625 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3626 (offsetT
) (long) unwind
.personality_routine
,
3629 /* Add the personality address to the image. */
3630 if (unwind
.personality_routine
!= 0)
3632 exp
.X_op
= O_symbol
;
3633 exp
.X_add_symbol
= unwind
.personality_routine
;
3634 exp
.X_add_number
= 0;
3636 if (md
.flags
& EF_IA_64_BE
)
3638 if (md
.flags
& EF_IA_64_ABI64
)
3639 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3641 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3645 if (md
.flags
& EF_IA_64_ABI64
)
3646 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3648 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3651 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3652 md
.pointer_size
, &exp
, 0, reloc
);
3653 unwind
.personality_routine
= 0;
3657 free_saved_prologue_counts ();
3658 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3662 dot_handlerdata (dummy
)
3663 int dummy ATTRIBUTE_UNUSED
;
3665 if (!in_procedure ("handlerdata"))
3667 unwind
.force_unwind_entry
= 1;
3669 /* Remember which segment we're in so we can switch back after .endp */
3670 unwind
.saved_text_seg
= now_seg
;
3671 unwind
.saved_text_subseg
= now_subseg
;
3673 /* Generate unwind info into unwind-info section and then leave that
3674 section as the currently active one so dataXX directives go into
3675 the language specific data area of the unwind info block. */
3676 generate_unwind_image (now_seg
);
3677 demand_empty_rest_of_line ();
3681 dot_unwentry (dummy
)
3682 int dummy ATTRIBUTE_UNUSED
;
3684 if (!in_procedure ("unwentry"))
3686 unwind
.force_unwind_entry
= 1;
3687 demand_empty_rest_of_line ();
3692 int dummy ATTRIBUTE_UNUSED
;
3697 if (!in_prologue ("altrp"))
3701 reg
= e
.X_add_number
- REG_BR
;
3702 if (e
.X_op
== O_register
&& reg
< 8)
3703 add_unwind_entry (output_rp_br (reg
));
3705 as_bad ("First operand not a valid branch register");
3709 dot_savemem (psprel
)
3716 if (!in_prologue (psprel
? "savepsp" : "savesp"))
3719 sep
= parse_operand (&e1
);
3721 as_bad ("No second operand to .save%ssp", psprel
? "p" : "");
3722 sep
= parse_operand (&e2
);
3724 reg1
= e1
.X_add_number
;
3725 val
= e2
.X_add_number
;
3727 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3728 if (e1
.X_op
== O_register
)
3730 if (e2
.X_op
== O_constant
)
3734 case REG_AR
+ AR_BSP
:
3735 add_unwind_entry (output_bsp_when ());
3736 add_unwind_entry ((psprel
3738 : output_bsp_sprel
) (val
));
3740 case REG_AR
+ AR_BSPSTORE
:
3741 add_unwind_entry (output_bspstore_when ());
3742 add_unwind_entry ((psprel
3743 ? output_bspstore_psprel
3744 : output_bspstore_sprel
) (val
));
3746 case REG_AR
+ AR_RNAT
:
3747 add_unwind_entry (output_rnat_when ());
3748 add_unwind_entry ((psprel
3749 ? output_rnat_psprel
3750 : output_rnat_sprel
) (val
));
3752 case REG_AR
+ AR_UNAT
:
3753 add_unwind_entry (output_unat_when ());
3754 add_unwind_entry ((psprel
3755 ? output_unat_psprel
3756 : output_unat_sprel
) (val
));
3758 case REG_AR
+ AR_FPSR
:
3759 add_unwind_entry (output_fpsr_when ());
3760 add_unwind_entry ((psprel
3761 ? output_fpsr_psprel
3762 : output_fpsr_sprel
) (val
));
3764 case REG_AR
+ AR_PFS
:
3765 add_unwind_entry (output_pfs_when ());
3766 add_unwind_entry ((psprel
3768 : output_pfs_sprel
) (val
));
3770 case REG_AR
+ AR_LC
:
3771 add_unwind_entry (output_lc_when ());
3772 add_unwind_entry ((psprel
3774 : output_lc_sprel
) (val
));
3777 add_unwind_entry (output_rp_when ());
3778 add_unwind_entry ((psprel
3780 : output_rp_sprel
) (val
));
3783 add_unwind_entry (output_preds_when ());
3784 add_unwind_entry ((psprel
3785 ? output_preds_psprel
3786 : output_preds_sprel
) (val
));
3789 add_unwind_entry (output_priunat_when_mem ());
3790 add_unwind_entry ((psprel
3791 ? output_priunat_psprel
3792 : output_priunat_sprel
) (val
));
3795 as_bad ("First operand not a valid register");
3799 as_bad (" Second operand not a valid constant");
3802 as_bad ("First operand not a register");
3807 int dummy ATTRIBUTE_UNUSED
;
3812 if (!in_prologue ("save.g"))
3815 sep
= parse_operand (&e1
);
3817 parse_operand (&e2
);
3819 if (e1
.X_op
!= O_constant
)
3820 as_bad ("First operand to .save.g must be a constant.");
3823 int grmask
= e1
.X_add_number
;
3825 add_unwind_entry (output_gr_mem (grmask
));
3828 int reg
= e2
.X_add_number
- REG_GR
;
3829 if (e2
.X_op
== O_register
&& reg
>= 0 && reg
< 128)
3830 add_unwind_entry (output_gr_gr (grmask
, reg
));
3832 as_bad ("Second operand is an invalid register.");
3839 int dummy ATTRIBUTE_UNUSED
;
3844 if (!in_prologue ("save.f"))
3847 sep
= parse_operand (&e1
);
3849 if (e1
.X_op
!= O_constant
)
3850 as_bad ("Operand to .save.f must be a constant.");
3852 add_unwind_entry (output_fr_mem (e1
.X_add_number
));
3857 int dummy ATTRIBUTE_UNUSED
;
3864 if (!in_prologue ("save.b"))
3867 sep
= parse_operand (&e1
);
3868 if (e1
.X_op
!= O_constant
)
3870 as_bad ("First operand to .save.b must be a constant.");
3873 brmask
= e1
.X_add_number
;
3877 sep
= parse_operand (&e2
);
3878 reg
= e2
.X_add_number
- REG_GR
;
3879 if (e2
.X_op
!= O_register
|| reg
> 127)
3881 as_bad ("Second operand to .save.b must be a general register.");
3884 add_unwind_entry (output_br_gr (brmask
, e2
.X_add_number
));
3887 add_unwind_entry (output_br_mem (brmask
));
3889 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3890 demand_empty_rest_of_line ();
3895 int dummy ATTRIBUTE_UNUSED
;
3900 if (!in_prologue ("save.gf"))
3903 sep
= parse_operand (&e1
);
3905 parse_operand (&e2
);
3907 if (e1
.X_op
!= O_constant
|| sep
!= ',' || e2
.X_op
!= O_constant
)
3908 as_bad ("Both operands of .save.gf must be constants.");
3911 int grmask
= e1
.X_add_number
;
3912 int frmask
= e2
.X_add_number
;
3913 add_unwind_entry (output_frgr_mem (grmask
, frmask
));
3919 int dummy ATTRIBUTE_UNUSED
;
3924 if (!in_prologue ("spill"))
3927 sep
= parse_operand (&e
);
3928 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3929 demand_empty_rest_of_line ();
3931 if (e
.X_op
!= O_constant
)
3932 as_bad ("Operand to .spill must be a constant");
3934 add_unwind_entry (output_spill_base (e
.X_add_number
));
3938 dot_spillreg (dummy
)
3939 int dummy ATTRIBUTE_UNUSED
;
3942 unsigned int ab
, xy
, reg
, treg
;
3945 if (!in_procedure ("spillreg"))
3948 sep
= parse_operand (&e1
);
3951 as_bad ("No second operand to .spillreg");
3955 parse_operand (&e2
);
3957 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3959 as_bad ("First operand to .spillreg must be a preserved register");
3963 if (!convert_expr_to_xy_reg (&e2
, &xy
, &treg
))
3965 as_bad ("Second operand to .spillreg must be a register");
3969 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
));
3973 dot_spillmem (psprel
)
3978 unsigned int ab
, reg
;
3980 if (!in_procedure ("spillmem"))
3983 sep
= parse_operand (&e1
);
3986 as_bad ("Second operand missing");
3990 parse_operand (&e2
);
3992 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3994 as_bad ("First operand to .spill%s must be a preserved register",
3995 psprel
? "psp" : "sp");
3999 if (e2
.X_op
!= O_constant
)
4001 as_bad ("Second operand to .spill%s must be a constant",
4002 psprel
? "psp" : "sp");
4007 add_unwind_entry (output_spill_psprel (ab
, reg
, e2
.X_add_number
));
4009 add_unwind_entry (output_spill_sprel (ab
, reg
, e2
.X_add_number
));
4013 dot_spillreg_p (dummy
)
4014 int dummy ATTRIBUTE_UNUSED
;
4017 unsigned int ab
, xy
, reg
, treg
;
4018 expressionS e1
, e2
, e3
;
4021 if (!in_procedure ("spillreg.p"))
4024 sep
= parse_operand (&e1
);
4027 as_bad ("No second and third operand to .spillreg.p");
4031 sep
= parse_operand (&e2
);
4034 as_bad ("No third operand to .spillreg.p");
4038 parse_operand (&e3
);
4040 qp
= e1
.X_add_number
- REG_P
;
4042 if (e1
.X_op
!= O_register
|| qp
> 63)
4044 as_bad ("First operand to .spillreg.p must be a predicate");
4048 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4050 as_bad ("Second operand to .spillreg.p must be a preserved register");
4054 if (!convert_expr_to_xy_reg (&e3
, &xy
, &treg
))
4056 as_bad ("Third operand to .spillreg.p must be a register");
4060 add_unwind_entry (output_spill_reg_p (ab
, reg
, treg
, xy
, qp
));
4064 dot_spillmem_p (psprel
)
4067 expressionS e1
, e2
, e3
;
4069 unsigned int ab
, reg
;
4072 if (!in_procedure ("spillmem.p"))
4075 sep
= parse_operand (&e1
);
4078 as_bad ("Second operand missing");
4082 parse_operand (&e2
);
4085 as_bad ("Second operand missing");
4089 parse_operand (&e3
);
4091 qp
= e1
.X_add_number
- REG_P
;
4092 if (e1
.X_op
!= O_register
|| qp
> 63)
4094 as_bad ("First operand to .spill%s_p must be a predicate",
4095 psprel
? "psp" : "sp");
4099 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4101 as_bad ("Second operand to .spill%s_p must be a preserved register",
4102 psprel
? "psp" : "sp");
4106 if (e3
.X_op
!= O_constant
)
4108 as_bad ("Third operand to .spill%s_p must be a constant",
4109 psprel
? "psp" : "sp");
4114 add_unwind_entry (output_spill_psprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4116 add_unwind_entry (output_spill_sprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4120 get_saved_prologue_count (lbl
)
4123 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4125 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4129 return lpc
->prologue_count
;
4131 as_bad ("Missing .label_state %ld", lbl
);
4136 save_prologue_count (lbl
, count
)
4140 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4142 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4146 lpc
->prologue_count
= count
;
4149 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4151 new_lpc
->next
= unwind
.saved_prologue_counts
;
4152 new_lpc
->label_number
= lbl
;
4153 new_lpc
->prologue_count
= count
;
4154 unwind
.saved_prologue_counts
= new_lpc
;
4159 free_saved_prologue_counts ()
4161 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4162 label_prologue_count
*next
;
4171 unwind
.saved_prologue_counts
= NULL
;
4175 dot_label_state (dummy
)
4176 int dummy ATTRIBUTE_UNUSED
;
4180 if (!in_body ("label_state"))
4184 if (e
.X_op
!= O_constant
)
4186 as_bad ("Operand to .label_state must be a constant");
4189 add_unwind_entry (output_label_state (e
.X_add_number
));
4190 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4194 dot_copy_state (dummy
)
4195 int dummy ATTRIBUTE_UNUSED
;
4199 if (!in_body ("copy_state"))
4203 if (e
.X_op
!= O_constant
)
4205 as_bad ("Operand to .copy_state must be a constant");
4208 add_unwind_entry (output_copy_state (e
.X_add_number
));
4209 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4214 int dummy ATTRIBUTE_UNUSED
;
4219 if (!in_procedure ("unwabi"))
4222 sep
= parse_operand (&e1
);
4225 as_bad ("Second operand to .unwabi missing");
4228 sep
= parse_operand (&e2
);
4229 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4230 demand_empty_rest_of_line ();
4232 if (e1
.X_op
!= O_constant
)
4234 as_bad ("First operand to .unwabi must be a constant");
4238 if (e2
.X_op
!= O_constant
)
4240 as_bad ("Second operand to .unwabi must be a constant");
4244 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
));
4248 dot_personality (dummy
)
4249 int dummy ATTRIBUTE_UNUSED
;
4252 if (!in_procedure ("personality"))
4255 name
= input_line_pointer
;
4256 c
= get_symbol_end ();
4257 p
= input_line_pointer
;
4258 unwind
.personality_routine
= symbol_find_or_make (name
);
4259 unwind
.force_unwind_entry
= 1;
4262 demand_empty_rest_of_line ();
4267 int dummy ATTRIBUTE_UNUSED
;
4272 unwind
.proc_start
= 0;
4273 /* Parse names of main and alternate entry points and mark them as
4274 function symbols: */
4278 name
= input_line_pointer
;
4279 c
= get_symbol_end ();
4280 p
= input_line_pointer
;
4282 as_bad ("Empty argument of .proc");
4285 sym
= symbol_find_or_make (name
);
4286 if (S_IS_DEFINED (sym
))
4287 as_bad ("`%s' was already defined", name
);
4288 else if (unwind
.proc_start
== 0)
4290 unwind
.proc_start
= sym
;
4292 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4296 if (*input_line_pointer
!= ',')
4298 ++input_line_pointer
;
4300 if (unwind
.proc_start
== 0)
4301 unwind
.proc_start
= expr_build_dot ();
4302 demand_empty_rest_of_line ();
4305 unwind
.prologue
= 0;
4306 unwind
.prologue_count
= 0;
4309 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4310 unwind
.personality_routine
= 0;
4315 int dummy ATTRIBUTE_UNUSED
;
4317 if (!in_procedure ("body"))
4319 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4320 as_warn ("Initial .body should precede any instructions");
4322 unwind
.prologue
= 0;
4323 unwind
.prologue_mask
= 0;
4326 add_unwind_entry (output_body ());
4327 demand_empty_rest_of_line ();
4331 dot_prologue (dummy
)
4332 int dummy ATTRIBUTE_UNUSED
;
4335 int mask
= 0, grsave
= 0;
4337 if (!in_procedure ("prologue"))
4339 if (unwind
.prologue
)
4341 as_bad (".prologue within prologue");
4342 ignore_rest_of_line ();
4345 if (!unwind
.body
&& unwind
.insn
)
4346 as_warn ("Initial .prologue should precede any instructions");
4348 if (!is_it_end_of_statement ())
4351 sep
= parse_operand (&e1
);
4353 as_bad ("No second operand to .prologue");
4354 sep
= parse_operand (&e2
);
4355 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4356 demand_empty_rest_of_line ();
4358 if (e1
.X_op
== O_constant
)
4360 mask
= e1
.X_add_number
;
4362 if (e2
.X_op
== O_constant
)
4363 grsave
= e2
.X_add_number
;
4364 else if (e2
.X_op
== O_register
4365 && (grsave
= e2
.X_add_number
- REG_GR
) < 128)
4368 as_bad ("Second operand not a constant or general register");
4370 add_unwind_entry (output_prologue_gr (mask
, grsave
));
4373 as_bad ("First operand not a constant");
4376 add_unwind_entry (output_prologue ());
4378 unwind
.prologue
= 1;
4379 unwind
.prologue_mask
= mask
;
4381 ++unwind
.prologue_count
;
4386 int dummy ATTRIBUTE_UNUSED
;
4390 int bytes_per_address
;
4393 subsegT saved_subseg
;
4394 char *name
, *default_name
, *p
, c
;
4396 int unwind_check
= md
.unwind_check
;
4398 md
.unwind_check
= unwind_check_error
;
4399 if (!in_procedure ("endp"))
4401 md
.unwind_check
= unwind_check
;
4403 if (unwind
.saved_text_seg
)
4405 saved_seg
= unwind
.saved_text_seg
;
4406 saved_subseg
= unwind
.saved_text_subseg
;
4407 unwind
.saved_text_seg
= NULL
;
4411 saved_seg
= now_seg
;
4412 saved_subseg
= now_subseg
;
4415 insn_group_break (1, 0, 0);
4417 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4419 generate_unwind_image (saved_seg
);
4421 if (unwind
.info
|| unwind
.force_unwind_entry
)
4425 subseg_set (md
.last_text_seg
, 0);
4426 proc_end
= expr_build_dot ();
4428 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4430 /* Make sure that section has 4 byte alignment for ILP32 and
4431 8 byte alignment for LP64. */
4432 record_alignment (now_seg
, md
.pointer_size_shift
);
4434 /* Need space for 3 pointers for procedure start, procedure end,
4436 ptr
= frag_more (3 * md
.pointer_size
);
4437 where
= frag_now_fix () - (3 * md
.pointer_size
);
4438 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4440 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4441 e
.X_op
= O_pseudo_fixup
;
4442 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4444 e
.X_add_symbol
= unwind
.proc_start
;
4445 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4447 e
.X_op
= O_pseudo_fixup
;
4448 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4450 e
.X_add_symbol
= proc_end
;
4451 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4452 bytes_per_address
, &e
);
4456 e
.X_op
= O_pseudo_fixup
;
4457 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4459 e
.X_add_symbol
= unwind
.info
;
4460 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4461 bytes_per_address
, &e
);
4464 md_number_to_chars (ptr
+ (bytes_per_address
* 2), 0,
4468 subseg_set (saved_seg
, saved_subseg
);
4470 if (unwind
.proc_start
)
4471 default_name
= (char *) S_GET_NAME (unwind
.proc_start
);
4473 default_name
= NULL
;
4475 /* Parse names of main and alternate entry points and set symbol sizes. */
4479 name
= input_line_pointer
;
4480 c
= get_symbol_end ();
4481 p
= input_line_pointer
;
4484 if (md
.unwind_check
== unwind_check_warning
)
4488 as_warn ("Empty argument of .endp. Use the default name `%s'",
4490 name
= default_name
;
4493 as_warn ("Empty argument of .endp");
4496 as_bad ("Empty argument of .endp");
4500 sym
= symbol_find (name
);
4502 && md
.unwind_check
== unwind_check_warning
4504 && default_name
!= name
)
4506 /* We have a bad name. Try the default one if needed. */
4507 as_warn ("`%s' was not defined within procedure. Use the default name `%s'",
4508 name
, default_name
);
4509 name
= default_name
;
4510 sym
= symbol_find (name
);
4512 if (!sym
|| !S_IS_DEFINED (sym
))
4513 as_bad ("`%s' was not defined within procedure", name
);
4514 else if (unwind
.proc_start
4515 && (symbol_get_bfdsym (sym
)->flags
& BSF_FUNCTION
)
4516 && S_GET_SIZE (sym
) == 0 && symbol_get_obj (sym
)->size
== NULL
)
4518 fragS
*fr
= symbol_get_frag (unwind
.proc_start
);
4519 fragS
*frag
= symbol_get_frag (sym
);
4521 /* Check whether the function label is at or beyond last
4523 while (fr
&& fr
!= frag
)
4527 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4528 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4531 symbol_get_obj (sym
)->size
=
4532 (expressionS
*) xmalloc (sizeof (expressionS
));
4533 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4534 symbol_get_obj (sym
)->size
->X_add_symbol
4535 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4536 frag_now_fix (), frag_now
);
4537 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4538 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4545 if (*input_line_pointer
!= ',')
4547 ++input_line_pointer
;
4549 demand_empty_rest_of_line ();
4550 unwind
.proc_start
= unwind
.info
= 0;
4554 dot_template (template)
4557 CURR_SLOT
.user_template
= template;
4562 int dummy ATTRIBUTE_UNUSED
;
4564 int ins
, locs
, outs
, rots
;
4566 if (is_it_end_of_statement ())
4567 ins
= locs
= outs
= rots
= 0;
4570 ins
= get_absolute_expression ();
4571 if (*input_line_pointer
++ != ',')
4573 locs
= get_absolute_expression ();
4574 if (*input_line_pointer
++ != ',')
4576 outs
= get_absolute_expression ();
4577 if (*input_line_pointer
++ != ',')
4579 rots
= get_absolute_expression ();
4581 set_regstack (ins
, locs
, outs
, rots
);
4585 as_bad ("Comma expected");
4586 ignore_rest_of_line ();
4593 unsigned num_regs
, num_alloced
= 0;
4594 struct dynreg
**drpp
, *dr
;
4595 int ch
, base_reg
= 0;
4601 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4602 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4603 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4607 /* First, remove existing names from hash table. */
4608 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4610 hash_delete (md
.dynreg_hash
, dr
->name
);
4611 /* FIXME: Free dr->name. */
4615 drpp
= &md
.dynreg
[type
];
4618 start
= input_line_pointer
;
4619 ch
= get_symbol_end ();
4620 len
= strlen (ia64_canonicalize_symbol_name (start
));
4621 *input_line_pointer
= ch
;
4624 if (*input_line_pointer
!= '[')
4626 as_bad ("Expected '['");
4629 ++input_line_pointer
; /* skip '[' */
4631 num_regs
= get_absolute_expression ();
4633 if (*input_line_pointer
++ != ']')
4635 as_bad ("Expected ']'");
4640 num_alloced
+= num_regs
;
4644 if (num_alloced
> md
.rot
.num_regs
)
4646 as_bad ("Used more than the declared %d rotating registers",
4652 if (num_alloced
> 96)
4654 as_bad ("Used more than the available 96 rotating registers");
4659 if (num_alloced
> 48)
4661 as_bad ("Used more than the available 48 rotating registers");
4672 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4673 memset (*drpp
, 0, sizeof (*dr
));
4676 name
= obstack_alloc (¬es
, len
+ 1);
4677 memcpy (name
, start
, len
);
4682 dr
->num_regs
= num_regs
;
4683 dr
->base
= base_reg
;
4685 base_reg
+= num_regs
;
4687 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4689 as_bad ("Attempt to redefine register set `%s'", name
);
4690 obstack_free (¬es
, name
);
4694 if (*input_line_pointer
!= ',')
4696 ++input_line_pointer
; /* skip comma */
4699 demand_empty_rest_of_line ();
4703 ignore_rest_of_line ();
4707 dot_byteorder (byteorder
)
4710 segment_info_type
*seginfo
= seg_info (now_seg
);
4712 if (byteorder
== -1)
4714 if (seginfo
->tc_segment_info_data
.endian
== 0)
4715 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4716 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4719 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4721 if (target_big_endian
!= byteorder
)
4723 target_big_endian
= byteorder
;
4724 if (target_big_endian
)
4726 ia64_number_to_chars
= number_to_chars_bigendian
;
4727 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4731 ia64_number_to_chars
= number_to_chars_littleendian
;
4732 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4739 int dummy ATTRIBUTE_UNUSED
;
4746 option
= input_line_pointer
;
4747 ch
= get_symbol_end ();
4748 if (strcmp (option
, "lsb") == 0)
4749 md
.flags
&= ~EF_IA_64_BE
;
4750 else if (strcmp (option
, "msb") == 0)
4751 md
.flags
|= EF_IA_64_BE
;
4752 else if (strcmp (option
, "abi32") == 0)
4753 md
.flags
&= ~EF_IA_64_ABI64
;
4754 else if (strcmp (option
, "abi64") == 0)
4755 md
.flags
|= EF_IA_64_ABI64
;
4757 as_bad ("Unknown psr option `%s'", option
);
4758 *input_line_pointer
= ch
;
4761 if (*input_line_pointer
!= ',')
4764 ++input_line_pointer
;
4767 demand_empty_rest_of_line ();
4772 int dummy ATTRIBUTE_UNUSED
;
4774 new_logical_line (0, get_absolute_expression ());
4775 demand_empty_rest_of_line ();
4779 cross_section (ref
, cons
, ua
)
4781 void (*cons
) PARAMS((int));
4785 int saved_auto_align
;
4786 unsigned int section_count
;
4789 start
= input_line_pointer
;
4795 name
= demand_copy_C_string (&len
);
4796 obstack_free(¬es
, name
);
4799 ignore_rest_of_line ();
4805 char c
= get_symbol_end ();
4807 if (input_line_pointer
== start
)
4809 as_bad ("Missing section name");
4810 ignore_rest_of_line ();
4813 *input_line_pointer
= c
;
4815 end
= input_line_pointer
;
4817 if (*input_line_pointer
!= ',')
4819 as_bad ("Comma expected after section name");
4820 ignore_rest_of_line ();
4824 end
= input_line_pointer
+ 1; /* skip comma */
4825 input_line_pointer
= start
;
4826 md
.keep_pending_output
= 1;
4827 section_count
= bfd_count_sections(stdoutput
);
4828 obj_elf_section (0);
4829 if (section_count
!= bfd_count_sections(stdoutput
))
4830 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
4831 input_line_pointer
= end
;
4832 saved_auto_align
= md
.auto_align
;
4837 md
.auto_align
= saved_auto_align
;
4838 obj_elf_previous (0);
4839 md
.keep_pending_output
= 0;
4846 cross_section (size
, cons
, 0);
4849 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4852 stmt_float_cons (kind
)
4873 ia64_do_align (alignment
);
4881 int saved_auto_align
= md
.auto_align
;
4885 md
.auto_align
= saved_auto_align
;
4889 dot_xfloat_cons (kind
)
4892 cross_section (kind
, stmt_float_cons
, 0);
4896 dot_xstringer (zero
)
4899 cross_section (zero
, stringer
, 0);
4906 cross_section (size
, cons
, 1);
4910 dot_xfloat_cons_ua (kind
)
4913 cross_section (kind
, float_cons
, 1);
4916 /* .reg.val <regname>,value */
4920 int dummy ATTRIBUTE_UNUSED
;
4925 if (reg
.X_op
!= O_register
)
4927 as_bad (_("Register name expected"));
4928 ignore_rest_of_line ();
4930 else if (*input_line_pointer
++ != ',')
4932 as_bad (_("Comma expected"));
4933 ignore_rest_of_line ();
4937 valueT value
= get_absolute_expression ();
4938 int regno
= reg
.X_add_number
;
4939 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4940 as_warn (_("Register value annotation ignored"));
4943 gr_values
[regno
- REG_GR
].known
= 1;
4944 gr_values
[regno
- REG_GR
].value
= value
;
4945 gr_values
[regno
- REG_GR
].path
= md
.path
;
4948 demand_empty_rest_of_line ();
4953 .serialize.instruction
4956 dot_serialize (type
)
4959 insn_group_break (0, 0, 0);
4961 instruction_serialization ();
4963 data_serialization ();
4964 insn_group_break (0, 0, 0);
4965 demand_empty_rest_of_line ();
4968 /* select dv checking mode
4973 A stop is inserted when changing modes
4980 if (md
.manual_bundling
)
4981 as_warn (_("Directive invalid within a bundle"));
4983 if (type
== 'E' || type
== 'A')
4984 md
.mode_explicitly_set
= 0;
4986 md
.mode_explicitly_set
= 1;
4993 if (md
.explicit_mode
)
4994 insn_group_break (1, 0, 0);
4995 md
.explicit_mode
= 0;
4999 if (!md
.explicit_mode
)
5000 insn_group_break (1, 0, 0);
5001 md
.explicit_mode
= 1;
5005 if (md
.explicit_mode
!= md
.default_explicit_mode
)
5006 insn_group_break (1, 0, 0);
5007 md
.explicit_mode
= md
.default_explicit_mode
;
5008 md
.mode_explicitly_set
= 0;
5019 for (regno
= 0; regno
< 64; regno
++)
5021 if (mask
& ((valueT
) 1 << regno
))
5023 fprintf (stderr
, "%s p%d", comma
, regno
);
5030 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5031 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5032 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5033 .pred.safe_across_calls p1 [, p2 [,...]]
5042 int p1
= -1, p2
= -1;
5046 if (*input_line_pointer
== '"')
5049 char *form
= demand_copy_C_string (&len
);
5051 if (strcmp (form
, "mutex") == 0)
5053 else if (strcmp (form
, "clear") == 0)
5055 else if (strcmp (form
, "imply") == 0)
5057 obstack_free (¬es
, form
);
5059 else if (*input_line_pointer
== '@')
5061 char *form
= ++input_line_pointer
;
5062 char c
= get_symbol_end();
5064 if (strcmp (form
, "mutex") == 0)
5066 else if (strcmp (form
, "clear") == 0)
5068 else if (strcmp (form
, "imply") == 0)
5070 *input_line_pointer
= c
;
5074 as_bad (_("Missing predicate relation type"));
5075 ignore_rest_of_line ();
5080 as_bad (_("Unrecognized predicate relation type"));
5081 ignore_rest_of_line ();
5084 if (*input_line_pointer
== ',')
5085 ++input_line_pointer
;
5094 expressionS pr
, *pr1
, *pr2
;
5097 if (pr
.X_op
== O_register
5098 && pr
.X_add_number
>= REG_P
5099 && pr
.X_add_number
<= REG_P
+ 63)
5101 regno
= pr
.X_add_number
- REG_P
;
5109 else if (type
!= 'i'
5110 && pr
.X_op
== O_subtract
5111 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5112 && pr1
->X_op
== O_register
5113 && pr1
->X_add_number
>= REG_P
5114 && pr1
->X_add_number
<= REG_P
+ 63
5115 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5116 && pr2
->X_op
== O_register
5117 && pr2
->X_add_number
>= REG_P
5118 && pr2
->X_add_number
<= REG_P
+ 63)
5123 regno
= pr1
->X_add_number
- REG_P
;
5124 stop
= pr2
->X_add_number
- REG_P
;
5127 as_bad (_("Bad register range"));
5128 ignore_rest_of_line ();
5131 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5132 count
+= stop
- regno
+ 1;
5136 as_bad (_("Predicate register expected"));
5137 ignore_rest_of_line ();
5141 as_warn (_("Duplicate predicate register ignored"));
5143 if (*input_line_pointer
!= ',')
5145 ++input_line_pointer
;
5154 clear_qp_mutex (mask
);
5155 clear_qp_implies (mask
, (valueT
) 0);
5158 if (count
!= 2 || p1
== -1 || p2
== -1)
5159 as_bad (_("Predicate source and target required"));
5160 else if (p1
== 0 || p2
== 0)
5161 as_bad (_("Use of p0 is not valid in this context"));
5163 add_qp_imply (p1
, p2
);
5168 as_bad (_("At least two PR arguments expected"));
5173 as_bad (_("Use of p0 is not valid in this context"));
5176 add_qp_mutex (mask
);
5179 /* note that we don't override any existing relations */
5182 as_bad (_("At least one PR argument expected"));
5187 fprintf (stderr
, "Safe across calls: ");
5188 print_prmask (mask
);
5189 fprintf (stderr
, "\n");
5191 qp_safe_across_calls
= mask
;
5194 demand_empty_rest_of_line ();
5197 /* .entry label [, label [, ...]]
5198 Hint to DV code that the given labels are to be considered entry points.
5199 Otherwise, only global labels are considered entry points. */
5203 int dummy ATTRIBUTE_UNUSED
;
5212 name
= input_line_pointer
;
5213 c
= get_symbol_end ();
5214 symbolP
= symbol_find_or_make (name
);
5216 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
5218 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5221 *input_line_pointer
= c
;
5223 c
= *input_line_pointer
;
5226 input_line_pointer
++;
5228 if (*input_line_pointer
== '\n')
5234 demand_empty_rest_of_line ();
5237 /* .mem.offset offset, base
5238 "base" is used to distinguish between offsets from a different base. */
5241 dot_mem_offset (dummy
)
5242 int dummy ATTRIBUTE_UNUSED
;
5244 md
.mem_offset
.hint
= 1;
5245 md
.mem_offset
.offset
= get_absolute_expression ();
5246 if (*input_line_pointer
!= ',')
5248 as_bad (_("Comma expected"));
5249 ignore_rest_of_line ();
5252 ++input_line_pointer
;
5253 md
.mem_offset
.base
= get_absolute_expression ();
5254 demand_empty_rest_of_line ();
5257 /* ia64-specific pseudo-ops: */
5258 const pseudo_typeS md_pseudo_table
[] =
5260 { "radix", dot_radix
, 0 },
5261 { "lcomm", s_lcomm_bytes
, 1 },
5262 { "loc", dot_loc
, 0 },
5263 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5264 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5265 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5266 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5267 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5268 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5269 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5270 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5271 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5272 { "proc", dot_proc
, 0 },
5273 { "body", dot_body
, 0 },
5274 { "prologue", dot_prologue
, 0 },
5275 { "endp", dot_endp
, 0 },
5277 { "fframe", dot_fframe
, 0 },
5278 { "vframe", dot_vframe
, 0 },
5279 { "vframesp", dot_vframesp
, 0 },
5280 { "vframepsp", dot_vframepsp
, 0 },
5281 { "save", dot_save
, 0 },
5282 { "restore", dot_restore
, 0 },
5283 { "restorereg", dot_restorereg
, 0 },
5284 { "restorereg.p", dot_restorereg_p
, 0 },
5285 { "handlerdata", dot_handlerdata
, 0 },
5286 { "unwentry", dot_unwentry
, 0 },
5287 { "altrp", dot_altrp
, 0 },
5288 { "savesp", dot_savemem
, 0 },
5289 { "savepsp", dot_savemem
, 1 },
5290 { "save.g", dot_saveg
, 0 },
5291 { "save.f", dot_savef
, 0 },
5292 { "save.b", dot_saveb
, 0 },
5293 { "save.gf", dot_savegf
, 0 },
5294 { "spill", dot_spill
, 0 },
5295 { "spillreg", dot_spillreg
, 0 },
5296 { "spillsp", dot_spillmem
, 0 },
5297 { "spillpsp", dot_spillmem
, 1 },
5298 { "spillreg.p", dot_spillreg_p
, 0 },
5299 { "spillsp.p", dot_spillmem_p
, 0 },
5300 { "spillpsp.p", dot_spillmem_p
, 1 },
5301 { "label_state", dot_label_state
, 0 },
5302 { "copy_state", dot_copy_state
, 0 },
5303 { "unwabi", dot_unwabi
, 0 },
5304 { "personality", dot_personality
, 0 },
5305 { "mii", dot_template
, 0x0 },
5306 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5307 { "mlx", dot_template
, 0x2 },
5308 { "mmi", dot_template
, 0x4 },
5309 { "mfi", dot_template
, 0x6 },
5310 { "mmf", dot_template
, 0x7 },
5311 { "mib", dot_template
, 0x8 },
5312 { "mbb", dot_template
, 0x9 },
5313 { "bbb", dot_template
, 0xb },
5314 { "mmb", dot_template
, 0xc },
5315 { "mfb", dot_template
, 0xe },
5316 { "align", dot_align
, 0 },
5317 { "regstk", dot_regstk
, 0 },
5318 { "rotr", dot_rot
, DYNREG_GR
},
5319 { "rotf", dot_rot
, DYNREG_FR
},
5320 { "rotp", dot_rot
, DYNREG_PR
},
5321 { "lsb", dot_byteorder
, 0 },
5322 { "msb", dot_byteorder
, 1 },
5323 { "psr", dot_psr
, 0 },
5324 { "alias", dot_alias
, 0 },
5325 { "secalias", dot_alias
, 1 },
5326 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5328 { "xdata1", dot_xdata
, 1 },
5329 { "xdata2", dot_xdata
, 2 },
5330 { "xdata4", dot_xdata
, 4 },
5331 { "xdata8", dot_xdata
, 8 },
5332 { "xdata16", dot_xdata
, 16 },
5333 { "xreal4", dot_xfloat_cons
, 'f' },
5334 { "xreal8", dot_xfloat_cons
, 'd' },
5335 { "xreal10", dot_xfloat_cons
, 'x' },
5336 { "xreal16", dot_xfloat_cons
, 'X' },
5337 { "xstring", dot_xstringer
, 0 },
5338 { "xstringz", dot_xstringer
, 1 },
5340 /* unaligned versions: */
5341 { "xdata2.ua", dot_xdata_ua
, 2 },
5342 { "xdata4.ua", dot_xdata_ua
, 4 },
5343 { "xdata8.ua", dot_xdata_ua
, 8 },
5344 { "xdata16.ua", dot_xdata_ua
, 16 },
5345 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5346 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5347 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5348 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5350 /* annotations/DV checking support */
5351 { "entry", dot_entry
, 0 },
5352 { "mem.offset", dot_mem_offset
, 0 },
5353 { "pred.rel", dot_pred_rel
, 0 },
5354 { "pred.rel.clear", dot_pred_rel
, 'c' },
5355 { "pred.rel.imply", dot_pred_rel
, 'i' },
5356 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5357 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5358 { "reg.val", dot_reg_val
, 0 },
5359 { "serialize.data", dot_serialize
, 0 },
5360 { "serialize.instruction", dot_serialize
, 1 },
5361 { "auto", dot_dv_mode
, 'a' },
5362 { "explicit", dot_dv_mode
, 'e' },
5363 { "default", dot_dv_mode
, 'd' },
5365 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5366 IA-64 aligns data allocation pseudo-ops by default, so we have to
5367 tell it that these ones are supposed to be unaligned. Long term,
5368 should rewrite so that only IA-64 specific data allocation pseudo-ops
5369 are aligned by default. */
5370 {"2byte", stmt_cons_ua
, 2},
5371 {"4byte", stmt_cons_ua
, 4},
5372 {"8byte", stmt_cons_ua
, 8},
5377 static const struct pseudo_opcode
5380 void (*handler
) (int);
5385 /* these are more like pseudo-ops, but don't start with a dot */
5386 { "data1", cons
, 1 },
5387 { "data2", cons
, 2 },
5388 { "data4", cons
, 4 },
5389 { "data8", cons
, 8 },
5390 { "data16", cons
, 16 },
5391 { "real4", stmt_float_cons
, 'f' },
5392 { "real8", stmt_float_cons
, 'd' },
5393 { "real10", stmt_float_cons
, 'x' },
5394 { "real16", stmt_float_cons
, 'X' },
5395 { "string", stringer
, 0 },
5396 { "stringz", stringer
, 1 },
5398 /* unaligned versions: */
5399 { "data2.ua", stmt_cons_ua
, 2 },
5400 { "data4.ua", stmt_cons_ua
, 4 },
5401 { "data8.ua", stmt_cons_ua
, 8 },
5402 { "data16.ua", stmt_cons_ua
, 16 },
5403 { "real4.ua", float_cons
, 'f' },
5404 { "real8.ua", float_cons
, 'd' },
5405 { "real10.ua", float_cons
, 'x' },
5406 { "real16.ua", float_cons
, 'X' },
5409 /* Declare a register by creating a symbol for it and entering it in
5410 the symbol table. */
5413 declare_register (name
, regnum
)
5420 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
5422 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5424 as_fatal ("Inserting \"%s\" into register table failed: %s",
5431 declare_register_set (prefix
, num_regs
, base_regnum
)
5439 for (i
= 0; i
< num_regs
; ++i
)
5441 sprintf (name
, "%s%u", prefix
, i
);
5442 declare_register (name
, base_regnum
+ i
);
5447 operand_width (opnd
)
5448 enum ia64_opnd opnd
;
5450 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5451 unsigned int bits
= 0;
5455 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5456 bits
+= odesc
->field
[i
].bits
;
5461 static enum operand_match_result
5462 operand_match (idesc
, index
, e
)
5463 const struct ia64_opcode
*idesc
;
5467 enum ia64_opnd opnd
= idesc
->operands
[index
];
5468 int bits
, relocatable
= 0;
5469 struct insn_fix
*fix
;
5476 case IA64_OPND_AR_CCV
:
5477 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5478 return OPERAND_MATCH
;
5481 case IA64_OPND_AR_CSD
:
5482 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5483 return OPERAND_MATCH
;
5486 case IA64_OPND_AR_PFS
:
5487 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5488 return OPERAND_MATCH
;
5492 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5493 return OPERAND_MATCH
;
5497 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5498 return OPERAND_MATCH
;
5502 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5503 return OPERAND_MATCH
;
5506 case IA64_OPND_PR_ROT
:
5507 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5508 return OPERAND_MATCH
;
5512 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5513 return OPERAND_MATCH
;
5516 case IA64_OPND_PSR_L
:
5517 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5518 return OPERAND_MATCH
;
5521 case IA64_OPND_PSR_UM
:
5522 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5523 return OPERAND_MATCH
;
5527 if (e
->X_op
== O_constant
)
5529 if (e
->X_add_number
== 1)
5530 return OPERAND_MATCH
;
5532 return OPERAND_OUT_OF_RANGE
;
5537 if (e
->X_op
== O_constant
)
5539 if (e
->X_add_number
== 8)
5540 return OPERAND_MATCH
;
5542 return OPERAND_OUT_OF_RANGE
;
5547 if (e
->X_op
== O_constant
)
5549 if (e
->X_add_number
== 16)
5550 return OPERAND_MATCH
;
5552 return OPERAND_OUT_OF_RANGE
;
5556 /* register operands: */
5559 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5560 && e
->X_add_number
< REG_AR
+ 128)
5561 return OPERAND_MATCH
;
5566 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5567 && e
->X_add_number
< REG_BR
+ 8)
5568 return OPERAND_MATCH
;
5572 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5573 && e
->X_add_number
< REG_CR
+ 128)
5574 return OPERAND_MATCH
;
5581 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5582 && e
->X_add_number
< REG_FR
+ 128)
5583 return OPERAND_MATCH
;
5588 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5589 && e
->X_add_number
< REG_P
+ 64)
5590 return OPERAND_MATCH
;
5596 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5597 && e
->X_add_number
< REG_GR
+ 128)
5598 return OPERAND_MATCH
;
5601 case IA64_OPND_R3_2
:
5602 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5604 if (e
->X_add_number
< REG_GR
+ 4)
5605 return OPERAND_MATCH
;
5606 else if (e
->X_add_number
< REG_GR
+ 128)
5607 return OPERAND_OUT_OF_RANGE
;
5611 /* indirect operands: */
5612 case IA64_OPND_CPUID_R3
:
5613 case IA64_OPND_DBR_R3
:
5614 case IA64_OPND_DTR_R3
:
5615 case IA64_OPND_ITR_R3
:
5616 case IA64_OPND_IBR_R3
:
5617 case IA64_OPND_MSR_R3
:
5618 case IA64_OPND_PKR_R3
:
5619 case IA64_OPND_PMC_R3
:
5620 case IA64_OPND_PMD_R3
:
5621 case IA64_OPND_RR_R3
:
5622 if (e
->X_op
== O_index
&& e
->X_op_symbol
5623 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5624 == opnd
- IA64_OPND_CPUID_R3
))
5625 return OPERAND_MATCH
;
5629 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5630 return OPERAND_MATCH
;
5633 /* immediate operands: */
5634 case IA64_OPND_CNT2a
:
5635 case IA64_OPND_LEN4
:
5636 case IA64_OPND_LEN6
:
5637 bits
= operand_width (idesc
->operands
[index
]);
5638 if (e
->X_op
== O_constant
)
5640 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5641 return OPERAND_MATCH
;
5643 return OPERAND_OUT_OF_RANGE
;
5647 case IA64_OPND_CNT2b
:
5648 if (e
->X_op
== O_constant
)
5650 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5651 return OPERAND_MATCH
;
5653 return OPERAND_OUT_OF_RANGE
;
5657 case IA64_OPND_CNT2c
:
5658 val
= e
->X_add_number
;
5659 if (e
->X_op
== O_constant
)
5661 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5662 return OPERAND_MATCH
;
5664 return OPERAND_OUT_OF_RANGE
;
5669 /* SOR must be an integer multiple of 8 */
5670 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5671 return OPERAND_OUT_OF_RANGE
;
5674 if (e
->X_op
== O_constant
)
5676 if ((bfd_vma
) e
->X_add_number
<= 96)
5677 return OPERAND_MATCH
;
5679 return OPERAND_OUT_OF_RANGE
;
5683 case IA64_OPND_IMMU62
:
5684 if (e
->X_op
== O_constant
)
5686 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5687 return OPERAND_MATCH
;
5689 return OPERAND_OUT_OF_RANGE
;
5693 /* FIXME -- need 62-bit relocation type */
5694 as_bad (_("62-bit relocation not yet implemented"));
5698 case IA64_OPND_IMMU64
:
5699 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5700 || e
->X_op
== O_subtract
)
5702 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5703 fix
->code
= BFD_RELOC_IA64_IMM64
;
5704 if (e
->X_op
!= O_subtract
)
5706 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5707 if (e
->X_op
== O_pseudo_fixup
)
5711 fix
->opnd
= idesc
->operands
[index
];
5714 ++CURR_SLOT
.num_fixups
;
5715 return OPERAND_MATCH
;
5717 else if (e
->X_op
== O_constant
)
5718 return OPERAND_MATCH
;
5721 case IA64_OPND_CCNT5
:
5722 case IA64_OPND_CNT5
:
5723 case IA64_OPND_CNT6
:
5724 case IA64_OPND_CPOS6a
:
5725 case IA64_OPND_CPOS6b
:
5726 case IA64_OPND_CPOS6c
:
5727 case IA64_OPND_IMMU2
:
5728 case IA64_OPND_IMMU7a
:
5729 case IA64_OPND_IMMU7b
:
5730 case IA64_OPND_IMMU21
:
5731 case IA64_OPND_IMMU24
:
5732 case IA64_OPND_MBTYPE4
:
5733 case IA64_OPND_MHTYPE8
:
5734 case IA64_OPND_POS6
:
5735 bits
= operand_width (idesc
->operands
[index
]);
5736 if (e
->X_op
== O_constant
)
5738 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5739 return OPERAND_MATCH
;
5741 return OPERAND_OUT_OF_RANGE
;
5745 case IA64_OPND_IMMU9
:
5746 bits
= operand_width (idesc
->operands
[index
]);
5747 if (e
->X_op
== O_constant
)
5749 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5751 int lobits
= e
->X_add_number
& 0x3;
5752 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5753 e
->X_add_number
|= (bfd_vma
) 0x3;
5754 return OPERAND_MATCH
;
5757 return OPERAND_OUT_OF_RANGE
;
5761 case IA64_OPND_IMM44
:
5762 /* least 16 bits must be zero */
5763 if ((e
->X_add_number
& 0xffff) != 0)
5764 /* XXX technically, this is wrong: we should not be issuing warning
5765 messages until we're sure this instruction pattern is going to
5767 as_warn (_("lower 16 bits of mask ignored"));
5769 if (e
->X_op
== O_constant
)
5771 if (((e
->X_add_number
>= 0
5772 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5773 || (e
->X_add_number
< 0
5774 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5777 if (e
->X_add_number
>= 0
5778 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5780 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5782 return OPERAND_MATCH
;
5785 return OPERAND_OUT_OF_RANGE
;
5789 case IA64_OPND_IMM17
:
5790 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5791 if (e
->X_op
== O_constant
)
5793 if (((e
->X_add_number
>= 0
5794 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5795 || (e
->X_add_number
< 0
5796 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5799 if (e
->X_add_number
>= 0
5800 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5802 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5804 return OPERAND_MATCH
;
5807 return OPERAND_OUT_OF_RANGE
;
5811 case IA64_OPND_IMM14
:
5812 case IA64_OPND_IMM22
:
5814 case IA64_OPND_IMM1
:
5815 case IA64_OPND_IMM8
:
5816 case IA64_OPND_IMM8U4
:
5817 case IA64_OPND_IMM8M1
:
5818 case IA64_OPND_IMM8M1U4
:
5819 case IA64_OPND_IMM8M1U8
:
5820 case IA64_OPND_IMM9a
:
5821 case IA64_OPND_IMM9b
:
5822 bits
= operand_width (idesc
->operands
[index
]);
5823 if (relocatable
&& (e
->X_op
== O_symbol
5824 || e
->X_op
== O_subtract
5825 || e
->X_op
== O_pseudo_fixup
))
5827 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5829 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5830 fix
->code
= BFD_RELOC_IA64_IMM14
;
5832 fix
->code
= BFD_RELOC_IA64_IMM22
;
5834 if (e
->X_op
!= O_subtract
)
5836 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5837 if (e
->X_op
== O_pseudo_fixup
)
5841 fix
->opnd
= idesc
->operands
[index
];
5844 ++CURR_SLOT
.num_fixups
;
5845 return OPERAND_MATCH
;
5847 else if (e
->X_op
!= O_constant
5848 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5849 return OPERAND_MISMATCH
;
5851 if (opnd
== IA64_OPND_IMM8M1U4
)
5853 /* Zero is not valid for unsigned compares that take an adjusted
5854 constant immediate range. */
5855 if (e
->X_add_number
== 0)
5856 return OPERAND_OUT_OF_RANGE
;
5858 /* Sign-extend 32-bit unsigned numbers, so that the following range
5859 checks will work. */
5860 val
= e
->X_add_number
;
5861 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5862 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5863 val
= ((val
<< 32) >> 32);
5865 /* Check for 0x100000000. This is valid because
5866 0x100000000-1 is the same as ((uint32_t) -1). */
5867 if (val
== ((bfd_signed_vma
) 1 << 32))
5868 return OPERAND_MATCH
;
5872 else if (opnd
== IA64_OPND_IMM8M1U8
)
5874 /* Zero is not valid for unsigned compares that take an adjusted
5875 constant immediate range. */
5876 if (e
->X_add_number
== 0)
5877 return OPERAND_OUT_OF_RANGE
;
5879 /* Check for 0x10000000000000000. */
5880 if (e
->X_op
== O_big
)
5882 if (generic_bignum
[0] == 0
5883 && generic_bignum
[1] == 0
5884 && generic_bignum
[2] == 0
5885 && generic_bignum
[3] == 0
5886 && generic_bignum
[4] == 1)
5887 return OPERAND_MATCH
;
5889 return OPERAND_OUT_OF_RANGE
;
5892 val
= e
->X_add_number
- 1;
5894 else if (opnd
== IA64_OPND_IMM8M1
)
5895 val
= e
->X_add_number
- 1;
5896 else if (opnd
== IA64_OPND_IMM8U4
)
5898 /* Sign-extend 32-bit unsigned numbers, so that the following range
5899 checks will work. */
5900 val
= e
->X_add_number
;
5901 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5902 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5903 val
= ((val
<< 32) >> 32);
5906 val
= e
->X_add_number
;
5908 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5909 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5910 return OPERAND_MATCH
;
5912 return OPERAND_OUT_OF_RANGE
;
5914 case IA64_OPND_INC3
:
5915 /* +/- 1, 4, 8, 16 */
5916 val
= e
->X_add_number
;
5919 if (e
->X_op
== O_constant
)
5921 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5922 return OPERAND_MATCH
;
5924 return OPERAND_OUT_OF_RANGE
;
5928 case IA64_OPND_TGT25
:
5929 case IA64_OPND_TGT25b
:
5930 case IA64_OPND_TGT25c
:
5931 case IA64_OPND_TGT64
:
5932 if (e
->X_op
== O_symbol
)
5934 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5935 if (opnd
== IA64_OPND_TGT25
)
5936 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5937 else if (opnd
== IA64_OPND_TGT25b
)
5938 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5939 else if (opnd
== IA64_OPND_TGT25c
)
5940 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5941 else if (opnd
== IA64_OPND_TGT64
)
5942 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5946 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5947 fix
->opnd
= idesc
->operands
[index
];
5950 ++CURR_SLOT
.num_fixups
;
5951 return OPERAND_MATCH
;
5953 case IA64_OPND_TAG13
:
5954 case IA64_OPND_TAG13b
:
5958 return OPERAND_MATCH
;
5961 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5962 /* There are no external relocs for TAG13/TAG13b fields, so we
5963 create a dummy reloc. This will not live past md_apply_fix3. */
5964 fix
->code
= BFD_RELOC_UNUSED
;
5965 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5966 fix
->opnd
= idesc
->operands
[index
];
5969 ++CURR_SLOT
.num_fixups
;
5970 return OPERAND_MATCH
;
5977 case IA64_OPND_LDXMOV
:
5978 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5979 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5980 fix
->opnd
= idesc
->operands
[index
];
5983 ++CURR_SLOT
.num_fixups
;
5984 return OPERAND_MATCH
;
5989 return OPERAND_MISMATCH
;
5998 memset (e
, 0, sizeof (*e
));
6001 if (*input_line_pointer
!= '}')
6003 sep
= *input_line_pointer
++;
6007 if (!md
.manual_bundling
)
6008 as_warn ("Found '}' when manual bundling is off");
6010 CURR_SLOT
.manual_bundling_off
= 1;
6011 md
.manual_bundling
= 0;
6017 /* Returns the next entry in the opcode table that matches the one in
6018 IDESC, and frees the entry in IDESC. If no matching entry is
6019 found, NULL is returned instead. */
6021 static struct ia64_opcode
*
6022 get_next_opcode (struct ia64_opcode
*idesc
)
6024 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6025 ia64_free_opcode (idesc
);
6029 /* Parse the operands for the opcode and find the opcode variant that
6030 matches the specified operands, or NULL if no match is possible. */
6032 static struct ia64_opcode
*
6033 parse_operands (idesc
)
6034 struct ia64_opcode
*idesc
;
6036 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6037 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6040 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6041 enum operand_match_result result
;
6043 char *first_arg
= 0, *end
, *saved_input_pointer
;
6046 assert (strlen (idesc
->name
) <= 128);
6048 strcpy (mnemonic
, idesc
->name
);
6049 if (idesc
->operands
[2] == IA64_OPND_SOF
6050 || idesc
->operands
[1] == IA64_OPND_SOF
)
6052 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6053 can't parse the first operand until we have parsed the
6054 remaining operands of the "alloc" instruction. */
6056 first_arg
= input_line_pointer
;
6057 end
= strchr (input_line_pointer
, '=');
6060 as_bad ("Expected separator `='");
6063 input_line_pointer
= end
+ 1;
6070 if (i
< NELEMS (CURR_SLOT
.opnd
))
6072 sep
= parse_operand (CURR_SLOT
.opnd
+ i
);
6073 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6080 sep
= parse_operand (&dummy
);
6081 if (dummy
.X_op
== O_absent
)
6087 if (sep
!= '=' && sep
!= ',')
6092 if (num_outputs
> 0)
6093 as_bad ("Duplicate equal sign (=) in instruction");
6095 num_outputs
= i
+ 1;
6100 as_bad ("Illegal operand separator `%c'", sep
);
6104 if (idesc
->operands
[2] == IA64_OPND_SOF
6105 || idesc
->operands
[1] == IA64_OPND_SOF
)
6107 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6108 know (strcmp (idesc
->name
, "alloc") == 0);
6109 i
= (CURR_SLOT
.opnd
[1].X_op
== O_register
6110 && CURR_SLOT
.opnd
[1].X_add_number
== REG_AR
+ AR_PFS
) ? 2 : 1;
6111 if (num_operands
== i
+ 3 /* first_arg not included in this count! */
6112 && CURR_SLOT
.opnd
[i
].X_op
== O_constant
6113 && CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6114 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
6115 && CURR_SLOT
.opnd
[i
+ 3].X_op
== O_constant
)
6117 sof
= set_regstack (CURR_SLOT
.opnd
[i
].X_add_number
,
6118 CURR_SLOT
.opnd
[i
+ 1].X_add_number
,
6119 CURR_SLOT
.opnd
[i
+ 2].X_add_number
,
6120 CURR_SLOT
.opnd
[i
+ 3].X_add_number
);
6122 /* now we can parse the first arg: */
6123 saved_input_pointer
= input_line_pointer
;
6124 input_line_pointer
= first_arg
;
6125 sep
= parse_operand (CURR_SLOT
.opnd
+ 0);
6127 --num_outputs
; /* force error */
6128 input_line_pointer
= saved_input_pointer
;
6130 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6131 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6132 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6133 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6137 highest_unmatched_operand
= -4;
6138 curr_out_of_range_pos
= -1;
6140 for (; idesc
; idesc
= get_next_opcode (idesc
))
6142 if (num_outputs
!= idesc
->num_outputs
)
6143 continue; /* mismatch in # of outputs */
6144 if (highest_unmatched_operand
< 0)
6145 highest_unmatched_operand
|= 1;
6146 if (num_operands
> NELEMS (idesc
->operands
)
6147 || (num_operands
< NELEMS (idesc
->operands
)
6148 && idesc
->operands
[num_operands
])
6149 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6150 continue; /* mismatch in number of arguments */
6151 if (highest_unmatched_operand
< 0)
6152 highest_unmatched_operand
|= 2;
6154 CURR_SLOT
.num_fixups
= 0;
6156 /* Try to match all operands. If we see an out-of-range operand,
6157 then continue trying to match the rest of the operands, since if
6158 the rest match, then this idesc will give the best error message. */
6160 out_of_range_pos
= -1;
6161 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6163 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6164 if (result
!= OPERAND_MATCH
)
6166 if (result
!= OPERAND_OUT_OF_RANGE
)
6168 if (out_of_range_pos
< 0)
6169 /* remember position of the first out-of-range operand: */
6170 out_of_range_pos
= i
;
6174 /* If we did not match all operands, or if at least one operand was
6175 out-of-range, then this idesc does not match. Keep track of which
6176 idesc matched the most operands before failing. If we have two
6177 idescs that failed at the same position, and one had an out-of-range
6178 operand, then prefer the out-of-range operand. Thus if we have
6179 "add r0=0x1000000,r1" we get an error saying the constant is out
6180 of range instead of an error saying that the constant should have been
6183 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6185 if (i
> highest_unmatched_operand
6186 || (i
== highest_unmatched_operand
6187 && out_of_range_pos
> curr_out_of_range_pos
))
6189 highest_unmatched_operand
= i
;
6190 if (out_of_range_pos
>= 0)
6192 expected_operand
= idesc
->operands
[out_of_range_pos
];
6193 error_pos
= out_of_range_pos
;
6197 expected_operand
= idesc
->operands
[i
];
6200 curr_out_of_range_pos
= out_of_range_pos
;
6209 if (expected_operand
)
6210 as_bad ("Operand %u of `%s' should be %s",
6211 error_pos
+ 1, mnemonic
,
6212 elf64_ia64_operands
[expected_operand
].desc
);
6213 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6214 as_bad ("Wrong number of output operands");
6215 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6216 as_bad ("Wrong number of input operands");
6218 as_bad ("Operand mismatch");
6222 /* Check that the instruction doesn't use
6223 - r0, f0, or f1 as output operands
6224 - the same predicate twice as output operands
6225 - r0 as address of a base update load or store
6226 - the same GR as output and address of a base update load
6227 - two even- or two odd-numbered FRs as output operands of a floating
6228 point parallel load.
6229 At most two (conflicting) output (or output-like) operands can exist,
6230 (floating point parallel loads have three outputs, but the base register,
6231 if updated, cannot conflict with the actual outputs). */
6233 for (i
= 0; i
< num_operands
; ++i
)
6238 switch (idesc
->operands
[i
])
6243 if (i
< num_outputs
)
6245 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6248 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6250 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6255 if (i
< num_outputs
)
6258 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6260 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6267 if (i
< num_outputs
)
6269 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6270 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6273 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6276 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6278 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6282 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6284 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6287 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6289 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6300 as_warn ("Invalid use of `%c%d' as output operand", reg_class
, regno
);
6303 as_warn ("Invalid use of `r%d' as base update address operand", regno
);
6309 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6314 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6319 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6327 as_warn ("Invalid duplicate use of `%c%d'", reg_class
, reg1
);
6329 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6330 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6331 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6332 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6333 && ! ((reg1
^ reg2
) & 1))
6334 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6335 reg1
- REG_FR
, reg2
- REG_FR
);
6336 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6337 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6338 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6339 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6340 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6341 reg1
- REG_FR
, reg2
- REG_FR
);
6346 build_insn (slot
, insnp
)
6350 const struct ia64_operand
*odesc
, *o2desc
;
6351 struct ia64_opcode
*idesc
= slot
->idesc
;
6357 insn
= idesc
->opcode
| slot
->qp_regno
;
6359 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6361 if (slot
->opnd
[i
].X_op
== O_register
6362 || slot
->opnd
[i
].X_op
== O_constant
6363 || slot
->opnd
[i
].X_op
== O_index
)
6364 val
= slot
->opnd
[i
].X_add_number
;
6365 else if (slot
->opnd
[i
].X_op
== O_big
)
6367 /* This must be the value 0x10000000000000000. */
6368 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6374 switch (idesc
->operands
[i
])
6376 case IA64_OPND_IMMU64
:
6377 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6378 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6379 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6380 | (((val
>> 63) & 0x1) << 36));
6383 case IA64_OPND_IMMU62
:
6384 val
&= 0x3fffffffffffffffULL
;
6385 if (val
!= slot
->opnd
[i
].X_add_number
)
6386 as_warn (_("Value truncated to 62 bits"));
6387 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6388 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6391 case IA64_OPND_TGT64
:
6393 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6394 insn
|= ((((val
>> 59) & 0x1) << 36)
6395 | (((val
>> 0) & 0xfffff) << 13));
6426 case IA64_OPND_R3_2
:
6427 case IA64_OPND_CPUID_R3
:
6428 case IA64_OPND_DBR_R3
:
6429 case IA64_OPND_DTR_R3
:
6430 case IA64_OPND_ITR_R3
:
6431 case IA64_OPND_IBR_R3
:
6433 case IA64_OPND_MSR_R3
:
6434 case IA64_OPND_PKR_R3
:
6435 case IA64_OPND_PMC_R3
:
6436 case IA64_OPND_PMD_R3
:
6437 case IA64_OPND_RR_R3
:
6445 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6446 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6448 as_bad_where (slot
->src_file
, slot
->src_line
,
6449 "Bad operand value: %s", err
);
6450 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6452 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6453 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6455 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6456 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6458 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6459 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6460 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6462 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6463 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6473 int manual_bundling_off
= 0, manual_bundling
= 0;
6474 enum ia64_unit required_unit
, insn_unit
= 0;
6475 enum ia64_insn_type type
[3], insn_type
;
6476 unsigned int template, orig_template
;
6477 bfd_vma insn
[3] = { -1, -1, -1 };
6478 struct ia64_opcode
*idesc
;
6479 int end_of_insn_group
= 0, user_template
= -1;
6480 int n
, i
, j
, first
, curr
, last_slot
;
6481 unw_rec_list
*ptr
, *last_ptr
, *end_ptr
;
6482 bfd_vma t0
= 0, t1
= 0;
6483 struct label_fix
*lfix
;
6484 struct insn_fix
*ifix
;
6490 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6491 know (first
>= 0 & first
< NUM_SLOTS
);
6492 n
= MIN (3, md
.num_slots_in_use
);
6494 /* Determine template: user user_template if specified, best match
6497 if (md
.slot
[first
].user_template
>= 0)
6498 user_template
= template = md
.slot
[first
].user_template
;
6501 /* Auto select appropriate template. */
6502 memset (type
, 0, sizeof (type
));
6504 for (i
= 0; i
< n
; ++i
)
6506 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6508 type
[i
] = md
.slot
[curr
].idesc
->type
;
6509 curr
= (curr
+ 1) % NUM_SLOTS
;
6511 template = best_template
[type
[0]][type
[1]][type
[2]];
6514 /* initialize instructions with appropriate nops: */
6515 for (i
= 0; i
< 3; ++i
)
6516 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6520 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6521 from the start of the frag. */
6522 addr_mod
= frag_now_fix () & 15;
6523 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6524 as_bad (_("instruction address is not a multiple of 16"));
6525 frag_now
->insn_addr
= addr_mod
;
6526 frag_now
->has_code
= 1;
6528 /* now fill in slots with as many insns as possible: */
6530 idesc
= md
.slot
[curr
].idesc
;
6531 end_of_insn_group
= 0;
6533 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6535 /* If we have unwind records, we may need to update some now. */
6536 ptr
= md
.slot
[curr
].unwind_record
;
6539 /* Find the last prologue/body record in the list for the current
6540 insn, and set the slot number for all records up to that point.
6541 This needs to be done now, because prologue/body records refer to
6542 the current point, not the point after the instruction has been
6543 issued. This matters because there may have been nops emitted
6544 meanwhile. Any non-prologue non-body record followed by a
6545 prologue/body record must also refer to the current point. */
6547 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6548 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6549 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6550 || ptr
->r
.type
== body
)
6554 /* Make last_ptr point one after the last prologue/body
6556 last_ptr
= last_ptr
->next
;
6557 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6560 ptr
->slot_number
= (unsigned long) f
+ i
;
6561 ptr
->slot_frag
= frag_now
;
6563 /* Remove the initialized records, so that we won't accidentally
6564 update them again if we insert a nop and continue. */
6565 md
.slot
[curr
].unwind_record
= last_ptr
;
6569 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6570 if (md
.slot
[curr
].manual_bundling_on
)
6573 manual_bundling
= 1;
6575 break; /* Need to start a new bundle. */
6578 /* If this instruction specifies a template, then it must be the first
6579 instruction of a bundle. */
6580 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6583 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6585 if (manual_bundling
&& !manual_bundling_off
)
6587 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6588 "`%s' must be last in bundle", idesc
->name
);
6590 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6594 if (idesc
->flags
& IA64_OPCODE_LAST
)
6597 unsigned int required_template
;
6599 /* If we need a stop bit after an M slot, our only choice is
6600 template 5 (M;;MI). If we need a stop bit after a B
6601 slot, our only choice is to place it at the end of the
6602 bundle, because the only available templates are MIB,
6603 MBB, BBB, MMB, and MFB. We don't handle anything other
6604 than M and B slots because these are the only kind of
6605 instructions that can have the IA64_OPCODE_LAST bit set. */
6606 required_template
= template;
6607 switch (idesc
->type
)
6611 required_template
= 5;
6619 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6620 "Internal error: don't know how to force %s to end"
6621 "of instruction group", idesc
->name
);
6626 && (i
> required_slot
6627 || (required_slot
== 2 && !manual_bundling_off
)
6628 || (user_template
>= 0
6629 /* Changing from MMI to M;MI is OK. */
6630 && (template ^ required_template
) > 1)))
6632 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6633 "`%s' must be last in instruction group",
6635 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6636 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6638 if (required_slot
< i
)
6639 /* Can't fit this instruction. */
6643 if (required_template
!= template)
6645 /* If we switch the template, we need to reset the NOPs
6646 after slot i. The slot-types of the instructions ahead
6647 of i never change, so we don't need to worry about
6648 changing NOPs in front of this slot. */
6649 for (j
= i
; j
< 3; ++j
)
6650 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6652 template = required_template
;
6654 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6656 if (manual_bundling
)
6658 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6659 "Label must be first in a bundle");
6660 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6662 /* This insn must go into the first slot of a bundle. */
6666 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6668 /* We need an instruction group boundary in the middle of a
6669 bundle. See if we can switch to an other template with
6670 an appropriate boundary. */
6672 orig_template
= template;
6673 if (i
== 1 && (user_template
== 4
6674 || (user_template
< 0
6675 && (ia64_templ_desc
[template].exec_unit
[0]
6679 end_of_insn_group
= 0;
6681 else if (i
== 2 && (user_template
== 0
6682 || (user_template
< 0
6683 && (ia64_templ_desc
[template].exec_unit
[1]
6685 /* This test makes sure we don't switch the template if
6686 the next instruction is one that needs to be first in
6687 an instruction group. Since all those instructions are
6688 in the M group, there is no way such an instruction can
6689 fit in this bundle even if we switch the template. The
6690 reason we have to check for this is that otherwise we
6691 may end up generating "MI;;I M.." which has the deadly
6692 effect that the second M instruction is no longer the
6693 first in the group! --davidm 99/12/16 */
6694 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6697 end_of_insn_group
= 0;
6700 && user_template
== 0
6701 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6702 /* Use the next slot. */
6704 else if (curr
!= first
)
6705 /* can't fit this insn */
6708 if (template != orig_template
)
6709 /* if we switch the template, we need to reset the NOPs
6710 after slot i. The slot-types of the instructions ahead
6711 of i never change, so we don't need to worry about
6712 changing NOPs in front of this slot. */
6713 for (j
= i
; j
< 3; ++j
)
6714 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6716 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6718 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6719 if (idesc
->type
== IA64_TYPE_DYN
)
6721 enum ia64_opnd opnd1
, opnd2
;
6723 if ((strcmp (idesc
->name
, "nop") == 0)
6724 || (strcmp (idesc
->name
, "break") == 0))
6725 insn_unit
= required_unit
;
6726 else if (strcmp (idesc
->name
, "hint") == 0)
6728 insn_unit
= required_unit
;
6729 if (required_unit
== IA64_UNIT_B
)
6735 case hint_b_warning
:
6736 as_warn ("hint in B unit may be treated as nop");
6739 /* When manual bundling is off and there is no
6740 user template, we choose a different unit so
6741 that hint won't go into the current slot. We
6742 will fill the current bundle with nops and
6743 try to put hint into the next bundle. */
6744 if (!manual_bundling
&& user_template
< 0)
6745 insn_unit
= IA64_UNIT_I
;
6747 as_bad ("hint in B unit can't be used");
6752 else if (strcmp (idesc
->name
, "chk.s") == 0
6753 || strcmp (idesc
->name
, "mov") == 0)
6755 insn_unit
= IA64_UNIT_M
;
6756 if (required_unit
== IA64_UNIT_I
6757 || (required_unit
== IA64_UNIT_F
&& template == 6))
6758 insn_unit
= IA64_UNIT_I
;
6761 as_fatal ("emit_one_bundle: unexpected dynamic op");
6763 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbfxx"[insn_unit
]);
6764 opnd1
= idesc
->operands
[0];
6765 opnd2
= idesc
->operands
[1];
6766 ia64_free_opcode (idesc
);
6767 idesc
= ia64_find_opcode (mnemonic
);
6768 /* moves to/from ARs have collisions */
6769 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6771 while (idesc
!= NULL
6772 && (idesc
->operands
[0] != opnd1
6773 || idesc
->operands
[1] != opnd2
))
6774 idesc
= get_next_opcode (idesc
);
6776 md
.slot
[curr
].idesc
= idesc
;
6780 insn_type
= idesc
->type
;
6781 insn_unit
= IA64_UNIT_NIL
;
6785 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6786 insn_unit
= required_unit
;
6788 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6789 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6790 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6791 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6792 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6797 if (insn_unit
!= required_unit
)
6798 continue; /* Try next slot. */
6800 if (debug_type
== DEBUG_DWARF2
|| md
.slot
[curr
].loc_directive_seen
)
6802 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6804 md
.slot
[curr
].loc_directive_seen
= 0;
6805 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6808 build_insn (md
.slot
+ curr
, insn
+ i
);
6810 ptr
= md
.slot
[curr
].unwind_record
;
6813 /* Set slot numbers for all remaining unwind records belonging to the
6814 current insn. There can not be any prologue/body unwind records
6816 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6817 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6819 ptr
->slot_number
= (unsigned long) f
+ i
;
6820 ptr
->slot_frag
= frag_now
;
6822 md
.slot
[curr
].unwind_record
= NULL
;
6825 if (required_unit
== IA64_UNIT_L
)
6828 /* skip one slot for long/X-unit instructions */
6831 --md
.num_slots_in_use
;
6834 /* now is a good time to fix up the labels for this insn: */
6835 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6837 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6838 symbol_set_frag (lfix
->sym
, frag_now
);
6840 /* and fix up the tags also. */
6841 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6843 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6844 symbol_set_frag (lfix
->sym
, frag_now
);
6847 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6849 ifix
= md
.slot
[curr
].fixup
+ j
;
6850 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6851 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6852 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6853 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6854 fix
->fx_file
= md
.slot
[curr
].src_file
;
6855 fix
->fx_line
= md
.slot
[curr
].src_line
;
6858 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6861 ia64_free_opcode (md
.slot
[curr
].idesc
);
6862 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6863 md
.slot
[curr
].user_template
= -1;
6865 if (manual_bundling_off
)
6867 manual_bundling
= 0;
6870 curr
= (curr
+ 1) % NUM_SLOTS
;
6871 idesc
= md
.slot
[curr
].idesc
;
6873 if (manual_bundling
> 0)
6875 if (md
.num_slots_in_use
> 0)
6878 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6879 "`%s' does not fit into bundle", idesc
->name
);
6880 else if (last_slot
< 0)
6882 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6883 "`%s' does not fit into %s template",
6884 idesc
->name
, ia64_templ_desc
[template].name
);
6885 /* Drop first insn so we don't livelock. */
6886 --md
.num_slots_in_use
;
6887 know (curr
== first
);
6888 ia64_free_opcode (md
.slot
[curr
].idesc
);
6889 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6890 md
.slot
[curr
].user_template
= -1;
6898 else if (last_slot
== 0)
6899 where
= "slots 2 or 3";
6902 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6903 "`%s' can't go in %s of %s template",
6904 idesc
->name
, where
, ia64_templ_desc
[template].name
);
6908 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6909 "Missing '}' at end of file");
6911 know (md
.num_slots_in_use
< NUM_SLOTS
);
6913 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6914 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6916 number_to_chars_littleendian (f
+ 0, t0
, 8);
6917 number_to_chars_littleendian (f
+ 8, t1
, 8);
6921 unwind
.list
->next_slot_number
= (unsigned long) f
+ 16;
6922 unwind
.list
->next_slot_frag
= frag_now
;
6927 md_parse_option (c
, arg
)
6934 /* Switches from the Intel assembler. */
6936 if (strcmp (arg
, "ilp64") == 0
6937 || strcmp (arg
, "lp64") == 0
6938 || strcmp (arg
, "p64") == 0)
6940 md
.flags
|= EF_IA_64_ABI64
;
6942 else if (strcmp (arg
, "ilp32") == 0)
6944 md
.flags
&= ~EF_IA_64_ABI64
;
6946 else if (strcmp (arg
, "le") == 0)
6948 md
.flags
&= ~EF_IA_64_BE
;
6949 default_big_endian
= 0;
6951 else if (strcmp (arg
, "be") == 0)
6953 md
.flags
|= EF_IA_64_BE
;
6954 default_big_endian
= 1;
6956 else if (strncmp (arg
, "unwind-check=", 13) == 0)
6959 if (strcmp (arg
, "warning") == 0)
6960 md
.unwind_check
= unwind_check_warning
;
6961 else if (strcmp (arg
, "error") == 0)
6962 md
.unwind_check
= unwind_check_error
;
6966 else if (strncmp (arg
, "hint.b=", 7) == 0)
6969 if (strcmp (arg
, "ok") == 0)
6970 md
.hint_b
= hint_b_ok
;
6971 else if (strcmp (arg
, "warning") == 0)
6972 md
.hint_b
= hint_b_warning
;
6973 else if (strcmp (arg
, "error") == 0)
6974 md
.hint_b
= hint_b_error
;
6978 else if (strncmp (arg
, "tune=", 5) == 0)
6981 if (strcmp (arg
, "itanium1") == 0)
6983 else if (strcmp (arg
, "itanium2") == 0)
6993 if (strcmp (arg
, "so") == 0)
6995 /* Suppress signon message. */
6997 else if (strcmp (arg
, "pi") == 0)
6999 /* Reject privileged instructions. FIXME */
7001 else if (strcmp (arg
, "us") == 0)
7003 /* Allow union of signed and unsigned range. FIXME */
7005 else if (strcmp (arg
, "close_fcalls") == 0)
7007 /* Do not resolve global function calls. */
7014 /* temp[="prefix"] Insert temporary labels into the object file
7015 symbol table prefixed by "prefix".
7016 Default prefix is ":temp:".
7021 /* indirect=<tgt> Assume unannotated indirect branches behavior
7022 according to <tgt> --
7023 exit: branch out from the current context (default)
7024 labels: all labels in context may be branch targets
7026 if (strncmp (arg
, "indirect=", 9) != 0)
7031 /* -X conflicts with an ignored option, use -x instead */
7033 if (!arg
|| strcmp (arg
, "explicit") == 0)
7035 /* set default mode to explicit */
7036 md
.default_explicit_mode
= 1;
7039 else if (strcmp (arg
, "auto") == 0)
7041 md
.default_explicit_mode
= 0;
7043 else if (strcmp (arg
, "none") == 0)
7047 else if (strcmp (arg
, "debug") == 0)
7051 else if (strcmp (arg
, "debugx") == 0)
7053 md
.default_explicit_mode
= 1;
7056 else if (strcmp (arg
, "debugn") == 0)
7063 as_bad (_("Unrecognized option '-x%s'"), arg
);
7068 /* nops Print nops statistics. */
7071 /* GNU specific switches for gcc. */
7072 case OPTION_MCONSTANT_GP
:
7073 md
.flags
|= EF_IA_64_CONS_GP
;
7076 case OPTION_MAUTO_PIC
:
7077 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7088 md_show_usage (stream
)
7093 --mconstant-gp mark output file as using the constant-GP model\n\
7094 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7095 --mauto-pic mark output file as using the constant-GP model\n\
7096 without function descriptors (sets ELF header flag\n\
7097 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7098 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7099 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7100 -mtune=[itanium1|itanium2]\n\
7101 tune for a specific CPU (default -mtune=itanium2)\n\
7102 -munwind-check=[warning|error]\n\
7103 unwind directive check (default -munwind-check=warning)\n\
7104 -mhint.b=[ok|warning|error]\n\
7105 hint.b check (default -mhint.b=error)\n\
7106 -x | -xexplicit turn on dependency violation checking\n\
7107 -xauto automagically remove dependency violations (default)\n\
7108 -xnone turn off dependency violation checking\n\
7109 -xdebug debug dependency violation checker\n\
7110 -xdebugn debug dependency violation checker but turn off\n\
7111 dependency violation checking\n\
7112 -xdebugx debug dependency violation checker and turn on\n\
7113 dependency violation checking\n"),
7118 ia64_after_parse_args ()
7120 if (debug_type
== DEBUG_STABS
)
7121 as_fatal (_("--gstabs is not supported for ia64"));
7124 /* Return true if TYPE fits in TEMPL at SLOT. */
7127 match (int templ
, int type
, int slot
)
7129 enum ia64_unit unit
;
7132 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7135 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7137 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7139 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7140 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7141 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7142 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7143 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7144 default: result
= 0; break;
7149 /* Add a bit of extra goodness if a nop of type F or B would fit
7150 in TEMPL at SLOT. */
7153 extra_goodness (int templ
, int slot
)
7158 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7160 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7166 if (match (templ
, IA64_TYPE_M
, slot
)
7167 || match (templ
, IA64_TYPE_I
, slot
))
7168 /* Favor M- and I-unit NOPs. We definitely want to avoid
7169 F-unit and B-unit may cause split-issue or less-than-optimal
7170 branch-prediction. */
7181 /* This function is called once, at assembler startup time. It sets
7182 up all the tables, etc. that the MD part of the assembler will need
7183 that can be determined before arguments are parsed. */
7187 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
7192 md
.explicit_mode
= md
.default_explicit_mode
;
7194 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7196 /* Make sure function pointers get initialized. */
7197 target_big_endian
= -1;
7198 dot_byteorder (default_big_endian
);
7200 alias_hash
= hash_new ();
7201 alias_name_hash
= hash_new ();
7202 secalias_hash
= hash_new ();
7203 secalias_name_hash
= hash_new ();
7205 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7206 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7207 &zero_address_frag
);
7209 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7210 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7211 &zero_address_frag
);
7213 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7214 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7215 &zero_address_frag
);
7217 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7218 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7219 &zero_address_frag
);
7221 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7222 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7223 &zero_address_frag
);
7225 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7226 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7227 &zero_address_frag
);
7229 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7230 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7231 &zero_address_frag
);
7233 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7234 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7235 &zero_address_frag
);
7237 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7238 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7239 &zero_address_frag
);
7241 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7242 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7243 &zero_address_frag
);
7245 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7246 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7247 &zero_address_frag
);
7249 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7250 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7251 &zero_address_frag
);
7253 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7254 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7255 &zero_address_frag
);
7257 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7258 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7259 &zero_address_frag
);
7261 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7262 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7263 &zero_address_frag
);
7265 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7266 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7267 &zero_address_frag
);
7269 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7270 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7271 &zero_address_frag
);
7273 if (md
.tune
!= itanium1
)
7275 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7277 le_nop_stop
[0] = 0x9;
7280 /* Compute the table of best templates. We compute goodness as a
7281 base 4 value, in which each match counts for 3. Match-failures
7282 result in NOPs and we use extra_goodness() to pick the execution
7283 units that are best suited for issuing the NOP. */
7284 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7285 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7286 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7289 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7292 if (match (t
, i
, 0))
7294 if (match (t
, j
, 1))
7296 if (match (t
, k
, 2))
7297 goodness
= 3 + 3 + 3;
7299 goodness
= 3 + 3 + extra_goodness (t
, 2);
7301 else if (match (t
, j
, 2))
7302 goodness
= 3 + 3 + extra_goodness (t
, 1);
7306 goodness
+= extra_goodness (t
, 1);
7307 goodness
+= extra_goodness (t
, 2);
7310 else if (match (t
, i
, 1))
7312 if (match (t
, j
, 2))
7315 goodness
= 3 + extra_goodness (t
, 2);
7317 else if (match (t
, i
, 2))
7318 goodness
= 3 + extra_goodness (t
, 1);
7320 if (goodness
> best
)
7323 best_template
[i
][j
][k
] = t
;
7328 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7329 md
.slot
[i
].user_template
= -1;
7331 md
.pseudo_hash
= hash_new ();
7332 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7334 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7335 (void *) (pseudo_opcode
+ i
));
7337 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7338 pseudo_opcode
[i
].name
, err
);
7341 md
.reg_hash
= hash_new ();
7342 md
.dynreg_hash
= hash_new ();
7343 md
.const_hash
= hash_new ();
7344 md
.entry_hash
= hash_new ();
7346 /* general registers: */
7349 for (i
= 0; i
< total
; ++i
)
7351 sprintf (name
, "r%d", i
- REG_GR
);
7352 md
.regsym
[i
] = declare_register (name
, i
);
7355 /* floating point registers: */
7357 for (; i
< total
; ++i
)
7359 sprintf (name
, "f%d", i
- REG_FR
);
7360 md
.regsym
[i
] = declare_register (name
, i
);
7363 /* application registers: */
7366 for (; i
< total
; ++i
)
7368 sprintf (name
, "ar%d", i
- REG_AR
);
7369 md
.regsym
[i
] = declare_register (name
, i
);
7372 /* control registers: */
7375 for (; i
< total
; ++i
)
7377 sprintf (name
, "cr%d", i
- REG_CR
);
7378 md
.regsym
[i
] = declare_register (name
, i
);
7381 /* predicate registers: */
7383 for (; i
< total
; ++i
)
7385 sprintf (name
, "p%d", i
- REG_P
);
7386 md
.regsym
[i
] = declare_register (name
, i
);
7389 /* branch registers: */
7391 for (; i
< total
; ++i
)
7393 sprintf (name
, "b%d", i
- REG_BR
);
7394 md
.regsym
[i
] = declare_register (name
, i
);
7397 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
7398 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
7399 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
7400 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
7401 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
7402 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
7403 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
7405 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7407 regnum
= indirect_reg
[i
].regnum
;
7408 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
7411 /* define synonyms for application registers: */
7412 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
7413 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
7414 REG_AR
+ ar
[i
- REG_AR
].regnum
);
7416 /* define synonyms for control registers: */
7417 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
7418 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
7419 REG_CR
+ cr
[i
- REG_CR
].regnum
);
7421 declare_register ("gp", REG_GR
+ 1);
7422 declare_register ("sp", REG_GR
+ 12);
7423 declare_register ("rp", REG_BR
+ 0);
7425 /* pseudo-registers used to specify unwind info: */
7426 declare_register ("psp", REG_PSP
);
7428 declare_register_set ("ret", 4, REG_GR
+ 8);
7429 declare_register_set ("farg", 8, REG_FR
+ 8);
7430 declare_register_set ("fret", 8, REG_FR
+ 8);
7432 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7434 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7435 (PTR
) (const_bits
+ i
));
7437 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7441 /* Set the architecture and machine depending on defaults and command line
7443 if (md
.flags
& EF_IA_64_ABI64
)
7444 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7446 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7449 as_warn (_("Could not set architecture and machine"));
7451 /* Set the pointer size and pointer shift size depending on md.flags */
7453 if (md
.flags
& EF_IA_64_ABI64
)
7455 md
.pointer_size
= 8; /* pointers are 8 bytes */
7456 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7460 md
.pointer_size
= 4; /* pointers are 4 bytes */
7461 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7464 md
.mem_offset
.hint
= 0;
7467 md
.entry_labels
= NULL
;
7470 /* Set the default options in md. Cannot do this in md_begin because
7471 that is called after md_parse_option which is where we set the
7472 options in md based on command line options. */
7475 ia64_init (argc
, argv
)
7476 int argc ATTRIBUTE_UNUSED
;
7477 char **argv ATTRIBUTE_UNUSED
;
7479 md
.flags
= MD_FLAGS_DEFAULT
;
7481 /* FIXME: We should change it to unwind_check_error someday. */
7482 md
.unwind_check
= unwind_check_warning
;
7483 md
.hint_b
= hint_b_error
;
7487 /* Return a string for the target object file format. */
7490 ia64_target_format ()
7492 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7494 if (md
.flags
& EF_IA_64_BE
)
7496 if (md
.flags
& EF_IA_64_ABI64
)
7497 #if defined(TE_AIX50)
7498 return "elf64-ia64-aix-big";
7499 #elif defined(TE_HPUX)
7500 return "elf64-ia64-hpux-big";
7502 return "elf64-ia64-big";
7505 #if defined(TE_AIX50)
7506 return "elf32-ia64-aix-big";
7507 #elif defined(TE_HPUX)
7508 return "elf32-ia64-hpux-big";
7510 return "elf32-ia64-big";
7515 if (md
.flags
& EF_IA_64_ABI64
)
7517 return "elf64-ia64-aix-little";
7519 return "elf64-ia64-little";
7523 return "elf32-ia64-aix-little";
7525 return "elf32-ia64-little";
7530 return "unknown-format";
7534 ia64_end_of_source ()
7536 /* terminate insn group upon reaching end of file: */
7537 insn_group_break (1, 0, 0);
7539 /* emits slots we haven't written yet: */
7540 ia64_flush_insns ();
7542 bfd_set_private_flags (stdoutput
, md
.flags
);
7544 md
.mem_offset
.hint
= 0;
7550 if (md
.qp
.X_op
== O_register
)
7551 as_bad ("qualifying predicate not followed by instruction");
7552 md
.qp
.X_op
= O_absent
;
7554 if (ignore_input ())
7557 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7559 if (md
.detect_dv
&& !md
.explicit_mode
)
7566 as_warn (_("Explicit stops are ignored in auto mode"));
7570 insn_group_break (1, 0, 0);
7574 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7576 static int defining_tag
= 0;
7579 ia64_unrecognized_line (ch
)
7585 expression (&md
.qp
);
7586 if (*input_line_pointer
++ != ')')
7588 as_bad ("Expected ')'");
7591 if (md
.qp
.X_op
!= O_register
)
7593 as_bad ("Qualifying predicate expected");
7596 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7598 as_bad ("Predicate register expected");
7604 if (md
.manual_bundling
)
7605 as_warn ("Found '{' when manual bundling is already turned on");
7607 CURR_SLOT
.manual_bundling_on
= 1;
7608 md
.manual_bundling
= 1;
7610 /* Bundling is only acceptable in explicit mode
7611 or when in default automatic mode. */
7612 if (md
.detect_dv
&& !md
.explicit_mode
)
7614 if (!md
.mode_explicitly_set
7615 && !md
.default_explicit_mode
)
7618 as_warn (_("Found '{' after explicit switch to automatic mode"));
7623 if (!md
.manual_bundling
)
7624 as_warn ("Found '}' when manual bundling is off");
7626 PREV_SLOT
.manual_bundling_off
= 1;
7627 md
.manual_bundling
= 0;
7629 /* switch back to automatic mode, if applicable */
7632 && !md
.mode_explicitly_set
7633 && !md
.default_explicit_mode
)
7636 /* Allow '{' to follow on the same line. We also allow ";;", but that
7637 happens automatically because ';' is an end of line marker. */
7639 if (input_line_pointer
[0] == '{')
7641 input_line_pointer
++;
7642 return ia64_unrecognized_line ('{');
7645 demand_empty_rest_of_line ();
7655 if (md
.qp
.X_op
== O_register
)
7657 as_bad ("Tag must come before qualifying predicate.");
7661 /* This implements just enough of read_a_source_file in read.c to
7662 recognize labels. */
7663 if (is_name_beginner (*input_line_pointer
))
7665 s
= input_line_pointer
;
7666 c
= get_symbol_end ();
7668 else if (LOCAL_LABELS_FB
7669 && ISDIGIT (*input_line_pointer
))
7672 while (ISDIGIT (*input_line_pointer
))
7673 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7674 fb_label_instance_inc (temp
);
7675 s
= fb_label_name (temp
, 0);
7676 c
= *input_line_pointer
;
7685 /* Put ':' back for error messages' sake. */
7686 *input_line_pointer
++ = ':';
7687 as_bad ("Expected ':'");
7694 /* Put ':' back for error messages' sake. */
7695 *input_line_pointer
++ = ':';
7696 if (*input_line_pointer
++ != ']')
7698 as_bad ("Expected ']'");
7703 as_bad ("Tag name expected");
7713 /* Not a valid line. */
7718 ia64_frob_label (sym
)
7721 struct label_fix
*fix
;
7723 /* Tags need special handling since they are not bundle breaks like
7727 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7729 fix
->next
= CURR_SLOT
.tag_fixups
;
7730 CURR_SLOT
.tag_fixups
= fix
;
7735 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7737 md
.last_text_seg
= now_seg
;
7738 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7740 fix
->next
= CURR_SLOT
.label_fixups
;
7741 CURR_SLOT
.label_fixups
= fix
;
7743 /* Keep track of how many code entry points we've seen. */
7744 if (md
.path
== md
.maxpaths
)
7747 md
.entry_labels
= (const char **)
7748 xrealloc ((void *) md
.entry_labels
,
7749 md
.maxpaths
* sizeof (char *));
7751 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7756 /* The HP-UX linker will give unresolved symbol errors for symbols
7757 that are declared but unused. This routine removes declared,
7758 unused symbols from an object. */
7760 ia64_frob_symbol (sym
)
7763 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7764 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7765 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7766 && ! S_IS_EXTERNAL (sym
)))
7773 ia64_flush_pending_output ()
7775 if (!md
.keep_pending_output
7776 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7778 /* ??? This causes many unnecessary stop bits to be emitted.
7779 Unfortunately, it isn't clear if it is safe to remove this. */
7780 insn_group_break (1, 0, 0);
7781 ia64_flush_insns ();
7785 /* Do ia64-specific expression optimization. All that's done here is
7786 to transform index expressions that are either due to the indexing
7787 of rotating registers or due to the indexing of indirect register
7790 ia64_optimize_expr (l
, op
, r
)
7799 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
7801 num_regs
= (l
->X_add_number
>> 16);
7802 if ((unsigned) r
->X_add_number
>= num_regs
)
7805 as_bad ("No current frame");
7807 as_bad ("Index out of range 0..%u", num_regs
- 1);
7808 r
->X_add_number
= 0;
7810 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7813 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
7815 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
7816 || l
->X_add_number
== IND_MEM
)
7818 as_bad ("Indirect register set name expected");
7819 l
->X_add_number
= IND_CPUID
;
7822 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
7823 l
->X_add_number
= r
->X_add_number
;
7831 ia64_parse_name (name
, e
, nextcharP
)
7836 struct const_desc
*cdesc
;
7837 struct dynreg
*dr
= 0;
7844 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7846 /* Find what relocation pseudo-function we're dealing with. */
7847 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7848 if (pseudo_func
[idx
].name
7849 && pseudo_func
[idx
].name
[0] == name
[1]
7850 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7852 pseudo_type
= pseudo_func
[idx
].type
;
7855 switch (pseudo_type
)
7857 case PSEUDO_FUNC_RELOC
:
7858 end
= input_line_pointer
;
7859 if (*nextcharP
!= '(')
7861 as_bad ("Expected '('");
7865 ++input_line_pointer
;
7867 if (*input_line_pointer
!= ')')
7869 as_bad ("Missing ')'");
7873 ++input_line_pointer
;
7874 if (e
->X_op
!= O_symbol
)
7876 if (e
->X_op
!= O_pseudo_fixup
)
7878 as_bad ("Not a symbolic expression");
7881 if (idx
!= FUNC_LT_RELATIVE
)
7883 as_bad ("Illegal combination of relocation functions");
7886 switch (S_GET_VALUE (e
->X_op_symbol
))
7888 case FUNC_FPTR_RELATIVE
:
7889 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7890 case FUNC_DTP_MODULE
:
7891 idx
= FUNC_LT_DTP_MODULE
; break;
7892 case FUNC_DTP_RELATIVE
:
7893 idx
= FUNC_LT_DTP_RELATIVE
; break;
7894 case FUNC_TP_RELATIVE
:
7895 idx
= FUNC_LT_TP_RELATIVE
; break;
7897 as_bad ("Illegal combination of relocation functions");
7901 /* Make sure gas doesn't get rid of local symbols that are used
7903 e
->X_op
= O_pseudo_fixup
;
7904 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7906 *nextcharP
= *input_line_pointer
;
7909 case PSEUDO_FUNC_CONST
:
7910 e
->X_op
= O_constant
;
7911 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7914 case PSEUDO_FUNC_REG
:
7915 e
->X_op
= O_register
;
7916 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7925 /* first see if NAME is a known register name: */
7926 sym
= hash_find (md
.reg_hash
, name
);
7929 e
->X_op
= O_register
;
7930 e
->X_add_number
= S_GET_VALUE (sym
);
7934 cdesc
= hash_find (md
.const_hash
, name
);
7937 e
->X_op
= O_constant
;
7938 e
->X_add_number
= cdesc
->value
;
7942 /* check for inN, locN, or outN: */
7947 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7955 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
7963 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
7974 /* Ignore register numbers with leading zeroes, except zero itself. */
7975 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
7977 unsigned long regnum
;
7979 /* The name is inN, locN, or outN; parse the register number. */
7980 regnum
= strtoul (name
+ idx
, &end
, 10);
7981 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
7983 if (regnum
>= dr
->num_regs
)
7986 as_bad ("No current frame");
7988 as_bad ("Register number out of range 0..%u",
7992 e
->X_op
= O_register
;
7993 e
->X_add_number
= dr
->base
+ regnum
;
7998 end
= alloca (strlen (name
) + 1);
8000 name
= ia64_canonicalize_symbol_name (end
);
8001 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8003 /* We've got ourselves the name of a rotating register set.
8004 Store the base register number in the low 16 bits of
8005 X_add_number and the size of the register set in the top 16
8007 e
->X_op
= O_register
;
8008 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8014 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8017 ia64_canonicalize_symbol_name (name
)
8020 size_t len
= strlen (name
), full
= len
;
8022 while (len
> 0 && name
[len
- 1] == '#')
8027 as_bad ("Standalone `#' is illegal");
8029 else if (len
< full
- 1)
8030 as_warn ("Redundant `#' suffix operators");
8035 /* Return true if idesc is a conditional branch instruction. This excludes
8036 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8037 because they always read/write resources regardless of the value of the
8038 qualifying predicate. br.ia must always use p0, and hence is always
8039 taken. Thus this function returns true for branches which can fall
8040 through, and which use no resources if they do fall through. */
8043 is_conditional_branch (idesc
)
8044 struct ia64_opcode
*idesc
;
8046 /* br is a conditional branch. Everything that starts with br. except
8047 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8048 Everything that starts with brl is a conditional branch. */
8049 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8050 && (idesc
->name
[2] == '\0'
8051 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8052 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8053 || idesc
->name
[2] == 'l'
8054 /* br.cond, br.call, br.clr */
8055 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8056 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8057 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8060 /* Return whether the given opcode is a taken branch. If there's any doubt,
8064 is_taken_branch (idesc
)
8065 struct ia64_opcode
*idesc
;
8067 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8068 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8071 /* Return whether the given opcode is an interruption or rfi. If there's any
8072 doubt, returns zero. */
8075 is_interruption_or_rfi (idesc
)
8076 struct ia64_opcode
*idesc
;
8078 if (strcmp (idesc
->name
, "rfi") == 0)
8083 /* Returns the index of the given dependency in the opcode's list of chks, or
8084 -1 if there is no dependency. */
8087 depends_on (depind
, idesc
)
8089 struct ia64_opcode
*idesc
;
8092 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8093 for (i
= 0; i
< dep
->nchks
; i
++)
8095 if (depind
== DEP (dep
->chks
[i
]))
8101 /* Determine a set of specific resources used for a particular resource
8102 class. Returns the number of specific resources identified For those
8103 cases which are not determinable statically, the resource returned is
8106 Meanings of value in 'NOTE':
8107 1) only read/write when the register number is explicitly encoded in the
8109 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8110 accesses CFM when qualifying predicate is in the rotating region.
8111 3) general register value is used to specify an indirect register; not
8112 determinable statically.
8113 4) only read the given resource when bits 7:0 of the indirect index
8114 register value does not match the register number of the resource; not
8115 determinable statically.
8116 5) all rules are implementation specific.
8117 6) only when both the index specified by the reader and the index specified
8118 by the writer have the same value in bits 63:61; not determinable
8120 7) only access the specified resource when the corresponding mask bit is
8122 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8123 only read when these insns reference FR2-31
8124 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8125 written when these insns write FR32-127
8126 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8128 11) The target predicates are written independently of PR[qp], but source
8129 registers are only read if PR[qp] is true. Since the state of PR[qp]
8130 cannot statically be determined, all source registers are marked used.
8131 12) This insn only reads the specified predicate register when that
8132 register is the PR[qp].
8133 13) This reference to ld-c only applies to teh GR whose value is loaded
8134 with data returned from memory, not the post-incremented address register.
8135 14) The RSE resource includes the implementation-specific RSE internal
8136 state resources. At least one (and possibly more) of these resources are
8137 read by each instruction listed in IC:rse-readers. At least one (and
8138 possibly more) of these resources are written by each insn listed in
8140 15+16) Represents reserved instructions, which the assembler does not
8143 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8144 this code; there are no dependency violations based on memory access.
8147 #define MAX_SPECS 256
8152 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
8153 const struct ia64_dependency
*dep
;
8154 struct ia64_opcode
*idesc
;
8155 int type
; /* is this a DV chk or a DV reg? */
8156 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
8157 int note
; /* resource note for this insn's usage */
8158 int path
; /* which execution path to examine */
8165 if (dep
->mode
== IA64_DV_WAW
8166 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8167 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8170 /* template for any resources we identify */
8171 tmpl
.dependency
= dep
;
8173 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8174 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8175 tmpl
.link_to_qp_branch
= 1;
8176 tmpl
.mem_offset
.hint
= 0;
8177 tmpl
.mem_offset
.offset
= 0;
8178 tmpl
.mem_offset
.base
= 0;
8181 tmpl
.cmp_type
= CMP_NONE
;
8188 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8189 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8190 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8192 /* we don't need to track these */
8193 if (dep
->semantics
== IA64_DVS_NONE
)
8196 switch (dep
->specifier
)
8201 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8203 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8204 if (regno
>= 0 && regno
<= 7)
8206 specs
[count
] = tmpl
;
8207 specs
[count
++].index
= regno
;
8213 for (i
= 0; i
< 8; i
++)
8215 specs
[count
] = tmpl
;
8216 specs
[count
++].index
= i
;
8225 case IA64_RS_AR_UNAT
:
8226 /* This is a mov =AR or mov AR= instruction. */
8227 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8229 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8230 if (regno
== AR_UNAT
)
8232 specs
[count
++] = tmpl
;
8237 /* This is a spill/fill, or other instruction that modifies the
8240 /* Unless we can determine the specific bits used, mark the whole
8241 thing; bits 8:3 of the memory address indicate the bit used in
8242 UNAT. The .mem.offset hint may be used to eliminate a small
8243 subset of conflicts. */
8244 specs
[count
] = tmpl
;
8245 if (md
.mem_offset
.hint
)
8248 fprintf (stderr
, " Using hint for spill/fill\n");
8249 /* The index isn't actually used, just set it to something
8250 approximating the bit index. */
8251 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8252 specs
[count
].mem_offset
.hint
= 1;
8253 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8254 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8258 specs
[count
++].specific
= 0;
8266 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8268 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8269 if ((regno
>= 8 && regno
<= 15)
8270 || (regno
>= 20 && regno
<= 23)
8271 || (regno
>= 31 && regno
<= 39)
8272 || (regno
>= 41 && regno
<= 47)
8273 || (regno
>= 67 && regno
<= 111))
8275 specs
[count
] = tmpl
;
8276 specs
[count
++].index
= regno
;
8289 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8291 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8292 if ((regno
>= 48 && regno
<= 63)
8293 || (regno
>= 112 && regno
<= 127))
8295 specs
[count
] = tmpl
;
8296 specs
[count
++].index
= regno
;
8302 for (i
= 48; i
< 64; i
++)
8304 specs
[count
] = tmpl
;
8305 specs
[count
++].index
= i
;
8307 for (i
= 112; i
< 128; i
++)
8309 specs
[count
] = tmpl
;
8310 specs
[count
++].index
= i
;
8328 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8329 if (idesc
->operands
[i
] == IA64_OPND_B1
8330 || idesc
->operands
[i
] == IA64_OPND_B2
)
8332 specs
[count
] = tmpl
;
8333 specs
[count
++].index
=
8334 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8339 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8340 if (idesc
->operands
[i
] == IA64_OPND_B1
8341 || idesc
->operands
[i
] == IA64_OPND_B2
)
8343 specs
[count
] = tmpl
;
8344 specs
[count
++].index
=
8345 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8351 case IA64_RS_CPUID
: /* four or more registers */
8354 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8356 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8357 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8360 specs
[count
] = tmpl
;
8361 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8365 specs
[count
] = tmpl
;
8366 specs
[count
++].specific
= 0;
8376 case IA64_RS_DBR
: /* four or more registers */
8379 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8381 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8382 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8385 specs
[count
] = tmpl
;
8386 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8390 specs
[count
] = tmpl
;
8391 specs
[count
++].specific
= 0;
8395 else if (note
== 0 && !rsrc_write
)
8397 specs
[count
] = tmpl
;
8398 specs
[count
++].specific
= 0;
8406 case IA64_RS_IBR
: /* four or more registers */
8409 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8411 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8412 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8415 specs
[count
] = tmpl
;
8416 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8420 specs
[count
] = tmpl
;
8421 specs
[count
++].specific
= 0;
8434 /* These are implementation specific. Force all references to
8435 conflict with all other references. */
8436 specs
[count
] = tmpl
;
8437 specs
[count
++].specific
= 0;
8445 case IA64_RS_PKR
: /* 16 or more registers */
8446 if (note
== 3 || note
== 4)
8448 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8450 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8451 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8456 specs
[count
] = tmpl
;
8457 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8460 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8462 /* Uses all registers *except* the one in R3. */
8463 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8465 specs
[count
] = tmpl
;
8466 specs
[count
++].index
= i
;
8472 specs
[count
] = tmpl
;
8473 specs
[count
++].specific
= 0;
8480 specs
[count
] = tmpl
;
8481 specs
[count
++].specific
= 0;
8485 case IA64_RS_PMC
: /* four or more registers */
8488 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8489 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8492 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8494 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
8495 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8498 specs
[count
] = tmpl
;
8499 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8503 specs
[count
] = tmpl
;
8504 specs
[count
++].specific
= 0;
8514 case IA64_RS_PMD
: /* four or more registers */
8517 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8519 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8520 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8523 specs
[count
] = tmpl
;
8524 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8528 specs
[count
] = tmpl
;
8529 specs
[count
++].specific
= 0;
8539 case IA64_RS_RR
: /* eight registers */
8542 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8544 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8545 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8548 specs
[count
] = tmpl
;
8549 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8553 specs
[count
] = tmpl
;
8554 specs
[count
++].specific
= 0;
8558 else if (note
== 0 && !rsrc_write
)
8560 specs
[count
] = tmpl
;
8561 specs
[count
++].specific
= 0;
8569 case IA64_RS_CR_IRR
:
8572 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8573 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8575 && idesc
->operands
[1] == IA64_OPND_CR3
8578 for (i
= 0; i
< 4; i
++)
8580 specs
[count
] = tmpl
;
8581 specs
[count
++].index
= CR_IRR0
+ i
;
8587 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8588 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8590 && regno
<= CR_IRR3
)
8592 specs
[count
] = tmpl
;
8593 specs
[count
++].index
= regno
;
8602 case IA64_RS_CR_LRR
:
8609 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8610 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8611 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8613 specs
[count
] = tmpl
;
8614 specs
[count
++].index
= regno
;
8622 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8624 specs
[count
] = tmpl
;
8625 specs
[count
++].index
=
8626 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8641 else if (rsrc_write
)
8643 if (dep
->specifier
== IA64_RS_FRb
8644 && idesc
->operands
[0] == IA64_OPND_F1
)
8646 specs
[count
] = tmpl
;
8647 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8652 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8654 if (idesc
->operands
[i
] == IA64_OPND_F2
8655 || idesc
->operands
[i
] == IA64_OPND_F3
8656 || idesc
->operands
[i
] == IA64_OPND_F4
)
8658 specs
[count
] = tmpl
;
8659 specs
[count
++].index
=
8660 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8669 /* This reference applies only to the GR whose value is loaded with
8670 data returned from memory. */
8671 specs
[count
] = tmpl
;
8672 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8678 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8679 if (idesc
->operands
[i
] == IA64_OPND_R1
8680 || idesc
->operands
[i
] == IA64_OPND_R2
8681 || idesc
->operands
[i
] == IA64_OPND_R3
)
8683 specs
[count
] = tmpl
;
8684 specs
[count
++].index
=
8685 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8687 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8688 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8689 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8691 specs
[count
] = tmpl
;
8692 specs
[count
++].index
=
8693 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8698 /* Look for anything that reads a GR. */
8699 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8701 if (idesc
->operands
[i
] == IA64_OPND_MR3
8702 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8703 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8704 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8705 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8706 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8707 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8708 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8709 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8710 || ((i
>= idesc
->num_outputs
)
8711 && (idesc
->operands
[i
] == IA64_OPND_R1
8712 || idesc
->operands
[i
] == IA64_OPND_R2
8713 || idesc
->operands
[i
] == IA64_OPND_R3
8714 /* addl source register. */
8715 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8717 specs
[count
] = tmpl
;
8718 specs
[count
++].index
=
8719 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8730 /* This is the same as IA64_RS_PRr, except that the register range is
8731 from 1 - 15, and there are no rotating register reads/writes here. */
8735 for (i
= 1; i
< 16; i
++)
8737 specs
[count
] = tmpl
;
8738 specs
[count
++].index
= i
;
8744 /* Mark only those registers indicated by the mask. */
8747 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8748 for (i
= 1; i
< 16; i
++)
8749 if (mask
& ((valueT
) 1 << i
))
8751 specs
[count
] = tmpl
;
8752 specs
[count
++].index
= i
;
8760 else if (note
== 11) /* note 11 implies note 1 as well */
8764 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8766 if (idesc
->operands
[i
] == IA64_OPND_P1
8767 || idesc
->operands
[i
] == IA64_OPND_P2
)
8769 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8770 if (regno
>= 1 && regno
< 16)
8772 specs
[count
] = tmpl
;
8773 specs
[count
++].index
= regno
;
8783 else if (note
== 12)
8785 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8787 specs
[count
] = tmpl
;
8788 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8795 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8796 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8797 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8798 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8800 if ((idesc
->operands
[0] == IA64_OPND_P1
8801 || idesc
->operands
[0] == IA64_OPND_P2
)
8802 && p1
>= 1 && p1
< 16)
8804 specs
[count
] = tmpl
;
8805 specs
[count
].cmp_type
=
8806 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8807 specs
[count
++].index
= p1
;
8809 if ((idesc
->operands
[1] == IA64_OPND_P1
8810 || idesc
->operands
[1] == IA64_OPND_P2
)
8811 && p2
>= 1 && p2
< 16)
8813 specs
[count
] = tmpl
;
8814 specs
[count
].cmp_type
=
8815 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8816 specs
[count
++].index
= p2
;
8821 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8823 specs
[count
] = tmpl
;
8824 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8826 if (idesc
->operands
[1] == IA64_OPND_PR
)
8828 for (i
= 1; i
< 16; i
++)
8830 specs
[count
] = tmpl
;
8831 specs
[count
++].index
= i
;
8842 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8843 simplified cases of this. */
8847 for (i
= 16; i
< 63; i
++)
8849 specs
[count
] = tmpl
;
8850 specs
[count
++].index
= i
;
8856 /* Mark only those registers indicated by the mask. */
8858 && idesc
->operands
[0] == IA64_OPND_PR
)
8860 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8861 if (mask
& ((valueT
) 1 << 16))
8862 for (i
= 16; i
< 63; i
++)
8864 specs
[count
] = tmpl
;
8865 specs
[count
++].index
= i
;
8869 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8871 for (i
= 16; i
< 63; i
++)
8873 specs
[count
] = tmpl
;
8874 specs
[count
++].index
= i
;
8882 else if (note
== 11) /* note 11 implies note 1 as well */
8886 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8888 if (idesc
->operands
[i
] == IA64_OPND_P1
8889 || idesc
->operands
[i
] == IA64_OPND_P2
)
8891 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8892 if (regno
>= 16 && regno
< 63)
8894 specs
[count
] = tmpl
;
8895 specs
[count
++].index
= regno
;
8905 else if (note
== 12)
8907 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8909 specs
[count
] = tmpl
;
8910 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8917 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8918 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8919 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8920 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8922 if ((idesc
->operands
[0] == IA64_OPND_P1
8923 || idesc
->operands
[0] == IA64_OPND_P2
)
8924 && p1
>= 16 && p1
< 63)
8926 specs
[count
] = tmpl
;
8927 specs
[count
].cmp_type
=
8928 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8929 specs
[count
++].index
= p1
;
8931 if ((idesc
->operands
[1] == IA64_OPND_P1
8932 || idesc
->operands
[1] == IA64_OPND_P2
)
8933 && p2
>= 16 && p2
< 63)
8935 specs
[count
] = tmpl
;
8936 specs
[count
].cmp_type
=
8937 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8938 specs
[count
++].index
= p2
;
8943 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8945 specs
[count
] = tmpl
;
8946 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8948 if (idesc
->operands
[1] == IA64_OPND_PR
)
8950 for (i
= 16; i
< 63; i
++)
8952 specs
[count
] = tmpl
;
8953 specs
[count
++].index
= i
;
8965 /* Verify that the instruction is using the PSR bit indicated in
8969 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
8971 if (dep
->regindex
< 6)
8973 specs
[count
++] = tmpl
;
8976 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
8978 if (dep
->regindex
< 32
8979 || dep
->regindex
== 35
8980 || dep
->regindex
== 36
8981 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
8983 specs
[count
++] = tmpl
;
8986 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
8988 if (dep
->regindex
< 32
8989 || dep
->regindex
== 35
8990 || dep
->regindex
== 36
8991 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
8993 specs
[count
++] = tmpl
;
8998 /* Several PSR bits have very specific dependencies. */
8999 switch (dep
->regindex
)
9002 specs
[count
++] = tmpl
;
9007 specs
[count
++] = tmpl
;
9011 /* Only certain CR accesses use PSR.ic */
9012 if (idesc
->operands
[0] == IA64_OPND_CR3
9013 || idesc
->operands
[1] == IA64_OPND_CR3
)
9016 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9019 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
9034 specs
[count
++] = tmpl
;
9043 specs
[count
++] = tmpl
;
9047 /* Only some AR accesses use cpl */
9048 if (idesc
->operands
[0] == IA64_OPND_AR3
9049 || idesc
->operands
[1] == IA64_OPND_AR3
)
9052 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9055 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
9062 && regno
<= AR_K7
))))
9064 specs
[count
++] = tmpl
;
9069 specs
[count
++] = tmpl
;
9079 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9081 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9087 if (mask
& ((valueT
) 1 << dep
->regindex
))
9089 specs
[count
++] = tmpl
;
9094 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9095 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9096 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9097 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9099 if (idesc
->operands
[i
] == IA64_OPND_F1
9100 || idesc
->operands
[i
] == IA64_OPND_F2
9101 || idesc
->operands
[i
] == IA64_OPND_F3
9102 || idesc
->operands
[i
] == IA64_OPND_F4
)
9104 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9105 if (reg
>= min
&& reg
<= max
)
9107 specs
[count
++] = tmpl
;
9114 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9115 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9116 /* mfh is read on writes to FR32-127; mfl is read on writes to
9118 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9120 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9122 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9123 if (reg
>= min
&& reg
<= max
)
9125 specs
[count
++] = tmpl
;
9130 else if (note
== 10)
9132 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9134 if (idesc
->operands
[i
] == IA64_OPND_R1
9135 || idesc
->operands
[i
] == IA64_OPND_R2
9136 || idesc
->operands
[i
] == IA64_OPND_R3
)
9138 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9139 if (regno
>= 16 && regno
<= 31)
9141 specs
[count
++] = tmpl
;
9152 case IA64_RS_AR_FPSR
:
9153 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9155 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9156 if (regno
== AR_FPSR
)
9158 specs
[count
++] = tmpl
;
9163 specs
[count
++] = tmpl
;
9168 /* Handle all AR[REG] resources */
9169 if (note
== 0 || note
== 1)
9171 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9172 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9173 && regno
== dep
->regindex
)
9175 specs
[count
++] = tmpl
;
9177 /* other AR[REG] resources may be affected by AR accesses */
9178 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9181 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9182 switch (dep
->regindex
)
9188 if (regno
== AR_BSPSTORE
)
9190 specs
[count
++] = tmpl
;
9194 (regno
== AR_BSPSTORE
9195 || regno
== AR_RNAT
))
9197 specs
[count
++] = tmpl
;
9202 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9205 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9206 switch (dep
->regindex
)
9211 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9213 specs
[count
++] = tmpl
;
9220 specs
[count
++] = tmpl
;
9230 /* Handle all CR[REG] resources */
9231 if (note
== 0 || note
== 1)
9233 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9235 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9236 if (regno
== dep
->regindex
)
9238 specs
[count
++] = tmpl
;
9240 else if (!rsrc_write
)
9242 /* Reads from CR[IVR] affect other resources. */
9243 if (regno
== CR_IVR
)
9245 if ((dep
->regindex
>= CR_IRR0
9246 && dep
->regindex
<= CR_IRR3
)
9247 || dep
->regindex
== CR_TPR
)
9249 specs
[count
++] = tmpl
;
9256 specs
[count
++] = tmpl
;
9265 case IA64_RS_INSERVICE
:
9266 /* look for write of EOI (67) or read of IVR (65) */
9267 if ((idesc
->operands
[0] == IA64_OPND_CR3
9268 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9269 || (idesc
->operands
[1] == IA64_OPND_CR3
9270 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9272 specs
[count
++] = tmpl
;
9279 specs
[count
++] = tmpl
;
9290 specs
[count
++] = tmpl
;
9294 /* Check if any of the registers accessed are in the rotating region.
9295 mov to/from pr accesses CFM only when qp_regno is in the rotating
9297 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9299 if (idesc
->operands
[i
] == IA64_OPND_R1
9300 || idesc
->operands
[i
] == IA64_OPND_R2
9301 || idesc
->operands
[i
] == IA64_OPND_R3
)
9303 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9304 /* Assumes that md.rot.num_regs is always valid */
9305 if (md
.rot
.num_regs
> 0
9307 && num
< 31 + md
.rot
.num_regs
)
9309 specs
[count
] = tmpl
;
9310 specs
[count
++].specific
= 0;
9313 else if (idesc
->operands
[i
] == IA64_OPND_F1
9314 || idesc
->operands
[i
] == IA64_OPND_F2
9315 || idesc
->operands
[i
] == IA64_OPND_F3
9316 || idesc
->operands
[i
] == IA64_OPND_F4
)
9318 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9321 specs
[count
] = tmpl
;
9322 specs
[count
++].specific
= 0;
9325 else if (idesc
->operands
[i
] == IA64_OPND_P1
9326 || idesc
->operands
[i
] == IA64_OPND_P2
)
9328 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9331 specs
[count
] = tmpl
;
9332 specs
[count
++].specific
= 0;
9336 if (CURR_SLOT
.qp_regno
> 15)
9338 specs
[count
] = tmpl
;
9339 specs
[count
++].specific
= 0;
9344 /* This is the same as IA64_RS_PRr, except simplified to account for
9345 the fact that there is only one register. */
9349 specs
[count
++] = tmpl
;
9354 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9355 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9356 if (mask
& ((valueT
) 1 << 63))
9357 specs
[count
++] = tmpl
;
9359 else if (note
== 11)
9361 if ((idesc
->operands
[0] == IA64_OPND_P1
9362 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9363 || (idesc
->operands
[1] == IA64_OPND_P2
9364 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9366 specs
[count
++] = tmpl
;
9369 else if (note
== 12)
9371 if (CURR_SLOT
.qp_regno
== 63)
9373 specs
[count
++] = tmpl
;
9380 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9381 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9382 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9383 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9386 && (idesc
->operands
[0] == IA64_OPND_P1
9387 || idesc
->operands
[0] == IA64_OPND_P2
))
9389 specs
[count
] = tmpl
;
9390 specs
[count
++].cmp_type
=
9391 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9394 && (idesc
->operands
[1] == IA64_OPND_P1
9395 || idesc
->operands
[1] == IA64_OPND_P2
))
9397 specs
[count
] = tmpl
;
9398 specs
[count
++].cmp_type
=
9399 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9404 if (CURR_SLOT
.qp_regno
== 63)
9406 specs
[count
++] = tmpl
;
9417 /* FIXME we can identify some individual RSE written resources, but RSE
9418 read resources have not yet been completely identified, so for now
9419 treat RSE as a single resource */
9420 if (strncmp (idesc
->name
, "mov", 3) == 0)
9424 if (idesc
->operands
[0] == IA64_OPND_AR3
9425 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9427 specs
[count
++] = tmpl
;
9432 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9434 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9435 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9437 specs
[count
++] = tmpl
;
9440 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9442 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9443 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9444 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9446 specs
[count
++] = tmpl
;
9453 specs
[count
++] = tmpl
;
9458 /* FIXME -- do any of these need to be non-specific? */
9459 specs
[count
++] = tmpl
;
9463 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9470 /* Clear branch flags on marked resources. This breaks the link between the
9471 QP of the marking instruction and a subsequent branch on the same QP. */
9474 clear_qp_branch_flag (mask
)
9478 for (i
= 0; i
< regdepslen
; i
++)
9480 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9481 if ((bit
& mask
) != 0)
9483 regdeps
[i
].link_to_qp_branch
= 0;
9488 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9489 any mutexes which contain one of the PRs and create new ones when
9493 update_qp_mutex (valueT mask
)
9499 while (i
< qp_mutexeslen
)
9501 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9503 /* If it destroys and creates the same mutex, do nothing. */
9504 if (qp_mutexes
[i
].prmask
== mask
9505 && qp_mutexes
[i
].path
== md
.path
)
9516 fprintf (stderr
, " Clearing mutex relation");
9517 print_prmask (qp_mutexes
[i
].prmask
);
9518 fprintf (stderr
, "\n");
9521 /* Deal with the old mutex with more than 3+ PRs only if
9522 the new mutex on the same execution path with it.
9524 FIXME: The 3+ mutex support is incomplete.
9525 dot_pred_rel () may be a better place to fix it. */
9526 if (qp_mutexes
[i
].path
== md
.path
)
9528 /* If it is a proper subset of the mutex, create a
9531 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9534 qp_mutexes
[i
].prmask
&= ~mask
;
9535 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9537 /* Modify the mutex if there are more than one
9545 /* Remove the mutex. */
9546 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9554 add_qp_mutex (mask
);
9559 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9561 Any changes to a PR clears the mutex relations which include that PR. */
9564 clear_qp_mutex (mask
)
9570 while (i
< qp_mutexeslen
)
9572 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9576 fprintf (stderr
, " Clearing mutex relation");
9577 print_prmask (qp_mutexes
[i
].prmask
);
9578 fprintf (stderr
, "\n");
9580 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9587 /* Clear implies relations which contain PRs in the given masks.
9588 P1_MASK indicates the source of the implies relation, while P2_MASK
9589 indicates the implied PR. */
9592 clear_qp_implies (p1_mask
, p2_mask
)
9599 while (i
< qp_implieslen
)
9601 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9602 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9605 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9606 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9607 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9614 /* Add the PRs specified to the list of implied relations. */
9617 add_qp_imply (p1
, p2
)
9624 /* p0 is not meaningful here. */
9625 if (p1
== 0 || p2
== 0)
9631 /* If it exists already, ignore it. */
9632 for (i
= 0; i
< qp_implieslen
; i
++)
9634 if (qp_implies
[i
].p1
== p1
9635 && qp_implies
[i
].p2
== p2
9636 && qp_implies
[i
].path
== md
.path
9637 && !qp_implies
[i
].p2_branched
)
9641 if (qp_implieslen
== qp_impliestotlen
)
9643 qp_impliestotlen
+= 20;
9644 qp_implies
= (struct qp_imply
*)
9645 xrealloc ((void *) qp_implies
,
9646 qp_impliestotlen
* sizeof (struct qp_imply
));
9649 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9650 qp_implies
[qp_implieslen
].p1
= p1
;
9651 qp_implies
[qp_implieslen
].p2
= p2
;
9652 qp_implies
[qp_implieslen
].path
= md
.path
;
9653 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9655 /* Add in the implied transitive relations; for everything that p2 implies,
9656 make p1 imply that, too; for everything that implies p1, make it imply p2
9658 for (i
= 0; i
< qp_implieslen
; i
++)
9660 if (qp_implies
[i
].p1
== p2
)
9661 add_qp_imply (p1
, qp_implies
[i
].p2
);
9662 if (qp_implies
[i
].p2
== p1
)
9663 add_qp_imply (qp_implies
[i
].p1
, p2
);
9665 /* Add in mutex relations implied by this implies relation; for each mutex
9666 relation containing p2, duplicate it and replace p2 with p1. */
9667 bit
= (valueT
) 1 << p1
;
9668 mask
= (valueT
) 1 << p2
;
9669 for (i
= 0; i
< qp_mutexeslen
; i
++)
9671 if (qp_mutexes
[i
].prmask
& mask
)
9672 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9676 /* Add the PRs specified in the mask to the mutex list; this means that only
9677 one of the PRs can be true at any time. PR0 should never be included in
9687 if (qp_mutexeslen
== qp_mutexestotlen
)
9689 qp_mutexestotlen
+= 20;
9690 qp_mutexes
= (struct qpmutex
*)
9691 xrealloc ((void *) qp_mutexes
,
9692 qp_mutexestotlen
* sizeof (struct qpmutex
));
9696 fprintf (stderr
, " Registering mutex on");
9697 print_prmask (mask
);
9698 fprintf (stderr
, "\n");
9700 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9701 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9705 has_suffix_p (name
, suffix
)
9709 size_t namelen
= strlen (name
);
9710 size_t sufflen
= strlen (suffix
);
9712 if (namelen
<= sufflen
)
9714 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9718 clear_register_values ()
9722 fprintf (stderr
, " Clearing register values\n");
9723 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9724 gr_values
[i
].known
= 0;
9727 /* Keep track of register values/changes which affect DV tracking.
9729 optimization note: should add a flag to classes of insns where otherwise we
9730 have to examine a group of strings to identify them. */
9733 note_register_values (idesc
)
9734 struct ia64_opcode
*idesc
;
9736 valueT qp_changemask
= 0;
9739 /* Invalidate values for registers being written to. */
9740 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9742 if (idesc
->operands
[i
] == IA64_OPND_R1
9743 || idesc
->operands
[i
] == IA64_OPND_R2
9744 || idesc
->operands
[i
] == IA64_OPND_R3
)
9746 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9747 if (regno
> 0 && regno
< NELEMS (gr_values
))
9748 gr_values
[regno
].known
= 0;
9750 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9752 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9753 if (regno
> 0 && regno
< 4)
9754 gr_values
[regno
].known
= 0;
9756 else if (idesc
->operands
[i
] == IA64_OPND_P1
9757 || idesc
->operands
[i
] == IA64_OPND_P2
)
9759 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9760 qp_changemask
|= (valueT
) 1 << regno
;
9762 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9764 if (idesc
->operands
[2] & (valueT
) 0x10000)
9765 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9767 qp_changemask
= idesc
->operands
[2];
9770 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9772 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9773 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9775 qp_changemask
= idesc
->operands
[1];
9776 qp_changemask
&= ~(valueT
) 0xFFFF;
9781 /* Always clear qp branch flags on any PR change. */
9782 /* FIXME there may be exceptions for certain compares. */
9783 clear_qp_branch_flag (qp_changemask
);
9785 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9786 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9788 qp_changemask
|= ~(valueT
) 0xFFFF;
9789 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9791 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9792 gr_values
[i
].known
= 0;
9794 clear_qp_mutex (qp_changemask
);
9795 clear_qp_implies (qp_changemask
, qp_changemask
);
9797 /* After a call, all register values are undefined, except those marked
9799 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9800 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9802 /* FIXME keep GR values which are marked as "safe_across_calls" */
9803 clear_register_values ();
9804 clear_qp_mutex (~qp_safe_across_calls
);
9805 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9806 clear_qp_branch_flag (~qp_safe_across_calls
);
9808 else if (is_interruption_or_rfi (idesc
)
9809 || is_taken_branch (idesc
))
9811 clear_register_values ();
9812 clear_qp_mutex (~(valueT
) 0);
9813 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9815 /* Look for mutex and implies relations. */
9816 else if ((idesc
->operands
[0] == IA64_OPND_P1
9817 || idesc
->operands
[0] == IA64_OPND_P2
)
9818 && (idesc
->operands
[1] == IA64_OPND_P1
9819 || idesc
->operands
[1] == IA64_OPND_P2
))
9821 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9822 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9823 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9824 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9826 /* If both PRs are PR0, we can't really do anything. */
9827 if (p1
== 0 && p2
== 0)
9830 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9832 /* In general, clear mutexes and implies which include P1 or P2,
9833 with the following exceptions. */
9834 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9835 || has_suffix_p (idesc
->name
, ".and.orcm"))
9837 clear_qp_implies (p2mask
, p1mask
);
9839 else if (has_suffix_p (idesc
->name
, ".andcm")
9840 || has_suffix_p (idesc
->name
, ".and"))
9842 clear_qp_implies (0, p1mask
| p2mask
);
9844 else if (has_suffix_p (idesc
->name
, ".orcm")
9845 || has_suffix_p (idesc
->name
, ".or"))
9847 clear_qp_mutex (p1mask
| p2mask
);
9848 clear_qp_implies (p1mask
| p2mask
, 0);
9854 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9856 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9857 if (p1
== 0 || p2
== 0)
9858 clear_qp_mutex (p1mask
| p2mask
);
9860 added
= update_qp_mutex (p1mask
| p2mask
);
9862 if (CURR_SLOT
.qp_regno
== 0
9863 || has_suffix_p (idesc
->name
, ".unc"))
9865 if (added
== 0 && p1
&& p2
)
9866 add_qp_mutex (p1mask
| p2mask
);
9867 if (CURR_SLOT
.qp_regno
!= 0)
9870 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9872 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9877 /* Look for mov imm insns into GRs. */
9878 else if (idesc
->operands
[0] == IA64_OPND_R1
9879 && (idesc
->operands
[1] == IA64_OPND_IMM22
9880 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9881 && CURR_SLOT
.opnd
[1].X_op
== O_constant
9882 && (strcmp (idesc
->name
, "mov") == 0
9883 || strcmp (idesc
->name
, "movl") == 0))
9885 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9886 if (regno
> 0 && regno
< NELEMS (gr_values
))
9888 gr_values
[regno
].known
= 1;
9889 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9890 gr_values
[regno
].path
= md
.path
;
9893 fprintf (stderr
, " Know gr%d = ", regno
);
9894 fprintf_vma (stderr
, gr_values
[regno
].value
);
9895 fputs ("\n", stderr
);
9899 /* Look for dep.z imm insns. */
9900 else if (idesc
->operands
[0] == IA64_OPND_R1
9901 && idesc
->operands
[1] == IA64_OPND_IMM8
9902 && strcmp (idesc
->name
, "dep.z") == 0)
9904 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9905 if (regno
> 0 && regno
< NELEMS (gr_values
))
9907 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
9909 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
9910 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
9911 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
9912 gr_values
[regno
].known
= 1;
9913 gr_values
[regno
].value
= value
;
9914 gr_values
[regno
].path
= md
.path
;
9917 fprintf (stderr
, " Know gr%d = ", regno
);
9918 fprintf_vma (stderr
, gr_values
[regno
].value
);
9919 fputs ("\n", stderr
);
9925 clear_qp_mutex (qp_changemask
);
9926 clear_qp_implies (qp_changemask
, qp_changemask
);
9930 /* Return whether the given predicate registers are currently mutex. */
9933 qp_mutex (p1
, p2
, path
)
9943 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9944 for (i
= 0; i
< qp_mutexeslen
; i
++)
9946 if (qp_mutexes
[i
].path
>= path
9947 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9954 /* Return whether the given resource is in the given insn's list of chks
9955 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9959 resources_match (rs
, idesc
, note
, qp_regno
, path
)
9961 struct ia64_opcode
*idesc
;
9966 struct rsrc specs
[MAX_SPECS
];
9969 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9970 we don't need to check. One exception is note 11, which indicates that
9971 target predicates are written regardless of PR[qp]. */
9972 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
9976 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
9979 /* UNAT checking is a bit more specific than other resources */
9980 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
9981 && specs
[count
].mem_offset
.hint
9982 && rs
->mem_offset
.hint
)
9984 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
9986 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
9987 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
9994 /* Skip apparent PR write conflicts where both writes are an AND or both
9995 writes are an OR. */
9996 if (rs
->dependency
->specifier
== IA64_RS_PR
9997 || rs
->dependency
->specifier
== IA64_RS_PRr
9998 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10000 if (specs
[count
].cmp_type
!= CMP_NONE
10001 && specs
[count
].cmp_type
== rs
->cmp_type
)
10004 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10005 dv_mode
[rs
->dependency
->mode
],
10006 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10007 specs
[count
].index
: 63);
10012 " %s on parallel compare conflict %s vs %s on PR%d\n",
10013 dv_mode
[rs
->dependency
->mode
],
10014 dv_cmp_type
[rs
->cmp_type
],
10015 dv_cmp_type
[specs
[count
].cmp_type
],
10016 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10017 specs
[count
].index
: 63);
10021 /* If either resource is not specific, conservatively assume a conflict
10023 if (!specs
[count
].specific
|| !rs
->specific
)
10025 else if (specs
[count
].index
== rs
->index
)
10032 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10033 insert a stop to create the break. Update all resource dependencies
10034 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10035 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10036 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10040 insn_group_break (insert_stop
, qp_regno
, save_current
)
10047 if (insert_stop
&& md
.num_slots_in_use
> 0)
10048 PREV_SLOT
.end_of_insn_group
= 1;
10052 fprintf (stderr
, " Insn group break%s",
10053 (insert_stop
? " (w/stop)" : ""));
10055 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10056 fprintf (stderr
, "\n");
10060 while (i
< regdepslen
)
10062 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10065 && regdeps
[i
].qp_regno
!= qp_regno
)
10072 && CURR_SLOT
.src_file
== regdeps
[i
].file
10073 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10079 /* clear dependencies which are automatically cleared by a stop, or
10080 those that have reached the appropriate state of insn serialization */
10081 if (dep
->semantics
== IA64_DVS_IMPLIED
10082 || dep
->semantics
== IA64_DVS_IMPLIEDF
10083 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10085 print_dependency ("Removing", i
);
10086 regdeps
[i
] = regdeps
[--regdepslen
];
10090 if (dep
->semantics
== IA64_DVS_DATA
10091 || dep
->semantics
== IA64_DVS_INSTR
10092 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10094 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10095 regdeps
[i
].insn_srlz
= STATE_STOP
;
10096 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10097 regdeps
[i
].data_srlz
= STATE_STOP
;
10104 /* Add the given resource usage spec to the list of active dependencies. */
10107 mark_resource (idesc
, dep
, spec
, depind
, path
)
10108 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
10109 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
10114 if (regdepslen
== regdepstotlen
)
10116 regdepstotlen
+= 20;
10117 regdeps
= (struct rsrc
*)
10118 xrealloc ((void *) regdeps
,
10119 regdepstotlen
* sizeof (struct rsrc
));
10122 regdeps
[regdepslen
] = *spec
;
10123 regdeps
[regdepslen
].depind
= depind
;
10124 regdeps
[regdepslen
].path
= path
;
10125 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10126 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10128 print_dependency ("Adding", regdepslen
);
10134 print_dependency (action
, depind
)
10135 const char *action
;
10140 fprintf (stderr
, " %s %s '%s'",
10141 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10142 (regdeps
[depind
].dependency
)->name
);
10143 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10144 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10145 if (regdeps
[depind
].mem_offset
.hint
)
10147 fputs (" ", stderr
);
10148 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10149 fputs ("+", stderr
);
10150 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10152 fprintf (stderr
, "\n");
10157 instruction_serialization ()
10161 fprintf (stderr
, " Instruction serialization\n");
10162 for (i
= 0; i
< regdepslen
; i
++)
10163 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10164 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10168 data_serialization ()
10172 fprintf (stderr
, " Data serialization\n");
10173 while (i
< regdepslen
)
10175 if (regdeps
[i
].data_srlz
== STATE_STOP
10176 /* Note: as of 991210, all "other" dependencies are cleared by a
10177 data serialization. This might change with new tables */
10178 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10180 print_dependency ("Removing", i
);
10181 regdeps
[i
] = regdeps
[--regdepslen
];
10188 /* Insert stops and serializations as needed to avoid DVs. */
10191 remove_marked_resource (rs
)
10194 switch (rs
->dependency
->semantics
)
10196 case IA64_DVS_SPECIFIC
:
10198 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10199 /* ...fall through... */
10200 case IA64_DVS_INSTR
:
10202 fprintf (stderr
, "Inserting instr serialization\n");
10203 if (rs
->insn_srlz
< STATE_STOP
)
10204 insn_group_break (1, 0, 0);
10205 if (rs
->insn_srlz
< STATE_SRLZ
)
10207 struct slot oldslot
= CURR_SLOT
;
10208 /* Manually jam a srlz.i insn into the stream */
10209 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10210 CURR_SLOT
.user_template
= -1;
10211 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10212 instruction_serialization ();
10213 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10214 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10215 emit_one_bundle ();
10216 CURR_SLOT
= oldslot
;
10218 insn_group_break (1, 0, 0);
10220 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10221 "other" types of DV are eliminated
10222 by a data serialization */
10223 case IA64_DVS_DATA
:
10225 fprintf (stderr
, "Inserting data serialization\n");
10226 if (rs
->data_srlz
< STATE_STOP
)
10227 insn_group_break (1, 0, 0);
10229 struct slot oldslot
= CURR_SLOT
;
10230 /* Manually jam a srlz.d insn into the stream */
10231 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10232 CURR_SLOT
.user_template
= -1;
10233 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10234 data_serialization ();
10235 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10236 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10237 emit_one_bundle ();
10238 CURR_SLOT
= oldslot
;
10241 case IA64_DVS_IMPLIED
:
10242 case IA64_DVS_IMPLIEDF
:
10244 fprintf (stderr
, "Inserting stop\n");
10245 insn_group_break (1, 0, 0);
10252 /* Check the resources used by the given opcode against the current dependency
10255 The check is run once for each execution path encountered. In this case,
10256 a unique execution path is the sequence of instructions following a code
10257 entry point, e.g. the following has three execution paths, one starting
10258 at L0, one at L1, and one at L2.
10267 check_dependencies (idesc
)
10268 struct ia64_opcode
*idesc
;
10270 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10274 /* Note that the number of marked resources may change within the
10275 loop if in auto mode. */
10277 while (i
< regdepslen
)
10279 struct rsrc
*rs
= ®deps
[i
];
10280 const struct ia64_dependency
*dep
= rs
->dependency
;
10283 int start_over
= 0;
10285 if (dep
->semantics
== IA64_DVS_NONE
10286 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10292 note
= NOTE (opdeps
->chks
[chkind
]);
10294 /* Check this resource against each execution path seen thus far. */
10295 for (path
= 0; path
<= md
.path
; path
++)
10299 /* If the dependency wasn't on the path being checked, ignore it. */
10300 if (rs
->path
< path
)
10303 /* If the QP for this insn implies a QP which has branched, don't
10304 bother checking. Ed. NOTE: I don't think this check is terribly
10305 useful; what's the point of generating code which will only be
10306 reached if its QP is zero?
10307 This code was specifically inserted to handle the following code,
10308 based on notes from Intel's DV checking code, where p1 implies p2.
10314 if (CURR_SLOT
.qp_regno
!= 0)
10318 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10320 if (qp_implies
[implies
].path
>= path
10321 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10322 && qp_implies
[implies
].p2_branched
)
10332 if ((matchtype
= resources_match (rs
, idesc
, note
,
10333 CURR_SLOT
.qp_regno
, path
)) != 0)
10336 char pathmsg
[256] = "";
10337 char indexmsg
[256] = "";
10338 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10341 sprintf (pathmsg
, " when entry is at label '%s'",
10342 md
.entry_labels
[path
- 1]);
10343 if (matchtype
== 1 && rs
->index
>= 0)
10344 sprintf (indexmsg
, ", specific resource number is %d",
10346 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10348 (certain
? "violates" : "may violate"),
10349 dv_mode
[dep
->mode
], dep
->name
,
10350 dv_sem
[dep
->semantics
],
10351 pathmsg
, indexmsg
);
10353 if (md
.explicit_mode
)
10355 as_warn ("%s", msg
);
10356 if (path
< md
.path
)
10357 as_warn (_("Only the first path encountering the conflict "
10359 as_warn_where (rs
->file
, rs
->line
,
10360 _("This is the location of the "
10361 "conflicting usage"));
10362 /* Don't bother checking other paths, to avoid duplicating
10363 the same warning */
10369 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10371 remove_marked_resource (rs
);
10373 /* since the set of dependencies has changed, start over */
10374 /* FIXME -- since we're removing dvs as we go, we
10375 probably don't really need to start over... */
10388 /* Register new dependencies based on the given opcode. */
10391 mark_resources (idesc
)
10392 struct ia64_opcode
*idesc
;
10395 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10396 int add_only_qp_reads
= 0;
10398 /* A conditional branch only uses its resources if it is taken; if it is
10399 taken, we stop following that path. The other branch types effectively
10400 *always* write their resources. If it's not taken, register only QP
10402 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10404 add_only_qp_reads
= 1;
10408 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10410 for (i
= 0; i
< opdeps
->nregs
; i
++)
10412 const struct ia64_dependency
*dep
;
10413 struct rsrc specs
[MAX_SPECS
];
10418 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10419 note
= NOTE (opdeps
->regs
[i
]);
10421 if (add_only_qp_reads
10422 && !(dep
->mode
== IA64_DV_WAR
10423 && (dep
->specifier
== IA64_RS_PR
10424 || dep
->specifier
== IA64_RS_PRr
10425 || dep
->specifier
== IA64_RS_PR63
)))
10428 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10430 while (count
-- > 0)
10432 mark_resource (idesc
, dep
, &specs
[count
],
10433 DEP (opdeps
->regs
[i
]), md
.path
);
10436 /* The execution path may affect register values, which may in turn
10437 affect which indirect-access resources are accessed. */
10438 switch (dep
->specifier
)
10442 case IA64_RS_CPUID
:
10450 for (path
= 0; path
< md
.path
; path
++)
10452 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10453 while (count
-- > 0)
10454 mark_resource (idesc
, dep
, &specs
[count
],
10455 DEP (opdeps
->regs
[i
]), path
);
10462 /* Remove dependencies when they no longer apply. */
10465 update_dependencies (idesc
)
10466 struct ia64_opcode
*idesc
;
10470 if (strcmp (idesc
->name
, "srlz.i") == 0)
10472 instruction_serialization ();
10474 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10476 data_serialization ();
10478 else if (is_interruption_or_rfi (idesc
)
10479 || is_taken_branch (idesc
))
10481 /* Although technically the taken branch doesn't clear dependencies
10482 which require a srlz.[id], we don't follow the branch; the next
10483 instruction is assumed to start with a clean slate. */
10487 else if (is_conditional_branch (idesc
)
10488 && CURR_SLOT
.qp_regno
!= 0)
10490 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10492 for (i
= 0; i
< qp_implieslen
; i
++)
10494 /* If the conditional branch's predicate is implied by the predicate
10495 in an existing dependency, remove that dependency. */
10496 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10499 /* Note that this implied predicate takes a branch so that if
10500 a later insn generates a DV but its predicate implies this
10501 one, we can avoid the false DV warning. */
10502 qp_implies
[i
].p2_branched
= 1;
10503 while (depind
< regdepslen
)
10505 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10507 print_dependency ("Removing", depind
);
10508 regdeps
[depind
] = regdeps
[--regdepslen
];
10515 /* Any marked resources which have this same predicate should be
10516 cleared, provided that the QP hasn't been modified between the
10517 marking instruction and the branch. */
10520 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10525 while (i
< regdepslen
)
10527 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10528 && regdeps
[i
].link_to_qp_branch
10529 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10530 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10532 /* Treat like a taken branch */
10533 print_dependency ("Removing", i
);
10534 regdeps
[i
] = regdeps
[--regdepslen
];
10543 /* Examine the current instruction for dependency violations. */
10547 struct ia64_opcode
*idesc
;
10551 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10552 idesc
->name
, CURR_SLOT
.src_line
,
10553 idesc
->dependencies
->nchks
,
10554 idesc
->dependencies
->nregs
);
10557 /* Look through the list of currently marked resources; if the current
10558 instruction has the dependency in its chks list which uses that resource,
10559 check against the specific resources used. */
10560 check_dependencies (idesc
);
10562 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10563 then add them to the list of marked resources. */
10564 mark_resources (idesc
);
10566 /* There are several types of dependency semantics, and each has its own
10567 requirements for being cleared
10569 Instruction serialization (insns separated by interruption, rfi, or
10570 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10572 Data serialization (instruction serialization, or writer + srlz.d +
10573 reader, where writer and srlz.d are in separate groups) clears
10574 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10575 always be the case).
10577 Instruction group break (groups separated by stop, taken branch,
10578 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10580 update_dependencies (idesc
);
10582 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10583 warning. Keep track of as many as possible that are useful. */
10584 note_register_values (idesc
);
10586 /* We don't need or want this anymore. */
10587 md
.mem_offset
.hint
= 0;
10592 /* Translate one line of assembly. Pseudo ops and labels do not show
10598 char *saved_input_line_pointer
, *mnemonic
;
10599 const struct pseudo_opcode
*pdesc
;
10600 struct ia64_opcode
*idesc
;
10601 unsigned char qp_regno
;
10602 unsigned int flags
;
10605 saved_input_line_pointer
= input_line_pointer
;
10606 input_line_pointer
= str
;
10608 /* extract the opcode (mnemonic): */
10610 mnemonic
= input_line_pointer
;
10611 ch
= get_symbol_end ();
10612 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10615 *input_line_pointer
= ch
;
10616 (*pdesc
->handler
) (pdesc
->arg
);
10620 /* Find the instruction descriptor matching the arguments. */
10622 idesc
= ia64_find_opcode (mnemonic
);
10623 *input_line_pointer
= ch
;
10626 as_bad ("Unknown opcode `%s'", mnemonic
);
10630 idesc
= parse_operands (idesc
);
10634 /* Handle the dynamic ops we can handle now: */
10635 if (idesc
->type
== IA64_TYPE_DYN
)
10637 if (strcmp (idesc
->name
, "add") == 0)
10639 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10640 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10644 ia64_free_opcode (idesc
);
10645 idesc
= ia64_find_opcode (mnemonic
);
10647 else if (strcmp (idesc
->name
, "mov") == 0)
10649 enum ia64_opnd opnd1
, opnd2
;
10652 opnd1
= idesc
->operands
[0];
10653 opnd2
= idesc
->operands
[1];
10654 if (opnd1
== IA64_OPND_AR3
)
10656 else if (opnd2
== IA64_OPND_AR3
)
10660 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10662 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10663 mnemonic
= "mov.i";
10664 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10665 mnemonic
= "mov.m";
10673 ia64_free_opcode (idesc
);
10674 idesc
= ia64_find_opcode (mnemonic
);
10675 while (idesc
!= NULL
10676 && (idesc
->operands
[0] != opnd1
10677 || idesc
->operands
[1] != opnd2
))
10678 idesc
= get_next_opcode (idesc
);
10682 else if (strcmp (idesc
->name
, "mov.i") == 0
10683 || strcmp (idesc
->name
, "mov.m") == 0)
10685 enum ia64_opnd opnd1
, opnd2
;
10688 opnd1
= idesc
->operands
[0];
10689 opnd2
= idesc
->operands
[1];
10690 if (opnd1
== IA64_OPND_AR3
)
10692 else if (opnd2
== IA64_OPND_AR3
)
10696 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10699 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10701 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10703 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10704 as_bad ("AR %d can only be accessed by %c-unit",
10705 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10709 else if (strcmp (idesc
->name
, "hint.b") == 0)
10715 case hint_b_warning
:
10716 as_warn ("hint.b may be treated as nop");
10719 as_bad ("hint.b shouldn't be used");
10725 if (md
.qp
.X_op
== O_register
)
10727 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10728 md
.qp
.X_op
= O_absent
;
10731 flags
= idesc
->flags
;
10733 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10735 /* The alignment frag has to end with a stop bit only if the
10736 next instruction after the alignment directive has to be
10737 the first instruction in an instruction group. */
10740 while (align_frag
->fr_type
!= rs_align_code
)
10742 align_frag
= align_frag
->fr_next
;
10746 /* align_frag can be NULL if there are directives in
10748 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10749 align_frag
->tc_frag_data
= 1;
10752 insn_group_break (1, 0, 0);
10756 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10758 as_bad ("`%s' cannot be predicated", idesc
->name
);
10762 /* Build the instruction. */
10763 CURR_SLOT
.qp_regno
= qp_regno
;
10764 CURR_SLOT
.idesc
= idesc
;
10765 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10766 dwarf2_where (&CURR_SLOT
.debug_line
);
10768 /* Add unwind entry, if there is one. */
10769 if (unwind
.current_entry
)
10771 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10772 unwind
.current_entry
= NULL
;
10774 if (unwind
.proc_start
&& S_IS_DEFINED (unwind
.proc_start
))
10777 /* Check for dependency violations. */
10781 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10782 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10783 emit_one_bundle ();
10785 if ((flags
& IA64_OPCODE_LAST
) != 0)
10786 insn_group_break (1, 0, 0);
10788 md
.last_text_seg
= now_seg
;
10791 input_line_pointer
= saved_input_line_pointer
;
10794 /* Called when symbol NAME cannot be found in the symbol table.
10795 Should be used for dynamic valued symbols only. */
10798 md_undefined_symbol (name
)
10799 char *name ATTRIBUTE_UNUSED
;
10804 /* Called for any expression that can not be recognized. When the
10805 function is called, `input_line_pointer' will point to the start of
10812 switch (*input_line_pointer
)
10815 ++input_line_pointer
;
10817 if (*input_line_pointer
!= ']')
10819 as_bad ("Closing bracket missing");
10824 if (e
->X_op
!= O_register
)
10825 as_bad ("Register expected as index");
10827 ++input_line_pointer
;
10838 ignore_rest_of_line ();
10841 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10842 a section symbol plus some offset. For relocs involving @fptr(),
10843 directives we don't want such adjustments since we need to have the
10844 original symbol's name in the reloc. */
10846 ia64_fix_adjustable (fix
)
10849 /* Prevent all adjustments to global symbols */
10850 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10853 switch (fix
->fx_r_type
)
10855 case BFD_RELOC_IA64_FPTR64I
:
10856 case BFD_RELOC_IA64_FPTR32MSB
:
10857 case BFD_RELOC_IA64_FPTR32LSB
:
10858 case BFD_RELOC_IA64_FPTR64MSB
:
10859 case BFD_RELOC_IA64_FPTR64LSB
:
10860 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10861 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10871 ia64_force_relocation (fix
)
10874 switch (fix
->fx_r_type
)
10876 case BFD_RELOC_IA64_FPTR64I
:
10877 case BFD_RELOC_IA64_FPTR32MSB
:
10878 case BFD_RELOC_IA64_FPTR32LSB
:
10879 case BFD_RELOC_IA64_FPTR64MSB
:
10880 case BFD_RELOC_IA64_FPTR64LSB
:
10882 case BFD_RELOC_IA64_LTOFF22
:
10883 case BFD_RELOC_IA64_LTOFF64I
:
10884 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10885 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10886 case BFD_RELOC_IA64_PLTOFF22
:
10887 case BFD_RELOC_IA64_PLTOFF64I
:
10888 case BFD_RELOC_IA64_PLTOFF64MSB
:
10889 case BFD_RELOC_IA64_PLTOFF64LSB
:
10891 case BFD_RELOC_IA64_LTOFF22X
:
10892 case BFD_RELOC_IA64_LDXMOV
:
10899 return generic_force_reloc (fix
);
10902 /* Decide from what point a pc-relative relocation is relative to,
10903 relative to the pc-relative fixup. Er, relatively speaking. */
10905 ia64_pcrel_from_section (fix
, sec
)
10909 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10911 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10918 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10920 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10924 expr
.X_op
= O_pseudo_fixup
;
10925 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10926 expr
.X_add_number
= 0;
10927 expr
.X_add_symbol
= symbol
;
10928 emit_expr (&expr
, size
);
10931 /* This is called whenever some data item (not an instruction) needs a
10932 fixup. We pick the right reloc code depending on the byteorder
10933 currently in effect. */
10935 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
10941 bfd_reloc_code_real_type code
;
10946 /* There are no reloc for 8 and 16 bit quantities, but we allow
10947 them here since they will work fine as long as the expression
10948 is fully defined at the end of the pass over the source file. */
10949 case 1: code
= BFD_RELOC_8
; break;
10950 case 2: code
= BFD_RELOC_16
; break;
10952 if (target_big_endian
)
10953 code
= BFD_RELOC_IA64_DIR32MSB
;
10955 code
= BFD_RELOC_IA64_DIR32LSB
;
10959 /* In 32-bit mode, data8 could mean function descriptors too. */
10960 if (exp
->X_op
== O_pseudo_fixup
10961 && exp
->X_op_symbol
10962 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
10963 && !(md
.flags
& EF_IA_64_ABI64
))
10965 if (target_big_endian
)
10966 code
= BFD_RELOC_IA64_IPLTMSB
;
10968 code
= BFD_RELOC_IA64_IPLTLSB
;
10969 exp
->X_op
= O_symbol
;
10974 if (target_big_endian
)
10975 code
= BFD_RELOC_IA64_DIR64MSB
;
10977 code
= BFD_RELOC_IA64_DIR64LSB
;
10982 if (exp
->X_op
== O_pseudo_fixup
10983 && exp
->X_op_symbol
10984 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
10986 if (target_big_endian
)
10987 code
= BFD_RELOC_IA64_IPLTMSB
;
10989 code
= BFD_RELOC_IA64_IPLTLSB
;
10990 exp
->X_op
= O_symbol
;
10996 as_bad ("Unsupported fixup size %d", nbytes
);
10997 ignore_rest_of_line ();
11001 if (exp
->X_op
== O_pseudo_fixup
)
11003 exp
->X_op
= O_symbol
;
11004 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11005 /* ??? If code unchanged, unsupported. */
11008 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11009 /* We need to store the byte order in effect in case we're going
11010 to fix an 8 or 16 bit relocation (for which there no real
11011 relocs available). See md_apply_fix3(). */
11012 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11015 /* Return the actual relocation we wish to associate with the pseudo
11016 reloc described by SYM and R_TYPE. SYM should be one of the
11017 symbols in the pseudo_func array, or NULL. */
11019 static bfd_reloc_code_real_type
11020 ia64_gen_real_reloc_type (sym
, r_type
)
11021 struct symbol
*sym
;
11022 bfd_reloc_code_real_type r_type
;
11024 bfd_reloc_code_real_type
new = 0;
11025 const char *type
= NULL
, *suffix
= "";
11032 switch (S_GET_VALUE (sym
))
11034 case FUNC_FPTR_RELATIVE
:
11037 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
11038 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
11039 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
11040 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
11041 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
11042 default: type
= "FPTR"; break;
11046 case FUNC_GP_RELATIVE
:
11049 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
11050 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
11051 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
11052 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
11053 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
11054 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
11055 default: type
= "GPREL"; break;
11059 case FUNC_LT_RELATIVE
:
11062 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
11063 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
11064 default: type
= "LTOFF"; break;
11068 case FUNC_LT_RELATIVE_X
:
11071 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
11072 default: type
= "LTOFF"; suffix
= "X"; break;
11076 case FUNC_PC_RELATIVE
:
11079 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
11080 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
11081 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
11082 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
11083 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
11084 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
11085 default: type
= "PCREL"; break;
11089 case FUNC_PLT_RELATIVE
:
11092 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
11093 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
11094 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
11095 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
11096 default: type
= "PLTOFF"; break;
11100 case FUNC_SEC_RELATIVE
:
11103 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
11104 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
11105 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
11106 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
11107 default: type
= "SECREL"; break;
11111 case FUNC_SEG_RELATIVE
:
11114 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
11115 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
11116 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
11117 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
11118 default: type
= "SEGREL"; break;
11122 case FUNC_LTV_RELATIVE
:
11125 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
11126 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
11127 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
11128 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
11129 default: type
= "LTV"; break;
11133 case FUNC_LT_FPTR_RELATIVE
:
11136 case BFD_RELOC_IA64_IMM22
:
11137 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11138 case BFD_RELOC_IA64_IMM64
:
11139 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11140 case BFD_RELOC_IA64_DIR32MSB
:
11141 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11142 case BFD_RELOC_IA64_DIR32LSB
:
11143 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11144 case BFD_RELOC_IA64_DIR64MSB
:
11145 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11146 case BFD_RELOC_IA64_DIR64LSB
:
11147 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11149 type
= "LTOFF_FPTR"; break;
11153 case FUNC_TP_RELATIVE
:
11156 case BFD_RELOC_IA64_IMM14
: new = BFD_RELOC_IA64_TPREL14
; break;
11157 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_TPREL22
; break;
11158 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_TPREL64I
; break;
11159 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_TPREL64MSB
; break;
11160 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_TPREL64LSB
; break;
11161 default: type
= "TPREL"; break;
11165 case FUNC_LT_TP_RELATIVE
:
11168 case BFD_RELOC_IA64_IMM22
:
11169 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11171 type
= "LTOFF_TPREL"; break;
11175 case FUNC_DTP_MODULE
:
11178 case BFD_RELOC_IA64_DIR64MSB
:
11179 new = BFD_RELOC_IA64_DTPMOD64MSB
; break;
11180 case BFD_RELOC_IA64_DIR64LSB
:
11181 new = BFD_RELOC_IA64_DTPMOD64LSB
; break;
11183 type
= "DTPMOD"; break;
11187 case FUNC_LT_DTP_MODULE
:
11190 case BFD_RELOC_IA64_IMM22
:
11191 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11193 type
= "LTOFF_DTPMOD"; break;
11197 case FUNC_DTP_RELATIVE
:
11200 case BFD_RELOC_IA64_DIR32MSB
:
11201 new = BFD_RELOC_IA64_DTPREL32MSB
; break;
11202 case BFD_RELOC_IA64_DIR32LSB
:
11203 new = BFD_RELOC_IA64_DTPREL32LSB
; break;
11204 case BFD_RELOC_IA64_DIR64MSB
:
11205 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
11206 case BFD_RELOC_IA64_DIR64LSB
:
11207 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
11208 case BFD_RELOC_IA64_IMM14
:
11209 new = BFD_RELOC_IA64_DTPREL14
; break;
11210 case BFD_RELOC_IA64_IMM22
:
11211 new = BFD_RELOC_IA64_DTPREL22
; break;
11212 case BFD_RELOC_IA64_IMM64
:
11213 new = BFD_RELOC_IA64_DTPREL64I
; break;
11215 type
= "DTPREL"; break;
11219 case FUNC_LT_DTP_RELATIVE
:
11222 case BFD_RELOC_IA64_IMM22
:
11223 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11225 type
= "LTOFF_DTPREL"; break;
11229 case FUNC_IPLT_RELOC
:
11232 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11233 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11234 default: type
= "IPLT"; break;
11252 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11253 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11254 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11255 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11256 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11257 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11258 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11262 /* This should be an error, but since previously there wasn't any
11263 diagnostic here, dont't make it fail because of this for now. */
11264 as_warn ("Cannot express %s%d%s relocation", type
, width
, suffix
);
11269 /* Here is where generate the appropriate reloc for pseudo relocation
11272 ia64_validate_fix (fix
)
11275 switch (fix
->fx_r_type
)
11277 case BFD_RELOC_IA64_FPTR64I
:
11278 case BFD_RELOC_IA64_FPTR32MSB
:
11279 case BFD_RELOC_IA64_FPTR64LSB
:
11280 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11281 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11282 if (fix
->fx_offset
!= 0)
11283 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11284 "No addend allowed in @fptr() relocation");
11292 fix_insn (fix
, odesc
, value
)
11294 const struct ia64_operand
*odesc
;
11297 bfd_vma insn
[3], t0
, t1
, control_bits
;
11302 slot
= fix
->fx_where
& 0x3;
11303 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11305 /* Bundles are always in little-endian byte order */
11306 t0
= bfd_getl64 (fixpos
);
11307 t1
= bfd_getl64 (fixpos
+ 8);
11308 control_bits
= t0
& 0x1f;
11309 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11310 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11311 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11314 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11316 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11317 insn
[2] |= (((value
& 0x7f) << 13)
11318 | (((value
>> 7) & 0x1ff) << 27)
11319 | (((value
>> 16) & 0x1f) << 22)
11320 | (((value
>> 21) & 0x1) << 21)
11321 | (((value
>> 63) & 0x1) << 36));
11323 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11325 if (value
& ~0x3fffffffffffffffULL
)
11326 err
= "integer operand out of range";
11327 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11328 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11330 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11333 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11334 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11335 | (((value
>> 0) & 0xfffff) << 13));
11338 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11341 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
11343 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11344 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11345 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11346 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11349 /* Attempt to simplify or even eliminate a fixup. The return value is
11350 ignored; perhaps it was once meaningful, but now it is historical.
11351 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11353 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11357 md_apply_fix3 (fix
, valP
, seg
)
11360 segT seg ATTRIBUTE_UNUSED
;
11363 valueT value
= *valP
;
11365 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11369 switch (fix
->fx_r_type
)
11371 case BFD_RELOC_IA64_PCREL21B
: break;
11372 case BFD_RELOC_IA64_PCREL21BI
: break;
11373 case BFD_RELOC_IA64_PCREL21F
: break;
11374 case BFD_RELOC_IA64_PCREL21M
: break;
11375 case BFD_RELOC_IA64_PCREL60B
: break;
11376 case BFD_RELOC_IA64_PCREL22
: break;
11377 case BFD_RELOC_IA64_PCREL64I
: break;
11378 case BFD_RELOC_IA64_PCREL32MSB
: break;
11379 case BFD_RELOC_IA64_PCREL32LSB
: break;
11380 case BFD_RELOC_IA64_PCREL64MSB
: break;
11381 case BFD_RELOC_IA64_PCREL64LSB
: break;
11383 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11390 switch (fix
->fx_r_type
)
11392 case BFD_RELOC_UNUSED
:
11393 /* This must be a TAG13 or TAG13b operand. There are no external
11394 relocs defined for them, so we must give an error. */
11395 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11396 "%s must have a constant value",
11397 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11401 case BFD_RELOC_IA64_TPREL14
:
11402 case BFD_RELOC_IA64_TPREL22
:
11403 case BFD_RELOC_IA64_TPREL64I
:
11404 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11405 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11406 case BFD_RELOC_IA64_DTPREL14
:
11407 case BFD_RELOC_IA64_DTPREL22
:
11408 case BFD_RELOC_IA64_DTPREL64I
:
11409 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11410 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11417 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11419 if (fix
->tc_fix_data
.bigendian
)
11420 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11422 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11427 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11432 /* Generate the BFD reloc to be stuck in the object file from the
11433 fixup used internally in the assembler. */
11436 tc_gen_reloc (sec
, fixp
)
11437 asection
*sec ATTRIBUTE_UNUSED
;
11442 reloc
= xmalloc (sizeof (*reloc
));
11443 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11444 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11445 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11446 reloc
->addend
= fixp
->fx_offset
;
11447 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11451 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11452 "Cannot represent %s relocation in object file",
11453 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11458 /* Turn a string in input_line_pointer into a floating point constant
11459 of type TYPE, and store the appropriate bytes in *LIT. The number
11460 of LITTLENUMS emitted is stored in *SIZE. An error message is
11461 returned, or NULL on OK. */
11463 #define MAX_LITTLENUMS 5
11466 md_atof (type
, lit
, size
)
11471 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11501 return "Bad call to MD_ATOF()";
11503 t
= atof_ieee (input_line_pointer
, type
, words
);
11505 input_line_pointer
= t
;
11507 (*ia64_float_to_chars
) (lit
, words
, prec
);
11511 /* It is 10 byte floating point with 6 byte padding. */
11512 memset (&lit
[10], 0, 6);
11513 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11516 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11521 /* Handle ia64 specific semantics of the align directive. */
11524 ia64_md_do_align (n
, fill
, len
, max
)
11525 int n ATTRIBUTE_UNUSED
;
11526 const char *fill ATTRIBUTE_UNUSED
;
11527 int len ATTRIBUTE_UNUSED
;
11528 int max ATTRIBUTE_UNUSED
;
11530 if (subseg_text_p (now_seg
))
11531 ia64_flush_insns ();
11534 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11535 of an rs_align_code fragment. */
11538 ia64_handle_align (fragp
)
11543 const unsigned char *nop
;
11545 if (fragp
->fr_type
!= rs_align_code
)
11548 /* Check if this frag has to end with a stop bit. */
11549 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11551 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11552 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11554 /* If no paddings are needed, we check if we need a stop bit. */
11555 if (!bytes
&& fragp
->tc_frag_data
)
11557 if (fragp
->fr_fix
< 16)
11559 /* FIXME: It won't work with
11561 alloc r32=ar.pfs,1,2,4,0
11565 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11566 _("Can't add stop bit to mark end of instruction group"));
11569 /* Bundles are always in little-endian byte order. Make sure
11570 the previous bundle has the stop bit. */
11574 /* Make sure we are on a 16-byte boundary, in case someone has been
11575 putting data into a text section. */
11578 int fix
= bytes
& 15;
11579 memset (p
, 0, fix
);
11582 fragp
->fr_fix
+= fix
;
11585 /* Instruction bundles are always little-endian. */
11586 memcpy (p
, nop
, 16);
11587 fragp
->fr_var
= 16;
11591 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11596 number_to_chars_bigendian (lit
, (long) (*words
++),
11597 sizeof (LITTLENUM_TYPE
));
11598 lit
+= sizeof (LITTLENUM_TYPE
);
11603 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11608 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11609 sizeof (LITTLENUM_TYPE
));
11610 lit
+= sizeof (LITTLENUM_TYPE
);
11615 ia64_elf_section_change_hook (void)
11617 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11618 && elf_linked_to_section (now_seg
) == NULL
)
11619 elf_linked_to_section (now_seg
) = text_section
;
11620 dot_byteorder (-1);
11623 /* Check if a label should be made global. */
11625 ia64_check_label (symbolS
*label
)
11627 if (*input_line_pointer
== ':')
11629 S_SET_EXTERNAL (label
);
11630 input_line_pointer
++;
11634 /* Used to remember where .alias and .secalias directives are seen. We
11635 will rename symbol and section names when we are about to output
11636 the relocatable file. */
11639 char *file
; /* The file where the directive is seen. */
11640 unsigned int line
; /* The line number the directive is at. */
11641 const char *name
; /* The orignale name of the symbol. */
11644 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11645 .secalias. Otherwise, it is .alias. */
11647 dot_alias (int section
)
11649 char *name
, *alias
;
11653 const char *error_string
;
11656 struct hash_control
*ahash
, *nhash
;
11659 name
= input_line_pointer
;
11660 delim
= get_symbol_end ();
11661 end_name
= input_line_pointer
;
11664 if (name
== end_name
)
11666 as_bad (_("expected symbol name"));
11667 discard_rest_of_line ();
11671 SKIP_WHITESPACE ();
11673 if (*input_line_pointer
!= ',')
11676 as_bad (_("expected comma after \"%s\""), name
);
11678 ignore_rest_of_line ();
11682 input_line_pointer
++;
11684 ia64_canonicalize_symbol_name (name
);
11686 /* We call demand_copy_C_string to check if alias string is valid.
11687 There should be a closing `"' and no `\0' in the string. */
11688 alias
= demand_copy_C_string (&len
);
11691 ignore_rest_of_line ();
11695 /* Make a copy of name string. */
11696 len
= strlen (name
) + 1;
11697 obstack_grow (¬es
, name
, len
);
11698 name
= obstack_finish (¬es
);
11703 ahash
= secalias_hash
;
11704 nhash
= secalias_name_hash
;
11709 ahash
= alias_hash
;
11710 nhash
= alias_name_hash
;
11713 /* Check if alias has been used before. */
11714 h
= (struct alias
*) hash_find (ahash
, alias
);
11717 if (strcmp (h
->name
, name
))
11718 as_bad (_("`%s' is already the alias of %s `%s'"),
11719 alias
, kind
, h
->name
);
11723 /* Check if name already has an alias. */
11724 a
= (const char *) hash_find (nhash
, name
);
11727 if (strcmp (a
, alias
))
11728 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11732 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11733 as_where (&h
->file
, &h
->line
);
11736 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11739 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11740 alias
, kind
, error_string
);
11744 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11747 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11748 alias
, kind
, error_string
);
11750 obstack_free (¬es
, name
);
11751 obstack_free (¬es
, alias
);
11754 demand_empty_rest_of_line ();
11757 /* It renames the original symbol name to its alias. */
11759 do_alias (const char *alias
, PTR value
)
11761 struct alias
*h
= (struct alias
*) value
;
11762 symbolS
*sym
= symbol_find (h
->name
);
11765 as_warn_where (h
->file
, h
->line
,
11766 _("symbol `%s' aliased to `%s' is not used"),
11769 S_SET_NAME (sym
, (char *) alias
);
11772 /* Called from write_object_file. */
11774 ia64_adjust_symtab (void)
11776 hash_traverse (alias_hash
, do_alias
);
11779 /* It renames the original section name to its alias. */
11781 do_secalias (const char *alias
, PTR value
)
11783 struct alias
*h
= (struct alias
*) value
;
11784 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11787 as_warn_where (h
->file
, h
->line
,
11788 _("section `%s' aliased to `%s' is not used"),
11794 /* Called from write_object_file. */
11796 ia64_frob_file (void)
11798 hash_traverse (secalias_hash
, do_secalias
);