1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008, 2009, 2011, 2012 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
60 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
62 /* Some systems define MIN in, e.g., param.h. */
64 #define MIN(a,b) ((a) < (b) ? (a) : (b))
67 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
68 #define CURR_SLOT md.slot[md.curr_slot]
70 #define O_pseudo_fixup (O_max + 1)
74 /* IA-64 ABI section pseudo-ops. */
75 SPECIAL_SECTION_BSS
= 0,
77 SPECIAL_SECTION_SDATA
,
78 SPECIAL_SECTION_RODATA
,
79 SPECIAL_SECTION_COMMENT
,
80 SPECIAL_SECTION_UNWIND
,
81 SPECIAL_SECTION_UNWIND_INFO
,
82 /* HPUX specific section pseudo-ops. */
83 SPECIAL_SECTION_INIT_ARRAY
,
84 SPECIAL_SECTION_FINI_ARRAY
,
101 FUNC_LT_FPTR_RELATIVE
,
103 FUNC_LT_DTP_RELATIVE
,
107 FUNC_SLOTCOUNT_RELOC
,
114 REG_FR
= (REG_GR
+ 128),
115 REG_AR
= (REG_FR
+ 128),
116 REG_CR
= (REG_AR
+ 128),
117 REG_DAHR
= (REG_CR
+ 128),
118 REG_P
= (REG_DAHR
+ 8),
119 REG_BR
= (REG_P
+ 64),
120 REG_IP
= (REG_BR
+ 8),
127 /* The following are pseudo-registers for use by gas only. */
139 /* The following pseudo-registers are used for unwind directives only: */
147 DYNREG_GR
= 0, /* dynamic general purpose register */
148 DYNREG_FR
, /* dynamic floating point register */
149 DYNREG_PR
, /* dynamic predicate register */
153 enum operand_match_result
156 OPERAND_OUT_OF_RANGE
,
160 /* On the ia64, we can't know the address of a text label until the
161 instructions are packed into a bundle. To handle this, we keep
162 track of the list of labels that appear in front of each
166 struct label_fix
*next
;
168 bfd_boolean dw2_mark_labels
;
172 /* An internally used relocation. */
173 #define DUMMY_RELOC_IA64_SLOTCOUNT (BFD_RELOC_UNUSED + 1)
176 /* This is the endianness of the current section. */
177 extern int target_big_endian
;
179 /* This is the default endianness. */
180 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
182 void (*ia64_number_to_chars
) (char *, valueT
, int);
184 static void ia64_float_to_chars_bigendian (char *, LITTLENUM_TYPE
*, int);
185 static void ia64_float_to_chars_littleendian (char *, LITTLENUM_TYPE
*, int);
187 static void (*ia64_float_to_chars
) (char *, LITTLENUM_TYPE
*, int);
189 static struct hash_control
*alias_hash
;
190 static struct hash_control
*alias_name_hash
;
191 static struct hash_control
*secalias_hash
;
192 static struct hash_control
*secalias_name_hash
;
194 /* List of chars besides those in app.c:symbol_chars that can start an
195 operand. Used to prevent the scrubber eating vital white-space. */
196 const char ia64_symbol_chars
[] = "@?";
198 /* Characters which always start a comment. */
199 const char comment_chars
[] = "";
201 /* Characters which start a comment at the beginning of a line. */
202 const char line_comment_chars
[] = "#";
204 /* Characters which may be used to separate multiple commands on a
206 const char line_separator_chars
[] = ";{}";
208 /* Characters which are used to indicate an exponent in a floating
210 const char EXP_CHARS
[] = "eE";
212 /* Characters which mean that a number is a floating point constant,
214 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
216 /* ia64-specific option processing: */
218 const char *md_shortopts
= "m:N:x::";
220 struct option md_longopts
[] =
222 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
223 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
224 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
225 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
228 size_t md_longopts_size
= sizeof (md_longopts
);
232 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
233 struct hash_control
*reg_hash
; /* register name hash table */
234 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
235 struct hash_control
*const_hash
; /* constant hash table */
236 struct hash_control
*entry_hash
; /* code entry hint hash table */
238 /* If X_op is != O_absent, the registername for the instruction's
239 qualifying predicate. If NULL, p0 is assumed for instructions
240 that are predictable. */
243 /* Optimize for which CPU. */
250 /* What to do when hint.b is used. */
262 explicit_mode
: 1, /* which mode we're in */
263 default_explicit_mode
: 1, /* which mode is the default */
264 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
266 keep_pending_output
: 1;
268 /* What to do when something is wrong with unwind directives. */
271 unwind_check_warning
,
275 /* Each bundle consists of up to three instructions. We keep
276 track of four most recent instructions so we can correctly set
277 the end_of_insn_group for the last instruction in a bundle. */
279 int num_slots_in_use
;
283 end_of_insn_group
: 1,
284 manual_bundling_on
: 1,
285 manual_bundling_off
: 1,
286 loc_directive_seen
: 1;
287 signed char user_template
; /* user-selected template, if any */
288 unsigned char qp_regno
; /* qualifying predicate */
289 /* This duplicates a good fraction of "struct fix" but we
290 can't use a "struct fix" instead since we can't call
291 fix_new_exp() until we know the address of the instruction. */
295 bfd_reloc_code_real_type code
;
296 enum ia64_opnd opnd
; /* type of operand in need of fix */
297 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
298 expressionS expr
; /* the value to be inserted */
300 fixup
[2]; /* at most two fixups per insn */
301 struct ia64_opcode
*idesc
;
302 struct label_fix
*label_fixups
;
303 struct label_fix
*tag_fixups
;
304 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
307 unsigned int src_line
;
308 struct dwarf2_line_info debug_line
;
316 struct dynreg
*next
; /* next dynamic register */
318 unsigned short base
; /* the base register number */
319 unsigned short num_regs
; /* # of registers in this set */
321 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
323 flagword flags
; /* ELF-header flags */
326 unsigned hint
:1; /* is this hint currently valid? */
327 bfd_vma offset
; /* mem.offset offset */
328 bfd_vma base
; /* mem.offset base */
331 int path
; /* number of alt. entry points seen */
332 const char **entry_labels
; /* labels of all alternate paths in
333 the current DV-checking block. */
334 int maxpaths
; /* size currently allocated for
337 int pointer_size
; /* size in bytes of a pointer */
338 int pointer_size_shift
; /* shift size of a pointer for alignment */
340 symbolS
*indregsym
[IND_RR
- IND_CPUID
+ 1];
344 /* These are not const, because they are modified to MMI for non-itanium1
346 /* MFI bundle of nops. */
347 static unsigned char le_nop
[16] =
349 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
350 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
352 /* MFI bundle of nops with stop-bit. */
353 static unsigned char le_nop_stop
[16] =
355 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
356 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
359 /* application registers: */
365 #define AR_BSPSTORE 18
391 {"ar.k0", AR_K0
}, {"ar.k1", AR_K0
+ 1},
392 {"ar.k2", AR_K0
+ 2}, {"ar.k3", AR_K0
+ 3},
393 {"ar.k4", AR_K0
+ 4}, {"ar.k5", AR_K0
+ 5},
394 {"ar.k6", AR_K0
+ 6}, {"ar.k7", AR_K7
},
395 {"ar.rsc", AR_RSC
}, {"ar.bsp", AR_BSP
},
396 {"ar.bspstore", AR_BSPSTORE
}, {"ar.rnat", AR_RNAT
},
397 {"ar.fcr", AR_FCR
}, {"ar.eflag", AR_EFLAG
},
398 {"ar.csd", AR_CSD
}, {"ar.ssd", AR_SSD
},
399 {"ar.cflg", AR_CFLG
}, {"ar.fsr", AR_FSR
},
400 {"ar.fir", AR_FIR
}, {"ar.fdr", AR_FDR
},
401 {"ar.ccv", AR_CCV
}, {"ar.unat", AR_UNAT
},
402 {"ar.fpsr", AR_FPSR
}, {"ar.itc", AR_ITC
},
403 {"ar.ruc", AR_RUC
}, {"ar.pfs", AR_PFS
},
404 {"ar.lc", AR_LC
}, {"ar.ec", AR_EC
},
407 /* control registers: */
448 {"cr.gpta", CR_GPTA
},
449 {"cr.ipsr", CR_IPSR
},
453 {"cr.itir", CR_ITIR
},
454 {"cr.iipa", CR_IIPA
},
458 {"cr.iib0", CR_IIB0
},
459 {"cr.iib1", CR_IIB1
},
464 {"cr.irr0", CR_IRR0
},
465 {"cr.irr1", CR_IRR0
+ 1},
466 {"cr.irr2", CR_IRR0
+ 2},
467 {"cr.irr3", CR_IRR3
},
470 {"cr.cmcv", CR_CMCV
},
471 {"cr.lrr0", CR_LRR0
},
480 static const struct const_desc
487 /* PSR constant masks: */
490 {"psr.be", ((valueT
) 1) << 1},
491 {"psr.up", ((valueT
) 1) << 2},
492 {"psr.ac", ((valueT
) 1) << 3},
493 {"psr.mfl", ((valueT
) 1) << 4},
494 {"psr.mfh", ((valueT
) 1) << 5},
496 {"psr.ic", ((valueT
) 1) << 13},
497 {"psr.i", ((valueT
) 1) << 14},
498 {"psr.pk", ((valueT
) 1) << 15},
500 {"psr.dt", ((valueT
) 1) << 17},
501 {"psr.dfl", ((valueT
) 1) << 18},
502 {"psr.dfh", ((valueT
) 1) << 19},
503 {"psr.sp", ((valueT
) 1) << 20},
504 {"psr.pp", ((valueT
) 1) << 21},
505 {"psr.di", ((valueT
) 1) << 22},
506 {"psr.si", ((valueT
) 1) << 23},
507 {"psr.db", ((valueT
) 1) << 24},
508 {"psr.lp", ((valueT
) 1) << 25},
509 {"psr.tb", ((valueT
) 1) << 26},
510 {"psr.rt", ((valueT
) 1) << 27},
511 /* 28-31: reserved */
512 /* 32-33: cpl (current privilege level) */
513 {"psr.is", ((valueT
) 1) << 34},
514 {"psr.mc", ((valueT
) 1) << 35},
515 {"psr.it", ((valueT
) 1) << 36},
516 {"psr.id", ((valueT
) 1) << 37},
517 {"psr.da", ((valueT
) 1) << 38},
518 {"psr.dd", ((valueT
) 1) << 39},
519 {"psr.ss", ((valueT
) 1) << 40},
520 /* 41-42: ri (restart instruction) */
521 {"psr.ed", ((valueT
) 1) << 43},
522 {"psr.bn", ((valueT
) 1) << 44},
525 /* indirect register-sets/memory: */
534 { "CPUID", IND_CPUID
},
535 { "cpuid", IND_CPUID
},
544 { "dahr", IND_DAHR
},
548 /* Pseudo functions used to indicate relocation types (these functions
549 start with an at sign (@). */
571 /* reloc pseudo functions (these must come first!): */
572 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
573 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
574 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
575 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
576 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
577 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
578 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
579 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
580 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
581 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
582 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
583 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
584 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
585 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
586 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
587 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
588 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
590 { "slotcount", PSEUDO_FUNC_RELOC
, { 0 } },
593 /* mbtype4 constants: */
594 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
595 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
596 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
597 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
598 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
600 /* fclass constants: */
601 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
602 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
603 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
604 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
605 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
606 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
607 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
608 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
609 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
611 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
613 /* hint constants: */
614 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
615 { "priority", PSEUDO_FUNC_CONST
, { 0x1 } },
618 { "clz", PSEUDO_FUNC_CONST
, { 32 } },
619 { "mpy", PSEUDO_FUNC_CONST
, { 33 } },
620 { "datahints", PSEUDO_FUNC_CONST
, { 34 } },
622 /* unwind-related constants: */
623 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
624 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
625 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
626 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_GNU
} },
627 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
628 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
629 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
631 /* unwind-related registers: */
632 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
635 /* 41-bit nop opcodes (one per unit): */
636 static const bfd_vma nop
[IA64_NUM_UNITS
] =
638 0x0000000000LL
, /* NIL => break 0 */
639 0x0008000000LL
, /* I-unit nop */
640 0x0008000000LL
, /* M-unit nop */
641 0x4000000000LL
, /* B-unit nop */
642 0x0008000000LL
, /* F-unit nop */
643 0x0000000000LL
, /* L-"unit" nop immediate */
644 0x0008000000LL
, /* X-unit nop */
647 /* Can't be `const' as it's passed to input routines (which have the
648 habit of setting temporary sentinels. */
649 static char special_section_name
[][20] =
651 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
652 {".IA_64.unwind"}, {".IA_64.unwind_info"},
653 {".init_array"}, {".fini_array"}
656 /* The best template for a particular sequence of up to three
658 #define N IA64_NUM_TYPES
659 static unsigned char best_template
[N
][N
][N
];
662 /* Resource dependencies currently in effect */
664 int depind
; /* dependency index */
665 const struct ia64_dependency
*dependency
; /* actual dependency */
666 unsigned specific
:1, /* is this a specific bit/regno? */
667 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
668 int index
; /* specific regno/bit within dependency */
669 int note
; /* optional qualifying note (0 if none) */
673 int insn_srlz
; /* current insn serialization state */
674 int data_srlz
; /* current data serialization state */
675 int qp_regno
; /* qualifying predicate for this usage */
676 char *file
; /* what file marked this dependency */
677 unsigned int line
; /* what line marked this dependency */
678 struct mem_offset mem_offset
; /* optional memory offset hint */
679 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
680 int path
; /* corresponding code entry index */
682 static int regdepslen
= 0;
683 static int regdepstotlen
= 0;
684 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
685 static const char *dv_sem
[] = { "none", "implied", "impliedf",
686 "data", "instr", "specific", "stop", "other" };
687 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
689 /* Current state of PR mutexation */
690 static struct qpmutex
{
693 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
694 static int qp_mutexeslen
= 0;
695 static int qp_mutexestotlen
= 0;
696 static valueT qp_safe_across_calls
= 0;
698 /* Current state of PR implications */
699 static struct qp_imply
{
702 unsigned p2_branched
:1;
704 } *qp_implies
= NULL
;
705 static int qp_implieslen
= 0;
706 static int qp_impliestotlen
= 0;
708 /* Keep track of static GR values so that indirect register usage can
709 sometimes be tracked. */
720 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
726 /* Remember the alignment frag. */
727 static fragS
*align_frag
;
729 /* These are the routines required to output the various types of
732 /* A slot_number is a frag address plus the slot index (0-2). We use the
733 frag address here so that if there is a section switch in the middle of
734 a function, then instructions emitted to a different section are not
735 counted. Since there may be more than one frag for a function, this
736 means we also need to keep track of which frag this address belongs to
737 so we can compute inter-frag distances. This also nicely solves the
738 problem with nops emitted for align directives, which can't easily be
739 counted, but can easily be derived from frag sizes. */
741 typedef struct unw_rec_list
{
743 unsigned long slot_number
;
745 struct unw_rec_list
*next
;
748 #define SLOT_NUM_NOT_SET (unsigned)-1
750 /* Linked list of saved prologue counts. A very poor
751 implementation of a map from label numbers to prologue counts. */
752 typedef struct label_prologue_count
754 struct label_prologue_count
*next
;
755 unsigned long label_number
;
756 unsigned int prologue_count
;
757 } label_prologue_count
;
759 typedef struct proc_pending
762 struct proc_pending
*next
;
767 /* Maintain a list of unwind entries for the current function. */
771 /* Any unwind entries that should be attached to the current slot
772 that an insn is being constructed for. */
773 unw_rec_list
*current_entry
;
775 /* These are used to create the unwind table entry for this function. */
776 proc_pending proc_pending
;
777 symbolS
*info
; /* pointer to unwind info */
778 symbolS
*personality_routine
;
780 subsegT saved_text_subseg
;
781 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
783 /* TRUE if processing unwind directives in a prologue region. */
784 unsigned int prologue
: 1;
785 unsigned int prologue_mask
: 4;
786 unsigned int prologue_gr
: 7;
787 unsigned int body
: 1;
788 unsigned int insn
: 1;
789 unsigned int prologue_count
; /* number of .prologues seen so far */
790 /* Prologue counts at previous .label_state directives. */
791 struct label_prologue_count
* saved_prologue_counts
;
793 /* List of split up .save-s. */
794 unw_p_record
*pending_saves
;
797 /* The input value is a negated offset from psp, and specifies an address
798 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
799 must add 16 and divide by 4 to get the encoded value. */
801 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
803 typedef void (*vbyte_func
) (int, char *, char *);
805 /* Forward declarations: */
806 static void dot_alias (int);
807 static int parse_operand_and_eval (expressionS
*, int);
808 static void emit_one_bundle (void);
809 static bfd_reloc_code_real_type
ia64_gen_real_reloc_type (struct symbol
*,
810 bfd_reloc_code_real_type
);
811 static void insn_group_break (int, int, int);
812 static void add_qp_mutex (valueT
);
813 static void add_qp_imply (int, int);
814 static void clear_qp_mutex (valueT
);
815 static void clear_qp_implies (valueT
, valueT
);
816 static void print_dependency (const char *, int);
817 static void instruction_serialization (void);
818 static void data_serialization (void);
819 static void output_R3_format (vbyte_func
, unw_record_type
, unsigned long);
820 static void output_B3_format (vbyte_func
, unsigned long, unsigned long);
821 static void output_B4_format (vbyte_func
, unw_record_type
, unsigned long);
822 static void free_saved_prologue_counts (void);
824 /* Determine if application register REGNUM resides only in the integer
825 unit (as opposed to the memory unit). */
827 ar_is_only_in_integer_unit (int reg
)
830 return reg
>= 64 && reg
<= 111;
833 /* Determine if application register REGNUM resides only in the memory
834 unit (as opposed to the integer unit). */
836 ar_is_only_in_memory_unit (int reg
)
839 return reg
>= 0 && reg
<= 47;
842 /* Switch to section NAME and create section if necessary. It's
843 rather ugly that we have to manipulate input_line_pointer but I
844 don't see any other way to accomplish the same thing without
845 changing obj-elf.c (which may be the Right Thing, in the end). */
847 set_section (char *name
)
849 char *saved_input_line_pointer
;
851 saved_input_line_pointer
= input_line_pointer
;
852 input_line_pointer
= name
;
854 input_line_pointer
= saved_input_line_pointer
;
857 /* Map 's' to SHF_IA_64_SHORT. */
860 ia64_elf_section_letter (int letter
, char **ptr_msg
)
863 return SHF_IA_64_SHORT
;
864 else if (letter
== 'o')
865 return SHF_LINK_ORDER
;
867 else if (letter
== 'O')
868 return SHF_IA_64_VMS_OVERLAID
;
869 else if (letter
== 'g')
870 return SHF_IA_64_VMS_GLOBAL
;
873 *ptr_msg
= _("bad .section directive: want a,o,s,w,x,M,S,G,T in string");
877 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
880 ia64_elf_section_flags (flagword flags
,
882 int type ATTRIBUTE_UNUSED
)
884 if (attr
& SHF_IA_64_SHORT
)
885 flags
|= SEC_SMALL_DATA
;
890 ia64_elf_section_type (const char *str
, size_t len
)
892 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
894 if (STREQ (ELF_STRING_ia64_unwind_info
))
897 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
900 if (STREQ (ELF_STRING_ia64_unwind
))
901 return SHT_IA_64_UNWIND
;
903 if (STREQ (ELF_STRING_ia64_unwind_once
))
904 return SHT_IA_64_UNWIND
;
906 if (STREQ ("unwind"))
907 return SHT_IA_64_UNWIND
;
914 set_regstack (unsigned int ins
,
922 sof
= ins
+ locs
+ outs
;
925 as_bad (_("Size of frame exceeds maximum of 96 registers"));
930 as_warn (_("Size of rotating registers exceeds frame size"));
933 md
.in
.base
= REG_GR
+ 32;
934 md
.loc
.base
= md
.in
.base
+ ins
;
935 md
.out
.base
= md
.loc
.base
+ locs
;
937 md
.in
.num_regs
= ins
;
938 md
.loc
.num_regs
= locs
;
939 md
.out
.num_regs
= outs
;
940 md
.rot
.num_regs
= rots
;
945 ia64_flush_insns (void)
947 struct label_fix
*lfix
;
949 subsegT saved_subseg
;
953 if (!md
.last_text_seg
)
957 saved_subseg
= now_subseg
;
959 subseg_set (md
.last_text_seg
, 0);
961 while (md
.num_slots_in_use
> 0)
962 emit_one_bundle (); /* force out queued instructions */
964 /* In case there are labels following the last instruction, resolve
967 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
969 symbol_set_value_now (lfix
->sym
);
970 mark
|= lfix
->dw2_mark_labels
;
974 dwarf2_where (&CURR_SLOT
.debug_line
);
975 CURR_SLOT
.debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
976 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT
.debug_line
);
977 dwarf2_consume_line_info ();
979 CURR_SLOT
.label_fixups
= 0;
981 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
982 symbol_set_value_now (lfix
->sym
);
983 CURR_SLOT
.tag_fixups
= 0;
985 /* In case there are unwind directives following the last instruction,
986 resolve those now. We only handle prologue, body, and endp directives
987 here. Give an error for others. */
988 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
996 ptr
->slot_number
= (unsigned long) frag_more (0);
997 ptr
->slot_frag
= frag_now
;
1000 /* Allow any record which doesn't have a "t" field (i.e.,
1001 doesn't relate to a particular instruction). */
1017 as_bad (_("Unwind directive not followed by an instruction."));
1021 unwind
.current_entry
= NULL
;
1023 subseg_set (saved_seg
, saved_subseg
);
1025 if (md
.qp
.X_op
== O_register
)
1026 as_bad (_("qualifying predicate not followed by instruction"));
1030 ia64_do_align (int nbytes
)
1032 char *saved_input_line_pointer
= input_line_pointer
;
1034 input_line_pointer
= "";
1035 s_align_bytes (nbytes
);
1036 input_line_pointer
= saved_input_line_pointer
;
1040 ia64_cons_align (int nbytes
)
1044 char *saved_input_line_pointer
= input_line_pointer
;
1045 input_line_pointer
= "";
1046 s_align_bytes (nbytes
);
1047 input_line_pointer
= saved_input_line_pointer
;
1053 /* .vms_common section, symbol, size, alignment */
1056 obj_elf_vms_common (int ignore ATTRIBUTE_UNUSED
)
1065 segT current_seg
= now_seg
;
1066 subsegT current_subseg
= now_subseg
;
1070 sec_name
= obj_elf_section_name ();
1071 if (sec_name
== NULL
)
1076 if (*input_line_pointer
== ',')
1078 input_line_pointer
++;
1083 as_bad (_("expected ',' after section name"));
1084 ignore_rest_of_line ();
1088 sym_name
= input_line_pointer
;
1089 c
= get_symbol_end ();
1091 if (input_line_pointer
== sym_name
)
1093 *input_line_pointer
= c
;
1094 as_bad (_("expected symbol name"));
1095 ignore_rest_of_line ();
1099 symbolP
= symbol_find_or_make (sym_name
);
1100 *input_line_pointer
= c
;
1102 if ((S_IS_DEFINED (symbolP
) || symbol_equated_p (symbolP
))
1103 && !S_IS_COMMON (symbolP
))
1105 as_bad (_("Ignoring attempt to re-define symbol"));
1106 ignore_rest_of_line ();
1112 if (*input_line_pointer
== ',')
1114 input_line_pointer
++;
1119 as_bad (_("expected ',' after symbol name"));
1120 ignore_rest_of_line ();
1124 temp
= get_absolute_expression ();
1126 size
&= ((offsetT
) 2 << (stdoutput
->arch_info
->bits_per_address
- 1)) - 1;
1129 as_warn (_("size (%ld) out of range, ignored"), (long) temp
);
1130 ignore_rest_of_line ();
1136 if (*input_line_pointer
== ',')
1138 input_line_pointer
++;
1143 as_bad (_("expected ',' after symbol size"));
1144 ignore_rest_of_line ();
1148 log_align
= get_absolute_expression ();
1150 demand_empty_rest_of_line ();
1152 obj_elf_change_section
1153 (sec_name
, SHT_NOBITS
,
1154 SHF_ALLOC
| SHF_WRITE
| SHF_IA_64_VMS_OVERLAID
| SHF_IA_64_VMS_GLOBAL
,
1157 S_SET_VALUE (symbolP
, 0);
1158 S_SET_SIZE (symbolP
, size
);
1159 S_SET_EXTERNAL (symbolP
);
1160 S_SET_SEGMENT (symbolP
, now_seg
);
1162 symbol_get_bfdsym (symbolP
)->flags
|= BSF_OBJECT
;
1164 record_alignment (now_seg
, log_align
);
1166 cur_size
= bfd_section_size (stdoutput
, now_seg
);
1167 if ((int) size
> cur_size
)
1170 = frag_var (rs_fill
, 1, 1, (relax_substateT
)0, NULL
,
1171 (valueT
)size
- (valueT
)cur_size
, NULL
);
1173 bfd_section_size (stdoutput
, now_seg
) = size
;
1176 /* Switch back to current segment. */
1177 subseg_set (current_seg
, current_subseg
);
1179 #ifdef md_elf_section_change_hook
1180 md_elf_section_change_hook ();
1186 /* Output COUNT bytes to a memory location. */
1187 static char *vbyte_mem_ptr
= NULL
;
1190 output_vbyte_mem (int count
, char *ptr
, char *comment ATTRIBUTE_UNUSED
)
1193 if (vbyte_mem_ptr
== NULL
)
1198 for (x
= 0; x
< count
; x
++)
1199 *(vbyte_mem_ptr
++) = ptr
[x
];
1202 /* Count the number of bytes required for records. */
1203 static int vbyte_count
= 0;
1205 count_output (int count
,
1206 char *ptr ATTRIBUTE_UNUSED
,
1207 char *comment ATTRIBUTE_UNUSED
)
1209 vbyte_count
+= count
;
1213 output_R1_format (vbyte_func f
, unw_record_type rtype
, int rlen
)
1219 output_R3_format (f
, rtype
, rlen
);
1225 else if (rtype
!= prologue
)
1226 as_bad (_("record type is not valid"));
1228 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1229 (*f
) (1, &byte
, NULL
);
1233 output_R2_format (vbyte_func f
, int mask
, int grsave
, unsigned long rlen
)
1237 mask
= (mask
& 0x0f);
1238 grsave
= (grsave
& 0x7f);
1240 bytes
[0] = (UNW_R2
| (mask
>> 1));
1241 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1242 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1243 (*f
) (count
, bytes
, NULL
);
1247 output_R3_format (vbyte_func f
, unw_record_type rtype
, unsigned long rlen
)
1253 output_R1_format (f
, rtype
, rlen
);
1259 else if (rtype
!= prologue
)
1260 as_bad (_("record type is not valid"));
1261 bytes
[0] = (UNW_R3
| r
);
1262 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1263 (*f
) (count
+ 1, bytes
, NULL
);
1267 output_P1_format (vbyte_func f
, int brmask
)
1270 byte
= UNW_P1
| (brmask
& 0x1f);
1271 (*f
) (1, &byte
, NULL
);
1275 output_P2_format (vbyte_func f
, int brmask
, int gr
)
1278 brmask
= (brmask
& 0x1f);
1279 bytes
[0] = UNW_P2
| (brmask
>> 1);
1280 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1281 (*f
) (2, bytes
, NULL
);
1285 output_P3_format (vbyte_func f
, unw_record_type rtype
, int reg
)
1329 as_bad (_("Invalid record type for P3 format."));
1331 bytes
[0] = (UNW_P3
| (r
>> 1));
1332 bytes
[1] = (((r
& 1) << 7) | reg
);
1333 (*f
) (2, bytes
, NULL
);
1337 output_P4_format (vbyte_func f
, unsigned char *imask
, unsigned long imask_size
)
1340 (*f
) (imask_size
, (char *) imask
, NULL
);
1344 output_P5_format (vbyte_func f
, int grmask
, unsigned long frmask
)
1347 grmask
= (grmask
& 0x0f);
1350 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1351 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1352 bytes
[3] = (frmask
& 0x000000ff);
1353 (*f
) (4, bytes
, NULL
);
1357 output_P6_format (vbyte_func f
, unw_record_type rtype
, int rmask
)
1362 if (rtype
== gr_mem
)
1364 else if (rtype
!= fr_mem
)
1365 as_bad (_("Invalid record type for format P6"));
1366 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1367 (*f
) (1, &byte
, NULL
);
1371 output_P7_format (vbyte_func f
,
1372 unw_record_type rtype
,
1379 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1384 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1434 bytes
[0] = (UNW_P7
| r
);
1435 (*f
) (count
, bytes
, NULL
);
1439 output_P8_format (vbyte_func f
, unw_record_type rtype
, unsigned long t
)
1477 case bspstore_psprel
:
1480 case bspstore_sprel
:
1492 case priunat_when_gr
:
1495 case priunat_psprel
:
1501 case priunat_when_mem
:
1508 count
+= output_leb128 (bytes
+ 2, t
, 0);
1509 (*f
) (count
, bytes
, NULL
);
1513 output_P9_format (vbyte_func f
, int grmask
, int gr
)
1517 bytes
[1] = (grmask
& 0x0f);
1518 bytes
[2] = (gr
& 0x7f);
1519 (*f
) (3, bytes
, NULL
);
1523 output_P10_format (vbyte_func f
, int abi
, int context
)
1527 bytes
[1] = (abi
& 0xff);
1528 bytes
[2] = (context
& 0xff);
1529 (*f
) (3, bytes
, NULL
);
1533 output_B1_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1539 output_B4_format (f
, rtype
, label
);
1542 if (rtype
== copy_state
)
1544 else if (rtype
!= label_state
)
1545 as_bad (_("Invalid record type for format B1"));
1547 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1548 (*f
) (1, &byte
, NULL
);
1552 output_B2_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1558 output_B3_format (f
, ecount
, t
);
1561 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1562 count
+= output_leb128 (bytes
+ 1, t
, 0);
1563 (*f
) (count
, bytes
, NULL
);
1567 output_B3_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1573 output_B2_format (f
, ecount
, t
);
1577 count
+= output_leb128 (bytes
+ 1, t
, 0);
1578 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1579 (*f
) (count
, bytes
, NULL
);
1583 output_B4_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1590 output_B1_format (f
, rtype
, label
);
1594 if (rtype
== copy_state
)
1596 else if (rtype
!= label_state
)
1597 as_bad (_("Invalid record type for format B1"));
1599 bytes
[0] = (UNW_B4
| (r
<< 3));
1600 count
+= output_leb128 (bytes
+ 1, label
, 0);
1601 (*f
) (count
, bytes
, NULL
);
1605 format_ab_reg (int ab
, int reg
)
1610 ret
= (ab
<< 5) | reg
;
1615 output_X1_format (vbyte_func f
,
1616 unw_record_type rtype
,
1627 if (rtype
== spill_sprel
)
1629 else if (rtype
!= spill_psprel
)
1630 as_bad (_("Invalid record type for format X1"));
1631 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1632 count
+= output_leb128 (bytes
+ 2, t
, 0);
1633 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1634 (*f
) (count
, bytes
, NULL
);
1638 output_X2_format (vbyte_func f
,
1649 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1650 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1651 count
+= output_leb128 (bytes
+ 3, t
, 0);
1652 (*f
) (count
, bytes
, NULL
);
1656 output_X3_format (vbyte_func f
,
1657 unw_record_type rtype
,
1669 if (rtype
== spill_sprel_p
)
1671 else if (rtype
!= spill_psprel_p
)
1672 as_bad (_("Invalid record type for format X3"));
1673 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1674 bytes
[2] = format_ab_reg (ab
, reg
);
1675 count
+= output_leb128 (bytes
+ 3, t
, 0);
1676 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1677 (*f
) (count
, bytes
, NULL
);
1681 output_X4_format (vbyte_func f
,
1693 bytes
[1] = (qp
& 0x3f);
1694 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1695 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1696 count
+= output_leb128 (bytes
+ 4, t
, 0);
1697 (*f
) (count
, bytes
, NULL
);
1700 /* This function checks whether there are any outstanding .save-s and
1701 discards them if so. */
1704 check_pending_save (void)
1706 if (unwind
.pending_saves
)
1708 unw_rec_list
*cur
, *prev
;
1710 as_warn (_("Previous .save incomplete"));
1711 for (cur
= unwind
.list
, prev
= NULL
; cur
; )
1712 if (&cur
->r
.record
.p
== unwind
.pending_saves
)
1715 prev
->next
= cur
->next
;
1717 unwind
.list
= cur
->next
;
1718 if (cur
== unwind
.tail
)
1720 if (cur
== unwind
.current_entry
)
1721 unwind
.current_entry
= cur
->next
;
1722 /* Don't free the first discarded record, it's being used as
1723 terminator for (currently) br_gr and gr_gr processing, and
1724 also prevents leaving a dangling pointer to it in its
1726 cur
->r
.record
.p
.grmask
= 0;
1727 cur
->r
.record
.p
.brmask
= 0;
1728 cur
->r
.record
.p
.frmask
= 0;
1729 prev
= cur
->r
.record
.p
.next
;
1730 cur
->r
.record
.p
.next
= NULL
;
1742 cur
= cur
->r
.record
.p
.next
;
1745 unwind
.pending_saves
= NULL
;
1749 /* This function allocates a record list structure, and initializes fields. */
1751 static unw_rec_list
*
1752 alloc_record (unw_record_type t
)
1755 ptr
= xmalloc (sizeof (*ptr
));
1756 memset (ptr
, 0, sizeof (*ptr
));
1757 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1762 /* Dummy unwind record used for calculating the length of the last prologue or
1765 static unw_rec_list
*
1768 unw_rec_list
*ptr
= alloc_record (endp
);
1772 static unw_rec_list
*
1773 output_prologue (void)
1775 unw_rec_list
*ptr
= alloc_record (prologue
);
1776 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1780 static unw_rec_list
*
1781 output_prologue_gr (unsigned int saved_mask
, unsigned int reg
)
1783 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1784 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1785 ptr
->r
.record
.r
.grmask
= saved_mask
;
1786 ptr
->r
.record
.r
.grsave
= reg
;
1790 static unw_rec_list
*
1793 unw_rec_list
*ptr
= alloc_record (body
);
1797 static unw_rec_list
*
1798 output_mem_stack_f (unsigned int size
)
1800 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1801 ptr
->r
.record
.p
.size
= size
;
1805 static unw_rec_list
*
1806 output_mem_stack_v (void)
1808 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1812 static unw_rec_list
*
1813 output_psp_gr (unsigned int gr
)
1815 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1816 ptr
->r
.record
.p
.r
.gr
= gr
;
1820 static unw_rec_list
*
1821 output_psp_sprel (unsigned int offset
)
1823 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1824 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1828 static unw_rec_list
*
1829 output_rp_when (void)
1831 unw_rec_list
*ptr
= alloc_record (rp_when
);
1835 static unw_rec_list
*
1836 output_rp_gr (unsigned int gr
)
1838 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1839 ptr
->r
.record
.p
.r
.gr
= gr
;
1843 static unw_rec_list
*
1844 output_rp_br (unsigned int br
)
1846 unw_rec_list
*ptr
= alloc_record (rp_br
);
1847 ptr
->r
.record
.p
.r
.br
= br
;
1851 static unw_rec_list
*
1852 output_rp_psprel (unsigned int offset
)
1854 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1855 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1859 static unw_rec_list
*
1860 output_rp_sprel (unsigned int offset
)
1862 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1863 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1867 static unw_rec_list
*
1868 output_pfs_when (void)
1870 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1874 static unw_rec_list
*
1875 output_pfs_gr (unsigned int gr
)
1877 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1878 ptr
->r
.record
.p
.r
.gr
= gr
;
1882 static unw_rec_list
*
1883 output_pfs_psprel (unsigned int offset
)
1885 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1886 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1890 static unw_rec_list
*
1891 output_pfs_sprel (unsigned int offset
)
1893 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1894 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1898 static unw_rec_list
*
1899 output_preds_when (void)
1901 unw_rec_list
*ptr
= alloc_record (preds_when
);
1905 static unw_rec_list
*
1906 output_preds_gr (unsigned int gr
)
1908 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1909 ptr
->r
.record
.p
.r
.gr
= gr
;
1913 static unw_rec_list
*
1914 output_preds_psprel (unsigned int offset
)
1916 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1917 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1921 static unw_rec_list
*
1922 output_preds_sprel (unsigned int offset
)
1924 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1925 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1929 static unw_rec_list
*
1930 output_fr_mem (unsigned int mask
)
1932 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1933 unw_rec_list
*cur
= ptr
;
1935 ptr
->r
.record
.p
.frmask
= mask
;
1936 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1939 unw_rec_list
*prev
= cur
;
1941 /* Clear least significant set bit. */
1942 mask
&= ~(mask
& (~mask
+ 1));
1945 cur
= alloc_record (fr_mem
);
1946 cur
->r
.record
.p
.frmask
= mask
;
1947 /* Retain only least significant bit. */
1948 prev
->r
.record
.p
.frmask
^= mask
;
1949 prev
->r
.record
.p
.next
= cur
;
1953 static unw_rec_list
*
1954 output_frgr_mem (unsigned int gr_mask
, unsigned int fr_mask
)
1956 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1957 unw_rec_list
*cur
= ptr
;
1959 unwind
.pending_saves
= &cur
->r
.record
.p
;
1960 cur
->r
.record
.p
.frmask
= fr_mask
;
1963 unw_rec_list
*prev
= cur
;
1965 /* Clear least significant set bit. */
1966 fr_mask
&= ~(fr_mask
& (~fr_mask
+ 1));
1967 if (!gr_mask
&& !fr_mask
)
1969 cur
= alloc_record (frgr_mem
);
1970 cur
->r
.record
.p
.frmask
= fr_mask
;
1971 /* Retain only least significant bit. */
1972 prev
->r
.record
.p
.frmask
^= fr_mask
;
1973 prev
->r
.record
.p
.next
= cur
;
1975 cur
->r
.record
.p
.grmask
= gr_mask
;
1978 unw_rec_list
*prev
= cur
;
1980 /* Clear least significant set bit. */
1981 gr_mask
&= ~(gr_mask
& (~gr_mask
+ 1));
1984 cur
= alloc_record (frgr_mem
);
1985 cur
->r
.record
.p
.grmask
= gr_mask
;
1986 /* Retain only least significant bit. */
1987 prev
->r
.record
.p
.grmask
^= gr_mask
;
1988 prev
->r
.record
.p
.next
= cur
;
1992 static unw_rec_list
*
1993 output_gr_gr (unsigned int mask
, unsigned int reg
)
1995 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1996 unw_rec_list
*cur
= ptr
;
1998 ptr
->r
.record
.p
.grmask
= mask
;
1999 ptr
->r
.record
.p
.r
.gr
= reg
;
2000 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2003 unw_rec_list
*prev
= cur
;
2005 /* Clear least significant set bit. */
2006 mask
&= ~(mask
& (~mask
+ 1));
2009 cur
= alloc_record (gr_gr
);
2010 cur
->r
.record
.p
.grmask
= mask
;
2011 /* Indicate this record shouldn't be output. */
2012 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2013 /* Retain only least significant bit. */
2014 prev
->r
.record
.p
.grmask
^= mask
;
2015 prev
->r
.record
.p
.next
= cur
;
2019 static unw_rec_list
*
2020 output_gr_mem (unsigned int mask
)
2022 unw_rec_list
*ptr
= alloc_record (gr_mem
);
2023 unw_rec_list
*cur
= ptr
;
2025 ptr
->r
.record
.p
.grmask
= mask
;
2026 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2029 unw_rec_list
*prev
= cur
;
2031 /* Clear least significant set bit. */
2032 mask
&= ~(mask
& (~mask
+ 1));
2035 cur
= alloc_record (gr_mem
);
2036 cur
->r
.record
.p
.grmask
= mask
;
2037 /* Retain only least significant bit. */
2038 prev
->r
.record
.p
.grmask
^= mask
;
2039 prev
->r
.record
.p
.next
= cur
;
2043 static unw_rec_list
*
2044 output_br_mem (unsigned int mask
)
2046 unw_rec_list
*ptr
= alloc_record (br_mem
);
2047 unw_rec_list
*cur
= ptr
;
2049 ptr
->r
.record
.p
.brmask
= mask
;
2050 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2053 unw_rec_list
*prev
= cur
;
2055 /* Clear least significant set bit. */
2056 mask
&= ~(mask
& (~mask
+ 1));
2059 cur
= alloc_record (br_mem
);
2060 cur
->r
.record
.p
.brmask
= mask
;
2061 /* Retain only least significant bit. */
2062 prev
->r
.record
.p
.brmask
^= mask
;
2063 prev
->r
.record
.p
.next
= cur
;
2067 static unw_rec_list
*
2068 output_br_gr (unsigned int mask
, unsigned int reg
)
2070 unw_rec_list
*ptr
= alloc_record (br_gr
);
2071 unw_rec_list
*cur
= ptr
;
2073 ptr
->r
.record
.p
.brmask
= mask
;
2074 ptr
->r
.record
.p
.r
.gr
= reg
;
2075 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2078 unw_rec_list
*prev
= cur
;
2080 /* Clear least significant set bit. */
2081 mask
&= ~(mask
& (~mask
+ 1));
2084 cur
= alloc_record (br_gr
);
2085 cur
->r
.record
.p
.brmask
= mask
;
2086 /* Indicate this record shouldn't be output. */
2087 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2088 /* Retain only least significant bit. */
2089 prev
->r
.record
.p
.brmask
^= mask
;
2090 prev
->r
.record
.p
.next
= cur
;
2094 static unw_rec_list
*
2095 output_spill_base (unsigned int offset
)
2097 unw_rec_list
*ptr
= alloc_record (spill_base
);
2098 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2102 static unw_rec_list
*
2103 output_unat_when (void)
2105 unw_rec_list
*ptr
= alloc_record (unat_when
);
2109 static unw_rec_list
*
2110 output_unat_gr (unsigned int gr
)
2112 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2113 ptr
->r
.record
.p
.r
.gr
= gr
;
2117 static unw_rec_list
*
2118 output_unat_psprel (unsigned int offset
)
2120 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2121 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2125 static unw_rec_list
*
2126 output_unat_sprel (unsigned int offset
)
2128 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2129 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2133 static unw_rec_list
*
2134 output_lc_when (void)
2136 unw_rec_list
*ptr
= alloc_record (lc_when
);
2140 static unw_rec_list
*
2141 output_lc_gr (unsigned int gr
)
2143 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2144 ptr
->r
.record
.p
.r
.gr
= gr
;
2148 static unw_rec_list
*
2149 output_lc_psprel (unsigned int offset
)
2151 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2152 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2156 static unw_rec_list
*
2157 output_lc_sprel (unsigned int offset
)
2159 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2160 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2164 static unw_rec_list
*
2165 output_fpsr_when (void)
2167 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2171 static unw_rec_list
*
2172 output_fpsr_gr (unsigned int gr
)
2174 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2175 ptr
->r
.record
.p
.r
.gr
= gr
;
2179 static unw_rec_list
*
2180 output_fpsr_psprel (unsigned int offset
)
2182 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2183 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2187 static unw_rec_list
*
2188 output_fpsr_sprel (unsigned int offset
)
2190 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2191 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2195 static unw_rec_list
*
2196 output_priunat_when_gr (void)
2198 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2202 static unw_rec_list
*
2203 output_priunat_when_mem (void)
2205 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2209 static unw_rec_list
*
2210 output_priunat_gr (unsigned int gr
)
2212 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2213 ptr
->r
.record
.p
.r
.gr
= gr
;
2217 static unw_rec_list
*
2218 output_priunat_psprel (unsigned int offset
)
2220 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2221 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2225 static unw_rec_list
*
2226 output_priunat_sprel (unsigned int offset
)
2228 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2229 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2233 static unw_rec_list
*
2234 output_bsp_when (void)
2236 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2240 static unw_rec_list
*
2241 output_bsp_gr (unsigned int gr
)
2243 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2244 ptr
->r
.record
.p
.r
.gr
= gr
;
2248 static unw_rec_list
*
2249 output_bsp_psprel (unsigned int offset
)
2251 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2252 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2256 static unw_rec_list
*
2257 output_bsp_sprel (unsigned int offset
)
2259 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2260 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2264 static unw_rec_list
*
2265 output_bspstore_when (void)
2267 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2271 static unw_rec_list
*
2272 output_bspstore_gr (unsigned int gr
)
2274 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2275 ptr
->r
.record
.p
.r
.gr
= gr
;
2279 static unw_rec_list
*
2280 output_bspstore_psprel (unsigned int offset
)
2282 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2283 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2287 static unw_rec_list
*
2288 output_bspstore_sprel (unsigned int offset
)
2290 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2291 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2295 static unw_rec_list
*
2296 output_rnat_when (void)
2298 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2302 static unw_rec_list
*
2303 output_rnat_gr (unsigned int gr
)
2305 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2306 ptr
->r
.record
.p
.r
.gr
= gr
;
2310 static unw_rec_list
*
2311 output_rnat_psprel (unsigned int offset
)
2313 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2314 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2318 static unw_rec_list
*
2319 output_rnat_sprel (unsigned int offset
)
2321 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2322 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2326 static unw_rec_list
*
2327 output_unwabi (unsigned long abi
, unsigned long context
)
2329 unw_rec_list
*ptr
= alloc_record (unwabi
);
2330 ptr
->r
.record
.p
.abi
= abi
;
2331 ptr
->r
.record
.p
.context
= context
;
2335 static unw_rec_list
*
2336 output_epilogue (unsigned long ecount
)
2338 unw_rec_list
*ptr
= alloc_record (epilogue
);
2339 ptr
->r
.record
.b
.ecount
= ecount
;
2343 static unw_rec_list
*
2344 output_label_state (unsigned long label
)
2346 unw_rec_list
*ptr
= alloc_record (label_state
);
2347 ptr
->r
.record
.b
.label
= label
;
2351 static unw_rec_list
*
2352 output_copy_state (unsigned long label
)
2354 unw_rec_list
*ptr
= alloc_record (copy_state
);
2355 ptr
->r
.record
.b
.label
= label
;
2359 static unw_rec_list
*
2360 output_spill_psprel (unsigned int ab
,
2362 unsigned int offset
,
2363 unsigned int predicate
)
2365 unw_rec_list
*ptr
= alloc_record (predicate
? spill_psprel_p
: spill_psprel
);
2366 ptr
->r
.record
.x
.ab
= ab
;
2367 ptr
->r
.record
.x
.reg
= reg
;
2368 ptr
->r
.record
.x
.where
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2369 ptr
->r
.record
.x
.qp
= predicate
;
2373 static unw_rec_list
*
2374 output_spill_sprel (unsigned int ab
,
2376 unsigned int offset
,
2377 unsigned int predicate
)
2379 unw_rec_list
*ptr
= alloc_record (predicate
? spill_sprel_p
: spill_sprel
);
2380 ptr
->r
.record
.x
.ab
= ab
;
2381 ptr
->r
.record
.x
.reg
= reg
;
2382 ptr
->r
.record
.x
.where
.spoff
= offset
/ 4;
2383 ptr
->r
.record
.x
.qp
= predicate
;
2387 static unw_rec_list
*
2388 output_spill_reg (unsigned int ab
,
2390 unsigned int targ_reg
,
2392 unsigned int predicate
)
2394 unw_rec_list
*ptr
= alloc_record (predicate
? spill_reg_p
: spill_reg
);
2395 ptr
->r
.record
.x
.ab
= ab
;
2396 ptr
->r
.record
.x
.reg
= reg
;
2397 ptr
->r
.record
.x
.where
.reg
= targ_reg
;
2398 ptr
->r
.record
.x
.xy
= xy
;
2399 ptr
->r
.record
.x
.qp
= predicate
;
2403 /* Given a unw_rec_list process the correct format with the
2404 specified function. */
2407 process_one_record (unw_rec_list
*ptr
, vbyte_func f
)
2409 unsigned int fr_mask
, gr_mask
;
2411 switch (ptr
->r
.type
)
2413 /* This is a dummy record that takes up no space in the output. */
2421 /* These are taken care of by prologue/prologue_gr. */
2426 if (ptr
->r
.type
== prologue_gr
)
2427 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2428 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2430 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2432 /* Output descriptor(s) for union of register spills (if any). */
2433 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2434 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2437 if ((fr_mask
& ~0xfUL
) == 0)
2438 output_P6_format (f
, fr_mem
, fr_mask
);
2441 output_P5_format (f
, gr_mask
, fr_mask
);
2446 output_P6_format (f
, gr_mem
, gr_mask
);
2447 if (ptr
->r
.record
.r
.mask
.br_mem
)
2448 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2450 /* output imask descriptor if necessary: */
2451 if (ptr
->r
.record
.r
.mask
.i
)
2452 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2453 ptr
->r
.record
.r
.imask_size
);
2457 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2461 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2462 ptr
->r
.record
.p
.size
);
2475 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.r
.gr
);
2478 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.r
.br
);
2481 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.off
.sp
, 0);
2489 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2498 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
, 0);
2508 case bspstore_sprel
:
2510 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.sp
);
2513 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2515 const unw_rec_list
*cur
= ptr
;
2517 gr_mask
= cur
->r
.record
.p
.grmask
;
2518 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2519 gr_mask
|= cur
->r
.record
.p
.grmask
;
2520 output_P9_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2524 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2526 const unw_rec_list
*cur
= ptr
;
2528 gr_mask
= cur
->r
.record
.p
.brmask
;
2529 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2530 gr_mask
|= cur
->r
.record
.p
.brmask
;
2531 output_P2_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2535 as_bad (_("spill_mask record unimplemented."));
2537 case priunat_when_gr
:
2538 case priunat_when_mem
:
2542 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2544 case priunat_psprel
:
2546 case bspstore_psprel
:
2548 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
);
2551 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2554 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2558 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2561 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2562 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2563 ptr
->r
.record
.x
.where
.pspoff
);
2566 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2567 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2568 ptr
->r
.record
.x
.where
.spoff
);
2571 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2572 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2573 ptr
->r
.record
.x
.where
.reg
, ptr
->r
.record
.x
.t
);
2575 case spill_psprel_p
:
2576 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2577 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2578 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.pspoff
);
2581 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2582 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2583 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.spoff
);
2586 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2587 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2588 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.where
.reg
,
2592 as_bad (_("record_type_not_valid"));
2597 /* Given a unw_rec_list list, process all the records with
2598 the specified function. */
2600 process_unw_records (unw_rec_list
*list
, vbyte_func f
)
2603 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2604 process_one_record (ptr
, f
);
2607 /* Determine the size of a record list in bytes. */
2609 calc_record_size (unw_rec_list
*list
)
2612 process_unw_records (list
, count_output
);
2616 /* Return the number of bits set in the input value.
2617 Perhaps this has a better place... */
2618 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2619 # define popcount __builtin_popcount
2622 popcount (unsigned x
)
2624 static const unsigned char popcnt
[16] =
2632 if (x
< NELEMS (popcnt
))
2634 return popcnt
[x
% NELEMS (popcnt
)] + popcount (x
/ NELEMS (popcnt
));
2638 /* Update IMASK bitmask to reflect the fact that one or more registers
2639 of type TYPE are saved starting at instruction with index T. If N
2640 bits are set in REGMASK, it is assumed that instructions T through
2641 T+N-1 save these registers.
2645 1: instruction saves next fp reg
2646 2: instruction saves next general reg
2647 3: instruction saves next branch reg */
2649 set_imask (unw_rec_list
*region
,
2650 unsigned long regmask
,
2654 unsigned char *imask
;
2655 unsigned long imask_size
;
2659 imask
= region
->r
.record
.r
.mask
.i
;
2660 imask_size
= region
->r
.record
.r
.imask_size
;
2663 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2664 imask
= xmalloc (imask_size
);
2665 memset (imask
, 0, imask_size
);
2667 region
->r
.record
.r
.imask_size
= imask_size
;
2668 region
->r
.record
.r
.mask
.i
= imask
;
2672 pos
= 2 * (3 - t
% 4);
2675 if (i
>= imask_size
)
2677 as_bad (_("Ignoring attempt to spill beyond end of region"));
2681 imask
[i
] |= (type
& 0x3) << pos
;
2683 regmask
&= (regmask
- 1);
2693 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2694 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2695 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2698 static unsigned long
2699 slot_index (unsigned long slot_addr
,
2701 unsigned long first_addr
,
2705 unsigned long s_index
= 0;
2707 /* First time we are called, the initial address and frag are invalid. */
2708 if (first_addr
== 0)
2711 /* If the two addresses are in different frags, then we need to add in
2712 the remaining size of this frag, and then the entire size of intermediate
2714 while (slot_frag
!= first_frag
)
2716 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2720 /* We can get the final addresses only during and after
2722 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2723 s_index
+= 3 * ((first_frag
->fr_next
->fr_address
2724 - first_frag
->fr_address
2725 - first_frag
->fr_fix
) >> 4);
2728 /* We don't know what the final addresses will be. We try our
2729 best to estimate. */
2730 switch (first_frag
->fr_type
)
2736 as_fatal (_("Only constant space allocation is supported"));
2742 /* Take alignment into account. Assume the worst case
2743 before relaxation. */
2744 s_index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2748 if (first_frag
->fr_symbol
)
2750 as_fatal (_("Only constant offsets are supported"));
2754 s_index
+= 3 * (first_frag
->fr_offset
>> 4);
2758 /* Add in the full size of the frag converted to instruction slots. */
2759 s_index
+= 3 * (first_frag
->fr_fix
>> 4);
2760 /* Subtract away the initial part before first_addr. */
2761 s_index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2762 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2764 /* Move to the beginning of the next frag. */
2765 first_frag
= first_frag
->fr_next
;
2766 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2768 /* This can happen if there is section switching in the middle of a
2769 function, causing the frag chain for the function to be broken.
2770 It is too difficult to recover safely from this problem, so we just
2771 exit with an error. */
2772 if (first_frag
== NULL
)
2773 as_fatal (_("Section switching in code is not supported."));
2776 /* Add in the used part of the last frag. */
2777 s_index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2778 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2782 /* Optimize unwind record directives. */
2784 static unw_rec_list
*
2785 optimize_unw_records (unw_rec_list
*list
)
2790 /* If the only unwind record is ".prologue" or ".prologue" followed
2791 by ".body", then we can optimize the unwind directives away. */
2792 if (list
->r
.type
== prologue
2793 && (list
->next
->r
.type
== endp
2794 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2800 /* Given a complete record list, process any records which have
2801 unresolved fields, (ie length counts for a prologue). After
2802 this has been run, all necessary information should be available
2803 within each record to generate an image. */
2806 fixup_unw_records (unw_rec_list
*list
, int before_relax
)
2808 unw_rec_list
*ptr
, *region
= 0;
2809 unsigned long first_addr
= 0, rlen
= 0, t
;
2810 fragS
*first_frag
= 0;
2812 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2814 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2815 as_bad (_(" Insn slot not set in unwind record."));
2816 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2817 first_addr
, first_frag
, before_relax
);
2818 switch (ptr
->r
.type
)
2826 unsigned long last_addr
= 0;
2827 fragS
*last_frag
= NULL
;
2829 first_addr
= ptr
->slot_number
;
2830 first_frag
= ptr
->slot_frag
;
2831 /* Find either the next body/prologue start, or the end of
2832 the function, and determine the size of the region. */
2833 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2834 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2835 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2837 last_addr
= last
->slot_number
;
2838 last_frag
= last
->slot_frag
;
2841 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2843 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2844 if (ptr
->r
.type
== body
)
2845 /* End of region. */
2853 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2855 /* This happens when a memory-stack-less procedure uses a
2856 ".restore sp" directive at the end of a region to pop
2858 ptr
->r
.record
.b
.t
= 0;
2869 case priunat_when_gr
:
2870 case priunat_when_mem
:
2874 ptr
->r
.record
.p
.t
= t
;
2882 case spill_psprel_p
:
2883 ptr
->r
.record
.x
.t
= t
;
2889 as_bad (_("frgr_mem record before region record!"));
2892 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2893 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2894 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2895 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2900 as_bad (_("fr_mem record before region record!"));
2903 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2904 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2909 as_bad (_("gr_mem record before region record!"));
2912 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2913 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2918 as_bad (_("br_mem record before region record!"));
2921 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2922 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2928 as_bad (_("gr_gr record before region record!"));
2931 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2936 as_bad (_("br_gr record before region record!"));
2939 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2948 /* Estimate the size of a frag before relaxing. We only have one type of frag
2949 to handle here, which is the unwind info frag. */
2952 ia64_estimate_size_before_relax (fragS
*frag
,
2953 asection
*segtype ATTRIBUTE_UNUSED
)
2958 /* ??? This code is identical to the first part of ia64_convert_frag. */
2959 list
= (unw_rec_list
*) frag
->fr_opcode
;
2960 fixup_unw_records (list
, 0);
2962 len
= calc_record_size (list
);
2963 /* pad to pointer-size boundary. */
2964 pad
= len
% md
.pointer_size
;
2966 len
+= md
.pointer_size
- pad
;
2967 /* Add 8 for the header. */
2969 /* Add a pointer for the personality offset. */
2970 if (frag
->fr_offset
)
2971 size
+= md
.pointer_size
;
2973 /* fr_var carries the max_chars that we created the fragment with.
2974 We must, of course, have allocated enough memory earlier. */
2975 gas_assert (frag
->fr_var
>= size
);
2977 return frag
->fr_fix
+ size
;
2980 /* This function converts a rs_machine_dependent variant frag into a
2981 normal fill frag with the unwind image from the the record list. */
2983 ia64_convert_frag (fragS
*frag
)
2989 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2990 list
= (unw_rec_list
*) frag
->fr_opcode
;
2991 fixup_unw_records (list
, 0);
2993 len
= calc_record_size (list
);
2994 /* pad to pointer-size boundary. */
2995 pad
= len
% md
.pointer_size
;
2997 len
+= md
.pointer_size
- pad
;
2998 /* Add 8 for the header. */
3000 /* Add a pointer for the personality offset. */
3001 if (frag
->fr_offset
)
3002 size
+= md
.pointer_size
;
3004 /* fr_var carries the max_chars that we created the fragment with.
3005 We must, of course, have allocated enough memory earlier. */
3006 gas_assert (frag
->fr_var
>= size
);
3008 /* Initialize the header area. fr_offset is initialized with
3009 unwind.personality_routine. */
3010 if (frag
->fr_offset
)
3012 if (md
.flags
& EF_IA_64_ABI64
)
3013 flag_value
= (bfd_vma
) 3 << 32;
3015 /* 32-bit unwind info block. */
3016 flag_value
= (bfd_vma
) 0x1003 << 32;
3021 md_number_to_chars (frag
->fr_literal
,
3022 (((bfd_vma
) 1 << 48) /* Version. */
3023 | flag_value
/* U & E handler flags. */
3024 | (len
/ md
.pointer_size
)), /* Length. */
3027 /* Skip the header. */
3028 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
3029 process_unw_records (list
, output_vbyte_mem
);
3031 /* Fill the padding bytes with zeros. */
3033 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
3034 md
.pointer_size
- pad
);
3035 /* Fill the unwind personality with zeros. */
3036 if (frag
->fr_offset
)
3037 md_number_to_chars (frag
->fr_literal
+ size
- md
.pointer_size
, 0,
3040 frag
->fr_fix
+= size
;
3041 frag
->fr_type
= rs_fill
;
3043 frag
->fr_offset
= 0;
3047 parse_predicate_and_operand (expressionS
*e
, unsigned *qp
, const char *po
)
3049 int sep
= parse_operand_and_eval (e
, ',');
3051 *qp
= e
->X_add_number
- REG_P
;
3052 if (e
->X_op
!= O_register
|| *qp
> 63)
3054 as_bad (_("First operand to .%s must be a predicate"), po
);
3058 as_warn (_("Pointless use of p0 as first operand to .%s"), po
);
3060 sep
= parse_operand_and_eval (e
, ',');
3067 convert_expr_to_ab_reg (const expressionS
*e
,
3073 unsigned int reg
= e
->X_add_number
;
3075 *ab
= *regp
= 0; /* Anything valid is good here. */
3077 if (e
->X_op
!= O_register
)
3078 reg
= REG_GR
; /* Anything invalid is good here. */
3080 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
3083 *regp
= reg
- REG_GR
;
3085 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
3086 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
3089 *regp
= reg
- REG_FR
;
3091 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3094 *regp
= reg
- REG_BR
;
3101 case REG_PR
: *regp
= 0; break;
3102 case REG_PSP
: *regp
= 1; break;
3103 case REG_PRIUNAT
: *regp
= 2; break;
3104 case REG_BR
+ 0: *regp
= 3; break;
3105 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3106 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3107 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3108 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3109 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3110 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3111 case REG_AR
+ AR_LC
: *regp
= 10; break;
3114 as_bad (_("Operand %d to .%s must be a preserved register"), n
, po
);
3121 convert_expr_to_xy_reg (const expressionS
*e
,
3127 unsigned int reg
= e
->X_add_number
;
3129 *xy
= *regp
= 0; /* Anything valid is good here. */
3131 if (e
->X_op
!= O_register
)
3132 reg
= REG_GR
; /* Anything invalid is good here. */
3134 if (reg
>= (REG_GR
+ 1) && reg
<= (REG_GR
+ 127))
3137 *regp
= reg
- REG_GR
;
3139 else if (reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 127))
3142 *regp
= reg
- REG_FR
;
3144 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3147 *regp
= reg
- REG_BR
;
3150 as_bad (_("Operand %d to .%s must be a writable register"), n
, po
);
3156 /* The current frag is an alignment frag. */
3157 align_frag
= frag_now
;
3158 s_align_bytes (arg
);
3162 dot_radix (int dummy ATTRIBUTE_UNUSED
)
3169 if (is_it_end_of_statement ())
3171 radix
= input_line_pointer
;
3172 ch
= get_symbol_end ();
3173 ia64_canonicalize_symbol_name (radix
);
3174 if (strcasecmp (radix
, "C"))
3175 as_bad (_("Radix `%s' unsupported or invalid"), radix
);
3176 *input_line_pointer
= ch
;
3177 demand_empty_rest_of_line ();
3180 /* Helper function for .loc directives. If the assembler is not generating
3181 line number info, then we need to remember which instructions have a .loc
3182 directive, and only call dwarf2_gen_line_info for those instructions. */
3187 CURR_SLOT
.loc_directive_seen
= 1;
3188 dwarf2_directive_loc (x
);
3191 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3193 dot_special_section (int which
)
3195 set_section ((char *) special_section_name
[which
]);
3198 /* Return -1 for warning and 0 for error. */
3201 unwind_diagnostic (const char * region
, const char *directive
)
3203 if (md
.unwind_check
== unwind_check_warning
)
3205 as_warn (_(".%s outside of %s"), directive
, region
);
3210 as_bad (_(".%s outside of %s"), directive
, region
);
3211 ignore_rest_of_line ();
3216 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3217 a procedure but the unwind directive check is set to warning, 0 if
3218 a directive isn't in a procedure and the unwind directive check is set
3222 in_procedure (const char *directive
)
3224 if (unwind
.proc_pending
.sym
3225 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3227 return unwind_diagnostic ("procedure", directive
);
3230 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3231 a prologue but the unwind directive check is set to warning, 0 if
3232 a directive isn't in a prologue and the unwind directive check is set
3236 in_prologue (const char *directive
)
3238 int in
= in_procedure (directive
);
3240 if (in
> 0 && !unwind
.prologue
)
3241 in
= unwind_diagnostic ("prologue", directive
);
3242 check_pending_save ();
3246 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3247 a body but the unwind directive check is set to warning, 0 if
3248 a directive isn't in a body and the unwind directive check is set
3252 in_body (const char *directive
)
3254 int in
= in_procedure (directive
);
3256 if (in
> 0 && !unwind
.body
)
3257 in
= unwind_diagnostic ("body region", directive
);
3262 add_unwind_entry (unw_rec_list
*ptr
, int sep
)
3267 unwind
.tail
->next
= ptr
;
3272 /* The current entry can in fact be a chain of unwind entries. */
3273 if (unwind
.current_entry
== NULL
)
3274 unwind
.current_entry
= ptr
;
3277 /* The current entry can in fact be a chain of unwind entries. */
3278 if (unwind
.current_entry
== NULL
)
3279 unwind
.current_entry
= ptr
;
3283 /* Parse a tag permitted for the current directive. */
3287 ch
= get_symbol_end ();
3288 /* FIXME: For now, just issue a warning that this isn't implemented. */
3295 as_warn (_("Tags on unwind pseudo-ops aren't supported, yet"));
3298 *input_line_pointer
= ch
;
3300 if (sep
!= NOT_A_CHAR
)
3301 demand_empty_rest_of_line ();
3305 dot_fframe (int dummy ATTRIBUTE_UNUSED
)
3310 if (!in_prologue ("fframe"))
3313 sep
= parse_operand_and_eval (&e
, ',');
3315 if (e
.X_op
!= O_constant
)
3317 as_bad (_("First operand to .fframe must be a constant"));
3320 add_unwind_entry (output_mem_stack_f (e
.X_add_number
), sep
);
3324 dot_vframe (int dummy ATTRIBUTE_UNUSED
)
3330 if (!in_prologue ("vframe"))
3333 sep
= parse_operand_and_eval (&e
, ',');
3334 reg
= e
.X_add_number
- REG_GR
;
3335 if (e
.X_op
!= O_register
|| reg
> 127)
3337 as_bad (_("First operand to .vframe must be a general register"));
3340 add_unwind_entry (output_mem_stack_v (), sep
);
3341 if (! (unwind
.prologue_mask
& 2))
3342 add_unwind_entry (output_psp_gr (reg
), NOT_A_CHAR
);
3343 else if (reg
!= unwind
.prologue_gr
3344 + (unsigned) popcount (unwind
.prologue_mask
& (-2 << 1)))
3345 as_warn (_("Operand of .vframe contradicts .prologue"));
3349 dot_vframesp (int psp
)
3355 as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant"));
3357 if (!in_prologue ("vframesp"))
3360 sep
= parse_operand_and_eval (&e
, ',');
3361 if (e
.X_op
!= O_constant
)
3363 as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)"));
3366 add_unwind_entry (output_mem_stack_v (), sep
);
3367 add_unwind_entry (output_psp_sprel (e
.X_add_number
), NOT_A_CHAR
);
3371 dot_save (int dummy ATTRIBUTE_UNUSED
)
3374 unsigned reg1
, reg2
;
3377 if (!in_prologue ("save"))
3380 sep
= parse_operand_and_eval (&e1
, ',');
3382 sep
= parse_operand_and_eval (&e2
, ',');
3386 reg1
= e1
.X_add_number
;
3387 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3388 if (e1
.X_op
!= O_register
)
3390 as_bad (_("First operand to .save not a register"));
3391 reg1
= REG_PR
; /* Anything valid is good here. */
3393 reg2
= e2
.X_add_number
- REG_GR
;
3394 if (e2
.X_op
!= O_register
|| reg2
> 127)
3396 as_bad (_("Second operand to .save not a valid register"));
3401 case REG_AR
+ AR_BSP
:
3402 add_unwind_entry (output_bsp_when (), sep
);
3403 add_unwind_entry (output_bsp_gr (reg2
), NOT_A_CHAR
);
3405 case REG_AR
+ AR_BSPSTORE
:
3406 add_unwind_entry (output_bspstore_when (), sep
);
3407 add_unwind_entry (output_bspstore_gr (reg2
), NOT_A_CHAR
);
3409 case REG_AR
+ AR_RNAT
:
3410 add_unwind_entry (output_rnat_when (), sep
);
3411 add_unwind_entry (output_rnat_gr (reg2
), NOT_A_CHAR
);
3413 case REG_AR
+ AR_UNAT
:
3414 add_unwind_entry (output_unat_when (), sep
);
3415 add_unwind_entry (output_unat_gr (reg2
), NOT_A_CHAR
);
3417 case REG_AR
+ AR_FPSR
:
3418 add_unwind_entry (output_fpsr_when (), sep
);
3419 add_unwind_entry (output_fpsr_gr (reg2
), NOT_A_CHAR
);
3421 case REG_AR
+ AR_PFS
:
3422 add_unwind_entry (output_pfs_when (), sep
);
3423 if (! (unwind
.prologue_mask
& 4))
3424 add_unwind_entry (output_pfs_gr (reg2
), NOT_A_CHAR
);
3425 else if (reg2
!= unwind
.prologue_gr
3426 + (unsigned) popcount (unwind
.prologue_mask
& (-4 << 1)))
3427 as_warn (_("Second operand of .save contradicts .prologue"));
3429 case REG_AR
+ AR_LC
:
3430 add_unwind_entry (output_lc_when (), sep
);
3431 add_unwind_entry (output_lc_gr (reg2
), NOT_A_CHAR
);
3434 add_unwind_entry (output_rp_when (), sep
);
3435 if (! (unwind
.prologue_mask
& 8))
3436 add_unwind_entry (output_rp_gr (reg2
), NOT_A_CHAR
);
3437 else if (reg2
!= unwind
.prologue_gr
)
3438 as_warn (_("Second operand of .save contradicts .prologue"));
3441 add_unwind_entry (output_preds_when (), sep
);
3442 if (! (unwind
.prologue_mask
& 1))
3443 add_unwind_entry (output_preds_gr (reg2
), NOT_A_CHAR
);
3444 else if (reg2
!= unwind
.prologue_gr
3445 + (unsigned) popcount (unwind
.prologue_mask
& (-1 << 1)))
3446 as_warn (_("Second operand of .save contradicts .prologue"));
3449 add_unwind_entry (output_priunat_when_gr (), sep
);
3450 add_unwind_entry (output_priunat_gr (reg2
), NOT_A_CHAR
);
3453 as_bad (_("First operand to .save not a valid register"));
3454 add_unwind_entry (NULL
, sep
);
3460 dot_restore (int dummy ATTRIBUTE_UNUSED
)
3463 unsigned long ecount
; /* # of _additional_ regions to pop */
3466 if (!in_body ("restore"))
3469 sep
= parse_operand_and_eval (&e1
, ',');
3470 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3471 as_bad (_("First operand to .restore must be stack pointer (sp)"));
3477 sep
= parse_operand_and_eval (&e2
, ',');
3478 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3480 as_bad (_("Second operand to .restore must be a constant >= 0"));
3481 e2
.X_add_number
= 0;
3483 ecount
= e2
.X_add_number
;
3486 ecount
= unwind
.prologue_count
- 1;
3488 if (ecount
>= unwind
.prologue_count
)
3490 as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"),
3491 ecount
+ 1, unwind
.prologue_count
);
3495 add_unwind_entry (output_epilogue (ecount
), sep
);
3497 if (ecount
< unwind
.prologue_count
)
3498 unwind
.prologue_count
-= ecount
+ 1;
3500 unwind
.prologue_count
= 0;
3504 dot_restorereg (int pred
)
3506 unsigned int qp
, ab
, reg
;
3509 const char * const po
= pred
? "restorereg.p" : "restorereg";
3511 if (!in_procedure (po
))
3515 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3518 sep
= parse_operand_and_eval (&e
, ',');
3521 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3523 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0, qp
), sep
);
3526 static char *special_linkonce_name
[] =
3528 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3532 start_unwind_section (const segT text_seg
, int sec_index
)
3535 Use a slightly ugly scheme to derive the unwind section names from
3536 the text section name:
3538 text sect. unwind table sect.
3539 name: name: comments:
3540 ---------- ----------------- --------------------------------
3542 .text.foo .IA_64.unwind.text.foo
3543 .foo .IA_64.unwind.foo
3545 .gnu.linkonce.ia64unw.foo
3546 _info .IA_64.unwind_info gas issues error message (ditto)
3547 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3549 This mapping is done so that:
3551 (a) An object file with unwind info only in .text will use
3552 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3553 This follows the letter of the ABI and also ensures backwards
3554 compatibility with older toolchains.
3556 (b) An object file with unwind info in multiple text sections
3557 will use separate unwind sections for each text section.
3558 This allows us to properly set the "sh_info" and "sh_link"
3559 fields in SHT_IA_64_UNWIND as required by the ABI and also
3560 lets GNU ld support programs with multiple segments
3561 containing unwind info (as might be the case for certain
3562 embedded applications).
3564 (c) An error is issued if there would be a name clash.
3567 const char *text_name
, *sec_text_name
;
3569 const char *prefix
= special_section_name
[sec_index
];
3571 size_t prefix_len
, suffix_len
, sec_name_len
;
3573 sec_text_name
= segment_name (text_seg
);
3574 text_name
= sec_text_name
;
3575 if (strncmp (text_name
, "_info", 5) == 0)
3577 as_bad (_("Illegal section name `%s' (causes unwind section name clash)"),
3579 ignore_rest_of_line ();
3582 if (strcmp (text_name
, ".text") == 0)
3585 /* Build the unwind section name by appending the (possibly stripped)
3586 text section name to the unwind prefix. */
3588 if (strncmp (text_name
, ".gnu.linkonce.t.",
3589 sizeof (".gnu.linkonce.t.") - 1) == 0)
3591 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3592 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3595 prefix_len
= strlen (prefix
);
3596 suffix_len
= strlen (suffix
);
3597 sec_name_len
= prefix_len
+ suffix_len
;
3598 sec_name
= alloca (sec_name_len
+ 1);
3599 memcpy (sec_name
, prefix
, prefix_len
);
3600 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3601 sec_name
[sec_name_len
] = '\0';
3603 /* Handle COMDAT group. */
3604 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3605 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3608 size_t len
, group_name_len
;
3609 const char *group_name
= elf_group_name (text_seg
);
3611 if (group_name
== NULL
)
3613 as_bad (_("Group section `%s' has no group signature"),
3615 ignore_rest_of_line ();
3618 /* We have to construct a fake section directive. */
3619 group_name_len
= strlen (group_name
);
3621 + 16 /* ,"aG",@progbits, */
3622 + group_name_len
/* ,group_name */
3625 section
= alloca (len
+ 1);
3626 memcpy (section
, sec_name
, sec_name_len
);
3627 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3628 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3629 memcpy (section
+ len
- 7, ",comdat", 7);
3630 section
[len
] = '\0';
3631 set_section (section
);
3635 set_section (sec_name
);
3636 bfd_set_section_flags (stdoutput
, now_seg
,
3637 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3640 elf_linked_to_section (now_seg
) = text_seg
;
3644 generate_unwind_image (const segT text_seg
)
3649 /* Mark the end of the unwind info, so that we can compute the size of the
3650 last unwind region. */
3651 add_unwind_entry (output_endp (), NOT_A_CHAR
);
3653 /* Force out pending instructions, to make sure all unwind records have
3654 a valid slot_number field. */
3655 ia64_flush_insns ();
3657 /* Generate the unwind record. */
3658 list
= optimize_unw_records (unwind
.list
);
3659 fixup_unw_records (list
, 1);
3660 size
= calc_record_size (list
);
3662 if (size
> 0 || unwind
.force_unwind_entry
)
3664 unwind
.force_unwind_entry
= 0;
3665 /* pad to pointer-size boundary. */
3666 pad
= size
% md
.pointer_size
;
3668 size
+= md
.pointer_size
- pad
;
3669 /* Add 8 for the header. */
3671 /* Add a pointer for the personality offset. */
3672 if (unwind
.personality_routine
)
3673 size
+= md
.pointer_size
;
3676 /* If there are unwind records, switch sections, and output the info. */
3680 bfd_reloc_code_real_type reloc
;
3682 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3684 /* Make sure the section has 4 byte alignment for ILP32 and
3685 8 byte alignment for LP64. */
3686 frag_align (md
.pointer_size_shift
, 0, 0);
3687 record_alignment (now_seg
, md
.pointer_size_shift
);
3689 /* Set expression which points to start of unwind descriptor area. */
3690 unwind
.info
= expr_build_dot ();
3692 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3693 (offsetT
) (long) unwind
.personality_routine
,
3696 /* Add the personality address to the image. */
3697 if (unwind
.personality_routine
!= 0)
3699 exp
.X_op
= O_symbol
;
3700 exp
.X_add_symbol
= unwind
.personality_routine
;
3701 exp
.X_add_number
= 0;
3703 if (md
.flags
& EF_IA_64_BE
)
3705 if (md
.flags
& EF_IA_64_ABI64
)
3706 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3708 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3712 if (md
.flags
& EF_IA_64_ABI64
)
3713 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3715 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3718 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3719 md
.pointer_size
, &exp
, 0, reloc
);
3720 unwind
.personality_routine
= 0;
3724 free_saved_prologue_counts ();
3725 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3729 dot_handlerdata (int dummy ATTRIBUTE_UNUSED
)
3731 if (!in_procedure ("handlerdata"))
3733 unwind
.force_unwind_entry
= 1;
3735 /* Remember which segment we're in so we can switch back after .endp */
3736 unwind
.saved_text_seg
= now_seg
;
3737 unwind
.saved_text_subseg
= now_subseg
;
3739 /* Generate unwind info into unwind-info section and then leave that
3740 section as the currently active one so dataXX directives go into
3741 the language specific data area of the unwind info block. */
3742 generate_unwind_image (now_seg
);
3743 demand_empty_rest_of_line ();
3747 dot_unwentry (int dummy ATTRIBUTE_UNUSED
)
3749 if (!in_procedure ("unwentry"))
3751 unwind
.force_unwind_entry
= 1;
3752 demand_empty_rest_of_line ();
3756 dot_altrp (int dummy ATTRIBUTE_UNUSED
)
3761 if (!in_prologue ("altrp"))
3764 parse_operand_and_eval (&e
, 0);
3765 reg
= e
.X_add_number
- REG_BR
;
3766 if (e
.X_op
!= O_register
|| reg
> 7)
3768 as_bad (_("First operand to .altrp not a valid branch register"));
3771 add_unwind_entry (output_rp_br (reg
), 0);
3775 dot_savemem (int psprel
)
3780 const char * const po
= psprel
? "savepsp" : "savesp";
3782 if (!in_prologue (po
))
3785 sep
= parse_operand_and_eval (&e1
, ',');
3787 sep
= parse_operand_and_eval (&e2
, ',');
3791 reg1
= e1
.X_add_number
;
3792 val
= e2
.X_add_number
;
3794 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3795 if (e1
.X_op
!= O_register
)
3797 as_bad (_("First operand to .%s not a register"), po
);
3798 reg1
= REG_PR
; /* Anything valid is good here. */
3800 if (e2
.X_op
!= O_constant
)
3802 as_bad (_("Second operand to .%s not a constant"), po
);
3808 case REG_AR
+ AR_BSP
:
3809 add_unwind_entry (output_bsp_when (), sep
);
3810 add_unwind_entry ((psprel
3812 : output_bsp_sprel
) (val
), NOT_A_CHAR
);
3814 case REG_AR
+ AR_BSPSTORE
:
3815 add_unwind_entry (output_bspstore_when (), sep
);
3816 add_unwind_entry ((psprel
3817 ? output_bspstore_psprel
3818 : output_bspstore_sprel
) (val
), NOT_A_CHAR
);
3820 case REG_AR
+ AR_RNAT
:
3821 add_unwind_entry (output_rnat_when (), sep
);
3822 add_unwind_entry ((psprel
3823 ? output_rnat_psprel
3824 : output_rnat_sprel
) (val
), NOT_A_CHAR
);
3826 case REG_AR
+ AR_UNAT
:
3827 add_unwind_entry (output_unat_when (), sep
);
3828 add_unwind_entry ((psprel
3829 ? output_unat_psprel
3830 : output_unat_sprel
) (val
), NOT_A_CHAR
);
3832 case REG_AR
+ AR_FPSR
:
3833 add_unwind_entry (output_fpsr_when (), sep
);
3834 add_unwind_entry ((psprel
3835 ? output_fpsr_psprel
3836 : output_fpsr_sprel
) (val
), NOT_A_CHAR
);
3838 case REG_AR
+ AR_PFS
:
3839 add_unwind_entry (output_pfs_when (), sep
);
3840 add_unwind_entry ((psprel
3842 : output_pfs_sprel
) (val
), NOT_A_CHAR
);
3844 case REG_AR
+ AR_LC
:
3845 add_unwind_entry (output_lc_when (), sep
);
3846 add_unwind_entry ((psprel
3848 : output_lc_sprel
) (val
), NOT_A_CHAR
);
3851 add_unwind_entry (output_rp_when (), sep
);
3852 add_unwind_entry ((psprel
3854 : output_rp_sprel
) (val
), NOT_A_CHAR
);
3857 add_unwind_entry (output_preds_when (), sep
);
3858 add_unwind_entry ((psprel
3859 ? output_preds_psprel
3860 : output_preds_sprel
) (val
), NOT_A_CHAR
);
3863 add_unwind_entry (output_priunat_when_mem (), sep
);
3864 add_unwind_entry ((psprel
3865 ? output_priunat_psprel
3866 : output_priunat_sprel
) (val
), NOT_A_CHAR
);
3869 as_bad (_("First operand to .%s not a valid register"), po
);
3870 add_unwind_entry (NULL
, sep
);
3876 dot_saveg (int dummy ATTRIBUTE_UNUSED
)
3882 if (!in_prologue ("save.g"))
3885 sep
= parse_operand_and_eval (&e
, ',');
3887 grmask
= e
.X_add_number
;
3888 if (e
.X_op
!= O_constant
3889 || e
.X_add_number
<= 0
3890 || e
.X_add_number
> 0xf)
3892 as_bad (_("First operand to .save.g must be a positive 4-bit constant"));
3899 int n
= popcount (grmask
);
3901 parse_operand_and_eval (&e
, 0);
3902 reg
= e
.X_add_number
- REG_GR
;
3903 if (e
.X_op
!= O_register
|| reg
> 127)
3905 as_bad (_("Second operand to .save.g must be a general register"));
3908 else if (reg
> 128U - n
)
3910 as_bad (_("Second operand to .save.g must be the first of %d general registers"), n
);
3913 add_unwind_entry (output_gr_gr (grmask
, reg
), 0);
3916 add_unwind_entry (output_gr_mem (grmask
), 0);
3920 dot_savef (int dummy ATTRIBUTE_UNUSED
)
3924 if (!in_prologue ("save.f"))
3927 parse_operand_and_eval (&e
, 0);
3929 if (e
.X_op
!= O_constant
3930 || e
.X_add_number
<= 0
3931 || e
.X_add_number
> 0xfffff)
3933 as_bad (_("Operand to .save.f must be a positive 20-bit constant"));
3936 add_unwind_entry (output_fr_mem (e
.X_add_number
), 0);
3940 dot_saveb (int dummy ATTRIBUTE_UNUSED
)
3946 if (!in_prologue ("save.b"))
3949 sep
= parse_operand_and_eval (&e
, ',');
3951 brmask
= e
.X_add_number
;
3952 if (e
.X_op
!= O_constant
3953 || e
.X_add_number
<= 0
3954 || e
.X_add_number
> 0x1f)
3956 as_bad (_("First operand to .save.b must be a positive 5-bit constant"));
3963 int n
= popcount (brmask
);
3965 parse_operand_and_eval (&e
, 0);
3966 reg
= e
.X_add_number
- REG_GR
;
3967 if (e
.X_op
!= O_register
|| reg
> 127)
3969 as_bad (_("Second operand to .save.b must be a general register"));
3972 else if (reg
> 128U - n
)
3974 as_bad (_("Second operand to .save.b must be the first of %d general registers"), n
);
3977 add_unwind_entry (output_br_gr (brmask
, reg
), 0);
3980 add_unwind_entry (output_br_mem (brmask
), 0);
3984 dot_savegf (int dummy ATTRIBUTE_UNUSED
)
3988 if (!in_prologue ("save.gf"))
3991 if (parse_operand_and_eval (&e1
, ',') == ',')
3992 parse_operand_and_eval (&e2
, 0);
3996 if (e1
.X_op
!= O_constant
3997 || e1
.X_add_number
< 0
3998 || e1
.X_add_number
> 0xf)
4000 as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant"));
4002 e1
.X_add_number
= 0;
4004 if (e2
.X_op
!= O_constant
4005 || e2
.X_add_number
< 0
4006 || e2
.X_add_number
> 0xfffff)
4008 as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant"));
4010 e2
.X_add_number
= 0;
4012 if (e1
.X_op
== O_constant
4013 && e2
.X_op
== O_constant
4014 && e1
.X_add_number
== 0
4015 && e2
.X_add_number
== 0)
4016 as_bad (_("Operands to .save.gf may not be both zero"));
4018 add_unwind_entry (output_frgr_mem (e1
.X_add_number
, e2
.X_add_number
), 0);
4022 dot_spill (int dummy ATTRIBUTE_UNUSED
)
4026 if (!in_prologue ("spill"))
4029 parse_operand_and_eval (&e
, 0);
4031 if (e
.X_op
!= O_constant
)
4033 as_bad (_("Operand to .spill must be a constant"));
4036 add_unwind_entry (output_spill_base (e
.X_add_number
), 0);
4040 dot_spillreg (int pred
)
4043 unsigned int qp
, ab
, xy
, reg
, treg
;
4045 const char * const po
= pred
? "spillreg.p" : "spillreg";
4047 if (!in_procedure (po
))
4051 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4054 sep
= parse_operand_and_eval (&e
, ',');
4057 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4060 sep
= parse_operand_and_eval (&e
, ',');
4063 convert_expr_to_xy_reg (&e
, &xy
, &treg
, po
, 2 + pred
);
4065 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
, qp
), sep
);
4069 dot_spillmem (int psprel
)
4072 int pred
= (psprel
< 0), sep
;
4073 unsigned int qp
, ab
, reg
;
4079 po
= psprel
? "spillpsp.p" : "spillsp.p";
4082 po
= psprel
? "spillpsp" : "spillsp";
4084 if (!in_procedure (po
))
4088 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4091 sep
= parse_operand_and_eval (&e
, ',');
4094 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4097 sep
= parse_operand_and_eval (&e
, ',');
4100 if (e
.X_op
!= O_constant
)
4102 as_bad (_("Operand %d to .%s must be a constant"), 2 + pred
, po
);
4107 add_unwind_entry (output_spill_psprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4109 add_unwind_entry (output_spill_sprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4113 get_saved_prologue_count (unsigned long lbl
)
4115 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4117 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4121 return lpc
->prologue_count
;
4123 as_bad (_("Missing .label_state %ld"), lbl
);
4128 save_prologue_count (unsigned long lbl
, unsigned int count
)
4130 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4132 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4136 lpc
->prologue_count
= count
;
4139 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4141 new_lpc
->next
= unwind
.saved_prologue_counts
;
4142 new_lpc
->label_number
= lbl
;
4143 new_lpc
->prologue_count
= count
;
4144 unwind
.saved_prologue_counts
= new_lpc
;
4149 free_saved_prologue_counts ()
4151 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4152 label_prologue_count
*next
;
4161 unwind
.saved_prologue_counts
= NULL
;
4165 dot_label_state (int dummy ATTRIBUTE_UNUSED
)
4169 if (!in_body ("label_state"))
4172 parse_operand_and_eval (&e
, 0);
4173 if (e
.X_op
== O_constant
)
4174 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4177 as_bad (_("Operand to .label_state must be a constant"));
4180 add_unwind_entry (output_label_state (e
.X_add_number
), 0);
4184 dot_copy_state (int dummy ATTRIBUTE_UNUSED
)
4188 if (!in_body ("copy_state"))
4191 parse_operand_and_eval (&e
, 0);
4192 if (e
.X_op
== O_constant
)
4193 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4196 as_bad (_("Operand to .copy_state must be a constant"));
4199 add_unwind_entry (output_copy_state (e
.X_add_number
), 0);
4203 dot_unwabi (int dummy ATTRIBUTE_UNUSED
)
4208 if (!in_prologue ("unwabi"))
4211 sep
= parse_operand_and_eval (&e1
, ',');
4213 parse_operand_and_eval (&e2
, 0);
4217 if (e1
.X_op
!= O_constant
)
4219 as_bad (_("First operand to .unwabi must be a constant"));
4220 e1
.X_add_number
= 0;
4223 if (e2
.X_op
!= O_constant
)
4225 as_bad (_("Second operand to .unwabi must be a constant"));
4226 e2
.X_add_number
= 0;
4229 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
), 0);
4233 dot_personality (int dummy ATTRIBUTE_UNUSED
)
4236 if (!in_procedure ("personality"))
4239 name
= input_line_pointer
;
4240 c
= get_symbol_end ();
4241 p
= input_line_pointer
;
4242 unwind
.personality_routine
= symbol_find_or_make (name
);
4243 unwind
.force_unwind_entry
= 1;
4246 demand_empty_rest_of_line ();
4250 dot_proc (int dummy ATTRIBUTE_UNUSED
)
4254 proc_pending
*pending
, *last_pending
;
4256 if (unwind
.proc_pending
.sym
)
4258 (md
.unwind_check
== unwind_check_warning
4260 : as_bad
) (_("Missing .endp after previous .proc"));
4261 while (unwind
.proc_pending
.next
)
4263 pending
= unwind
.proc_pending
.next
;
4264 unwind
.proc_pending
.next
= pending
->next
;
4268 last_pending
= NULL
;
4270 /* Parse names of main and alternate entry points and mark them as
4271 function symbols: */
4275 name
= input_line_pointer
;
4276 c
= get_symbol_end ();
4277 p
= input_line_pointer
;
4279 as_bad (_("Empty argument of .proc"));
4282 sym
= symbol_find_or_make (name
);
4283 if (S_IS_DEFINED (sym
))
4284 as_bad (_("`%s' was already defined"), name
);
4285 else if (!last_pending
)
4287 unwind
.proc_pending
.sym
= sym
;
4288 last_pending
= &unwind
.proc_pending
;
4292 pending
= xmalloc (sizeof (*pending
));
4294 last_pending
= last_pending
->next
= pending
;
4296 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4300 if (*input_line_pointer
!= ',')
4302 ++input_line_pointer
;
4306 unwind
.proc_pending
.sym
= expr_build_dot ();
4307 last_pending
= &unwind
.proc_pending
;
4309 last_pending
->next
= NULL
;
4310 demand_empty_rest_of_line ();
4313 unwind
.prologue
= 0;
4314 unwind
.prologue_count
= 0;
4317 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4318 unwind
.personality_routine
= 0;
4322 dot_body (int dummy ATTRIBUTE_UNUSED
)
4324 if (!in_procedure ("body"))
4326 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4327 as_warn (_("Initial .body should precede any instructions"));
4328 check_pending_save ();
4330 unwind
.prologue
= 0;
4331 unwind
.prologue_mask
= 0;
4334 add_unwind_entry (output_body (), 0);
4338 dot_prologue (int dummy ATTRIBUTE_UNUSED
)
4340 unsigned mask
= 0, grsave
= 0;
4342 if (!in_procedure ("prologue"))
4344 if (unwind
.prologue
)
4346 as_bad (_(".prologue within prologue"));
4347 ignore_rest_of_line ();
4350 if (!unwind
.body
&& unwind
.insn
)
4351 as_warn (_("Initial .prologue should precede any instructions"));
4353 if (!is_it_end_of_statement ())
4356 int n
, sep
= parse_operand_and_eval (&e
, ',');
4358 if (e
.X_op
!= O_constant
4359 || e
.X_add_number
< 0
4360 || e
.X_add_number
> 0xf)
4361 as_bad (_("First operand to .prologue must be a positive 4-bit constant"));
4362 else if (e
.X_add_number
== 0)
4363 as_warn (_("Pointless use of zero first operand to .prologue"));
4365 mask
= e
.X_add_number
;
4366 n
= popcount (mask
);
4369 parse_operand_and_eval (&e
, 0);
4372 if (e
.X_op
== O_constant
4373 && e
.X_add_number
>= 0
4374 && e
.X_add_number
< 128)
4376 if (md
.unwind_check
== unwind_check_error
)
4377 as_warn (_("Using a constant as second operand to .prologue is deprecated"));
4378 grsave
= e
.X_add_number
;
4380 else if (e
.X_op
!= O_register
4381 || (grsave
= e
.X_add_number
- REG_GR
) > 127)
4383 as_bad (_("Second operand to .prologue must be a general register"));
4386 else if (grsave
> 128U - n
)
4388 as_bad (_("Second operand to .prologue must be the first of %d general registers"), n
);
4395 add_unwind_entry (output_prologue_gr (mask
, grsave
), 0);
4397 add_unwind_entry (output_prologue (), 0);
4399 unwind
.prologue
= 1;
4400 unwind
.prologue_mask
= mask
;
4401 unwind
.prologue_gr
= grsave
;
4403 ++unwind
.prologue_count
;
4407 dot_endp (int dummy ATTRIBUTE_UNUSED
)
4410 int bytes_per_address
;
4413 subsegT saved_subseg
;
4414 proc_pending
*pending
;
4415 int unwind_check
= md
.unwind_check
;
4417 md
.unwind_check
= unwind_check_error
;
4418 if (!in_procedure ("endp"))
4420 md
.unwind_check
= unwind_check
;
4422 if (unwind
.saved_text_seg
)
4424 saved_seg
= unwind
.saved_text_seg
;
4425 saved_subseg
= unwind
.saved_text_subseg
;
4426 unwind
.saved_text_seg
= NULL
;
4430 saved_seg
= now_seg
;
4431 saved_subseg
= now_subseg
;
4434 insn_group_break (1, 0, 0);
4436 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4438 generate_unwind_image (saved_seg
);
4440 if (unwind
.info
|| unwind
.force_unwind_entry
)
4444 subseg_set (md
.last_text_seg
, 0);
4445 proc_end
= expr_build_dot ();
4447 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4449 /* Make sure that section has 4 byte alignment for ILP32 and
4450 8 byte alignment for LP64. */
4451 record_alignment (now_seg
, md
.pointer_size_shift
);
4453 /* Need space for 3 pointers for procedure start, procedure end,
4455 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4456 where
= frag_now_fix () - (3 * md
.pointer_size
);
4457 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4459 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4460 e
.X_op
= O_pseudo_fixup
;
4461 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4463 if (!S_IS_LOCAL (unwind
.proc_pending
.sym
)
4464 && S_IS_DEFINED (unwind
.proc_pending
.sym
))
4465 e
.X_add_symbol
= symbol_temp_new (S_GET_SEGMENT (unwind
.proc_pending
.sym
),
4466 S_GET_VALUE (unwind
.proc_pending
.sym
),
4467 symbol_get_frag (unwind
.proc_pending
.sym
));
4469 e
.X_add_symbol
= unwind
.proc_pending
.sym
;
4470 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4472 e
.X_op
= O_pseudo_fixup
;
4473 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4475 e
.X_add_symbol
= proc_end
;
4476 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4477 bytes_per_address
, &e
);
4481 e
.X_op
= O_pseudo_fixup
;
4482 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4484 e
.X_add_symbol
= unwind
.info
;
4485 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4486 bytes_per_address
, &e
);
4489 subseg_set (saved_seg
, saved_subseg
);
4491 /* Set symbol sizes. */
4492 pending
= &unwind
.proc_pending
;
4493 if (S_GET_NAME (pending
->sym
))
4497 symbolS
*sym
= pending
->sym
;
4499 if (!S_IS_DEFINED (sym
))
4500 as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym
));
4501 else if (S_GET_SIZE (sym
) == 0
4502 && symbol_get_obj (sym
)->size
== NULL
)
4504 fragS
*frag
= symbol_get_frag (sym
);
4508 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4509 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4512 symbol_get_obj (sym
)->size
=
4513 (expressionS
*) xmalloc (sizeof (expressionS
));
4514 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4515 symbol_get_obj (sym
)->size
->X_add_symbol
4516 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4517 frag_now_fix (), frag_now
);
4518 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4519 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4523 } while ((pending
= pending
->next
) != NULL
);
4526 /* Parse names of main and alternate entry points. */
4532 name
= input_line_pointer
;
4533 c
= get_symbol_end ();
4534 p
= input_line_pointer
;
4536 (md
.unwind_check
== unwind_check_warning
4538 : as_bad
) (_("Empty argument of .endp"));
4541 symbolS
*sym
= symbol_find (name
);
4543 for (pending
= &unwind
.proc_pending
; pending
; pending
= pending
->next
)
4545 if (sym
== pending
->sym
)
4547 pending
->sym
= NULL
;
4551 if (!sym
|| !pending
)
4552 as_warn (_("`%s' was not specified with previous .proc"), name
);
4556 if (*input_line_pointer
!= ',')
4558 ++input_line_pointer
;
4560 demand_empty_rest_of_line ();
4562 /* Deliberately only checking for the main entry point here; the
4563 language spec even says all arguments to .endp are ignored. */
4564 if (unwind
.proc_pending
.sym
4565 && S_GET_NAME (unwind
.proc_pending
.sym
)
4566 && strcmp (S_GET_NAME (unwind
.proc_pending
.sym
), FAKE_LABEL_NAME
))
4567 as_warn (_("`%s' should be an operand to this .endp"),
4568 S_GET_NAME (unwind
.proc_pending
.sym
));
4569 while (unwind
.proc_pending
.next
)
4571 pending
= unwind
.proc_pending
.next
;
4572 unwind
.proc_pending
.next
= pending
->next
;
4575 unwind
.proc_pending
.sym
= unwind
.info
= NULL
;
4579 dot_template (int template_val
)
4581 CURR_SLOT
.user_template
= template_val
;
4585 dot_regstk (int dummy ATTRIBUTE_UNUSED
)
4587 int ins
, locs
, outs
, rots
;
4589 if (is_it_end_of_statement ())
4590 ins
= locs
= outs
= rots
= 0;
4593 ins
= get_absolute_expression ();
4594 if (*input_line_pointer
++ != ',')
4596 locs
= get_absolute_expression ();
4597 if (*input_line_pointer
++ != ',')
4599 outs
= get_absolute_expression ();
4600 if (*input_line_pointer
++ != ',')
4602 rots
= get_absolute_expression ();
4604 set_regstack (ins
, locs
, outs
, rots
);
4608 as_bad (_("Comma expected"));
4609 ignore_rest_of_line ();
4616 valueT num_alloced
= 0;
4617 struct dynreg
**drpp
, *dr
;
4618 int ch
, base_reg
= 0;
4624 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4625 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4626 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4630 /* First, remove existing names from hash table. */
4631 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4633 hash_delete (md
.dynreg_hash
, dr
->name
, FALSE
);
4634 /* FIXME: Free dr->name. */
4638 drpp
= &md
.dynreg
[type
];
4641 start
= input_line_pointer
;
4642 ch
= get_symbol_end ();
4643 len
= strlen (ia64_canonicalize_symbol_name (start
));
4644 *input_line_pointer
= ch
;
4647 if (*input_line_pointer
!= '[')
4649 as_bad (_("Expected '['"));
4652 ++input_line_pointer
; /* skip '[' */
4654 num_regs
= get_absolute_expression ();
4656 if (*input_line_pointer
++ != ']')
4658 as_bad (_("Expected ']'"));
4663 as_bad (_("Number of elements must be positive"));
4668 num_alloced
+= num_regs
;
4672 if (num_alloced
> md
.rot
.num_regs
)
4674 as_bad (_("Used more than the declared %d rotating registers"),
4680 if (num_alloced
> 96)
4682 as_bad (_("Used more than the available 96 rotating registers"));
4687 if (num_alloced
> 48)
4689 as_bad (_("Used more than the available 48 rotating registers"));
4700 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4701 memset (*drpp
, 0, sizeof (*dr
));
4704 name
= obstack_alloc (¬es
, len
+ 1);
4705 memcpy (name
, start
, len
);
4710 dr
->num_regs
= num_regs
;
4711 dr
->base
= base_reg
;
4713 base_reg
+= num_regs
;
4715 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4717 as_bad (_("Attempt to redefine register set `%s'"), name
);
4718 obstack_free (¬es
, name
);
4722 if (*input_line_pointer
!= ',')
4724 ++input_line_pointer
; /* skip comma */
4727 demand_empty_rest_of_line ();
4731 ignore_rest_of_line ();
4735 dot_byteorder (int byteorder
)
4737 segment_info_type
*seginfo
= seg_info (now_seg
);
4739 if (byteorder
== -1)
4741 if (seginfo
->tc_segment_info_data
.endian
== 0)
4742 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4743 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4746 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4748 if (target_big_endian
!= byteorder
)
4750 target_big_endian
= byteorder
;
4751 if (target_big_endian
)
4753 ia64_number_to_chars
= number_to_chars_bigendian
;
4754 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4758 ia64_number_to_chars
= number_to_chars_littleendian
;
4759 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4765 dot_psr (int dummy ATTRIBUTE_UNUSED
)
4772 option
= input_line_pointer
;
4773 ch
= get_symbol_end ();
4774 if (strcmp (option
, "lsb") == 0)
4775 md
.flags
&= ~EF_IA_64_BE
;
4776 else if (strcmp (option
, "msb") == 0)
4777 md
.flags
|= EF_IA_64_BE
;
4778 else if (strcmp (option
, "abi32") == 0)
4779 md
.flags
&= ~EF_IA_64_ABI64
;
4780 else if (strcmp (option
, "abi64") == 0)
4781 md
.flags
|= EF_IA_64_ABI64
;
4783 as_bad (_("Unknown psr option `%s'"), option
);
4784 *input_line_pointer
= ch
;
4787 if (*input_line_pointer
!= ',')
4790 ++input_line_pointer
;
4793 demand_empty_rest_of_line ();
4797 dot_ln (int dummy ATTRIBUTE_UNUSED
)
4799 new_logical_line (0, get_absolute_expression ());
4800 demand_empty_rest_of_line ();
4804 cross_section (int ref
, void (*builder
) (int), int ua
)
4807 int saved_auto_align
;
4808 unsigned int section_count
;
4811 start
= input_line_pointer
;
4817 name
= demand_copy_C_string (&len
);
4818 obstack_free(¬es
, name
);
4821 ignore_rest_of_line ();
4827 char c
= get_symbol_end ();
4829 if (input_line_pointer
== start
)
4831 as_bad (_("Missing section name"));
4832 ignore_rest_of_line ();
4835 *input_line_pointer
= c
;
4837 end
= input_line_pointer
;
4839 if (*input_line_pointer
!= ',')
4841 as_bad (_("Comma expected after section name"));
4842 ignore_rest_of_line ();
4846 end
= input_line_pointer
+ 1; /* skip comma */
4847 input_line_pointer
= start
;
4848 md
.keep_pending_output
= 1;
4849 section_count
= bfd_count_sections (stdoutput
);
4850 obj_elf_section (0);
4851 if (section_count
!= bfd_count_sections (stdoutput
))
4852 as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."));
4853 input_line_pointer
= end
;
4854 saved_auto_align
= md
.auto_align
;
4859 md
.auto_align
= saved_auto_align
;
4860 obj_elf_previous (0);
4861 md
.keep_pending_output
= 0;
4865 dot_xdata (int size
)
4867 cross_section (size
, cons
, 0);
4870 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4873 stmt_float_cons (int kind
)
4893 ia64_do_align (alignment
);
4898 stmt_cons_ua (int size
)
4900 int saved_auto_align
= md
.auto_align
;
4904 md
.auto_align
= saved_auto_align
;
4908 dot_xfloat_cons (int kind
)
4910 cross_section (kind
, stmt_float_cons
, 0);
4914 dot_xstringer (int zero
)
4916 cross_section (zero
, stringer
, 0);
4920 dot_xdata_ua (int size
)
4922 cross_section (size
, cons
, 1);
4926 dot_xfloat_cons_ua (int kind
)
4928 cross_section (kind
, float_cons
, 1);
4931 /* .reg.val <regname>,value */
4934 dot_reg_val (int dummy ATTRIBUTE_UNUSED
)
4938 expression_and_evaluate (®
);
4939 if (reg
.X_op
!= O_register
)
4941 as_bad (_("Register name expected"));
4942 ignore_rest_of_line ();
4944 else if (*input_line_pointer
++ != ',')
4946 as_bad (_("Comma expected"));
4947 ignore_rest_of_line ();
4951 valueT value
= get_absolute_expression ();
4952 int regno
= reg
.X_add_number
;
4953 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4954 as_warn (_("Register value annotation ignored"));
4957 gr_values
[regno
- REG_GR
].known
= 1;
4958 gr_values
[regno
- REG_GR
].value
= value
;
4959 gr_values
[regno
- REG_GR
].path
= md
.path
;
4962 demand_empty_rest_of_line ();
4967 .serialize.instruction
4970 dot_serialize (int type
)
4972 insn_group_break (0, 0, 0);
4974 instruction_serialization ();
4976 data_serialization ();
4977 insn_group_break (0, 0, 0);
4978 demand_empty_rest_of_line ();
4981 /* select dv checking mode
4986 A stop is inserted when changing modes
4990 dot_dv_mode (int type
)
4992 if (md
.manual_bundling
)
4993 as_warn (_("Directive invalid within a bundle"));
4995 if (type
== 'E' || type
== 'A')
4996 md
.mode_explicitly_set
= 0;
4998 md
.mode_explicitly_set
= 1;
5005 if (md
.explicit_mode
)
5006 insn_group_break (1, 0, 0);
5007 md
.explicit_mode
= 0;
5011 if (!md
.explicit_mode
)
5012 insn_group_break (1, 0, 0);
5013 md
.explicit_mode
= 1;
5017 if (md
.explicit_mode
!= md
.default_explicit_mode
)
5018 insn_group_break (1, 0, 0);
5019 md
.explicit_mode
= md
.default_explicit_mode
;
5020 md
.mode_explicitly_set
= 0;
5026 print_prmask (valueT mask
)
5030 for (regno
= 0; regno
< 64; regno
++)
5032 if (mask
& ((valueT
) 1 << regno
))
5034 fprintf (stderr
, "%s p%d", comma
, regno
);
5041 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5042 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5043 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5044 .pred.safe_across_calls p1 [, p2 [,...]]
5048 dot_pred_rel (int type
)
5052 int p1
= -1, p2
= -1;
5056 if (*input_line_pointer
== '"')
5059 char *form
= demand_copy_C_string (&len
);
5061 if (strcmp (form
, "mutex") == 0)
5063 else if (strcmp (form
, "clear") == 0)
5065 else if (strcmp (form
, "imply") == 0)
5067 obstack_free (¬es
, form
);
5069 else if (*input_line_pointer
== '@')
5071 char *form
= ++input_line_pointer
;
5072 char c
= get_symbol_end();
5074 if (strcmp (form
, "mutex") == 0)
5076 else if (strcmp (form
, "clear") == 0)
5078 else if (strcmp (form
, "imply") == 0)
5080 *input_line_pointer
= c
;
5084 as_bad (_("Missing predicate relation type"));
5085 ignore_rest_of_line ();
5090 as_bad (_("Unrecognized predicate relation type"));
5091 ignore_rest_of_line ();
5094 if (*input_line_pointer
== ',')
5095 ++input_line_pointer
;
5103 expressionS pr
, *pr1
, *pr2
;
5105 sep
= parse_operand_and_eval (&pr
, ',');
5106 if (pr
.X_op
== O_register
5107 && pr
.X_add_number
>= REG_P
5108 && pr
.X_add_number
<= REG_P
+ 63)
5110 regno
= pr
.X_add_number
- REG_P
;
5118 else if (type
!= 'i'
5119 && pr
.X_op
== O_subtract
5120 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5121 && pr1
->X_op
== O_register
5122 && pr1
->X_add_number
>= REG_P
5123 && pr1
->X_add_number
<= REG_P
+ 63
5124 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5125 && pr2
->X_op
== O_register
5126 && pr2
->X_add_number
>= REG_P
5127 && pr2
->X_add_number
<= REG_P
+ 63)
5132 regno
= pr1
->X_add_number
- REG_P
;
5133 stop
= pr2
->X_add_number
- REG_P
;
5136 as_bad (_("Bad register range"));
5137 ignore_rest_of_line ();
5140 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5141 count
+= stop
- regno
+ 1;
5145 as_bad (_("Predicate register expected"));
5146 ignore_rest_of_line ();
5150 as_warn (_("Duplicate predicate register ignored"));
5161 clear_qp_mutex (mask
);
5162 clear_qp_implies (mask
, (valueT
) 0);
5165 if (count
!= 2 || p1
== -1 || p2
== -1)
5166 as_bad (_("Predicate source and target required"));
5167 else if (p1
== 0 || p2
== 0)
5168 as_bad (_("Use of p0 is not valid in this context"));
5170 add_qp_imply (p1
, p2
);
5175 as_bad (_("At least two PR arguments expected"));
5180 as_bad (_("Use of p0 is not valid in this context"));
5183 add_qp_mutex (mask
);
5186 /* note that we don't override any existing relations */
5189 as_bad (_("At least one PR argument expected"));
5194 fprintf (stderr
, "Safe across calls: ");
5195 print_prmask (mask
);
5196 fprintf (stderr
, "\n");
5198 qp_safe_across_calls
= mask
;
5201 demand_empty_rest_of_line ();
5204 /* .entry label [, label [, ...]]
5205 Hint to DV code that the given labels are to be considered entry points.
5206 Otherwise, only global labels are considered entry points. */
5209 dot_entry (int dummy ATTRIBUTE_UNUSED
)
5218 name
= input_line_pointer
;
5219 c
= get_symbol_end ();
5220 symbolP
= symbol_find_or_make (name
);
5222 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (void *) symbolP
);
5224 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5227 *input_line_pointer
= c
;
5229 c
= *input_line_pointer
;
5232 input_line_pointer
++;
5234 if (*input_line_pointer
== '\n')
5240 demand_empty_rest_of_line ();
5243 /* .mem.offset offset, base
5244 "base" is used to distinguish between offsets from a different base. */
5247 dot_mem_offset (int dummy ATTRIBUTE_UNUSED
)
5249 md
.mem_offset
.hint
= 1;
5250 md
.mem_offset
.offset
= get_absolute_expression ();
5251 if (*input_line_pointer
!= ',')
5253 as_bad (_("Comma expected"));
5254 ignore_rest_of_line ();
5257 ++input_line_pointer
;
5258 md
.mem_offset
.base
= get_absolute_expression ();
5259 demand_empty_rest_of_line ();
5262 /* ia64-specific pseudo-ops: */
5263 const pseudo_typeS md_pseudo_table
[] =
5265 { "radix", dot_radix
, 0 },
5266 { "lcomm", s_lcomm_bytes
, 1 },
5267 { "loc", dot_loc
, 0 },
5268 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5269 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5270 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5271 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5272 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5273 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5274 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5275 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5276 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5277 { "proc", dot_proc
, 0 },
5278 { "body", dot_body
, 0 },
5279 { "prologue", dot_prologue
, 0 },
5280 { "endp", dot_endp
, 0 },
5282 { "fframe", dot_fframe
, 0 },
5283 { "vframe", dot_vframe
, 0 },
5284 { "vframesp", dot_vframesp
, 0 },
5285 { "vframepsp", dot_vframesp
, 1 },
5286 { "save", dot_save
, 0 },
5287 { "restore", dot_restore
, 0 },
5288 { "restorereg", dot_restorereg
, 0 },
5289 { "restorereg.p", dot_restorereg
, 1 },
5290 { "handlerdata", dot_handlerdata
, 0 },
5291 { "unwentry", dot_unwentry
, 0 },
5292 { "altrp", dot_altrp
, 0 },
5293 { "savesp", dot_savemem
, 0 },
5294 { "savepsp", dot_savemem
, 1 },
5295 { "save.g", dot_saveg
, 0 },
5296 { "save.f", dot_savef
, 0 },
5297 { "save.b", dot_saveb
, 0 },
5298 { "save.gf", dot_savegf
, 0 },
5299 { "spill", dot_spill
, 0 },
5300 { "spillreg", dot_spillreg
, 0 },
5301 { "spillsp", dot_spillmem
, 0 },
5302 { "spillpsp", dot_spillmem
, 1 },
5303 { "spillreg.p", dot_spillreg
, 1 },
5304 { "spillsp.p", dot_spillmem
, ~0 },
5305 { "spillpsp.p", dot_spillmem
, ~1 },
5306 { "label_state", dot_label_state
, 0 },
5307 { "copy_state", dot_copy_state
, 0 },
5308 { "unwabi", dot_unwabi
, 0 },
5309 { "personality", dot_personality
, 0 },
5310 { "mii", dot_template
, 0x0 },
5311 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5312 { "mlx", dot_template
, 0x2 },
5313 { "mmi", dot_template
, 0x4 },
5314 { "mfi", dot_template
, 0x6 },
5315 { "mmf", dot_template
, 0x7 },
5316 { "mib", dot_template
, 0x8 },
5317 { "mbb", dot_template
, 0x9 },
5318 { "bbb", dot_template
, 0xb },
5319 { "mmb", dot_template
, 0xc },
5320 { "mfb", dot_template
, 0xe },
5321 { "align", dot_align
, 0 },
5322 { "regstk", dot_regstk
, 0 },
5323 { "rotr", dot_rot
, DYNREG_GR
},
5324 { "rotf", dot_rot
, DYNREG_FR
},
5325 { "rotp", dot_rot
, DYNREG_PR
},
5326 { "lsb", dot_byteorder
, 0 },
5327 { "msb", dot_byteorder
, 1 },
5328 { "psr", dot_psr
, 0 },
5329 { "alias", dot_alias
, 0 },
5330 { "secalias", dot_alias
, 1 },
5331 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5333 { "xdata1", dot_xdata
, 1 },
5334 { "xdata2", dot_xdata
, 2 },
5335 { "xdata4", dot_xdata
, 4 },
5336 { "xdata8", dot_xdata
, 8 },
5337 { "xdata16", dot_xdata
, 16 },
5338 { "xreal4", dot_xfloat_cons
, 'f' },
5339 { "xreal8", dot_xfloat_cons
, 'd' },
5340 { "xreal10", dot_xfloat_cons
, 'x' },
5341 { "xreal16", dot_xfloat_cons
, 'X' },
5342 { "xstring", dot_xstringer
, 8 + 0 },
5343 { "xstringz", dot_xstringer
, 8 + 1 },
5345 /* unaligned versions: */
5346 { "xdata2.ua", dot_xdata_ua
, 2 },
5347 { "xdata4.ua", dot_xdata_ua
, 4 },
5348 { "xdata8.ua", dot_xdata_ua
, 8 },
5349 { "xdata16.ua", dot_xdata_ua
, 16 },
5350 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5351 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5352 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5353 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5355 /* annotations/DV checking support */
5356 { "entry", dot_entry
, 0 },
5357 { "mem.offset", dot_mem_offset
, 0 },
5358 { "pred.rel", dot_pred_rel
, 0 },
5359 { "pred.rel.clear", dot_pred_rel
, 'c' },
5360 { "pred.rel.imply", dot_pred_rel
, 'i' },
5361 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5362 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5363 { "reg.val", dot_reg_val
, 0 },
5364 { "serialize.data", dot_serialize
, 0 },
5365 { "serialize.instruction", dot_serialize
, 1 },
5366 { "auto", dot_dv_mode
, 'a' },
5367 { "explicit", dot_dv_mode
, 'e' },
5368 { "default", dot_dv_mode
, 'd' },
5370 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5371 IA-64 aligns data allocation pseudo-ops by default, so we have to
5372 tell it that these ones are supposed to be unaligned. Long term,
5373 should rewrite so that only IA-64 specific data allocation pseudo-ops
5374 are aligned by default. */
5375 {"2byte", stmt_cons_ua
, 2},
5376 {"4byte", stmt_cons_ua
, 4},
5377 {"8byte", stmt_cons_ua
, 8},
5380 {"vms_common", obj_elf_vms_common
, 0},
5386 static const struct pseudo_opcode
5389 void (*handler
) (int);
5394 /* these are more like pseudo-ops, but don't start with a dot */
5395 { "data1", cons
, 1 },
5396 { "data2", cons
, 2 },
5397 { "data4", cons
, 4 },
5398 { "data8", cons
, 8 },
5399 { "data16", cons
, 16 },
5400 { "real4", stmt_float_cons
, 'f' },
5401 { "real8", stmt_float_cons
, 'd' },
5402 { "real10", stmt_float_cons
, 'x' },
5403 { "real16", stmt_float_cons
, 'X' },
5404 { "string", stringer
, 8 + 0 },
5405 { "stringz", stringer
, 8 + 1 },
5407 /* unaligned versions: */
5408 { "data2.ua", stmt_cons_ua
, 2 },
5409 { "data4.ua", stmt_cons_ua
, 4 },
5410 { "data8.ua", stmt_cons_ua
, 8 },
5411 { "data16.ua", stmt_cons_ua
, 16 },
5412 { "real4.ua", float_cons
, 'f' },
5413 { "real8.ua", float_cons
, 'd' },
5414 { "real10.ua", float_cons
, 'x' },
5415 { "real16.ua", float_cons
, 'X' },
5418 /* Declare a register by creating a symbol for it and entering it in
5419 the symbol table. */
5422 declare_register (const char *name
, unsigned int regnum
)
5427 sym
= symbol_create (name
, reg_section
, regnum
, &zero_address_frag
);
5429 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (void *) sym
);
5431 as_fatal ("Inserting \"%s\" into register table failed: %s",
5438 declare_register_set (const char *prefix
,
5439 unsigned int num_regs
,
5440 unsigned int base_regnum
)
5445 for (i
= 0; i
< num_regs
; ++i
)
5447 snprintf (name
, sizeof (name
), "%s%u", prefix
, i
);
5448 declare_register (name
, base_regnum
+ i
);
5453 operand_width (enum ia64_opnd opnd
)
5455 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5456 unsigned int bits
= 0;
5460 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5461 bits
+= odesc
->field
[i
].bits
;
5466 static enum operand_match_result
5467 operand_match (const struct ia64_opcode
*idesc
, int res_index
, expressionS
*e
)
5469 enum ia64_opnd opnd
= idesc
->operands
[res_index
];
5470 int bits
, relocatable
= 0;
5471 struct insn_fix
*fix
;
5478 case IA64_OPND_AR_CCV
:
5479 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5480 return OPERAND_MATCH
;
5483 case IA64_OPND_AR_CSD
:
5484 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5485 return OPERAND_MATCH
;
5488 case IA64_OPND_AR_PFS
:
5489 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5490 return OPERAND_MATCH
;
5494 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5495 return OPERAND_MATCH
;
5499 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5500 return OPERAND_MATCH
;
5504 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5505 return OPERAND_MATCH
;
5508 case IA64_OPND_PR_ROT
:
5509 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5510 return OPERAND_MATCH
;
5514 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5515 return OPERAND_MATCH
;
5518 case IA64_OPND_PSR_L
:
5519 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5520 return OPERAND_MATCH
;
5523 case IA64_OPND_PSR_UM
:
5524 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5525 return OPERAND_MATCH
;
5529 if (e
->X_op
== O_constant
)
5531 if (e
->X_add_number
== 1)
5532 return OPERAND_MATCH
;
5534 return OPERAND_OUT_OF_RANGE
;
5539 if (e
->X_op
== O_constant
)
5541 if (e
->X_add_number
== 8)
5542 return OPERAND_MATCH
;
5544 return OPERAND_OUT_OF_RANGE
;
5549 if (e
->X_op
== O_constant
)
5551 if (e
->X_add_number
== 16)
5552 return OPERAND_MATCH
;
5554 return OPERAND_OUT_OF_RANGE
;
5558 /* register operands: */
5561 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5562 && e
->X_add_number
< REG_AR
+ 128)
5563 return OPERAND_MATCH
;
5568 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5569 && e
->X_add_number
< REG_BR
+ 8)
5570 return OPERAND_MATCH
;
5574 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5575 && e
->X_add_number
< REG_CR
+ 128)
5576 return OPERAND_MATCH
;
5579 case IA64_OPND_DAHR3
:
5580 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_DAHR
5581 && e
->X_add_number
< REG_DAHR
+ 8)
5582 return OPERAND_MATCH
;
5589 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5590 && e
->X_add_number
< REG_FR
+ 128)
5591 return OPERAND_MATCH
;
5596 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5597 && e
->X_add_number
< REG_P
+ 64)
5598 return OPERAND_MATCH
;
5604 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5605 && e
->X_add_number
< REG_GR
+ 128)
5606 return OPERAND_MATCH
;
5609 case IA64_OPND_R3_2
:
5610 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5612 if (e
->X_add_number
< REG_GR
+ 4)
5613 return OPERAND_MATCH
;
5614 else if (e
->X_add_number
< REG_GR
+ 128)
5615 return OPERAND_OUT_OF_RANGE
;
5619 /* indirect operands: */
5620 case IA64_OPND_CPUID_R3
:
5621 case IA64_OPND_DBR_R3
:
5622 case IA64_OPND_DTR_R3
:
5623 case IA64_OPND_ITR_R3
:
5624 case IA64_OPND_IBR_R3
:
5625 case IA64_OPND_MSR_R3
:
5626 case IA64_OPND_PKR_R3
:
5627 case IA64_OPND_PMC_R3
:
5628 case IA64_OPND_PMD_R3
:
5629 case IA64_OPND_DAHR_R3
:
5630 case IA64_OPND_RR_R3
:
5631 if (e
->X_op
== O_index
&& e
->X_op_symbol
5632 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5633 == opnd
- IA64_OPND_CPUID_R3
))
5634 return OPERAND_MATCH
;
5638 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5639 return OPERAND_MATCH
;
5642 /* immediate operands: */
5643 case IA64_OPND_CNT2a
:
5644 case IA64_OPND_LEN4
:
5645 case IA64_OPND_LEN6
:
5646 bits
= operand_width (idesc
->operands
[res_index
]);
5647 if (e
->X_op
== O_constant
)
5649 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5650 return OPERAND_MATCH
;
5652 return OPERAND_OUT_OF_RANGE
;
5656 case IA64_OPND_CNT2b
:
5657 if (e
->X_op
== O_constant
)
5659 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5660 return OPERAND_MATCH
;
5662 return OPERAND_OUT_OF_RANGE
;
5666 case IA64_OPND_CNT2c
:
5667 val
= e
->X_add_number
;
5668 if (e
->X_op
== O_constant
)
5670 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5671 return OPERAND_MATCH
;
5673 return OPERAND_OUT_OF_RANGE
;
5678 /* SOR must be an integer multiple of 8 */
5679 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5680 return OPERAND_OUT_OF_RANGE
;
5683 if (e
->X_op
== O_constant
)
5685 if ((bfd_vma
) e
->X_add_number
<= 96)
5686 return OPERAND_MATCH
;
5688 return OPERAND_OUT_OF_RANGE
;
5692 case IA64_OPND_IMMU62
:
5693 if (e
->X_op
== O_constant
)
5695 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5696 return OPERAND_MATCH
;
5698 return OPERAND_OUT_OF_RANGE
;
5702 /* FIXME -- need 62-bit relocation type */
5703 as_bad (_("62-bit relocation not yet implemented"));
5707 case IA64_OPND_IMMU64
:
5708 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5709 || e
->X_op
== O_subtract
)
5711 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5712 fix
->code
= BFD_RELOC_IA64_IMM64
;
5713 if (e
->X_op
!= O_subtract
)
5715 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5716 if (e
->X_op
== O_pseudo_fixup
)
5720 fix
->opnd
= idesc
->operands
[res_index
];
5723 ++CURR_SLOT
.num_fixups
;
5724 return OPERAND_MATCH
;
5726 else if (e
->X_op
== O_constant
)
5727 return OPERAND_MATCH
;
5730 case IA64_OPND_IMMU5b
:
5731 if (e
->X_op
== O_constant
)
5733 val
= e
->X_add_number
;
5734 if (val
>= 32 && val
<= 63)
5735 return OPERAND_MATCH
;
5737 return OPERAND_OUT_OF_RANGE
;
5741 case IA64_OPND_CCNT5
:
5742 case IA64_OPND_CNT5
:
5743 case IA64_OPND_CNT6
:
5744 case IA64_OPND_CPOS6a
:
5745 case IA64_OPND_CPOS6b
:
5746 case IA64_OPND_CPOS6c
:
5747 case IA64_OPND_IMMU2
:
5748 case IA64_OPND_IMMU7a
:
5749 case IA64_OPND_IMMU7b
:
5750 case IA64_OPND_IMMU16
:
5751 case IA64_OPND_IMMU19
:
5752 case IA64_OPND_IMMU21
:
5753 case IA64_OPND_IMMU24
:
5754 case IA64_OPND_MBTYPE4
:
5755 case IA64_OPND_MHTYPE8
:
5756 case IA64_OPND_POS6
:
5757 bits
= operand_width (idesc
->operands
[res_index
]);
5758 if (e
->X_op
== O_constant
)
5760 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5761 return OPERAND_MATCH
;
5763 return OPERAND_OUT_OF_RANGE
;
5767 case IA64_OPND_IMMU9
:
5768 bits
= operand_width (idesc
->operands
[res_index
]);
5769 if (e
->X_op
== O_constant
)
5771 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5773 int lobits
= e
->X_add_number
& 0x3;
5774 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5775 e
->X_add_number
|= (bfd_vma
) 0x3;
5776 return OPERAND_MATCH
;
5779 return OPERAND_OUT_OF_RANGE
;
5783 case IA64_OPND_IMM44
:
5784 /* least 16 bits must be zero */
5785 if ((e
->X_add_number
& 0xffff) != 0)
5786 /* XXX technically, this is wrong: we should not be issuing warning
5787 messages until we're sure this instruction pattern is going to
5789 as_warn (_("lower 16 bits of mask ignored"));
5791 if (e
->X_op
== O_constant
)
5793 if (((e
->X_add_number
>= 0
5794 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5795 || (e
->X_add_number
< 0
5796 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5799 if (e
->X_add_number
>= 0
5800 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5802 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5804 return OPERAND_MATCH
;
5807 return OPERAND_OUT_OF_RANGE
;
5811 case IA64_OPND_IMM17
:
5812 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5813 if (e
->X_op
== O_constant
)
5815 if (((e
->X_add_number
>= 0
5816 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5817 || (e
->X_add_number
< 0
5818 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5821 if (e
->X_add_number
>= 0
5822 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5824 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5826 return OPERAND_MATCH
;
5829 return OPERAND_OUT_OF_RANGE
;
5833 case IA64_OPND_IMM14
:
5834 case IA64_OPND_IMM22
:
5836 case IA64_OPND_IMM1
:
5837 case IA64_OPND_IMM8
:
5838 case IA64_OPND_IMM8U4
:
5839 case IA64_OPND_IMM8M1
:
5840 case IA64_OPND_IMM8M1U4
:
5841 case IA64_OPND_IMM8M1U8
:
5842 case IA64_OPND_IMM9a
:
5843 case IA64_OPND_IMM9b
:
5844 bits
= operand_width (idesc
->operands
[res_index
]);
5845 if (relocatable
&& (e
->X_op
== O_symbol
5846 || e
->X_op
== O_subtract
5847 || e
->X_op
== O_pseudo_fixup
))
5849 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5851 if (idesc
->operands
[res_index
] == IA64_OPND_IMM14
)
5852 fix
->code
= BFD_RELOC_IA64_IMM14
;
5854 fix
->code
= BFD_RELOC_IA64_IMM22
;
5856 if (e
->X_op
!= O_subtract
)
5858 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5859 if (e
->X_op
== O_pseudo_fixup
)
5863 fix
->opnd
= idesc
->operands
[res_index
];
5866 ++CURR_SLOT
.num_fixups
;
5867 return OPERAND_MATCH
;
5869 else if (e
->X_op
!= O_constant
5870 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5871 return OPERAND_MISMATCH
;
5873 if (opnd
== IA64_OPND_IMM8M1U4
)
5875 /* Zero is not valid for unsigned compares that take an adjusted
5876 constant immediate range. */
5877 if (e
->X_add_number
== 0)
5878 return OPERAND_OUT_OF_RANGE
;
5880 /* Sign-extend 32-bit unsigned numbers, so that the following range
5881 checks will work. */
5882 val
= e
->X_add_number
;
5883 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5884 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5885 val
= ((val
<< 32) >> 32);
5887 /* Check for 0x100000000. This is valid because
5888 0x100000000-1 is the same as ((uint32_t) -1). */
5889 if (val
== ((bfd_signed_vma
) 1 << 32))
5890 return OPERAND_MATCH
;
5894 else if (opnd
== IA64_OPND_IMM8M1U8
)
5896 /* Zero is not valid for unsigned compares that take an adjusted
5897 constant immediate range. */
5898 if (e
->X_add_number
== 0)
5899 return OPERAND_OUT_OF_RANGE
;
5901 /* Check for 0x10000000000000000. */
5902 if (e
->X_op
== O_big
)
5904 if (generic_bignum
[0] == 0
5905 && generic_bignum
[1] == 0
5906 && generic_bignum
[2] == 0
5907 && generic_bignum
[3] == 0
5908 && generic_bignum
[4] == 1)
5909 return OPERAND_MATCH
;
5911 return OPERAND_OUT_OF_RANGE
;
5914 val
= e
->X_add_number
- 1;
5916 else if (opnd
== IA64_OPND_IMM8M1
)
5917 val
= e
->X_add_number
- 1;
5918 else if (opnd
== IA64_OPND_IMM8U4
)
5920 /* Sign-extend 32-bit unsigned numbers, so that the following range
5921 checks will work. */
5922 val
= e
->X_add_number
;
5923 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5924 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5925 val
= ((val
<< 32) >> 32);
5928 val
= e
->X_add_number
;
5930 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5931 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5932 return OPERAND_MATCH
;
5934 return OPERAND_OUT_OF_RANGE
;
5936 case IA64_OPND_INC3
:
5937 /* +/- 1, 4, 8, 16 */
5938 val
= e
->X_add_number
;
5941 if (e
->X_op
== O_constant
)
5943 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5944 return OPERAND_MATCH
;
5946 return OPERAND_OUT_OF_RANGE
;
5950 case IA64_OPND_TGT25
:
5951 case IA64_OPND_TGT25b
:
5952 case IA64_OPND_TGT25c
:
5953 case IA64_OPND_TGT64
:
5954 if (e
->X_op
== O_symbol
)
5956 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5957 if (opnd
== IA64_OPND_TGT25
)
5958 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5959 else if (opnd
== IA64_OPND_TGT25b
)
5960 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5961 else if (opnd
== IA64_OPND_TGT25c
)
5962 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5963 else if (opnd
== IA64_OPND_TGT64
)
5964 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5968 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5969 fix
->opnd
= idesc
->operands
[res_index
];
5972 ++CURR_SLOT
.num_fixups
;
5973 return OPERAND_MATCH
;
5975 case IA64_OPND_TAG13
:
5976 case IA64_OPND_TAG13b
:
5980 return OPERAND_MATCH
;
5983 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5984 /* There are no external relocs for TAG13/TAG13b fields, so we
5985 create a dummy reloc. This will not live past md_apply_fix. */
5986 fix
->code
= BFD_RELOC_UNUSED
;
5987 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5988 fix
->opnd
= idesc
->operands
[res_index
];
5991 ++CURR_SLOT
.num_fixups
;
5992 return OPERAND_MATCH
;
5999 case IA64_OPND_LDXMOV
:
6000 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6001 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
6002 fix
->opnd
= idesc
->operands
[res_index
];
6005 ++CURR_SLOT
.num_fixups
;
6006 return OPERAND_MATCH
;
6008 case IA64_OPND_STRD5b
:
6009 if (e
->X_op
== O_constant
)
6011 /* 5-bit signed scaled by 64 */
6012 if ((e
->X_add_number
<= ( 0xf << 6 ))
6013 && (e
->X_add_number
>= -( 0x10 << 6 )))
6016 /* Must be a multiple of 64 */
6017 if ((e
->X_add_number
& 0x3f) != 0)
6018 as_warn (_("stride must be a multiple of 64; lower 6 bits ignored"));
6020 e
->X_add_number
&= ~ 0x3f;
6021 return OPERAND_MATCH
;
6024 return OPERAND_OUT_OF_RANGE
;
6027 case IA64_OPND_CNT6a
:
6028 if (e
->X_op
== O_constant
)
6030 /* 6-bit unsigned biased by 1 -- count 0 is meaningless */
6031 if ((e
->X_add_number
<= 64)
6032 && (e
->X_add_number
> 0) )
6034 return OPERAND_MATCH
;
6037 return OPERAND_OUT_OF_RANGE
;
6044 return OPERAND_MISMATCH
;
6048 parse_operand (expressionS
*e
, int more
)
6052 memset (e
, 0, sizeof (*e
));
6056 sep
= *input_line_pointer
;
6057 if (more
&& (sep
== ',' || sep
== more
))
6058 ++input_line_pointer
;
6063 parse_operand_and_eval (expressionS
*e
, int more
)
6065 int sep
= parse_operand (e
, more
);
6066 resolve_expression (e
);
6071 parse_operand_maybe_eval (expressionS
*e
, int more
, enum ia64_opnd op
)
6073 int sep
= parse_operand (e
, more
);
6076 case IA64_OPND_IMM14
:
6077 case IA64_OPND_IMM22
:
6078 case IA64_OPND_IMMU64
:
6079 case IA64_OPND_TGT25
:
6080 case IA64_OPND_TGT25b
:
6081 case IA64_OPND_TGT25c
:
6082 case IA64_OPND_TGT64
:
6083 case IA64_OPND_TAG13
:
6084 case IA64_OPND_TAG13b
:
6085 case IA64_OPND_LDXMOV
:
6088 resolve_expression (e
);
6094 /* Returns the next entry in the opcode table that matches the one in
6095 IDESC, and frees the entry in IDESC. If no matching entry is
6096 found, NULL is returned instead. */
6098 static struct ia64_opcode
*
6099 get_next_opcode (struct ia64_opcode
*idesc
)
6101 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6102 ia64_free_opcode (idesc
);
6106 /* Parse the operands for the opcode and find the opcode variant that
6107 matches the specified operands, or NULL if no match is possible. */
6109 static struct ia64_opcode
*
6110 parse_operands (struct ia64_opcode
*idesc
)
6112 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6113 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6116 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6117 enum operand_match_result result
;
6119 char *first_arg
= 0, *end
, *saved_input_pointer
;
6122 gas_assert (strlen (idesc
->name
) <= 128);
6124 strcpy (mnemonic
, idesc
->name
);
6125 if (idesc
->operands
[2] == IA64_OPND_SOF
6126 || idesc
->operands
[1] == IA64_OPND_SOF
)
6128 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6129 can't parse the first operand until we have parsed the
6130 remaining operands of the "alloc" instruction. */
6132 first_arg
= input_line_pointer
;
6133 end
= strchr (input_line_pointer
, '=');
6136 as_bad (_("Expected separator `='"));
6139 input_line_pointer
= end
+ 1;
6146 if (i
< NELEMS (CURR_SLOT
.opnd
))
6148 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ i
, '=',
6149 idesc
->operands
[i
]);
6150 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6157 sep
= parse_operand (&dummy
, '=');
6158 if (dummy
.X_op
== O_absent
)
6164 if (sep
!= '=' && sep
!= ',')
6169 if (num_outputs
> 0)
6170 as_bad (_("Duplicate equal sign (=) in instruction"));
6172 num_outputs
= i
+ 1;
6177 as_bad (_("Illegal operand separator `%c'"), sep
);
6181 if (idesc
->operands
[2] == IA64_OPND_SOF
6182 || idesc
->operands
[1] == IA64_OPND_SOF
)
6184 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6185 Note, however, that due to that mapping operand numbers in error
6186 messages for any of the constant operands will not be correct. */
6187 know (strcmp (idesc
->name
, "alloc") == 0);
6188 /* The first operand hasn't been parsed/initialized, yet (but
6189 num_operands intentionally doesn't account for that). */
6190 i
= num_operands
> 4 ? 2 : 1;
6191 #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6192 ? CURR_SLOT.opnd[n].X_add_number \
6194 sof
= set_regstack (FORCE_CONST(i
),
6197 FORCE_CONST(i
+ 3));
6200 /* now we can parse the first arg: */
6201 saved_input_pointer
= input_line_pointer
;
6202 input_line_pointer
= first_arg
;
6203 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ 0, '=',
6204 idesc
->operands
[0]);
6206 --num_outputs
; /* force error */
6207 input_line_pointer
= saved_input_pointer
;
6209 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6210 if (CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6211 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
)
6212 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6213 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6215 CURR_SLOT
.opnd
[i
+ 1].X_op
= O_illegal
;
6216 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6219 highest_unmatched_operand
= -4;
6220 curr_out_of_range_pos
= -1;
6222 for (; idesc
; idesc
= get_next_opcode (idesc
))
6224 if (num_outputs
!= idesc
->num_outputs
)
6225 continue; /* mismatch in # of outputs */
6226 if (highest_unmatched_operand
< 0)
6227 highest_unmatched_operand
|= 1;
6228 if (num_operands
> NELEMS (idesc
->operands
)
6229 || (num_operands
< NELEMS (idesc
->operands
)
6230 && idesc
->operands
[num_operands
])
6231 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6232 continue; /* mismatch in number of arguments */
6233 if (highest_unmatched_operand
< 0)
6234 highest_unmatched_operand
|= 2;
6236 CURR_SLOT
.num_fixups
= 0;
6238 /* Try to match all operands. If we see an out-of-range operand,
6239 then continue trying to match the rest of the operands, since if
6240 the rest match, then this idesc will give the best error message. */
6242 out_of_range_pos
= -1;
6243 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6245 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6246 if (result
!= OPERAND_MATCH
)
6248 if (result
!= OPERAND_OUT_OF_RANGE
)
6250 if (out_of_range_pos
< 0)
6251 /* remember position of the first out-of-range operand: */
6252 out_of_range_pos
= i
;
6256 /* If we did not match all operands, or if at least one operand was
6257 out-of-range, then this idesc does not match. Keep track of which
6258 idesc matched the most operands before failing. If we have two
6259 idescs that failed at the same position, and one had an out-of-range
6260 operand, then prefer the out-of-range operand. Thus if we have
6261 "add r0=0x1000000,r1" we get an error saying the constant is out
6262 of range instead of an error saying that the constant should have been
6265 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6267 if (i
> highest_unmatched_operand
6268 || (i
== highest_unmatched_operand
6269 && out_of_range_pos
> curr_out_of_range_pos
))
6271 highest_unmatched_operand
= i
;
6272 if (out_of_range_pos
>= 0)
6274 expected_operand
= idesc
->operands
[out_of_range_pos
];
6275 error_pos
= out_of_range_pos
;
6279 expected_operand
= idesc
->operands
[i
];
6282 curr_out_of_range_pos
= out_of_range_pos
;
6291 if (expected_operand
)
6292 as_bad (_("Operand %u of `%s' should be %s"),
6293 error_pos
+ 1, mnemonic
,
6294 elf64_ia64_operands
[expected_operand
].desc
);
6295 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6296 as_bad (_("Wrong number of output operands"));
6297 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6298 as_bad (_("Wrong number of input operands"));
6300 as_bad (_("Operand mismatch"));
6304 /* Check that the instruction doesn't use
6305 - r0, f0, or f1 as output operands
6306 - the same predicate twice as output operands
6307 - r0 as address of a base update load or store
6308 - the same GR as output and address of a base update load
6309 - two even- or two odd-numbered FRs as output operands of a floating
6310 point parallel load.
6311 At most two (conflicting) output (or output-like) operands can exist,
6312 (floating point parallel loads have three outputs, but the base register,
6313 if updated, cannot conflict with the actual outputs). */
6315 for (i
= 0; i
< num_operands
; ++i
)
6320 switch (idesc
->operands
[i
])
6325 if (i
< num_outputs
)
6327 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6330 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6332 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6337 if (i
< num_outputs
)
6340 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6342 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6349 if (i
< num_outputs
)
6351 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6352 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6355 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6358 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6360 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6364 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6366 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6369 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6371 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6382 as_warn (_("Invalid use of `%c%d' as output operand"), reg_class
, regno
);
6385 as_warn (_("Invalid use of `r%d' as base update address operand"), regno
);
6391 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6396 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6401 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6409 as_warn (_("Invalid duplicate use of `%c%d'"), reg_class
, reg1
);
6411 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6412 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6413 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6414 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6415 && ! ((reg1
^ reg2
) & 1))
6416 as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"),
6417 reg1
- REG_FR
, reg2
- REG_FR
);
6418 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6419 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6420 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6421 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6422 as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"),
6423 reg1
- REG_FR
, reg2
- REG_FR
);
6428 build_insn (struct slot
*slot
, bfd_vma
*insnp
)
6430 const struct ia64_operand
*odesc
, *o2desc
;
6431 struct ia64_opcode
*idesc
= slot
->idesc
;
6437 insn
= idesc
->opcode
| slot
->qp_regno
;
6439 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6441 if (slot
->opnd
[i
].X_op
== O_register
6442 || slot
->opnd
[i
].X_op
== O_constant
6443 || slot
->opnd
[i
].X_op
== O_index
)
6444 val
= slot
->opnd
[i
].X_add_number
;
6445 else if (slot
->opnd
[i
].X_op
== O_big
)
6447 /* This must be the value 0x10000000000000000. */
6448 gas_assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6454 switch (idesc
->operands
[i
])
6456 case IA64_OPND_IMMU64
:
6457 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6458 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6459 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6460 | (((val
>> 63) & 0x1) << 36));
6463 case IA64_OPND_IMMU62
:
6464 val
&= 0x3fffffffffffffffULL
;
6465 if (val
!= slot
->opnd
[i
].X_add_number
)
6466 as_warn (_("Value truncated to 62 bits"));
6467 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6468 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6471 case IA64_OPND_TGT64
:
6473 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6474 insn
|= ((((val
>> 59) & 0x1) << 36)
6475 | (((val
>> 0) & 0xfffff) << 13));
6491 case IA64_OPND_DAHR3
:
6510 case IA64_OPND_R3_2
:
6511 case IA64_OPND_CPUID_R3
:
6512 case IA64_OPND_DBR_R3
:
6513 case IA64_OPND_DTR_R3
:
6514 case IA64_OPND_ITR_R3
:
6515 case IA64_OPND_IBR_R3
:
6517 case IA64_OPND_MSR_R3
:
6518 case IA64_OPND_PKR_R3
:
6519 case IA64_OPND_PMC_R3
:
6520 case IA64_OPND_PMD_R3
:
6521 case IA64_OPND_DAHR_R3
:
6522 case IA64_OPND_RR_R3
:
6530 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6531 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6533 as_bad_where (slot
->src_file
, slot
->src_line
,
6534 _("Bad operand value: %s"), err
);
6535 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6537 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6538 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6540 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6541 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6543 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6544 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6545 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6547 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6548 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6556 emit_one_bundle (void)
6558 int manual_bundling_off
= 0, manual_bundling
= 0;
6559 enum ia64_unit required_unit
, insn_unit
= 0;
6560 enum ia64_insn_type type
[3], insn_type
;
6561 unsigned int template_val
, orig_template
;
6562 bfd_vma insn
[3] = { -1, -1, -1 };
6563 struct ia64_opcode
*idesc
;
6564 int end_of_insn_group
= 0, user_template
= -1;
6565 int n
, i
, j
, first
, curr
, last_slot
;
6566 bfd_vma t0
= 0, t1
= 0;
6567 struct label_fix
*lfix
;
6568 bfd_boolean mark_label
;
6569 struct insn_fix
*ifix
;
6575 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6576 know (first
>= 0 && first
< NUM_SLOTS
);
6577 n
= MIN (3, md
.num_slots_in_use
);
6579 /* Determine template: user user_template if specified, best match
6582 if (md
.slot
[first
].user_template
>= 0)
6583 user_template
= template_val
= md
.slot
[first
].user_template
;
6586 /* Auto select appropriate template. */
6587 memset (type
, 0, sizeof (type
));
6589 for (i
= 0; i
< n
; ++i
)
6591 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6593 type
[i
] = md
.slot
[curr
].idesc
->type
;
6594 curr
= (curr
+ 1) % NUM_SLOTS
;
6596 template_val
= best_template
[type
[0]][type
[1]][type
[2]];
6599 /* initialize instructions with appropriate nops: */
6600 for (i
= 0; i
< 3; ++i
)
6601 insn
[i
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[i
]];
6605 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6606 from the start of the frag. */
6607 addr_mod
= frag_now_fix () & 15;
6608 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6609 as_bad (_("instruction address is not a multiple of 16"));
6610 frag_now
->insn_addr
= addr_mod
;
6611 frag_now
->has_code
= 1;
6613 /* now fill in slots with as many insns as possible: */
6615 idesc
= md
.slot
[curr
].idesc
;
6616 end_of_insn_group
= 0;
6618 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6620 /* If we have unwind records, we may need to update some now. */
6621 unw_rec_list
*ptr
= md
.slot
[curr
].unwind_record
;
6622 unw_rec_list
*end_ptr
= NULL
;
6626 /* Find the last prologue/body record in the list for the current
6627 insn, and set the slot number for all records up to that point.
6628 This needs to be done now, because prologue/body records refer to
6629 the current point, not the point after the instruction has been
6630 issued. This matters because there may have been nops emitted
6631 meanwhile. Any non-prologue non-body record followed by a
6632 prologue/body record must also refer to the current point. */
6633 unw_rec_list
*last_ptr
;
6635 for (j
= 1; end_ptr
== NULL
&& j
< md
.num_slots_in_use
; ++j
)
6636 end_ptr
= md
.slot
[(curr
+ j
) % NUM_SLOTS
].unwind_record
;
6637 for (last_ptr
= NULL
; ptr
!= end_ptr
; ptr
= ptr
->next
)
6638 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6639 || ptr
->r
.type
== body
)
6643 /* Make last_ptr point one after the last prologue/body
6645 last_ptr
= last_ptr
->next
;
6646 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6649 ptr
->slot_number
= (unsigned long) f
+ i
;
6650 ptr
->slot_frag
= frag_now
;
6652 /* Remove the initialized records, so that we won't accidentally
6653 update them again if we insert a nop and continue. */
6654 md
.slot
[curr
].unwind_record
= last_ptr
;
6658 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6659 if (md
.slot
[curr
].manual_bundling_on
)
6662 manual_bundling
= 1;
6664 break; /* Need to start a new bundle. */
6667 /* If this instruction specifies a template, then it must be the first
6668 instruction of a bundle. */
6669 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6672 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6674 if (manual_bundling
&& !manual_bundling_off
)
6676 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6677 _("`%s' must be last in bundle"), idesc
->name
);
6679 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6683 if (idesc
->flags
& IA64_OPCODE_LAST
)
6686 unsigned int required_template
;
6688 /* If we need a stop bit after an M slot, our only choice is
6689 template 5 (M;;MI). If we need a stop bit after a B
6690 slot, our only choice is to place it at the end of the
6691 bundle, because the only available templates are MIB,
6692 MBB, BBB, MMB, and MFB. We don't handle anything other
6693 than M and B slots because these are the only kind of
6694 instructions that can have the IA64_OPCODE_LAST bit set. */
6695 required_template
= template_val
;
6696 switch (idesc
->type
)
6700 required_template
= 5;
6708 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6709 _("Internal error: don't know how to force %s to end of instruction group"),
6715 && (i
> required_slot
6716 || (required_slot
== 2 && !manual_bundling_off
)
6717 || (user_template
>= 0
6718 /* Changing from MMI to M;MI is OK. */
6719 && (template_val
^ required_template
) > 1)))
6721 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6722 _("`%s' must be last in instruction group"),
6724 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6725 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6727 if (required_slot
< i
)
6728 /* Can't fit this instruction. */
6732 if (required_template
!= template_val
)
6734 /* If we switch the template, we need to reset the NOPs
6735 after slot i. The slot-types of the instructions ahead
6736 of i never change, so we don't need to worry about
6737 changing NOPs in front of this slot. */
6738 for (j
= i
; j
< 3; ++j
)
6739 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6741 /* We just picked a template that includes the stop bit in the
6742 middle, so we don't need another one emitted later. */
6743 md
.slot
[curr
].end_of_insn_group
= 0;
6745 template_val
= required_template
;
6747 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6749 if (manual_bundling
)
6751 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6752 _("Label must be first in a bundle"));
6753 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6755 /* This insn must go into the first slot of a bundle. */
6759 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6761 /* We need an instruction group boundary in the middle of a
6762 bundle. See if we can switch to an other template with
6763 an appropriate boundary. */
6765 orig_template
= template_val
;
6766 if (i
== 1 && (user_template
== 4
6767 || (user_template
< 0
6768 && (ia64_templ_desc
[template_val
].exec_unit
[0]
6772 end_of_insn_group
= 0;
6774 else if (i
== 2 && (user_template
== 0
6775 || (user_template
< 0
6776 && (ia64_templ_desc
[template_val
].exec_unit
[1]
6778 /* This test makes sure we don't switch the template if
6779 the next instruction is one that needs to be first in
6780 an instruction group. Since all those instructions are
6781 in the M group, there is no way such an instruction can
6782 fit in this bundle even if we switch the template. The
6783 reason we have to check for this is that otherwise we
6784 may end up generating "MI;;I M.." which has the deadly
6785 effect that the second M instruction is no longer the
6786 first in the group! --davidm 99/12/16 */
6787 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6790 end_of_insn_group
= 0;
6793 && user_template
== 0
6794 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6795 /* Use the next slot. */
6797 else if (curr
!= first
)
6798 /* can't fit this insn */
6801 if (template_val
!= orig_template
)
6802 /* if we switch the template, we need to reset the NOPs
6803 after slot i. The slot-types of the instructions ahead
6804 of i never change, so we don't need to worry about
6805 changing NOPs in front of this slot. */
6806 for (j
= i
; j
< 3; ++j
)
6807 insn
[j
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[j
]];
6809 required_unit
= ia64_templ_desc
[template_val
].exec_unit
[i
];
6811 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6812 if (idesc
->type
== IA64_TYPE_DYN
)
6814 enum ia64_opnd opnd1
, opnd2
;
6816 if ((strcmp (idesc
->name
, "nop") == 0)
6817 || (strcmp (idesc
->name
, "break") == 0))
6818 insn_unit
= required_unit
;
6819 else if (strcmp (idesc
->name
, "hint") == 0)
6821 insn_unit
= required_unit
;
6822 if (required_unit
== IA64_UNIT_B
)
6828 case hint_b_warning
:
6829 as_warn (_("hint in B unit may be treated as nop"));
6832 /* When manual bundling is off and there is no
6833 user template, we choose a different unit so
6834 that hint won't go into the current slot. We
6835 will fill the current bundle with nops and
6836 try to put hint into the next bundle. */
6837 if (!manual_bundling
&& user_template
< 0)
6838 insn_unit
= IA64_UNIT_I
;
6840 as_bad (_("hint in B unit can't be used"));
6845 else if (strcmp (idesc
->name
, "chk.s") == 0
6846 || strcmp (idesc
->name
, "mov") == 0)
6848 insn_unit
= IA64_UNIT_M
;
6849 if (required_unit
== IA64_UNIT_I
6850 || (required_unit
== IA64_UNIT_F
&& template_val
== 6))
6851 insn_unit
= IA64_UNIT_I
;
6854 as_fatal (_("emit_one_bundle: unexpected dynamic op"));
6856 snprintf (mnemonic
, sizeof (mnemonic
), "%s.%c",
6857 idesc
->name
, "?imbfxx"[insn_unit
]);
6858 opnd1
= idesc
->operands
[0];
6859 opnd2
= idesc
->operands
[1];
6860 ia64_free_opcode (idesc
);
6861 idesc
= ia64_find_opcode (mnemonic
);
6862 /* moves to/from ARs have collisions */
6863 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6865 while (idesc
!= NULL
6866 && (idesc
->operands
[0] != opnd1
6867 || idesc
->operands
[1] != opnd2
))
6868 idesc
= get_next_opcode (idesc
);
6870 md
.slot
[curr
].idesc
= idesc
;
6874 insn_type
= idesc
->type
;
6875 insn_unit
= IA64_UNIT_NIL
;
6879 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6880 insn_unit
= required_unit
;
6882 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6883 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6884 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6885 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6886 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6891 if (insn_unit
!= required_unit
)
6892 continue; /* Try next slot. */
6894 /* Now is a good time to fix up the labels for this insn. */
6896 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6898 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6899 symbol_set_frag (lfix
->sym
, frag_now
);
6900 mark_label
|= lfix
->dw2_mark_labels
;
6902 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6904 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6905 symbol_set_frag (lfix
->sym
, frag_now
);
6908 if (debug_type
== DEBUG_DWARF2
6909 || md
.slot
[curr
].loc_directive_seen
6912 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6914 md
.slot
[curr
].loc_directive_seen
= 0;
6916 md
.slot
[curr
].debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
6918 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6921 build_insn (md
.slot
+ curr
, insn
+ i
);
6923 ptr
= md
.slot
[curr
].unwind_record
;
6926 /* Set slot numbers for all remaining unwind records belonging to the
6927 current insn. There can not be any prologue/body unwind records
6929 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6931 ptr
->slot_number
= (unsigned long) f
+ i
;
6932 ptr
->slot_frag
= frag_now
;
6934 md
.slot
[curr
].unwind_record
= NULL
;
6937 if (required_unit
== IA64_UNIT_L
)
6940 /* skip one slot for long/X-unit instructions */
6943 --md
.num_slots_in_use
;
6946 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6948 ifix
= md
.slot
[curr
].fixup
+ j
;
6949 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6950 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6951 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6952 fix
->fx_file
= md
.slot
[curr
].src_file
;
6953 fix
->fx_line
= md
.slot
[curr
].src_line
;
6956 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6959 ia64_free_opcode (md
.slot
[curr
].idesc
);
6960 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6961 md
.slot
[curr
].user_template
= -1;
6963 if (manual_bundling_off
)
6965 manual_bundling
= 0;
6968 curr
= (curr
+ 1) % NUM_SLOTS
;
6969 idesc
= md
.slot
[curr
].idesc
;
6972 /* A user template was specified, but the first following instruction did
6973 not fit. This can happen with or without manual bundling. */
6974 if (md
.num_slots_in_use
> 0 && last_slot
< 0)
6976 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6977 _("`%s' does not fit into %s template"),
6978 idesc
->name
, ia64_templ_desc
[template_val
].name
);
6979 /* Drop first insn so we don't livelock. */
6980 --md
.num_slots_in_use
;
6981 know (curr
== first
);
6982 ia64_free_opcode (md
.slot
[curr
].idesc
);
6983 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6984 md
.slot
[curr
].user_template
= -1;
6986 else if (manual_bundling
> 0)
6988 if (md
.num_slots_in_use
> 0)
6991 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6992 _("`%s' does not fit into bundle"), idesc
->name
);
6997 if (template_val
== 2)
6999 else if (last_slot
== 0)
7000 where
= "slots 2 or 3";
7003 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7004 _("`%s' can't go in %s of %s template"),
7005 idesc
->name
, where
, ia64_templ_desc
[template_val
].name
);
7009 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7010 _("Missing '}' at end of file"));
7013 know (md
.num_slots_in_use
< NUM_SLOTS
);
7015 t0
= end_of_insn_group
| (template_val
<< 1) | (insn
[0] << 5) | (insn
[1] << 46);
7016 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
7018 number_to_chars_littleendian (f
+ 0, t0
, 8);
7019 number_to_chars_littleendian (f
+ 8, t1
, 8);
7023 md_parse_option (int c
, char *arg
)
7028 /* Switches from the Intel assembler. */
7030 if (strcmp (arg
, "ilp64") == 0
7031 || strcmp (arg
, "lp64") == 0
7032 || strcmp (arg
, "p64") == 0)
7034 md
.flags
|= EF_IA_64_ABI64
;
7036 else if (strcmp (arg
, "ilp32") == 0)
7038 md
.flags
&= ~EF_IA_64_ABI64
;
7040 else if (strcmp (arg
, "le") == 0)
7042 md
.flags
&= ~EF_IA_64_BE
;
7043 default_big_endian
= 0;
7045 else if (strcmp (arg
, "be") == 0)
7047 md
.flags
|= EF_IA_64_BE
;
7048 default_big_endian
= 1;
7050 else if (strncmp (arg
, "unwind-check=", 13) == 0)
7053 if (strcmp (arg
, "warning") == 0)
7054 md
.unwind_check
= unwind_check_warning
;
7055 else if (strcmp (arg
, "error") == 0)
7056 md
.unwind_check
= unwind_check_error
;
7060 else if (strncmp (arg
, "hint.b=", 7) == 0)
7063 if (strcmp (arg
, "ok") == 0)
7064 md
.hint_b
= hint_b_ok
;
7065 else if (strcmp (arg
, "warning") == 0)
7066 md
.hint_b
= hint_b_warning
;
7067 else if (strcmp (arg
, "error") == 0)
7068 md
.hint_b
= hint_b_error
;
7072 else if (strncmp (arg
, "tune=", 5) == 0)
7075 if (strcmp (arg
, "itanium1") == 0)
7077 else if (strcmp (arg
, "itanium2") == 0)
7087 if (strcmp (arg
, "so") == 0)
7089 /* Suppress signon message. */
7091 else if (strcmp (arg
, "pi") == 0)
7093 /* Reject privileged instructions. FIXME */
7095 else if (strcmp (arg
, "us") == 0)
7097 /* Allow union of signed and unsigned range. FIXME */
7099 else if (strcmp (arg
, "close_fcalls") == 0)
7101 /* Do not resolve global function calls. */
7108 /* temp[="prefix"] Insert temporary labels into the object file
7109 symbol table prefixed by "prefix".
7110 Default prefix is ":temp:".
7115 /* indirect=<tgt> Assume unannotated indirect branches behavior
7116 according to <tgt> --
7117 exit: branch out from the current context (default)
7118 labels: all labels in context may be branch targets
7120 if (strncmp (arg
, "indirect=", 9) != 0)
7125 /* -X conflicts with an ignored option, use -x instead */
7127 if (!arg
|| strcmp (arg
, "explicit") == 0)
7129 /* set default mode to explicit */
7130 md
.default_explicit_mode
= 1;
7133 else if (strcmp (arg
, "auto") == 0)
7135 md
.default_explicit_mode
= 0;
7137 else if (strcmp (arg
, "none") == 0)
7141 else if (strcmp (arg
, "debug") == 0)
7145 else if (strcmp (arg
, "debugx") == 0)
7147 md
.default_explicit_mode
= 1;
7150 else if (strcmp (arg
, "debugn") == 0)
7157 as_bad (_("Unrecognized option '-x%s'"), arg
);
7162 /* nops Print nops statistics. */
7165 /* GNU specific switches for gcc. */
7166 case OPTION_MCONSTANT_GP
:
7167 md
.flags
|= EF_IA_64_CONS_GP
;
7170 case OPTION_MAUTO_PIC
:
7171 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7182 md_show_usage (FILE *stream
)
7186 --mconstant-gp mark output file as using the constant-GP model\n\
7187 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7188 --mauto-pic mark output file as using the constant-GP model\n\
7189 without function descriptors (sets ELF header flag\n\
7190 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7191 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7192 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7193 -mtune=[itanium1|itanium2]\n\
7194 tune for a specific CPU (default -mtune=itanium2)\n\
7195 -munwind-check=[warning|error]\n\
7196 unwind directive check (default -munwind-check=warning)\n\
7197 -mhint.b=[ok|warning|error]\n\
7198 hint.b check (default -mhint.b=error)\n\
7199 -x | -xexplicit turn on dependency violation checking\n"), stream
);
7200 /* Note for translators: "automagically" can be translated as "automatically" here. */
7202 -xauto automagically remove dependency violations (default)\n\
7203 -xnone turn off dependency violation checking\n\
7204 -xdebug debug dependency violation checker\n\
7205 -xdebugn debug dependency violation checker but turn off\n\
7206 dependency violation checking\n\
7207 -xdebugx debug dependency violation checker and turn on\n\
7208 dependency violation checking\n"),
7213 ia64_after_parse_args (void)
7215 if (debug_type
== DEBUG_STABS
)
7216 as_fatal (_("--gstabs is not supported for ia64"));
7219 /* Return true if TYPE fits in TEMPL at SLOT. */
7222 match (int templ
, int type
, int slot
)
7224 enum ia64_unit unit
;
7227 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7230 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7232 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7234 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7235 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7236 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7237 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7238 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7239 default: result
= 0; break;
7244 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7245 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7246 type M or I would fit in TEMPL at SLOT. */
7249 extra_goodness (int templ
, int slot
)
7254 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7256 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7262 if (match (templ
, IA64_TYPE_M
, slot
)
7263 || match (templ
, IA64_TYPE_I
, slot
))
7264 /* Favor M- and I-unit NOPs. We definitely want to avoid
7265 F-unit and B-unit may cause split-issue or less-than-optimal
7266 branch-prediction. */
7277 /* This function is called once, at assembler startup time. It sets
7278 up all the tables, etc. that the MD part of the assembler will need
7279 that can be determined before arguments are parsed. */
7283 int i
, j
, k
, t
, goodness
, best
, ok
;
7288 md
.explicit_mode
= md
.default_explicit_mode
;
7290 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7292 /* Make sure function pointers get initialized. */
7293 target_big_endian
= -1;
7294 dot_byteorder (default_big_endian
);
7296 alias_hash
= hash_new ();
7297 alias_name_hash
= hash_new ();
7298 secalias_hash
= hash_new ();
7299 secalias_name_hash
= hash_new ();
7301 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7302 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7303 &zero_address_frag
);
7305 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7306 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7307 &zero_address_frag
);
7309 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7310 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7311 &zero_address_frag
);
7313 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7314 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7315 &zero_address_frag
);
7317 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7318 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7319 &zero_address_frag
);
7321 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7322 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7323 &zero_address_frag
);
7325 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7326 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7327 &zero_address_frag
);
7329 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7330 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7331 &zero_address_frag
);
7333 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7334 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7335 &zero_address_frag
);
7337 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7338 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7339 &zero_address_frag
);
7341 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7342 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7343 &zero_address_frag
);
7345 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7346 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7347 &zero_address_frag
);
7349 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7350 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7351 &zero_address_frag
);
7353 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7354 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7355 &zero_address_frag
);
7357 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7358 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7359 &zero_address_frag
);
7361 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7362 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7363 &zero_address_frag
);
7365 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7366 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7367 &zero_address_frag
);
7370 pseudo_func
[FUNC_SLOTCOUNT_RELOC
].u
.sym
=
7371 symbol_new (".<slotcount>", undefined_section
, FUNC_SLOTCOUNT_RELOC
,
7372 &zero_address_frag
);
7375 if (md
.tune
!= itanium1
)
7377 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7379 le_nop_stop
[0] = 0x9;
7382 /* Compute the table of best templates. We compute goodness as a
7383 base 4 value, in which each match counts for 3. Match-failures
7384 result in NOPs and we use extra_goodness() to pick the execution
7385 units that are best suited for issuing the NOP. */
7386 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7387 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7388 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7391 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7394 if (match (t
, i
, 0))
7396 if (match (t
, j
, 1))
7398 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7399 goodness
= 3 + 3 + 3;
7401 goodness
= 3 + 3 + extra_goodness (t
, 2);
7403 else if (match (t
, j
, 2))
7404 goodness
= 3 + 3 + extra_goodness (t
, 1);
7408 goodness
+= extra_goodness (t
, 1);
7409 goodness
+= extra_goodness (t
, 2);
7412 else if (match (t
, i
, 1))
7414 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7417 goodness
= 3 + extra_goodness (t
, 2);
7419 else if (match (t
, i
, 2))
7420 goodness
= 3 + extra_goodness (t
, 1);
7422 if (goodness
> best
)
7425 best_template
[i
][j
][k
] = t
;
7430 #ifdef DEBUG_TEMPLATES
7431 /* For debugging changes to the best_template calculations. We don't care
7432 about combinations with invalid instructions, so start the loops at 1. */
7433 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7434 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7435 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7437 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7439 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7441 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7445 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7446 md
.slot
[i
].user_template
= -1;
7448 md
.pseudo_hash
= hash_new ();
7449 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7451 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7452 (void *) (pseudo_opcode
+ i
));
7454 as_fatal (_("ia64.md_begin: can't hash `%s': %s"),
7455 pseudo_opcode
[i
].name
, err
);
7458 md
.reg_hash
= hash_new ();
7459 md
.dynreg_hash
= hash_new ();
7460 md
.const_hash
= hash_new ();
7461 md
.entry_hash
= hash_new ();
7463 /* general registers: */
7464 declare_register_set ("r", 128, REG_GR
);
7465 declare_register ("gp", REG_GR
+ 1);
7466 declare_register ("sp", REG_GR
+ 12);
7467 declare_register ("tp", REG_GR
+ 13);
7468 declare_register_set ("ret", 4, REG_GR
+ 8);
7470 /* floating point registers: */
7471 declare_register_set ("f", 128, REG_FR
);
7472 declare_register_set ("farg", 8, REG_FR
+ 8);
7473 declare_register_set ("fret", 8, REG_FR
+ 8);
7475 /* branch registers: */
7476 declare_register_set ("b", 8, REG_BR
);
7477 declare_register ("rp", REG_BR
+ 0);
7479 /* predicate registers: */
7480 declare_register_set ("p", 64, REG_P
);
7481 declare_register ("pr", REG_PR
);
7482 declare_register ("pr.rot", REG_PR_ROT
);
7484 /* application registers: */
7485 declare_register_set ("ar", 128, REG_AR
);
7486 for (i
= 0; i
< NELEMS (ar
); ++i
)
7487 declare_register (ar
[i
].name
, REG_AR
+ ar
[i
].regnum
);
7489 /* control registers: */
7490 declare_register_set ("cr", 128, REG_CR
);
7491 for (i
= 0; i
< NELEMS (cr
); ++i
)
7492 declare_register (cr
[i
].name
, REG_CR
+ cr
[i
].regnum
);
7494 /* dahr registers: */
7495 declare_register_set ("dahr", 8, REG_DAHR
);
7497 declare_register ("ip", REG_IP
);
7498 declare_register ("cfm", REG_CFM
);
7499 declare_register ("psr", REG_PSR
);
7500 declare_register ("psr.l", REG_PSR_L
);
7501 declare_register ("psr.um", REG_PSR_UM
);
7503 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7505 unsigned int regnum
= indirect_reg
[i
].regnum
;
7507 md
.indregsym
[regnum
- IND_CPUID
] = declare_register (indirect_reg
[i
].name
, regnum
);
7510 /* pseudo-registers used to specify unwind info: */
7511 declare_register ("psp", REG_PSP
);
7513 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7515 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7516 (void *) (const_bits
+ i
));
7518 as_fatal (_("Inserting \"%s\" into constant hash table failed: %s"),
7522 /* Set the architecture and machine depending on defaults and command line
7524 if (md
.flags
& EF_IA_64_ABI64
)
7525 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7527 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7530 as_warn (_("Could not set architecture and machine"));
7532 /* Set the pointer size and pointer shift size depending on md.flags */
7534 if (md
.flags
& EF_IA_64_ABI64
)
7536 md
.pointer_size
= 8; /* pointers are 8 bytes */
7537 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7541 md
.pointer_size
= 4; /* pointers are 4 bytes */
7542 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7545 md
.mem_offset
.hint
= 0;
7548 md
.entry_labels
= NULL
;
7551 /* Set the default options in md. Cannot do this in md_begin because
7552 that is called after md_parse_option which is where we set the
7553 options in md based on command line options. */
7556 ia64_init (int argc ATTRIBUTE_UNUSED
, char **argv ATTRIBUTE_UNUSED
)
7558 md
.flags
= MD_FLAGS_DEFAULT
;
7560 /* Don't turn on dependency checking for VMS, doesn't work. */
7563 /* FIXME: We should change it to unwind_check_error someday. */
7564 md
.unwind_check
= unwind_check_warning
;
7565 md
.hint_b
= hint_b_error
;
7569 /* Return a string for the target object file format. */
7572 ia64_target_format (void)
7574 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7576 if (md
.flags
& EF_IA_64_BE
)
7578 if (md
.flags
& EF_IA_64_ABI64
)
7579 #if defined(TE_AIX50)
7580 return "elf64-ia64-aix-big";
7581 #elif defined(TE_HPUX)
7582 return "elf64-ia64-hpux-big";
7584 return "elf64-ia64-big";
7587 #if defined(TE_AIX50)
7588 return "elf32-ia64-aix-big";
7589 #elif defined(TE_HPUX)
7590 return "elf32-ia64-hpux-big";
7592 return "elf32-ia64-big";
7597 if (md
.flags
& EF_IA_64_ABI64
)
7598 #if defined (TE_AIX50)
7599 return "elf64-ia64-aix-little";
7600 #elif defined (TE_VMS)
7602 md
.flags
|= EF_IA_64_ARCHVER_1
;
7603 return "elf64-ia64-vms";
7606 return "elf64-ia64-little";
7610 return "elf32-ia64-aix-little";
7612 return "elf32-ia64-little";
7617 return "unknown-format";
7621 ia64_end_of_source (void)
7623 /* terminate insn group upon reaching end of file: */
7624 insn_group_break (1, 0, 0);
7626 /* emits slots we haven't written yet: */
7627 ia64_flush_insns ();
7629 bfd_set_private_flags (stdoutput
, md
.flags
);
7631 md
.mem_offset
.hint
= 0;
7635 ia64_start_line (void)
7640 /* Make sure we don't reference input_line_pointer[-1] when that's
7646 if (md
.qp
.X_op
== O_register
)
7647 as_bad (_("qualifying predicate not followed by instruction"));
7648 md
.qp
.X_op
= O_absent
;
7650 if (ignore_input ())
7653 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7655 if (md
.detect_dv
&& !md
.explicit_mode
)
7662 as_warn (_("Explicit stops are ignored in auto mode"));
7666 insn_group_break (1, 0, 0);
7668 else if (input_line_pointer
[-1] == '{')
7670 if (md
.manual_bundling
)
7671 as_warn (_("Found '{' when manual bundling is already turned on"));
7673 CURR_SLOT
.manual_bundling_on
= 1;
7674 md
.manual_bundling
= 1;
7676 /* Bundling is only acceptable in explicit mode
7677 or when in default automatic mode. */
7678 if (md
.detect_dv
&& !md
.explicit_mode
)
7680 if (!md
.mode_explicitly_set
7681 && !md
.default_explicit_mode
)
7684 as_warn (_("Found '{' after explicit switch to automatic mode"));
7687 else if (input_line_pointer
[-1] == '}')
7689 if (!md
.manual_bundling
)
7690 as_warn (_("Found '}' when manual bundling is off"));
7692 PREV_SLOT
.manual_bundling_off
= 1;
7693 md
.manual_bundling
= 0;
7695 /* switch back to automatic mode, if applicable */
7698 && !md
.mode_explicitly_set
7699 && !md
.default_explicit_mode
)
7704 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7706 static int defining_tag
= 0;
7709 ia64_unrecognized_line (int ch
)
7714 expression_and_evaluate (&md
.qp
);
7715 if (*input_line_pointer
++ != ')')
7717 as_bad (_("Expected ')'"));
7720 if (md
.qp
.X_op
!= O_register
)
7722 as_bad (_("Qualifying predicate expected"));
7725 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7727 as_bad (_("Predicate register expected"));
7739 if (md
.qp
.X_op
== O_register
)
7741 as_bad (_("Tag must come before qualifying predicate."));
7745 /* This implements just enough of read_a_source_file in read.c to
7746 recognize labels. */
7747 if (is_name_beginner (*input_line_pointer
))
7749 s
= input_line_pointer
;
7750 c
= get_symbol_end ();
7752 else if (LOCAL_LABELS_FB
7753 && ISDIGIT (*input_line_pointer
))
7756 while (ISDIGIT (*input_line_pointer
))
7757 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7758 fb_label_instance_inc (temp
);
7759 s
= fb_label_name (temp
, 0);
7760 c
= *input_line_pointer
;
7769 /* Put ':' back for error messages' sake. */
7770 *input_line_pointer
++ = ':';
7771 as_bad (_("Expected ':'"));
7778 /* Put ':' back for error messages' sake. */
7779 *input_line_pointer
++ = ':';
7780 if (*input_line_pointer
++ != ']')
7782 as_bad (_("Expected ']'"));
7787 as_bad (_("Tag name expected"));
7797 /* Not a valid line. */
7802 ia64_frob_label (struct symbol
*sym
)
7804 struct label_fix
*fix
;
7806 /* Tags need special handling since they are not bundle breaks like
7810 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7812 fix
->next
= CURR_SLOT
.tag_fixups
;
7813 fix
->dw2_mark_labels
= FALSE
;
7814 CURR_SLOT
.tag_fixups
= fix
;
7819 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7821 md
.last_text_seg
= now_seg
;
7822 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7824 fix
->next
= CURR_SLOT
.label_fixups
;
7825 fix
->dw2_mark_labels
= dwarf2_loc_mark_labels
;
7826 CURR_SLOT
.label_fixups
= fix
;
7828 /* Keep track of how many code entry points we've seen. */
7829 if (md
.path
== md
.maxpaths
)
7832 md
.entry_labels
= (const char **)
7833 xrealloc ((void *) md
.entry_labels
,
7834 md
.maxpaths
* sizeof (char *));
7836 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7841 /* The HP-UX linker will give unresolved symbol errors for symbols
7842 that are declared but unused. This routine removes declared,
7843 unused symbols from an object. */
7845 ia64_frob_symbol (struct symbol
*sym
)
7847 if ((S_GET_SEGMENT (sym
) == bfd_und_section_ptr
&& ! symbol_used_p (sym
) &&
7848 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7849 || (S_GET_SEGMENT (sym
) == bfd_abs_section_ptr
7850 && ! S_IS_EXTERNAL (sym
)))
7857 ia64_flush_pending_output (void)
7859 if (!md
.keep_pending_output
7860 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7862 /* ??? This causes many unnecessary stop bits to be emitted.
7863 Unfortunately, it isn't clear if it is safe to remove this. */
7864 insn_group_break (1, 0, 0);
7865 ia64_flush_insns ();
7869 /* Do ia64-specific expression optimization. All that's done here is
7870 to transform index expressions that are either due to the indexing
7871 of rotating registers or due to the indexing of indirect register
7874 ia64_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
7878 resolve_expression (l
);
7879 if (l
->X_op
== O_register
)
7881 unsigned num_regs
= l
->X_add_number
>> 16;
7883 resolve_expression (r
);
7886 /* Left side is a .rotX-allocated register. */
7887 if (r
->X_op
!= O_constant
)
7889 as_bad (_("Rotating register index must be a non-negative constant"));
7890 r
->X_add_number
= 0;
7892 else if ((valueT
) r
->X_add_number
>= num_regs
)
7894 as_bad (_("Index out of range 0..%u"), num_regs
- 1);
7895 r
->X_add_number
= 0;
7897 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7900 else if (l
->X_add_number
>= IND_CPUID
&& l
->X_add_number
<= IND_RR
)
7902 if (r
->X_op
!= O_register
7903 || r
->X_add_number
< REG_GR
7904 || r
->X_add_number
> REG_GR
+ 127)
7906 as_bad (_("Indirect register index must be a general register"));
7907 r
->X_add_number
= REG_GR
;
7910 l
->X_op_symbol
= md
.indregsym
[l
->X_add_number
- IND_CPUID
];
7911 l
->X_add_number
= r
->X_add_number
;
7915 as_bad (_("Index can only be applied to rotating or indirect registers"));
7916 /* Fall back to some register use of which has as little as possible
7917 side effects, to minimize subsequent error messages. */
7918 l
->X_op
= O_register
;
7919 l
->X_add_number
= REG_GR
+ 3;
7924 ia64_parse_name (char *name
, expressionS
*e
, char *nextcharP
)
7926 struct const_desc
*cdesc
;
7927 struct dynreg
*dr
= 0;
7934 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7936 /* Find what relocation pseudo-function we're dealing with. */
7937 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7938 if (pseudo_func
[idx
].name
7939 && pseudo_func
[idx
].name
[0] == name
[1]
7940 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7942 pseudo_type
= pseudo_func
[idx
].type
;
7945 switch (pseudo_type
)
7947 case PSEUDO_FUNC_RELOC
:
7948 end
= input_line_pointer
;
7949 if (*nextcharP
!= '(')
7951 as_bad (_("Expected '('"));
7955 ++input_line_pointer
;
7957 if (*input_line_pointer
!= ')')
7959 as_bad (_("Missing ')'"));
7963 ++input_line_pointer
;
7965 if (idx
== FUNC_SLOTCOUNT_RELOC
)
7967 /* @slotcount can accept any expression. Canonicalize. */
7968 e
->X_add_symbol
= make_expr_symbol (e
);
7970 e
->X_add_number
= 0;
7973 if (e
->X_op
!= O_symbol
)
7975 if (e
->X_op
!= O_pseudo_fixup
)
7977 as_bad (_("Not a symbolic expression"));
7980 if (idx
!= FUNC_LT_RELATIVE
)
7982 as_bad (_("Illegal combination of relocation functions"));
7985 switch (S_GET_VALUE (e
->X_op_symbol
))
7987 case FUNC_FPTR_RELATIVE
:
7988 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7989 case FUNC_DTP_MODULE
:
7990 idx
= FUNC_LT_DTP_MODULE
; break;
7991 case FUNC_DTP_RELATIVE
:
7992 idx
= FUNC_LT_DTP_RELATIVE
; break;
7993 case FUNC_TP_RELATIVE
:
7994 idx
= FUNC_LT_TP_RELATIVE
; break;
7996 as_bad (_("Illegal combination of relocation functions"));
8000 /* Make sure gas doesn't get rid of local symbols that are used
8002 e
->X_op
= O_pseudo_fixup
;
8003 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
8005 *nextcharP
= *input_line_pointer
;
8008 case PSEUDO_FUNC_CONST
:
8009 e
->X_op
= O_constant
;
8010 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
8013 case PSEUDO_FUNC_REG
:
8014 e
->X_op
= O_register
;
8015 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
8024 /* first see if NAME is a known register name: */
8025 sym
= hash_find (md
.reg_hash
, name
);
8028 e
->X_op
= O_register
;
8029 e
->X_add_number
= S_GET_VALUE (sym
);
8033 cdesc
= hash_find (md
.const_hash
, name
);
8036 e
->X_op
= O_constant
;
8037 e
->X_add_number
= cdesc
->value
;
8041 /* check for inN, locN, or outN: */
8046 if (name
[1] == 'n' && ISDIGIT (name
[2]))
8054 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
8062 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
8073 /* Ignore register numbers with leading zeroes, except zero itself. */
8074 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
8076 unsigned long regnum
;
8078 /* The name is inN, locN, or outN; parse the register number. */
8079 regnum
= strtoul (name
+ idx
, &end
, 10);
8080 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
8082 if (regnum
>= dr
->num_regs
)
8085 as_bad (_("No current frame"));
8087 as_bad (_("Register number out of range 0..%u"),
8091 e
->X_op
= O_register
;
8092 e
->X_add_number
= dr
->base
+ regnum
;
8097 end
= alloca (strlen (name
) + 1);
8099 name
= ia64_canonicalize_symbol_name (end
);
8100 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8102 /* We've got ourselves the name of a rotating register set.
8103 Store the base register number in the low 16 bits of
8104 X_add_number and the size of the register set in the top 16
8106 e
->X_op
= O_register
;
8107 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8113 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8116 ia64_canonicalize_symbol_name (char *name
)
8118 size_t len
= strlen (name
), full
= len
;
8120 while (len
> 0 && name
[len
- 1] == '#')
8125 as_bad (_("Standalone `#' is illegal"));
8127 else if (len
< full
- 1)
8128 as_warn (_("Redundant `#' suffix operators"));
8133 /* Return true if idesc is a conditional branch instruction. This excludes
8134 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8135 because they always read/write resources regardless of the value of the
8136 qualifying predicate. br.ia must always use p0, and hence is always
8137 taken. Thus this function returns true for branches which can fall
8138 through, and which use no resources if they do fall through. */
8141 is_conditional_branch (struct ia64_opcode
*idesc
)
8143 /* br is a conditional branch. Everything that starts with br. except
8144 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8145 Everything that starts with brl is a conditional branch. */
8146 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8147 && (idesc
->name
[2] == '\0'
8148 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8149 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8150 || idesc
->name
[2] == 'l'
8151 /* br.cond, br.call, br.clr */
8152 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8153 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8154 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8157 /* Return whether the given opcode is a taken branch. If there's any doubt,
8161 is_taken_branch (struct ia64_opcode
*idesc
)
8163 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8164 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8167 /* Return whether the given opcode is an interruption or rfi. If there's any
8168 doubt, returns zero. */
8171 is_interruption_or_rfi (struct ia64_opcode
*idesc
)
8173 if (strcmp (idesc
->name
, "rfi") == 0)
8178 /* Returns the index of the given dependency in the opcode's list of chks, or
8179 -1 if there is no dependency. */
8182 depends_on (int depind
, struct ia64_opcode
*idesc
)
8185 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8186 for (i
= 0; i
< dep
->nchks
; i
++)
8188 if (depind
== DEP (dep
->chks
[i
]))
8194 /* Determine a set of specific resources used for a particular resource
8195 class. Returns the number of specific resources identified For those
8196 cases which are not determinable statically, the resource returned is
8199 Meanings of value in 'NOTE':
8200 1) only read/write when the register number is explicitly encoded in the
8202 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8203 accesses CFM when qualifying predicate is in the rotating region.
8204 3) general register value is used to specify an indirect register; not
8205 determinable statically.
8206 4) only read the given resource when bits 7:0 of the indirect index
8207 register value does not match the register number of the resource; not
8208 determinable statically.
8209 5) all rules are implementation specific.
8210 6) only when both the index specified by the reader and the index specified
8211 by the writer have the same value in bits 63:61; not determinable
8213 7) only access the specified resource when the corresponding mask bit is
8215 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8216 only read when these insns reference FR2-31
8217 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8218 written when these insns write FR32-127
8219 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8221 11) The target predicates are written independently of PR[qp], but source
8222 registers are only read if PR[qp] is true. Since the state of PR[qp]
8223 cannot statically be determined, all source registers are marked used.
8224 12) This insn only reads the specified predicate register when that
8225 register is the PR[qp].
8226 13) This reference to ld-c only applies to the GR whose value is loaded
8227 with data returned from memory, not the post-incremented address register.
8228 14) The RSE resource includes the implementation-specific RSE internal
8229 state resources. At least one (and possibly more) of these resources are
8230 read by each instruction listed in IC:rse-readers. At least one (and
8231 possibly more) of these resources are written by each insn listed in
8233 15+16) Represents reserved instructions, which the assembler does not
8235 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and
8236 mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up.
8238 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8239 this code; there are no dependency violations based on memory access.
8242 #define MAX_SPECS 256
8247 specify_resource (const struct ia64_dependency
*dep
,
8248 struct ia64_opcode
*idesc
,
8249 /* is this a DV chk or a DV reg? */
8251 /* returned specific resources */
8252 struct rsrc specs
[MAX_SPECS
],
8253 /* resource note for this insn's usage */
8255 /* which execution path to examine */
8263 if (dep
->mode
== IA64_DV_WAW
8264 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8265 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8268 /* template for any resources we identify */
8269 tmpl
.dependency
= dep
;
8271 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8272 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8273 tmpl
.link_to_qp_branch
= 1;
8274 tmpl
.mem_offset
.hint
= 0;
8275 tmpl
.mem_offset
.offset
= 0;
8276 tmpl
.mem_offset
.base
= 0;
8279 tmpl
.cmp_type
= CMP_NONE
;
8286 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8287 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8288 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8290 /* we don't need to track these */
8291 if (dep
->semantics
== IA64_DVS_NONE
)
8294 switch (dep
->specifier
)
8299 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8301 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8302 if (regno
>= 0 && regno
<= 7)
8304 specs
[count
] = tmpl
;
8305 specs
[count
++].index
= regno
;
8311 for (i
= 0; i
< 8; i
++)
8313 specs
[count
] = tmpl
;
8314 specs
[count
++].index
= i
;
8323 case IA64_RS_AR_UNAT
:
8324 /* This is a mov =AR or mov AR= instruction. */
8325 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8327 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8328 if (regno
== AR_UNAT
)
8330 specs
[count
++] = tmpl
;
8335 /* This is a spill/fill, or other instruction that modifies the
8338 /* Unless we can determine the specific bits used, mark the whole
8339 thing; bits 8:3 of the memory address indicate the bit used in
8340 UNAT. The .mem.offset hint may be used to eliminate a small
8341 subset of conflicts. */
8342 specs
[count
] = tmpl
;
8343 if (md
.mem_offset
.hint
)
8346 fprintf (stderr
, " Using hint for spill/fill\n");
8347 /* The index isn't actually used, just set it to something
8348 approximating the bit index. */
8349 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8350 specs
[count
].mem_offset
.hint
= 1;
8351 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8352 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8356 specs
[count
++].specific
= 0;
8364 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8366 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8367 if ((regno
>= 8 && regno
<= 15)
8368 || (regno
>= 20 && regno
<= 23)
8369 || (regno
>= 31 && regno
<= 39)
8370 || (regno
>= 41 && regno
<= 47)
8371 || (regno
>= 67 && regno
<= 111))
8373 specs
[count
] = tmpl
;
8374 specs
[count
++].index
= regno
;
8387 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8389 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8390 if ((regno
>= 48 && regno
<= 63)
8391 || (regno
>= 112 && regno
<= 127))
8393 specs
[count
] = tmpl
;
8394 specs
[count
++].index
= regno
;
8400 for (i
= 48; i
< 64; i
++)
8402 specs
[count
] = tmpl
;
8403 specs
[count
++].index
= i
;
8405 for (i
= 112; i
< 128; i
++)
8407 specs
[count
] = tmpl
;
8408 specs
[count
++].index
= i
;
8426 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8427 if (idesc
->operands
[i
] == IA64_OPND_B1
8428 || idesc
->operands
[i
] == IA64_OPND_B2
)
8430 specs
[count
] = tmpl
;
8431 specs
[count
++].index
=
8432 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8437 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8438 if (idesc
->operands
[i
] == IA64_OPND_B1
8439 || idesc
->operands
[i
] == IA64_OPND_B2
)
8441 specs
[count
] = tmpl
;
8442 specs
[count
++].index
=
8443 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8449 case IA64_RS_CPUID
: /* four or more registers */
8452 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8454 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8455 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8458 specs
[count
] = tmpl
;
8459 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8463 specs
[count
] = tmpl
;
8464 specs
[count
++].specific
= 0;
8474 case IA64_RS_DBR
: /* four or more registers */
8477 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8479 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8480 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8483 specs
[count
] = tmpl
;
8484 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8488 specs
[count
] = tmpl
;
8489 specs
[count
++].specific
= 0;
8493 else if (note
== 0 && !rsrc_write
)
8495 specs
[count
] = tmpl
;
8496 specs
[count
++].specific
= 0;
8504 case IA64_RS_IBR
: /* four or more registers */
8507 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8509 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8510 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8513 specs
[count
] = tmpl
;
8514 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8518 specs
[count
] = tmpl
;
8519 specs
[count
++].specific
= 0;
8532 /* These are implementation specific. Force all references to
8533 conflict with all other references. */
8534 specs
[count
] = tmpl
;
8535 specs
[count
++].specific
= 0;
8543 case IA64_RS_PKR
: /* 16 or more registers */
8544 if (note
== 3 || note
== 4)
8546 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8548 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8549 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8554 specs
[count
] = tmpl
;
8555 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8558 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8560 /* Uses all registers *except* the one in R3. */
8561 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8563 specs
[count
] = tmpl
;
8564 specs
[count
++].index
= i
;
8570 specs
[count
] = tmpl
;
8571 specs
[count
++].specific
= 0;
8578 specs
[count
] = tmpl
;
8579 specs
[count
++].specific
= 0;
8583 case IA64_RS_PMC
: /* four or more registers */
8586 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8587 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8590 int reg_index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8592 int regno
= CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_GR
;
8593 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8596 specs
[count
] = tmpl
;
8597 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8601 specs
[count
] = tmpl
;
8602 specs
[count
++].specific
= 0;
8612 case IA64_RS_PMD
: /* four or more registers */
8615 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8617 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8618 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8621 specs
[count
] = tmpl
;
8622 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8626 specs
[count
] = tmpl
;
8627 specs
[count
++].specific
= 0;
8637 case IA64_RS_RR
: /* eight registers */
8640 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8642 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8643 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8646 specs
[count
] = tmpl
;
8647 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8651 specs
[count
] = tmpl
;
8652 specs
[count
++].specific
= 0;
8656 else if (note
== 0 && !rsrc_write
)
8658 specs
[count
] = tmpl
;
8659 specs
[count
++].specific
= 0;
8667 case IA64_RS_CR_IRR
:
8670 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8671 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8673 && idesc
->operands
[1] == IA64_OPND_CR3
8676 for (i
= 0; i
< 4; i
++)
8678 specs
[count
] = tmpl
;
8679 specs
[count
++].index
= CR_IRR0
+ i
;
8685 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8686 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8688 && regno
<= CR_IRR3
)
8690 specs
[count
] = tmpl
;
8691 specs
[count
++].index
= regno
;
8700 case IA64_RS_CR_IIB
:
8707 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8708 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8709 && (regno
== CR_IIB0
|| regno
== CR_IIB1
))
8711 specs
[count
] = tmpl
;
8712 specs
[count
++].index
= regno
;
8717 case IA64_RS_CR_LRR
:
8724 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8725 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8726 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8728 specs
[count
] = tmpl
;
8729 specs
[count
++].index
= regno
;
8737 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8739 specs
[count
] = tmpl
;
8740 specs
[count
++].index
=
8741 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8753 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DAHR3
)
8755 specs
[count
] = tmpl
;
8756 specs
[count
++].index
=
8757 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_DAHR
;
8772 else if (rsrc_write
)
8774 if (dep
->specifier
== IA64_RS_FRb
8775 && idesc
->operands
[0] == IA64_OPND_F1
)
8777 specs
[count
] = tmpl
;
8778 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8783 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8785 if (idesc
->operands
[i
] == IA64_OPND_F2
8786 || idesc
->operands
[i
] == IA64_OPND_F3
8787 || idesc
->operands
[i
] == IA64_OPND_F4
)
8789 specs
[count
] = tmpl
;
8790 specs
[count
++].index
=
8791 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8800 /* This reference applies only to the GR whose value is loaded with
8801 data returned from memory. */
8802 specs
[count
] = tmpl
;
8803 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8809 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8810 if (idesc
->operands
[i
] == IA64_OPND_R1
8811 || idesc
->operands
[i
] == IA64_OPND_R2
8812 || idesc
->operands
[i
] == IA64_OPND_R3
)
8814 specs
[count
] = tmpl
;
8815 specs
[count
++].index
=
8816 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8818 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8819 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8820 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8822 specs
[count
] = tmpl
;
8823 specs
[count
++].index
=
8824 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8829 /* Look for anything that reads a GR. */
8830 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8832 if (idesc
->operands
[i
] == IA64_OPND_MR3
8833 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8834 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8835 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8836 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8837 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8838 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8839 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8840 || idesc
->operands
[i
] == IA64_OPND_DAHR_R3
8841 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8842 || ((i
>= idesc
->num_outputs
)
8843 && (idesc
->operands
[i
] == IA64_OPND_R1
8844 || idesc
->operands
[i
] == IA64_OPND_R2
8845 || idesc
->operands
[i
] == IA64_OPND_R3
8846 /* addl source register. */
8847 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8849 specs
[count
] = tmpl
;
8850 specs
[count
++].index
=
8851 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8862 /* This is the same as IA64_RS_PRr, except that the register range is
8863 from 1 - 15, and there are no rotating register reads/writes here. */
8867 for (i
= 1; i
< 16; i
++)
8869 specs
[count
] = tmpl
;
8870 specs
[count
++].index
= i
;
8876 /* Mark only those registers indicated by the mask. */
8879 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8880 for (i
= 1; i
< 16; i
++)
8881 if (mask
& ((valueT
) 1 << i
))
8883 specs
[count
] = tmpl
;
8884 specs
[count
++].index
= i
;
8892 else if (note
== 11) /* note 11 implies note 1 as well */
8896 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8898 if (idesc
->operands
[i
] == IA64_OPND_P1
8899 || idesc
->operands
[i
] == IA64_OPND_P2
)
8901 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8902 if (regno
>= 1 && regno
< 16)
8904 specs
[count
] = tmpl
;
8905 specs
[count
++].index
= regno
;
8915 else if (note
== 12)
8917 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8919 specs
[count
] = tmpl
;
8920 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8927 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8928 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8929 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8930 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8932 if ((idesc
->operands
[0] == IA64_OPND_P1
8933 || idesc
->operands
[0] == IA64_OPND_P2
)
8934 && p1
>= 1 && p1
< 16)
8936 specs
[count
] = tmpl
;
8937 specs
[count
].cmp_type
=
8938 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8939 specs
[count
++].index
= p1
;
8941 if ((idesc
->operands
[1] == IA64_OPND_P1
8942 || idesc
->operands
[1] == IA64_OPND_P2
)
8943 && p2
>= 1 && p2
< 16)
8945 specs
[count
] = tmpl
;
8946 specs
[count
].cmp_type
=
8947 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8948 specs
[count
++].index
= p2
;
8953 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8955 specs
[count
] = tmpl
;
8956 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8958 if (idesc
->operands
[1] == IA64_OPND_PR
)
8960 for (i
= 1; i
< 16; i
++)
8962 specs
[count
] = tmpl
;
8963 specs
[count
++].index
= i
;
8974 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8975 simplified cases of this. */
8979 for (i
= 16; i
< 63; i
++)
8981 specs
[count
] = tmpl
;
8982 specs
[count
++].index
= i
;
8988 /* Mark only those registers indicated by the mask. */
8990 && idesc
->operands
[0] == IA64_OPND_PR
)
8992 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8993 if (mask
& ((valueT
) 1 << 16))
8994 for (i
= 16; i
< 63; i
++)
8996 specs
[count
] = tmpl
;
8997 specs
[count
++].index
= i
;
9001 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
9003 for (i
= 16; i
< 63; i
++)
9005 specs
[count
] = tmpl
;
9006 specs
[count
++].index
= i
;
9014 else if (note
== 11) /* note 11 implies note 1 as well */
9018 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9020 if (idesc
->operands
[i
] == IA64_OPND_P1
9021 || idesc
->operands
[i
] == IA64_OPND_P2
)
9023 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9024 if (regno
>= 16 && regno
< 63)
9026 specs
[count
] = tmpl
;
9027 specs
[count
++].index
= regno
;
9037 else if (note
== 12)
9039 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9041 specs
[count
] = tmpl
;
9042 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9049 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9050 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9051 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9052 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9054 if ((idesc
->operands
[0] == IA64_OPND_P1
9055 || idesc
->operands
[0] == IA64_OPND_P2
)
9056 && p1
>= 16 && p1
< 63)
9058 specs
[count
] = tmpl
;
9059 specs
[count
].cmp_type
=
9060 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9061 specs
[count
++].index
= p1
;
9063 if ((idesc
->operands
[1] == IA64_OPND_P1
9064 || idesc
->operands
[1] == IA64_OPND_P2
)
9065 && p2
>= 16 && p2
< 63)
9067 specs
[count
] = tmpl
;
9068 specs
[count
].cmp_type
=
9069 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9070 specs
[count
++].index
= p2
;
9075 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9077 specs
[count
] = tmpl
;
9078 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9080 if (idesc
->operands
[1] == IA64_OPND_PR
)
9082 for (i
= 16; i
< 63; i
++)
9084 specs
[count
] = tmpl
;
9085 specs
[count
++].index
= i
;
9097 /* Verify that the instruction is using the PSR bit indicated in
9101 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
9103 if (dep
->regindex
< 6)
9105 specs
[count
++] = tmpl
;
9108 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
9110 if (dep
->regindex
< 32
9111 || dep
->regindex
== 35
9112 || dep
->regindex
== 36
9113 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
9115 specs
[count
++] = tmpl
;
9118 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
9120 if (dep
->regindex
< 32
9121 || dep
->regindex
== 35
9122 || dep
->regindex
== 36
9123 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
9125 specs
[count
++] = tmpl
;
9130 /* Several PSR bits have very specific dependencies. */
9131 switch (dep
->regindex
)
9134 specs
[count
++] = tmpl
;
9139 specs
[count
++] = tmpl
;
9143 /* Only certain CR accesses use PSR.ic */
9144 if (idesc
->operands
[0] == IA64_OPND_CR3
9145 || idesc
->operands
[1] == IA64_OPND_CR3
)
9148 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9151 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_CR
;
9168 specs
[count
++] = tmpl
;
9177 specs
[count
++] = tmpl
;
9181 /* Only some AR accesses use cpl */
9182 if (idesc
->operands
[0] == IA64_OPND_AR3
9183 || idesc
->operands
[1] == IA64_OPND_AR3
)
9186 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9189 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_AR
;
9196 && regno
<= AR_K7
))))
9198 specs
[count
++] = tmpl
;
9203 specs
[count
++] = tmpl
;
9213 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9215 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9221 if (mask
& ((valueT
) 1 << dep
->regindex
))
9223 specs
[count
++] = tmpl
;
9228 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9229 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9230 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9231 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9233 if (idesc
->operands
[i
] == IA64_OPND_F1
9234 || idesc
->operands
[i
] == IA64_OPND_F2
9235 || idesc
->operands
[i
] == IA64_OPND_F3
9236 || idesc
->operands
[i
] == IA64_OPND_F4
)
9238 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9239 if (reg
>= min
&& reg
<= max
)
9241 specs
[count
++] = tmpl
;
9248 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9249 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9250 /* mfh is read on writes to FR32-127; mfl is read on writes to
9252 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9254 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9256 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9257 if (reg
>= min
&& reg
<= max
)
9259 specs
[count
++] = tmpl
;
9264 else if (note
== 10)
9266 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9268 if (idesc
->operands
[i
] == IA64_OPND_R1
9269 || idesc
->operands
[i
] == IA64_OPND_R2
9270 || idesc
->operands
[i
] == IA64_OPND_R3
)
9272 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9273 if (regno
>= 16 && regno
<= 31)
9275 specs
[count
++] = tmpl
;
9286 case IA64_RS_AR_FPSR
:
9287 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9289 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9290 if (regno
== AR_FPSR
)
9292 specs
[count
++] = tmpl
;
9297 specs
[count
++] = tmpl
;
9302 /* Handle all AR[REG] resources */
9303 if (note
== 0 || note
== 1)
9305 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9306 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9307 && regno
== dep
->regindex
)
9309 specs
[count
++] = tmpl
;
9311 /* other AR[REG] resources may be affected by AR accesses */
9312 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9315 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9316 switch (dep
->regindex
)
9322 if (regno
== AR_BSPSTORE
)
9324 specs
[count
++] = tmpl
;
9328 (regno
== AR_BSPSTORE
9329 || regno
== AR_RNAT
))
9331 specs
[count
++] = tmpl
;
9336 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9339 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9340 switch (dep
->regindex
)
9345 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9347 specs
[count
++] = tmpl
;
9354 specs
[count
++] = tmpl
;
9364 /* Handle all CR[REG] resources.
9365 ??? FIXME: The rule 17 isn't really handled correctly. */
9366 if (note
== 0 || note
== 1 || note
== 17)
9368 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9370 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9371 if (regno
== dep
->regindex
)
9373 specs
[count
++] = tmpl
;
9375 else if (!rsrc_write
)
9377 /* Reads from CR[IVR] affect other resources. */
9378 if (regno
== CR_IVR
)
9380 if ((dep
->regindex
>= CR_IRR0
9381 && dep
->regindex
<= CR_IRR3
)
9382 || dep
->regindex
== CR_TPR
)
9384 specs
[count
++] = tmpl
;
9391 specs
[count
++] = tmpl
;
9400 case IA64_RS_INSERVICE
:
9401 /* look for write of EOI (67) or read of IVR (65) */
9402 if ((idesc
->operands
[0] == IA64_OPND_CR3
9403 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9404 || (idesc
->operands
[1] == IA64_OPND_CR3
9405 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9407 specs
[count
++] = tmpl
;
9414 specs
[count
++] = tmpl
;
9425 specs
[count
++] = tmpl
;
9429 /* Check if any of the registers accessed are in the rotating region.
9430 mov to/from pr accesses CFM only when qp_regno is in the rotating
9432 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9434 if (idesc
->operands
[i
] == IA64_OPND_R1
9435 || idesc
->operands
[i
] == IA64_OPND_R2
9436 || idesc
->operands
[i
] == IA64_OPND_R3
)
9438 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9439 /* Assumes that md.rot.num_regs is always valid */
9440 if (md
.rot
.num_regs
> 0
9442 && num
< 31 + md
.rot
.num_regs
)
9444 specs
[count
] = tmpl
;
9445 specs
[count
++].specific
= 0;
9448 else if (idesc
->operands
[i
] == IA64_OPND_F1
9449 || idesc
->operands
[i
] == IA64_OPND_F2
9450 || idesc
->operands
[i
] == IA64_OPND_F3
9451 || idesc
->operands
[i
] == IA64_OPND_F4
)
9453 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9456 specs
[count
] = tmpl
;
9457 specs
[count
++].specific
= 0;
9460 else if (idesc
->operands
[i
] == IA64_OPND_P1
9461 || idesc
->operands
[i
] == IA64_OPND_P2
)
9463 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9466 specs
[count
] = tmpl
;
9467 specs
[count
++].specific
= 0;
9471 if (CURR_SLOT
.qp_regno
> 15)
9473 specs
[count
] = tmpl
;
9474 specs
[count
++].specific
= 0;
9479 /* This is the same as IA64_RS_PRr, except simplified to account for
9480 the fact that there is only one register. */
9484 specs
[count
++] = tmpl
;
9489 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9490 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9491 if (mask
& ((valueT
) 1 << 63))
9492 specs
[count
++] = tmpl
;
9494 else if (note
== 11)
9496 if ((idesc
->operands
[0] == IA64_OPND_P1
9497 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9498 || (idesc
->operands
[1] == IA64_OPND_P2
9499 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9501 specs
[count
++] = tmpl
;
9504 else if (note
== 12)
9506 if (CURR_SLOT
.qp_regno
== 63)
9508 specs
[count
++] = tmpl
;
9515 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9516 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9517 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9518 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9521 && (idesc
->operands
[0] == IA64_OPND_P1
9522 || idesc
->operands
[0] == IA64_OPND_P2
))
9524 specs
[count
] = tmpl
;
9525 specs
[count
++].cmp_type
=
9526 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9529 && (idesc
->operands
[1] == IA64_OPND_P1
9530 || idesc
->operands
[1] == IA64_OPND_P2
))
9532 specs
[count
] = tmpl
;
9533 specs
[count
++].cmp_type
=
9534 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9539 if (CURR_SLOT
.qp_regno
== 63)
9541 specs
[count
++] = tmpl
;
9552 /* FIXME we can identify some individual RSE written resources, but RSE
9553 read resources have not yet been completely identified, so for now
9554 treat RSE as a single resource */
9555 if (strncmp (idesc
->name
, "mov", 3) == 0)
9559 if (idesc
->operands
[0] == IA64_OPND_AR3
9560 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9562 specs
[count
++] = tmpl
;
9567 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9569 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9570 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9572 specs
[count
++] = tmpl
;
9575 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9577 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9578 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9579 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9581 specs
[count
++] = tmpl
;
9588 specs
[count
++] = tmpl
;
9593 /* FIXME -- do any of these need to be non-specific? */
9594 specs
[count
++] = tmpl
;
9598 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9605 /* Clear branch flags on marked resources. This breaks the link between the
9606 QP of the marking instruction and a subsequent branch on the same QP. */
9609 clear_qp_branch_flag (valueT mask
)
9612 for (i
= 0; i
< regdepslen
; i
++)
9614 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9615 if ((bit
& mask
) != 0)
9617 regdeps
[i
].link_to_qp_branch
= 0;
9622 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9623 any mutexes which contain one of the PRs and create new ones when
9627 update_qp_mutex (valueT mask
)
9633 while (i
< qp_mutexeslen
)
9635 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9637 /* If it destroys and creates the same mutex, do nothing. */
9638 if (qp_mutexes
[i
].prmask
== mask
9639 && qp_mutexes
[i
].path
== md
.path
)
9650 fprintf (stderr
, " Clearing mutex relation");
9651 print_prmask (qp_mutexes
[i
].prmask
);
9652 fprintf (stderr
, "\n");
9655 /* Deal with the old mutex with more than 3+ PRs only if
9656 the new mutex on the same execution path with it.
9658 FIXME: The 3+ mutex support is incomplete.
9659 dot_pred_rel () may be a better place to fix it. */
9660 if (qp_mutexes
[i
].path
== md
.path
)
9662 /* If it is a proper subset of the mutex, create a
9665 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9668 qp_mutexes
[i
].prmask
&= ~mask
;
9669 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9671 /* Modify the mutex if there are more than one
9679 /* Remove the mutex. */
9680 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9688 add_qp_mutex (mask
);
9693 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9695 Any changes to a PR clears the mutex relations which include that PR. */
9698 clear_qp_mutex (valueT mask
)
9703 while (i
< qp_mutexeslen
)
9705 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9709 fprintf (stderr
, " Clearing mutex relation");
9710 print_prmask (qp_mutexes
[i
].prmask
);
9711 fprintf (stderr
, "\n");
9713 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9720 /* Clear implies relations which contain PRs in the given masks.
9721 P1_MASK indicates the source of the implies relation, while P2_MASK
9722 indicates the implied PR. */
9725 clear_qp_implies (valueT p1_mask
, valueT p2_mask
)
9730 while (i
< qp_implieslen
)
9732 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9733 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9736 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9737 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9738 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9745 /* Add the PRs specified to the list of implied relations. */
9748 add_qp_imply (int p1
, int p2
)
9754 /* p0 is not meaningful here. */
9755 if (p1
== 0 || p2
== 0)
9761 /* If it exists already, ignore it. */
9762 for (i
= 0; i
< qp_implieslen
; i
++)
9764 if (qp_implies
[i
].p1
== p1
9765 && qp_implies
[i
].p2
== p2
9766 && qp_implies
[i
].path
== md
.path
9767 && !qp_implies
[i
].p2_branched
)
9771 if (qp_implieslen
== qp_impliestotlen
)
9773 qp_impliestotlen
+= 20;
9774 qp_implies
= (struct qp_imply
*)
9775 xrealloc ((void *) qp_implies
,
9776 qp_impliestotlen
* sizeof (struct qp_imply
));
9779 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9780 qp_implies
[qp_implieslen
].p1
= p1
;
9781 qp_implies
[qp_implieslen
].p2
= p2
;
9782 qp_implies
[qp_implieslen
].path
= md
.path
;
9783 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9785 /* Add in the implied transitive relations; for everything that p2 implies,
9786 make p1 imply that, too; for everything that implies p1, make it imply p2
9788 for (i
= 0; i
< qp_implieslen
; i
++)
9790 if (qp_implies
[i
].p1
== p2
)
9791 add_qp_imply (p1
, qp_implies
[i
].p2
);
9792 if (qp_implies
[i
].p2
== p1
)
9793 add_qp_imply (qp_implies
[i
].p1
, p2
);
9795 /* Add in mutex relations implied by this implies relation; for each mutex
9796 relation containing p2, duplicate it and replace p2 with p1. */
9797 bit
= (valueT
) 1 << p1
;
9798 mask
= (valueT
) 1 << p2
;
9799 for (i
= 0; i
< qp_mutexeslen
; i
++)
9801 if (qp_mutexes
[i
].prmask
& mask
)
9802 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9806 /* Add the PRs specified in the mask to the mutex list; this means that only
9807 one of the PRs can be true at any time. PR0 should never be included in
9811 add_qp_mutex (valueT mask
)
9816 if (qp_mutexeslen
== qp_mutexestotlen
)
9818 qp_mutexestotlen
+= 20;
9819 qp_mutexes
= (struct qpmutex
*)
9820 xrealloc ((void *) qp_mutexes
,
9821 qp_mutexestotlen
* sizeof (struct qpmutex
));
9825 fprintf (stderr
, " Registering mutex on");
9826 print_prmask (mask
);
9827 fprintf (stderr
, "\n");
9829 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9830 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9834 has_suffix_p (const char *name
, const char *suffix
)
9836 size_t namelen
= strlen (name
);
9837 size_t sufflen
= strlen (suffix
);
9839 if (namelen
<= sufflen
)
9841 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9845 clear_register_values (void)
9849 fprintf (stderr
, " Clearing register values\n");
9850 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9851 gr_values
[i
].known
= 0;
9854 /* Keep track of register values/changes which affect DV tracking.
9856 optimization note: should add a flag to classes of insns where otherwise we
9857 have to examine a group of strings to identify them. */
9860 note_register_values (struct ia64_opcode
*idesc
)
9862 valueT qp_changemask
= 0;
9865 /* Invalidate values for registers being written to. */
9866 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9868 if (idesc
->operands
[i
] == IA64_OPND_R1
9869 || idesc
->operands
[i
] == IA64_OPND_R2
9870 || idesc
->operands
[i
] == IA64_OPND_R3
)
9872 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9873 if (regno
> 0 && regno
< NELEMS (gr_values
))
9874 gr_values
[regno
].known
= 0;
9876 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9878 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9879 if (regno
> 0 && regno
< 4)
9880 gr_values
[regno
].known
= 0;
9882 else if (idesc
->operands
[i
] == IA64_OPND_P1
9883 || idesc
->operands
[i
] == IA64_OPND_P2
)
9885 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9886 qp_changemask
|= (valueT
) 1 << regno
;
9888 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9890 if (idesc
->operands
[2] & (valueT
) 0x10000)
9891 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9893 qp_changemask
= idesc
->operands
[2];
9896 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9898 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9899 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9901 qp_changemask
= idesc
->operands
[1];
9902 qp_changemask
&= ~(valueT
) 0xFFFF;
9907 /* Always clear qp branch flags on any PR change. */
9908 /* FIXME there may be exceptions for certain compares. */
9909 clear_qp_branch_flag (qp_changemask
);
9911 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9912 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9914 qp_changemask
|= ~(valueT
) 0xFFFF;
9915 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9917 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9918 gr_values
[i
].known
= 0;
9920 clear_qp_mutex (qp_changemask
);
9921 clear_qp_implies (qp_changemask
, qp_changemask
);
9923 /* After a call, all register values are undefined, except those marked
9925 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9926 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9928 /* FIXME keep GR values which are marked as "safe_across_calls" */
9929 clear_register_values ();
9930 clear_qp_mutex (~qp_safe_across_calls
);
9931 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9932 clear_qp_branch_flag (~qp_safe_across_calls
);
9934 else if (is_interruption_or_rfi (idesc
)
9935 || is_taken_branch (idesc
))
9937 clear_register_values ();
9938 clear_qp_mutex (~(valueT
) 0);
9939 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9941 /* Look for mutex and implies relations. */
9942 else if ((idesc
->operands
[0] == IA64_OPND_P1
9943 || idesc
->operands
[0] == IA64_OPND_P2
)
9944 && (idesc
->operands
[1] == IA64_OPND_P1
9945 || idesc
->operands
[1] == IA64_OPND_P2
))
9947 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9948 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9949 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9950 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9952 /* If both PRs are PR0, we can't really do anything. */
9953 if (p1
== 0 && p2
== 0)
9956 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9958 /* In general, clear mutexes and implies which include P1 or P2,
9959 with the following exceptions. */
9960 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9961 || has_suffix_p (idesc
->name
, ".and.orcm"))
9963 clear_qp_implies (p2mask
, p1mask
);
9965 else if (has_suffix_p (idesc
->name
, ".andcm")
9966 || has_suffix_p (idesc
->name
, ".and"))
9968 clear_qp_implies (0, p1mask
| p2mask
);
9970 else if (has_suffix_p (idesc
->name
, ".orcm")
9971 || has_suffix_p (idesc
->name
, ".or"))
9973 clear_qp_mutex (p1mask
| p2mask
);
9974 clear_qp_implies (p1mask
| p2mask
, 0);
9980 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9982 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9983 if (p1
== 0 || p2
== 0)
9984 clear_qp_mutex (p1mask
| p2mask
);
9986 added
= update_qp_mutex (p1mask
| p2mask
);
9988 if (CURR_SLOT
.qp_regno
== 0
9989 || has_suffix_p (idesc
->name
, ".unc"))
9991 if (added
== 0 && p1
&& p2
)
9992 add_qp_mutex (p1mask
| p2mask
);
9993 if (CURR_SLOT
.qp_regno
!= 0)
9996 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9998 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
10003 /* Look for mov imm insns into GRs. */
10004 else if (idesc
->operands
[0] == IA64_OPND_R1
10005 && (idesc
->operands
[1] == IA64_OPND_IMM22
10006 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
10007 && CURR_SLOT
.opnd
[1].X_op
== O_constant
10008 && (strcmp (idesc
->name
, "mov") == 0
10009 || strcmp (idesc
->name
, "movl") == 0))
10011 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
10012 if (regno
> 0 && regno
< NELEMS (gr_values
))
10014 gr_values
[regno
].known
= 1;
10015 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
10016 gr_values
[regno
].path
= md
.path
;
10019 fprintf (stderr
, " Know gr%d = ", regno
);
10020 fprintf_vma (stderr
, gr_values
[regno
].value
);
10021 fputs ("\n", stderr
);
10025 /* Look for dep.z imm insns. */
10026 else if (idesc
->operands
[0] == IA64_OPND_R1
10027 && idesc
->operands
[1] == IA64_OPND_IMM8
10028 && strcmp (idesc
->name
, "dep.z") == 0)
10030 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
10031 if (regno
> 0 && regno
< NELEMS (gr_values
))
10033 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
10035 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
10036 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
10037 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
10038 gr_values
[regno
].known
= 1;
10039 gr_values
[regno
].value
= value
;
10040 gr_values
[regno
].path
= md
.path
;
10043 fprintf (stderr
, " Know gr%d = ", regno
);
10044 fprintf_vma (stderr
, gr_values
[regno
].value
);
10045 fputs ("\n", stderr
);
10051 clear_qp_mutex (qp_changemask
);
10052 clear_qp_implies (qp_changemask
, qp_changemask
);
10056 /* Return whether the given predicate registers are currently mutex. */
10059 qp_mutex (int p1
, int p2
, int path
)
10066 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
10067 for (i
= 0; i
< qp_mutexeslen
; i
++)
10069 if (qp_mutexes
[i
].path
>= path
10070 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
10077 /* Return whether the given resource is in the given insn's list of chks
10078 Return 1 if the conflict is absolutely determined, 2 if it's a potential
10082 resources_match (struct rsrc
*rs
,
10083 struct ia64_opcode
*idesc
,
10088 struct rsrc specs
[MAX_SPECS
];
10091 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10092 we don't need to check. One exception is note 11, which indicates that
10093 target predicates are written regardless of PR[qp]. */
10094 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
10098 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
10099 while (count
-- > 0)
10101 /* UNAT checking is a bit more specific than other resources */
10102 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
10103 && specs
[count
].mem_offset
.hint
10104 && rs
->mem_offset
.hint
)
10106 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
10108 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
10109 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
10116 /* Skip apparent PR write conflicts where both writes are an AND or both
10117 writes are an OR. */
10118 if (rs
->dependency
->specifier
== IA64_RS_PR
10119 || rs
->dependency
->specifier
== IA64_RS_PRr
10120 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10122 if (specs
[count
].cmp_type
!= CMP_NONE
10123 && specs
[count
].cmp_type
== rs
->cmp_type
)
10126 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10127 dv_mode
[rs
->dependency
->mode
],
10128 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10129 specs
[count
].index
: 63);
10134 " %s on parallel compare conflict %s vs %s on PR%d\n",
10135 dv_mode
[rs
->dependency
->mode
],
10136 dv_cmp_type
[rs
->cmp_type
],
10137 dv_cmp_type
[specs
[count
].cmp_type
],
10138 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10139 specs
[count
].index
: 63);
10143 /* If either resource is not specific, conservatively assume a conflict
10145 if (!specs
[count
].specific
|| !rs
->specific
)
10147 else if (specs
[count
].index
== rs
->index
)
10154 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10155 insert a stop to create the break. Update all resource dependencies
10156 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10157 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10158 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10162 insn_group_break (int insert_stop
, int qp_regno
, int save_current
)
10166 if (insert_stop
&& md
.num_slots_in_use
> 0)
10167 PREV_SLOT
.end_of_insn_group
= 1;
10171 fprintf (stderr
, " Insn group break%s",
10172 (insert_stop
? " (w/stop)" : ""));
10174 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10175 fprintf (stderr
, "\n");
10179 while (i
< regdepslen
)
10181 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10184 && regdeps
[i
].qp_regno
!= qp_regno
)
10191 && CURR_SLOT
.src_file
== regdeps
[i
].file
10192 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10198 /* clear dependencies which are automatically cleared by a stop, or
10199 those that have reached the appropriate state of insn serialization */
10200 if (dep
->semantics
== IA64_DVS_IMPLIED
10201 || dep
->semantics
== IA64_DVS_IMPLIEDF
10202 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10204 print_dependency ("Removing", i
);
10205 regdeps
[i
] = regdeps
[--regdepslen
];
10209 if (dep
->semantics
== IA64_DVS_DATA
10210 || dep
->semantics
== IA64_DVS_INSTR
10211 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10213 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10214 regdeps
[i
].insn_srlz
= STATE_STOP
;
10215 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10216 regdeps
[i
].data_srlz
= STATE_STOP
;
10223 /* Add the given resource usage spec to the list of active dependencies. */
10226 mark_resource (struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
,
10227 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
,
10232 if (regdepslen
== regdepstotlen
)
10234 regdepstotlen
+= 20;
10235 regdeps
= (struct rsrc
*)
10236 xrealloc ((void *) regdeps
,
10237 regdepstotlen
* sizeof (struct rsrc
));
10240 regdeps
[regdepslen
] = *spec
;
10241 regdeps
[regdepslen
].depind
= depind
;
10242 regdeps
[regdepslen
].path
= path
;
10243 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10244 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10246 print_dependency ("Adding", regdepslen
);
10252 print_dependency (const char *action
, int depind
)
10256 fprintf (stderr
, " %s %s '%s'",
10257 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10258 (regdeps
[depind
].dependency
)->name
);
10259 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10260 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10261 if (regdeps
[depind
].mem_offset
.hint
)
10263 fputs (" ", stderr
);
10264 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10265 fputs ("+", stderr
);
10266 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10268 fprintf (stderr
, "\n");
10273 instruction_serialization (void)
10277 fprintf (stderr
, " Instruction serialization\n");
10278 for (i
= 0; i
< regdepslen
; i
++)
10279 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10280 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10284 data_serialization (void)
10288 fprintf (stderr
, " Data serialization\n");
10289 while (i
< regdepslen
)
10291 if (regdeps
[i
].data_srlz
== STATE_STOP
10292 /* Note: as of 991210, all "other" dependencies are cleared by a
10293 data serialization. This might change with new tables */
10294 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10296 print_dependency ("Removing", i
);
10297 regdeps
[i
] = regdeps
[--regdepslen
];
10304 /* Insert stops and serializations as needed to avoid DVs. */
10307 remove_marked_resource (struct rsrc
*rs
)
10309 switch (rs
->dependency
->semantics
)
10311 case IA64_DVS_SPECIFIC
:
10313 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10314 /* ...fall through... */
10315 case IA64_DVS_INSTR
:
10317 fprintf (stderr
, "Inserting instr serialization\n");
10318 if (rs
->insn_srlz
< STATE_STOP
)
10319 insn_group_break (1, 0, 0);
10320 if (rs
->insn_srlz
< STATE_SRLZ
)
10322 struct slot oldslot
= CURR_SLOT
;
10323 /* Manually jam a srlz.i insn into the stream */
10324 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10325 CURR_SLOT
.user_template
= -1;
10326 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10327 instruction_serialization ();
10328 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10329 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10330 emit_one_bundle ();
10331 CURR_SLOT
= oldslot
;
10333 insn_group_break (1, 0, 0);
10335 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10336 "other" types of DV are eliminated
10337 by a data serialization */
10338 case IA64_DVS_DATA
:
10340 fprintf (stderr
, "Inserting data serialization\n");
10341 if (rs
->data_srlz
< STATE_STOP
)
10342 insn_group_break (1, 0, 0);
10344 struct slot oldslot
= CURR_SLOT
;
10345 /* Manually jam a srlz.d insn into the stream */
10346 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10347 CURR_SLOT
.user_template
= -1;
10348 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10349 data_serialization ();
10350 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10351 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10352 emit_one_bundle ();
10353 CURR_SLOT
= oldslot
;
10356 case IA64_DVS_IMPLIED
:
10357 case IA64_DVS_IMPLIEDF
:
10359 fprintf (stderr
, "Inserting stop\n");
10360 insn_group_break (1, 0, 0);
10367 /* Check the resources used by the given opcode against the current dependency
10370 The check is run once for each execution path encountered. In this case,
10371 a unique execution path is the sequence of instructions following a code
10372 entry point, e.g. the following has three execution paths, one starting
10373 at L0, one at L1, and one at L2.
10382 check_dependencies (struct ia64_opcode
*idesc
)
10384 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10388 /* Note that the number of marked resources may change within the
10389 loop if in auto mode. */
10391 while (i
< regdepslen
)
10393 struct rsrc
*rs
= ®deps
[i
];
10394 const struct ia64_dependency
*dep
= rs
->dependency
;
10397 int start_over
= 0;
10399 if (dep
->semantics
== IA64_DVS_NONE
10400 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10406 note
= NOTE (opdeps
->chks
[chkind
]);
10408 /* Check this resource against each execution path seen thus far. */
10409 for (path
= 0; path
<= md
.path
; path
++)
10413 /* If the dependency wasn't on the path being checked, ignore it. */
10414 if (rs
->path
< path
)
10417 /* If the QP for this insn implies a QP which has branched, don't
10418 bother checking. Ed. NOTE: I don't think this check is terribly
10419 useful; what's the point of generating code which will only be
10420 reached if its QP is zero?
10421 This code was specifically inserted to handle the following code,
10422 based on notes from Intel's DV checking code, where p1 implies p2.
10428 if (CURR_SLOT
.qp_regno
!= 0)
10432 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10434 if (qp_implies
[implies
].path
>= path
10435 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10436 && qp_implies
[implies
].p2_branched
)
10446 if ((matchtype
= resources_match (rs
, idesc
, note
,
10447 CURR_SLOT
.qp_regno
, path
)) != 0)
10450 char pathmsg
[256] = "";
10451 char indexmsg
[256] = "";
10452 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10455 snprintf (pathmsg
, sizeof (pathmsg
),
10456 " when entry is at label '%s'",
10457 md
.entry_labels
[path
- 1]);
10458 if (matchtype
== 1 && rs
->index
>= 0)
10459 snprintf (indexmsg
, sizeof (indexmsg
),
10460 ", specific resource number is %d",
10462 snprintf (msg
, sizeof (msg
),
10463 "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10465 (certain
? "violates" : "may violate"),
10466 dv_mode
[dep
->mode
], dep
->name
,
10467 dv_sem
[dep
->semantics
],
10468 pathmsg
, indexmsg
);
10470 if (md
.explicit_mode
)
10472 as_warn ("%s", msg
);
10473 if (path
< md
.path
)
10474 as_warn (_("Only the first path encountering the conflict is reported"));
10475 as_warn_where (rs
->file
, rs
->line
,
10476 _("This is the location of the conflicting usage"));
10477 /* Don't bother checking other paths, to avoid duplicating
10478 the same warning */
10484 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10486 remove_marked_resource (rs
);
10488 /* since the set of dependencies has changed, start over */
10489 /* FIXME -- since we're removing dvs as we go, we
10490 probably don't really need to start over... */
10503 /* Register new dependencies based on the given opcode. */
10506 mark_resources (struct ia64_opcode
*idesc
)
10509 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10510 int add_only_qp_reads
= 0;
10512 /* A conditional branch only uses its resources if it is taken; if it is
10513 taken, we stop following that path. The other branch types effectively
10514 *always* write their resources. If it's not taken, register only QP
10516 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10518 add_only_qp_reads
= 1;
10522 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10524 for (i
= 0; i
< opdeps
->nregs
; i
++)
10526 const struct ia64_dependency
*dep
;
10527 struct rsrc specs
[MAX_SPECS
];
10532 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10533 note
= NOTE (opdeps
->regs
[i
]);
10535 if (add_only_qp_reads
10536 && !(dep
->mode
== IA64_DV_WAR
10537 && (dep
->specifier
== IA64_RS_PR
10538 || dep
->specifier
== IA64_RS_PRr
10539 || dep
->specifier
== IA64_RS_PR63
)))
10542 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10544 while (count
-- > 0)
10546 mark_resource (idesc
, dep
, &specs
[count
],
10547 DEP (opdeps
->regs
[i
]), md
.path
);
10550 /* The execution path may affect register values, which may in turn
10551 affect which indirect-access resources are accessed. */
10552 switch (dep
->specifier
)
10556 case IA64_RS_CPUID
:
10564 for (path
= 0; path
< md
.path
; path
++)
10566 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10567 while (count
-- > 0)
10568 mark_resource (idesc
, dep
, &specs
[count
],
10569 DEP (opdeps
->regs
[i
]), path
);
10576 /* Remove dependencies when they no longer apply. */
10579 update_dependencies (struct ia64_opcode
*idesc
)
10583 if (strcmp (idesc
->name
, "srlz.i") == 0)
10585 instruction_serialization ();
10587 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10589 data_serialization ();
10591 else if (is_interruption_or_rfi (idesc
)
10592 || is_taken_branch (idesc
))
10594 /* Although technically the taken branch doesn't clear dependencies
10595 which require a srlz.[id], we don't follow the branch; the next
10596 instruction is assumed to start with a clean slate. */
10600 else if (is_conditional_branch (idesc
)
10601 && CURR_SLOT
.qp_regno
!= 0)
10603 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10605 for (i
= 0; i
< qp_implieslen
; i
++)
10607 /* If the conditional branch's predicate is implied by the predicate
10608 in an existing dependency, remove that dependency. */
10609 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10612 /* Note that this implied predicate takes a branch so that if
10613 a later insn generates a DV but its predicate implies this
10614 one, we can avoid the false DV warning. */
10615 qp_implies
[i
].p2_branched
= 1;
10616 while (depind
< regdepslen
)
10618 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10620 print_dependency ("Removing", depind
);
10621 regdeps
[depind
] = regdeps
[--regdepslen
];
10628 /* Any marked resources which have this same predicate should be
10629 cleared, provided that the QP hasn't been modified between the
10630 marking instruction and the branch. */
10633 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10638 while (i
< regdepslen
)
10640 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10641 && regdeps
[i
].link_to_qp_branch
10642 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10643 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10645 /* Treat like a taken branch */
10646 print_dependency ("Removing", i
);
10647 regdeps
[i
] = regdeps
[--regdepslen
];
10656 /* Examine the current instruction for dependency violations. */
10659 check_dv (struct ia64_opcode
*idesc
)
10663 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10664 idesc
->name
, CURR_SLOT
.src_line
,
10665 idesc
->dependencies
->nchks
,
10666 idesc
->dependencies
->nregs
);
10669 /* Look through the list of currently marked resources; if the current
10670 instruction has the dependency in its chks list which uses that resource,
10671 check against the specific resources used. */
10672 check_dependencies (idesc
);
10674 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10675 then add them to the list of marked resources. */
10676 mark_resources (idesc
);
10678 /* There are several types of dependency semantics, and each has its own
10679 requirements for being cleared
10681 Instruction serialization (insns separated by interruption, rfi, or
10682 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10684 Data serialization (instruction serialization, or writer + srlz.d +
10685 reader, where writer and srlz.d are in separate groups) clears
10686 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10687 always be the case).
10689 Instruction group break (groups separated by stop, taken branch,
10690 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10692 update_dependencies (idesc
);
10694 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10695 warning. Keep track of as many as possible that are useful. */
10696 note_register_values (idesc
);
10698 /* We don't need or want this anymore. */
10699 md
.mem_offset
.hint
= 0;
10704 /* Translate one line of assembly. Pseudo ops and labels do not show
10707 md_assemble (char *str
)
10709 char *saved_input_line_pointer
, *mnemonic
;
10710 const struct pseudo_opcode
*pdesc
;
10711 struct ia64_opcode
*idesc
;
10712 unsigned char qp_regno
;
10713 unsigned int flags
;
10716 saved_input_line_pointer
= input_line_pointer
;
10717 input_line_pointer
= str
;
10719 /* extract the opcode (mnemonic): */
10721 mnemonic
= input_line_pointer
;
10722 ch
= get_symbol_end ();
10723 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10726 *input_line_pointer
= ch
;
10727 (*pdesc
->handler
) (pdesc
->arg
);
10731 /* Find the instruction descriptor matching the arguments. */
10733 idesc
= ia64_find_opcode (mnemonic
);
10734 *input_line_pointer
= ch
;
10737 as_bad (_("Unknown opcode `%s'"), mnemonic
);
10741 idesc
= parse_operands (idesc
);
10745 /* Handle the dynamic ops we can handle now: */
10746 if (idesc
->type
== IA64_TYPE_DYN
)
10748 if (strcmp (idesc
->name
, "add") == 0)
10750 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10751 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10755 ia64_free_opcode (idesc
);
10756 idesc
= ia64_find_opcode (mnemonic
);
10758 else if (strcmp (idesc
->name
, "mov") == 0)
10760 enum ia64_opnd opnd1
, opnd2
;
10763 opnd1
= idesc
->operands
[0];
10764 opnd2
= idesc
->operands
[1];
10765 if (opnd1
== IA64_OPND_AR3
)
10767 else if (opnd2
== IA64_OPND_AR3
)
10771 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10773 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10774 mnemonic
= "mov.i";
10775 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10776 mnemonic
= "mov.m";
10784 ia64_free_opcode (idesc
);
10785 idesc
= ia64_find_opcode (mnemonic
);
10786 while (idesc
!= NULL
10787 && (idesc
->operands
[0] != opnd1
10788 || idesc
->operands
[1] != opnd2
))
10789 idesc
= get_next_opcode (idesc
);
10793 else if (strcmp (idesc
->name
, "mov.i") == 0
10794 || strcmp (idesc
->name
, "mov.m") == 0)
10796 enum ia64_opnd opnd1
, opnd2
;
10799 opnd1
= idesc
->operands
[0];
10800 opnd2
= idesc
->operands
[1];
10801 if (opnd1
== IA64_OPND_AR3
)
10803 else if (opnd2
== IA64_OPND_AR3
)
10807 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10810 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10812 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10814 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10815 as_bad (_("AR %d can only be accessed by %c-unit"),
10816 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10820 else if (strcmp (idesc
->name
, "hint.b") == 0)
10826 case hint_b_warning
:
10827 as_warn (_("hint.b may be treated as nop"));
10830 as_bad (_("hint.b shouldn't be used"));
10836 if (md
.qp
.X_op
== O_register
)
10838 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10839 md
.qp
.X_op
= O_absent
;
10842 flags
= idesc
->flags
;
10844 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10846 /* The alignment frag has to end with a stop bit only if the
10847 next instruction after the alignment directive has to be
10848 the first instruction in an instruction group. */
10851 while (align_frag
->fr_type
!= rs_align_code
)
10853 align_frag
= align_frag
->fr_next
;
10857 /* align_frag can be NULL if there are directives in
10859 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10860 align_frag
->tc_frag_data
= 1;
10863 insn_group_break (1, 0, 0);
10867 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10869 as_bad (_("`%s' cannot be predicated"), idesc
->name
);
10873 /* Build the instruction. */
10874 CURR_SLOT
.qp_regno
= qp_regno
;
10875 CURR_SLOT
.idesc
= idesc
;
10876 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10877 dwarf2_where (&CURR_SLOT
.debug_line
);
10878 dwarf2_consume_line_info ();
10880 /* Add unwind entries, if there are any. */
10881 if (unwind
.current_entry
)
10883 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10884 unwind
.current_entry
= NULL
;
10886 if (unwind
.pending_saves
)
10888 if (unwind
.pending_saves
->next
)
10890 /* Attach the next pending save to the next slot so that its
10891 slot number will get set correctly. */
10892 add_unwind_entry (unwind
.pending_saves
->next
, NOT_A_CHAR
);
10893 unwind
.pending_saves
= &unwind
.pending_saves
->next
->r
.record
.p
;
10896 unwind
.pending_saves
= NULL
;
10898 if (unwind
.proc_pending
.sym
&& S_IS_DEFINED (unwind
.proc_pending
.sym
))
10901 /* Check for dependency violations. */
10905 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10906 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10907 emit_one_bundle ();
10909 if ((flags
& IA64_OPCODE_LAST
) != 0)
10910 insn_group_break (1, 0, 0);
10912 md
.last_text_seg
= now_seg
;
10915 input_line_pointer
= saved_input_line_pointer
;
10918 /* Called when symbol NAME cannot be found in the symbol table.
10919 Should be used for dynamic valued symbols only. */
10922 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
10927 /* Called for any expression that can not be recognized. When the
10928 function is called, `input_line_pointer' will point to the start of
10932 md_operand (expressionS
*e
)
10934 switch (*input_line_pointer
)
10937 ++input_line_pointer
;
10938 expression_and_evaluate (e
);
10939 if (*input_line_pointer
!= ']')
10941 as_bad (_("Closing bracket missing"));
10946 if (e
->X_op
!= O_register
10947 || e
->X_add_number
< REG_GR
10948 || e
->X_add_number
> REG_GR
+ 127)
10950 as_bad (_("Index must be a general register"));
10951 e
->X_add_number
= REG_GR
;
10954 ++input_line_pointer
;
10965 ignore_rest_of_line ();
10968 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10969 a section symbol plus some offset. For relocs involving @fptr(),
10970 directives we don't want such adjustments since we need to have the
10971 original symbol's name in the reloc. */
10973 ia64_fix_adjustable (fixS
*fix
)
10975 /* Prevent all adjustments to global symbols */
10976 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10979 switch (fix
->fx_r_type
)
10981 case BFD_RELOC_IA64_FPTR64I
:
10982 case BFD_RELOC_IA64_FPTR32MSB
:
10983 case BFD_RELOC_IA64_FPTR32LSB
:
10984 case BFD_RELOC_IA64_FPTR64MSB
:
10985 case BFD_RELOC_IA64_FPTR64LSB
:
10986 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10987 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10997 ia64_force_relocation (fixS
*fix
)
10999 switch (fix
->fx_r_type
)
11001 case BFD_RELOC_IA64_FPTR64I
:
11002 case BFD_RELOC_IA64_FPTR32MSB
:
11003 case BFD_RELOC_IA64_FPTR32LSB
:
11004 case BFD_RELOC_IA64_FPTR64MSB
:
11005 case BFD_RELOC_IA64_FPTR64LSB
:
11007 case BFD_RELOC_IA64_LTOFF22
:
11008 case BFD_RELOC_IA64_LTOFF64I
:
11009 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11010 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11011 case BFD_RELOC_IA64_PLTOFF22
:
11012 case BFD_RELOC_IA64_PLTOFF64I
:
11013 case BFD_RELOC_IA64_PLTOFF64MSB
:
11014 case BFD_RELOC_IA64_PLTOFF64LSB
:
11016 case BFD_RELOC_IA64_LTOFF22X
:
11017 case BFD_RELOC_IA64_LDXMOV
:
11024 return generic_force_reloc (fix
);
11027 /* Decide from what point a pc-relative relocation is relative to,
11028 relative to the pc-relative fixup. Er, relatively speaking. */
11030 ia64_pcrel_from_section (fixS
*fix
, segT sec
)
11032 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
11034 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
11041 /* Used to emit section-relative relocs for the dwarf2 debug data. */
11043 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
11047 exp
.X_op
= O_pseudo_fixup
;
11048 exp
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
11049 exp
.X_add_number
= 0;
11050 exp
.X_add_symbol
= symbol
;
11051 emit_expr (&exp
, size
);
11054 /* This is called whenever some data item (not an instruction) needs a
11055 fixup. We pick the right reloc code depending on the byteorder
11056 currently in effect. */
11058 ia64_cons_fix_new (fragS
*f
, int where
, int nbytes
, expressionS
*exp
)
11060 bfd_reloc_code_real_type code
;
11065 /* There are no reloc for 8 and 16 bit quantities, but we allow
11066 them here since they will work fine as long as the expression
11067 is fully defined at the end of the pass over the source file. */
11068 case 1: code
= BFD_RELOC_8
; break;
11069 case 2: code
= BFD_RELOC_16
; break;
11071 if (target_big_endian
)
11072 code
= BFD_RELOC_IA64_DIR32MSB
;
11074 code
= BFD_RELOC_IA64_DIR32LSB
;
11078 /* In 32-bit mode, data8 could mean function descriptors too. */
11079 if (exp
->X_op
== O_pseudo_fixup
11080 && exp
->X_op_symbol
11081 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
11082 && !(md
.flags
& EF_IA_64_ABI64
))
11084 if (target_big_endian
)
11085 code
= BFD_RELOC_IA64_IPLTMSB
;
11087 code
= BFD_RELOC_IA64_IPLTLSB
;
11088 exp
->X_op
= O_symbol
;
11093 if (target_big_endian
)
11094 code
= BFD_RELOC_IA64_DIR64MSB
;
11096 code
= BFD_RELOC_IA64_DIR64LSB
;
11101 if (exp
->X_op
== O_pseudo_fixup
11102 && exp
->X_op_symbol
11103 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
11105 if (target_big_endian
)
11106 code
= BFD_RELOC_IA64_IPLTMSB
;
11108 code
= BFD_RELOC_IA64_IPLTLSB
;
11109 exp
->X_op
= O_symbol
;
11115 as_bad (_("Unsupported fixup size %d"), nbytes
);
11116 ignore_rest_of_line ();
11120 if (exp
->X_op
== O_pseudo_fixup
)
11122 exp
->X_op
= O_symbol
;
11123 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11124 /* ??? If code unchanged, unsupported. */
11127 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11128 /* We need to store the byte order in effect in case we're going
11129 to fix an 8 or 16 bit relocation (for which there no real
11130 relocs available). See md_apply_fix(). */
11131 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11134 /* Return the actual relocation we wish to associate with the pseudo
11135 reloc described by SYM and R_TYPE. SYM should be one of the
11136 symbols in the pseudo_func array, or NULL. */
11138 static bfd_reloc_code_real_type
11139 ia64_gen_real_reloc_type (struct symbol
*sym
, bfd_reloc_code_real_type r_type
)
11141 bfd_reloc_code_real_type newr
= 0;
11142 const char *type
= NULL
, *suffix
= "";
11149 switch (S_GET_VALUE (sym
))
11151 case FUNC_FPTR_RELATIVE
:
11154 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_FPTR64I
; break;
11155 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_FPTR32MSB
; break;
11156 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_FPTR32LSB
; break;
11157 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_FPTR64MSB
; break;
11158 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_FPTR64LSB
; break;
11159 default: type
= "FPTR"; break;
11163 case FUNC_GP_RELATIVE
:
11166 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_GPREL22
; break;
11167 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_GPREL64I
; break;
11168 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_GPREL32MSB
; break;
11169 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_GPREL32LSB
; break;
11170 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_GPREL64MSB
; break;
11171 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_GPREL64LSB
; break;
11172 default: type
= "GPREL"; break;
11176 case FUNC_LT_RELATIVE
:
11179 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22
; break;
11180 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_LTOFF64I
; break;
11181 default: type
= "LTOFF"; break;
11185 case FUNC_LT_RELATIVE_X
:
11188 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22X
; break;
11189 default: type
= "LTOFF"; suffix
= "X"; break;
11193 case FUNC_PC_RELATIVE
:
11196 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PCREL22
; break;
11197 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PCREL64I
; break;
11198 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_PCREL32MSB
; break;
11199 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_PCREL32LSB
; break;
11200 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PCREL64MSB
; break;
11201 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PCREL64LSB
; break;
11202 default: type
= "PCREL"; break;
11206 case FUNC_PLT_RELATIVE
:
11209 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PLTOFF22
; break;
11210 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PLTOFF64I
; break;
11211 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PLTOFF64MSB
;break;
11212 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PLTOFF64LSB
;break;
11213 default: type
= "PLTOFF"; break;
11217 case FUNC_SEC_RELATIVE
:
11220 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SECREL32MSB
;break;
11221 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SECREL32LSB
;break;
11222 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SECREL64MSB
;break;
11223 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SECREL64LSB
;break;
11224 default: type
= "SECREL"; break;
11228 case FUNC_SEG_RELATIVE
:
11231 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SEGREL32MSB
;break;
11232 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SEGREL32LSB
;break;
11233 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SEGREL64MSB
;break;
11234 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SEGREL64LSB
;break;
11235 default: type
= "SEGREL"; break;
11239 case FUNC_LTV_RELATIVE
:
11242 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_LTV32MSB
; break;
11243 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_LTV32LSB
; break;
11244 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_LTV64MSB
; break;
11245 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_LTV64LSB
; break;
11246 default: type
= "LTV"; break;
11250 case FUNC_LT_FPTR_RELATIVE
:
11253 case BFD_RELOC_IA64_IMM22
:
11254 newr
= BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11255 case BFD_RELOC_IA64_IMM64
:
11256 newr
= BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11257 case BFD_RELOC_IA64_DIR32MSB
:
11258 newr
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11259 case BFD_RELOC_IA64_DIR32LSB
:
11260 newr
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11261 case BFD_RELOC_IA64_DIR64MSB
:
11262 newr
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11263 case BFD_RELOC_IA64_DIR64LSB
:
11264 newr
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11266 type
= "LTOFF_FPTR"; break;
11270 case FUNC_TP_RELATIVE
:
11273 case BFD_RELOC_IA64_IMM14
: newr
= BFD_RELOC_IA64_TPREL14
; break;
11274 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_TPREL22
; break;
11275 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_TPREL64I
; break;
11276 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_TPREL64MSB
; break;
11277 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_TPREL64LSB
; break;
11278 default: type
= "TPREL"; break;
11282 case FUNC_LT_TP_RELATIVE
:
11285 case BFD_RELOC_IA64_IMM22
:
11286 newr
= BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11288 type
= "LTOFF_TPREL"; break;
11292 case FUNC_DTP_MODULE
:
11295 case BFD_RELOC_IA64_DIR64MSB
:
11296 newr
= BFD_RELOC_IA64_DTPMOD64MSB
; break;
11297 case BFD_RELOC_IA64_DIR64LSB
:
11298 newr
= BFD_RELOC_IA64_DTPMOD64LSB
; break;
11300 type
= "DTPMOD"; break;
11304 case FUNC_LT_DTP_MODULE
:
11307 case BFD_RELOC_IA64_IMM22
:
11308 newr
= BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11310 type
= "LTOFF_DTPMOD"; break;
11314 case FUNC_DTP_RELATIVE
:
11317 case BFD_RELOC_IA64_DIR32MSB
:
11318 newr
= BFD_RELOC_IA64_DTPREL32MSB
; break;
11319 case BFD_RELOC_IA64_DIR32LSB
:
11320 newr
= BFD_RELOC_IA64_DTPREL32LSB
; break;
11321 case BFD_RELOC_IA64_DIR64MSB
:
11322 newr
= BFD_RELOC_IA64_DTPREL64MSB
; break;
11323 case BFD_RELOC_IA64_DIR64LSB
:
11324 newr
= BFD_RELOC_IA64_DTPREL64LSB
; break;
11325 case BFD_RELOC_IA64_IMM14
:
11326 newr
= BFD_RELOC_IA64_DTPREL14
; break;
11327 case BFD_RELOC_IA64_IMM22
:
11328 newr
= BFD_RELOC_IA64_DTPREL22
; break;
11329 case BFD_RELOC_IA64_IMM64
:
11330 newr
= BFD_RELOC_IA64_DTPREL64I
; break;
11332 type
= "DTPREL"; break;
11336 case FUNC_LT_DTP_RELATIVE
:
11339 case BFD_RELOC_IA64_IMM22
:
11340 newr
= BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11342 type
= "LTOFF_DTPREL"; break;
11346 case FUNC_IPLT_RELOC
:
11349 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11350 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11351 default: type
= "IPLT"; break;
11356 case FUNC_SLOTCOUNT_RELOC
:
11357 return DUMMY_RELOC_IA64_SLOTCOUNT
;
11374 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11375 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11376 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11377 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11378 case BFD_RELOC_UNUSED
: width
= 13; break;
11379 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11380 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11381 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11385 /* This should be an error, but since previously there wasn't any
11386 diagnostic here, don't make it fail because of this for now. */
11387 as_warn (_("Cannot express %s%d%s relocation"), type
, width
, suffix
);
11392 /* Here is where generate the appropriate reloc for pseudo relocation
11395 ia64_validate_fix (fixS
*fix
)
11397 switch (fix
->fx_r_type
)
11399 case BFD_RELOC_IA64_FPTR64I
:
11400 case BFD_RELOC_IA64_FPTR32MSB
:
11401 case BFD_RELOC_IA64_FPTR64LSB
:
11402 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11403 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11404 if (fix
->fx_offset
!= 0)
11405 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11406 _("No addend allowed in @fptr() relocation"));
11414 fix_insn (fixS
*fix
, const struct ia64_operand
*odesc
, valueT value
)
11416 bfd_vma insn
[3], t0
, t1
, control_bits
;
11421 slot
= fix
->fx_where
& 0x3;
11422 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11424 /* Bundles are always in little-endian byte order */
11425 t0
= bfd_getl64 (fixpos
);
11426 t1
= bfd_getl64 (fixpos
+ 8);
11427 control_bits
= t0
& 0x1f;
11428 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11429 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11430 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11433 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11435 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11436 insn
[2] |= (((value
& 0x7f) << 13)
11437 | (((value
>> 7) & 0x1ff) << 27)
11438 | (((value
>> 16) & 0x1f) << 22)
11439 | (((value
>> 21) & 0x1) << 21)
11440 | (((value
>> 63) & 0x1) << 36));
11442 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11444 if (value
& ~0x3fffffffffffffffULL
)
11445 err
= _("integer operand out of range");
11446 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11447 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11449 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11452 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11453 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11454 | (((value
>> 0) & 0xfffff) << 13));
11457 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11460 as_bad_where (fix
->fx_file
, fix
->fx_line
, "%s", err
);
11462 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11463 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11464 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11465 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11468 /* Attempt to simplify or even eliminate a fixup. The return value is
11469 ignored; perhaps it was once meaningful, but now it is historical.
11470 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11472 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11476 md_apply_fix (fixS
*fix
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
11479 valueT value
= *valP
;
11481 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11485 switch (fix
->fx_r_type
)
11487 case BFD_RELOC_IA64_PCREL21B
: break;
11488 case BFD_RELOC_IA64_PCREL21BI
: break;
11489 case BFD_RELOC_IA64_PCREL21F
: break;
11490 case BFD_RELOC_IA64_PCREL21M
: break;
11491 case BFD_RELOC_IA64_PCREL60B
: break;
11492 case BFD_RELOC_IA64_PCREL22
: break;
11493 case BFD_RELOC_IA64_PCREL64I
: break;
11494 case BFD_RELOC_IA64_PCREL32MSB
: break;
11495 case BFD_RELOC_IA64_PCREL32LSB
: break;
11496 case BFD_RELOC_IA64_PCREL64MSB
: break;
11497 case BFD_RELOC_IA64_PCREL64LSB
: break;
11499 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11506 switch ((unsigned) fix
->fx_r_type
)
11508 case BFD_RELOC_UNUSED
:
11509 /* This must be a TAG13 or TAG13b operand. There are no external
11510 relocs defined for them, so we must give an error. */
11511 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11512 _("%s must have a constant value"),
11513 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11517 case BFD_RELOC_IA64_TPREL14
:
11518 case BFD_RELOC_IA64_TPREL22
:
11519 case BFD_RELOC_IA64_TPREL64I
:
11520 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11521 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11522 case BFD_RELOC_IA64_DTPREL14
:
11523 case BFD_RELOC_IA64_DTPREL22
:
11524 case BFD_RELOC_IA64_DTPREL64I
:
11525 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11526 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11530 case DUMMY_RELOC_IA64_SLOTCOUNT
:
11531 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11532 _("cannot resolve @slotcount parameter"));
11541 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11544 if (fix
->fx_r_type
== DUMMY_RELOC_IA64_SLOTCOUNT
)
11546 /* For @slotcount, convert an addresses difference to a slots
11550 v
= (value
>> 4) * 3;
11551 switch (value
& 0x0f)
11565 as_bad (_("invalid @slotcount value"));
11571 if (fix
->tc_fix_data
.bigendian
)
11572 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11574 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11579 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11584 /* Generate the BFD reloc to be stuck in the object file from the
11585 fixup used internally in the assembler. */
11588 tc_gen_reloc (asection
*sec ATTRIBUTE_UNUSED
, fixS
*fixp
)
11592 reloc
= xmalloc (sizeof (*reloc
));
11593 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11594 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11595 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11596 reloc
->addend
= fixp
->fx_offset
;
11597 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11601 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11602 _("Cannot represent %s relocation in object file"),
11603 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11610 /* Turn a string in input_line_pointer into a floating point constant
11611 of type TYPE, and store the appropriate bytes in *LIT. The number
11612 of LITTLENUMS emitted is stored in *SIZE. An error message is
11613 returned, or NULL on OK. */
11615 #define MAX_LITTLENUMS 5
11618 md_atof (int type
, char *lit
, int *size
)
11620 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11650 return _("Unrecognized or unsupported floating point constant");
11652 t
= atof_ieee (input_line_pointer
, type
, words
);
11654 input_line_pointer
= t
;
11656 (*ia64_float_to_chars
) (lit
, words
, prec
);
11660 /* It is 10 byte floating point with 6 byte padding. */
11661 memset (&lit
[10], 0, 6);
11662 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11665 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11670 /* Handle ia64 specific semantics of the align directive. */
11673 ia64_md_do_align (int n ATTRIBUTE_UNUSED
,
11674 const char *fill ATTRIBUTE_UNUSED
,
11675 int len ATTRIBUTE_UNUSED
,
11676 int max ATTRIBUTE_UNUSED
)
11678 if (subseg_text_p (now_seg
))
11679 ia64_flush_insns ();
11682 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11683 of an rs_align_code fragment. */
11686 ia64_handle_align (fragS
*fragp
)
11690 const unsigned char *nop_type
;
11692 if (fragp
->fr_type
!= rs_align_code
)
11695 /* Check if this frag has to end with a stop bit. */
11696 nop_type
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11698 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11699 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11701 /* If no paddings are needed, we check if we need a stop bit. */
11702 if (!bytes
&& fragp
->tc_frag_data
)
11704 if (fragp
->fr_fix
< 16)
11706 /* FIXME: It won't work with
11708 alloc r32=ar.pfs,1,2,4,0
11712 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11713 _("Can't add stop bit to mark end of instruction group"));
11716 /* Bundles are always in little-endian byte order. Make sure
11717 the previous bundle has the stop bit. */
11721 /* Make sure we are on a 16-byte boundary, in case someone has been
11722 putting data into a text section. */
11725 int fix
= bytes
& 15;
11726 memset (p
, 0, fix
);
11729 fragp
->fr_fix
+= fix
;
11732 /* Instruction bundles are always little-endian. */
11733 memcpy (p
, nop_type
, 16);
11734 fragp
->fr_var
= 16;
11738 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11743 number_to_chars_bigendian (lit
, (long) (*words
++),
11744 sizeof (LITTLENUM_TYPE
));
11745 lit
+= sizeof (LITTLENUM_TYPE
);
11750 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11755 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11756 sizeof (LITTLENUM_TYPE
));
11757 lit
+= sizeof (LITTLENUM_TYPE
);
11762 ia64_elf_section_change_hook (void)
11764 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11765 && elf_linked_to_section (now_seg
) == NULL
)
11766 elf_linked_to_section (now_seg
) = text_section
;
11767 dot_byteorder (-1);
11770 /* Check if a label should be made global. */
11772 ia64_check_label (symbolS
*label
)
11774 if (*input_line_pointer
== ':')
11776 S_SET_EXTERNAL (label
);
11777 input_line_pointer
++;
11781 /* Used to remember where .alias and .secalias directives are seen. We
11782 will rename symbol and section names when we are about to output
11783 the relocatable file. */
11786 char *file
; /* The file where the directive is seen. */
11787 unsigned int line
; /* The line number the directive is at. */
11788 const char *name
; /* The original name of the symbol. */
11791 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11792 .secalias. Otherwise, it is .alias. */
11794 dot_alias (int section
)
11796 char *name
, *alias
;
11800 const char *error_string
;
11803 struct hash_control
*ahash
, *nhash
;
11806 name
= input_line_pointer
;
11807 delim
= get_symbol_end ();
11808 end_name
= input_line_pointer
;
11811 if (name
== end_name
)
11813 as_bad (_("expected symbol name"));
11814 ignore_rest_of_line ();
11818 SKIP_WHITESPACE ();
11820 if (*input_line_pointer
!= ',')
11823 as_bad (_("expected comma after \"%s\""), name
);
11825 ignore_rest_of_line ();
11829 input_line_pointer
++;
11831 ia64_canonicalize_symbol_name (name
);
11833 /* We call demand_copy_C_string to check if alias string is valid.
11834 There should be a closing `"' and no `\0' in the string. */
11835 alias
= demand_copy_C_string (&len
);
11838 ignore_rest_of_line ();
11842 /* Make a copy of name string. */
11843 len
= strlen (name
) + 1;
11844 obstack_grow (¬es
, name
, len
);
11845 name
= obstack_finish (¬es
);
11850 ahash
= secalias_hash
;
11851 nhash
= secalias_name_hash
;
11856 ahash
= alias_hash
;
11857 nhash
= alias_name_hash
;
11860 /* Check if alias has been used before. */
11861 h
= (struct alias
*) hash_find (ahash
, alias
);
11864 if (strcmp (h
->name
, name
))
11865 as_bad (_("`%s' is already the alias of %s `%s'"),
11866 alias
, kind
, h
->name
);
11870 /* Check if name already has an alias. */
11871 a
= (const char *) hash_find (nhash
, name
);
11874 if (strcmp (a
, alias
))
11875 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11879 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11880 as_where (&h
->file
, &h
->line
);
11883 error_string
= hash_jam (ahash
, alias
, (void *) h
);
11886 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11887 alias
, kind
, error_string
);
11891 error_string
= hash_jam (nhash
, name
, (void *) alias
);
11894 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11895 alias
, kind
, error_string
);
11897 obstack_free (¬es
, name
);
11898 obstack_free (¬es
, alias
);
11901 demand_empty_rest_of_line ();
11904 /* It renames the original symbol name to its alias. */
11906 do_alias (const char *alias
, void *value
)
11908 struct alias
*h
= (struct alias
*) value
;
11909 symbolS
*sym
= symbol_find (h
->name
);
11914 /* Uses .alias extensively to alias CRTL functions to same with
11915 decc$ prefix. Sometimes function gets optimized away and a
11916 warning results, which should be suppressed. */
11917 if (strncmp (alias
, "decc$", 5) != 0)
11919 as_warn_where (h
->file
, h
->line
,
11920 _("symbol `%s' aliased to `%s' is not used"),
11924 S_SET_NAME (sym
, (char *) alias
);
11927 /* Called from write_object_file. */
11929 ia64_adjust_symtab (void)
11931 hash_traverse (alias_hash
, do_alias
);
11934 /* It renames the original section name to its alias. */
11936 do_secalias (const char *alias
, void *value
)
11938 struct alias
*h
= (struct alias
*) value
;
11939 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11942 as_warn_where (h
->file
, h
->line
,
11943 _("section `%s' aliased to `%s' is not used"),
11949 /* Called from write_object_file. */
11951 ia64_frob_file (void)
11953 hash_traverse (secalias_hash
, do_secalias
);
11957 #define NT_VMS_MHD 1
11958 #define NT_VMS_LNM 2
11960 /* Integrity VMS 8.x identifies it's ELF modules with a standard ELF
11963 /* Manufacture a VMS-like time string. */
11965 get_vms_time (char *Now
)
11971 pnt
= ctime (&timeb
);
11977 sprintf (Now
, "%2s-%3s-%s %s", pnt
+ 8, pnt
+ 4, pnt
+ 20, pnt
+ 11);
11981 ia64_vms_note (void)
11984 asection
*seg
= now_seg
;
11985 subsegT subseg
= now_subseg
;
11986 asection
*secp
= NULL
;
11991 /* Create the .note section. */
11993 secp
= subseg_new (".note", 0);
11994 bfd_set_section_flags (stdoutput
,
11996 SEC_HAS_CONTENTS
| SEC_READONLY
);
11998 /* Module header note (MHD). */
11999 bname
= xstrdup (lbasename (out_file_name
));
12000 if ((p
= strrchr (bname
, '.')))
12003 /* VMS note header is 24 bytes long. */
12004 p
= frag_more (8 + 8 + 8);
12005 number_to_chars_littleendian (p
+ 0, 8, 8);
12006 number_to_chars_littleendian (p
+ 8, 40 + strlen (bname
), 8);
12007 number_to_chars_littleendian (p
+ 16, NT_VMS_MHD
, 8);
12010 strcpy (p
, "IPF/VMS");
12012 p
= frag_more (17 + 17 + strlen (bname
) + 1 + 5);
12014 strcpy (p
+ 17, "24-FEB-2005 15:00");
12017 p
+= strlen (bname
) + 1;
12019 strcpy (p
, "V1.0");
12021 frag_align (3, 0, 0);
12023 /* Language processor name note. */
12024 sprintf (buf
, "GNU assembler version %s (%s) using BFD version %s",
12025 VERSION
, TARGET_ALIAS
, BFD_VERSION_STRING
);
12027 p
= frag_more (8 + 8 + 8);
12028 number_to_chars_littleendian (p
+ 0, 8, 8);
12029 number_to_chars_littleendian (p
+ 8, strlen (buf
) + 1, 8);
12030 number_to_chars_littleendian (p
+ 16, NT_VMS_LNM
, 8);
12033 strcpy (p
, "IPF/VMS");
12035 p
= frag_more (strlen (buf
) + 1);
12038 frag_align (3, 0, 0);
12040 secp
= subseg_new (".vms_display_name_info", 0);
12041 bfd_set_section_flags (stdoutput
,
12043 SEC_HAS_CONTENTS
| SEC_READONLY
);
12045 /* This symbol should be passed on the command line and be variable
12046 according to language. */
12047 sym
= symbol_new ("__gnat_vms_display_name@gnat_demangler_rtl",
12048 absolute_section
, 0, &zero_address_frag
);
12049 symbol_table_insert (sym
);
12050 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
| BSF_DYNAMIC
;
12053 /* Format 3 of VMS demangler Spec. */
12054 number_to_chars_littleendian (p
, 3, 4);
12057 /* Place holder for symbol table index of above symbol. */
12058 number_to_chars_littleendian (p
, -1, 4);
12060 frag_align (3, 0, 0);
12062 /* We probably can't restore the current segment, for there likely
12063 isn't one yet... */
12065 subseg_set (seg
, subseg
);
12068 #endif /* TE_VMS */