1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
59 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
61 /* Some systems define MIN in, e.g., param.h. */
63 #define MIN(a,b) ((a) < (b) ? (a) : (b))
66 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
67 #define CURR_SLOT md.slot[md.curr_slot]
69 #define O_pseudo_fixup (O_max + 1)
73 /* IA-64 ABI section pseudo-ops. */
74 SPECIAL_SECTION_BSS
= 0,
76 SPECIAL_SECTION_SDATA
,
77 SPECIAL_SECTION_RODATA
,
78 SPECIAL_SECTION_COMMENT
,
79 SPECIAL_SECTION_UNWIND
,
80 SPECIAL_SECTION_UNWIND_INFO
,
81 /* HPUX specific section pseudo-ops. */
82 SPECIAL_SECTION_INIT_ARRAY
,
83 SPECIAL_SECTION_FINI_ARRAY
,
100 FUNC_LT_FPTR_RELATIVE
,
102 FUNC_LT_DTP_RELATIVE
,
106 FUNC_SLOTCOUNT_RELOC
,
113 REG_FR
= (REG_GR
+ 128),
114 REG_AR
= (REG_FR
+ 128),
115 REG_CR
= (REG_AR
+ 128),
116 REG_DAHR
= (REG_CR
+ 128),
117 REG_P
= (REG_DAHR
+ 8),
118 REG_BR
= (REG_P
+ 64),
119 REG_IP
= (REG_BR
+ 8),
126 /* The following are pseudo-registers for use by gas only. */
138 /* The following pseudo-registers are used for unwind directives only: */
146 DYNREG_GR
= 0, /* dynamic general purpose register */
147 DYNREG_FR
, /* dynamic floating point register */
148 DYNREG_PR
, /* dynamic predicate register */
152 enum operand_match_result
155 OPERAND_OUT_OF_RANGE
,
159 /* On the ia64, we can't know the address of a text label until the
160 instructions are packed into a bundle. To handle this, we keep
161 track of the list of labels that appear in front of each
165 struct label_fix
*next
;
167 bfd_boolean dw2_mark_labels
;
171 /* An internally used relocation. */
172 #define DUMMY_RELOC_IA64_SLOTCOUNT (BFD_RELOC_UNUSED + 1)
175 /* This is the endianness of the current section. */
176 extern int target_big_endian
;
178 /* This is the default endianness. */
179 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
181 void (*ia64_number_to_chars
) (char *, valueT
, int);
183 static void ia64_float_to_chars_bigendian (char *, LITTLENUM_TYPE
*, int);
184 static void ia64_float_to_chars_littleendian (char *, LITTLENUM_TYPE
*, int);
186 static void (*ia64_float_to_chars
) (char *, LITTLENUM_TYPE
*, int);
188 static struct hash_control
*alias_hash
;
189 static struct hash_control
*alias_name_hash
;
190 static struct hash_control
*secalias_hash
;
191 static struct hash_control
*secalias_name_hash
;
193 /* List of chars besides those in app.c:symbol_chars that can start an
194 operand. Used to prevent the scrubber eating vital white-space. */
195 const char ia64_symbol_chars
[] = "@?";
197 /* Characters which always start a comment. */
198 const char comment_chars
[] = "";
200 /* Characters which start a comment at the beginning of a line. */
201 const char line_comment_chars
[] = "#";
203 /* Characters which may be used to separate multiple commands on a
205 const char line_separator_chars
[] = ";{}";
207 /* Characters which are used to indicate an exponent in a floating
209 const char EXP_CHARS
[] = "eE";
211 /* Characters which mean that a number is a floating point constant,
213 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
215 /* ia64-specific option processing: */
217 const char *md_shortopts
= "m:N:x::";
219 struct option md_longopts
[] =
221 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
222 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
223 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
224 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
227 size_t md_longopts_size
= sizeof (md_longopts
);
231 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
232 struct hash_control
*reg_hash
; /* register name hash table */
233 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
234 struct hash_control
*const_hash
; /* constant hash table */
235 struct hash_control
*entry_hash
; /* code entry hint hash table */
237 /* If X_op is != O_absent, the registername for the instruction's
238 qualifying predicate. If NULL, p0 is assumed for instructions
239 that are predictable. */
242 /* Optimize for which CPU. */
249 /* What to do when hint.b is used. */
261 explicit_mode
: 1, /* which mode we're in */
262 default_explicit_mode
: 1, /* which mode is the default */
263 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
265 keep_pending_output
: 1;
267 /* What to do when something is wrong with unwind directives. */
270 unwind_check_warning
,
274 /* Each bundle consists of up to three instructions. We keep
275 track of four most recent instructions so we can correctly set
276 the end_of_insn_group for the last instruction in a bundle. */
278 int num_slots_in_use
;
282 end_of_insn_group
: 1,
283 manual_bundling_on
: 1,
284 manual_bundling_off
: 1,
285 loc_directive_seen
: 1;
286 signed char user_template
; /* user-selected template, if any */
287 unsigned char qp_regno
; /* qualifying predicate */
288 /* This duplicates a good fraction of "struct fix" but we
289 can't use a "struct fix" instead since we can't call
290 fix_new_exp() until we know the address of the instruction. */
294 bfd_reloc_code_real_type code
;
295 enum ia64_opnd opnd
; /* type of operand in need of fix */
296 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
297 expressionS expr
; /* the value to be inserted */
299 fixup
[2]; /* at most two fixups per insn */
300 struct ia64_opcode
*idesc
;
301 struct label_fix
*label_fixups
;
302 struct label_fix
*tag_fixups
;
303 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
305 const char *src_file
;
306 unsigned int src_line
;
307 struct dwarf2_line_info debug_line
;
315 struct dynreg
*next
; /* next dynamic register */
317 unsigned short base
; /* the base register number */
318 unsigned short num_regs
; /* # of registers in this set */
320 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
322 flagword flags
; /* ELF-header flags */
325 unsigned hint
:1; /* is this hint currently valid? */
326 bfd_vma offset
; /* mem.offset offset */
327 bfd_vma base
; /* mem.offset base */
330 int path
; /* number of alt. entry points seen */
331 const char **entry_labels
; /* labels of all alternate paths in
332 the current DV-checking block. */
333 int maxpaths
; /* size currently allocated for
336 int pointer_size
; /* size in bytes of a pointer */
337 int pointer_size_shift
; /* shift size of a pointer for alignment */
339 symbolS
*indregsym
[IND_RR
- IND_CPUID
+ 1];
343 /* These are not const, because they are modified to MMI for non-itanium1
345 /* MFI bundle of nops. */
346 static unsigned char le_nop
[16] =
348 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
349 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
351 /* MFI bundle of nops with stop-bit. */
352 static unsigned char le_nop_stop
[16] =
354 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
355 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
358 /* application registers: */
364 #define AR_BSPSTORE 18
390 {"ar.k0", AR_K0
}, {"ar.k1", AR_K0
+ 1},
391 {"ar.k2", AR_K0
+ 2}, {"ar.k3", AR_K0
+ 3},
392 {"ar.k4", AR_K0
+ 4}, {"ar.k5", AR_K0
+ 5},
393 {"ar.k6", AR_K0
+ 6}, {"ar.k7", AR_K7
},
394 {"ar.rsc", AR_RSC
}, {"ar.bsp", AR_BSP
},
395 {"ar.bspstore", AR_BSPSTORE
}, {"ar.rnat", AR_RNAT
},
396 {"ar.fcr", AR_FCR
}, {"ar.eflag", AR_EFLAG
},
397 {"ar.csd", AR_CSD
}, {"ar.ssd", AR_SSD
},
398 {"ar.cflg", AR_CFLG
}, {"ar.fsr", AR_FSR
},
399 {"ar.fir", AR_FIR
}, {"ar.fdr", AR_FDR
},
400 {"ar.ccv", AR_CCV
}, {"ar.unat", AR_UNAT
},
401 {"ar.fpsr", AR_FPSR
}, {"ar.itc", AR_ITC
},
402 {"ar.ruc", AR_RUC
}, {"ar.pfs", AR_PFS
},
403 {"ar.lc", AR_LC
}, {"ar.ec", AR_EC
},
406 /* control registers: */
447 {"cr.gpta", CR_GPTA
},
448 {"cr.ipsr", CR_IPSR
},
452 {"cr.itir", CR_ITIR
},
453 {"cr.iipa", CR_IIPA
},
457 {"cr.iib0", CR_IIB0
},
458 {"cr.iib1", CR_IIB1
},
463 {"cr.irr0", CR_IRR0
},
464 {"cr.irr1", CR_IRR0
+ 1},
465 {"cr.irr2", CR_IRR0
+ 2},
466 {"cr.irr3", CR_IRR3
},
469 {"cr.cmcv", CR_CMCV
},
470 {"cr.lrr0", CR_LRR0
},
479 static const struct const_desc
486 /* PSR constant masks: */
489 {"psr.be", ((valueT
) 1) << 1},
490 {"psr.up", ((valueT
) 1) << 2},
491 {"psr.ac", ((valueT
) 1) << 3},
492 {"psr.mfl", ((valueT
) 1) << 4},
493 {"psr.mfh", ((valueT
) 1) << 5},
495 {"psr.ic", ((valueT
) 1) << 13},
496 {"psr.i", ((valueT
) 1) << 14},
497 {"psr.pk", ((valueT
) 1) << 15},
499 {"psr.dt", ((valueT
) 1) << 17},
500 {"psr.dfl", ((valueT
) 1) << 18},
501 {"psr.dfh", ((valueT
) 1) << 19},
502 {"psr.sp", ((valueT
) 1) << 20},
503 {"psr.pp", ((valueT
) 1) << 21},
504 {"psr.di", ((valueT
) 1) << 22},
505 {"psr.si", ((valueT
) 1) << 23},
506 {"psr.db", ((valueT
) 1) << 24},
507 {"psr.lp", ((valueT
) 1) << 25},
508 {"psr.tb", ((valueT
) 1) << 26},
509 {"psr.rt", ((valueT
) 1) << 27},
510 /* 28-31: reserved */
511 /* 32-33: cpl (current privilege level) */
512 {"psr.is", ((valueT
) 1) << 34},
513 {"psr.mc", ((valueT
) 1) << 35},
514 {"psr.it", ((valueT
) 1) << 36},
515 {"psr.id", ((valueT
) 1) << 37},
516 {"psr.da", ((valueT
) 1) << 38},
517 {"psr.dd", ((valueT
) 1) << 39},
518 {"psr.ss", ((valueT
) 1) << 40},
519 /* 41-42: ri (restart instruction) */
520 {"psr.ed", ((valueT
) 1) << 43},
521 {"psr.bn", ((valueT
) 1) << 44},
524 /* indirect register-sets/memory: */
533 { "CPUID", IND_CPUID
},
534 { "cpuid", IND_CPUID
},
543 { "dahr", IND_DAHR
},
547 /* Pseudo functions used to indicate relocation types (these functions
548 start with an at sign (@). */
570 /* reloc pseudo functions (these must come first!): */
571 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
572 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
573 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
574 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
575 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
576 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
577 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
578 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
579 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
580 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
581 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
582 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
583 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
584 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
585 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
586 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
587 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
589 { "slotcount", PSEUDO_FUNC_RELOC
, { 0 } },
592 /* mbtype4 constants: */
593 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
594 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
595 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
596 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
597 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
599 /* fclass constants: */
600 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
601 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
602 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
603 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
604 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
605 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
606 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
607 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
608 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
610 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
612 /* hint constants: */
613 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
614 { "priority", PSEUDO_FUNC_CONST
, { 0x1 } },
617 { "clz", PSEUDO_FUNC_CONST
, { 32 } },
618 { "mpy", PSEUDO_FUNC_CONST
, { 33 } },
619 { "datahints", PSEUDO_FUNC_CONST
, { 34 } },
621 /* unwind-related constants: */
622 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
623 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
624 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
625 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_GNU
} },
626 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
627 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
628 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
630 /* unwind-related registers: */
631 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
634 /* 41-bit nop opcodes (one per unit): */
635 static const bfd_vma nop
[IA64_NUM_UNITS
] =
637 0x0000000000LL
, /* NIL => break 0 */
638 0x0008000000LL
, /* I-unit nop */
639 0x0008000000LL
, /* M-unit nop */
640 0x4000000000LL
, /* B-unit nop */
641 0x0008000000LL
, /* F-unit nop */
642 0x0000000000LL
, /* L-"unit" nop immediate */
643 0x0008000000LL
, /* X-unit nop */
646 /* Can't be `const' as it's passed to input routines (which have the
647 habit of setting temporary sentinels. */
648 static char special_section_name
[][20] =
650 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
651 {".IA_64.unwind"}, {".IA_64.unwind_info"},
652 {".init_array"}, {".fini_array"}
655 /* The best template for a particular sequence of up to three
657 #define N IA64_NUM_TYPES
658 static unsigned char best_template
[N
][N
][N
];
661 /* Resource dependencies currently in effect */
663 int depind
; /* dependency index */
664 const struct ia64_dependency
*dependency
; /* actual dependency */
665 unsigned specific
:1, /* is this a specific bit/regno? */
666 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
667 int index
; /* specific regno/bit within dependency */
668 int note
; /* optional qualifying note (0 if none) */
672 int insn_srlz
; /* current insn serialization state */
673 int data_srlz
; /* current data serialization state */
674 int qp_regno
; /* qualifying predicate for this usage */
675 const char *file
; /* what file marked this dependency */
676 unsigned int line
; /* what line marked this dependency */
677 struct mem_offset mem_offset
; /* optional memory offset hint */
678 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
679 int path
; /* corresponding code entry index */
681 static int regdepslen
= 0;
682 static int regdepstotlen
= 0;
683 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
684 static const char *dv_sem
[] = { "none", "implied", "impliedf",
685 "data", "instr", "specific", "stop", "other" };
686 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
688 /* Current state of PR mutexation */
689 static struct qpmutex
{
692 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
693 static int qp_mutexeslen
= 0;
694 static int qp_mutexestotlen
= 0;
695 static valueT qp_safe_across_calls
= 0;
697 /* Current state of PR implications */
698 static struct qp_imply
{
701 unsigned p2_branched
:1;
703 } *qp_implies
= NULL
;
704 static int qp_implieslen
= 0;
705 static int qp_impliestotlen
= 0;
707 /* Keep track of static GR values so that indirect register usage can
708 sometimes be tracked. */
719 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
725 /* Remember the alignment frag. */
726 static fragS
*align_frag
;
728 /* These are the routines required to output the various types of
731 /* A slot_number is a frag address plus the slot index (0-2). We use the
732 frag address here so that if there is a section switch in the middle of
733 a function, then instructions emitted to a different section are not
734 counted. Since there may be more than one frag for a function, this
735 means we also need to keep track of which frag this address belongs to
736 so we can compute inter-frag distances. This also nicely solves the
737 problem with nops emitted for align directives, which can't easily be
738 counted, but can easily be derived from frag sizes. */
740 typedef struct unw_rec_list
{
742 unsigned long slot_number
;
744 struct unw_rec_list
*next
;
747 #define SLOT_NUM_NOT_SET (unsigned)-1
749 /* Linked list of saved prologue counts. A very poor
750 implementation of a map from label numbers to prologue counts. */
751 typedef struct label_prologue_count
753 struct label_prologue_count
*next
;
754 unsigned long label_number
;
755 unsigned int prologue_count
;
756 } label_prologue_count
;
758 typedef struct proc_pending
761 struct proc_pending
*next
;
766 /* Maintain a list of unwind entries for the current function. */
770 /* Any unwind entries that should be attached to the current slot
771 that an insn is being constructed for. */
772 unw_rec_list
*current_entry
;
774 /* These are used to create the unwind table entry for this function. */
775 proc_pending proc_pending
;
776 symbolS
*info
; /* pointer to unwind info */
777 symbolS
*personality_routine
;
779 subsegT saved_text_subseg
;
780 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
782 /* TRUE if processing unwind directives in a prologue region. */
783 unsigned int prologue
: 1;
784 unsigned int prologue_mask
: 4;
785 unsigned int prologue_gr
: 7;
786 unsigned int body
: 1;
787 unsigned int insn
: 1;
788 unsigned int prologue_count
; /* number of .prologues seen so far */
789 /* Prologue counts at previous .label_state directives. */
790 struct label_prologue_count
* saved_prologue_counts
;
792 /* List of split up .save-s. */
793 unw_p_record
*pending_saves
;
796 /* The input value is a negated offset from psp, and specifies an address
797 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
798 must add 16 and divide by 4 to get the encoded value. */
800 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
802 typedef void (*vbyte_func
) (int, char *, char *);
804 /* Forward declarations: */
805 static void dot_alias (int);
806 static int parse_operand_and_eval (expressionS
*, int);
807 static void emit_one_bundle (void);
808 static bfd_reloc_code_real_type
ia64_gen_real_reloc_type (struct symbol
*,
809 bfd_reloc_code_real_type
);
810 static void insn_group_break (int, int, int);
811 static void add_qp_mutex (valueT
);
812 static void add_qp_imply (int, int);
813 static void clear_qp_mutex (valueT
);
814 static void clear_qp_implies (valueT
, valueT
);
815 static void print_dependency (const char *, int);
816 static void instruction_serialization (void);
817 static void data_serialization (void);
818 static void output_R3_format (vbyte_func
, unw_record_type
, unsigned long);
819 static void output_B3_format (vbyte_func
, unsigned long, unsigned long);
820 static void output_B4_format (vbyte_func
, unw_record_type
, unsigned long);
821 static void free_saved_prologue_counts (void);
823 /* Determine if application register REGNUM resides only in the integer
824 unit (as opposed to the memory unit). */
826 ar_is_only_in_integer_unit (int reg
)
829 return reg
>= 64 && reg
<= 111;
832 /* Determine if application register REGNUM resides only in the memory
833 unit (as opposed to the integer unit). */
835 ar_is_only_in_memory_unit (int reg
)
838 return reg
>= 0 && reg
<= 47;
841 /* Switch to section NAME and create section if necessary. It's
842 rather ugly that we have to manipulate input_line_pointer but I
843 don't see any other way to accomplish the same thing without
844 changing obj-elf.c (which may be the Right Thing, in the end). */
846 set_section (char *name
)
848 char *saved_input_line_pointer
;
850 saved_input_line_pointer
= input_line_pointer
;
851 input_line_pointer
= name
;
853 input_line_pointer
= saved_input_line_pointer
;
856 /* Map 's' to SHF_IA_64_SHORT. */
859 ia64_elf_section_letter (int letter
, char **ptr_msg
)
862 return SHF_IA_64_SHORT
;
863 else if (letter
== 'o')
864 return SHF_LINK_ORDER
;
866 else if (letter
== 'O')
867 return SHF_IA_64_VMS_OVERLAID
;
868 else if (letter
== 'g')
869 return SHF_IA_64_VMS_GLOBAL
;
872 *ptr_msg
= _("bad .section directive: want a,o,s,w,x,M,S,G,T in string");
876 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
879 ia64_elf_section_flags (flagword flags
,
881 int type ATTRIBUTE_UNUSED
)
883 if (attr
& SHF_IA_64_SHORT
)
884 flags
|= SEC_SMALL_DATA
;
889 ia64_elf_section_type (const char *str
, size_t len
)
891 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
893 if (STREQ (ELF_STRING_ia64_unwind_info
))
896 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
899 if (STREQ (ELF_STRING_ia64_unwind
))
900 return SHT_IA_64_UNWIND
;
902 if (STREQ (ELF_STRING_ia64_unwind_once
))
903 return SHT_IA_64_UNWIND
;
905 if (STREQ ("unwind"))
906 return SHT_IA_64_UNWIND
;
913 set_regstack (unsigned int ins
,
921 sof
= ins
+ locs
+ outs
;
924 as_bad (_("Size of frame exceeds maximum of 96 registers"));
929 as_warn (_("Size of rotating registers exceeds frame size"));
932 md
.in
.base
= REG_GR
+ 32;
933 md
.loc
.base
= md
.in
.base
+ ins
;
934 md
.out
.base
= md
.loc
.base
+ locs
;
936 md
.in
.num_regs
= ins
;
937 md
.loc
.num_regs
= locs
;
938 md
.out
.num_regs
= outs
;
939 md
.rot
.num_regs
= rots
;
944 ia64_flush_insns (void)
946 struct label_fix
*lfix
;
948 subsegT saved_subseg
;
952 if (!md
.last_text_seg
)
956 saved_subseg
= now_subseg
;
958 subseg_set (md
.last_text_seg
, 0);
960 while (md
.num_slots_in_use
> 0)
961 emit_one_bundle (); /* force out queued instructions */
963 /* In case there are labels following the last instruction, resolve
966 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
968 symbol_set_value_now (lfix
->sym
);
969 mark
|= lfix
->dw2_mark_labels
;
973 dwarf2_where (&CURR_SLOT
.debug_line
);
974 CURR_SLOT
.debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
975 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT
.debug_line
);
976 dwarf2_consume_line_info ();
978 CURR_SLOT
.label_fixups
= 0;
980 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
981 symbol_set_value_now (lfix
->sym
);
982 CURR_SLOT
.tag_fixups
= 0;
984 /* In case there are unwind directives following the last instruction,
985 resolve those now. We only handle prologue, body, and endp directives
986 here. Give an error for others. */
987 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
995 ptr
->slot_number
= (unsigned long) frag_more (0);
996 ptr
->slot_frag
= frag_now
;
999 /* Allow any record which doesn't have a "t" field (i.e.,
1000 doesn't relate to a particular instruction). */
1016 as_bad (_("Unwind directive not followed by an instruction."));
1020 unwind
.current_entry
= NULL
;
1022 subseg_set (saved_seg
, saved_subseg
);
1024 if (md
.qp
.X_op
== O_register
)
1025 as_bad (_("qualifying predicate not followed by instruction"));
1029 ia64_do_align (int nbytes
)
1031 char *saved_input_line_pointer
= input_line_pointer
;
1033 input_line_pointer
= "";
1034 s_align_bytes (nbytes
);
1035 input_line_pointer
= saved_input_line_pointer
;
1039 ia64_cons_align (int nbytes
)
1043 char *saved_input_line_pointer
= input_line_pointer
;
1044 input_line_pointer
= "";
1045 s_align_bytes (nbytes
);
1046 input_line_pointer
= saved_input_line_pointer
;
1052 /* .vms_common section, symbol, size, alignment */
1055 obj_elf_vms_common (int ignore ATTRIBUTE_UNUSED
)
1064 segT current_seg
= now_seg
;
1065 subsegT current_subseg
= now_subseg
;
1069 sec_name
= obj_elf_section_name ();
1070 if (sec_name
== NULL
)
1075 if (*input_line_pointer
== ',')
1077 input_line_pointer
++;
1082 as_bad (_("expected ',' after section name"));
1083 ignore_rest_of_line ();
1087 c
= get_symbol_name (&sym_name
);
1089 if (input_line_pointer
== sym_name
)
1091 (void) restore_line_pointer (c
);
1092 as_bad (_("expected symbol name"));
1093 ignore_rest_of_line ();
1097 symbolP
= symbol_find_or_make (sym_name
);
1098 (void) restore_line_pointer (c
);
1100 if ((S_IS_DEFINED (symbolP
) || symbol_equated_p (symbolP
))
1101 && !S_IS_COMMON (symbolP
))
1103 as_bad (_("Ignoring attempt to re-define symbol"));
1104 ignore_rest_of_line ();
1110 if (*input_line_pointer
== ',')
1112 input_line_pointer
++;
1117 as_bad (_("expected ',' after symbol name"));
1118 ignore_rest_of_line ();
1122 temp
= get_absolute_expression ();
1124 size
&= ((offsetT
) 2 << (stdoutput
->arch_info
->bits_per_address
- 1)) - 1;
1127 as_warn (_("size (%ld) out of range, ignored"), (long) temp
);
1128 ignore_rest_of_line ();
1134 if (*input_line_pointer
== ',')
1136 input_line_pointer
++;
1141 as_bad (_("expected ',' after symbol size"));
1142 ignore_rest_of_line ();
1146 log_align
= get_absolute_expression ();
1148 demand_empty_rest_of_line ();
1150 obj_elf_change_section
1151 (sec_name
, SHT_NOBITS
,
1152 SHF_ALLOC
| SHF_WRITE
| SHF_IA_64_VMS_OVERLAID
| SHF_IA_64_VMS_GLOBAL
,
1155 S_SET_VALUE (symbolP
, 0);
1156 S_SET_SIZE (symbolP
, size
);
1157 S_SET_EXTERNAL (symbolP
);
1158 S_SET_SEGMENT (symbolP
, now_seg
);
1160 symbol_get_bfdsym (symbolP
)->flags
|= BSF_OBJECT
;
1162 record_alignment (now_seg
, log_align
);
1164 cur_size
= bfd_section_size (stdoutput
, now_seg
);
1165 if ((int) size
> cur_size
)
1168 = frag_var (rs_fill
, 1, 1, (relax_substateT
)0, NULL
,
1169 (valueT
)size
- (valueT
)cur_size
, NULL
);
1171 bfd_section_size (stdoutput
, now_seg
) = size
;
1174 /* Switch back to current segment. */
1175 subseg_set (current_seg
, current_subseg
);
1177 #ifdef md_elf_section_change_hook
1178 md_elf_section_change_hook ();
1184 /* Output COUNT bytes to a memory location. */
1185 static char *vbyte_mem_ptr
= NULL
;
1188 output_vbyte_mem (int count
, char *ptr
, char *comment ATTRIBUTE_UNUSED
)
1191 if (vbyte_mem_ptr
== NULL
)
1196 for (x
= 0; x
< count
; x
++)
1197 *(vbyte_mem_ptr
++) = ptr
[x
];
1200 /* Count the number of bytes required for records. */
1201 static int vbyte_count
= 0;
1203 count_output (int count
,
1204 char *ptr ATTRIBUTE_UNUSED
,
1205 char *comment ATTRIBUTE_UNUSED
)
1207 vbyte_count
+= count
;
1211 output_R1_format (vbyte_func f
, unw_record_type rtype
, int rlen
)
1217 output_R3_format (f
, rtype
, rlen
);
1223 else if (rtype
!= prologue
)
1224 as_bad (_("record type is not valid"));
1226 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1227 (*f
) (1, &byte
, NULL
);
1231 output_R2_format (vbyte_func f
, int mask
, int grsave
, unsigned long rlen
)
1235 mask
= (mask
& 0x0f);
1236 grsave
= (grsave
& 0x7f);
1238 bytes
[0] = (UNW_R2
| (mask
>> 1));
1239 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1240 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1241 (*f
) (count
, bytes
, NULL
);
1245 output_R3_format (vbyte_func f
, unw_record_type rtype
, unsigned long rlen
)
1251 output_R1_format (f
, rtype
, rlen
);
1257 else if (rtype
!= prologue
)
1258 as_bad (_("record type is not valid"));
1259 bytes
[0] = (UNW_R3
| r
);
1260 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1261 (*f
) (count
+ 1, bytes
, NULL
);
1265 output_P1_format (vbyte_func f
, int brmask
)
1268 byte
= UNW_P1
| (brmask
& 0x1f);
1269 (*f
) (1, &byte
, NULL
);
1273 output_P2_format (vbyte_func f
, int brmask
, int gr
)
1276 brmask
= (brmask
& 0x1f);
1277 bytes
[0] = UNW_P2
| (brmask
>> 1);
1278 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1279 (*f
) (2, bytes
, NULL
);
1283 output_P3_format (vbyte_func f
, unw_record_type rtype
, int reg
)
1327 as_bad (_("Invalid record type for P3 format."));
1329 bytes
[0] = (UNW_P3
| (r
>> 1));
1330 bytes
[1] = (((r
& 1) << 7) | reg
);
1331 (*f
) (2, bytes
, NULL
);
1335 output_P4_format (vbyte_func f
, unsigned char *imask
, unsigned long imask_size
)
1338 (*f
) (imask_size
, (char *) imask
, NULL
);
1342 output_P5_format (vbyte_func f
, int grmask
, unsigned long frmask
)
1345 grmask
= (grmask
& 0x0f);
1348 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1349 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1350 bytes
[3] = (frmask
& 0x000000ff);
1351 (*f
) (4, bytes
, NULL
);
1355 output_P6_format (vbyte_func f
, unw_record_type rtype
, int rmask
)
1360 if (rtype
== gr_mem
)
1362 else if (rtype
!= fr_mem
)
1363 as_bad (_("Invalid record type for format P6"));
1364 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1365 (*f
) (1, &byte
, NULL
);
1369 output_P7_format (vbyte_func f
,
1370 unw_record_type rtype
,
1377 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1382 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1432 bytes
[0] = (UNW_P7
| r
);
1433 (*f
) (count
, bytes
, NULL
);
1437 output_P8_format (vbyte_func f
, unw_record_type rtype
, unsigned long t
)
1475 case bspstore_psprel
:
1478 case bspstore_sprel
:
1490 case priunat_when_gr
:
1493 case priunat_psprel
:
1499 case priunat_when_mem
:
1506 count
+= output_leb128 (bytes
+ 2, t
, 0);
1507 (*f
) (count
, bytes
, NULL
);
1511 output_P9_format (vbyte_func f
, int grmask
, int gr
)
1515 bytes
[1] = (grmask
& 0x0f);
1516 bytes
[2] = (gr
& 0x7f);
1517 (*f
) (3, bytes
, NULL
);
1521 output_P10_format (vbyte_func f
, int abi
, int context
)
1525 bytes
[1] = (abi
& 0xff);
1526 bytes
[2] = (context
& 0xff);
1527 (*f
) (3, bytes
, NULL
);
1531 output_B1_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1537 output_B4_format (f
, rtype
, label
);
1540 if (rtype
== copy_state
)
1542 else if (rtype
!= label_state
)
1543 as_bad (_("Invalid record type for format B1"));
1545 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1546 (*f
) (1, &byte
, NULL
);
1550 output_B2_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1556 output_B3_format (f
, ecount
, t
);
1559 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1560 count
+= output_leb128 (bytes
+ 1, t
, 0);
1561 (*f
) (count
, bytes
, NULL
);
1565 output_B3_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1571 output_B2_format (f
, ecount
, t
);
1575 count
+= output_leb128 (bytes
+ 1, t
, 0);
1576 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1577 (*f
) (count
, bytes
, NULL
);
1581 output_B4_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1588 output_B1_format (f
, rtype
, label
);
1592 if (rtype
== copy_state
)
1594 else if (rtype
!= label_state
)
1595 as_bad (_("Invalid record type for format B1"));
1597 bytes
[0] = (UNW_B4
| (r
<< 3));
1598 count
+= output_leb128 (bytes
+ 1, label
, 0);
1599 (*f
) (count
, bytes
, NULL
);
1603 format_ab_reg (int ab
, int reg
)
1608 ret
= (ab
<< 5) | reg
;
1613 output_X1_format (vbyte_func f
,
1614 unw_record_type rtype
,
1625 if (rtype
== spill_sprel
)
1627 else if (rtype
!= spill_psprel
)
1628 as_bad (_("Invalid record type for format X1"));
1629 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1630 count
+= output_leb128 (bytes
+ 2, t
, 0);
1631 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1632 (*f
) (count
, bytes
, NULL
);
1636 output_X2_format (vbyte_func f
,
1647 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1648 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1649 count
+= output_leb128 (bytes
+ 3, t
, 0);
1650 (*f
) (count
, bytes
, NULL
);
1654 output_X3_format (vbyte_func f
,
1655 unw_record_type rtype
,
1667 if (rtype
== spill_sprel_p
)
1669 else if (rtype
!= spill_psprel_p
)
1670 as_bad (_("Invalid record type for format X3"));
1671 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1672 bytes
[2] = format_ab_reg (ab
, reg
);
1673 count
+= output_leb128 (bytes
+ 3, t
, 0);
1674 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1675 (*f
) (count
, bytes
, NULL
);
1679 output_X4_format (vbyte_func f
,
1691 bytes
[1] = (qp
& 0x3f);
1692 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1693 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1694 count
+= output_leb128 (bytes
+ 4, t
, 0);
1695 (*f
) (count
, bytes
, NULL
);
1698 /* This function checks whether there are any outstanding .save-s and
1699 discards them if so. */
1702 check_pending_save (void)
1704 if (unwind
.pending_saves
)
1706 unw_rec_list
*cur
, *prev
;
1708 as_warn (_("Previous .save incomplete"));
1709 for (cur
= unwind
.list
, prev
= NULL
; cur
; )
1710 if (&cur
->r
.record
.p
== unwind
.pending_saves
)
1713 prev
->next
= cur
->next
;
1715 unwind
.list
= cur
->next
;
1716 if (cur
== unwind
.tail
)
1718 if (cur
== unwind
.current_entry
)
1719 unwind
.current_entry
= cur
->next
;
1720 /* Don't free the first discarded record, it's being used as
1721 terminator for (currently) br_gr and gr_gr processing, and
1722 also prevents leaving a dangling pointer to it in its
1724 cur
->r
.record
.p
.grmask
= 0;
1725 cur
->r
.record
.p
.brmask
= 0;
1726 cur
->r
.record
.p
.frmask
= 0;
1727 prev
= cur
->r
.record
.p
.next
;
1728 cur
->r
.record
.p
.next
= NULL
;
1740 cur
= cur
->r
.record
.p
.next
;
1743 unwind
.pending_saves
= NULL
;
1747 /* This function allocates a record list structure, and initializes fields. */
1749 static unw_rec_list
*
1750 alloc_record (unw_record_type t
)
1753 ptr
= xmalloc (sizeof (*ptr
));
1754 memset (ptr
, 0, sizeof (*ptr
));
1755 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1760 /* Dummy unwind record used for calculating the length of the last prologue or
1763 static unw_rec_list
*
1766 unw_rec_list
*ptr
= alloc_record (endp
);
1770 static unw_rec_list
*
1771 output_prologue (void)
1773 unw_rec_list
*ptr
= alloc_record (prologue
);
1774 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1778 static unw_rec_list
*
1779 output_prologue_gr (unsigned int saved_mask
, unsigned int reg
)
1781 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1782 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1783 ptr
->r
.record
.r
.grmask
= saved_mask
;
1784 ptr
->r
.record
.r
.grsave
= reg
;
1788 static unw_rec_list
*
1791 unw_rec_list
*ptr
= alloc_record (body
);
1795 static unw_rec_list
*
1796 output_mem_stack_f (unsigned int size
)
1798 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1799 ptr
->r
.record
.p
.size
= size
;
1803 static unw_rec_list
*
1804 output_mem_stack_v (void)
1806 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1810 static unw_rec_list
*
1811 output_psp_gr (unsigned int gr
)
1813 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1814 ptr
->r
.record
.p
.r
.gr
= gr
;
1818 static unw_rec_list
*
1819 output_psp_sprel (unsigned int offset
)
1821 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1822 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1826 static unw_rec_list
*
1827 output_rp_when (void)
1829 unw_rec_list
*ptr
= alloc_record (rp_when
);
1833 static unw_rec_list
*
1834 output_rp_gr (unsigned int gr
)
1836 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1837 ptr
->r
.record
.p
.r
.gr
= gr
;
1841 static unw_rec_list
*
1842 output_rp_br (unsigned int br
)
1844 unw_rec_list
*ptr
= alloc_record (rp_br
);
1845 ptr
->r
.record
.p
.r
.br
= br
;
1849 static unw_rec_list
*
1850 output_rp_psprel (unsigned int offset
)
1852 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1853 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1857 static unw_rec_list
*
1858 output_rp_sprel (unsigned int offset
)
1860 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1861 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1865 static unw_rec_list
*
1866 output_pfs_when (void)
1868 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1872 static unw_rec_list
*
1873 output_pfs_gr (unsigned int gr
)
1875 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1876 ptr
->r
.record
.p
.r
.gr
= gr
;
1880 static unw_rec_list
*
1881 output_pfs_psprel (unsigned int offset
)
1883 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1884 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1888 static unw_rec_list
*
1889 output_pfs_sprel (unsigned int offset
)
1891 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1892 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1896 static unw_rec_list
*
1897 output_preds_when (void)
1899 unw_rec_list
*ptr
= alloc_record (preds_when
);
1903 static unw_rec_list
*
1904 output_preds_gr (unsigned int gr
)
1906 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1907 ptr
->r
.record
.p
.r
.gr
= gr
;
1911 static unw_rec_list
*
1912 output_preds_psprel (unsigned int offset
)
1914 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1915 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1919 static unw_rec_list
*
1920 output_preds_sprel (unsigned int offset
)
1922 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1923 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1927 static unw_rec_list
*
1928 output_fr_mem (unsigned int mask
)
1930 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1931 unw_rec_list
*cur
= ptr
;
1933 ptr
->r
.record
.p
.frmask
= mask
;
1934 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1937 unw_rec_list
*prev
= cur
;
1939 /* Clear least significant set bit. */
1940 mask
&= ~(mask
& (~mask
+ 1));
1943 cur
= alloc_record (fr_mem
);
1944 cur
->r
.record
.p
.frmask
= mask
;
1945 /* Retain only least significant bit. */
1946 prev
->r
.record
.p
.frmask
^= mask
;
1947 prev
->r
.record
.p
.next
= cur
;
1951 static unw_rec_list
*
1952 output_frgr_mem (unsigned int gr_mask
, unsigned int fr_mask
)
1954 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1955 unw_rec_list
*cur
= ptr
;
1957 unwind
.pending_saves
= &cur
->r
.record
.p
;
1958 cur
->r
.record
.p
.frmask
= fr_mask
;
1961 unw_rec_list
*prev
= cur
;
1963 /* Clear least significant set bit. */
1964 fr_mask
&= ~(fr_mask
& (~fr_mask
+ 1));
1965 if (!gr_mask
&& !fr_mask
)
1967 cur
= alloc_record (frgr_mem
);
1968 cur
->r
.record
.p
.frmask
= fr_mask
;
1969 /* Retain only least significant bit. */
1970 prev
->r
.record
.p
.frmask
^= fr_mask
;
1971 prev
->r
.record
.p
.next
= cur
;
1973 cur
->r
.record
.p
.grmask
= gr_mask
;
1976 unw_rec_list
*prev
= cur
;
1978 /* Clear least significant set bit. */
1979 gr_mask
&= ~(gr_mask
& (~gr_mask
+ 1));
1982 cur
= alloc_record (frgr_mem
);
1983 cur
->r
.record
.p
.grmask
= gr_mask
;
1984 /* Retain only least significant bit. */
1985 prev
->r
.record
.p
.grmask
^= gr_mask
;
1986 prev
->r
.record
.p
.next
= cur
;
1990 static unw_rec_list
*
1991 output_gr_gr (unsigned int mask
, unsigned int reg
)
1993 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1994 unw_rec_list
*cur
= ptr
;
1996 ptr
->r
.record
.p
.grmask
= mask
;
1997 ptr
->r
.record
.p
.r
.gr
= reg
;
1998 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2001 unw_rec_list
*prev
= cur
;
2003 /* Clear least significant set bit. */
2004 mask
&= ~(mask
& (~mask
+ 1));
2007 cur
= alloc_record (gr_gr
);
2008 cur
->r
.record
.p
.grmask
= mask
;
2009 /* Indicate this record shouldn't be output. */
2010 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2011 /* Retain only least significant bit. */
2012 prev
->r
.record
.p
.grmask
^= mask
;
2013 prev
->r
.record
.p
.next
= cur
;
2017 static unw_rec_list
*
2018 output_gr_mem (unsigned int mask
)
2020 unw_rec_list
*ptr
= alloc_record (gr_mem
);
2021 unw_rec_list
*cur
= ptr
;
2023 ptr
->r
.record
.p
.grmask
= mask
;
2024 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2027 unw_rec_list
*prev
= cur
;
2029 /* Clear least significant set bit. */
2030 mask
&= ~(mask
& (~mask
+ 1));
2033 cur
= alloc_record (gr_mem
);
2034 cur
->r
.record
.p
.grmask
= mask
;
2035 /* Retain only least significant bit. */
2036 prev
->r
.record
.p
.grmask
^= mask
;
2037 prev
->r
.record
.p
.next
= cur
;
2041 static unw_rec_list
*
2042 output_br_mem (unsigned int mask
)
2044 unw_rec_list
*ptr
= alloc_record (br_mem
);
2045 unw_rec_list
*cur
= ptr
;
2047 ptr
->r
.record
.p
.brmask
= mask
;
2048 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2051 unw_rec_list
*prev
= cur
;
2053 /* Clear least significant set bit. */
2054 mask
&= ~(mask
& (~mask
+ 1));
2057 cur
= alloc_record (br_mem
);
2058 cur
->r
.record
.p
.brmask
= mask
;
2059 /* Retain only least significant bit. */
2060 prev
->r
.record
.p
.brmask
^= mask
;
2061 prev
->r
.record
.p
.next
= cur
;
2065 static unw_rec_list
*
2066 output_br_gr (unsigned int mask
, unsigned int reg
)
2068 unw_rec_list
*ptr
= alloc_record (br_gr
);
2069 unw_rec_list
*cur
= ptr
;
2071 ptr
->r
.record
.p
.brmask
= mask
;
2072 ptr
->r
.record
.p
.r
.gr
= reg
;
2073 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2076 unw_rec_list
*prev
= cur
;
2078 /* Clear least significant set bit. */
2079 mask
&= ~(mask
& (~mask
+ 1));
2082 cur
= alloc_record (br_gr
);
2083 cur
->r
.record
.p
.brmask
= mask
;
2084 /* Indicate this record shouldn't be output. */
2085 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2086 /* Retain only least significant bit. */
2087 prev
->r
.record
.p
.brmask
^= mask
;
2088 prev
->r
.record
.p
.next
= cur
;
2092 static unw_rec_list
*
2093 output_spill_base (unsigned int offset
)
2095 unw_rec_list
*ptr
= alloc_record (spill_base
);
2096 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2100 static unw_rec_list
*
2101 output_unat_when (void)
2103 unw_rec_list
*ptr
= alloc_record (unat_when
);
2107 static unw_rec_list
*
2108 output_unat_gr (unsigned int gr
)
2110 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2111 ptr
->r
.record
.p
.r
.gr
= gr
;
2115 static unw_rec_list
*
2116 output_unat_psprel (unsigned int offset
)
2118 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2119 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2123 static unw_rec_list
*
2124 output_unat_sprel (unsigned int offset
)
2126 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2127 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2131 static unw_rec_list
*
2132 output_lc_when (void)
2134 unw_rec_list
*ptr
= alloc_record (lc_when
);
2138 static unw_rec_list
*
2139 output_lc_gr (unsigned int gr
)
2141 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2142 ptr
->r
.record
.p
.r
.gr
= gr
;
2146 static unw_rec_list
*
2147 output_lc_psprel (unsigned int offset
)
2149 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2150 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2154 static unw_rec_list
*
2155 output_lc_sprel (unsigned int offset
)
2157 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2158 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2162 static unw_rec_list
*
2163 output_fpsr_when (void)
2165 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2169 static unw_rec_list
*
2170 output_fpsr_gr (unsigned int gr
)
2172 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2173 ptr
->r
.record
.p
.r
.gr
= gr
;
2177 static unw_rec_list
*
2178 output_fpsr_psprel (unsigned int offset
)
2180 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2181 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2185 static unw_rec_list
*
2186 output_fpsr_sprel (unsigned int offset
)
2188 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2189 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2193 static unw_rec_list
*
2194 output_priunat_when_gr (void)
2196 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2200 static unw_rec_list
*
2201 output_priunat_when_mem (void)
2203 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2207 static unw_rec_list
*
2208 output_priunat_gr (unsigned int gr
)
2210 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2211 ptr
->r
.record
.p
.r
.gr
= gr
;
2215 static unw_rec_list
*
2216 output_priunat_psprel (unsigned int offset
)
2218 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2219 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2223 static unw_rec_list
*
2224 output_priunat_sprel (unsigned int offset
)
2226 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2227 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2231 static unw_rec_list
*
2232 output_bsp_when (void)
2234 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2238 static unw_rec_list
*
2239 output_bsp_gr (unsigned int gr
)
2241 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2242 ptr
->r
.record
.p
.r
.gr
= gr
;
2246 static unw_rec_list
*
2247 output_bsp_psprel (unsigned int offset
)
2249 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2250 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2254 static unw_rec_list
*
2255 output_bsp_sprel (unsigned int offset
)
2257 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2258 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2262 static unw_rec_list
*
2263 output_bspstore_when (void)
2265 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2269 static unw_rec_list
*
2270 output_bspstore_gr (unsigned int gr
)
2272 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2273 ptr
->r
.record
.p
.r
.gr
= gr
;
2277 static unw_rec_list
*
2278 output_bspstore_psprel (unsigned int offset
)
2280 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2281 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2285 static unw_rec_list
*
2286 output_bspstore_sprel (unsigned int offset
)
2288 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2289 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2293 static unw_rec_list
*
2294 output_rnat_when (void)
2296 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2300 static unw_rec_list
*
2301 output_rnat_gr (unsigned int gr
)
2303 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2304 ptr
->r
.record
.p
.r
.gr
= gr
;
2308 static unw_rec_list
*
2309 output_rnat_psprel (unsigned int offset
)
2311 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2312 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2316 static unw_rec_list
*
2317 output_rnat_sprel (unsigned int offset
)
2319 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2320 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2324 static unw_rec_list
*
2325 output_unwabi (unsigned long abi
, unsigned long context
)
2327 unw_rec_list
*ptr
= alloc_record (unwabi
);
2328 ptr
->r
.record
.p
.abi
= abi
;
2329 ptr
->r
.record
.p
.context
= context
;
2333 static unw_rec_list
*
2334 output_epilogue (unsigned long ecount
)
2336 unw_rec_list
*ptr
= alloc_record (epilogue
);
2337 ptr
->r
.record
.b
.ecount
= ecount
;
2341 static unw_rec_list
*
2342 output_label_state (unsigned long label
)
2344 unw_rec_list
*ptr
= alloc_record (label_state
);
2345 ptr
->r
.record
.b
.label
= label
;
2349 static unw_rec_list
*
2350 output_copy_state (unsigned long label
)
2352 unw_rec_list
*ptr
= alloc_record (copy_state
);
2353 ptr
->r
.record
.b
.label
= label
;
2357 static unw_rec_list
*
2358 output_spill_psprel (unsigned int ab
,
2360 unsigned int offset
,
2361 unsigned int predicate
)
2363 unw_rec_list
*ptr
= alloc_record (predicate
? spill_psprel_p
: spill_psprel
);
2364 ptr
->r
.record
.x
.ab
= ab
;
2365 ptr
->r
.record
.x
.reg
= reg
;
2366 ptr
->r
.record
.x
.where
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2367 ptr
->r
.record
.x
.qp
= predicate
;
2371 static unw_rec_list
*
2372 output_spill_sprel (unsigned int ab
,
2374 unsigned int offset
,
2375 unsigned int predicate
)
2377 unw_rec_list
*ptr
= alloc_record (predicate
? spill_sprel_p
: spill_sprel
);
2378 ptr
->r
.record
.x
.ab
= ab
;
2379 ptr
->r
.record
.x
.reg
= reg
;
2380 ptr
->r
.record
.x
.where
.spoff
= offset
/ 4;
2381 ptr
->r
.record
.x
.qp
= predicate
;
2385 static unw_rec_list
*
2386 output_spill_reg (unsigned int ab
,
2388 unsigned int targ_reg
,
2390 unsigned int predicate
)
2392 unw_rec_list
*ptr
= alloc_record (predicate
? spill_reg_p
: spill_reg
);
2393 ptr
->r
.record
.x
.ab
= ab
;
2394 ptr
->r
.record
.x
.reg
= reg
;
2395 ptr
->r
.record
.x
.where
.reg
= targ_reg
;
2396 ptr
->r
.record
.x
.xy
= xy
;
2397 ptr
->r
.record
.x
.qp
= predicate
;
2401 /* Given a unw_rec_list process the correct format with the
2402 specified function. */
2405 process_one_record (unw_rec_list
*ptr
, vbyte_func f
)
2407 unsigned int fr_mask
, gr_mask
;
2409 switch (ptr
->r
.type
)
2411 /* This is a dummy record that takes up no space in the output. */
2419 /* These are taken care of by prologue/prologue_gr. */
2424 if (ptr
->r
.type
== prologue_gr
)
2425 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2426 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2428 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2430 /* Output descriptor(s) for union of register spills (if any). */
2431 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2432 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2435 if ((fr_mask
& ~0xfUL
) == 0)
2436 output_P6_format (f
, fr_mem
, fr_mask
);
2439 output_P5_format (f
, gr_mask
, fr_mask
);
2444 output_P6_format (f
, gr_mem
, gr_mask
);
2445 if (ptr
->r
.record
.r
.mask
.br_mem
)
2446 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2448 /* output imask descriptor if necessary: */
2449 if (ptr
->r
.record
.r
.mask
.i
)
2450 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2451 ptr
->r
.record
.r
.imask_size
);
2455 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2459 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2460 ptr
->r
.record
.p
.size
);
2473 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.r
.gr
);
2476 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.r
.br
);
2479 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.off
.sp
, 0);
2487 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2496 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
, 0);
2506 case bspstore_sprel
:
2508 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.sp
);
2511 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2513 const unw_rec_list
*cur
= ptr
;
2515 gr_mask
= cur
->r
.record
.p
.grmask
;
2516 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2517 gr_mask
|= cur
->r
.record
.p
.grmask
;
2518 output_P9_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2522 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2524 const unw_rec_list
*cur
= ptr
;
2526 gr_mask
= cur
->r
.record
.p
.brmask
;
2527 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2528 gr_mask
|= cur
->r
.record
.p
.brmask
;
2529 output_P2_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2533 as_bad (_("spill_mask record unimplemented."));
2535 case priunat_when_gr
:
2536 case priunat_when_mem
:
2540 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2542 case priunat_psprel
:
2544 case bspstore_psprel
:
2546 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
);
2549 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2552 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2556 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2559 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2560 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2561 ptr
->r
.record
.x
.where
.pspoff
);
2564 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2565 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2566 ptr
->r
.record
.x
.where
.spoff
);
2569 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2570 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2571 ptr
->r
.record
.x
.where
.reg
, ptr
->r
.record
.x
.t
);
2573 case spill_psprel_p
:
2574 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2575 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2576 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.pspoff
);
2579 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2580 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2581 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.spoff
);
2584 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2585 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2586 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.where
.reg
,
2590 as_bad (_("record_type_not_valid"));
2595 /* Given a unw_rec_list list, process all the records with
2596 the specified function. */
2598 process_unw_records (unw_rec_list
*list
, vbyte_func f
)
2601 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2602 process_one_record (ptr
, f
);
2605 /* Determine the size of a record list in bytes. */
2607 calc_record_size (unw_rec_list
*list
)
2610 process_unw_records (list
, count_output
);
2614 /* Return the number of bits set in the input value.
2615 Perhaps this has a better place... */
2616 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2617 # define popcount __builtin_popcount
2620 popcount (unsigned x
)
2622 static const unsigned char popcnt
[16] =
2630 if (x
< NELEMS (popcnt
))
2632 return popcnt
[x
% NELEMS (popcnt
)] + popcount (x
/ NELEMS (popcnt
));
2636 /* Update IMASK bitmask to reflect the fact that one or more registers
2637 of type TYPE are saved starting at instruction with index T. If N
2638 bits are set in REGMASK, it is assumed that instructions T through
2639 T+N-1 save these registers.
2643 1: instruction saves next fp reg
2644 2: instruction saves next general reg
2645 3: instruction saves next branch reg */
2647 set_imask (unw_rec_list
*region
,
2648 unsigned long regmask
,
2652 unsigned char *imask
;
2653 unsigned long imask_size
;
2657 imask
= region
->r
.record
.r
.mask
.i
;
2658 imask_size
= region
->r
.record
.r
.imask_size
;
2661 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2662 imask
= xmalloc (imask_size
);
2663 memset (imask
, 0, imask_size
);
2665 region
->r
.record
.r
.imask_size
= imask_size
;
2666 region
->r
.record
.r
.mask
.i
= imask
;
2670 pos
= 2 * (3 - t
% 4);
2673 if (i
>= imask_size
)
2675 as_bad (_("Ignoring attempt to spill beyond end of region"));
2679 imask
[i
] |= (type
& 0x3) << pos
;
2681 regmask
&= (regmask
- 1);
2691 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2692 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2693 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2696 static unsigned long
2697 slot_index (unsigned long slot_addr
,
2699 unsigned long first_addr
,
2703 unsigned long s_index
= 0;
2705 /* First time we are called, the initial address and frag are invalid. */
2706 if (first_addr
== 0)
2709 /* If the two addresses are in different frags, then we need to add in
2710 the remaining size of this frag, and then the entire size of intermediate
2712 while (slot_frag
!= first_frag
)
2714 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2718 /* We can get the final addresses only during and after
2720 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2721 s_index
+= 3 * ((first_frag
->fr_next
->fr_address
2722 - first_frag
->fr_address
2723 - first_frag
->fr_fix
) >> 4);
2726 /* We don't know what the final addresses will be. We try our
2727 best to estimate. */
2728 switch (first_frag
->fr_type
)
2734 as_fatal (_("Only constant space allocation is supported"));
2740 /* Take alignment into account. Assume the worst case
2741 before relaxation. */
2742 s_index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2746 if (first_frag
->fr_symbol
)
2748 as_fatal (_("Only constant offsets are supported"));
2752 s_index
+= 3 * (first_frag
->fr_offset
>> 4);
2756 /* Add in the full size of the frag converted to instruction slots. */
2757 s_index
+= 3 * (first_frag
->fr_fix
>> 4);
2758 /* Subtract away the initial part before first_addr. */
2759 s_index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2760 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2762 /* Move to the beginning of the next frag. */
2763 first_frag
= first_frag
->fr_next
;
2764 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2766 /* This can happen if there is section switching in the middle of a
2767 function, causing the frag chain for the function to be broken.
2768 It is too difficult to recover safely from this problem, so we just
2769 exit with an error. */
2770 if (first_frag
== NULL
)
2771 as_fatal (_("Section switching in code is not supported."));
2774 /* Add in the used part of the last frag. */
2775 s_index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2776 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2780 /* Optimize unwind record directives. */
2782 static unw_rec_list
*
2783 optimize_unw_records (unw_rec_list
*list
)
2788 /* If the only unwind record is ".prologue" or ".prologue" followed
2789 by ".body", then we can optimize the unwind directives away. */
2790 if (list
->r
.type
== prologue
2791 && (list
->next
->r
.type
== endp
2792 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2798 /* Given a complete record list, process any records which have
2799 unresolved fields, (ie length counts for a prologue). After
2800 this has been run, all necessary information should be available
2801 within each record to generate an image. */
2804 fixup_unw_records (unw_rec_list
*list
, int before_relax
)
2806 unw_rec_list
*ptr
, *region
= 0;
2807 unsigned long first_addr
= 0, rlen
= 0, t
;
2808 fragS
*first_frag
= 0;
2810 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2812 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2813 as_bad (_(" Insn slot not set in unwind record."));
2814 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2815 first_addr
, first_frag
, before_relax
);
2816 switch (ptr
->r
.type
)
2824 unsigned long last_addr
= 0;
2825 fragS
*last_frag
= NULL
;
2827 first_addr
= ptr
->slot_number
;
2828 first_frag
= ptr
->slot_frag
;
2829 /* Find either the next body/prologue start, or the end of
2830 the function, and determine the size of the region. */
2831 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2832 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2833 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2835 last_addr
= last
->slot_number
;
2836 last_frag
= last
->slot_frag
;
2839 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2841 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2842 if (ptr
->r
.type
== body
)
2843 /* End of region. */
2851 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2853 /* This happens when a memory-stack-less procedure uses a
2854 ".restore sp" directive at the end of a region to pop
2856 ptr
->r
.record
.b
.t
= 0;
2867 case priunat_when_gr
:
2868 case priunat_when_mem
:
2872 ptr
->r
.record
.p
.t
= t
;
2880 case spill_psprel_p
:
2881 ptr
->r
.record
.x
.t
= t
;
2887 as_bad (_("frgr_mem record before region record!"));
2890 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2891 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2892 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2893 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2898 as_bad (_("fr_mem record before region record!"));
2901 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2902 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2907 as_bad (_("gr_mem record before region record!"));
2910 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2911 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2916 as_bad (_("br_mem record before region record!"));
2919 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2920 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2926 as_bad (_("gr_gr record before region record!"));
2929 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2934 as_bad (_("br_gr record before region record!"));
2937 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2946 /* Estimate the size of a frag before relaxing. We only have one type of frag
2947 to handle here, which is the unwind info frag. */
2950 ia64_estimate_size_before_relax (fragS
*frag
,
2951 asection
*segtype ATTRIBUTE_UNUSED
)
2956 /* ??? This code is identical to the first part of ia64_convert_frag. */
2957 list
= (unw_rec_list
*) frag
->fr_opcode
;
2958 fixup_unw_records (list
, 0);
2960 len
= calc_record_size (list
);
2961 /* pad to pointer-size boundary. */
2962 pad
= len
% md
.pointer_size
;
2964 len
+= md
.pointer_size
- pad
;
2965 /* Add 8 for the header. */
2967 /* Add a pointer for the personality offset. */
2968 if (frag
->fr_offset
)
2969 size
+= md
.pointer_size
;
2971 /* fr_var carries the max_chars that we created the fragment with.
2972 We must, of course, have allocated enough memory earlier. */
2973 gas_assert (frag
->fr_var
>= size
);
2975 return frag
->fr_fix
+ size
;
2978 /* This function converts a rs_machine_dependent variant frag into a
2979 normal fill frag with the unwind image from the record list. */
2981 ia64_convert_frag (fragS
*frag
)
2987 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2988 list
= (unw_rec_list
*) frag
->fr_opcode
;
2989 fixup_unw_records (list
, 0);
2991 len
= calc_record_size (list
);
2992 /* pad to pointer-size boundary. */
2993 pad
= len
% md
.pointer_size
;
2995 len
+= md
.pointer_size
- pad
;
2996 /* Add 8 for the header. */
2998 /* Add a pointer for the personality offset. */
2999 if (frag
->fr_offset
)
3000 size
+= md
.pointer_size
;
3002 /* fr_var carries the max_chars that we created the fragment with.
3003 We must, of course, have allocated enough memory earlier. */
3004 gas_assert (frag
->fr_var
>= size
);
3006 /* Initialize the header area. fr_offset is initialized with
3007 unwind.personality_routine. */
3008 if (frag
->fr_offset
)
3010 if (md
.flags
& EF_IA_64_ABI64
)
3011 flag_value
= (bfd_vma
) 3 << 32;
3013 /* 32-bit unwind info block. */
3014 flag_value
= (bfd_vma
) 0x1003 << 32;
3019 md_number_to_chars (frag
->fr_literal
,
3020 (((bfd_vma
) 1 << 48) /* Version. */
3021 | flag_value
/* U & E handler flags. */
3022 | (len
/ md
.pointer_size
)), /* Length. */
3025 /* Skip the header. */
3026 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
3027 process_unw_records (list
, output_vbyte_mem
);
3029 /* Fill the padding bytes with zeros. */
3031 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
3032 md
.pointer_size
- pad
);
3033 /* Fill the unwind personality with zeros. */
3034 if (frag
->fr_offset
)
3035 md_number_to_chars (frag
->fr_literal
+ size
- md
.pointer_size
, 0,
3038 frag
->fr_fix
+= size
;
3039 frag
->fr_type
= rs_fill
;
3041 frag
->fr_offset
= 0;
3045 parse_predicate_and_operand (expressionS
*e
, unsigned *qp
, const char *po
)
3047 int sep
= parse_operand_and_eval (e
, ',');
3049 *qp
= e
->X_add_number
- REG_P
;
3050 if (e
->X_op
!= O_register
|| *qp
> 63)
3052 as_bad (_("First operand to .%s must be a predicate"), po
);
3056 as_warn (_("Pointless use of p0 as first operand to .%s"), po
);
3058 sep
= parse_operand_and_eval (e
, ',');
3065 convert_expr_to_ab_reg (const expressionS
*e
,
3071 unsigned int reg
= e
->X_add_number
;
3073 *ab
= *regp
= 0; /* Anything valid is good here. */
3075 if (e
->X_op
!= O_register
)
3076 reg
= REG_GR
; /* Anything invalid is good here. */
3078 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
3081 *regp
= reg
- REG_GR
;
3083 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
3084 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
3087 *regp
= reg
- REG_FR
;
3089 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3092 *regp
= reg
- REG_BR
;
3099 case REG_PR
: *regp
= 0; break;
3100 case REG_PSP
: *regp
= 1; break;
3101 case REG_PRIUNAT
: *regp
= 2; break;
3102 case REG_BR
+ 0: *regp
= 3; break;
3103 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3104 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3105 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3106 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3107 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3108 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3109 case REG_AR
+ AR_LC
: *regp
= 10; break;
3112 as_bad (_("Operand %d to .%s must be a preserved register"), n
, po
);
3119 convert_expr_to_xy_reg (const expressionS
*e
,
3125 unsigned int reg
= e
->X_add_number
;
3127 *xy
= *regp
= 0; /* Anything valid is good here. */
3129 if (e
->X_op
!= O_register
)
3130 reg
= REG_GR
; /* Anything invalid is good here. */
3132 if (reg
>= (REG_GR
+ 1) && reg
<= (REG_GR
+ 127))
3135 *regp
= reg
- REG_GR
;
3137 else if (reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 127))
3140 *regp
= reg
- REG_FR
;
3142 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3145 *regp
= reg
- REG_BR
;
3148 as_bad (_("Operand %d to .%s must be a writable register"), n
, po
);
3154 /* The current frag is an alignment frag. */
3155 align_frag
= frag_now
;
3156 s_align_bytes (arg
);
3160 dot_radix (int dummy ATTRIBUTE_UNUSED
)
3167 if (is_it_end_of_statement ())
3169 ch
= get_symbol_name (&radix
);
3170 ia64_canonicalize_symbol_name (radix
);
3171 if (strcasecmp (radix
, "C"))
3172 as_bad (_("Radix `%s' unsupported or invalid"), radix
);
3173 (void) restore_line_pointer (ch
);
3174 demand_empty_rest_of_line ();
3177 /* Helper function for .loc directives. If the assembler is not generating
3178 line number info, then we need to remember which instructions have a .loc
3179 directive, and only call dwarf2_gen_line_info for those instructions. */
3184 CURR_SLOT
.loc_directive_seen
= 1;
3185 dwarf2_directive_loc (x
);
3188 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3190 dot_special_section (int which
)
3192 set_section ((char *) special_section_name
[which
]);
3195 /* Return -1 for warning and 0 for error. */
3198 unwind_diagnostic (const char * region
, const char *directive
)
3200 if (md
.unwind_check
== unwind_check_warning
)
3202 as_warn (_(".%s outside of %s"), directive
, region
);
3207 as_bad (_(".%s outside of %s"), directive
, region
);
3208 ignore_rest_of_line ();
3213 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3214 a procedure but the unwind directive check is set to warning, 0 if
3215 a directive isn't in a procedure and the unwind directive check is set
3219 in_procedure (const char *directive
)
3221 if (unwind
.proc_pending
.sym
3222 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3224 return unwind_diagnostic ("procedure", directive
);
3227 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3228 a prologue but the unwind directive check is set to warning, 0 if
3229 a directive isn't in a prologue and the unwind directive check is set
3233 in_prologue (const char *directive
)
3235 int in
= in_procedure (directive
);
3237 if (in
> 0 && !unwind
.prologue
)
3238 in
= unwind_diagnostic ("prologue", directive
);
3239 check_pending_save ();
3243 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3244 a body but the unwind directive check is set to warning, 0 if
3245 a directive isn't in a body and the unwind directive check is set
3249 in_body (const char *directive
)
3251 int in
= in_procedure (directive
);
3253 if (in
> 0 && !unwind
.body
)
3254 in
= unwind_diagnostic ("body region", directive
);
3259 add_unwind_entry (unw_rec_list
*ptr
, int sep
)
3264 unwind
.tail
->next
= ptr
;
3269 /* The current entry can in fact be a chain of unwind entries. */
3270 if (unwind
.current_entry
== NULL
)
3271 unwind
.current_entry
= ptr
;
3274 /* The current entry can in fact be a chain of unwind entries. */
3275 if (unwind
.current_entry
== NULL
)
3276 unwind
.current_entry
= ptr
;
3281 /* Parse a tag permitted for the current directive. */
3285 ch
= get_symbol_name (&name
);
3286 /* FIXME: For now, just issue a warning that this isn't implemented. */
3293 as_warn (_("Tags on unwind pseudo-ops aren't supported, yet"));
3296 (void) restore_line_pointer (ch
);
3298 if (sep
!= NOT_A_CHAR
)
3299 demand_empty_rest_of_line ();
3303 dot_fframe (int dummy ATTRIBUTE_UNUSED
)
3308 if (!in_prologue ("fframe"))
3311 sep
= parse_operand_and_eval (&e
, ',');
3313 if (e
.X_op
!= O_constant
)
3315 as_bad (_("First operand to .fframe must be a constant"));
3318 add_unwind_entry (output_mem_stack_f (e
.X_add_number
), sep
);
3322 dot_vframe (int dummy ATTRIBUTE_UNUSED
)
3328 if (!in_prologue ("vframe"))
3331 sep
= parse_operand_and_eval (&e
, ',');
3332 reg
= e
.X_add_number
- REG_GR
;
3333 if (e
.X_op
!= O_register
|| reg
> 127)
3335 as_bad (_("First operand to .vframe must be a general register"));
3338 add_unwind_entry (output_mem_stack_v (), sep
);
3339 if (! (unwind
.prologue_mask
& 2))
3340 add_unwind_entry (output_psp_gr (reg
), NOT_A_CHAR
);
3341 else if (reg
!= unwind
.prologue_gr
3342 + (unsigned) popcount (unwind
.prologue_mask
& -(2 << 1)))
3343 as_warn (_("Operand of .vframe contradicts .prologue"));
3347 dot_vframesp (int psp
)
3353 as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant"));
3355 if (!in_prologue ("vframesp"))
3358 sep
= parse_operand_and_eval (&e
, ',');
3359 if (e
.X_op
!= O_constant
)
3361 as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)"));
3364 add_unwind_entry (output_mem_stack_v (), sep
);
3365 add_unwind_entry (output_psp_sprel (e
.X_add_number
), NOT_A_CHAR
);
3369 dot_save (int dummy ATTRIBUTE_UNUSED
)
3372 unsigned reg1
, reg2
;
3375 if (!in_prologue ("save"))
3378 sep
= parse_operand_and_eval (&e1
, ',');
3380 sep
= parse_operand_and_eval (&e2
, ',');
3384 reg1
= e1
.X_add_number
;
3385 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3386 if (e1
.X_op
!= O_register
)
3388 as_bad (_("First operand to .save not a register"));
3389 reg1
= REG_PR
; /* Anything valid is good here. */
3391 reg2
= e2
.X_add_number
- REG_GR
;
3392 if (e2
.X_op
!= O_register
|| reg2
> 127)
3394 as_bad (_("Second operand to .save not a valid register"));
3399 case REG_AR
+ AR_BSP
:
3400 add_unwind_entry (output_bsp_when (), sep
);
3401 add_unwind_entry (output_bsp_gr (reg2
), NOT_A_CHAR
);
3403 case REG_AR
+ AR_BSPSTORE
:
3404 add_unwind_entry (output_bspstore_when (), sep
);
3405 add_unwind_entry (output_bspstore_gr (reg2
), NOT_A_CHAR
);
3407 case REG_AR
+ AR_RNAT
:
3408 add_unwind_entry (output_rnat_when (), sep
);
3409 add_unwind_entry (output_rnat_gr (reg2
), NOT_A_CHAR
);
3411 case REG_AR
+ AR_UNAT
:
3412 add_unwind_entry (output_unat_when (), sep
);
3413 add_unwind_entry (output_unat_gr (reg2
), NOT_A_CHAR
);
3415 case REG_AR
+ AR_FPSR
:
3416 add_unwind_entry (output_fpsr_when (), sep
);
3417 add_unwind_entry (output_fpsr_gr (reg2
), NOT_A_CHAR
);
3419 case REG_AR
+ AR_PFS
:
3420 add_unwind_entry (output_pfs_when (), sep
);
3421 if (! (unwind
.prologue_mask
& 4))
3422 add_unwind_entry (output_pfs_gr (reg2
), NOT_A_CHAR
);
3423 else if (reg2
!= unwind
.prologue_gr
3424 + (unsigned) popcount (unwind
.prologue_mask
& -(4 << 1)))
3425 as_warn (_("Second operand of .save contradicts .prologue"));
3427 case REG_AR
+ AR_LC
:
3428 add_unwind_entry (output_lc_when (), sep
);
3429 add_unwind_entry (output_lc_gr (reg2
), NOT_A_CHAR
);
3432 add_unwind_entry (output_rp_when (), sep
);
3433 if (! (unwind
.prologue_mask
& 8))
3434 add_unwind_entry (output_rp_gr (reg2
), NOT_A_CHAR
);
3435 else if (reg2
!= unwind
.prologue_gr
)
3436 as_warn (_("Second operand of .save contradicts .prologue"));
3439 add_unwind_entry (output_preds_when (), sep
);
3440 if (! (unwind
.prologue_mask
& 1))
3441 add_unwind_entry (output_preds_gr (reg2
), NOT_A_CHAR
);
3442 else if (reg2
!= unwind
.prologue_gr
3443 + (unsigned) popcount (unwind
.prologue_mask
& -(1 << 1)))
3444 as_warn (_("Second operand of .save contradicts .prologue"));
3447 add_unwind_entry (output_priunat_when_gr (), sep
);
3448 add_unwind_entry (output_priunat_gr (reg2
), NOT_A_CHAR
);
3451 as_bad (_("First operand to .save not a valid register"));
3452 add_unwind_entry (NULL
, sep
);
3458 dot_restore (int dummy ATTRIBUTE_UNUSED
)
3461 unsigned long ecount
; /* # of _additional_ regions to pop */
3464 if (!in_body ("restore"))
3467 sep
= parse_operand_and_eval (&e1
, ',');
3468 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3469 as_bad (_("First operand to .restore must be stack pointer (sp)"));
3475 sep
= parse_operand_and_eval (&e2
, ',');
3476 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3478 as_bad (_("Second operand to .restore must be a constant >= 0"));
3479 e2
.X_add_number
= 0;
3481 ecount
= e2
.X_add_number
;
3484 ecount
= unwind
.prologue_count
- 1;
3486 if (ecount
>= unwind
.prologue_count
)
3488 as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"),
3489 ecount
+ 1, unwind
.prologue_count
);
3493 add_unwind_entry (output_epilogue (ecount
), sep
);
3495 if (ecount
< unwind
.prologue_count
)
3496 unwind
.prologue_count
-= ecount
+ 1;
3498 unwind
.prologue_count
= 0;
3502 dot_restorereg (int pred
)
3504 unsigned int qp
, ab
, reg
;
3507 const char * const po
= pred
? "restorereg.p" : "restorereg";
3509 if (!in_procedure (po
))
3513 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3516 sep
= parse_operand_and_eval (&e
, ',');
3519 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3521 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0, qp
), sep
);
3524 static const char *special_linkonce_name
[] =
3526 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3530 start_unwind_section (const segT text_seg
, int sec_index
)
3533 Use a slightly ugly scheme to derive the unwind section names from
3534 the text section name:
3536 text sect. unwind table sect.
3537 name: name: comments:
3538 ---------- ----------------- --------------------------------
3540 .text.foo .IA_64.unwind.text.foo
3541 .foo .IA_64.unwind.foo
3543 .gnu.linkonce.ia64unw.foo
3544 _info .IA_64.unwind_info gas issues error message (ditto)
3545 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3547 This mapping is done so that:
3549 (a) An object file with unwind info only in .text will use
3550 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3551 This follows the letter of the ABI and also ensures backwards
3552 compatibility with older toolchains.
3554 (b) An object file with unwind info in multiple text sections
3555 will use separate unwind sections for each text section.
3556 This allows us to properly set the "sh_info" and "sh_link"
3557 fields in SHT_IA_64_UNWIND as required by the ABI and also
3558 lets GNU ld support programs with multiple segments
3559 containing unwind info (as might be the case for certain
3560 embedded applications).
3562 (c) An error is issued if there would be a name clash.
3565 const char *text_name
, *sec_text_name
;
3567 const char *prefix
= special_section_name
[sec_index
];
3570 sec_text_name
= segment_name (text_seg
);
3571 text_name
= sec_text_name
;
3572 if (strncmp (text_name
, "_info", 5) == 0)
3574 as_bad (_("Illegal section name `%s' (causes unwind section name clash)"),
3576 ignore_rest_of_line ();
3579 if (strcmp (text_name
, ".text") == 0)
3582 /* Build the unwind section name by appending the (possibly stripped)
3583 text section name to the unwind prefix. */
3585 if (strncmp (text_name
, ".gnu.linkonce.t.",
3586 sizeof (".gnu.linkonce.t.") - 1) == 0)
3588 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3589 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3592 sec_name
= concat (prefix
, suffix
, NULL
);
3594 /* Handle COMDAT group. */
3595 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3596 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3599 const char *group_name
= elf_group_name (text_seg
);
3601 if (group_name
== NULL
)
3603 as_bad (_("Group section `%s' has no group signature"),
3605 ignore_rest_of_line ();
3610 /* We have to construct a fake section directive. */
3611 section
= concat (sec_name
, ",\"aG\",@progbits,", group_name
, ",comdat", NULL
);
3612 set_section (section
);
3617 set_section (sec_name
);
3618 bfd_set_section_flags (stdoutput
, now_seg
,
3619 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3622 elf_linked_to_section (now_seg
) = text_seg
;
3627 generate_unwind_image (const segT text_seg
)
3632 /* Mark the end of the unwind info, so that we can compute the size of the
3633 last unwind region. */
3634 add_unwind_entry (output_endp (), NOT_A_CHAR
);
3636 /* Force out pending instructions, to make sure all unwind records have
3637 a valid slot_number field. */
3638 ia64_flush_insns ();
3640 /* Generate the unwind record. */
3641 list
= optimize_unw_records (unwind
.list
);
3642 fixup_unw_records (list
, 1);
3643 size
= calc_record_size (list
);
3645 if (size
> 0 || unwind
.force_unwind_entry
)
3647 unwind
.force_unwind_entry
= 0;
3648 /* pad to pointer-size boundary. */
3649 pad
= size
% md
.pointer_size
;
3651 size
+= md
.pointer_size
- pad
;
3652 /* Add 8 for the header. */
3654 /* Add a pointer for the personality offset. */
3655 if (unwind
.personality_routine
)
3656 size
+= md
.pointer_size
;
3659 /* If there are unwind records, switch sections, and output the info. */
3663 bfd_reloc_code_real_type reloc
;
3665 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3667 /* Make sure the section has 4 byte alignment for ILP32 and
3668 8 byte alignment for LP64. */
3669 frag_align (md
.pointer_size_shift
, 0, 0);
3670 record_alignment (now_seg
, md
.pointer_size_shift
);
3672 /* Set expression which points to start of unwind descriptor area. */
3673 unwind
.info
= expr_build_dot ();
3675 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3676 (offsetT
) (long) unwind
.personality_routine
,
3679 /* Add the personality address to the image. */
3680 if (unwind
.personality_routine
!= 0)
3682 exp
.X_op
= O_symbol
;
3683 exp
.X_add_symbol
= unwind
.personality_routine
;
3684 exp
.X_add_number
= 0;
3686 if (md
.flags
& EF_IA_64_BE
)
3688 if (md
.flags
& EF_IA_64_ABI64
)
3689 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3691 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3695 if (md
.flags
& EF_IA_64_ABI64
)
3696 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3698 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3701 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3702 md
.pointer_size
, &exp
, 0, reloc
);
3703 unwind
.personality_routine
= 0;
3707 free_saved_prologue_counts ();
3708 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3712 dot_handlerdata (int dummy ATTRIBUTE_UNUSED
)
3714 if (!in_procedure ("handlerdata"))
3716 unwind
.force_unwind_entry
= 1;
3718 /* Remember which segment we're in so we can switch back after .endp */
3719 unwind
.saved_text_seg
= now_seg
;
3720 unwind
.saved_text_subseg
= now_subseg
;
3722 /* Generate unwind info into unwind-info section and then leave that
3723 section as the currently active one so dataXX directives go into
3724 the language specific data area of the unwind info block. */
3725 generate_unwind_image (now_seg
);
3726 demand_empty_rest_of_line ();
3730 dot_unwentry (int dummy ATTRIBUTE_UNUSED
)
3732 if (!in_procedure ("unwentry"))
3734 unwind
.force_unwind_entry
= 1;
3735 demand_empty_rest_of_line ();
3739 dot_altrp (int dummy ATTRIBUTE_UNUSED
)
3744 if (!in_prologue ("altrp"))
3747 parse_operand_and_eval (&e
, 0);
3748 reg
= e
.X_add_number
- REG_BR
;
3749 if (e
.X_op
!= O_register
|| reg
> 7)
3751 as_bad (_("First operand to .altrp not a valid branch register"));
3754 add_unwind_entry (output_rp_br (reg
), 0);
3758 dot_savemem (int psprel
)
3763 const char * const po
= psprel
? "savepsp" : "savesp";
3765 if (!in_prologue (po
))
3768 sep
= parse_operand_and_eval (&e1
, ',');
3770 sep
= parse_operand_and_eval (&e2
, ',');
3774 reg1
= e1
.X_add_number
;
3775 val
= e2
.X_add_number
;
3777 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3778 if (e1
.X_op
!= O_register
)
3780 as_bad (_("First operand to .%s not a register"), po
);
3781 reg1
= REG_PR
; /* Anything valid is good here. */
3783 if (e2
.X_op
!= O_constant
)
3785 as_bad (_("Second operand to .%s not a constant"), po
);
3791 case REG_AR
+ AR_BSP
:
3792 add_unwind_entry (output_bsp_when (), sep
);
3793 add_unwind_entry ((psprel
3795 : output_bsp_sprel
) (val
), NOT_A_CHAR
);
3797 case REG_AR
+ AR_BSPSTORE
:
3798 add_unwind_entry (output_bspstore_when (), sep
);
3799 add_unwind_entry ((psprel
3800 ? output_bspstore_psprel
3801 : output_bspstore_sprel
) (val
), NOT_A_CHAR
);
3803 case REG_AR
+ AR_RNAT
:
3804 add_unwind_entry (output_rnat_when (), sep
);
3805 add_unwind_entry ((psprel
3806 ? output_rnat_psprel
3807 : output_rnat_sprel
) (val
), NOT_A_CHAR
);
3809 case REG_AR
+ AR_UNAT
:
3810 add_unwind_entry (output_unat_when (), sep
);
3811 add_unwind_entry ((psprel
3812 ? output_unat_psprel
3813 : output_unat_sprel
) (val
), NOT_A_CHAR
);
3815 case REG_AR
+ AR_FPSR
:
3816 add_unwind_entry (output_fpsr_when (), sep
);
3817 add_unwind_entry ((psprel
3818 ? output_fpsr_psprel
3819 : output_fpsr_sprel
) (val
), NOT_A_CHAR
);
3821 case REG_AR
+ AR_PFS
:
3822 add_unwind_entry (output_pfs_when (), sep
);
3823 add_unwind_entry ((psprel
3825 : output_pfs_sprel
) (val
), NOT_A_CHAR
);
3827 case REG_AR
+ AR_LC
:
3828 add_unwind_entry (output_lc_when (), sep
);
3829 add_unwind_entry ((psprel
3831 : output_lc_sprel
) (val
), NOT_A_CHAR
);
3834 add_unwind_entry (output_rp_when (), sep
);
3835 add_unwind_entry ((psprel
3837 : output_rp_sprel
) (val
), NOT_A_CHAR
);
3840 add_unwind_entry (output_preds_when (), sep
);
3841 add_unwind_entry ((psprel
3842 ? output_preds_psprel
3843 : output_preds_sprel
) (val
), NOT_A_CHAR
);
3846 add_unwind_entry (output_priunat_when_mem (), sep
);
3847 add_unwind_entry ((psprel
3848 ? output_priunat_psprel
3849 : output_priunat_sprel
) (val
), NOT_A_CHAR
);
3852 as_bad (_("First operand to .%s not a valid register"), po
);
3853 add_unwind_entry (NULL
, sep
);
3859 dot_saveg (int dummy ATTRIBUTE_UNUSED
)
3865 if (!in_prologue ("save.g"))
3868 sep
= parse_operand_and_eval (&e
, ',');
3870 grmask
= e
.X_add_number
;
3871 if (e
.X_op
!= O_constant
3872 || e
.X_add_number
<= 0
3873 || e
.X_add_number
> 0xf)
3875 as_bad (_("First operand to .save.g must be a positive 4-bit constant"));
3882 int n
= popcount (grmask
);
3884 parse_operand_and_eval (&e
, 0);
3885 reg
= e
.X_add_number
- REG_GR
;
3886 if (e
.X_op
!= O_register
|| reg
> 127)
3888 as_bad (_("Second operand to .save.g must be a general register"));
3891 else if (reg
> 128U - n
)
3893 as_bad (_("Second operand to .save.g must be the first of %d general registers"), n
);
3896 add_unwind_entry (output_gr_gr (grmask
, reg
), 0);
3899 add_unwind_entry (output_gr_mem (grmask
), 0);
3903 dot_savef (int dummy ATTRIBUTE_UNUSED
)
3907 if (!in_prologue ("save.f"))
3910 parse_operand_and_eval (&e
, 0);
3912 if (e
.X_op
!= O_constant
3913 || e
.X_add_number
<= 0
3914 || e
.X_add_number
> 0xfffff)
3916 as_bad (_("Operand to .save.f must be a positive 20-bit constant"));
3919 add_unwind_entry (output_fr_mem (e
.X_add_number
), 0);
3923 dot_saveb (int dummy ATTRIBUTE_UNUSED
)
3929 if (!in_prologue ("save.b"))
3932 sep
= parse_operand_and_eval (&e
, ',');
3934 brmask
= e
.X_add_number
;
3935 if (e
.X_op
!= O_constant
3936 || e
.X_add_number
<= 0
3937 || e
.X_add_number
> 0x1f)
3939 as_bad (_("First operand to .save.b must be a positive 5-bit constant"));
3946 int n
= popcount (brmask
);
3948 parse_operand_and_eval (&e
, 0);
3949 reg
= e
.X_add_number
- REG_GR
;
3950 if (e
.X_op
!= O_register
|| reg
> 127)
3952 as_bad (_("Second operand to .save.b must be a general register"));
3955 else if (reg
> 128U - n
)
3957 as_bad (_("Second operand to .save.b must be the first of %d general registers"), n
);
3960 add_unwind_entry (output_br_gr (brmask
, reg
), 0);
3963 add_unwind_entry (output_br_mem (brmask
), 0);
3967 dot_savegf (int dummy ATTRIBUTE_UNUSED
)
3971 if (!in_prologue ("save.gf"))
3974 if (parse_operand_and_eval (&e1
, ',') == ',')
3975 parse_operand_and_eval (&e2
, 0);
3979 if (e1
.X_op
!= O_constant
3980 || e1
.X_add_number
< 0
3981 || e1
.X_add_number
> 0xf)
3983 as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant"));
3985 e1
.X_add_number
= 0;
3987 if (e2
.X_op
!= O_constant
3988 || e2
.X_add_number
< 0
3989 || e2
.X_add_number
> 0xfffff)
3991 as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant"));
3993 e2
.X_add_number
= 0;
3995 if (e1
.X_op
== O_constant
3996 && e2
.X_op
== O_constant
3997 && e1
.X_add_number
== 0
3998 && e2
.X_add_number
== 0)
3999 as_bad (_("Operands to .save.gf may not be both zero"));
4001 add_unwind_entry (output_frgr_mem (e1
.X_add_number
, e2
.X_add_number
), 0);
4005 dot_spill (int dummy ATTRIBUTE_UNUSED
)
4009 if (!in_prologue ("spill"))
4012 parse_operand_and_eval (&e
, 0);
4014 if (e
.X_op
!= O_constant
)
4016 as_bad (_("Operand to .spill must be a constant"));
4019 add_unwind_entry (output_spill_base (e
.X_add_number
), 0);
4023 dot_spillreg (int pred
)
4026 unsigned int qp
, ab
, xy
, reg
, treg
;
4028 const char * const po
= pred
? "spillreg.p" : "spillreg";
4030 if (!in_procedure (po
))
4034 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4037 sep
= parse_operand_and_eval (&e
, ',');
4040 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4043 sep
= parse_operand_and_eval (&e
, ',');
4046 convert_expr_to_xy_reg (&e
, &xy
, &treg
, po
, 2 + pred
);
4048 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
, qp
), sep
);
4052 dot_spillmem (int psprel
)
4055 int pred
= (psprel
< 0), sep
;
4056 unsigned int qp
, ab
, reg
;
4062 po
= psprel
? "spillpsp.p" : "spillsp.p";
4065 po
= psprel
? "spillpsp" : "spillsp";
4067 if (!in_procedure (po
))
4071 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4074 sep
= parse_operand_and_eval (&e
, ',');
4077 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4080 sep
= parse_operand_and_eval (&e
, ',');
4083 if (e
.X_op
!= O_constant
)
4085 as_bad (_("Operand %d to .%s must be a constant"), 2 + pred
, po
);
4090 add_unwind_entry (output_spill_psprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4092 add_unwind_entry (output_spill_sprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4096 get_saved_prologue_count (unsigned long lbl
)
4098 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4100 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4104 return lpc
->prologue_count
;
4106 as_bad (_("Missing .label_state %ld"), lbl
);
4111 save_prologue_count (unsigned long lbl
, unsigned int count
)
4113 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4115 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4119 lpc
->prologue_count
= count
;
4122 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4124 new_lpc
->next
= unwind
.saved_prologue_counts
;
4125 new_lpc
->label_number
= lbl
;
4126 new_lpc
->prologue_count
= count
;
4127 unwind
.saved_prologue_counts
= new_lpc
;
4132 free_saved_prologue_counts ()
4134 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4135 label_prologue_count
*next
;
4144 unwind
.saved_prologue_counts
= NULL
;
4148 dot_label_state (int dummy ATTRIBUTE_UNUSED
)
4152 if (!in_body ("label_state"))
4155 parse_operand_and_eval (&e
, 0);
4156 if (e
.X_op
== O_constant
)
4157 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4160 as_bad (_("Operand to .label_state must be a constant"));
4163 add_unwind_entry (output_label_state (e
.X_add_number
), 0);
4167 dot_copy_state (int dummy ATTRIBUTE_UNUSED
)
4171 if (!in_body ("copy_state"))
4174 parse_operand_and_eval (&e
, 0);
4175 if (e
.X_op
== O_constant
)
4176 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4179 as_bad (_("Operand to .copy_state must be a constant"));
4182 add_unwind_entry (output_copy_state (e
.X_add_number
), 0);
4186 dot_unwabi (int dummy ATTRIBUTE_UNUSED
)
4191 if (!in_prologue ("unwabi"))
4194 sep
= parse_operand_and_eval (&e1
, ',');
4196 parse_operand_and_eval (&e2
, 0);
4200 if (e1
.X_op
!= O_constant
)
4202 as_bad (_("First operand to .unwabi must be a constant"));
4203 e1
.X_add_number
= 0;
4206 if (e2
.X_op
!= O_constant
)
4208 as_bad (_("Second operand to .unwabi must be a constant"));
4209 e2
.X_add_number
= 0;
4212 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
), 0);
4216 dot_personality (int dummy ATTRIBUTE_UNUSED
)
4220 if (!in_procedure ("personality"))
4223 c
= get_symbol_name (&name
);
4224 p
= input_line_pointer
;
4225 unwind
.personality_routine
= symbol_find_or_make (name
);
4226 unwind
.force_unwind_entry
= 1;
4228 SKIP_WHITESPACE_AFTER_NAME ();
4229 demand_empty_rest_of_line ();
4233 dot_proc (int dummy ATTRIBUTE_UNUSED
)
4237 proc_pending
*pending
, *last_pending
;
4239 if (unwind
.proc_pending
.sym
)
4241 (md
.unwind_check
== unwind_check_warning
4243 : as_bad
) (_("Missing .endp after previous .proc"));
4244 while (unwind
.proc_pending
.next
)
4246 pending
= unwind
.proc_pending
.next
;
4247 unwind
.proc_pending
.next
= pending
->next
;
4251 last_pending
= NULL
;
4253 /* Parse names of main and alternate entry points and mark them as
4254 function symbols: */
4258 c
= get_symbol_name (&name
);
4259 p
= input_line_pointer
;
4261 as_bad (_("Empty argument of .proc"));
4264 sym
= symbol_find_or_make (name
);
4265 if (S_IS_DEFINED (sym
))
4266 as_bad (_("`%s' was already defined"), name
);
4267 else if (!last_pending
)
4269 unwind
.proc_pending
.sym
= sym
;
4270 last_pending
= &unwind
.proc_pending
;
4274 pending
= xmalloc (sizeof (*pending
));
4276 last_pending
= last_pending
->next
= pending
;
4278 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4281 SKIP_WHITESPACE_AFTER_NAME ();
4282 if (*input_line_pointer
!= ',')
4284 ++input_line_pointer
;
4288 unwind
.proc_pending
.sym
= expr_build_dot ();
4289 last_pending
= &unwind
.proc_pending
;
4291 last_pending
->next
= NULL
;
4292 demand_empty_rest_of_line ();
4295 unwind
.prologue
= 0;
4296 unwind
.prologue_count
= 0;
4299 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4300 unwind
.personality_routine
= 0;
4304 dot_body (int dummy ATTRIBUTE_UNUSED
)
4306 if (!in_procedure ("body"))
4308 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4309 as_warn (_("Initial .body should precede any instructions"));
4310 check_pending_save ();
4312 unwind
.prologue
= 0;
4313 unwind
.prologue_mask
= 0;
4316 add_unwind_entry (output_body (), 0);
4320 dot_prologue (int dummy ATTRIBUTE_UNUSED
)
4322 unsigned mask
= 0, grsave
= 0;
4324 if (!in_procedure ("prologue"))
4326 if (unwind
.prologue
)
4328 as_bad (_(".prologue within prologue"));
4329 ignore_rest_of_line ();
4332 if (!unwind
.body
&& unwind
.insn
)
4333 as_warn (_("Initial .prologue should precede any instructions"));
4335 if (!is_it_end_of_statement ())
4338 int n
, sep
= parse_operand_and_eval (&e
, ',');
4340 if (e
.X_op
!= O_constant
4341 || e
.X_add_number
< 0
4342 || e
.X_add_number
> 0xf)
4343 as_bad (_("First operand to .prologue must be a positive 4-bit constant"));
4344 else if (e
.X_add_number
== 0)
4345 as_warn (_("Pointless use of zero first operand to .prologue"));
4347 mask
= e
.X_add_number
;
4349 n
= popcount (mask
);
4352 parse_operand_and_eval (&e
, 0);
4356 if (e
.X_op
== O_constant
4357 && e
.X_add_number
>= 0
4358 && e
.X_add_number
< 128)
4360 if (md
.unwind_check
== unwind_check_error
)
4361 as_warn (_("Using a constant as second operand to .prologue is deprecated"));
4362 grsave
= e
.X_add_number
;
4364 else if (e
.X_op
!= O_register
4365 || (grsave
= e
.X_add_number
- REG_GR
) > 127)
4367 as_bad (_("Second operand to .prologue must be a general register"));
4370 else if (grsave
> 128U - n
)
4372 as_bad (_("Second operand to .prologue must be the first of %d general registers"), n
);
4378 add_unwind_entry (output_prologue_gr (mask
, grsave
), 0);
4380 add_unwind_entry (output_prologue (), 0);
4382 unwind
.prologue
= 1;
4383 unwind
.prologue_mask
= mask
;
4384 unwind
.prologue_gr
= grsave
;
4386 ++unwind
.prologue_count
;
4390 dot_endp (int dummy ATTRIBUTE_UNUSED
)
4393 int bytes_per_address
;
4396 subsegT saved_subseg
;
4397 proc_pending
*pending
;
4398 int unwind_check
= md
.unwind_check
;
4400 md
.unwind_check
= unwind_check_error
;
4401 if (!in_procedure ("endp"))
4403 md
.unwind_check
= unwind_check
;
4405 if (unwind
.saved_text_seg
)
4407 saved_seg
= unwind
.saved_text_seg
;
4408 saved_subseg
= unwind
.saved_text_subseg
;
4409 unwind
.saved_text_seg
= NULL
;
4413 saved_seg
= now_seg
;
4414 saved_subseg
= now_subseg
;
4417 insn_group_break (1, 0, 0);
4419 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4421 generate_unwind_image (saved_seg
);
4423 if (unwind
.info
|| unwind
.force_unwind_entry
)
4427 subseg_set (md
.last_text_seg
, 0);
4428 proc_end
= expr_build_dot ();
4430 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4432 /* Make sure that section has 4 byte alignment for ILP32 and
4433 8 byte alignment for LP64. */
4434 record_alignment (now_seg
, md
.pointer_size_shift
);
4436 /* Need space for 3 pointers for procedure start, procedure end,
4438 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4439 where
= frag_now_fix () - (3 * md
.pointer_size
);
4440 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4442 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4443 e
.X_op
= O_pseudo_fixup
;
4444 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4446 if (!S_IS_LOCAL (unwind
.proc_pending
.sym
)
4447 && S_IS_DEFINED (unwind
.proc_pending
.sym
))
4448 e
.X_add_symbol
= symbol_temp_new (S_GET_SEGMENT (unwind
.proc_pending
.sym
),
4449 S_GET_VALUE (unwind
.proc_pending
.sym
),
4450 symbol_get_frag (unwind
.proc_pending
.sym
));
4452 e
.X_add_symbol
= unwind
.proc_pending
.sym
;
4453 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
,
4456 e
.X_op
= O_pseudo_fixup
;
4457 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4459 e
.X_add_symbol
= proc_end
;
4460 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4461 bytes_per_address
, &e
, BFD_RELOC_NONE
);
4465 e
.X_op
= O_pseudo_fixup
;
4466 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4468 e
.X_add_symbol
= unwind
.info
;
4469 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4470 bytes_per_address
, &e
, BFD_RELOC_NONE
);
4473 subseg_set (saved_seg
, saved_subseg
);
4475 /* Set symbol sizes. */
4476 pending
= &unwind
.proc_pending
;
4477 if (S_GET_NAME (pending
->sym
))
4481 symbolS
*sym
= pending
->sym
;
4483 if (!S_IS_DEFINED (sym
))
4484 as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym
));
4485 else if (S_GET_SIZE (sym
) == 0
4486 && symbol_get_obj (sym
)->size
== NULL
)
4488 fragS
*frag
= symbol_get_frag (sym
);
4492 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4493 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4496 symbol_get_obj (sym
)->size
=
4497 (expressionS
*) xmalloc (sizeof (expressionS
));
4498 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4499 symbol_get_obj (sym
)->size
->X_add_symbol
4500 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4501 frag_now_fix (), frag_now
);
4502 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4503 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4507 } while ((pending
= pending
->next
) != NULL
);
4510 /* Parse names of main and alternate entry points. */
4516 c
= get_symbol_name (&name
);
4517 p
= input_line_pointer
;
4519 (md
.unwind_check
== unwind_check_warning
4521 : as_bad
) (_("Empty argument of .endp"));
4524 symbolS
*sym
= symbol_find (name
);
4526 for (pending
= &unwind
.proc_pending
; pending
; pending
= pending
->next
)
4528 if (sym
== pending
->sym
)
4530 pending
->sym
= NULL
;
4534 if (!sym
|| !pending
)
4535 as_warn (_("`%s' was not specified with previous .proc"), name
);
4538 SKIP_WHITESPACE_AFTER_NAME ();
4539 if (*input_line_pointer
!= ',')
4541 ++input_line_pointer
;
4543 demand_empty_rest_of_line ();
4545 /* Deliberately only checking for the main entry point here; the
4546 language spec even says all arguments to .endp are ignored. */
4547 if (unwind
.proc_pending
.sym
4548 && S_GET_NAME (unwind
.proc_pending
.sym
)
4549 && strcmp (S_GET_NAME (unwind
.proc_pending
.sym
), FAKE_LABEL_NAME
))
4550 as_warn (_("`%s' should be an operand to this .endp"),
4551 S_GET_NAME (unwind
.proc_pending
.sym
));
4552 while (unwind
.proc_pending
.next
)
4554 pending
= unwind
.proc_pending
.next
;
4555 unwind
.proc_pending
.next
= pending
->next
;
4558 unwind
.proc_pending
.sym
= unwind
.info
= NULL
;
4562 dot_template (int template_val
)
4564 CURR_SLOT
.user_template
= template_val
;
4568 dot_regstk (int dummy ATTRIBUTE_UNUSED
)
4570 int ins
, locs
, outs
, rots
;
4572 if (is_it_end_of_statement ())
4573 ins
= locs
= outs
= rots
= 0;
4576 ins
= get_absolute_expression ();
4577 if (*input_line_pointer
++ != ',')
4579 locs
= get_absolute_expression ();
4580 if (*input_line_pointer
++ != ',')
4582 outs
= get_absolute_expression ();
4583 if (*input_line_pointer
++ != ',')
4585 rots
= get_absolute_expression ();
4587 set_regstack (ins
, locs
, outs
, rots
);
4591 as_bad (_("Comma expected"));
4592 ignore_rest_of_line ();
4599 valueT num_alloced
= 0;
4600 struct dynreg
**drpp
, *dr
;
4601 int ch
, base_reg
= 0;
4607 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4608 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4609 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4613 /* First, remove existing names from hash table. */
4614 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4616 hash_delete (md
.dynreg_hash
, dr
->name
, FALSE
);
4617 /* FIXME: Free dr->name. */
4621 drpp
= &md
.dynreg
[type
];
4624 ch
= get_symbol_name (&start
);
4625 len
= strlen (ia64_canonicalize_symbol_name (start
));
4626 *input_line_pointer
= ch
;
4628 SKIP_WHITESPACE_AFTER_NAME ();
4629 if (*input_line_pointer
!= '[')
4631 as_bad (_("Expected '['"));
4634 ++input_line_pointer
; /* skip '[' */
4636 num_regs
= get_absolute_expression ();
4638 if (*input_line_pointer
++ != ']')
4640 as_bad (_("Expected ']'"));
4645 as_bad (_("Number of elements must be positive"));
4650 num_alloced
+= num_regs
;
4654 if (num_alloced
> md
.rot
.num_regs
)
4656 as_bad (_("Used more than the declared %d rotating registers"),
4662 if (num_alloced
> 96)
4664 as_bad (_("Used more than the available 96 rotating registers"));
4669 if (num_alloced
> 48)
4671 as_bad (_("Used more than the available 48 rotating registers"));
4682 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4683 memset (*drpp
, 0, sizeof (*dr
));
4686 name
= obstack_alloc (¬es
, len
+ 1);
4687 memcpy (name
, start
, len
);
4692 dr
->num_regs
= num_regs
;
4693 dr
->base
= base_reg
;
4695 base_reg
+= num_regs
;
4697 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4699 as_bad (_("Attempt to redefine register set `%s'"), name
);
4700 obstack_free (¬es
, name
);
4704 if (*input_line_pointer
!= ',')
4706 ++input_line_pointer
; /* skip comma */
4709 demand_empty_rest_of_line ();
4713 ignore_rest_of_line ();
4717 dot_byteorder (int byteorder
)
4719 segment_info_type
*seginfo
= seg_info (now_seg
);
4721 if (byteorder
== -1)
4723 if (seginfo
->tc_segment_info_data
.endian
== 0)
4724 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4725 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4728 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4730 if (target_big_endian
!= byteorder
)
4732 target_big_endian
= byteorder
;
4733 if (target_big_endian
)
4735 ia64_number_to_chars
= number_to_chars_bigendian
;
4736 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4740 ia64_number_to_chars
= number_to_chars_littleendian
;
4741 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4747 dot_psr (int dummy ATTRIBUTE_UNUSED
)
4754 ch
= get_symbol_name (&option
);
4755 if (strcmp (option
, "lsb") == 0)
4756 md
.flags
&= ~EF_IA_64_BE
;
4757 else if (strcmp (option
, "msb") == 0)
4758 md
.flags
|= EF_IA_64_BE
;
4759 else if (strcmp (option
, "abi32") == 0)
4760 md
.flags
&= ~EF_IA_64_ABI64
;
4761 else if (strcmp (option
, "abi64") == 0)
4762 md
.flags
|= EF_IA_64_ABI64
;
4764 as_bad (_("Unknown psr option `%s'"), option
);
4765 *input_line_pointer
= ch
;
4767 SKIP_WHITESPACE_AFTER_NAME ();
4768 if (*input_line_pointer
!= ',')
4771 ++input_line_pointer
;
4774 demand_empty_rest_of_line ();
4778 dot_ln (int dummy ATTRIBUTE_UNUSED
)
4780 new_logical_line (0, get_absolute_expression ());
4781 demand_empty_rest_of_line ();
4785 cross_section (int ref
, void (*builder
) (int), int ua
)
4788 int saved_auto_align
;
4789 unsigned int section_count
;
4794 start
= input_line_pointer
;
4795 c
= get_symbol_name (&name
);
4796 if (input_line_pointer
== start
)
4798 as_bad (_("Missing section name"));
4799 ignore_rest_of_line ();
4802 * input_line_pointer
= c
;
4803 SKIP_WHITESPACE_AFTER_NAME ();
4804 end
= input_line_pointer
;
4805 if (*input_line_pointer
!= ',')
4807 as_bad (_("Comma expected after section name"));
4808 ignore_rest_of_line ();
4812 end
= input_line_pointer
+ 1; /* skip comma */
4813 input_line_pointer
= start
;
4814 md
.keep_pending_output
= 1;
4815 section_count
= bfd_count_sections (stdoutput
);
4816 obj_elf_section (0);
4817 if (section_count
!= bfd_count_sections (stdoutput
))
4818 as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."));
4819 input_line_pointer
= end
;
4820 saved_auto_align
= md
.auto_align
;
4825 md
.auto_align
= saved_auto_align
;
4826 obj_elf_previous (0);
4827 md
.keep_pending_output
= 0;
4831 dot_xdata (int size
)
4833 cross_section (size
, cons
, 0);
4836 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4839 stmt_float_cons (int kind
)
4859 ia64_do_align (alignment
);
4864 stmt_cons_ua (int size
)
4866 int saved_auto_align
= md
.auto_align
;
4870 md
.auto_align
= saved_auto_align
;
4874 dot_xfloat_cons (int kind
)
4876 cross_section (kind
, stmt_float_cons
, 0);
4880 dot_xstringer (int zero
)
4882 cross_section (zero
, stringer
, 0);
4886 dot_xdata_ua (int size
)
4888 cross_section (size
, cons
, 1);
4892 dot_xfloat_cons_ua (int kind
)
4894 cross_section (kind
, float_cons
, 1);
4897 /* .reg.val <regname>,value */
4900 dot_reg_val (int dummy ATTRIBUTE_UNUSED
)
4904 expression_and_evaluate (®
);
4905 if (reg
.X_op
!= O_register
)
4907 as_bad (_("Register name expected"));
4908 ignore_rest_of_line ();
4910 else if (*input_line_pointer
++ != ',')
4912 as_bad (_("Comma expected"));
4913 ignore_rest_of_line ();
4917 valueT value
= get_absolute_expression ();
4918 int regno
= reg
.X_add_number
;
4919 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4920 as_warn (_("Register value annotation ignored"));
4923 gr_values
[regno
- REG_GR
].known
= 1;
4924 gr_values
[regno
- REG_GR
].value
= value
;
4925 gr_values
[regno
- REG_GR
].path
= md
.path
;
4928 demand_empty_rest_of_line ();
4933 .serialize.instruction
4936 dot_serialize (int type
)
4938 insn_group_break (0, 0, 0);
4940 instruction_serialization ();
4942 data_serialization ();
4943 insn_group_break (0, 0, 0);
4944 demand_empty_rest_of_line ();
4947 /* select dv checking mode
4952 A stop is inserted when changing modes
4956 dot_dv_mode (int type
)
4958 if (md
.manual_bundling
)
4959 as_warn (_("Directive invalid within a bundle"));
4961 if (type
== 'E' || type
== 'A')
4962 md
.mode_explicitly_set
= 0;
4964 md
.mode_explicitly_set
= 1;
4971 if (md
.explicit_mode
)
4972 insn_group_break (1, 0, 0);
4973 md
.explicit_mode
= 0;
4977 if (!md
.explicit_mode
)
4978 insn_group_break (1, 0, 0);
4979 md
.explicit_mode
= 1;
4983 if (md
.explicit_mode
!= md
.default_explicit_mode
)
4984 insn_group_break (1, 0, 0);
4985 md
.explicit_mode
= md
.default_explicit_mode
;
4986 md
.mode_explicitly_set
= 0;
4992 print_prmask (valueT mask
)
4995 const char *comma
= "";
4996 for (regno
= 0; regno
< 64; regno
++)
4998 if (mask
& ((valueT
) 1 << regno
))
5000 fprintf (stderr
, "%s p%d", comma
, regno
);
5007 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5008 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5009 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5010 .pred.safe_across_calls p1 [, p2 [,...]]
5014 dot_pred_rel (int type
)
5018 int p1
= -1, p2
= -1;
5022 if (*input_line_pointer
== '"')
5025 char *form
= demand_copy_C_string (&len
);
5027 if (strcmp (form
, "mutex") == 0)
5029 else if (strcmp (form
, "clear") == 0)
5031 else if (strcmp (form
, "imply") == 0)
5033 obstack_free (¬es
, form
);
5035 else if (*input_line_pointer
== '@')
5040 ++input_line_pointer
;
5041 c
= get_symbol_name (&form
);
5043 if (strcmp (form
, "mutex") == 0)
5045 else if (strcmp (form
, "clear") == 0)
5047 else if (strcmp (form
, "imply") == 0)
5049 (void) restore_line_pointer (c
);
5053 as_bad (_("Missing predicate relation type"));
5054 ignore_rest_of_line ();
5059 as_bad (_("Unrecognized predicate relation type"));
5060 ignore_rest_of_line ();
5063 if (*input_line_pointer
== ',')
5064 ++input_line_pointer
;
5072 expressionS pr
, *pr1
, *pr2
;
5074 sep
= parse_operand_and_eval (&pr
, ',');
5075 if (pr
.X_op
== O_register
5076 && pr
.X_add_number
>= REG_P
5077 && pr
.X_add_number
<= REG_P
+ 63)
5079 regno
= pr
.X_add_number
- REG_P
;
5087 else if (type
!= 'i'
5088 && pr
.X_op
== O_subtract
5089 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5090 && pr1
->X_op
== O_register
5091 && pr1
->X_add_number
>= REG_P
5092 && pr1
->X_add_number
<= REG_P
+ 63
5093 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5094 && pr2
->X_op
== O_register
5095 && pr2
->X_add_number
>= REG_P
5096 && pr2
->X_add_number
<= REG_P
+ 63)
5101 regno
= pr1
->X_add_number
- REG_P
;
5102 stop
= pr2
->X_add_number
- REG_P
;
5105 as_bad (_("Bad register range"));
5106 ignore_rest_of_line ();
5109 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5110 count
+= stop
- regno
+ 1;
5114 as_bad (_("Predicate register expected"));
5115 ignore_rest_of_line ();
5119 as_warn (_("Duplicate predicate register ignored"));
5130 clear_qp_mutex (mask
);
5131 clear_qp_implies (mask
, (valueT
) 0);
5134 if (count
!= 2 || p1
== -1 || p2
== -1)
5135 as_bad (_("Predicate source and target required"));
5136 else if (p1
== 0 || p2
== 0)
5137 as_bad (_("Use of p0 is not valid in this context"));
5139 add_qp_imply (p1
, p2
);
5144 as_bad (_("At least two PR arguments expected"));
5149 as_bad (_("Use of p0 is not valid in this context"));
5152 add_qp_mutex (mask
);
5155 /* note that we don't override any existing relations */
5158 as_bad (_("At least one PR argument expected"));
5163 fprintf (stderr
, "Safe across calls: ");
5164 print_prmask (mask
);
5165 fprintf (stderr
, "\n");
5167 qp_safe_across_calls
= mask
;
5170 demand_empty_rest_of_line ();
5173 /* .entry label [, label [, ...]]
5174 Hint to DV code that the given labels are to be considered entry points.
5175 Otherwise, only global labels are considered entry points. */
5178 dot_entry (int dummy ATTRIBUTE_UNUSED
)
5187 c
= get_symbol_name (&name
);
5188 symbolP
= symbol_find_or_make (name
);
5190 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (void *) symbolP
);
5192 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5195 *input_line_pointer
= c
;
5196 SKIP_WHITESPACE_AFTER_NAME ();
5197 c
= *input_line_pointer
;
5200 input_line_pointer
++;
5202 if (*input_line_pointer
== '\n')
5208 demand_empty_rest_of_line ();
5211 /* .mem.offset offset, base
5212 "base" is used to distinguish between offsets from a different base. */
5215 dot_mem_offset (int dummy ATTRIBUTE_UNUSED
)
5217 md
.mem_offset
.hint
= 1;
5218 md
.mem_offset
.offset
= get_absolute_expression ();
5219 if (*input_line_pointer
!= ',')
5221 as_bad (_("Comma expected"));
5222 ignore_rest_of_line ();
5225 ++input_line_pointer
;
5226 md
.mem_offset
.base
= get_absolute_expression ();
5227 demand_empty_rest_of_line ();
5230 /* ia64-specific pseudo-ops: */
5231 const pseudo_typeS md_pseudo_table
[] =
5233 { "radix", dot_radix
, 0 },
5234 { "lcomm", s_lcomm_bytes
, 1 },
5235 { "loc", dot_loc
, 0 },
5236 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5237 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5238 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5239 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5240 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5241 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5242 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5243 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5244 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5245 { "proc", dot_proc
, 0 },
5246 { "body", dot_body
, 0 },
5247 { "prologue", dot_prologue
, 0 },
5248 { "endp", dot_endp
, 0 },
5250 { "fframe", dot_fframe
, 0 },
5251 { "vframe", dot_vframe
, 0 },
5252 { "vframesp", dot_vframesp
, 0 },
5253 { "vframepsp", dot_vframesp
, 1 },
5254 { "save", dot_save
, 0 },
5255 { "restore", dot_restore
, 0 },
5256 { "restorereg", dot_restorereg
, 0 },
5257 { "restorereg.p", dot_restorereg
, 1 },
5258 { "handlerdata", dot_handlerdata
, 0 },
5259 { "unwentry", dot_unwentry
, 0 },
5260 { "altrp", dot_altrp
, 0 },
5261 { "savesp", dot_savemem
, 0 },
5262 { "savepsp", dot_savemem
, 1 },
5263 { "save.g", dot_saveg
, 0 },
5264 { "save.f", dot_savef
, 0 },
5265 { "save.b", dot_saveb
, 0 },
5266 { "save.gf", dot_savegf
, 0 },
5267 { "spill", dot_spill
, 0 },
5268 { "spillreg", dot_spillreg
, 0 },
5269 { "spillsp", dot_spillmem
, 0 },
5270 { "spillpsp", dot_spillmem
, 1 },
5271 { "spillreg.p", dot_spillreg
, 1 },
5272 { "spillsp.p", dot_spillmem
, ~0 },
5273 { "spillpsp.p", dot_spillmem
, ~1 },
5274 { "label_state", dot_label_state
, 0 },
5275 { "copy_state", dot_copy_state
, 0 },
5276 { "unwabi", dot_unwabi
, 0 },
5277 { "personality", dot_personality
, 0 },
5278 { "mii", dot_template
, 0x0 },
5279 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5280 { "mlx", dot_template
, 0x2 },
5281 { "mmi", dot_template
, 0x4 },
5282 { "mfi", dot_template
, 0x6 },
5283 { "mmf", dot_template
, 0x7 },
5284 { "mib", dot_template
, 0x8 },
5285 { "mbb", dot_template
, 0x9 },
5286 { "bbb", dot_template
, 0xb },
5287 { "mmb", dot_template
, 0xc },
5288 { "mfb", dot_template
, 0xe },
5289 { "align", dot_align
, 0 },
5290 { "regstk", dot_regstk
, 0 },
5291 { "rotr", dot_rot
, DYNREG_GR
},
5292 { "rotf", dot_rot
, DYNREG_FR
},
5293 { "rotp", dot_rot
, DYNREG_PR
},
5294 { "lsb", dot_byteorder
, 0 },
5295 { "msb", dot_byteorder
, 1 },
5296 { "psr", dot_psr
, 0 },
5297 { "alias", dot_alias
, 0 },
5298 { "secalias", dot_alias
, 1 },
5299 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5301 { "xdata1", dot_xdata
, 1 },
5302 { "xdata2", dot_xdata
, 2 },
5303 { "xdata4", dot_xdata
, 4 },
5304 { "xdata8", dot_xdata
, 8 },
5305 { "xdata16", dot_xdata
, 16 },
5306 { "xreal4", dot_xfloat_cons
, 'f' },
5307 { "xreal8", dot_xfloat_cons
, 'd' },
5308 { "xreal10", dot_xfloat_cons
, 'x' },
5309 { "xreal16", dot_xfloat_cons
, 'X' },
5310 { "xstring", dot_xstringer
, 8 + 0 },
5311 { "xstringz", dot_xstringer
, 8 + 1 },
5313 /* unaligned versions: */
5314 { "xdata2.ua", dot_xdata_ua
, 2 },
5315 { "xdata4.ua", dot_xdata_ua
, 4 },
5316 { "xdata8.ua", dot_xdata_ua
, 8 },
5317 { "xdata16.ua", dot_xdata_ua
, 16 },
5318 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5319 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5320 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5321 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5323 /* annotations/DV checking support */
5324 { "entry", dot_entry
, 0 },
5325 { "mem.offset", dot_mem_offset
, 0 },
5326 { "pred.rel", dot_pred_rel
, 0 },
5327 { "pred.rel.clear", dot_pred_rel
, 'c' },
5328 { "pred.rel.imply", dot_pred_rel
, 'i' },
5329 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5330 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5331 { "reg.val", dot_reg_val
, 0 },
5332 { "serialize.data", dot_serialize
, 0 },
5333 { "serialize.instruction", dot_serialize
, 1 },
5334 { "auto", dot_dv_mode
, 'a' },
5335 { "explicit", dot_dv_mode
, 'e' },
5336 { "default", dot_dv_mode
, 'd' },
5338 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5339 IA-64 aligns data allocation pseudo-ops by default, so we have to
5340 tell it that these ones are supposed to be unaligned. Long term,
5341 should rewrite so that only IA-64 specific data allocation pseudo-ops
5342 are aligned by default. */
5343 {"2byte", stmt_cons_ua
, 2},
5344 {"4byte", stmt_cons_ua
, 4},
5345 {"8byte", stmt_cons_ua
, 8},
5348 {"vms_common", obj_elf_vms_common
, 0},
5354 static const struct pseudo_opcode
5357 void (*handler
) (int);
5362 /* these are more like pseudo-ops, but don't start with a dot */
5363 { "data1", cons
, 1 },
5364 { "data2", cons
, 2 },
5365 { "data4", cons
, 4 },
5366 { "data8", cons
, 8 },
5367 { "data16", cons
, 16 },
5368 { "real4", stmt_float_cons
, 'f' },
5369 { "real8", stmt_float_cons
, 'd' },
5370 { "real10", stmt_float_cons
, 'x' },
5371 { "real16", stmt_float_cons
, 'X' },
5372 { "string", stringer
, 8 + 0 },
5373 { "stringz", stringer
, 8 + 1 },
5375 /* unaligned versions: */
5376 { "data2.ua", stmt_cons_ua
, 2 },
5377 { "data4.ua", stmt_cons_ua
, 4 },
5378 { "data8.ua", stmt_cons_ua
, 8 },
5379 { "data16.ua", stmt_cons_ua
, 16 },
5380 { "real4.ua", float_cons
, 'f' },
5381 { "real8.ua", float_cons
, 'd' },
5382 { "real10.ua", float_cons
, 'x' },
5383 { "real16.ua", float_cons
, 'X' },
5386 /* Declare a register by creating a symbol for it and entering it in
5387 the symbol table. */
5390 declare_register (const char *name
, unsigned int regnum
)
5395 sym
= symbol_create (name
, reg_section
, regnum
, &zero_address_frag
);
5397 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (void *) sym
);
5399 as_fatal ("Inserting \"%s\" into register table failed: %s",
5406 declare_register_set (const char *prefix
,
5407 unsigned int num_regs
,
5408 unsigned int base_regnum
)
5413 for (i
= 0; i
< num_regs
; ++i
)
5415 snprintf (name
, sizeof (name
), "%s%u", prefix
, i
);
5416 declare_register (name
, base_regnum
+ i
);
5421 operand_width (enum ia64_opnd opnd
)
5423 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5424 unsigned int bits
= 0;
5428 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5429 bits
+= odesc
->field
[i
].bits
;
5434 static enum operand_match_result
5435 operand_match (const struct ia64_opcode
*idesc
, int res_index
, expressionS
*e
)
5437 enum ia64_opnd opnd
= idesc
->operands
[res_index
];
5438 int bits
, relocatable
= 0;
5439 struct insn_fix
*fix
;
5446 case IA64_OPND_AR_CCV
:
5447 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5448 return OPERAND_MATCH
;
5451 case IA64_OPND_AR_CSD
:
5452 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5453 return OPERAND_MATCH
;
5456 case IA64_OPND_AR_PFS
:
5457 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5458 return OPERAND_MATCH
;
5462 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5463 return OPERAND_MATCH
;
5467 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5468 return OPERAND_MATCH
;
5472 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5473 return OPERAND_MATCH
;
5476 case IA64_OPND_PR_ROT
:
5477 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5478 return OPERAND_MATCH
;
5482 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5483 return OPERAND_MATCH
;
5486 case IA64_OPND_PSR_L
:
5487 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5488 return OPERAND_MATCH
;
5491 case IA64_OPND_PSR_UM
:
5492 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5493 return OPERAND_MATCH
;
5497 if (e
->X_op
== O_constant
)
5499 if (e
->X_add_number
== 1)
5500 return OPERAND_MATCH
;
5502 return OPERAND_OUT_OF_RANGE
;
5507 if (e
->X_op
== O_constant
)
5509 if (e
->X_add_number
== 8)
5510 return OPERAND_MATCH
;
5512 return OPERAND_OUT_OF_RANGE
;
5517 if (e
->X_op
== O_constant
)
5519 if (e
->X_add_number
== 16)
5520 return OPERAND_MATCH
;
5522 return OPERAND_OUT_OF_RANGE
;
5526 /* register operands: */
5529 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5530 && e
->X_add_number
< REG_AR
+ 128)
5531 return OPERAND_MATCH
;
5536 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5537 && e
->X_add_number
< REG_BR
+ 8)
5538 return OPERAND_MATCH
;
5542 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5543 && e
->X_add_number
< REG_CR
+ 128)
5544 return OPERAND_MATCH
;
5547 case IA64_OPND_DAHR3
:
5548 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_DAHR
5549 && e
->X_add_number
< REG_DAHR
+ 8)
5550 return OPERAND_MATCH
;
5557 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5558 && e
->X_add_number
< REG_FR
+ 128)
5559 return OPERAND_MATCH
;
5564 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5565 && e
->X_add_number
< REG_P
+ 64)
5566 return OPERAND_MATCH
;
5572 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5573 && e
->X_add_number
< REG_GR
+ 128)
5574 return OPERAND_MATCH
;
5577 case IA64_OPND_R3_2
:
5578 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5580 if (e
->X_add_number
< REG_GR
+ 4)
5581 return OPERAND_MATCH
;
5582 else if (e
->X_add_number
< REG_GR
+ 128)
5583 return OPERAND_OUT_OF_RANGE
;
5587 /* indirect operands: */
5588 case IA64_OPND_CPUID_R3
:
5589 case IA64_OPND_DBR_R3
:
5590 case IA64_OPND_DTR_R3
:
5591 case IA64_OPND_ITR_R3
:
5592 case IA64_OPND_IBR_R3
:
5593 case IA64_OPND_MSR_R3
:
5594 case IA64_OPND_PKR_R3
:
5595 case IA64_OPND_PMC_R3
:
5596 case IA64_OPND_PMD_R3
:
5597 case IA64_OPND_DAHR_R3
:
5598 case IA64_OPND_RR_R3
:
5599 if (e
->X_op
== O_index
&& e
->X_op_symbol
5600 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5601 == opnd
- IA64_OPND_CPUID_R3
))
5602 return OPERAND_MATCH
;
5606 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5607 return OPERAND_MATCH
;
5610 /* immediate operands: */
5611 case IA64_OPND_CNT2a
:
5612 case IA64_OPND_LEN4
:
5613 case IA64_OPND_LEN6
:
5614 bits
= operand_width (idesc
->operands
[res_index
]);
5615 if (e
->X_op
== O_constant
)
5617 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5618 return OPERAND_MATCH
;
5620 return OPERAND_OUT_OF_RANGE
;
5624 case IA64_OPND_CNT2b
:
5625 if (e
->X_op
== O_constant
)
5627 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5628 return OPERAND_MATCH
;
5630 return OPERAND_OUT_OF_RANGE
;
5634 case IA64_OPND_CNT2c
:
5635 val
= e
->X_add_number
;
5636 if (e
->X_op
== O_constant
)
5638 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5639 return OPERAND_MATCH
;
5641 return OPERAND_OUT_OF_RANGE
;
5646 /* SOR must be an integer multiple of 8 */
5647 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5648 return OPERAND_OUT_OF_RANGE
;
5651 if (e
->X_op
== O_constant
)
5653 if ((bfd_vma
) e
->X_add_number
<= 96)
5654 return OPERAND_MATCH
;
5656 return OPERAND_OUT_OF_RANGE
;
5660 case IA64_OPND_IMMU62
:
5661 if (e
->X_op
== O_constant
)
5663 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5664 return OPERAND_MATCH
;
5666 return OPERAND_OUT_OF_RANGE
;
5670 /* FIXME -- need 62-bit relocation type */
5671 as_bad (_("62-bit relocation not yet implemented"));
5675 case IA64_OPND_IMMU64
:
5676 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5677 || e
->X_op
== O_subtract
)
5679 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5680 fix
->code
= BFD_RELOC_IA64_IMM64
;
5681 if (e
->X_op
!= O_subtract
)
5683 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5684 if (e
->X_op
== O_pseudo_fixup
)
5688 fix
->opnd
= idesc
->operands
[res_index
];
5691 ++CURR_SLOT
.num_fixups
;
5692 return OPERAND_MATCH
;
5694 else if (e
->X_op
== O_constant
)
5695 return OPERAND_MATCH
;
5698 case IA64_OPND_IMMU5b
:
5699 if (e
->X_op
== O_constant
)
5701 val
= e
->X_add_number
;
5702 if (val
>= 32 && val
<= 63)
5703 return OPERAND_MATCH
;
5705 return OPERAND_OUT_OF_RANGE
;
5709 case IA64_OPND_CCNT5
:
5710 case IA64_OPND_CNT5
:
5711 case IA64_OPND_CNT6
:
5712 case IA64_OPND_CPOS6a
:
5713 case IA64_OPND_CPOS6b
:
5714 case IA64_OPND_CPOS6c
:
5715 case IA64_OPND_IMMU2
:
5716 case IA64_OPND_IMMU7a
:
5717 case IA64_OPND_IMMU7b
:
5718 case IA64_OPND_IMMU16
:
5719 case IA64_OPND_IMMU19
:
5720 case IA64_OPND_IMMU21
:
5721 case IA64_OPND_IMMU24
:
5722 case IA64_OPND_MBTYPE4
:
5723 case IA64_OPND_MHTYPE8
:
5724 case IA64_OPND_POS6
:
5725 bits
= operand_width (idesc
->operands
[res_index
]);
5726 if (e
->X_op
== O_constant
)
5728 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5729 return OPERAND_MATCH
;
5731 return OPERAND_OUT_OF_RANGE
;
5735 case IA64_OPND_IMMU9
:
5736 bits
= operand_width (idesc
->operands
[res_index
]);
5737 if (e
->X_op
== O_constant
)
5739 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5741 int lobits
= e
->X_add_number
& 0x3;
5742 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5743 e
->X_add_number
|= (bfd_vma
) 0x3;
5744 return OPERAND_MATCH
;
5747 return OPERAND_OUT_OF_RANGE
;
5751 case IA64_OPND_IMM44
:
5752 /* least 16 bits must be zero */
5753 if ((e
->X_add_number
& 0xffff) != 0)
5754 /* XXX technically, this is wrong: we should not be issuing warning
5755 messages until we're sure this instruction pattern is going to
5757 as_warn (_("lower 16 bits of mask ignored"));
5759 if (e
->X_op
== O_constant
)
5761 if (((e
->X_add_number
>= 0
5762 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5763 || (e
->X_add_number
< 0
5764 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5767 if (e
->X_add_number
>= 0
5768 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5770 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5772 return OPERAND_MATCH
;
5775 return OPERAND_OUT_OF_RANGE
;
5779 case IA64_OPND_IMM17
:
5780 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5781 if (e
->X_op
== O_constant
)
5783 if (((e
->X_add_number
>= 0
5784 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5785 || (e
->X_add_number
< 0
5786 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5789 if (e
->X_add_number
>= 0
5790 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5792 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5794 return OPERAND_MATCH
;
5797 return OPERAND_OUT_OF_RANGE
;
5801 case IA64_OPND_IMM14
:
5802 case IA64_OPND_IMM22
:
5804 case IA64_OPND_IMM1
:
5805 case IA64_OPND_IMM8
:
5806 case IA64_OPND_IMM8U4
:
5807 case IA64_OPND_IMM8M1
:
5808 case IA64_OPND_IMM8M1U4
:
5809 case IA64_OPND_IMM8M1U8
:
5810 case IA64_OPND_IMM9a
:
5811 case IA64_OPND_IMM9b
:
5812 bits
= operand_width (idesc
->operands
[res_index
]);
5813 if (relocatable
&& (e
->X_op
== O_symbol
5814 || e
->X_op
== O_subtract
5815 || e
->X_op
== O_pseudo_fixup
))
5817 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5819 if (idesc
->operands
[res_index
] == IA64_OPND_IMM14
)
5820 fix
->code
= BFD_RELOC_IA64_IMM14
;
5822 fix
->code
= BFD_RELOC_IA64_IMM22
;
5824 if (e
->X_op
!= O_subtract
)
5826 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5827 if (e
->X_op
== O_pseudo_fixup
)
5831 fix
->opnd
= idesc
->operands
[res_index
];
5834 ++CURR_SLOT
.num_fixups
;
5835 return OPERAND_MATCH
;
5837 else if (e
->X_op
!= O_constant
5838 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5839 return OPERAND_MISMATCH
;
5841 if (opnd
== IA64_OPND_IMM8M1U4
)
5843 /* Zero is not valid for unsigned compares that take an adjusted
5844 constant immediate range. */
5845 if (e
->X_add_number
== 0)
5846 return OPERAND_OUT_OF_RANGE
;
5848 /* Sign-extend 32-bit unsigned numbers, so that the following range
5849 checks will work. */
5850 val
= e
->X_add_number
;
5851 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5852 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5853 val
= ((val
<< 32) >> 32);
5855 /* Check for 0x100000000. This is valid because
5856 0x100000000-1 is the same as ((uint32_t) -1). */
5857 if (val
== ((bfd_signed_vma
) 1 << 32))
5858 return OPERAND_MATCH
;
5862 else if (opnd
== IA64_OPND_IMM8M1U8
)
5864 /* Zero is not valid for unsigned compares that take an adjusted
5865 constant immediate range. */
5866 if (e
->X_add_number
== 0)
5867 return OPERAND_OUT_OF_RANGE
;
5869 /* Check for 0x10000000000000000. */
5870 if (e
->X_op
== O_big
)
5872 if (generic_bignum
[0] == 0
5873 && generic_bignum
[1] == 0
5874 && generic_bignum
[2] == 0
5875 && generic_bignum
[3] == 0
5876 && generic_bignum
[4] == 1)
5877 return OPERAND_MATCH
;
5879 return OPERAND_OUT_OF_RANGE
;
5882 val
= e
->X_add_number
- 1;
5884 else if (opnd
== IA64_OPND_IMM8M1
)
5885 val
= e
->X_add_number
- 1;
5886 else if (opnd
== IA64_OPND_IMM8U4
)
5888 /* Sign-extend 32-bit unsigned numbers, so that the following range
5889 checks will work. */
5890 val
= e
->X_add_number
;
5891 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5892 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5893 val
= ((val
<< 32) >> 32);
5896 val
= e
->X_add_number
;
5898 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5899 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5900 return OPERAND_MATCH
;
5902 return OPERAND_OUT_OF_RANGE
;
5904 case IA64_OPND_INC3
:
5905 /* +/- 1, 4, 8, 16 */
5906 val
= e
->X_add_number
;
5909 if (e
->X_op
== O_constant
)
5911 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5912 return OPERAND_MATCH
;
5914 return OPERAND_OUT_OF_RANGE
;
5918 case IA64_OPND_TGT25
:
5919 case IA64_OPND_TGT25b
:
5920 case IA64_OPND_TGT25c
:
5921 case IA64_OPND_TGT64
:
5922 if (e
->X_op
== O_symbol
)
5924 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5925 if (opnd
== IA64_OPND_TGT25
)
5926 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5927 else if (opnd
== IA64_OPND_TGT25b
)
5928 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5929 else if (opnd
== IA64_OPND_TGT25c
)
5930 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5931 else if (opnd
== IA64_OPND_TGT64
)
5932 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5936 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5937 fix
->opnd
= idesc
->operands
[res_index
];
5940 ++CURR_SLOT
.num_fixups
;
5941 return OPERAND_MATCH
;
5943 case IA64_OPND_TAG13
:
5944 case IA64_OPND_TAG13b
:
5948 return OPERAND_MATCH
;
5951 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5952 /* There are no external relocs for TAG13/TAG13b fields, so we
5953 create a dummy reloc. This will not live past md_apply_fix. */
5954 fix
->code
= BFD_RELOC_UNUSED
;
5955 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5956 fix
->opnd
= idesc
->operands
[res_index
];
5959 ++CURR_SLOT
.num_fixups
;
5960 return OPERAND_MATCH
;
5967 case IA64_OPND_LDXMOV
:
5968 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5969 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5970 fix
->opnd
= idesc
->operands
[res_index
];
5973 ++CURR_SLOT
.num_fixups
;
5974 return OPERAND_MATCH
;
5976 case IA64_OPND_STRD5b
:
5977 if (e
->X_op
== O_constant
)
5979 /* 5-bit signed scaled by 64 */
5980 if ((e
->X_add_number
<= ( 0xf << 6 ))
5981 && (e
->X_add_number
>= -( 0x10 << 6 )))
5984 /* Must be a multiple of 64 */
5985 if ((e
->X_add_number
& 0x3f) != 0)
5986 as_warn (_("stride must be a multiple of 64; lower 6 bits ignored"));
5988 e
->X_add_number
&= ~ 0x3f;
5989 return OPERAND_MATCH
;
5992 return OPERAND_OUT_OF_RANGE
;
5995 case IA64_OPND_CNT6a
:
5996 if (e
->X_op
== O_constant
)
5998 /* 6-bit unsigned biased by 1 -- count 0 is meaningless */
5999 if ((e
->X_add_number
<= 64)
6000 && (e
->X_add_number
> 0) )
6002 return OPERAND_MATCH
;
6005 return OPERAND_OUT_OF_RANGE
;
6012 return OPERAND_MISMATCH
;
6016 parse_operand (expressionS
*e
, int more
)
6020 memset (e
, 0, sizeof (*e
));
6024 sep
= *input_line_pointer
;
6025 if (more
&& (sep
== ',' || sep
== more
))
6026 ++input_line_pointer
;
6031 parse_operand_and_eval (expressionS
*e
, int more
)
6033 int sep
= parse_operand (e
, more
);
6034 resolve_expression (e
);
6039 parse_operand_maybe_eval (expressionS
*e
, int more
, enum ia64_opnd op
)
6041 int sep
= parse_operand (e
, more
);
6044 case IA64_OPND_IMM14
:
6045 case IA64_OPND_IMM22
:
6046 case IA64_OPND_IMMU64
:
6047 case IA64_OPND_TGT25
:
6048 case IA64_OPND_TGT25b
:
6049 case IA64_OPND_TGT25c
:
6050 case IA64_OPND_TGT64
:
6051 case IA64_OPND_TAG13
:
6052 case IA64_OPND_TAG13b
:
6053 case IA64_OPND_LDXMOV
:
6056 resolve_expression (e
);
6062 /* Returns the next entry in the opcode table that matches the one in
6063 IDESC, and frees the entry in IDESC. If no matching entry is
6064 found, NULL is returned instead. */
6066 static struct ia64_opcode
*
6067 get_next_opcode (struct ia64_opcode
*idesc
)
6069 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6070 ia64_free_opcode (idesc
);
6074 /* Parse the operands for the opcode and find the opcode variant that
6075 matches the specified operands, or NULL if no match is possible. */
6077 static struct ia64_opcode
*
6078 parse_operands (struct ia64_opcode
*idesc
)
6080 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6081 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6084 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6085 enum operand_match_result result
;
6087 char *first_arg
= 0, *end
, *saved_input_pointer
;
6090 gas_assert (strlen (idesc
->name
) <= 128);
6092 strcpy (mnemonic
, idesc
->name
);
6093 if (idesc
->operands
[2] == IA64_OPND_SOF
6094 || idesc
->operands
[1] == IA64_OPND_SOF
)
6096 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6097 can't parse the first operand until we have parsed the
6098 remaining operands of the "alloc" instruction. */
6100 first_arg
= input_line_pointer
;
6101 end
= strchr (input_line_pointer
, '=');
6104 as_bad (_("Expected separator `='"));
6107 input_line_pointer
= end
+ 1;
6114 if (i
< NELEMS (CURR_SLOT
.opnd
))
6116 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ i
, '=',
6117 idesc
->operands
[i
]);
6118 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6125 sep
= parse_operand (&dummy
, '=');
6126 if (dummy
.X_op
== O_absent
)
6132 if (sep
!= '=' && sep
!= ',')
6137 if (num_outputs
> 0)
6138 as_bad (_("Duplicate equal sign (=) in instruction"));
6140 num_outputs
= i
+ 1;
6145 as_bad (_("Illegal operand separator `%c'"), sep
);
6149 if (idesc
->operands
[2] == IA64_OPND_SOF
6150 || idesc
->operands
[1] == IA64_OPND_SOF
)
6152 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6153 Note, however, that due to that mapping operand numbers in error
6154 messages for any of the constant operands will not be correct. */
6155 know (strcmp (idesc
->name
, "alloc") == 0);
6156 /* The first operand hasn't been parsed/initialized, yet (but
6157 num_operands intentionally doesn't account for that). */
6158 i
= num_operands
> 4 ? 2 : 1;
6159 #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6160 ? CURR_SLOT.opnd[n].X_add_number \
6162 sof
= set_regstack (FORCE_CONST(i
),
6165 FORCE_CONST(i
+ 3));
6168 /* now we can parse the first arg: */
6169 saved_input_pointer
= input_line_pointer
;
6170 input_line_pointer
= first_arg
;
6171 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ 0, '=',
6172 idesc
->operands
[0]);
6174 --num_outputs
; /* force error */
6175 input_line_pointer
= saved_input_pointer
;
6177 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6178 if (CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6179 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
)
6180 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6181 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6183 CURR_SLOT
.opnd
[i
+ 1].X_op
= O_illegal
;
6184 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6187 highest_unmatched_operand
= -4;
6188 curr_out_of_range_pos
= -1;
6190 for (; idesc
; idesc
= get_next_opcode (idesc
))
6192 if (num_outputs
!= idesc
->num_outputs
)
6193 continue; /* mismatch in # of outputs */
6194 if (highest_unmatched_operand
< 0)
6195 highest_unmatched_operand
|= 1;
6196 if (num_operands
> NELEMS (idesc
->operands
)
6197 || (num_operands
< NELEMS (idesc
->operands
)
6198 && idesc
->operands
[num_operands
])
6199 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6200 continue; /* mismatch in number of arguments */
6201 if (highest_unmatched_operand
< 0)
6202 highest_unmatched_operand
|= 2;
6204 CURR_SLOT
.num_fixups
= 0;
6206 /* Try to match all operands. If we see an out-of-range operand,
6207 then continue trying to match the rest of the operands, since if
6208 the rest match, then this idesc will give the best error message. */
6210 out_of_range_pos
= -1;
6211 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6213 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6214 if (result
!= OPERAND_MATCH
)
6216 if (result
!= OPERAND_OUT_OF_RANGE
)
6218 if (out_of_range_pos
< 0)
6219 /* remember position of the first out-of-range operand: */
6220 out_of_range_pos
= i
;
6224 /* If we did not match all operands, or if at least one operand was
6225 out-of-range, then this idesc does not match. Keep track of which
6226 idesc matched the most operands before failing. If we have two
6227 idescs that failed at the same position, and one had an out-of-range
6228 operand, then prefer the out-of-range operand. Thus if we have
6229 "add r0=0x1000000,r1" we get an error saying the constant is out
6230 of range instead of an error saying that the constant should have been
6233 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6235 if (i
> highest_unmatched_operand
6236 || (i
== highest_unmatched_operand
6237 && out_of_range_pos
> curr_out_of_range_pos
))
6239 highest_unmatched_operand
= i
;
6240 if (out_of_range_pos
>= 0)
6242 expected_operand
= idesc
->operands
[out_of_range_pos
];
6243 error_pos
= out_of_range_pos
;
6247 expected_operand
= idesc
->operands
[i
];
6250 curr_out_of_range_pos
= out_of_range_pos
;
6259 if (expected_operand
)
6260 as_bad (_("Operand %u of `%s' should be %s"),
6261 error_pos
+ 1, mnemonic
,
6262 elf64_ia64_operands
[expected_operand
].desc
);
6263 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6264 as_bad (_("Wrong number of output operands"));
6265 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6266 as_bad (_("Wrong number of input operands"));
6268 as_bad (_("Operand mismatch"));
6272 /* Check that the instruction doesn't use
6273 - r0, f0, or f1 as output operands
6274 - the same predicate twice as output operands
6275 - r0 as address of a base update load or store
6276 - the same GR as output and address of a base update load
6277 - two even- or two odd-numbered FRs as output operands of a floating
6278 point parallel load.
6279 At most two (conflicting) output (or output-like) operands can exist,
6280 (floating point parallel loads have three outputs, but the base register,
6281 if updated, cannot conflict with the actual outputs). */
6283 for (i
= 0; i
< num_operands
; ++i
)
6288 switch (idesc
->operands
[i
])
6293 if (i
< num_outputs
)
6295 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6298 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6300 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6305 if (i
< num_outputs
)
6308 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6310 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6317 if (i
< num_outputs
)
6319 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6320 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6323 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6326 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6328 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6332 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6334 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6337 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6339 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6350 as_warn (_("Invalid use of `%c%d' as output operand"), reg_class
, regno
);
6353 as_warn (_("Invalid use of `r%d' as base update address operand"), regno
);
6359 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6364 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6369 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6377 as_warn (_("Invalid duplicate use of `%c%d'"), reg_class
, reg1
);
6379 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6380 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6381 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6382 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6383 && ! ((reg1
^ reg2
) & 1))
6384 as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"),
6385 reg1
- REG_FR
, reg2
- REG_FR
);
6386 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6387 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6388 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6389 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6390 as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"),
6391 reg1
- REG_FR
, reg2
- REG_FR
);
6396 build_insn (struct slot
*slot
, bfd_vma
*insnp
)
6398 const struct ia64_operand
*odesc
, *o2desc
;
6399 struct ia64_opcode
*idesc
= slot
->idesc
;
6405 insn
= idesc
->opcode
| slot
->qp_regno
;
6407 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6409 if (slot
->opnd
[i
].X_op
== O_register
6410 || slot
->opnd
[i
].X_op
== O_constant
6411 || slot
->opnd
[i
].X_op
== O_index
)
6412 val
= slot
->opnd
[i
].X_add_number
;
6413 else if (slot
->opnd
[i
].X_op
== O_big
)
6415 /* This must be the value 0x10000000000000000. */
6416 gas_assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6422 switch (idesc
->operands
[i
])
6424 case IA64_OPND_IMMU64
:
6425 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6426 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6427 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6428 | (((val
>> 63) & 0x1) << 36));
6431 case IA64_OPND_IMMU62
:
6432 val
&= 0x3fffffffffffffffULL
;
6433 if (val
!= slot
->opnd
[i
].X_add_number
)
6434 as_warn (_("Value truncated to 62 bits"));
6435 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6436 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6439 case IA64_OPND_TGT64
:
6441 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6442 insn
|= ((((val
>> 59) & 0x1) << 36)
6443 | (((val
>> 0) & 0xfffff) << 13));
6459 case IA64_OPND_DAHR3
:
6478 case IA64_OPND_R3_2
:
6479 case IA64_OPND_CPUID_R3
:
6480 case IA64_OPND_DBR_R3
:
6481 case IA64_OPND_DTR_R3
:
6482 case IA64_OPND_ITR_R3
:
6483 case IA64_OPND_IBR_R3
:
6485 case IA64_OPND_MSR_R3
:
6486 case IA64_OPND_PKR_R3
:
6487 case IA64_OPND_PMC_R3
:
6488 case IA64_OPND_PMD_R3
:
6489 case IA64_OPND_DAHR_R3
:
6490 case IA64_OPND_RR_R3
:
6498 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6499 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6501 as_bad_where (slot
->src_file
, slot
->src_line
,
6502 _("Bad operand value: %s"), err
);
6503 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6505 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6506 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6508 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6509 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6511 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6512 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6513 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6515 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6516 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6524 emit_one_bundle (void)
6526 int manual_bundling_off
= 0, manual_bundling
= 0;
6527 enum ia64_unit required_unit
, insn_unit
= 0;
6528 enum ia64_insn_type type
[3], insn_type
;
6529 unsigned int template_val
, orig_template
;
6530 bfd_vma insn
[3] = { -1, -1, -1 };
6531 struct ia64_opcode
*idesc
;
6532 int end_of_insn_group
= 0, user_template
= -1;
6533 int n
, i
, j
, first
, curr
, last_slot
;
6534 bfd_vma t0
= 0, t1
= 0;
6535 struct label_fix
*lfix
;
6536 bfd_boolean mark_label
;
6537 struct insn_fix
*ifix
;
6543 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6544 know (first
>= 0 && first
< NUM_SLOTS
);
6545 n
= MIN (3, md
.num_slots_in_use
);
6547 /* Determine template: user user_template if specified, best match
6550 if (md
.slot
[first
].user_template
>= 0)
6551 user_template
= template_val
= md
.slot
[first
].user_template
;
6554 /* Auto select appropriate template. */
6555 memset (type
, 0, sizeof (type
));
6557 for (i
= 0; i
< n
; ++i
)
6559 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6561 type
[i
] = md
.slot
[curr
].idesc
->type
;
6562 curr
= (curr
+ 1) % NUM_SLOTS
;
6564 template_val
= best_template
[type
[0]][type
[1]][type
[2]];
6567 /* initialize instructions with appropriate nops: */
6568 for (i
= 0; i
< 3; ++i
)
6569 insn
[i
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[i
]];
6573 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6574 from the start of the frag. */
6575 addr_mod
= frag_now_fix () & 15;
6576 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6577 as_bad (_("instruction address is not a multiple of 16"));
6578 frag_now
->insn_addr
= addr_mod
;
6579 frag_now
->has_code
= 1;
6581 /* now fill in slots with as many insns as possible: */
6583 idesc
= md
.slot
[curr
].idesc
;
6584 end_of_insn_group
= 0;
6586 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6588 /* If we have unwind records, we may need to update some now. */
6589 unw_rec_list
*ptr
= md
.slot
[curr
].unwind_record
;
6590 unw_rec_list
*end_ptr
= NULL
;
6594 /* Find the last prologue/body record in the list for the current
6595 insn, and set the slot number for all records up to that point.
6596 This needs to be done now, because prologue/body records refer to
6597 the current point, not the point after the instruction has been
6598 issued. This matters because there may have been nops emitted
6599 meanwhile. Any non-prologue non-body record followed by a
6600 prologue/body record must also refer to the current point. */
6601 unw_rec_list
*last_ptr
;
6603 for (j
= 1; end_ptr
== NULL
&& j
< md
.num_slots_in_use
; ++j
)
6604 end_ptr
= md
.slot
[(curr
+ j
) % NUM_SLOTS
].unwind_record
;
6605 for (last_ptr
= NULL
; ptr
!= end_ptr
; ptr
= ptr
->next
)
6606 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6607 || ptr
->r
.type
== body
)
6611 /* Make last_ptr point one after the last prologue/body
6613 last_ptr
= last_ptr
->next
;
6614 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6617 ptr
->slot_number
= (unsigned long) f
+ i
;
6618 ptr
->slot_frag
= frag_now
;
6620 /* Remove the initialized records, so that we won't accidentally
6621 update them again if we insert a nop and continue. */
6622 md
.slot
[curr
].unwind_record
= last_ptr
;
6626 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6627 if (md
.slot
[curr
].manual_bundling_on
)
6630 manual_bundling
= 1;
6632 break; /* Need to start a new bundle. */
6635 /* If this instruction specifies a template, then it must be the first
6636 instruction of a bundle. */
6637 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6640 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6642 if (manual_bundling
&& !manual_bundling_off
)
6644 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6645 _("`%s' must be last in bundle"), idesc
->name
);
6647 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6651 if (idesc
->flags
& IA64_OPCODE_LAST
)
6654 unsigned int required_template
;
6656 /* If we need a stop bit after an M slot, our only choice is
6657 template 5 (M;;MI). If we need a stop bit after a B
6658 slot, our only choice is to place it at the end of the
6659 bundle, because the only available templates are MIB,
6660 MBB, BBB, MMB, and MFB. We don't handle anything other
6661 than M and B slots because these are the only kind of
6662 instructions that can have the IA64_OPCODE_LAST bit set. */
6663 required_template
= template_val
;
6664 switch (idesc
->type
)
6668 required_template
= 5;
6676 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6677 _("Internal error: don't know how to force %s to end of instruction group"),
6683 && (i
> required_slot
6684 || (required_slot
== 2 && !manual_bundling_off
)
6685 || (user_template
>= 0
6686 /* Changing from MMI to M;MI is OK. */
6687 && (template_val
^ required_template
) > 1)))
6689 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6690 _("`%s' must be last in instruction group"),
6692 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6693 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6695 if (required_slot
< i
)
6696 /* Can't fit this instruction. */
6700 if (required_template
!= template_val
)
6702 /* If we switch the template, we need to reset the NOPs
6703 after slot i. The slot-types of the instructions ahead
6704 of i never change, so we don't need to worry about
6705 changing NOPs in front of this slot. */
6706 for (j
= i
; j
< 3; ++j
)
6707 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6709 /* We just picked a template that includes the stop bit in the
6710 middle, so we don't need another one emitted later. */
6711 md
.slot
[curr
].end_of_insn_group
= 0;
6713 template_val
= required_template
;
6715 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6717 if (manual_bundling
)
6719 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6720 _("Label must be first in a bundle"));
6721 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6723 /* This insn must go into the first slot of a bundle. */
6727 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6729 /* We need an instruction group boundary in the middle of a
6730 bundle. See if we can switch to an other template with
6731 an appropriate boundary. */
6733 orig_template
= template_val
;
6734 if (i
== 1 && (user_template
== 4
6735 || (user_template
< 0
6736 && (ia64_templ_desc
[template_val
].exec_unit
[0]
6740 end_of_insn_group
= 0;
6742 else if (i
== 2 && (user_template
== 0
6743 || (user_template
< 0
6744 && (ia64_templ_desc
[template_val
].exec_unit
[1]
6746 /* This test makes sure we don't switch the template if
6747 the next instruction is one that needs to be first in
6748 an instruction group. Since all those instructions are
6749 in the M group, there is no way such an instruction can
6750 fit in this bundle even if we switch the template. The
6751 reason we have to check for this is that otherwise we
6752 may end up generating "MI;;I M.." which has the deadly
6753 effect that the second M instruction is no longer the
6754 first in the group! --davidm 99/12/16 */
6755 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6758 end_of_insn_group
= 0;
6761 && user_template
== 0
6762 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6763 /* Use the next slot. */
6765 else if (curr
!= first
)
6766 /* can't fit this insn */
6769 if (template_val
!= orig_template
)
6770 /* if we switch the template, we need to reset the NOPs
6771 after slot i. The slot-types of the instructions ahead
6772 of i never change, so we don't need to worry about
6773 changing NOPs in front of this slot. */
6774 for (j
= i
; j
< 3; ++j
)
6775 insn
[j
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[j
]];
6777 required_unit
= ia64_templ_desc
[template_val
].exec_unit
[i
];
6779 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6780 if (idesc
->type
== IA64_TYPE_DYN
)
6782 enum ia64_opnd opnd1
, opnd2
;
6784 if ((strcmp (idesc
->name
, "nop") == 0)
6785 || (strcmp (idesc
->name
, "break") == 0))
6786 insn_unit
= required_unit
;
6787 else if (strcmp (idesc
->name
, "hint") == 0)
6789 insn_unit
= required_unit
;
6790 if (required_unit
== IA64_UNIT_B
)
6796 case hint_b_warning
:
6797 as_warn (_("hint in B unit may be treated as nop"));
6800 /* When manual bundling is off and there is no
6801 user template, we choose a different unit so
6802 that hint won't go into the current slot. We
6803 will fill the current bundle with nops and
6804 try to put hint into the next bundle. */
6805 if (!manual_bundling
&& user_template
< 0)
6806 insn_unit
= IA64_UNIT_I
;
6808 as_bad (_("hint in B unit can't be used"));
6813 else if (strcmp (idesc
->name
, "chk.s") == 0
6814 || strcmp (idesc
->name
, "mov") == 0)
6816 insn_unit
= IA64_UNIT_M
;
6817 if (required_unit
== IA64_UNIT_I
6818 || (required_unit
== IA64_UNIT_F
&& template_val
== 6))
6819 insn_unit
= IA64_UNIT_I
;
6822 as_fatal (_("emit_one_bundle: unexpected dynamic op"));
6824 snprintf (mnemonic
, sizeof (mnemonic
), "%s.%c",
6825 idesc
->name
, "?imbfxx"[insn_unit
]);
6826 opnd1
= idesc
->operands
[0];
6827 opnd2
= idesc
->operands
[1];
6828 ia64_free_opcode (idesc
);
6829 idesc
= ia64_find_opcode (mnemonic
);
6830 /* moves to/from ARs have collisions */
6831 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6833 while (idesc
!= NULL
6834 && (idesc
->operands
[0] != opnd1
6835 || idesc
->operands
[1] != opnd2
))
6836 idesc
= get_next_opcode (idesc
);
6838 md
.slot
[curr
].idesc
= idesc
;
6842 insn_type
= idesc
->type
;
6843 insn_unit
= IA64_UNIT_NIL
;
6847 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6848 insn_unit
= required_unit
;
6850 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6851 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6852 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6853 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6854 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6859 if (insn_unit
!= required_unit
)
6860 continue; /* Try next slot. */
6862 /* Now is a good time to fix up the labels for this insn. */
6864 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6866 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6867 symbol_set_frag (lfix
->sym
, frag_now
);
6868 mark_label
|= lfix
->dw2_mark_labels
;
6870 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6872 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6873 symbol_set_frag (lfix
->sym
, frag_now
);
6876 if (debug_type
== DEBUG_DWARF2
6877 || md
.slot
[curr
].loc_directive_seen
6880 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6882 md
.slot
[curr
].loc_directive_seen
= 0;
6884 md
.slot
[curr
].debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
6886 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6889 build_insn (md
.slot
+ curr
, insn
+ i
);
6891 ptr
= md
.slot
[curr
].unwind_record
;
6894 /* Set slot numbers for all remaining unwind records belonging to the
6895 current insn. There can not be any prologue/body unwind records
6897 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6899 ptr
->slot_number
= (unsigned long) f
+ i
;
6900 ptr
->slot_frag
= frag_now
;
6902 md
.slot
[curr
].unwind_record
= NULL
;
6905 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6907 ifix
= md
.slot
[curr
].fixup
+ j
;
6908 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6909 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6910 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6911 fix
->fx_file
= md
.slot
[curr
].src_file
;
6912 fix
->fx_line
= md
.slot
[curr
].src_line
;
6915 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6917 /* This adjustment to "i" must occur after the fix, otherwise the fix
6918 is assigned to the wrong slot, and the VMS linker complains. */
6919 if (required_unit
== IA64_UNIT_L
)
6922 /* skip one slot for long/X-unit instructions */
6925 --md
.num_slots_in_use
;
6929 ia64_free_opcode (md
.slot
[curr
].idesc
);
6930 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6931 md
.slot
[curr
].user_template
= -1;
6933 if (manual_bundling_off
)
6935 manual_bundling
= 0;
6938 curr
= (curr
+ 1) % NUM_SLOTS
;
6939 idesc
= md
.slot
[curr
].idesc
;
6942 /* A user template was specified, but the first following instruction did
6943 not fit. This can happen with or without manual bundling. */
6944 if (md
.num_slots_in_use
> 0 && last_slot
< 0)
6946 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6947 _("`%s' does not fit into %s template"),
6948 idesc
->name
, ia64_templ_desc
[template_val
].name
);
6949 /* Drop first insn so we don't livelock. */
6950 --md
.num_slots_in_use
;
6951 know (curr
== first
);
6952 ia64_free_opcode (md
.slot
[curr
].idesc
);
6953 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6954 md
.slot
[curr
].user_template
= -1;
6956 else if (manual_bundling
> 0)
6958 if (md
.num_slots_in_use
> 0)
6961 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6962 _("`%s' does not fit into bundle"), idesc
->name
);
6967 if (template_val
== 2)
6969 else if (last_slot
== 0)
6970 where
= "slots 2 or 3";
6973 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6974 _("`%s' can't go in %s of %s template"),
6975 idesc
->name
, where
, ia64_templ_desc
[template_val
].name
);
6979 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6980 _("Missing '}' at end of file"));
6983 know (md
.num_slots_in_use
< NUM_SLOTS
);
6985 t0
= end_of_insn_group
| (template_val
<< 1) | (insn
[0] << 5) | (insn
[1] << 46);
6986 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6988 number_to_chars_littleendian (f
+ 0, t0
, 8);
6989 number_to_chars_littleendian (f
+ 8, t1
, 8);
6993 md_parse_option (int c
, char *arg
)
6998 /* Switches from the Intel assembler. */
7000 if (strcmp (arg
, "ilp64") == 0
7001 || strcmp (arg
, "lp64") == 0
7002 || strcmp (arg
, "p64") == 0)
7004 md
.flags
|= EF_IA_64_ABI64
;
7006 else if (strcmp (arg
, "ilp32") == 0)
7008 md
.flags
&= ~EF_IA_64_ABI64
;
7010 else if (strcmp (arg
, "le") == 0)
7012 md
.flags
&= ~EF_IA_64_BE
;
7013 default_big_endian
= 0;
7015 else if (strcmp (arg
, "be") == 0)
7017 md
.flags
|= EF_IA_64_BE
;
7018 default_big_endian
= 1;
7020 else if (strncmp (arg
, "unwind-check=", 13) == 0)
7023 if (strcmp (arg
, "warning") == 0)
7024 md
.unwind_check
= unwind_check_warning
;
7025 else if (strcmp (arg
, "error") == 0)
7026 md
.unwind_check
= unwind_check_error
;
7030 else if (strncmp (arg
, "hint.b=", 7) == 0)
7033 if (strcmp (arg
, "ok") == 0)
7034 md
.hint_b
= hint_b_ok
;
7035 else if (strcmp (arg
, "warning") == 0)
7036 md
.hint_b
= hint_b_warning
;
7037 else if (strcmp (arg
, "error") == 0)
7038 md
.hint_b
= hint_b_error
;
7042 else if (strncmp (arg
, "tune=", 5) == 0)
7045 if (strcmp (arg
, "itanium1") == 0)
7047 else if (strcmp (arg
, "itanium2") == 0)
7057 if (strcmp (arg
, "so") == 0)
7059 /* Suppress signon message. */
7061 else if (strcmp (arg
, "pi") == 0)
7063 /* Reject privileged instructions. FIXME */
7065 else if (strcmp (arg
, "us") == 0)
7067 /* Allow union of signed and unsigned range. FIXME */
7069 else if (strcmp (arg
, "close_fcalls") == 0)
7071 /* Do not resolve global function calls. */
7078 /* temp[="prefix"] Insert temporary labels into the object file
7079 symbol table prefixed by "prefix".
7080 Default prefix is ":temp:".
7085 /* indirect=<tgt> Assume unannotated indirect branches behavior
7086 according to <tgt> --
7087 exit: branch out from the current context (default)
7088 labels: all labels in context may be branch targets
7090 if (strncmp (arg
, "indirect=", 9) != 0)
7095 /* -X conflicts with an ignored option, use -x instead */
7097 if (!arg
|| strcmp (arg
, "explicit") == 0)
7099 /* set default mode to explicit */
7100 md
.default_explicit_mode
= 1;
7103 else if (strcmp (arg
, "auto") == 0)
7105 md
.default_explicit_mode
= 0;
7107 else if (strcmp (arg
, "none") == 0)
7111 else if (strcmp (arg
, "debug") == 0)
7115 else if (strcmp (arg
, "debugx") == 0)
7117 md
.default_explicit_mode
= 1;
7120 else if (strcmp (arg
, "debugn") == 0)
7127 as_bad (_("Unrecognized option '-x%s'"), arg
);
7132 /* nops Print nops statistics. */
7135 /* GNU specific switches for gcc. */
7136 case OPTION_MCONSTANT_GP
:
7137 md
.flags
|= EF_IA_64_CONS_GP
;
7140 case OPTION_MAUTO_PIC
:
7141 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7152 md_show_usage (FILE *stream
)
7156 --mconstant-gp mark output file as using the constant-GP model\n\
7157 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7158 --mauto-pic mark output file as using the constant-GP model\n\
7159 without function descriptors (sets ELF header flag\n\
7160 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7161 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7162 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7163 -mtune=[itanium1|itanium2]\n\
7164 tune for a specific CPU (default -mtune=itanium2)\n\
7165 -munwind-check=[warning|error]\n\
7166 unwind directive check (default -munwind-check=warning)\n\
7167 -mhint.b=[ok|warning|error]\n\
7168 hint.b check (default -mhint.b=error)\n\
7169 -x | -xexplicit turn on dependency violation checking\n"), stream
);
7170 /* Note for translators: "automagically" can be translated as "automatically" here. */
7172 -xauto automagically remove dependency violations (default)\n\
7173 -xnone turn off dependency violation checking\n\
7174 -xdebug debug dependency violation checker\n\
7175 -xdebugn debug dependency violation checker but turn off\n\
7176 dependency violation checking\n\
7177 -xdebugx debug dependency violation checker and turn on\n\
7178 dependency violation checking\n"),
7183 ia64_after_parse_args (void)
7185 if (debug_type
== DEBUG_STABS
)
7186 as_fatal (_("--gstabs is not supported for ia64"));
7189 /* Return true if TYPE fits in TEMPL at SLOT. */
7192 match (int templ
, int type
, int slot
)
7194 enum ia64_unit unit
;
7197 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7200 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7202 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7204 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7205 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7206 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7207 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7208 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7209 default: result
= 0; break;
7214 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7215 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7216 type M or I would fit in TEMPL at SLOT. */
7219 extra_goodness (int templ
, int slot
)
7224 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7226 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7232 if (match (templ
, IA64_TYPE_M
, slot
)
7233 || match (templ
, IA64_TYPE_I
, slot
))
7234 /* Favor M- and I-unit NOPs. We definitely want to avoid
7235 F-unit and B-unit may cause split-issue or less-than-optimal
7236 branch-prediction. */
7247 /* This function is called once, at assembler startup time. It sets
7248 up all the tables, etc. that the MD part of the assembler will need
7249 that can be determined before arguments are parsed. */
7253 int i
, j
, k
, t
, goodness
, best
, ok
;
7258 md
.explicit_mode
= md
.default_explicit_mode
;
7260 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7262 /* Make sure function pointers get initialized. */
7263 target_big_endian
= -1;
7264 dot_byteorder (default_big_endian
);
7266 alias_hash
= hash_new ();
7267 alias_name_hash
= hash_new ();
7268 secalias_hash
= hash_new ();
7269 secalias_name_hash
= hash_new ();
7271 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7272 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7273 &zero_address_frag
);
7275 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7276 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7277 &zero_address_frag
);
7279 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7280 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7281 &zero_address_frag
);
7283 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7284 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7285 &zero_address_frag
);
7287 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7288 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7289 &zero_address_frag
);
7291 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7292 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7293 &zero_address_frag
);
7295 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7296 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7297 &zero_address_frag
);
7299 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7300 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7301 &zero_address_frag
);
7303 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7304 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7305 &zero_address_frag
);
7307 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7308 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7309 &zero_address_frag
);
7311 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7312 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7313 &zero_address_frag
);
7315 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7316 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7317 &zero_address_frag
);
7319 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7320 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7321 &zero_address_frag
);
7323 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7324 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7325 &zero_address_frag
);
7327 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7328 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7329 &zero_address_frag
);
7331 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7332 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7333 &zero_address_frag
);
7335 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7336 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7337 &zero_address_frag
);
7340 pseudo_func
[FUNC_SLOTCOUNT_RELOC
].u
.sym
=
7341 symbol_new (".<slotcount>", undefined_section
, FUNC_SLOTCOUNT_RELOC
,
7342 &zero_address_frag
);
7345 if (md
.tune
!= itanium1
)
7347 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7349 le_nop_stop
[0] = 0x9;
7352 /* Compute the table of best templates. We compute goodness as a
7353 base 4 value, in which each match counts for 3. Match-failures
7354 result in NOPs and we use extra_goodness() to pick the execution
7355 units that are best suited for issuing the NOP. */
7356 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7357 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7358 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7361 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7364 if (match (t
, i
, 0))
7366 if (match (t
, j
, 1))
7368 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7369 goodness
= 3 + 3 + 3;
7371 goodness
= 3 + 3 + extra_goodness (t
, 2);
7373 else if (match (t
, j
, 2))
7374 goodness
= 3 + 3 + extra_goodness (t
, 1);
7378 goodness
+= extra_goodness (t
, 1);
7379 goodness
+= extra_goodness (t
, 2);
7382 else if (match (t
, i
, 1))
7384 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7387 goodness
= 3 + extra_goodness (t
, 2);
7389 else if (match (t
, i
, 2))
7390 goodness
= 3 + extra_goodness (t
, 1);
7392 if (goodness
> best
)
7395 best_template
[i
][j
][k
] = t
;
7400 #ifdef DEBUG_TEMPLATES
7401 /* For debugging changes to the best_template calculations. We don't care
7402 about combinations with invalid instructions, so start the loops at 1. */
7403 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7404 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7405 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7407 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7409 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7411 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7415 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7416 md
.slot
[i
].user_template
= -1;
7418 md
.pseudo_hash
= hash_new ();
7419 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7421 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7422 (void *) (pseudo_opcode
+ i
));
7424 as_fatal (_("ia64.md_begin: can't hash `%s': %s"),
7425 pseudo_opcode
[i
].name
, err
);
7428 md
.reg_hash
= hash_new ();
7429 md
.dynreg_hash
= hash_new ();
7430 md
.const_hash
= hash_new ();
7431 md
.entry_hash
= hash_new ();
7433 /* general registers: */
7434 declare_register_set ("r", 128, REG_GR
);
7435 declare_register ("gp", REG_GR
+ 1);
7436 declare_register ("sp", REG_GR
+ 12);
7437 declare_register ("tp", REG_GR
+ 13);
7438 declare_register_set ("ret", 4, REG_GR
+ 8);
7440 /* floating point registers: */
7441 declare_register_set ("f", 128, REG_FR
);
7442 declare_register_set ("farg", 8, REG_FR
+ 8);
7443 declare_register_set ("fret", 8, REG_FR
+ 8);
7445 /* branch registers: */
7446 declare_register_set ("b", 8, REG_BR
);
7447 declare_register ("rp", REG_BR
+ 0);
7449 /* predicate registers: */
7450 declare_register_set ("p", 64, REG_P
);
7451 declare_register ("pr", REG_PR
);
7452 declare_register ("pr.rot", REG_PR_ROT
);
7454 /* application registers: */
7455 declare_register_set ("ar", 128, REG_AR
);
7456 for (i
= 0; i
< NELEMS (ar
); ++i
)
7457 declare_register (ar
[i
].name
, REG_AR
+ ar
[i
].regnum
);
7459 /* control registers: */
7460 declare_register_set ("cr", 128, REG_CR
);
7461 for (i
= 0; i
< NELEMS (cr
); ++i
)
7462 declare_register (cr
[i
].name
, REG_CR
+ cr
[i
].regnum
);
7464 /* dahr registers: */
7465 declare_register_set ("dahr", 8, REG_DAHR
);
7467 declare_register ("ip", REG_IP
);
7468 declare_register ("cfm", REG_CFM
);
7469 declare_register ("psr", REG_PSR
);
7470 declare_register ("psr.l", REG_PSR_L
);
7471 declare_register ("psr.um", REG_PSR_UM
);
7473 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7475 unsigned int regnum
= indirect_reg
[i
].regnum
;
7477 md
.indregsym
[regnum
- IND_CPUID
] = declare_register (indirect_reg
[i
].name
, regnum
);
7480 /* pseudo-registers used to specify unwind info: */
7481 declare_register ("psp", REG_PSP
);
7483 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7485 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7486 (void *) (const_bits
+ i
));
7488 as_fatal (_("Inserting \"%s\" into constant hash table failed: %s"),
7492 /* Set the architecture and machine depending on defaults and command line
7494 if (md
.flags
& EF_IA_64_ABI64
)
7495 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7497 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7500 as_warn (_("Could not set architecture and machine"));
7502 /* Set the pointer size and pointer shift size depending on md.flags */
7504 if (md
.flags
& EF_IA_64_ABI64
)
7506 md
.pointer_size
= 8; /* pointers are 8 bytes */
7507 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7511 md
.pointer_size
= 4; /* pointers are 4 bytes */
7512 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7515 md
.mem_offset
.hint
= 0;
7518 md
.entry_labels
= NULL
;
7521 /* Set the default options in md. Cannot do this in md_begin because
7522 that is called after md_parse_option which is where we set the
7523 options in md based on command line options. */
7526 ia64_init (int argc ATTRIBUTE_UNUSED
, char **argv ATTRIBUTE_UNUSED
)
7528 md
.flags
= MD_FLAGS_DEFAULT
;
7530 /* Don't turn on dependency checking for VMS, doesn't work. */
7533 /* FIXME: We should change it to unwind_check_error someday. */
7534 md
.unwind_check
= unwind_check_warning
;
7535 md
.hint_b
= hint_b_error
;
7539 /* Return a string for the target object file format. */
7542 ia64_target_format (void)
7544 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7546 if (md
.flags
& EF_IA_64_BE
)
7548 if (md
.flags
& EF_IA_64_ABI64
)
7549 #if defined(TE_AIX50)
7550 return "elf64-ia64-aix-big";
7551 #elif defined(TE_HPUX)
7552 return "elf64-ia64-hpux-big";
7554 return "elf64-ia64-big";
7557 #if defined(TE_AIX50)
7558 return "elf32-ia64-aix-big";
7559 #elif defined(TE_HPUX)
7560 return "elf32-ia64-hpux-big";
7562 return "elf32-ia64-big";
7567 if (md
.flags
& EF_IA_64_ABI64
)
7568 #if defined (TE_AIX50)
7569 return "elf64-ia64-aix-little";
7570 #elif defined (TE_VMS)
7572 md
.flags
|= EF_IA_64_ARCHVER_1
;
7573 return "elf64-ia64-vms";
7576 return "elf64-ia64-little";
7580 return "elf32-ia64-aix-little";
7582 return "elf32-ia64-little";
7587 return "unknown-format";
7591 ia64_end_of_source (void)
7593 /* terminate insn group upon reaching end of file: */
7594 insn_group_break (1, 0, 0);
7596 /* emits slots we haven't written yet: */
7597 ia64_flush_insns ();
7599 bfd_set_private_flags (stdoutput
, md
.flags
);
7601 md
.mem_offset
.hint
= 0;
7605 ia64_start_line (void)
7610 /* Make sure we don't reference input_line_pointer[-1] when that's
7616 if (md
.qp
.X_op
== O_register
)
7617 as_bad (_("qualifying predicate not followed by instruction"));
7618 md
.qp
.X_op
= O_absent
;
7620 if (ignore_input ())
7623 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7625 if (md
.detect_dv
&& !md
.explicit_mode
)
7632 as_warn (_("Explicit stops are ignored in auto mode"));
7636 insn_group_break (1, 0, 0);
7638 else if (input_line_pointer
[-1] == '{')
7640 if (md
.manual_bundling
)
7641 as_warn (_("Found '{' when manual bundling is already turned on"));
7643 CURR_SLOT
.manual_bundling_on
= 1;
7644 md
.manual_bundling
= 1;
7646 /* Bundling is only acceptable in explicit mode
7647 or when in default automatic mode. */
7648 if (md
.detect_dv
&& !md
.explicit_mode
)
7650 if (!md
.mode_explicitly_set
7651 && !md
.default_explicit_mode
)
7654 as_warn (_("Found '{' after explicit switch to automatic mode"));
7657 else if (input_line_pointer
[-1] == '}')
7659 if (!md
.manual_bundling
)
7660 as_warn (_("Found '}' when manual bundling is off"));
7662 PREV_SLOT
.manual_bundling_off
= 1;
7663 md
.manual_bundling
= 0;
7665 /* switch back to automatic mode, if applicable */
7668 && !md
.mode_explicitly_set
7669 && !md
.default_explicit_mode
)
7674 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7676 static int defining_tag
= 0;
7679 ia64_unrecognized_line (int ch
)
7684 expression_and_evaluate (&md
.qp
);
7685 if (*input_line_pointer
++ != ')')
7687 as_bad (_("Expected ')'"));
7690 if (md
.qp
.X_op
!= O_register
)
7692 as_bad (_("Qualifying predicate expected"));
7695 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7697 as_bad (_("Predicate register expected"));
7709 if (md
.qp
.X_op
== O_register
)
7711 as_bad (_("Tag must come before qualifying predicate."));
7715 /* This implements just enough of read_a_source_file in read.c to
7716 recognize labels. */
7717 if (is_name_beginner (*input_line_pointer
))
7719 c
= get_symbol_name (&s
);
7721 else if (LOCAL_LABELS_FB
7722 && ISDIGIT (*input_line_pointer
))
7725 while (ISDIGIT (*input_line_pointer
))
7726 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7727 fb_label_instance_inc (temp
);
7728 s
= fb_label_name (temp
, 0);
7729 c
= *input_line_pointer
;
7738 /* Put ':' back for error messages' sake. */
7739 *input_line_pointer
++ = ':';
7740 as_bad (_("Expected ':'"));
7747 /* Put ':' back for error messages' sake. */
7748 *input_line_pointer
++ = ':';
7749 if (*input_line_pointer
++ != ']')
7751 as_bad (_("Expected ']'"));
7756 as_bad (_("Tag name expected"));
7766 /* Not a valid line. */
7771 ia64_frob_label (struct symbol
*sym
)
7773 struct label_fix
*fix
;
7775 /* Tags need special handling since they are not bundle breaks like
7779 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7781 fix
->next
= CURR_SLOT
.tag_fixups
;
7782 fix
->dw2_mark_labels
= FALSE
;
7783 CURR_SLOT
.tag_fixups
= fix
;
7788 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7790 md
.last_text_seg
= now_seg
;
7791 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7793 fix
->next
= CURR_SLOT
.label_fixups
;
7794 fix
->dw2_mark_labels
= dwarf2_loc_mark_labels
;
7795 CURR_SLOT
.label_fixups
= fix
;
7797 /* Keep track of how many code entry points we've seen. */
7798 if (md
.path
== md
.maxpaths
)
7801 md
.entry_labels
= (const char **)
7802 xrealloc ((void *) md
.entry_labels
,
7803 md
.maxpaths
* sizeof (char *));
7805 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7810 /* The HP-UX linker will give unresolved symbol errors for symbols
7811 that are declared but unused. This routine removes declared,
7812 unused symbols from an object. */
7814 ia64_frob_symbol (struct symbol
*sym
)
7816 if ((S_GET_SEGMENT (sym
) == bfd_und_section_ptr
&& ! symbol_used_p (sym
) &&
7817 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7818 || (S_GET_SEGMENT (sym
) == bfd_abs_section_ptr
7819 && ! S_IS_EXTERNAL (sym
)))
7826 ia64_flush_pending_output (void)
7828 if (!md
.keep_pending_output
7829 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7831 /* ??? This causes many unnecessary stop bits to be emitted.
7832 Unfortunately, it isn't clear if it is safe to remove this. */
7833 insn_group_break (1, 0, 0);
7834 ia64_flush_insns ();
7838 /* Do ia64-specific expression optimization. All that's done here is
7839 to transform index expressions that are either due to the indexing
7840 of rotating registers or due to the indexing of indirect register
7843 ia64_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
7847 resolve_expression (l
);
7848 if (l
->X_op
== O_register
)
7850 unsigned num_regs
= l
->X_add_number
>> 16;
7852 resolve_expression (r
);
7855 /* Left side is a .rotX-allocated register. */
7856 if (r
->X_op
!= O_constant
)
7858 as_bad (_("Rotating register index must be a non-negative constant"));
7859 r
->X_add_number
= 0;
7861 else if ((valueT
) r
->X_add_number
>= num_regs
)
7863 as_bad (_("Index out of range 0..%u"), num_regs
- 1);
7864 r
->X_add_number
= 0;
7866 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7869 else if (l
->X_add_number
>= IND_CPUID
&& l
->X_add_number
<= IND_RR
)
7871 if (r
->X_op
!= O_register
7872 || r
->X_add_number
< REG_GR
7873 || r
->X_add_number
> REG_GR
+ 127)
7875 as_bad (_("Indirect register index must be a general register"));
7876 r
->X_add_number
= REG_GR
;
7879 l
->X_op_symbol
= md
.indregsym
[l
->X_add_number
- IND_CPUID
];
7880 l
->X_add_number
= r
->X_add_number
;
7884 as_bad (_("Index can only be applied to rotating or indirect registers"));
7885 /* Fall back to some register use of which has as little as possible
7886 side effects, to minimize subsequent error messages. */
7887 l
->X_op
= O_register
;
7888 l
->X_add_number
= REG_GR
+ 3;
7893 ia64_parse_name (char *name
, expressionS
*e
, char *nextcharP
)
7895 struct const_desc
*cdesc
;
7896 struct dynreg
*dr
= 0;
7903 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7905 /* Find what relocation pseudo-function we're dealing with. */
7906 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7907 if (pseudo_func
[idx
].name
7908 && pseudo_func
[idx
].name
[0] == name
[1]
7909 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7911 pseudo_type
= pseudo_func
[idx
].type
;
7914 switch (pseudo_type
)
7916 case PSEUDO_FUNC_RELOC
:
7917 end
= input_line_pointer
;
7918 if (*nextcharP
!= '(')
7920 as_bad (_("Expected '('"));
7924 ++input_line_pointer
;
7926 if (*input_line_pointer
!= ')')
7928 as_bad (_("Missing ')'"));
7932 ++input_line_pointer
;
7934 if (idx
== FUNC_SLOTCOUNT_RELOC
)
7936 /* @slotcount can accept any expression. Canonicalize. */
7937 e
->X_add_symbol
= make_expr_symbol (e
);
7939 e
->X_add_number
= 0;
7942 if (e
->X_op
!= O_symbol
)
7944 if (e
->X_op
!= O_pseudo_fixup
)
7946 as_bad (_("Not a symbolic expression"));
7949 if (idx
!= FUNC_LT_RELATIVE
)
7951 as_bad (_("Illegal combination of relocation functions"));
7954 switch (S_GET_VALUE (e
->X_op_symbol
))
7956 case FUNC_FPTR_RELATIVE
:
7957 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7958 case FUNC_DTP_MODULE
:
7959 idx
= FUNC_LT_DTP_MODULE
; break;
7960 case FUNC_DTP_RELATIVE
:
7961 idx
= FUNC_LT_DTP_RELATIVE
; break;
7962 case FUNC_TP_RELATIVE
:
7963 idx
= FUNC_LT_TP_RELATIVE
; break;
7965 as_bad (_("Illegal combination of relocation functions"));
7969 /* Make sure gas doesn't get rid of local symbols that are used
7971 e
->X_op
= O_pseudo_fixup
;
7972 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7974 *nextcharP
= *input_line_pointer
;
7977 case PSEUDO_FUNC_CONST
:
7978 e
->X_op
= O_constant
;
7979 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7982 case PSEUDO_FUNC_REG
:
7983 e
->X_op
= O_register
;
7984 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7993 /* first see if NAME is a known register name: */
7994 sym
= hash_find (md
.reg_hash
, name
);
7997 e
->X_op
= O_register
;
7998 e
->X_add_number
= S_GET_VALUE (sym
);
8002 cdesc
= hash_find (md
.const_hash
, name
);
8005 e
->X_op
= O_constant
;
8006 e
->X_add_number
= cdesc
->value
;
8010 /* check for inN, locN, or outN: */
8015 if (name
[1] == 'n' && ISDIGIT (name
[2]))
8023 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
8031 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
8042 /* Ignore register numbers with leading zeroes, except zero itself. */
8043 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
8045 unsigned long regnum
;
8047 /* The name is inN, locN, or outN; parse the register number. */
8048 regnum
= strtoul (name
+ idx
, &end
, 10);
8049 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
8051 if (regnum
>= dr
->num_regs
)
8054 as_bad (_("No current frame"));
8056 as_bad (_("Register number out of range 0..%u"),
8060 e
->X_op
= O_register
;
8061 e
->X_add_number
= dr
->base
+ regnum
;
8066 end
= xstrdup (name
);
8067 name
= ia64_canonicalize_symbol_name (end
);
8068 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8070 /* We've got ourselves the name of a rotating register set.
8071 Store the base register number in the low 16 bits of
8072 X_add_number and the size of the register set in the top 16
8074 e
->X_op
= O_register
;
8075 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8083 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8086 ia64_canonicalize_symbol_name (char *name
)
8088 size_t len
= strlen (name
), full
= len
;
8090 while (len
> 0 && name
[len
- 1] == '#')
8095 as_bad (_("Standalone `#' is illegal"));
8097 else if (len
< full
- 1)
8098 as_warn (_("Redundant `#' suffix operators"));
8103 /* Return true if idesc is a conditional branch instruction. This excludes
8104 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8105 because they always read/write resources regardless of the value of the
8106 qualifying predicate. br.ia must always use p0, and hence is always
8107 taken. Thus this function returns true for branches which can fall
8108 through, and which use no resources if they do fall through. */
8111 is_conditional_branch (struct ia64_opcode
*idesc
)
8113 /* br is a conditional branch. Everything that starts with br. except
8114 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8115 Everything that starts with brl is a conditional branch. */
8116 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8117 && (idesc
->name
[2] == '\0'
8118 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8119 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8120 || idesc
->name
[2] == 'l'
8121 /* br.cond, br.call, br.clr */
8122 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8123 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8124 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8127 /* Return whether the given opcode is a taken branch. If there's any doubt,
8131 is_taken_branch (struct ia64_opcode
*idesc
)
8133 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8134 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8137 /* Return whether the given opcode is an interruption or rfi. If there's any
8138 doubt, returns zero. */
8141 is_interruption_or_rfi (struct ia64_opcode
*idesc
)
8143 if (strcmp (idesc
->name
, "rfi") == 0)
8148 /* Returns the index of the given dependency in the opcode's list of chks, or
8149 -1 if there is no dependency. */
8152 depends_on (int depind
, struct ia64_opcode
*idesc
)
8155 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8156 for (i
= 0; i
< dep
->nchks
; i
++)
8158 if (depind
== DEP (dep
->chks
[i
]))
8164 /* Determine a set of specific resources used for a particular resource
8165 class. Returns the number of specific resources identified For those
8166 cases which are not determinable statically, the resource returned is
8169 Meanings of value in 'NOTE':
8170 1) only read/write when the register number is explicitly encoded in the
8172 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8173 accesses CFM when qualifying predicate is in the rotating region.
8174 3) general register value is used to specify an indirect register; not
8175 determinable statically.
8176 4) only read the given resource when bits 7:0 of the indirect index
8177 register value does not match the register number of the resource; not
8178 determinable statically.
8179 5) all rules are implementation specific.
8180 6) only when both the index specified by the reader and the index specified
8181 by the writer have the same value in bits 63:61; not determinable
8183 7) only access the specified resource when the corresponding mask bit is
8185 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8186 only read when these insns reference FR2-31
8187 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8188 written when these insns write FR32-127
8189 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8191 11) The target predicates are written independently of PR[qp], but source
8192 registers are only read if PR[qp] is true. Since the state of PR[qp]
8193 cannot statically be determined, all source registers are marked used.
8194 12) This insn only reads the specified predicate register when that
8195 register is the PR[qp].
8196 13) This reference to ld-c only applies to the GR whose value is loaded
8197 with data returned from memory, not the post-incremented address register.
8198 14) The RSE resource includes the implementation-specific RSE internal
8199 state resources. At least one (and possibly more) of these resources are
8200 read by each instruction listed in IC:rse-readers. At least one (and
8201 possibly more) of these resources are written by each insn listed in
8203 15+16) Represents reserved instructions, which the assembler does not
8205 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and
8206 mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up.
8208 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8209 this code; there are no dependency violations based on memory access.
8212 #define MAX_SPECS 256
8217 specify_resource (const struct ia64_dependency
*dep
,
8218 struct ia64_opcode
*idesc
,
8219 /* is this a DV chk or a DV reg? */
8221 /* returned specific resources */
8222 struct rsrc specs
[MAX_SPECS
],
8223 /* resource note for this insn's usage */
8225 /* which execution path to examine */
8233 if (dep
->mode
== IA64_DV_WAW
8234 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8235 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8238 /* template for any resources we identify */
8239 tmpl
.dependency
= dep
;
8241 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8242 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8243 tmpl
.link_to_qp_branch
= 1;
8244 tmpl
.mem_offset
.hint
= 0;
8245 tmpl
.mem_offset
.offset
= 0;
8246 tmpl
.mem_offset
.base
= 0;
8249 tmpl
.cmp_type
= CMP_NONE
;
8256 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8257 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8258 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8260 /* we don't need to track these */
8261 if (dep
->semantics
== IA64_DVS_NONE
)
8264 switch (dep
->specifier
)
8269 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8271 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8272 if (regno
>= 0 && regno
<= 7)
8274 specs
[count
] = tmpl
;
8275 specs
[count
++].index
= regno
;
8281 for (i
= 0; i
< 8; i
++)
8283 specs
[count
] = tmpl
;
8284 specs
[count
++].index
= i
;
8293 case IA64_RS_AR_UNAT
:
8294 /* This is a mov =AR or mov AR= instruction. */
8295 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8297 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8298 if (regno
== AR_UNAT
)
8300 specs
[count
++] = tmpl
;
8305 /* This is a spill/fill, or other instruction that modifies the
8308 /* Unless we can determine the specific bits used, mark the whole
8309 thing; bits 8:3 of the memory address indicate the bit used in
8310 UNAT. The .mem.offset hint may be used to eliminate a small
8311 subset of conflicts. */
8312 specs
[count
] = tmpl
;
8313 if (md
.mem_offset
.hint
)
8316 fprintf (stderr
, " Using hint for spill/fill\n");
8317 /* The index isn't actually used, just set it to something
8318 approximating the bit index. */
8319 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8320 specs
[count
].mem_offset
.hint
= 1;
8321 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8322 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8326 specs
[count
++].specific
= 0;
8334 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8336 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8337 if ((regno
>= 8 && regno
<= 15)
8338 || (regno
>= 20 && regno
<= 23)
8339 || (regno
>= 31 && regno
<= 39)
8340 || (regno
>= 41 && regno
<= 47)
8341 || (regno
>= 67 && regno
<= 111))
8343 specs
[count
] = tmpl
;
8344 specs
[count
++].index
= regno
;
8357 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8359 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8360 if ((regno
>= 48 && regno
<= 63)
8361 || (regno
>= 112 && regno
<= 127))
8363 specs
[count
] = tmpl
;
8364 specs
[count
++].index
= regno
;
8370 for (i
= 48; i
< 64; i
++)
8372 specs
[count
] = tmpl
;
8373 specs
[count
++].index
= i
;
8375 for (i
= 112; i
< 128; i
++)
8377 specs
[count
] = tmpl
;
8378 specs
[count
++].index
= i
;
8396 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8397 if (idesc
->operands
[i
] == IA64_OPND_B1
8398 || idesc
->operands
[i
] == IA64_OPND_B2
)
8400 specs
[count
] = tmpl
;
8401 specs
[count
++].index
=
8402 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8407 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8408 if (idesc
->operands
[i
] == IA64_OPND_B1
8409 || idesc
->operands
[i
] == IA64_OPND_B2
)
8411 specs
[count
] = tmpl
;
8412 specs
[count
++].index
=
8413 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8419 case IA64_RS_CPUID
: /* four or more registers */
8422 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8424 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8425 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8428 specs
[count
] = tmpl
;
8429 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8433 specs
[count
] = tmpl
;
8434 specs
[count
++].specific
= 0;
8444 case IA64_RS_DBR
: /* four or more registers */
8447 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8449 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8450 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8453 specs
[count
] = tmpl
;
8454 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8458 specs
[count
] = tmpl
;
8459 specs
[count
++].specific
= 0;
8463 else if (note
== 0 && !rsrc_write
)
8465 specs
[count
] = tmpl
;
8466 specs
[count
++].specific
= 0;
8474 case IA64_RS_IBR
: /* four or more registers */
8477 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8479 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8480 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8483 specs
[count
] = tmpl
;
8484 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8488 specs
[count
] = tmpl
;
8489 specs
[count
++].specific
= 0;
8502 /* These are implementation specific. Force all references to
8503 conflict with all other references. */
8504 specs
[count
] = tmpl
;
8505 specs
[count
++].specific
= 0;
8513 case IA64_RS_PKR
: /* 16 or more registers */
8514 if (note
== 3 || note
== 4)
8516 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8518 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8519 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8524 specs
[count
] = tmpl
;
8525 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8528 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8530 /* Uses all registers *except* the one in R3. */
8531 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8533 specs
[count
] = tmpl
;
8534 specs
[count
++].index
= i
;
8540 specs
[count
] = tmpl
;
8541 specs
[count
++].specific
= 0;
8548 specs
[count
] = tmpl
;
8549 specs
[count
++].specific
= 0;
8553 case IA64_RS_PMC
: /* four or more registers */
8556 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8557 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8560 int reg_index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8562 int regno
= CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_GR
;
8563 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8566 specs
[count
] = tmpl
;
8567 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8571 specs
[count
] = tmpl
;
8572 specs
[count
++].specific
= 0;
8582 case IA64_RS_PMD
: /* four or more registers */
8585 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8587 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8588 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8591 specs
[count
] = tmpl
;
8592 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8596 specs
[count
] = tmpl
;
8597 specs
[count
++].specific
= 0;
8607 case IA64_RS_RR
: /* eight registers */
8610 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8612 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8613 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8616 specs
[count
] = tmpl
;
8617 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8621 specs
[count
] = tmpl
;
8622 specs
[count
++].specific
= 0;
8626 else if (note
== 0 && !rsrc_write
)
8628 specs
[count
] = tmpl
;
8629 specs
[count
++].specific
= 0;
8637 case IA64_RS_CR_IRR
:
8640 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8641 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8643 && idesc
->operands
[1] == IA64_OPND_CR3
8646 for (i
= 0; i
< 4; i
++)
8648 specs
[count
] = tmpl
;
8649 specs
[count
++].index
= CR_IRR0
+ i
;
8655 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8656 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8658 && regno
<= CR_IRR3
)
8660 specs
[count
] = tmpl
;
8661 specs
[count
++].index
= regno
;
8670 case IA64_RS_CR_IIB
:
8677 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8678 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8679 && (regno
== CR_IIB0
|| regno
== CR_IIB1
))
8681 specs
[count
] = tmpl
;
8682 specs
[count
++].index
= regno
;
8687 case IA64_RS_CR_LRR
:
8694 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8695 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8696 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8698 specs
[count
] = tmpl
;
8699 specs
[count
++].index
= regno
;
8707 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8709 specs
[count
] = tmpl
;
8710 specs
[count
++].index
=
8711 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8723 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DAHR3
)
8725 specs
[count
] = tmpl
;
8726 specs
[count
++].index
=
8727 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_DAHR
;
8742 else if (rsrc_write
)
8744 if (dep
->specifier
== IA64_RS_FRb
8745 && idesc
->operands
[0] == IA64_OPND_F1
)
8747 specs
[count
] = tmpl
;
8748 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8753 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8755 if (idesc
->operands
[i
] == IA64_OPND_F2
8756 || idesc
->operands
[i
] == IA64_OPND_F3
8757 || idesc
->operands
[i
] == IA64_OPND_F4
)
8759 specs
[count
] = tmpl
;
8760 specs
[count
++].index
=
8761 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8770 /* This reference applies only to the GR whose value is loaded with
8771 data returned from memory. */
8772 specs
[count
] = tmpl
;
8773 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8779 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8780 if (idesc
->operands
[i
] == IA64_OPND_R1
8781 || idesc
->operands
[i
] == IA64_OPND_R2
8782 || idesc
->operands
[i
] == IA64_OPND_R3
)
8784 specs
[count
] = tmpl
;
8785 specs
[count
++].index
=
8786 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8788 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8789 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8790 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8792 specs
[count
] = tmpl
;
8793 specs
[count
++].index
=
8794 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8799 /* Look for anything that reads a GR. */
8800 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8802 if (idesc
->operands
[i
] == IA64_OPND_MR3
8803 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8804 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8805 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8806 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8807 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8808 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8809 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8810 || idesc
->operands
[i
] == IA64_OPND_DAHR_R3
8811 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8812 || ((i
>= idesc
->num_outputs
)
8813 && (idesc
->operands
[i
] == IA64_OPND_R1
8814 || idesc
->operands
[i
] == IA64_OPND_R2
8815 || idesc
->operands
[i
] == IA64_OPND_R3
8816 /* addl source register. */
8817 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8819 specs
[count
] = tmpl
;
8820 specs
[count
++].index
=
8821 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8832 /* This is the same as IA64_RS_PRr, except that the register range is
8833 from 1 - 15, and there are no rotating register reads/writes here. */
8837 for (i
= 1; i
< 16; i
++)
8839 specs
[count
] = tmpl
;
8840 specs
[count
++].index
= i
;
8846 /* Mark only those registers indicated by the mask. */
8849 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8850 for (i
= 1; i
< 16; i
++)
8851 if (mask
& ((valueT
) 1 << i
))
8853 specs
[count
] = tmpl
;
8854 specs
[count
++].index
= i
;
8862 else if (note
== 11) /* note 11 implies note 1 as well */
8866 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8868 if (idesc
->operands
[i
] == IA64_OPND_P1
8869 || idesc
->operands
[i
] == IA64_OPND_P2
)
8871 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8872 if (regno
>= 1 && regno
< 16)
8874 specs
[count
] = tmpl
;
8875 specs
[count
++].index
= regno
;
8885 else if (note
== 12)
8887 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8889 specs
[count
] = tmpl
;
8890 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8897 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8898 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8899 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8900 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8902 if ((idesc
->operands
[0] == IA64_OPND_P1
8903 || idesc
->operands
[0] == IA64_OPND_P2
)
8904 && p1
>= 1 && p1
< 16)
8906 specs
[count
] = tmpl
;
8907 specs
[count
].cmp_type
=
8908 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8909 specs
[count
++].index
= p1
;
8911 if ((idesc
->operands
[1] == IA64_OPND_P1
8912 || idesc
->operands
[1] == IA64_OPND_P2
)
8913 && p2
>= 1 && p2
< 16)
8915 specs
[count
] = tmpl
;
8916 specs
[count
].cmp_type
=
8917 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8918 specs
[count
++].index
= p2
;
8923 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8925 specs
[count
] = tmpl
;
8926 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8928 if (idesc
->operands
[1] == IA64_OPND_PR
)
8930 for (i
= 1; i
< 16; i
++)
8932 specs
[count
] = tmpl
;
8933 specs
[count
++].index
= i
;
8944 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8945 simplified cases of this. */
8949 for (i
= 16; i
< 63; i
++)
8951 specs
[count
] = tmpl
;
8952 specs
[count
++].index
= i
;
8958 /* Mark only those registers indicated by the mask. */
8960 && idesc
->operands
[0] == IA64_OPND_PR
)
8962 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8963 if (mask
& ((valueT
) 1 << 16))
8964 for (i
= 16; i
< 63; i
++)
8966 specs
[count
] = tmpl
;
8967 specs
[count
++].index
= i
;
8971 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8973 for (i
= 16; i
< 63; i
++)
8975 specs
[count
] = tmpl
;
8976 specs
[count
++].index
= i
;
8984 else if (note
== 11) /* note 11 implies note 1 as well */
8988 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8990 if (idesc
->operands
[i
] == IA64_OPND_P1
8991 || idesc
->operands
[i
] == IA64_OPND_P2
)
8993 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8994 if (regno
>= 16 && regno
< 63)
8996 specs
[count
] = tmpl
;
8997 specs
[count
++].index
= regno
;
9007 else if (note
== 12)
9009 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9011 specs
[count
] = tmpl
;
9012 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9019 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9020 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9021 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9022 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9024 if ((idesc
->operands
[0] == IA64_OPND_P1
9025 || idesc
->operands
[0] == IA64_OPND_P2
)
9026 && p1
>= 16 && p1
< 63)
9028 specs
[count
] = tmpl
;
9029 specs
[count
].cmp_type
=
9030 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9031 specs
[count
++].index
= p1
;
9033 if ((idesc
->operands
[1] == IA64_OPND_P1
9034 || idesc
->operands
[1] == IA64_OPND_P2
)
9035 && p2
>= 16 && p2
< 63)
9037 specs
[count
] = tmpl
;
9038 specs
[count
].cmp_type
=
9039 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9040 specs
[count
++].index
= p2
;
9045 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9047 specs
[count
] = tmpl
;
9048 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9050 if (idesc
->operands
[1] == IA64_OPND_PR
)
9052 for (i
= 16; i
< 63; i
++)
9054 specs
[count
] = tmpl
;
9055 specs
[count
++].index
= i
;
9067 /* Verify that the instruction is using the PSR bit indicated in
9071 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
9073 if (dep
->regindex
< 6)
9075 specs
[count
++] = tmpl
;
9078 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
9080 if (dep
->regindex
< 32
9081 || dep
->regindex
== 35
9082 || dep
->regindex
== 36
9083 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
9085 specs
[count
++] = tmpl
;
9088 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
9090 if (dep
->regindex
< 32
9091 || dep
->regindex
== 35
9092 || dep
->regindex
== 36
9093 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
9095 specs
[count
++] = tmpl
;
9100 /* Several PSR bits have very specific dependencies. */
9101 switch (dep
->regindex
)
9104 specs
[count
++] = tmpl
;
9109 specs
[count
++] = tmpl
;
9113 /* Only certain CR accesses use PSR.ic */
9114 if (idesc
->operands
[0] == IA64_OPND_CR3
9115 || idesc
->operands
[1] == IA64_OPND_CR3
)
9118 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9121 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_CR
;
9138 specs
[count
++] = tmpl
;
9147 specs
[count
++] = tmpl
;
9151 /* Only some AR accesses use cpl */
9152 if (idesc
->operands
[0] == IA64_OPND_AR3
9153 || idesc
->operands
[1] == IA64_OPND_AR3
)
9156 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9159 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_AR
;
9166 && regno
<= AR_K7
))))
9168 specs
[count
++] = tmpl
;
9173 specs
[count
++] = tmpl
;
9183 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9185 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9191 if (mask
& ((valueT
) 1 << dep
->regindex
))
9193 specs
[count
++] = tmpl
;
9198 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9199 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9200 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9201 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9203 if (idesc
->operands
[i
] == IA64_OPND_F1
9204 || idesc
->operands
[i
] == IA64_OPND_F2
9205 || idesc
->operands
[i
] == IA64_OPND_F3
9206 || idesc
->operands
[i
] == IA64_OPND_F4
)
9208 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9209 if (reg
>= min
&& reg
<= max
)
9211 specs
[count
++] = tmpl
;
9218 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9219 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9220 /* mfh is read on writes to FR32-127; mfl is read on writes to
9222 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9224 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9226 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9227 if (reg
>= min
&& reg
<= max
)
9229 specs
[count
++] = tmpl
;
9234 else if (note
== 10)
9236 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9238 if (idesc
->operands
[i
] == IA64_OPND_R1
9239 || idesc
->operands
[i
] == IA64_OPND_R2
9240 || idesc
->operands
[i
] == IA64_OPND_R3
)
9242 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9243 if (regno
>= 16 && regno
<= 31)
9245 specs
[count
++] = tmpl
;
9256 case IA64_RS_AR_FPSR
:
9257 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9259 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9260 if (regno
== AR_FPSR
)
9262 specs
[count
++] = tmpl
;
9267 specs
[count
++] = tmpl
;
9272 /* Handle all AR[REG] resources */
9273 if (note
== 0 || note
== 1)
9275 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9276 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9277 && regno
== dep
->regindex
)
9279 specs
[count
++] = tmpl
;
9281 /* other AR[REG] resources may be affected by AR accesses */
9282 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9285 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9286 switch (dep
->regindex
)
9292 if (regno
== AR_BSPSTORE
)
9294 specs
[count
++] = tmpl
;
9298 (regno
== AR_BSPSTORE
9299 || regno
== AR_RNAT
))
9301 specs
[count
++] = tmpl
;
9306 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9309 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9310 switch (dep
->regindex
)
9315 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9317 specs
[count
++] = tmpl
;
9324 specs
[count
++] = tmpl
;
9334 /* Handle all CR[REG] resources.
9335 ??? FIXME: The rule 17 isn't really handled correctly. */
9336 if (note
== 0 || note
== 1 || note
== 17)
9338 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9340 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9341 if (regno
== dep
->regindex
)
9343 specs
[count
++] = tmpl
;
9345 else if (!rsrc_write
)
9347 /* Reads from CR[IVR] affect other resources. */
9348 if (regno
== CR_IVR
)
9350 if ((dep
->regindex
>= CR_IRR0
9351 && dep
->regindex
<= CR_IRR3
)
9352 || dep
->regindex
== CR_TPR
)
9354 specs
[count
++] = tmpl
;
9361 specs
[count
++] = tmpl
;
9370 case IA64_RS_INSERVICE
:
9371 /* look for write of EOI (67) or read of IVR (65) */
9372 if ((idesc
->operands
[0] == IA64_OPND_CR3
9373 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9374 || (idesc
->operands
[1] == IA64_OPND_CR3
9375 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9377 specs
[count
++] = tmpl
;
9384 specs
[count
++] = tmpl
;
9395 specs
[count
++] = tmpl
;
9399 /* Check if any of the registers accessed are in the rotating region.
9400 mov to/from pr accesses CFM only when qp_regno is in the rotating
9402 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9404 if (idesc
->operands
[i
] == IA64_OPND_R1
9405 || idesc
->operands
[i
] == IA64_OPND_R2
9406 || idesc
->operands
[i
] == IA64_OPND_R3
)
9408 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9409 /* Assumes that md.rot.num_regs is always valid */
9410 if (md
.rot
.num_regs
> 0
9412 && num
< 31 + md
.rot
.num_regs
)
9414 specs
[count
] = tmpl
;
9415 specs
[count
++].specific
= 0;
9418 else if (idesc
->operands
[i
] == IA64_OPND_F1
9419 || idesc
->operands
[i
] == IA64_OPND_F2
9420 || idesc
->operands
[i
] == IA64_OPND_F3
9421 || idesc
->operands
[i
] == IA64_OPND_F4
)
9423 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9426 specs
[count
] = tmpl
;
9427 specs
[count
++].specific
= 0;
9430 else if (idesc
->operands
[i
] == IA64_OPND_P1
9431 || idesc
->operands
[i
] == IA64_OPND_P2
)
9433 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9436 specs
[count
] = tmpl
;
9437 specs
[count
++].specific
= 0;
9441 if (CURR_SLOT
.qp_regno
> 15)
9443 specs
[count
] = tmpl
;
9444 specs
[count
++].specific
= 0;
9449 /* This is the same as IA64_RS_PRr, except simplified to account for
9450 the fact that there is only one register. */
9454 specs
[count
++] = tmpl
;
9459 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9460 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9461 if (mask
& ((valueT
) 1 << 63))
9462 specs
[count
++] = tmpl
;
9464 else if (note
== 11)
9466 if ((idesc
->operands
[0] == IA64_OPND_P1
9467 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9468 || (idesc
->operands
[1] == IA64_OPND_P2
9469 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9471 specs
[count
++] = tmpl
;
9474 else if (note
== 12)
9476 if (CURR_SLOT
.qp_regno
== 63)
9478 specs
[count
++] = tmpl
;
9485 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9486 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9487 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9488 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9491 && (idesc
->operands
[0] == IA64_OPND_P1
9492 || idesc
->operands
[0] == IA64_OPND_P2
))
9494 specs
[count
] = tmpl
;
9495 specs
[count
++].cmp_type
=
9496 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9499 && (idesc
->operands
[1] == IA64_OPND_P1
9500 || idesc
->operands
[1] == IA64_OPND_P2
))
9502 specs
[count
] = tmpl
;
9503 specs
[count
++].cmp_type
=
9504 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9509 if (CURR_SLOT
.qp_regno
== 63)
9511 specs
[count
++] = tmpl
;
9522 /* FIXME we can identify some individual RSE written resources, but RSE
9523 read resources have not yet been completely identified, so for now
9524 treat RSE as a single resource */
9525 if (strncmp (idesc
->name
, "mov", 3) == 0)
9529 if (idesc
->operands
[0] == IA64_OPND_AR3
9530 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9532 specs
[count
++] = tmpl
;
9537 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9539 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9540 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9542 specs
[count
++] = tmpl
;
9545 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9547 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9548 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9549 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9551 specs
[count
++] = tmpl
;
9558 specs
[count
++] = tmpl
;
9563 /* FIXME -- do any of these need to be non-specific? */
9564 specs
[count
++] = tmpl
;
9568 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9575 /* Clear branch flags on marked resources. This breaks the link between the
9576 QP of the marking instruction and a subsequent branch on the same QP. */
9579 clear_qp_branch_flag (valueT mask
)
9582 for (i
= 0; i
< regdepslen
; i
++)
9584 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9585 if ((bit
& mask
) != 0)
9587 regdeps
[i
].link_to_qp_branch
= 0;
9592 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9593 any mutexes which contain one of the PRs and create new ones when
9597 update_qp_mutex (valueT mask
)
9603 while (i
< qp_mutexeslen
)
9605 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9607 /* If it destroys and creates the same mutex, do nothing. */
9608 if (qp_mutexes
[i
].prmask
== mask
9609 && qp_mutexes
[i
].path
== md
.path
)
9620 fprintf (stderr
, " Clearing mutex relation");
9621 print_prmask (qp_mutexes
[i
].prmask
);
9622 fprintf (stderr
, "\n");
9625 /* Deal with the old mutex with more than 3+ PRs only if
9626 the new mutex on the same execution path with it.
9628 FIXME: The 3+ mutex support is incomplete.
9629 dot_pred_rel () may be a better place to fix it. */
9630 if (qp_mutexes
[i
].path
== md
.path
)
9632 /* If it is a proper subset of the mutex, create a
9635 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9638 qp_mutexes
[i
].prmask
&= ~mask
;
9639 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9641 /* Modify the mutex if there are more than one
9649 /* Remove the mutex. */
9650 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9658 add_qp_mutex (mask
);
9663 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9665 Any changes to a PR clears the mutex relations which include that PR. */
9668 clear_qp_mutex (valueT mask
)
9673 while (i
< qp_mutexeslen
)
9675 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9679 fprintf (stderr
, " Clearing mutex relation");
9680 print_prmask (qp_mutexes
[i
].prmask
);
9681 fprintf (stderr
, "\n");
9683 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9690 /* Clear implies relations which contain PRs in the given masks.
9691 P1_MASK indicates the source of the implies relation, while P2_MASK
9692 indicates the implied PR. */
9695 clear_qp_implies (valueT p1_mask
, valueT p2_mask
)
9700 while (i
< qp_implieslen
)
9702 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9703 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9706 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9707 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9708 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9715 /* Add the PRs specified to the list of implied relations. */
9718 add_qp_imply (int p1
, int p2
)
9724 /* p0 is not meaningful here. */
9725 if (p1
== 0 || p2
== 0)
9731 /* If it exists already, ignore it. */
9732 for (i
= 0; i
< qp_implieslen
; i
++)
9734 if (qp_implies
[i
].p1
== p1
9735 && qp_implies
[i
].p2
== p2
9736 && qp_implies
[i
].path
== md
.path
9737 && !qp_implies
[i
].p2_branched
)
9741 if (qp_implieslen
== qp_impliestotlen
)
9743 qp_impliestotlen
+= 20;
9744 qp_implies
= (struct qp_imply
*)
9745 xrealloc ((void *) qp_implies
,
9746 qp_impliestotlen
* sizeof (struct qp_imply
));
9749 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9750 qp_implies
[qp_implieslen
].p1
= p1
;
9751 qp_implies
[qp_implieslen
].p2
= p2
;
9752 qp_implies
[qp_implieslen
].path
= md
.path
;
9753 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9755 /* Add in the implied transitive relations; for everything that p2 implies,
9756 make p1 imply that, too; for everything that implies p1, make it imply p2
9758 for (i
= 0; i
< qp_implieslen
; i
++)
9760 if (qp_implies
[i
].p1
== p2
)
9761 add_qp_imply (p1
, qp_implies
[i
].p2
);
9762 if (qp_implies
[i
].p2
== p1
)
9763 add_qp_imply (qp_implies
[i
].p1
, p2
);
9765 /* Add in mutex relations implied by this implies relation; for each mutex
9766 relation containing p2, duplicate it and replace p2 with p1. */
9767 bit
= (valueT
) 1 << p1
;
9768 mask
= (valueT
) 1 << p2
;
9769 for (i
= 0; i
< qp_mutexeslen
; i
++)
9771 if (qp_mutexes
[i
].prmask
& mask
)
9772 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9776 /* Add the PRs specified in the mask to the mutex list; this means that only
9777 one of the PRs can be true at any time. PR0 should never be included in
9781 add_qp_mutex (valueT mask
)
9786 if (qp_mutexeslen
== qp_mutexestotlen
)
9788 qp_mutexestotlen
+= 20;
9789 qp_mutexes
= (struct qpmutex
*)
9790 xrealloc ((void *) qp_mutexes
,
9791 qp_mutexestotlen
* sizeof (struct qpmutex
));
9795 fprintf (stderr
, " Registering mutex on");
9796 print_prmask (mask
);
9797 fprintf (stderr
, "\n");
9799 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9800 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9804 has_suffix_p (const char *name
, const char *suffix
)
9806 size_t namelen
= strlen (name
);
9807 size_t sufflen
= strlen (suffix
);
9809 if (namelen
<= sufflen
)
9811 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9815 clear_register_values (void)
9819 fprintf (stderr
, " Clearing register values\n");
9820 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9821 gr_values
[i
].known
= 0;
9824 /* Keep track of register values/changes which affect DV tracking.
9826 optimization note: should add a flag to classes of insns where otherwise we
9827 have to examine a group of strings to identify them. */
9830 note_register_values (struct ia64_opcode
*idesc
)
9832 valueT qp_changemask
= 0;
9835 /* Invalidate values for registers being written to. */
9836 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9838 if (idesc
->operands
[i
] == IA64_OPND_R1
9839 || idesc
->operands
[i
] == IA64_OPND_R2
9840 || idesc
->operands
[i
] == IA64_OPND_R3
)
9842 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9843 if (regno
> 0 && regno
< NELEMS (gr_values
))
9844 gr_values
[regno
].known
= 0;
9846 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9848 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9849 if (regno
> 0 && regno
< 4)
9850 gr_values
[regno
].known
= 0;
9852 else if (idesc
->operands
[i
] == IA64_OPND_P1
9853 || idesc
->operands
[i
] == IA64_OPND_P2
)
9855 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9856 qp_changemask
|= (valueT
) 1 << regno
;
9858 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9860 if (idesc
->operands
[2] & (valueT
) 0x10000)
9861 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9863 qp_changemask
= idesc
->operands
[2];
9866 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9868 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9869 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9871 qp_changemask
= idesc
->operands
[1];
9872 qp_changemask
&= ~(valueT
) 0xFFFF;
9877 /* Always clear qp branch flags on any PR change. */
9878 /* FIXME there may be exceptions for certain compares. */
9879 clear_qp_branch_flag (qp_changemask
);
9881 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9882 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9884 qp_changemask
|= ~(valueT
) 0xFFFF;
9885 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9887 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9888 gr_values
[i
].known
= 0;
9890 clear_qp_mutex (qp_changemask
);
9891 clear_qp_implies (qp_changemask
, qp_changemask
);
9893 /* After a call, all register values are undefined, except those marked
9895 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9896 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9898 /* FIXME keep GR values which are marked as "safe_across_calls" */
9899 clear_register_values ();
9900 clear_qp_mutex (~qp_safe_across_calls
);
9901 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9902 clear_qp_branch_flag (~qp_safe_across_calls
);
9904 else if (is_interruption_or_rfi (idesc
)
9905 || is_taken_branch (idesc
))
9907 clear_register_values ();
9908 clear_qp_mutex (~(valueT
) 0);
9909 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9911 /* Look for mutex and implies relations. */
9912 else if ((idesc
->operands
[0] == IA64_OPND_P1
9913 || idesc
->operands
[0] == IA64_OPND_P2
)
9914 && (idesc
->operands
[1] == IA64_OPND_P1
9915 || idesc
->operands
[1] == IA64_OPND_P2
))
9917 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9918 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9919 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9920 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9922 /* If both PRs are PR0, we can't really do anything. */
9923 if (p1
== 0 && p2
== 0)
9926 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9928 /* In general, clear mutexes and implies which include P1 or P2,
9929 with the following exceptions. */
9930 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9931 || has_suffix_p (idesc
->name
, ".and.orcm"))
9933 clear_qp_implies (p2mask
, p1mask
);
9935 else if (has_suffix_p (idesc
->name
, ".andcm")
9936 || has_suffix_p (idesc
->name
, ".and"))
9938 clear_qp_implies (0, p1mask
| p2mask
);
9940 else if (has_suffix_p (idesc
->name
, ".orcm")
9941 || has_suffix_p (idesc
->name
, ".or"))
9943 clear_qp_mutex (p1mask
| p2mask
);
9944 clear_qp_implies (p1mask
| p2mask
, 0);
9950 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9952 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9953 if (p1
== 0 || p2
== 0)
9954 clear_qp_mutex (p1mask
| p2mask
);
9956 added
= update_qp_mutex (p1mask
| p2mask
);
9958 if (CURR_SLOT
.qp_regno
== 0
9959 || has_suffix_p (idesc
->name
, ".unc"))
9961 if (added
== 0 && p1
&& p2
)
9962 add_qp_mutex (p1mask
| p2mask
);
9963 if (CURR_SLOT
.qp_regno
!= 0)
9966 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9968 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9973 /* Look for mov imm insns into GRs. */
9974 else if (idesc
->operands
[0] == IA64_OPND_R1
9975 && (idesc
->operands
[1] == IA64_OPND_IMM22
9976 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9977 && CURR_SLOT
.opnd
[1].X_op
== O_constant
9978 && (strcmp (idesc
->name
, "mov") == 0
9979 || strcmp (idesc
->name
, "movl") == 0))
9981 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9982 if (regno
> 0 && regno
< NELEMS (gr_values
))
9984 gr_values
[regno
].known
= 1;
9985 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9986 gr_values
[regno
].path
= md
.path
;
9989 fprintf (stderr
, " Know gr%d = ", regno
);
9990 fprintf_vma (stderr
, gr_values
[regno
].value
);
9991 fputs ("\n", stderr
);
9995 /* Look for dep.z imm insns. */
9996 else if (idesc
->operands
[0] == IA64_OPND_R1
9997 && idesc
->operands
[1] == IA64_OPND_IMM8
9998 && strcmp (idesc
->name
, "dep.z") == 0)
10000 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
10001 if (regno
> 0 && regno
< NELEMS (gr_values
))
10003 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
10005 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
10006 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
10007 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
10008 gr_values
[regno
].known
= 1;
10009 gr_values
[regno
].value
= value
;
10010 gr_values
[regno
].path
= md
.path
;
10013 fprintf (stderr
, " Know gr%d = ", regno
);
10014 fprintf_vma (stderr
, gr_values
[regno
].value
);
10015 fputs ("\n", stderr
);
10021 clear_qp_mutex (qp_changemask
);
10022 clear_qp_implies (qp_changemask
, qp_changemask
);
10026 /* Return whether the given predicate registers are currently mutex. */
10029 qp_mutex (int p1
, int p2
, int path
)
10036 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
10037 for (i
= 0; i
< qp_mutexeslen
; i
++)
10039 if (qp_mutexes
[i
].path
>= path
10040 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
10047 /* Return whether the given resource is in the given insn's list of chks
10048 Return 1 if the conflict is absolutely determined, 2 if it's a potential
10052 resources_match (struct rsrc
*rs
,
10053 struct ia64_opcode
*idesc
,
10058 struct rsrc specs
[MAX_SPECS
];
10061 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10062 we don't need to check. One exception is note 11, which indicates that
10063 target predicates are written regardless of PR[qp]. */
10064 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
10068 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
10069 while (count
-- > 0)
10071 /* UNAT checking is a bit more specific than other resources */
10072 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
10073 && specs
[count
].mem_offset
.hint
10074 && rs
->mem_offset
.hint
)
10076 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
10078 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
10079 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
10086 /* Skip apparent PR write conflicts where both writes are an AND or both
10087 writes are an OR. */
10088 if (rs
->dependency
->specifier
== IA64_RS_PR
10089 || rs
->dependency
->specifier
== IA64_RS_PRr
10090 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10092 if (specs
[count
].cmp_type
!= CMP_NONE
10093 && specs
[count
].cmp_type
== rs
->cmp_type
)
10096 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10097 dv_mode
[rs
->dependency
->mode
],
10098 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10099 specs
[count
].index
: 63);
10104 " %s on parallel compare conflict %s vs %s on PR%d\n",
10105 dv_mode
[rs
->dependency
->mode
],
10106 dv_cmp_type
[rs
->cmp_type
],
10107 dv_cmp_type
[specs
[count
].cmp_type
],
10108 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10109 specs
[count
].index
: 63);
10113 /* If either resource is not specific, conservatively assume a conflict
10115 if (!specs
[count
].specific
|| !rs
->specific
)
10117 else if (specs
[count
].index
== rs
->index
)
10124 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10125 insert a stop to create the break. Update all resource dependencies
10126 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10127 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10128 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10132 insn_group_break (int insert_stop
, int qp_regno
, int save_current
)
10136 if (insert_stop
&& md
.num_slots_in_use
> 0)
10137 PREV_SLOT
.end_of_insn_group
= 1;
10141 fprintf (stderr
, " Insn group break%s",
10142 (insert_stop
? " (w/stop)" : ""));
10144 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10145 fprintf (stderr
, "\n");
10149 while (i
< regdepslen
)
10151 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10154 && regdeps
[i
].qp_regno
!= qp_regno
)
10161 && CURR_SLOT
.src_file
== regdeps
[i
].file
10162 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10168 /* clear dependencies which are automatically cleared by a stop, or
10169 those that have reached the appropriate state of insn serialization */
10170 if (dep
->semantics
== IA64_DVS_IMPLIED
10171 || dep
->semantics
== IA64_DVS_IMPLIEDF
10172 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10174 print_dependency ("Removing", i
);
10175 regdeps
[i
] = regdeps
[--regdepslen
];
10179 if (dep
->semantics
== IA64_DVS_DATA
10180 || dep
->semantics
== IA64_DVS_INSTR
10181 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10183 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10184 regdeps
[i
].insn_srlz
= STATE_STOP
;
10185 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10186 regdeps
[i
].data_srlz
= STATE_STOP
;
10193 /* Add the given resource usage spec to the list of active dependencies. */
10196 mark_resource (struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
,
10197 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
,
10202 if (regdepslen
== regdepstotlen
)
10204 regdepstotlen
+= 20;
10205 regdeps
= (struct rsrc
*)
10206 xrealloc ((void *) regdeps
,
10207 regdepstotlen
* sizeof (struct rsrc
));
10210 regdeps
[regdepslen
] = *spec
;
10211 regdeps
[regdepslen
].depind
= depind
;
10212 regdeps
[regdepslen
].path
= path
;
10213 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10214 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10216 print_dependency ("Adding", regdepslen
);
10222 print_dependency (const char *action
, int depind
)
10226 fprintf (stderr
, " %s %s '%s'",
10227 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10228 (regdeps
[depind
].dependency
)->name
);
10229 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10230 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10231 if (regdeps
[depind
].mem_offset
.hint
)
10233 fputs (" ", stderr
);
10234 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10235 fputs ("+", stderr
);
10236 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10238 fprintf (stderr
, "\n");
10243 instruction_serialization (void)
10247 fprintf (stderr
, " Instruction serialization\n");
10248 for (i
= 0; i
< regdepslen
; i
++)
10249 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10250 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10254 data_serialization (void)
10258 fprintf (stderr
, " Data serialization\n");
10259 while (i
< regdepslen
)
10261 if (regdeps
[i
].data_srlz
== STATE_STOP
10262 /* Note: as of 991210, all "other" dependencies are cleared by a
10263 data serialization. This might change with new tables */
10264 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10266 print_dependency ("Removing", i
);
10267 regdeps
[i
] = regdeps
[--regdepslen
];
10274 /* Insert stops and serializations as needed to avoid DVs. */
10277 remove_marked_resource (struct rsrc
*rs
)
10279 switch (rs
->dependency
->semantics
)
10281 case IA64_DVS_SPECIFIC
:
10283 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10284 /* ...fall through... */
10285 case IA64_DVS_INSTR
:
10287 fprintf (stderr
, "Inserting instr serialization\n");
10288 if (rs
->insn_srlz
< STATE_STOP
)
10289 insn_group_break (1, 0, 0);
10290 if (rs
->insn_srlz
< STATE_SRLZ
)
10292 struct slot oldslot
= CURR_SLOT
;
10293 /* Manually jam a srlz.i insn into the stream */
10294 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10295 CURR_SLOT
.user_template
= -1;
10296 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10297 instruction_serialization ();
10298 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10299 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10300 emit_one_bundle ();
10301 CURR_SLOT
= oldslot
;
10303 insn_group_break (1, 0, 0);
10305 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10306 "other" types of DV are eliminated
10307 by a data serialization */
10308 case IA64_DVS_DATA
:
10310 fprintf (stderr
, "Inserting data serialization\n");
10311 if (rs
->data_srlz
< STATE_STOP
)
10312 insn_group_break (1, 0, 0);
10314 struct slot oldslot
= CURR_SLOT
;
10315 /* Manually jam a srlz.d insn into the stream */
10316 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10317 CURR_SLOT
.user_template
= -1;
10318 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10319 data_serialization ();
10320 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10321 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10322 emit_one_bundle ();
10323 CURR_SLOT
= oldslot
;
10326 case IA64_DVS_IMPLIED
:
10327 case IA64_DVS_IMPLIEDF
:
10329 fprintf (stderr
, "Inserting stop\n");
10330 insn_group_break (1, 0, 0);
10337 /* Check the resources used by the given opcode against the current dependency
10340 The check is run once for each execution path encountered. In this case,
10341 a unique execution path is the sequence of instructions following a code
10342 entry point, e.g. the following has three execution paths, one starting
10343 at L0, one at L1, and one at L2.
10352 check_dependencies (struct ia64_opcode
*idesc
)
10354 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10358 /* Note that the number of marked resources may change within the
10359 loop if in auto mode. */
10361 while (i
< regdepslen
)
10363 struct rsrc
*rs
= ®deps
[i
];
10364 const struct ia64_dependency
*dep
= rs
->dependency
;
10367 int start_over
= 0;
10369 if (dep
->semantics
== IA64_DVS_NONE
10370 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10376 note
= NOTE (opdeps
->chks
[chkind
]);
10378 /* Check this resource against each execution path seen thus far. */
10379 for (path
= 0; path
<= md
.path
; path
++)
10383 /* If the dependency wasn't on the path being checked, ignore it. */
10384 if (rs
->path
< path
)
10387 /* If the QP for this insn implies a QP which has branched, don't
10388 bother checking. Ed. NOTE: I don't think this check is terribly
10389 useful; what's the point of generating code which will only be
10390 reached if its QP is zero?
10391 This code was specifically inserted to handle the following code,
10392 based on notes from Intel's DV checking code, where p1 implies p2.
10398 if (CURR_SLOT
.qp_regno
!= 0)
10402 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10404 if (qp_implies
[implies
].path
>= path
10405 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10406 && qp_implies
[implies
].p2_branched
)
10416 if ((matchtype
= resources_match (rs
, idesc
, note
,
10417 CURR_SLOT
.qp_regno
, path
)) != 0)
10420 char pathmsg
[256] = "";
10421 char indexmsg
[256] = "";
10422 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10425 snprintf (pathmsg
, sizeof (pathmsg
),
10426 " when entry is at label '%s'",
10427 md
.entry_labels
[path
- 1]);
10428 if (matchtype
== 1 && rs
->index
>= 0)
10429 snprintf (indexmsg
, sizeof (indexmsg
),
10430 ", specific resource number is %d",
10432 snprintf (msg
, sizeof (msg
),
10433 "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10435 (certain
? "violates" : "may violate"),
10436 dv_mode
[dep
->mode
], dep
->name
,
10437 dv_sem
[dep
->semantics
],
10438 pathmsg
, indexmsg
);
10440 if (md
.explicit_mode
)
10442 as_warn ("%s", msg
);
10443 if (path
< md
.path
)
10444 as_warn (_("Only the first path encountering the conflict is reported"));
10445 as_warn_where (rs
->file
, rs
->line
,
10446 _("This is the location of the conflicting usage"));
10447 /* Don't bother checking other paths, to avoid duplicating
10448 the same warning */
10454 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10456 remove_marked_resource (rs
);
10458 /* since the set of dependencies has changed, start over */
10459 /* FIXME -- since we're removing dvs as we go, we
10460 probably don't really need to start over... */
10473 /* Register new dependencies based on the given opcode. */
10476 mark_resources (struct ia64_opcode
*idesc
)
10479 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10480 int add_only_qp_reads
= 0;
10482 /* A conditional branch only uses its resources if it is taken; if it is
10483 taken, we stop following that path. The other branch types effectively
10484 *always* write their resources. If it's not taken, register only QP
10486 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10488 add_only_qp_reads
= 1;
10492 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10494 for (i
= 0; i
< opdeps
->nregs
; i
++)
10496 const struct ia64_dependency
*dep
;
10497 struct rsrc specs
[MAX_SPECS
];
10502 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10503 note
= NOTE (opdeps
->regs
[i
]);
10505 if (add_only_qp_reads
10506 && !(dep
->mode
== IA64_DV_WAR
10507 && (dep
->specifier
== IA64_RS_PR
10508 || dep
->specifier
== IA64_RS_PRr
10509 || dep
->specifier
== IA64_RS_PR63
)))
10512 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10514 while (count
-- > 0)
10516 mark_resource (idesc
, dep
, &specs
[count
],
10517 DEP (opdeps
->regs
[i
]), md
.path
);
10520 /* The execution path may affect register values, which may in turn
10521 affect which indirect-access resources are accessed. */
10522 switch (dep
->specifier
)
10526 case IA64_RS_CPUID
:
10534 for (path
= 0; path
< md
.path
; path
++)
10536 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10537 while (count
-- > 0)
10538 mark_resource (idesc
, dep
, &specs
[count
],
10539 DEP (opdeps
->regs
[i
]), path
);
10546 /* Remove dependencies when they no longer apply. */
10549 update_dependencies (struct ia64_opcode
*idesc
)
10553 if (strcmp (idesc
->name
, "srlz.i") == 0)
10555 instruction_serialization ();
10557 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10559 data_serialization ();
10561 else if (is_interruption_or_rfi (idesc
)
10562 || is_taken_branch (idesc
))
10564 /* Although technically the taken branch doesn't clear dependencies
10565 which require a srlz.[id], we don't follow the branch; the next
10566 instruction is assumed to start with a clean slate. */
10570 else if (is_conditional_branch (idesc
)
10571 && CURR_SLOT
.qp_regno
!= 0)
10573 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10575 for (i
= 0; i
< qp_implieslen
; i
++)
10577 /* If the conditional branch's predicate is implied by the predicate
10578 in an existing dependency, remove that dependency. */
10579 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10582 /* Note that this implied predicate takes a branch so that if
10583 a later insn generates a DV but its predicate implies this
10584 one, we can avoid the false DV warning. */
10585 qp_implies
[i
].p2_branched
= 1;
10586 while (depind
< regdepslen
)
10588 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10590 print_dependency ("Removing", depind
);
10591 regdeps
[depind
] = regdeps
[--regdepslen
];
10598 /* Any marked resources which have this same predicate should be
10599 cleared, provided that the QP hasn't been modified between the
10600 marking instruction and the branch. */
10603 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10608 while (i
< regdepslen
)
10610 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10611 && regdeps
[i
].link_to_qp_branch
10612 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10613 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10615 /* Treat like a taken branch */
10616 print_dependency ("Removing", i
);
10617 regdeps
[i
] = regdeps
[--regdepslen
];
10626 /* Examine the current instruction for dependency violations. */
10629 check_dv (struct ia64_opcode
*idesc
)
10633 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10634 idesc
->name
, CURR_SLOT
.src_line
,
10635 idesc
->dependencies
->nchks
,
10636 idesc
->dependencies
->nregs
);
10639 /* Look through the list of currently marked resources; if the current
10640 instruction has the dependency in its chks list which uses that resource,
10641 check against the specific resources used. */
10642 check_dependencies (idesc
);
10644 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10645 then add them to the list of marked resources. */
10646 mark_resources (idesc
);
10648 /* There are several types of dependency semantics, and each has its own
10649 requirements for being cleared
10651 Instruction serialization (insns separated by interruption, rfi, or
10652 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10654 Data serialization (instruction serialization, or writer + srlz.d +
10655 reader, where writer and srlz.d are in separate groups) clears
10656 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10657 always be the case).
10659 Instruction group break (groups separated by stop, taken branch,
10660 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10662 update_dependencies (idesc
);
10664 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10665 warning. Keep track of as many as possible that are useful. */
10666 note_register_values (idesc
);
10668 /* We don't need or want this anymore. */
10669 md
.mem_offset
.hint
= 0;
10674 /* Translate one line of assembly. Pseudo ops and labels do not show
10677 md_assemble (char *str
)
10679 char *saved_input_line_pointer
, *mnemonic
;
10680 const struct pseudo_opcode
*pdesc
;
10681 struct ia64_opcode
*idesc
;
10682 unsigned char qp_regno
;
10683 unsigned int flags
;
10686 saved_input_line_pointer
= input_line_pointer
;
10687 input_line_pointer
= str
;
10689 /* extract the opcode (mnemonic): */
10691 ch
= get_symbol_name (&mnemonic
);
10692 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10695 (void) restore_line_pointer (ch
);
10696 (*pdesc
->handler
) (pdesc
->arg
);
10700 /* Find the instruction descriptor matching the arguments. */
10702 idesc
= ia64_find_opcode (mnemonic
);
10703 (void) restore_line_pointer (ch
);
10706 as_bad (_("Unknown opcode `%s'"), mnemonic
);
10710 idesc
= parse_operands (idesc
);
10714 /* Handle the dynamic ops we can handle now: */
10715 if (idesc
->type
== IA64_TYPE_DYN
)
10717 if (strcmp (idesc
->name
, "add") == 0)
10719 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10720 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10724 ia64_free_opcode (idesc
);
10725 idesc
= ia64_find_opcode (mnemonic
);
10727 else if (strcmp (idesc
->name
, "mov") == 0)
10729 enum ia64_opnd opnd1
, opnd2
;
10732 opnd1
= idesc
->operands
[0];
10733 opnd2
= idesc
->operands
[1];
10734 if (opnd1
== IA64_OPND_AR3
)
10736 else if (opnd2
== IA64_OPND_AR3
)
10740 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10742 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10743 mnemonic
= "mov.i";
10744 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10745 mnemonic
= "mov.m";
10753 ia64_free_opcode (idesc
);
10754 idesc
= ia64_find_opcode (mnemonic
);
10755 while (idesc
!= NULL
10756 && (idesc
->operands
[0] != opnd1
10757 || idesc
->operands
[1] != opnd2
))
10758 idesc
= get_next_opcode (idesc
);
10762 else if (strcmp (idesc
->name
, "mov.i") == 0
10763 || strcmp (idesc
->name
, "mov.m") == 0)
10765 enum ia64_opnd opnd1
, opnd2
;
10768 opnd1
= idesc
->operands
[0];
10769 opnd2
= idesc
->operands
[1];
10770 if (opnd1
== IA64_OPND_AR3
)
10772 else if (opnd2
== IA64_OPND_AR3
)
10776 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10779 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10781 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10783 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10784 as_bad (_("AR %d can only be accessed by %c-unit"),
10785 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10789 else if (strcmp (idesc
->name
, "hint.b") == 0)
10795 case hint_b_warning
:
10796 as_warn (_("hint.b may be treated as nop"));
10799 as_bad (_("hint.b shouldn't be used"));
10805 if (md
.qp
.X_op
== O_register
)
10807 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10808 md
.qp
.X_op
= O_absent
;
10811 flags
= idesc
->flags
;
10813 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10815 /* The alignment frag has to end with a stop bit only if the
10816 next instruction after the alignment directive has to be
10817 the first instruction in an instruction group. */
10820 while (align_frag
->fr_type
!= rs_align_code
)
10822 align_frag
= align_frag
->fr_next
;
10826 /* align_frag can be NULL if there are directives in
10828 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10829 align_frag
->tc_frag_data
= 1;
10832 insn_group_break (1, 0, 0);
10836 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10838 as_bad (_("`%s' cannot be predicated"), idesc
->name
);
10842 /* Build the instruction. */
10843 CURR_SLOT
.qp_regno
= qp_regno
;
10844 CURR_SLOT
.idesc
= idesc
;
10845 CURR_SLOT
.src_file
= as_where (&CURR_SLOT
.src_line
);
10846 dwarf2_where (&CURR_SLOT
.debug_line
);
10847 dwarf2_consume_line_info ();
10849 /* Add unwind entries, if there are any. */
10850 if (unwind
.current_entry
)
10852 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10853 unwind
.current_entry
= NULL
;
10855 if (unwind
.pending_saves
)
10857 if (unwind
.pending_saves
->next
)
10859 /* Attach the next pending save to the next slot so that its
10860 slot number will get set correctly. */
10861 add_unwind_entry (unwind
.pending_saves
->next
, NOT_A_CHAR
);
10862 unwind
.pending_saves
= &unwind
.pending_saves
->next
->r
.record
.p
;
10865 unwind
.pending_saves
= NULL
;
10867 if (unwind
.proc_pending
.sym
&& S_IS_DEFINED (unwind
.proc_pending
.sym
))
10870 /* Check for dependency violations. */
10874 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10875 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10876 emit_one_bundle ();
10878 if ((flags
& IA64_OPCODE_LAST
) != 0)
10879 insn_group_break (1, 0, 0);
10881 md
.last_text_seg
= now_seg
;
10884 input_line_pointer
= saved_input_line_pointer
;
10887 /* Called when symbol NAME cannot be found in the symbol table.
10888 Should be used for dynamic valued symbols only. */
10891 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
10896 /* Called for any expression that can not be recognized. When the
10897 function is called, `input_line_pointer' will point to the start of
10901 md_operand (expressionS
*e
)
10903 switch (*input_line_pointer
)
10906 ++input_line_pointer
;
10907 expression_and_evaluate (e
);
10908 if (*input_line_pointer
!= ']')
10910 as_bad (_("Closing bracket missing"));
10915 if (e
->X_op
!= O_register
10916 || e
->X_add_number
< REG_GR
10917 || e
->X_add_number
> REG_GR
+ 127)
10919 as_bad (_("Index must be a general register"));
10920 e
->X_add_number
= REG_GR
;
10923 ++input_line_pointer
;
10934 ignore_rest_of_line ();
10937 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10938 a section symbol plus some offset. For relocs involving @fptr(),
10939 directives we don't want such adjustments since we need to have the
10940 original symbol's name in the reloc. */
10942 ia64_fix_adjustable (fixS
*fix
)
10944 /* Prevent all adjustments to global symbols */
10945 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10948 switch (fix
->fx_r_type
)
10950 case BFD_RELOC_IA64_FPTR64I
:
10951 case BFD_RELOC_IA64_FPTR32MSB
:
10952 case BFD_RELOC_IA64_FPTR32LSB
:
10953 case BFD_RELOC_IA64_FPTR64MSB
:
10954 case BFD_RELOC_IA64_FPTR64LSB
:
10955 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10956 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10966 ia64_force_relocation (fixS
*fix
)
10968 switch (fix
->fx_r_type
)
10970 case BFD_RELOC_IA64_FPTR64I
:
10971 case BFD_RELOC_IA64_FPTR32MSB
:
10972 case BFD_RELOC_IA64_FPTR32LSB
:
10973 case BFD_RELOC_IA64_FPTR64MSB
:
10974 case BFD_RELOC_IA64_FPTR64LSB
:
10976 case BFD_RELOC_IA64_LTOFF22
:
10977 case BFD_RELOC_IA64_LTOFF64I
:
10978 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10979 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10980 case BFD_RELOC_IA64_PLTOFF22
:
10981 case BFD_RELOC_IA64_PLTOFF64I
:
10982 case BFD_RELOC_IA64_PLTOFF64MSB
:
10983 case BFD_RELOC_IA64_PLTOFF64LSB
:
10985 case BFD_RELOC_IA64_LTOFF22X
:
10986 case BFD_RELOC_IA64_LDXMOV
:
10993 return generic_force_reloc (fix
);
10996 /* Decide from what point a pc-relative relocation is relative to,
10997 relative to the pc-relative fixup. Er, relatively speaking. */
10999 ia64_pcrel_from_section (fixS
*fix
, segT sec
)
11001 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
11003 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
11010 /* Used to emit section-relative relocs for the dwarf2 debug data. */
11012 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
11016 exp
.X_op
= O_pseudo_fixup
;
11017 exp
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
11018 exp
.X_add_number
= 0;
11019 exp
.X_add_symbol
= symbol
;
11020 emit_expr (&exp
, size
);
11023 /* This is called whenever some data item (not an instruction) needs a
11024 fixup. We pick the right reloc code depending on the byteorder
11025 currently in effect. */
11027 ia64_cons_fix_new (fragS
*f
, int where
, int nbytes
, expressionS
*exp
,
11028 bfd_reloc_code_real_type code
)
11034 /* There are no reloc for 8 and 16 bit quantities, but we allow
11035 them here since they will work fine as long as the expression
11036 is fully defined at the end of the pass over the source file. */
11037 case 1: code
= BFD_RELOC_8
; break;
11038 case 2: code
= BFD_RELOC_16
; break;
11040 if (target_big_endian
)
11041 code
= BFD_RELOC_IA64_DIR32MSB
;
11043 code
= BFD_RELOC_IA64_DIR32LSB
;
11047 /* In 32-bit mode, data8 could mean function descriptors too. */
11048 if (exp
->X_op
== O_pseudo_fixup
11049 && exp
->X_op_symbol
11050 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
11051 && !(md
.flags
& EF_IA_64_ABI64
))
11053 if (target_big_endian
)
11054 code
= BFD_RELOC_IA64_IPLTMSB
;
11056 code
= BFD_RELOC_IA64_IPLTLSB
;
11057 exp
->X_op
= O_symbol
;
11062 if (target_big_endian
)
11063 code
= BFD_RELOC_IA64_DIR64MSB
;
11065 code
= BFD_RELOC_IA64_DIR64LSB
;
11070 if (exp
->X_op
== O_pseudo_fixup
11071 && exp
->X_op_symbol
11072 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
11074 if (target_big_endian
)
11075 code
= BFD_RELOC_IA64_IPLTMSB
;
11077 code
= BFD_RELOC_IA64_IPLTLSB
;
11078 exp
->X_op
= O_symbol
;
11084 as_bad (_("Unsupported fixup size %d"), nbytes
);
11085 ignore_rest_of_line ();
11089 if (exp
->X_op
== O_pseudo_fixup
)
11091 exp
->X_op
= O_symbol
;
11092 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11093 /* ??? If code unchanged, unsupported. */
11096 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11097 /* We need to store the byte order in effect in case we're going
11098 to fix an 8 or 16 bit relocation (for which there no real
11099 relocs available). See md_apply_fix(). */
11100 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11103 /* Return the actual relocation we wish to associate with the pseudo
11104 reloc described by SYM and R_TYPE. SYM should be one of the
11105 symbols in the pseudo_func array, or NULL. */
11107 static bfd_reloc_code_real_type
11108 ia64_gen_real_reloc_type (struct symbol
*sym
, bfd_reloc_code_real_type r_type
)
11110 bfd_reloc_code_real_type newr
= 0;
11111 const char *type
= NULL
, *suffix
= "";
11118 switch (S_GET_VALUE (sym
))
11120 case FUNC_FPTR_RELATIVE
:
11123 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_FPTR64I
; break;
11124 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_FPTR32MSB
; break;
11125 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_FPTR32LSB
; break;
11126 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_FPTR64MSB
; break;
11127 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_FPTR64LSB
; break;
11128 default: type
= "FPTR"; break;
11132 case FUNC_GP_RELATIVE
:
11135 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_GPREL22
; break;
11136 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_GPREL64I
; break;
11137 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_GPREL32MSB
; break;
11138 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_GPREL32LSB
; break;
11139 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_GPREL64MSB
; break;
11140 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_GPREL64LSB
; break;
11141 default: type
= "GPREL"; break;
11145 case FUNC_LT_RELATIVE
:
11148 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22
; break;
11149 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_LTOFF64I
; break;
11150 default: type
= "LTOFF"; break;
11154 case FUNC_LT_RELATIVE_X
:
11157 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22X
; break;
11158 default: type
= "LTOFF"; suffix
= "X"; break;
11162 case FUNC_PC_RELATIVE
:
11165 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PCREL22
; break;
11166 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PCREL64I
; break;
11167 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_PCREL32MSB
; break;
11168 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_PCREL32LSB
; break;
11169 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PCREL64MSB
; break;
11170 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PCREL64LSB
; break;
11171 default: type
= "PCREL"; break;
11175 case FUNC_PLT_RELATIVE
:
11178 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PLTOFF22
; break;
11179 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PLTOFF64I
; break;
11180 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PLTOFF64MSB
;break;
11181 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PLTOFF64LSB
;break;
11182 default: type
= "PLTOFF"; break;
11186 case FUNC_SEC_RELATIVE
:
11189 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SECREL32MSB
;break;
11190 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SECREL32LSB
;break;
11191 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SECREL64MSB
;break;
11192 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SECREL64LSB
;break;
11193 default: type
= "SECREL"; break;
11197 case FUNC_SEG_RELATIVE
:
11200 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SEGREL32MSB
;break;
11201 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SEGREL32LSB
;break;
11202 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SEGREL64MSB
;break;
11203 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SEGREL64LSB
;break;
11204 default: type
= "SEGREL"; break;
11208 case FUNC_LTV_RELATIVE
:
11211 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_LTV32MSB
; break;
11212 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_LTV32LSB
; break;
11213 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_LTV64MSB
; break;
11214 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_LTV64LSB
; break;
11215 default: type
= "LTV"; break;
11219 case FUNC_LT_FPTR_RELATIVE
:
11222 case BFD_RELOC_IA64_IMM22
:
11223 newr
= BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11224 case BFD_RELOC_IA64_IMM64
:
11225 newr
= BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11226 case BFD_RELOC_IA64_DIR32MSB
:
11227 newr
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11228 case BFD_RELOC_IA64_DIR32LSB
:
11229 newr
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11230 case BFD_RELOC_IA64_DIR64MSB
:
11231 newr
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11232 case BFD_RELOC_IA64_DIR64LSB
:
11233 newr
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11235 type
= "LTOFF_FPTR"; break;
11239 case FUNC_TP_RELATIVE
:
11242 case BFD_RELOC_IA64_IMM14
: newr
= BFD_RELOC_IA64_TPREL14
; break;
11243 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_TPREL22
; break;
11244 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_TPREL64I
; break;
11245 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_TPREL64MSB
; break;
11246 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_TPREL64LSB
; break;
11247 default: type
= "TPREL"; break;
11251 case FUNC_LT_TP_RELATIVE
:
11254 case BFD_RELOC_IA64_IMM22
:
11255 newr
= BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11257 type
= "LTOFF_TPREL"; break;
11261 case FUNC_DTP_MODULE
:
11264 case BFD_RELOC_IA64_DIR64MSB
:
11265 newr
= BFD_RELOC_IA64_DTPMOD64MSB
; break;
11266 case BFD_RELOC_IA64_DIR64LSB
:
11267 newr
= BFD_RELOC_IA64_DTPMOD64LSB
; break;
11269 type
= "DTPMOD"; break;
11273 case FUNC_LT_DTP_MODULE
:
11276 case BFD_RELOC_IA64_IMM22
:
11277 newr
= BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11279 type
= "LTOFF_DTPMOD"; break;
11283 case FUNC_DTP_RELATIVE
:
11286 case BFD_RELOC_IA64_DIR32MSB
:
11287 newr
= BFD_RELOC_IA64_DTPREL32MSB
; break;
11288 case BFD_RELOC_IA64_DIR32LSB
:
11289 newr
= BFD_RELOC_IA64_DTPREL32LSB
; break;
11290 case BFD_RELOC_IA64_DIR64MSB
:
11291 newr
= BFD_RELOC_IA64_DTPREL64MSB
; break;
11292 case BFD_RELOC_IA64_DIR64LSB
:
11293 newr
= BFD_RELOC_IA64_DTPREL64LSB
; break;
11294 case BFD_RELOC_IA64_IMM14
:
11295 newr
= BFD_RELOC_IA64_DTPREL14
; break;
11296 case BFD_RELOC_IA64_IMM22
:
11297 newr
= BFD_RELOC_IA64_DTPREL22
; break;
11298 case BFD_RELOC_IA64_IMM64
:
11299 newr
= BFD_RELOC_IA64_DTPREL64I
; break;
11301 type
= "DTPREL"; break;
11305 case FUNC_LT_DTP_RELATIVE
:
11308 case BFD_RELOC_IA64_IMM22
:
11309 newr
= BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11311 type
= "LTOFF_DTPREL"; break;
11315 case FUNC_IPLT_RELOC
:
11318 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11319 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11320 default: type
= "IPLT"; break;
11325 case FUNC_SLOTCOUNT_RELOC
:
11326 return DUMMY_RELOC_IA64_SLOTCOUNT
;
11343 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11344 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11345 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11346 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11347 case BFD_RELOC_UNUSED
: width
= 13; break;
11348 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11349 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11350 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11354 /* This should be an error, but since previously there wasn't any
11355 diagnostic here, don't make it fail because of this for now. */
11356 as_warn (_("Cannot express %s%d%s relocation"), type
, width
, suffix
);
11361 /* Here is where generate the appropriate reloc for pseudo relocation
11364 ia64_validate_fix (fixS
*fix
)
11366 switch (fix
->fx_r_type
)
11368 case BFD_RELOC_IA64_FPTR64I
:
11369 case BFD_RELOC_IA64_FPTR32MSB
:
11370 case BFD_RELOC_IA64_FPTR64LSB
:
11371 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11372 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11373 if (fix
->fx_offset
!= 0)
11374 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11375 _("No addend allowed in @fptr() relocation"));
11383 fix_insn (fixS
*fix
, const struct ia64_operand
*odesc
, valueT value
)
11385 bfd_vma insn
[3], t0
, t1
, control_bits
;
11390 slot
= fix
->fx_where
& 0x3;
11391 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11393 /* Bundles are always in little-endian byte order */
11394 t0
= bfd_getl64 (fixpos
);
11395 t1
= bfd_getl64 (fixpos
+ 8);
11396 control_bits
= t0
& 0x1f;
11397 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11398 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11399 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11402 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11404 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11405 insn
[2] |= (((value
& 0x7f) << 13)
11406 | (((value
>> 7) & 0x1ff) << 27)
11407 | (((value
>> 16) & 0x1f) << 22)
11408 | (((value
>> 21) & 0x1) << 21)
11409 | (((value
>> 63) & 0x1) << 36));
11411 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11413 if (value
& ~0x3fffffffffffffffULL
)
11414 err
= _("integer operand out of range");
11415 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11416 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11418 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11421 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11422 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11423 | (((value
>> 0) & 0xfffff) << 13));
11426 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11429 as_bad_where (fix
->fx_file
, fix
->fx_line
, "%s", err
);
11431 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11432 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11433 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11434 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11437 /* Attempt to simplify or even eliminate a fixup. The return value is
11438 ignored; perhaps it was once meaningful, but now it is historical.
11439 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11441 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11445 md_apply_fix (fixS
*fix
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
11448 valueT value
= *valP
;
11450 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11454 switch (fix
->fx_r_type
)
11456 case BFD_RELOC_IA64_PCREL21B
: break;
11457 case BFD_RELOC_IA64_PCREL21BI
: break;
11458 case BFD_RELOC_IA64_PCREL21F
: break;
11459 case BFD_RELOC_IA64_PCREL21M
: break;
11460 case BFD_RELOC_IA64_PCREL60B
: break;
11461 case BFD_RELOC_IA64_PCREL22
: break;
11462 case BFD_RELOC_IA64_PCREL64I
: break;
11463 case BFD_RELOC_IA64_PCREL32MSB
: break;
11464 case BFD_RELOC_IA64_PCREL32LSB
: break;
11465 case BFD_RELOC_IA64_PCREL64MSB
: break;
11466 case BFD_RELOC_IA64_PCREL64LSB
: break;
11468 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11475 switch ((unsigned) fix
->fx_r_type
)
11477 case BFD_RELOC_UNUSED
:
11478 /* This must be a TAG13 or TAG13b operand. There are no external
11479 relocs defined for them, so we must give an error. */
11480 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11481 _("%s must have a constant value"),
11482 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11486 case BFD_RELOC_IA64_TPREL14
:
11487 case BFD_RELOC_IA64_TPREL22
:
11488 case BFD_RELOC_IA64_TPREL64I
:
11489 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11490 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11491 case BFD_RELOC_IA64_DTPREL14
:
11492 case BFD_RELOC_IA64_DTPREL22
:
11493 case BFD_RELOC_IA64_DTPREL64I
:
11494 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11495 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11499 case DUMMY_RELOC_IA64_SLOTCOUNT
:
11500 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11501 _("cannot resolve @slotcount parameter"));
11510 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11513 if (fix
->fx_r_type
== DUMMY_RELOC_IA64_SLOTCOUNT
)
11515 /* For @slotcount, convert an addresses difference to a slots
11519 v
= (value
>> 4) * 3;
11520 switch (value
& 0x0f)
11534 as_bad (_("invalid @slotcount value"));
11540 if (fix
->tc_fix_data
.bigendian
)
11541 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11543 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11548 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11553 /* Generate the BFD reloc to be stuck in the object file from the
11554 fixup used internally in the assembler. */
11557 tc_gen_reloc (asection
*sec ATTRIBUTE_UNUSED
, fixS
*fixp
)
11561 reloc
= xmalloc (sizeof (*reloc
));
11562 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11563 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11564 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11565 reloc
->addend
= fixp
->fx_offset
;
11566 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11570 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11571 _("Cannot represent %s relocation in object file"),
11572 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11579 /* Turn a string in input_line_pointer into a floating point constant
11580 of type TYPE, and store the appropriate bytes in *LIT. The number
11581 of LITTLENUMS emitted is stored in *SIZE. An error message is
11582 returned, or NULL on OK. */
11584 #define MAX_LITTLENUMS 5
11587 md_atof (int type
, char *lit
, int *size
)
11589 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11619 return _("Unrecognized or unsupported floating point constant");
11621 t
= atof_ieee (input_line_pointer
, type
, words
);
11623 input_line_pointer
= t
;
11625 (*ia64_float_to_chars
) (lit
, words
, prec
);
11629 /* It is 10 byte floating point with 6 byte padding. */
11630 memset (&lit
[10], 0, 6);
11631 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11634 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11639 /* Handle ia64 specific semantics of the align directive. */
11642 ia64_md_do_align (int n ATTRIBUTE_UNUSED
,
11643 const char *fill ATTRIBUTE_UNUSED
,
11644 int len ATTRIBUTE_UNUSED
,
11645 int max ATTRIBUTE_UNUSED
)
11647 if (subseg_text_p (now_seg
))
11648 ia64_flush_insns ();
11651 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11652 of an rs_align_code fragment. */
11655 ia64_handle_align (fragS
*fragp
)
11659 const unsigned char *nop_type
;
11661 if (fragp
->fr_type
!= rs_align_code
)
11664 /* Check if this frag has to end with a stop bit. */
11665 nop_type
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11667 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11668 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11670 /* If no paddings are needed, we check if we need a stop bit. */
11671 if (!bytes
&& fragp
->tc_frag_data
)
11673 if (fragp
->fr_fix
< 16)
11675 /* FIXME: It won't work with
11677 alloc r32=ar.pfs,1,2,4,0
11681 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11682 _("Can't add stop bit to mark end of instruction group"));
11685 /* Bundles are always in little-endian byte order. Make sure
11686 the previous bundle has the stop bit. */
11690 /* Make sure we are on a 16-byte boundary, in case someone has been
11691 putting data into a text section. */
11694 int fix
= bytes
& 15;
11695 memset (p
, 0, fix
);
11698 fragp
->fr_fix
+= fix
;
11701 /* Instruction bundles are always little-endian. */
11702 memcpy (p
, nop_type
, 16);
11703 fragp
->fr_var
= 16;
11707 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11712 number_to_chars_bigendian (lit
, (long) (*words
++),
11713 sizeof (LITTLENUM_TYPE
));
11714 lit
+= sizeof (LITTLENUM_TYPE
);
11719 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11724 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11725 sizeof (LITTLENUM_TYPE
));
11726 lit
+= sizeof (LITTLENUM_TYPE
);
11731 ia64_elf_section_change_hook (void)
11733 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11734 && elf_linked_to_section (now_seg
) == NULL
)
11735 elf_linked_to_section (now_seg
) = text_section
;
11736 dot_byteorder (-1);
11739 /* Check if a label should be made global. */
11741 ia64_check_label (symbolS
*label
)
11743 if (*input_line_pointer
== ':')
11745 S_SET_EXTERNAL (label
);
11746 input_line_pointer
++;
11750 /* Used to remember where .alias and .secalias directives are seen. We
11751 will rename symbol and section names when we are about to output
11752 the relocatable file. */
11755 const char *file
; /* The file where the directive is seen. */
11756 unsigned int line
; /* The line number the directive is at. */
11757 const char *name
; /* The original name of the symbol. */
11760 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11761 .secalias. Otherwise, it is .alias. */
11763 dot_alias (int section
)
11765 char *name
, *alias
;
11769 const char *error_string
;
11772 struct hash_control
*ahash
, *nhash
;
11775 delim
= get_symbol_name (&name
);
11776 end_name
= input_line_pointer
;
11779 if (name
== end_name
)
11781 as_bad (_("expected symbol name"));
11782 ignore_rest_of_line ();
11786 SKIP_WHITESPACE_AFTER_NAME ();
11788 if (*input_line_pointer
!= ',')
11791 as_bad (_("expected comma after \"%s\""), name
);
11793 ignore_rest_of_line ();
11797 input_line_pointer
++;
11799 ia64_canonicalize_symbol_name (name
);
11801 /* We call demand_copy_C_string to check if alias string is valid.
11802 There should be a closing `"' and no `\0' in the string. */
11803 alias
= demand_copy_C_string (&len
);
11806 ignore_rest_of_line ();
11810 /* Make a copy of name string. */
11811 len
= strlen (name
) + 1;
11812 obstack_grow (¬es
, name
, len
);
11813 name
= obstack_finish (¬es
);
11818 ahash
= secalias_hash
;
11819 nhash
= secalias_name_hash
;
11824 ahash
= alias_hash
;
11825 nhash
= alias_name_hash
;
11828 /* Check if alias has been used before. */
11829 h
= (struct alias
*) hash_find (ahash
, alias
);
11832 if (strcmp (h
->name
, name
))
11833 as_bad (_("`%s' is already the alias of %s `%s'"),
11834 alias
, kind
, h
->name
);
11838 /* Check if name already has an alias. */
11839 a
= (const char *) hash_find (nhash
, name
);
11842 if (strcmp (a
, alias
))
11843 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11847 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11848 h
->file
= as_where (&h
->line
);
11851 error_string
= hash_jam (ahash
, alias
, (void *) h
);
11854 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11855 alias
, kind
, error_string
);
11859 error_string
= hash_jam (nhash
, name
, (void *) alias
);
11862 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11863 alias
, kind
, error_string
);
11865 obstack_free (¬es
, name
);
11866 obstack_free (¬es
, alias
);
11869 demand_empty_rest_of_line ();
11872 /* It renames the original symbol name to its alias. */
11874 do_alias (const char *alias
, void *value
)
11876 struct alias
*h
= (struct alias
*) value
;
11877 symbolS
*sym
= symbol_find (h
->name
);
11882 /* Uses .alias extensively to alias CRTL functions to same with
11883 decc$ prefix. Sometimes function gets optimized away and a
11884 warning results, which should be suppressed. */
11885 if (strncmp (alias
, "decc$", 5) != 0)
11887 as_warn_where (h
->file
, h
->line
,
11888 _("symbol `%s' aliased to `%s' is not used"),
11892 S_SET_NAME (sym
, (char *) alias
);
11895 /* Called from write_object_file. */
11897 ia64_adjust_symtab (void)
11899 hash_traverse (alias_hash
, do_alias
);
11902 /* It renames the original section name to its alias. */
11904 do_secalias (const char *alias
, void *value
)
11906 struct alias
*h
= (struct alias
*) value
;
11907 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11910 as_warn_where (h
->file
, h
->line
,
11911 _("section `%s' aliased to `%s' is not used"),
11917 /* Called from write_object_file. */
11919 ia64_frob_file (void)
11921 hash_traverse (secalias_hash
, do_secalias
);
11925 #define NT_VMS_MHD 1
11926 #define NT_VMS_LNM 2
11928 /* Integrity VMS 8.x identifies it's ELF modules with a standard ELF
11931 /* Manufacture a VMS-like time string. */
11933 get_vms_time (char *Now
)
11939 pnt
= ctime (&timeb
);
11945 sprintf (Now
, "%2s-%3s-%s %s", pnt
+ 8, pnt
+ 4, pnt
+ 20, pnt
+ 11);
11949 ia64_vms_note (void)
11952 asection
*seg
= now_seg
;
11953 subsegT subseg
= now_subseg
;
11954 asection
*secp
= NULL
;
11959 /* Create the .note section. */
11961 secp
= subseg_new (".note", 0);
11962 bfd_set_section_flags (stdoutput
,
11964 SEC_HAS_CONTENTS
| SEC_READONLY
);
11966 /* Module header note (MHD). */
11967 bname
= xstrdup (lbasename (out_file_name
));
11968 if ((p
= strrchr (bname
, '.')))
11971 /* VMS note header is 24 bytes long. */
11972 p
= frag_more (8 + 8 + 8);
11973 number_to_chars_littleendian (p
+ 0, 8, 8);
11974 number_to_chars_littleendian (p
+ 8, 40 + strlen (bname
), 8);
11975 number_to_chars_littleendian (p
+ 16, NT_VMS_MHD
, 8);
11978 strcpy (p
, "IPF/VMS");
11980 p
= frag_more (17 + 17 + strlen (bname
) + 1 + 5);
11982 strcpy (p
+ 17, "24-FEB-2005 15:00");
11985 p
+= strlen (bname
) + 1;
11987 strcpy (p
, "V1.0");
11989 frag_align (3, 0, 0);
11991 /* Language processor name note. */
11992 sprintf (buf
, "GNU assembler version %s (%s) using BFD version %s",
11993 VERSION
, TARGET_ALIAS
, BFD_VERSION_STRING
);
11995 p
= frag_more (8 + 8 + 8);
11996 number_to_chars_littleendian (p
+ 0, 8, 8);
11997 number_to_chars_littleendian (p
+ 8, strlen (buf
) + 1, 8);
11998 number_to_chars_littleendian (p
+ 16, NT_VMS_LNM
, 8);
12001 strcpy (p
, "IPF/VMS");
12003 p
= frag_more (strlen (buf
) + 1);
12006 frag_align (3, 0, 0);
12008 secp
= subseg_new (".vms_display_name_info", 0);
12009 bfd_set_section_flags (stdoutput
,
12011 SEC_HAS_CONTENTS
| SEC_READONLY
);
12013 /* This symbol should be passed on the command line and be variable
12014 according to language. */
12015 sym
= symbol_new ("__gnat_vms_display_name@gnat_demangler_rtl",
12016 absolute_section
, 0, &zero_address_frag
);
12017 symbol_table_insert (sym
);
12018 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
| BSF_DYNAMIC
;
12021 /* Format 3 of VMS demangler Spec. */
12022 number_to_chars_littleendian (p
, 3, 4);
12025 /* Place holder for symbol table index of above symbol. */
12026 number_to_chars_littleendian (p
, -1, 4);
12028 frag_align (3, 0, 0);
12030 /* We probably can't restore the current segment, for there likely
12031 isn't one yet... */
12033 subseg_set (seg
, subseg
);
12036 #endif /* TE_VMS */