1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
54 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
55 #define MIN(a,b) ((a) < (b) ? (a) : (b))
58 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
59 #define CURR_SLOT md.slot[md.curr_slot]
61 #define O_pseudo_fixup (O_max + 1)
65 /* IA-64 ABI section pseudo-ops. */
66 SPECIAL_SECTION_BSS
= 0,
68 SPECIAL_SECTION_SDATA
,
69 SPECIAL_SECTION_RODATA
,
70 SPECIAL_SECTION_COMMENT
,
71 SPECIAL_SECTION_UNWIND
,
72 SPECIAL_SECTION_UNWIND_INFO
,
73 /* HPUX specific section pseudo-ops. */
74 SPECIAL_SECTION_INIT_ARRAY
,
75 SPECIAL_SECTION_FINI_ARRAY
,
92 FUNC_LT_FPTR_RELATIVE
,
102 REG_FR
= (REG_GR
+ 128),
103 REG_AR
= (REG_FR
+ 128),
104 REG_CR
= (REG_AR
+ 128),
105 REG_P
= (REG_CR
+ 128),
106 REG_BR
= (REG_P
+ 64),
107 REG_IP
= (REG_BR
+ 8),
114 /* The following are pseudo-registers for use by gas only. */
126 /* The following pseudo-registers are used for unwind directives only: */
134 DYNREG_GR
= 0, /* dynamic general purpose register */
135 DYNREG_FR
, /* dynamic floating point register */
136 DYNREG_PR
, /* dynamic predicate register */
140 enum operand_match_result
143 OPERAND_OUT_OF_RANGE
,
147 /* On the ia64, we can't know the address of a text label until the
148 instructions are packed into a bundle. To handle this, we keep
149 track of the list of labels that appear in front of each
153 struct label_fix
*next
;
157 /* This is the endianness of the current section. */
158 extern int target_big_endian
;
160 /* This is the default endianness. */
161 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
163 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
165 static void ia64_float_to_chars_bigendian
166 PARAMS ((char *, LITTLENUM_TYPE
*, int));
167 static void ia64_float_to_chars_littleendian
168 PARAMS ((char *, LITTLENUM_TYPE
*, int));
169 static void (*ia64_float_to_chars
)
170 PARAMS ((char *, LITTLENUM_TYPE
*, int));
172 static struct hash_control
*alias_hash
;
173 static struct hash_control
*alias_name_hash
;
174 static struct hash_control
*secalias_hash
;
175 static struct hash_control
*secalias_name_hash
;
177 /* Characters which always start a comment. */
178 const char comment_chars
[] = "";
180 /* Characters which start a comment at the beginning of a line. */
181 const char line_comment_chars
[] = "#";
183 /* Characters which may be used to separate multiple commands on a
185 const char line_separator_chars
[] = ";";
187 /* Characters which are used to indicate an exponent in a floating
189 const char EXP_CHARS
[] = "eE";
191 /* Characters which mean that a number is a floating point constant,
193 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
195 /* ia64-specific option processing: */
197 const char *md_shortopts
= "m:N:x::";
199 struct option md_longopts
[] =
201 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
202 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
203 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
204 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
207 size_t md_longopts_size
= sizeof (md_longopts
);
211 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
212 struct hash_control
*reg_hash
; /* register name hash table */
213 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
214 struct hash_control
*const_hash
; /* constant hash table */
215 struct hash_control
*entry_hash
; /* code entry hint hash table */
217 symbolS
*regsym
[REG_NUM
];
219 /* If X_op is != O_absent, the registername for the instruction's
220 qualifying predicate. If NULL, p0 is assumed for instructions
221 that are predicatable. */
228 explicit_mode
: 1, /* which mode we're in */
229 default_explicit_mode
: 1, /* which mode is the default */
230 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
232 keep_pending_output
: 1;
234 /* Each bundle consists of up to three instructions. We keep
235 track of four most recent instructions so we can correctly set
236 the end_of_insn_group for the last instruction in a bundle. */
238 int num_slots_in_use
;
242 end_of_insn_group
: 1,
243 manual_bundling_on
: 1,
244 manual_bundling_off
: 1,
245 loc_directive_seen
: 1;
246 signed char user_template
; /* user-selected template, if any */
247 unsigned char qp_regno
; /* qualifying predicate */
248 /* This duplicates a good fraction of "struct fix" but we
249 can't use a "struct fix" instead since we can't call
250 fix_new_exp() until we know the address of the instruction. */
254 bfd_reloc_code_real_type code
;
255 enum ia64_opnd opnd
; /* type of operand in need of fix */
256 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
257 expressionS expr
; /* the value to be inserted */
259 fixup
[2]; /* at most two fixups per insn */
260 struct ia64_opcode
*idesc
;
261 struct label_fix
*label_fixups
;
262 struct label_fix
*tag_fixups
;
263 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
266 unsigned int src_line
;
267 struct dwarf2_line_info debug_line
;
275 struct dynreg
*next
; /* next dynamic register */
277 unsigned short base
; /* the base register number */
278 unsigned short num_regs
; /* # of registers in this set */
280 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
282 flagword flags
; /* ELF-header flags */
285 unsigned hint
:1; /* is this hint currently valid? */
286 bfd_vma offset
; /* mem.offset offset */
287 bfd_vma base
; /* mem.offset base */
290 int path
; /* number of alt. entry points seen */
291 const char **entry_labels
; /* labels of all alternate paths in
292 the current DV-checking block. */
293 int maxpaths
; /* size currently allocated for
296 int pointer_size
; /* size in bytes of a pointer */
297 int pointer_size_shift
; /* shift size of a pointer for alignment */
301 /* application registers: */
307 #define AR_BSPSTORE 18
322 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
323 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
324 {"ar.rsc", 16}, {"ar.bsp", 17},
325 {"ar.bspstore", 18}, {"ar.rnat", 19},
326 {"ar.fcr", 21}, {"ar.eflag", 24},
327 {"ar.csd", 25}, {"ar.ssd", 26},
328 {"ar.cflg", 27}, {"ar.fsr", 28},
329 {"ar.fir", 29}, {"ar.fdr", 30},
330 {"ar.ccv", 32}, {"ar.unat", 36},
331 {"ar.fpsr", 40}, {"ar.itc", 44},
332 {"ar.pfs", 64}, {"ar.lc", 65},
353 /* control registers: */
395 static const struct const_desc
402 /* PSR constant masks: */
405 {"psr.be", ((valueT
) 1) << 1},
406 {"psr.up", ((valueT
) 1) << 2},
407 {"psr.ac", ((valueT
) 1) << 3},
408 {"psr.mfl", ((valueT
) 1) << 4},
409 {"psr.mfh", ((valueT
) 1) << 5},
411 {"psr.ic", ((valueT
) 1) << 13},
412 {"psr.i", ((valueT
) 1) << 14},
413 {"psr.pk", ((valueT
) 1) << 15},
415 {"psr.dt", ((valueT
) 1) << 17},
416 {"psr.dfl", ((valueT
) 1) << 18},
417 {"psr.dfh", ((valueT
) 1) << 19},
418 {"psr.sp", ((valueT
) 1) << 20},
419 {"psr.pp", ((valueT
) 1) << 21},
420 {"psr.di", ((valueT
) 1) << 22},
421 {"psr.si", ((valueT
) 1) << 23},
422 {"psr.db", ((valueT
) 1) << 24},
423 {"psr.lp", ((valueT
) 1) << 25},
424 {"psr.tb", ((valueT
) 1) << 26},
425 {"psr.rt", ((valueT
) 1) << 27},
426 /* 28-31: reserved */
427 /* 32-33: cpl (current privilege level) */
428 {"psr.is", ((valueT
) 1) << 34},
429 {"psr.mc", ((valueT
) 1) << 35},
430 {"psr.it", ((valueT
) 1) << 36},
431 {"psr.id", ((valueT
) 1) << 37},
432 {"psr.da", ((valueT
) 1) << 38},
433 {"psr.dd", ((valueT
) 1) << 39},
434 {"psr.ss", ((valueT
) 1) << 40},
435 /* 41-42: ri (restart instruction) */
436 {"psr.ed", ((valueT
) 1) << 43},
437 {"psr.bn", ((valueT
) 1) << 44},
440 /* indirect register-sets/memory: */
449 { "CPUID", IND_CPUID
},
450 { "cpuid", IND_CPUID
},
462 /* Pseudo functions used to indicate relocation types (these functions
463 start with an at sign (@). */
485 /* reloc pseudo functions (these must come first!): */
486 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
487 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
488 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
489 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
490 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
491 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
492 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
493 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
494 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
495 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
496 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
497 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
498 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
499 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
500 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
501 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
502 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
504 /* mbtype4 constants: */
505 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
506 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
507 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
508 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
509 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
511 /* fclass constants: */
512 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
513 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
514 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
515 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
516 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
517 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
518 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
519 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
520 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
522 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
524 /* hint constants: */
525 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
527 /* unwind-related constants: */
528 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
529 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
530 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
531 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
532 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
533 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
534 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
536 /* unwind-related registers: */
537 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
540 /* 41-bit nop opcodes (one per unit): */
541 static const bfd_vma nop
[IA64_NUM_UNITS
] =
543 0x0000000000LL
, /* NIL => break 0 */
544 0x0008000000LL
, /* I-unit nop */
545 0x0008000000LL
, /* M-unit nop */
546 0x4000000000LL
, /* B-unit nop */
547 0x0008000000LL
, /* F-unit nop */
548 0x0008000000LL
, /* L-"unit" nop */
549 0x0008000000LL
, /* X-unit nop */
552 /* Can't be `const' as it's passed to input routines (which have the
553 habit of setting temporary sentinels. */
554 static char special_section_name
[][20] =
556 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
557 {".IA_64.unwind"}, {".IA_64.unwind_info"},
558 {".init_array"}, {".fini_array"}
561 /* The best template for a particular sequence of up to three
563 #define N IA64_NUM_TYPES
564 static unsigned char best_template
[N
][N
][N
];
567 /* Resource dependencies currently in effect */
569 int depind
; /* dependency index */
570 const struct ia64_dependency
*dependency
; /* actual dependency */
571 unsigned specific
:1, /* is this a specific bit/regno? */
572 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
573 int index
; /* specific regno/bit within dependency */
574 int note
; /* optional qualifying note (0 if none) */
578 int insn_srlz
; /* current insn serialization state */
579 int data_srlz
; /* current data serialization state */
580 int qp_regno
; /* qualifying predicate for this usage */
581 char *file
; /* what file marked this dependency */
582 unsigned int line
; /* what line marked this dependency */
583 struct mem_offset mem_offset
; /* optional memory offset hint */
584 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
585 int path
; /* corresponding code entry index */
587 static int regdepslen
= 0;
588 static int regdepstotlen
= 0;
589 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
590 static const char *dv_sem
[] = { "none", "implied", "impliedf",
591 "data", "instr", "specific", "stop", "other" };
592 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
594 /* Current state of PR mutexation */
595 static struct qpmutex
{
598 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
599 static int qp_mutexeslen
= 0;
600 static int qp_mutexestotlen
= 0;
601 static valueT qp_safe_across_calls
= 0;
603 /* Current state of PR implications */
604 static struct qp_imply
{
607 unsigned p2_branched
:1;
609 } *qp_implies
= NULL
;
610 static int qp_implieslen
= 0;
611 static int qp_impliestotlen
= 0;
613 /* Keep track of static GR values so that indirect register usage can
614 sometimes be tracked. */
619 } gr_values
[128] = {{ 1, 0, 0 }};
621 /* Remember the alignment frag. */
622 static fragS
*align_frag
;
624 /* These are the routines required to output the various types of
627 /* A slot_number is a frag address plus the slot index (0-2). We use the
628 frag address here so that if there is a section switch in the middle of
629 a function, then instructions emitted to a different section are not
630 counted. Since there may be more than one frag for a function, this
631 means we also need to keep track of which frag this address belongs to
632 so we can compute inter-frag distances. This also nicely solves the
633 problem with nops emitted for align directives, which can't easily be
634 counted, but can easily be derived from frag sizes. */
636 typedef struct unw_rec_list
{
638 unsigned long slot_number
;
640 unsigned long next_slot_number
;
641 fragS
*next_slot_frag
;
642 struct unw_rec_list
*next
;
645 #define SLOT_NUM_NOT_SET (unsigned)-1
647 /* Linked list of saved prologue counts. A very poor
648 implementation of a map from label numbers to prologue counts. */
649 typedef struct label_prologue_count
651 struct label_prologue_count
*next
;
652 unsigned long label_number
;
653 unsigned int prologue_count
;
654 } label_prologue_count
;
658 /* Maintain a list of unwind entries for the current function. */
662 /* Any unwind entires that should be attached to the current slot
663 that an insn is being constructed for. */
664 unw_rec_list
*current_entry
;
666 /* These are used to create the unwind table entry for this function. */
668 symbolS
*info
; /* pointer to unwind info */
669 symbolS
*personality_routine
;
671 subsegT saved_text_subseg
;
672 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
674 /* TRUE if processing unwind directives in a prologue region. */
675 unsigned int prologue
: 1;
676 unsigned int prologue_mask
: 4;
677 unsigned int body
: 1;
678 unsigned int insn
: 1;
679 unsigned int prologue_count
; /* number of .prologues seen so far */
680 /* Prologue counts at previous .label_state directives. */
681 struct label_prologue_count
* saved_prologue_counts
;
684 /* The input value is a negated offset from psp, and specifies an address
685 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
686 must add 16 and divide by 4 to get the encoded value. */
688 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
690 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
692 /* Forward declarations: */
693 static void set_section
PARAMS ((char *name
));
694 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
695 unsigned int, unsigned int));
696 static void dot_align (int);
697 static void dot_radix
PARAMS ((int));
698 static void dot_special_section
PARAMS ((int));
699 static void dot_proc
PARAMS ((int));
700 static void dot_fframe
PARAMS ((int));
701 static void dot_vframe
PARAMS ((int));
702 static void dot_vframesp
PARAMS ((int));
703 static void dot_vframepsp
PARAMS ((int));
704 static void dot_save
PARAMS ((int));
705 static void dot_restore
PARAMS ((int));
706 static void dot_restorereg
PARAMS ((int));
707 static void dot_restorereg_p
PARAMS ((int));
708 static void dot_handlerdata
PARAMS ((int));
709 static void dot_unwentry
PARAMS ((int));
710 static void dot_altrp
PARAMS ((int));
711 static void dot_savemem
PARAMS ((int));
712 static void dot_saveg
PARAMS ((int));
713 static void dot_savef
PARAMS ((int));
714 static void dot_saveb
PARAMS ((int));
715 static void dot_savegf
PARAMS ((int));
716 static void dot_spill
PARAMS ((int));
717 static void dot_spillreg
PARAMS ((int));
718 static void dot_spillmem
PARAMS ((int));
719 static void dot_spillreg_p
PARAMS ((int));
720 static void dot_spillmem_p
PARAMS ((int));
721 static void dot_label_state
PARAMS ((int));
722 static void dot_copy_state
PARAMS ((int));
723 static void dot_unwabi
PARAMS ((int));
724 static void dot_personality
PARAMS ((int));
725 static void dot_body
PARAMS ((int));
726 static void dot_prologue
PARAMS ((int));
727 static void dot_endp
PARAMS ((int));
728 static void dot_template
PARAMS ((int));
729 static void dot_regstk
PARAMS ((int));
730 static void dot_rot
PARAMS ((int));
731 static void dot_byteorder
PARAMS ((int));
732 static void dot_psr
PARAMS ((int));
733 static void dot_alias
PARAMS ((int));
734 static void dot_ln
PARAMS ((int));
735 static char *parse_section_name
PARAMS ((void));
736 static void dot_xdata
PARAMS ((int));
737 static void stmt_float_cons
PARAMS ((int));
738 static void stmt_cons_ua
PARAMS ((int));
739 static void dot_xfloat_cons
PARAMS ((int));
740 static void dot_xstringer
PARAMS ((int));
741 static void dot_xdata_ua
PARAMS ((int));
742 static void dot_xfloat_cons_ua
PARAMS ((int));
743 static void print_prmask
PARAMS ((valueT mask
));
744 static void dot_pred_rel
PARAMS ((int));
745 static void dot_reg_val
PARAMS ((int));
746 static void dot_serialize
PARAMS ((int));
747 static void dot_dv_mode
PARAMS ((int));
748 static void dot_entry
PARAMS ((int));
749 static void dot_mem_offset
PARAMS ((int));
750 static void add_unwind_entry
PARAMS((unw_rec_list
*ptr
));
751 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
752 static void declare_register_set
PARAMS ((const char *, int, int));
753 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
754 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
757 static int parse_operand
PARAMS ((expressionS
*e
));
758 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
759 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
760 static void emit_one_bundle
PARAMS ((void));
761 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
762 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
763 bfd_reloc_code_real_type r_type
));
764 static void insn_group_break
PARAMS ((int, int, int));
765 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
766 struct rsrc
*, int depind
, int path
));
767 static void add_qp_mutex
PARAMS((valueT mask
));
768 static void add_qp_imply
PARAMS((int p1
, int p2
));
769 static void clear_qp_branch_flag
PARAMS((valueT mask
));
770 static void clear_qp_mutex
PARAMS((valueT mask
));
771 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
772 static int has_suffix_p
PARAMS((const char *, const char *));
773 static void clear_register_values
PARAMS ((void));
774 static void print_dependency
PARAMS ((const char *action
, int depind
));
775 static void instruction_serialization
PARAMS ((void));
776 static void data_serialization
PARAMS ((void));
777 static void remove_marked_resource
PARAMS ((struct rsrc
*));
778 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
779 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
780 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
781 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
782 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
783 struct ia64_opcode
*, int, struct rsrc
[], int, int));
784 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
785 static void check_dependencies
PARAMS((struct ia64_opcode
*));
786 static void mark_resources
PARAMS((struct ia64_opcode
*));
787 static void update_dependencies
PARAMS((struct ia64_opcode
*));
788 static void note_register_values
PARAMS((struct ia64_opcode
*));
789 static int qp_mutex
PARAMS ((int, int, int));
790 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
791 static void output_vbyte_mem
PARAMS ((int, char *, char *));
792 static void count_output
PARAMS ((int, char *, char *));
793 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
794 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
795 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
796 static void output_P1_format
PARAMS ((vbyte_func
, int));
797 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
798 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
799 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
800 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
801 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
802 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
803 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
804 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
805 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
806 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
807 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
808 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
809 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
810 static char format_ab_reg
PARAMS ((int, int));
811 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
813 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
814 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
816 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
817 static unw_rec_list
*output_endp
PARAMS ((void));
818 static unw_rec_list
*output_prologue
PARAMS ((void));
819 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
820 static unw_rec_list
*output_body
PARAMS ((void));
821 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
822 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
823 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
824 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
825 static unw_rec_list
*output_rp_when
PARAMS ((void));
826 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
827 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
828 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
829 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
830 static unw_rec_list
*output_pfs_when
PARAMS ((void));
831 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
832 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
833 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
834 static unw_rec_list
*output_preds_when
PARAMS ((void));
835 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
836 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
837 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
838 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
839 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
840 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
841 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
842 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
843 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
844 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
845 static unw_rec_list
*output_unat_when
PARAMS ((void));
846 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
847 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
848 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
849 static unw_rec_list
*output_lc_when
PARAMS ((void));
850 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
851 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
852 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
853 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
854 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
855 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
856 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
857 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
858 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
859 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
860 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
861 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
862 static unw_rec_list
*output_bsp_when
PARAMS ((void));
863 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
864 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
865 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
866 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
867 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
868 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
869 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
870 static unw_rec_list
*output_rnat_when
PARAMS ((void));
871 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
872 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
873 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
874 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
875 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
876 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
877 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
878 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int));
879 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int));
880 static unw_rec_list
*output_spill_psprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
882 static unw_rec_list
*output_spill_sprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
884 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
886 static unw_rec_list
*output_spill_reg_p
PARAMS ((unsigned int, unsigned int, unsigned int,
887 unsigned int, unsigned int));
888 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
889 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
890 static int calc_record_size
PARAMS ((unw_rec_list
*));
891 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
892 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
893 unsigned long, fragS
*,
895 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
896 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
897 static int convert_expr_to_ab_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
898 static int convert_expr_to_xy_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
899 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
900 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
901 static void free_saved_prologue_counts
PARAMS ((void));
903 /* Determine if application register REGNUM resides only in the integer
904 unit (as opposed to the memory unit). */
906 ar_is_only_in_integer_unit (int reg
)
909 return reg
>= 64 && reg
<= 111;
912 /* Determine if application register REGNUM resides only in the memory
913 unit (as opposed to the integer unit). */
915 ar_is_only_in_memory_unit (int reg
)
918 return reg
>= 0 && reg
<= 47;
921 /* Switch to section NAME and create section if necessary. It's
922 rather ugly that we have to manipulate input_line_pointer but I
923 don't see any other way to accomplish the same thing without
924 changing obj-elf.c (which may be the Right Thing, in the end). */
929 char *saved_input_line_pointer
;
931 saved_input_line_pointer
= input_line_pointer
;
932 input_line_pointer
= name
;
934 input_line_pointer
= saved_input_line_pointer
;
937 /* Map 's' to SHF_IA_64_SHORT. */
940 ia64_elf_section_letter (letter
, ptr_msg
)
945 return SHF_IA_64_SHORT
;
946 else if (letter
== 'o')
947 return SHF_LINK_ORDER
;
949 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
953 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
956 ia64_elf_section_flags (flags
, attr
, type
)
958 int attr
, type ATTRIBUTE_UNUSED
;
960 if (attr
& SHF_IA_64_SHORT
)
961 flags
|= SEC_SMALL_DATA
;
966 ia64_elf_section_type (str
, len
)
970 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
972 if (STREQ (ELF_STRING_ia64_unwind_info
))
975 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
978 if (STREQ (ELF_STRING_ia64_unwind
))
979 return SHT_IA_64_UNWIND
;
981 if (STREQ (ELF_STRING_ia64_unwind_once
))
982 return SHT_IA_64_UNWIND
;
984 if (STREQ ("unwind"))
985 return SHT_IA_64_UNWIND
;
992 set_regstack (ins
, locs
, outs
, rots
)
993 unsigned int ins
, locs
, outs
, rots
;
998 sof
= ins
+ locs
+ outs
;
1001 as_bad ("Size of frame exceeds maximum of 96 registers");
1006 as_warn ("Size of rotating registers exceeds frame size");
1009 md
.in
.base
= REG_GR
+ 32;
1010 md
.loc
.base
= md
.in
.base
+ ins
;
1011 md
.out
.base
= md
.loc
.base
+ locs
;
1013 md
.in
.num_regs
= ins
;
1014 md
.loc
.num_regs
= locs
;
1015 md
.out
.num_regs
= outs
;
1016 md
.rot
.num_regs
= rots
;
1023 struct label_fix
*lfix
;
1025 subsegT saved_subseg
;
1028 if (!md
.last_text_seg
)
1031 saved_seg
= now_seg
;
1032 saved_subseg
= now_subseg
;
1034 subseg_set (md
.last_text_seg
, 0);
1036 while (md
.num_slots_in_use
> 0)
1037 emit_one_bundle (); /* force out queued instructions */
1039 /* In case there are labels following the last instruction, resolve
1041 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1043 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1044 symbol_set_frag (lfix
->sym
, frag_now
);
1046 CURR_SLOT
.label_fixups
= 0;
1047 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1049 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1050 symbol_set_frag (lfix
->sym
, frag_now
);
1052 CURR_SLOT
.tag_fixups
= 0;
1054 /* In case there are unwind directives following the last instruction,
1055 resolve those now. We only handle prologue, body, and endp directives
1056 here. Give an error for others. */
1057 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1059 switch (ptr
->r
.type
)
1065 ptr
->slot_number
= (unsigned long) frag_more (0);
1066 ptr
->slot_frag
= frag_now
;
1069 /* Allow any record which doesn't have a "t" field (i.e.,
1070 doesn't relate to a particular instruction). */
1086 as_bad (_("Unwind directive not followed by an instruction."));
1090 unwind
.current_entry
= NULL
;
1092 subseg_set (saved_seg
, saved_subseg
);
1094 if (md
.qp
.X_op
== O_register
)
1095 as_bad ("qualifying predicate not followed by instruction");
1099 ia64_do_align (int nbytes
)
1101 char *saved_input_line_pointer
= input_line_pointer
;
1103 input_line_pointer
= "";
1104 s_align_bytes (nbytes
);
1105 input_line_pointer
= saved_input_line_pointer
;
1109 ia64_cons_align (nbytes
)
1114 char *saved_input_line_pointer
= input_line_pointer
;
1115 input_line_pointer
= "";
1116 s_align_bytes (nbytes
);
1117 input_line_pointer
= saved_input_line_pointer
;
1121 /* Output COUNT bytes to a memory location. */
1122 static unsigned char *vbyte_mem_ptr
= NULL
;
1125 output_vbyte_mem (count
, ptr
, comment
)
1128 char *comment ATTRIBUTE_UNUSED
;
1131 if (vbyte_mem_ptr
== NULL
)
1136 for (x
= 0; x
< count
; x
++)
1137 *(vbyte_mem_ptr
++) = ptr
[x
];
1140 /* Count the number of bytes required for records. */
1141 static int vbyte_count
= 0;
1143 count_output (count
, ptr
, comment
)
1145 char *ptr ATTRIBUTE_UNUSED
;
1146 char *comment ATTRIBUTE_UNUSED
;
1148 vbyte_count
+= count
;
1152 output_R1_format (f
, rtype
, rlen
)
1154 unw_record_type rtype
;
1161 output_R3_format (f
, rtype
, rlen
);
1167 else if (rtype
!= prologue
)
1168 as_bad ("record type is not valid");
1170 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1171 (*f
) (1, &byte
, NULL
);
1175 output_R2_format (f
, mask
, grsave
, rlen
)
1182 mask
= (mask
& 0x0f);
1183 grsave
= (grsave
& 0x7f);
1185 bytes
[0] = (UNW_R2
| (mask
>> 1));
1186 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1187 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1188 (*f
) (count
, bytes
, NULL
);
1192 output_R3_format (f
, rtype
, rlen
)
1194 unw_record_type rtype
;
1201 output_R1_format (f
, rtype
, rlen
);
1207 else if (rtype
!= prologue
)
1208 as_bad ("record type is not valid");
1209 bytes
[0] = (UNW_R3
| r
);
1210 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1211 (*f
) (count
+ 1, bytes
, NULL
);
1215 output_P1_format (f
, brmask
)
1220 byte
= UNW_P1
| (brmask
& 0x1f);
1221 (*f
) (1, &byte
, NULL
);
1225 output_P2_format (f
, brmask
, gr
)
1231 brmask
= (brmask
& 0x1f);
1232 bytes
[0] = UNW_P2
| (brmask
>> 1);
1233 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1234 (*f
) (2, bytes
, NULL
);
1238 output_P3_format (f
, rtype
, reg
)
1240 unw_record_type rtype
;
1285 as_bad ("Invalid record type for P3 format.");
1287 bytes
[0] = (UNW_P3
| (r
>> 1));
1288 bytes
[1] = (((r
& 1) << 7) | reg
);
1289 (*f
) (2, bytes
, NULL
);
1293 output_P4_format (f
, imask
, imask_size
)
1295 unsigned char *imask
;
1296 unsigned long imask_size
;
1299 (*f
) (imask_size
, imask
, NULL
);
1303 output_P5_format (f
, grmask
, frmask
)
1306 unsigned long frmask
;
1309 grmask
= (grmask
& 0x0f);
1312 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1313 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1314 bytes
[3] = (frmask
& 0x000000ff);
1315 (*f
) (4, bytes
, NULL
);
1319 output_P6_format (f
, rtype
, rmask
)
1321 unw_record_type rtype
;
1327 if (rtype
== gr_mem
)
1329 else if (rtype
!= fr_mem
)
1330 as_bad ("Invalid record type for format P6");
1331 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1332 (*f
) (1, &byte
, NULL
);
1336 output_P7_format (f
, rtype
, w1
, w2
)
1338 unw_record_type rtype
;
1345 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1350 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1400 bytes
[0] = (UNW_P7
| r
);
1401 (*f
) (count
, bytes
, NULL
);
1405 output_P8_format (f
, rtype
, t
)
1407 unw_record_type rtype
;
1446 case bspstore_psprel
:
1449 case bspstore_sprel
:
1461 case priunat_when_gr
:
1464 case priunat_psprel
:
1470 case priunat_when_mem
:
1477 count
+= output_leb128 (bytes
+ 2, t
, 0);
1478 (*f
) (count
, bytes
, NULL
);
1482 output_P9_format (f
, grmask
, gr
)
1489 bytes
[1] = (grmask
& 0x0f);
1490 bytes
[2] = (gr
& 0x7f);
1491 (*f
) (3, bytes
, NULL
);
1495 output_P10_format (f
, abi
, context
)
1502 bytes
[1] = (abi
& 0xff);
1503 bytes
[2] = (context
& 0xff);
1504 (*f
) (3, bytes
, NULL
);
1508 output_B1_format (f
, rtype
, label
)
1510 unw_record_type rtype
;
1511 unsigned long label
;
1517 output_B4_format (f
, rtype
, label
);
1520 if (rtype
== copy_state
)
1522 else if (rtype
!= label_state
)
1523 as_bad ("Invalid record type for format B1");
1525 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1526 (*f
) (1, &byte
, NULL
);
1530 output_B2_format (f
, ecount
, t
)
1532 unsigned long ecount
;
1539 output_B3_format (f
, ecount
, t
);
1542 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1543 count
+= output_leb128 (bytes
+ 1, t
, 0);
1544 (*f
) (count
, bytes
, NULL
);
1548 output_B3_format (f
, ecount
, t
)
1550 unsigned long ecount
;
1557 output_B2_format (f
, ecount
, t
);
1561 count
+= output_leb128 (bytes
+ 1, t
, 0);
1562 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1563 (*f
) (count
, bytes
, NULL
);
1567 output_B4_format (f
, rtype
, label
)
1569 unw_record_type rtype
;
1570 unsigned long label
;
1577 output_B1_format (f
, rtype
, label
);
1581 if (rtype
== copy_state
)
1583 else if (rtype
!= label_state
)
1584 as_bad ("Invalid record type for format B1");
1586 bytes
[0] = (UNW_B4
| (r
<< 3));
1587 count
+= output_leb128 (bytes
+ 1, label
, 0);
1588 (*f
) (count
, bytes
, NULL
);
1592 format_ab_reg (ab
, reg
)
1599 ret
= (ab
<< 5) | reg
;
1604 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1606 unw_record_type rtype
;
1616 if (rtype
== spill_sprel
)
1618 else if (rtype
!= spill_psprel
)
1619 as_bad ("Invalid record type for format X1");
1620 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1621 count
+= output_leb128 (bytes
+ 2, t
, 0);
1622 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1623 (*f
) (count
, bytes
, NULL
);
1627 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1636 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1637 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1638 count
+= output_leb128 (bytes
+ 3, t
, 0);
1639 (*f
) (count
, bytes
, NULL
);
1643 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1645 unw_record_type rtype
;
1656 if (rtype
== spill_sprel_p
)
1658 else if (rtype
!= spill_psprel_p
)
1659 as_bad ("Invalid record type for format X3");
1660 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1661 bytes
[2] = format_ab_reg (ab
, reg
);
1662 count
+= output_leb128 (bytes
+ 3, t
, 0);
1663 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1664 (*f
) (count
, bytes
, NULL
);
1668 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1678 bytes
[1] = (qp
& 0x3f);
1679 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1680 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1681 count
+= output_leb128 (bytes
+ 4, t
, 0);
1682 (*f
) (count
, bytes
, NULL
);
1685 /* This function allocates a record list structure, and initializes fields. */
1687 static unw_rec_list
*
1688 alloc_record (unw_record_type t
)
1691 ptr
= xmalloc (sizeof (*ptr
));
1693 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1695 ptr
->next_slot_number
= 0;
1696 ptr
->next_slot_frag
= 0;
1700 /* Dummy unwind record used for calculating the length of the last prologue or
1703 static unw_rec_list
*
1706 unw_rec_list
*ptr
= alloc_record (endp
);
1710 static unw_rec_list
*
1713 unw_rec_list
*ptr
= alloc_record (prologue
);
1714 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1718 static unw_rec_list
*
1719 output_prologue_gr (saved_mask
, reg
)
1720 unsigned int saved_mask
;
1723 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1724 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1725 ptr
->r
.record
.r
.grmask
= saved_mask
;
1726 ptr
->r
.record
.r
.grsave
= reg
;
1730 static unw_rec_list
*
1733 unw_rec_list
*ptr
= alloc_record (body
);
1737 static unw_rec_list
*
1738 output_mem_stack_f (size
)
1741 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1742 ptr
->r
.record
.p
.size
= size
;
1746 static unw_rec_list
*
1747 output_mem_stack_v ()
1749 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1753 static unw_rec_list
*
1757 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1758 ptr
->r
.record
.p
.gr
= gr
;
1762 static unw_rec_list
*
1763 output_psp_sprel (offset
)
1764 unsigned int offset
;
1766 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1767 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1771 static unw_rec_list
*
1774 unw_rec_list
*ptr
= alloc_record (rp_when
);
1778 static unw_rec_list
*
1782 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1783 ptr
->r
.record
.p
.gr
= gr
;
1787 static unw_rec_list
*
1791 unw_rec_list
*ptr
= alloc_record (rp_br
);
1792 ptr
->r
.record
.p
.br
= br
;
1796 static unw_rec_list
*
1797 output_rp_psprel (offset
)
1798 unsigned int offset
;
1800 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1801 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1805 static unw_rec_list
*
1806 output_rp_sprel (offset
)
1807 unsigned int offset
;
1809 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1810 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1814 static unw_rec_list
*
1817 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1821 static unw_rec_list
*
1825 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1826 ptr
->r
.record
.p
.gr
= gr
;
1830 static unw_rec_list
*
1831 output_pfs_psprel (offset
)
1832 unsigned int offset
;
1834 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1835 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1839 static unw_rec_list
*
1840 output_pfs_sprel (offset
)
1841 unsigned int offset
;
1843 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1844 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1848 static unw_rec_list
*
1849 output_preds_when ()
1851 unw_rec_list
*ptr
= alloc_record (preds_when
);
1855 static unw_rec_list
*
1856 output_preds_gr (gr
)
1859 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1860 ptr
->r
.record
.p
.gr
= gr
;
1864 static unw_rec_list
*
1865 output_preds_psprel (offset
)
1866 unsigned int offset
;
1868 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1869 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1873 static unw_rec_list
*
1874 output_preds_sprel (offset
)
1875 unsigned int offset
;
1877 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1878 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1882 static unw_rec_list
*
1883 output_fr_mem (mask
)
1886 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1887 ptr
->r
.record
.p
.rmask
= mask
;
1891 static unw_rec_list
*
1892 output_frgr_mem (gr_mask
, fr_mask
)
1893 unsigned int gr_mask
;
1894 unsigned int fr_mask
;
1896 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1897 ptr
->r
.record
.p
.grmask
= gr_mask
;
1898 ptr
->r
.record
.p
.frmask
= fr_mask
;
1902 static unw_rec_list
*
1903 output_gr_gr (mask
, reg
)
1907 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1908 ptr
->r
.record
.p
.grmask
= mask
;
1909 ptr
->r
.record
.p
.gr
= reg
;
1913 static unw_rec_list
*
1914 output_gr_mem (mask
)
1917 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1918 ptr
->r
.record
.p
.rmask
= mask
;
1922 static unw_rec_list
*
1923 output_br_mem (unsigned int mask
)
1925 unw_rec_list
*ptr
= alloc_record (br_mem
);
1926 ptr
->r
.record
.p
.brmask
= mask
;
1930 static unw_rec_list
*
1931 output_br_gr (save_mask
, reg
)
1932 unsigned int save_mask
;
1935 unw_rec_list
*ptr
= alloc_record (br_gr
);
1936 ptr
->r
.record
.p
.brmask
= save_mask
;
1937 ptr
->r
.record
.p
.gr
= reg
;
1941 static unw_rec_list
*
1942 output_spill_base (offset
)
1943 unsigned int offset
;
1945 unw_rec_list
*ptr
= alloc_record (spill_base
);
1946 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1950 static unw_rec_list
*
1953 unw_rec_list
*ptr
= alloc_record (unat_when
);
1957 static unw_rec_list
*
1961 unw_rec_list
*ptr
= alloc_record (unat_gr
);
1962 ptr
->r
.record
.p
.gr
= gr
;
1966 static unw_rec_list
*
1967 output_unat_psprel (offset
)
1968 unsigned int offset
;
1970 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
1971 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1975 static unw_rec_list
*
1976 output_unat_sprel (offset
)
1977 unsigned int offset
;
1979 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
1980 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1984 static unw_rec_list
*
1987 unw_rec_list
*ptr
= alloc_record (lc_when
);
1991 static unw_rec_list
*
1995 unw_rec_list
*ptr
= alloc_record (lc_gr
);
1996 ptr
->r
.record
.p
.gr
= gr
;
2000 static unw_rec_list
*
2001 output_lc_psprel (offset
)
2002 unsigned int offset
;
2004 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2005 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2009 static unw_rec_list
*
2010 output_lc_sprel (offset
)
2011 unsigned int offset
;
2013 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2014 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2018 static unw_rec_list
*
2021 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2025 static unw_rec_list
*
2029 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2030 ptr
->r
.record
.p
.gr
= gr
;
2034 static unw_rec_list
*
2035 output_fpsr_psprel (offset
)
2036 unsigned int offset
;
2038 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2039 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2043 static unw_rec_list
*
2044 output_fpsr_sprel (offset
)
2045 unsigned int offset
;
2047 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2048 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2052 static unw_rec_list
*
2053 output_priunat_when_gr ()
2055 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2059 static unw_rec_list
*
2060 output_priunat_when_mem ()
2062 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2066 static unw_rec_list
*
2067 output_priunat_gr (gr
)
2070 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2071 ptr
->r
.record
.p
.gr
= gr
;
2075 static unw_rec_list
*
2076 output_priunat_psprel (offset
)
2077 unsigned int offset
;
2079 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2080 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2084 static unw_rec_list
*
2085 output_priunat_sprel (offset
)
2086 unsigned int offset
;
2088 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2089 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2093 static unw_rec_list
*
2096 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2100 static unw_rec_list
*
2104 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2105 ptr
->r
.record
.p
.gr
= gr
;
2109 static unw_rec_list
*
2110 output_bsp_psprel (offset
)
2111 unsigned int offset
;
2113 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2114 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2118 static unw_rec_list
*
2119 output_bsp_sprel (offset
)
2120 unsigned int offset
;
2122 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2123 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2127 static unw_rec_list
*
2128 output_bspstore_when ()
2130 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2134 static unw_rec_list
*
2135 output_bspstore_gr (gr
)
2138 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2139 ptr
->r
.record
.p
.gr
= gr
;
2143 static unw_rec_list
*
2144 output_bspstore_psprel (offset
)
2145 unsigned int offset
;
2147 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2148 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2152 static unw_rec_list
*
2153 output_bspstore_sprel (offset
)
2154 unsigned int offset
;
2156 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2157 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2161 static unw_rec_list
*
2164 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2168 static unw_rec_list
*
2172 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2173 ptr
->r
.record
.p
.gr
= gr
;
2177 static unw_rec_list
*
2178 output_rnat_psprel (offset
)
2179 unsigned int offset
;
2181 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2182 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2186 static unw_rec_list
*
2187 output_rnat_sprel (offset
)
2188 unsigned int offset
;
2190 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2191 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2195 static unw_rec_list
*
2196 output_unwabi (abi
, context
)
2198 unsigned long context
;
2200 unw_rec_list
*ptr
= alloc_record (unwabi
);
2201 ptr
->r
.record
.p
.abi
= abi
;
2202 ptr
->r
.record
.p
.context
= context
;
2206 static unw_rec_list
*
2207 output_epilogue (unsigned long ecount
)
2209 unw_rec_list
*ptr
= alloc_record (epilogue
);
2210 ptr
->r
.record
.b
.ecount
= ecount
;
2214 static unw_rec_list
*
2215 output_label_state (unsigned long label
)
2217 unw_rec_list
*ptr
= alloc_record (label_state
);
2218 ptr
->r
.record
.b
.label
= label
;
2222 static unw_rec_list
*
2223 output_copy_state (unsigned long label
)
2225 unw_rec_list
*ptr
= alloc_record (copy_state
);
2226 ptr
->r
.record
.b
.label
= label
;
2230 static unw_rec_list
*
2231 output_spill_psprel (ab
, reg
, offset
)
2234 unsigned int offset
;
2236 unw_rec_list
*ptr
= alloc_record (spill_psprel
);
2237 ptr
->r
.record
.x
.ab
= ab
;
2238 ptr
->r
.record
.x
.reg
= reg
;
2239 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2243 static unw_rec_list
*
2244 output_spill_sprel (ab
, reg
, offset
)
2247 unsigned int offset
;
2249 unw_rec_list
*ptr
= alloc_record (spill_sprel
);
2250 ptr
->r
.record
.x
.ab
= ab
;
2251 ptr
->r
.record
.x
.reg
= reg
;
2252 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2256 static unw_rec_list
*
2257 output_spill_psprel_p (ab
, reg
, offset
, predicate
)
2260 unsigned int offset
;
2261 unsigned int predicate
;
2263 unw_rec_list
*ptr
= alloc_record (spill_psprel_p
);
2264 ptr
->r
.record
.x
.ab
= ab
;
2265 ptr
->r
.record
.x
.reg
= reg
;
2266 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2267 ptr
->r
.record
.x
.qp
= predicate
;
2271 static unw_rec_list
*
2272 output_spill_sprel_p (ab
, reg
, offset
, predicate
)
2275 unsigned int offset
;
2276 unsigned int predicate
;
2278 unw_rec_list
*ptr
= alloc_record (spill_sprel_p
);
2279 ptr
->r
.record
.x
.ab
= ab
;
2280 ptr
->r
.record
.x
.reg
= reg
;
2281 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2282 ptr
->r
.record
.x
.qp
= predicate
;
2286 static unw_rec_list
*
2287 output_spill_reg (ab
, reg
, targ_reg
, xy
)
2290 unsigned int targ_reg
;
2293 unw_rec_list
*ptr
= alloc_record (spill_reg
);
2294 ptr
->r
.record
.x
.ab
= ab
;
2295 ptr
->r
.record
.x
.reg
= reg
;
2296 ptr
->r
.record
.x
.treg
= targ_reg
;
2297 ptr
->r
.record
.x
.xy
= xy
;
2301 static unw_rec_list
*
2302 output_spill_reg_p (ab
, reg
, targ_reg
, xy
, predicate
)
2305 unsigned int targ_reg
;
2307 unsigned int predicate
;
2309 unw_rec_list
*ptr
= alloc_record (spill_reg_p
);
2310 ptr
->r
.record
.x
.ab
= ab
;
2311 ptr
->r
.record
.x
.reg
= reg
;
2312 ptr
->r
.record
.x
.treg
= targ_reg
;
2313 ptr
->r
.record
.x
.xy
= xy
;
2314 ptr
->r
.record
.x
.qp
= predicate
;
2318 /* Given a unw_rec_list process the correct format with the
2319 specified function. */
2322 process_one_record (ptr
, f
)
2326 unsigned long fr_mask
, gr_mask
;
2328 switch (ptr
->r
.type
)
2330 /* This is a dummy record that takes up no space in the output. */
2338 /* These are taken care of by prologue/prologue_gr. */
2343 if (ptr
->r
.type
== prologue_gr
)
2344 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2345 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2347 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2349 /* Output descriptor(s) for union of register spills (if any). */
2350 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2351 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2354 if ((fr_mask
& ~0xfUL
) == 0)
2355 output_P6_format (f
, fr_mem
, fr_mask
);
2358 output_P5_format (f
, gr_mask
, fr_mask
);
2363 output_P6_format (f
, gr_mem
, gr_mask
);
2364 if (ptr
->r
.record
.r
.mask
.br_mem
)
2365 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2367 /* output imask descriptor if necessary: */
2368 if (ptr
->r
.record
.r
.mask
.i
)
2369 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2370 ptr
->r
.record
.r
.imask_size
);
2374 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2378 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2379 ptr
->r
.record
.p
.size
);
2392 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2395 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2398 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2406 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2415 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2425 case bspstore_sprel
:
2427 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2430 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2433 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2436 as_bad ("spill_mask record unimplemented.");
2438 case priunat_when_gr
:
2439 case priunat_when_mem
:
2443 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2445 case priunat_psprel
:
2447 case bspstore_psprel
:
2449 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2452 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2455 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2459 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2462 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2463 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2464 ptr
->r
.record
.x
.pspoff
);
2467 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2468 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2469 ptr
->r
.record
.x
.spoff
);
2472 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2473 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2474 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2476 case spill_psprel_p
:
2477 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2478 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2479 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2482 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2483 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2484 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2487 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2488 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2489 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2493 as_bad ("record_type_not_valid");
2498 /* Given a unw_rec_list list, process all the records with
2499 the specified function. */
2501 process_unw_records (list
, f
)
2506 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2507 process_one_record (ptr
, f
);
2510 /* Determine the size of a record list in bytes. */
2512 calc_record_size (list
)
2516 process_unw_records (list
, count_output
);
2520 /* Update IMASK bitmask to reflect the fact that one or more registers
2521 of type TYPE are saved starting at instruction with index T. If N
2522 bits are set in REGMASK, it is assumed that instructions T through
2523 T+N-1 save these registers.
2527 1: instruction saves next fp reg
2528 2: instruction saves next general reg
2529 3: instruction saves next branch reg */
2531 set_imask (region
, regmask
, t
, type
)
2532 unw_rec_list
*region
;
2533 unsigned long regmask
;
2537 unsigned char *imask
;
2538 unsigned long imask_size
;
2542 imask
= region
->r
.record
.r
.mask
.i
;
2543 imask_size
= region
->r
.record
.r
.imask_size
;
2546 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2547 imask
= xmalloc (imask_size
);
2548 memset (imask
, 0, imask_size
);
2550 region
->r
.record
.r
.imask_size
= imask_size
;
2551 region
->r
.record
.r
.mask
.i
= imask
;
2555 pos
= 2 * (3 - t
% 4);
2558 if (i
>= imask_size
)
2560 as_bad ("Ignoring attempt to spill beyond end of region");
2564 imask
[i
] |= (type
& 0x3) << pos
;
2566 regmask
&= (regmask
- 1);
2576 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2577 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2578 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2582 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2583 unsigned long slot_addr
;
2585 unsigned long first_addr
;
2589 unsigned long index
= 0;
2591 /* First time we are called, the initial address and frag are invalid. */
2592 if (first_addr
== 0)
2595 /* If the two addresses are in different frags, then we need to add in
2596 the remaining size of this frag, and then the entire size of intermediate
2598 while (slot_frag
!= first_frag
)
2600 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2604 /* We can get the final addresses only during and after
2606 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2607 index
+= 3 * ((first_frag
->fr_next
->fr_address
2608 - first_frag
->fr_address
2609 - first_frag
->fr_fix
) >> 4);
2612 /* We don't know what the final addresses will be. We try our
2613 best to estimate. */
2614 switch (first_frag
->fr_type
)
2620 as_fatal ("only constant space allocation is supported");
2626 /* Take alignment into account. Assume the worst case
2627 before relaxation. */
2628 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2632 if (first_frag
->fr_symbol
)
2634 as_fatal ("only constant offsets are supported");
2638 index
+= 3 * (first_frag
->fr_offset
>> 4);
2642 /* Add in the full size of the frag converted to instruction slots. */
2643 index
+= 3 * (first_frag
->fr_fix
>> 4);
2644 /* Subtract away the initial part before first_addr. */
2645 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2646 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2648 /* Move to the beginning of the next frag. */
2649 first_frag
= first_frag
->fr_next
;
2650 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2653 /* Add in the used part of the last frag. */
2654 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2655 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2659 /* Optimize unwind record directives. */
2661 static unw_rec_list
*
2662 optimize_unw_records (list
)
2668 /* If the only unwind record is ".prologue" or ".prologue" followed
2669 by ".body", then we can optimize the unwind directives away. */
2670 if (list
->r
.type
== prologue
2671 && (list
->next
->r
.type
== endp
2672 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2678 /* Given a complete record list, process any records which have
2679 unresolved fields, (ie length counts for a prologue). After
2680 this has been run, all necessary information should be available
2681 within each record to generate an image. */
2684 fixup_unw_records (list
, before_relax
)
2688 unw_rec_list
*ptr
, *region
= 0;
2689 unsigned long first_addr
= 0, rlen
= 0, t
;
2690 fragS
*first_frag
= 0;
2692 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2694 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2695 as_bad (" Insn slot not set in unwind record.");
2696 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2697 first_addr
, first_frag
, before_relax
);
2698 switch (ptr
->r
.type
)
2706 unsigned long last_addr
= 0;
2707 fragS
*last_frag
= NULL
;
2709 first_addr
= ptr
->slot_number
;
2710 first_frag
= ptr
->slot_frag
;
2711 /* Find either the next body/prologue start, or the end of
2712 the function, and determine the size of the region. */
2713 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2714 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2715 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2717 last_addr
= last
->slot_number
;
2718 last_frag
= last
->slot_frag
;
2721 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2723 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2724 if (ptr
->r
.type
== body
)
2725 /* End of region. */
2733 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2735 /* This happens when a memory-stack-less procedure uses a
2736 ".restore sp" directive at the end of a region to pop
2738 ptr
->r
.record
.b
.t
= 0;
2749 case priunat_when_gr
:
2750 case priunat_when_mem
:
2754 ptr
->r
.record
.p
.t
= t
;
2762 case spill_psprel_p
:
2763 ptr
->r
.record
.x
.t
= t
;
2769 as_bad ("frgr_mem record before region record!");
2772 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2773 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2774 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2775 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2780 as_bad ("fr_mem record before region record!");
2783 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2784 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2789 as_bad ("gr_mem record before region record!");
2792 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2793 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2798 as_bad ("br_mem record before region record!");
2801 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2802 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2808 as_bad ("gr_gr record before region record!");
2811 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2816 as_bad ("br_gr record before region record!");
2819 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2828 /* Estimate the size of a frag before relaxing. We only have one type of frag
2829 to handle here, which is the unwind info frag. */
2832 ia64_estimate_size_before_relax (fragS
*frag
,
2833 asection
*segtype ATTRIBUTE_UNUSED
)
2838 /* ??? This code is identical to the first part of ia64_convert_frag. */
2839 list
= (unw_rec_list
*) frag
->fr_opcode
;
2840 fixup_unw_records (list
, 0);
2842 len
= calc_record_size (list
);
2843 /* pad to pointer-size boundary. */
2844 pad
= len
% md
.pointer_size
;
2846 len
+= md
.pointer_size
- pad
;
2847 /* Add 8 for the header. */
2849 /* Add a pointer for the personality offset. */
2850 if (frag
->fr_offset
)
2851 size
+= md
.pointer_size
;
2853 /* fr_var carries the max_chars that we created the fragment with.
2854 We must, of course, have allocated enough memory earlier. */
2855 assert (frag
->fr_var
>= size
);
2857 return frag
->fr_fix
+ size
;
2860 /* This function converts a rs_machine_dependent variant frag into a
2861 normal fill frag with the unwind image from the the record list. */
2863 ia64_convert_frag (fragS
*frag
)
2869 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2870 list
= (unw_rec_list
*) frag
->fr_opcode
;
2871 fixup_unw_records (list
, 0);
2873 len
= calc_record_size (list
);
2874 /* pad to pointer-size boundary. */
2875 pad
= len
% md
.pointer_size
;
2877 len
+= md
.pointer_size
- pad
;
2878 /* Add 8 for the header. */
2880 /* Add a pointer for the personality offset. */
2881 if (frag
->fr_offset
)
2882 size
+= md
.pointer_size
;
2884 /* fr_var carries the max_chars that we created the fragment with.
2885 We must, of course, have allocated enough memory earlier. */
2886 assert (frag
->fr_var
>= size
);
2888 /* Initialize the header area. fr_offset is initialized with
2889 unwind.personality_routine. */
2890 if (frag
->fr_offset
)
2892 if (md
.flags
& EF_IA_64_ABI64
)
2893 flag_value
= (bfd_vma
) 3 << 32;
2895 /* 32-bit unwind info block. */
2896 flag_value
= (bfd_vma
) 0x1003 << 32;
2901 md_number_to_chars (frag
->fr_literal
,
2902 (((bfd_vma
) 1 << 48) /* Version. */
2903 | flag_value
/* U & E handler flags. */
2904 | (len
/ md
.pointer_size
)), /* Length. */
2907 /* Skip the header. */
2908 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
2909 process_unw_records (list
, output_vbyte_mem
);
2911 /* Fill the padding bytes with zeros. */
2913 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
2914 md
.pointer_size
- pad
);
2916 frag
->fr_fix
+= size
;
2917 frag
->fr_type
= rs_fill
;
2919 frag
->fr_offset
= 0;
2923 convert_expr_to_ab_reg (e
, ab
, regp
)
2930 if (e
->X_op
!= O_register
)
2933 reg
= e
->X_add_number
;
2934 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2937 *regp
= reg
- REG_GR
;
2939 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
2940 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
2943 *regp
= reg
- REG_FR
;
2945 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
2948 *regp
= reg
- REG_BR
;
2955 case REG_PR
: *regp
= 0; break;
2956 case REG_PSP
: *regp
= 1; break;
2957 case REG_PRIUNAT
: *regp
= 2; break;
2958 case REG_BR
+ 0: *regp
= 3; break;
2959 case REG_AR
+ AR_BSP
: *regp
= 4; break;
2960 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
2961 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
2962 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
2963 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
2964 case REG_AR
+ AR_PFS
: *regp
= 9; break;
2965 case REG_AR
+ AR_LC
: *regp
= 10; break;
2975 convert_expr_to_xy_reg (e
, xy
, regp
)
2982 if (e
->X_op
!= O_register
)
2985 reg
= e
->X_add_number
;
2987 if (/* reg >= REG_GR && */ reg
<= (REG_GR
+ 127))
2990 *regp
= reg
- REG_GR
;
2992 else if (reg
>= REG_FR
&& reg
<= (REG_FR
+ 127))
2995 *regp
= reg
- REG_FR
;
2997 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3000 *regp
= reg
- REG_BR
;
3010 /* The current frag is an alignment frag. */
3011 align_frag
= frag_now
;
3012 s_align_bytes (arg
);
3017 int dummy ATTRIBUTE_UNUSED
;
3022 radix
= *input_line_pointer
++;
3024 if (radix
!= 'C' && !is_end_of_line
[(unsigned char) radix
])
3026 as_bad ("Radix `%c' unsupported", *input_line_pointer
);
3027 ignore_rest_of_line ();
3032 /* Helper function for .loc directives. If the assembler is not generating
3033 line number info, then we need to remember which instructions have a .loc
3034 directive, and only call dwarf2_gen_line_info for those instructions. */
3039 CURR_SLOT
.loc_directive_seen
= 1;
3040 dwarf2_directive_loc (x
);
3043 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3045 dot_special_section (which
)
3048 set_section ((char *) special_section_name
[which
]);
3052 in_procedure (const char *directive
)
3054 if (unwind
.proc_start
3055 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3057 as_bad (".%s outside of procedure", directive
);
3058 ignore_rest_of_line ();
3063 in_prologue (const char *directive
)
3065 if (in_procedure (directive
))
3067 if (unwind
.prologue
)
3069 as_bad (".%s outside of prologue", directive
);
3070 ignore_rest_of_line ();
3076 in_body (const char *directive
)
3078 if (in_procedure (directive
))
3082 as_bad (".%s outside of body region", directive
);
3083 ignore_rest_of_line ();
3089 add_unwind_entry (ptr
)
3093 unwind
.tail
->next
= ptr
;
3098 /* The current entry can in fact be a chain of unwind entries. */
3099 if (unwind
.current_entry
== NULL
)
3100 unwind
.current_entry
= ptr
;
3105 int dummy ATTRIBUTE_UNUSED
;
3109 if (!in_prologue ("fframe"))
3114 if (e
.X_op
!= O_constant
)
3115 as_bad ("Operand to .fframe must be a constant");
3117 add_unwind_entry (output_mem_stack_f (e
.X_add_number
));
3122 int dummy ATTRIBUTE_UNUSED
;
3127 if (!in_prologue ("vframe"))
3131 reg
= e
.X_add_number
- REG_GR
;
3132 if (e
.X_op
== O_register
&& reg
< 128)
3134 add_unwind_entry (output_mem_stack_v ());
3135 if (! (unwind
.prologue_mask
& 2))
3136 add_unwind_entry (output_psp_gr (reg
));
3139 as_bad ("First operand to .vframe must be a general register");
3143 dot_vframesp (dummy
)
3144 int dummy ATTRIBUTE_UNUSED
;
3148 if (!in_prologue ("vframesp"))
3152 if (e
.X_op
== O_constant
)
3154 add_unwind_entry (output_mem_stack_v ());
3155 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3158 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3162 dot_vframepsp (dummy
)
3163 int dummy ATTRIBUTE_UNUSED
;
3167 if (!in_prologue ("vframepsp"))
3171 if (e
.X_op
== O_constant
)
3173 add_unwind_entry (output_mem_stack_v ());
3174 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3177 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3182 int dummy ATTRIBUTE_UNUSED
;
3188 if (!in_prologue ("save"))
3191 sep
= parse_operand (&e1
);
3193 as_bad ("No second operand to .save");
3194 sep
= parse_operand (&e2
);
3196 reg1
= e1
.X_add_number
;
3197 reg2
= e2
.X_add_number
- REG_GR
;
3199 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3200 if (e1
.X_op
== O_register
)
3202 if (e2
.X_op
== O_register
&& reg2
>= 0 && reg2
< 128)
3206 case REG_AR
+ AR_BSP
:
3207 add_unwind_entry (output_bsp_when ());
3208 add_unwind_entry (output_bsp_gr (reg2
));
3210 case REG_AR
+ AR_BSPSTORE
:
3211 add_unwind_entry (output_bspstore_when ());
3212 add_unwind_entry (output_bspstore_gr (reg2
));
3214 case REG_AR
+ AR_RNAT
:
3215 add_unwind_entry (output_rnat_when ());
3216 add_unwind_entry (output_rnat_gr (reg2
));
3218 case REG_AR
+ AR_UNAT
:
3219 add_unwind_entry (output_unat_when ());
3220 add_unwind_entry (output_unat_gr (reg2
));
3222 case REG_AR
+ AR_FPSR
:
3223 add_unwind_entry (output_fpsr_when ());
3224 add_unwind_entry (output_fpsr_gr (reg2
));
3226 case REG_AR
+ AR_PFS
:
3227 add_unwind_entry (output_pfs_when ());
3228 if (! (unwind
.prologue_mask
& 4))
3229 add_unwind_entry (output_pfs_gr (reg2
));
3231 case REG_AR
+ AR_LC
:
3232 add_unwind_entry (output_lc_when ());
3233 add_unwind_entry (output_lc_gr (reg2
));
3236 add_unwind_entry (output_rp_when ());
3237 if (! (unwind
.prologue_mask
& 8))
3238 add_unwind_entry (output_rp_gr (reg2
));
3241 add_unwind_entry (output_preds_when ());
3242 if (! (unwind
.prologue_mask
& 1))
3243 add_unwind_entry (output_preds_gr (reg2
));
3246 add_unwind_entry (output_priunat_when_gr ());
3247 add_unwind_entry (output_priunat_gr (reg2
));
3250 as_bad ("First operand not a valid register");
3254 as_bad (" Second operand not a valid register");
3257 as_bad ("First operand not a register");
3262 int dummy ATTRIBUTE_UNUSED
;
3265 unsigned long ecount
; /* # of _additional_ regions to pop */
3268 if (!in_body ("restore"))
3271 sep
= parse_operand (&e1
);
3272 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3274 as_bad ("First operand to .restore must be stack pointer (sp)");
3280 parse_operand (&e2
);
3281 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3283 as_bad ("Second operand to .restore must be a constant >= 0");
3286 ecount
= e2
.X_add_number
;
3289 ecount
= unwind
.prologue_count
- 1;
3291 if (ecount
>= unwind
.prologue_count
)
3293 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3294 ecount
+ 1, unwind
.prologue_count
);
3298 add_unwind_entry (output_epilogue (ecount
));
3300 if (ecount
< unwind
.prologue_count
)
3301 unwind
.prologue_count
-= ecount
+ 1;
3303 unwind
.prologue_count
= 0;
3307 dot_restorereg (dummy
)
3308 int dummy ATTRIBUTE_UNUSED
;
3310 unsigned int ab
, reg
;
3313 if (!in_procedure ("restorereg"))
3318 if (!convert_expr_to_ab_reg (&e
, &ab
, ®
))
3320 as_bad ("First operand to .restorereg must be a preserved register");
3323 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0));
3327 dot_restorereg_p (dummy
)
3328 int dummy ATTRIBUTE_UNUSED
;
3330 unsigned int qp
, ab
, reg
;
3334 if (!in_procedure ("restorereg.p"))
3337 sep
= parse_operand (&e1
);
3340 as_bad ("No second operand to .restorereg.p");
3344 parse_operand (&e2
);
3346 qp
= e1
.X_add_number
- REG_P
;
3347 if (e1
.X_op
!= O_register
|| qp
> 63)
3349 as_bad ("First operand to .restorereg.p must be a predicate");
3353 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3355 as_bad ("Second operand to .restorereg.p must be a preserved register");
3358 add_unwind_entry (output_spill_reg_p (ab
, reg
, 0, 0, qp
));
3361 static char *special_linkonce_name
[] =
3363 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3367 start_unwind_section (const segT text_seg
, int sec_index
, int linkonce_empty
)
3370 Use a slightly ugly scheme to derive the unwind section names from
3371 the text section name:
3373 text sect. unwind table sect.
3374 name: name: comments:
3375 ---------- ----------------- --------------------------------
3377 .text.foo .IA_64.unwind.text.foo
3378 .foo .IA_64.unwind.foo
3380 .gnu.linkonce.ia64unw.foo
3381 _info .IA_64.unwind_info gas issues error message (ditto)
3382 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3384 This mapping is done so that:
3386 (a) An object file with unwind info only in .text will use
3387 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3388 This follows the letter of the ABI and also ensures backwards
3389 compatibility with older toolchains.
3391 (b) An object file with unwind info in multiple text sections
3392 will use separate unwind sections for each text section.
3393 This allows us to properly set the "sh_info" and "sh_link"
3394 fields in SHT_IA_64_UNWIND as required by the ABI and also
3395 lets GNU ld support programs with multiple segments
3396 containing unwind info (as might be the case for certain
3397 embedded applications).
3399 (c) An error is issued if there would be a name clash.
3402 const char *text_name
, *sec_text_name
;
3404 const char *prefix
= special_section_name
[sec_index
];
3406 size_t prefix_len
, suffix_len
, sec_name_len
;
3408 sec_text_name
= segment_name (text_seg
);
3409 text_name
= sec_text_name
;
3410 if (strncmp (text_name
, "_info", 5) == 0)
3412 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3414 ignore_rest_of_line ();
3417 if (strcmp (text_name
, ".text") == 0)
3420 /* Build the unwind section name by appending the (possibly stripped)
3421 text section name to the unwind prefix. */
3423 if (strncmp (text_name
, ".gnu.linkonce.t.",
3424 sizeof (".gnu.linkonce.t.") - 1) == 0)
3426 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3427 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3429 else if (linkonce_empty
)
3432 prefix_len
= strlen (prefix
);
3433 suffix_len
= strlen (suffix
);
3434 sec_name_len
= prefix_len
+ suffix_len
;
3435 sec_name
= alloca (sec_name_len
+ 1);
3436 memcpy (sec_name
, prefix
, prefix_len
);
3437 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3438 sec_name
[sec_name_len
] = '\0';
3440 /* Handle COMDAT group. */
3441 if (suffix
== text_name
&& (text_seg
->flags
& SEC_LINK_ONCE
) != 0)
3444 size_t len
, group_name_len
;
3445 const char *group_name
= elf_group_name (text_seg
);
3447 if (group_name
== NULL
)
3449 as_bad ("Group section `%s' has no group signature",
3451 ignore_rest_of_line ();
3454 /* We have to construct a fake section directive. */
3455 group_name_len
= strlen (group_name
);
3457 + 16 /* ,"aG",@progbits, */
3458 + group_name_len
/* ,group_name */
3461 section
= alloca (len
+ 1);
3462 memcpy (section
, sec_name
, sec_name_len
);
3463 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3464 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3465 memcpy (section
+ len
- 7, ",comdat", 7);
3466 section
[len
] = '\0';
3467 set_section (section
);
3471 set_section (sec_name
);
3472 bfd_set_section_flags (stdoutput
, now_seg
,
3473 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3476 elf_linked_to_section (now_seg
) = text_seg
;
3480 generate_unwind_image (const segT text_seg
)
3485 /* Mark the end of the unwind info, so that we can compute the size of the
3486 last unwind region. */
3487 add_unwind_entry (output_endp ());
3489 /* Force out pending instructions, to make sure all unwind records have
3490 a valid slot_number field. */
3491 ia64_flush_insns ();
3493 /* Generate the unwind record. */
3494 list
= optimize_unw_records (unwind
.list
);
3495 fixup_unw_records (list
, 1);
3496 size
= calc_record_size (list
);
3498 if (size
> 0 || unwind
.force_unwind_entry
)
3500 unwind
.force_unwind_entry
= 0;
3501 /* pad to pointer-size boundary. */
3502 pad
= size
% md
.pointer_size
;
3504 size
+= md
.pointer_size
- pad
;
3505 /* Add 8 for the header. */
3507 /* Add a pointer for the personality offset. */
3508 if (unwind
.personality_routine
)
3509 size
+= md
.pointer_size
;
3512 /* If there are unwind records, switch sections, and output the info. */
3516 bfd_reloc_code_real_type reloc
;
3518 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
, 0);
3520 /* Make sure the section has 4 byte alignment for ILP32 and
3521 8 byte alignment for LP64. */
3522 frag_align (md
.pointer_size_shift
, 0, 0);
3523 record_alignment (now_seg
, md
.pointer_size_shift
);
3525 /* Set expression which points to start of unwind descriptor area. */
3526 unwind
.info
= expr_build_dot ();
3528 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3529 (offsetT
) (long) unwind
.personality_routine
,
3532 /* Add the personality address to the image. */
3533 if (unwind
.personality_routine
!= 0)
3535 exp
.X_op
= O_symbol
;
3536 exp
.X_add_symbol
= unwind
.personality_routine
;
3537 exp
.X_add_number
= 0;
3539 if (md
.flags
& EF_IA_64_BE
)
3541 if (md
.flags
& EF_IA_64_ABI64
)
3542 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3544 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3548 if (md
.flags
& EF_IA_64_ABI64
)
3549 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3551 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3554 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3555 md
.pointer_size
, &exp
, 0, reloc
);
3556 unwind
.personality_routine
= 0;
3560 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
, 1);
3562 free_saved_prologue_counts ();
3563 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3567 dot_handlerdata (dummy
)
3568 int dummy ATTRIBUTE_UNUSED
;
3570 if (!in_procedure ("handlerdata"))
3572 unwind
.force_unwind_entry
= 1;
3574 /* Remember which segment we're in so we can switch back after .endp */
3575 unwind
.saved_text_seg
= now_seg
;
3576 unwind
.saved_text_subseg
= now_subseg
;
3578 /* Generate unwind info into unwind-info section and then leave that
3579 section as the currently active one so dataXX directives go into
3580 the language specific data area of the unwind info block. */
3581 generate_unwind_image (now_seg
);
3582 demand_empty_rest_of_line ();
3586 dot_unwentry (dummy
)
3587 int dummy ATTRIBUTE_UNUSED
;
3589 if (!in_procedure ("unwentry"))
3591 unwind
.force_unwind_entry
= 1;
3592 demand_empty_rest_of_line ();
3597 int dummy ATTRIBUTE_UNUSED
;
3602 if (!in_prologue ("altrp"))
3606 reg
= e
.X_add_number
- REG_BR
;
3607 if (e
.X_op
== O_register
&& reg
< 8)
3608 add_unwind_entry (output_rp_br (reg
));
3610 as_bad ("First operand not a valid branch register");
3614 dot_savemem (psprel
)
3621 if (!in_prologue (psprel
? "savepsp" : "savesp"))
3624 sep
= parse_operand (&e1
);
3626 as_bad ("No second operand to .save%ssp", psprel
? "p" : "");
3627 sep
= parse_operand (&e2
);
3629 reg1
= e1
.X_add_number
;
3630 val
= e2
.X_add_number
;
3632 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3633 if (e1
.X_op
== O_register
)
3635 if (e2
.X_op
== O_constant
)
3639 case REG_AR
+ AR_BSP
:
3640 add_unwind_entry (output_bsp_when ());
3641 add_unwind_entry ((psprel
3643 : output_bsp_sprel
) (val
));
3645 case REG_AR
+ AR_BSPSTORE
:
3646 add_unwind_entry (output_bspstore_when ());
3647 add_unwind_entry ((psprel
3648 ? output_bspstore_psprel
3649 : output_bspstore_sprel
) (val
));
3651 case REG_AR
+ AR_RNAT
:
3652 add_unwind_entry (output_rnat_when ());
3653 add_unwind_entry ((psprel
3654 ? output_rnat_psprel
3655 : output_rnat_sprel
) (val
));
3657 case REG_AR
+ AR_UNAT
:
3658 add_unwind_entry (output_unat_when ());
3659 add_unwind_entry ((psprel
3660 ? output_unat_psprel
3661 : output_unat_sprel
) (val
));
3663 case REG_AR
+ AR_FPSR
:
3664 add_unwind_entry (output_fpsr_when ());
3665 add_unwind_entry ((psprel
3666 ? output_fpsr_psprel
3667 : output_fpsr_sprel
) (val
));
3669 case REG_AR
+ AR_PFS
:
3670 add_unwind_entry (output_pfs_when ());
3671 add_unwind_entry ((psprel
3673 : output_pfs_sprel
) (val
));
3675 case REG_AR
+ AR_LC
:
3676 add_unwind_entry (output_lc_when ());
3677 add_unwind_entry ((psprel
3679 : output_lc_sprel
) (val
));
3682 add_unwind_entry (output_rp_when ());
3683 add_unwind_entry ((psprel
3685 : output_rp_sprel
) (val
));
3688 add_unwind_entry (output_preds_when ());
3689 add_unwind_entry ((psprel
3690 ? output_preds_psprel
3691 : output_preds_sprel
) (val
));
3694 add_unwind_entry (output_priunat_when_mem ());
3695 add_unwind_entry ((psprel
3696 ? output_priunat_psprel
3697 : output_priunat_sprel
) (val
));
3700 as_bad ("First operand not a valid register");
3704 as_bad (" Second operand not a valid constant");
3707 as_bad ("First operand not a register");
3712 int dummy ATTRIBUTE_UNUSED
;
3717 if (!in_prologue ("save.g"))
3720 sep
= parse_operand (&e1
);
3722 parse_operand (&e2
);
3724 if (e1
.X_op
!= O_constant
)
3725 as_bad ("First operand to .save.g must be a constant.");
3728 int grmask
= e1
.X_add_number
;
3730 add_unwind_entry (output_gr_mem (grmask
));
3733 int reg
= e2
.X_add_number
- REG_GR
;
3734 if (e2
.X_op
== O_register
&& reg
>= 0 && reg
< 128)
3735 add_unwind_entry (output_gr_gr (grmask
, reg
));
3737 as_bad ("Second operand is an invalid register.");
3744 int dummy ATTRIBUTE_UNUSED
;
3749 if (!in_prologue ("save.f"))
3752 sep
= parse_operand (&e1
);
3754 if (e1
.X_op
!= O_constant
)
3755 as_bad ("Operand to .save.f must be a constant.");
3757 add_unwind_entry (output_fr_mem (e1
.X_add_number
));
3762 int dummy ATTRIBUTE_UNUSED
;
3769 if (!in_prologue ("save.b"))
3772 sep
= parse_operand (&e1
);
3773 if (e1
.X_op
!= O_constant
)
3775 as_bad ("First operand to .save.b must be a constant.");
3778 brmask
= e1
.X_add_number
;
3782 sep
= parse_operand (&e2
);
3783 reg
= e2
.X_add_number
- REG_GR
;
3784 if (e2
.X_op
!= O_register
|| reg
> 127)
3786 as_bad ("Second operand to .save.b must be a general register.");
3789 add_unwind_entry (output_br_gr (brmask
, e2
.X_add_number
));
3792 add_unwind_entry (output_br_mem (brmask
));
3794 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3795 demand_empty_rest_of_line ();
3800 int dummy ATTRIBUTE_UNUSED
;
3805 if (!in_prologue ("save.gf"))
3808 sep
= parse_operand (&e1
);
3810 parse_operand (&e2
);
3812 if (e1
.X_op
!= O_constant
|| sep
!= ',' || e2
.X_op
!= O_constant
)
3813 as_bad ("Both operands of .save.gf must be constants.");
3816 int grmask
= e1
.X_add_number
;
3817 int frmask
= e2
.X_add_number
;
3818 add_unwind_entry (output_frgr_mem (grmask
, frmask
));
3824 int dummy ATTRIBUTE_UNUSED
;
3829 if (!in_prologue ("spill"))
3832 sep
= parse_operand (&e
);
3833 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3834 demand_empty_rest_of_line ();
3836 if (e
.X_op
!= O_constant
)
3837 as_bad ("Operand to .spill must be a constant");
3839 add_unwind_entry (output_spill_base (e
.X_add_number
));
3843 dot_spillreg (dummy
)
3844 int dummy ATTRIBUTE_UNUSED
;
3846 int sep
, ab
, xy
, reg
, treg
;
3849 if (!in_procedure ("spillreg"))
3852 sep
= parse_operand (&e1
);
3855 as_bad ("No second operand to .spillreg");
3859 parse_operand (&e2
);
3861 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3863 as_bad ("First operand to .spillreg must be a preserved register");
3867 if (!convert_expr_to_xy_reg (&e2
, &xy
, &treg
))
3869 as_bad ("Second operand to .spillreg must be a register");
3873 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
));
3877 dot_spillmem (psprel
)
3883 if (!in_procedure ("spillmem"))
3886 sep
= parse_operand (&e1
);
3889 as_bad ("Second operand missing");
3893 parse_operand (&e2
);
3895 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3897 as_bad ("First operand to .spill%s must be a preserved register",
3898 psprel
? "psp" : "sp");
3902 if (e2
.X_op
!= O_constant
)
3904 as_bad ("Second operand to .spill%s must be a constant",
3905 psprel
? "psp" : "sp");
3910 add_unwind_entry (output_spill_psprel (ab
, reg
, e2
.X_add_number
));
3912 add_unwind_entry (output_spill_sprel (ab
, reg
, e2
.X_add_number
));
3916 dot_spillreg_p (dummy
)
3917 int dummy ATTRIBUTE_UNUSED
;
3919 int sep
, ab
, xy
, reg
, treg
;
3920 expressionS e1
, e2
, e3
;
3923 if (!in_procedure ("spillreg.p"))
3926 sep
= parse_operand (&e1
);
3929 as_bad ("No second and third operand to .spillreg.p");
3933 sep
= parse_operand (&e2
);
3936 as_bad ("No third operand to .spillreg.p");
3940 parse_operand (&e3
);
3942 qp
= e1
.X_add_number
- REG_P
;
3944 if (e1
.X_op
!= O_register
|| qp
> 63)
3946 as_bad ("First operand to .spillreg.p must be a predicate");
3950 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3952 as_bad ("Second operand to .spillreg.p must be a preserved register");
3956 if (!convert_expr_to_xy_reg (&e3
, &xy
, &treg
))
3958 as_bad ("Third operand to .spillreg.p must be a register");
3962 add_unwind_entry (output_spill_reg_p (ab
, reg
, treg
, xy
, qp
));
3966 dot_spillmem_p (psprel
)
3969 expressionS e1
, e2
, e3
;
3973 if (!in_procedure ("spillmem.p"))
3976 sep
= parse_operand (&e1
);
3979 as_bad ("Second operand missing");
3983 parse_operand (&e2
);
3986 as_bad ("Second operand missing");
3990 parse_operand (&e3
);
3992 qp
= e1
.X_add_number
- REG_P
;
3993 if (e1
.X_op
!= O_register
|| qp
> 63)
3995 as_bad ("First operand to .spill%s_p must be a predicate",
3996 psprel
? "psp" : "sp");
4000 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4002 as_bad ("Second operand to .spill%s_p must be a preserved register",
4003 psprel
? "psp" : "sp");
4007 if (e3
.X_op
!= O_constant
)
4009 as_bad ("Third operand to .spill%s_p must be a constant",
4010 psprel
? "psp" : "sp");
4015 add_unwind_entry (output_spill_psprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4017 add_unwind_entry (output_spill_sprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4021 get_saved_prologue_count (lbl
)
4024 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4026 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4030 return lpc
->prologue_count
;
4032 as_bad ("Missing .label_state %ld", lbl
);
4037 save_prologue_count (lbl
, count
)
4041 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4043 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4047 lpc
->prologue_count
= count
;
4050 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4052 new_lpc
->next
= unwind
.saved_prologue_counts
;
4053 new_lpc
->label_number
= lbl
;
4054 new_lpc
->prologue_count
= count
;
4055 unwind
.saved_prologue_counts
= new_lpc
;
4060 free_saved_prologue_counts ()
4062 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4063 label_prologue_count
*next
;
4072 unwind
.saved_prologue_counts
= NULL
;
4076 dot_label_state (dummy
)
4077 int dummy ATTRIBUTE_UNUSED
;
4081 if (!in_body ("label_state"))
4085 if (e
.X_op
!= O_constant
)
4087 as_bad ("Operand to .label_state must be a constant");
4090 add_unwind_entry (output_label_state (e
.X_add_number
));
4091 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4095 dot_copy_state (dummy
)
4096 int dummy ATTRIBUTE_UNUSED
;
4100 if (!in_body ("copy_state"))
4104 if (e
.X_op
!= O_constant
)
4106 as_bad ("Operand to .copy_state must be a constant");
4109 add_unwind_entry (output_copy_state (e
.X_add_number
));
4110 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4115 int dummy ATTRIBUTE_UNUSED
;
4120 if (!in_procedure ("unwabi"))
4123 sep
= parse_operand (&e1
);
4126 as_bad ("Second operand to .unwabi missing");
4129 sep
= parse_operand (&e2
);
4130 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4131 demand_empty_rest_of_line ();
4133 if (e1
.X_op
!= O_constant
)
4135 as_bad ("First operand to .unwabi must be a constant");
4139 if (e2
.X_op
!= O_constant
)
4141 as_bad ("Second operand to .unwabi must be a constant");
4145 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
));
4149 dot_personality (dummy
)
4150 int dummy ATTRIBUTE_UNUSED
;
4153 if (!in_procedure ("personality"))
4156 name
= input_line_pointer
;
4157 c
= get_symbol_end ();
4158 p
= input_line_pointer
;
4159 unwind
.personality_routine
= symbol_find_or_make (name
);
4160 unwind
.force_unwind_entry
= 1;
4163 demand_empty_rest_of_line ();
4168 int dummy ATTRIBUTE_UNUSED
;
4173 unwind
.proc_start
= 0;
4174 /* Parse names of main and alternate entry points and mark them as
4175 function symbols: */
4179 name
= input_line_pointer
;
4180 c
= get_symbol_end ();
4181 p
= input_line_pointer
;
4183 as_bad ("Empty argument of .proc");
4186 sym
= symbol_find_or_make (name
);
4187 if (S_IS_DEFINED (sym
))
4188 as_bad ("`%s' was already defined", name
);
4189 else if (unwind
.proc_start
== 0)
4191 unwind
.proc_start
= sym
;
4193 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4197 if (*input_line_pointer
!= ',')
4199 ++input_line_pointer
;
4201 if (unwind
.proc_start
== 0)
4202 unwind
.proc_start
= expr_build_dot ();
4203 demand_empty_rest_of_line ();
4206 unwind
.prologue
= 0;
4207 unwind
.prologue_count
= 0;
4210 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4211 unwind
.personality_routine
= 0;
4216 int dummy ATTRIBUTE_UNUSED
;
4218 if (!in_procedure ("body"))
4220 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4221 as_warn ("Initial .body should precede any instructions");
4223 unwind
.prologue
= 0;
4224 unwind
.prologue_mask
= 0;
4227 add_unwind_entry (output_body ());
4228 demand_empty_rest_of_line ();
4232 dot_prologue (dummy
)
4233 int dummy ATTRIBUTE_UNUSED
;
4236 int mask
= 0, grsave
= 0;
4238 if (!in_procedure ("prologue"))
4240 if (unwind
.prologue
)
4242 as_bad (".prologue within prologue");
4243 ignore_rest_of_line ();
4246 if (!unwind
.body
&& unwind
.insn
)
4247 as_warn ("Initial .prologue should precede any instructions");
4249 if (!is_it_end_of_statement ())
4252 sep
= parse_operand (&e1
);
4254 as_bad ("No second operand to .prologue");
4255 sep
= parse_operand (&e2
);
4256 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4257 demand_empty_rest_of_line ();
4259 if (e1
.X_op
== O_constant
)
4261 mask
= e1
.X_add_number
;
4263 if (e2
.X_op
== O_constant
)
4264 grsave
= e2
.X_add_number
;
4265 else if (e2
.X_op
== O_register
4266 && (grsave
= e2
.X_add_number
- REG_GR
) < 128)
4269 as_bad ("Second operand not a constant or general register");
4271 add_unwind_entry (output_prologue_gr (mask
, grsave
));
4274 as_bad ("First operand not a constant");
4277 add_unwind_entry (output_prologue ());
4279 unwind
.prologue
= 1;
4280 unwind
.prologue_mask
= mask
;
4282 ++unwind
.prologue_count
;
4287 int dummy ATTRIBUTE_UNUSED
;
4291 int bytes_per_address
;
4294 subsegT saved_subseg
;
4298 if (!in_procedure ("endp"))
4301 if (unwind
.saved_text_seg
)
4303 saved_seg
= unwind
.saved_text_seg
;
4304 saved_subseg
= unwind
.saved_text_subseg
;
4305 unwind
.saved_text_seg
= NULL
;
4309 saved_seg
= now_seg
;
4310 saved_subseg
= now_subseg
;
4313 insn_group_break (1, 0, 0);
4315 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4317 generate_unwind_image (saved_seg
);
4319 if (unwind
.info
|| unwind
.force_unwind_entry
)
4323 subseg_set (md
.last_text_seg
, 0);
4324 proc_end
= expr_build_dot ();
4326 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
, 0);
4328 /* Make sure that section has 4 byte alignment for ILP32 and
4329 8 byte alignment for LP64. */
4330 record_alignment (now_seg
, md
.pointer_size_shift
);
4332 /* Need space for 3 pointers for procedure start, procedure end,
4334 ptr
= frag_more (3 * md
.pointer_size
);
4335 where
= frag_now_fix () - (3 * md
.pointer_size
);
4336 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4338 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4339 e
.X_op
= O_pseudo_fixup
;
4340 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4342 e
.X_add_symbol
= unwind
.proc_start
;
4343 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4345 e
.X_op
= O_pseudo_fixup
;
4346 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4348 e
.X_add_symbol
= proc_end
;
4349 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4350 bytes_per_address
, &e
);
4354 e
.X_op
= O_pseudo_fixup
;
4355 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4357 e
.X_add_symbol
= unwind
.info
;
4358 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4359 bytes_per_address
, &e
);
4362 md_number_to_chars (ptr
+ (bytes_per_address
* 2), 0,
4367 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
, 1);
4369 subseg_set (saved_seg
, saved_subseg
);
4371 /* Parse names of main and alternate entry points and set symbol sizes. */
4375 name
= input_line_pointer
;
4376 c
= get_symbol_end ();
4377 p
= input_line_pointer
;
4379 as_bad ("Empty argument of .endp");
4382 sym
= symbol_find (name
);
4383 if (!sym
|| !S_IS_DEFINED (sym
))
4384 as_bad ("`%s' was not defined within procedure", name
);
4385 else if (unwind
.proc_start
4386 && (symbol_get_bfdsym (sym
)->flags
& BSF_FUNCTION
)
4387 && S_GET_SIZE (sym
) == 0 && symbol_get_obj (sym
)->size
== NULL
)
4389 fragS
*fr
= symbol_get_frag (unwind
.proc_start
);
4390 fragS
*frag
= symbol_get_frag (sym
);
4392 /* Check whether the function label is at or beyond last
4394 while (fr
&& fr
!= frag
)
4398 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4399 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4402 symbol_get_obj (sym
)->size
=
4403 (expressionS
*) xmalloc (sizeof (expressionS
));
4404 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4405 symbol_get_obj (sym
)->size
->X_add_symbol
4406 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4407 frag_now_fix (), frag_now
);
4408 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4409 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4416 if (*input_line_pointer
!= ',')
4418 ++input_line_pointer
;
4420 demand_empty_rest_of_line ();
4421 unwind
.proc_start
= unwind
.info
= 0;
4425 dot_template (template)
4428 CURR_SLOT
.user_template
= template;
4433 int dummy ATTRIBUTE_UNUSED
;
4435 int ins
, locs
, outs
, rots
;
4437 if (is_it_end_of_statement ())
4438 ins
= locs
= outs
= rots
= 0;
4441 ins
= get_absolute_expression ();
4442 if (*input_line_pointer
++ != ',')
4444 locs
= get_absolute_expression ();
4445 if (*input_line_pointer
++ != ',')
4447 outs
= get_absolute_expression ();
4448 if (*input_line_pointer
++ != ',')
4450 rots
= get_absolute_expression ();
4452 set_regstack (ins
, locs
, outs
, rots
);
4456 as_bad ("Comma expected");
4457 ignore_rest_of_line ();
4464 unsigned num_regs
, num_alloced
= 0;
4465 struct dynreg
**drpp
, *dr
;
4466 int ch
, base_reg
= 0;
4472 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4473 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4474 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4478 /* First, remove existing names from hash table. */
4479 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4481 hash_delete (md
.dynreg_hash
, dr
->name
);
4485 drpp
= &md
.dynreg
[type
];
4488 start
= input_line_pointer
;
4489 ch
= get_symbol_end ();
4490 *input_line_pointer
= ch
;
4491 len
= (input_line_pointer
- start
);
4494 if (*input_line_pointer
!= '[')
4496 as_bad ("Expected '['");
4499 ++input_line_pointer
; /* skip '[' */
4501 num_regs
= get_absolute_expression ();
4503 if (*input_line_pointer
++ != ']')
4505 as_bad ("Expected ']'");
4510 num_alloced
+= num_regs
;
4514 if (num_alloced
> md
.rot
.num_regs
)
4516 as_bad ("Used more than the declared %d rotating registers",
4522 if (num_alloced
> 96)
4524 as_bad ("Used more than the available 96 rotating registers");
4529 if (num_alloced
> 48)
4531 as_bad ("Used more than the available 48 rotating registers");
4540 name
= obstack_alloc (¬es
, len
+ 1);
4541 memcpy (name
, start
, len
);
4546 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4547 memset (*drpp
, 0, sizeof (*dr
));
4552 dr
->num_regs
= num_regs
;
4553 dr
->base
= base_reg
;
4555 base_reg
+= num_regs
;
4557 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4559 as_bad ("Attempt to redefine register set `%s'", name
);
4563 if (*input_line_pointer
!= ',')
4565 ++input_line_pointer
; /* skip comma */
4568 demand_empty_rest_of_line ();
4572 ignore_rest_of_line ();
4576 dot_byteorder (byteorder
)
4579 segment_info_type
*seginfo
= seg_info (now_seg
);
4581 if (byteorder
== -1)
4583 if (seginfo
->tc_segment_info_data
.endian
== 0)
4584 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4585 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4588 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4590 if (target_big_endian
!= byteorder
)
4592 target_big_endian
= byteorder
;
4593 if (target_big_endian
)
4595 ia64_number_to_chars
= number_to_chars_bigendian
;
4596 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4600 ia64_number_to_chars
= number_to_chars_littleendian
;
4601 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4608 int dummy ATTRIBUTE_UNUSED
;
4615 option
= input_line_pointer
;
4616 ch
= get_symbol_end ();
4617 if (strcmp (option
, "lsb") == 0)
4618 md
.flags
&= ~EF_IA_64_BE
;
4619 else if (strcmp (option
, "msb") == 0)
4620 md
.flags
|= EF_IA_64_BE
;
4621 else if (strcmp (option
, "abi32") == 0)
4622 md
.flags
&= ~EF_IA_64_ABI64
;
4623 else if (strcmp (option
, "abi64") == 0)
4624 md
.flags
|= EF_IA_64_ABI64
;
4626 as_bad ("Unknown psr option `%s'", option
);
4627 *input_line_pointer
= ch
;
4630 if (*input_line_pointer
!= ',')
4633 ++input_line_pointer
;
4636 demand_empty_rest_of_line ();
4641 int dummy ATTRIBUTE_UNUSED
;
4643 new_logical_line (0, get_absolute_expression ());
4644 demand_empty_rest_of_line ();
4648 parse_section_name ()
4654 if (*input_line_pointer
== '"')
4655 name
= demand_copy_C_string (&len
);
4658 char *start
= input_line_pointer
;
4659 char c
= get_symbol_end ();
4661 if (input_line_pointer
== start
)
4663 as_bad ("Missing section name");
4664 ignore_rest_of_line ();
4667 name
= obstack_copy (¬es
, start
, input_line_pointer
- start
+ 1);
4668 *input_line_pointer
= c
;
4672 ignore_rest_of_line ();
4676 if (*input_line_pointer
!= ',')
4678 as_bad ("Comma expected after section name");
4679 ignore_rest_of_line ();
4682 ++input_line_pointer
; /* skip comma */
4690 char *name
= parse_section_name ();
4694 md
.keep_pending_output
= 1;
4696 obstack_free (¬es
, name
);
4698 obj_elf_previous (0);
4699 md
.keep_pending_output
= 0;
4702 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4705 stmt_float_cons (kind
)
4726 ia64_do_align (alignment
);
4734 int saved_auto_align
= md
.auto_align
;
4738 md
.auto_align
= saved_auto_align
;
4742 dot_xfloat_cons (kind
)
4745 char *name
= parse_section_name ();
4749 md
.keep_pending_output
= 1;
4751 obstack_free (¬es
, name
);
4752 stmt_float_cons (kind
);
4753 obj_elf_previous (0);
4754 md
.keep_pending_output
= 0;
4758 dot_xstringer (zero
)
4761 char *name
= parse_section_name ();
4765 md
.keep_pending_output
= 1;
4767 obstack_free (¬es
, name
);
4769 obj_elf_previous (0);
4770 md
.keep_pending_output
= 0;
4777 int saved_auto_align
= md
.auto_align
;
4778 char *name
= parse_section_name ();
4782 md
.keep_pending_output
= 1;
4784 obstack_free (¬es
, name
);
4787 md
.auto_align
= saved_auto_align
;
4788 obj_elf_previous (0);
4789 md
.keep_pending_output
= 0;
4793 dot_xfloat_cons_ua (kind
)
4796 int saved_auto_align
= md
.auto_align
;
4797 char *name
= parse_section_name ();
4801 md
.keep_pending_output
= 1;
4803 obstack_free (¬es
, name
);
4805 stmt_float_cons (kind
);
4806 md
.auto_align
= saved_auto_align
;
4807 obj_elf_previous (0);
4808 md
.keep_pending_output
= 0;
4811 /* .reg.val <regname>,value */
4815 int dummy ATTRIBUTE_UNUSED
;
4820 if (reg
.X_op
!= O_register
)
4822 as_bad (_("Register name expected"));
4823 ignore_rest_of_line ();
4825 else if (*input_line_pointer
++ != ',')
4827 as_bad (_("Comma expected"));
4828 ignore_rest_of_line ();
4832 valueT value
= get_absolute_expression ();
4833 int regno
= reg
.X_add_number
;
4834 if (regno
< REG_GR
|| regno
> REG_GR
+ 128)
4835 as_warn (_("Register value annotation ignored"));
4838 gr_values
[regno
- REG_GR
].known
= 1;
4839 gr_values
[regno
- REG_GR
].value
= value
;
4840 gr_values
[regno
- REG_GR
].path
= md
.path
;
4843 demand_empty_rest_of_line ();
4848 .serialize.instruction
4851 dot_serialize (type
)
4854 insn_group_break (0, 0, 0);
4856 instruction_serialization ();
4858 data_serialization ();
4859 insn_group_break (0, 0, 0);
4860 demand_empty_rest_of_line ();
4863 /* select dv checking mode
4868 A stop is inserted when changing modes
4875 if (md
.manual_bundling
)
4876 as_warn (_("Directive invalid within a bundle"));
4878 if (type
== 'E' || type
== 'A')
4879 md
.mode_explicitly_set
= 0;
4881 md
.mode_explicitly_set
= 1;
4888 if (md
.explicit_mode
)
4889 insn_group_break (1, 0, 0);
4890 md
.explicit_mode
= 0;
4894 if (!md
.explicit_mode
)
4895 insn_group_break (1, 0, 0);
4896 md
.explicit_mode
= 1;
4900 if (md
.explicit_mode
!= md
.default_explicit_mode
)
4901 insn_group_break (1, 0, 0);
4902 md
.explicit_mode
= md
.default_explicit_mode
;
4903 md
.mode_explicitly_set
= 0;
4914 for (regno
= 0; regno
< 64; regno
++)
4916 if (mask
& ((valueT
) 1 << regno
))
4918 fprintf (stderr
, "%s p%d", comma
, regno
);
4925 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
4926 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
4927 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
4928 .pred.safe_across_calls p1 [, p2 [,...]]
4937 int p1
= -1, p2
= -1;
4941 if (*input_line_pointer
== '"')
4944 char *form
= demand_copy_C_string (&len
);
4946 if (strcmp (form
, "mutex") == 0)
4948 else if (strcmp (form
, "clear") == 0)
4950 else if (strcmp (form
, "imply") == 0)
4952 obstack_free (¬es
, form
);
4954 else if (*input_line_pointer
== '@')
4956 char *form
= ++input_line_pointer
;
4957 char c
= get_symbol_end();
4959 if (strcmp (form
, "mutex") == 0)
4961 else if (strcmp (form
, "clear") == 0)
4963 else if (strcmp (form
, "imply") == 0)
4965 *input_line_pointer
= c
;
4969 as_bad (_("Missing predicate relation type"));
4970 ignore_rest_of_line ();
4975 as_bad (_("Unrecognized predicate relation type"));
4976 ignore_rest_of_line ();
4979 if (*input_line_pointer
== ',')
4980 ++input_line_pointer
;
4990 if (TOUPPER (*input_line_pointer
) != 'P'
4991 || (regno
= atoi (++input_line_pointer
)) < 0
4994 as_bad (_("Predicate register expected"));
4995 ignore_rest_of_line ();
4998 while (ISDIGIT (*input_line_pointer
))
4999 ++input_line_pointer
;
5006 as_warn (_("Duplicate predicate register ignored"));
5009 /* See if it's a range. */
5010 if (*input_line_pointer
== '-')
5013 ++input_line_pointer
;
5015 if (TOUPPER (*input_line_pointer
) != 'P'
5016 || (regno
= atoi (++input_line_pointer
)) < 0
5019 as_bad (_("Predicate register expected"));
5020 ignore_rest_of_line ();
5023 while (ISDIGIT (*input_line_pointer
))
5024 ++input_line_pointer
;
5028 as_bad (_("Bad register range"));
5029 ignore_rest_of_line ();
5040 if (*input_line_pointer
!= ',')
5042 ++input_line_pointer
;
5051 clear_qp_mutex (mask
);
5052 clear_qp_implies (mask
, (valueT
) 0);
5055 if (count
!= 2 || p1
== -1 || p2
== -1)
5056 as_bad (_("Predicate source and target required"));
5057 else if (p1
== 0 || p2
== 0)
5058 as_bad (_("Use of p0 is not valid in this context"));
5060 add_qp_imply (p1
, p2
);
5065 as_bad (_("At least two PR arguments expected"));
5070 as_bad (_("Use of p0 is not valid in this context"));
5073 add_qp_mutex (mask
);
5076 /* note that we don't override any existing relations */
5079 as_bad (_("At least one PR argument expected"));
5084 fprintf (stderr
, "Safe across calls: ");
5085 print_prmask (mask
);
5086 fprintf (stderr
, "\n");
5088 qp_safe_across_calls
= mask
;
5091 demand_empty_rest_of_line ();
5094 /* .entry label [, label [, ...]]
5095 Hint to DV code that the given labels are to be considered entry points.
5096 Otherwise, only global labels are considered entry points. */
5100 int dummy ATTRIBUTE_UNUSED
;
5109 name
= input_line_pointer
;
5110 c
= get_symbol_end ();
5111 symbolP
= symbol_find_or_make (name
);
5113 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
5115 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5118 *input_line_pointer
= c
;
5120 c
= *input_line_pointer
;
5123 input_line_pointer
++;
5125 if (*input_line_pointer
== '\n')
5131 demand_empty_rest_of_line ();
5134 /* .mem.offset offset, base
5135 "base" is used to distinguish between offsets from a different base. */
5138 dot_mem_offset (dummy
)
5139 int dummy ATTRIBUTE_UNUSED
;
5141 md
.mem_offset
.hint
= 1;
5142 md
.mem_offset
.offset
= get_absolute_expression ();
5143 if (*input_line_pointer
!= ',')
5145 as_bad (_("Comma expected"));
5146 ignore_rest_of_line ();
5149 ++input_line_pointer
;
5150 md
.mem_offset
.base
= get_absolute_expression ();
5151 demand_empty_rest_of_line ();
5154 /* ia64-specific pseudo-ops: */
5155 const pseudo_typeS md_pseudo_table
[] =
5157 { "radix", dot_radix
, 0 },
5158 { "lcomm", s_lcomm_bytes
, 1 },
5159 { "loc", dot_loc
, 0 },
5160 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5161 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5162 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5163 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5164 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5165 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5166 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5167 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5168 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5169 { "proc", dot_proc
, 0 },
5170 { "body", dot_body
, 0 },
5171 { "prologue", dot_prologue
, 0 },
5172 { "endp", dot_endp
, 0 },
5174 { "fframe", dot_fframe
, 0 },
5175 { "vframe", dot_vframe
, 0 },
5176 { "vframesp", dot_vframesp
, 0 },
5177 { "vframepsp", dot_vframepsp
, 0 },
5178 { "save", dot_save
, 0 },
5179 { "restore", dot_restore
, 0 },
5180 { "restorereg", dot_restorereg
, 0 },
5181 { "restorereg.p", dot_restorereg_p
, 0 },
5182 { "handlerdata", dot_handlerdata
, 0 },
5183 { "unwentry", dot_unwentry
, 0 },
5184 { "altrp", dot_altrp
, 0 },
5185 { "savesp", dot_savemem
, 0 },
5186 { "savepsp", dot_savemem
, 1 },
5187 { "save.g", dot_saveg
, 0 },
5188 { "save.f", dot_savef
, 0 },
5189 { "save.b", dot_saveb
, 0 },
5190 { "save.gf", dot_savegf
, 0 },
5191 { "spill", dot_spill
, 0 },
5192 { "spillreg", dot_spillreg
, 0 },
5193 { "spillsp", dot_spillmem
, 0 },
5194 { "spillpsp", dot_spillmem
, 1 },
5195 { "spillreg.p", dot_spillreg_p
, 0 },
5196 { "spillsp.p", dot_spillmem_p
, 0 },
5197 { "spillpsp.p", dot_spillmem_p
, 1 },
5198 { "label_state", dot_label_state
, 0 },
5199 { "copy_state", dot_copy_state
, 0 },
5200 { "unwabi", dot_unwabi
, 0 },
5201 { "personality", dot_personality
, 0 },
5202 { "mii", dot_template
, 0x0 },
5203 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5204 { "mlx", dot_template
, 0x2 },
5205 { "mmi", dot_template
, 0x4 },
5206 { "mfi", dot_template
, 0x6 },
5207 { "mmf", dot_template
, 0x7 },
5208 { "mib", dot_template
, 0x8 },
5209 { "mbb", dot_template
, 0x9 },
5210 { "bbb", dot_template
, 0xb },
5211 { "mmb", dot_template
, 0xc },
5212 { "mfb", dot_template
, 0xe },
5213 { "align", dot_align
, 0 },
5214 { "regstk", dot_regstk
, 0 },
5215 { "rotr", dot_rot
, DYNREG_GR
},
5216 { "rotf", dot_rot
, DYNREG_FR
},
5217 { "rotp", dot_rot
, DYNREG_PR
},
5218 { "lsb", dot_byteorder
, 0 },
5219 { "msb", dot_byteorder
, 1 },
5220 { "psr", dot_psr
, 0 },
5221 { "alias", dot_alias
, 0 },
5222 { "secalias", dot_alias
, 1 },
5223 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5225 { "xdata1", dot_xdata
, 1 },
5226 { "xdata2", dot_xdata
, 2 },
5227 { "xdata4", dot_xdata
, 4 },
5228 { "xdata8", dot_xdata
, 8 },
5229 { "xdata16", dot_xdata
, 16 },
5230 { "xreal4", dot_xfloat_cons
, 'f' },
5231 { "xreal8", dot_xfloat_cons
, 'd' },
5232 { "xreal10", dot_xfloat_cons
, 'x' },
5233 { "xreal16", dot_xfloat_cons
, 'X' },
5234 { "xstring", dot_xstringer
, 0 },
5235 { "xstringz", dot_xstringer
, 1 },
5237 /* unaligned versions: */
5238 { "xdata2.ua", dot_xdata_ua
, 2 },
5239 { "xdata4.ua", dot_xdata_ua
, 4 },
5240 { "xdata8.ua", dot_xdata_ua
, 8 },
5241 { "xdata16.ua", dot_xdata_ua
, 16 },
5242 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5243 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5244 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5245 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5247 /* annotations/DV checking support */
5248 { "entry", dot_entry
, 0 },
5249 { "mem.offset", dot_mem_offset
, 0 },
5250 { "pred.rel", dot_pred_rel
, 0 },
5251 { "pred.rel.clear", dot_pred_rel
, 'c' },
5252 { "pred.rel.imply", dot_pred_rel
, 'i' },
5253 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5254 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5255 { "reg.val", dot_reg_val
, 0 },
5256 { "serialize.data", dot_serialize
, 0 },
5257 { "serialize.instruction", dot_serialize
, 1 },
5258 { "auto", dot_dv_mode
, 'a' },
5259 { "explicit", dot_dv_mode
, 'e' },
5260 { "default", dot_dv_mode
, 'd' },
5262 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5263 IA-64 aligns data allocation pseudo-ops by default, so we have to
5264 tell it that these ones are supposed to be unaligned. Long term,
5265 should rewrite so that only IA-64 specific data allocation pseudo-ops
5266 are aligned by default. */
5267 {"2byte", stmt_cons_ua
, 2},
5268 {"4byte", stmt_cons_ua
, 4},
5269 {"8byte", stmt_cons_ua
, 8},
5274 static const struct pseudo_opcode
5277 void (*handler
) (int);
5282 /* these are more like pseudo-ops, but don't start with a dot */
5283 { "data1", cons
, 1 },
5284 { "data2", cons
, 2 },
5285 { "data4", cons
, 4 },
5286 { "data8", cons
, 8 },
5287 { "data16", cons
, 16 },
5288 { "real4", stmt_float_cons
, 'f' },
5289 { "real8", stmt_float_cons
, 'd' },
5290 { "real10", stmt_float_cons
, 'x' },
5291 { "real16", stmt_float_cons
, 'X' },
5292 { "string", stringer
, 0 },
5293 { "stringz", stringer
, 1 },
5295 /* unaligned versions: */
5296 { "data2.ua", stmt_cons_ua
, 2 },
5297 { "data4.ua", stmt_cons_ua
, 4 },
5298 { "data8.ua", stmt_cons_ua
, 8 },
5299 { "data16.ua", stmt_cons_ua
, 16 },
5300 { "real4.ua", float_cons
, 'f' },
5301 { "real8.ua", float_cons
, 'd' },
5302 { "real10.ua", float_cons
, 'x' },
5303 { "real16.ua", float_cons
, 'X' },
5306 /* Declare a register by creating a symbol for it and entering it in
5307 the symbol table. */
5310 declare_register (name
, regnum
)
5317 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
5319 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5321 as_fatal ("Inserting \"%s\" into register table failed: %s",
5328 declare_register_set (prefix
, num_regs
, base_regnum
)
5336 for (i
= 0; i
< num_regs
; ++i
)
5338 sprintf (name
, "%s%u", prefix
, i
);
5339 declare_register (name
, base_regnum
+ i
);
5344 operand_width (opnd
)
5345 enum ia64_opnd opnd
;
5347 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5348 unsigned int bits
= 0;
5352 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5353 bits
+= odesc
->field
[i
].bits
;
5358 static enum operand_match_result
5359 operand_match (idesc
, index
, e
)
5360 const struct ia64_opcode
*idesc
;
5364 enum ia64_opnd opnd
= idesc
->operands
[index
];
5365 int bits
, relocatable
= 0;
5366 struct insn_fix
*fix
;
5373 case IA64_OPND_AR_CCV
:
5374 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5375 return OPERAND_MATCH
;
5378 case IA64_OPND_AR_CSD
:
5379 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5380 return OPERAND_MATCH
;
5383 case IA64_OPND_AR_PFS
:
5384 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5385 return OPERAND_MATCH
;
5389 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5390 return OPERAND_MATCH
;
5394 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5395 return OPERAND_MATCH
;
5399 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5400 return OPERAND_MATCH
;
5403 case IA64_OPND_PR_ROT
:
5404 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5405 return OPERAND_MATCH
;
5409 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5410 return OPERAND_MATCH
;
5413 case IA64_OPND_PSR_L
:
5414 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5415 return OPERAND_MATCH
;
5418 case IA64_OPND_PSR_UM
:
5419 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5420 return OPERAND_MATCH
;
5424 if (e
->X_op
== O_constant
)
5426 if (e
->X_add_number
== 1)
5427 return OPERAND_MATCH
;
5429 return OPERAND_OUT_OF_RANGE
;
5434 if (e
->X_op
== O_constant
)
5436 if (e
->X_add_number
== 8)
5437 return OPERAND_MATCH
;
5439 return OPERAND_OUT_OF_RANGE
;
5444 if (e
->X_op
== O_constant
)
5446 if (e
->X_add_number
== 16)
5447 return OPERAND_MATCH
;
5449 return OPERAND_OUT_OF_RANGE
;
5453 /* register operands: */
5456 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5457 && e
->X_add_number
< REG_AR
+ 128)
5458 return OPERAND_MATCH
;
5463 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5464 && e
->X_add_number
< REG_BR
+ 8)
5465 return OPERAND_MATCH
;
5469 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5470 && e
->X_add_number
< REG_CR
+ 128)
5471 return OPERAND_MATCH
;
5478 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5479 && e
->X_add_number
< REG_FR
+ 128)
5480 return OPERAND_MATCH
;
5485 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5486 && e
->X_add_number
< REG_P
+ 64)
5487 return OPERAND_MATCH
;
5493 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5494 && e
->X_add_number
< REG_GR
+ 128)
5495 return OPERAND_MATCH
;
5498 case IA64_OPND_R3_2
:
5499 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5501 if (e
->X_add_number
< REG_GR
+ 4)
5502 return OPERAND_MATCH
;
5503 else if (e
->X_add_number
< REG_GR
+ 128)
5504 return OPERAND_OUT_OF_RANGE
;
5508 /* indirect operands: */
5509 case IA64_OPND_CPUID_R3
:
5510 case IA64_OPND_DBR_R3
:
5511 case IA64_OPND_DTR_R3
:
5512 case IA64_OPND_ITR_R3
:
5513 case IA64_OPND_IBR_R3
:
5514 case IA64_OPND_MSR_R3
:
5515 case IA64_OPND_PKR_R3
:
5516 case IA64_OPND_PMC_R3
:
5517 case IA64_OPND_PMD_R3
:
5518 case IA64_OPND_RR_R3
:
5519 if (e
->X_op
== O_index
&& e
->X_op_symbol
5520 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5521 == opnd
- IA64_OPND_CPUID_R3
))
5522 return OPERAND_MATCH
;
5526 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5527 return OPERAND_MATCH
;
5530 /* immediate operands: */
5531 case IA64_OPND_CNT2a
:
5532 case IA64_OPND_LEN4
:
5533 case IA64_OPND_LEN6
:
5534 bits
= operand_width (idesc
->operands
[index
]);
5535 if (e
->X_op
== O_constant
)
5537 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5538 return OPERAND_MATCH
;
5540 return OPERAND_OUT_OF_RANGE
;
5544 case IA64_OPND_CNT2b
:
5545 if (e
->X_op
== O_constant
)
5547 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5548 return OPERAND_MATCH
;
5550 return OPERAND_OUT_OF_RANGE
;
5554 case IA64_OPND_CNT2c
:
5555 val
= e
->X_add_number
;
5556 if (e
->X_op
== O_constant
)
5558 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5559 return OPERAND_MATCH
;
5561 return OPERAND_OUT_OF_RANGE
;
5566 /* SOR must be an integer multiple of 8 */
5567 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5568 return OPERAND_OUT_OF_RANGE
;
5571 if (e
->X_op
== O_constant
)
5573 if ((bfd_vma
) e
->X_add_number
<= 96)
5574 return OPERAND_MATCH
;
5576 return OPERAND_OUT_OF_RANGE
;
5580 case IA64_OPND_IMMU62
:
5581 if (e
->X_op
== O_constant
)
5583 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5584 return OPERAND_MATCH
;
5586 return OPERAND_OUT_OF_RANGE
;
5590 /* FIXME -- need 62-bit relocation type */
5591 as_bad (_("62-bit relocation not yet implemented"));
5595 case IA64_OPND_IMMU64
:
5596 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5597 || e
->X_op
== O_subtract
)
5599 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5600 fix
->code
= BFD_RELOC_IA64_IMM64
;
5601 if (e
->X_op
!= O_subtract
)
5603 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5604 if (e
->X_op
== O_pseudo_fixup
)
5608 fix
->opnd
= idesc
->operands
[index
];
5611 ++CURR_SLOT
.num_fixups
;
5612 return OPERAND_MATCH
;
5614 else if (e
->X_op
== O_constant
)
5615 return OPERAND_MATCH
;
5618 case IA64_OPND_CCNT5
:
5619 case IA64_OPND_CNT5
:
5620 case IA64_OPND_CNT6
:
5621 case IA64_OPND_CPOS6a
:
5622 case IA64_OPND_CPOS6b
:
5623 case IA64_OPND_CPOS6c
:
5624 case IA64_OPND_IMMU2
:
5625 case IA64_OPND_IMMU7a
:
5626 case IA64_OPND_IMMU7b
:
5627 case IA64_OPND_IMMU21
:
5628 case IA64_OPND_IMMU24
:
5629 case IA64_OPND_MBTYPE4
:
5630 case IA64_OPND_MHTYPE8
:
5631 case IA64_OPND_POS6
:
5632 bits
= operand_width (idesc
->operands
[index
]);
5633 if (e
->X_op
== O_constant
)
5635 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5636 return OPERAND_MATCH
;
5638 return OPERAND_OUT_OF_RANGE
;
5642 case IA64_OPND_IMMU9
:
5643 bits
= operand_width (idesc
->operands
[index
]);
5644 if (e
->X_op
== O_constant
)
5646 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5648 int lobits
= e
->X_add_number
& 0x3;
5649 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5650 e
->X_add_number
|= (bfd_vma
) 0x3;
5651 return OPERAND_MATCH
;
5654 return OPERAND_OUT_OF_RANGE
;
5658 case IA64_OPND_IMM44
:
5659 /* least 16 bits must be zero */
5660 if ((e
->X_add_number
& 0xffff) != 0)
5661 /* XXX technically, this is wrong: we should not be issuing warning
5662 messages until we're sure this instruction pattern is going to
5664 as_warn (_("lower 16 bits of mask ignored"));
5666 if (e
->X_op
== O_constant
)
5668 if (((e
->X_add_number
>= 0
5669 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5670 || (e
->X_add_number
< 0
5671 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5674 if (e
->X_add_number
>= 0
5675 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5677 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5679 return OPERAND_MATCH
;
5682 return OPERAND_OUT_OF_RANGE
;
5686 case IA64_OPND_IMM17
:
5687 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5688 if (e
->X_op
== O_constant
)
5690 if (((e
->X_add_number
>= 0
5691 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5692 || (e
->X_add_number
< 0
5693 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5696 if (e
->X_add_number
>= 0
5697 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5699 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5701 return OPERAND_MATCH
;
5704 return OPERAND_OUT_OF_RANGE
;
5708 case IA64_OPND_IMM14
:
5709 case IA64_OPND_IMM22
:
5711 case IA64_OPND_IMM1
:
5712 case IA64_OPND_IMM8
:
5713 case IA64_OPND_IMM8U4
:
5714 case IA64_OPND_IMM8M1
:
5715 case IA64_OPND_IMM8M1U4
:
5716 case IA64_OPND_IMM8M1U8
:
5717 case IA64_OPND_IMM9a
:
5718 case IA64_OPND_IMM9b
:
5719 bits
= operand_width (idesc
->operands
[index
]);
5720 if (relocatable
&& (e
->X_op
== O_symbol
5721 || e
->X_op
== O_subtract
5722 || e
->X_op
== O_pseudo_fixup
))
5724 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5726 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5727 fix
->code
= BFD_RELOC_IA64_IMM14
;
5729 fix
->code
= BFD_RELOC_IA64_IMM22
;
5731 if (e
->X_op
!= O_subtract
)
5733 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5734 if (e
->X_op
== O_pseudo_fixup
)
5738 fix
->opnd
= idesc
->operands
[index
];
5741 ++CURR_SLOT
.num_fixups
;
5742 return OPERAND_MATCH
;
5744 else if (e
->X_op
!= O_constant
5745 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5746 return OPERAND_MISMATCH
;
5748 if (opnd
== IA64_OPND_IMM8M1U4
)
5750 /* Zero is not valid for unsigned compares that take an adjusted
5751 constant immediate range. */
5752 if (e
->X_add_number
== 0)
5753 return OPERAND_OUT_OF_RANGE
;
5755 /* Sign-extend 32-bit unsigned numbers, so that the following range
5756 checks will work. */
5757 val
= e
->X_add_number
;
5758 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5759 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5760 val
= ((val
<< 32) >> 32);
5762 /* Check for 0x100000000. This is valid because
5763 0x100000000-1 is the same as ((uint32_t) -1). */
5764 if (val
== ((bfd_signed_vma
) 1 << 32))
5765 return OPERAND_MATCH
;
5769 else if (opnd
== IA64_OPND_IMM8M1U8
)
5771 /* Zero is not valid for unsigned compares that take an adjusted
5772 constant immediate range. */
5773 if (e
->X_add_number
== 0)
5774 return OPERAND_OUT_OF_RANGE
;
5776 /* Check for 0x10000000000000000. */
5777 if (e
->X_op
== O_big
)
5779 if (generic_bignum
[0] == 0
5780 && generic_bignum
[1] == 0
5781 && generic_bignum
[2] == 0
5782 && generic_bignum
[3] == 0
5783 && generic_bignum
[4] == 1)
5784 return OPERAND_MATCH
;
5786 return OPERAND_OUT_OF_RANGE
;
5789 val
= e
->X_add_number
- 1;
5791 else if (opnd
== IA64_OPND_IMM8M1
)
5792 val
= e
->X_add_number
- 1;
5793 else if (opnd
== IA64_OPND_IMM8U4
)
5795 /* Sign-extend 32-bit unsigned numbers, so that the following range
5796 checks will work. */
5797 val
= e
->X_add_number
;
5798 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5799 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5800 val
= ((val
<< 32) >> 32);
5803 val
= e
->X_add_number
;
5805 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5806 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5807 return OPERAND_MATCH
;
5809 return OPERAND_OUT_OF_RANGE
;
5811 case IA64_OPND_INC3
:
5812 /* +/- 1, 4, 8, 16 */
5813 val
= e
->X_add_number
;
5816 if (e
->X_op
== O_constant
)
5818 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5819 return OPERAND_MATCH
;
5821 return OPERAND_OUT_OF_RANGE
;
5825 case IA64_OPND_TGT25
:
5826 case IA64_OPND_TGT25b
:
5827 case IA64_OPND_TGT25c
:
5828 case IA64_OPND_TGT64
:
5829 if (e
->X_op
== O_symbol
)
5831 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5832 if (opnd
== IA64_OPND_TGT25
)
5833 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5834 else if (opnd
== IA64_OPND_TGT25b
)
5835 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5836 else if (opnd
== IA64_OPND_TGT25c
)
5837 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5838 else if (opnd
== IA64_OPND_TGT64
)
5839 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5843 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5844 fix
->opnd
= idesc
->operands
[index
];
5847 ++CURR_SLOT
.num_fixups
;
5848 return OPERAND_MATCH
;
5850 case IA64_OPND_TAG13
:
5851 case IA64_OPND_TAG13b
:
5855 return OPERAND_MATCH
;
5858 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5859 /* There are no external relocs for TAG13/TAG13b fields, so we
5860 create a dummy reloc. This will not live past md_apply_fix3. */
5861 fix
->code
= BFD_RELOC_UNUSED
;
5862 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5863 fix
->opnd
= idesc
->operands
[index
];
5866 ++CURR_SLOT
.num_fixups
;
5867 return OPERAND_MATCH
;
5874 case IA64_OPND_LDXMOV
:
5875 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5876 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5877 fix
->opnd
= idesc
->operands
[index
];
5880 ++CURR_SLOT
.num_fixups
;
5881 return OPERAND_MATCH
;
5886 return OPERAND_MISMATCH
;
5895 memset (e
, 0, sizeof (*e
));
5898 if (*input_line_pointer
!= '}')
5900 sep
= *input_line_pointer
++;
5904 if (!md
.manual_bundling
)
5905 as_warn ("Found '}' when manual bundling is off");
5907 CURR_SLOT
.manual_bundling_off
= 1;
5908 md
.manual_bundling
= 0;
5914 /* Returns the next entry in the opcode table that matches the one in
5915 IDESC, and frees the entry in IDESC. If no matching entry is
5916 found, NULL is returned instead. */
5918 static struct ia64_opcode
*
5919 get_next_opcode (struct ia64_opcode
*idesc
)
5921 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
5922 ia64_free_opcode (idesc
);
5926 /* Parse the operands for the opcode and find the opcode variant that
5927 matches the specified operands, or NULL if no match is possible. */
5929 static struct ia64_opcode
*
5930 parse_operands (idesc
)
5931 struct ia64_opcode
*idesc
;
5933 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
5934 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
5935 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
5936 enum operand_match_result result
;
5938 char *first_arg
= 0, *end
, *saved_input_pointer
;
5941 assert (strlen (idesc
->name
) <= 128);
5943 strcpy (mnemonic
, idesc
->name
);
5944 if (idesc
->operands
[2] == IA64_OPND_SOF
5945 || idesc
->operands
[1] == IA64_OPND_SOF
)
5947 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5948 can't parse the first operand until we have parsed the
5949 remaining operands of the "alloc" instruction. */
5951 first_arg
= input_line_pointer
;
5952 end
= strchr (input_line_pointer
, '=');
5955 as_bad ("Expected separator `='");
5958 input_line_pointer
= end
+ 1;
5965 if (i
< NELEMS (CURR_SLOT
.opnd
))
5967 sep
= parse_operand (CURR_SLOT
.opnd
+ i
);
5968 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
5975 sep
= parse_operand (&dummy
);
5976 if (dummy
.X_op
== O_absent
)
5982 if (sep
!= '=' && sep
!= ',')
5987 if (num_outputs
> 0)
5988 as_bad ("Duplicate equal sign (=) in instruction");
5990 num_outputs
= i
+ 1;
5995 as_bad ("Illegal operand separator `%c'", sep
);
5999 if (idesc
->operands
[2] == IA64_OPND_SOF
6000 || idesc
->operands
[1] == IA64_OPND_SOF
)
6002 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6003 know (strcmp (idesc
->name
, "alloc") == 0);
6004 i
= (CURR_SLOT
.opnd
[1].X_op
== O_register
6005 && CURR_SLOT
.opnd
[1].X_add_number
== REG_AR
+ AR_PFS
) ? 2 : 1;
6006 if (num_operands
== i
+ 3 /* first_arg not included in this count! */
6007 && CURR_SLOT
.opnd
[i
].X_op
== O_constant
6008 && CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6009 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
6010 && CURR_SLOT
.opnd
[i
+ 3].X_op
== O_constant
)
6012 sof
= set_regstack (CURR_SLOT
.opnd
[i
].X_add_number
,
6013 CURR_SLOT
.opnd
[i
+ 1].X_add_number
,
6014 CURR_SLOT
.opnd
[i
+ 2].X_add_number
,
6015 CURR_SLOT
.opnd
[i
+ 3].X_add_number
);
6017 /* now we can parse the first arg: */
6018 saved_input_pointer
= input_line_pointer
;
6019 input_line_pointer
= first_arg
;
6020 sep
= parse_operand (CURR_SLOT
.opnd
+ 0);
6022 --num_outputs
; /* force error */
6023 input_line_pointer
= saved_input_pointer
;
6025 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6026 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6027 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6028 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6032 highest_unmatched_operand
= -4;
6033 curr_out_of_range_pos
= -1;
6035 for (; idesc
; idesc
= get_next_opcode (idesc
))
6037 if (num_outputs
!= idesc
->num_outputs
)
6038 continue; /* mismatch in # of outputs */
6039 if (highest_unmatched_operand
< 0)
6040 highest_unmatched_operand
|= 1;
6041 if (num_operands
> NELEMS (idesc
->operands
)
6042 || (num_operands
< NELEMS (idesc
->operands
)
6043 && idesc
->operands
[num_operands
])
6044 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6045 continue; /* mismatch in number of arguments */
6046 if (highest_unmatched_operand
< 0)
6047 highest_unmatched_operand
|= 2;
6049 CURR_SLOT
.num_fixups
= 0;
6051 /* Try to match all operands. If we see an out-of-range operand,
6052 then continue trying to match the rest of the operands, since if
6053 the rest match, then this idesc will give the best error message. */
6055 out_of_range_pos
= -1;
6056 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6058 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6059 if (result
!= OPERAND_MATCH
)
6061 if (result
!= OPERAND_OUT_OF_RANGE
)
6063 if (out_of_range_pos
< 0)
6064 /* remember position of the first out-of-range operand: */
6065 out_of_range_pos
= i
;
6069 /* If we did not match all operands, or if at least one operand was
6070 out-of-range, then this idesc does not match. Keep track of which
6071 idesc matched the most operands before failing. If we have two
6072 idescs that failed at the same position, and one had an out-of-range
6073 operand, then prefer the out-of-range operand. Thus if we have
6074 "add r0=0x1000000,r1" we get an error saying the constant is out
6075 of range instead of an error saying that the constant should have been
6078 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6080 if (i
> highest_unmatched_operand
6081 || (i
== highest_unmatched_operand
6082 && out_of_range_pos
> curr_out_of_range_pos
))
6084 highest_unmatched_operand
= i
;
6085 if (out_of_range_pos
>= 0)
6087 expected_operand
= idesc
->operands
[out_of_range_pos
];
6088 error_pos
= out_of_range_pos
;
6092 expected_operand
= idesc
->operands
[i
];
6095 curr_out_of_range_pos
= out_of_range_pos
;
6104 if (expected_operand
)
6105 as_bad ("Operand %u of `%s' should be %s",
6106 error_pos
+ 1, mnemonic
,
6107 elf64_ia64_operands
[expected_operand
].desc
);
6108 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6109 as_bad ("Wrong number of output operands");
6110 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6111 as_bad ("Wrong number of input operands");
6113 as_bad ("Operand mismatch");
6120 build_insn (slot
, insnp
)
6124 const struct ia64_operand
*odesc
, *o2desc
;
6125 struct ia64_opcode
*idesc
= slot
->idesc
;
6126 bfd_signed_vma insn
, val
;
6130 insn
= idesc
->opcode
| slot
->qp_regno
;
6132 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6134 if (slot
->opnd
[i
].X_op
== O_register
6135 || slot
->opnd
[i
].X_op
== O_constant
6136 || slot
->opnd
[i
].X_op
== O_index
)
6137 val
= slot
->opnd
[i
].X_add_number
;
6138 else if (slot
->opnd
[i
].X_op
== O_big
)
6140 /* This must be the value 0x10000000000000000. */
6141 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6147 switch (idesc
->operands
[i
])
6149 case IA64_OPND_IMMU64
:
6150 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6151 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6152 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6153 | (((val
>> 63) & 0x1) << 36));
6156 case IA64_OPND_IMMU62
:
6157 val
&= 0x3fffffffffffffffULL
;
6158 if (val
!= slot
->opnd
[i
].X_add_number
)
6159 as_warn (_("Value truncated to 62 bits"));
6160 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6161 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6164 case IA64_OPND_TGT64
:
6166 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6167 insn
|= ((((val
>> 59) & 0x1) << 36)
6168 | (((val
>> 0) & 0xfffff) << 13));
6199 case IA64_OPND_R3_2
:
6200 case IA64_OPND_CPUID_R3
:
6201 case IA64_OPND_DBR_R3
:
6202 case IA64_OPND_DTR_R3
:
6203 case IA64_OPND_ITR_R3
:
6204 case IA64_OPND_IBR_R3
:
6206 case IA64_OPND_MSR_R3
:
6207 case IA64_OPND_PKR_R3
:
6208 case IA64_OPND_PMC_R3
:
6209 case IA64_OPND_PMD_R3
:
6210 case IA64_OPND_RR_R3
:
6218 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6219 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6221 as_bad_where (slot
->src_file
, slot
->src_line
,
6222 "Bad operand value: %s", err
);
6223 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6225 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6226 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6228 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6229 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6231 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6232 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6233 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6235 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6236 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6246 int manual_bundling_off
= 0, manual_bundling
= 0;
6247 enum ia64_unit required_unit
, insn_unit
= 0;
6248 enum ia64_insn_type type
[3], insn_type
;
6249 unsigned int template, orig_template
;
6250 bfd_vma insn
[3] = { -1, -1, -1 };
6251 struct ia64_opcode
*idesc
;
6252 int end_of_insn_group
= 0, user_template
= -1;
6253 int n
, i
, j
, first
, curr
;
6254 unw_rec_list
*ptr
, *last_ptr
, *end_ptr
;
6255 bfd_vma t0
= 0, t1
= 0;
6256 struct label_fix
*lfix
;
6257 struct insn_fix
*ifix
;
6263 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6264 know (first
>= 0 & first
< NUM_SLOTS
);
6265 n
= MIN (3, md
.num_slots_in_use
);
6267 /* Determine template: user user_template if specified, best match
6270 if (md
.slot
[first
].user_template
>= 0)
6271 user_template
= template = md
.slot
[first
].user_template
;
6274 /* Auto select appropriate template. */
6275 memset (type
, 0, sizeof (type
));
6277 for (i
= 0; i
< n
; ++i
)
6279 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6281 type
[i
] = md
.slot
[curr
].idesc
->type
;
6282 curr
= (curr
+ 1) % NUM_SLOTS
;
6284 template = best_template
[type
[0]][type
[1]][type
[2]];
6287 /* initialize instructions with appropriate nops: */
6288 for (i
= 0; i
< 3; ++i
)
6289 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6293 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6294 from the start of the frag. */
6295 addr_mod
= frag_now_fix () & 15;
6296 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6297 as_bad (_("instruction address is not a multiple of 16"));
6298 frag_now
->insn_addr
= addr_mod
;
6299 frag_now
->has_code
= 1;
6301 /* now fill in slots with as many insns as possible: */
6303 idesc
= md
.slot
[curr
].idesc
;
6304 end_of_insn_group
= 0;
6305 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6307 /* If we have unwind records, we may need to update some now. */
6308 ptr
= md
.slot
[curr
].unwind_record
;
6311 /* Find the last prologue/body record in the list for the current
6312 insn, and set the slot number for all records up to that point.
6313 This needs to be done now, because prologue/body records refer to
6314 the current point, not the point after the instruction has been
6315 issued. This matters because there may have been nops emitted
6316 meanwhile. Any non-prologue non-body record followed by a
6317 prologue/body record must also refer to the current point. */
6319 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6320 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6321 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6322 || ptr
->r
.type
== body
)
6326 /* Make last_ptr point one after the last prologue/body
6328 last_ptr
= last_ptr
->next
;
6329 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6332 ptr
->slot_number
= (unsigned long) f
+ i
;
6333 ptr
->slot_frag
= frag_now
;
6335 /* Remove the initialized records, so that we won't accidentally
6336 update them again if we insert a nop and continue. */
6337 md
.slot
[curr
].unwind_record
= last_ptr
;
6341 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6342 if (md
.slot
[curr
].manual_bundling_on
)
6345 manual_bundling
= 1;
6347 break; /* Need to start a new bundle. */
6350 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6352 if (manual_bundling
&& !manual_bundling_off
)
6354 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6355 "`%s' must be last in bundle", idesc
->name
);
6357 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6361 if (idesc
->flags
& IA64_OPCODE_LAST
)
6364 unsigned int required_template
;
6366 /* If we need a stop bit after an M slot, our only choice is
6367 template 5 (M;;MI). If we need a stop bit after a B
6368 slot, our only choice is to place it at the end of the
6369 bundle, because the only available templates are MIB,
6370 MBB, BBB, MMB, and MFB. We don't handle anything other
6371 than M and B slots because these are the only kind of
6372 instructions that can have the IA64_OPCODE_LAST bit set. */
6373 required_template
= template;
6374 switch (idesc
->type
)
6378 required_template
= 5;
6386 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6387 "Internal error: don't know how to force %s to end"
6388 "of instruction group", idesc
->name
);
6393 && (i
> required_slot
6394 || (required_slot
== 2 && !manual_bundling_off
)
6395 || (user_template
>= 0
6396 /* Changing from MMI to M;MI is OK. */
6397 && (template ^ required_template
) > 1)))
6399 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6400 "`%s' must be last in instruction group",
6402 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6403 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6405 if (required_slot
< i
)
6406 /* Can't fit this instruction. */
6410 if (required_template
!= template)
6412 /* If we switch the template, we need to reset the NOPs
6413 after slot i. The slot-types of the instructions ahead
6414 of i never change, so we don't need to worry about
6415 changing NOPs in front of this slot. */
6416 for (j
= i
; j
< 3; ++j
)
6417 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6419 template = required_template
;
6421 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6423 if (manual_bundling
)
6425 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6426 "Label must be first in a bundle");
6427 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6429 /* This insn must go into the first slot of a bundle. */
6433 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6435 /* We need an instruction group boundary in the middle of a
6436 bundle. See if we can switch to an other template with
6437 an appropriate boundary. */
6439 orig_template
= template;
6440 if (i
== 1 && (user_template
== 4
6441 || (user_template
< 0
6442 && (ia64_templ_desc
[template].exec_unit
[0]
6446 end_of_insn_group
= 0;
6448 else if (i
== 2 && (user_template
== 0
6449 || (user_template
< 0
6450 && (ia64_templ_desc
[template].exec_unit
[1]
6452 /* This test makes sure we don't switch the template if
6453 the next instruction is one that needs to be first in
6454 an instruction group. Since all those instructions are
6455 in the M group, there is no way such an instruction can
6456 fit in this bundle even if we switch the template. The
6457 reason we have to check for this is that otherwise we
6458 may end up generating "MI;;I M.." which has the deadly
6459 effect that the second M instruction is no longer the
6460 first in the group! --davidm 99/12/16 */
6461 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6464 end_of_insn_group
= 0;
6467 && user_template
== 0
6468 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6469 /* Use the next slot. */
6471 else if (curr
!= first
)
6472 /* can't fit this insn */
6475 if (template != orig_template
)
6476 /* if we switch the template, we need to reset the NOPs
6477 after slot i. The slot-types of the instructions ahead
6478 of i never change, so we don't need to worry about
6479 changing NOPs in front of this slot. */
6480 for (j
= i
; j
< 3; ++j
)
6481 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6483 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6485 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6486 if (idesc
->type
== IA64_TYPE_DYN
)
6488 enum ia64_opnd opnd1
, opnd2
;
6490 if ((strcmp (idesc
->name
, "nop") == 0)
6491 || (strcmp (idesc
->name
, "hint") == 0)
6492 || (strcmp (idesc
->name
, "break") == 0))
6493 insn_unit
= required_unit
;
6494 else if (strcmp (idesc
->name
, "chk.s") == 0
6495 || strcmp (idesc
->name
, "mov") == 0)
6497 insn_unit
= IA64_UNIT_M
;
6498 if (required_unit
== IA64_UNIT_I
6499 || (required_unit
== IA64_UNIT_F
&& template == 6))
6500 insn_unit
= IA64_UNIT_I
;
6503 as_fatal ("emit_one_bundle: unexpected dynamic op");
6505 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbfxx"[insn_unit
]);
6506 opnd1
= idesc
->operands
[0];
6507 opnd2
= idesc
->operands
[1];
6508 ia64_free_opcode (idesc
);
6509 idesc
= ia64_find_opcode (mnemonic
);
6510 /* moves to/from ARs have collisions */
6511 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6513 while (idesc
!= NULL
6514 && (idesc
->operands
[0] != opnd1
6515 || idesc
->operands
[1] != opnd2
))
6516 idesc
= get_next_opcode (idesc
);
6518 md
.slot
[curr
].idesc
= idesc
;
6522 insn_type
= idesc
->type
;
6523 insn_unit
= IA64_UNIT_NIL
;
6527 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6528 insn_unit
= required_unit
;
6530 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6531 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6532 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6533 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6534 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6539 if (insn_unit
!= required_unit
)
6541 if (required_unit
== IA64_UNIT_L
6542 && insn_unit
== IA64_UNIT_I
6543 && !(idesc
->flags
& IA64_OPCODE_X_IN_MLX
))
6545 /* we got ourselves an MLX template but the current
6546 instruction isn't an X-unit, or an I-unit instruction
6547 that can go into the X slot of an MLX template. Duh. */
6548 if (md
.num_slots_in_use
>= NUM_SLOTS
)
6550 as_bad_where (md
.slot
[curr
].src_file
,
6551 md
.slot
[curr
].src_line
,
6552 "`%s' can't go in X slot of "
6553 "MLX template", idesc
->name
);
6554 /* drop this insn so we don't livelock: */
6555 --md
.num_slots_in_use
;
6559 continue; /* try next slot */
6562 if (debug_type
== DEBUG_DWARF2
|| md
.slot
[curr
].loc_directive_seen
)
6564 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6566 md
.slot
[curr
].loc_directive_seen
= 0;
6567 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6570 build_insn (md
.slot
+ curr
, insn
+ i
);
6572 ptr
= md
.slot
[curr
].unwind_record
;
6575 /* Set slot numbers for all remaining unwind records belonging to the
6576 current insn. There can not be any prologue/body unwind records
6578 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6579 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6581 ptr
->slot_number
= (unsigned long) f
+ i
;
6582 ptr
->slot_frag
= frag_now
;
6584 md
.slot
[curr
].unwind_record
= NULL
;
6587 if (required_unit
== IA64_UNIT_L
)
6590 /* skip one slot for long/X-unit instructions */
6593 --md
.num_slots_in_use
;
6595 /* now is a good time to fix up the labels for this insn: */
6596 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6598 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6599 symbol_set_frag (lfix
->sym
, frag_now
);
6601 /* and fix up the tags also. */
6602 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6604 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6605 symbol_set_frag (lfix
->sym
, frag_now
);
6608 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6610 ifix
= md
.slot
[curr
].fixup
+ j
;
6611 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6612 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6613 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6614 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6615 fix
->fx_file
= md
.slot
[curr
].src_file
;
6616 fix
->fx_line
= md
.slot
[curr
].src_line
;
6619 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6622 ia64_free_opcode (md
.slot
[curr
].idesc
);
6623 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6624 md
.slot
[curr
].user_template
= -1;
6626 if (manual_bundling_off
)
6628 manual_bundling
= 0;
6631 curr
= (curr
+ 1) % NUM_SLOTS
;
6632 idesc
= md
.slot
[curr
].idesc
;
6634 if (manual_bundling
> 0)
6636 if (md
.num_slots_in_use
> 0)
6638 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6639 "`%s' does not fit into %s template",
6640 idesc
->name
, ia64_templ_desc
[template].name
);
6641 --md
.num_slots_in_use
;
6644 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6645 "Missing '}' at end of file");
6647 know (md
.num_slots_in_use
< NUM_SLOTS
);
6649 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6650 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6652 number_to_chars_littleendian (f
+ 0, t0
, 8);
6653 number_to_chars_littleendian (f
+ 8, t1
, 8);
6657 unwind
.list
->next_slot_number
= (unsigned long) f
+ 16;
6658 unwind
.list
->next_slot_frag
= frag_now
;
6663 md_parse_option (c
, arg
)
6670 /* Switches from the Intel assembler. */
6672 if (strcmp (arg
, "ilp64") == 0
6673 || strcmp (arg
, "lp64") == 0
6674 || strcmp (arg
, "p64") == 0)
6676 md
.flags
|= EF_IA_64_ABI64
;
6678 else if (strcmp (arg
, "ilp32") == 0)
6680 md
.flags
&= ~EF_IA_64_ABI64
;
6682 else if (strcmp (arg
, "le") == 0)
6684 md
.flags
&= ~EF_IA_64_BE
;
6685 default_big_endian
= 0;
6687 else if (strcmp (arg
, "be") == 0)
6689 md
.flags
|= EF_IA_64_BE
;
6690 default_big_endian
= 1;
6697 if (strcmp (arg
, "so") == 0)
6699 /* Suppress signon message. */
6701 else if (strcmp (arg
, "pi") == 0)
6703 /* Reject privileged instructions. FIXME */
6705 else if (strcmp (arg
, "us") == 0)
6707 /* Allow union of signed and unsigned range. FIXME */
6709 else if (strcmp (arg
, "close_fcalls") == 0)
6711 /* Do not resolve global function calls. */
6718 /* temp[="prefix"] Insert temporary labels into the object file
6719 symbol table prefixed by "prefix".
6720 Default prefix is ":temp:".
6725 /* indirect=<tgt> Assume unannotated indirect branches behavior
6726 according to <tgt> --
6727 exit: branch out from the current context (default)
6728 labels: all labels in context may be branch targets
6730 if (strncmp (arg
, "indirect=", 9) != 0)
6735 /* -X conflicts with an ignored option, use -x instead */
6737 if (!arg
|| strcmp (arg
, "explicit") == 0)
6739 /* set default mode to explicit */
6740 md
.default_explicit_mode
= 1;
6743 else if (strcmp (arg
, "auto") == 0)
6745 md
.default_explicit_mode
= 0;
6747 else if (strcmp (arg
, "debug") == 0)
6751 else if (strcmp (arg
, "debugx") == 0)
6753 md
.default_explicit_mode
= 1;
6758 as_bad (_("Unrecognized option '-x%s'"), arg
);
6763 /* nops Print nops statistics. */
6766 /* GNU specific switches for gcc. */
6767 case OPTION_MCONSTANT_GP
:
6768 md
.flags
|= EF_IA_64_CONS_GP
;
6771 case OPTION_MAUTO_PIC
:
6772 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
6783 md_show_usage (stream
)
6788 --mconstant-gp mark output file as using the constant-GP model\n\
6789 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6790 --mauto-pic mark output file as using the constant-GP model\n\
6791 without function descriptors (sets ELF header flag\n\
6792 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6793 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6794 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6795 -x | -xexplicit turn on dependency violation checking (default)\n\
6796 -xauto automagically remove dependency violations\n\
6797 -xdebug debug dependency violation checker\n"),
6802 ia64_after_parse_args ()
6804 if (debug_type
== DEBUG_STABS
)
6805 as_fatal (_("--gstabs is not supported for ia64"));
6808 /* Return true if TYPE fits in TEMPL at SLOT. */
6811 match (int templ
, int type
, int slot
)
6813 enum ia64_unit unit
;
6816 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
6819 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
6821 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
6823 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
6824 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
6825 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
6826 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
6827 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
6828 default: result
= 0; break;
6833 /* Add a bit of extra goodness if a nop of type F or B would fit
6834 in TEMPL at SLOT. */
6837 extra_goodness (int templ
, int slot
)
6839 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
6841 if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
6846 /* This function is called once, at assembler startup time. It sets
6847 up all the tables, etc. that the MD part of the assembler will need
6848 that can be determined before arguments are parsed. */
6852 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
6857 md
.explicit_mode
= md
.default_explicit_mode
;
6859 bfd_set_section_alignment (stdoutput
, text_section
, 4);
6861 /* Make sure function pointers get initialized. */
6862 target_big_endian
= -1;
6863 dot_byteorder (default_big_endian
);
6865 alias_hash
= hash_new ();
6866 alias_name_hash
= hash_new ();
6867 secalias_hash
= hash_new ();
6868 secalias_name_hash
= hash_new ();
6870 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
6871 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
6872 &zero_address_frag
);
6874 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
6875 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
6876 &zero_address_frag
);
6878 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
6879 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
6880 &zero_address_frag
);
6882 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
6883 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
6884 &zero_address_frag
);
6886 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
6887 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
6888 &zero_address_frag
);
6890 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
6891 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
6892 &zero_address_frag
);
6894 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
6895 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
6896 &zero_address_frag
);
6898 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
6899 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
6900 &zero_address_frag
);
6902 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
6903 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
6904 &zero_address_frag
);
6906 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
6907 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
6908 &zero_address_frag
);
6910 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
6911 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
6912 &zero_address_frag
);
6914 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
6915 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
6916 &zero_address_frag
);
6918 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
6919 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
6920 &zero_address_frag
);
6922 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
6923 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
6924 &zero_address_frag
);
6926 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
6927 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
6928 &zero_address_frag
);
6930 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
6931 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
6932 &zero_address_frag
);
6934 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
6935 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
6936 &zero_address_frag
);
6938 /* Compute the table of best templates. We compute goodness as a
6939 base 4 value, in which each match counts for 3, each F counts
6940 for 2, each B counts for 1. This should maximize the number of
6941 F and B nops in the chosen bundles, which is good because these
6942 pipelines are least likely to be overcommitted. */
6943 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
6944 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
6945 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
6948 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
6951 if (match (t
, i
, 0))
6953 if (match (t
, j
, 1))
6955 if (match (t
, k
, 2))
6956 goodness
= 3 + 3 + 3;
6958 goodness
= 3 + 3 + extra_goodness (t
, 2);
6960 else if (match (t
, j
, 2))
6961 goodness
= 3 + 3 + extra_goodness (t
, 1);
6965 goodness
+= extra_goodness (t
, 1);
6966 goodness
+= extra_goodness (t
, 2);
6969 else if (match (t
, i
, 1))
6971 if (match (t
, j
, 2))
6974 goodness
= 3 + extra_goodness (t
, 2);
6976 else if (match (t
, i
, 2))
6977 goodness
= 3 + extra_goodness (t
, 1);
6979 if (goodness
> best
)
6982 best_template
[i
][j
][k
] = t
;
6987 for (i
= 0; i
< NUM_SLOTS
; ++i
)
6988 md
.slot
[i
].user_template
= -1;
6990 md
.pseudo_hash
= hash_new ();
6991 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
6993 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
6994 (void *) (pseudo_opcode
+ i
));
6996 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6997 pseudo_opcode
[i
].name
, err
);
7000 md
.reg_hash
= hash_new ();
7001 md
.dynreg_hash
= hash_new ();
7002 md
.const_hash
= hash_new ();
7003 md
.entry_hash
= hash_new ();
7005 /* general registers: */
7008 for (i
= 0; i
< total
; ++i
)
7010 sprintf (name
, "r%d", i
- REG_GR
);
7011 md
.regsym
[i
] = declare_register (name
, i
);
7014 /* floating point registers: */
7016 for (; i
< total
; ++i
)
7018 sprintf (name
, "f%d", i
- REG_FR
);
7019 md
.regsym
[i
] = declare_register (name
, i
);
7022 /* application registers: */
7025 for (; i
< total
; ++i
)
7027 sprintf (name
, "ar%d", i
- REG_AR
);
7028 md
.regsym
[i
] = declare_register (name
, i
);
7031 /* control registers: */
7034 for (; i
< total
; ++i
)
7036 sprintf (name
, "cr%d", i
- REG_CR
);
7037 md
.regsym
[i
] = declare_register (name
, i
);
7040 /* predicate registers: */
7042 for (; i
< total
; ++i
)
7044 sprintf (name
, "p%d", i
- REG_P
);
7045 md
.regsym
[i
] = declare_register (name
, i
);
7048 /* branch registers: */
7050 for (; i
< total
; ++i
)
7052 sprintf (name
, "b%d", i
- REG_BR
);
7053 md
.regsym
[i
] = declare_register (name
, i
);
7056 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
7057 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
7058 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
7059 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
7060 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
7061 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
7062 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
7064 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7066 regnum
= indirect_reg
[i
].regnum
;
7067 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
7070 /* define synonyms for application registers: */
7071 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
7072 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
7073 REG_AR
+ ar
[i
- REG_AR
].regnum
);
7075 /* define synonyms for control registers: */
7076 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
7077 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
7078 REG_CR
+ cr
[i
- REG_CR
].regnum
);
7080 declare_register ("gp", REG_GR
+ 1);
7081 declare_register ("sp", REG_GR
+ 12);
7082 declare_register ("rp", REG_BR
+ 0);
7084 /* pseudo-registers used to specify unwind info: */
7085 declare_register ("psp", REG_PSP
);
7087 declare_register_set ("ret", 4, REG_GR
+ 8);
7088 declare_register_set ("farg", 8, REG_FR
+ 8);
7089 declare_register_set ("fret", 8, REG_FR
+ 8);
7091 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7093 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7094 (PTR
) (const_bits
+ i
));
7096 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7100 /* Set the architecture and machine depending on defaults and command line
7102 if (md
.flags
& EF_IA_64_ABI64
)
7103 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7105 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7108 as_warn (_("Could not set architecture and machine"));
7110 /* Set the pointer size and pointer shift size depending on md.flags */
7112 if (md
.flags
& EF_IA_64_ABI64
)
7114 md
.pointer_size
= 8; /* pointers are 8 bytes */
7115 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7119 md
.pointer_size
= 4; /* pointers are 4 bytes */
7120 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7123 md
.mem_offset
.hint
= 0;
7126 md
.entry_labels
= NULL
;
7129 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
7130 because that is called after md_parse_option which is where we do the
7131 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
7132 default endianness. */
7135 ia64_init (argc
, argv
)
7136 int argc ATTRIBUTE_UNUSED
;
7137 char **argv ATTRIBUTE_UNUSED
;
7139 md
.flags
= MD_FLAGS_DEFAULT
;
7142 /* Return a string for the target object file format. */
7145 ia64_target_format ()
7147 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7149 if (md
.flags
& EF_IA_64_BE
)
7151 if (md
.flags
& EF_IA_64_ABI64
)
7152 #if defined(TE_AIX50)
7153 return "elf64-ia64-aix-big";
7154 #elif defined(TE_HPUX)
7155 return "elf64-ia64-hpux-big";
7157 return "elf64-ia64-big";
7160 #if defined(TE_AIX50)
7161 return "elf32-ia64-aix-big";
7162 #elif defined(TE_HPUX)
7163 return "elf32-ia64-hpux-big";
7165 return "elf32-ia64-big";
7170 if (md
.flags
& EF_IA_64_ABI64
)
7172 return "elf64-ia64-aix-little";
7174 return "elf64-ia64-little";
7178 return "elf32-ia64-aix-little";
7180 return "elf32-ia64-little";
7185 return "unknown-format";
7189 ia64_end_of_source ()
7191 /* terminate insn group upon reaching end of file: */
7192 insn_group_break (1, 0, 0);
7194 /* emits slots we haven't written yet: */
7195 ia64_flush_insns ();
7197 bfd_set_private_flags (stdoutput
, md
.flags
);
7199 md
.mem_offset
.hint
= 0;
7205 if (md
.qp
.X_op
== O_register
)
7206 as_bad ("qualifying predicate not followed by instruction");
7207 md
.qp
.X_op
= O_absent
;
7209 if (ignore_input ())
7212 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7214 if (md
.detect_dv
&& !md
.explicit_mode
)
7215 as_warn (_("Explicit stops are ignored in auto mode"));
7217 insn_group_break (1, 0, 0);
7221 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7223 static int defining_tag
= 0;
7226 ia64_unrecognized_line (ch
)
7232 expression (&md
.qp
);
7233 if (*input_line_pointer
++ != ')')
7235 as_bad ("Expected ')'");
7238 if (md
.qp
.X_op
!= O_register
)
7240 as_bad ("Qualifying predicate expected");
7243 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7245 as_bad ("Predicate register expected");
7251 if (md
.manual_bundling
)
7252 as_warn ("Found '{' when manual bundling is already turned on");
7254 CURR_SLOT
.manual_bundling_on
= 1;
7255 md
.manual_bundling
= 1;
7257 /* Bundling is only acceptable in explicit mode
7258 or when in default automatic mode. */
7259 if (md
.detect_dv
&& !md
.explicit_mode
)
7261 if (!md
.mode_explicitly_set
7262 && !md
.default_explicit_mode
)
7265 as_warn (_("Found '{' after explicit switch to automatic mode"));
7270 if (!md
.manual_bundling
)
7271 as_warn ("Found '}' when manual bundling is off");
7273 PREV_SLOT
.manual_bundling_off
= 1;
7274 md
.manual_bundling
= 0;
7276 /* switch back to automatic mode, if applicable */
7279 && !md
.mode_explicitly_set
7280 && !md
.default_explicit_mode
)
7283 /* Allow '{' to follow on the same line. We also allow ";;", but that
7284 happens automatically because ';' is an end of line marker. */
7286 if (input_line_pointer
[0] == '{')
7288 input_line_pointer
++;
7289 return ia64_unrecognized_line ('{');
7292 demand_empty_rest_of_line ();
7302 if (md
.qp
.X_op
== O_register
)
7304 as_bad ("Tag must come before qualifying predicate.");
7308 /* This implements just enough of read_a_source_file in read.c to
7309 recognize labels. */
7310 if (is_name_beginner (*input_line_pointer
))
7312 s
= input_line_pointer
;
7313 c
= get_symbol_end ();
7315 else if (LOCAL_LABELS_FB
7316 && ISDIGIT (*input_line_pointer
))
7319 while (ISDIGIT (*input_line_pointer
))
7320 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7321 fb_label_instance_inc (temp
);
7322 s
= fb_label_name (temp
, 0);
7323 c
= *input_line_pointer
;
7332 /* Put ':' back for error messages' sake. */
7333 *input_line_pointer
++ = ':';
7334 as_bad ("Expected ':'");
7341 /* Put ':' back for error messages' sake. */
7342 *input_line_pointer
++ = ':';
7343 if (*input_line_pointer
++ != ']')
7345 as_bad ("Expected ']'");
7350 as_bad ("Tag name expected");
7360 /* Not a valid line. */
7365 ia64_frob_label (sym
)
7368 struct label_fix
*fix
;
7370 /* Tags need special handling since they are not bundle breaks like
7374 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7376 fix
->next
= CURR_SLOT
.tag_fixups
;
7377 CURR_SLOT
.tag_fixups
= fix
;
7382 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7384 md
.last_text_seg
= now_seg
;
7385 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7387 fix
->next
= CURR_SLOT
.label_fixups
;
7388 CURR_SLOT
.label_fixups
= fix
;
7390 /* Keep track of how many code entry points we've seen. */
7391 if (md
.path
== md
.maxpaths
)
7394 md
.entry_labels
= (const char **)
7395 xrealloc ((void *) md
.entry_labels
,
7396 md
.maxpaths
* sizeof (char *));
7398 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7403 /* The HP-UX linker will give unresolved symbol errors for symbols
7404 that are declared but unused. This routine removes declared,
7405 unused symbols from an object. */
7407 ia64_frob_symbol (sym
)
7410 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7411 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7412 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7413 && ! S_IS_EXTERNAL (sym
)))
7420 ia64_flush_pending_output ()
7422 if (!md
.keep_pending_output
7423 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7425 /* ??? This causes many unnecessary stop bits to be emitted.
7426 Unfortunately, it isn't clear if it is safe to remove this. */
7427 insn_group_break (1, 0, 0);
7428 ia64_flush_insns ();
7432 /* Do ia64-specific expression optimization. All that's done here is
7433 to transform index expressions that are either due to the indexing
7434 of rotating registers or due to the indexing of indirect register
7437 ia64_optimize_expr (l
, op
, r
)
7446 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
7448 num_regs
= (l
->X_add_number
>> 16);
7449 if ((unsigned) r
->X_add_number
>= num_regs
)
7452 as_bad ("No current frame");
7454 as_bad ("Index out of range 0..%u", num_regs
- 1);
7455 r
->X_add_number
= 0;
7457 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7460 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
7462 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
7463 || l
->X_add_number
== IND_MEM
)
7465 as_bad ("Indirect register set name expected");
7466 l
->X_add_number
= IND_CPUID
;
7469 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
7470 l
->X_add_number
= r
->X_add_number
;
7478 ia64_parse_name (name
, e
, nextcharP
)
7483 struct const_desc
*cdesc
;
7484 struct dynreg
*dr
= 0;
7485 unsigned int regnum
;
7492 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7494 /* Find what relocation pseudo-function we're dealing with. */
7495 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7496 if (pseudo_func
[idx
].name
7497 && pseudo_func
[idx
].name
[0] == name
[1]
7498 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7500 pseudo_type
= pseudo_func
[idx
].type
;
7503 switch (pseudo_type
)
7505 case PSEUDO_FUNC_RELOC
:
7506 end
= input_line_pointer
;
7507 if (*nextcharP
!= '(')
7509 as_bad ("Expected '('");
7513 ++input_line_pointer
;
7515 if (*input_line_pointer
!= ')')
7517 as_bad ("Missing ')'");
7521 ++input_line_pointer
;
7522 if (e
->X_op
!= O_symbol
)
7524 if (e
->X_op
!= O_pseudo_fixup
)
7526 as_bad ("Not a symbolic expression");
7529 if (idx
!= FUNC_LT_RELATIVE
)
7531 as_bad ("Illegal combination of relocation functions");
7534 switch (S_GET_VALUE (e
->X_op_symbol
))
7536 case FUNC_FPTR_RELATIVE
:
7537 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7538 case FUNC_DTP_MODULE
:
7539 idx
= FUNC_LT_DTP_MODULE
; break;
7540 case FUNC_DTP_RELATIVE
:
7541 idx
= FUNC_LT_DTP_RELATIVE
; break;
7542 case FUNC_TP_RELATIVE
:
7543 idx
= FUNC_LT_TP_RELATIVE
; break;
7545 as_bad ("Illegal combination of relocation functions");
7549 /* Make sure gas doesn't get rid of local symbols that are used
7551 e
->X_op
= O_pseudo_fixup
;
7552 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7555 case PSEUDO_FUNC_CONST
:
7556 e
->X_op
= O_constant
;
7557 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7560 case PSEUDO_FUNC_REG
:
7561 e
->X_op
= O_register
;
7562 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7569 *nextcharP
= *input_line_pointer
;
7573 /* first see if NAME is a known register name: */
7574 sym
= hash_find (md
.reg_hash
, name
);
7577 e
->X_op
= O_register
;
7578 e
->X_add_number
= S_GET_VALUE (sym
);
7582 cdesc
= hash_find (md
.const_hash
, name
);
7585 e
->X_op
= O_constant
;
7586 e
->X_add_number
= cdesc
->value
;
7590 /* check for inN, locN, or outN: */
7594 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7602 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
7610 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
7623 /* The name is inN, locN, or outN; parse the register number. */
7624 regnum
= strtoul (name
, &end
, 10);
7625 if (end
> name
&& *end
== '\0')
7627 if ((unsigned) regnum
>= dr
->num_regs
)
7630 as_bad ("No current frame");
7632 as_bad ("Register number out of range 0..%u",
7636 e
->X_op
= O_register
;
7637 e
->X_add_number
= dr
->base
+ regnum
;
7642 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
7644 /* We've got ourselves the name of a rotating register set.
7645 Store the base register number in the low 16 bits of
7646 X_add_number and the size of the register set in the top 16
7648 e
->X_op
= O_register
;
7649 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
7655 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7658 ia64_canonicalize_symbol_name (name
)
7661 size_t len
= strlen (name
);
7662 if (len
> 1 && name
[len
- 1] == '#')
7663 name
[len
- 1] = '\0';
7667 /* Return true if idesc is a conditional branch instruction. This excludes
7668 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7669 because they always read/write resources regardless of the value of the
7670 qualifying predicate. br.ia must always use p0, and hence is always
7671 taken. Thus this function returns true for branches which can fall
7672 through, and which use no resources if they do fall through. */
7675 is_conditional_branch (idesc
)
7676 struct ia64_opcode
*idesc
;
7678 /* br is a conditional branch. Everything that starts with br. except
7679 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7680 Everything that starts with brl is a conditional branch. */
7681 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
7682 && (idesc
->name
[2] == '\0'
7683 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
7684 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
7685 || idesc
->name
[2] == 'l'
7686 /* br.cond, br.call, br.clr */
7687 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
7688 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
7689 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
7692 /* Return whether the given opcode is a taken branch. If there's any doubt,
7696 is_taken_branch (idesc
)
7697 struct ia64_opcode
*idesc
;
7699 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
7700 || strncmp (idesc
->name
, "br.ia", 5) == 0);
7703 /* Return whether the given opcode is an interruption or rfi. If there's any
7704 doubt, returns zero. */
7707 is_interruption_or_rfi (idesc
)
7708 struct ia64_opcode
*idesc
;
7710 if (strcmp (idesc
->name
, "rfi") == 0)
7715 /* Returns the index of the given dependency in the opcode's list of chks, or
7716 -1 if there is no dependency. */
7719 depends_on (depind
, idesc
)
7721 struct ia64_opcode
*idesc
;
7724 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
7725 for (i
= 0; i
< dep
->nchks
; i
++)
7727 if (depind
== DEP (dep
->chks
[i
]))
7733 /* Determine a set of specific resources used for a particular resource
7734 class. Returns the number of specific resources identified For those
7735 cases which are not determinable statically, the resource returned is
7738 Meanings of value in 'NOTE':
7739 1) only read/write when the register number is explicitly encoded in the
7741 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7742 accesses CFM when qualifying predicate is in the rotating region.
7743 3) general register value is used to specify an indirect register; not
7744 determinable statically.
7745 4) only read the given resource when bits 7:0 of the indirect index
7746 register value does not match the register number of the resource; not
7747 determinable statically.
7748 5) all rules are implementation specific.
7749 6) only when both the index specified by the reader and the index specified
7750 by the writer have the same value in bits 63:61; not determinable
7752 7) only access the specified resource when the corresponding mask bit is
7754 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7755 only read when these insns reference FR2-31
7756 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7757 written when these insns write FR32-127
7758 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7760 11) The target predicates are written independently of PR[qp], but source
7761 registers are only read if PR[qp] is true. Since the state of PR[qp]
7762 cannot statically be determined, all source registers are marked used.
7763 12) This insn only reads the specified predicate register when that
7764 register is the PR[qp].
7765 13) This reference to ld-c only applies to teh GR whose value is loaded
7766 with data returned from memory, not the post-incremented address register.
7767 14) The RSE resource includes the implementation-specific RSE internal
7768 state resources. At least one (and possibly more) of these resources are
7769 read by each instruction listed in IC:rse-readers. At least one (and
7770 possibly more) of these resources are written by each insn listed in
7772 15+16) Represents reserved instructions, which the assembler does not
7775 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7776 this code; there are no dependency violations based on memory access.
7779 #define MAX_SPECS 256
7784 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
7785 const struct ia64_dependency
*dep
;
7786 struct ia64_opcode
*idesc
;
7787 int type
; /* is this a DV chk or a DV reg? */
7788 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
7789 int note
; /* resource note for this insn's usage */
7790 int path
; /* which execution path to examine */
7797 if (dep
->mode
== IA64_DV_WAW
7798 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
7799 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
7802 /* template for any resources we identify */
7803 tmpl
.dependency
= dep
;
7805 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
7806 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
7807 tmpl
.link_to_qp_branch
= 1;
7808 tmpl
.mem_offset
.hint
= 0;
7811 tmpl
.cmp_type
= CMP_NONE
;
7814 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7815 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7816 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7818 /* we don't need to track these */
7819 if (dep
->semantics
== IA64_DVS_NONE
)
7822 switch (dep
->specifier
)
7827 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7829 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7830 if (regno
>= 0 && regno
<= 7)
7832 specs
[count
] = tmpl
;
7833 specs
[count
++].index
= regno
;
7839 for (i
= 0; i
< 8; i
++)
7841 specs
[count
] = tmpl
;
7842 specs
[count
++].index
= i
;
7851 case IA64_RS_AR_UNAT
:
7852 /* This is a mov =AR or mov AR= instruction. */
7853 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7855 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7856 if (regno
== AR_UNAT
)
7858 specs
[count
++] = tmpl
;
7863 /* This is a spill/fill, or other instruction that modifies the
7866 /* Unless we can determine the specific bits used, mark the whole
7867 thing; bits 8:3 of the memory address indicate the bit used in
7868 UNAT. The .mem.offset hint may be used to eliminate a small
7869 subset of conflicts. */
7870 specs
[count
] = tmpl
;
7871 if (md
.mem_offset
.hint
)
7874 fprintf (stderr
, " Using hint for spill/fill\n");
7875 /* The index isn't actually used, just set it to something
7876 approximating the bit index. */
7877 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
7878 specs
[count
].mem_offset
.hint
= 1;
7879 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
7880 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
7884 specs
[count
++].specific
= 0;
7892 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7894 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7895 if ((regno
>= 8 && regno
<= 15)
7896 || (regno
>= 20 && regno
<= 23)
7897 || (regno
>= 31 && regno
<= 39)
7898 || (regno
>= 41 && regno
<= 47)
7899 || (regno
>= 67 && regno
<= 111))
7901 specs
[count
] = tmpl
;
7902 specs
[count
++].index
= regno
;
7915 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7917 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7918 if ((regno
>= 48 && regno
<= 63)
7919 || (regno
>= 112 && regno
<= 127))
7921 specs
[count
] = tmpl
;
7922 specs
[count
++].index
= regno
;
7928 for (i
= 48; i
< 64; i
++)
7930 specs
[count
] = tmpl
;
7931 specs
[count
++].index
= i
;
7933 for (i
= 112; i
< 128; i
++)
7935 specs
[count
] = tmpl
;
7936 specs
[count
++].index
= i
;
7954 for (i
= 0; i
< idesc
->num_outputs
; i
++)
7955 if (idesc
->operands
[i
] == IA64_OPND_B1
7956 || idesc
->operands
[i
] == IA64_OPND_B2
)
7958 specs
[count
] = tmpl
;
7959 specs
[count
++].index
=
7960 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7965 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
7966 if (idesc
->operands
[i
] == IA64_OPND_B1
7967 || idesc
->operands
[i
] == IA64_OPND_B2
)
7969 specs
[count
] = tmpl
;
7970 specs
[count
++].index
=
7971 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7977 case IA64_RS_CPUID
: /* four or more registers */
7980 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
7982 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7983 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7986 specs
[count
] = tmpl
;
7987 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7991 specs
[count
] = tmpl
;
7992 specs
[count
++].specific
= 0;
8002 case IA64_RS_DBR
: /* four or more registers */
8005 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8007 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8008 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8011 specs
[count
] = tmpl
;
8012 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8016 specs
[count
] = tmpl
;
8017 specs
[count
++].specific
= 0;
8021 else if (note
== 0 && !rsrc_write
)
8023 specs
[count
] = tmpl
;
8024 specs
[count
++].specific
= 0;
8032 case IA64_RS_IBR
: /* four or more registers */
8035 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8037 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8038 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8041 specs
[count
] = tmpl
;
8042 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8046 specs
[count
] = tmpl
;
8047 specs
[count
++].specific
= 0;
8060 /* These are implementation specific. Force all references to
8061 conflict with all other references. */
8062 specs
[count
] = tmpl
;
8063 specs
[count
++].specific
= 0;
8071 case IA64_RS_PKR
: /* 16 or more registers */
8072 if (note
== 3 || note
== 4)
8074 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8076 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8077 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8082 specs
[count
] = tmpl
;
8083 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8086 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8088 /* Uses all registers *except* the one in R3. */
8089 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8091 specs
[count
] = tmpl
;
8092 specs
[count
++].index
= i
;
8098 specs
[count
] = tmpl
;
8099 specs
[count
++].specific
= 0;
8106 specs
[count
] = tmpl
;
8107 specs
[count
++].specific
= 0;
8111 case IA64_RS_PMC
: /* four or more registers */
8114 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8115 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8118 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8120 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
8121 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8124 specs
[count
] = tmpl
;
8125 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8129 specs
[count
] = tmpl
;
8130 specs
[count
++].specific
= 0;
8140 case IA64_RS_PMD
: /* four or more registers */
8143 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8145 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8146 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8149 specs
[count
] = tmpl
;
8150 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8154 specs
[count
] = tmpl
;
8155 specs
[count
++].specific
= 0;
8165 case IA64_RS_RR
: /* eight registers */
8168 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8170 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8171 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8174 specs
[count
] = tmpl
;
8175 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8179 specs
[count
] = tmpl
;
8180 specs
[count
++].specific
= 0;
8184 else if (note
== 0 && !rsrc_write
)
8186 specs
[count
] = tmpl
;
8187 specs
[count
++].specific
= 0;
8195 case IA64_RS_CR_IRR
:
8198 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8199 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8201 && idesc
->operands
[1] == IA64_OPND_CR3
8204 for (i
= 0; i
< 4; i
++)
8206 specs
[count
] = tmpl
;
8207 specs
[count
++].index
= CR_IRR0
+ i
;
8213 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8214 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8216 && regno
<= CR_IRR3
)
8218 specs
[count
] = tmpl
;
8219 specs
[count
++].index
= regno
;
8228 case IA64_RS_CR_LRR
:
8235 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8236 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8237 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8239 specs
[count
] = tmpl
;
8240 specs
[count
++].index
= regno
;
8248 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8250 specs
[count
] = tmpl
;
8251 specs
[count
++].index
=
8252 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8267 else if (rsrc_write
)
8269 if (dep
->specifier
== IA64_RS_FRb
8270 && idesc
->operands
[0] == IA64_OPND_F1
)
8272 specs
[count
] = tmpl
;
8273 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8278 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8280 if (idesc
->operands
[i
] == IA64_OPND_F2
8281 || idesc
->operands
[i
] == IA64_OPND_F3
8282 || idesc
->operands
[i
] == IA64_OPND_F4
)
8284 specs
[count
] = tmpl
;
8285 specs
[count
++].index
=
8286 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8295 /* This reference applies only to the GR whose value is loaded with
8296 data returned from memory. */
8297 specs
[count
] = tmpl
;
8298 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8304 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8305 if (idesc
->operands
[i
] == IA64_OPND_R1
8306 || idesc
->operands
[i
] == IA64_OPND_R2
8307 || idesc
->operands
[i
] == IA64_OPND_R3
)
8309 specs
[count
] = tmpl
;
8310 specs
[count
++].index
=
8311 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8313 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8314 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8315 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8317 specs
[count
] = tmpl
;
8318 specs
[count
++].index
=
8319 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8324 /* Look for anything that reads a GR. */
8325 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8327 if (idesc
->operands
[i
] == IA64_OPND_MR3
8328 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8329 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8330 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8331 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8332 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8333 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8334 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8335 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8336 || ((i
>= idesc
->num_outputs
)
8337 && (idesc
->operands
[i
] == IA64_OPND_R1
8338 || idesc
->operands
[i
] == IA64_OPND_R2
8339 || idesc
->operands
[i
] == IA64_OPND_R3
8340 /* addl source register. */
8341 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8343 specs
[count
] = tmpl
;
8344 specs
[count
++].index
=
8345 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8356 /* This is the same as IA64_RS_PRr, except that the register range is
8357 from 1 - 15, and there are no rotating register reads/writes here. */
8361 for (i
= 1; i
< 16; i
++)
8363 specs
[count
] = tmpl
;
8364 specs
[count
++].index
= i
;
8370 /* Mark only those registers indicated by the mask. */
8373 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8374 for (i
= 1; i
< 16; i
++)
8375 if (mask
& ((valueT
) 1 << i
))
8377 specs
[count
] = tmpl
;
8378 specs
[count
++].index
= i
;
8386 else if (note
== 11) /* note 11 implies note 1 as well */
8390 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8392 if (idesc
->operands
[i
] == IA64_OPND_P1
8393 || idesc
->operands
[i
] == IA64_OPND_P2
)
8395 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8396 if (regno
>= 1 && regno
< 16)
8398 specs
[count
] = tmpl
;
8399 specs
[count
++].index
= regno
;
8409 else if (note
== 12)
8411 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8413 specs
[count
] = tmpl
;
8414 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8421 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8422 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8423 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8424 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8426 if ((idesc
->operands
[0] == IA64_OPND_P1
8427 || idesc
->operands
[0] == IA64_OPND_P2
)
8428 && p1
>= 1 && p1
< 16)
8430 specs
[count
] = tmpl
;
8431 specs
[count
].cmp_type
=
8432 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8433 specs
[count
++].index
= p1
;
8435 if ((idesc
->operands
[1] == IA64_OPND_P1
8436 || idesc
->operands
[1] == IA64_OPND_P2
)
8437 && p2
>= 1 && p2
< 16)
8439 specs
[count
] = tmpl
;
8440 specs
[count
].cmp_type
=
8441 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8442 specs
[count
++].index
= p2
;
8447 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8449 specs
[count
] = tmpl
;
8450 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8452 if (idesc
->operands
[1] == IA64_OPND_PR
)
8454 for (i
= 1; i
< 16; i
++)
8456 specs
[count
] = tmpl
;
8457 specs
[count
++].index
= i
;
8468 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8469 simplified cases of this. */
8473 for (i
= 16; i
< 63; i
++)
8475 specs
[count
] = tmpl
;
8476 specs
[count
++].index
= i
;
8482 /* Mark only those registers indicated by the mask. */
8484 && idesc
->operands
[0] == IA64_OPND_PR
)
8486 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8487 if (mask
& ((valueT
) 1 << 16))
8488 for (i
= 16; i
< 63; i
++)
8490 specs
[count
] = tmpl
;
8491 specs
[count
++].index
= i
;
8495 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8497 for (i
= 16; i
< 63; i
++)
8499 specs
[count
] = tmpl
;
8500 specs
[count
++].index
= i
;
8508 else if (note
== 11) /* note 11 implies note 1 as well */
8512 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8514 if (idesc
->operands
[i
] == IA64_OPND_P1
8515 || idesc
->operands
[i
] == IA64_OPND_P2
)
8517 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8518 if (regno
>= 16 && regno
< 63)
8520 specs
[count
] = tmpl
;
8521 specs
[count
++].index
= regno
;
8531 else if (note
== 12)
8533 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8535 specs
[count
] = tmpl
;
8536 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8543 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8544 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8545 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8546 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8548 if ((idesc
->operands
[0] == IA64_OPND_P1
8549 || idesc
->operands
[0] == IA64_OPND_P2
)
8550 && p1
>= 16 && p1
< 63)
8552 specs
[count
] = tmpl
;
8553 specs
[count
].cmp_type
=
8554 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8555 specs
[count
++].index
= p1
;
8557 if ((idesc
->operands
[1] == IA64_OPND_P1
8558 || idesc
->operands
[1] == IA64_OPND_P2
)
8559 && p2
>= 16 && p2
< 63)
8561 specs
[count
] = tmpl
;
8562 specs
[count
].cmp_type
=
8563 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8564 specs
[count
++].index
= p2
;
8569 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8571 specs
[count
] = tmpl
;
8572 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8574 if (idesc
->operands
[1] == IA64_OPND_PR
)
8576 for (i
= 16; i
< 63; i
++)
8578 specs
[count
] = tmpl
;
8579 specs
[count
++].index
= i
;
8591 /* Verify that the instruction is using the PSR bit indicated in
8595 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
8597 if (dep
->regindex
< 6)
8599 specs
[count
++] = tmpl
;
8602 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
8604 if (dep
->regindex
< 32
8605 || dep
->regindex
== 35
8606 || dep
->regindex
== 36
8607 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
8609 specs
[count
++] = tmpl
;
8612 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
8614 if (dep
->regindex
< 32
8615 || dep
->regindex
== 35
8616 || dep
->regindex
== 36
8617 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
8619 specs
[count
++] = tmpl
;
8624 /* Several PSR bits have very specific dependencies. */
8625 switch (dep
->regindex
)
8628 specs
[count
++] = tmpl
;
8633 specs
[count
++] = tmpl
;
8637 /* Only certain CR accesses use PSR.ic */
8638 if (idesc
->operands
[0] == IA64_OPND_CR3
8639 || idesc
->operands
[1] == IA64_OPND_CR3
)
8642 ((idesc
->operands
[0] == IA64_OPND_CR3
)
8645 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
8660 specs
[count
++] = tmpl
;
8669 specs
[count
++] = tmpl
;
8673 /* Only some AR accesses use cpl */
8674 if (idesc
->operands
[0] == IA64_OPND_AR3
8675 || idesc
->operands
[1] == IA64_OPND_AR3
)
8678 ((idesc
->operands
[0] == IA64_OPND_AR3
)
8681 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
8688 && regno
<= AR_K7
))))
8690 specs
[count
++] = tmpl
;
8695 specs
[count
++] = tmpl
;
8705 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
8707 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
8713 if (mask
& ((valueT
) 1 << dep
->regindex
))
8715 specs
[count
++] = tmpl
;
8720 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
8721 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
8722 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8723 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8725 if (idesc
->operands
[i
] == IA64_OPND_F1
8726 || idesc
->operands
[i
] == IA64_OPND_F2
8727 || idesc
->operands
[i
] == IA64_OPND_F3
8728 || idesc
->operands
[i
] == IA64_OPND_F4
)
8730 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8731 if (reg
>= min
&& reg
<= max
)
8733 specs
[count
++] = tmpl
;
8740 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
8741 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
8742 /* mfh is read on writes to FR32-127; mfl is read on writes to
8744 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8746 if (idesc
->operands
[i
] == IA64_OPND_F1
)
8748 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8749 if (reg
>= min
&& reg
<= max
)
8751 specs
[count
++] = tmpl
;
8756 else if (note
== 10)
8758 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8760 if (idesc
->operands
[i
] == IA64_OPND_R1
8761 || idesc
->operands
[i
] == IA64_OPND_R2
8762 || idesc
->operands
[i
] == IA64_OPND_R3
)
8764 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8765 if (regno
>= 16 && regno
<= 31)
8767 specs
[count
++] = tmpl
;
8778 case IA64_RS_AR_FPSR
:
8779 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8781 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8782 if (regno
== AR_FPSR
)
8784 specs
[count
++] = tmpl
;
8789 specs
[count
++] = tmpl
;
8794 /* Handle all AR[REG] resources */
8795 if (note
== 0 || note
== 1)
8797 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8798 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
8799 && regno
== dep
->regindex
)
8801 specs
[count
++] = tmpl
;
8803 /* other AR[REG] resources may be affected by AR accesses */
8804 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
8807 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
8808 switch (dep
->regindex
)
8814 if (regno
== AR_BSPSTORE
)
8816 specs
[count
++] = tmpl
;
8820 (regno
== AR_BSPSTORE
8821 || regno
== AR_RNAT
))
8823 specs
[count
++] = tmpl
;
8828 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
8831 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
8832 switch (dep
->regindex
)
8837 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
8839 specs
[count
++] = tmpl
;
8846 specs
[count
++] = tmpl
;
8856 /* Handle all CR[REG] resources */
8857 if (note
== 0 || note
== 1)
8859 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8861 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8862 if (regno
== dep
->regindex
)
8864 specs
[count
++] = tmpl
;
8866 else if (!rsrc_write
)
8868 /* Reads from CR[IVR] affect other resources. */
8869 if (regno
== CR_IVR
)
8871 if ((dep
->regindex
>= CR_IRR0
8872 && dep
->regindex
<= CR_IRR3
)
8873 || dep
->regindex
== CR_TPR
)
8875 specs
[count
++] = tmpl
;
8882 specs
[count
++] = tmpl
;
8891 case IA64_RS_INSERVICE
:
8892 /* look for write of EOI (67) or read of IVR (65) */
8893 if ((idesc
->operands
[0] == IA64_OPND_CR3
8894 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
8895 || (idesc
->operands
[1] == IA64_OPND_CR3
8896 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
8898 specs
[count
++] = tmpl
;
8905 specs
[count
++] = tmpl
;
8916 specs
[count
++] = tmpl
;
8920 /* Check if any of the registers accessed are in the rotating region.
8921 mov to/from pr accesses CFM only when qp_regno is in the rotating
8923 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8925 if (idesc
->operands
[i
] == IA64_OPND_R1
8926 || idesc
->operands
[i
] == IA64_OPND_R2
8927 || idesc
->operands
[i
] == IA64_OPND_R3
)
8929 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8930 /* Assumes that md.rot.num_regs is always valid */
8931 if (md
.rot
.num_regs
> 0
8933 && num
< 31 + md
.rot
.num_regs
)
8935 specs
[count
] = tmpl
;
8936 specs
[count
++].specific
= 0;
8939 else if (idesc
->operands
[i
] == IA64_OPND_F1
8940 || idesc
->operands
[i
] == IA64_OPND_F2
8941 || idesc
->operands
[i
] == IA64_OPND_F3
8942 || idesc
->operands
[i
] == IA64_OPND_F4
)
8944 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8947 specs
[count
] = tmpl
;
8948 specs
[count
++].specific
= 0;
8951 else if (idesc
->operands
[i
] == IA64_OPND_P1
8952 || idesc
->operands
[i
] == IA64_OPND_P2
)
8954 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8957 specs
[count
] = tmpl
;
8958 specs
[count
++].specific
= 0;
8962 if (CURR_SLOT
.qp_regno
> 15)
8964 specs
[count
] = tmpl
;
8965 specs
[count
++].specific
= 0;
8970 /* This is the same as IA64_RS_PRr, except simplified to account for
8971 the fact that there is only one register. */
8975 specs
[count
++] = tmpl
;
8980 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
8981 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8982 if (mask
& ((valueT
) 1 << 63))
8983 specs
[count
++] = tmpl
;
8985 else if (note
== 11)
8987 if ((idesc
->operands
[0] == IA64_OPND_P1
8988 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
8989 || (idesc
->operands
[1] == IA64_OPND_P2
8990 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
8992 specs
[count
++] = tmpl
;
8995 else if (note
== 12)
8997 if (CURR_SLOT
.qp_regno
== 63)
8999 specs
[count
++] = tmpl
;
9006 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9007 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9008 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9009 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9012 && (idesc
->operands
[0] == IA64_OPND_P1
9013 || idesc
->operands
[0] == IA64_OPND_P2
))
9015 specs
[count
] = tmpl
;
9016 specs
[count
++].cmp_type
=
9017 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9020 && (idesc
->operands
[1] == IA64_OPND_P1
9021 || idesc
->operands
[1] == IA64_OPND_P2
))
9023 specs
[count
] = tmpl
;
9024 specs
[count
++].cmp_type
=
9025 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9030 if (CURR_SLOT
.qp_regno
== 63)
9032 specs
[count
++] = tmpl
;
9043 /* FIXME we can identify some individual RSE written resources, but RSE
9044 read resources have not yet been completely identified, so for now
9045 treat RSE as a single resource */
9046 if (strncmp (idesc
->name
, "mov", 3) == 0)
9050 if (idesc
->operands
[0] == IA64_OPND_AR3
9051 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9053 specs
[count
] = tmpl
;
9054 specs
[count
++].index
= 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
9059 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9061 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9062 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9064 specs
[count
++] = tmpl
;
9067 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9069 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9070 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9071 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9073 specs
[count
++] = tmpl
;
9080 specs
[count
++] = tmpl
;
9085 /* FIXME -- do any of these need to be non-specific? */
9086 specs
[count
++] = tmpl
;
9090 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9097 /* Clear branch flags on marked resources. This breaks the link between the
9098 QP of the marking instruction and a subsequent branch on the same QP. */
9101 clear_qp_branch_flag (mask
)
9105 for (i
= 0; i
< regdepslen
; i
++)
9107 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9108 if ((bit
& mask
) != 0)
9110 regdeps
[i
].link_to_qp_branch
= 0;
9115 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9116 any mutexes which contain one of the PRs and create new ones when
9120 update_qp_mutex (valueT mask
)
9126 while (i
< qp_mutexeslen
)
9128 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9130 /* If it destroys and creates the same mutex, do nothing. */
9131 if (qp_mutexes
[i
].prmask
== mask
9132 && qp_mutexes
[i
].path
== md
.path
)
9143 fprintf (stderr
, " Clearing mutex relation");
9144 print_prmask (qp_mutexes
[i
].prmask
);
9145 fprintf (stderr
, "\n");
9148 /* Deal with the old mutex with more than 3+ PRs only if
9149 the new mutex on the same execution path with it.
9151 FIXME: The 3+ mutex support is incomplete.
9152 dot_pred_rel () may be a better place to fix it. */
9153 if (qp_mutexes
[i
].path
== md
.path
)
9155 /* If it is a proper subset of the mutex, create a
9158 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9161 qp_mutexes
[i
].prmask
&= ~mask
;
9162 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9164 /* Modify the mutex if there are more than one
9172 /* Remove the mutex. */
9173 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9181 add_qp_mutex (mask
);
9186 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9188 Any changes to a PR clears the mutex relations which include that PR. */
9191 clear_qp_mutex (mask
)
9197 while (i
< qp_mutexeslen
)
9199 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9203 fprintf (stderr
, " Clearing mutex relation");
9204 print_prmask (qp_mutexes
[i
].prmask
);
9205 fprintf (stderr
, "\n");
9207 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9214 /* Clear implies relations which contain PRs in the given masks.
9215 P1_MASK indicates the source of the implies relation, while P2_MASK
9216 indicates the implied PR. */
9219 clear_qp_implies (p1_mask
, p2_mask
)
9226 while (i
< qp_implieslen
)
9228 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9229 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9232 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9233 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9234 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9241 /* Add the PRs specified to the list of implied relations. */
9244 add_qp_imply (p1
, p2
)
9251 /* p0 is not meaningful here. */
9252 if (p1
== 0 || p2
== 0)
9258 /* If it exists already, ignore it. */
9259 for (i
= 0; i
< qp_implieslen
; i
++)
9261 if (qp_implies
[i
].p1
== p1
9262 && qp_implies
[i
].p2
== p2
9263 && qp_implies
[i
].path
== md
.path
9264 && !qp_implies
[i
].p2_branched
)
9268 if (qp_implieslen
== qp_impliestotlen
)
9270 qp_impliestotlen
+= 20;
9271 qp_implies
= (struct qp_imply
*)
9272 xrealloc ((void *) qp_implies
,
9273 qp_impliestotlen
* sizeof (struct qp_imply
));
9276 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9277 qp_implies
[qp_implieslen
].p1
= p1
;
9278 qp_implies
[qp_implieslen
].p2
= p2
;
9279 qp_implies
[qp_implieslen
].path
= md
.path
;
9280 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9282 /* Add in the implied transitive relations; for everything that p2 implies,
9283 make p1 imply that, too; for everything that implies p1, make it imply p2
9285 for (i
= 0; i
< qp_implieslen
; i
++)
9287 if (qp_implies
[i
].p1
== p2
)
9288 add_qp_imply (p1
, qp_implies
[i
].p2
);
9289 if (qp_implies
[i
].p2
== p1
)
9290 add_qp_imply (qp_implies
[i
].p1
, p2
);
9292 /* Add in mutex relations implied by this implies relation; for each mutex
9293 relation containing p2, duplicate it and replace p2 with p1. */
9294 bit
= (valueT
) 1 << p1
;
9295 mask
= (valueT
) 1 << p2
;
9296 for (i
= 0; i
< qp_mutexeslen
; i
++)
9298 if (qp_mutexes
[i
].prmask
& mask
)
9299 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9303 /* Add the PRs specified in the mask to the mutex list; this means that only
9304 one of the PRs can be true at any time. PR0 should never be included in
9314 if (qp_mutexeslen
== qp_mutexestotlen
)
9316 qp_mutexestotlen
+= 20;
9317 qp_mutexes
= (struct qpmutex
*)
9318 xrealloc ((void *) qp_mutexes
,
9319 qp_mutexestotlen
* sizeof (struct qpmutex
));
9323 fprintf (stderr
, " Registering mutex on");
9324 print_prmask (mask
);
9325 fprintf (stderr
, "\n");
9327 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9328 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9332 has_suffix_p (name
, suffix
)
9336 size_t namelen
= strlen (name
);
9337 size_t sufflen
= strlen (suffix
);
9339 if (namelen
<= sufflen
)
9341 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9345 clear_register_values ()
9349 fprintf (stderr
, " Clearing register values\n");
9350 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9351 gr_values
[i
].known
= 0;
9354 /* Keep track of register values/changes which affect DV tracking.
9356 optimization note: should add a flag to classes of insns where otherwise we
9357 have to examine a group of strings to identify them. */
9360 note_register_values (idesc
)
9361 struct ia64_opcode
*idesc
;
9363 valueT qp_changemask
= 0;
9366 /* Invalidate values for registers being written to. */
9367 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9369 if (idesc
->operands
[i
] == IA64_OPND_R1
9370 || idesc
->operands
[i
] == IA64_OPND_R2
9371 || idesc
->operands
[i
] == IA64_OPND_R3
)
9373 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9374 if (regno
> 0 && regno
< NELEMS (gr_values
))
9375 gr_values
[regno
].known
= 0;
9377 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9379 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9380 if (regno
> 0 && regno
< 4)
9381 gr_values
[regno
].known
= 0;
9383 else if (idesc
->operands
[i
] == IA64_OPND_P1
9384 || idesc
->operands
[i
] == IA64_OPND_P2
)
9386 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9387 qp_changemask
|= (valueT
) 1 << regno
;
9389 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9391 if (idesc
->operands
[2] & (valueT
) 0x10000)
9392 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9394 qp_changemask
= idesc
->operands
[2];
9397 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9399 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9400 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9402 qp_changemask
= idesc
->operands
[1];
9403 qp_changemask
&= ~(valueT
) 0xFFFF;
9408 /* Always clear qp branch flags on any PR change. */
9409 /* FIXME there may be exceptions for certain compares. */
9410 clear_qp_branch_flag (qp_changemask
);
9412 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9413 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9415 qp_changemask
|= ~(valueT
) 0xFFFF;
9416 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9418 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9419 gr_values
[i
].known
= 0;
9421 clear_qp_mutex (qp_changemask
);
9422 clear_qp_implies (qp_changemask
, qp_changemask
);
9424 /* After a call, all register values are undefined, except those marked
9426 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9427 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9429 /* FIXME keep GR values which are marked as "safe_across_calls" */
9430 clear_register_values ();
9431 clear_qp_mutex (~qp_safe_across_calls
);
9432 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9433 clear_qp_branch_flag (~qp_safe_across_calls
);
9435 else if (is_interruption_or_rfi (idesc
)
9436 || is_taken_branch (idesc
))
9438 clear_register_values ();
9439 clear_qp_mutex (~(valueT
) 0);
9440 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9442 /* Look for mutex and implies relations. */
9443 else if ((idesc
->operands
[0] == IA64_OPND_P1
9444 || idesc
->operands
[0] == IA64_OPND_P2
)
9445 && (idesc
->operands
[1] == IA64_OPND_P1
9446 || idesc
->operands
[1] == IA64_OPND_P2
))
9448 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9449 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9450 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9451 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9453 /* If both PRs are PR0, we can't really do anything. */
9454 if (p1
== 0 && p2
== 0)
9457 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9459 /* In general, clear mutexes and implies which include P1 or P2,
9460 with the following exceptions. */
9461 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9462 || has_suffix_p (idesc
->name
, ".and.orcm"))
9464 clear_qp_implies (p2mask
, p1mask
);
9466 else if (has_suffix_p (idesc
->name
, ".andcm")
9467 || has_suffix_p (idesc
->name
, ".and"))
9469 clear_qp_implies (0, p1mask
| p2mask
);
9471 else if (has_suffix_p (idesc
->name
, ".orcm")
9472 || has_suffix_p (idesc
->name
, ".or"))
9474 clear_qp_mutex (p1mask
| p2mask
);
9475 clear_qp_implies (p1mask
| p2mask
, 0);
9481 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9483 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9484 if (p1
== 0 || p2
== 0)
9485 clear_qp_mutex (p1mask
| p2mask
);
9487 added
= update_qp_mutex (p1mask
| p2mask
);
9489 if (CURR_SLOT
.qp_regno
== 0
9490 || has_suffix_p (idesc
->name
, ".unc"))
9492 if (added
== 0 && p1
&& p2
)
9493 add_qp_mutex (p1mask
| p2mask
);
9494 if (CURR_SLOT
.qp_regno
!= 0)
9497 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9499 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9504 /* Look for mov imm insns into GRs. */
9505 else if (idesc
->operands
[0] == IA64_OPND_R1
9506 && (idesc
->operands
[1] == IA64_OPND_IMM22
9507 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9508 && (strcmp (idesc
->name
, "mov") == 0
9509 || strcmp (idesc
->name
, "movl") == 0))
9511 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9512 if (regno
> 0 && regno
< NELEMS (gr_values
))
9514 gr_values
[regno
].known
= 1;
9515 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9516 gr_values
[regno
].path
= md
.path
;
9519 fprintf (stderr
, " Know gr%d = ", regno
);
9520 fprintf_vma (stderr
, gr_values
[regno
].value
);
9521 fputs ("\n", stderr
);
9527 clear_qp_mutex (qp_changemask
);
9528 clear_qp_implies (qp_changemask
, qp_changemask
);
9532 /* Return whether the given predicate registers are currently mutex. */
9535 qp_mutex (p1
, p2
, path
)
9545 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9546 for (i
= 0; i
< qp_mutexeslen
; i
++)
9548 if (qp_mutexes
[i
].path
>= path
9549 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9556 /* Return whether the given resource is in the given insn's list of chks
9557 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9561 resources_match (rs
, idesc
, note
, qp_regno
, path
)
9563 struct ia64_opcode
*idesc
;
9568 struct rsrc specs
[MAX_SPECS
];
9571 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9572 we don't need to check. One exception is note 11, which indicates that
9573 target predicates are written regardless of PR[qp]. */
9574 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
9578 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
9581 /* UNAT checking is a bit more specific than other resources */
9582 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
9583 && specs
[count
].mem_offset
.hint
9584 && rs
->mem_offset
.hint
)
9586 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
9588 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
9589 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
9596 /* Skip apparent PR write conflicts where both writes are an AND or both
9597 writes are an OR. */
9598 if (rs
->dependency
->specifier
== IA64_RS_PR
9599 || rs
->dependency
->specifier
== IA64_RS_PRr
9600 || rs
->dependency
->specifier
== IA64_RS_PR63
)
9602 if (specs
[count
].cmp_type
!= CMP_NONE
9603 && specs
[count
].cmp_type
== rs
->cmp_type
)
9606 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
9607 dv_mode
[rs
->dependency
->mode
],
9608 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9609 specs
[count
].index
: 63);
9614 " %s on parallel compare conflict %s vs %s on PR%d\n",
9615 dv_mode
[rs
->dependency
->mode
],
9616 dv_cmp_type
[rs
->cmp_type
],
9617 dv_cmp_type
[specs
[count
].cmp_type
],
9618 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9619 specs
[count
].index
: 63);
9623 /* If either resource is not specific, conservatively assume a conflict
9625 if (!specs
[count
].specific
|| !rs
->specific
)
9627 else if (specs
[count
].index
== rs
->index
)
9634 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9635 insert a stop to create the break. Update all resource dependencies
9636 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9637 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9638 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9642 insn_group_break (insert_stop
, qp_regno
, save_current
)
9649 if (insert_stop
&& md
.num_slots_in_use
> 0)
9650 PREV_SLOT
.end_of_insn_group
= 1;
9654 fprintf (stderr
, " Insn group break%s",
9655 (insert_stop
? " (w/stop)" : ""));
9657 fprintf (stderr
, " effective for QP=%d", qp_regno
);
9658 fprintf (stderr
, "\n");
9662 while (i
< regdepslen
)
9664 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
9667 && regdeps
[i
].qp_regno
!= qp_regno
)
9674 && CURR_SLOT
.src_file
== regdeps
[i
].file
9675 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
9681 /* clear dependencies which are automatically cleared by a stop, or
9682 those that have reached the appropriate state of insn serialization */
9683 if (dep
->semantics
== IA64_DVS_IMPLIED
9684 || dep
->semantics
== IA64_DVS_IMPLIEDF
9685 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
9687 print_dependency ("Removing", i
);
9688 regdeps
[i
] = regdeps
[--regdepslen
];
9692 if (dep
->semantics
== IA64_DVS_DATA
9693 || dep
->semantics
== IA64_DVS_INSTR
9694 || dep
->semantics
== IA64_DVS_SPECIFIC
)
9696 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
9697 regdeps
[i
].insn_srlz
= STATE_STOP
;
9698 if (regdeps
[i
].data_srlz
== STATE_NONE
)
9699 regdeps
[i
].data_srlz
= STATE_STOP
;
9706 /* Add the given resource usage spec to the list of active dependencies. */
9709 mark_resource (idesc
, dep
, spec
, depind
, path
)
9710 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
9711 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
9716 if (regdepslen
== regdepstotlen
)
9718 regdepstotlen
+= 20;
9719 regdeps
= (struct rsrc
*)
9720 xrealloc ((void *) regdeps
,
9721 regdepstotlen
* sizeof (struct rsrc
));
9724 regdeps
[regdepslen
] = *spec
;
9725 regdeps
[regdepslen
].depind
= depind
;
9726 regdeps
[regdepslen
].path
= path
;
9727 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
9728 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
9730 print_dependency ("Adding", regdepslen
);
9736 print_dependency (action
, depind
)
9742 fprintf (stderr
, " %s %s '%s'",
9743 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
9744 (regdeps
[depind
].dependency
)->name
);
9745 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
!= 0)
9746 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
9747 if (regdeps
[depind
].mem_offset
.hint
)
9749 fputs (" ", stderr
);
9750 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
9751 fputs ("+", stderr
);
9752 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
9754 fprintf (stderr
, "\n");
9759 instruction_serialization ()
9763 fprintf (stderr
, " Instruction serialization\n");
9764 for (i
= 0; i
< regdepslen
; i
++)
9765 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
9766 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
9770 data_serialization ()
9774 fprintf (stderr
, " Data serialization\n");
9775 while (i
< regdepslen
)
9777 if (regdeps
[i
].data_srlz
== STATE_STOP
9778 /* Note: as of 991210, all "other" dependencies are cleared by a
9779 data serialization. This might change with new tables */
9780 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
9782 print_dependency ("Removing", i
);
9783 regdeps
[i
] = regdeps
[--regdepslen
];
9790 /* Insert stops and serializations as needed to avoid DVs. */
9793 remove_marked_resource (rs
)
9796 switch (rs
->dependency
->semantics
)
9798 case IA64_DVS_SPECIFIC
:
9800 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
9801 /* ...fall through... */
9802 case IA64_DVS_INSTR
:
9804 fprintf (stderr
, "Inserting instr serialization\n");
9805 if (rs
->insn_srlz
< STATE_STOP
)
9806 insn_group_break (1, 0, 0);
9807 if (rs
->insn_srlz
< STATE_SRLZ
)
9809 struct slot oldslot
= CURR_SLOT
;
9810 /* Manually jam a srlz.i insn into the stream */
9811 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
9812 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
9813 instruction_serialization ();
9814 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9815 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9817 CURR_SLOT
= oldslot
;
9819 insn_group_break (1, 0, 0);
9821 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
9822 "other" types of DV are eliminated
9823 by a data serialization */
9826 fprintf (stderr
, "Inserting data serialization\n");
9827 if (rs
->data_srlz
< STATE_STOP
)
9828 insn_group_break (1, 0, 0);
9830 struct slot oldslot
= CURR_SLOT
;
9831 /* Manually jam a srlz.d insn into the stream */
9832 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
9833 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
9834 data_serialization ();
9835 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9836 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9838 CURR_SLOT
= oldslot
;
9841 case IA64_DVS_IMPLIED
:
9842 case IA64_DVS_IMPLIEDF
:
9844 fprintf (stderr
, "Inserting stop\n");
9845 insn_group_break (1, 0, 0);
9852 /* Check the resources used by the given opcode against the current dependency
9855 The check is run once for each execution path encountered. In this case,
9856 a unique execution path is the sequence of instructions following a code
9857 entry point, e.g. the following has three execution paths, one starting
9858 at L0, one at L1, and one at L2.
9867 check_dependencies (idesc
)
9868 struct ia64_opcode
*idesc
;
9870 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
9874 /* Note that the number of marked resources may change within the
9875 loop if in auto mode. */
9877 while (i
< regdepslen
)
9879 struct rsrc
*rs
= ®deps
[i
];
9880 const struct ia64_dependency
*dep
= rs
->dependency
;
9885 if (dep
->semantics
== IA64_DVS_NONE
9886 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
9892 note
= NOTE (opdeps
->chks
[chkind
]);
9894 /* Check this resource against each execution path seen thus far. */
9895 for (path
= 0; path
<= md
.path
; path
++)
9899 /* If the dependency wasn't on the path being checked, ignore it. */
9900 if (rs
->path
< path
)
9903 /* If the QP for this insn implies a QP which has branched, don't
9904 bother checking. Ed. NOTE: I don't think this check is terribly
9905 useful; what's the point of generating code which will only be
9906 reached if its QP is zero?
9907 This code was specifically inserted to handle the following code,
9908 based on notes from Intel's DV checking code, where p1 implies p2.
9914 if (CURR_SLOT
.qp_regno
!= 0)
9918 for (implies
= 0; implies
< qp_implieslen
; implies
++)
9920 if (qp_implies
[implies
].path
>= path
9921 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
9922 && qp_implies
[implies
].p2_branched
)
9932 if ((matchtype
= resources_match (rs
, idesc
, note
,
9933 CURR_SLOT
.qp_regno
, path
)) != 0)
9936 char pathmsg
[256] = "";
9937 char indexmsg
[256] = "";
9938 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
9941 sprintf (pathmsg
, " when entry is at label '%s'",
9942 md
.entry_labels
[path
- 1]);
9943 if (rs
->specific
&& rs
->index
!= 0)
9944 sprintf (indexmsg
, ", specific resource number is %d",
9946 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9948 (certain
? "violates" : "may violate"),
9949 dv_mode
[dep
->mode
], dep
->name
,
9950 dv_sem
[dep
->semantics
],
9953 if (md
.explicit_mode
)
9955 as_warn ("%s", msg
);
9957 as_warn (_("Only the first path encountering the conflict "
9959 as_warn_where (rs
->file
, rs
->line
,
9960 _("This is the location of the "
9961 "conflicting usage"));
9962 /* Don't bother checking other paths, to avoid duplicating
9969 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
9971 remove_marked_resource (rs
);
9973 /* since the set of dependencies has changed, start over */
9974 /* FIXME -- since we're removing dvs as we go, we
9975 probably don't really need to start over... */
9988 /* Register new dependencies based on the given opcode. */
9991 mark_resources (idesc
)
9992 struct ia64_opcode
*idesc
;
9995 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
9996 int add_only_qp_reads
= 0;
9998 /* A conditional branch only uses its resources if it is taken; if it is
9999 taken, we stop following that path. The other branch types effectively
10000 *always* write their resources. If it's not taken, register only QP
10002 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10004 add_only_qp_reads
= 1;
10008 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10010 for (i
= 0; i
< opdeps
->nregs
; i
++)
10012 const struct ia64_dependency
*dep
;
10013 struct rsrc specs
[MAX_SPECS
];
10018 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10019 note
= NOTE (opdeps
->regs
[i
]);
10021 if (add_only_qp_reads
10022 && !(dep
->mode
== IA64_DV_WAR
10023 && (dep
->specifier
== IA64_RS_PR
10024 || dep
->specifier
== IA64_RS_PRr
10025 || dep
->specifier
== IA64_RS_PR63
)))
10028 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10030 while (count
-- > 0)
10032 mark_resource (idesc
, dep
, &specs
[count
],
10033 DEP (opdeps
->regs
[i
]), md
.path
);
10036 /* The execution path may affect register values, which may in turn
10037 affect which indirect-access resources are accessed. */
10038 switch (dep
->specifier
)
10042 case IA64_RS_CPUID
:
10050 for (path
= 0; path
< md
.path
; path
++)
10052 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10053 while (count
-- > 0)
10054 mark_resource (idesc
, dep
, &specs
[count
],
10055 DEP (opdeps
->regs
[i
]), path
);
10062 /* Remove dependencies when they no longer apply. */
10065 update_dependencies (idesc
)
10066 struct ia64_opcode
*idesc
;
10070 if (strcmp (idesc
->name
, "srlz.i") == 0)
10072 instruction_serialization ();
10074 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10076 data_serialization ();
10078 else if (is_interruption_or_rfi (idesc
)
10079 || is_taken_branch (idesc
))
10081 /* Although technically the taken branch doesn't clear dependencies
10082 which require a srlz.[id], we don't follow the branch; the next
10083 instruction is assumed to start with a clean slate. */
10087 else if (is_conditional_branch (idesc
)
10088 && CURR_SLOT
.qp_regno
!= 0)
10090 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10092 for (i
= 0; i
< qp_implieslen
; i
++)
10094 /* If the conditional branch's predicate is implied by the predicate
10095 in an existing dependency, remove that dependency. */
10096 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10099 /* Note that this implied predicate takes a branch so that if
10100 a later insn generates a DV but its predicate implies this
10101 one, we can avoid the false DV warning. */
10102 qp_implies
[i
].p2_branched
= 1;
10103 while (depind
< regdepslen
)
10105 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10107 print_dependency ("Removing", depind
);
10108 regdeps
[depind
] = regdeps
[--regdepslen
];
10115 /* Any marked resources which have this same predicate should be
10116 cleared, provided that the QP hasn't been modified between the
10117 marking instruction and the branch. */
10120 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10125 while (i
< regdepslen
)
10127 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10128 && regdeps
[i
].link_to_qp_branch
10129 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10130 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10132 /* Treat like a taken branch */
10133 print_dependency ("Removing", i
);
10134 regdeps
[i
] = regdeps
[--regdepslen
];
10143 /* Examine the current instruction for dependency violations. */
10147 struct ia64_opcode
*idesc
;
10151 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10152 idesc
->name
, CURR_SLOT
.src_line
,
10153 idesc
->dependencies
->nchks
,
10154 idesc
->dependencies
->nregs
);
10157 /* Look through the list of currently marked resources; if the current
10158 instruction has the dependency in its chks list which uses that resource,
10159 check against the specific resources used. */
10160 check_dependencies (idesc
);
10162 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10163 then add them to the list of marked resources. */
10164 mark_resources (idesc
);
10166 /* There are several types of dependency semantics, and each has its own
10167 requirements for being cleared
10169 Instruction serialization (insns separated by interruption, rfi, or
10170 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10172 Data serialization (instruction serialization, or writer + srlz.d +
10173 reader, where writer and srlz.d are in separate groups) clears
10174 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10175 always be the case).
10177 Instruction group break (groups separated by stop, taken branch,
10178 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10180 update_dependencies (idesc
);
10182 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10183 warning. Keep track of as many as possible that are useful. */
10184 note_register_values (idesc
);
10186 /* We don't need or want this anymore. */
10187 md
.mem_offset
.hint
= 0;
10192 /* Translate one line of assembly. Pseudo ops and labels do not show
10198 char *saved_input_line_pointer
, *mnemonic
;
10199 const struct pseudo_opcode
*pdesc
;
10200 struct ia64_opcode
*idesc
;
10201 unsigned char qp_regno
;
10202 unsigned int flags
;
10205 saved_input_line_pointer
= input_line_pointer
;
10206 input_line_pointer
= str
;
10208 /* extract the opcode (mnemonic): */
10210 mnemonic
= input_line_pointer
;
10211 ch
= get_symbol_end ();
10212 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10215 *input_line_pointer
= ch
;
10216 (*pdesc
->handler
) (pdesc
->arg
);
10220 /* Find the instruction descriptor matching the arguments. */
10222 idesc
= ia64_find_opcode (mnemonic
);
10223 *input_line_pointer
= ch
;
10226 as_bad ("Unknown opcode `%s'", mnemonic
);
10230 idesc
= parse_operands (idesc
);
10234 /* Handle the dynamic ops we can handle now: */
10235 if (idesc
->type
== IA64_TYPE_DYN
)
10237 if (strcmp (idesc
->name
, "add") == 0)
10239 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10240 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10244 ia64_free_opcode (idesc
);
10245 idesc
= ia64_find_opcode (mnemonic
);
10247 else if (strcmp (idesc
->name
, "mov") == 0)
10249 enum ia64_opnd opnd1
, opnd2
;
10252 opnd1
= idesc
->operands
[0];
10253 opnd2
= idesc
->operands
[1];
10254 if (opnd1
== IA64_OPND_AR3
)
10256 else if (opnd2
== IA64_OPND_AR3
)
10260 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10262 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10263 mnemonic
= "mov.i";
10264 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10265 mnemonic
= "mov.m";
10273 ia64_free_opcode (idesc
);
10274 idesc
= ia64_find_opcode (mnemonic
);
10275 while (idesc
!= NULL
10276 && (idesc
->operands
[0] != opnd1
10277 || idesc
->operands
[1] != opnd2
))
10278 idesc
= get_next_opcode (idesc
);
10282 else if (strcmp (idesc
->name
, "mov.i") == 0
10283 || strcmp (idesc
->name
, "mov.m") == 0)
10285 enum ia64_opnd opnd1
, opnd2
;
10288 opnd1
= idesc
->operands
[0];
10289 opnd2
= idesc
->operands
[1];
10290 if (opnd1
== IA64_OPND_AR3
)
10292 else if (opnd2
== IA64_OPND_AR3
)
10296 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10299 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10301 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10303 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10304 as_bad ("AR %d cannot be accessed by %c-unit",
10305 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10311 if (md
.qp
.X_op
== O_register
)
10313 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10314 md
.qp
.X_op
= O_absent
;
10317 flags
= idesc
->flags
;
10319 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10321 /* The alignment frag has to end with a stop bit only if the
10322 next instruction after the alignment directive has to be
10323 the first instruction in an instruction group. */
10326 while (align_frag
->fr_type
!= rs_align_code
)
10328 align_frag
= align_frag
->fr_next
;
10332 /* align_frag can be NULL if there are directives in
10334 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10335 align_frag
->tc_frag_data
= 1;
10338 insn_group_break (1, 0, 0);
10342 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10344 as_bad ("`%s' cannot be predicated", idesc
->name
);
10348 /* Build the instruction. */
10349 CURR_SLOT
.qp_regno
= qp_regno
;
10350 CURR_SLOT
.idesc
= idesc
;
10351 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10352 dwarf2_where (&CURR_SLOT
.debug_line
);
10354 /* Add unwind entry, if there is one. */
10355 if (unwind
.current_entry
)
10357 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10358 unwind
.current_entry
= NULL
;
10360 if (unwind
.proc_start
&& S_IS_DEFINED (unwind
.proc_start
))
10363 /* Check for dependency violations. */
10367 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10368 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10369 emit_one_bundle ();
10371 if ((flags
& IA64_OPCODE_LAST
) != 0)
10372 insn_group_break (1, 0, 0);
10374 md
.last_text_seg
= now_seg
;
10377 input_line_pointer
= saved_input_line_pointer
;
10380 /* Called when symbol NAME cannot be found in the symbol table.
10381 Should be used for dynamic valued symbols only. */
10384 md_undefined_symbol (name
)
10385 char *name ATTRIBUTE_UNUSED
;
10390 /* Called for any expression that can not be recognized. When the
10391 function is called, `input_line_pointer' will point to the start of
10398 switch (*input_line_pointer
)
10401 ++input_line_pointer
;
10403 if (*input_line_pointer
!= ']')
10405 as_bad ("Closing bracket missing");
10410 if (e
->X_op
!= O_register
)
10411 as_bad ("Register expected as index");
10413 ++input_line_pointer
;
10424 ignore_rest_of_line ();
10427 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10428 a section symbol plus some offset. For relocs involving @fptr(),
10429 directives we don't want such adjustments since we need to have the
10430 original symbol's name in the reloc. */
10432 ia64_fix_adjustable (fix
)
10435 /* Prevent all adjustments to global symbols */
10436 if (S_IS_EXTERN (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10439 switch (fix
->fx_r_type
)
10441 case BFD_RELOC_IA64_FPTR64I
:
10442 case BFD_RELOC_IA64_FPTR32MSB
:
10443 case BFD_RELOC_IA64_FPTR32LSB
:
10444 case BFD_RELOC_IA64_FPTR64MSB
:
10445 case BFD_RELOC_IA64_FPTR64LSB
:
10446 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10447 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10457 ia64_force_relocation (fix
)
10460 switch (fix
->fx_r_type
)
10462 case BFD_RELOC_IA64_FPTR64I
:
10463 case BFD_RELOC_IA64_FPTR32MSB
:
10464 case BFD_RELOC_IA64_FPTR32LSB
:
10465 case BFD_RELOC_IA64_FPTR64MSB
:
10466 case BFD_RELOC_IA64_FPTR64LSB
:
10468 case BFD_RELOC_IA64_LTOFF22
:
10469 case BFD_RELOC_IA64_LTOFF64I
:
10470 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10471 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10472 case BFD_RELOC_IA64_PLTOFF22
:
10473 case BFD_RELOC_IA64_PLTOFF64I
:
10474 case BFD_RELOC_IA64_PLTOFF64MSB
:
10475 case BFD_RELOC_IA64_PLTOFF64LSB
:
10477 case BFD_RELOC_IA64_LTOFF22X
:
10478 case BFD_RELOC_IA64_LDXMOV
:
10485 return generic_force_reloc (fix
);
10488 /* Decide from what point a pc-relative relocation is relative to,
10489 relative to the pc-relative fixup. Er, relatively speaking. */
10491 ia64_pcrel_from_section (fix
, sec
)
10495 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10497 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10504 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10506 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10510 expr
.X_op
= O_pseudo_fixup
;
10511 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10512 expr
.X_add_number
= 0;
10513 expr
.X_add_symbol
= symbol
;
10514 emit_expr (&expr
, size
);
10517 /* This is called whenever some data item (not an instruction) needs a
10518 fixup. We pick the right reloc code depending on the byteorder
10519 currently in effect. */
10521 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
10527 bfd_reloc_code_real_type code
;
10532 /* There are no reloc for 8 and 16 bit quantities, but we allow
10533 them here since they will work fine as long as the expression
10534 is fully defined at the end of the pass over the source file. */
10535 case 1: code
= BFD_RELOC_8
; break;
10536 case 2: code
= BFD_RELOC_16
; break;
10538 if (target_big_endian
)
10539 code
= BFD_RELOC_IA64_DIR32MSB
;
10541 code
= BFD_RELOC_IA64_DIR32LSB
;
10545 /* In 32-bit mode, data8 could mean function descriptors too. */
10546 if (exp
->X_op
== O_pseudo_fixup
10547 && exp
->X_op_symbol
10548 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
10549 && !(md
.flags
& EF_IA_64_ABI64
))
10551 if (target_big_endian
)
10552 code
= BFD_RELOC_IA64_IPLTMSB
;
10554 code
= BFD_RELOC_IA64_IPLTLSB
;
10555 exp
->X_op
= O_symbol
;
10560 if (target_big_endian
)
10561 code
= BFD_RELOC_IA64_DIR64MSB
;
10563 code
= BFD_RELOC_IA64_DIR64LSB
;
10568 if (exp
->X_op
== O_pseudo_fixup
10569 && exp
->X_op_symbol
10570 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
10572 if (target_big_endian
)
10573 code
= BFD_RELOC_IA64_IPLTMSB
;
10575 code
= BFD_RELOC_IA64_IPLTLSB
;
10576 exp
->X_op
= O_symbol
;
10582 as_bad ("Unsupported fixup size %d", nbytes
);
10583 ignore_rest_of_line ();
10587 if (exp
->X_op
== O_pseudo_fixup
)
10589 exp
->X_op
= O_symbol
;
10590 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
10591 /* ??? If code unchanged, unsupported. */
10594 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
10595 /* We need to store the byte order in effect in case we're going
10596 to fix an 8 or 16 bit relocation (for which there no real
10597 relocs available). See md_apply_fix3(). */
10598 fix
->tc_fix_data
.bigendian
= target_big_endian
;
10601 /* Return the actual relocation we wish to associate with the pseudo
10602 reloc described by SYM and R_TYPE. SYM should be one of the
10603 symbols in the pseudo_func array, or NULL. */
10605 static bfd_reloc_code_real_type
10606 ia64_gen_real_reloc_type (sym
, r_type
)
10607 struct symbol
*sym
;
10608 bfd_reloc_code_real_type r_type
;
10610 bfd_reloc_code_real_type
new = 0;
10617 switch (S_GET_VALUE (sym
))
10619 case FUNC_FPTR_RELATIVE
:
10622 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
10623 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
10624 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
10625 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
10626 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
10631 case FUNC_GP_RELATIVE
:
10634 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
10635 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
10636 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
10637 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
10638 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
10639 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
10644 case FUNC_LT_RELATIVE
:
10647 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
10648 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
10653 case FUNC_LT_RELATIVE_X
:
10656 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
10661 case FUNC_PC_RELATIVE
:
10664 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
10665 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
10666 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
10667 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
10668 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
10669 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
10674 case FUNC_PLT_RELATIVE
:
10677 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
10678 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
10679 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
10680 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
10685 case FUNC_SEC_RELATIVE
:
10688 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
10689 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
10690 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
10691 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
10696 case FUNC_SEG_RELATIVE
:
10699 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
10700 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
10701 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
10702 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
10707 case FUNC_LTV_RELATIVE
:
10710 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
10711 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
10712 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
10713 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
10718 case FUNC_LT_FPTR_RELATIVE
:
10721 case BFD_RELOC_IA64_IMM22
:
10722 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
10723 case BFD_RELOC_IA64_IMM64
:
10724 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
10730 case FUNC_TP_RELATIVE
:
10733 case BFD_RELOC_IA64_IMM14
:
10734 new = BFD_RELOC_IA64_TPREL14
; break;
10735 case BFD_RELOC_IA64_IMM22
:
10736 new = BFD_RELOC_IA64_TPREL22
; break;
10737 case BFD_RELOC_IA64_IMM64
:
10738 new = BFD_RELOC_IA64_TPREL64I
; break;
10744 case FUNC_LT_TP_RELATIVE
:
10747 case BFD_RELOC_IA64_IMM22
:
10748 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
10754 case FUNC_LT_DTP_MODULE
:
10757 case BFD_RELOC_IA64_IMM22
:
10758 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
10764 case FUNC_DTP_RELATIVE
:
10767 case BFD_RELOC_IA64_DIR64MSB
:
10768 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
10769 case BFD_RELOC_IA64_DIR64LSB
:
10770 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
10771 case BFD_RELOC_IA64_IMM14
:
10772 new = BFD_RELOC_IA64_DTPREL14
; break;
10773 case BFD_RELOC_IA64_IMM22
:
10774 new = BFD_RELOC_IA64_DTPREL22
; break;
10775 case BFD_RELOC_IA64_IMM64
:
10776 new = BFD_RELOC_IA64_DTPREL64I
; break;
10782 case FUNC_LT_DTP_RELATIVE
:
10785 case BFD_RELOC_IA64_IMM22
:
10786 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
10792 case FUNC_IPLT_RELOC
:
10799 /* Hmmmm. Should this ever occur? */
10806 /* Here is where generate the appropriate reloc for pseudo relocation
10809 ia64_validate_fix (fix
)
10812 switch (fix
->fx_r_type
)
10814 case BFD_RELOC_IA64_FPTR64I
:
10815 case BFD_RELOC_IA64_FPTR32MSB
:
10816 case BFD_RELOC_IA64_FPTR64LSB
:
10817 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10818 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10819 if (fix
->fx_offset
!= 0)
10820 as_bad_where (fix
->fx_file
, fix
->fx_line
,
10821 "No addend allowed in @fptr() relocation");
10829 fix_insn (fix
, odesc
, value
)
10831 const struct ia64_operand
*odesc
;
10834 bfd_vma insn
[3], t0
, t1
, control_bits
;
10839 slot
= fix
->fx_where
& 0x3;
10840 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
10842 /* Bundles are always in little-endian byte order */
10843 t0
= bfd_getl64 (fixpos
);
10844 t1
= bfd_getl64 (fixpos
+ 8);
10845 control_bits
= t0
& 0x1f;
10846 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
10847 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
10848 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
10851 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
10853 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
10854 insn
[2] |= (((value
& 0x7f) << 13)
10855 | (((value
>> 7) & 0x1ff) << 27)
10856 | (((value
>> 16) & 0x1f) << 22)
10857 | (((value
>> 21) & 0x1) << 21)
10858 | (((value
>> 63) & 0x1) << 36));
10860 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
10862 if (value
& ~0x3fffffffffffffffULL
)
10863 err
= "integer operand out of range";
10864 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
10865 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
10867 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
10870 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
10871 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
10872 | (((value
>> 0) & 0xfffff) << 13));
10875 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
10878 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
10880 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
10881 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
10882 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
10883 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
10886 /* Attempt to simplify or even eliminate a fixup. The return value is
10887 ignored; perhaps it was once meaningful, but now it is historical.
10888 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10890 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10894 md_apply_fix3 (fix
, valP
, seg
)
10897 segT seg ATTRIBUTE_UNUSED
;
10900 valueT value
= *valP
;
10902 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
10906 switch (fix
->fx_r_type
)
10908 case BFD_RELOC_IA64_DIR32MSB
:
10909 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32MSB
;
10912 case BFD_RELOC_IA64_DIR32LSB
:
10913 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32LSB
;
10916 case BFD_RELOC_IA64_DIR64MSB
:
10917 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64MSB
;
10920 case BFD_RELOC_IA64_DIR64LSB
:
10921 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64LSB
;
10930 switch (fix
->fx_r_type
)
10932 case BFD_RELOC_UNUSED
:
10933 /* This must be a TAG13 or TAG13b operand. There are no external
10934 relocs defined for them, so we must give an error. */
10935 as_bad_where (fix
->fx_file
, fix
->fx_line
,
10936 "%s must have a constant value",
10937 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
10941 case BFD_RELOC_IA64_TPREL14
:
10942 case BFD_RELOC_IA64_TPREL22
:
10943 case BFD_RELOC_IA64_TPREL64I
:
10944 case BFD_RELOC_IA64_LTOFF_TPREL22
:
10945 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
10946 case BFD_RELOC_IA64_DTPREL14
:
10947 case BFD_RELOC_IA64_DTPREL22
:
10948 case BFD_RELOC_IA64_DTPREL64I
:
10949 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
10950 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
10957 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
10959 if (fix
->tc_fix_data
.bigendian
)
10960 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
10962 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
10967 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
10972 /* Generate the BFD reloc to be stuck in the object file from the
10973 fixup used internally in the assembler. */
10976 tc_gen_reloc (sec
, fixp
)
10977 asection
*sec ATTRIBUTE_UNUSED
;
10982 reloc
= xmalloc (sizeof (*reloc
));
10983 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
10984 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
10985 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
10986 reloc
->addend
= fixp
->fx_offset
;
10987 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
10991 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
10992 "Cannot represent %s relocation in object file",
10993 bfd_get_reloc_code_name (fixp
->fx_r_type
));
10998 /* Turn a string in input_line_pointer into a floating point constant
10999 of type TYPE, and store the appropriate bytes in *LIT. The number
11000 of LITTLENUMS emitted is stored in *SIZE. An error message is
11001 returned, or NULL on OK. */
11003 #define MAX_LITTLENUMS 5
11006 md_atof (type
, lit
, size
)
11011 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11041 return "Bad call to MD_ATOF()";
11043 t
= atof_ieee (input_line_pointer
, type
, words
);
11045 input_line_pointer
= t
;
11047 (*ia64_float_to_chars
) (lit
, words
, prec
);
11051 /* It is 10 byte floating point with 6 byte padding. */
11052 memset (&lit
[10], 0, 6);
11053 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11056 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11061 /* Handle ia64 specific semantics of the align directive. */
11064 ia64_md_do_align (n
, fill
, len
, max
)
11065 int n ATTRIBUTE_UNUSED
;
11066 const char *fill ATTRIBUTE_UNUSED
;
11067 int len ATTRIBUTE_UNUSED
;
11068 int max ATTRIBUTE_UNUSED
;
11070 if (subseg_text_p (now_seg
))
11071 ia64_flush_insns ();
11074 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11075 of an rs_align_code fragment. */
11078 ia64_handle_align (fragp
)
11081 /* Use mfi bundle of nops with no stop bits. */
11082 static const unsigned char le_nop
[]
11083 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11084 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11085 static const unsigned char le_nop_stop
[]
11086 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11087 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11091 const unsigned char *nop
;
11093 if (fragp
->fr_type
!= rs_align_code
)
11096 /* Check if this frag has to end with a stop bit. */
11097 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11099 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11100 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11102 /* If no paddings are needed, we check if we need a stop bit. */
11103 if (!bytes
&& fragp
->tc_frag_data
)
11105 if (fragp
->fr_fix
< 16)
11107 /* FIXME: It won't work with
11109 alloc r32=ar.pfs,1,2,4,0
11113 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11114 _("Can't add stop bit to mark end of instruction group"));
11117 /* Bundles are always in little-endian byte order. Make sure
11118 the previous bundle has the stop bit. */
11122 /* Make sure we are on a 16-byte boundary, in case someone has been
11123 putting data into a text section. */
11126 int fix
= bytes
& 15;
11127 memset (p
, 0, fix
);
11130 fragp
->fr_fix
+= fix
;
11133 /* Instruction bundles are always little-endian. */
11134 memcpy (p
, nop
, 16);
11135 fragp
->fr_var
= 16;
11139 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11144 number_to_chars_bigendian (lit
, (long) (*words
++),
11145 sizeof (LITTLENUM_TYPE
));
11146 lit
+= sizeof (LITTLENUM_TYPE
);
11151 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11156 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11157 sizeof (LITTLENUM_TYPE
));
11158 lit
+= sizeof (LITTLENUM_TYPE
);
11163 ia64_elf_section_change_hook (void)
11165 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11166 && elf_linked_to_section (now_seg
) == NULL
)
11167 elf_linked_to_section (now_seg
) = text_section
;
11168 dot_byteorder (-1);
11171 /* Check if a label should be made global. */
11173 ia64_check_label (symbolS
*label
)
11175 if (*input_line_pointer
== ':')
11177 S_SET_EXTERNAL (label
);
11178 input_line_pointer
++;
11182 /* Used to remember where .alias and .secalias directives are seen. We
11183 will rename symbol and section names when we are about to output
11184 the relocatable file. */
11187 char *file
; /* The file where the directive is seen. */
11188 unsigned int line
; /* The line number the directive is at. */
11189 const char *name
; /* The orignale name of the symbol. */
11192 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11193 .secalias. Otherwise, it is .alias. */
11195 dot_alias (int section
)
11197 char *name
, *alias
;
11201 const char *error_string
;
11204 struct hash_control
*ahash
, *nhash
;
11207 name
= input_line_pointer
;
11208 delim
= get_symbol_end ();
11209 end_name
= input_line_pointer
;
11212 if (name
== end_name
)
11214 as_bad (_("expected symbol name"));
11215 discard_rest_of_line ();
11219 SKIP_WHITESPACE ();
11221 if (*input_line_pointer
!= ',')
11224 as_bad (_("expected comma after \"%s\""), name
);
11226 ignore_rest_of_line ();
11230 input_line_pointer
++;
11233 /* We call demand_copy_C_string to check if alias string is valid.
11234 There should be a closing `"' and no `\0' in the string. */
11235 alias
= demand_copy_C_string (&len
);
11238 ignore_rest_of_line ();
11242 /* Make a copy of name string. */
11243 len
= strlen (name
) + 1;
11244 obstack_grow (¬es
, name
, len
);
11245 name
= obstack_finish (¬es
);
11250 ahash
= secalias_hash
;
11251 nhash
= secalias_name_hash
;
11256 ahash
= alias_hash
;
11257 nhash
= alias_name_hash
;
11260 /* Check if alias has been used before. */
11261 h
= (struct alias
*) hash_find (ahash
, alias
);
11264 if (strcmp (h
->name
, name
))
11265 as_bad (_("`%s' is already the alias of %s `%s'"),
11266 alias
, kind
, h
->name
);
11270 /* Check if name already has an alias. */
11271 a
= (const char *) hash_find (nhash
, name
);
11274 if (strcmp (a
, alias
))
11275 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11279 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11280 as_where (&h
->file
, &h
->line
);
11283 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11286 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11287 alias
, kind
, error_string
);
11291 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11294 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11295 alias
, kind
, error_string
);
11297 obstack_free (¬es
, name
);
11298 obstack_free (¬es
, alias
);
11301 demand_empty_rest_of_line ();
11304 /* It renames the original symbol name to its alias. */
11306 do_alias (const char *alias
, PTR value
)
11308 struct alias
*h
= (struct alias
*) value
;
11309 symbolS
*sym
= symbol_find (h
->name
);
11312 as_warn_where (h
->file
, h
->line
,
11313 _("symbol `%s' aliased to `%s' is not used"),
11316 S_SET_NAME (sym
, (char *) alias
);
11319 /* Called from write_object_file. */
11321 ia64_adjust_symtab (void)
11323 hash_traverse (alias_hash
, do_alias
);
11326 /* It renames the original section name to its alias. */
11328 do_secalias (const char *alias
, PTR value
)
11330 struct alias
*h
= (struct alias
*) value
;
11331 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11334 as_warn_where (h
->file
, h
->line
,
11335 _("section `%s' aliased to `%s' is not used"),
11341 /* Called from write_object_file. */
11343 ia64_frob_file (void)
11345 hash_traverse (secalias_hash
, do_secalias
);