1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
59 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
61 /* Some systems define MIN in, e.g., param.h. */
63 #define MIN(a,b) ((a) < (b) ? (a) : (b))
66 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
67 #define CURR_SLOT md.slot[md.curr_slot]
69 #define O_pseudo_fixup (O_max + 1)
73 /* IA-64 ABI section pseudo-ops. */
74 SPECIAL_SECTION_BSS
= 0,
76 SPECIAL_SECTION_SDATA
,
77 SPECIAL_SECTION_RODATA
,
78 SPECIAL_SECTION_COMMENT
,
79 SPECIAL_SECTION_UNWIND
,
80 SPECIAL_SECTION_UNWIND_INFO
,
81 /* HPUX specific section pseudo-ops. */
82 SPECIAL_SECTION_INIT_ARRAY
,
83 SPECIAL_SECTION_FINI_ARRAY
,
100 FUNC_LT_FPTR_RELATIVE
,
102 FUNC_LT_DTP_RELATIVE
,
106 FUNC_SLOTCOUNT_RELOC
,
113 REG_FR
= (REG_GR
+ 128),
114 REG_AR
= (REG_FR
+ 128),
115 REG_CR
= (REG_AR
+ 128),
116 REG_DAHR
= (REG_CR
+ 128),
117 REG_P
= (REG_DAHR
+ 8),
118 REG_BR
= (REG_P
+ 64),
119 REG_IP
= (REG_BR
+ 8),
126 /* The following are pseudo-registers for use by gas only. */
138 /* The following pseudo-registers are used for unwind directives only: */
146 DYNREG_GR
= 0, /* dynamic general purpose register */
147 DYNREG_FR
, /* dynamic floating point register */
148 DYNREG_PR
, /* dynamic predicate register */
152 enum operand_match_result
155 OPERAND_OUT_OF_RANGE
,
159 /* On the ia64, we can't know the address of a text label until the
160 instructions are packed into a bundle. To handle this, we keep
161 track of the list of labels that appear in front of each
165 struct label_fix
*next
;
167 bfd_boolean dw2_mark_labels
;
171 /* An internally used relocation. */
172 #define DUMMY_RELOC_IA64_SLOTCOUNT (BFD_RELOC_UNUSED + 1)
175 /* This is the endianness of the current section. */
176 extern int target_big_endian
;
178 /* This is the default endianness. */
179 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
181 void (*ia64_number_to_chars
) (char *, valueT
, int);
183 static void ia64_float_to_chars_bigendian (char *, LITTLENUM_TYPE
*, int);
184 static void ia64_float_to_chars_littleendian (char *, LITTLENUM_TYPE
*, int);
186 static void (*ia64_float_to_chars
) (char *, LITTLENUM_TYPE
*, int);
188 static struct hash_control
*alias_hash
;
189 static struct hash_control
*alias_name_hash
;
190 static struct hash_control
*secalias_hash
;
191 static struct hash_control
*secalias_name_hash
;
193 /* List of chars besides those in app.c:symbol_chars that can start an
194 operand. Used to prevent the scrubber eating vital white-space. */
195 const char ia64_symbol_chars
[] = "@?";
197 /* Characters which always start a comment. */
198 const char comment_chars
[] = "";
200 /* Characters which start a comment at the beginning of a line. */
201 const char line_comment_chars
[] = "#";
203 /* Characters which may be used to separate multiple commands on a
205 const char line_separator_chars
[] = ";{}";
207 /* Characters which are used to indicate an exponent in a floating
209 const char EXP_CHARS
[] = "eE";
211 /* Characters which mean that a number is a floating point constant,
213 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
215 /* ia64-specific option processing: */
217 const char *md_shortopts
= "m:N:x::";
219 struct option md_longopts
[] =
221 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
222 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
223 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
224 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
227 size_t md_longopts_size
= sizeof (md_longopts
);
231 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
232 struct hash_control
*reg_hash
; /* register name hash table */
233 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
234 struct hash_control
*const_hash
; /* constant hash table */
235 struct hash_control
*entry_hash
; /* code entry hint hash table */
237 /* If X_op is != O_absent, the registername for the instruction's
238 qualifying predicate. If NULL, p0 is assumed for instructions
239 that are predictable. */
242 /* Optimize for which CPU. */
249 /* What to do when hint.b is used. */
261 explicit_mode
: 1, /* which mode we're in */
262 default_explicit_mode
: 1, /* which mode is the default */
263 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
265 keep_pending_output
: 1;
267 /* What to do when something is wrong with unwind directives. */
270 unwind_check_warning
,
274 /* Each bundle consists of up to three instructions. We keep
275 track of four most recent instructions so we can correctly set
276 the end_of_insn_group for the last instruction in a bundle. */
278 int num_slots_in_use
;
282 end_of_insn_group
: 1,
283 manual_bundling_on
: 1,
284 manual_bundling_off
: 1,
285 loc_directive_seen
: 1;
286 signed char user_template
; /* user-selected template, if any */
287 unsigned char qp_regno
; /* qualifying predicate */
288 /* This duplicates a good fraction of "struct fix" but we
289 can't use a "struct fix" instead since we can't call
290 fix_new_exp() until we know the address of the instruction. */
294 bfd_reloc_code_real_type code
;
295 enum ia64_opnd opnd
; /* type of operand in need of fix */
296 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
297 expressionS expr
; /* the value to be inserted */
299 fixup
[2]; /* at most two fixups per insn */
300 struct ia64_opcode
*idesc
;
301 struct label_fix
*label_fixups
;
302 struct label_fix
*tag_fixups
;
303 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
305 const char *src_file
;
306 unsigned int src_line
;
307 struct dwarf2_line_info debug_line
;
315 struct dynreg
*next
; /* next dynamic register */
317 unsigned short base
; /* the base register number */
318 unsigned short num_regs
; /* # of registers in this set */
320 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
322 flagword flags
; /* ELF-header flags */
325 unsigned hint
:1; /* is this hint currently valid? */
326 bfd_vma offset
; /* mem.offset offset */
327 bfd_vma base
; /* mem.offset base */
330 int path
; /* number of alt. entry points seen */
331 const char **entry_labels
; /* labels of all alternate paths in
332 the current DV-checking block. */
333 int maxpaths
; /* size currently allocated for
336 int pointer_size
; /* size in bytes of a pointer */
337 int pointer_size_shift
; /* shift size of a pointer for alignment */
339 symbolS
*indregsym
[IND_RR
- IND_CPUID
+ 1];
343 /* These are not const, because they are modified to MMI for non-itanium1
345 /* MFI bundle of nops. */
346 static unsigned char le_nop
[16] =
348 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
349 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
351 /* MFI bundle of nops with stop-bit. */
352 static unsigned char le_nop_stop
[16] =
354 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
355 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
358 /* application registers: */
364 #define AR_BSPSTORE 18
390 {"ar.k0", AR_K0
}, {"ar.k1", AR_K0
+ 1},
391 {"ar.k2", AR_K0
+ 2}, {"ar.k3", AR_K0
+ 3},
392 {"ar.k4", AR_K0
+ 4}, {"ar.k5", AR_K0
+ 5},
393 {"ar.k6", AR_K0
+ 6}, {"ar.k7", AR_K7
},
394 {"ar.rsc", AR_RSC
}, {"ar.bsp", AR_BSP
},
395 {"ar.bspstore", AR_BSPSTORE
}, {"ar.rnat", AR_RNAT
},
396 {"ar.fcr", AR_FCR
}, {"ar.eflag", AR_EFLAG
},
397 {"ar.csd", AR_CSD
}, {"ar.ssd", AR_SSD
},
398 {"ar.cflg", AR_CFLG
}, {"ar.fsr", AR_FSR
},
399 {"ar.fir", AR_FIR
}, {"ar.fdr", AR_FDR
},
400 {"ar.ccv", AR_CCV
}, {"ar.unat", AR_UNAT
},
401 {"ar.fpsr", AR_FPSR
}, {"ar.itc", AR_ITC
},
402 {"ar.ruc", AR_RUC
}, {"ar.pfs", AR_PFS
},
403 {"ar.lc", AR_LC
}, {"ar.ec", AR_EC
},
406 /* control registers: */
447 {"cr.gpta", CR_GPTA
},
448 {"cr.ipsr", CR_IPSR
},
452 {"cr.itir", CR_ITIR
},
453 {"cr.iipa", CR_IIPA
},
457 {"cr.iib0", CR_IIB0
},
458 {"cr.iib1", CR_IIB1
},
463 {"cr.irr0", CR_IRR0
},
464 {"cr.irr1", CR_IRR0
+ 1},
465 {"cr.irr2", CR_IRR0
+ 2},
466 {"cr.irr3", CR_IRR3
},
469 {"cr.cmcv", CR_CMCV
},
470 {"cr.lrr0", CR_LRR0
},
479 static const struct const_desc
486 /* PSR constant masks: */
489 {"psr.be", ((valueT
) 1) << 1},
490 {"psr.up", ((valueT
) 1) << 2},
491 {"psr.ac", ((valueT
) 1) << 3},
492 {"psr.mfl", ((valueT
) 1) << 4},
493 {"psr.mfh", ((valueT
) 1) << 5},
495 {"psr.ic", ((valueT
) 1) << 13},
496 {"psr.i", ((valueT
) 1) << 14},
497 {"psr.pk", ((valueT
) 1) << 15},
499 {"psr.dt", ((valueT
) 1) << 17},
500 {"psr.dfl", ((valueT
) 1) << 18},
501 {"psr.dfh", ((valueT
) 1) << 19},
502 {"psr.sp", ((valueT
) 1) << 20},
503 {"psr.pp", ((valueT
) 1) << 21},
504 {"psr.di", ((valueT
) 1) << 22},
505 {"psr.si", ((valueT
) 1) << 23},
506 {"psr.db", ((valueT
) 1) << 24},
507 {"psr.lp", ((valueT
) 1) << 25},
508 {"psr.tb", ((valueT
) 1) << 26},
509 {"psr.rt", ((valueT
) 1) << 27},
510 /* 28-31: reserved */
511 /* 32-33: cpl (current privilege level) */
512 {"psr.is", ((valueT
) 1) << 34},
513 {"psr.mc", ((valueT
) 1) << 35},
514 {"psr.it", ((valueT
) 1) << 36},
515 {"psr.id", ((valueT
) 1) << 37},
516 {"psr.da", ((valueT
) 1) << 38},
517 {"psr.dd", ((valueT
) 1) << 39},
518 {"psr.ss", ((valueT
) 1) << 40},
519 /* 41-42: ri (restart instruction) */
520 {"psr.ed", ((valueT
) 1) << 43},
521 {"psr.bn", ((valueT
) 1) << 44},
524 /* indirect register-sets/memory: */
533 { "CPUID", IND_CPUID
},
534 { "cpuid", IND_CPUID
},
543 { "dahr", IND_DAHR
},
547 /* Pseudo functions used to indicate relocation types (these functions
548 start with an at sign (@). */
570 /* reloc pseudo functions (these must come first!): */
571 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
572 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
573 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
574 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
575 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
576 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
577 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
578 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
579 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
580 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
581 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
582 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
583 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
584 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
585 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
586 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
587 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
589 { "slotcount", PSEUDO_FUNC_RELOC
, { 0 } },
592 /* mbtype4 constants: */
593 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
594 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
595 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
596 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
597 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
599 /* fclass constants: */
600 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
601 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
602 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
603 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
604 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
605 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
606 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
607 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
608 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
610 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
612 /* hint constants: */
613 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
614 { "priority", PSEUDO_FUNC_CONST
, { 0x1 } },
617 { "clz", PSEUDO_FUNC_CONST
, { 32 } },
618 { "mpy", PSEUDO_FUNC_CONST
, { 33 } },
619 { "datahints", PSEUDO_FUNC_CONST
, { 34 } },
621 /* unwind-related constants: */
622 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
623 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
624 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
625 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_GNU
} },
626 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
627 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
628 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
630 /* unwind-related registers: */
631 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
634 /* 41-bit nop opcodes (one per unit): */
635 static const bfd_vma nop
[IA64_NUM_UNITS
] =
637 0x0000000000LL
, /* NIL => break 0 */
638 0x0008000000LL
, /* I-unit nop */
639 0x0008000000LL
, /* M-unit nop */
640 0x4000000000LL
, /* B-unit nop */
641 0x0008000000LL
, /* F-unit nop */
642 0x0000000000LL
, /* L-"unit" nop immediate */
643 0x0008000000LL
, /* X-unit nop */
646 /* Can't be `const' as it's passed to input routines (which have the
647 habit of setting temporary sentinels. */
648 static char special_section_name
[][20] =
650 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
651 {".IA_64.unwind"}, {".IA_64.unwind_info"},
652 {".init_array"}, {".fini_array"}
655 /* The best template for a particular sequence of up to three
657 #define N IA64_NUM_TYPES
658 static unsigned char best_template
[N
][N
][N
];
661 /* Resource dependencies currently in effect */
663 int depind
; /* dependency index */
664 const struct ia64_dependency
*dependency
; /* actual dependency */
665 unsigned specific
:1, /* is this a specific bit/regno? */
666 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
667 int index
; /* specific regno/bit within dependency */
668 int note
; /* optional qualifying note (0 if none) */
672 int insn_srlz
; /* current insn serialization state */
673 int data_srlz
; /* current data serialization state */
674 int qp_regno
; /* qualifying predicate for this usage */
675 const char *file
; /* what file marked this dependency */
676 unsigned int line
; /* what line marked this dependency */
677 struct mem_offset mem_offset
; /* optional memory offset hint */
678 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
679 int path
; /* corresponding code entry index */
681 static int regdepslen
= 0;
682 static int regdepstotlen
= 0;
683 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
684 static const char *dv_sem
[] = { "none", "implied", "impliedf",
685 "data", "instr", "specific", "stop", "other" };
686 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
688 /* Current state of PR mutexation */
689 static struct qpmutex
{
692 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
693 static int qp_mutexeslen
= 0;
694 static int qp_mutexestotlen
= 0;
695 static valueT qp_safe_across_calls
= 0;
697 /* Current state of PR implications */
698 static struct qp_imply
{
701 unsigned p2_branched
:1;
703 } *qp_implies
= NULL
;
704 static int qp_implieslen
= 0;
705 static int qp_impliestotlen
= 0;
707 /* Keep track of static GR values so that indirect register usage can
708 sometimes be tracked. */
719 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
725 /* Remember the alignment frag. */
726 static fragS
*align_frag
;
728 /* These are the routines required to output the various types of
731 /* A slot_number is a frag address plus the slot index (0-2). We use the
732 frag address here so that if there is a section switch in the middle of
733 a function, then instructions emitted to a different section are not
734 counted. Since there may be more than one frag for a function, this
735 means we also need to keep track of which frag this address belongs to
736 so we can compute inter-frag distances. This also nicely solves the
737 problem with nops emitted for align directives, which can't easily be
738 counted, but can easily be derived from frag sizes. */
740 typedef struct unw_rec_list
{
742 unsigned long slot_number
;
744 struct unw_rec_list
*next
;
747 #define SLOT_NUM_NOT_SET (unsigned)-1
749 /* Linked list of saved prologue counts. A very poor
750 implementation of a map from label numbers to prologue counts. */
751 typedef struct label_prologue_count
753 struct label_prologue_count
*next
;
754 unsigned long label_number
;
755 unsigned int prologue_count
;
756 } label_prologue_count
;
758 typedef struct proc_pending
761 struct proc_pending
*next
;
766 /* Maintain a list of unwind entries for the current function. */
770 /* Any unwind entries that should be attached to the current slot
771 that an insn is being constructed for. */
772 unw_rec_list
*current_entry
;
774 /* These are used to create the unwind table entry for this function. */
775 proc_pending proc_pending
;
776 symbolS
*info
; /* pointer to unwind info */
777 symbolS
*personality_routine
;
779 subsegT saved_text_subseg
;
780 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
782 /* TRUE if processing unwind directives in a prologue region. */
783 unsigned int prologue
: 1;
784 unsigned int prologue_mask
: 4;
785 unsigned int prologue_gr
: 7;
786 unsigned int body
: 1;
787 unsigned int insn
: 1;
788 unsigned int prologue_count
; /* number of .prologues seen so far */
789 /* Prologue counts at previous .label_state directives. */
790 struct label_prologue_count
* saved_prologue_counts
;
792 /* List of split up .save-s. */
793 unw_p_record
*pending_saves
;
796 /* The input value is a negated offset from psp, and specifies an address
797 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
798 must add 16 and divide by 4 to get the encoded value. */
800 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
802 typedef void (*vbyte_func
) (int, char *, char *);
804 /* Forward declarations: */
805 static void dot_alias (int);
806 static int parse_operand_and_eval (expressionS
*, int);
807 static void emit_one_bundle (void);
808 static bfd_reloc_code_real_type
ia64_gen_real_reloc_type (struct symbol
*,
809 bfd_reloc_code_real_type
);
810 static void insn_group_break (int, int, int);
811 static void add_qp_mutex (valueT
);
812 static void add_qp_imply (int, int);
813 static void clear_qp_mutex (valueT
);
814 static void clear_qp_implies (valueT
, valueT
);
815 static void print_dependency (const char *, int);
816 static void instruction_serialization (void);
817 static void data_serialization (void);
818 static void output_R3_format (vbyte_func
, unw_record_type
, unsigned long);
819 static void output_B3_format (vbyte_func
, unsigned long, unsigned long);
820 static void output_B4_format (vbyte_func
, unw_record_type
, unsigned long);
821 static void free_saved_prologue_counts (void);
823 /* Determine if application register REGNUM resides only in the integer
824 unit (as opposed to the memory unit). */
826 ar_is_only_in_integer_unit (int reg
)
829 return reg
>= 64 && reg
<= 111;
832 /* Determine if application register REGNUM resides only in the memory
833 unit (as opposed to the integer unit). */
835 ar_is_only_in_memory_unit (int reg
)
838 return reg
>= 0 && reg
<= 47;
841 /* Switch to section NAME and create section if necessary. It's
842 rather ugly that we have to manipulate input_line_pointer but I
843 don't see any other way to accomplish the same thing without
844 changing obj-elf.c (which may be the Right Thing, in the end). */
846 set_section (char *name
)
848 char *saved_input_line_pointer
;
850 saved_input_line_pointer
= input_line_pointer
;
851 input_line_pointer
= name
;
853 input_line_pointer
= saved_input_line_pointer
;
856 /* Map 's' to SHF_IA_64_SHORT. */
859 ia64_elf_section_letter (int letter
, char **ptr_msg
)
862 return SHF_IA_64_SHORT
;
863 else if (letter
== 'o')
864 return SHF_LINK_ORDER
;
866 else if (letter
== 'O')
867 return SHF_IA_64_VMS_OVERLAID
;
868 else if (letter
== 'g')
869 return SHF_IA_64_VMS_GLOBAL
;
872 *ptr_msg
= _("bad .section directive: want a,o,s,w,x,M,S,G,T in string");
876 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
879 ia64_elf_section_flags (flagword flags
,
881 int type ATTRIBUTE_UNUSED
)
883 if (attr
& SHF_IA_64_SHORT
)
884 flags
|= SEC_SMALL_DATA
;
889 ia64_elf_section_type (const char *str
, size_t len
)
891 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
893 if (STREQ (ELF_STRING_ia64_unwind_info
))
896 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
899 if (STREQ (ELF_STRING_ia64_unwind
))
900 return SHT_IA_64_UNWIND
;
902 if (STREQ (ELF_STRING_ia64_unwind_once
))
903 return SHT_IA_64_UNWIND
;
905 if (STREQ ("unwind"))
906 return SHT_IA_64_UNWIND
;
913 set_regstack (unsigned int ins
,
921 sof
= ins
+ locs
+ outs
;
924 as_bad (_("Size of frame exceeds maximum of 96 registers"));
929 as_warn (_("Size of rotating registers exceeds frame size"));
932 md
.in
.base
= REG_GR
+ 32;
933 md
.loc
.base
= md
.in
.base
+ ins
;
934 md
.out
.base
= md
.loc
.base
+ locs
;
936 md
.in
.num_regs
= ins
;
937 md
.loc
.num_regs
= locs
;
938 md
.out
.num_regs
= outs
;
939 md
.rot
.num_regs
= rots
;
944 ia64_flush_insns (void)
946 struct label_fix
*lfix
;
948 subsegT saved_subseg
;
952 if (!md
.last_text_seg
)
956 saved_subseg
= now_subseg
;
958 subseg_set (md
.last_text_seg
, 0);
960 while (md
.num_slots_in_use
> 0)
961 emit_one_bundle (); /* force out queued instructions */
963 /* In case there are labels following the last instruction, resolve
966 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
968 symbol_set_value_now (lfix
->sym
);
969 mark
|= lfix
->dw2_mark_labels
;
973 dwarf2_where (&CURR_SLOT
.debug_line
);
974 CURR_SLOT
.debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
975 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT
.debug_line
);
976 dwarf2_consume_line_info ();
978 CURR_SLOT
.label_fixups
= 0;
980 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
981 symbol_set_value_now (lfix
->sym
);
982 CURR_SLOT
.tag_fixups
= 0;
984 /* In case there are unwind directives following the last instruction,
985 resolve those now. We only handle prologue, body, and endp directives
986 here. Give an error for others. */
987 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
995 ptr
->slot_number
= (unsigned long) frag_more (0);
996 ptr
->slot_frag
= frag_now
;
999 /* Allow any record which doesn't have a "t" field (i.e.,
1000 doesn't relate to a particular instruction). */
1016 as_bad (_("Unwind directive not followed by an instruction."));
1020 unwind
.current_entry
= NULL
;
1022 subseg_set (saved_seg
, saved_subseg
);
1024 if (md
.qp
.X_op
== O_register
)
1025 as_bad (_("qualifying predicate not followed by instruction"));
1029 ia64_do_align (int nbytes
)
1031 char *saved_input_line_pointer
= input_line_pointer
;
1033 input_line_pointer
= "";
1034 s_align_bytes (nbytes
);
1035 input_line_pointer
= saved_input_line_pointer
;
1039 ia64_cons_align (int nbytes
)
1043 char *saved_input_line_pointer
= input_line_pointer
;
1044 input_line_pointer
= "";
1045 s_align_bytes (nbytes
);
1046 input_line_pointer
= saved_input_line_pointer
;
1052 /* .vms_common section, symbol, size, alignment */
1055 obj_elf_vms_common (int ignore ATTRIBUTE_UNUSED
)
1064 segT current_seg
= now_seg
;
1065 subsegT current_subseg
= now_subseg
;
1069 sec_name
= obj_elf_section_name ();
1070 if (sec_name
== NULL
)
1075 if (*input_line_pointer
== ',')
1077 input_line_pointer
++;
1082 as_bad (_("expected ',' after section name"));
1083 ignore_rest_of_line ();
1087 c
= get_symbol_name (&sym_name
);
1089 if (input_line_pointer
== sym_name
)
1091 (void) restore_line_pointer (c
);
1092 as_bad (_("expected symbol name"));
1093 ignore_rest_of_line ();
1097 symbolP
= symbol_find_or_make (sym_name
);
1098 (void) restore_line_pointer (c
);
1100 if ((S_IS_DEFINED (symbolP
) || symbol_equated_p (symbolP
))
1101 && !S_IS_COMMON (symbolP
))
1103 as_bad (_("Ignoring attempt to re-define symbol"));
1104 ignore_rest_of_line ();
1110 if (*input_line_pointer
== ',')
1112 input_line_pointer
++;
1117 as_bad (_("expected ',' after symbol name"));
1118 ignore_rest_of_line ();
1122 temp
= get_absolute_expression ();
1124 size
&= ((offsetT
) 2 << (stdoutput
->arch_info
->bits_per_address
- 1)) - 1;
1127 as_warn (_("size (%ld) out of range, ignored"), (long) temp
);
1128 ignore_rest_of_line ();
1134 if (*input_line_pointer
== ',')
1136 input_line_pointer
++;
1141 as_bad (_("expected ',' after symbol size"));
1142 ignore_rest_of_line ();
1146 log_align
= get_absolute_expression ();
1148 demand_empty_rest_of_line ();
1150 obj_elf_change_section
1151 (sec_name
, SHT_NOBITS
,
1152 SHF_ALLOC
| SHF_WRITE
| SHF_IA_64_VMS_OVERLAID
| SHF_IA_64_VMS_GLOBAL
,
1155 S_SET_VALUE (symbolP
, 0);
1156 S_SET_SIZE (symbolP
, size
);
1157 S_SET_EXTERNAL (symbolP
);
1158 S_SET_SEGMENT (symbolP
, now_seg
);
1160 symbol_get_bfdsym (symbolP
)->flags
|= BSF_OBJECT
;
1162 record_alignment (now_seg
, log_align
);
1164 cur_size
= bfd_section_size (stdoutput
, now_seg
);
1165 if ((int) size
> cur_size
)
1168 = frag_var (rs_fill
, 1, 1, (relax_substateT
)0, NULL
,
1169 (valueT
)size
- (valueT
)cur_size
, NULL
);
1171 bfd_section_size (stdoutput
, now_seg
) = size
;
1174 /* Switch back to current segment. */
1175 subseg_set (current_seg
, current_subseg
);
1177 #ifdef md_elf_section_change_hook
1178 md_elf_section_change_hook ();
1184 /* Output COUNT bytes to a memory location. */
1185 static char *vbyte_mem_ptr
= NULL
;
1188 output_vbyte_mem (int count
, char *ptr
, char *comment ATTRIBUTE_UNUSED
)
1191 if (vbyte_mem_ptr
== NULL
)
1196 for (x
= 0; x
< count
; x
++)
1197 *(vbyte_mem_ptr
++) = ptr
[x
];
1200 /* Count the number of bytes required for records. */
1201 static int vbyte_count
= 0;
1203 count_output (int count
,
1204 char *ptr ATTRIBUTE_UNUSED
,
1205 char *comment ATTRIBUTE_UNUSED
)
1207 vbyte_count
+= count
;
1211 output_R1_format (vbyte_func f
, unw_record_type rtype
, int rlen
)
1217 output_R3_format (f
, rtype
, rlen
);
1223 else if (rtype
!= prologue
)
1224 as_bad (_("record type is not valid"));
1226 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1227 (*f
) (1, &byte
, NULL
);
1231 output_R2_format (vbyte_func f
, int mask
, int grsave
, unsigned long rlen
)
1235 mask
= (mask
& 0x0f);
1236 grsave
= (grsave
& 0x7f);
1238 bytes
[0] = (UNW_R2
| (mask
>> 1));
1239 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1240 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1241 (*f
) (count
, bytes
, NULL
);
1245 output_R3_format (vbyte_func f
, unw_record_type rtype
, unsigned long rlen
)
1251 output_R1_format (f
, rtype
, rlen
);
1257 else if (rtype
!= prologue
)
1258 as_bad (_("record type is not valid"));
1259 bytes
[0] = (UNW_R3
| r
);
1260 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1261 (*f
) (count
+ 1, bytes
, NULL
);
1265 output_P1_format (vbyte_func f
, int brmask
)
1268 byte
= UNW_P1
| (brmask
& 0x1f);
1269 (*f
) (1, &byte
, NULL
);
1273 output_P2_format (vbyte_func f
, int brmask
, int gr
)
1276 brmask
= (brmask
& 0x1f);
1277 bytes
[0] = UNW_P2
| (brmask
>> 1);
1278 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1279 (*f
) (2, bytes
, NULL
);
1283 output_P3_format (vbyte_func f
, unw_record_type rtype
, int reg
)
1327 as_bad (_("Invalid record type for P3 format."));
1329 bytes
[0] = (UNW_P3
| (r
>> 1));
1330 bytes
[1] = (((r
& 1) << 7) | reg
);
1331 (*f
) (2, bytes
, NULL
);
1335 output_P4_format (vbyte_func f
, unsigned char *imask
, unsigned long imask_size
)
1338 (*f
) (imask_size
, (char *) imask
, NULL
);
1342 output_P5_format (vbyte_func f
, int grmask
, unsigned long frmask
)
1345 grmask
= (grmask
& 0x0f);
1348 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1349 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1350 bytes
[3] = (frmask
& 0x000000ff);
1351 (*f
) (4, bytes
, NULL
);
1355 output_P6_format (vbyte_func f
, unw_record_type rtype
, int rmask
)
1360 if (rtype
== gr_mem
)
1362 else if (rtype
!= fr_mem
)
1363 as_bad (_("Invalid record type for format P6"));
1364 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1365 (*f
) (1, &byte
, NULL
);
1369 output_P7_format (vbyte_func f
,
1370 unw_record_type rtype
,
1377 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1382 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1432 bytes
[0] = (UNW_P7
| r
);
1433 (*f
) (count
, bytes
, NULL
);
1437 output_P8_format (vbyte_func f
, unw_record_type rtype
, unsigned long t
)
1475 case bspstore_psprel
:
1478 case bspstore_sprel
:
1490 case priunat_when_gr
:
1493 case priunat_psprel
:
1499 case priunat_when_mem
:
1506 count
+= output_leb128 (bytes
+ 2, t
, 0);
1507 (*f
) (count
, bytes
, NULL
);
1511 output_P9_format (vbyte_func f
, int grmask
, int gr
)
1515 bytes
[1] = (grmask
& 0x0f);
1516 bytes
[2] = (gr
& 0x7f);
1517 (*f
) (3, bytes
, NULL
);
1521 output_P10_format (vbyte_func f
, int abi
, int context
)
1525 bytes
[1] = (abi
& 0xff);
1526 bytes
[2] = (context
& 0xff);
1527 (*f
) (3, bytes
, NULL
);
1531 output_B1_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1537 output_B4_format (f
, rtype
, label
);
1540 if (rtype
== copy_state
)
1542 else if (rtype
!= label_state
)
1543 as_bad (_("Invalid record type for format B1"));
1545 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1546 (*f
) (1, &byte
, NULL
);
1550 output_B2_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1556 output_B3_format (f
, ecount
, t
);
1559 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1560 count
+= output_leb128 (bytes
+ 1, t
, 0);
1561 (*f
) (count
, bytes
, NULL
);
1565 output_B3_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1571 output_B2_format (f
, ecount
, t
);
1575 count
+= output_leb128 (bytes
+ 1, t
, 0);
1576 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1577 (*f
) (count
, bytes
, NULL
);
1581 output_B4_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1588 output_B1_format (f
, rtype
, label
);
1592 if (rtype
== copy_state
)
1594 else if (rtype
!= label_state
)
1595 as_bad (_("Invalid record type for format B1"));
1597 bytes
[0] = (UNW_B4
| (r
<< 3));
1598 count
+= output_leb128 (bytes
+ 1, label
, 0);
1599 (*f
) (count
, bytes
, NULL
);
1603 format_ab_reg (int ab
, int reg
)
1608 ret
= (ab
<< 5) | reg
;
1613 output_X1_format (vbyte_func f
,
1614 unw_record_type rtype
,
1625 if (rtype
== spill_sprel
)
1627 else if (rtype
!= spill_psprel
)
1628 as_bad (_("Invalid record type for format X1"));
1629 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1630 count
+= output_leb128 (bytes
+ 2, t
, 0);
1631 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1632 (*f
) (count
, bytes
, NULL
);
1636 output_X2_format (vbyte_func f
,
1647 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1648 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1649 count
+= output_leb128 (bytes
+ 3, t
, 0);
1650 (*f
) (count
, bytes
, NULL
);
1654 output_X3_format (vbyte_func f
,
1655 unw_record_type rtype
,
1667 if (rtype
== spill_sprel_p
)
1669 else if (rtype
!= spill_psprel_p
)
1670 as_bad (_("Invalid record type for format X3"));
1671 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1672 bytes
[2] = format_ab_reg (ab
, reg
);
1673 count
+= output_leb128 (bytes
+ 3, t
, 0);
1674 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1675 (*f
) (count
, bytes
, NULL
);
1679 output_X4_format (vbyte_func f
,
1691 bytes
[1] = (qp
& 0x3f);
1692 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1693 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1694 count
+= output_leb128 (bytes
+ 4, t
, 0);
1695 (*f
) (count
, bytes
, NULL
);
1698 /* This function checks whether there are any outstanding .save-s and
1699 discards them if so. */
1702 check_pending_save (void)
1704 if (unwind
.pending_saves
)
1706 unw_rec_list
*cur
, *prev
;
1708 as_warn (_("Previous .save incomplete"));
1709 for (cur
= unwind
.list
, prev
= NULL
; cur
; )
1710 if (&cur
->r
.record
.p
== unwind
.pending_saves
)
1713 prev
->next
= cur
->next
;
1715 unwind
.list
= cur
->next
;
1716 if (cur
== unwind
.tail
)
1718 if (cur
== unwind
.current_entry
)
1719 unwind
.current_entry
= cur
->next
;
1720 /* Don't free the first discarded record, it's being used as
1721 terminator for (currently) br_gr and gr_gr processing, and
1722 also prevents leaving a dangling pointer to it in its
1724 cur
->r
.record
.p
.grmask
= 0;
1725 cur
->r
.record
.p
.brmask
= 0;
1726 cur
->r
.record
.p
.frmask
= 0;
1727 prev
= cur
->r
.record
.p
.next
;
1728 cur
->r
.record
.p
.next
= NULL
;
1740 cur
= cur
->r
.record
.p
.next
;
1743 unwind
.pending_saves
= NULL
;
1747 /* This function allocates a record list structure, and initializes fields. */
1749 static unw_rec_list
*
1750 alloc_record (unw_record_type t
)
1753 ptr
= xmalloc (sizeof (*ptr
));
1754 memset (ptr
, 0, sizeof (*ptr
));
1755 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1760 /* Dummy unwind record used for calculating the length of the last prologue or
1763 static unw_rec_list
*
1766 unw_rec_list
*ptr
= alloc_record (endp
);
1770 static unw_rec_list
*
1771 output_prologue (void)
1773 unw_rec_list
*ptr
= alloc_record (prologue
);
1774 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1778 static unw_rec_list
*
1779 output_prologue_gr (unsigned int saved_mask
, unsigned int reg
)
1781 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1782 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1783 ptr
->r
.record
.r
.grmask
= saved_mask
;
1784 ptr
->r
.record
.r
.grsave
= reg
;
1788 static unw_rec_list
*
1791 unw_rec_list
*ptr
= alloc_record (body
);
1795 static unw_rec_list
*
1796 output_mem_stack_f (unsigned int size
)
1798 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1799 ptr
->r
.record
.p
.size
= size
;
1803 static unw_rec_list
*
1804 output_mem_stack_v (void)
1806 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1810 static unw_rec_list
*
1811 output_psp_gr (unsigned int gr
)
1813 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1814 ptr
->r
.record
.p
.r
.gr
= gr
;
1818 static unw_rec_list
*
1819 output_psp_sprel (unsigned int offset
)
1821 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1822 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1826 static unw_rec_list
*
1827 output_rp_when (void)
1829 unw_rec_list
*ptr
= alloc_record (rp_when
);
1833 static unw_rec_list
*
1834 output_rp_gr (unsigned int gr
)
1836 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1837 ptr
->r
.record
.p
.r
.gr
= gr
;
1841 static unw_rec_list
*
1842 output_rp_br (unsigned int br
)
1844 unw_rec_list
*ptr
= alloc_record (rp_br
);
1845 ptr
->r
.record
.p
.r
.br
= br
;
1849 static unw_rec_list
*
1850 output_rp_psprel (unsigned int offset
)
1852 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1853 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1857 static unw_rec_list
*
1858 output_rp_sprel (unsigned int offset
)
1860 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1861 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1865 static unw_rec_list
*
1866 output_pfs_when (void)
1868 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1872 static unw_rec_list
*
1873 output_pfs_gr (unsigned int gr
)
1875 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1876 ptr
->r
.record
.p
.r
.gr
= gr
;
1880 static unw_rec_list
*
1881 output_pfs_psprel (unsigned int offset
)
1883 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1884 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1888 static unw_rec_list
*
1889 output_pfs_sprel (unsigned int offset
)
1891 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1892 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1896 static unw_rec_list
*
1897 output_preds_when (void)
1899 unw_rec_list
*ptr
= alloc_record (preds_when
);
1903 static unw_rec_list
*
1904 output_preds_gr (unsigned int gr
)
1906 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1907 ptr
->r
.record
.p
.r
.gr
= gr
;
1911 static unw_rec_list
*
1912 output_preds_psprel (unsigned int offset
)
1914 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1915 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1919 static unw_rec_list
*
1920 output_preds_sprel (unsigned int offset
)
1922 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1923 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1927 static unw_rec_list
*
1928 output_fr_mem (unsigned int mask
)
1930 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1931 unw_rec_list
*cur
= ptr
;
1933 ptr
->r
.record
.p
.frmask
= mask
;
1934 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1937 unw_rec_list
*prev
= cur
;
1939 /* Clear least significant set bit. */
1940 mask
&= ~(mask
& (~mask
+ 1));
1943 cur
= alloc_record (fr_mem
);
1944 cur
->r
.record
.p
.frmask
= mask
;
1945 /* Retain only least significant bit. */
1946 prev
->r
.record
.p
.frmask
^= mask
;
1947 prev
->r
.record
.p
.next
= cur
;
1951 static unw_rec_list
*
1952 output_frgr_mem (unsigned int gr_mask
, unsigned int fr_mask
)
1954 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1955 unw_rec_list
*cur
= ptr
;
1957 unwind
.pending_saves
= &cur
->r
.record
.p
;
1958 cur
->r
.record
.p
.frmask
= fr_mask
;
1961 unw_rec_list
*prev
= cur
;
1963 /* Clear least significant set bit. */
1964 fr_mask
&= ~(fr_mask
& (~fr_mask
+ 1));
1965 if (!gr_mask
&& !fr_mask
)
1967 cur
= alloc_record (frgr_mem
);
1968 cur
->r
.record
.p
.frmask
= fr_mask
;
1969 /* Retain only least significant bit. */
1970 prev
->r
.record
.p
.frmask
^= fr_mask
;
1971 prev
->r
.record
.p
.next
= cur
;
1973 cur
->r
.record
.p
.grmask
= gr_mask
;
1976 unw_rec_list
*prev
= cur
;
1978 /* Clear least significant set bit. */
1979 gr_mask
&= ~(gr_mask
& (~gr_mask
+ 1));
1982 cur
= alloc_record (frgr_mem
);
1983 cur
->r
.record
.p
.grmask
= gr_mask
;
1984 /* Retain only least significant bit. */
1985 prev
->r
.record
.p
.grmask
^= gr_mask
;
1986 prev
->r
.record
.p
.next
= cur
;
1990 static unw_rec_list
*
1991 output_gr_gr (unsigned int mask
, unsigned int reg
)
1993 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1994 unw_rec_list
*cur
= ptr
;
1996 ptr
->r
.record
.p
.grmask
= mask
;
1997 ptr
->r
.record
.p
.r
.gr
= reg
;
1998 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2001 unw_rec_list
*prev
= cur
;
2003 /* Clear least significant set bit. */
2004 mask
&= ~(mask
& (~mask
+ 1));
2007 cur
= alloc_record (gr_gr
);
2008 cur
->r
.record
.p
.grmask
= mask
;
2009 /* Indicate this record shouldn't be output. */
2010 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2011 /* Retain only least significant bit. */
2012 prev
->r
.record
.p
.grmask
^= mask
;
2013 prev
->r
.record
.p
.next
= cur
;
2017 static unw_rec_list
*
2018 output_gr_mem (unsigned int mask
)
2020 unw_rec_list
*ptr
= alloc_record (gr_mem
);
2021 unw_rec_list
*cur
= ptr
;
2023 ptr
->r
.record
.p
.grmask
= mask
;
2024 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2027 unw_rec_list
*prev
= cur
;
2029 /* Clear least significant set bit. */
2030 mask
&= ~(mask
& (~mask
+ 1));
2033 cur
= alloc_record (gr_mem
);
2034 cur
->r
.record
.p
.grmask
= mask
;
2035 /* Retain only least significant bit. */
2036 prev
->r
.record
.p
.grmask
^= mask
;
2037 prev
->r
.record
.p
.next
= cur
;
2041 static unw_rec_list
*
2042 output_br_mem (unsigned int mask
)
2044 unw_rec_list
*ptr
= alloc_record (br_mem
);
2045 unw_rec_list
*cur
= ptr
;
2047 ptr
->r
.record
.p
.brmask
= mask
;
2048 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2051 unw_rec_list
*prev
= cur
;
2053 /* Clear least significant set bit. */
2054 mask
&= ~(mask
& (~mask
+ 1));
2057 cur
= alloc_record (br_mem
);
2058 cur
->r
.record
.p
.brmask
= mask
;
2059 /* Retain only least significant bit. */
2060 prev
->r
.record
.p
.brmask
^= mask
;
2061 prev
->r
.record
.p
.next
= cur
;
2065 static unw_rec_list
*
2066 output_br_gr (unsigned int mask
, unsigned int reg
)
2068 unw_rec_list
*ptr
= alloc_record (br_gr
);
2069 unw_rec_list
*cur
= ptr
;
2071 ptr
->r
.record
.p
.brmask
= mask
;
2072 ptr
->r
.record
.p
.r
.gr
= reg
;
2073 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2076 unw_rec_list
*prev
= cur
;
2078 /* Clear least significant set bit. */
2079 mask
&= ~(mask
& (~mask
+ 1));
2082 cur
= alloc_record (br_gr
);
2083 cur
->r
.record
.p
.brmask
= mask
;
2084 /* Indicate this record shouldn't be output. */
2085 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2086 /* Retain only least significant bit. */
2087 prev
->r
.record
.p
.brmask
^= mask
;
2088 prev
->r
.record
.p
.next
= cur
;
2092 static unw_rec_list
*
2093 output_spill_base (unsigned int offset
)
2095 unw_rec_list
*ptr
= alloc_record (spill_base
);
2096 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2100 static unw_rec_list
*
2101 output_unat_when (void)
2103 unw_rec_list
*ptr
= alloc_record (unat_when
);
2107 static unw_rec_list
*
2108 output_unat_gr (unsigned int gr
)
2110 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2111 ptr
->r
.record
.p
.r
.gr
= gr
;
2115 static unw_rec_list
*
2116 output_unat_psprel (unsigned int offset
)
2118 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2119 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2123 static unw_rec_list
*
2124 output_unat_sprel (unsigned int offset
)
2126 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2127 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2131 static unw_rec_list
*
2132 output_lc_when (void)
2134 unw_rec_list
*ptr
= alloc_record (lc_when
);
2138 static unw_rec_list
*
2139 output_lc_gr (unsigned int gr
)
2141 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2142 ptr
->r
.record
.p
.r
.gr
= gr
;
2146 static unw_rec_list
*
2147 output_lc_psprel (unsigned int offset
)
2149 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2150 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2154 static unw_rec_list
*
2155 output_lc_sprel (unsigned int offset
)
2157 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2158 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2162 static unw_rec_list
*
2163 output_fpsr_when (void)
2165 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2169 static unw_rec_list
*
2170 output_fpsr_gr (unsigned int gr
)
2172 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2173 ptr
->r
.record
.p
.r
.gr
= gr
;
2177 static unw_rec_list
*
2178 output_fpsr_psprel (unsigned int offset
)
2180 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2181 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2185 static unw_rec_list
*
2186 output_fpsr_sprel (unsigned int offset
)
2188 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2189 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2193 static unw_rec_list
*
2194 output_priunat_when_gr (void)
2196 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2200 static unw_rec_list
*
2201 output_priunat_when_mem (void)
2203 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2207 static unw_rec_list
*
2208 output_priunat_gr (unsigned int gr
)
2210 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2211 ptr
->r
.record
.p
.r
.gr
= gr
;
2215 static unw_rec_list
*
2216 output_priunat_psprel (unsigned int offset
)
2218 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2219 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2223 static unw_rec_list
*
2224 output_priunat_sprel (unsigned int offset
)
2226 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2227 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2231 static unw_rec_list
*
2232 output_bsp_when (void)
2234 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2238 static unw_rec_list
*
2239 output_bsp_gr (unsigned int gr
)
2241 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2242 ptr
->r
.record
.p
.r
.gr
= gr
;
2246 static unw_rec_list
*
2247 output_bsp_psprel (unsigned int offset
)
2249 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2250 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2254 static unw_rec_list
*
2255 output_bsp_sprel (unsigned int offset
)
2257 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2258 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2262 static unw_rec_list
*
2263 output_bspstore_when (void)
2265 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2269 static unw_rec_list
*
2270 output_bspstore_gr (unsigned int gr
)
2272 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2273 ptr
->r
.record
.p
.r
.gr
= gr
;
2277 static unw_rec_list
*
2278 output_bspstore_psprel (unsigned int offset
)
2280 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2281 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2285 static unw_rec_list
*
2286 output_bspstore_sprel (unsigned int offset
)
2288 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2289 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2293 static unw_rec_list
*
2294 output_rnat_when (void)
2296 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2300 static unw_rec_list
*
2301 output_rnat_gr (unsigned int gr
)
2303 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2304 ptr
->r
.record
.p
.r
.gr
= gr
;
2308 static unw_rec_list
*
2309 output_rnat_psprel (unsigned int offset
)
2311 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2312 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2316 static unw_rec_list
*
2317 output_rnat_sprel (unsigned int offset
)
2319 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2320 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2324 static unw_rec_list
*
2325 output_unwabi (unsigned long abi
, unsigned long context
)
2327 unw_rec_list
*ptr
= alloc_record (unwabi
);
2328 ptr
->r
.record
.p
.abi
= abi
;
2329 ptr
->r
.record
.p
.context
= context
;
2333 static unw_rec_list
*
2334 output_epilogue (unsigned long ecount
)
2336 unw_rec_list
*ptr
= alloc_record (epilogue
);
2337 ptr
->r
.record
.b
.ecount
= ecount
;
2341 static unw_rec_list
*
2342 output_label_state (unsigned long label
)
2344 unw_rec_list
*ptr
= alloc_record (label_state
);
2345 ptr
->r
.record
.b
.label
= label
;
2349 static unw_rec_list
*
2350 output_copy_state (unsigned long label
)
2352 unw_rec_list
*ptr
= alloc_record (copy_state
);
2353 ptr
->r
.record
.b
.label
= label
;
2357 static unw_rec_list
*
2358 output_spill_psprel (unsigned int ab
,
2360 unsigned int offset
,
2361 unsigned int predicate
)
2363 unw_rec_list
*ptr
= alloc_record (predicate
? spill_psprel_p
: spill_psprel
);
2364 ptr
->r
.record
.x
.ab
= ab
;
2365 ptr
->r
.record
.x
.reg
= reg
;
2366 ptr
->r
.record
.x
.where
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2367 ptr
->r
.record
.x
.qp
= predicate
;
2371 static unw_rec_list
*
2372 output_spill_sprel (unsigned int ab
,
2374 unsigned int offset
,
2375 unsigned int predicate
)
2377 unw_rec_list
*ptr
= alloc_record (predicate
? spill_sprel_p
: spill_sprel
);
2378 ptr
->r
.record
.x
.ab
= ab
;
2379 ptr
->r
.record
.x
.reg
= reg
;
2380 ptr
->r
.record
.x
.where
.spoff
= offset
/ 4;
2381 ptr
->r
.record
.x
.qp
= predicate
;
2385 static unw_rec_list
*
2386 output_spill_reg (unsigned int ab
,
2388 unsigned int targ_reg
,
2390 unsigned int predicate
)
2392 unw_rec_list
*ptr
= alloc_record (predicate
? spill_reg_p
: spill_reg
);
2393 ptr
->r
.record
.x
.ab
= ab
;
2394 ptr
->r
.record
.x
.reg
= reg
;
2395 ptr
->r
.record
.x
.where
.reg
= targ_reg
;
2396 ptr
->r
.record
.x
.xy
= xy
;
2397 ptr
->r
.record
.x
.qp
= predicate
;
2401 /* Given a unw_rec_list process the correct format with the
2402 specified function. */
2405 process_one_record (unw_rec_list
*ptr
, vbyte_func f
)
2407 unsigned int fr_mask
, gr_mask
;
2409 switch (ptr
->r
.type
)
2411 /* This is a dummy record that takes up no space in the output. */
2419 /* These are taken care of by prologue/prologue_gr. */
2424 if (ptr
->r
.type
== prologue_gr
)
2425 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2426 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2428 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2430 /* Output descriptor(s) for union of register spills (if any). */
2431 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2432 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2435 if ((fr_mask
& ~0xfUL
) == 0)
2436 output_P6_format (f
, fr_mem
, fr_mask
);
2439 output_P5_format (f
, gr_mask
, fr_mask
);
2444 output_P6_format (f
, gr_mem
, gr_mask
);
2445 if (ptr
->r
.record
.r
.mask
.br_mem
)
2446 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2448 /* output imask descriptor if necessary: */
2449 if (ptr
->r
.record
.r
.mask
.i
)
2450 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2451 ptr
->r
.record
.r
.imask_size
);
2455 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2459 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2460 ptr
->r
.record
.p
.size
);
2473 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.r
.gr
);
2476 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.r
.br
);
2479 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.off
.sp
, 0);
2487 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2496 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
, 0);
2506 case bspstore_sprel
:
2508 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.sp
);
2511 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2513 const unw_rec_list
*cur
= ptr
;
2515 gr_mask
= cur
->r
.record
.p
.grmask
;
2516 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2517 gr_mask
|= cur
->r
.record
.p
.grmask
;
2518 output_P9_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2522 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2524 const unw_rec_list
*cur
= ptr
;
2526 gr_mask
= cur
->r
.record
.p
.brmask
;
2527 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2528 gr_mask
|= cur
->r
.record
.p
.brmask
;
2529 output_P2_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2533 as_bad (_("spill_mask record unimplemented."));
2535 case priunat_when_gr
:
2536 case priunat_when_mem
:
2540 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2542 case priunat_psprel
:
2544 case bspstore_psprel
:
2546 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
);
2549 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2552 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2556 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2559 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2560 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2561 ptr
->r
.record
.x
.where
.pspoff
);
2564 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2565 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2566 ptr
->r
.record
.x
.where
.spoff
);
2569 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2570 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2571 ptr
->r
.record
.x
.where
.reg
, ptr
->r
.record
.x
.t
);
2573 case spill_psprel_p
:
2574 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2575 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2576 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.pspoff
);
2579 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2580 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2581 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.spoff
);
2584 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2585 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2586 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.where
.reg
,
2590 as_bad (_("record_type_not_valid"));
2595 /* Given a unw_rec_list list, process all the records with
2596 the specified function. */
2598 process_unw_records (unw_rec_list
*list
, vbyte_func f
)
2601 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2602 process_one_record (ptr
, f
);
2605 /* Determine the size of a record list in bytes. */
2607 calc_record_size (unw_rec_list
*list
)
2610 process_unw_records (list
, count_output
);
2614 /* Return the number of bits set in the input value.
2615 Perhaps this has a better place... */
2616 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2617 # define popcount __builtin_popcount
2620 popcount (unsigned x
)
2622 static const unsigned char popcnt
[16] =
2630 if (x
< NELEMS (popcnt
))
2632 return popcnt
[x
% NELEMS (popcnt
)] + popcount (x
/ NELEMS (popcnt
));
2636 /* Update IMASK bitmask to reflect the fact that one or more registers
2637 of type TYPE are saved starting at instruction with index T. If N
2638 bits are set in REGMASK, it is assumed that instructions T through
2639 T+N-1 save these registers.
2643 1: instruction saves next fp reg
2644 2: instruction saves next general reg
2645 3: instruction saves next branch reg */
2647 set_imask (unw_rec_list
*region
,
2648 unsigned long regmask
,
2652 unsigned char *imask
;
2653 unsigned long imask_size
;
2657 imask
= region
->r
.record
.r
.mask
.i
;
2658 imask_size
= region
->r
.record
.r
.imask_size
;
2661 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2662 imask
= xmalloc (imask_size
);
2663 memset (imask
, 0, imask_size
);
2665 region
->r
.record
.r
.imask_size
= imask_size
;
2666 region
->r
.record
.r
.mask
.i
= imask
;
2670 pos
= 2 * (3 - t
% 4);
2673 if (i
>= imask_size
)
2675 as_bad (_("Ignoring attempt to spill beyond end of region"));
2679 imask
[i
] |= (type
& 0x3) << pos
;
2681 regmask
&= (regmask
- 1);
2691 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2692 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2693 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2696 static unsigned long
2697 slot_index (unsigned long slot_addr
,
2699 unsigned long first_addr
,
2703 unsigned long s_index
= 0;
2705 /* First time we are called, the initial address and frag are invalid. */
2706 if (first_addr
== 0)
2709 /* If the two addresses are in different frags, then we need to add in
2710 the remaining size of this frag, and then the entire size of intermediate
2712 while (slot_frag
!= first_frag
)
2714 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2718 /* We can get the final addresses only during and after
2720 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2721 s_index
+= 3 * ((first_frag
->fr_next
->fr_address
2722 - first_frag
->fr_address
2723 - first_frag
->fr_fix
) >> 4);
2726 /* We don't know what the final addresses will be. We try our
2727 best to estimate. */
2728 switch (first_frag
->fr_type
)
2734 as_fatal (_("Only constant space allocation is supported"));
2740 /* Take alignment into account. Assume the worst case
2741 before relaxation. */
2742 s_index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2746 if (first_frag
->fr_symbol
)
2748 as_fatal (_("Only constant offsets are supported"));
2752 s_index
+= 3 * (first_frag
->fr_offset
>> 4);
2756 /* Add in the full size of the frag converted to instruction slots. */
2757 s_index
+= 3 * (first_frag
->fr_fix
>> 4);
2758 /* Subtract away the initial part before first_addr. */
2759 s_index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2760 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2762 /* Move to the beginning of the next frag. */
2763 first_frag
= first_frag
->fr_next
;
2764 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2766 /* This can happen if there is section switching in the middle of a
2767 function, causing the frag chain for the function to be broken.
2768 It is too difficult to recover safely from this problem, so we just
2769 exit with an error. */
2770 if (first_frag
== NULL
)
2771 as_fatal (_("Section switching in code is not supported."));
2774 /* Add in the used part of the last frag. */
2775 s_index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2776 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2780 /* Optimize unwind record directives. */
2782 static unw_rec_list
*
2783 optimize_unw_records (unw_rec_list
*list
)
2788 /* If the only unwind record is ".prologue" or ".prologue" followed
2789 by ".body", then we can optimize the unwind directives away. */
2790 if (list
->r
.type
== prologue
2791 && (list
->next
->r
.type
== endp
2792 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2798 /* Given a complete record list, process any records which have
2799 unresolved fields, (ie length counts for a prologue). After
2800 this has been run, all necessary information should be available
2801 within each record to generate an image. */
2804 fixup_unw_records (unw_rec_list
*list
, int before_relax
)
2806 unw_rec_list
*ptr
, *region
= 0;
2807 unsigned long first_addr
= 0, rlen
= 0, t
;
2808 fragS
*first_frag
= 0;
2810 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2812 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2813 as_bad (_(" Insn slot not set in unwind record."));
2814 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2815 first_addr
, first_frag
, before_relax
);
2816 switch (ptr
->r
.type
)
2824 unsigned long last_addr
= 0;
2825 fragS
*last_frag
= NULL
;
2827 first_addr
= ptr
->slot_number
;
2828 first_frag
= ptr
->slot_frag
;
2829 /* Find either the next body/prologue start, or the end of
2830 the function, and determine the size of the region. */
2831 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2832 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2833 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2835 last_addr
= last
->slot_number
;
2836 last_frag
= last
->slot_frag
;
2839 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2841 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2842 if (ptr
->r
.type
== body
)
2843 /* End of region. */
2851 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2853 /* This happens when a memory-stack-less procedure uses a
2854 ".restore sp" directive at the end of a region to pop
2856 ptr
->r
.record
.b
.t
= 0;
2867 case priunat_when_gr
:
2868 case priunat_when_mem
:
2872 ptr
->r
.record
.p
.t
= t
;
2880 case spill_psprel_p
:
2881 ptr
->r
.record
.x
.t
= t
;
2887 as_bad (_("frgr_mem record before region record!"));
2890 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2891 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2892 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2893 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2898 as_bad (_("fr_mem record before region record!"));
2901 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2902 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2907 as_bad (_("gr_mem record before region record!"));
2910 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2911 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2916 as_bad (_("br_mem record before region record!"));
2919 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2920 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2926 as_bad (_("gr_gr record before region record!"));
2929 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2934 as_bad (_("br_gr record before region record!"));
2937 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2946 /* Estimate the size of a frag before relaxing. We only have one type of frag
2947 to handle here, which is the unwind info frag. */
2950 ia64_estimate_size_before_relax (fragS
*frag
,
2951 asection
*segtype ATTRIBUTE_UNUSED
)
2956 /* ??? This code is identical to the first part of ia64_convert_frag. */
2957 list
= (unw_rec_list
*) frag
->fr_opcode
;
2958 fixup_unw_records (list
, 0);
2960 len
= calc_record_size (list
);
2961 /* pad to pointer-size boundary. */
2962 pad
= len
% md
.pointer_size
;
2964 len
+= md
.pointer_size
- pad
;
2965 /* Add 8 for the header. */
2967 /* Add a pointer for the personality offset. */
2968 if (frag
->fr_offset
)
2969 size
+= md
.pointer_size
;
2971 /* fr_var carries the max_chars that we created the fragment with.
2972 We must, of course, have allocated enough memory earlier. */
2973 gas_assert (frag
->fr_var
>= size
);
2975 return frag
->fr_fix
+ size
;
2978 /* This function converts a rs_machine_dependent variant frag into a
2979 normal fill frag with the unwind image from the record list. */
2981 ia64_convert_frag (fragS
*frag
)
2987 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2988 list
= (unw_rec_list
*) frag
->fr_opcode
;
2989 fixup_unw_records (list
, 0);
2991 len
= calc_record_size (list
);
2992 /* pad to pointer-size boundary. */
2993 pad
= len
% md
.pointer_size
;
2995 len
+= md
.pointer_size
- pad
;
2996 /* Add 8 for the header. */
2998 /* Add a pointer for the personality offset. */
2999 if (frag
->fr_offset
)
3000 size
+= md
.pointer_size
;
3002 /* fr_var carries the max_chars that we created the fragment with.
3003 We must, of course, have allocated enough memory earlier. */
3004 gas_assert (frag
->fr_var
>= size
);
3006 /* Initialize the header area. fr_offset is initialized with
3007 unwind.personality_routine. */
3008 if (frag
->fr_offset
)
3010 if (md
.flags
& EF_IA_64_ABI64
)
3011 flag_value
= (bfd_vma
) 3 << 32;
3013 /* 32-bit unwind info block. */
3014 flag_value
= (bfd_vma
) 0x1003 << 32;
3019 md_number_to_chars (frag
->fr_literal
,
3020 (((bfd_vma
) 1 << 48) /* Version. */
3021 | flag_value
/* U & E handler flags. */
3022 | (len
/ md
.pointer_size
)), /* Length. */
3025 /* Skip the header. */
3026 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
3027 process_unw_records (list
, output_vbyte_mem
);
3029 /* Fill the padding bytes with zeros. */
3031 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
3032 md
.pointer_size
- pad
);
3033 /* Fill the unwind personality with zeros. */
3034 if (frag
->fr_offset
)
3035 md_number_to_chars (frag
->fr_literal
+ size
- md
.pointer_size
, 0,
3038 frag
->fr_fix
+= size
;
3039 frag
->fr_type
= rs_fill
;
3041 frag
->fr_offset
= 0;
3045 parse_predicate_and_operand (expressionS
*e
, unsigned *qp
, const char *po
)
3047 int sep
= parse_operand_and_eval (e
, ',');
3049 *qp
= e
->X_add_number
- REG_P
;
3050 if (e
->X_op
!= O_register
|| *qp
> 63)
3052 as_bad (_("First operand to .%s must be a predicate"), po
);
3056 as_warn (_("Pointless use of p0 as first operand to .%s"), po
);
3058 sep
= parse_operand_and_eval (e
, ',');
3065 convert_expr_to_ab_reg (const expressionS
*e
,
3071 unsigned int reg
= e
->X_add_number
;
3073 *ab
= *regp
= 0; /* Anything valid is good here. */
3075 if (e
->X_op
!= O_register
)
3076 reg
= REG_GR
; /* Anything invalid is good here. */
3078 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
3081 *regp
= reg
- REG_GR
;
3083 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
3084 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
3087 *regp
= reg
- REG_FR
;
3089 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3092 *regp
= reg
- REG_BR
;
3099 case REG_PR
: *regp
= 0; break;
3100 case REG_PSP
: *regp
= 1; break;
3101 case REG_PRIUNAT
: *regp
= 2; break;
3102 case REG_BR
+ 0: *regp
= 3; break;
3103 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3104 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3105 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3106 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3107 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3108 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3109 case REG_AR
+ AR_LC
: *regp
= 10; break;
3112 as_bad (_("Operand %d to .%s must be a preserved register"), n
, po
);
3119 convert_expr_to_xy_reg (const expressionS
*e
,
3125 unsigned int reg
= e
->X_add_number
;
3127 *xy
= *regp
= 0; /* Anything valid is good here. */
3129 if (e
->X_op
!= O_register
)
3130 reg
= REG_GR
; /* Anything invalid is good here. */
3132 if (reg
>= (REG_GR
+ 1) && reg
<= (REG_GR
+ 127))
3135 *regp
= reg
- REG_GR
;
3137 else if (reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 127))
3140 *regp
= reg
- REG_FR
;
3142 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3145 *regp
= reg
- REG_BR
;
3148 as_bad (_("Operand %d to .%s must be a writable register"), n
, po
);
3154 /* The current frag is an alignment frag. */
3155 align_frag
= frag_now
;
3156 s_align_bytes (arg
);
3160 dot_radix (int dummy ATTRIBUTE_UNUSED
)
3167 if (is_it_end_of_statement ())
3169 ch
= get_symbol_name (&radix
);
3170 ia64_canonicalize_symbol_name (radix
);
3171 if (strcasecmp (radix
, "C"))
3172 as_bad (_("Radix `%s' unsupported or invalid"), radix
);
3173 (void) restore_line_pointer (ch
);
3174 demand_empty_rest_of_line ();
3177 /* Helper function for .loc directives. If the assembler is not generating
3178 line number info, then we need to remember which instructions have a .loc
3179 directive, and only call dwarf2_gen_line_info for those instructions. */
3184 CURR_SLOT
.loc_directive_seen
= 1;
3185 dwarf2_directive_loc (x
);
3188 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3190 dot_special_section (int which
)
3192 set_section ((char *) special_section_name
[which
]);
3195 /* Return -1 for warning and 0 for error. */
3198 unwind_diagnostic (const char * region
, const char *directive
)
3200 if (md
.unwind_check
== unwind_check_warning
)
3202 as_warn (_(".%s outside of %s"), directive
, region
);
3207 as_bad (_(".%s outside of %s"), directive
, region
);
3208 ignore_rest_of_line ();
3213 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3214 a procedure but the unwind directive check is set to warning, 0 if
3215 a directive isn't in a procedure and the unwind directive check is set
3219 in_procedure (const char *directive
)
3221 if (unwind
.proc_pending
.sym
3222 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3224 return unwind_diagnostic ("procedure", directive
);
3227 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3228 a prologue but the unwind directive check is set to warning, 0 if
3229 a directive isn't in a prologue and the unwind directive check is set
3233 in_prologue (const char *directive
)
3235 int in
= in_procedure (directive
);
3237 if (in
> 0 && !unwind
.prologue
)
3238 in
= unwind_diagnostic ("prologue", directive
);
3239 check_pending_save ();
3243 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3244 a body but the unwind directive check is set to warning, 0 if
3245 a directive isn't in a body and the unwind directive check is set
3249 in_body (const char *directive
)
3251 int in
= in_procedure (directive
);
3253 if (in
> 0 && !unwind
.body
)
3254 in
= unwind_diagnostic ("body region", directive
);
3259 add_unwind_entry (unw_rec_list
*ptr
, int sep
)
3264 unwind
.tail
->next
= ptr
;
3269 /* The current entry can in fact be a chain of unwind entries. */
3270 if (unwind
.current_entry
== NULL
)
3271 unwind
.current_entry
= ptr
;
3274 /* The current entry can in fact be a chain of unwind entries. */
3275 if (unwind
.current_entry
== NULL
)
3276 unwind
.current_entry
= ptr
;
3281 /* Parse a tag permitted for the current directive. */
3285 ch
= get_symbol_name (&name
);
3286 /* FIXME: For now, just issue a warning that this isn't implemented. */
3293 as_warn (_("Tags on unwind pseudo-ops aren't supported, yet"));
3296 (void) restore_line_pointer (ch
);
3298 if (sep
!= NOT_A_CHAR
)
3299 demand_empty_rest_of_line ();
3303 dot_fframe (int dummy ATTRIBUTE_UNUSED
)
3308 if (!in_prologue ("fframe"))
3311 sep
= parse_operand_and_eval (&e
, ',');
3313 if (e
.X_op
!= O_constant
)
3315 as_bad (_("First operand to .fframe must be a constant"));
3318 add_unwind_entry (output_mem_stack_f (e
.X_add_number
), sep
);
3322 dot_vframe (int dummy ATTRIBUTE_UNUSED
)
3328 if (!in_prologue ("vframe"))
3331 sep
= parse_operand_and_eval (&e
, ',');
3332 reg
= e
.X_add_number
- REG_GR
;
3333 if (e
.X_op
!= O_register
|| reg
> 127)
3335 as_bad (_("First operand to .vframe must be a general register"));
3338 add_unwind_entry (output_mem_stack_v (), sep
);
3339 if (! (unwind
.prologue_mask
& 2))
3340 add_unwind_entry (output_psp_gr (reg
), NOT_A_CHAR
);
3341 else if (reg
!= unwind
.prologue_gr
3342 + (unsigned) popcount (unwind
.prologue_mask
& -(2 << 1)))
3343 as_warn (_("Operand of .vframe contradicts .prologue"));
3347 dot_vframesp (int psp
)
3353 as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant"));
3355 if (!in_prologue ("vframesp"))
3358 sep
= parse_operand_and_eval (&e
, ',');
3359 if (e
.X_op
!= O_constant
)
3361 as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)"));
3364 add_unwind_entry (output_mem_stack_v (), sep
);
3365 add_unwind_entry (output_psp_sprel (e
.X_add_number
), NOT_A_CHAR
);
3369 dot_save (int dummy ATTRIBUTE_UNUSED
)
3372 unsigned reg1
, reg2
;
3375 if (!in_prologue ("save"))
3378 sep
= parse_operand_and_eval (&e1
, ',');
3380 sep
= parse_operand_and_eval (&e2
, ',');
3384 reg1
= e1
.X_add_number
;
3385 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3386 if (e1
.X_op
!= O_register
)
3388 as_bad (_("First operand to .save not a register"));
3389 reg1
= REG_PR
; /* Anything valid is good here. */
3391 reg2
= e2
.X_add_number
- REG_GR
;
3392 if (e2
.X_op
!= O_register
|| reg2
> 127)
3394 as_bad (_("Second operand to .save not a valid register"));
3399 case REG_AR
+ AR_BSP
:
3400 add_unwind_entry (output_bsp_when (), sep
);
3401 add_unwind_entry (output_bsp_gr (reg2
), NOT_A_CHAR
);
3403 case REG_AR
+ AR_BSPSTORE
:
3404 add_unwind_entry (output_bspstore_when (), sep
);
3405 add_unwind_entry (output_bspstore_gr (reg2
), NOT_A_CHAR
);
3407 case REG_AR
+ AR_RNAT
:
3408 add_unwind_entry (output_rnat_when (), sep
);
3409 add_unwind_entry (output_rnat_gr (reg2
), NOT_A_CHAR
);
3411 case REG_AR
+ AR_UNAT
:
3412 add_unwind_entry (output_unat_when (), sep
);
3413 add_unwind_entry (output_unat_gr (reg2
), NOT_A_CHAR
);
3415 case REG_AR
+ AR_FPSR
:
3416 add_unwind_entry (output_fpsr_when (), sep
);
3417 add_unwind_entry (output_fpsr_gr (reg2
), NOT_A_CHAR
);
3419 case REG_AR
+ AR_PFS
:
3420 add_unwind_entry (output_pfs_when (), sep
);
3421 if (! (unwind
.prologue_mask
& 4))
3422 add_unwind_entry (output_pfs_gr (reg2
), NOT_A_CHAR
);
3423 else if (reg2
!= unwind
.prologue_gr
3424 + (unsigned) popcount (unwind
.prologue_mask
& -(4 << 1)))
3425 as_warn (_("Second operand of .save contradicts .prologue"));
3427 case REG_AR
+ AR_LC
:
3428 add_unwind_entry (output_lc_when (), sep
);
3429 add_unwind_entry (output_lc_gr (reg2
), NOT_A_CHAR
);
3432 add_unwind_entry (output_rp_when (), sep
);
3433 if (! (unwind
.prologue_mask
& 8))
3434 add_unwind_entry (output_rp_gr (reg2
), NOT_A_CHAR
);
3435 else if (reg2
!= unwind
.prologue_gr
)
3436 as_warn (_("Second operand of .save contradicts .prologue"));
3439 add_unwind_entry (output_preds_when (), sep
);
3440 if (! (unwind
.prologue_mask
& 1))
3441 add_unwind_entry (output_preds_gr (reg2
), NOT_A_CHAR
);
3442 else if (reg2
!= unwind
.prologue_gr
3443 + (unsigned) popcount (unwind
.prologue_mask
& -(1 << 1)))
3444 as_warn (_("Second operand of .save contradicts .prologue"));
3447 add_unwind_entry (output_priunat_when_gr (), sep
);
3448 add_unwind_entry (output_priunat_gr (reg2
), NOT_A_CHAR
);
3451 as_bad (_("First operand to .save not a valid register"));
3452 add_unwind_entry (NULL
, sep
);
3458 dot_restore (int dummy ATTRIBUTE_UNUSED
)
3461 unsigned long ecount
; /* # of _additional_ regions to pop */
3464 if (!in_body ("restore"))
3467 sep
= parse_operand_and_eval (&e1
, ',');
3468 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3469 as_bad (_("First operand to .restore must be stack pointer (sp)"));
3475 sep
= parse_operand_and_eval (&e2
, ',');
3476 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3478 as_bad (_("Second operand to .restore must be a constant >= 0"));
3479 e2
.X_add_number
= 0;
3481 ecount
= e2
.X_add_number
;
3484 ecount
= unwind
.prologue_count
- 1;
3486 if (ecount
>= unwind
.prologue_count
)
3488 as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"),
3489 ecount
+ 1, unwind
.prologue_count
);
3493 add_unwind_entry (output_epilogue (ecount
), sep
);
3495 if (ecount
< unwind
.prologue_count
)
3496 unwind
.prologue_count
-= ecount
+ 1;
3498 unwind
.prologue_count
= 0;
3502 dot_restorereg (int pred
)
3504 unsigned int qp
, ab
, reg
;
3507 const char * const po
= pred
? "restorereg.p" : "restorereg";
3509 if (!in_procedure (po
))
3513 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3516 sep
= parse_operand_and_eval (&e
, ',');
3519 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3521 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0, qp
), sep
);
3524 static const char *special_linkonce_name
[] =
3526 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3530 start_unwind_section (const segT text_seg
, int sec_index
)
3533 Use a slightly ugly scheme to derive the unwind section names from
3534 the text section name:
3536 text sect. unwind table sect.
3537 name: name: comments:
3538 ---------- ----------------- --------------------------------
3540 .text.foo .IA_64.unwind.text.foo
3541 .foo .IA_64.unwind.foo
3543 .gnu.linkonce.ia64unw.foo
3544 _info .IA_64.unwind_info gas issues error message (ditto)
3545 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3547 This mapping is done so that:
3549 (a) An object file with unwind info only in .text will use
3550 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3551 This follows the letter of the ABI and also ensures backwards
3552 compatibility with older toolchains.
3554 (b) An object file with unwind info in multiple text sections
3555 will use separate unwind sections for each text section.
3556 This allows us to properly set the "sh_info" and "sh_link"
3557 fields in SHT_IA_64_UNWIND as required by the ABI and also
3558 lets GNU ld support programs with multiple segments
3559 containing unwind info (as might be the case for certain
3560 embedded applications).
3562 (c) An error is issued if there would be a name clash.
3565 const char *text_name
, *sec_text_name
;
3567 const char *prefix
= special_section_name
[sec_index
];
3569 size_t prefix_len
, suffix_len
, sec_name_len
;
3571 sec_text_name
= segment_name (text_seg
);
3572 text_name
= sec_text_name
;
3573 if (strncmp (text_name
, "_info", 5) == 0)
3575 as_bad (_("Illegal section name `%s' (causes unwind section name clash)"),
3577 ignore_rest_of_line ();
3580 if (strcmp (text_name
, ".text") == 0)
3583 /* Build the unwind section name by appending the (possibly stripped)
3584 text section name to the unwind prefix. */
3586 if (strncmp (text_name
, ".gnu.linkonce.t.",
3587 sizeof (".gnu.linkonce.t.") - 1) == 0)
3589 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3590 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3593 prefix_len
= strlen (prefix
);
3594 suffix_len
= strlen (suffix
);
3595 sec_name_len
= prefix_len
+ suffix_len
;
3596 sec_name
= alloca (sec_name_len
+ 1);
3597 memcpy (sec_name
, prefix
, prefix_len
);
3598 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3599 sec_name
[sec_name_len
] = '\0';
3601 /* Handle COMDAT group. */
3602 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3603 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3606 size_t len
, group_name_len
;
3607 const char *group_name
= elf_group_name (text_seg
);
3609 if (group_name
== NULL
)
3611 as_bad (_("Group section `%s' has no group signature"),
3613 ignore_rest_of_line ();
3616 /* We have to construct a fake section directive. */
3617 group_name_len
= strlen (group_name
);
3619 + 16 /* ,"aG",@progbits, */
3620 + group_name_len
/* ,group_name */
3623 section
= alloca (len
+ 1);
3624 memcpy (section
, sec_name
, sec_name_len
);
3625 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3626 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3627 memcpy (section
+ len
- 7, ",comdat", 7);
3628 section
[len
] = '\0';
3629 set_section (section
);
3633 set_section (sec_name
);
3634 bfd_set_section_flags (stdoutput
, now_seg
,
3635 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3638 elf_linked_to_section (now_seg
) = text_seg
;
3642 generate_unwind_image (const segT text_seg
)
3647 /* Mark the end of the unwind info, so that we can compute the size of the
3648 last unwind region. */
3649 add_unwind_entry (output_endp (), NOT_A_CHAR
);
3651 /* Force out pending instructions, to make sure all unwind records have
3652 a valid slot_number field. */
3653 ia64_flush_insns ();
3655 /* Generate the unwind record. */
3656 list
= optimize_unw_records (unwind
.list
);
3657 fixup_unw_records (list
, 1);
3658 size
= calc_record_size (list
);
3660 if (size
> 0 || unwind
.force_unwind_entry
)
3662 unwind
.force_unwind_entry
= 0;
3663 /* pad to pointer-size boundary. */
3664 pad
= size
% md
.pointer_size
;
3666 size
+= md
.pointer_size
- pad
;
3667 /* Add 8 for the header. */
3669 /* Add a pointer for the personality offset. */
3670 if (unwind
.personality_routine
)
3671 size
+= md
.pointer_size
;
3674 /* If there are unwind records, switch sections, and output the info. */
3678 bfd_reloc_code_real_type reloc
;
3680 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3682 /* Make sure the section has 4 byte alignment for ILP32 and
3683 8 byte alignment for LP64. */
3684 frag_align (md
.pointer_size_shift
, 0, 0);
3685 record_alignment (now_seg
, md
.pointer_size_shift
);
3687 /* Set expression which points to start of unwind descriptor area. */
3688 unwind
.info
= expr_build_dot ();
3690 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3691 (offsetT
) (long) unwind
.personality_routine
,
3694 /* Add the personality address to the image. */
3695 if (unwind
.personality_routine
!= 0)
3697 exp
.X_op
= O_symbol
;
3698 exp
.X_add_symbol
= unwind
.personality_routine
;
3699 exp
.X_add_number
= 0;
3701 if (md
.flags
& EF_IA_64_BE
)
3703 if (md
.flags
& EF_IA_64_ABI64
)
3704 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3706 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3710 if (md
.flags
& EF_IA_64_ABI64
)
3711 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3713 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3716 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3717 md
.pointer_size
, &exp
, 0, reloc
);
3718 unwind
.personality_routine
= 0;
3722 free_saved_prologue_counts ();
3723 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3727 dot_handlerdata (int dummy ATTRIBUTE_UNUSED
)
3729 if (!in_procedure ("handlerdata"))
3731 unwind
.force_unwind_entry
= 1;
3733 /* Remember which segment we're in so we can switch back after .endp */
3734 unwind
.saved_text_seg
= now_seg
;
3735 unwind
.saved_text_subseg
= now_subseg
;
3737 /* Generate unwind info into unwind-info section and then leave that
3738 section as the currently active one so dataXX directives go into
3739 the language specific data area of the unwind info block. */
3740 generate_unwind_image (now_seg
);
3741 demand_empty_rest_of_line ();
3745 dot_unwentry (int dummy ATTRIBUTE_UNUSED
)
3747 if (!in_procedure ("unwentry"))
3749 unwind
.force_unwind_entry
= 1;
3750 demand_empty_rest_of_line ();
3754 dot_altrp (int dummy ATTRIBUTE_UNUSED
)
3759 if (!in_prologue ("altrp"))
3762 parse_operand_and_eval (&e
, 0);
3763 reg
= e
.X_add_number
- REG_BR
;
3764 if (e
.X_op
!= O_register
|| reg
> 7)
3766 as_bad (_("First operand to .altrp not a valid branch register"));
3769 add_unwind_entry (output_rp_br (reg
), 0);
3773 dot_savemem (int psprel
)
3778 const char * const po
= psprel
? "savepsp" : "savesp";
3780 if (!in_prologue (po
))
3783 sep
= parse_operand_and_eval (&e1
, ',');
3785 sep
= parse_operand_and_eval (&e2
, ',');
3789 reg1
= e1
.X_add_number
;
3790 val
= e2
.X_add_number
;
3792 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3793 if (e1
.X_op
!= O_register
)
3795 as_bad (_("First operand to .%s not a register"), po
);
3796 reg1
= REG_PR
; /* Anything valid is good here. */
3798 if (e2
.X_op
!= O_constant
)
3800 as_bad (_("Second operand to .%s not a constant"), po
);
3806 case REG_AR
+ AR_BSP
:
3807 add_unwind_entry (output_bsp_when (), sep
);
3808 add_unwind_entry ((psprel
3810 : output_bsp_sprel
) (val
), NOT_A_CHAR
);
3812 case REG_AR
+ AR_BSPSTORE
:
3813 add_unwind_entry (output_bspstore_when (), sep
);
3814 add_unwind_entry ((psprel
3815 ? output_bspstore_psprel
3816 : output_bspstore_sprel
) (val
), NOT_A_CHAR
);
3818 case REG_AR
+ AR_RNAT
:
3819 add_unwind_entry (output_rnat_when (), sep
);
3820 add_unwind_entry ((psprel
3821 ? output_rnat_psprel
3822 : output_rnat_sprel
) (val
), NOT_A_CHAR
);
3824 case REG_AR
+ AR_UNAT
:
3825 add_unwind_entry (output_unat_when (), sep
);
3826 add_unwind_entry ((psprel
3827 ? output_unat_psprel
3828 : output_unat_sprel
) (val
), NOT_A_CHAR
);
3830 case REG_AR
+ AR_FPSR
:
3831 add_unwind_entry (output_fpsr_when (), sep
);
3832 add_unwind_entry ((psprel
3833 ? output_fpsr_psprel
3834 : output_fpsr_sprel
) (val
), NOT_A_CHAR
);
3836 case REG_AR
+ AR_PFS
:
3837 add_unwind_entry (output_pfs_when (), sep
);
3838 add_unwind_entry ((psprel
3840 : output_pfs_sprel
) (val
), NOT_A_CHAR
);
3842 case REG_AR
+ AR_LC
:
3843 add_unwind_entry (output_lc_when (), sep
);
3844 add_unwind_entry ((psprel
3846 : output_lc_sprel
) (val
), NOT_A_CHAR
);
3849 add_unwind_entry (output_rp_when (), sep
);
3850 add_unwind_entry ((psprel
3852 : output_rp_sprel
) (val
), NOT_A_CHAR
);
3855 add_unwind_entry (output_preds_when (), sep
);
3856 add_unwind_entry ((psprel
3857 ? output_preds_psprel
3858 : output_preds_sprel
) (val
), NOT_A_CHAR
);
3861 add_unwind_entry (output_priunat_when_mem (), sep
);
3862 add_unwind_entry ((psprel
3863 ? output_priunat_psprel
3864 : output_priunat_sprel
) (val
), NOT_A_CHAR
);
3867 as_bad (_("First operand to .%s not a valid register"), po
);
3868 add_unwind_entry (NULL
, sep
);
3874 dot_saveg (int dummy ATTRIBUTE_UNUSED
)
3880 if (!in_prologue ("save.g"))
3883 sep
= parse_operand_and_eval (&e
, ',');
3885 grmask
= e
.X_add_number
;
3886 if (e
.X_op
!= O_constant
3887 || e
.X_add_number
<= 0
3888 || e
.X_add_number
> 0xf)
3890 as_bad (_("First operand to .save.g must be a positive 4-bit constant"));
3897 int n
= popcount (grmask
);
3899 parse_operand_and_eval (&e
, 0);
3900 reg
= e
.X_add_number
- REG_GR
;
3901 if (e
.X_op
!= O_register
|| reg
> 127)
3903 as_bad (_("Second operand to .save.g must be a general register"));
3906 else if (reg
> 128U - n
)
3908 as_bad (_("Second operand to .save.g must be the first of %d general registers"), n
);
3911 add_unwind_entry (output_gr_gr (grmask
, reg
), 0);
3914 add_unwind_entry (output_gr_mem (grmask
), 0);
3918 dot_savef (int dummy ATTRIBUTE_UNUSED
)
3922 if (!in_prologue ("save.f"))
3925 parse_operand_and_eval (&e
, 0);
3927 if (e
.X_op
!= O_constant
3928 || e
.X_add_number
<= 0
3929 || e
.X_add_number
> 0xfffff)
3931 as_bad (_("Operand to .save.f must be a positive 20-bit constant"));
3934 add_unwind_entry (output_fr_mem (e
.X_add_number
), 0);
3938 dot_saveb (int dummy ATTRIBUTE_UNUSED
)
3944 if (!in_prologue ("save.b"))
3947 sep
= parse_operand_and_eval (&e
, ',');
3949 brmask
= e
.X_add_number
;
3950 if (e
.X_op
!= O_constant
3951 || e
.X_add_number
<= 0
3952 || e
.X_add_number
> 0x1f)
3954 as_bad (_("First operand to .save.b must be a positive 5-bit constant"));
3961 int n
= popcount (brmask
);
3963 parse_operand_and_eval (&e
, 0);
3964 reg
= e
.X_add_number
- REG_GR
;
3965 if (e
.X_op
!= O_register
|| reg
> 127)
3967 as_bad (_("Second operand to .save.b must be a general register"));
3970 else if (reg
> 128U - n
)
3972 as_bad (_("Second operand to .save.b must be the first of %d general registers"), n
);
3975 add_unwind_entry (output_br_gr (brmask
, reg
), 0);
3978 add_unwind_entry (output_br_mem (brmask
), 0);
3982 dot_savegf (int dummy ATTRIBUTE_UNUSED
)
3986 if (!in_prologue ("save.gf"))
3989 if (parse_operand_and_eval (&e1
, ',') == ',')
3990 parse_operand_and_eval (&e2
, 0);
3994 if (e1
.X_op
!= O_constant
3995 || e1
.X_add_number
< 0
3996 || e1
.X_add_number
> 0xf)
3998 as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant"));
4000 e1
.X_add_number
= 0;
4002 if (e2
.X_op
!= O_constant
4003 || e2
.X_add_number
< 0
4004 || e2
.X_add_number
> 0xfffff)
4006 as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant"));
4008 e2
.X_add_number
= 0;
4010 if (e1
.X_op
== O_constant
4011 && e2
.X_op
== O_constant
4012 && e1
.X_add_number
== 0
4013 && e2
.X_add_number
== 0)
4014 as_bad (_("Operands to .save.gf may not be both zero"));
4016 add_unwind_entry (output_frgr_mem (e1
.X_add_number
, e2
.X_add_number
), 0);
4020 dot_spill (int dummy ATTRIBUTE_UNUSED
)
4024 if (!in_prologue ("spill"))
4027 parse_operand_and_eval (&e
, 0);
4029 if (e
.X_op
!= O_constant
)
4031 as_bad (_("Operand to .spill must be a constant"));
4034 add_unwind_entry (output_spill_base (e
.X_add_number
), 0);
4038 dot_spillreg (int pred
)
4041 unsigned int qp
, ab
, xy
, reg
, treg
;
4043 const char * const po
= pred
? "spillreg.p" : "spillreg";
4045 if (!in_procedure (po
))
4049 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4052 sep
= parse_operand_and_eval (&e
, ',');
4055 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4058 sep
= parse_operand_and_eval (&e
, ',');
4061 convert_expr_to_xy_reg (&e
, &xy
, &treg
, po
, 2 + pred
);
4063 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
, qp
), sep
);
4067 dot_spillmem (int psprel
)
4070 int pred
= (psprel
< 0), sep
;
4071 unsigned int qp
, ab
, reg
;
4077 po
= psprel
? "spillpsp.p" : "spillsp.p";
4080 po
= psprel
? "spillpsp" : "spillsp";
4082 if (!in_procedure (po
))
4086 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4089 sep
= parse_operand_and_eval (&e
, ',');
4092 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4095 sep
= parse_operand_and_eval (&e
, ',');
4098 if (e
.X_op
!= O_constant
)
4100 as_bad (_("Operand %d to .%s must be a constant"), 2 + pred
, po
);
4105 add_unwind_entry (output_spill_psprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4107 add_unwind_entry (output_spill_sprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4111 get_saved_prologue_count (unsigned long lbl
)
4113 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4115 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4119 return lpc
->prologue_count
;
4121 as_bad (_("Missing .label_state %ld"), lbl
);
4126 save_prologue_count (unsigned long lbl
, unsigned int count
)
4128 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4130 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4134 lpc
->prologue_count
= count
;
4137 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4139 new_lpc
->next
= unwind
.saved_prologue_counts
;
4140 new_lpc
->label_number
= lbl
;
4141 new_lpc
->prologue_count
= count
;
4142 unwind
.saved_prologue_counts
= new_lpc
;
4147 free_saved_prologue_counts ()
4149 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4150 label_prologue_count
*next
;
4159 unwind
.saved_prologue_counts
= NULL
;
4163 dot_label_state (int dummy ATTRIBUTE_UNUSED
)
4167 if (!in_body ("label_state"))
4170 parse_operand_and_eval (&e
, 0);
4171 if (e
.X_op
== O_constant
)
4172 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4175 as_bad (_("Operand to .label_state must be a constant"));
4178 add_unwind_entry (output_label_state (e
.X_add_number
), 0);
4182 dot_copy_state (int dummy ATTRIBUTE_UNUSED
)
4186 if (!in_body ("copy_state"))
4189 parse_operand_and_eval (&e
, 0);
4190 if (e
.X_op
== O_constant
)
4191 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4194 as_bad (_("Operand to .copy_state must be a constant"));
4197 add_unwind_entry (output_copy_state (e
.X_add_number
), 0);
4201 dot_unwabi (int dummy ATTRIBUTE_UNUSED
)
4206 if (!in_prologue ("unwabi"))
4209 sep
= parse_operand_and_eval (&e1
, ',');
4211 parse_operand_and_eval (&e2
, 0);
4215 if (e1
.X_op
!= O_constant
)
4217 as_bad (_("First operand to .unwabi must be a constant"));
4218 e1
.X_add_number
= 0;
4221 if (e2
.X_op
!= O_constant
)
4223 as_bad (_("Second operand to .unwabi must be a constant"));
4224 e2
.X_add_number
= 0;
4227 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
), 0);
4231 dot_personality (int dummy ATTRIBUTE_UNUSED
)
4235 if (!in_procedure ("personality"))
4238 c
= get_symbol_name (&name
);
4239 p
= input_line_pointer
;
4240 unwind
.personality_routine
= symbol_find_or_make (name
);
4241 unwind
.force_unwind_entry
= 1;
4243 SKIP_WHITESPACE_AFTER_NAME ();
4244 demand_empty_rest_of_line ();
4248 dot_proc (int dummy ATTRIBUTE_UNUSED
)
4252 proc_pending
*pending
, *last_pending
;
4254 if (unwind
.proc_pending
.sym
)
4256 (md
.unwind_check
== unwind_check_warning
4258 : as_bad
) (_("Missing .endp after previous .proc"));
4259 while (unwind
.proc_pending
.next
)
4261 pending
= unwind
.proc_pending
.next
;
4262 unwind
.proc_pending
.next
= pending
->next
;
4266 last_pending
= NULL
;
4268 /* Parse names of main and alternate entry points and mark them as
4269 function symbols: */
4273 c
= get_symbol_name (&name
);
4274 p
= input_line_pointer
;
4276 as_bad (_("Empty argument of .proc"));
4279 sym
= symbol_find_or_make (name
);
4280 if (S_IS_DEFINED (sym
))
4281 as_bad (_("`%s' was already defined"), name
);
4282 else if (!last_pending
)
4284 unwind
.proc_pending
.sym
= sym
;
4285 last_pending
= &unwind
.proc_pending
;
4289 pending
= xmalloc (sizeof (*pending
));
4291 last_pending
= last_pending
->next
= pending
;
4293 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4296 SKIP_WHITESPACE_AFTER_NAME ();
4297 if (*input_line_pointer
!= ',')
4299 ++input_line_pointer
;
4303 unwind
.proc_pending
.sym
= expr_build_dot ();
4304 last_pending
= &unwind
.proc_pending
;
4306 last_pending
->next
= NULL
;
4307 demand_empty_rest_of_line ();
4310 unwind
.prologue
= 0;
4311 unwind
.prologue_count
= 0;
4314 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4315 unwind
.personality_routine
= 0;
4319 dot_body (int dummy ATTRIBUTE_UNUSED
)
4321 if (!in_procedure ("body"))
4323 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4324 as_warn (_("Initial .body should precede any instructions"));
4325 check_pending_save ();
4327 unwind
.prologue
= 0;
4328 unwind
.prologue_mask
= 0;
4331 add_unwind_entry (output_body (), 0);
4335 dot_prologue (int dummy ATTRIBUTE_UNUSED
)
4337 unsigned mask
= 0, grsave
= 0;
4339 if (!in_procedure ("prologue"))
4341 if (unwind
.prologue
)
4343 as_bad (_(".prologue within prologue"));
4344 ignore_rest_of_line ();
4347 if (!unwind
.body
&& unwind
.insn
)
4348 as_warn (_("Initial .prologue should precede any instructions"));
4350 if (!is_it_end_of_statement ())
4353 int n
, sep
= parse_operand_and_eval (&e
, ',');
4355 if (e
.X_op
!= O_constant
4356 || e
.X_add_number
< 0
4357 || e
.X_add_number
> 0xf)
4358 as_bad (_("First operand to .prologue must be a positive 4-bit constant"));
4359 else if (e
.X_add_number
== 0)
4360 as_warn (_("Pointless use of zero first operand to .prologue"));
4362 mask
= e
.X_add_number
;
4364 n
= popcount (mask
);
4367 parse_operand_and_eval (&e
, 0);
4371 if (e
.X_op
== O_constant
4372 && e
.X_add_number
>= 0
4373 && e
.X_add_number
< 128)
4375 if (md
.unwind_check
== unwind_check_error
)
4376 as_warn (_("Using a constant as second operand to .prologue is deprecated"));
4377 grsave
= e
.X_add_number
;
4379 else if (e
.X_op
!= O_register
4380 || (grsave
= e
.X_add_number
- REG_GR
) > 127)
4382 as_bad (_("Second operand to .prologue must be a general register"));
4385 else if (grsave
> 128U - n
)
4387 as_bad (_("Second operand to .prologue must be the first of %d general registers"), n
);
4393 add_unwind_entry (output_prologue_gr (mask
, grsave
), 0);
4395 add_unwind_entry (output_prologue (), 0);
4397 unwind
.prologue
= 1;
4398 unwind
.prologue_mask
= mask
;
4399 unwind
.prologue_gr
= grsave
;
4401 ++unwind
.prologue_count
;
4405 dot_endp (int dummy ATTRIBUTE_UNUSED
)
4408 int bytes_per_address
;
4411 subsegT saved_subseg
;
4412 proc_pending
*pending
;
4413 int unwind_check
= md
.unwind_check
;
4415 md
.unwind_check
= unwind_check_error
;
4416 if (!in_procedure ("endp"))
4418 md
.unwind_check
= unwind_check
;
4420 if (unwind
.saved_text_seg
)
4422 saved_seg
= unwind
.saved_text_seg
;
4423 saved_subseg
= unwind
.saved_text_subseg
;
4424 unwind
.saved_text_seg
= NULL
;
4428 saved_seg
= now_seg
;
4429 saved_subseg
= now_subseg
;
4432 insn_group_break (1, 0, 0);
4434 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4436 generate_unwind_image (saved_seg
);
4438 if (unwind
.info
|| unwind
.force_unwind_entry
)
4442 subseg_set (md
.last_text_seg
, 0);
4443 proc_end
= expr_build_dot ();
4445 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4447 /* Make sure that section has 4 byte alignment for ILP32 and
4448 8 byte alignment for LP64. */
4449 record_alignment (now_seg
, md
.pointer_size_shift
);
4451 /* Need space for 3 pointers for procedure start, procedure end,
4453 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4454 where
= frag_now_fix () - (3 * md
.pointer_size
);
4455 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4457 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4458 e
.X_op
= O_pseudo_fixup
;
4459 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4461 if (!S_IS_LOCAL (unwind
.proc_pending
.sym
)
4462 && S_IS_DEFINED (unwind
.proc_pending
.sym
))
4463 e
.X_add_symbol
= symbol_temp_new (S_GET_SEGMENT (unwind
.proc_pending
.sym
),
4464 S_GET_VALUE (unwind
.proc_pending
.sym
),
4465 symbol_get_frag (unwind
.proc_pending
.sym
));
4467 e
.X_add_symbol
= unwind
.proc_pending
.sym
;
4468 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
,
4471 e
.X_op
= O_pseudo_fixup
;
4472 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4474 e
.X_add_symbol
= proc_end
;
4475 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4476 bytes_per_address
, &e
, BFD_RELOC_NONE
);
4480 e
.X_op
= O_pseudo_fixup
;
4481 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4483 e
.X_add_symbol
= unwind
.info
;
4484 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4485 bytes_per_address
, &e
, BFD_RELOC_NONE
);
4488 subseg_set (saved_seg
, saved_subseg
);
4490 /* Set symbol sizes. */
4491 pending
= &unwind
.proc_pending
;
4492 if (S_GET_NAME (pending
->sym
))
4496 symbolS
*sym
= pending
->sym
;
4498 if (!S_IS_DEFINED (sym
))
4499 as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym
));
4500 else if (S_GET_SIZE (sym
) == 0
4501 && symbol_get_obj (sym
)->size
== NULL
)
4503 fragS
*frag
= symbol_get_frag (sym
);
4507 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4508 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4511 symbol_get_obj (sym
)->size
=
4512 (expressionS
*) xmalloc (sizeof (expressionS
));
4513 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4514 symbol_get_obj (sym
)->size
->X_add_symbol
4515 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4516 frag_now_fix (), frag_now
);
4517 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4518 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4522 } while ((pending
= pending
->next
) != NULL
);
4525 /* Parse names of main and alternate entry points. */
4531 c
= get_symbol_name (&name
);
4532 p
= input_line_pointer
;
4534 (md
.unwind_check
== unwind_check_warning
4536 : as_bad
) (_("Empty argument of .endp"));
4539 symbolS
*sym
= symbol_find (name
);
4541 for (pending
= &unwind
.proc_pending
; pending
; pending
= pending
->next
)
4543 if (sym
== pending
->sym
)
4545 pending
->sym
= NULL
;
4549 if (!sym
|| !pending
)
4550 as_warn (_("`%s' was not specified with previous .proc"), name
);
4553 SKIP_WHITESPACE_AFTER_NAME ();
4554 if (*input_line_pointer
!= ',')
4556 ++input_line_pointer
;
4558 demand_empty_rest_of_line ();
4560 /* Deliberately only checking for the main entry point here; the
4561 language spec even says all arguments to .endp are ignored. */
4562 if (unwind
.proc_pending
.sym
4563 && S_GET_NAME (unwind
.proc_pending
.sym
)
4564 && strcmp (S_GET_NAME (unwind
.proc_pending
.sym
), FAKE_LABEL_NAME
))
4565 as_warn (_("`%s' should be an operand to this .endp"),
4566 S_GET_NAME (unwind
.proc_pending
.sym
));
4567 while (unwind
.proc_pending
.next
)
4569 pending
= unwind
.proc_pending
.next
;
4570 unwind
.proc_pending
.next
= pending
->next
;
4573 unwind
.proc_pending
.sym
= unwind
.info
= NULL
;
4577 dot_template (int template_val
)
4579 CURR_SLOT
.user_template
= template_val
;
4583 dot_regstk (int dummy ATTRIBUTE_UNUSED
)
4585 int ins
, locs
, outs
, rots
;
4587 if (is_it_end_of_statement ())
4588 ins
= locs
= outs
= rots
= 0;
4591 ins
= get_absolute_expression ();
4592 if (*input_line_pointer
++ != ',')
4594 locs
= get_absolute_expression ();
4595 if (*input_line_pointer
++ != ',')
4597 outs
= get_absolute_expression ();
4598 if (*input_line_pointer
++ != ',')
4600 rots
= get_absolute_expression ();
4602 set_regstack (ins
, locs
, outs
, rots
);
4606 as_bad (_("Comma expected"));
4607 ignore_rest_of_line ();
4614 valueT num_alloced
= 0;
4615 struct dynreg
**drpp
, *dr
;
4616 int ch
, base_reg
= 0;
4622 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4623 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4624 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4628 /* First, remove existing names from hash table. */
4629 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4631 hash_delete (md
.dynreg_hash
, dr
->name
, FALSE
);
4632 /* FIXME: Free dr->name. */
4636 drpp
= &md
.dynreg
[type
];
4639 ch
= get_symbol_name (&start
);
4640 len
= strlen (ia64_canonicalize_symbol_name (start
));
4641 *input_line_pointer
= ch
;
4643 SKIP_WHITESPACE_AFTER_NAME ();
4644 if (*input_line_pointer
!= '[')
4646 as_bad (_("Expected '['"));
4649 ++input_line_pointer
; /* skip '[' */
4651 num_regs
= get_absolute_expression ();
4653 if (*input_line_pointer
++ != ']')
4655 as_bad (_("Expected ']'"));
4660 as_bad (_("Number of elements must be positive"));
4665 num_alloced
+= num_regs
;
4669 if (num_alloced
> md
.rot
.num_regs
)
4671 as_bad (_("Used more than the declared %d rotating registers"),
4677 if (num_alloced
> 96)
4679 as_bad (_("Used more than the available 96 rotating registers"));
4684 if (num_alloced
> 48)
4686 as_bad (_("Used more than the available 48 rotating registers"));
4697 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4698 memset (*drpp
, 0, sizeof (*dr
));
4701 name
= obstack_alloc (¬es
, len
+ 1);
4702 memcpy (name
, start
, len
);
4707 dr
->num_regs
= num_regs
;
4708 dr
->base
= base_reg
;
4710 base_reg
+= num_regs
;
4712 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4714 as_bad (_("Attempt to redefine register set `%s'"), name
);
4715 obstack_free (¬es
, name
);
4719 if (*input_line_pointer
!= ',')
4721 ++input_line_pointer
; /* skip comma */
4724 demand_empty_rest_of_line ();
4728 ignore_rest_of_line ();
4732 dot_byteorder (int byteorder
)
4734 segment_info_type
*seginfo
= seg_info (now_seg
);
4736 if (byteorder
== -1)
4738 if (seginfo
->tc_segment_info_data
.endian
== 0)
4739 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4740 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4743 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4745 if (target_big_endian
!= byteorder
)
4747 target_big_endian
= byteorder
;
4748 if (target_big_endian
)
4750 ia64_number_to_chars
= number_to_chars_bigendian
;
4751 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4755 ia64_number_to_chars
= number_to_chars_littleendian
;
4756 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4762 dot_psr (int dummy ATTRIBUTE_UNUSED
)
4769 ch
= get_symbol_name (&option
);
4770 if (strcmp (option
, "lsb") == 0)
4771 md
.flags
&= ~EF_IA_64_BE
;
4772 else if (strcmp (option
, "msb") == 0)
4773 md
.flags
|= EF_IA_64_BE
;
4774 else if (strcmp (option
, "abi32") == 0)
4775 md
.flags
&= ~EF_IA_64_ABI64
;
4776 else if (strcmp (option
, "abi64") == 0)
4777 md
.flags
|= EF_IA_64_ABI64
;
4779 as_bad (_("Unknown psr option `%s'"), option
);
4780 *input_line_pointer
= ch
;
4782 SKIP_WHITESPACE_AFTER_NAME ();
4783 if (*input_line_pointer
!= ',')
4786 ++input_line_pointer
;
4789 demand_empty_rest_of_line ();
4793 dot_ln (int dummy ATTRIBUTE_UNUSED
)
4795 new_logical_line (0, get_absolute_expression ());
4796 demand_empty_rest_of_line ();
4800 cross_section (int ref
, void (*builder
) (int), int ua
)
4803 int saved_auto_align
;
4804 unsigned int section_count
;
4809 start
= input_line_pointer
;
4810 c
= get_symbol_name (&name
);
4811 if (input_line_pointer
== start
)
4813 as_bad (_("Missing section name"));
4814 ignore_rest_of_line ();
4817 * input_line_pointer
= c
;
4818 SKIP_WHITESPACE_AFTER_NAME ();
4819 end
= input_line_pointer
;
4820 if (*input_line_pointer
!= ',')
4822 as_bad (_("Comma expected after section name"));
4823 ignore_rest_of_line ();
4827 end
= input_line_pointer
+ 1; /* skip comma */
4828 input_line_pointer
= start
;
4829 md
.keep_pending_output
= 1;
4830 section_count
= bfd_count_sections (stdoutput
);
4831 obj_elf_section (0);
4832 if (section_count
!= bfd_count_sections (stdoutput
))
4833 as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."));
4834 input_line_pointer
= end
;
4835 saved_auto_align
= md
.auto_align
;
4840 md
.auto_align
= saved_auto_align
;
4841 obj_elf_previous (0);
4842 md
.keep_pending_output
= 0;
4846 dot_xdata (int size
)
4848 cross_section (size
, cons
, 0);
4851 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4854 stmt_float_cons (int kind
)
4874 ia64_do_align (alignment
);
4879 stmt_cons_ua (int size
)
4881 int saved_auto_align
= md
.auto_align
;
4885 md
.auto_align
= saved_auto_align
;
4889 dot_xfloat_cons (int kind
)
4891 cross_section (kind
, stmt_float_cons
, 0);
4895 dot_xstringer (int zero
)
4897 cross_section (zero
, stringer
, 0);
4901 dot_xdata_ua (int size
)
4903 cross_section (size
, cons
, 1);
4907 dot_xfloat_cons_ua (int kind
)
4909 cross_section (kind
, float_cons
, 1);
4912 /* .reg.val <regname>,value */
4915 dot_reg_val (int dummy ATTRIBUTE_UNUSED
)
4919 expression_and_evaluate (®
);
4920 if (reg
.X_op
!= O_register
)
4922 as_bad (_("Register name expected"));
4923 ignore_rest_of_line ();
4925 else if (*input_line_pointer
++ != ',')
4927 as_bad (_("Comma expected"));
4928 ignore_rest_of_line ();
4932 valueT value
= get_absolute_expression ();
4933 int regno
= reg
.X_add_number
;
4934 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4935 as_warn (_("Register value annotation ignored"));
4938 gr_values
[regno
- REG_GR
].known
= 1;
4939 gr_values
[regno
- REG_GR
].value
= value
;
4940 gr_values
[regno
- REG_GR
].path
= md
.path
;
4943 demand_empty_rest_of_line ();
4948 .serialize.instruction
4951 dot_serialize (int type
)
4953 insn_group_break (0, 0, 0);
4955 instruction_serialization ();
4957 data_serialization ();
4958 insn_group_break (0, 0, 0);
4959 demand_empty_rest_of_line ();
4962 /* select dv checking mode
4967 A stop is inserted when changing modes
4971 dot_dv_mode (int type
)
4973 if (md
.manual_bundling
)
4974 as_warn (_("Directive invalid within a bundle"));
4976 if (type
== 'E' || type
== 'A')
4977 md
.mode_explicitly_set
= 0;
4979 md
.mode_explicitly_set
= 1;
4986 if (md
.explicit_mode
)
4987 insn_group_break (1, 0, 0);
4988 md
.explicit_mode
= 0;
4992 if (!md
.explicit_mode
)
4993 insn_group_break (1, 0, 0);
4994 md
.explicit_mode
= 1;
4998 if (md
.explicit_mode
!= md
.default_explicit_mode
)
4999 insn_group_break (1, 0, 0);
5000 md
.explicit_mode
= md
.default_explicit_mode
;
5001 md
.mode_explicitly_set
= 0;
5007 print_prmask (valueT mask
)
5010 const char *comma
= "";
5011 for (regno
= 0; regno
< 64; regno
++)
5013 if (mask
& ((valueT
) 1 << regno
))
5015 fprintf (stderr
, "%s p%d", comma
, regno
);
5022 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5023 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5024 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5025 .pred.safe_across_calls p1 [, p2 [,...]]
5029 dot_pred_rel (int type
)
5033 int p1
= -1, p2
= -1;
5037 if (*input_line_pointer
== '"')
5040 char *form
= demand_copy_C_string (&len
);
5042 if (strcmp (form
, "mutex") == 0)
5044 else if (strcmp (form
, "clear") == 0)
5046 else if (strcmp (form
, "imply") == 0)
5048 obstack_free (¬es
, form
);
5050 else if (*input_line_pointer
== '@')
5055 ++input_line_pointer
;
5056 c
= get_symbol_name (&form
);
5058 if (strcmp (form
, "mutex") == 0)
5060 else if (strcmp (form
, "clear") == 0)
5062 else if (strcmp (form
, "imply") == 0)
5064 (void) restore_line_pointer (c
);
5068 as_bad (_("Missing predicate relation type"));
5069 ignore_rest_of_line ();
5074 as_bad (_("Unrecognized predicate relation type"));
5075 ignore_rest_of_line ();
5078 if (*input_line_pointer
== ',')
5079 ++input_line_pointer
;
5087 expressionS pr
, *pr1
, *pr2
;
5089 sep
= parse_operand_and_eval (&pr
, ',');
5090 if (pr
.X_op
== O_register
5091 && pr
.X_add_number
>= REG_P
5092 && pr
.X_add_number
<= REG_P
+ 63)
5094 regno
= pr
.X_add_number
- REG_P
;
5102 else if (type
!= 'i'
5103 && pr
.X_op
== O_subtract
5104 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5105 && pr1
->X_op
== O_register
5106 && pr1
->X_add_number
>= REG_P
5107 && pr1
->X_add_number
<= REG_P
+ 63
5108 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5109 && pr2
->X_op
== O_register
5110 && pr2
->X_add_number
>= REG_P
5111 && pr2
->X_add_number
<= REG_P
+ 63)
5116 regno
= pr1
->X_add_number
- REG_P
;
5117 stop
= pr2
->X_add_number
- REG_P
;
5120 as_bad (_("Bad register range"));
5121 ignore_rest_of_line ();
5124 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5125 count
+= stop
- regno
+ 1;
5129 as_bad (_("Predicate register expected"));
5130 ignore_rest_of_line ();
5134 as_warn (_("Duplicate predicate register ignored"));
5145 clear_qp_mutex (mask
);
5146 clear_qp_implies (mask
, (valueT
) 0);
5149 if (count
!= 2 || p1
== -1 || p2
== -1)
5150 as_bad (_("Predicate source and target required"));
5151 else if (p1
== 0 || p2
== 0)
5152 as_bad (_("Use of p0 is not valid in this context"));
5154 add_qp_imply (p1
, p2
);
5159 as_bad (_("At least two PR arguments expected"));
5164 as_bad (_("Use of p0 is not valid in this context"));
5167 add_qp_mutex (mask
);
5170 /* note that we don't override any existing relations */
5173 as_bad (_("At least one PR argument expected"));
5178 fprintf (stderr
, "Safe across calls: ");
5179 print_prmask (mask
);
5180 fprintf (stderr
, "\n");
5182 qp_safe_across_calls
= mask
;
5185 demand_empty_rest_of_line ();
5188 /* .entry label [, label [, ...]]
5189 Hint to DV code that the given labels are to be considered entry points.
5190 Otherwise, only global labels are considered entry points. */
5193 dot_entry (int dummy ATTRIBUTE_UNUSED
)
5202 c
= get_symbol_name (&name
);
5203 symbolP
= symbol_find_or_make (name
);
5205 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (void *) symbolP
);
5207 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5210 *input_line_pointer
= c
;
5211 SKIP_WHITESPACE_AFTER_NAME ();
5212 c
= *input_line_pointer
;
5215 input_line_pointer
++;
5217 if (*input_line_pointer
== '\n')
5223 demand_empty_rest_of_line ();
5226 /* .mem.offset offset, base
5227 "base" is used to distinguish between offsets from a different base. */
5230 dot_mem_offset (int dummy ATTRIBUTE_UNUSED
)
5232 md
.mem_offset
.hint
= 1;
5233 md
.mem_offset
.offset
= get_absolute_expression ();
5234 if (*input_line_pointer
!= ',')
5236 as_bad (_("Comma expected"));
5237 ignore_rest_of_line ();
5240 ++input_line_pointer
;
5241 md
.mem_offset
.base
= get_absolute_expression ();
5242 demand_empty_rest_of_line ();
5245 /* ia64-specific pseudo-ops: */
5246 const pseudo_typeS md_pseudo_table
[] =
5248 { "radix", dot_radix
, 0 },
5249 { "lcomm", s_lcomm_bytes
, 1 },
5250 { "loc", dot_loc
, 0 },
5251 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5252 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5253 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5254 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5255 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5256 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5257 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5258 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5259 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5260 { "proc", dot_proc
, 0 },
5261 { "body", dot_body
, 0 },
5262 { "prologue", dot_prologue
, 0 },
5263 { "endp", dot_endp
, 0 },
5265 { "fframe", dot_fframe
, 0 },
5266 { "vframe", dot_vframe
, 0 },
5267 { "vframesp", dot_vframesp
, 0 },
5268 { "vframepsp", dot_vframesp
, 1 },
5269 { "save", dot_save
, 0 },
5270 { "restore", dot_restore
, 0 },
5271 { "restorereg", dot_restorereg
, 0 },
5272 { "restorereg.p", dot_restorereg
, 1 },
5273 { "handlerdata", dot_handlerdata
, 0 },
5274 { "unwentry", dot_unwentry
, 0 },
5275 { "altrp", dot_altrp
, 0 },
5276 { "savesp", dot_savemem
, 0 },
5277 { "savepsp", dot_savemem
, 1 },
5278 { "save.g", dot_saveg
, 0 },
5279 { "save.f", dot_savef
, 0 },
5280 { "save.b", dot_saveb
, 0 },
5281 { "save.gf", dot_savegf
, 0 },
5282 { "spill", dot_spill
, 0 },
5283 { "spillreg", dot_spillreg
, 0 },
5284 { "spillsp", dot_spillmem
, 0 },
5285 { "spillpsp", dot_spillmem
, 1 },
5286 { "spillreg.p", dot_spillreg
, 1 },
5287 { "spillsp.p", dot_spillmem
, ~0 },
5288 { "spillpsp.p", dot_spillmem
, ~1 },
5289 { "label_state", dot_label_state
, 0 },
5290 { "copy_state", dot_copy_state
, 0 },
5291 { "unwabi", dot_unwabi
, 0 },
5292 { "personality", dot_personality
, 0 },
5293 { "mii", dot_template
, 0x0 },
5294 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5295 { "mlx", dot_template
, 0x2 },
5296 { "mmi", dot_template
, 0x4 },
5297 { "mfi", dot_template
, 0x6 },
5298 { "mmf", dot_template
, 0x7 },
5299 { "mib", dot_template
, 0x8 },
5300 { "mbb", dot_template
, 0x9 },
5301 { "bbb", dot_template
, 0xb },
5302 { "mmb", dot_template
, 0xc },
5303 { "mfb", dot_template
, 0xe },
5304 { "align", dot_align
, 0 },
5305 { "regstk", dot_regstk
, 0 },
5306 { "rotr", dot_rot
, DYNREG_GR
},
5307 { "rotf", dot_rot
, DYNREG_FR
},
5308 { "rotp", dot_rot
, DYNREG_PR
},
5309 { "lsb", dot_byteorder
, 0 },
5310 { "msb", dot_byteorder
, 1 },
5311 { "psr", dot_psr
, 0 },
5312 { "alias", dot_alias
, 0 },
5313 { "secalias", dot_alias
, 1 },
5314 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5316 { "xdata1", dot_xdata
, 1 },
5317 { "xdata2", dot_xdata
, 2 },
5318 { "xdata4", dot_xdata
, 4 },
5319 { "xdata8", dot_xdata
, 8 },
5320 { "xdata16", dot_xdata
, 16 },
5321 { "xreal4", dot_xfloat_cons
, 'f' },
5322 { "xreal8", dot_xfloat_cons
, 'd' },
5323 { "xreal10", dot_xfloat_cons
, 'x' },
5324 { "xreal16", dot_xfloat_cons
, 'X' },
5325 { "xstring", dot_xstringer
, 8 + 0 },
5326 { "xstringz", dot_xstringer
, 8 + 1 },
5328 /* unaligned versions: */
5329 { "xdata2.ua", dot_xdata_ua
, 2 },
5330 { "xdata4.ua", dot_xdata_ua
, 4 },
5331 { "xdata8.ua", dot_xdata_ua
, 8 },
5332 { "xdata16.ua", dot_xdata_ua
, 16 },
5333 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5334 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5335 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5336 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5338 /* annotations/DV checking support */
5339 { "entry", dot_entry
, 0 },
5340 { "mem.offset", dot_mem_offset
, 0 },
5341 { "pred.rel", dot_pred_rel
, 0 },
5342 { "pred.rel.clear", dot_pred_rel
, 'c' },
5343 { "pred.rel.imply", dot_pred_rel
, 'i' },
5344 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5345 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5346 { "reg.val", dot_reg_val
, 0 },
5347 { "serialize.data", dot_serialize
, 0 },
5348 { "serialize.instruction", dot_serialize
, 1 },
5349 { "auto", dot_dv_mode
, 'a' },
5350 { "explicit", dot_dv_mode
, 'e' },
5351 { "default", dot_dv_mode
, 'd' },
5353 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5354 IA-64 aligns data allocation pseudo-ops by default, so we have to
5355 tell it that these ones are supposed to be unaligned. Long term,
5356 should rewrite so that only IA-64 specific data allocation pseudo-ops
5357 are aligned by default. */
5358 {"2byte", stmt_cons_ua
, 2},
5359 {"4byte", stmt_cons_ua
, 4},
5360 {"8byte", stmt_cons_ua
, 8},
5363 {"vms_common", obj_elf_vms_common
, 0},
5369 static const struct pseudo_opcode
5372 void (*handler
) (int);
5377 /* these are more like pseudo-ops, but don't start with a dot */
5378 { "data1", cons
, 1 },
5379 { "data2", cons
, 2 },
5380 { "data4", cons
, 4 },
5381 { "data8", cons
, 8 },
5382 { "data16", cons
, 16 },
5383 { "real4", stmt_float_cons
, 'f' },
5384 { "real8", stmt_float_cons
, 'd' },
5385 { "real10", stmt_float_cons
, 'x' },
5386 { "real16", stmt_float_cons
, 'X' },
5387 { "string", stringer
, 8 + 0 },
5388 { "stringz", stringer
, 8 + 1 },
5390 /* unaligned versions: */
5391 { "data2.ua", stmt_cons_ua
, 2 },
5392 { "data4.ua", stmt_cons_ua
, 4 },
5393 { "data8.ua", stmt_cons_ua
, 8 },
5394 { "data16.ua", stmt_cons_ua
, 16 },
5395 { "real4.ua", float_cons
, 'f' },
5396 { "real8.ua", float_cons
, 'd' },
5397 { "real10.ua", float_cons
, 'x' },
5398 { "real16.ua", float_cons
, 'X' },
5401 /* Declare a register by creating a symbol for it and entering it in
5402 the symbol table. */
5405 declare_register (const char *name
, unsigned int regnum
)
5410 sym
= symbol_create (name
, reg_section
, regnum
, &zero_address_frag
);
5412 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (void *) sym
);
5414 as_fatal ("Inserting \"%s\" into register table failed: %s",
5421 declare_register_set (const char *prefix
,
5422 unsigned int num_regs
,
5423 unsigned int base_regnum
)
5428 for (i
= 0; i
< num_regs
; ++i
)
5430 snprintf (name
, sizeof (name
), "%s%u", prefix
, i
);
5431 declare_register (name
, base_regnum
+ i
);
5436 operand_width (enum ia64_opnd opnd
)
5438 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5439 unsigned int bits
= 0;
5443 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5444 bits
+= odesc
->field
[i
].bits
;
5449 static enum operand_match_result
5450 operand_match (const struct ia64_opcode
*idesc
, int res_index
, expressionS
*e
)
5452 enum ia64_opnd opnd
= idesc
->operands
[res_index
];
5453 int bits
, relocatable
= 0;
5454 struct insn_fix
*fix
;
5461 case IA64_OPND_AR_CCV
:
5462 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5463 return OPERAND_MATCH
;
5466 case IA64_OPND_AR_CSD
:
5467 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5468 return OPERAND_MATCH
;
5471 case IA64_OPND_AR_PFS
:
5472 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5473 return OPERAND_MATCH
;
5477 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5478 return OPERAND_MATCH
;
5482 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5483 return OPERAND_MATCH
;
5487 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5488 return OPERAND_MATCH
;
5491 case IA64_OPND_PR_ROT
:
5492 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5493 return OPERAND_MATCH
;
5497 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5498 return OPERAND_MATCH
;
5501 case IA64_OPND_PSR_L
:
5502 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5503 return OPERAND_MATCH
;
5506 case IA64_OPND_PSR_UM
:
5507 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5508 return OPERAND_MATCH
;
5512 if (e
->X_op
== O_constant
)
5514 if (e
->X_add_number
== 1)
5515 return OPERAND_MATCH
;
5517 return OPERAND_OUT_OF_RANGE
;
5522 if (e
->X_op
== O_constant
)
5524 if (e
->X_add_number
== 8)
5525 return OPERAND_MATCH
;
5527 return OPERAND_OUT_OF_RANGE
;
5532 if (e
->X_op
== O_constant
)
5534 if (e
->X_add_number
== 16)
5535 return OPERAND_MATCH
;
5537 return OPERAND_OUT_OF_RANGE
;
5541 /* register operands: */
5544 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5545 && e
->X_add_number
< REG_AR
+ 128)
5546 return OPERAND_MATCH
;
5551 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5552 && e
->X_add_number
< REG_BR
+ 8)
5553 return OPERAND_MATCH
;
5557 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5558 && e
->X_add_number
< REG_CR
+ 128)
5559 return OPERAND_MATCH
;
5562 case IA64_OPND_DAHR3
:
5563 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_DAHR
5564 && e
->X_add_number
< REG_DAHR
+ 8)
5565 return OPERAND_MATCH
;
5572 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5573 && e
->X_add_number
< REG_FR
+ 128)
5574 return OPERAND_MATCH
;
5579 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5580 && e
->X_add_number
< REG_P
+ 64)
5581 return OPERAND_MATCH
;
5587 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5588 && e
->X_add_number
< REG_GR
+ 128)
5589 return OPERAND_MATCH
;
5592 case IA64_OPND_R3_2
:
5593 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5595 if (e
->X_add_number
< REG_GR
+ 4)
5596 return OPERAND_MATCH
;
5597 else if (e
->X_add_number
< REG_GR
+ 128)
5598 return OPERAND_OUT_OF_RANGE
;
5602 /* indirect operands: */
5603 case IA64_OPND_CPUID_R3
:
5604 case IA64_OPND_DBR_R3
:
5605 case IA64_OPND_DTR_R3
:
5606 case IA64_OPND_ITR_R3
:
5607 case IA64_OPND_IBR_R3
:
5608 case IA64_OPND_MSR_R3
:
5609 case IA64_OPND_PKR_R3
:
5610 case IA64_OPND_PMC_R3
:
5611 case IA64_OPND_PMD_R3
:
5612 case IA64_OPND_DAHR_R3
:
5613 case IA64_OPND_RR_R3
:
5614 if (e
->X_op
== O_index
&& e
->X_op_symbol
5615 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5616 == opnd
- IA64_OPND_CPUID_R3
))
5617 return OPERAND_MATCH
;
5621 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5622 return OPERAND_MATCH
;
5625 /* immediate operands: */
5626 case IA64_OPND_CNT2a
:
5627 case IA64_OPND_LEN4
:
5628 case IA64_OPND_LEN6
:
5629 bits
= operand_width (idesc
->operands
[res_index
]);
5630 if (e
->X_op
== O_constant
)
5632 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5633 return OPERAND_MATCH
;
5635 return OPERAND_OUT_OF_RANGE
;
5639 case IA64_OPND_CNT2b
:
5640 if (e
->X_op
== O_constant
)
5642 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5643 return OPERAND_MATCH
;
5645 return OPERAND_OUT_OF_RANGE
;
5649 case IA64_OPND_CNT2c
:
5650 val
= e
->X_add_number
;
5651 if (e
->X_op
== O_constant
)
5653 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5654 return OPERAND_MATCH
;
5656 return OPERAND_OUT_OF_RANGE
;
5661 /* SOR must be an integer multiple of 8 */
5662 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5663 return OPERAND_OUT_OF_RANGE
;
5666 if (e
->X_op
== O_constant
)
5668 if ((bfd_vma
) e
->X_add_number
<= 96)
5669 return OPERAND_MATCH
;
5671 return OPERAND_OUT_OF_RANGE
;
5675 case IA64_OPND_IMMU62
:
5676 if (e
->X_op
== O_constant
)
5678 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5679 return OPERAND_MATCH
;
5681 return OPERAND_OUT_OF_RANGE
;
5685 /* FIXME -- need 62-bit relocation type */
5686 as_bad (_("62-bit relocation not yet implemented"));
5690 case IA64_OPND_IMMU64
:
5691 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5692 || e
->X_op
== O_subtract
)
5694 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5695 fix
->code
= BFD_RELOC_IA64_IMM64
;
5696 if (e
->X_op
!= O_subtract
)
5698 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5699 if (e
->X_op
== O_pseudo_fixup
)
5703 fix
->opnd
= idesc
->operands
[res_index
];
5706 ++CURR_SLOT
.num_fixups
;
5707 return OPERAND_MATCH
;
5709 else if (e
->X_op
== O_constant
)
5710 return OPERAND_MATCH
;
5713 case IA64_OPND_IMMU5b
:
5714 if (e
->X_op
== O_constant
)
5716 val
= e
->X_add_number
;
5717 if (val
>= 32 && val
<= 63)
5718 return OPERAND_MATCH
;
5720 return OPERAND_OUT_OF_RANGE
;
5724 case IA64_OPND_CCNT5
:
5725 case IA64_OPND_CNT5
:
5726 case IA64_OPND_CNT6
:
5727 case IA64_OPND_CPOS6a
:
5728 case IA64_OPND_CPOS6b
:
5729 case IA64_OPND_CPOS6c
:
5730 case IA64_OPND_IMMU2
:
5731 case IA64_OPND_IMMU7a
:
5732 case IA64_OPND_IMMU7b
:
5733 case IA64_OPND_IMMU16
:
5734 case IA64_OPND_IMMU19
:
5735 case IA64_OPND_IMMU21
:
5736 case IA64_OPND_IMMU24
:
5737 case IA64_OPND_MBTYPE4
:
5738 case IA64_OPND_MHTYPE8
:
5739 case IA64_OPND_POS6
:
5740 bits
= operand_width (idesc
->operands
[res_index
]);
5741 if (e
->X_op
== O_constant
)
5743 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5744 return OPERAND_MATCH
;
5746 return OPERAND_OUT_OF_RANGE
;
5750 case IA64_OPND_IMMU9
:
5751 bits
= operand_width (idesc
->operands
[res_index
]);
5752 if (e
->X_op
== O_constant
)
5754 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5756 int lobits
= e
->X_add_number
& 0x3;
5757 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5758 e
->X_add_number
|= (bfd_vma
) 0x3;
5759 return OPERAND_MATCH
;
5762 return OPERAND_OUT_OF_RANGE
;
5766 case IA64_OPND_IMM44
:
5767 /* least 16 bits must be zero */
5768 if ((e
->X_add_number
& 0xffff) != 0)
5769 /* XXX technically, this is wrong: we should not be issuing warning
5770 messages until we're sure this instruction pattern is going to
5772 as_warn (_("lower 16 bits of mask ignored"));
5774 if (e
->X_op
== O_constant
)
5776 if (((e
->X_add_number
>= 0
5777 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5778 || (e
->X_add_number
< 0
5779 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5782 if (e
->X_add_number
>= 0
5783 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5785 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5787 return OPERAND_MATCH
;
5790 return OPERAND_OUT_OF_RANGE
;
5794 case IA64_OPND_IMM17
:
5795 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5796 if (e
->X_op
== O_constant
)
5798 if (((e
->X_add_number
>= 0
5799 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5800 || (e
->X_add_number
< 0
5801 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5804 if (e
->X_add_number
>= 0
5805 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5807 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5809 return OPERAND_MATCH
;
5812 return OPERAND_OUT_OF_RANGE
;
5816 case IA64_OPND_IMM14
:
5817 case IA64_OPND_IMM22
:
5819 case IA64_OPND_IMM1
:
5820 case IA64_OPND_IMM8
:
5821 case IA64_OPND_IMM8U4
:
5822 case IA64_OPND_IMM8M1
:
5823 case IA64_OPND_IMM8M1U4
:
5824 case IA64_OPND_IMM8M1U8
:
5825 case IA64_OPND_IMM9a
:
5826 case IA64_OPND_IMM9b
:
5827 bits
= operand_width (idesc
->operands
[res_index
]);
5828 if (relocatable
&& (e
->X_op
== O_symbol
5829 || e
->X_op
== O_subtract
5830 || e
->X_op
== O_pseudo_fixup
))
5832 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5834 if (idesc
->operands
[res_index
] == IA64_OPND_IMM14
)
5835 fix
->code
= BFD_RELOC_IA64_IMM14
;
5837 fix
->code
= BFD_RELOC_IA64_IMM22
;
5839 if (e
->X_op
!= O_subtract
)
5841 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5842 if (e
->X_op
== O_pseudo_fixup
)
5846 fix
->opnd
= idesc
->operands
[res_index
];
5849 ++CURR_SLOT
.num_fixups
;
5850 return OPERAND_MATCH
;
5852 else if (e
->X_op
!= O_constant
5853 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5854 return OPERAND_MISMATCH
;
5856 if (opnd
== IA64_OPND_IMM8M1U4
)
5858 /* Zero is not valid for unsigned compares that take an adjusted
5859 constant immediate range. */
5860 if (e
->X_add_number
== 0)
5861 return OPERAND_OUT_OF_RANGE
;
5863 /* Sign-extend 32-bit unsigned numbers, so that the following range
5864 checks will work. */
5865 val
= e
->X_add_number
;
5866 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5867 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5868 val
= ((val
<< 32) >> 32);
5870 /* Check for 0x100000000. This is valid because
5871 0x100000000-1 is the same as ((uint32_t) -1). */
5872 if (val
== ((bfd_signed_vma
) 1 << 32))
5873 return OPERAND_MATCH
;
5877 else if (opnd
== IA64_OPND_IMM8M1U8
)
5879 /* Zero is not valid for unsigned compares that take an adjusted
5880 constant immediate range. */
5881 if (e
->X_add_number
== 0)
5882 return OPERAND_OUT_OF_RANGE
;
5884 /* Check for 0x10000000000000000. */
5885 if (e
->X_op
== O_big
)
5887 if (generic_bignum
[0] == 0
5888 && generic_bignum
[1] == 0
5889 && generic_bignum
[2] == 0
5890 && generic_bignum
[3] == 0
5891 && generic_bignum
[4] == 1)
5892 return OPERAND_MATCH
;
5894 return OPERAND_OUT_OF_RANGE
;
5897 val
= e
->X_add_number
- 1;
5899 else if (opnd
== IA64_OPND_IMM8M1
)
5900 val
= e
->X_add_number
- 1;
5901 else if (opnd
== IA64_OPND_IMM8U4
)
5903 /* Sign-extend 32-bit unsigned numbers, so that the following range
5904 checks will work. */
5905 val
= e
->X_add_number
;
5906 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5907 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5908 val
= ((val
<< 32) >> 32);
5911 val
= e
->X_add_number
;
5913 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5914 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5915 return OPERAND_MATCH
;
5917 return OPERAND_OUT_OF_RANGE
;
5919 case IA64_OPND_INC3
:
5920 /* +/- 1, 4, 8, 16 */
5921 val
= e
->X_add_number
;
5924 if (e
->X_op
== O_constant
)
5926 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5927 return OPERAND_MATCH
;
5929 return OPERAND_OUT_OF_RANGE
;
5933 case IA64_OPND_TGT25
:
5934 case IA64_OPND_TGT25b
:
5935 case IA64_OPND_TGT25c
:
5936 case IA64_OPND_TGT64
:
5937 if (e
->X_op
== O_symbol
)
5939 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5940 if (opnd
== IA64_OPND_TGT25
)
5941 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5942 else if (opnd
== IA64_OPND_TGT25b
)
5943 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5944 else if (opnd
== IA64_OPND_TGT25c
)
5945 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5946 else if (opnd
== IA64_OPND_TGT64
)
5947 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5951 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5952 fix
->opnd
= idesc
->operands
[res_index
];
5955 ++CURR_SLOT
.num_fixups
;
5956 return OPERAND_MATCH
;
5958 case IA64_OPND_TAG13
:
5959 case IA64_OPND_TAG13b
:
5963 return OPERAND_MATCH
;
5966 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5967 /* There are no external relocs for TAG13/TAG13b fields, so we
5968 create a dummy reloc. This will not live past md_apply_fix. */
5969 fix
->code
= BFD_RELOC_UNUSED
;
5970 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5971 fix
->opnd
= idesc
->operands
[res_index
];
5974 ++CURR_SLOT
.num_fixups
;
5975 return OPERAND_MATCH
;
5982 case IA64_OPND_LDXMOV
:
5983 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5984 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5985 fix
->opnd
= idesc
->operands
[res_index
];
5988 ++CURR_SLOT
.num_fixups
;
5989 return OPERAND_MATCH
;
5991 case IA64_OPND_STRD5b
:
5992 if (e
->X_op
== O_constant
)
5994 /* 5-bit signed scaled by 64 */
5995 if ((e
->X_add_number
<= ( 0xf << 6 ))
5996 && (e
->X_add_number
>= -( 0x10 << 6 )))
5999 /* Must be a multiple of 64 */
6000 if ((e
->X_add_number
& 0x3f) != 0)
6001 as_warn (_("stride must be a multiple of 64; lower 6 bits ignored"));
6003 e
->X_add_number
&= ~ 0x3f;
6004 return OPERAND_MATCH
;
6007 return OPERAND_OUT_OF_RANGE
;
6010 case IA64_OPND_CNT6a
:
6011 if (e
->X_op
== O_constant
)
6013 /* 6-bit unsigned biased by 1 -- count 0 is meaningless */
6014 if ((e
->X_add_number
<= 64)
6015 && (e
->X_add_number
> 0) )
6017 return OPERAND_MATCH
;
6020 return OPERAND_OUT_OF_RANGE
;
6027 return OPERAND_MISMATCH
;
6031 parse_operand (expressionS
*e
, int more
)
6035 memset (e
, 0, sizeof (*e
));
6039 sep
= *input_line_pointer
;
6040 if (more
&& (sep
== ',' || sep
== more
))
6041 ++input_line_pointer
;
6046 parse_operand_and_eval (expressionS
*e
, int more
)
6048 int sep
= parse_operand (e
, more
);
6049 resolve_expression (e
);
6054 parse_operand_maybe_eval (expressionS
*e
, int more
, enum ia64_opnd op
)
6056 int sep
= parse_operand (e
, more
);
6059 case IA64_OPND_IMM14
:
6060 case IA64_OPND_IMM22
:
6061 case IA64_OPND_IMMU64
:
6062 case IA64_OPND_TGT25
:
6063 case IA64_OPND_TGT25b
:
6064 case IA64_OPND_TGT25c
:
6065 case IA64_OPND_TGT64
:
6066 case IA64_OPND_TAG13
:
6067 case IA64_OPND_TAG13b
:
6068 case IA64_OPND_LDXMOV
:
6071 resolve_expression (e
);
6077 /* Returns the next entry in the opcode table that matches the one in
6078 IDESC, and frees the entry in IDESC. If no matching entry is
6079 found, NULL is returned instead. */
6081 static struct ia64_opcode
*
6082 get_next_opcode (struct ia64_opcode
*idesc
)
6084 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6085 ia64_free_opcode (idesc
);
6089 /* Parse the operands for the opcode and find the opcode variant that
6090 matches the specified operands, or NULL if no match is possible. */
6092 static struct ia64_opcode
*
6093 parse_operands (struct ia64_opcode
*idesc
)
6095 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6096 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6099 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6100 enum operand_match_result result
;
6102 char *first_arg
= 0, *end
, *saved_input_pointer
;
6105 gas_assert (strlen (idesc
->name
) <= 128);
6107 strcpy (mnemonic
, idesc
->name
);
6108 if (idesc
->operands
[2] == IA64_OPND_SOF
6109 || idesc
->operands
[1] == IA64_OPND_SOF
)
6111 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6112 can't parse the first operand until we have parsed the
6113 remaining operands of the "alloc" instruction. */
6115 first_arg
= input_line_pointer
;
6116 end
= strchr (input_line_pointer
, '=');
6119 as_bad (_("Expected separator `='"));
6122 input_line_pointer
= end
+ 1;
6129 if (i
< NELEMS (CURR_SLOT
.opnd
))
6131 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ i
, '=',
6132 idesc
->operands
[i
]);
6133 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6140 sep
= parse_operand (&dummy
, '=');
6141 if (dummy
.X_op
== O_absent
)
6147 if (sep
!= '=' && sep
!= ',')
6152 if (num_outputs
> 0)
6153 as_bad (_("Duplicate equal sign (=) in instruction"));
6155 num_outputs
= i
+ 1;
6160 as_bad (_("Illegal operand separator `%c'"), sep
);
6164 if (idesc
->operands
[2] == IA64_OPND_SOF
6165 || idesc
->operands
[1] == IA64_OPND_SOF
)
6167 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6168 Note, however, that due to that mapping operand numbers in error
6169 messages for any of the constant operands will not be correct. */
6170 know (strcmp (idesc
->name
, "alloc") == 0);
6171 /* The first operand hasn't been parsed/initialized, yet (but
6172 num_operands intentionally doesn't account for that). */
6173 i
= num_operands
> 4 ? 2 : 1;
6174 #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6175 ? CURR_SLOT.opnd[n].X_add_number \
6177 sof
= set_regstack (FORCE_CONST(i
),
6180 FORCE_CONST(i
+ 3));
6183 /* now we can parse the first arg: */
6184 saved_input_pointer
= input_line_pointer
;
6185 input_line_pointer
= first_arg
;
6186 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ 0, '=',
6187 idesc
->operands
[0]);
6189 --num_outputs
; /* force error */
6190 input_line_pointer
= saved_input_pointer
;
6192 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6193 if (CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6194 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
)
6195 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6196 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6198 CURR_SLOT
.opnd
[i
+ 1].X_op
= O_illegal
;
6199 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6202 highest_unmatched_operand
= -4;
6203 curr_out_of_range_pos
= -1;
6205 for (; idesc
; idesc
= get_next_opcode (idesc
))
6207 if (num_outputs
!= idesc
->num_outputs
)
6208 continue; /* mismatch in # of outputs */
6209 if (highest_unmatched_operand
< 0)
6210 highest_unmatched_operand
|= 1;
6211 if (num_operands
> NELEMS (idesc
->operands
)
6212 || (num_operands
< NELEMS (idesc
->operands
)
6213 && idesc
->operands
[num_operands
])
6214 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6215 continue; /* mismatch in number of arguments */
6216 if (highest_unmatched_operand
< 0)
6217 highest_unmatched_operand
|= 2;
6219 CURR_SLOT
.num_fixups
= 0;
6221 /* Try to match all operands. If we see an out-of-range operand,
6222 then continue trying to match the rest of the operands, since if
6223 the rest match, then this idesc will give the best error message. */
6225 out_of_range_pos
= -1;
6226 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6228 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6229 if (result
!= OPERAND_MATCH
)
6231 if (result
!= OPERAND_OUT_OF_RANGE
)
6233 if (out_of_range_pos
< 0)
6234 /* remember position of the first out-of-range operand: */
6235 out_of_range_pos
= i
;
6239 /* If we did not match all operands, or if at least one operand was
6240 out-of-range, then this idesc does not match. Keep track of which
6241 idesc matched the most operands before failing. If we have two
6242 idescs that failed at the same position, and one had an out-of-range
6243 operand, then prefer the out-of-range operand. Thus if we have
6244 "add r0=0x1000000,r1" we get an error saying the constant is out
6245 of range instead of an error saying that the constant should have been
6248 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6250 if (i
> highest_unmatched_operand
6251 || (i
== highest_unmatched_operand
6252 && out_of_range_pos
> curr_out_of_range_pos
))
6254 highest_unmatched_operand
= i
;
6255 if (out_of_range_pos
>= 0)
6257 expected_operand
= idesc
->operands
[out_of_range_pos
];
6258 error_pos
= out_of_range_pos
;
6262 expected_operand
= idesc
->operands
[i
];
6265 curr_out_of_range_pos
= out_of_range_pos
;
6274 if (expected_operand
)
6275 as_bad (_("Operand %u of `%s' should be %s"),
6276 error_pos
+ 1, mnemonic
,
6277 elf64_ia64_operands
[expected_operand
].desc
);
6278 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6279 as_bad (_("Wrong number of output operands"));
6280 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6281 as_bad (_("Wrong number of input operands"));
6283 as_bad (_("Operand mismatch"));
6287 /* Check that the instruction doesn't use
6288 - r0, f0, or f1 as output operands
6289 - the same predicate twice as output operands
6290 - r0 as address of a base update load or store
6291 - the same GR as output and address of a base update load
6292 - two even- or two odd-numbered FRs as output operands of a floating
6293 point parallel load.
6294 At most two (conflicting) output (or output-like) operands can exist,
6295 (floating point parallel loads have three outputs, but the base register,
6296 if updated, cannot conflict with the actual outputs). */
6298 for (i
= 0; i
< num_operands
; ++i
)
6303 switch (idesc
->operands
[i
])
6308 if (i
< num_outputs
)
6310 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6313 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6315 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6320 if (i
< num_outputs
)
6323 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6325 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6332 if (i
< num_outputs
)
6334 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6335 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6338 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6341 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6343 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6347 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6349 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6352 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6354 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6365 as_warn (_("Invalid use of `%c%d' as output operand"), reg_class
, regno
);
6368 as_warn (_("Invalid use of `r%d' as base update address operand"), regno
);
6374 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6379 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6384 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6392 as_warn (_("Invalid duplicate use of `%c%d'"), reg_class
, reg1
);
6394 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6395 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6396 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6397 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6398 && ! ((reg1
^ reg2
) & 1))
6399 as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"),
6400 reg1
- REG_FR
, reg2
- REG_FR
);
6401 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6402 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6403 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6404 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6405 as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"),
6406 reg1
- REG_FR
, reg2
- REG_FR
);
6411 build_insn (struct slot
*slot
, bfd_vma
*insnp
)
6413 const struct ia64_operand
*odesc
, *o2desc
;
6414 struct ia64_opcode
*idesc
= slot
->idesc
;
6420 insn
= idesc
->opcode
| slot
->qp_regno
;
6422 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6424 if (slot
->opnd
[i
].X_op
== O_register
6425 || slot
->opnd
[i
].X_op
== O_constant
6426 || slot
->opnd
[i
].X_op
== O_index
)
6427 val
= slot
->opnd
[i
].X_add_number
;
6428 else if (slot
->opnd
[i
].X_op
== O_big
)
6430 /* This must be the value 0x10000000000000000. */
6431 gas_assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6437 switch (idesc
->operands
[i
])
6439 case IA64_OPND_IMMU64
:
6440 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6441 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6442 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6443 | (((val
>> 63) & 0x1) << 36));
6446 case IA64_OPND_IMMU62
:
6447 val
&= 0x3fffffffffffffffULL
;
6448 if (val
!= slot
->opnd
[i
].X_add_number
)
6449 as_warn (_("Value truncated to 62 bits"));
6450 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6451 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6454 case IA64_OPND_TGT64
:
6456 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6457 insn
|= ((((val
>> 59) & 0x1) << 36)
6458 | (((val
>> 0) & 0xfffff) << 13));
6474 case IA64_OPND_DAHR3
:
6493 case IA64_OPND_R3_2
:
6494 case IA64_OPND_CPUID_R3
:
6495 case IA64_OPND_DBR_R3
:
6496 case IA64_OPND_DTR_R3
:
6497 case IA64_OPND_ITR_R3
:
6498 case IA64_OPND_IBR_R3
:
6500 case IA64_OPND_MSR_R3
:
6501 case IA64_OPND_PKR_R3
:
6502 case IA64_OPND_PMC_R3
:
6503 case IA64_OPND_PMD_R3
:
6504 case IA64_OPND_DAHR_R3
:
6505 case IA64_OPND_RR_R3
:
6513 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6514 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6516 as_bad_where (slot
->src_file
, slot
->src_line
,
6517 _("Bad operand value: %s"), err
);
6518 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6520 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6521 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6523 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6524 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6526 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6527 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6528 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6530 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6531 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6539 emit_one_bundle (void)
6541 int manual_bundling_off
= 0, manual_bundling
= 0;
6542 enum ia64_unit required_unit
, insn_unit
= 0;
6543 enum ia64_insn_type type
[3], insn_type
;
6544 unsigned int template_val
, orig_template
;
6545 bfd_vma insn
[3] = { -1, -1, -1 };
6546 struct ia64_opcode
*idesc
;
6547 int end_of_insn_group
= 0, user_template
= -1;
6548 int n
, i
, j
, first
, curr
, last_slot
;
6549 bfd_vma t0
= 0, t1
= 0;
6550 struct label_fix
*lfix
;
6551 bfd_boolean mark_label
;
6552 struct insn_fix
*ifix
;
6558 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6559 know (first
>= 0 && first
< NUM_SLOTS
);
6560 n
= MIN (3, md
.num_slots_in_use
);
6562 /* Determine template: user user_template if specified, best match
6565 if (md
.slot
[first
].user_template
>= 0)
6566 user_template
= template_val
= md
.slot
[first
].user_template
;
6569 /* Auto select appropriate template. */
6570 memset (type
, 0, sizeof (type
));
6572 for (i
= 0; i
< n
; ++i
)
6574 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6576 type
[i
] = md
.slot
[curr
].idesc
->type
;
6577 curr
= (curr
+ 1) % NUM_SLOTS
;
6579 template_val
= best_template
[type
[0]][type
[1]][type
[2]];
6582 /* initialize instructions with appropriate nops: */
6583 for (i
= 0; i
< 3; ++i
)
6584 insn
[i
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[i
]];
6588 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6589 from the start of the frag. */
6590 addr_mod
= frag_now_fix () & 15;
6591 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6592 as_bad (_("instruction address is not a multiple of 16"));
6593 frag_now
->insn_addr
= addr_mod
;
6594 frag_now
->has_code
= 1;
6596 /* now fill in slots with as many insns as possible: */
6598 idesc
= md
.slot
[curr
].idesc
;
6599 end_of_insn_group
= 0;
6601 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6603 /* If we have unwind records, we may need to update some now. */
6604 unw_rec_list
*ptr
= md
.slot
[curr
].unwind_record
;
6605 unw_rec_list
*end_ptr
= NULL
;
6609 /* Find the last prologue/body record in the list for the current
6610 insn, and set the slot number for all records up to that point.
6611 This needs to be done now, because prologue/body records refer to
6612 the current point, not the point after the instruction has been
6613 issued. This matters because there may have been nops emitted
6614 meanwhile. Any non-prologue non-body record followed by a
6615 prologue/body record must also refer to the current point. */
6616 unw_rec_list
*last_ptr
;
6618 for (j
= 1; end_ptr
== NULL
&& j
< md
.num_slots_in_use
; ++j
)
6619 end_ptr
= md
.slot
[(curr
+ j
) % NUM_SLOTS
].unwind_record
;
6620 for (last_ptr
= NULL
; ptr
!= end_ptr
; ptr
= ptr
->next
)
6621 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6622 || ptr
->r
.type
== body
)
6626 /* Make last_ptr point one after the last prologue/body
6628 last_ptr
= last_ptr
->next
;
6629 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6632 ptr
->slot_number
= (unsigned long) f
+ i
;
6633 ptr
->slot_frag
= frag_now
;
6635 /* Remove the initialized records, so that we won't accidentally
6636 update them again if we insert a nop and continue. */
6637 md
.slot
[curr
].unwind_record
= last_ptr
;
6641 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6642 if (md
.slot
[curr
].manual_bundling_on
)
6645 manual_bundling
= 1;
6647 break; /* Need to start a new bundle. */
6650 /* If this instruction specifies a template, then it must be the first
6651 instruction of a bundle. */
6652 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6655 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6657 if (manual_bundling
&& !manual_bundling_off
)
6659 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6660 _("`%s' must be last in bundle"), idesc
->name
);
6662 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6666 if (idesc
->flags
& IA64_OPCODE_LAST
)
6669 unsigned int required_template
;
6671 /* If we need a stop bit after an M slot, our only choice is
6672 template 5 (M;;MI). If we need a stop bit after a B
6673 slot, our only choice is to place it at the end of the
6674 bundle, because the only available templates are MIB,
6675 MBB, BBB, MMB, and MFB. We don't handle anything other
6676 than M and B slots because these are the only kind of
6677 instructions that can have the IA64_OPCODE_LAST bit set. */
6678 required_template
= template_val
;
6679 switch (idesc
->type
)
6683 required_template
= 5;
6691 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6692 _("Internal error: don't know how to force %s to end of instruction group"),
6698 && (i
> required_slot
6699 || (required_slot
== 2 && !manual_bundling_off
)
6700 || (user_template
>= 0
6701 /* Changing from MMI to M;MI is OK. */
6702 && (template_val
^ required_template
) > 1)))
6704 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6705 _("`%s' must be last in instruction group"),
6707 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6708 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6710 if (required_slot
< i
)
6711 /* Can't fit this instruction. */
6715 if (required_template
!= template_val
)
6717 /* If we switch the template, we need to reset the NOPs
6718 after slot i. The slot-types of the instructions ahead
6719 of i never change, so we don't need to worry about
6720 changing NOPs in front of this slot. */
6721 for (j
= i
; j
< 3; ++j
)
6722 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6724 /* We just picked a template that includes the stop bit in the
6725 middle, so we don't need another one emitted later. */
6726 md
.slot
[curr
].end_of_insn_group
= 0;
6728 template_val
= required_template
;
6730 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6732 if (manual_bundling
)
6734 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6735 _("Label must be first in a bundle"));
6736 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6738 /* This insn must go into the first slot of a bundle. */
6742 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6744 /* We need an instruction group boundary in the middle of a
6745 bundle. See if we can switch to an other template with
6746 an appropriate boundary. */
6748 orig_template
= template_val
;
6749 if (i
== 1 && (user_template
== 4
6750 || (user_template
< 0
6751 && (ia64_templ_desc
[template_val
].exec_unit
[0]
6755 end_of_insn_group
= 0;
6757 else if (i
== 2 && (user_template
== 0
6758 || (user_template
< 0
6759 && (ia64_templ_desc
[template_val
].exec_unit
[1]
6761 /* This test makes sure we don't switch the template if
6762 the next instruction is one that needs to be first in
6763 an instruction group. Since all those instructions are
6764 in the M group, there is no way such an instruction can
6765 fit in this bundle even if we switch the template. The
6766 reason we have to check for this is that otherwise we
6767 may end up generating "MI;;I M.." which has the deadly
6768 effect that the second M instruction is no longer the
6769 first in the group! --davidm 99/12/16 */
6770 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6773 end_of_insn_group
= 0;
6776 && user_template
== 0
6777 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6778 /* Use the next slot. */
6780 else if (curr
!= first
)
6781 /* can't fit this insn */
6784 if (template_val
!= orig_template
)
6785 /* if we switch the template, we need to reset the NOPs
6786 after slot i. The slot-types of the instructions ahead
6787 of i never change, so we don't need to worry about
6788 changing NOPs in front of this slot. */
6789 for (j
= i
; j
< 3; ++j
)
6790 insn
[j
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[j
]];
6792 required_unit
= ia64_templ_desc
[template_val
].exec_unit
[i
];
6794 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6795 if (idesc
->type
== IA64_TYPE_DYN
)
6797 enum ia64_opnd opnd1
, opnd2
;
6799 if ((strcmp (idesc
->name
, "nop") == 0)
6800 || (strcmp (idesc
->name
, "break") == 0))
6801 insn_unit
= required_unit
;
6802 else if (strcmp (idesc
->name
, "hint") == 0)
6804 insn_unit
= required_unit
;
6805 if (required_unit
== IA64_UNIT_B
)
6811 case hint_b_warning
:
6812 as_warn (_("hint in B unit may be treated as nop"));
6815 /* When manual bundling is off and there is no
6816 user template, we choose a different unit so
6817 that hint won't go into the current slot. We
6818 will fill the current bundle with nops and
6819 try to put hint into the next bundle. */
6820 if (!manual_bundling
&& user_template
< 0)
6821 insn_unit
= IA64_UNIT_I
;
6823 as_bad (_("hint in B unit can't be used"));
6828 else if (strcmp (idesc
->name
, "chk.s") == 0
6829 || strcmp (idesc
->name
, "mov") == 0)
6831 insn_unit
= IA64_UNIT_M
;
6832 if (required_unit
== IA64_UNIT_I
6833 || (required_unit
== IA64_UNIT_F
&& template_val
== 6))
6834 insn_unit
= IA64_UNIT_I
;
6837 as_fatal (_("emit_one_bundle: unexpected dynamic op"));
6839 snprintf (mnemonic
, sizeof (mnemonic
), "%s.%c",
6840 idesc
->name
, "?imbfxx"[insn_unit
]);
6841 opnd1
= idesc
->operands
[0];
6842 opnd2
= idesc
->operands
[1];
6843 ia64_free_opcode (idesc
);
6844 idesc
= ia64_find_opcode (mnemonic
);
6845 /* moves to/from ARs have collisions */
6846 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6848 while (idesc
!= NULL
6849 && (idesc
->operands
[0] != opnd1
6850 || idesc
->operands
[1] != opnd2
))
6851 idesc
= get_next_opcode (idesc
);
6853 md
.slot
[curr
].idesc
= idesc
;
6857 insn_type
= idesc
->type
;
6858 insn_unit
= IA64_UNIT_NIL
;
6862 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6863 insn_unit
= required_unit
;
6865 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6866 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6867 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6868 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6869 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6874 if (insn_unit
!= required_unit
)
6875 continue; /* Try next slot. */
6877 /* Now is a good time to fix up the labels for this insn. */
6879 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6881 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6882 symbol_set_frag (lfix
->sym
, frag_now
);
6883 mark_label
|= lfix
->dw2_mark_labels
;
6885 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6887 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6888 symbol_set_frag (lfix
->sym
, frag_now
);
6891 if (debug_type
== DEBUG_DWARF2
6892 || md
.slot
[curr
].loc_directive_seen
6895 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6897 md
.slot
[curr
].loc_directive_seen
= 0;
6899 md
.slot
[curr
].debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
6901 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6904 build_insn (md
.slot
+ curr
, insn
+ i
);
6906 ptr
= md
.slot
[curr
].unwind_record
;
6909 /* Set slot numbers for all remaining unwind records belonging to the
6910 current insn. There can not be any prologue/body unwind records
6912 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6914 ptr
->slot_number
= (unsigned long) f
+ i
;
6915 ptr
->slot_frag
= frag_now
;
6917 md
.slot
[curr
].unwind_record
= NULL
;
6920 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6922 ifix
= md
.slot
[curr
].fixup
+ j
;
6923 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6924 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6925 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6926 fix
->fx_file
= md
.slot
[curr
].src_file
;
6927 fix
->fx_line
= md
.slot
[curr
].src_line
;
6930 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6932 /* This adjustment to "i" must occur after the fix, otherwise the fix
6933 is assigned to the wrong slot, and the VMS linker complains. */
6934 if (required_unit
== IA64_UNIT_L
)
6937 /* skip one slot for long/X-unit instructions */
6940 --md
.num_slots_in_use
;
6944 ia64_free_opcode (md
.slot
[curr
].idesc
);
6945 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6946 md
.slot
[curr
].user_template
= -1;
6948 if (manual_bundling_off
)
6950 manual_bundling
= 0;
6953 curr
= (curr
+ 1) % NUM_SLOTS
;
6954 idesc
= md
.slot
[curr
].idesc
;
6957 /* A user template was specified, but the first following instruction did
6958 not fit. This can happen with or without manual bundling. */
6959 if (md
.num_slots_in_use
> 0 && last_slot
< 0)
6961 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6962 _("`%s' does not fit into %s template"),
6963 idesc
->name
, ia64_templ_desc
[template_val
].name
);
6964 /* Drop first insn so we don't livelock. */
6965 --md
.num_slots_in_use
;
6966 know (curr
== first
);
6967 ia64_free_opcode (md
.slot
[curr
].idesc
);
6968 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6969 md
.slot
[curr
].user_template
= -1;
6971 else if (manual_bundling
> 0)
6973 if (md
.num_slots_in_use
> 0)
6976 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6977 _("`%s' does not fit into bundle"), idesc
->name
);
6982 if (template_val
== 2)
6984 else if (last_slot
== 0)
6985 where
= "slots 2 or 3";
6988 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6989 _("`%s' can't go in %s of %s template"),
6990 idesc
->name
, where
, ia64_templ_desc
[template_val
].name
);
6994 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6995 _("Missing '}' at end of file"));
6998 know (md
.num_slots_in_use
< NUM_SLOTS
);
7000 t0
= end_of_insn_group
| (template_val
<< 1) | (insn
[0] << 5) | (insn
[1] << 46);
7001 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
7003 number_to_chars_littleendian (f
+ 0, t0
, 8);
7004 number_to_chars_littleendian (f
+ 8, t1
, 8);
7008 md_parse_option (int c
, char *arg
)
7013 /* Switches from the Intel assembler. */
7015 if (strcmp (arg
, "ilp64") == 0
7016 || strcmp (arg
, "lp64") == 0
7017 || strcmp (arg
, "p64") == 0)
7019 md
.flags
|= EF_IA_64_ABI64
;
7021 else if (strcmp (arg
, "ilp32") == 0)
7023 md
.flags
&= ~EF_IA_64_ABI64
;
7025 else if (strcmp (arg
, "le") == 0)
7027 md
.flags
&= ~EF_IA_64_BE
;
7028 default_big_endian
= 0;
7030 else if (strcmp (arg
, "be") == 0)
7032 md
.flags
|= EF_IA_64_BE
;
7033 default_big_endian
= 1;
7035 else if (strncmp (arg
, "unwind-check=", 13) == 0)
7038 if (strcmp (arg
, "warning") == 0)
7039 md
.unwind_check
= unwind_check_warning
;
7040 else if (strcmp (arg
, "error") == 0)
7041 md
.unwind_check
= unwind_check_error
;
7045 else if (strncmp (arg
, "hint.b=", 7) == 0)
7048 if (strcmp (arg
, "ok") == 0)
7049 md
.hint_b
= hint_b_ok
;
7050 else if (strcmp (arg
, "warning") == 0)
7051 md
.hint_b
= hint_b_warning
;
7052 else if (strcmp (arg
, "error") == 0)
7053 md
.hint_b
= hint_b_error
;
7057 else if (strncmp (arg
, "tune=", 5) == 0)
7060 if (strcmp (arg
, "itanium1") == 0)
7062 else if (strcmp (arg
, "itanium2") == 0)
7072 if (strcmp (arg
, "so") == 0)
7074 /* Suppress signon message. */
7076 else if (strcmp (arg
, "pi") == 0)
7078 /* Reject privileged instructions. FIXME */
7080 else if (strcmp (arg
, "us") == 0)
7082 /* Allow union of signed and unsigned range. FIXME */
7084 else if (strcmp (arg
, "close_fcalls") == 0)
7086 /* Do not resolve global function calls. */
7093 /* temp[="prefix"] Insert temporary labels into the object file
7094 symbol table prefixed by "prefix".
7095 Default prefix is ":temp:".
7100 /* indirect=<tgt> Assume unannotated indirect branches behavior
7101 according to <tgt> --
7102 exit: branch out from the current context (default)
7103 labels: all labels in context may be branch targets
7105 if (strncmp (arg
, "indirect=", 9) != 0)
7110 /* -X conflicts with an ignored option, use -x instead */
7112 if (!arg
|| strcmp (arg
, "explicit") == 0)
7114 /* set default mode to explicit */
7115 md
.default_explicit_mode
= 1;
7118 else if (strcmp (arg
, "auto") == 0)
7120 md
.default_explicit_mode
= 0;
7122 else if (strcmp (arg
, "none") == 0)
7126 else if (strcmp (arg
, "debug") == 0)
7130 else if (strcmp (arg
, "debugx") == 0)
7132 md
.default_explicit_mode
= 1;
7135 else if (strcmp (arg
, "debugn") == 0)
7142 as_bad (_("Unrecognized option '-x%s'"), arg
);
7147 /* nops Print nops statistics. */
7150 /* GNU specific switches for gcc. */
7151 case OPTION_MCONSTANT_GP
:
7152 md
.flags
|= EF_IA_64_CONS_GP
;
7155 case OPTION_MAUTO_PIC
:
7156 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7167 md_show_usage (FILE *stream
)
7171 --mconstant-gp mark output file as using the constant-GP model\n\
7172 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7173 --mauto-pic mark output file as using the constant-GP model\n\
7174 without function descriptors (sets ELF header flag\n\
7175 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7176 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7177 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7178 -mtune=[itanium1|itanium2]\n\
7179 tune for a specific CPU (default -mtune=itanium2)\n\
7180 -munwind-check=[warning|error]\n\
7181 unwind directive check (default -munwind-check=warning)\n\
7182 -mhint.b=[ok|warning|error]\n\
7183 hint.b check (default -mhint.b=error)\n\
7184 -x | -xexplicit turn on dependency violation checking\n"), stream
);
7185 /* Note for translators: "automagically" can be translated as "automatically" here. */
7187 -xauto automagically remove dependency violations (default)\n\
7188 -xnone turn off dependency violation checking\n\
7189 -xdebug debug dependency violation checker\n\
7190 -xdebugn debug dependency violation checker but turn off\n\
7191 dependency violation checking\n\
7192 -xdebugx debug dependency violation checker and turn on\n\
7193 dependency violation checking\n"),
7198 ia64_after_parse_args (void)
7200 if (debug_type
== DEBUG_STABS
)
7201 as_fatal (_("--gstabs is not supported for ia64"));
7204 /* Return true if TYPE fits in TEMPL at SLOT. */
7207 match (int templ
, int type
, int slot
)
7209 enum ia64_unit unit
;
7212 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7215 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7217 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7219 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7220 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7221 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7222 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7223 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7224 default: result
= 0; break;
7229 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7230 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7231 type M or I would fit in TEMPL at SLOT. */
7234 extra_goodness (int templ
, int slot
)
7239 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7241 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7247 if (match (templ
, IA64_TYPE_M
, slot
)
7248 || match (templ
, IA64_TYPE_I
, slot
))
7249 /* Favor M- and I-unit NOPs. We definitely want to avoid
7250 F-unit and B-unit may cause split-issue or less-than-optimal
7251 branch-prediction. */
7262 /* This function is called once, at assembler startup time. It sets
7263 up all the tables, etc. that the MD part of the assembler will need
7264 that can be determined before arguments are parsed. */
7268 int i
, j
, k
, t
, goodness
, best
, ok
;
7273 md
.explicit_mode
= md
.default_explicit_mode
;
7275 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7277 /* Make sure function pointers get initialized. */
7278 target_big_endian
= -1;
7279 dot_byteorder (default_big_endian
);
7281 alias_hash
= hash_new ();
7282 alias_name_hash
= hash_new ();
7283 secalias_hash
= hash_new ();
7284 secalias_name_hash
= hash_new ();
7286 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7287 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7288 &zero_address_frag
);
7290 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7291 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7292 &zero_address_frag
);
7294 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7295 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7296 &zero_address_frag
);
7298 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7299 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7300 &zero_address_frag
);
7302 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7303 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7304 &zero_address_frag
);
7306 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7307 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7308 &zero_address_frag
);
7310 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7311 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7312 &zero_address_frag
);
7314 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7315 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7316 &zero_address_frag
);
7318 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7319 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7320 &zero_address_frag
);
7322 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7323 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7324 &zero_address_frag
);
7326 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7327 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7328 &zero_address_frag
);
7330 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7331 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7332 &zero_address_frag
);
7334 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7335 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7336 &zero_address_frag
);
7338 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7339 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7340 &zero_address_frag
);
7342 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7343 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7344 &zero_address_frag
);
7346 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7347 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7348 &zero_address_frag
);
7350 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7351 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7352 &zero_address_frag
);
7355 pseudo_func
[FUNC_SLOTCOUNT_RELOC
].u
.sym
=
7356 symbol_new (".<slotcount>", undefined_section
, FUNC_SLOTCOUNT_RELOC
,
7357 &zero_address_frag
);
7360 if (md
.tune
!= itanium1
)
7362 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7364 le_nop_stop
[0] = 0x9;
7367 /* Compute the table of best templates. We compute goodness as a
7368 base 4 value, in which each match counts for 3. Match-failures
7369 result in NOPs and we use extra_goodness() to pick the execution
7370 units that are best suited for issuing the NOP. */
7371 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7372 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7373 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7376 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7379 if (match (t
, i
, 0))
7381 if (match (t
, j
, 1))
7383 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7384 goodness
= 3 + 3 + 3;
7386 goodness
= 3 + 3 + extra_goodness (t
, 2);
7388 else if (match (t
, j
, 2))
7389 goodness
= 3 + 3 + extra_goodness (t
, 1);
7393 goodness
+= extra_goodness (t
, 1);
7394 goodness
+= extra_goodness (t
, 2);
7397 else if (match (t
, i
, 1))
7399 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7402 goodness
= 3 + extra_goodness (t
, 2);
7404 else if (match (t
, i
, 2))
7405 goodness
= 3 + extra_goodness (t
, 1);
7407 if (goodness
> best
)
7410 best_template
[i
][j
][k
] = t
;
7415 #ifdef DEBUG_TEMPLATES
7416 /* For debugging changes to the best_template calculations. We don't care
7417 about combinations with invalid instructions, so start the loops at 1. */
7418 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7419 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7420 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7422 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7424 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7426 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7430 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7431 md
.slot
[i
].user_template
= -1;
7433 md
.pseudo_hash
= hash_new ();
7434 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7436 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7437 (void *) (pseudo_opcode
+ i
));
7439 as_fatal (_("ia64.md_begin: can't hash `%s': %s"),
7440 pseudo_opcode
[i
].name
, err
);
7443 md
.reg_hash
= hash_new ();
7444 md
.dynreg_hash
= hash_new ();
7445 md
.const_hash
= hash_new ();
7446 md
.entry_hash
= hash_new ();
7448 /* general registers: */
7449 declare_register_set ("r", 128, REG_GR
);
7450 declare_register ("gp", REG_GR
+ 1);
7451 declare_register ("sp", REG_GR
+ 12);
7452 declare_register ("tp", REG_GR
+ 13);
7453 declare_register_set ("ret", 4, REG_GR
+ 8);
7455 /* floating point registers: */
7456 declare_register_set ("f", 128, REG_FR
);
7457 declare_register_set ("farg", 8, REG_FR
+ 8);
7458 declare_register_set ("fret", 8, REG_FR
+ 8);
7460 /* branch registers: */
7461 declare_register_set ("b", 8, REG_BR
);
7462 declare_register ("rp", REG_BR
+ 0);
7464 /* predicate registers: */
7465 declare_register_set ("p", 64, REG_P
);
7466 declare_register ("pr", REG_PR
);
7467 declare_register ("pr.rot", REG_PR_ROT
);
7469 /* application registers: */
7470 declare_register_set ("ar", 128, REG_AR
);
7471 for (i
= 0; i
< NELEMS (ar
); ++i
)
7472 declare_register (ar
[i
].name
, REG_AR
+ ar
[i
].regnum
);
7474 /* control registers: */
7475 declare_register_set ("cr", 128, REG_CR
);
7476 for (i
= 0; i
< NELEMS (cr
); ++i
)
7477 declare_register (cr
[i
].name
, REG_CR
+ cr
[i
].regnum
);
7479 /* dahr registers: */
7480 declare_register_set ("dahr", 8, REG_DAHR
);
7482 declare_register ("ip", REG_IP
);
7483 declare_register ("cfm", REG_CFM
);
7484 declare_register ("psr", REG_PSR
);
7485 declare_register ("psr.l", REG_PSR_L
);
7486 declare_register ("psr.um", REG_PSR_UM
);
7488 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7490 unsigned int regnum
= indirect_reg
[i
].regnum
;
7492 md
.indregsym
[regnum
- IND_CPUID
] = declare_register (indirect_reg
[i
].name
, regnum
);
7495 /* pseudo-registers used to specify unwind info: */
7496 declare_register ("psp", REG_PSP
);
7498 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7500 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7501 (void *) (const_bits
+ i
));
7503 as_fatal (_("Inserting \"%s\" into constant hash table failed: %s"),
7507 /* Set the architecture and machine depending on defaults and command line
7509 if (md
.flags
& EF_IA_64_ABI64
)
7510 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7512 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7515 as_warn (_("Could not set architecture and machine"));
7517 /* Set the pointer size and pointer shift size depending on md.flags */
7519 if (md
.flags
& EF_IA_64_ABI64
)
7521 md
.pointer_size
= 8; /* pointers are 8 bytes */
7522 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7526 md
.pointer_size
= 4; /* pointers are 4 bytes */
7527 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7530 md
.mem_offset
.hint
= 0;
7533 md
.entry_labels
= NULL
;
7536 /* Set the default options in md. Cannot do this in md_begin because
7537 that is called after md_parse_option which is where we set the
7538 options in md based on command line options. */
7541 ia64_init (int argc ATTRIBUTE_UNUSED
, char **argv ATTRIBUTE_UNUSED
)
7543 md
.flags
= MD_FLAGS_DEFAULT
;
7545 /* Don't turn on dependency checking for VMS, doesn't work. */
7548 /* FIXME: We should change it to unwind_check_error someday. */
7549 md
.unwind_check
= unwind_check_warning
;
7550 md
.hint_b
= hint_b_error
;
7554 /* Return a string for the target object file format. */
7557 ia64_target_format (void)
7559 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7561 if (md
.flags
& EF_IA_64_BE
)
7563 if (md
.flags
& EF_IA_64_ABI64
)
7564 #if defined(TE_AIX50)
7565 return "elf64-ia64-aix-big";
7566 #elif defined(TE_HPUX)
7567 return "elf64-ia64-hpux-big";
7569 return "elf64-ia64-big";
7572 #if defined(TE_AIX50)
7573 return "elf32-ia64-aix-big";
7574 #elif defined(TE_HPUX)
7575 return "elf32-ia64-hpux-big";
7577 return "elf32-ia64-big";
7582 if (md
.flags
& EF_IA_64_ABI64
)
7583 #if defined (TE_AIX50)
7584 return "elf64-ia64-aix-little";
7585 #elif defined (TE_VMS)
7587 md
.flags
|= EF_IA_64_ARCHVER_1
;
7588 return "elf64-ia64-vms";
7591 return "elf64-ia64-little";
7595 return "elf32-ia64-aix-little";
7597 return "elf32-ia64-little";
7602 return "unknown-format";
7606 ia64_end_of_source (void)
7608 /* terminate insn group upon reaching end of file: */
7609 insn_group_break (1, 0, 0);
7611 /* emits slots we haven't written yet: */
7612 ia64_flush_insns ();
7614 bfd_set_private_flags (stdoutput
, md
.flags
);
7616 md
.mem_offset
.hint
= 0;
7620 ia64_start_line (void)
7625 /* Make sure we don't reference input_line_pointer[-1] when that's
7631 if (md
.qp
.X_op
== O_register
)
7632 as_bad (_("qualifying predicate not followed by instruction"));
7633 md
.qp
.X_op
= O_absent
;
7635 if (ignore_input ())
7638 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7640 if (md
.detect_dv
&& !md
.explicit_mode
)
7647 as_warn (_("Explicit stops are ignored in auto mode"));
7651 insn_group_break (1, 0, 0);
7653 else if (input_line_pointer
[-1] == '{')
7655 if (md
.manual_bundling
)
7656 as_warn (_("Found '{' when manual bundling is already turned on"));
7658 CURR_SLOT
.manual_bundling_on
= 1;
7659 md
.manual_bundling
= 1;
7661 /* Bundling is only acceptable in explicit mode
7662 or when in default automatic mode. */
7663 if (md
.detect_dv
&& !md
.explicit_mode
)
7665 if (!md
.mode_explicitly_set
7666 && !md
.default_explicit_mode
)
7669 as_warn (_("Found '{' after explicit switch to automatic mode"));
7672 else if (input_line_pointer
[-1] == '}')
7674 if (!md
.manual_bundling
)
7675 as_warn (_("Found '}' when manual bundling is off"));
7677 PREV_SLOT
.manual_bundling_off
= 1;
7678 md
.manual_bundling
= 0;
7680 /* switch back to automatic mode, if applicable */
7683 && !md
.mode_explicitly_set
7684 && !md
.default_explicit_mode
)
7689 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7691 static int defining_tag
= 0;
7694 ia64_unrecognized_line (int ch
)
7699 expression_and_evaluate (&md
.qp
);
7700 if (*input_line_pointer
++ != ')')
7702 as_bad (_("Expected ')'"));
7705 if (md
.qp
.X_op
!= O_register
)
7707 as_bad (_("Qualifying predicate expected"));
7710 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7712 as_bad (_("Predicate register expected"));
7724 if (md
.qp
.X_op
== O_register
)
7726 as_bad (_("Tag must come before qualifying predicate."));
7730 /* This implements just enough of read_a_source_file in read.c to
7731 recognize labels. */
7732 if (is_name_beginner (*input_line_pointer
))
7734 c
= get_symbol_name (&s
);
7736 else if (LOCAL_LABELS_FB
7737 && ISDIGIT (*input_line_pointer
))
7740 while (ISDIGIT (*input_line_pointer
))
7741 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7742 fb_label_instance_inc (temp
);
7743 s
= fb_label_name (temp
, 0);
7744 c
= *input_line_pointer
;
7753 /* Put ':' back for error messages' sake. */
7754 *input_line_pointer
++ = ':';
7755 as_bad (_("Expected ':'"));
7762 /* Put ':' back for error messages' sake. */
7763 *input_line_pointer
++ = ':';
7764 if (*input_line_pointer
++ != ']')
7766 as_bad (_("Expected ']'"));
7771 as_bad (_("Tag name expected"));
7781 /* Not a valid line. */
7786 ia64_frob_label (struct symbol
*sym
)
7788 struct label_fix
*fix
;
7790 /* Tags need special handling since they are not bundle breaks like
7794 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7796 fix
->next
= CURR_SLOT
.tag_fixups
;
7797 fix
->dw2_mark_labels
= FALSE
;
7798 CURR_SLOT
.tag_fixups
= fix
;
7803 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7805 md
.last_text_seg
= now_seg
;
7806 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7808 fix
->next
= CURR_SLOT
.label_fixups
;
7809 fix
->dw2_mark_labels
= dwarf2_loc_mark_labels
;
7810 CURR_SLOT
.label_fixups
= fix
;
7812 /* Keep track of how many code entry points we've seen. */
7813 if (md
.path
== md
.maxpaths
)
7816 md
.entry_labels
= (const char **)
7817 xrealloc ((void *) md
.entry_labels
,
7818 md
.maxpaths
* sizeof (char *));
7820 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7825 /* The HP-UX linker will give unresolved symbol errors for symbols
7826 that are declared but unused. This routine removes declared,
7827 unused symbols from an object. */
7829 ia64_frob_symbol (struct symbol
*sym
)
7831 if ((S_GET_SEGMENT (sym
) == bfd_und_section_ptr
&& ! symbol_used_p (sym
) &&
7832 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7833 || (S_GET_SEGMENT (sym
) == bfd_abs_section_ptr
7834 && ! S_IS_EXTERNAL (sym
)))
7841 ia64_flush_pending_output (void)
7843 if (!md
.keep_pending_output
7844 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7846 /* ??? This causes many unnecessary stop bits to be emitted.
7847 Unfortunately, it isn't clear if it is safe to remove this. */
7848 insn_group_break (1, 0, 0);
7849 ia64_flush_insns ();
7853 /* Do ia64-specific expression optimization. All that's done here is
7854 to transform index expressions that are either due to the indexing
7855 of rotating registers or due to the indexing of indirect register
7858 ia64_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
7862 resolve_expression (l
);
7863 if (l
->X_op
== O_register
)
7865 unsigned num_regs
= l
->X_add_number
>> 16;
7867 resolve_expression (r
);
7870 /* Left side is a .rotX-allocated register. */
7871 if (r
->X_op
!= O_constant
)
7873 as_bad (_("Rotating register index must be a non-negative constant"));
7874 r
->X_add_number
= 0;
7876 else if ((valueT
) r
->X_add_number
>= num_regs
)
7878 as_bad (_("Index out of range 0..%u"), num_regs
- 1);
7879 r
->X_add_number
= 0;
7881 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7884 else if (l
->X_add_number
>= IND_CPUID
&& l
->X_add_number
<= IND_RR
)
7886 if (r
->X_op
!= O_register
7887 || r
->X_add_number
< REG_GR
7888 || r
->X_add_number
> REG_GR
+ 127)
7890 as_bad (_("Indirect register index must be a general register"));
7891 r
->X_add_number
= REG_GR
;
7894 l
->X_op_symbol
= md
.indregsym
[l
->X_add_number
- IND_CPUID
];
7895 l
->X_add_number
= r
->X_add_number
;
7899 as_bad (_("Index can only be applied to rotating or indirect registers"));
7900 /* Fall back to some register use of which has as little as possible
7901 side effects, to minimize subsequent error messages. */
7902 l
->X_op
= O_register
;
7903 l
->X_add_number
= REG_GR
+ 3;
7908 ia64_parse_name (char *name
, expressionS
*e
, char *nextcharP
)
7910 struct const_desc
*cdesc
;
7911 struct dynreg
*dr
= 0;
7918 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7920 /* Find what relocation pseudo-function we're dealing with. */
7921 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7922 if (pseudo_func
[idx
].name
7923 && pseudo_func
[idx
].name
[0] == name
[1]
7924 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7926 pseudo_type
= pseudo_func
[idx
].type
;
7929 switch (pseudo_type
)
7931 case PSEUDO_FUNC_RELOC
:
7932 end
= input_line_pointer
;
7933 if (*nextcharP
!= '(')
7935 as_bad (_("Expected '('"));
7939 ++input_line_pointer
;
7941 if (*input_line_pointer
!= ')')
7943 as_bad (_("Missing ')'"));
7947 ++input_line_pointer
;
7949 if (idx
== FUNC_SLOTCOUNT_RELOC
)
7951 /* @slotcount can accept any expression. Canonicalize. */
7952 e
->X_add_symbol
= make_expr_symbol (e
);
7954 e
->X_add_number
= 0;
7957 if (e
->X_op
!= O_symbol
)
7959 if (e
->X_op
!= O_pseudo_fixup
)
7961 as_bad (_("Not a symbolic expression"));
7964 if (idx
!= FUNC_LT_RELATIVE
)
7966 as_bad (_("Illegal combination of relocation functions"));
7969 switch (S_GET_VALUE (e
->X_op_symbol
))
7971 case FUNC_FPTR_RELATIVE
:
7972 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7973 case FUNC_DTP_MODULE
:
7974 idx
= FUNC_LT_DTP_MODULE
; break;
7975 case FUNC_DTP_RELATIVE
:
7976 idx
= FUNC_LT_DTP_RELATIVE
; break;
7977 case FUNC_TP_RELATIVE
:
7978 idx
= FUNC_LT_TP_RELATIVE
; break;
7980 as_bad (_("Illegal combination of relocation functions"));
7984 /* Make sure gas doesn't get rid of local symbols that are used
7986 e
->X_op
= O_pseudo_fixup
;
7987 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7989 *nextcharP
= *input_line_pointer
;
7992 case PSEUDO_FUNC_CONST
:
7993 e
->X_op
= O_constant
;
7994 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7997 case PSEUDO_FUNC_REG
:
7998 e
->X_op
= O_register
;
7999 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
8008 /* first see if NAME is a known register name: */
8009 sym
= hash_find (md
.reg_hash
, name
);
8012 e
->X_op
= O_register
;
8013 e
->X_add_number
= S_GET_VALUE (sym
);
8017 cdesc
= hash_find (md
.const_hash
, name
);
8020 e
->X_op
= O_constant
;
8021 e
->X_add_number
= cdesc
->value
;
8025 /* check for inN, locN, or outN: */
8030 if (name
[1] == 'n' && ISDIGIT (name
[2]))
8038 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
8046 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
8057 /* Ignore register numbers with leading zeroes, except zero itself. */
8058 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
8060 unsigned long regnum
;
8062 /* The name is inN, locN, or outN; parse the register number. */
8063 regnum
= strtoul (name
+ idx
, &end
, 10);
8064 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
8066 if (regnum
>= dr
->num_regs
)
8069 as_bad (_("No current frame"));
8071 as_bad (_("Register number out of range 0..%u"),
8075 e
->X_op
= O_register
;
8076 e
->X_add_number
= dr
->base
+ regnum
;
8081 end
= alloca (strlen (name
) + 1);
8083 name
= ia64_canonicalize_symbol_name (end
);
8084 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8086 /* We've got ourselves the name of a rotating register set.
8087 Store the base register number in the low 16 bits of
8088 X_add_number and the size of the register set in the top 16
8090 e
->X_op
= O_register
;
8091 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8097 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8100 ia64_canonicalize_symbol_name (char *name
)
8102 size_t len
= strlen (name
), full
= len
;
8104 while (len
> 0 && name
[len
- 1] == '#')
8109 as_bad (_("Standalone `#' is illegal"));
8111 else if (len
< full
- 1)
8112 as_warn (_("Redundant `#' suffix operators"));
8117 /* Return true if idesc is a conditional branch instruction. This excludes
8118 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8119 because they always read/write resources regardless of the value of the
8120 qualifying predicate. br.ia must always use p0, and hence is always
8121 taken. Thus this function returns true for branches which can fall
8122 through, and which use no resources if they do fall through. */
8125 is_conditional_branch (struct ia64_opcode
*idesc
)
8127 /* br is a conditional branch. Everything that starts with br. except
8128 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8129 Everything that starts with brl is a conditional branch. */
8130 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8131 && (idesc
->name
[2] == '\0'
8132 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8133 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8134 || idesc
->name
[2] == 'l'
8135 /* br.cond, br.call, br.clr */
8136 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8137 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8138 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8141 /* Return whether the given opcode is a taken branch. If there's any doubt,
8145 is_taken_branch (struct ia64_opcode
*idesc
)
8147 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8148 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8151 /* Return whether the given opcode is an interruption or rfi. If there's any
8152 doubt, returns zero. */
8155 is_interruption_or_rfi (struct ia64_opcode
*idesc
)
8157 if (strcmp (idesc
->name
, "rfi") == 0)
8162 /* Returns the index of the given dependency in the opcode's list of chks, or
8163 -1 if there is no dependency. */
8166 depends_on (int depind
, struct ia64_opcode
*idesc
)
8169 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8170 for (i
= 0; i
< dep
->nchks
; i
++)
8172 if (depind
== DEP (dep
->chks
[i
]))
8178 /* Determine a set of specific resources used for a particular resource
8179 class. Returns the number of specific resources identified For those
8180 cases which are not determinable statically, the resource returned is
8183 Meanings of value in 'NOTE':
8184 1) only read/write when the register number is explicitly encoded in the
8186 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8187 accesses CFM when qualifying predicate is in the rotating region.
8188 3) general register value is used to specify an indirect register; not
8189 determinable statically.
8190 4) only read the given resource when bits 7:0 of the indirect index
8191 register value does not match the register number of the resource; not
8192 determinable statically.
8193 5) all rules are implementation specific.
8194 6) only when both the index specified by the reader and the index specified
8195 by the writer have the same value in bits 63:61; not determinable
8197 7) only access the specified resource when the corresponding mask bit is
8199 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8200 only read when these insns reference FR2-31
8201 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8202 written when these insns write FR32-127
8203 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8205 11) The target predicates are written independently of PR[qp], but source
8206 registers are only read if PR[qp] is true. Since the state of PR[qp]
8207 cannot statically be determined, all source registers are marked used.
8208 12) This insn only reads the specified predicate register when that
8209 register is the PR[qp].
8210 13) This reference to ld-c only applies to the GR whose value is loaded
8211 with data returned from memory, not the post-incremented address register.
8212 14) The RSE resource includes the implementation-specific RSE internal
8213 state resources. At least one (and possibly more) of these resources are
8214 read by each instruction listed in IC:rse-readers. At least one (and
8215 possibly more) of these resources are written by each insn listed in
8217 15+16) Represents reserved instructions, which the assembler does not
8219 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and
8220 mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up.
8222 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8223 this code; there are no dependency violations based on memory access.
8226 #define MAX_SPECS 256
8231 specify_resource (const struct ia64_dependency
*dep
,
8232 struct ia64_opcode
*idesc
,
8233 /* is this a DV chk or a DV reg? */
8235 /* returned specific resources */
8236 struct rsrc specs
[MAX_SPECS
],
8237 /* resource note for this insn's usage */
8239 /* which execution path to examine */
8247 if (dep
->mode
== IA64_DV_WAW
8248 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8249 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8252 /* template for any resources we identify */
8253 tmpl
.dependency
= dep
;
8255 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8256 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8257 tmpl
.link_to_qp_branch
= 1;
8258 tmpl
.mem_offset
.hint
= 0;
8259 tmpl
.mem_offset
.offset
= 0;
8260 tmpl
.mem_offset
.base
= 0;
8263 tmpl
.cmp_type
= CMP_NONE
;
8270 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8271 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8272 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8274 /* we don't need to track these */
8275 if (dep
->semantics
== IA64_DVS_NONE
)
8278 switch (dep
->specifier
)
8283 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8285 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8286 if (regno
>= 0 && regno
<= 7)
8288 specs
[count
] = tmpl
;
8289 specs
[count
++].index
= regno
;
8295 for (i
= 0; i
< 8; i
++)
8297 specs
[count
] = tmpl
;
8298 specs
[count
++].index
= i
;
8307 case IA64_RS_AR_UNAT
:
8308 /* This is a mov =AR or mov AR= instruction. */
8309 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8311 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8312 if (regno
== AR_UNAT
)
8314 specs
[count
++] = tmpl
;
8319 /* This is a spill/fill, or other instruction that modifies the
8322 /* Unless we can determine the specific bits used, mark the whole
8323 thing; bits 8:3 of the memory address indicate the bit used in
8324 UNAT. The .mem.offset hint may be used to eliminate a small
8325 subset of conflicts. */
8326 specs
[count
] = tmpl
;
8327 if (md
.mem_offset
.hint
)
8330 fprintf (stderr
, " Using hint for spill/fill\n");
8331 /* The index isn't actually used, just set it to something
8332 approximating the bit index. */
8333 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8334 specs
[count
].mem_offset
.hint
= 1;
8335 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8336 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8340 specs
[count
++].specific
= 0;
8348 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8350 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8351 if ((regno
>= 8 && regno
<= 15)
8352 || (regno
>= 20 && regno
<= 23)
8353 || (regno
>= 31 && regno
<= 39)
8354 || (regno
>= 41 && regno
<= 47)
8355 || (regno
>= 67 && regno
<= 111))
8357 specs
[count
] = tmpl
;
8358 specs
[count
++].index
= regno
;
8371 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8373 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8374 if ((regno
>= 48 && regno
<= 63)
8375 || (regno
>= 112 && regno
<= 127))
8377 specs
[count
] = tmpl
;
8378 specs
[count
++].index
= regno
;
8384 for (i
= 48; i
< 64; i
++)
8386 specs
[count
] = tmpl
;
8387 specs
[count
++].index
= i
;
8389 for (i
= 112; i
< 128; i
++)
8391 specs
[count
] = tmpl
;
8392 specs
[count
++].index
= i
;
8410 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8411 if (idesc
->operands
[i
] == IA64_OPND_B1
8412 || idesc
->operands
[i
] == IA64_OPND_B2
)
8414 specs
[count
] = tmpl
;
8415 specs
[count
++].index
=
8416 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8421 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8422 if (idesc
->operands
[i
] == IA64_OPND_B1
8423 || idesc
->operands
[i
] == IA64_OPND_B2
)
8425 specs
[count
] = tmpl
;
8426 specs
[count
++].index
=
8427 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8433 case IA64_RS_CPUID
: /* four or more registers */
8436 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8438 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8439 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8442 specs
[count
] = tmpl
;
8443 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8447 specs
[count
] = tmpl
;
8448 specs
[count
++].specific
= 0;
8458 case IA64_RS_DBR
: /* four or more registers */
8461 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8463 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8464 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8467 specs
[count
] = tmpl
;
8468 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8472 specs
[count
] = tmpl
;
8473 specs
[count
++].specific
= 0;
8477 else if (note
== 0 && !rsrc_write
)
8479 specs
[count
] = tmpl
;
8480 specs
[count
++].specific
= 0;
8488 case IA64_RS_IBR
: /* four or more registers */
8491 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8493 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8494 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8497 specs
[count
] = tmpl
;
8498 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8502 specs
[count
] = tmpl
;
8503 specs
[count
++].specific
= 0;
8516 /* These are implementation specific. Force all references to
8517 conflict with all other references. */
8518 specs
[count
] = tmpl
;
8519 specs
[count
++].specific
= 0;
8527 case IA64_RS_PKR
: /* 16 or more registers */
8528 if (note
== 3 || note
== 4)
8530 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8532 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8533 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8538 specs
[count
] = tmpl
;
8539 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8542 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8544 /* Uses all registers *except* the one in R3. */
8545 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8547 specs
[count
] = tmpl
;
8548 specs
[count
++].index
= i
;
8554 specs
[count
] = tmpl
;
8555 specs
[count
++].specific
= 0;
8562 specs
[count
] = tmpl
;
8563 specs
[count
++].specific
= 0;
8567 case IA64_RS_PMC
: /* four or more registers */
8570 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8571 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8574 int reg_index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8576 int regno
= CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_GR
;
8577 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8580 specs
[count
] = tmpl
;
8581 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8585 specs
[count
] = tmpl
;
8586 specs
[count
++].specific
= 0;
8596 case IA64_RS_PMD
: /* four or more registers */
8599 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8601 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8602 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8605 specs
[count
] = tmpl
;
8606 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8610 specs
[count
] = tmpl
;
8611 specs
[count
++].specific
= 0;
8621 case IA64_RS_RR
: /* eight registers */
8624 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8626 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8627 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8630 specs
[count
] = tmpl
;
8631 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8635 specs
[count
] = tmpl
;
8636 specs
[count
++].specific
= 0;
8640 else if (note
== 0 && !rsrc_write
)
8642 specs
[count
] = tmpl
;
8643 specs
[count
++].specific
= 0;
8651 case IA64_RS_CR_IRR
:
8654 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8655 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8657 && idesc
->operands
[1] == IA64_OPND_CR3
8660 for (i
= 0; i
< 4; i
++)
8662 specs
[count
] = tmpl
;
8663 specs
[count
++].index
= CR_IRR0
+ i
;
8669 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8670 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8672 && regno
<= CR_IRR3
)
8674 specs
[count
] = tmpl
;
8675 specs
[count
++].index
= regno
;
8684 case IA64_RS_CR_IIB
:
8691 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8692 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8693 && (regno
== CR_IIB0
|| regno
== CR_IIB1
))
8695 specs
[count
] = tmpl
;
8696 specs
[count
++].index
= regno
;
8701 case IA64_RS_CR_LRR
:
8708 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8709 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8710 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8712 specs
[count
] = tmpl
;
8713 specs
[count
++].index
= regno
;
8721 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8723 specs
[count
] = tmpl
;
8724 specs
[count
++].index
=
8725 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8737 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DAHR3
)
8739 specs
[count
] = tmpl
;
8740 specs
[count
++].index
=
8741 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_DAHR
;
8756 else if (rsrc_write
)
8758 if (dep
->specifier
== IA64_RS_FRb
8759 && idesc
->operands
[0] == IA64_OPND_F1
)
8761 specs
[count
] = tmpl
;
8762 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8767 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8769 if (idesc
->operands
[i
] == IA64_OPND_F2
8770 || idesc
->operands
[i
] == IA64_OPND_F3
8771 || idesc
->operands
[i
] == IA64_OPND_F4
)
8773 specs
[count
] = tmpl
;
8774 specs
[count
++].index
=
8775 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8784 /* This reference applies only to the GR whose value is loaded with
8785 data returned from memory. */
8786 specs
[count
] = tmpl
;
8787 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8793 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8794 if (idesc
->operands
[i
] == IA64_OPND_R1
8795 || idesc
->operands
[i
] == IA64_OPND_R2
8796 || idesc
->operands
[i
] == IA64_OPND_R3
)
8798 specs
[count
] = tmpl
;
8799 specs
[count
++].index
=
8800 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8802 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8803 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8804 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8806 specs
[count
] = tmpl
;
8807 specs
[count
++].index
=
8808 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8813 /* Look for anything that reads a GR. */
8814 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8816 if (idesc
->operands
[i
] == IA64_OPND_MR3
8817 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8818 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8819 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8820 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8821 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8822 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8823 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8824 || idesc
->operands
[i
] == IA64_OPND_DAHR_R3
8825 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8826 || ((i
>= idesc
->num_outputs
)
8827 && (idesc
->operands
[i
] == IA64_OPND_R1
8828 || idesc
->operands
[i
] == IA64_OPND_R2
8829 || idesc
->operands
[i
] == IA64_OPND_R3
8830 /* addl source register. */
8831 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8833 specs
[count
] = tmpl
;
8834 specs
[count
++].index
=
8835 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8846 /* This is the same as IA64_RS_PRr, except that the register range is
8847 from 1 - 15, and there are no rotating register reads/writes here. */
8851 for (i
= 1; i
< 16; i
++)
8853 specs
[count
] = tmpl
;
8854 specs
[count
++].index
= i
;
8860 /* Mark only those registers indicated by the mask. */
8863 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8864 for (i
= 1; i
< 16; i
++)
8865 if (mask
& ((valueT
) 1 << i
))
8867 specs
[count
] = tmpl
;
8868 specs
[count
++].index
= i
;
8876 else if (note
== 11) /* note 11 implies note 1 as well */
8880 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8882 if (idesc
->operands
[i
] == IA64_OPND_P1
8883 || idesc
->operands
[i
] == IA64_OPND_P2
)
8885 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8886 if (regno
>= 1 && regno
< 16)
8888 specs
[count
] = tmpl
;
8889 specs
[count
++].index
= regno
;
8899 else if (note
== 12)
8901 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8903 specs
[count
] = tmpl
;
8904 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8911 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8912 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8913 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8914 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8916 if ((idesc
->operands
[0] == IA64_OPND_P1
8917 || idesc
->operands
[0] == IA64_OPND_P2
)
8918 && p1
>= 1 && p1
< 16)
8920 specs
[count
] = tmpl
;
8921 specs
[count
].cmp_type
=
8922 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8923 specs
[count
++].index
= p1
;
8925 if ((idesc
->operands
[1] == IA64_OPND_P1
8926 || idesc
->operands
[1] == IA64_OPND_P2
)
8927 && p2
>= 1 && p2
< 16)
8929 specs
[count
] = tmpl
;
8930 specs
[count
].cmp_type
=
8931 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8932 specs
[count
++].index
= p2
;
8937 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8939 specs
[count
] = tmpl
;
8940 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8942 if (idesc
->operands
[1] == IA64_OPND_PR
)
8944 for (i
= 1; i
< 16; i
++)
8946 specs
[count
] = tmpl
;
8947 specs
[count
++].index
= i
;
8958 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8959 simplified cases of this. */
8963 for (i
= 16; i
< 63; i
++)
8965 specs
[count
] = tmpl
;
8966 specs
[count
++].index
= i
;
8972 /* Mark only those registers indicated by the mask. */
8974 && idesc
->operands
[0] == IA64_OPND_PR
)
8976 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8977 if (mask
& ((valueT
) 1 << 16))
8978 for (i
= 16; i
< 63; i
++)
8980 specs
[count
] = tmpl
;
8981 specs
[count
++].index
= i
;
8985 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8987 for (i
= 16; i
< 63; i
++)
8989 specs
[count
] = tmpl
;
8990 specs
[count
++].index
= i
;
8998 else if (note
== 11) /* note 11 implies note 1 as well */
9002 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9004 if (idesc
->operands
[i
] == IA64_OPND_P1
9005 || idesc
->operands
[i
] == IA64_OPND_P2
)
9007 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9008 if (regno
>= 16 && regno
< 63)
9010 specs
[count
] = tmpl
;
9011 specs
[count
++].index
= regno
;
9021 else if (note
== 12)
9023 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9025 specs
[count
] = tmpl
;
9026 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9033 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9034 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9035 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9036 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9038 if ((idesc
->operands
[0] == IA64_OPND_P1
9039 || idesc
->operands
[0] == IA64_OPND_P2
)
9040 && p1
>= 16 && p1
< 63)
9042 specs
[count
] = tmpl
;
9043 specs
[count
].cmp_type
=
9044 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9045 specs
[count
++].index
= p1
;
9047 if ((idesc
->operands
[1] == IA64_OPND_P1
9048 || idesc
->operands
[1] == IA64_OPND_P2
)
9049 && p2
>= 16 && p2
< 63)
9051 specs
[count
] = tmpl
;
9052 specs
[count
].cmp_type
=
9053 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9054 specs
[count
++].index
= p2
;
9059 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9061 specs
[count
] = tmpl
;
9062 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9064 if (idesc
->operands
[1] == IA64_OPND_PR
)
9066 for (i
= 16; i
< 63; i
++)
9068 specs
[count
] = tmpl
;
9069 specs
[count
++].index
= i
;
9081 /* Verify that the instruction is using the PSR bit indicated in
9085 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
9087 if (dep
->regindex
< 6)
9089 specs
[count
++] = tmpl
;
9092 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
9094 if (dep
->regindex
< 32
9095 || dep
->regindex
== 35
9096 || dep
->regindex
== 36
9097 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
9099 specs
[count
++] = tmpl
;
9102 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
9104 if (dep
->regindex
< 32
9105 || dep
->regindex
== 35
9106 || dep
->regindex
== 36
9107 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
9109 specs
[count
++] = tmpl
;
9114 /* Several PSR bits have very specific dependencies. */
9115 switch (dep
->regindex
)
9118 specs
[count
++] = tmpl
;
9123 specs
[count
++] = tmpl
;
9127 /* Only certain CR accesses use PSR.ic */
9128 if (idesc
->operands
[0] == IA64_OPND_CR3
9129 || idesc
->operands
[1] == IA64_OPND_CR3
)
9132 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9135 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_CR
;
9152 specs
[count
++] = tmpl
;
9161 specs
[count
++] = tmpl
;
9165 /* Only some AR accesses use cpl */
9166 if (idesc
->operands
[0] == IA64_OPND_AR3
9167 || idesc
->operands
[1] == IA64_OPND_AR3
)
9170 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9173 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_AR
;
9180 && regno
<= AR_K7
))))
9182 specs
[count
++] = tmpl
;
9187 specs
[count
++] = tmpl
;
9197 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9199 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9205 if (mask
& ((valueT
) 1 << dep
->regindex
))
9207 specs
[count
++] = tmpl
;
9212 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9213 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9214 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9215 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9217 if (idesc
->operands
[i
] == IA64_OPND_F1
9218 || idesc
->operands
[i
] == IA64_OPND_F2
9219 || idesc
->operands
[i
] == IA64_OPND_F3
9220 || idesc
->operands
[i
] == IA64_OPND_F4
)
9222 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9223 if (reg
>= min
&& reg
<= max
)
9225 specs
[count
++] = tmpl
;
9232 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9233 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9234 /* mfh is read on writes to FR32-127; mfl is read on writes to
9236 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9238 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9240 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9241 if (reg
>= min
&& reg
<= max
)
9243 specs
[count
++] = tmpl
;
9248 else if (note
== 10)
9250 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9252 if (idesc
->operands
[i
] == IA64_OPND_R1
9253 || idesc
->operands
[i
] == IA64_OPND_R2
9254 || idesc
->operands
[i
] == IA64_OPND_R3
)
9256 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9257 if (regno
>= 16 && regno
<= 31)
9259 specs
[count
++] = tmpl
;
9270 case IA64_RS_AR_FPSR
:
9271 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9273 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9274 if (regno
== AR_FPSR
)
9276 specs
[count
++] = tmpl
;
9281 specs
[count
++] = tmpl
;
9286 /* Handle all AR[REG] resources */
9287 if (note
== 0 || note
== 1)
9289 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9290 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9291 && regno
== dep
->regindex
)
9293 specs
[count
++] = tmpl
;
9295 /* other AR[REG] resources may be affected by AR accesses */
9296 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9299 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9300 switch (dep
->regindex
)
9306 if (regno
== AR_BSPSTORE
)
9308 specs
[count
++] = tmpl
;
9312 (regno
== AR_BSPSTORE
9313 || regno
== AR_RNAT
))
9315 specs
[count
++] = tmpl
;
9320 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9323 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9324 switch (dep
->regindex
)
9329 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9331 specs
[count
++] = tmpl
;
9338 specs
[count
++] = tmpl
;
9348 /* Handle all CR[REG] resources.
9349 ??? FIXME: The rule 17 isn't really handled correctly. */
9350 if (note
== 0 || note
== 1 || note
== 17)
9352 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9354 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9355 if (regno
== dep
->regindex
)
9357 specs
[count
++] = tmpl
;
9359 else if (!rsrc_write
)
9361 /* Reads from CR[IVR] affect other resources. */
9362 if (regno
== CR_IVR
)
9364 if ((dep
->regindex
>= CR_IRR0
9365 && dep
->regindex
<= CR_IRR3
)
9366 || dep
->regindex
== CR_TPR
)
9368 specs
[count
++] = tmpl
;
9375 specs
[count
++] = tmpl
;
9384 case IA64_RS_INSERVICE
:
9385 /* look for write of EOI (67) or read of IVR (65) */
9386 if ((idesc
->operands
[0] == IA64_OPND_CR3
9387 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9388 || (idesc
->operands
[1] == IA64_OPND_CR3
9389 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9391 specs
[count
++] = tmpl
;
9398 specs
[count
++] = tmpl
;
9409 specs
[count
++] = tmpl
;
9413 /* Check if any of the registers accessed are in the rotating region.
9414 mov to/from pr accesses CFM only when qp_regno is in the rotating
9416 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9418 if (idesc
->operands
[i
] == IA64_OPND_R1
9419 || idesc
->operands
[i
] == IA64_OPND_R2
9420 || idesc
->operands
[i
] == IA64_OPND_R3
)
9422 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9423 /* Assumes that md.rot.num_regs is always valid */
9424 if (md
.rot
.num_regs
> 0
9426 && num
< 31 + md
.rot
.num_regs
)
9428 specs
[count
] = tmpl
;
9429 specs
[count
++].specific
= 0;
9432 else if (idesc
->operands
[i
] == IA64_OPND_F1
9433 || idesc
->operands
[i
] == IA64_OPND_F2
9434 || idesc
->operands
[i
] == IA64_OPND_F3
9435 || idesc
->operands
[i
] == IA64_OPND_F4
)
9437 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9440 specs
[count
] = tmpl
;
9441 specs
[count
++].specific
= 0;
9444 else if (idesc
->operands
[i
] == IA64_OPND_P1
9445 || idesc
->operands
[i
] == IA64_OPND_P2
)
9447 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9450 specs
[count
] = tmpl
;
9451 specs
[count
++].specific
= 0;
9455 if (CURR_SLOT
.qp_regno
> 15)
9457 specs
[count
] = tmpl
;
9458 specs
[count
++].specific
= 0;
9463 /* This is the same as IA64_RS_PRr, except simplified to account for
9464 the fact that there is only one register. */
9468 specs
[count
++] = tmpl
;
9473 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9474 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9475 if (mask
& ((valueT
) 1 << 63))
9476 specs
[count
++] = tmpl
;
9478 else if (note
== 11)
9480 if ((idesc
->operands
[0] == IA64_OPND_P1
9481 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9482 || (idesc
->operands
[1] == IA64_OPND_P2
9483 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9485 specs
[count
++] = tmpl
;
9488 else if (note
== 12)
9490 if (CURR_SLOT
.qp_regno
== 63)
9492 specs
[count
++] = tmpl
;
9499 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9500 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9501 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9502 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9505 && (idesc
->operands
[0] == IA64_OPND_P1
9506 || idesc
->operands
[0] == IA64_OPND_P2
))
9508 specs
[count
] = tmpl
;
9509 specs
[count
++].cmp_type
=
9510 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9513 && (idesc
->operands
[1] == IA64_OPND_P1
9514 || idesc
->operands
[1] == IA64_OPND_P2
))
9516 specs
[count
] = tmpl
;
9517 specs
[count
++].cmp_type
=
9518 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9523 if (CURR_SLOT
.qp_regno
== 63)
9525 specs
[count
++] = tmpl
;
9536 /* FIXME we can identify some individual RSE written resources, but RSE
9537 read resources have not yet been completely identified, so for now
9538 treat RSE as a single resource */
9539 if (strncmp (idesc
->name
, "mov", 3) == 0)
9543 if (idesc
->operands
[0] == IA64_OPND_AR3
9544 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9546 specs
[count
++] = tmpl
;
9551 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9553 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9554 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9556 specs
[count
++] = tmpl
;
9559 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9561 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9562 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9563 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9565 specs
[count
++] = tmpl
;
9572 specs
[count
++] = tmpl
;
9577 /* FIXME -- do any of these need to be non-specific? */
9578 specs
[count
++] = tmpl
;
9582 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9589 /* Clear branch flags on marked resources. This breaks the link between the
9590 QP of the marking instruction and a subsequent branch on the same QP. */
9593 clear_qp_branch_flag (valueT mask
)
9596 for (i
= 0; i
< regdepslen
; i
++)
9598 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9599 if ((bit
& mask
) != 0)
9601 regdeps
[i
].link_to_qp_branch
= 0;
9606 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9607 any mutexes which contain one of the PRs and create new ones when
9611 update_qp_mutex (valueT mask
)
9617 while (i
< qp_mutexeslen
)
9619 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9621 /* If it destroys and creates the same mutex, do nothing. */
9622 if (qp_mutexes
[i
].prmask
== mask
9623 && qp_mutexes
[i
].path
== md
.path
)
9634 fprintf (stderr
, " Clearing mutex relation");
9635 print_prmask (qp_mutexes
[i
].prmask
);
9636 fprintf (stderr
, "\n");
9639 /* Deal with the old mutex with more than 3+ PRs only if
9640 the new mutex on the same execution path with it.
9642 FIXME: The 3+ mutex support is incomplete.
9643 dot_pred_rel () may be a better place to fix it. */
9644 if (qp_mutexes
[i
].path
== md
.path
)
9646 /* If it is a proper subset of the mutex, create a
9649 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9652 qp_mutexes
[i
].prmask
&= ~mask
;
9653 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9655 /* Modify the mutex if there are more than one
9663 /* Remove the mutex. */
9664 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9672 add_qp_mutex (mask
);
9677 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9679 Any changes to a PR clears the mutex relations which include that PR. */
9682 clear_qp_mutex (valueT mask
)
9687 while (i
< qp_mutexeslen
)
9689 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9693 fprintf (stderr
, " Clearing mutex relation");
9694 print_prmask (qp_mutexes
[i
].prmask
);
9695 fprintf (stderr
, "\n");
9697 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9704 /* Clear implies relations which contain PRs in the given masks.
9705 P1_MASK indicates the source of the implies relation, while P2_MASK
9706 indicates the implied PR. */
9709 clear_qp_implies (valueT p1_mask
, valueT p2_mask
)
9714 while (i
< qp_implieslen
)
9716 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9717 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9720 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9721 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9722 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9729 /* Add the PRs specified to the list of implied relations. */
9732 add_qp_imply (int p1
, int p2
)
9738 /* p0 is not meaningful here. */
9739 if (p1
== 0 || p2
== 0)
9745 /* If it exists already, ignore it. */
9746 for (i
= 0; i
< qp_implieslen
; i
++)
9748 if (qp_implies
[i
].p1
== p1
9749 && qp_implies
[i
].p2
== p2
9750 && qp_implies
[i
].path
== md
.path
9751 && !qp_implies
[i
].p2_branched
)
9755 if (qp_implieslen
== qp_impliestotlen
)
9757 qp_impliestotlen
+= 20;
9758 qp_implies
= (struct qp_imply
*)
9759 xrealloc ((void *) qp_implies
,
9760 qp_impliestotlen
* sizeof (struct qp_imply
));
9763 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9764 qp_implies
[qp_implieslen
].p1
= p1
;
9765 qp_implies
[qp_implieslen
].p2
= p2
;
9766 qp_implies
[qp_implieslen
].path
= md
.path
;
9767 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9769 /* Add in the implied transitive relations; for everything that p2 implies,
9770 make p1 imply that, too; for everything that implies p1, make it imply p2
9772 for (i
= 0; i
< qp_implieslen
; i
++)
9774 if (qp_implies
[i
].p1
== p2
)
9775 add_qp_imply (p1
, qp_implies
[i
].p2
);
9776 if (qp_implies
[i
].p2
== p1
)
9777 add_qp_imply (qp_implies
[i
].p1
, p2
);
9779 /* Add in mutex relations implied by this implies relation; for each mutex
9780 relation containing p2, duplicate it and replace p2 with p1. */
9781 bit
= (valueT
) 1 << p1
;
9782 mask
= (valueT
) 1 << p2
;
9783 for (i
= 0; i
< qp_mutexeslen
; i
++)
9785 if (qp_mutexes
[i
].prmask
& mask
)
9786 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9790 /* Add the PRs specified in the mask to the mutex list; this means that only
9791 one of the PRs can be true at any time. PR0 should never be included in
9795 add_qp_mutex (valueT mask
)
9800 if (qp_mutexeslen
== qp_mutexestotlen
)
9802 qp_mutexestotlen
+= 20;
9803 qp_mutexes
= (struct qpmutex
*)
9804 xrealloc ((void *) qp_mutexes
,
9805 qp_mutexestotlen
* sizeof (struct qpmutex
));
9809 fprintf (stderr
, " Registering mutex on");
9810 print_prmask (mask
);
9811 fprintf (stderr
, "\n");
9813 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9814 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9818 has_suffix_p (const char *name
, const char *suffix
)
9820 size_t namelen
= strlen (name
);
9821 size_t sufflen
= strlen (suffix
);
9823 if (namelen
<= sufflen
)
9825 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9829 clear_register_values (void)
9833 fprintf (stderr
, " Clearing register values\n");
9834 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9835 gr_values
[i
].known
= 0;
9838 /* Keep track of register values/changes which affect DV tracking.
9840 optimization note: should add a flag to classes of insns where otherwise we
9841 have to examine a group of strings to identify them. */
9844 note_register_values (struct ia64_opcode
*idesc
)
9846 valueT qp_changemask
= 0;
9849 /* Invalidate values for registers being written to. */
9850 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9852 if (idesc
->operands
[i
] == IA64_OPND_R1
9853 || idesc
->operands
[i
] == IA64_OPND_R2
9854 || idesc
->operands
[i
] == IA64_OPND_R3
)
9856 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9857 if (regno
> 0 && regno
< NELEMS (gr_values
))
9858 gr_values
[regno
].known
= 0;
9860 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9862 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9863 if (regno
> 0 && regno
< 4)
9864 gr_values
[regno
].known
= 0;
9866 else if (idesc
->operands
[i
] == IA64_OPND_P1
9867 || idesc
->operands
[i
] == IA64_OPND_P2
)
9869 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9870 qp_changemask
|= (valueT
) 1 << regno
;
9872 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9874 if (idesc
->operands
[2] & (valueT
) 0x10000)
9875 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9877 qp_changemask
= idesc
->operands
[2];
9880 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9882 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9883 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9885 qp_changemask
= idesc
->operands
[1];
9886 qp_changemask
&= ~(valueT
) 0xFFFF;
9891 /* Always clear qp branch flags on any PR change. */
9892 /* FIXME there may be exceptions for certain compares. */
9893 clear_qp_branch_flag (qp_changemask
);
9895 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9896 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9898 qp_changemask
|= ~(valueT
) 0xFFFF;
9899 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9901 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9902 gr_values
[i
].known
= 0;
9904 clear_qp_mutex (qp_changemask
);
9905 clear_qp_implies (qp_changemask
, qp_changemask
);
9907 /* After a call, all register values are undefined, except those marked
9909 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9910 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9912 /* FIXME keep GR values which are marked as "safe_across_calls" */
9913 clear_register_values ();
9914 clear_qp_mutex (~qp_safe_across_calls
);
9915 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9916 clear_qp_branch_flag (~qp_safe_across_calls
);
9918 else if (is_interruption_or_rfi (idesc
)
9919 || is_taken_branch (idesc
))
9921 clear_register_values ();
9922 clear_qp_mutex (~(valueT
) 0);
9923 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9925 /* Look for mutex and implies relations. */
9926 else if ((idesc
->operands
[0] == IA64_OPND_P1
9927 || idesc
->operands
[0] == IA64_OPND_P2
)
9928 && (idesc
->operands
[1] == IA64_OPND_P1
9929 || idesc
->operands
[1] == IA64_OPND_P2
))
9931 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9932 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9933 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9934 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9936 /* If both PRs are PR0, we can't really do anything. */
9937 if (p1
== 0 && p2
== 0)
9940 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9942 /* In general, clear mutexes and implies which include P1 or P2,
9943 with the following exceptions. */
9944 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9945 || has_suffix_p (idesc
->name
, ".and.orcm"))
9947 clear_qp_implies (p2mask
, p1mask
);
9949 else if (has_suffix_p (idesc
->name
, ".andcm")
9950 || has_suffix_p (idesc
->name
, ".and"))
9952 clear_qp_implies (0, p1mask
| p2mask
);
9954 else if (has_suffix_p (idesc
->name
, ".orcm")
9955 || has_suffix_p (idesc
->name
, ".or"))
9957 clear_qp_mutex (p1mask
| p2mask
);
9958 clear_qp_implies (p1mask
| p2mask
, 0);
9964 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9966 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9967 if (p1
== 0 || p2
== 0)
9968 clear_qp_mutex (p1mask
| p2mask
);
9970 added
= update_qp_mutex (p1mask
| p2mask
);
9972 if (CURR_SLOT
.qp_regno
== 0
9973 || has_suffix_p (idesc
->name
, ".unc"))
9975 if (added
== 0 && p1
&& p2
)
9976 add_qp_mutex (p1mask
| p2mask
);
9977 if (CURR_SLOT
.qp_regno
!= 0)
9980 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9982 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9987 /* Look for mov imm insns into GRs. */
9988 else if (idesc
->operands
[0] == IA64_OPND_R1
9989 && (idesc
->operands
[1] == IA64_OPND_IMM22
9990 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9991 && CURR_SLOT
.opnd
[1].X_op
== O_constant
9992 && (strcmp (idesc
->name
, "mov") == 0
9993 || strcmp (idesc
->name
, "movl") == 0))
9995 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9996 if (regno
> 0 && regno
< NELEMS (gr_values
))
9998 gr_values
[regno
].known
= 1;
9999 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
10000 gr_values
[regno
].path
= md
.path
;
10003 fprintf (stderr
, " Know gr%d = ", regno
);
10004 fprintf_vma (stderr
, gr_values
[regno
].value
);
10005 fputs ("\n", stderr
);
10009 /* Look for dep.z imm insns. */
10010 else if (idesc
->operands
[0] == IA64_OPND_R1
10011 && idesc
->operands
[1] == IA64_OPND_IMM8
10012 && strcmp (idesc
->name
, "dep.z") == 0)
10014 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
10015 if (regno
> 0 && regno
< NELEMS (gr_values
))
10017 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
10019 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
10020 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
10021 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
10022 gr_values
[regno
].known
= 1;
10023 gr_values
[regno
].value
= value
;
10024 gr_values
[regno
].path
= md
.path
;
10027 fprintf (stderr
, " Know gr%d = ", regno
);
10028 fprintf_vma (stderr
, gr_values
[regno
].value
);
10029 fputs ("\n", stderr
);
10035 clear_qp_mutex (qp_changemask
);
10036 clear_qp_implies (qp_changemask
, qp_changemask
);
10040 /* Return whether the given predicate registers are currently mutex. */
10043 qp_mutex (int p1
, int p2
, int path
)
10050 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
10051 for (i
= 0; i
< qp_mutexeslen
; i
++)
10053 if (qp_mutexes
[i
].path
>= path
10054 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
10061 /* Return whether the given resource is in the given insn's list of chks
10062 Return 1 if the conflict is absolutely determined, 2 if it's a potential
10066 resources_match (struct rsrc
*rs
,
10067 struct ia64_opcode
*idesc
,
10072 struct rsrc specs
[MAX_SPECS
];
10075 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10076 we don't need to check. One exception is note 11, which indicates that
10077 target predicates are written regardless of PR[qp]. */
10078 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
10082 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
10083 while (count
-- > 0)
10085 /* UNAT checking is a bit more specific than other resources */
10086 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
10087 && specs
[count
].mem_offset
.hint
10088 && rs
->mem_offset
.hint
)
10090 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
10092 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
10093 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
10100 /* Skip apparent PR write conflicts where both writes are an AND or both
10101 writes are an OR. */
10102 if (rs
->dependency
->specifier
== IA64_RS_PR
10103 || rs
->dependency
->specifier
== IA64_RS_PRr
10104 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10106 if (specs
[count
].cmp_type
!= CMP_NONE
10107 && specs
[count
].cmp_type
== rs
->cmp_type
)
10110 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10111 dv_mode
[rs
->dependency
->mode
],
10112 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10113 specs
[count
].index
: 63);
10118 " %s on parallel compare conflict %s vs %s on PR%d\n",
10119 dv_mode
[rs
->dependency
->mode
],
10120 dv_cmp_type
[rs
->cmp_type
],
10121 dv_cmp_type
[specs
[count
].cmp_type
],
10122 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10123 specs
[count
].index
: 63);
10127 /* If either resource is not specific, conservatively assume a conflict
10129 if (!specs
[count
].specific
|| !rs
->specific
)
10131 else if (specs
[count
].index
== rs
->index
)
10138 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10139 insert a stop to create the break. Update all resource dependencies
10140 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10141 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10142 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10146 insn_group_break (int insert_stop
, int qp_regno
, int save_current
)
10150 if (insert_stop
&& md
.num_slots_in_use
> 0)
10151 PREV_SLOT
.end_of_insn_group
= 1;
10155 fprintf (stderr
, " Insn group break%s",
10156 (insert_stop
? " (w/stop)" : ""));
10158 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10159 fprintf (stderr
, "\n");
10163 while (i
< regdepslen
)
10165 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10168 && regdeps
[i
].qp_regno
!= qp_regno
)
10175 && CURR_SLOT
.src_file
== regdeps
[i
].file
10176 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10182 /* clear dependencies which are automatically cleared by a stop, or
10183 those that have reached the appropriate state of insn serialization */
10184 if (dep
->semantics
== IA64_DVS_IMPLIED
10185 || dep
->semantics
== IA64_DVS_IMPLIEDF
10186 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10188 print_dependency ("Removing", i
);
10189 regdeps
[i
] = regdeps
[--regdepslen
];
10193 if (dep
->semantics
== IA64_DVS_DATA
10194 || dep
->semantics
== IA64_DVS_INSTR
10195 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10197 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10198 regdeps
[i
].insn_srlz
= STATE_STOP
;
10199 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10200 regdeps
[i
].data_srlz
= STATE_STOP
;
10207 /* Add the given resource usage spec to the list of active dependencies. */
10210 mark_resource (struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
,
10211 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
,
10216 if (regdepslen
== regdepstotlen
)
10218 regdepstotlen
+= 20;
10219 regdeps
= (struct rsrc
*)
10220 xrealloc ((void *) regdeps
,
10221 regdepstotlen
* sizeof (struct rsrc
));
10224 regdeps
[regdepslen
] = *spec
;
10225 regdeps
[regdepslen
].depind
= depind
;
10226 regdeps
[regdepslen
].path
= path
;
10227 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10228 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10230 print_dependency ("Adding", regdepslen
);
10236 print_dependency (const char *action
, int depind
)
10240 fprintf (stderr
, " %s %s '%s'",
10241 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10242 (regdeps
[depind
].dependency
)->name
);
10243 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10244 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10245 if (regdeps
[depind
].mem_offset
.hint
)
10247 fputs (" ", stderr
);
10248 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10249 fputs ("+", stderr
);
10250 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10252 fprintf (stderr
, "\n");
10257 instruction_serialization (void)
10261 fprintf (stderr
, " Instruction serialization\n");
10262 for (i
= 0; i
< regdepslen
; i
++)
10263 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10264 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10268 data_serialization (void)
10272 fprintf (stderr
, " Data serialization\n");
10273 while (i
< regdepslen
)
10275 if (regdeps
[i
].data_srlz
== STATE_STOP
10276 /* Note: as of 991210, all "other" dependencies are cleared by a
10277 data serialization. This might change with new tables */
10278 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10280 print_dependency ("Removing", i
);
10281 regdeps
[i
] = regdeps
[--regdepslen
];
10288 /* Insert stops and serializations as needed to avoid DVs. */
10291 remove_marked_resource (struct rsrc
*rs
)
10293 switch (rs
->dependency
->semantics
)
10295 case IA64_DVS_SPECIFIC
:
10297 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10298 /* ...fall through... */
10299 case IA64_DVS_INSTR
:
10301 fprintf (stderr
, "Inserting instr serialization\n");
10302 if (rs
->insn_srlz
< STATE_STOP
)
10303 insn_group_break (1, 0, 0);
10304 if (rs
->insn_srlz
< STATE_SRLZ
)
10306 struct slot oldslot
= CURR_SLOT
;
10307 /* Manually jam a srlz.i insn into the stream */
10308 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10309 CURR_SLOT
.user_template
= -1;
10310 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10311 instruction_serialization ();
10312 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10313 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10314 emit_one_bundle ();
10315 CURR_SLOT
= oldslot
;
10317 insn_group_break (1, 0, 0);
10319 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10320 "other" types of DV are eliminated
10321 by a data serialization */
10322 case IA64_DVS_DATA
:
10324 fprintf (stderr
, "Inserting data serialization\n");
10325 if (rs
->data_srlz
< STATE_STOP
)
10326 insn_group_break (1, 0, 0);
10328 struct slot oldslot
= CURR_SLOT
;
10329 /* Manually jam a srlz.d insn into the stream */
10330 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10331 CURR_SLOT
.user_template
= -1;
10332 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10333 data_serialization ();
10334 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10335 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10336 emit_one_bundle ();
10337 CURR_SLOT
= oldslot
;
10340 case IA64_DVS_IMPLIED
:
10341 case IA64_DVS_IMPLIEDF
:
10343 fprintf (stderr
, "Inserting stop\n");
10344 insn_group_break (1, 0, 0);
10351 /* Check the resources used by the given opcode against the current dependency
10354 The check is run once for each execution path encountered. In this case,
10355 a unique execution path is the sequence of instructions following a code
10356 entry point, e.g. the following has three execution paths, one starting
10357 at L0, one at L1, and one at L2.
10366 check_dependencies (struct ia64_opcode
*idesc
)
10368 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10372 /* Note that the number of marked resources may change within the
10373 loop if in auto mode. */
10375 while (i
< regdepslen
)
10377 struct rsrc
*rs
= ®deps
[i
];
10378 const struct ia64_dependency
*dep
= rs
->dependency
;
10381 int start_over
= 0;
10383 if (dep
->semantics
== IA64_DVS_NONE
10384 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10390 note
= NOTE (opdeps
->chks
[chkind
]);
10392 /* Check this resource against each execution path seen thus far. */
10393 for (path
= 0; path
<= md
.path
; path
++)
10397 /* If the dependency wasn't on the path being checked, ignore it. */
10398 if (rs
->path
< path
)
10401 /* If the QP for this insn implies a QP which has branched, don't
10402 bother checking. Ed. NOTE: I don't think this check is terribly
10403 useful; what's the point of generating code which will only be
10404 reached if its QP is zero?
10405 This code was specifically inserted to handle the following code,
10406 based on notes from Intel's DV checking code, where p1 implies p2.
10412 if (CURR_SLOT
.qp_regno
!= 0)
10416 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10418 if (qp_implies
[implies
].path
>= path
10419 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10420 && qp_implies
[implies
].p2_branched
)
10430 if ((matchtype
= resources_match (rs
, idesc
, note
,
10431 CURR_SLOT
.qp_regno
, path
)) != 0)
10434 char pathmsg
[256] = "";
10435 char indexmsg
[256] = "";
10436 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10439 snprintf (pathmsg
, sizeof (pathmsg
),
10440 " when entry is at label '%s'",
10441 md
.entry_labels
[path
- 1]);
10442 if (matchtype
== 1 && rs
->index
>= 0)
10443 snprintf (indexmsg
, sizeof (indexmsg
),
10444 ", specific resource number is %d",
10446 snprintf (msg
, sizeof (msg
),
10447 "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10449 (certain
? "violates" : "may violate"),
10450 dv_mode
[dep
->mode
], dep
->name
,
10451 dv_sem
[dep
->semantics
],
10452 pathmsg
, indexmsg
);
10454 if (md
.explicit_mode
)
10456 as_warn ("%s", msg
);
10457 if (path
< md
.path
)
10458 as_warn (_("Only the first path encountering the conflict is reported"));
10459 as_warn_where (rs
->file
, rs
->line
,
10460 _("This is the location of the conflicting usage"));
10461 /* Don't bother checking other paths, to avoid duplicating
10462 the same warning */
10468 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10470 remove_marked_resource (rs
);
10472 /* since the set of dependencies has changed, start over */
10473 /* FIXME -- since we're removing dvs as we go, we
10474 probably don't really need to start over... */
10487 /* Register new dependencies based on the given opcode. */
10490 mark_resources (struct ia64_opcode
*idesc
)
10493 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10494 int add_only_qp_reads
= 0;
10496 /* A conditional branch only uses its resources if it is taken; if it is
10497 taken, we stop following that path. The other branch types effectively
10498 *always* write their resources. If it's not taken, register only QP
10500 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10502 add_only_qp_reads
= 1;
10506 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10508 for (i
= 0; i
< opdeps
->nregs
; i
++)
10510 const struct ia64_dependency
*dep
;
10511 struct rsrc specs
[MAX_SPECS
];
10516 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10517 note
= NOTE (opdeps
->regs
[i
]);
10519 if (add_only_qp_reads
10520 && !(dep
->mode
== IA64_DV_WAR
10521 && (dep
->specifier
== IA64_RS_PR
10522 || dep
->specifier
== IA64_RS_PRr
10523 || dep
->specifier
== IA64_RS_PR63
)))
10526 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10528 while (count
-- > 0)
10530 mark_resource (idesc
, dep
, &specs
[count
],
10531 DEP (opdeps
->regs
[i
]), md
.path
);
10534 /* The execution path may affect register values, which may in turn
10535 affect which indirect-access resources are accessed. */
10536 switch (dep
->specifier
)
10540 case IA64_RS_CPUID
:
10548 for (path
= 0; path
< md
.path
; path
++)
10550 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10551 while (count
-- > 0)
10552 mark_resource (idesc
, dep
, &specs
[count
],
10553 DEP (opdeps
->regs
[i
]), path
);
10560 /* Remove dependencies when they no longer apply. */
10563 update_dependencies (struct ia64_opcode
*idesc
)
10567 if (strcmp (idesc
->name
, "srlz.i") == 0)
10569 instruction_serialization ();
10571 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10573 data_serialization ();
10575 else if (is_interruption_or_rfi (idesc
)
10576 || is_taken_branch (idesc
))
10578 /* Although technically the taken branch doesn't clear dependencies
10579 which require a srlz.[id], we don't follow the branch; the next
10580 instruction is assumed to start with a clean slate. */
10584 else if (is_conditional_branch (idesc
)
10585 && CURR_SLOT
.qp_regno
!= 0)
10587 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10589 for (i
= 0; i
< qp_implieslen
; i
++)
10591 /* If the conditional branch's predicate is implied by the predicate
10592 in an existing dependency, remove that dependency. */
10593 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10596 /* Note that this implied predicate takes a branch so that if
10597 a later insn generates a DV but its predicate implies this
10598 one, we can avoid the false DV warning. */
10599 qp_implies
[i
].p2_branched
= 1;
10600 while (depind
< regdepslen
)
10602 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10604 print_dependency ("Removing", depind
);
10605 regdeps
[depind
] = regdeps
[--regdepslen
];
10612 /* Any marked resources which have this same predicate should be
10613 cleared, provided that the QP hasn't been modified between the
10614 marking instruction and the branch. */
10617 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10622 while (i
< regdepslen
)
10624 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10625 && regdeps
[i
].link_to_qp_branch
10626 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10627 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10629 /* Treat like a taken branch */
10630 print_dependency ("Removing", i
);
10631 regdeps
[i
] = regdeps
[--regdepslen
];
10640 /* Examine the current instruction for dependency violations. */
10643 check_dv (struct ia64_opcode
*idesc
)
10647 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10648 idesc
->name
, CURR_SLOT
.src_line
,
10649 idesc
->dependencies
->nchks
,
10650 idesc
->dependencies
->nregs
);
10653 /* Look through the list of currently marked resources; if the current
10654 instruction has the dependency in its chks list which uses that resource,
10655 check against the specific resources used. */
10656 check_dependencies (idesc
);
10658 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10659 then add them to the list of marked resources. */
10660 mark_resources (idesc
);
10662 /* There are several types of dependency semantics, and each has its own
10663 requirements for being cleared
10665 Instruction serialization (insns separated by interruption, rfi, or
10666 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10668 Data serialization (instruction serialization, or writer + srlz.d +
10669 reader, where writer and srlz.d are in separate groups) clears
10670 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10671 always be the case).
10673 Instruction group break (groups separated by stop, taken branch,
10674 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10676 update_dependencies (idesc
);
10678 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10679 warning. Keep track of as many as possible that are useful. */
10680 note_register_values (idesc
);
10682 /* We don't need or want this anymore. */
10683 md
.mem_offset
.hint
= 0;
10688 /* Translate one line of assembly. Pseudo ops and labels do not show
10691 md_assemble (char *str
)
10693 char *saved_input_line_pointer
, *mnemonic
;
10694 const struct pseudo_opcode
*pdesc
;
10695 struct ia64_opcode
*idesc
;
10696 unsigned char qp_regno
;
10697 unsigned int flags
;
10700 saved_input_line_pointer
= input_line_pointer
;
10701 input_line_pointer
= str
;
10703 /* extract the opcode (mnemonic): */
10705 ch
= get_symbol_name (&mnemonic
);
10706 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10709 (void) restore_line_pointer (ch
);
10710 (*pdesc
->handler
) (pdesc
->arg
);
10714 /* Find the instruction descriptor matching the arguments. */
10716 idesc
= ia64_find_opcode (mnemonic
);
10717 (void) restore_line_pointer (ch
);
10720 as_bad (_("Unknown opcode `%s'"), mnemonic
);
10724 idesc
= parse_operands (idesc
);
10728 /* Handle the dynamic ops we can handle now: */
10729 if (idesc
->type
== IA64_TYPE_DYN
)
10731 if (strcmp (idesc
->name
, "add") == 0)
10733 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10734 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10738 ia64_free_opcode (idesc
);
10739 idesc
= ia64_find_opcode (mnemonic
);
10741 else if (strcmp (idesc
->name
, "mov") == 0)
10743 enum ia64_opnd opnd1
, opnd2
;
10746 opnd1
= idesc
->operands
[0];
10747 opnd2
= idesc
->operands
[1];
10748 if (opnd1
== IA64_OPND_AR3
)
10750 else if (opnd2
== IA64_OPND_AR3
)
10754 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10756 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10757 mnemonic
= "mov.i";
10758 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10759 mnemonic
= "mov.m";
10767 ia64_free_opcode (idesc
);
10768 idesc
= ia64_find_opcode (mnemonic
);
10769 while (idesc
!= NULL
10770 && (idesc
->operands
[0] != opnd1
10771 || idesc
->operands
[1] != opnd2
))
10772 idesc
= get_next_opcode (idesc
);
10776 else if (strcmp (idesc
->name
, "mov.i") == 0
10777 || strcmp (idesc
->name
, "mov.m") == 0)
10779 enum ia64_opnd opnd1
, opnd2
;
10782 opnd1
= idesc
->operands
[0];
10783 opnd2
= idesc
->operands
[1];
10784 if (opnd1
== IA64_OPND_AR3
)
10786 else if (opnd2
== IA64_OPND_AR3
)
10790 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10793 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10795 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10797 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10798 as_bad (_("AR %d can only be accessed by %c-unit"),
10799 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10803 else if (strcmp (idesc
->name
, "hint.b") == 0)
10809 case hint_b_warning
:
10810 as_warn (_("hint.b may be treated as nop"));
10813 as_bad (_("hint.b shouldn't be used"));
10819 if (md
.qp
.X_op
== O_register
)
10821 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10822 md
.qp
.X_op
= O_absent
;
10825 flags
= idesc
->flags
;
10827 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10829 /* The alignment frag has to end with a stop bit only if the
10830 next instruction after the alignment directive has to be
10831 the first instruction in an instruction group. */
10834 while (align_frag
->fr_type
!= rs_align_code
)
10836 align_frag
= align_frag
->fr_next
;
10840 /* align_frag can be NULL if there are directives in
10842 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10843 align_frag
->tc_frag_data
= 1;
10846 insn_group_break (1, 0, 0);
10850 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10852 as_bad (_("`%s' cannot be predicated"), idesc
->name
);
10856 /* Build the instruction. */
10857 CURR_SLOT
.qp_regno
= qp_regno
;
10858 CURR_SLOT
.idesc
= idesc
;
10859 CURR_SLOT
.src_file
= as_where (&CURR_SLOT
.src_line
);
10860 dwarf2_where (&CURR_SLOT
.debug_line
);
10861 dwarf2_consume_line_info ();
10863 /* Add unwind entries, if there are any. */
10864 if (unwind
.current_entry
)
10866 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10867 unwind
.current_entry
= NULL
;
10869 if (unwind
.pending_saves
)
10871 if (unwind
.pending_saves
->next
)
10873 /* Attach the next pending save to the next slot so that its
10874 slot number will get set correctly. */
10875 add_unwind_entry (unwind
.pending_saves
->next
, NOT_A_CHAR
);
10876 unwind
.pending_saves
= &unwind
.pending_saves
->next
->r
.record
.p
;
10879 unwind
.pending_saves
= NULL
;
10881 if (unwind
.proc_pending
.sym
&& S_IS_DEFINED (unwind
.proc_pending
.sym
))
10884 /* Check for dependency violations. */
10888 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10889 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10890 emit_one_bundle ();
10892 if ((flags
& IA64_OPCODE_LAST
) != 0)
10893 insn_group_break (1, 0, 0);
10895 md
.last_text_seg
= now_seg
;
10898 input_line_pointer
= saved_input_line_pointer
;
10901 /* Called when symbol NAME cannot be found in the symbol table.
10902 Should be used for dynamic valued symbols only. */
10905 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
10910 /* Called for any expression that can not be recognized. When the
10911 function is called, `input_line_pointer' will point to the start of
10915 md_operand (expressionS
*e
)
10917 switch (*input_line_pointer
)
10920 ++input_line_pointer
;
10921 expression_and_evaluate (e
);
10922 if (*input_line_pointer
!= ']')
10924 as_bad (_("Closing bracket missing"));
10929 if (e
->X_op
!= O_register
10930 || e
->X_add_number
< REG_GR
10931 || e
->X_add_number
> REG_GR
+ 127)
10933 as_bad (_("Index must be a general register"));
10934 e
->X_add_number
= REG_GR
;
10937 ++input_line_pointer
;
10948 ignore_rest_of_line ();
10951 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10952 a section symbol plus some offset. For relocs involving @fptr(),
10953 directives we don't want such adjustments since we need to have the
10954 original symbol's name in the reloc. */
10956 ia64_fix_adjustable (fixS
*fix
)
10958 /* Prevent all adjustments to global symbols */
10959 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10962 switch (fix
->fx_r_type
)
10964 case BFD_RELOC_IA64_FPTR64I
:
10965 case BFD_RELOC_IA64_FPTR32MSB
:
10966 case BFD_RELOC_IA64_FPTR32LSB
:
10967 case BFD_RELOC_IA64_FPTR64MSB
:
10968 case BFD_RELOC_IA64_FPTR64LSB
:
10969 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10970 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10980 ia64_force_relocation (fixS
*fix
)
10982 switch (fix
->fx_r_type
)
10984 case BFD_RELOC_IA64_FPTR64I
:
10985 case BFD_RELOC_IA64_FPTR32MSB
:
10986 case BFD_RELOC_IA64_FPTR32LSB
:
10987 case BFD_RELOC_IA64_FPTR64MSB
:
10988 case BFD_RELOC_IA64_FPTR64LSB
:
10990 case BFD_RELOC_IA64_LTOFF22
:
10991 case BFD_RELOC_IA64_LTOFF64I
:
10992 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10993 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10994 case BFD_RELOC_IA64_PLTOFF22
:
10995 case BFD_RELOC_IA64_PLTOFF64I
:
10996 case BFD_RELOC_IA64_PLTOFF64MSB
:
10997 case BFD_RELOC_IA64_PLTOFF64LSB
:
10999 case BFD_RELOC_IA64_LTOFF22X
:
11000 case BFD_RELOC_IA64_LDXMOV
:
11007 return generic_force_reloc (fix
);
11010 /* Decide from what point a pc-relative relocation is relative to,
11011 relative to the pc-relative fixup. Er, relatively speaking. */
11013 ia64_pcrel_from_section (fixS
*fix
, segT sec
)
11015 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
11017 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
11024 /* Used to emit section-relative relocs for the dwarf2 debug data. */
11026 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
11030 exp
.X_op
= O_pseudo_fixup
;
11031 exp
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
11032 exp
.X_add_number
= 0;
11033 exp
.X_add_symbol
= symbol
;
11034 emit_expr (&exp
, size
);
11037 /* This is called whenever some data item (not an instruction) needs a
11038 fixup. We pick the right reloc code depending on the byteorder
11039 currently in effect. */
11041 ia64_cons_fix_new (fragS
*f
, int where
, int nbytes
, expressionS
*exp
,
11042 bfd_reloc_code_real_type code
)
11048 /* There are no reloc for 8 and 16 bit quantities, but we allow
11049 them here since they will work fine as long as the expression
11050 is fully defined at the end of the pass over the source file. */
11051 case 1: code
= BFD_RELOC_8
; break;
11052 case 2: code
= BFD_RELOC_16
; break;
11054 if (target_big_endian
)
11055 code
= BFD_RELOC_IA64_DIR32MSB
;
11057 code
= BFD_RELOC_IA64_DIR32LSB
;
11061 /* In 32-bit mode, data8 could mean function descriptors too. */
11062 if (exp
->X_op
== O_pseudo_fixup
11063 && exp
->X_op_symbol
11064 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
11065 && !(md
.flags
& EF_IA_64_ABI64
))
11067 if (target_big_endian
)
11068 code
= BFD_RELOC_IA64_IPLTMSB
;
11070 code
= BFD_RELOC_IA64_IPLTLSB
;
11071 exp
->X_op
= O_symbol
;
11076 if (target_big_endian
)
11077 code
= BFD_RELOC_IA64_DIR64MSB
;
11079 code
= BFD_RELOC_IA64_DIR64LSB
;
11084 if (exp
->X_op
== O_pseudo_fixup
11085 && exp
->X_op_symbol
11086 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
11088 if (target_big_endian
)
11089 code
= BFD_RELOC_IA64_IPLTMSB
;
11091 code
= BFD_RELOC_IA64_IPLTLSB
;
11092 exp
->X_op
= O_symbol
;
11098 as_bad (_("Unsupported fixup size %d"), nbytes
);
11099 ignore_rest_of_line ();
11103 if (exp
->X_op
== O_pseudo_fixup
)
11105 exp
->X_op
= O_symbol
;
11106 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11107 /* ??? If code unchanged, unsupported. */
11110 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11111 /* We need to store the byte order in effect in case we're going
11112 to fix an 8 or 16 bit relocation (for which there no real
11113 relocs available). See md_apply_fix(). */
11114 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11117 /* Return the actual relocation we wish to associate with the pseudo
11118 reloc described by SYM and R_TYPE. SYM should be one of the
11119 symbols in the pseudo_func array, or NULL. */
11121 static bfd_reloc_code_real_type
11122 ia64_gen_real_reloc_type (struct symbol
*sym
, bfd_reloc_code_real_type r_type
)
11124 bfd_reloc_code_real_type newr
= 0;
11125 const char *type
= NULL
, *suffix
= "";
11132 switch (S_GET_VALUE (sym
))
11134 case FUNC_FPTR_RELATIVE
:
11137 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_FPTR64I
; break;
11138 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_FPTR32MSB
; break;
11139 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_FPTR32LSB
; break;
11140 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_FPTR64MSB
; break;
11141 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_FPTR64LSB
; break;
11142 default: type
= "FPTR"; break;
11146 case FUNC_GP_RELATIVE
:
11149 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_GPREL22
; break;
11150 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_GPREL64I
; break;
11151 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_GPREL32MSB
; break;
11152 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_GPREL32LSB
; break;
11153 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_GPREL64MSB
; break;
11154 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_GPREL64LSB
; break;
11155 default: type
= "GPREL"; break;
11159 case FUNC_LT_RELATIVE
:
11162 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22
; break;
11163 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_LTOFF64I
; break;
11164 default: type
= "LTOFF"; break;
11168 case FUNC_LT_RELATIVE_X
:
11171 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22X
; break;
11172 default: type
= "LTOFF"; suffix
= "X"; break;
11176 case FUNC_PC_RELATIVE
:
11179 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PCREL22
; break;
11180 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PCREL64I
; break;
11181 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_PCREL32MSB
; break;
11182 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_PCREL32LSB
; break;
11183 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PCREL64MSB
; break;
11184 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PCREL64LSB
; break;
11185 default: type
= "PCREL"; break;
11189 case FUNC_PLT_RELATIVE
:
11192 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PLTOFF22
; break;
11193 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PLTOFF64I
; break;
11194 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PLTOFF64MSB
;break;
11195 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PLTOFF64LSB
;break;
11196 default: type
= "PLTOFF"; break;
11200 case FUNC_SEC_RELATIVE
:
11203 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SECREL32MSB
;break;
11204 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SECREL32LSB
;break;
11205 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SECREL64MSB
;break;
11206 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SECREL64LSB
;break;
11207 default: type
= "SECREL"; break;
11211 case FUNC_SEG_RELATIVE
:
11214 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SEGREL32MSB
;break;
11215 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SEGREL32LSB
;break;
11216 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SEGREL64MSB
;break;
11217 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SEGREL64LSB
;break;
11218 default: type
= "SEGREL"; break;
11222 case FUNC_LTV_RELATIVE
:
11225 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_LTV32MSB
; break;
11226 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_LTV32LSB
; break;
11227 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_LTV64MSB
; break;
11228 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_LTV64LSB
; break;
11229 default: type
= "LTV"; break;
11233 case FUNC_LT_FPTR_RELATIVE
:
11236 case BFD_RELOC_IA64_IMM22
:
11237 newr
= BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11238 case BFD_RELOC_IA64_IMM64
:
11239 newr
= BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11240 case BFD_RELOC_IA64_DIR32MSB
:
11241 newr
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11242 case BFD_RELOC_IA64_DIR32LSB
:
11243 newr
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11244 case BFD_RELOC_IA64_DIR64MSB
:
11245 newr
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11246 case BFD_RELOC_IA64_DIR64LSB
:
11247 newr
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11249 type
= "LTOFF_FPTR"; break;
11253 case FUNC_TP_RELATIVE
:
11256 case BFD_RELOC_IA64_IMM14
: newr
= BFD_RELOC_IA64_TPREL14
; break;
11257 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_TPREL22
; break;
11258 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_TPREL64I
; break;
11259 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_TPREL64MSB
; break;
11260 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_TPREL64LSB
; break;
11261 default: type
= "TPREL"; break;
11265 case FUNC_LT_TP_RELATIVE
:
11268 case BFD_RELOC_IA64_IMM22
:
11269 newr
= BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11271 type
= "LTOFF_TPREL"; break;
11275 case FUNC_DTP_MODULE
:
11278 case BFD_RELOC_IA64_DIR64MSB
:
11279 newr
= BFD_RELOC_IA64_DTPMOD64MSB
; break;
11280 case BFD_RELOC_IA64_DIR64LSB
:
11281 newr
= BFD_RELOC_IA64_DTPMOD64LSB
; break;
11283 type
= "DTPMOD"; break;
11287 case FUNC_LT_DTP_MODULE
:
11290 case BFD_RELOC_IA64_IMM22
:
11291 newr
= BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11293 type
= "LTOFF_DTPMOD"; break;
11297 case FUNC_DTP_RELATIVE
:
11300 case BFD_RELOC_IA64_DIR32MSB
:
11301 newr
= BFD_RELOC_IA64_DTPREL32MSB
; break;
11302 case BFD_RELOC_IA64_DIR32LSB
:
11303 newr
= BFD_RELOC_IA64_DTPREL32LSB
; break;
11304 case BFD_RELOC_IA64_DIR64MSB
:
11305 newr
= BFD_RELOC_IA64_DTPREL64MSB
; break;
11306 case BFD_RELOC_IA64_DIR64LSB
:
11307 newr
= BFD_RELOC_IA64_DTPREL64LSB
; break;
11308 case BFD_RELOC_IA64_IMM14
:
11309 newr
= BFD_RELOC_IA64_DTPREL14
; break;
11310 case BFD_RELOC_IA64_IMM22
:
11311 newr
= BFD_RELOC_IA64_DTPREL22
; break;
11312 case BFD_RELOC_IA64_IMM64
:
11313 newr
= BFD_RELOC_IA64_DTPREL64I
; break;
11315 type
= "DTPREL"; break;
11319 case FUNC_LT_DTP_RELATIVE
:
11322 case BFD_RELOC_IA64_IMM22
:
11323 newr
= BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11325 type
= "LTOFF_DTPREL"; break;
11329 case FUNC_IPLT_RELOC
:
11332 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11333 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11334 default: type
= "IPLT"; break;
11339 case FUNC_SLOTCOUNT_RELOC
:
11340 return DUMMY_RELOC_IA64_SLOTCOUNT
;
11357 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11358 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11359 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11360 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11361 case BFD_RELOC_UNUSED
: width
= 13; break;
11362 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11363 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11364 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11368 /* This should be an error, but since previously there wasn't any
11369 diagnostic here, don't make it fail because of this for now. */
11370 as_warn (_("Cannot express %s%d%s relocation"), type
, width
, suffix
);
11375 /* Here is where generate the appropriate reloc for pseudo relocation
11378 ia64_validate_fix (fixS
*fix
)
11380 switch (fix
->fx_r_type
)
11382 case BFD_RELOC_IA64_FPTR64I
:
11383 case BFD_RELOC_IA64_FPTR32MSB
:
11384 case BFD_RELOC_IA64_FPTR64LSB
:
11385 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11386 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11387 if (fix
->fx_offset
!= 0)
11388 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11389 _("No addend allowed in @fptr() relocation"));
11397 fix_insn (fixS
*fix
, const struct ia64_operand
*odesc
, valueT value
)
11399 bfd_vma insn
[3], t0
, t1
, control_bits
;
11404 slot
= fix
->fx_where
& 0x3;
11405 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11407 /* Bundles are always in little-endian byte order */
11408 t0
= bfd_getl64 (fixpos
);
11409 t1
= bfd_getl64 (fixpos
+ 8);
11410 control_bits
= t0
& 0x1f;
11411 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11412 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11413 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11416 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11418 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11419 insn
[2] |= (((value
& 0x7f) << 13)
11420 | (((value
>> 7) & 0x1ff) << 27)
11421 | (((value
>> 16) & 0x1f) << 22)
11422 | (((value
>> 21) & 0x1) << 21)
11423 | (((value
>> 63) & 0x1) << 36));
11425 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11427 if (value
& ~0x3fffffffffffffffULL
)
11428 err
= _("integer operand out of range");
11429 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11430 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11432 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11435 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11436 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11437 | (((value
>> 0) & 0xfffff) << 13));
11440 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11443 as_bad_where (fix
->fx_file
, fix
->fx_line
, "%s", err
);
11445 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11446 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11447 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11448 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11451 /* Attempt to simplify or even eliminate a fixup. The return value is
11452 ignored; perhaps it was once meaningful, but now it is historical.
11453 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11455 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11459 md_apply_fix (fixS
*fix
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
11462 valueT value
= *valP
;
11464 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11468 switch (fix
->fx_r_type
)
11470 case BFD_RELOC_IA64_PCREL21B
: break;
11471 case BFD_RELOC_IA64_PCREL21BI
: break;
11472 case BFD_RELOC_IA64_PCREL21F
: break;
11473 case BFD_RELOC_IA64_PCREL21M
: break;
11474 case BFD_RELOC_IA64_PCREL60B
: break;
11475 case BFD_RELOC_IA64_PCREL22
: break;
11476 case BFD_RELOC_IA64_PCREL64I
: break;
11477 case BFD_RELOC_IA64_PCREL32MSB
: break;
11478 case BFD_RELOC_IA64_PCREL32LSB
: break;
11479 case BFD_RELOC_IA64_PCREL64MSB
: break;
11480 case BFD_RELOC_IA64_PCREL64LSB
: break;
11482 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11489 switch ((unsigned) fix
->fx_r_type
)
11491 case BFD_RELOC_UNUSED
:
11492 /* This must be a TAG13 or TAG13b operand. There are no external
11493 relocs defined for them, so we must give an error. */
11494 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11495 _("%s must have a constant value"),
11496 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11500 case BFD_RELOC_IA64_TPREL14
:
11501 case BFD_RELOC_IA64_TPREL22
:
11502 case BFD_RELOC_IA64_TPREL64I
:
11503 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11504 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11505 case BFD_RELOC_IA64_DTPREL14
:
11506 case BFD_RELOC_IA64_DTPREL22
:
11507 case BFD_RELOC_IA64_DTPREL64I
:
11508 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11509 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11513 case DUMMY_RELOC_IA64_SLOTCOUNT
:
11514 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11515 _("cannot resolve @slotcount parameter"));
11524 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11527 if (fix
->fx_r_type
== DUMMY_RELOC_IA64_SLOTCOUNT
)
11529 /* For @slotcount, convert an addresses difference to a slots
11533 v
= (value
>> 4) * 3;
11534 switch (value
& 0x0f)
11548 as_bad (_("invalid @slotcount value"));
11554 if (fix
->tc_fix_data
.bigendian
)
11555 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11557 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11562 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11567 /* Generate the BFD reloc to be stuck in the object file from the
11568 fixup used internally in the assembler. */
11571 tc_gen_reloc (asection
*sec ATTRIBUTE_UNUSED
, fixS
*fixp
)
11575 reloc
= xmalloc (sizeof (*reloc
));
11576 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11577 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11578 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11579 reloc
->addend
= fixp
->fx_offset
;
11580 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11584 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11585 _("Cannot represent %s relocation in object file"),
11586 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11593 /* Turn a string in input_line_pointer into a floating point constant
11594 of type TYPE, and store the appropriate bytes in *LIT. The number
11595 of LITTLENUMS emitted is stored in *SIZE. An error message is
11596 returned, or NULL on OK. */
11598 #define MAX_LITTLENUMS 5
11601 md_atof (int type
, char *lit
, int *size
)
11603 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11633 return _("Unrecognized or unsupported floating point constant");
11635 t
= atof_ieee (input_line_pointer
, type
, words
);
11637 input_line_pointer
= t
;
11639 (*ia64_float_to_chars
) (lit
, words
, prec
);
11643 /* It is 10 byte floating point with 6 byte padding. */
11644 memset (&lit
[10], 0, 6);
11645 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11648 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11653 /* Handle ia64 specific semantics of the align directive. */
11656 ia64_md_do_align (int n ATTRIBUTE_UNUSED
,
11657 const char *fill ATTRIBUTE_UNUSED
,
11658 int len ATTRIBUTE_UNUSED
,
11659 int max ATTRIBUTE_UNUSED
)
11661 if (subseg_text_p (now_seg
))
11662 ia64_flush_insns ();
11665 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11666 of an rs_align_code fragment. */
11669 ia64_handle_align (fragS
*fragp
)
11673 const unsigned char *nop_type
;
11675 if (fragp
->fr_type
!= rs_align_code
)
11678 /* Check if this frag has to end with a stop bit. */
11679 nop_type
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11681 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11682 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11684 /* If no paddings are needed, we check if we need a stop bit. */
11685 if (!bytes
&& fragp
->tc_frag_data
)
11687 if (fragp
->fr_fix
< 16)
11689 /* FIXME: It won't work with
11691 alloc r32=ar.pfs,1,2,4,0
11695 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11696 _("Can't add stop bit to mark end of instruction group"));
11699 /* Bundles are always in little-endian byte order. Make sure
11700 the previous bundle has the stop bit. */
11704 /* Make sure we are on a 16-byte boundary, in case someone has been
11705 putting data into a text section. */
11708 int fix
= bytes
& 15;
11709 memset (p
, 0, fix
);
11712 fragp
->fr_fix
+= fix
;
11715 /* Instruction bundles are always little-endian. */
11716 memcpy (p
, nop_type
, 16);
11717 fragp
->fr_var
= 16;
11721 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11726 number_to_chars_bigendian (lit
, (long) (*words
++),
11727 sizeof (LITTLENUM_TYPE
));
11728 lit
+= sizeof (LITTLENUM_TYPE
);
11733 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11738 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11739 sizeof (LITTLENUM_TYPE
));
11740 lit
+= sizeof (LITTLENUM_TYPE
);
11745 ia64_elf_section_change_hook (void)
11747 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11748 && elf_linked_to_section (now_seg
) == NULL
)
11749 elf_linked_to_section (now_seg
) = text_section
;
11750 dot_byteorder (-1);
11753 /* Check if a label should be made global. */
11755 ia64_check_label (symbolS
*label
)
11757 if (*input_line_pointer
== ':')
11759 S_SET_EXTERNAL (label
);
11760 input_line_pointer
++;
11764 /* Used to remember where .alias and .secalias directives are seen. We
11765 will rename symbol and section names when we are about to output
11766 the relocatable file. */
11769 const char *file
; /* The file where the directive is seen. */
11770 unsigned int line
; /* The line number the directive is at. */
11771 const char *name
; /* The original name of the symbol. */
11774 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11775 .secalias. Otherwise, it is .alias. */
11777 dot_alias (int section
)
11779 char *name
, *alias
;
11783 const char *error_string
;
11786 struct hash_control
*ahash
, *nhash
;
11789 delim
= get_symbol_name (&name
);
11790 end_name
= input_line_pointer
;
11793 if (name
== end_name
)
11795 as_bad (_("expected symbol name"));
11796 ignore_rest_of_line ();
11800 SKIP_WHITESPACE_AFTER_NAME ();
11802 if (*input_line_pointer
!= ',')
11805 as_bad (_("expected comma after \"%s\""), name
);
11807 ignore_rest_of_line ();
11811 input_line_pointer
++;
11813 ia64_canonicalize_symbol_name (name
);
11815 /* We call demand_copy_C_string to check if alias string is valid.
11816 There should be a closing `"' and no `\0' in the string. */
11817 alias
= demand_copy_C_string (&len
);
11820 ignore_rest_of_line ();
11824 /* Make a copy of name string. */
11825 len
= strlen (name
) + 1;
11826 obstack_grow (¬es
, name
, len
);
11827 name
= obstack_finish (¬es
);
11832 ahash
= secalias_hash
;
11833 nhash
= secalias_name_hash
;
11838 ahash
= alias_hash
;
11839 nhash
= alias_name_hash
;
11842 /* Check if alias has been used before. */
11843 h
= (struct alias
*) hash_find (ahash
, alias
);
11846 if (strcmp (h
->name
, name
))
11847 as_bad (_("`%s' is already the alias of %s `%s'"),
11848 alias
, kind
, h
->name
);
11852 /* Check if name already has an alias. */
11853 a
= (const char *) hash_find (nhash
, name
);
11856 if (strcmp (a
, alias
))
11857 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11861 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11862 h
->file
= as_where (&h
->line
);
11865 error_string
= hash_jam (ahash
, alias
, (void *) h
);
11868 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11869 alias
, kind
, error_string
);
11873 error_string
= hash_jam (nhash
, name
, (void *) alias
);
11876 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11877 alias
, kind
, error_string
);
11879 obstack_free (¬es
, name
);
11880 obstack_free (¬es
, alias
);
11883 demand_empty_rest_of_line ();
11886 /* It renames the original symbol name to its alias. */
11888 do_alias (const char *alias
, void *value
)
11890 struct alias
*h
= (struct alias
*) value
;
11891 symbolS
*sym
= symbol_find (h
->name
);
11896 /* Uses .alias extensively to alias CRTL functions to same with
11897 decc$ prefix. Sometimes function gets optimized away and a
11898 warning results, which should be suppressed. */
11899 if (strncmp (alias
, "decc$", 5) != 0)
11901 as_warn_where (h
->file
, h
->line
,
11902 _("symbol `%s' aliased to `%s' is not used"),
11906 S_SET_NAME (sym
, (char *) alias
);
11909 /* Called from write_object_file. */
11911 ia64_adjust_symtab (void)
11913 hash_traverse (alias_hash
, do_alias
);
11916 /* It renames the original section name to its alias. */
11918 do_secalias (const char *alias
, void *value
)
11920 struct alias
*h
= (struct alias
*) value
;
11921 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11924 as_warn_where (h
->file
, h
->line
,
11925 _("section `%s' aliased to `%s' is not used"),
11931 /* Called from write_object_file. */
11933 ia64_frob_file (void)
11935 hash_traverse (secalias_hash
, do_secalias
);
11939 #define NT_VMS_MHD 1
11940 #define NT_VMS_LNM 2
11942 /* Integrity VMS 8.x identifies it's ELF modules with a standard ELF
11945 /* Manufacture a VMS-like time string. */
11947 get_vms_time (char *Now
)
11953 pnt
= ctime (&timeb
);
11959 sprintf (Now
, "%2s-%3s-%s %s", pnt
+ 8, pnt
+ 4, pnt
+ 20, pnt
+ 11);
11963 ia64_vms_note (void)
11966 asection
*seg
= now_seg
;
11967 subsegT subseg
= now_subseg
;
11968 asection
*secp
= NULL
;
11973 /* Create the .note section. */
11975 secp
= subseg_new (".note", 0);
11976 bfd_set_section_flags (stdoutput
,
11978 SEC_HAS_CONTENTS
| SEC_READONLY
);
11980 /* Module header note (MHD). */
11981 bname
= xstrdup (lbasename (out_file_name
));
11982 if ((p
= strrchr (bname
, '.')))
11985 /* VMS note header is 24 bytes long. */
11986 p
= frag_more (8 + 8 + 8);
11987 number_to_chars_littleendian (p
+ 0, 8, 8);
11988 number_to_chars_littleendian (p
+ 8, 40 + strlen (bname
), 8);
11989 number_to_chars_littleendian (p
+ 16, NT_VMS_MHD
, 8);
11992 strcpy (p
, "IPF/VMS");
11994 p
= frag_more (17 + 17 + strlen (bname
) + 1 + 5);
11996 strcpy (p
+ 17, "24-FEB-2005 15:00");
11999 p
+= strlen (bname
) + 1;
12001 strcpy (p
, "V1.0");
12003 frag_align (3, 0, 0);
12005 /* Language processor name note. */
12006 sprintf (buf
, "GNU assembler version %s (%s) using BFD version %s",
12007 VERSION
, TARGET_ALIAS
, BFD_VERSION_STRING
);
12009 p
= frag_more (8 + 8 + 8);
12010 number_to_chars_littleendian (p
+ 0, 8, 8);
12011 number_to_chars_littleendian (p
+ 8, strlen (buf
) + 1, 8);
12012 number_to_chars_littleendian (p
+ 16, NT_VMS_LNM
, 8);
12015 strcpy (p
, "IPF/VMS");
12017 p
= frag_more (strlen (buf
) + 1);
12020 frag_align (3, 0, 0);
12022 secp
= subseg_new (".vms_display_name_info", 0);
12023 bfd_set_section_flags (stdoutput
,
12025 SEC_HAS_CONTENTS
| SEC_READONLY
);
12027 /* This symbol should be passed on the command line and be variable
12028 according to language. */
12029 sym
= symbol_new ("__gnat_vms_display_name@gnat_demangler_rtl",
12030 absolute_section
, 0, &zero_address_frag
);
12031 symbol_table_insert (sym
);
12032 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
| BSF_DYNAMIC
;
12035 /* Format 3 of VMS demangler Spec. */
12036 number_to_chars_littleendian (p
, 3, 4);
12039 /* Place holder for symbol table index of above symbol. */
12040 number_to_chars_littleendian (p
, -1, 4);
12042 frag_align (3, 0, 0);
12044 /* We probably can't restore the current segment, for there likely
12045 isn't one yet... */
12047 subseg_set (seg
, subseg
);
12050 #endif /* TE_VMS */