1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright (C) 1998-2014 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
59 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
61 /* Some systems define MIN in, e.g., param.h. */
63 #define MIN(a,b) ((a) < (b) ? (a) : (b))
66 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
67 #define CURR_SLOT md.slot[md.curr_slot]
69 #define O_pseudo_fixup (O_max + 1)
73 /* IA-64 ABI section pseudo-ops. */
74 SPECIAL_SECTION_BSS
= 0,
76 SPECIAL_SECTION_SDATA
,
77 SPECIAL_SECTION_RODATA
,
78 SPECIAL_SECTION_COMMENT
,
79 SPECIAL_SECTION_UNWIND
,
80 SPECIAL_SECTION_UNWIND_INFO
,
81 /* HPUX specific section pseudo-ops. */
82 SPECIAL_SECTION_INIT_ARRAY
,
83 SPECIAL_SECTION_FINI_ARRAY
,
100 FUNC_LT_FPTR_RELATIVE
,
102 FUNC_LT_DTP_RELATIVE
,
106 FUNC_SLOTCOUNT_RELOC
,
113 REG_FR
= (REG_GR
+ 128),
114 REG_AR
= (REG_FR
+ 128),
115 REG_CR
= (REG_AR
+ 128),
116 REG_DAHR
= (REG_CR
+ 128),
117 REG_P
= (REG_DAHR
+ 8),
118 REG_BR
= (REG_P
+ 64),
119 REG_IP
= (REG_BR
+ 8),
126 /* The following are pseudo-registers for use by gas only. */
138 /* The following pseudo-registers are used for unwind directives only: */
146 DYNREG_GR
= 0, /* dynamic general purpose register */
147 DYNREG_FR
, /* dynamic floating point register */
148 DYNREG_PR
, /* dynamic predicate register */
152 enum operand_match_result
155 OPERAND_OUT_OF_RANGE
,
159 /* On the ia64, we can't know the address of a text label until the
160 instructions are packed into a bundle. To handle this, we keep
161 track of the list of labels that appear in front of each
165 struct label_fix
*next
;
167 bfd_boolean dw2_mark_labels
;
171 /* An internally used relocation. */
172 #define DUMMY_RELOC_IA64_SLOTCOUNT (BFD_RELOC_UNUSED + 1)
175 /* This is the endianness of the current section. */
176 extern int target_big_endian
;
178 /* This is the default endianness. */
179 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
181 void (*ia64_number_to_chars
) (char *, valueT
, int);
183 static void ia64_float_to_chars_bigendian (char *, LITTLENUM_TYPE
*, int);
184 static void ia64_float_to_chars_littleendian (char *, LITTLENUM_TYPE
*, int);
186 static void (*ia64_float_to_chars
) (char *, LITTLENUM_TYPE
*, int);
188 static struct hash_control
*alias_hash
;
189 static struct hash_control
*alias_name_hash
;
190 static struct hash_control
*secalias_hash
;
191 static struct hash_control
*secalias_name_hash
;
193 /* List of chars besides those in app.c:symbol_chars that can start an
194 operand. Used to prevent the scrubber eating vital white-space. */
195 const char ia64_symbol_chars
[] = "@?";
197 /* Characters which always start a comment. */
198 const char comment_chars
[] = "";
200 /* Characters which start a comment at the beginning of a line. */
201 const char line_comment_chars
[] = "#";
203 /* Characters which may be used to separate multiple commands on a
205 const char line_separator_chars
[] = ";{}";
207 /* Characters which are used to indicate an exponent in a floating
209 const char EXP_CHARS
[] = "eE";
211 /* Characters which mean that a number is a floating point constant,
213 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
215 /* ia64-specific option processing: */
217 const char *md_shortopts
= "m:N:x::";
219 struct option md_longopts
[] =
221 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
222 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
223 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
224 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
227 size_t md_longopts_size
= sizeof (md_longopts
);
231 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
232 struct hash_control
*reg_hash
; /* register name hash table */
233 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
234 struct hash_control
*const_hash
; /* constant hash table */
235 struct hash_control
*entry_hash
; /* code entry hint hash table */
237 /* If X_op is != O_absent, the registername for the instruction's
238 qualifying predicate. If NULL, p0 is assumed for instructions
239 that are predictable. */
242 /* Optimize for which CPU. */
249 /* What to do when hint.b is used. */
261 explicit_mode
: 1, /* which mode we're in */
262 default_explicit_mode
: 1, /* which mode is the default */
263 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
265 keep_pending_output
: 1;
267 /* What to do when something is wrong with unwind directives. */
270 unwind_check_warning
,
274 /* Each bundle consists of up to three instructions. We keep
275 track of four most recent instructions so we can correctly set
276 the end_of_insn_group for the last instruction in a bundle. */
278 int num_slots_in_use
;
282 end_of_insn_group
: 1,
283 manual_bundling_on
: 1,
284 manual_bundling_off
: 1,
285 loc_directive_seen
: 1;
286 signed char user_template
; /* user-selected template, if any */
287 unsigned char qp_regno
; /* qualifying predicate */
288 /* This duplicates a good fraction of "struct fix" but we
289 can't use a "struct fix" instead since we can't call
290 fix_new_exp() until we know the address of the instruction. */
294 bfd_reloc_code_real_type code
;
295 enum ia64_opnd opnd
; /* type of operand in need of fix */
296 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
297 expressionS expr
; /* the value to be inserted */
299 fixup
[2]; /* at most two fixups per insn */
300 struct ia64_opcode
*idesc
;
301 struct label_fix
*label_fixups
;
302 struct label_fix
*tag_fixups
;
303 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
306 unsigned int src_line
;
307 struct dwarf2_line_info debug_line
;
315 struct dynreg
*next
; /* next dynamic register */
317 unsigned short base
; /* the base register number */
318 unsigned short num_regs
; /* # of registers in this set */
320 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
322 flagword flags
; /* ELF-header flags */
325 unsigned hint
:1; /* is this hint currently valid? */
326 bfd_vma offset
; /* mem.offset offset */
327 bfd_vma base
; /* mem.offset base */
330 int path
; /* number of alt. entry points seen */
331 const char **entry_labels
; /* labels of all alternate paths in
332 the current DV-checking block. */
333 int maxpaths
; /* size currently allocated for
336 int pointer_size
; /* size in bytes of a pointer */
337 int pointer_size_shift
; /* shift size of a pointer for alignment */
339 symbolS
*indregsym
[IND_RR
- IND_CPUID
+ 1];
343 /* These are not const, because they are modified to MMI for non-itanium1
345 /* MFI bundle of nops. */
346 static unsigned char le_nop
[16] =
348 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
349 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
351 /* MFI bundle of nops with stop-bit. */
352 static unsigned char le_nop_stop
[16] =
354 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
355 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
358 /* application registers: */
364 #define AR_BSPSTORE 18
390 {"ar.k0", AR_K0
}, {"ar.k1", AR_K0
+ 1},
391 {"ar.k2", AR_K0
+ 2}, {"ar.k3", AR_K0
+ 3},
392 {"ar.k4", AR_K0
+ 4}, {"ar.k5", AR_K0
+ 5},
393 {"ar.k6", AR_K0
+ 6}, {"ar.k7", AR_K7
},
394 {"ar.rsc", AR_RSC
}, {"ar.bsp", AR_BSP
},
395 {"ar.bspstore", AR_BSPSTORE
}, {"ar.rnat", AR_RNAT
},
396 {"ar.fcr", AR_FCR
}, {"ar.eflag", AR_EFLAG
},
397 {"ar.csd", AR_CSD
}, {"ar.ssd", AR_SSD
},
398 {"ar.cflg", AR_CFLG
}, {"ar.fsr", AR_FSR
},
399 {"ar.fir", AR_FIR
}, {"ar.fdr", AR_FDR
},
400 {"ar.ccv", AR_CCV
}, {"ar.unat", AR_UNAT
},
401 {"ar.fpsr", AR_FPSR
}, {"ar.itc", AR_ITC
},
402 {"ar.ruc", AR_RUC
}, {"ar.pfs", AR_PFS
},
403 {"ar.lc", AR_LC
}, {"ar.ec", AR_EC
},
406 /* control registers: */
447 {"cr.gpta", CR_GPTA
},
448 {"cr.ipsr", CR_IPSR
},
452 {"cr.itir", CR_ITIR
},
453 {"cr.iipa", CR_IIPA
},
457 {"cr.iib0", CR_IIB0
},
458 {"cr.iib1", CR_IIB1
},
463 {"cr.irr0", CR_IRR0
},
464 {"cr.irr1", CR_IRR0
+ 1},
465 {"cr.irr2", CR_IRR0
+ 2},
466 {"cr.irr3", CR_IRR3
},
469 {"cr.cmcv", CR_CMCV
},
470 {"cr.lrr0", CR_LRR0
},
479 static const struct const_desc
486 /* PSR constant masks: */
489 {"psr.be", ((valueT
) 1) << 1},
490 {"psr.up", ((valueT
) 1) << 2},
491 {"psr.ac", ((valueT
) 1) << 3},
492 {"psr.mfl", ((valueT
) 1) << 4},
493 {"psr.mfh", ((valueT
) 1) << 5},
495 {"psr.ic", ((valueT
) 1) << 13},
496 {"psr.i", ((valueT
) 1) << 14},
497 {"psr.pk", ((valueT
) 1) << 15},
499 {"psr.dt", ((valueT
) 1) << 17},
500 {"psr.dfl", ((valueT
) 1) << 18},
501 {"psr.dfh", ((valueT
) 1) << 19},
502 {"psr.sp", ((valueT
) 1) << 20},
503 {"psr.pp", ((valueT
) 1) << 21},
504 {"psr.di", ((valueT
) 1) << 22},
505 {"psr.si", ((valueT
) 1) << 23},
506 {"psr.db", ((valueT
) 1) << 24},
507 {"psr.lp", ((valueT
) 1) << 25},
508 {"psr.tb", ((valueT
) 1) << 26},
509 {"psr.rt", ((valueT
) 1) << 27},
510 /* 28-31: reserved */
511 /* 32-33: cpl (current privilege level) */
512 {"psr.is", ((valueT
) 1) << 34},
513 {"psr.mc", ((valueT
) 1) << 35},
514 {"psr.it", ((valueT
) 1) << 36},
515 {"psr.id", ((valueT
) 1) << 37},
516 {"psr.da", ((valueT
) 1) << 38},
517 {"psr.dd", ((valueT
) 1) << 39},
518 {"psr.ss", ((valueT
) 1) << 40},
519 /* 41-42: ri (restart instruction) */
520 {"psr.ed", ((valueT
) 1) << 43},
521 {"psr.bn", ((valueT
) 1) << 44},
524 /* indirect register-sets/memory: */
533 { "CPUID", IND_CPUID
},
534 { "cpuid", IND_CPUID
},
543 { "dahr", IND_DAHR
},
547 /* Pseudo functions used to indicate relocation types (these functions
548 start with an at sign (@). */
570 /* reloc pseudo functions (these must come first!): */
571 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
572 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
573 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
574 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
575 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
576 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
577 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
578 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
579 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
580 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
581 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
582 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
583 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
584 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
585 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
586 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
587 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
589 { "slotcount", PSEUDO_FUNC_RELOC
, { 0 } },
592 /* mbtype4 constants: */
593 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
594 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
595 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
596 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
597 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
599 /* fclass constants: */
600 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
601 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
602 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
603 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
604 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
605 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
606 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
607 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
608 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
610 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
612 /* hint constants: */
613 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
614 { "priority", PSEUDO_FUNC_CONST
, { 0x1 } },
617 { "clz", PSEUDO_FUNC_CONST
, { 32 } },
618 { "mpy", PSEUDO_FUNC_CONST
, { 33 } },
619 { "datahints", PSEUDO_FUNC_CONST
, { 34 } },
621 /* unwind-related constants: */
622 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
623 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
624 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
625 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_GNU
} },
626 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
627 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
628 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
630 /* unwind-related registers: */
631 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
634 /* 41-bit nop opcodes (one per unit): */
635 static const bfd_vma nop
[IA64_NUM_UNITS
] =
637 0x0000000000LL
, /* NIL => break 0 */
638 0x0008000000LL
, /* I-unit nop */
639 0x0008000000LL
, /* M-unit nop */
640 0x4000000000LL
, /* B-unit nop */
641 0x0008000000LL
, /* F-unit nop */
642 0x0000000000LL
, /* L-"unit" nop immediate */
643 0x0008000000LL
, /* X-unit nop */
646 /* Can't be `const' as it's passed to input routines (which have the
647 habit of setting temporary sentinels. */
648 static char special_section_name
[][20] =
650 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
651 {".IA_64.unwind"}, {".IA_64.unwind_info"},
652 {".init_array"}, {".fini_array"}
655 /* The best template for a particular sequence of up to three
657 #define N IA64_NUM_TYPES
658 static unsigned char best_template
[N
][N
][N
];
661 /* Resource dependencies currently in effect */
663 int depind
; /* dependency index */
664 const struct ia64_dependency
*dependency
; /* actual dependency */
665 unsigned specific
:1, /* is this a specific bit/regno? */
666 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
667 int index
; /* specific regno/bit within dependency */
668 int note
; /* optional qualifying note (0 if none) */
672 int insn_srlz
; /* current insn serialization state */
673 int data_srlz
; /* current data serialization state */
674 int qp_regno
; /* qualifying predicate for this usage */
675 char *file
; /* what file marked this dependency */
676 unsigned int line
; /* what line marked this dependency */
677 struct mem_offset mem_offset
; /* optional memory offset hint */
678 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
679 int path
; /* corresponding code entry index */
681 static int regdepslen
= 0;
682 static int regdepstotlen
= 0;
683 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
684 static const char *dv_sem
[] = { "none", "implied", "impliedf",
685 "data", "instr", "specific", "stop", "other" };
686 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
688 /* Current state of PR mutexation */
689 static struct qpmutex
{
692 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
693 static int qp_mutexeslen
= 0;
694 static int qp_mutexestotlen
= 0;
695 static valueT qp_safe_across_calls
= 0;
697 /* Current state of PR implications */
698 static struct qp_imply
{
701 unsigned p2_branched
:1;
703 } *qp_implies
= NULL
;
704 static int qp_implieslen
= 0;
705 static int qp_impliestotlen
= 0;
707 /* Keep track of static GR values so that indirect register usage can
708 sometimes be tracked. */
719 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
725 /* Remember the alignment frag. */
726 static fragS
*align_frag
;
728 /* These are the routines required to output the various types of
731 /* A slot_number is a frag address plus the slot index (0-2). We use the
732 frag address here so that if there is a section switch in the middle of
733 a function, then instructions emitted to a different section are not
734 counted. Since there may be more than one frag for a function, this
735 means we also need to keep track of which frag this address belongs to
736 so we can compute inter-frag distances. This also nicely solves the
737 problem with nops emitted for align directives, which can't easily be
738 counted, but can easily be derived from frag sizes. */
740 typedef struct unw_rec_list
{
742 unsigned long slot_number
;
744 struct unw_rec_list
*next
;
747 #define SLOT_NUM_NOT_SET (unsigned)-1
749 /* Linked list of saved prologue counts. A very poor
750 implementation of a map from label numbers to prologue counts. */
751 typedef struct label_prologue_count
753 struct label_prologue_count
*next
;
754 unsigned long label_number
;
755 unsigned int prologue_count
;
756 } label_prologue_count
;
758 typedef struct proc_pending
761 struct proc_pending
*next
;
766 /* Maintain a list of unwind entries for the current function. */
770 /* Any unwind entries that should be attached to the current slot
771 that an insn is being constructed for. */
772 unw_rec_list
*current_entry
;
774 /* These are used to create the unwind table entry for this function. */
775 proc_pending proc_pending
;
776 symbolS
*info
; /* pointer to unwind info */
777 symbolS
*personality_routine
;
779 subsegT saved_text_subseg
;
780 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
782 /* TRUE if processing unwind directives in a prologue region. */
783 unsigned int prologue
: 1;
784 unsigned int prologue_mask
: 4;
785 unsigned int prologue_gr
: 7;
786 unsigned int body
: 1;
787 unsigned int insn
: 1;
788 unsigned int prologue_count
; /* number of .prologues seen so far */
789 /* Prologue counts at previous .label_state directives. */
790 struct label_prologue_count
* saved_prologue_counts
;
792 /* List of split up .save-s. */
793 unw_p_record
*pending_saves
;
796 /* The input value is a negated offset from psp, and specifies an address
797 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
798 must add 16 and divide by 4 to get the encoded value. */
800 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
802 typedef void (*vbyte_func
) (int, char *, char *);
804 /* Forward declarations: */
805 static void dot_alias (int);
806 static int parse_operand_and_eval (expressionS
*, int);
807 static void emit_one_bundle (void);
808 static bfd_reloc_code_real_type
ia64_gen_real_reloc_type (struct symbol
*,
809 bfd_reloc_code_real_type
);
810 static void insn_group_break (int, int, int);
811 static void add_qp_mutex (valueT
);
812 static void add_qp_imply (int, int);
813 static void clear_qp_mutex (valueT
);
814 static void clear_qp_implies (valueT
, valueT
);
815 static void print_dependency (const char *, int);
816 static void instruction_serialization (void);
817 static void data_serialization (void);
818 static void output_R3_format (vbyte_func
, unw_record_type
, unsigned long);
819 static void output_B3_format (vbyte_func
, unsigned long, unsigned long);
820 static void output_B4_format (vbyte_func
, unw_record_type
, unsigned long);
821 static void free_saved_prologue_counts (void);
823 /* Determine if application register REGNUM resides only in the integer
824 unit (as opposed to the memory unit). */
826 ar_is_only_in_integer_unit (int reg
)
829 return reg
>= 64 && reg
<= 111;
832 /* Determine if application register REGNUM resides only in the memory
833 unit (as opposed to the integer unit). */
835 ar_is_only_in_memory_unit (int reg
)
838 return reg
>= 0 && reg
<= 47;
841 /* Switch to section NAME and create section if necessary. It's
842 rather ugly that we have to manipulate input_line_pointer but I
843 don't see any other way to accomplish the same thing without
844 changing obj-elf.c (which may be the Right Thing, in the end). */
846 set_section (char *name
)
848 char *saved_input_line_pointer
;
850 saved_input_line_pointer
= input_line_pointer
;
851 input_line_pointer
= name
;
853 input_line_pointer
= saved_input_line_pointer
;
856 /* Map 's' to SHF_IA_64_SHORT. */
859 ia64_elf_section_letter (int letter
, char **ptr_msg
)
862 return SHF_IA_64_SHORT
;
863 else if (letter
== 'o')
864 return SHF_LINK_ORDER
;
866 else if (letter
== 'O')
867 return SHF_IA_64_VMS_OVERLAID
;
868 else if (letter
== 'g')
869 return SHF_IA_64_VMS_GLOBAL
;
872 *ptr_msg
= _("bad .section directive: want a,o,s,w,x,M,S,G,T in string");
876 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
879 ia64_elf_section_flags (flagword flags
,
881 int type ATTRIBUTE_UNUSED
)
883 if (attr
& SHF_IA_64_SHORT
)
884 flags
|= SEC_SMALL_DATA
;
889 ia64_elf_section_type (const char *str
, size_t len
)
891 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
893 if (STREQ (ELF_STRING_ia64_unwind_info
))
896 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
899 if (STREQ (ELF_STRING_ia64_unwind
))
900 return SHT_IA_64_UNWIND
;
902 if (STREQ (ELF_STRING_ia64_unwind_once
))
903 return SHT_IA_64_UNWIND
;
905 if (STREQ ("unwind"))
906 return SHT_IA_64_UNWIND
;
913 set_regstack (unsigned int ins
,
921 sof
= ins
+ locs
+ outs
;
924 as_bad (_("Size of frame exceeds maximum of 96 registers"));
929 as_warn (_("Size of rotating registers exceeds frame size"));
932 md
.in
.base
= REG_GR
+ 32;
933 md
.loc
.base
= md
.in
.base
+ ins
;
934 md
.out
.base
= md
.loc
.base
+ locs
;
936 md
.in
.num_regs
= ins
;
937 md
.loc
.num_regs
= locs
;
938 md
.out
.num_regs
= outs
;
939 md
.rot
.num_regs
= rots
;
944 ia64_flush_insns (void)
946 struct label_fix
*lfix
;
948 subsegT saved_subseg
;
952 if (!md
.last_text_seg
)
956 saved_subseg
= now_subseg
;
958 subseg_set (md
.last_text_seg
, 0);
960 while (md
.num_slots_in_use
> 0)
961 emit_one_bundle (); /* force out queued instructions */
963 /* In case there are labels following the last instruction, resolve
966 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
968 symbol_set_value_now (lfix
->sym
);
969 mark
|= lfix
->dw2_mark_labels
;
973 dwarf2_where (&CURR_SLOT
.debug_line
);
974 CURR_SLOT
.debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
975 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT
.debug_line
);
976 dwarf2_consume_line_info ();
978 CURR_SLOT
.label_fixups
= 0;
980 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
981 symbol_set_value_now (lfix
->sym
);
982 CURR_SLOT
.tag_fixups
= 0;
984 /* In case there are unwind directives following the last instruction,
985 resolve those now. We only handle prologue, body, and endp directives
986 here. Give an error for others. */
987 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
995 ptr
->slot_number
= (unsigned long) frag_more (0);
996 ptr
->slot_frag
= frag_now
;
999 /* Allow any record which doesn't have a "t" field (i.e.,
1000 doesn't relate to a particular instruction). */
1016 as_bad (_("Unwind directive not followed by an instruction."));
1020 unwind
.current_entry
= NULL
;
1022 subseg_set (saved_seg
, saved_subseg
);
1024 if (md
.qp
.X_op
== O_register
)
1025 as_bad (_("qualifying predicate not followed by instruction"));
1029 ia64_do_align (int nbytes
)
1031 char *saved_input_line_pointer
= input_line_pointer
;
1033 input_line_pointer
= "";
1034 s_align_bytes (nbytes
);
1035 input_line_pointer
= saved_input_line_pointer
;
1039 ia64_cons_align (int nbytes
)
1043 char *saved_input_line_pointer
= input_line_pointer
;
1044 input_line_pointer
= "";
1045 s_align_bytes (nbytes
);
1046 input_line_pointer
= saved_input_line_pointer
;
1052 /* .vms_common section, symbol, size, alignment */
1055 obj_elf_vms_common (int ignore ATTRIBUTE_UNUSED
)
1064 segT current_seg
= now_seg
;
1065 subsegT current_subseg
= now_subseg
;
1069 sec_name
= obj_elf_section_name ();
1070 if (sec_name
== NULL
)
1075 if (*input_line_pointer
== ',')
1077 input_line_pointer
++;
1082 as_bad (_("expected ',' after section name"));
1083 ignore_rest_of_line ();
1087 sym_name
= input_line_pointer
;
1088 c
= get_symbol_end ();
1090 if (input_line_pointer
== sym_name
)
1092 *input_line_pointer
= c
;
1093 as_bad (_("expected symbol name"));
1094 ignore_rest_of_line ();
1098 symbolP
= symbol_find_or_make (sym_name
);
1099 *input_line_pointer
= c
;
1101 if ((S_IS_DEFINED (symbolP
) || symbol_equated_p (symbolP
))
1102 && !S_IS_COMMON (symbolP
))
1104 as_bad (_("Ignoring attempt to re-define symbol"));
1105 ignore_rest_of_line ();
1111 if (*input_line_pointer
== ',')
1113 input_line_pointer
++;
1118 as_bad (_("expected ',' after symbol name"));
1119 ignore_rest_of_line ();
1123 temp
= get_absolute_expression ();
1125 size
&= ((offsetT
) 2 << (stdoutput
->arch_info
->bits_per_address
- 1)) - 1;
1128 as_warn (_("size (%ld) out of range, ignored"), (long) temp
);
1129 ignore_rest_of_line ();
1135 if (*input_line_pointer
== ',')
1137 input_line_pointer
++;
1142 as_bad (_("expected ',' after symbol size"));
1143 ignore_rest_of_line ();
1147 log_align
= get_absolute_expression ();
1149 demand_empty_rest_of_line ();
1151 obj_elf_change_section
1152 (sec_name
, SHT_NOBITS
,
1153 SHF_ALLOC
| SHF_WRITE
| SHF_IA_64_VMS_OVERLAID
| SHF_IA_64_VMS_GLOBAL
,
1156 S_SET_VALUE (symbolP
, 0);
1157 S_SET_SIZE (symbolP
, size
);
1158 S_SET_EXTERNAL (symbolP
);
1159 S_SET_SEGMENT (symbolP
, now_seg
);
1161 symbol_get_bfdsym (symbolP
)->flags
|= BSF_OBJECT
;
1163 record_alignment (now_seg
, log_align
);
1165 cur_size
= bfd_section_size (stdoutput
, now_seg
);
1166 if ((int) size
> cur_size
)
1169 = frag_var (rs_fill
, 1, 1, (relax_substateT
)0, NULL
,
1170 (valueT
)size
- (valueT
)cur_size
, NULL
);
1172 bfd_section_size (stdoutput
, now_seg
) = size
;
1175 /* Switch back to current segment. */
1176 subseg_set (current_seg
, current_subseg
);
1178 #ifdef md_elf_section_change_hook
1179 md_elf_section_change_hook ();
1185 /* Output COUNT bytes to a memory location. */
1186 static char *vbyte_mem_ptr
= NULL
;
1189 output_vbyte_mem (int count
, char *ptr
, char *comment ATTRIBUTE_UNUSED
)
1192 if (vbyte_mem_ptr
== NULL
)
1197 for (x
= 0; x
< count
; x
++)
1198 *(vbyte_mem_ptr
++) = ptr
[x
];
1201 /* Count the number of bytes required for records. */
1202 static int vbyte_count
= 0;
1204 count_output (int count
,
1205 char *ptr ATTRIBUTE_UNUSED
,
1206 char *comment ATTRIBUTE_UNUSED
)
1208 vbyte_count
+= count
;
1212 output_R1_format (vbyte_func f
, unw_record_type rtype
, int rlen
)
1218 output_R3_format (f
, rtype
, rlen
);
1224 else if (rtype
!= prologue
)
1225 as_bad (_("record type is not valid"));
1227 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1228 (*f
) (1, &byte
, NULL
);
1232 output_R2_format (vbyte_func f
, int mask
, int grsave
, unsigned long rlen
)
1236 mask
= (mask
& 0x0f);
1237 grsave
= (grsave
& 0x7f);
1239 bytes
[0] = (UNW_R2
| (mask
>> 1));
1240 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1241 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1242 (*f
) (count
, bytes
, NULL
);
1246 output_R3_format (vbyte_func f
, unw_record_type rtype
, unsigned long rlen
)
1252 output_R1_format (f
, rtype
, rlen
);
1258 else if (rtype
!= prologue
)
1259 as_bad (_("record type is not valid"));
1260 bytes
[0] = (UNW_R3
| r
);
1261 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1262 (*f
) (count
+ 1, bytes
, NULL
);
1266 output_P1_format (vbyte_func f
, int brmask
)
1269 byte
= UNW_P1
| (brmask
& 0x1f);
1270 (*f
) (1, &byte
, NULL
);
1274 output_P2_format (vbyte_func f
, int brmask
, int gr
)
1277 brmask
= (brmask
& 0x1f);
1278 bytes
[0] = UNW_P2
| (brmask
>> 1);
1279 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1280 (*f
) (2, bytes
, NULL
);
1284 output_P3_format (vbyte_func f
, unw_record_type rtype
, int reg
)
1328 as_bad (_("Invalid record type for P3 format."));
1330 bytes
[0] = (UNW_P3
| (r
>> 1));
1331 bytes
[1] = (((r
& 1) << 7) | reg
);
1332 (*f
) (2, bytes
, NULL
);
1336 output_P4_format (vbyte_func f
, unsigned char *imask
, unsigned long imask_size
)
1339 (*f
) (imask_size
, (char *) imask
, NULL
);
1343 output_P5_format (vbyte_func f
, int grmask
, unsigned long frmask
)
1346 grmask
= (grmask
& 0x0f);
1349 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1350 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1351 bytes
[3] = (frmask
& 0x000000ff);
1352 (*f
) (4, bytes
, NULL
);
1356 output_P6_format (vbyte_func f
, unw_record_type rtype
, int rmask
)
1361 if (rtype
== gr_mem
)
1363 else if (rtype
!= fr_mem
)
1364 as_bad (_("Invalid record type for format P6"));
1365 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1366 (*f
) (1, &byte
, NULL
);
1370 output_P7_format (vbyte_func f
,
1371 unw_record_type rtype
,
1378 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1383 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1433 bytes
[0] = (UNW_P7
| r
);
1434 (*f
) (count
, bytes
, NULL
);
1438 output_P8_format (vbyte_func f
, unw_record_type rtype
, unsigned long t
)
1476 case bspstore_psprel
:
1479 case bspstore_sprel
:
1491 case priunat_when_gr
:
1494 case priunat_psprel
:
1500 case priunat_when_mem
:
1507 count
+= output_leb128 (bytes
+ 2, t
, 0);
1508 (*f
) (count
, bytes
, NULL
);
1512 output_P9_format (vbyte_func f
, int grmask
, int gr
)
1516 bytes
[1] = (grmask
& 0x0f);
1517 bytes
[2] = (gr
& 0x7f);
1518 (*f
) (3, bytes
, NULL
);
1522 output_P10_format (vbyte_func f
, int abi
, int context
)
1526 bytes
[1] = (abi
& 0xff);
1527 bytes
[2] = (context
& 0xff);
1528 (*f
) (3, bytes
, NULL
);
1532 output_B1_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1538 output_B4_format (f
, rtype
, label
);
1541 if (rtype
== copy_state
)
1543 else if (rtype
!= label_state
)
1544 as_bad (_("Invalid record type for format B1"));
1546 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1547 (*f
) (1, &byte
, NULL
);
1551 output_B2_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1557 output_B3_format (f
, ecount
, t
);
1560 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1561 count
+= output_leb128 (bytes
+ 1, t
, 0);
1562 (*f
) (count
, bytes
, NULL
);
1566 output_B3_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1572 output_B2_format (f
, ecount
, t
);
1576 count
+= output_leb128 (bytes
+ 1, t
, 0);
1577 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1578 (*f
) (count
, bytes
, NULL
);
1582 output_B4_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1589 output_B1_format (f
, rtype
, label
);
1593 if (rtype
== copy_state
)
1595 else if (rtype
!= label_state
)
1596 as_bad (_("Invalid record type for format B1"));
1598 bytes
[0] = (UNW_B4
| (r
<< 3));
1599 count
+= output_leb128 (bytes
+ 1, label
, 0);
1600 (*f
) (count
, bytes
, NULL
);
1604 format_ab_reg (int ab
, int reg
)
1609 ret
= (ab
<< 5) | reg
;
1614 output_X1_format (vbyte_func f
,
1615 unw_record_type rtype
,
1626 if (rtype
== spill_sprel
)
1628 else if (rtype
!= spill_psprel
)
1629 as_bad (_("Invalid record type for format X1"));
1630 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1631 count
+= output_leb128 (bytes
+ 2, t
, 0);
1632 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1633 (*f
) (count
, bytes
, NULL
);
1637 output_X2_format (vbyte_func f
,
1648 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1649 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1650 count
+= output_leb128 (bytes
+ 3, t
, 0);
1651 (*f
) (count
, bytes
, NULL
);
1655 output_X3_format (vbyte_func f
,
1656 unw_record_type rtype
,
1668 if (rtype
== spill_sprel_p
)
1670 else if (rtype
!= spill_psprel_p
)
1671 as_bad (_("Invalid record type for format X3"));
1672 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1673 bytes
[2] = format_ab_reg (ab
, reg
);
1674 count
+= output_leb128 (bytes
+ 3, t
, 0);
1675 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1676 (*f
) (count
, bytes
, NULL
);
1680 output_X4_format (vbyte_func f
,
1692 bytes
[1] = (qp
& 0x3f);
1693 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1694 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1695 count
+= output_leb128 (bytes
+ 4, t
, 0);
1696 (*f
) (count
, bytes
, NULL
);
1699 /* This function checks whether there are any outstanding .save-s and
1700 discards them if so. */
1703 check_pending_save (void)
1705 if (unwind
.pending_saves
)
1707 unw_rec_list
*cur
, *prev
;
1709 as_warn (_("Previous .save incomplete"));
1710 for (cur
= unwind
.list
, prev
= NULL
; cur
; )
1711 if (&cur
->r
.record
.p
== unwind
.pending_saves
)
1714 prev
->next
= cur
->next
;
1716 unwind
.list
= cur
->next
;
1717 if (cur
== unwind
.tail
)
1719 if (cur
== unwind
.current_entry
)
1720 unwind
.current_entry
= cur
->next
;
1721 /* Don't free the first discarded record, it's being used as
1722 terminator for (currently) br_gr and gr_gr processing, and
1723 also prevents leaving a dangling pointer to it in its
1725 cur
->r
.record
.p
.grmask
= 0;
1726 cur
->r
.record
.p
.brmask
= 0;
1727 cur
->r
.record
.p
.frmask
= 0;
1728 prev
= cur
->r
.record
.p
.next
;
1729 cur
->r
.record
.p
.next
= NULL
;
1741 cur
= cur
->r
.record
.p
.next
;
1744 unwind
.pending_saves
= NULL
;
1748 /* This function allocates a record list structure, and initializes fields. */
1750 static unw_rec_list
*
1751 alloc_record (unw_record_type t
)
1754 ptr
= xmalloc (sizeof (*ptr
));
1755 memset (ptr
, 0, sizeof (*ptr
));
1756 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1761 /* Dummy unwind record used for calculating the length of the last prologue or
1764 static unw_rec_list
*
1767 unw_rec_list
*ptr
= alloc_record (endp
);
1771 static unw_rec_list
*
1772 output_prologue (void)
1774 unw_rec_list
*ptr
= alloc_record (prologue
);
1775 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1779 static unw_rec_list
*
1780 output_prologue_gr (unsigned int saved_mask
, unsigned int reg
)
1782 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1783 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1784 ptr
->r
.record
.r
.grmask
= saved_mask
;
1785 ptr
->r
.record
.r
.grsave
= reg
;
1789 static unw_rec_list
*
1792 unw_rec_list
*ptr
= alloc_record (body
);
1796 static unw_rec_list
*
1797 output_mem_stack_f (unsigned int size
)
1799 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1800 ptr
->r
.record
.p
.size
= size
;
1804 static unw_rec_list
*
1805 output_mem_stack_v (void)
1807 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1811 static unw_rec_list
*
1812 output_psp_gr (unsigned int gr
)
1814 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1815 ptr
->r
.record
.p
.r
.gr
= gr
;
1819 static unw_rec_list
*
1820 output_psp_sprel (unsigned int offset
)
1822 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1823 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1827 static unw_rec_list
*
1828 output_rp_when (void)
1830 unw_rec_list
*ptr
= alloc_record (rp_when
);
1834 static unw_rec_list
*
1835 output_rp_gr (unsigned int gr
)
1837 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1838 ptr
->r
.record
.p
.r
.gr
= gr
;
1842 static unw_rec_list
*
1843 output_rp_br (unsigned int br
)
1845 unw_rec_list
*ptr
= alloc_record (rp_br
);
1846 ptr
->r
.record
.p
.r
.br
= br
;
1850 static unw_rec_list
*
1851 output_rp_psprel (unsigned int offset
)
1853 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1854 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1858 static unw_rec_list
*
1859 output_rp_sprel (unsigned int offset
)
1861 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1862 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1866 static unw_rec_list
*
1867 output_pfs_when (void)
1869 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1873 static unw_rec_list
*
1874 output_pfs_gr (unsigned int gr
)
1876 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1877 ptr
->r
.record
.p
.r
.gr
= gr
;
1881 static unw_rec_list
*
1882 output_pfs_psprel (unsigned int offset
)
1884 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1885 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1889 static unw_rec_list
*
1890 output_pfs_sprel (unsigned int offset
)
1892 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1893 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1897 static unw_rec_list
*
1898 output_preds_when (void)
1900 unw_rec_list
*ptr
= alloc_record (preds_when
);
1904 static unw_rec_list
*
1905 output_preds_gr (unsigned int gr
)
1907 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1908 ptr
->r
.record
.p
.r
.gr
= gr
;
1912 static unw_rec_list
*
1913 output_preds_psprel (unsigned int offset
)
1915 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1916 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1920 static unw_rec_list
*
1921 output_preds_sprel (unsigned int offset
)
1923 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1924 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1928 static unw_rec_list
*
1929 output_fr_mem (unsigned int mask
)
1931 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1932 unw_rec_list
*cur
= ptr
;
1934 ptr
->r
.record
.p
.frmask
= mask
;
1935 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1938 unw_rec_list
*prev
= cur
;
1940 /* Clear least significant set bit. */
1941 mask
&= ~(mask
& (~mask
+ 1));
1944 cur
= alloc_record (fr_mem
);
1945 cur
->r
.record
.p
.frmask
= mask
;
1946 /* Retain only least significant bit. */
1947 prev
->r
.record
.p
.frmask
^= mask
;
1948 prev
->r
.record
.p
.next
= cur
;
1952 static unw_rec_list
*
1953 output_frgr_mem (unsigned int gr_mask
, unsigned int fr_mask
)
1955 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1956 unw_rec_list
*cur
= ptr
;
1958 unwind
.pending_saves
= &cur
->r
.record
.p
;
1959 cur
->r
.record
.p
.frmask
= fr_mask
;
1962 unw_rec_list
*prev
= cur
;
1964 /* Clear least significant set bit. */
1965 fr_mask
&= ~(fr_mask
& (~fr_mask
+ 1));
1966 if (!gr_mask
&& !fr_mask
)
1968 cur
= alloc_record (frgr_mem
);
1969 cur
->r
.record
.p
.frmask
= fr_mask
;
1970 /* Retain only least significant bit. */
1971 prev
->r
.record
.p
.frmask
^= fr_mask
;
1972 prev
->r
.record
.p
.next
= cur
;
1974 cur
->r
.record
.p
.grmask
= gr_mask
;
1977 unw_rec_list
*prev
= cur
;
1979 /* Clear least significant set bit. */
1980 gr_mask
&= ~(gr_mask
& (~gr_mask
+ 1));
1983 cur
= alloc_record (frgr_mem
);
1984 cur
->r
.record
.p
.grmask
= gr_mask
;
1985 /* Retain only least significant bit. */
1986 prev
->r
.record
.p
.grmask
^= gr_mask
;
1987 prev
->r
.record
.p
.next
= cur
;
1991 static unw_rec_list
*
1992 output_gr_gr (unsigned int mask
, unsigned int reg
)
1994 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1995 unw_rec_list
*cur
= ptr
;
1997 ptr
->r
.record
.p
.grmask
= mask
;
1998 ptr
->r
.record
.p
.r
.gr
= reg
;
1999 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2002 unw_rec_list
*prev
= cur
;
2004 /* Clear least significant set bit. */
2005 mask
&= ~(mask
& (~mask
+ 1));
2008 cur
= alloc_record (gr_gr
);
2009 cur
->r
.record
.p
.grmask
= mask
;
2010 /* Indicate this record shouldn't be output. */
2011 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2012 /* Retain only least significant bit. */
2013 prev
->r
.record
.p
.grmask
^= mask
;
2014 prev
->r
.record
.p
.next
= cur
;
2018 static unw_rec_list
*
2019 output_gr_mem (unsigned int mask
)
2021 unw_rec_list
*ptr
= alloc_record (gr_mem
);
2022 unw_rec_list
*cur
= ptr
;
2024 ptr
->r
.record
.p
.grmask
= mask
;
2025 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2028 unw_rec_list
*prev
= cur
;
2030 /* Clear least significant set bit. */
2031 mask
&= ~(mask
& (~mask
+ 1));
2034 cur
= alloc_record (gr_mem
);
2035 cur
->r
.record
.p
.grmask
= mask
;
2036 /* Retain only least significant bit. */
2037 prev
->r
.record
.p
.grmask
^= mask
;
2038 prev
->r
.record
.p
.next
= cur
;
2042 static unw_rec_list
*
2043 output_br_mem (unsigned int mask
)
2045 unw_rec_list
*ptr
= alloc_record (br_mem
);
2046 unw_rec_list
*cur
= ptr
;
2048 ptr
->r
.record
.p
.brmask
= mask
;
2049 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2052 unw_rec_list
*prev
= cur
;
2054 /* Clear least significant set bit. */
2055 mask
&= ~(mask
& (~mask
+ 1));
2058 cur
= alloc_record (br_mem
);
2059 cur
->r
.record
.p
.brmask
= mask
;
2060 /* Retain only least significant bit. */
2061 prev
->r
.record
.p
.brmask
^= mask
;
2062 prev
->r
.record
.p
.next
= cur
;
2066 static unw_rec_list
*
2067 output_br_gr (unsigned int mask
, unsigned int reg
)
2069 unw_rec_list
*ptr
= alloc_record (br_gr
);
2070 unw_rec_list
*cur
= ptr
;
2072 ptr
->r
.record
.p
.brmask
= mask
;
2073 ptr
->r
.record
.p
.r
.gr
= reg
;
2074 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2077 unw_rec_list
*prev
= cur
;
2079 /* Clear least significant set bit. */
2080 mask
&= ~(mask
& (~mask
+ 1));
2083 cur
= alloc_record (br_gr
);
2084 cur
->r
.record
.p
.brmask
= mask
;
2085 /* Indicate this record shouldn't be output. */
2086 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2087 /* Retain only least significant bit. */
2088 prev
->r
.record
.p
.brmask
^= mask
;
2089 prev
->r
.record
.p
.next
= cur
;
2093 static unw_rec_list
*
2094 output_spill_base (unsigned int offset
)
2096 unw_rec_list
*ptr
= alloc_record (spill_base
);
2097 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2101 static unw_rec_list
*
2102 output_unat_when (void)
2104 unw_rec_list
*ptr
= alloc_record (unat_when
);
2108 static unw_rec_list
*
2109 output_unat_gr (unsigned int gr
)
2111 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2112 ptr
->r
.record
.p
.r
.gr
= gr
;
2116 static unw_rec_list
*
2117 output_unat_psprel (unsigned int offset
)
2119 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2120 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2124 static unw_rec_list
*
2125 output_unat_sprel (unsigned int offset
)
2127 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2128 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2132 static unw_rec_list
*
2133 output_lc_when (void)
2135 unw_rec_list
*ptr
= alloc_record (lc_when
);
2139 static unw_rec_list
*
2140 output_lc_gr (unsigned int gr
)
2142 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2143 ptr
->r
.record
.p
.r
.gr
= gr
;
2147 static unw_rec_list
*
2148 output_lc_psprel (unsigned int offset
)
2150 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2151 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2155 static unw_rec_list
*
2156 output_lc_sprel (unsigned int offset
)
2158 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2159 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2163 static unw_rec_list
*
2164 output_fpsr_when (void)
2166 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2170 static unw_rec_list
*
2171 output_fpsr_gr (unsigned int gr
)
2173 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2174 ptr
->r
.record
.p
.r
.gr
= gr
;
2178 static unw_rec_list
*
2179 output_fpsr_psprel (unsigned int offset
)
2181 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2182 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2186 static unw_rec_list
*
2187 output_fpsr_sprel (unsigned int offset
)
2189 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2190 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2194 static unw_rec_list
*
2195 output_priunat_when_gr (void)
2197 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2201 static unw_rec_list
*
2202 output_priunat_when_mem (void)
2204 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2208 static unw_rec_list
*
2209 output_priunat_gr (unsigned int gr
)
2211 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2212 ptr
->r
.record
.p
.r
.gr
= gr
;
2216 static unw_rec_list
*
2217 output_priunat_psprel (unsigned int offset
)
2219 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2220 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2224 static unw_rec_list
*
2225 output_priunat_sprel (unsigned int offset
)
2227 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2228 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2232 static unw_rec_list
*
2233 output_bsp_when (void)
2235 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2239 static unw_rec_list
*
2240 output_bsp_gr (unsigned int gr
)
2242 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2243 ptr
->r
.record
.p
.r
.gr
= gr
;
2247 static unw_rec_list
*
2248 output_bsp_psprel (unsigned int offset
)
2250 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2251 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2255 static unw_rec_list
*
2256 output_bsp_sprel (unsigned int offset
)
2258 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2259 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2263 static unw_rec_list
*
2264 output_bspstore_when (void)
2266 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2270 static unw_rec_list
*
2271 output_bspstore_gr (unsigned int gr
)
2273 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2274 ptr
->r
.record
.p
.r
.gr
= gr
;
2278 static unw_rec_list
*
2279 output_bspstore_psprel (unsigned int offset
)
2281 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2282 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2286 static unw_rec_list
*
2287 output_bspstore_sprel (unsigned int offset
)
2289 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2290 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2294 static unw_rec_list
*
2295 output_rnat_when (void)
2297 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2301 static unw_rec_list
*
2302 output_rnat_gr (unsigned int gr
)
2304 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2305 ptr
->r
.record
.p
.r
.gr
= gr
;
2309 static unw_rec_list
*
2310 output_rnat_psprel (unsigned int offset
)
2312 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2313 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2317 static unw_rec_list
*
2318 output_rnat_sprel (unsigned int offset
)
2320 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2321 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2325 static unw_rec_list
*
2326 output_unwabi (unsigned long abi
, unsigned long context
)
2328 unw_rec_list
*ptr
= alloc_record (unwabi
);
2329 ptr
->r
.record
.p
.abi
= abi
;
2330 ptr
->r
.record
.p
.context
= context
;
2334 static unw_rec_list
*
2335 output_epilogue (unsigned long ecount
)
2337 unw_rec_list
*ptr
= alloc_record (epilogue
);
2338 ptr
->r
.record
.b
.ecount
= ecount
;
2342 static unw_rec_list
*
2343 output_label_state (unsigned long label
)
2345 unw_rec_list
*ptr
= alloc_record (label_state
);
2346 ptr
->r
.record
.b
.label
= label
;
2350 static unw_rec_list
*
2351 output_copy_state (unsigned long label
)
2353 unw_rec_list
*ptr
= alloc_record (copy_state
);
2354 ptr
->r
.record
.b
.label
= label
;
2358 static unw_rec_list
*
2359 output_spill_psprel (unsigned int ab
,
2361 unsigned int offset
,
2362 unsigned int predicate
)
2364 unw_rec_list
*ptr
= alloc_record (predicate
? spill_psprel_p
: spill_psprel
);
2365 ptr
->r
.record
.x
.ab
= ab
;
2366 ptr
->r
.record
.x
.reg
= reg
;
2367 ptr
->r
.record
.x
.where
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2368 ptr
->r
.record
.x
.qp
= predicate
;
2372 static unw_rec_list
*
2373 output_spill_sprel (unsigned int ab
,
2375 unsigned int offset
,
2376 unsigned int predicate
)
2378 unw_rec_list
*ptr
= alloc_record (predicate
? spill_sprel_p
: spill_sprel
);
2379 ptr
->r
.record
.x
.ab
= ab
;
2380 ptr
->r
.record
.x
.reg
= reg
;
2381 ptr
->r
.record
.x
.where
.spoff
= offset
/ 4;
2382 ptr
->r
.record
.x
.qp
= predicate
;
2386 static unw_rec_list
*
2387 output_spill_reg (unsigned int ab
,
2389 unsigned int targ_reg
,
2391 unsigned int predicate
)
2393 unw_rec_list
*ptr
= alloc_record (predicate
? spill_reg_p
: spill_reg
);
2394 ptr
->r
.record
.x
.ab
= ab
;
2395 ptr
->r
.record
.x
.reg
= reg
;
2396 ptr
->r
.record
.x
.where
.reg
= targ_reg
;
2397 ptr
->r
.record
.x
.xy
= xy
;
2398 ptr
->r
.record
.x
.qp
= predicate
;
2402 /* Given a unw_rec_list process the correct format with the
2403 specified function. */
2406 process_one_record (unw_rec_list
*ptr
, vbyte_func f
)
2408 unsigned int fr_mask
, gr_mask
;
2410 switch (ptr
->r
.type
)
2412 /* This is a dummy record that takes up no space in the output. */
2420 /* These are taken care of by prologue/prologue_gr. */
2425 if (ptr
->r
.type
== prologue_gr
)
2426 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2427 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2429 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2431 /* Output descriptor(s) for union of register spills (if any). */
2432 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2433 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2436 if ((fr_mask
& ~0xfUL
) == 0)
2437 output_P6_format (f
, fr_mem
, fr_mask
);
2440 output_P5_format (f
, gr_mask
, fr_mask
);
2445 output_P6_format (f
, gr_mem
, gr_mask
);
2446 if (ptr
->r
.record
.r
.mask
.br_mem
)
2447 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2449 /* output imask descriptor if necessary: */
2450 if (ptr
->r
.record
.r
.mask
.i
)
2451 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2452 ptr
->r
.record
.r
.imask_size
);
2456 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2460 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2461 ptr
->r
.record
.p
.size
);
2474 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.r
.gr
);
2477 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.r
.br
);
2480 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.off
.sp
, 0);
2488 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2497 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
, 0);
2507 case bspstore_sprel
:
2509 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.sp
);
2512 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2514 const unw_rec_list
*cur
= ptr
;
2516 gr_mask
= cur
->r
.record
.p
.grmask
;
2517 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2518 gr_mask
|= cur
->r
.record
.p
.grmask
;
2519 output_P9_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2523 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2525 const unw_rec_list
*cur
= ptr
;
2527 gr_mask
= cur
->r
.record
.p
.brmask
;
2528 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2529 gr_mask
|= cur
->r
.record
.p
.brmask
;
2530 output_P2_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2534 as_bad (_("spill_mask record unimplemented."));
2536 case priunat_when_gr
:
2537 case priunat_when_mem
:
2541 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2543 case priunat_psprel
:
2545 case bspstore_psprel
:
2547 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
);
2550 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2553 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2557 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2560 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2561 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2562 ptr
->r
.record
.x
.where
.pspoff
);
2565 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2566 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2567 ptr
->r
.record
.x
.where
.spoff
);
2570 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2571 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2572 ptr
->r
.record
.x
.where
.reg
, ptr
->r
.record
.x
.t
);
2574 case spill_psprel_p
:
2575 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2576 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2577 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.pspoff
);
2580 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2581 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2582 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.spoff
);
2585 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2586 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2587 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.where
.reg
,
2591 as_bad (_("record_type_not_valid"));
2596 /* Given a unw_rec_list list, process all the records with
2597 the specified function. */
2599 process_unw_records (unw_rec_list
*list
, vbyte_func f
)
2602 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2603 process_one_record (ptr
, f
);
2606 /* Determine the size of a record list in bytes. */
2608 calc_record_size (unw_rec_list
*list
)
2611 process_unw_records (list
, count_output
);
2615 /* Return the number of bits set in the input value.
2616 Perhaps this has a better place... */
2617 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2618 # define popcount __builtin_popcount
2621 popcount (unsigned x
)
2623 static const unsigned char popcnt
[16] =
2631 if (x
< NELEMS (popcnt
))
2633 return popcnt
[x
% NELEMS (popcnt
)] + popcount (x
/ NELEMS (popcnt
));
2637 /* Update IMASK bitmask to reflect the fact that one or more registers
2638 of type TYPE are saved starting at instruction with index T. If N
2639 bits are set in REGMASK, it is assumed that instructions T through
2640 T+N-1 save these registers.
2644 1: instruction saves next fp reg
2645 2: instruction saves next general reg
2646 3: instruction saves next branch reg */
2648 set_imask (unw_rec_list
*region
,
2649 unsigned long regmask
,
2653 unsigned char *imask
;
2654 unsigned long imask_size
;
2658 imask
= region
->r
.record
.r
.mask
.i
;
2659 imask_size
= region
->r
.record
.r
.imask_size
;
2662 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2663 imask
= xmalloc (imask_size
);
2664 memset (imask
, 0, imask_size
);
2666 region
->r
.record
.r
.imask_size
= imask_size
;
2667 region
->r
.record
.r
.mask
.i
= imask
;
2671 pos
= 2 * (3 - t
% 4);
2674 if (i
>= imask_size
)
2676 as_bad (_("Ignoring attempt to spill beyond end of region"));
2680 imask
[i
] |= (type
& 0x3) << pos
;
2682 regmask
&= (regmask
- 1);
2692 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2693 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2694 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2697 static unsigned long
2698 slot_index (unsigned long slot_addr
,
2700 unsigned long first_addr
,
2704 unsigned long s_index
= 0;
2706 /* First time we are called, the initial address and frag are invalid. */
2707 if (first_addr
== 0)
2710 /* If the two addresses are in different frags, then we need to add in
2711 the remaining size of this frag, and then the entire size of intermediate
2713 while (slot_frag
!= first_frag
)
2715 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2719 /* We can get the final addresses only during and after
2721 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2722 s_index
+= 3 * ((first_frag
->fr_next
->fr_address
2723 - first_frag
->fr_address
2724 - first_frag
->fr_fix
) >> 4);
2727 /* We don't know what the final addresses will be. We try our
2728 best to estimate. */
2729 switch (first_frag
->fr_type
)
2735 as_fatal (_("Only constant space allocation is supported"));
2741 /* Take alignment into account. Assume the worst case
2742 before relaxation. */
2743 s_index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2747 if (first_frag
->fr_symbol
)
2749 as_fatal (_("Only constant offsets are supported"));
2753 s_index
+= 3 * (first_frag
->fr_offset
>> 4);
2757 /* Add in the full size of the frag converted to instruction slots. */
2758 s_index
+= 3 * (first_frag
->fr_fix
>> 4);
2759 /* Subtract away the initial part before first_addr. */
2760 s_index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2761 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2763 /* Move to the beginning of the next frag. */
2764 first_frag
= first_frag
->fr_next
;
2765 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2767 /* This can happen if there is section switching in the middle of a
2768 function, causing the frag chain for the function to be broken.
2769 It is too difficult to recover safely from this problem, so we just
2770 exit with an error. */
2771 if (first_frag
== NULL
)
2772 as_fatal (_("Section switching in code is not supported."));
2775 /* Add in the used part of the last frag. */
2776 s_index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2777 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2781 /* Optimize unwind record directives. */
2783 static unw_rec_list
*
2784 optimize_unw_records (unw_rec_list
*list
)
2789 /* If the only unwind record is ".prologue" or ".prologue" followed
2790 by ".body", then we can optimize the unwind directives away. */
2791 if (list
->r
.type
== prologue
2792 && (list
->next
->r
.type
== endp
2793 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2799 /* Given a complete record list, process any records which have
2800 unresolved fields, (ie length counts for a prologue). After
2801 this has been run, all necessary information should be available
2802 within each record to generate an image. */
2805 fixup_unw_records (unw_rec_list
*list
, int before_relax
)
2807 unw_rec_list
*ptr
, *region
= 0;
2808 unsigned long first_addr
= 0, rlen
= 0, t
;
2809 fragS
*first_frag
= 0;
2811 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2813 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2814 as_bad (_(" Insn slot not set in unwind record."));
2815 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2816 first_addr
, first_frag
, before_relax
);
2817 switch (ptr
->r
.type
)
2825 unsigned long last_addr
= 0;
2826 fragS
*last_frag
= NULL
;
2828 first_addr
= ptr
->slot_number
;
2829 first_frag
= ptr
->slot_frag
;
2830 /* Find either the next body/prologue start, or the end of
2831 the function, and determine the size of the region. */
2832 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2833 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2834 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2836 last_addr
= last
->slot_number
;
2837 last_frag
= last
->slot_frag
;
2840 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2842 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2843 if (ptr
->r
.type
== body
)
2844 /* End of region. */
2852 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2854 /* This happens when a memory-stack-less procedure uses a
2855 ".restore sp" directive at the end of a region to pop
2857 ptr
->r
.record
.b
.t
= 0;
2868 case priunat_when_gr
:
2869 case priunat_when_mem
:
2873 ptr
->r
.record
.p
.t
= t
;
2881 case spill_psprel_p
:
2882 ptr
->r
.record
.x
.t
= t
;
2888 as_bad (_("frgr_mem record before region record!"));
2891 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2892 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2893 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2894 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2899 as_bad (_("fr_mem record before region record!"));
2902 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2903 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2908 as_bad (_("gr_mem record before region record!"));
2911 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2912 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2917 as_bad (_("br_mem record before region record!"));
2920 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2921 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2927 as_bad (_("gr_gr record before region record!"));
2930 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2935 as_bad (_("br_gr record before region record!"));
2938 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2947 /* Estimate the size of a frag before relaxing. We only have one type of frag
2948 to handle here, which is the unwind info frag. */
2951 ia64_estimate_size_before_relax (fragS
*frag
,
2952 asection
*segtype ATTRIBUTE_UNUSED
)
2957 /* ??? This code is identical to the first part of ia64_convert_frag. */
2958 list
= (unw_rec_list
*) frag
->fr_opcode
;
2959 fixup_unw_records (list
, 0);
2961 len
= calc_record_size (list
);
2962 /* pad to pointer-size boundary. */
2963 pad
= len
% md
.pointer_size
;
2965 len
+= md
.pointer_size
- pad
;
2966 /* Add 8 for the header. */
2968 /* Add a pointer for the personality offset. */
2969 if (frag
->fr_offset
)
2970 size
+= md
.pointer_size
;
2972 /* fr_var carries the max_chars that we created the fragment with.
2973 We must, of course, have allocated enough memory earlier. */
2974 gas_assert (frag
->fr_var
>= size
);
2976 return frag
->fr_fix
+ size
;
2979 /* This function converts a rs_machine_dependent variant frag into a
2980 normal fill frag with the unwind image from the record list. */
2982 ia64_convert_frag (fragS
*frag
)
2988 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2989 list
= (unw_rec_list
*) frag
->fr_opcode
;
2990 fixup_unw_records (list
, 0);
2992 len
= calc_record_size (list
);
2993 /* pad to pointer-size boundary. */
2994 pad
= len
% md
.pointer_size
;
2996 len
+= md
.pointer_size
- pad
;
2997 /* Add 8 for the header. */
2999 /* Add a pointer for the personality offset. */
3000 if (frag
->fr_offset
)
3001 size
+= md
.pointer_size
;
3003 /* fr_var carries the max_chars that we created the fragment with.
3004 We must, of course, have allocated enough memory earlier. */
3005 gas_assert (frag
->fr_var
>= size
);
3007 /* Initialize the header area. fr_offset is initialized with
3008 unwind.personality_routine. */
3009 if (frag
->fr_offset
)
3011 if (md
.flags
& EF_IA_64_ABI64
)
3012 flag_value
= (bfd_vma
) 3 << 32;
3014 /* 32-bit unwind info block. */
3015 flag_value
= (bfd_vma
) 0x1003 << 32;
3020 md_number_to_chars (frag
->fr_literal
,
3021 (((bfd_vma
) 1 << 48) /* Version. */
3022 | flag_value
/* U & E handler flags. */
3023 | (len
/ md
.pointer_size
)), /* Length. */
3026 /* Skip the header. */
3027 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
3028 process_unw_records (list
, output_vbyte_mem
);
3030 /* Fill the padding bytes with zeros. */
3032 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
3033 md
.pointer_size
- pad
);
3034 /* Fill the unwind personality with zeros. */
3035 if (frag
->fr_offset
)
3036 md_number_to_chars (frag
->fr_literal
+ size
- md
.pointer_size
, 0,
3039 frag
->fr_fix
+= size
;
3040 frag
->fr_type
= rs_fill
;
3042 frag
->fr_offset
= 0;
3046 parse_predicate_and_operand (expressionS
*e
, unsigned *qp
, const char *po
)
3048 int sep
= parse_operand_and_eval (e
, ',');
3050 *qp
= e
->X_add_number
- REG_P
;
3051 if (e
->X_op
!= O_register
|| *qp
> 63)
3053 as_bad (_("First operand to .%s must be a predicate"), po
);
3057 as_warn (_("Pointless use of p0 as first operand to .%s"), po
);
3059 sep
= parse_operand_and_eval (e
, ',');
3066 convert_expr_to_ab_reg (const expressionS
*e
,
3072 unsigned int reg
= e
->X_add_number
;
3074 *ab
= *regp
= 0; /* Anything valid is good here. */
3076 if (e
->X_op
!= O_register
)
3077 reg
= REG_GR
; /* Anything invalid is good here. */
3079 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
3082 *regp
= reg
- REG_GR
;
3084 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
3085 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
3088 *regp
= reg
- REG_FR
;
3090 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3093 *regp
= reg
- REG_BR
;
3100 case REG_PR
: *regp
= 0; break;
3101 case REG_PSP
: *regp
= 1; break;
3102 case REG_PRIUNAT
: *regp
= 2; break;
3103 case REG_BR
+ 0: *regp
= 3; break;
3104 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3105 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3106 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3107 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3108 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3109 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3110 case REG_AR
+ AR_LC
: *regp
= 10; break;
3113 as_bad (_("Operand %d to .%s must be a preserved register"), n
, po
);
3120 convert_expr_to_xy_reg (const expressionS
*e
,
3126 unsigned int reg
= e
->X_add_number
;
3128 *xy
= *regp
= 0; /* Anything valid is good here. */
3130 if (e
->X_op
!= O_register
)
3131 reg
= REG_GR
; /* Anything invalid is good here. */
3133 if (reg
>= (REG_GR
+ 1) && reg
<= (REG_GR
+ 127))
3136 *regp
= reg
- REG_GR
;
3138 else if (reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 127))
3141 *regp
= reg
- REG_FR
;
3143 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3146 *regp
= reg
- REG_BR
;
3149 as_bad (_("Operand %d to .%s must be a writable register"), n
, po
);
3155 /* The current frag is an alignment frag. */
3156 align_frag
= frag_now
;
3157 s_align_bytes (arg
);
3161 dot_radix (int dummy ATTRIBUTE_UNUSED
)
3168 if (is_it_end_of_statement ())
3170 radix
= input_line_pointer
;
3171 ch
= get_symbol_end ();
3172 ia64_canonicalize_symbol_name (radix
);
3173 if (strcasecmp (radix
, "C"))
3174 as_bad (_("Radix `%s' unsupported or invalid"), radix
);
3175 *input_line_pointer
= ch
;
3176 demand_empty_rest_of_line ();
3179 /* Helper function for .loc directives. If the assembler is not generating
3180 line number info, then we need to remember which instructions have a .loc
3181 directive, and only call dwarf2_gen_line_info for those instructions. */
3186 CURR_SLOT
.loc_directive_seen
= 1;
3187 dwarf2_directive_loc (x
);
3190 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3192 dot_special_section (int which
)
3194 set_section ((char *) special_section_name
[which
]);
3197 /* Return -1 for warning and 0 for error. */
3200 unwind_diagnostic (const char * region
, const char *directive
)
3202 if (md
.unwind_check
== unwind_check_warning
)
3204 as_warn (_(".%s outside of %s"), directive
, region
);
3209 as_bad (_(".%s outside of %s"), directive
, region
);
3210 ignore_rest_of_line ();
3215 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3216 a procedure but the unwind directive check is set to warning, 0 if
3217 a directive isn't in a procedure and the unwind directive check is set
3221 in_procedure (const char *directive
)
3223 if (unwind
.proc_pending
.sym
3224 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3226 return unwind_diagnostic ("procedure", directive
);
3229 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3230 a prologue but the unwind directive check is set to warning, 0 if
3231 a directive isn't in a prologue and the unwind directive check is set
3235 in_prologue (const char *directive
)
3237 int in
= in_procedure (directive
);
3239 if (in
> 0 && !unwind
.prologue
)
3240 in
= unwind_diagnostic ("prologue", directive
);
3241 check_pending_save ();
3245 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3246 a body but the unwind directive check is set to warning, 0 if
3247 a directive isn't in a body and the unwind directive check is set
3251 in_body (const char *directive
)
3253 int in
= in_procedure (directive
);
3255 if (in
> 0 && !unwind
.body
)
3256 in
= unwind_diagnostic ("body region", directive
);
3261 add_unwind_entry (unw_rec_list
*ptr
, int sep
)
3266 unwind
.tail
->next
= ptr
;
3271 /* The current entry can in fact be a chain of unwind entries. */
3272 if (unwind
.current_entry
== NULL
)
3273 unwind
.current_entry
= ptr
;
3276 /* The current entry can in fact be a chain of unwind entries. */
3277 if (unwind
.current_entry
== NULL
)
3278 unwind
.current_entry
= ptr
;
3282 /* Parse a tag permitted for the current directive. */
3286 ch
= get_symbol_end ();
3287 /* FIXME: For now, just issue a warning that this isn't implemented. */
3294 as_warn (_("Tags on unwind pseudo-ops aren't supported, yet"));
3297 *input_line_pointer
= ch
;
3299 if (sep
!= NOT_A_CHAR
)
3300 demand_empty_rest_of_line ();
3304 dot_fframe (int dummy ATTRIBUTE_UNUSED
)
3309 if (!in_prologue ("fframe"))
3312 sep
= parse_operand_and_eval (&e
, ',');
3314 if (e
.X_op
!= O_constant
)
3316 as_bad (_("First operand to .fframe must be a constant"));
3319 add_unwind_entry (output_mem_stack_f (e
.X_add_number
), sep
);
3323 dot_vframe (int dummy ATTRIBUTE_UNUSED
)
3329 if (!in_prologue ("vframe"))
3332 sep
= parse_operand_and_eval (&e
, ',');
3333 reg
= e
.X_add_number
- REG_GR
;
3334 if (e
.X_op
!= O_register
|| reg
> 127)
3336 as_bad (_("First operand to .vframe must be a general register"));
3339 add_unwind_entry (output_mem_stack_v (), sep
);
3340 if (! (unwind
.prologue_mask
& 2))
3341 add_unwind_entry (output_psp_gr (reg
), NOT_A_CHAR
);
3342 else if (reg
!= unwind
.prologue_gr
3343 + (unsigned) popcount (unwind
.prologue_mask
& (-2 << 1)))
3344 as_warn (_("Operand of .vframe contradicts .prologue"));
3348 dot_vframesp (int psp
)
3354 as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant"));
3356 if (!in_prologue ("vframesp"))
3359 sep
= parse_operand_and_eval (&e
, ',');
3360 if (e
.X_op
!= O_constant
)
3362 as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)"));
3365 add_unwind_entry (output_mem_stack_v (), sep
);
3366 add_unwind_entry (output_psp_sprel (e
.X_add_number
), NOT_A_CHAR
);
3370 dot_save (int dummy ATTRIBUTE_UNUSED
)
3373 unsigned reg1
, reg2
;
3376 if (!in_prologue ("save"))
3379 sep
= parse_operand_and_eval (&e1
, ',');
3381 sep
= parse_operand_and_eval (&e2
, ',');
3385 reg1
= e1
.X_add_number
;
3386 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3387 if (e1
.X_op
!= O_register
)
3389 as_bad (_("First operand to .save not a register"));
3390 reg1
= REG_PR
; /* Anything valid is good here. */
3392 reg2
= e2
.X_add_number
- REG_GR
;
3393 if (e2
.X_op
!= O_register
|| reg2
> 127)
3395 as_bad (_("Second operand to .save not a valid register"));
3400 case REG_AR
+ AR_BSP
:
3401 add_unwind_entry (output_bsp_when (), sep
);
3402 add_unwind_entry (output_bsp_gr (reg2
), NOT_A_CHAR
);
3404 case REG_AR
+ AR_BSPSTORE
:
3405 add_unwind_entry (output_bspstore_when (), sep
);
3406 add_unwind_entry (output_bspstore_gr (reg2
), NOT_A_CHAR
);
3408 case REG_AR
+ AR_RNAT
:
3409 add_unwind_entry (output_rnat_when (), sep
);
3410 add_unwind_entry (output_rnat_gr (reg2
), NOT_A_CHAR
);
3412 case REG_AR
+ AR_UNAT
:
3413 add_unwind_entry (output_unat_when (), sep
);
3414 add_unwind_entry (output_unat_gr (reg2
), NOT_A_CHAR
);
3416 case REG_AR
+ AR_FPSR
:
3417 add_unwind_entry (output_fpsr_when (), sep
);
3418 add_unwind_entry (output_fpsr_gr (reg2
), NOT_A_CHAR
);
3420 case REG_AR
+ AR_PFS
:
3421 add_unwind_entry (output_pfs_when (), sep
);
3422 if (! (unwind
.prologue_mask
& 4))
3423 add_unwind_entry (output_pfs_gr (reg2
), NOT_A_CHAR
);
3424 else if (reg2
!= unwind
.prologue_gr
3425 + (unsigned) popcount (unwind
.prologue_mask
& (-4 << 1)))
3426 as_warn (_("Second operand of .save contradicts .prologue"));
3428 case REG_AR
+ AR_LC
:
3429 add_unwind_entry (output_lc_when (), sep
);
3430 add_unwind_entry (output_lc_gr (reg2
), NOT_A_CHAR
);
3433 add_unwind_entry (output_rp_when (), sep
);
3434 if (! (unwind
.prologue_mask
& 8))
3435 add_unwind_entry (output_rp_gr (reg2
), NOT_A_CHAR
);
3436 else if (reg2
!= unwind
.prologue_gr
)
3437 as_warn (_("Second operand of .save contradicts .prologue"));
3440 add_unwind_entry (output_preds_when (), sep
);
3441 if (! (unwind
.prologue_mask
& 1))
3442 add_unwind_entry (output_preds_gr (reg2
), NOT_A_CHAR
);
3443 else if (reg2
!= unwind
.prologue_gr
3444 + (unsigned) popcount (unwind
.prologue_mask
& (-1 << 1)))
3445 as_warn (_("Second operand of .save contradicts .prologue"));
3448 add_unwind_entry (output_priunat_when_gr (), sep
);
3449 add_unwind_entry (output_priunat_gr (reg2
), NOT_A_CHAR
);
3452 as_bad (_("First operand to .save not a valid register"));
3453 add_unwind_entry (NULL
, sep
);
3459 dot_restore (int dummy ATTRIBUTE_UNUSED
)
3462 unsigned long ecount
; /* # of _additional_ regions to pop */
3465 if (!in_body ("restore"))
3468 sep
= parse_operand_and_eval (&e1
, ',');
3469 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3470 as_bad (_("First operand to .restore must be stack pointer (sp)"));
3476 sep
= parse_operand_and_eval (&e2
, ',');
3477 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3479 as_bad (_("Second operand to .restore must be a constant >= 0"));
3480 e2
.X_add_number
= 0;
3482 ecount
= e2
.X_add_number
;
3485 ecount
= unwind
.prologue_count
- 1;
3487 if (ecount
>= unwind
.prologue_count
)
3489 as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"),
3490 ecount
+ 1, unwind
.prologue_count
);
3494 add_unwind_entry (output_epilogue (ecount
), sep
);
3496 if (ecount
< unwind
.prologue_count
)
3497 unwind
.prologue_count
-= ecount
+ 1;
3499 unwind
.prologue_count
= 0;
3503 dot_restorereg (int pred
)
3505 unsigned int qp
, ab
, reg
;
3508 const char * const po
= pred
? "restorereg.p" : "restorereg";
3510 if (!in_procedure (po
))
3514 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3517 sep
= parse_operand_and_eval (&e
, ',');
3520 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3522 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0, qp
), sep
);
3525 static char *special_linkonce_name
[] =
3527 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3531 start_unwind_section (const segT text_seg
, int sec_index
)
3534 Use a slightly ugly scheme to derive the unwind section names from
3535 the text section name:
3537 text sect. unwind table sect.
3538 name: name: comments:
3539 ---------- ----------------- --------------------------------
3541 .text.foo .IA_64.unwind.text.foo
3542 .foo .IA_64.unwind.foo
3544 .gnu.linkonce.ia64unw.foo
3545 _info .IA_64.unwind_info gas issues error message (ditto)
3546 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3548 This mapping is done so that:
3550 (a) An object file with unwind info only in .text will use
3551 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3552 This follows the letter of the ABI and also ensures backwards
3553 compatibility with older toolchains.
3555 (b) An object file with unwind info in multiple text sections
3556 will use separate unwind sections for each text section.
3557 This allows us to properly set the "sh_info" and "sh_link"
3558 fields in SHT_IA_64_UNWIND as required by the ABI and also
3559 lets GNU ld support programs with multiple segments
3560 containing unwind info (as might be the case for certain
3561 embedded applications).
3563 (c) An error is issued if there would be a name clash.
3566 const char *text_name
, *sec_text_name
;
3568 const char *prefix
= special_section_name
[sec_index
];
3570 size_t prefix_len
, suffix_len
, sec_name_len
;
3572 sec_text_name
= segment_name (text_seg
);
3573 text_name
= sec_text_name
;
3574 if (strncmp (text_name
, "_info", 5) == 0)
3576 as_bad (_("Illegal section name `%s' (causes unwind section name clash)"),
3578 ignore_rest_of_line ();
3581 if (strcmp (text_name
, ".text") == 0)
3584 /* Build the unwind section name by appending the (possibly stripped)
3585 text section name to the unwind prefix. */
3587 if (strncmp (text_name
, ".gnu.linkonce.t.",
3588 sizeof (".gnu.linkonce.t.") - 1) == 0)
3590 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3591 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3594 prefix_len
= strlen (prefix
);
3595 suffix_len
= strlen (suffix
);
3596 sec_name_len
= prefix_len
+ suffix_len
;
3597 sec_name
= alloca (sec_name_len
+ 1);
3598 memcpy (sec_name
, prefix
, prefix_len
);
3599 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3600 sec_name
[sec_name_len
] = '\0';
3602 /* Handle COMDAT group. */
3603 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3604 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3607 size_t len
, group_name_len
;
3608 const char *group_name
= elf_group_name (text_seg
);
3610 if (group_name
== NULL
)
3612 as_bad (_("Group section `%s' has no group signature"),
3614 ignore_rest_of_line ();
3617 /* We have to construct a fake section directive. */
3618 group_name_len
= strlen (group_name
);
3620 + 16 /* ,"aG",@progbits, */
3621 + group_name_len
/* ,group_name */
3624 section
= alloca (len
+ 1);
3625 memcpy (section
, sec_name
, sec_name_len
);
3626 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3627 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3628 memcpy (section
+ len
- 7, ",comdat", 7);
3629 section
[len
] = '\0';
3630 set_section (section
);
3634 set_section (sec_name
);
3635 bfd_set_section_flags (stdoutput
, now_seg
,
3636 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3639 elf_linked_to_section (now_seg
) = text_seg
;
3643 generate_unwind_image (const segT text_seg
)
3648 /* Mark the end of the unwind info, so that we can compute the size of the
3649 last unwind region. */
3650 add_unwind_entry (output_endp (), NOT_A_CHAR
);
3652 /* Force out pending instructions, to make sure all unwind records have
3653 a valid slot_number field. */
3654 ia64_flush_insns ();
3656 /* Generate the unwind record. */
3657 list
= optimize_unw_records (unwind
.list
);
3658 fixup_unw_records (list
, 1);
3659 size
= calc_record_size (list
);
3661 if (size
> 0 || unwind
.force_unwind_entry
)
3663 unwind
.force_unwind_entry
= 0;
3664 /* pad to pointer-size boundary. */
3665 pad
= size
% md
.pointer_size
;
3667 size
+= md
.pointer_size
- pad
;
3668 /* Add 8 for the header. */
3670 /* Add a pointer for the personality offset. */
3671 if (unwind
.personality_routine
)
3672 size
+= md
.pointer_size
;
3675 /* If there are unwind records, switch sections, and output the info. */
3679 bfd_reloc_code_real_type reloc
;
3681 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3683 /* Make sure the section has 4 byte alignment for ILP32 and
3684 8 byte alignment for LP64. */
3685 frag_align (md
.pointer_size_shift
, 0, 0);
3686 record_alignment (now_seg
, md
.pointer_size_shift
);
3688 /* Set expression which points to start of unwind descriptor area. */
3689 unwind
.info
= expr_build_dot ();
3691 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3692 (offsetT
) (long) unwind
.personality_routine
,
3695 /* Add the personality address to the image. */
3696 if (unwind
.personality_routine
!= 0)
3698 exp
.X_op
= O_symbol
;
3699 exp
.X_add_symbol
= unwind
.personality_routine
;
3700 exp
.X_add_number
= 0;
3702 if (md
.flags
& EF_IA_64_BE
)
3704 if (md
.flags
& EF_IA_64_ABI64
)
3705 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3707 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3711 if (md
.flags
& EF_IA_64_ABI64
)
3712 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3714 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3717 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3718 md
.pointer_size
, &exp
, 0, reloc
);
3719 unwind
.personality_routine
= 0;
3723 free_saved_prologue_counts ();
3724 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3728 dot_handlerdata (int dummy ATTRIBUTE_UNUSED
)
3730 if (!in_procedure ("handlerdata"))
3732 unwind
.force_unwind_entry
= 1;
3734 /* Remember which segment we're in so we can switch back after .endp */
3735 unwind
.saved_text_seg
= now_seg
;
3736 unwind
.saved_text_subseg
= now_subseg
;
3738 /* Generate unwind info into unwind-info section and then leave that
3739 section as the currently active one so dataXX directives go into
3740 the language specific data area of the unwind info block. */
3741 generate_unwind_image (now_seg
);
3742 demand_empty_rest_of_line ();
3746 dot_unwentry (int dummy ATTRIBUTE_UNUSED
)
3748 if (!in_procedure ("unwentry"))
3750 unwind
.force_unwind_entry
= 1;
3751 demand_empty_rest_of_line ();
3755 dot_altrp (int dummy ATTRIBUTE_UNUSED
)
3760 if (!in_prologue ("altrp"))
3763 parse_operand_and_eval (&e
, 0);
3764 reg
= e
.X_add_number
- REG_BR
;
3765 if (e
.X_op
!= O_register
|| reg
> 7)
3767 as_bad (_("First operand to .altrp not a valid branch register"));
3770 add_unwind_entry (output_rp_br (reg
), 0);
3774 dot_savemem (int psprel
)
3779 const char * const po
= psprel
? "savepsp" : "savesp";
3781 if (!in_prologue (po
))
3784 sep
= parse_operand_and_eval (&e1
, ',');
3786 sep
= parse_operand_and_eval (&e2
, ',');
3790 reg1
= e1
.X_add_number
;
3791 val
= e2
.X_add_number
;
3793 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3794 if (e1
.X_op
!= O_register
)
3796 as_bad (_("First operand to .%s not a register"), po
);
3797 reg1
= REG_PR
; /* Anything valid is good here. */
3799 if (e2
.X_op
!= O_constant
)
3801 as_bad (_("Second operand to .%s not a constant"), po
);
3807 case REG_AR
+ AR_BSP
:
3808 add_unwind_entry (output_bsp_when (), sep
);
3809 add_unwind_entry ((psprel
3811 : output_bsp_sprel
) (val
), NOT_A_CHAR
);
3813 case REG_AR
+ AR_BSPSTORE
:
3814 add_unwind_entry (output_bspstore_when (), sep
);
3815 add_unwind_entry ((psprel
3816 ? output_bspstore_psprel
3817 : output_bspstore_sprel
) (val
), NOT_A_CHAR
);
3819 case REG_AR
+ AR_RNAT
:
3820 add_unwind_entry (output_rnat_when (), sep
);
3821 add_unwind_entry ((psprel
3822 ? output_rnat_psprel
3823 : output_rnat_sprel
) (val
), NOT_A_CHAR
);
3825 case REG_AR
+ AR_UNAT
:
3826 add_unwind_entry (output_unat_when (), sep
);
3827 add_unwind_entry ((psprel
3828 ? output_unat_psprel
3829 : output_unat_sprel
) (val
), NOT_A_CHAR
);
3831 case REG_AR
+ AR_FPSR
:
3832 add_unwind_entry (output_fpsr_when (), sep
);
3833 add_unwind_entry ((psprel
3834 ? output_fpsr_psprel
3835 : output_fpsr_sprel
) (val
), NOT_A_CHAR
);
3837 case REG_AR
+ AR_PFS
:
3838 add_unwind_entry (output_pfs_when (), sep
);
3839 add_unwind_entry ((psprel
3841 : output_pfs_sprel
) (val
), NOT_A_CHAR
);
3843 case REG_AR
+ AR_LC
:
3844 add_unwind_entry (output_lc_when (), sep
);
3845 add_unwind_entry ((psprel
3847 : output_lc_sprel
) (val
), NOT_A_CHAR
);
3850 add_unwind_entry (output_rp_when (), sep
);
3851 add_unwind_entry ((psprel
3853 : output_rp_sprel
) (val
), NOT_A_CHAR
);
3856 add_unwind_entry (output_preds_when (), sep
);
3857 add_unwind_entry ((psprel
3858 ? output_preds_psprel
3859 : output_preds_sprel
) (val
), NOT_A_CHAR
);
3862 add_unwind_entry (output_priunat_when_mem (), sep
);
3863 add_unwind_entry ((psprel
3864 ? output_priunat_psprel
3865 : output_priunat_sprel
) (val
), NOT_A_CHAR
);
3868 as_bad (_("First operand to .%s not a valid register"), po
);
3869 add_unwind_entry (NULL
, sep
);
3875 dot_saveg (int dummy ATTRIBUTE_UNUSED
)
3881 if (!in_prologue ("save.g"))
3884 sep
= parse_operand_and_eval (&e
, ',');
3886 grmask
= e
.X_add_number
;
3887 if (e
.X_op
!= O_constant
3888 || e
.X_add_number
<= 0
3889 || e
.X_add_number
> 0xf)
3891 as_bad (_("First operand to .save.g must be a positive 4-bit constant"));
3898 int n
= popcount (grmask
);
3900 parse_operand_and_eval (&e
, 0);
3901 reg
= e
.X_add_number
- REG_GR
;
3902 if (e
.X_op
!= O_register
|| reg
> 127)
3904 as_bad (_("Second operand to .save.g must be a general register"));
3907 else if (reg
> 128U - n
)
3909 as_bad (_("Second operand to .save.g must be the first of %d general registers"), n
);
3912 add_unwind_entry (output_gr_gr (grmask
, reg
), 0);
3915 add_unwind_entry (output_gr_mem (grmask
), 0);
3919 dot_savef (int dummy ATTRIBUTE_UNUSED
)
3923 if (!in_prologue ("save.f"))
3926 parse_operand_and_eval (&e
, 0);
3928 if (e
.X_op
!= O_constant
3929 || e
.X_add_number
<= 0
3930 || e
.X_add_number
> 0xfffff)
3932 as_bad (_("Operand to .save.f must be a positive 20-bit constant"));
3935 add_unwind_entry (output_fr_mem (e
.X_add_number
), 0);
3939 dot_saveb (int dummy ATTRIBUTE_UNUSED
)
3945 if (!in_prologue ("save.b"))
3948 sep
= parse_operand_and_eval (&e
, ',');
3950 brmask
= e
.X_add_number
;
3951 if (e
.X_op
!= O_constant
3952 || e
.X_add_number
<= 0
3953 || e
.X_add_number
> 0x1f)
3955 as_bad (_("First operand to .save.b must be a positive 5-bit constant"));
3962 int n
= popcount (brmask
);
3964 parse_operand_and_eval (&e
, 0);
3965 reg
= e
.X_add_number
- REG_GR
;
3966 if (e
.X_op
!= O_register
|| reg
> 127)
3968 as_bad (_("Second operand to .save.b must be a general register"));
3971 else if (reg
> 128U - n
)
3973 as_bad (_("Second operand to .save.b must be the first of %d general registers"), n
);
3976 add_unwind_entry (output_br_gr (brmask
, reg
), 0);
3979 add_unwind_entry (output_br_mem (brmask
), 0);
3983 dot_savegf (int dummy ATTRIBUTE_UNUSED
)
3987 if (!in_prologue ("save.gf"))
3990 if (parse_operand_and_eval (&e1
, ',') == ',')
3991 parse_operand_and_eval (&e2
, 0);
3995 if (e1
.X_op
!= O_constant
3996 || e1
.X_add_number
< 0
3997 || e1
.X_add_number
> 0xf)
3999 as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant"));
4001 e1
.X_add_number
= 0;
4003 if (e2
.X_op
!= O_constant
4004 || e2
.X_add_number
< 0
4005 || e2
.X_add_number
> 0xfffff)
4007 as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant"));
4009 e2
.X_add_number
= 0;
4011 if (e1
.X_op
== O_constant
4012 && e2
.X_op
== O_constant
4013 && e1
.X_add_number
== 0
4014 && e2
.X_add_number
== 0)
4015 as_bad (_("Operands to .save.gf may not be both zero"));
4017 add_unwind_entry (output_frgr_mem (e1
.X_add_number
, e2
.X_add_number
), 0);
4021 dot_spill (int dummy ATTRIBUTE_UNUSED
)
4025 if (!in_prologue ("spill"))
4028 parse_operand_and_eval (&e
, 0);
4030 if (e
.X_op
!= O_constant
)
4032 as_bad (_("Operand to .spill must be a constant"));
4035 add_unwind_entry (output_spill_base (e
.X_add_number
), 0);
4039 dot_spillreg (int pred
)
4042 unsigned int qp
, ab
, xy
, reg
, treg
;
4044 const char * const po
= pred
? "spillreg.p" : "spillreg";
4046 if (!in_procedure (po
))
4050 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4053 sep
= parse_operand_and_eval (&e
, ',');
4056 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4059 sep
= parse_operand_and_eval (&e
, ',');
4062 convert_expr_to_xy_reg (&e
, &xy
, &treg
, po
, 2 + pred
);
4064 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
, qp
), sep
);
4068 dot_spillmem (int psprel
)
4071 int pred
= (psprel
< 0), sep
;
4072 unsigned int qp
, ab
, reg
;
4078 po
= psprel
? "spillpsp.p" : "spillsp.p";
4081 po
= psprel
? "spillpsp" : "spillsp";
4083 if (!in_procedure (po
))
4087 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4090 sep
= parse_operand_and_eval (&e
, ',');
4093 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4096 sep
= parse_operand_and_eval (&e
, ',');
4099 if (e
.X_op
!= O_constant
)
4101 as_bad (_("Operand %d to .%s must be a constant"), 2 + pred
, po
);
4106 add_unwind_entry (output_spill_psprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4108 add_unwind_entry (output_spill_sprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4112 get_saved_prologue_count (unsigned long lbl
)
4114 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4116 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4120 return lpc
->prologue_count
;
4122 as_bad (_("Missing .label_state %ld"), lbl
);
4127 save_prologue_count (unsigned long lbl
, unsigned int count
)
4129 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4131 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4135 lpc
->prologue_count
= count
;
4138 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4140 new_lpc
->next
= unwind
.saved_prologue_counts
;
4141 new_lpc
->label_number
= lbl
;
4142 new_lpc
->prologue_count
= count
;
4143 unwind
.saved_prologue_counts
= new_lpc
;
4148 free_saved_prologue_counts ()
4150 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4151 label_prologue_count
*next
;
4160 unwind
.saved_prologue_counts
= NULL
;
4164 dot_label_state (int dummy ATTRIBUTE_UNUSED
)
4168 if (!in_body ("label_state"))
4171 parse_operand_and_eval (&e
, 0);
4172 if (e
.X_op
== O_constant
)
4173 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4176 as_bad (_("Operand to .label_state must be a constant"));
4179 add_unwind_entry (output_label_state (e
.X_add_number
), 0);
4183 dot_copy_state (int dummy ATTRIBUTE_UNUSED
)
4187 if (!in_body ("copy_state"))
4190 parse_operand_and_eval (&e
, 0);
4191 if (e
.X_op
== O_constant
)
4192 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4195 as_bad (_("Operand to .copy_state must be a constant"));
4198 add_unwind_entry (output_copy_state (e
.X_add_number
), 0);
4202 dot_unwabi (int dummy ATTRIBUTE_UNUSED
)
4207 if (!in_prologue ("unwabi"))
4210 sep
= parse_operand_and_eval (&e1
, ',');
4212 parse_operand_and_eval (&e2
, 0);
4216 if (e1
.X_op
!= O_constant
)
4218 as_bad (_("First operand to .unwabi must be a constant"));
4219 e1
.X_add_number
= 0;
4222 if (e2
.X_op
!= O_constant
)
4224 as_bad (_("Second operand to .unwabi must be a constant"));
4225 e2
.X_add_number
= 0;
4228 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
), 0);
4232 dot_personality (int dummy ATTRIBUTE_UNUSED
)
4235 if (!in_procedure ("personality"))
4238 name
= input_line_pointer
;
4239 c
= get_symbol_end ();
4240 p
= input_line_pointer
;
4241 unwind
.personality_routine
= symbol_find_or_make (name
);
4242 unwind
.force_unwind_entry
= 1;
4245 demand_empty_rest_of_line ();
4249 dot_proc (int dummy ATTRIBUTE_UNUSED
)
4253 proc_pending
*pending
, *last_pending
;
4255 if (unwind
.proc_pending
.sym
)
4257 (md
.unwind_check
== unwind_check_warning
4259 : as_bad
) (_("Missing .endp after previous .proc"));
4260 while (unwind
.proc_pending
.next
)
4262 pending
= unwind
.proc_pending
.next
;
4263 unwind
.proc_pending
.next
= pending
->next
;
4267 last_pending
= NULL
;
4269 /* Parse names of main and alternate entry points and mark them as
4270 function symbols: */
4274 name
= input_line_pointer
;
4275 c
= get_symbol_end ();
4276 p
= input_line_pointer
;
4278 as_bad (_("Empty argument of .proc"));
4281 sym
= symbol_find_or_make (name
);
4282 if (S_IS_DEFINED (sym
))
4283 as_bad (_("`%s' was already defined"), name
);
4284 else if (!last_pending
)
4286 unwind
.proc_pending
.sym
= sym
;
4287 last_pending
= &unwind
.proc_pending
;
4291 pending
= xmalloc (sizeof (*pending
));
4293 last_pending
= last_pending
->next
= pending
;
4295 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4299 if (*input_line_pointer
!= ',')
4301 ++input_line_pointer
;
4305 unwind
.proc_pending
.sym
= expr_build_dot ();
4306 last_pending
= &unwind
.proc_pending
;
4308 last_pending
->next
= NULL
;
4309 demand_empty_rest_of_line ();
4312 unwind
.prologue
= 0;
4313 unwind
.prologue_count
= 0;
4316 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4317 unwind
.personality_routine
= 0;
4321 dot_body (int dummy ATTRIBUTE_UNUSED
)
4323 if (!in_procedure ("body"))
4325 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4326 as_warn (_("Initial .body should precede any instructions"));
4327 check_pending_save ();
4329 unwind
.prologue
= 0;
4330 unwind
.prologue_mask
= 0;
4333 add_unwind_entry (output_body (), 0);
4337 dot_prologue (int dummy ATTRIBUTE_UNUSED
)
4339 unsigned mask
= 0, grsave
= 0;
4341 if (!in_procedure ("prologue"))
4343 if (unwind
.prologue
)
4345 as_bad (_(".prologue within prologue"));
4346 ignore_rest_of_line ();
4349 if (!unwind
.body
&& unwind
.insn
)
4350 as_warn (_("Initial .prologue should precede any instructions"));
4352 if (!is_it_end_of_statement ())
4355 int n
, sep
= parse_operand_and_eval (&e
, ',');
4357 if (e
.X_op
!= O_constant
4358 || e
.X_add_number
< 0
4359 || e
.X_add_number
> 0xf)
4360 as_bad (_("First operand to .prologue must be a positive 4-bit constant"));
4361 else if (e
.X_add_number
== 0)
4362 as_warn (_("Pointless use of zero first operand to .prologue"));
4364 mask
= e
.X_add_number
;
4365 n
= popcount (mask
);
4368 parse_operand_and_eval (&e
, 0);
4371 if (e
.X_op
== O_constant
4372 && e
.X_add_number
>= 0
4373 && e
.X_add_number
< 128)
4375 if (md
.unwind_check
== unwind_check_error
)
4376 as_warn (_("Using a constant as second operand to .prologue is deprecated"));
4377 grsave
= e
.X_add_number
;
4379 else if (e
.X_op
!= O_register
4380 || (grsave
= e
.X_add_number
- REG_GR
) > 127)
4382 as_bad (_("Second operand to .prologue must be a general register"));
4385 else if (grsave
> 128U - n
)
4387 as_bad (_("Second operand to .prologue must be the first of %d general registers"), n
);
4394 add_unwind_entry (output_prologue_gr (mask
, grsave
), 0);
4396 add_unwind_entry (output_prologue (), 0);
4398 unwind
.prologue
= 1;
4399 unwind
.prologue_mask
= mask
;
4400 unwind
.prologue_gr
= grsave
;
4402 ++unwind
.prologue_count
;
4406 dot_endp (int dummy ATTRIBUTE_UNUSED
)
4409 int bytes_per_address
;
4412 subsegT saved_subseg
;
4413 proc_pending
*pending
;
4414 int unwind_check
= md
.unwind_check
;
4416 md
.unwind_check
= unwind_check_error
;
4417 if (!in_procedure ("endp"))
4419 md
.unwind_check
= unwind_check
;
4421 if (unwind
.saved_text_seg
)
4423 saved_seg
= unwind
.saved_text_seg
;
4424 saved_subseg
= unwind
.saved_text_subseg
;
4425 unwind
.saved_text_seg
= NULL
;
4429 saved_seg
= now_seg
;
4430 saved_subseg
= now_subseg
;
4433 insn_group_break (1, 0, 0);
4435 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4437 generate_unwind_image (saved_seg
);
4439 if (unwind
.info
|| unwind
.force_unwind_entry
)
4443 subseg_set (md
.last_text_seg
, 0);
4444 proc_end
= expr_build_dot ();
4446 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4448 /* Make sure that section has 4 byte alignment for ILP32 and
4449 8 byte alignment for LP64. */
4450 record_alignment (now_seg
, md
.pointer_size_shift
);
4452 /* Need space for 3 pointers for procedure start, procedure end,
4454 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4455 where
= frag_now_fix () - (3 * md
.pointer_size
);
4456 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4458 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4459 e
.X_op
= O_pseudo_fixup
;
4460 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4462 if (!S_IS_LOCAL (unwind
.proc_pending
.sym
)
4463 && S_IS_DEFINED (unwind
.proc_pending
.sym
))
4464 e
.X_add_symbol
= symbol_temp_new (S_GET_SEGMENT (unwind
.proc_pending
.sym
),
4465 S_GET_VALUE (unwind
.proc_pending
.sym
),
4466 symbol_get_frag (unwind
.proc_pending
.sym
));
4468 e
.X_add_symbol
= unwind
.proc_pending
.sym
;
4469 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4471 e
.X_op
= O_pseudo_fixup
;
4472 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4474 e
.X_add_symbol
= proc_end
;
4475 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4476 bytes_per_address
, &e
);
4480 e
.X_op
= O_pseudo_fixup
;
4481 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4483 e
.X_add_symbol
= unwind
.info
;
4484 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4485 bytes_per_address
, &e
);
4488 subseg_set (saved_seg
, saved_subseg
);
4490 /* Set symbol sizes. */
4491 pending
= &unwind
.proc_pending
;
4492 if (S_GET_NAME (pending
->sym
))
4496 symbolS
*sym
= pending
->sym
;
4498 if (!S_IS_DEFINED (sym
))
4499 as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym
));
4500 else if (S_GET_SIZE (sym
) == 0
4501 && symbol_get_obj (sym
)->size
== NULL
)
4503 fragS
*frag
= symbol_get_frag (sym
);
4507 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4508 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4511 symbol_get_obj (sym
)->size
=
4512 (expressionS
*) xmalloc (sizeof (expressionS
));
4513 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4514 symbol_get_obj (sym
)->size
->X_add_symbol
4515 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4516 frag_now_fix (), frag_now
);
4517 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4518 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4522 } while ((pending
= pending
->next
) != NULL
);
4525 /* Parse names of main and alternate entry points. */
4531 name
= input_line_pointer
;
4532 c
= get_symbol_end ();
4533 p
= input_line_pointer
;
4535 (md
.unwind_check
== unwind_check_warning
4537 : as_bad
) (_("Empty argument of .endp"));
4540 symbolS
*sym
= symbol_find (name
);
4542 for (pending
= &unwind
.proc_pending
; pending
; pending
= pending
->next
)
4544 if (sym
== pending
->sym
)
4546 pending
->sym
= NULL
;
4550 if (!sym
|| !pending
)
4551 as_warn (_("`%s' was not specified with previous .proc"), name
);
4555 if (*input_line_pointer
!= ',')
4557 ++input_line_pointer
;
4559 demand_empty_rest_of_line ();
4561 /* Deliberately only checking for the main entry point here; the
4562 language spec even says all arguments to .endp are ignored. */
4563 if (unwind
.proc_pending
.sym
4564 && S_GET_NAME (unwind
.proc_pending
.sym
)
4565 && strcmp (S_GET_NAME (unwind
.proc_pending
.sym
), FAKE_LABEL_NAME
))
4566 as_warn (_("`%s' should be an operand to this .endp"),
4567 S_GET_NAME (unwind
.proc_pending
.sym
));
4568 while (unwind
.proc_pending
.next
)
4570 pending
= unwind
.proc_pending
.next
;
4571 unwind
.proc_pending
.next
= pending
->next
;
4574 unwind
.proc_pending
.sym
= unwind
.info
= NULL
;
4578 dot_template (int template_val
)
4580 CURR_SLOT
.user_template
= template_val
;
4584 dot_regstk (int dummy ATTRIBUTE_UNUSED
)
4586 int ins
, locs
, outs
, rots
;
4588 if (is_it_end_of_statement ())
4589 ins
= locs
= outs
= rots
= 0;
4592 ins
= get_absolute_expression ();
4593 if (*input_line_pointer
++ != ',')
4595 locs
= get_absolute_expression ();
4596 if (*input_line_pointer
++ != ',')
4598 outs
= get_absolute_expression ();
4599 if (*input_line_pointer
++ != ',')
4601 rots
= get_absolute_expression ();
4603 set_regstack (ins
, locs
, outs
, rots
);
4607 as_bad (_("Comma expected"));
4608 ignore_rest_of_line ();
4615 valueT num_alloced
= 0;
4616 struct dynreg
**drpp
, *dr
;
4617 int ch
, base_reg
= 0;
4623 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4624 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4625 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4629 /* First, remove existing names from hash table. */
4630 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4632 hash_delete (md
.dynreg_hash
, dr
->name
, FALSE
);
4633 /* FIXME: Free dr->name. */
4637 drpp
= &md
.dynreg
[type
];
4640 start
= input_line_pointer
;
4641 ch
= get_symbol_end ();
4642 len
= strlen (ia64_canonicalize_symbol_name (start
));
4643 *input_line_pointer
= ch
;
4646 if (*input_line_pointer
!= '[')
4648 as_bad (_("Expected '['"));
4651 ++input_line_pointer
; /* skip '[' */
4653 num_regs
= get_absolute_expression ();
4655 if (*input_line_pointer
++ != ']')
4657 as_bad (_("Expected ']'"));
4662 as_bad (_("Number of elements must be positive"));
4667 num_alloced
+= num_regs
;
4671 if (num_alloced
> md
.rot
.num_regs
)
4673 as_bad (_("Used more than the declared %d rotating registers"),
4679 if (num_alloced
> 96)
4681 as_bad (_("Used more than the available 96 rotating registers"));
4686 if (num_alloced
> 48)
4688 as_bad (_("Used more than the available 48 rotating registers"));
4699 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4700 memset (*drpp
, 0, sizeof (*dr
));
4703 name
= obstack_alloc (¬es
, len
+ 1);
4704 memcpy (name
, start
, len
);
4709 dr
->num_regs
= num_regs
;
4710 dr
->base
= base_reg
;
4712 base_reg
+= num_regs
;
4714 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4716 as_bad (_("Attempt to redefine register set `%s'"), name
);
4717 obstack_free (¬es
, name
);
4721 if (*input_line_pointer
!= ',')
4723 ++input_line_pointer
; /* skip comma */
4726 demand_empty_rest_of_line ();
4730 ignore_rest_of_line ();
4734 dot_byteorder (int byteorder
)
4736 segment_info_type
*seginfo
= seg_info (now_seg
);
4738 if (byteorder
== -1)
4740 if (seginfo
->tc_segment_info_data
.endian
== 0)
4741 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4742 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4745 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4747 if (target_big_endian
!= byteorder
)
4749 target_big_endian
= byteorder
;
4750 if (target_big_endian
)
4752 ia64_number_to_chars
= number_to_chars_bigendian
;
4753 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4757 ia64_number_to_chars
= number_to_chars_littleendian
;
4758 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4764 dot_psr (int dummy ATTRIBUTE_UNUSED
)
4771 option
= input_line_pointer
;
4772 ch
= get_symbol_end ();
4773 if (strcmp (option
, "lsb") == 0)
4774 md
.flags
&= ~EF_IA_64_BE
;
4775 else if (strcmp (option
, "msb") == 0)
4776 md
.flags
|= EF_IA_64_BE
;
4777 else if (strcmp (option
, "abi32") == 0)
4778 md
.flags
&= ~EF_IA_64_ABI64
;
4779 else if (strcmp (option
, "abi64") == 0)
4780 md
.flags
|= EF_IA_64_ABI64
;
4782 as_bad (_("Unknown psr option `%s'"), option
);
4783 *input_line_pointer
= ch
;
4786 if (*input_line_pointer
!= ',')
4789 ++input_line_pointer
;
4792 demand_empty_rest_of_line ();
4796 dot_ln (int dummy ATTRIBUTE_UNUSED
)
4798 new_logical_line (0, get_absolute_expression ());
4799 demand_empty_rest_of_line ();
4803 cross_section (int ref
, void (*builder
) (int), int ua
)
4806 int saved_auto_align
;
4807 unsigned int section_count
;
4810 start
= input_line_pointer
;
4816 name
= demand_copy_C_string (&len
);
4817 obstack_free(¬es
, name
);
4820 ignore_rest_of_line ();
4826 char c
= get_symbol_end ();
4828 if (input_line_pointer
== start
)
4830 as_bad (_("Missing section name"));
4831 ignore_rest_of_line ();
4834 *input_line_pointer
= c
;
4836 end
= input_line_pointer
;
4838 if (*input_line_pointer
!= ',')
4840 as_bad (_("Comma expected after section name"));
4841 ignore_rest_of_line ();
4845 end
= input_line_pointer
+ 1; /* skip comma */
4846 input_line_pointer
= start
;
4847 md
.keep_pending_output
= 1;
4848 section_count
= bfd_count_sections (stdoutput
);
4849 obj_elf_section (0);
4850 if (section_count
!= bfd_count_sections (stdoutput
))
4851 as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."));
4852 input_line_pointer
= end
;
4853 saved_auto_align
= md
.auto_align
;
4858 md
.auto_align
= saved_auto_align
;
4859 obj_elf_previous (0);
4860 md
.keep_pending_output
= 0;
4864 dot_xdata (int size
)
4866 cross_section (size
, cons
, 0);
4869 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4872 stmt_float_cons (int kind
)
4892 ia64_do_align (alignment
);
4897 stmt_cons_ua (int size
)
4899 int saved_auto_align
= md
.auto_align
;
4903 md
.auto_align
= saved_auto_align
;
4907 dot_xfloat_cons (int kind
)
4909 cross_section (kind
, stmt_float_cons
, 0);
4913 dot_xstringer (int zero
)
4915 cross_section (zero
, stringer
, 0);
4919 dot_xdata_ua (int size
)
4921 cross_section (size
, cons
, 1);
4925 dot_xfloat_cons_ua (int kind
)
4927 cross_section (kind
, float_cons
, 1);
4930 /* .reg.val <regname>,value */
4933 dot_reg_val (int dummy ATTRIBUTE_UNUSED
)
4937 expression_and_evaluate (®
);
4938 if (reg
.X_op
!= O_register
)
4940 as_bad (_("Register name expected"));
4941 ignore_rest_of_line ();
4943 else if (*input_line_pointer
++ != ',')
4945 as_bad (_("Comma expected"));
4946 ignore_rest_of_line ();
4950 valueT value
= get_absolute_expression ();
4951 int regno
= reg
.X_add_number
;
4952 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4953 as_warn (_("Register value annotation ignored"));
4956 gr_values
[regno
- REG_GR
].known
= 1;
4957 gr_values
[regno
- REG_GR
].value
= value
;
4958 gr_values
[regno
- REG_GR
].path
= md
.path
;
4961 demand_empty_rest_of_line ();
4966 .serialize.instruction
4969 dot_serialize (int type
)
4971 insn_group_break (0, 0, 0);
4973 instruction_serialization ();
4975 data_serialization ();
4976 insn_group_break (0, 0, 0);
4977 demand_empty_rest_of_line ();
4980 /* select dv checking mode
4985 A stop is inserted when changing modes
4989 dot_dv_mode (int type
)
4991 if (md
.manual_bundling
)
4992 as_warn (_("Directive invalid within a bundle"));
4994 if (type
== 'E' || type
== 'A')
4995 md
.mode_explicitly_set
= 0;
4997 md
.mode_explicitly_set
= 1;
5004 if (md
.explicit_mode
)
5005 insn_group_break (1, 0, 0);
5006 md
.explicit_mode
= 0;
5010 if (!md
.explicit_mode
)
5011 insn_group_break (1, 0, 0);
5012 md
.explicit_mode
= 1;
5016 if (md
.explicit_mode
!= md
.default_explicit_mode
)
5017 insn_group_break (1, 0, 0);
5018 md
.explicit_mode
= md
.default_explicit_mode
;
5019 md
.mode_explicitly_set
= 0;
5025 print_prmask (valueT mask
)
5029 for (regno
= 0; regno
< 64; regno
++)
5031 if (mask
& ((valueT
) 1 << regno
))
5033 fprintf (stderr
, "%s p%d", comma
, regno
);
5040 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5041 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5042 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5043 .pred.safe_across_calls p1 [, p2 [,...]]
5047 dot_pred_rel (int type
)
5051 int p1
= -1, p2
= -1;
5055 if (*input_line_pointer
== '"')
5058 char *form
= demand_copy_C_string (&len
);
5060 if (strcmp (form
, "mutex") == 0)
5062 else if (strcmp (form
, "clear") == 0)
5064 else if (strcmp (form
, "imply") == 0)
5066 obstack_free (¬es
, form
);
5068 else if (*input_line_pointer
== '@')
5070 char *form
= ++input_line_pointer
;
5071 char c
= get_symbol_end();
5073 if (strcmp (form
, "mutex") == 0)
5075 else if (strcmp (form
, "clear") == 0)
5077 else if (strcmp (form
, "imply") == 0)
5079 *input_line_pointer
= c
;
5083 as_bad (_("Missing predicate relation type"));
5084 ignore_rest_of_line ();
5089 as_bad (_("Unrecognized predicate relation type"));
5090 ignore_rest_of_line ();
5093 if (*input_line_pointer
== ',')
5094 ++input_line_pointer
;
5102 expressionS pr
, *pr1
, *pr2
;
5104 sep
= parse_operand_and_eval (&pr
, ',');
5105 if (pr
.X_op
== O_register
5106 && pr
.X_add_number
>= REG_P
5107 && pr
.X_add_number
<= REG_P
+ 63)
5109 regno
= pr
.X_add_number
- REG_P
;
5117 else if (type
!= 'i'
5118 && pr
.X_op
== O_subtract
5119 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5120 && pr1
->X_op
== O_register
5121 && pr1
->X_add_number
>= REG_P
5122 && pr1
->X_add_number
<= REG_P
+ 63
5123 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5124 && pr2
->X_op
== O_register
5125 && pr2
->X_add_number
>= REG_P
5126 && pr2
->X_add_number
<= REG_P
+ 63)
5131 regno
= pr1
->X_add_number
- REG_P
;
5132 stop
= pr2
->X_add_number
- REG_P
;
5135 as_bad (_("Bad register range"));
5136 ignore_rest_of_line ();
5139 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5140 count
+= stop
- regno
+ 1;
5144 as_bad (_("Predicate register expected"));
5145 ignore_rest_of_line ();
5149 as_warn (_("Duplicate predicate register ignored"));
5160 clear_qp_mutex (mask
);
5161 clear_qp_implies (mask
, (valueT
) 0);
5164 if (count
!= 2 || p1
== -1 || p2
== -1)
5165 as_bad (_("Predicate source and target required"));
5166 else if (p1
== 0 || p2
== 0)
5167 as_bad (_("Use of p0 is not valid in this context"));
5169 add_qp_imply (p1
, p2
);
5174 as_bad (_("At least two PR arguments expected"));
5179 as_bad (_("Use of p0 is not valid in this context"));
5182 add_qp_mutex (mask
);
5185 /* note that we don't override any existing relations */
5188 as_bad (_("At least one PR argument expected"));
5193 fprintf (stderr
, "Safe across calls: ");
5194 print_prmask (mask
);
5195 fprintf (stderr
, "\n");
5197 qp_safe_across_calls
= mask
;
5200 demand_empty_rest_of_line ();
5203 /* .entry label [, label [, ...]]
5204 Hint to DV code that the given labels are to be considered entry points.
5205 Otherwise, only global labels are considered entry points. */
5208 dot_entry (int dummy ATTRIBUTE_UNUSED
)
5217 name
= input_line_pointer
;
5218 c
= get_symbol_end ();
5219 symbolP
= symbol_find_or_make (name
);
5221 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (void *) symbolP
);
5223 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5226 *input_line_pointer
= c
;
5228 c
= *input_line_pointer
;
5231 input_line_pointer
++;
5233 if (*input_line_pointer
== '\n')
5239 demand_empty_rest_of_line ();
5242 /* .mem.offset offset, base
5243 "base" is used to distinguish between offsets from a different base. */
5246 dot_mem_offset (int dummy ATTRIBUTE_UNUSED
)
5248 md
.mem_offset
.hint
= 1;
5249 md
.mem_offset
.offset
= get_absolute_expression ();
5250 if (*input_line_pointer
!= ',')
5252 as_bad (_("Comma expected"));
5253 ignore_rest_of_line ();
5256 ++input_line_pointer
;
5257 md
.mem_offset
.base
= get_absolute_expression ();
5258 demand_empty_rest_of_line ();
5261 /* ia64-specific pseudo-ops: */
5262 const pseudo_typeS md_pseudo_table
[] =
5264 { "radix", dot_radix
, 0 },
5265 { "lcomm", s_lcomm_bytes
, 1 },
5266 { "loc", dot_loc
, 0 },
5267 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5268 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5269 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5270 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5271 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5272 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5273 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5274 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5275 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5276 { "proc", dot_proc
, 0 },
5277 { "body", dot_body
, 0 },
5278 { "prologue", dot_prologue
, 0 },
5279 { "endp", dot_endp
, 0 },
5281 { "fframe", dot_fframe
, 0 },
5282 { "vframe", dot_vframe
, 0 },
5283 { "vframesp", dot_vframesp
, 0 },
5284 { "vframepsp", dot_vframesp
, 1 },
5285 { "save", dot_save
, 0 },
5286 { "restore", dot_restore
, 0 },
5287 { "restorereg", dot_restorereg
, 0 },
5288 { "restorereg.p", dot_restorereg
, 1 },
5289 { "handlerdata", dot_handlerdata
, 0 },
5290 { "unwentry", dot_unwentry
, 0 },
5291 { "altrp", dot_altrp
, 0 },
5292 { "savesp", dot_savemem
, 0 },
5293 { "savepsp", dot_savemem
, 1 },
5294 { "save.g", dot_saveg
, 0 },
5295 { "save.f", dot_savef
, 0 },
5296 { "save.b", dot_saveb
, 0 },
5297 { "save.gf", dot_savegf
, 0 },
5298 { "spill", dot_spill
, 0 },
5299 { "spillreg", dot_spillreg
, 0 },
5300 { "spillsp", dot_spillmem
, 0 },
5301 { "spillpsp", dot_spillmem
, 1 },
5302 { "spillreg.p", dot_spillreg
, 1 },
5303 { "spillsp.p", dot_spillmem
, ~0 },
5304 { "spillpsp.p", dot_spillmem
, ~1 },
5305 { "label_state", dot_label_state
, 0 },
5306 { "copy_state", dot_copy_state
, 0 },
5307 { "unwabi", dot_unwabi
, 0 },
5308 { "personality", dot_personality
, 0 },
5309 { "mii", dot_template
, 0x0 },
5310 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5311 { "mlx", dot_template
, 0x2 },
5312 { "mmi", dot_template
, 0x4 },
5313 { "mfi", dot_template
, 0x6 },
5314 { "mmf", dot_template
, 0x7 },
5315 { "mib", dot_template
, 0x8 },
5316 { "mbb", dot_template
, 0x9 },
5317 { "bbb", dot_template
, 0xb },
5318 { "mmb", dot_template
, 0xc },
5319 { "mfb", dot_template
, 0xe },
5320 { "align", dot_align
, 0 },
5321 { "regstk", dot_regstk
, 0 },
5322 { "rotr", dot_rot
, DYNREG_GR
},
5323 { "rotf", dot_rot
, DYNREG_FR
},
5324 { "rotp", dot_rot
, DYNREG_PR
},
5325 { "lsb", dot_byteorder
, 0 },
5326 { "msb", dot_byteorder
, 1 },
5327 { "psr", dot_psr
, 0 },
5328 { "alias", dot_alias
, 0 },
5329 { "secalias", dot_alias
, 1 },
5330 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5332 { "xdata1", dot_xdata
, 1 },
5333 { "xdata2", dot_xdata
, 2 },
5334 { "xdata4", dot_xdata
, 4 },
5335 { "xdata8", dot_xdata
, 8 },
5336 { "xdata16", dot_xdata
, 16 },
5337 { "xreal4", dot_xfloat_cons
, 'f' },
5338 { "xreal8", dot_xfloat_cons
, 'd' },
5339 { "xreal10", dot_xfloat_cons
, 'x' },
5340 { "xreal16", dot_xfloat_cons
, 'X' },
5341 { "xstring", dot_xstringer
, 8 + 0 },
5342 { "xstringz", dot_xstringer
, 8 + 1 },
5344 /* unaligned versions: */
5345 { "xdata2.ua", dot_xdata_ua
, 2 },
5346 { "xdata4.ua", dot_xdata_ua
, 4 },
5347 { "xdata8.ua", dot_xdata_ua
, 8 },
5348 { "xdata16.ua", dot_xdata_ua
, 16 },
5349 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5350 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5351 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5352 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5354 /* annotations/DV checking support */
5355 { "entry", dot_entry
, 0 },
5356 { "mem.offset", dot_mem_offset
, 0 },
5357 { "pred.rel", dot_pred_rel
, 0 },
5358 { "pred.rel.clear", dot_pred_rel
, 'c' },
5359 { "pred.rel.imply", dot_pred_rel
, 'i' },
5360 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5361 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5362 { "reg.val", dot_reg_val
, 0 },
5363 { "serialize.data", dot_serialize
, 0 },
5364 { "serialize.instruction", dot_serialize
, 1 },
5365 { "auto", dot_dv_mode
, 'a' },
5366 { "explicit", dot_dv_mode
, 'e' },
5367 { "default", dot_dv_mode
, 'd' },
5369 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5370 IA-64 aligns data allocation pseudo-ops by default, so we have to
5371 tell it that these ones are supposed to be unaligned. Long term,
5372 should rewrite so that only IA-64 specific data allocation pseudo-ops
5373 are aligned by default. */
5374 {"2byte", stmt_cons_ua
, 2},
5375 {"4byte", stmt_cons_ua
, 4},
5376 {"8byte", stmt_cons_ua
, 8},
5379 {"vms_common", obj_elf_vms_common
, 0},
5385 static const struct pseudo_opcode
5388 void (*handler
) (int);
5393 /* these are more like pseudo-ops, but don't start with a dot */
5394 { "data1", cons
, 1 },
5395 { "data2", cons
, 2 },
5396 { "data4", cons
, 4 },
5397 { "data8", cons
, 8 },
5398 { "data16", cons
, 16 },
5399 { "real4", stmt_float_cons
, 'f' },
5400 { "real8", stmt_float_cons
, 'd' },
5401 { "real10", stmt_float_cons
, 'x' },
5402 { "real16", stmt_float_cons
, 'X' },
5403 { "string", stringer
, 8 + 0 },
5404 { "stringz", stringer
, 8 + 1 },
5406 /* unaligned versions: */
5407 { "data2.ua", stmt_cons_ua
, 2 },
5408 { "data4.ua", stmt_cons_ua
, 4 },
5409 { "data8.ua", stmt_cons_ua
, 8 },
5410 { "data16.ua", stmt_cons_ua
, 16 },
5411 { "real4.ua", float_cons
, 'f' },
5412 { "real8.ua", float_cons
, 'd' },
5413 { "real10.ua", float_cons
, 'x' },
5414 { "real16.ua", float_cons
, 'X' },
5417 /* Declare a register by creating a symbol for it and entering it in
5418 the symbol table. */
5421 declare_register (const char *name
, unsigned int regnum
)
5426 sym
= symbol_create (name
, reg_section
, regnum
, &zero_address_frag
);
5428 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (void *) sym
);
5430 as_fatal ("Inserting \"%s\" into register table failed: %s",
5437 declare_register_set (const char *prefix
,
5438 unsigned int num_regs
,
5439 unsigned int base_regnum
)
5444 for (i
= 0; i
< num_regs
; ++i
)
5446 snprintf (name
, sizeof (name
), "%s%u", prefix
, i
);
5447 declare_register (name
, base_regnum
+ i
);
5452 operand_width (enum ia64_opnd opnd
)
5454 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5455 unsigned int bits
= 0;
5459 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5460 bits
+= odesc
->field
[i
].bits
;
5465 static enum operand_match_result
5466 operand_match (const struct ia64_opcode
*idesc
, int res_index
, expressionS
*e
)
5468 enum ia64_opnd opnd
= idesc
->operands
[res_index
];
5469 int bits
, relocatable
= 0;
5470 struct insn_fix
*fix
;
5477 case IA64_OPND_AR_CCV
:
5478 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5479 return OPERAND_MATCH
;
5482 case IA64_OPND_AR_CSD
:
5483 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5484 return OPERAND_MATCH
;
5487 case IA64_OPND_AR_PFS
:
5488 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5489 return OPERAND_MATCH
;
5493 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5494 return OPERAND_MATCH
;
5498 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5499 return OPERAND_MATCH
;
5503 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5504 return OPERAND_MATCH
;
5507 case IA64_OPND_PR_ROT
:
5508 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5509 return OPERAND_MATCH
;
5513 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5514 return OPERAND_MATCH
;
5517 case IA64_OPND_PSR_L
:
5518 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5519 return OPERAND_MATCH
;
5522 case IA64_OPND_PSR_UM
:
5523 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5524 return OPERAND_MATCH
;
5528 if (e
->X_op
== O_constant
)
5530 if (e
->X_add_number
== 1)
5531 return OPERAND_MATCH
;
5533 return OPERAND_OUT_OF_RANGE
;
5538 if (e
->X_op
== O_constant
)
5540 if (e
->X_add_number
== 8)
5541 return OPERAND_MATCH
;
5543 return OPERAND_OUT_OF_RANGE
;
5548 if (e
->X_op
== O_constant
)
5550 if (e
->X_add_number
== 16)
5551 return OPERAND_MATCH
;
5553 return OPERAND_OUT_OF_RANGE
;
5557 /* register operands: */
5560 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5561 && e
->X_add_number
< REG_AR
+ 128)
5562 return OPERAND_MATCH
;
5567 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5568 && e
->X_add_number
< REG_BR
+ 8)
5569 return OPERAND_MATCH
;
5573 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5574 && e
->X_add_number
< REG_CR
+ 128)
5575 return OPERAND_MATCH
;
5578 case IA64_OPND_DAHR3
:
5579 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_DAHR
5580 && e
->X_add_number
< REG_DAHR
+ 8)
5581 return OPERAND_MATCH
;
5588 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5589 && e
->X_add_number
< REG_FR
+ 128)
5590 return OPERAND_MATCH
;
5595 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5596 && e
->X_add_number
< REG_P
+ 64)
5597 return OPERAND_MATCH
;
5603 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5604 && e
->X_add_number
< REG_GR
+ 128)
5605 return OPERAND_MATCH
;
5608 case IA64_OPND_R3_2
:
5609 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5611 if (e
->X_add_number
< REG_GR
+ 4)
5612 return OPERAND_MATCH
;
5613 else if (e
->X_add_number
< REG_GR
+ 128)
5614 return OPERAND_OUT_OF_RANGE
;
5618 /* indirect operands: */
5619 case IA64_OPND_CPUID_R3
:
5620 case IA64_OPND_DBR_R3
:
5621 case IA64_OPND_DTR_R3
:
5622 case IA64_OPND_ITR_R3
:
5623 case IA64_OPND_IBR_R3
:
5624 case IA64_OPND_MSR_R3
:
5625 case IA64_OPND_PKR_R3
:
5626 case IA64_OPND_PMC_R3
:
5627 case IA64_OPND_PMD_R3
:
5628 case IA64_OPND_DAHR_R3
:
5629 case IA64_OPND_RR_R3
:
5630 if (e
->X_op
== O_index
&& e
->X_op_symbol
5631 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5632 == opnd
- IA64_OPND_CPUID_R3
))
5633 return OPERAND_MATCH
;
5637 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5638 return OPERAND_MATCH
;
5641 /* immediate operands: */
5642 case IA64_OPND_CNT2a
:
5643 case IA64_OPND_LEN4
:
5644 case IA64_OPND_LEN6
:
5645 bits
= operand_width (idesc
->operands
[res_index
]);
5646 if (e
->X_op
== O_constant
)
5648 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5649 return OPERAND_MATCH
;
5651 return OPERAND_OUT_OF_RANGE
;
5655 case IA64_OPND_CNT2b
:
5656 if (e
->X_op
== O_constant
)
5658 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5659 return OPERAND_MATCH
;
5661 return OPERAND_OUT_OF_RANGE
;
5665 case IA64_OPND_CNT2c
:
5666 val
= e
->X_add_number
;
5667 if (e
->X_op
== O_constant
)
5669 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5670 return OPERAND_MATCH
;
5672 return OPERAND_OUT_OF_RANGE
;
5677 /* SOR must be an integer multiple of 8 */
5678 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5679 return OPERAND_OUT_OF_RANGE
;
5682 if (e
->X_op
== O_constant
)
5684 if ((bfd_vma
) e
->X_add_number
<= 96)
5685 return OPERAND_MATCH
;
5687 return OPERAND_OUT_OF_RANGE
;
5691 case IA64_OPND_IMMU62
:
5692 if (e
->X_op
== O_constant
)
5694 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5695 return OPERAND_MATCH
;
5697 return OPERAND_OUT_OF_RANGE
;
5701 /* FIXME -- need 62-bit relocation type */
5702 as_bad (_("62-bit relocation not yet implemented"));
5706 case IA64_OPND_IMMU64
:
5707 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5708 || e
->X_op
== O_subtract
)
5710 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5711 fix
->code
= BFD_RELOC_IA64_IMM64
;
5712 if (e
->X_op
!= O_subtract
)
5714 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5715 if (e
->X_op
== O_pseudo_fixup
)
5719 fix
->opnd
= idesc
->operands
[res_index
];
5722 ++CURR_SLOT
.num_fixups
;
5723 return OPERAND_MATCH
;
5725 else if (e
->X_op
== O_constant
)
5726 return OPERAND_MATCH
;
5729 case IA64_OPND_IMMU5b
:
5730 if (e
->X_op
== O_constant
)
5732 val
= e
->X_add_number
;
5733 if (val
>= 32 && val
<= 63)
5734 return OPERAND_MATCH
;
5736 return OPERAND_OUT_OF_RANGE
;
5740 case IA64_OPND_CCNT5
:
5741 case IA64_OPND_CNT5
:
5742 case IA64_OPND_CNT6
:
5743 case IA64_OPND_CPOS6a
:
5744 case IA64_OPND_CPOS6b
:
5745 case IA64_OPND_CPOS6c
:
5746 case IA64_OPND_IMMU2
:
5747 case IA64_OPND_IMMU7a
:
5748 case IA64_OPND_IMMU7b
:
5749 case IA64_OPND_IMMU16
:
5750 case IA64_OPND_IMMU19
:
5751 case IA64_OPND_IMMU21
:
5752 case IA64_OPND_IMMU24
:
5753 case IA64_OPND_MBTYPE4
:
5754 case IA64_OPND_MHTYPE8
:
5755 case IA64_OPND_POS6
:
5756 bits
= operand_width (idesc
->operands
[res_index
]);
5757 if (e
->X_op
== O_constant
)
5759 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5760 return OPERAND_MATCH
;
5762 return OPERAND_OUT_OF_RANGE
;
5766 case IA64_OPND_IMMU9
:
5767 bits
= operand_width (idesc
->operands
[res_index
]);
5768 if (e
->X_op
== O_constant
)
5770 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5772 int lobits
= e
->X_add_number
& 0x3;
5773 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5774 e
->X_add_number
|= (bfd_vma
) 0x3;
5775 return OPERAND_MATCH
;
5778 return OPERAND_OUT_OF_RANGE
;
5782 case IA64_OPND_IMM44
:
5783 /* least 16 bits must be zero */
5784 if ((e
->X_add_number
& 0xffff) != 0)
5785 /* XXX technically, this is wrong: we should not be issuing warning
5786 messages until we're sure this instruction pattern is going to
5788 as_warn (_("lower 16 bits of mask ignored"));
5790 if (e
->X_op
== O_constant
)
5792 if (((e
->X_add_number
>= 0
5793 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5794 || (e
->X_add_number
< 0
5795 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5798 if (e
->X_add_number
>= 0
5799 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5801 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5803 return OPERAND_MATCH
;
5806 return OPERAND_OUT_OF_RANGE
;
5810 case IA64_OPND_IMM17
:
5811 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5812 if (e
->X_op
== O_constant
)
5814 if (((e
->X_add_number
>= 0
5815 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5816 || (e
->X_add_number
< 0
5817 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5820 if (e
->X_add_number
>= 0
5821 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5823 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5825 return OPERAND_MATCH
;
5828 return OPERAND_OUT_OF_RANGE
;
5832 case IA64_OPND_IMM14
:
5833 case IA64_OPND_IMM22
:
5835 case IA64_OPND_IMM1
:
5836 case IA64_OPND_IMM8
:
5837 case IA64_OPND_IMM8U4
:
5838 case IA64_OPND_IMM8M1
:
5839 case IA64_OPND_IMM8M1U4
:
5840 case IA64_OPND_IMM8M1U8
:
5841 case IA64_OPND_IMM9a
:
5842 case IA64_OPND_IMM9b
:
5843 bits
= operand_width (idesc
->operands
[res_index
]);
5844 if (relocatable
&& (e
->X_op
== O_symbol
5845 || e
->X_op
== O_subtract
5846 || e
->X_op
== O_pseudo_fixup
))
5848 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5850 if (idesc
->operands
[res_index
] == IA64_OPND_IMM14
)
5851 fix
->code
= BFD_RELOC_IA64_IMM14
;
5853 fix
->code
= BFD_RELOC_IA64_IMM22
;
5855 if (e
->X_op
!= O_subtract
)
5857 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5858 if (e
->X_op
== O_pseudo_fixup
)
5862 fix
->opnd
= idesc
->operands
[res_index
];
5865 ++CURR_SLOT
.num_fixups
;
5866 return OPERAND_MATCH
;
5868 else if (e
->X_op
!= O_constant
5869 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5870 return OPERAND_MISMATCH
;
5872 if (opnd
== IA64_OPND_IMM8M1U4
)
5874 /* Zero is not valid for unsigned compares that take an adjusted
5875 constant immediate range. */
5876 if (e
->X_add_number
== 0)
5877 return OPERAND_OUT_OF_RANGE
;
5879 /* Sign-extend 32-bit unsigned numbers, so that the following range
5880 checks will work. */
5881 val
= e
->X_add_number
;
5882 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5883 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5884 val
= ((val
<< 32) >> 32);
5886 /* Check for 0x100000000. This is valid because
5887 0x100000000-1 is the same as ((uint32_t) -1). */
5888 if (val
== ((bfd_signed_vma
) 1 << 32))
5889 return OPERAND_MATCH
;
5893 else if (opnd
== IA64_OPND_IMM8M1U8
)
5895 /* Zero is not valid for unsigned compares that take an adjusted
5896 constant immediate range. */
5897 if (e
->X_add_number
== 0)
5898 return OPERAND_OUT_OF_RANGE
;
5900 /* Check for 0x10000000000000000. */
5901 if (e
->X_op
== O_big
)
5903 if (generic_bignum
[0] == 0
5904 && generic_bignum
[1] == 0
5905 && generic_bignum
[2] == 0
5906 && generic_bignum
[3] == 0
5907 && generic_bignum
[4] == 1)
5908 return OPERAND_MATCH
;
5910 return OPERAND_OUT_OF_RANGE
;
5913 val
= e
->X_add_number
- 1;
5915 else if (opnd
== IA64_OPND_IMM8M1
)
5916 val
= e
->X_add_number
- 1;
5917 else if (opnd
== IA64_OPND_IMM8U4
)
5919 /* Sign-extend 32-bit unsigned numbers, so that the following range
5920 checks will work. */
5921 val
= e
->X_add_number
;
5922 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5923 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5924 val
= ((val
<< 32) >> 32);
5927 val
= e
->X_add_number
;
5929 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5930 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5931 return OPERAND_MATCH
;
5933 return OPERAND_OUT_OF_RANGE
;
5935 case IA64_OPND_INC3
:
5936 /* +/- 1, 4, 8, 16 */
5937 val
= e
->X_add_number
;
5940 if (e
->X_op
== O_constant
)
5942 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5943 return OPERAND_MATCH
;
5945 return OPERAND_OUT_OF_RANGE
;
5949 case IA64_OPND_TGT25
:
5950 case IA64_OPND_TGT25b
:
5951 case IA64_OPND_TGT25c
:
5952 case IA64_OPND_TGT64
:
5953 if (e
->X_op
== O_symbol
)
5955 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5956 if (opnd
== IA64_OPND_TGT25
)
5957 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5958 else if (opnd
== IA64_OPND_TGT25b
)
5959 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5960 else if (opnd
== IA64_OPND_TGT25c
)
5961 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5962 else if (opnd
== IA64_OPND_TGT64
)
5963 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5967 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5968 fix
->opnd
= idesc
->operands
[res_index
];
5971 ++CURR_SLOT
.num_fixups
;
5972 return OPERAND_MATCH
;
5974 case IA64_OPND_TAG13
:
5975 case IA64_OPND_TAG13b
:
5979 return OPERAND_MATCH
;
5982 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5983 /* There are no external relocs for TAG13/TAG13b fields, so we
5984 create a dummy reloc. This will not live past md_apply_fix. */
5985 fix
->code
= BFD_RELOC_UNUSED
;
5986 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5987 fix
->opnd
= idesc
->operands
[res_index
];
5990 ++CURR_SLOT
.num_fixups
;
5991 return OPERAND_MATCH
;
5998 case IA64_OPND_LDXMOV
:
5999 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6000 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
6001 fix
->opnd
= idesc
->operands
[res_index
];
6004 ++CURR_SLOT
.num_fixups
;
6005 return OPERAND_MATCH
;
6007 case IA64_OPND_STRD5b
:
6008 if (e
->X_op
== O_constant
)
6010 /* 5-bit signed scaled by 64 */
6011 if ((e
->X_add_number
<= ( 0xf << 6 ))
6012 && (e
->X_add_number
>= -( 0x10 << 6 )))
6015 /* Must be a multiple of 64 */
6016 if ((e
->X_add_number
& 0x3f) != 0)
6017 as_warn (_("stride must be a multiple of 64; lower 6 bits ignored"));
6019 e
->X_add_number
&= ~ 0x3f;
6020 return OPERAND_MATCH
;
6023 return OPERAND_OUT_OF_RANGE
;
6026 case IA64_OPND_CNT6a
:
6027 if (e
->X_op
== O_constant
)
6029 /* 6-bit unsigned biased by 1 -- count 0 is meaningless */
6030 if ((e
->X_add_number
<= 64)
6031 && (e
->X_add_number
> 0) )
6033 return OPERAND_MATCH
;
6036 return OPERAND_OUT_OF_RANGE
;
6043 return OPERAND_MISMATCH
;
6047 parse_operand (expressionS
*e
, int more
)
6051 memset (e
, 0, sizeof (*e
));
6055 sep
= *input_line_pointer
;
6056 if (more
&& (sep
== ',' || sep
== more
))
6057 ++input_line_pointer
;
6062 parse_operand_and_eval (expressionS
*e
, int more
)
6064 int sep
= parse_operand (e
, more
);
6065 resolve_expression (e
);
6070 parse_operand_maybe_eval (expressionS
*e
, int more
, enum ia64_opnd op
)
6072 int sep
= parse_operand (e
, more
);
6075 case IA64_OPND_IMM14
:
6076 case IA64_OPND_IMM22
:
6077 case IA64_OPND_IMMU64
:
6078 case IA64_OPND_TGT25
:
6079 case IA64_OPND_TGT25b
:
6080 case IA64_OPND_TGT25c
:
6081 case IA64_OPND_TGT64
:
6082 case IA64_OPND_TAG13
:
6083 case IA64_OPND_TAG13b
:
6084 case IA64_OPND_LDXMOV
:
6087 resolve_expression (e
);
6093 /* Returns the next entry in the opcode table that matches the one in
6094 IDESC, and frees the entry in IDESC. If no matching entry is
6095 found, NULL is returned instead. */
6097 static struct ia64_opcode
*
6098 get_next_opcode (struct ia64_opcode
*idesc
)
6100 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6101 ia64_free_opcode (idesc
);
6105 /* Parse the operands for the opcode and find the opcode variant that
6106 matches the specified operands, or NULL if no match is possible. */
6108 static struct ia64_opcode
*
6109 parse_operands (struct ia64_opcode
*idesc
)
6111 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6112 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6115 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6116 enum operand_match_result result
;
6118 char *first_arg
= 0, *end
, *saved_input_pointer
;
6121 gas_assert (strlen (idesc
->name
) <= 128);
6123 strcpy (mnemonic
, idesc
->name
);
6124 if (idesc
->operands
[2] == IA64_OPND_SOF
6125 || idesc
->operands
[1] == IA64_OPND_SOF
)
6127 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6128 can't parse the first operand until we have parsed the
6129 remaining operands of the "alloc" instruction. */
6131 first_arg
= input_line_pointer
;
6132 end
= strchr (input_line_pointer
, '=');
6135 as_bad (_("Expected separator `='"));
6138 input_line_pointer
= end
+ 1;
6145 if (i
< NELEMS (CURR_SLOT
.opnd
))
6147 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ i
, '=',
6148 idesc
->operands
[i
]);
6149 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6156 sep
= parse_operand (&dummy
, '=');
6157 if (dummy
.X_op
== O_absent
)
6163 if (sep
!= '=' && sep
!= ',')
6168 if (num_outputs
> 0)
6169 as_bad (_("Duplicate equal sign (=) in instruction"));
6171 num_outputs
= i
+ 1;
6176 as_bad (_("Illegal operand separator `%c'"), sep
);
6180 if (idesc
->operands
[2] == IA64_OPND_SOF
6181 || idesc
->operands
[1] == IA64_OPND_SOF
)
6183 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6184 Note, however, that due to that mapping operand numbers in error
6185 messages for any of the constant operands will not be correct. */
6186 know (strcmp (idesc
->name
, "alloc") == 0);
6187 /* The first operand hasn't been parsed/initialized, yet (but
6188 num_operands intentionally doesn't account for that). */
6189 i
= num_operands
> 4 ? 2 : 1;
6190 #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6191 ? CURR_SLOT.opnd[n].X_add_number \
6193 sof
= set_regstack (FORCE_CONST(i
),
6196 FORCE_CONST(i
+ 3));
6199 /* now we can parse the first arg: */
6200 saved_input_pointer
= input_line_pointer
;
6201 input_line_pointer
= first_arg
;
6202 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ 0, '=',
6203 idesc
->operands
[0]);
6205 --num_outputs
; /* force error */
6206 input_line_pointer
= saved_input_pointer
;
6208 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6209 if (CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6210 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
)
6211 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6212 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6214 CURR_SLOT
.opnd
[i
+ 1].X_op
= O_illegal
;
6215 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6218 highest_unmatched_operand
= -4;
6219 curr_out_of_range_pos
= -1;
6221 for (; idesc
; idesc
= get_next_opcode (idesc
))
6223 if (num_outputs
!= idesc
->num_outputs
)
6224 continue; /* mismatch in # of outputs */
6225 if (highest_unmatched_operand
< 0)
6226 highest_unmatched_operand
|= 1;
6227 if (num_operands
> NELEMS (idesc
->operands
)
6228 || (num_operands
< NELEMS (idesc
->operands
)
6229 && idesc
->operands
[num_operands
])
6230 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6231 continue; /* mismatch in number of arguments */
6232 if (highest_unmatched_operand
< 0)
6233 highest_unmatched_operand
|= 2;
6235 CURR_SLOT
.num_fixups
= 0;
6237 /* Try to match all operands. If we see an out-of-range operand,
6238 then continue trying to match the rest of the operands, since if
6239 the rest match, then this idesc will give the best error message. */
6241 out_of_range_pos
= -1;
6242 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6244 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6245 if (result
!= OPERAND_MATCH
)
6247 if (result
!= OPERAND_OUT_OF_RANGE
)
6249 if (out_of_range_pos
< 0)
6250 /* remember position of the first out-of-range operand: */
6251 out_of_range_pos
= i
;
6255 /* If we did not match all operands, or if at least one operand was
6256 out-of-range, then this idesc does not match. Keep track of which
6257 idesc matched the most operands before failing. If we have two
6258 idescs that failed at the same position, and one had an out-of-range
6259 operand, then prefer the out-of-range operand. Thus if we have
6260 "add r0=0x1000000,r1" we get an error saying the constant is out
6261 of range instead of an error saying that the constant should have been
6264 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6266 if (i
> highest_unmatched_operand
6267 || (i
== highest_unmatched_operand
6268 && out_of_range_pos
> curr_out_of_range_pos
))
6270 highest_unmatched_operand
= i
;
6271 if (out_of_range_pos
>= 0)
6273 expected_operand
= idesc
->operands
[out_of_range_pos
];
6274 error_pos
= out_of_range_pos
;
6278 expected_operand
= idesc
->operands
[i
];
6281 curr_out_of_range_pos
= out_of_range_pos
;
6290 if (expected_operand
)
6291 as_bad (_("Operand %u of `%s' should be %s"),
6292 error_pos
+ 1, mnemonic
,
6293 elf64_ia64_operands
[expected_operand
].desc
);
6294 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6295 as_bad (_("Wrong number of output operands"));
6296 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6297 as_bad (_("Wrong number of input operands"));
6299 as_bad (_("Operand mismatch"));
6303 /* Check that the instruction doesn't use
6304 - r0, f0, or f1 as output operands
6305 - the same predicate twice as output operands
6306 - r0 as address of a base update load or store
6307 - the same GR as output and address of a base update load
6308 - two even- or two odd-numbered FRs as output operands of a floating
6309 point parallel load.
6310 At most two (conflicting) output (or output-like) operands can exist,
6311 (floating point parallel loads have three outputs, but the base register,
6312 if updated, cannot conflict with the actual outputs). */
6314 for (i
= 0; i
< num_operands
; ++i
)
6319 switch (idesc
->operands
[i
])
6324 if (i
< num_outputs
)
6326 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6329 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6331 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6336 if (i
< num_outputs
)
6339 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6341 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6348 if (i
< num_outputs
)
6350 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6351 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6354 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6357 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6359 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6363 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6365 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6368 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6370 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6381 as_warn (_("Invalid use of `%c%d' as output operand"), reg_class
, regno
);
6384 as_warn (_("Invalid use of `r%d' as base update address operand"), regno
);
6390 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6395 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6400 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6408 as_warn (_("Invalid duplicate use of `%c%d'"), reg_class
, reg1
);
6410 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6411 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6412 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6413 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6414 && ! ((reg1
^ reg2
) & 1))
6415 as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"),
6416 reg1
- REG_FR
, reg2
- REG_FR
);
6417 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6418 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6419 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6420 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6421 as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"),
6422 reg1
- REG_FR
, reg2
- REG_FR
);
6427 build_insn (struct slot
*slot
, bfd_vma
*insnp
)
6429 const struct ia64_operand
*odesc
, *o2desc
;
6430 struct ia64_opcode
*idesc
= slot
->idesc
;
6436 insn
= idesc
->opcode
| slot
->qp_regno
;
6438 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6440 if (slot
->opnd
[i
].X_op
== O_register
6441 || slot
->opnd
[i
].X_op
== O_constant
6442 || slot
->opnd
[i
].X_op
== O_index
)
6443 val
= slot
->opnd
[i
].X_add_number
;
6444 else if (slot
->opnd
[i
].X_op
== O_big
)
6446 /* This must be the value 0x10000000000000000. */
6447 gas_assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6453 switch (idesc
->operands
[i
])
6455 case IA64_OPND_IMMU64
:
6456 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6457 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6458 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6459 | (((val
>> 63) & 0x1) << 36));
6462 case IA64_OPND_IMMU62
:
6463 val
&= 0x3fffffffffffffffULL
;
6464 if (val
!= slot
->opnd
[i
].X_add_number
)
6465 as_warn (_("Value truncated to 62 bits"));
6466 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6467 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6470 case IA64_OPND_TGT64
:
6472 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6473 insn
|= ((((val
>> 59) & 0x1) << 36)
6474 | (((val
>> 0) & 0xfffff) << 13));
6490 case IA64_OPND_DAHR3
:
6509 case IA64_OPND_R3_2
:
6510 case IA64_OPND_CPUID_R3
:
6511 case IA64_OPND_DBR_R3
:
6512 case IA64_OPND_DTR_R3
:
6513 case IA64_OPND_ITR_R3
:
6514 case IA64_OPND_IBR_R3
:
6516 case IA64_OPND_MSR_R3
:
6517 case IA64_OPND_PKR_R3
:
6518 case IA64_OPND_PMC_R3
:
6519 case IA64_OPND_PMD_R3
:
6520 case IA64_OPND_DAHR_R3
:
6521 case IA64_OPND_RR_R3
:
6529 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6530 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6532 as_bad_where (slot
->src_file
, slot
->src_line
,
6533 _("Bad operand value: %s"), err
);
6534 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6536 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6537 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6539 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6540 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6542 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6543 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6544 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6546 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6547 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6555 emit_one_bundle (void)
6557 int manual_bundling_off
= 0, manual_bundling
= 0;
6558 enum ia64_unit required_unit
, insn_unit
= 0;
6559 enum ia64_insn_type type
[3], insn_type
;
6560 unsigned int template_val
, orig_template
;
6561 bfd_vma insn
[3] = { -1, -1, -1 };
6562 struct ia64_opcode
*idesc
;
6563 int end_of_insn_group
= 0, user_template
= -1;
6564 int n
, i
, j
, first
, curr
, last_slot
;
6565 bfd_vma t0
= 0, t1
= 0;
6566 struct label_fix
*lfix
;
6567 bfd_boolean mark_label
;
6568 struct insn_fix
*ifix
;
6574 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6575 know (first
>= 0 && first
< NUM_SLOTS
);
6576 n
= MIN (3, md
.num_slots_in_use
);
6578 /* Determine template: user user_template if specified, best match
6581 if (md
.slot
[first
].user_template
>= 0)
6582 user_template
= template_val
= md
.slot
[first
].user_template
;
6585 /* Auto select appropriate template. */
6586 memset (type
, 0, sizeof (type
));
6588 for (i
= 0; i
< n
; ++i
)
6590 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6592 type
[i
] = md
.slot
[curr
].idesc
->type
;
6593 curr
= (curr
+ 1) % NUM_SLOTS
;
6595 template_val
= best_template
[type
[0]][type
[1]][type
[2]];
6598 /* initialize instructions with appropriate nops: */
6599 for (i
= 0; i
< 3; ++i
)
6600 insn
[i
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[i
]];
6604 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6605 from the start of the frag. */
6606 addr_mod
= frag_now_fix () & 15;
6607 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6608 as_bad (_("instruction address is not a multiple of 16"));
6609 frag_now
->insn_addr
= addr_mod
;
6610 frag_now
->has_code
= 1;
6612 /* now fill in slots with as many insns as possible: */
6614 idesc
= md
.slot
[curr
].idesc
;
6615 end_of_insn_group
= 0;
6617 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6619 /* If we have unwind records, we may need to update some now. */
6620 unw_rec_list
*ptr
= md
.slot
[curr
].unwind_record
;
6621 unw_rec_list
*end_ptr
= NULL
;
6625 /* Find the last prologue/body record in the list for the current
6626 insn, and set the slot number for all records up to that point.
6627 This needs to be done now, because prologue/body records refer to
6628 the current point, not the point after the instruction has been
6629 issued. This matters because there may have been nops emitted
6630 meanwhile. Any non-prologue non-body record followed by a
6631 prologue/body record must also refer to the current point. */
6632 unw_rec_list
*last_ptr
;
6634 for (j
= 1; end_ptr
== NULL
&& j
< md
.num_slots_in_use
; ++j
)
6635 end_ptr
= md
.slot
[(curr
+ j
) % NUM_SLOTS
].unwind_record
;
6636 for (last_ptr
= NULL
; ptr
!= end_ptr
; ptr
= ptr
->next
)
6637 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6638 || ptr
->r
.type
== body
)
6642 /* Make last_ptr point one after the last prologue/body
6644 last_ptr
= last_ptr
->next
;
6645 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6648 ptr
->slot_number
= (unsigned long) f
+ i
;
6649 ptr
->slot_frag
= frag_now
;
6651 /* Remove the initialized records, so that we won't accidentally
6652 update them again if we insert a nop and continue. */
6653 md
.slot
[curr
].unwind_record
= last_ptr
;
6657 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6658 if (md
.slot
[curr
].manual_bundling_on
)
6661 manual_bundling
= 1;
6663 break; /* Need to start a new bundle. */
6666 /* If this instruction specifies a template, then it must be the first
6667 instruction of a bundle. */
6668 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6671 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6673 if (manual_bundling
&& !manual_bundling_off
)
6675 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6676 _("`%s' must be last in bundle"), idesc
->name
);
6678 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6682 if (idesc
->flags
& IA64_OPCODE_LAST
)
6685 unsigned int required_template
;
6687 /* If we need a stop bit after an M slot, our only choice is
6688 template 5 (M;;MI). If we need a stop bit after a B
6689 slot, our only choice is to place it at the end of the
6690 bundle, because the only available templates are MIB,
6691 MBB, BBB, MMB, and MFB. We don't handle anything other
6692 than M and B slots because these are the only kind of
6693 instructions that can have the IA64_OPCODE_LAST bit set. */
6694 required_template
= template_val
;
6695 switch (idesc
->type
)
6699 required_template
= 5;
6707 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6708 _("Internal error: don't know how to force %s to end of instruction group"),
6714 && (i
> required_slot
6715 || (required_slot
== 2 && !manual_bundling_off
)
6716 || (user_template
>= 0
6717 /* Changing from MMI to M;MI is OK. */
6718 && (template_val
^ required_template
) > 1)))
6720 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6721 _("`%s' must be last in instruction group"),
6723 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6724 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6726 if (required_slot
< i
)
6727 /* Can't fit this instruction. */
6731 if (required_template
!= template_val
)
6733 /* If we switch the template, we need to reset the NOPs
6734 after slot i. The slot-types of the instructions ahead
6735 of i never change, so we don't need to worry about
6736 changing NOPs in front of this slot. */
6737 for (j
= i
; j
< 3; ++j
)
6738 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6740 /* We just picked a template that includes the stop bit in the
6741 middle, so we don't need another one emitted later. */
6742 md
.slot
[curr
].end_of_insn_group
= 0;
6744 template_val
= required_template
;
6746 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6748 if (manual_bundling
)
6750 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6751 _("Label must be first in a bundle"));
6752 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6754 /* This insn must go into the first slot of a bundle. */
6758 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6760 /* We need an instruction group boundary in the middle of a
6761 bundle. See if we can switch to an other template with
6762 an appropriate boundary. */
6764 orig_template
= template_val
;
6765 if (i
== 1 && (user_template
== 4
6766 || (user_template
< 0
6767 && (ia64_templ_desc
[template_val
].exec_unit
[0]
6771 end_of_insn_group
= 0;
6773 else if (i
== 2 && (user_template
== 0
6774 || (user_template
< 0
6775 && (ia64_templ_desc
[template_val
].exec_unit
[1]
6777 /* This test makes sure we don't switch the template if
6778 the next instruction is one that needs to be first in
6779 an instruction group. Since all those instructions are
6780 in the M group, there is no way such an instruction can
6781 fit in this bundle even if we switch the template. The
6782 reason we have to check for this is that otherwise we
6783 may end up generating "MI;;I M.." which has the deadly
6784 effect that the second M instruction is no longer the
6785 first in the group! --davidm 99/12/16 */
6786 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6789 end_of_insn_group
= 0;
6792 && user_template
== 0
6793 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6794 /* Use the next slot. */
6796 else if (curr
!= first
)
6797 /* can't fit this insn */
6800 if (template_val
!= orig_template
)
6801 /* if we switch the template, we need to reset the NOPs
6802 after slot i. The slot-types of the instructions ahead
6803 of i never change, so we don't need to worry about
6804 changing NOPs in front of this slot. */
6805 for (j
= i
; j
< 3; ++j
)
6806 insn
[j
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[j
]];
6808 required_unit
= ia64_templ_desc
[template_val
].exec_unit
[i
];
6810 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6811 if (idesc
->type
== IA64_TYPE_DYN
)
6813 enum ia64_opnd opnd1
, opnd2
;
6815 if ((strcmp (idesc
->name
, "nop") == 0)
6816 || (strcmp (idesc
->name
, "break") == 0))
6817 insn_unit
= required_unit
;
6818 else if (strcmp (idesc
->name
, "hint") == 0)
6820 insn_unit
= required_unit
;
6821 if (required_unit
== IA64_UNIT_B
)
6827 case hint_b_warning
:
6828 as_warn (_("hint in B unit may be treated as nop"));
6831 /* When manual bundling is off and there is no
6832 user template, we choose a different unit so
6833 that hint won't go into the current slot. We
6834 will fill the current bundle with nops and
6835 try to put hint into the next bundle. */
6836 if (!manual_bundling
&& user_template
< 0)
6837 insn_unit
= IA64_UNIT_I
;
6839 as_bad (_("hint in B unit can't be used"));
6844 else if (strcmp (idesc
->name
, "chk.s") == 0
6845 || strcmp (idesc
->name
, "mov") == 0)
6847 insn_unit
= IA64_UNIT_M
;
6848 if (required_unit
== IA64_UNIT_I
6849 || (required_unit
== IA64_UNIT_F
&& template_val
== 6))
6850 insn_unit
= IA64_UNIT_I
;
6853 as_fatal (_("emit_one_bundle: unexpected dynamic op"));
6855 snprintf (mnemonic
, sizeof (mnemonic
), "%s.%c",
6856 idesc
->name
, "?imbfxx"[insn_unit
]);
6857 opnd1
= idesc
->operands
[0];
6858 opnd2
= idesc
->operands
[1];
6859 ia64_free_opcode (idesc
);
6860 idesc
= ia64_find_opcode (mnemonic
);
6861 /* moves to/from ARs have collisions */
6862 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6864 while (idesc
!= NULL
6865 && (idesc
->operands
[0] != opnd1
6866 || idesc
->operands
[1] != opnd2
))
6867 idesc
= get_next_opcode (idesc
);
6869 md
.slot
[curr
].idesc
= idesc
;
6873 insn_type
= idesc
->type
;
6874 insn_unit
= IA64_UNIT_NIL
;
6878 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6879 insn_unit
= required_unit
;
6881 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6882 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6883 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6884 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6885 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6890 if (insn_unit
!= required_unit
)
6891 continue; /* Try next slot. */
6893 /* Now is a good time to fix up the labels for this insn. */
6895 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6897 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6898 symbol_set_frag (lfix
->sym
, frag_now
);
6899 mark_label
|= lfix
->dw2_mark_labels
;
6901 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6903 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6904 symbol_set_frag (lfix
->sym
, frag_now
);
6907 if (debug_type
== DEBUG_DWARF2
6908 || md
.slot
[curr
].loc_directive_seen
6911 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6913 md
.slot
[curr
].loc_directive_seen
= 0;
6915 md
.slot
[curr
].debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
6917 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6920 build_insn (md
.slot
+ curr
, insn
+ i
);
6922 ptr
= md
.slot
[curr
].unwind_record
;
6925 /* Set slot numbers for all remaining unwind records belonging to the
6926 current insn. There can not be any prologue/body unwind records
6928 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6930 ptr
->slot_number
= (unsigned long) f
+ i
;
6931 ptr
->slot_frag
= frag_now
;
6933 md
.slot
[curr
].unwind_record
= NULL
;
6936 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6938 ifix
= md
.slot
[curr
].fixup
+ j
;
6939 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6940 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6941 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6942 fix
->fx_file
= md
.slot
[curr
].src_file
;
6943 fix
->fx_line
= md
.slot
[curr
].src_line
;
6946 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6948 /* This adjustment to "i" must occur after the fix, otherwise the fix
6949 is assigned to the wrong slot, and the VMS linker complains. */
6950 if (required_unit
== IA64_UNIT_L
)
6953 /* skip one slot for long/X-unit instructions */
6956 --md
.num_slots_in_use
;
6960 ia64_free_opcode (md
.slot
[curr
].idesc
);
6961 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6962 md
.slot
[curr
].user_template
= -1;
6964 if (manual_bundling_off
)
6966 manual_bundling
= 0;
6969 curr
= (curr
+ 1) % NUM_SLOTS
;
6970 idesc
= md
.slot
[curr
].idesc
;
6973 /* A user template was specified, but the first following instruction did
6974 not fit. This can happen with or without manual bundling. */
6975 if (md
.num_slots_in_use
> 0 && last_slot
< 0)
6977 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6978 _("`%s' does not fit into %s template"),
6979 idesc
->name
, ia64_templ_desc
[template_val
].name
);
6980 /* Drop first insn so we don't livelock. */
6981 --md
.num_slots_in_use
;
6982 know (curr
== first
);
6983 ia64_free_opcode (md
.slot
[curr
].idesc
);
6984 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6985 md
.slot
[curr
].user_template
= -1;
6987 else if (manual_bundling
> 0)
6989 if (md
.num_slots_in_use
> 0)
6992 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6993 _("`%s' does not fit into bundle"), idesc
->name
);
6998 if (template_val
== 2)
7000 else if (last_slot
== 0)
7001 where
= "slots 2 or 3";
7004 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7005 _("`%s' can't go in %s of %s template"),
7006 idesc
->name
, where
, ia64_templ_desc
[template_val
].name
);
7010 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7011 _("Missing '}' at end of file"));
7014 know (md
.num_slots_in_use
< NUM_SLOTS
);
7016 t0
= end_of_insn_group
| (template_val
<< 1) | (insn
[0] << 5) | (insn
[1] << 46);
7017 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
7019 number_to_chars_littleendian (f
+ 0, t0
, 8);
7020 number_to_chars_littleendian (f
+ 8, t1
, 8);
7024 md_parse_option (int c
, char *arg
)
7029 /* Switches from the Intel assembler. */
7031 if (strcmp (arg
, "ilp64") == 0
7032 || strcmp (arg
, "lp64") == 0
7033 || strcmp (arg
, "p64") == 0)
7035 md
.flags
|= EF_IA_64_ABI64
;
7037 else if (strcmp (arg
, "ilp32") == 0)
7039 md
.flags
&= ~EF_IA_64_ABI64
;
7041 else if (strcmp (arg
, "le") == 0)
7043 md
.flags
&= ~EF_IA_64_BE
;
7044 default_big_endian
= 0;
7046 else if (strcmp (arg
, "be") == 0)
7048 md
.flags
|= EF_IA_64_BE
;
7049 default_big_endian
= 1;
7051 else if (strncmp (arg
, "unwind-check=", 13) == 0)
7054 if (strcmp (arg
, "warning") == 0)
7055 md
.unwind_check
= unwind_check_warning
;
7056 else if (strcmp (arg
, "error") == 0)
7057 md
.unwind_check
= unwind_check_error
;
7061 else if (strncmp (arg
, "hint.b=", 7) == 0)
7064 if (strcmp (arg
, "ok") == 0)
7065 md
.hint_b
= hint_b_ok
;
7066 else if (strcmp (arg
, "warning") == 0)
7067 md
.hint_b
= hint_b_warning
;
7068 else if (strcmp (arg
, "error") == 0)
7069 md
.hint_b
= hint_b_error
;
7073 else if (strncmp (arg
, "tune=", 5) == 0)
7076 if (strcmp (arg
, "itanium1") == 0)
7078 else if (strcmp (arg
, "itanium2") == 0)
7088 if (strcmp (arg
, "so") == 0)
7090 /* Suppress signon message. */
7092 else if (strcmp (arg
, "pi") == 0)
7094 /* Reject privileged instructions. FIXME */
7096 else if (strcmp (arg
, "us") == 0)
7098 /* Allow union of signed and unsigned range. FIXME */
7100 else if (strcmp (arg
, "close_fcalls") == 0)
7102 /* Do not resolve global function calls. */
7109 /* temp[="prefix"] Insert temporary labels into the object file
7110 symbol table prefixed by "prefix".
7111 Default prefix is ":temp:".
7116 /* indirect=<tgt> Assume unannotated indirect branches behavior
7117 according to <tgt> --
7118 exit: branch out from the current context (default)
7119 labels: all labels in context may be branch targets
7121 if (strncmp (arg
, "indirect=", 9) != 0)
7126 /* -X conflicts with an ignored option, use -x instead */
7128 if (!arg
|| strcmp (arg
, "explicit") == 0)
7130 /* set default mode to explicit */
7131 md
.default_explicit_mode
= 1;
7134 else if (strcmp (arg
, "auto") == 0)
7136 md
.default_explicit_mode
= 0;
7138 else if (strcmp (arg
, "none") == 0)
7142 else if (strcmp (arg
, "debug") == 0)
7146 else if (strcmp (arg
, "debugx") == 0)
7148 md
.default_explicit_mode
= 1;
7151 else if (strcmp (arg
, "debugn") == 0)
7158 as_bad (_("Unrecognized option '-x%s'"), arg
);
7163 /* nops Print nops statistics. */
7166 /* GNU specific switches for gcc. */
7167 case OPTION_MCONSTANT_GP
:
7168 md
.flags
|= EF_IA_64_CONS_GP
;
7171 case OPTION_MAUTO_PIC
:
7172 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7183 md_show_usage (FILE *stream
)
7187 --mconstant-gp mark output file as using the constant-GP model\n\
7188 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7189 --mauto-pic mark output file as using the constant-GP model\n\
7190 without function descriptors (sets ELF header flag\n\
7191 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7192 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7193 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7194 -mtune=[itanium1|itanium2]\n\
7195 tune for a specific CPU (default -mtune=itanium2)\n\
7196 -munwind-check=[warning|error]\n\
7197 unwind directive check (default -munwind-check=warning)\n\
7198 -mhint.b=[ok|warning|error]\n\
7199 hint.b check (default -mhint.b=error)\n\
7200 -x | -xexplicit turn on dependency violation checking\n"), stream
);
7201 /* Note for translators: "automagically" can be translated as "automatically" here. */
7203 -xauto automagically remove dependency violations (default)\n\
7204 -xnone turn off dependency violation checking\n\
7205 -xdebug debug dependency violation checker\n\
7206 -xdebugn debug dependency violation checker but turn off\n\
7207 dependency violation checking\n\
7208 -xdebugx debug dependency violation checker and turn on\n\
7209 dependency violation checking\n"),
7214 ia64_after_parse_args (void)
7216 if (debug_type
== DEBUG_STABS
)
7217 as_fatal (_("--gstabs is not supported for ia64"));
7220 /* Return true if TYPE fits in TEMPL at SLOT. */
7223 match (int templ
, int type
, int slot
)
7225 enum ia64_unit unit
;
7228 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7231 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7233 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7235 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7236 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7237 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7238 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7239 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7240 default: result
= 0; break;
7245 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7246 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7247 type M or I would fit in TEMPL at SLOT. */
7250 extra_goodness (int templ
, int slot
)
7255 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7257 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7263 if (match (templ
, IA64_TYPE_M
, slot
)
7264 || match (templ
, IA64_TYPE_I
, slot
))
7265 /* Favor M- and I-unit NOPs. We definitely want to avoid
7266 F-unit and B-unit may cause split-issue or less-than-optimal
7267 branch-prediction. */
7278 /* This function is called once, at assembler startup time. It sets
7279 up all the tables, etc. that the MD part of the assembler will need
7280 that can be determined before arguments are parsed. */
7284 int i
, j
, k
, t
, goodness
, best
, ok
;
7289 md
.explicit_mode
= md
.default_explicit_mode
;
7291 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7293 /* Make sure function pointers get initialized. */
7294 target_big_endian
= -1;
7295 dot_byteorder (default_big_endian
);
7297 alias_hash
= hash_new ();
7298 alias_name_hash
= hash_new ();
7299 secalias_hash
= hash_new ();
7300 secalias_name_hash
= hash_new ();
7302 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7303 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7304 &zero_address_frag
);
7306 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7307 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7308 &zero_address_frag
);
7310 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7311 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7312 &zero_address_frag
);
7314 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7315 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7316 &zero_address_frag
);
7318 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7319 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7320 &zero_address_frag
);
7322 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7323 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7324 &zero_address_frag
);
7326 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7327 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7328 &zero_address_frag
);
7330 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7331 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7332 &zero_address_frag
);
7334 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7335 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7336 &zero_address_frag
);
7338 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7339 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7340 &zero_address_frag
);
7342 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7343 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7344 &zero_address_frag
);
7346 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7347 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7348 &zero_address_frag
);
7350 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7351 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7352 &zero_address_frag
);
7354 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7355 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7356 &zero_address_frag
);
7358 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7359 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7360 &zero_address_frag
);
7362 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7363 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7364 &zero_address_frag
);
7366 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7367 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7368 &zero_address_frag
);
7371 pseudo_func
[FUNC_SLOTCOUNT_RELOC
].u
.sym
=
7372 symbol_new (".<slotcount>", undefined_section
, FUNC_SLOTCOUNT_RELOC
,
7373 &zero_address_frag
);
7376 if (md
.tune
!= itanium1
)
7378 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7380 le_nop_stop
[0] = 0x9;
7383 /* Compute the table of best templates. We compute goodness as a
7384 base 4 value, in which each match counts for 3. Match-failures
7385 result in NOPs and we use extra_goodness() to pick the execution
7386 units that are best suited for issuing the NOP. */
7387 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7388 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7389 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7392 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7395 if (match (t
, i
, 0))
7397 if (match (t
, j
, 1))
7399 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7400 goodness
= 3 + 3 + 3;
7402 goodness
= 3 + 3 + extra_goodness (t
, 2);
7404 else if (match (t
, j
, 2))
7405 goodness
= 3 + 3 + extra_goodness (t
, 1);
7409 goodness
+= extra_goodness (t
, 1);
7410 goodness
+= extra_goodness (t
, 2);
7413 else if (match (t
, i
, 1))
7415 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7418 goodness
= 3 + extra_goodness (t
, 2);
7420 else if (match (t
, i
, 2))
7421 goodness
= 3 + extra_goodness (t
, 1);
7423 if (goodness
> best
)
7426 best_template
[i
][j
][k
] = t
;
7431 #ifdef DEBUG_TEMPLATES
7432 /* For debugging changes to the best_template calculations. We don't care
7433 about combinations with invalid instructions, so start the loops at 1. */
7434 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7435 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7436 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7438 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7440 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7442 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7446 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7447 md
.slot
[i
].user_template
= -1;
7449 md
.pseudo_hash
= hash_new ();
7450 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7452 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7453 (void *) (pseudo_opcode
+ i
));
7455 as_fatal (_("ia64.md_begin: can't hash `%s': %s"),
7456 pseudo_opcode
[i
].name
, err
);
7459 md
.reg_hash
= hash_new ();
7460 md
.dynreg_hash
= hash_new ();
7461 md
.const_hash
= hash_new ();
7462 md
.entry_hash
= hash_new ();
7464 /* general registers: */
7465 declare_register_set ("r", 128, REG_GR
);
7466 declare_register ("gp", REG_GR
+ 1);
7467 declare_register ("sp", REG_GR
+ 12);
7468 declare_register ("tp", REG_GR
+ 13);
7469 declare_register_set ("ret", 4, REG_GR
+ 8);
7471 /* floating point registers: */
7472 declare_register_set ("f", 128, REG_FR
);
7473 declare_register_set ("farg", 8, REG_FR
+ 8);
7474 declare_register_set ("fret", 8, REG_FR
+ 8);
7476 /* branch registers: */
7477 declare_register_set ("b", 8, REG_BR
);
7478 declare_register ("rp", REG_BR
+ 0);
7480 /* predicate registers: */
7481 declare_register_set ("p", 64, REG_P
);
7482 declare_register ("pr", REG_PR
);
7483 declare_register ("pr.rot", REG_PR_ROT
);
7485 /* application registers: */
7486 declare_register_set ("ar", 128, REG_AR
);
7487 for (i
= 0; i
< NELEMS (ar
); ++i
)
7488 declare_register (ar
[i
].name
, REG_AR
+ ar
[i
].regnum
);
7490 /* control registers: */
7491 declare_register_set ("cr", 128, REG_CR
);
7492 for (i
= 0; i
< NELEMS (cr
); ++i
)
7493 declare_register (cr
[i
].name
, REG_CR
+ cr
[i
].regnum
);
7495 /* dahr registers: */
7496 declare_register_set ("dahr", 8, REG_DAHR
);
7498 declare_register ("ip", REG_IP
);
7499 declare_register ("cfm", REG_CFM
);
7500 declare_register ("psr", REG_PSR
);
7501 declare_register ("psr.l", REG_PSR_L
);
7502 declare_register ("psr.um", REG_PSR_UM
);
7504 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7506 unsigned int regnum
= indirect_reg
[i
].regnum
;
7508 md
.indregsym
[regnum
- IND_CPUID
] = declare_register (indirect_reg
[i
].name
, regnum
);
7511 /* pseudo-registers used to specify unwind info: */
7512 declare_register ("psp", REG_PSP
);
7514 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7516 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7517 (void *) (const_bits
+ i
));
7519 as_fatal (_("Inserting \"%s\" into constant hash table failed: %s"),
7523 /* Set the architecture and machine depending on defaults and command line
7525 if (md
.flags
& EF_IA_64_ABI64
)
7526 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7528 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7531 as_warn (_("Could not set architecture and machine"));
7533 /* Set the pointer size and pointer shift size depending on md.flags */
7535 if (md
.flags
& EF_IA_64_ABI64
)
7537 md
.pointer_size
= 8; /* pointers are 8 bytes */
7538 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7542 md
.pointer_size
= 4; /* pointers are 4 bytes */
7543 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7546 md
.mem_offset
.hint
= 0;
7549 md
.entry_labels
= NULL
;
7552 /* Set the default options in md. Cannot do this in md_begin because
7553 that is called after md_parse_option which is where we set the
7554 options in md based on command line options. */
7557 ia64_init (int argc ATTRIBUTE_UNUSED
, char **argv ATTRIBUTE_UNUSED
)
7559 md
.flags
= MD_FLAGS_DEFAULT
;
7561 /* Don't turn on dependency checking for VMS, doesn't work. */
7564 /* FIXME: We should change it to unwind_check_error someday. */
7565 md
.unwind_check
= unwind_check_warning
;
7566 md
.hint_b
= hint_b_error
;
7570 /* Return a string for the target object file format. */
7573 ia64_target_format (void)
7575 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7577 if (md
.flags
& EF_IA_64_BE
)
7579 if (md
.flags
& EF_IA_64_ABI64
)
7580 #if defined(TE_AIX50)
7581 return "elf64-ia64-aix-big";
7582 #elif defined(TE_HPUX)
7583 return "elf64-ia64-hpux-big";
7585 return "elf64-ia64-big";
7588 #if defined(TE_AIX50)
7589 return "elf32-ia64-aix-big";
7590 #elif defined(TE_HPUX)
7591 return "elf32-ia64-hpux-big";
7593 return "elf32-ia64-big";
7598 if (md
.flags
& EF_IA_64_ABI64
)
7599 #if defined (TE_AIX50)
7600 return "elf64-ia64-aix-little";
7601 #elif defined (TE_VMS)
7603 md
.flags
|= EF_IA_64_ARCHVER_1
;
7604 return "elf64-ia64-vms";
7607 return "elf64-ia64-little";
7611 return "elf32-ia64-aix-little";
7613 return "elf32-ia64-little";
7618 return "unknown-format";
7622 ia64_end_of_source (void)
7624 /* terminate insn group upon reaching end of file: */
7625 insn_group_break (1, 0, 0);
7627 /* emits slots we haven't written yet: */
7628 ia64_flush_insns ();
7630 bfd_set_private_flags (stdoutput
, md
.flags
);
7632 md
.mem_offset
.hint
= 0;
7636 ia64_start_line (void)
7641 /* Make sure we don't reference input_line_pointer[-1] when that's
7647 if (md
.qp
.X_op
== O_register
)
7648 as_bad (_("qualifying predicate not followed by instruction"));
7649 md
.qp
.X_op
= O_absent
;
7651 if (ignore_input ())
7654 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7656 if (md
.detect_dv
&& !md
.explicit_mode
)
7663 as_warn (_("Explicit stops are ignored in auto mode"));
7667 insn_group_break (1, 0, 0);
7669 else if (input_line_pointer
[-1] == '{')
7671 if (md
.manual_bundling
)
7672 as_warn (_("Found '{' when manual bundling is already turned on"));
7674 CURR_SLOT
.manual_bundling_on
= 1;
7675 md
.manual_bundling
= 1;
7677 /* Bundling is only acceptable in explicit mode
7678 or when in default automatic mode. */
7679 if (md
.detect_dv
&& !md
.explicit_mode
)
7681 if (!md
.mode_explicitly_set
7682 && !md
.default_explicit_mode
)
7685 as_warn (_("Found '{' after explicit switch to automatic mode"));
7688 else if (input_line_pointer
[-1] == '}')
7690 if (!md
.manual_bundling
)
7691 as_warn (_("Found '}' when manual bundling is off"));
7693 PREV_SLOT
.manual_bundling_off
= 1;
7694 md
.manual_bundling
= 0;
7696 /* switch back to automatic mode, if applicable */
7699 && !md
.mode_explicitly_set
7700 && !md
.default_explicit_mode
)
7705 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7707 static int defining_tag
= 0;
7710 ia64_unrecognized_line (int ch
)
7715 expression_and_evaluate (&md
.qp
);
7716 if (*input_line_pointer
++ != ')')
7718 as_bad (_("Expected ')'"));
7721 if (md
.qp
.X_op
!= O_register
)
7723 as_bad (_("Qualifying predicate expected"));
7726 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7728 as_bad (_("Predicate register expected"));
7740 if (md
.qp
.X_op
== O_register
)
7742 as_bad (_("Tag must come before qualifying predicate."));
7746 /* This implements just enough of read_a_source_file in read.c to
7747 recognize labels. */
7748 if (is_name_beginner (*input_line_pointer
))
7750 s
= input_line_pointer
;
7751 c
= get_symbol_end ();
7753 else if (LOCAL_LABELS_FB
7754 && ISDIGIT (*input_line_pointer
))
7757 while (ISDIGIT (*input_line_pointer
))
7758 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7759 fb_label_instance_inc (temp
);
7760 s
= fb_label_name (temp
, 0);
7761 c
= *input_line_pointer
;
7770 /* Put ':' back for error messages' sake. */
7771 *input_line_pointer
++ = ':';
7772 as_bad (_("Expected ':'"));
7779 /* Put ':' back for error messages' sake. */
7780 *input_line_pointer
++ = ':';
7781 if (*input_line_pointer
++ != ']')
7783 as_bad (_("Expected ']'"));
7788 as_bad (_("Tag name expected"));
7798 /* Not a valid line. */
7803 ia64_frob_label (struct symbol
*sym
)
7805 struct label_fix
*fix
;
7807 /* Tags need special handling since they are not bundle breaks like
7811 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7813 fix
->next
= CURR_SLOT
.tag_fixups
;
7814 fix
->dw2_mark_labels
= FALSE
;
7815 CURR_SLOT
.tag_fixups
= fix
;
7820 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7822 md
.last_text_seg
= now_seg
;
7823 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7825 fix
->next
= CURR_SLOT
.label_fixups
;
7826 fix
->dw2_mark_labels
= dwarf2_loc_mark_labels
;
7827 CURR_SLOT
.label_fixups
= fix
;
7829 /* Keep track of how many code entry points we've seen. */
7830 if (md
.path
== md
.maxpaths
)
7833 md
.entry_labels
= (const char **)
7834 xrealloc ((void *) md
.entry_labels
,
7835 md
.maxpaths
* sizeof (char *));
7837 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7842 /* The HP-UX linker will give unresolved symbol errors for symbols
7843 that are declared but unused. This routine removes declared,
7844 unused symbols from an object. */
7846 ia64_frob_symbol (struct symbol
*sym
)
7848 if ((S_GET_SEGMENT (sym
) == bfd_und_section_ptr
&& ! symbol_used_p (sym
) &&
7849 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7850 || (S_GET_SEGMENT (sym
) == bfd_abs_section_ptr
7851 && ! S_IS_EXTERNAL (sym
)))
7858 ia64_flush_pending_output (void)
7860 if (!md
.keep_pending_output
7861 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7863 /* ??? This causes many unnecessary stop bits to be emitted.
7864 Unfortunately, it isn't clear if it is safe to remove this. */
7865 insn_group_break (1, 0, 0);
7866 ia64_flush_insns ();
7870 /* Do ia64-specific expression optimization. All that's done here is
7871 to transform index expressions that are either due to the indexing
7872 of rotating registers or due to the indexing of indirect register
7875 ia64_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
7879 resolve_expression (l
);
7880 if (l
->X_op
== O_register
)
7882 unsigned num_regs
= l
->X_add_number
>> 16;
7884 resolve_expression (r
);
7887 /* Left side is a .rotX-allocated register. */
7888 if (r
->X_op
!= O_constant
)
7890 as_bad (_("Rotating register index must be a non-negative constant"));
7891 r
->X_add_number
= 0;
7893 else if ((valueT
) r
->X_add_number
>= num_regs
)
7895 as_bad (_("Index out of range 0..%u"), num_regs
- 1);
7896 r
->X_add_number
= 0;
7898 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7901 else if (l
->X_add_number
>= IND_CPUID
&& l
->X_add_number
<= IND_RR
)
7903 if (r
->X_op
!= O_register
7904 || r
->X_add_number
< REG_GR
7905 || r
->X_add_number
> REG_GR
+ 127)
7907 as_bad (_("Indirect register index must be a general register"));
7908 r
->X_add_number
= REG_GR
;
7911 l
->X_op_symbol
= md
.indregsym
[l
->X_add_number
- IND_CPUID
];
7912 l
->X_add_number
= r
->X_add_number
;
7916 as_bad (_("Index can only be applied to rotating or indirect registers"));
7917 /* Fall back to some register use of which has as little as possible
7918 side effects, to minimize subsequent error messages. */
7919 l
->X_op
= O_register
;
7920 l
->X_add_number
= REG_GR
+ 3;
7925 ia64_parse_name (char *name
, expressionS
*e
, char *nextcharP
)
7927 struct const_desc
*cdesc
;
7928 struct dynreg
*dr
= 0;
7935 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7937 /* Find what relocation pseudo-function we're dealing with. */
7938 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7939 if (pseudo_func
[idx
].name
7940 && pseudo_func
[idx
].name
[0] == name
[1]
7941 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7943 pseudo_type
= pseudo_func
[idx
].type
;
7946 switch (pseudo_type
)
7948 case PSEUDO_FUNC_RELOC
:
7949 end
= input_line_pointer
;
7950 if (*nextcharP
!= '(')
7952 as_bad (_("Expected '('"));
7956 ++input_line_pointer
;
7958 if (*input_line_pointer
!= ')')
7960 as_bad (_("Missing ')'"));
7964 ++input_line_pointer
;
7966 if (idx
== FUNC_SLOTCOUNT_RELOC
)
7968 /* @slotcount can accept any expression. Canonicalize. */
7969 e
->X_add_symbol
= make_expr_symbol (e
);
7971 e
->X_add_number
= 0;
7974 if (e
->X_op
!= O_symbol
)
7976 if (e
->X_op
!= O_pseudo_fixup
)
7978 as_bad (_("Not a symbolic expression"));
7981 if (idx
!= FUNC_LT_RELATIVE
)
7983 as_bad (_("Illegal combination of relocation functions"));
7986 switch (S_GET_VALUE (e
->X_op_symbol
))
7988 case FUNC_FPTR_RELATIVE
:
7989 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7990 case FUNC_DTP_MODULE
:
7991 idx
= FUNC_LT_DTP_MODULE
; break;
7992 case FUNC_DTP_RELATIVE
:
7993 idx
= FUNC_LT_DTP_RELATIVE
; break;
7994 case FUNC_TP_RELATIVE
:
7995 idx
= FUNC_LT_TP_RELATIVE
; break;
7997 as_bad (_("Illegal combination of relocation functions"));
8001 /* Make sure gas doesn't get rid of local symbols that are used
8003 e
->X_op
= O_pseudo_fixup
;
8004 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
8006 *nextcharP
= *input_line_pointer
;
8009 case PSEUDO_FUNC_CONST
:
8010 e
->X_op
= O_constant
;
8011 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
8014 case PSEUDO_FUNC_REG
:
8015 e
->X_op
= O_register
;
8016 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
8025 /* first see if NAME is a known register name: */
8026 sym
= hash_find (md
.reg_hash
, name
);
8029 e
->X_op
= O_register
;
8030 e
->X_add_number
= S_GET_VALUE (sym
);
8034 cdesc
= hash_find (md
.const_hash
, name
);
8037 e
->X_op
= O_constant
;
8038 e
->X_add_number
= cdesc
->value
;
8042 /* check for inN, locN, or outN: */
8047 if (name
[1] == 'n' && ISDIGIT (name
[2]))
8055 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
8063 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
8074 /* Ignore register numbers with leading zeroes, except zero itself. */
8075 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
8077 unsigned long regnum
;
8079 /* The name is inN, locN, or outN; parse the register number. */
8080 regnum
= strtoul (name
+ idx
, &end
, 10);
8081 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
8083 if (regnum
>= dr
->num_regs
)
8086 as_bad (_("No current frame"));
8088 as_bad (_("Register number out of range 0..%u"),
8092 e
->X_op
= O_register
;
8093 e
->X_add_number
= dr
->base
+ regnum
;
8098 end
= alloca (strlen (name
) + 1);
8100 name
= ia64_canonicalize_symbol_name (end
);
8101 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8103 /* We've got ourselves the name of a rotating register set.
8104 Store the base register number in the low 16 bits of
8105 X_add_number and the size of the register set in the top 16
8107 e
->X_op
= O_register
;
8108 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8114 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8117 ia64_canonicalize_symbol_name (char *name
)
8119 size_t len
= strlen (name
), full
= len
;
8121 while (len
> 0 && name
[len
- 1] == '#')
8126 as_bad (_("Standalone `#' is illegal"));
8128 else if (len
< full
- 1)
8129 as_warn (_("Redundant `#' suffix operators"));
8134 /* Return true if idesc is a conditional branch instruction. This excludes
8135 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8136 because they always read/write resources regardless of the value of the
8137 qualifying predicate. br.ia must always use p0, and hence is always
8138 taken. Thus this function returns true for branches which can fall
8139 through, and which use no resources if they do fall through. */
8142 is_conditional_branch (struct ia64_opcode
*idesc
)
8144 /* br is a conditional branch. Everything that starts with br. except
8145 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8146 Everything that starts with brl is a conditional branch. */
8147 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8148 && (idesc
->name
[2] == '\0'
8149 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8150 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8151 || idesc
->name
[2] == 'l'
8152 /* br.cond, br.call, br.clr */
8153 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8154 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8155 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8158 /* Return whether the given opcode is a taken branch. If there's any doubt,
8162 is_taken_branch (struct ia64_opcode
*idesc
)
8164 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8165 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8168 /* Return whether the given opcode is an interruption or rfi. If there's any
8169 doubt, returns zero. */
8172 is_interruption_or_rfi (struct ia64_opcode
*idesc
)
8174 if (strcmp (idesc
->name
, "rfi") == 0)
8179 /* Returns the index of the given dependency in the opcode's list of chks, or
8180 -1 if there is no dependency. */
8183 depends_on (int depind
, struct ia64_opcode
*idesc
)
8186 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8187 for (i
= 0; i
< dep
->nchks
; i
++)
8189 if (depind
== DEP (dep
->chks
[i
]))
8195 /* Determine a set of specific resources used for a particular resource
8196 class. Returns the number of specific resources identified For those
8197 cases which are not determinable statically, the resource returned is
8200 Meanings of value in 'NOTE':
8201 1) only read/write when the register number is explicitly encoded in the
8203 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8204 accesses CFM when qualifying predicate is in the rotating region.
8205 3) general register value is used to specify an indirect register; not
8206 determinable statically.
8207 4) only read the given resource when bits 7:0 of the indirect index
8208 register value does not match the register number of the resource; not
8209 determinable statically.
8210 5) all rules are implementation specific.
8211 6) only when both the index specified by the reader and the index specified
8212 by the writer have the same value in bits 63:61; not determinable
8214 7) only access the specified resource when the corresponding mask bit is
8216 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8217 only read when these insns reference FR2-31
8218 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8219 written when these insns write FR32-127
8220 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8222 11) The target predicates are written independently of PR[qp], but source
8223 registers are only read if PR[qp] is true. Since the state of PR[qp]
8224 cannot statically be determined, all source registers are marked used.
8225 12) This insn only reads the specified predicate register when that
8226 register is the PR[qp].
8227 13) This reference to ld-c only applies to the GR whose value is loaded
8228 with data returned from memory, not the post-incremented address register.
8229 14) The RSE resource includes the implementation-specific RSE internal
8230 state resources. At least one (and possibly more) of these resources are
8231 read by each instruction listed in IC:rse-readers. At least one (and
8232 possibly more) of these resources are written by each insn listed in
8234 15+16) Represents reserved instructions, which the assembler does not
8236 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and
8237 mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up.
8239 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8240 this code; there are no dependency violations based on memory access.
8243 #define MAX_SPECS 256
8248 specify_resource (const struct ia64_dependency
*dep
,
8249 struct ia64_opcode
*idesc
,
8250 /* is this a DV chk or a DV reg? */
8252 /* returned specific resources */
8253 struct rsrc specs
[MAX_SPECS
],
8254 /* resource note for this insn's usage */
8256 /* which execution path to examine */
8264 if (dep
->mode
== IA64_DV_WAW
8265 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8266 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8269 /* template for any resources we identify */
8270 tmpl
.dependency
= dep
;
8272 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8273 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8274 tmpl
.link_to_qp_branch
= 1;
8275 tmpl
.mem_offset
.hint
= 0;
8276 tmpl
.mem_offset
.offset
= 0;
8277 tmpl
.mem_offset
.base
= 0;
8280 tmpl
.cmp_type
= CMP_NONE
;
8287 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8288 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8289 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8291 /* we don't need to track these */
8292 if (dep
->semantics
== IA64_DVS_NONE
)
8295 switch (dep
->specifier
)
8300 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8302 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8303 if (regno
>= 0 && regno
<= 7)
8305 specs
[count
] = tmpl
;
8306 specs
[count
++].index
= regno
;
8312 for (i
= 0; i
< 8; i
++)
8314 specs
[count
] = tmpl
;
8315 specs
[count
++].index
= i
;
8324 case IA64_RS_AR_UNAT
:
8325 /* This is a mov =AR or mov AR= instruction. */
8326 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8328 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8329 if (regno
== AR_UNAT
)
8331 specs
[count
++] = tmpl
;
8336 /* This is a spill/fill, or other instruction that modifies the
8339 /* Unless we can determine the specific bits used, mark the whole
8340 thing; bits 8:3 of the memory address indicate the bit used in
8341 UNAT. The .mem.offset hint may be used to eliminate a small
8342 subset of conflicts. */
8343 specs
[count
] = tmpl
;
8344 if (md
.mem_offset
.hint
)
8347 fprintf (stderr
, " Using hint for spill/fill\n");
8348 /* The index isn't actually used, just set it to something
8349 approximating the bit index. */
8350 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8351 specs
[count
].mem_offset
.hint
= 1;
8352 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8353 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8357 specs
[count
++].specific
= 0;
8365 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8367 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8368 if ((regno
>= 8 && regno
<= 15)
8369 || (regno
>= 20 && regno
<= 23)
8370 || (regno
>= 31 && regno
<= 39)
8371 || (regno
>= 41 && regno
<= 47)
8372 || (regno
>= 67 && regno
<= 111))
8374 specs
[count
] = tmpl
;
8375 specs
[count
++].index
= regno
;
8388 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8390 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8391 if ((regno
>= 48 && regno
<= 63)
8392 || (regno
>= 112 && regno
<= 127))
8394 specs
[count
] = tmpl
;
8395 specs
[count
++].index
= regno
;
8401 for (i
= 48; i
< 64; i
++)
8403 specs
[count
] = tmpl
;
8404 specs
[count
++].index
= i
;
8406 for (i
= 112; i
< 128; i
++)
8408 specs
[count
] = tmpl
;
8409 specs
[count
++].index
= i
;
8427 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8428 if (idesc
->operands
[i
] == IA64_OPND_B1
8429 || idesc
->operands
[i
] == IA64_OPND_B2
)
8431 specs
[count
] = tmpl
;
8432 specs
[count
++].index
=
8433 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8438 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8439 if (idesc
->operands
[i
] == IA64_OPND_B1
8440 || idesc
->operands
[i
] == IA64_OPND_B2
)
8442 specs
[count
] = tmpl
;
8443 specs
[count
++].index
=
8444 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8450 case IA64_RS_CPUID
: /* four or more registers */
8453 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8455 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8456 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8459 specs
[count
] = tmpl
;
8460 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8464 specs
[count
] = tmpl
;
8465 specs
[count
++].specific
= 0;
8475 case IA64_RS_DBR
: /* four or more registers */
8478 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8480 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8481 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8484 specs
[count
] = tmpl
;
8485 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8489 specs
[count
] = tmpl
;
8490 specs
[count
++].specific
= 0;
8494 else if (note
== 0 && !rsrc_write
)
8496 specs
[count
] = tmpl
;
8497 specs
[count
++].specific
= 0;
8505 case IA64_RS_IBR
: /* four or more registers */
8508 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8510 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8511 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8514 specs
[count
] = tmpl
;
8515 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8519 specs
[count
] = tmpl
;
8520 specs
[count
++].specific
= 0;
8533 /* These are implementation specific. Force all references to
8534 conflict with all other references. */
8535 specs
[count
] = tmpl
;
8536 specs
[count
++].specific
= 0;
8544 case IA64_RS_PKR
: /* 16 or more registers */
8545 if (note
== 3 || note
== 4)
8547 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8549 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8550 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8555 specs
[count
] = tmpl
;
8556 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8559 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8561 /* Uses all registers *except* the one in R3. */
8562 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8564 specs
[count
] = tmpl
;
8565 specs
[count
++].index
= i
;
8571 specs
[count
] = tmpl
;
8572 specs
[count
++].specific
= 0;
8579 specs
[count
] = tmpl
;
8580 specs
[count
++].specific
= 0;
8584 case IA64_RS_PMC
: /* four or more registers */
8587 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8588 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8591 int reg_index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8593 int regno
= CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_GR
;
8594 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8597 specs
[count
] = tmpl
;
8598 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8602 specs
[count
] = tmpl
;
8603 specs
[count
++].specific
= 0;
8613 case IA64_RS_PMD
: /* four or more registers */
8616 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8618 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8619 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8622 specs
[count
] = tmpl
;
8623 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8627 specs
[count
] = tmpl
;
8628 specs
[count
++].specific
= 0;
8638 case IA64_RS_RR
: /* eight registers */
8641 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8643 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8644 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8647 specs
[count
] = tmpl
;
8648 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8652 specs
[count
] = tmpl
;
8653 specs
[count
++].specific
= 0;
8657 else if (note
== 0 && !rsrc_write
)
8659 specs
[count
] = tmpl
;
8660 specs
[count
++].specific
= 0;
8668 case IA64_RS_CR_IRR
:
8671 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8672 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8674 && idesc
->operands
[1] == IA64_OPND_CR3
8677 for (i
= 0; i
< 4; i
++)
8679 specs
[count
] = tmpl
;
8680 specs
[count
++].index
= CR_IRR0
+ i
;
8686 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8687 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8689 && regno
<= CR_IRR3
)
8691 specs
[count
] = tmpl
;
8692 specs
[count
++].index
= regno
;
8701 case IA64_RS_CR_IIB
:
8708 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8709 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8710 && (regno
== CR_IIB0
|| regno
== CR_IIB1
))
8712 specs
[count
] = tmpl
;
8713 specs
[count
++].index
= regno
;
8718 case IA64_RS_CR_LRR
:
8725 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8726 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8727 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8729 specs
[count
] = tmpl
;
8730 specs
[count
++].index
= regno
;
8738 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8740 specs
[count
] = tmpl
;
8741 specs
[count
++].index
=
8742 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8754 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DAHR3
)
8756 specs
[count
] = tmpl
;
8757 specs
[count
++].index
=
8758 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_DAHR
;
8773 else if (rsrc_write
)
8775 if (dep
->specifier
== IA64_RS_FRb
8776 && idesc
->operands
[0] == IA64_OPND_F1
)
8778 specs
[count
] = tmpl
;
8779 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8784 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8786 if (idesc
->operands
[i
] == IA64_OPND_F2
8787 || idesc
->operands
[i
] == IA64_OPND_F3
8788 || idesc
->operands
[i
] == IA64_OPND_F4
)
8790 specs
[count
] = tmpl
;
8791 specs
[count
++].index
=
8792 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8801 /* This reference applies only to the GR whose value is loaded with
8802 data returned from memory. */
8803 specs
[count
] = tmpl
;
8804 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8810 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8811 if (idesc
->operands
[i
] == IA64_OPND_R1
8812 || idesc
->operands
[i
] == IA64_OPND_R2
8813 || idesc
->operands
[i
] == IA64_OPND_R3
)
8815 specs
[count
] = tmpl
;
8816 specs
[count
++].index
=
8817 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8819 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8820 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8821 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8823 specs
[count
] = tmpl
;
8824 specs
[count
++].index
=
8825 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8830 /* Look for anything that reads a GR. */
8831 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8833 if (idesc
->operands
[i
] == IA64_OPND_MR3
8834 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8835 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8836 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8837 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8838 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8839 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8840 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8841 || idesc
->operands
[i
] == IA64_OPND_DAHR_R3
8842 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8843 || ((i
>= idesc
->num_outputs
)
8844 && (idesc
->operands
[i
] == IA64_OPND_R1
8845 || idesc
->operands
[i
] == IA64_OPND_R2
8846 || idesc
->operands
[i
] == IA64_OPND_R3
8847 /* addl source register. */
8848 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8850 specs
[count
] = tmpl
;
8851 specs
[count
++].index
=
8852 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8863 /* This is the same as IA64_RS_PRr, except that the register range is
8864 from 1 - 15, and there are no rotating register reads/writes here. */
8868 for (i
= 1; i
< 16; i
++)
8870 specs
[count
] = tmpl
;
8871 specs
[count
++].index
= i
;
8877 /* Mark only those registers indicated by the mask. */
8880 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8881 for (i
= 1; i
< 16; i
++)
8882 if (mask
& ((valueT
) 1 << i
))
8884 specs
[count
] = tmpl
;
8885 specs
[count
++].index
= i
;
8893 else if (note
== 11) /* note 11 implies note 1 as well */
8897 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8899 if (idesc
->operands
[i
] == IA64_OPND_P1
8900 || idesc
->operands
[i
] == IA64_OPND_P2
)
8902 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8903 if (regno
>= 1 && regno
< 16)
8905 specs
[count
] = tmpl
;
8906 specs
[count
++].index
= regno
;
8916 else if (note
== 12)
8918 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8920 specs
[count
] = tmpl
;
8921 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8928 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8929 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8930 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8931 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8933 if ((idesc
->operands
[0] == IA64_OPND_P1
8934 || idesc
->operands
[0] == IA64_OPND_P2
)
8935 && p1
>= 1 && p1
< 16)
8937 specs
[count
] = tmpl
;
8938 specs
[count
].cmp_type
=
8939 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8940 specs
[count
++].index
= p1
;
8942 if ((idesc
->operands
[1] == IA64_OPND_P1
8943 || idesc
->operands
[1] == IA64_OPND_P2
)
8944 && p2
>= 1 && p2
< 16)
8946 specs
[count
] = tmpl
;
8947 specs
[count
].cmp_type
=
8948 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8949 specs
[count
++].index
= p2
;
8954 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8956 specs
[count
] = tmpl
;
8957 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8959 if (idesc
->operands
[1] == IA64_OPND_PR
)
8961 for (i
= 1; i
< 16; i
++)
8963 specs
[count
] = tmpl
;
8964 specs
[count
++].index
= i
;
8975 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8976 simplified cases of this. */
8980 for (i
= 16; i
< 63; i
++)
8982 specs
[count
] = tmpl
;
8983 specs
[count
++].index
= i
;
8989 /* Mark only those registers indicated by the mask. */
8991 && idesc
->operands
[0] == IA64_OPND_PR
)
8993 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8994 if (mask
& ((valueT
) 1 << 16))
8995 for (i
= 16; i
< 63; i
++)
8997 specs
[count
] = tmpl
;
8998 specs
[count
++].index
= i
;
9002 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
9004 for (i
= 16; i
< 63; i
++)
9006 specs
[count
] = tmpl
;
9007 specs
[count
++].index
= i
;
9015 else if (note
== 11) /* note 11 implies note 1 as well */
9019 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9021 if (idesc
->operands
[i
] == IA64_OPND_P1
9022 || idesc
->operands
[i
] == IA64_OPND_P2
)
9024 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9025 if (regno
>= 16 && regno
< 63)
9027 specs
[count
] = tmpl
;
9028 specs
[count
++].index
= regno
;
9038 else if (note
== 12)
9040 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9042 specs
[count
] = tmpl
;
9043 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9050 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9051 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9052 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9053 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9055 if ((idesc
->operands
[0] == IA64_OPND_P1
9056 || idesc
->operands
[0] == IA64_OPND_P2
)
9057 && p1
>= 16 && p1
< 63)
9059 specs
[count
] = tmpl
;
9060 specs
[count
].cmp_type
=
9061 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9062 specs
[count
++].index
= p1
;
9064 if ((idesc
->operands
[1] == IA64_OPND_P1
9065 || idesc
->operands
[1] == IA64_OPND_P2
)
9066 && p2
>= 16 && p2
< 63)
9068 specs
[count
] = tmpl
;
9069 specs
[count
].cmp_type
=
9070 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9071 specs
[count
++].index
= p2
;
9076 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9078 specs
[count
] = tmpl
;
9079 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9081 if (idesc
->operands
[1] == IA64_OPND_PR
)
9083 for (i
= 16; i
< 63; i
++)
9085 specs
[count
] = tmpl
;
9086 specs
[count
++].index
= i
;
9098 /* Verify that the instruction is using the PSR bit indicated in
9102 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
9104 if (dep
->regindex
< 6)
9106 specs
[count
++] = tmpl
;
9109 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
9111 if (dep
->regindex
< 32
9112 || dep
->regindex
== 35
9113 || dep
->regindex
== 36
9114 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
9116 specs
[count
++] = tmpl
;
9119 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
9121 if (dep
->regindex
< 32
9122 || dep
->regindex
== 35
9123 || dep
->regindex
== 36
9124 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
9126 specs
[count
++] = tmpl
;
9131 /* Several PSR bits have very specific dependencies. */
9132 switch (dep
->regindex
)
9135 specs
[count
++] = tmpl
;
9140 specs
[count
++] = tmpl
;
9144 /* Only certain CR accesses use PSR.ic */
9145 if (idesc
->operands
[0] == IA64_OPND_CR3
9146 || idesc
->operands
[1] == IA64_OPND_CR3
)
9149 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9152 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_CR
;
9169 specs
[count
++] = tmpl
;
9178 specs
[count
++] = tmpl
;
9182 /* Only some AR accesses use cpl */
9183 if (idesc
->operands
[0] == IA64_OPND_AR3
9184 || idesc
->operands
[1] == IA64_OPND_AR3
)
9187 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9190 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_AR
;
9197 && regno
<= AR_K7
))))
9199 specs
[count
++] = tmpl
;
9204 specs
[count
++] = tmpl
;
9214 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9216 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9222 if (mask
& ((valueT
) 1 << dep
->regindex
))
9224 specs
[count
++] = tmpl
;
9229 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9230 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9231 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9232 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9234 if (idesc
->operands
[i
] == IA64_OPND_F1
9235 || idesc
->operands
[i
] == IA64_OPND_F2
9236 || idesc
->operands
[i
] == IA64_OPND_F3
9237 || idesc
->operands
[i
] == IA64_OPND_F4
)
9239 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9240 if (reg
>= min
&& reg
<= max
)
9242 specs
[count
++] = tmpl
;
9249 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9250 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9251 /* mfh is read on writes to FR32-127; mfl is read on writes to
9253 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9255 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9257 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9258 if (reg
>= min
&& reg
<= max
)
9260 specs
[count
++] = tmpl
;
9265 else if (note
== 10)
9267 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9269 if (idesc
->operands
[i
] == IA64_OPND_R1
9270 || idesc
->operands
[i
] == IA64_OPND_R2
9271 || idesc
->operands
[i
] == IA64_OPND_R3
)
9273 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9274 if (regno
>= 16 && regno
<= 31)
9276 specs
[count
++] = tmpl
;
9287 case IA64_RS_AR_FPSR
:
9288 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9290 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9291 if (regno
== AR_FPSR
)
9293 specs
[count
++] = tmpl
;
9298 specs
[count
++] = tmpl
;
9303 /* Handle all AR[REG] resources */
9304 if (note
== 0 || note
== 1)
9306 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9307 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9308 && regno
== dep
->regindex
)
9310 specs
[count
++] = tmpl
;
9312 /* other AR[REG] resources may be affected by AR accesses */
9313 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9316 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9317 switch (dep
->regindex
)
9323 if (regno
== AR_BSPSTORE
)
9325 specs
[count
++] = tmpl
;
9329 (regno
== AR_BSPSTORE
9330 || regno
== AR_RNAT
))
9332 specs
[count
++] = tmpl
;
9337 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9340 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9341 switch (dep
->regindex
)
9346 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9348 specs
[count
++] = tmpl
;
9355 specs
[count
++] = tmpl
;
9365 /* Handle all CR[REG] resources.
9366 ??? FIXME: The rule 17 isn't really handled correctly. */
9367 if (note
== 0 || note
== 1 || note
== 17)
9369 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9371 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9372 if (regno
== dep
->regindex
)
9374 specs
[count
++] = tmpl
;
9376 else if (!rsrc_write
)
9378 /* Reads from CR[IVR] affect other resources. */
9379 if (regno
== CR_IVR
)
9381 if ((dep
->regindex
>= CR_IRR0
9382 && dep
->regindex
<= CR_IRR3
)
9383 || dep
->regindex
== CR_TPR
)
9385 specs
[count
++] = tmpl
;
9392 specs
[count
++] = tmpl
;
9401 case IA64_RS_INSERVICE
:
9402 /* look for write of EOI (67) or read of IVR (65) */
9403 if ((idesc
->operands
[0] == IA64_OPND_CR3
9404 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9405 || (idesc
->operands
[1] == IA64_OPND_CR3
9406 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9408 specs
[count
++] = tmpl
;
9415 specs
[count
++] = tmpl
;
9426 specs
[count
++] = tmpl
;
9430 /* Check if any of the registers accessed are in the rotating region.
9431 mov to/from pr accesses CFM only when qp_regno is in the rotating
9433 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9435 if (idesc
->operands
[i
] == IA64_OPND_R1
9436 || idesc
->operands
[i
] == IA64_OPND_R2
9437 || idesc
->operands
[i
] == IA64_OPND_R3
)
9439 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9440 /* Assumes that md.rot.num_regs is always valid */
9441 if (md
.rot
.num_regs
> 0
9443 && num
< 31 + md
.rot
.num_regs
)
9445 specs
[count
] = tmpl
;
9446 specs
[count
++].specific
= 0;
9449 else if (idesc
->operands
[i
] == IA64_OPND_F1
9450 || idesc
->operands
[i
] == IA64_OPND_F2
9451 || idesc
->operands
[i
] == IA64_OPND_F3
9452 || idesc
->operands
[i
] == IA64_OPND_F4
)
9454 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9457 specs
[count
] = tmpl
;
9458 specs
[count
++].specific
= 0;
9461 else if (idesc
->operands
[i
] == IA64_OPND_P1
9462 || idesc
->operands
[i
] == IA64_OPND_P2
)
9464 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9467 specs
[count
] = tmpl
;
9468 specs
[count
++].specific
= 0;
9472 if (CURR_SLOT
.qp_regno
> 15)
9474 specs
[count
] = tmpl
;
9475 specs
[count
++].specific
= 0;
9480 /* This is the same as IA64_RS_PRr, except simplified to account for
9481 the fact that there is only one register. */
9485 specs
[count
++] = tmpl
;
9490 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9491 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9492 if (mask
& ((valueT
) 1 << 63))
9493 specs
[count
++] = tmpl
;
9495 else if (note
== 11)
9497 if ((idesc
->operands
[0] == IA64_OPND_P1
9498 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9499 || (idesc
->operands
[1] == IA64_OPND_P2
9500 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9502 specs
[count
++] = tmpl
;
9505 else if (note
== 12)
9507 if (CURR_SLOT
.qp_regno
== 63)
9509 specs
[count
++] = tmpl
;
9516 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9517 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9518 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9519 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9522 && (idesc
->operands
[0] == IA64_OPND_P1
9523 || idesc
->operands
[0] == IA64_OPND_P2
))
9525 specs
[count
] = tmpl
;
9526 specs
[count
++].cmp_type
=
9527 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9530 && (idesc
->operands
[1] == IA64_OPND_P1
9531 || idesc
->operands
[1] == IA64_OPND_P2
))
9533 specs
[count
] = tmpl
;
9534 specs
[count
++].cmp_type
=
9535 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9540 if (CURR_SLOT
.qp_regno
== 63)
9542 specs
[count
++] = tmpl
;
9553 /* FIXME we can identify some individual RSE written resources, but RSE
9554 read resources have not yet been completely identified, so for now
9555 treat RSE as a single resource */
9556 if (strncmp (idesc
->name
, "mov", 3) == 0)
9560 if (idesc
->operands
[0] == IA64_OPND_AR3
9561 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9563 specs
[count
++] = tmpl
;
9568 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9570 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9571 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9573 specs
[count
++] = tmpl
;
9576 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9578 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9579 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9580 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9582 specs
[count
++] = tmpl
;
9589 specs
[count
++] = tmpl
;
9594 /* FIXME -- do any of these need to be non-specific? */
9595 specs
[count
++] = tmpl
;
9599 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9606 /* Clear branch flags on marked resources. This breaks the link between the
9607 QP of the marking instruction and a subsequent branch on the same QP. */
9610 clear_qp_branch_flag (valueT mask
)
9613 for (i
= 0; i
< regdepslen
; i
++)
9615 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9616 if ((bit
& mask
) != 0)
9618 regdeps
[i
].link_to_qp_branch
= 0;
9623 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9624 any mutexes which contain one of the PRs and create new ones when
9628 update_qp_mutex (valueT mask
)
9634 while (i
< qp_mutexeslen
)
9636 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9638 /* If it destroys and creates the same mutex, do nothing. */
9639 if (qp_mutexes
[i
].prmask
== mask
9640 && qp_mutexes
[i
].path
== md
.path
)
9651 fprintf (stderr
, " Clearing mutex relation");
9652 print_prmask (qp_mutexes
[i
].prmask
);
9653 fprintf (stderr
, "\n");
9656 /* Deal with the old mutex with more than 3+ PRs only if
9657 the new mutex on the same execution path with it.
9659 FIXME: The 3+ mutex support is incomplete.
9660 dot_pred_rel () may be a better place to fix it. */
9661 if (qp_mutexes
[i
].path
== md
.path
)
9663 /* If it is a proper subset of the mutex, create a
9666 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9669 qp_mutexes
[i
].prmask
&= ~mask
;
9670 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9672 /* Modify the mutex if there are more than one
9680 /* Remove the mutex. */
9681 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9689 add_qp_mutex (mask
);
9694 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9696 Any changes to a PR clears the mutex relations which include that PR. */
9699 clear_qp_mutex (valueT mask
)
9704 while (i
< qp_mutexeslen
)
9706 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9710 fprintf (stderr
, " Clearing mutex relation");
9711 print_prmask (qp_mutexes
[i
].prmask
);
9712 fprintf (stderr
, "\n");
9714 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9721 /* Clear implies relations which contain PRs in the given masks.
9722 P1_MASK indicates the source of the implies relation, while P2_MASK
9723 indicates the implied PR. */
9726 clear_qp_implies (valueT p1_mask
, valueT p2_mask
)
9731 while (i
< qp_implieslen
)
9733 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9734 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9737 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9738 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9739 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9746 /* Add the PRs specified to the list of implied relations. */
9749 add_qp_imply (int p1
, int p2
)
9755 /* p0 is not meaningful here. */
9756 if (p1
== 0 || p2
== 0)
9762 /* If it exists already, ignore it. */
9763 for (i
= 0; i
< qp_implieslen
; i
++)
9765 if (qp_implies
[i
].p1
== p1
9766 && qp_implies
[i
].p2
== p2
9767 && qp_implies
[i
].path
== md
.path
9768 && !qp_implies
[i
].p2_branched
)
9772 if (qp_implieslen
== qp_impliestotlen
)
9774 qp_impliestotlen
+= 20;
9775 qp_implies
= (struct qp_imply
*)
9776 xrealloc ((void *) qp_implies
,
9777 qp_impliestotlen
* sizeof (struct qp_imply
));
9780 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9781 qp_implies
[qp_implieslen
].p1
= p1
;
9782 qp_implies
[qp_implieslen
].p2
= p2
;
9783 qp_implies
[qp_implieslen
].path
= md
.path
;
9784 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9786 /* Add in the implied transitive relations; for everything that p2 implies,
9787 make p1 imply that, too; for everything that implies p1, make it imply p2
9789 for (i
= 0; i
< qp_implieslen
; i
++)
9791 if (qp_implies
[i
].p1
== p2
)
9792 add_qp_imply (p1
, qp_implies
[i
].p2
);
9793 if (qp_implies
[i
].p2
== p1
)
9794 add_qp_imply (qp_implies
[i
].p1
, p2
);
9796 /* Add in mutex relations implied by this implies relation; for each mutex
9797 relation containing p2, duplicate it and replace p2 with p1. */
9798 bit
= (valueT
) 1 << p1
;
9799 mask
= (valueT
) 1 << p2
;
9800 for (i
= 0; i
< qp_mutexeslen
; i
++)
9802 if (qp_mutexes
[i
].prmask
& mask
)
9803 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9807 /* Add the PRs specified in the mask to the mutex list; this means that only
9808 one of the PRs can be true at any time. PR0 should never be included in
9812 add_qp_mutex (valueT mask
)
9817 if (qp_mutexeslen
== qp_mutexestotlen
)
9819 qp_mutexestotlen
+= 20;
9820 qp_mutexes
= (struct qpmutex
*)
9821 xrealloc ((void *) qp_mutexes
,
9822 qp_mutexestotlen
* sizeof (struct qpmutex
));
9826 fprintf (stderr
, " Registering mutex on");
9827 print_prmask (mask
);
9828 fprintf (stderr
, "\n");
9830 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9831 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9835 has_suffix_p (const char *name
, const char *suffix
)
9837 size_t namelen
= strlen (name
);
9838 size_t sufflen
= strlen (suffix
);
9840 if (namelen
<= sufflen
)
9842 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9846 clear_register_values (void)
9850 fprintf (stderr
, " Clearing register values\n");
9851 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9852 gr_values
[i
].known
= 0;
9855 /* Keep track of register values/changes which affect DV tracking.
9857 optimization note: should add a flag to classes of insns where otherwise we
9858 have to examine a group of strings to identify them. */
9861 note_register_values (struct ia64_opcode
*idesc
)
9863 valueT qp_changemask
= 0;
9866 /* Invalidate values for registers being written to. */
9867 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9869 if (idesc
->operands
[i
] == IA64_OPND_R1
9870 || idesc
->operands
[i
] == IA64_OPND_R2
9871 || idesc
->operands
[i
] == IA64_OPND_R3
)
9873 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9874 if (regno
> 0 && regno
< NELEMS (gr_values
))
9875 gr_values
[regno
].known
= 0;
9877 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9879 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9880 if (regno
> 0 && regno
< 4)
9881 gr_values
[regno
].known
= 0;
9883 else if (idesc
->operands
[i
] == IA64_OPND_P1
9884 || idesc
->operands
[i
] == IA64_OPND_P2
)
9886 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9887 qp_changemask
|= (valueT
) 1 << regno
;
9889 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9891 if (idesc
->operands
[2] & (valueT
) 0x10000)
9892 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9894 qp_changemask
= idesc
->operands
[2];
9897 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9899 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9900 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9902 qp_changemask
= idesc
->operands
[1];
9903 qp_changemask
&= ~(valueT
) 0xFFFF;
9908 /* Always clear qp branch flags on any PR change. */
9909 /* FIXME there may be exceptions for certain compares. */
9910 clear_qp_branch_flag (qp_changemask
);
9912 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9913 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9915 qp_changemask
|= ~(valueT
) 0xFFFF;
9916 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9918 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9919 gr_values
[i
].known
= 0;
9921 clear_qp_mutex (qp_changemask
);
9922 clear_qp_implies (qp_changemask
, qp_changemask
);
9924 /* After a call, all register values are undefined, except those marked
9926 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9927 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9929 /* FIXME keep GR values which are marked as "safe_across_calls" */
9930 clear_register_values ();
9931 clear_qp_mutex (~qp_safe_across_calls
);
9932 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9933 clear_qp_branch_flag (~qp_safe_across_calls
);
9935 else if (is_interruption_or_rfi (idesc
)
9936 || is_taken_branch (idesc
))
9938 clear_register_values ();
9939 clear_qp_mutex (~(valueT
) 0);
9940 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9942 /* Look for mutex and implies relations. */
9943 else if ((idesc
->operands
[0] == IA64_OPND_P1
9944 || idesc
->operands
[0] == IA64_OPND_P2
)
9945 && (idesc
->operands
[1] == IA64_OPND_P1
9946 || idesc
->operands
[1] == IA64_OPND_P2
))
9948 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9949 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9950 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9951 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9953 /* If both PRs are PR0, we can't really do anything. */
9954 if (p1
== 0 && p2
== 0)
9957 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9959 /* In general, clear mutexes and implies which include P1 or P2,
9960 with the following exceptions. */
9961 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9962 || has_suffix_p (idesc
->name
, ".and.orcm"))
9964 clear_qp_implies (p2mask
, p1mask
);
9966 else if (has_suffix_p (idesc
->name
, ".andcm")
9967 || has_suffix_p (idesc
->name
, ".and"))
9969 clear_qp_implies (0, p1mask
| p2mask
);
9971 else if (has_suffix_p (idesc
->name
, ".orcm")
9972 || has_suffix_p (idesc
->name
, ".or"))
9974 clear_qp_mutex (p1mask
| p2mask
);
9975 clear_qp_implies (p1mask
| p2mask
, 0);
9981 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9983 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9984 if (p1
== 0 || p2
== 0)
9985 clear_qp_mutex (p1mask
| p2mask
);
9987 added
= update_qp_mutex (p1mask
| p2mask
);
9989 if (CURR_SLOT
.qp_regno
== 0
9990 || has_suffix_p (idesc
->name
, ".unc"))
9992 if (added
== 0 && p1
&& p2
)
9993 add_qp_mutex (p1mask
| p2mask
);
9994 if (CURR_SLOT
.qp_regno
!= 0)
9997 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9999 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
10004 /* Look for mov imm insns into GRs. */
10005 else if (idesc
->operands
[0] == IA64_OPND_R1
10006 && (idesc
->operands
[1] == IA64_OPND_IMM22
10007 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
10008 && CURR_SLOT
.opnd
[1].X_op
== O_constant
10009 && (strcmp (idesc
->name
, "mov") == 0
10010 || strcmp (idesc
->name
, "movl") == 0))
10012 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
10013 if (regno
> 0 && regno
< NELEMS (gr_values
))
10015 gr_values
[regno
].known
= 1;
10016 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
10017 gr_values
[regno
].path
= md
.path
;
10020 fprintf (stderr
, " Know gr%d = ", regno
);
10021 fprintf_vma (stderr
, gr_values
[regno
].value
);
10022 fputs ("\n", stderr
);
10026 /* Look for dep.z imm insns. */
10027 else if (idesc
->operands
[0] == IA64_OPND_R1
10028 && idesc
->operands
[1] == IA64_OPND_IMM8
10029 && strcmp (idesc
->name
, "dep.z") == 0)
10031 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
10032 if (regno
> 0 && regno
< NELEMS (gr_values
))
10034 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
10036 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
10037 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
10038 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
10039 gr_values
[regno
].known
= 1;
10040 gr_values
[regno
].value
= value
;
10041 gr_values
[regno
].path
= md
.path
;
10044 fprintf (stderr
, " Know gr%d = ", regno
);
10045 fprintf_vma (stderr
, gr_values
[regno
].value
);
10046 fputs ("\n", stderr
);
10052 clear_qp_mutex (qp_changemask
);
10053 clear_qp_implies (qp_changemask
, qp_changemask
);
10057 /* Return whether the given predicate registers are currently mutex. */
10060 qp_mutex (int p1
, int p2
, int path
)
10067 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
10068 for (i
= 0; i
< qp_mutexeslen
; i
++)
10070 if (qp_mutexes
[i
].path
>= path
10071 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
10078 /* Return whether the given resource is in the given insn's list of chks
10079 Return 1 if the conflict is absolutely determined, 2 if it's a potential
10083 resources_match (struct rsrc
*rs
,
10084 struct ia64_opcode
*idesc
,
10089 struct rsrc specs
[MAX_SPECS
];
10092 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10093 we don't need to check. One exception is note 11, which indicates that
10094 target predicates are written regardless of PR[qp]. */
10095 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
10099 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
10100 while (count
-- > 0)
10102 /* UNAT checking is a bit more specific than other resources */
10103 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
10104 && specs
[count
].mem_offset
.hint
10105 && rs
->mem_offset
.hint
)
10107 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
10109 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
10110 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
10117 /* Skip apparent PR write conflicts where both writes are an AND or both
10118 writes are an OR. */
10119 if (rs
->dependency
->specifier
== IA64_RS_PR
10120 || rs
->dependency
->specifier
== IA64_RS_PRr
10121 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10123 if (specs
[count
].cmp_type
!= CMP_NONE
10124 && specs
[count
].cmp_type
== rs
->cmp_type
)
10127 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10128 dv_mode
[rs
->dependency
->mode
],
10129 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10130 specs
[count
].index
: 63);
10135 " %s on parallel compare conflict %s vs %s on PR%d\n",
10136 dv_mode
[rs
->dependency
->mode
],
10137 dv_cmp_type
[rs
->cmp_type
],
10138 dv_cmp_type
[specs
[count
].cmp_type
],
10139 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10140 specs
[count
].index
: 63);
10144 /* If either resource is not specific, conservatively assume a conflict
10146 if (!specs
[count
].specific
|| !rs
->specific
)
10148 else if (specs
[count
].index
== rs
->index
)
10155 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10156 insert a stop to create the break. Update all resource dependencies
10157 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10158 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10159 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10163 insn_group_break (int insert_stop
, int qp_regno
, int save_current
)
10167 if (insert_stop
&& md
.num_slots_in_use
> 0)
10168 PREV_SLOT
.end_of_insn_group
= 1;
10172 fprintf (stderr
, " Insn group break%s",
10173 (insert_stop
? " (w/stop)" : ""));
10175 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10176 fprintf (stderr
, "\n");
10180 while (i
< regdepslen
)
10182 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10185 && regdeps
[i
].qp_regno
!= qp_regno
)
10192 && CURR_SLOT
.src_file
== regdeps
[i
].file
10193 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10199 /* clear dependencies which are automatically cleared by a stop, or
10200 those that have reached the appropriate state of insn serialization */
10201 if (dep
->semantics
== IA64_DVS_IMPLIED
10202 || dep
->semantics
== IA64_DVS_IMPLIEDF
10203 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10205 print_dependency ("Removing", i
);
10206 regdeps
[i
] = regdeps
[--regdepslen
];
10210 if (dep
->semantics
== IA64_DVS_DATA
10211 || dep
->semantics
== IA64_DVS_INSTR
10212 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10214 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10215 regdeps
[i
].insn_srlz
= STATE_STOP
;
10216 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10217 regdeps
[i
].data_srlz
= STATE_STOP
;
10224 /* Add the given resource usage spec to the list of active dependencies. */
10227 mark_resource (struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
,
10228 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
,
10233 if (regdepslen
== regdepstotlen
)
10235 regdepstotlen
+= 20;
10236 regdeps
= (struct rsrc
*)
10237 xrealloc ((void *) regdeps
,
10238 regdepstotlen
* sizeof (struct rsrc
));
10241 regdeps
[regdepslen
] = *spec
;
10242 regdeps
[regdepslen
].depind
= depind
;
10243 regdeps
[regdepslen
].path
= path
;
10244 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10245 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10247 print_dependency ("Adding", regdepslen
);
10253 print_dependency (const char *action
, int depind
)
10257 fprintf (stderr
, " %s %s '%s'",
10258 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10259 (regdeps
[depind
].dependency
)->name
);
10260 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10261 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10262 if (regdeps
[depind
].mem_offset
.hint
)
10264 fputs (" ", stderr
);
10265 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10266 fputs ("+", stderr
);
10267 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10269 fprintf (stderr
, "\n");
10274 instruction_serialization (void)
10278 fprintf (stderr
, " Instruction serialization\n");
10279 for (i
= 0; i
< regdepslen
; i
++)
10280 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10281 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10285 data_serialization (void)
10289 fprintf (stderr
, " Data serialization\n");
10290 while (i
< regdepslen
)
10292 if (regdeps
[i
].data_srlz
== STATE_STOP
10293 /* Note: as of 991210, all "other" dependencies are cleared by a
10294 data serialization. This might change with new tables */
10295 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10297 print_dependency ("Removing", i
);
10298 regdeps
[i
] = regdeps
[--regdepslen
];
10305 /* Insert stops and serializations as needed to avoid DVs. */
10308 remove_marked_resource (struct rsrc
*rs
)
10310 switch (rs
->dependency
->semantics
)
10312 case IA64_DVS_SPECIFIC
:
10314 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10315 /* ...fall through... */
10316 case IA64_DVS_INSTR
:
10318 fprintf (stderr
, "Inserting instr serialization\n");
10319 if (rs
->insn_srlz
< STATE_STOP
)
10320 insn_group_break (1, 0, 0);
10321 if (rs
->insn_srlz
< STATE_SRLZ
)
10323 struct slot oldslot
= CURR_SLOT
;
10324 /* Manually jam a srlz.i insn into the stream */
10325 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10326 CURR_SLOT
.user_template
= -1;
10327 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10328 instruction_serialization ();
10329 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10330 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10331 emit_one_bundle ();
10332 CURR_SLOT
= oldslot
;
10334 insn_group_break (1, 0, 0);
10336 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10337 "other" types of DV are eliminated
10338 by a data serialization */
10339 case IA64_DVS_DATA
:
10341 fprintf (stderr
, "Inserting data serialization\n");
10342 if (rs
->data_srlz
< STATE_STOP
)
10343 insn_group_break (1, 0, 0);
10345 struct slot oldslot
= CURR_SLOT
;
10346 /* Manually jam a srlz.d insn into the stream */
10347 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10348 CURR_SLOT
.user_template
= -1;
10349 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10350 data_serialization ();
10351 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10352 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10353 emit_one_bundle ();
10354 CURR_SLOT
= oldslot
;
10357 case IA64_DVS_IMPLIED
:
10358 case IA64_DVS_IMPLIEDF
:
10360 fprintf (stderr
, "Inserting stop\n");
10361 insn_group_break (1, 0, 0);
10368 /* Check the resources used by the given opcode against the current dependency
10371 The check is run once for each execution path encountered. In this case,
10372 a unique execution path is the sequence of instructions following a code
10373 entry point, e.g. the following has three execution paths, one starting
10374 at L0, one at L1, and one at L2.
10383 check_dependencies (struct ia64_opcode
*idesc
)
10385 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10389 /* Note that the number of marked resources may change within the
10390 loop if in auto mode. */
10392 while (i
< regdepslen
)
10394 struct rsrc
*rs
= ®deps
[i
];
10395 const struct ia64_dependency
*dep
= rs
->dependency
;
10398 int start_over
= 0;
10400 if (dep
->semantics
== IA64_DVS_NONE
10401 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10407 note
= NOTE (opdeps
->chks
[chkind
]);
10409 /* Check this resource against each execution path seen thus far. */
10410 for (path
= 0; path
<= md
.path
; path
++)
10414 /* If the dependency wasn't on the path being checked, ignore it. */
10415 if (rs
->path
< path
)
10418 /* If the QP for this insn implies a QP which has branched, don't
10419 bother checking. Ed. NOTE: I don't think this check is terribly
10420 useful; what's the point of generating code which will only be
10421 reached if its QP is zero?
10422 This code was specifically inserted to handle the following code,
10423 based on notes from Intel's DV checking code, where p1 implies p2.
10429 if (CURR_SLOT
.qp_regno
!= 0)
10433 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10435 if (qp_implies
[implies
].path
>= path
10436 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10437 && qp_implies
[implies
].p2_branched
)
10447 if ((matchtype
= resources_match (rs
, idesc
, note
,
10448 CURR_SLOT
.qp_regno
, path
)) != 0)
10451 char pathmsg
[256] = "";
10452 char indexmsg
[256] = "";
10453 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10456 snprintf (pathmsg
, sizeof (pathmsg
),
10457 " when entry is at label '%s'",
10458 md
.entry_labels
[path
- 1]);
10459 if (matchtype
== 1 && rs
->index
>= 0)
10460 snprintf (indexmsg
, sizeof (indexmsg
),
10461 ", specific resource number is %d",
10463 snprintf (msg
, sizeof (msg
),
10464 "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10466 (certain
? "violates" : "may violate"),
10467 dv_mode
[dep
->mode
], dep
->name
,
10468 dv_sem
[dep
->semantics
],
10469 pathmsg
, indexmsg
);
10471 if (md
.explicit_mode
)
10473 as_warn ("%s", msg
);
10474 if (path
< md
.path
)
10475 as_warn (_("Only the first path encountering the conflict is reported"));
10476 as_warn_where (rs
->file
, rs
->line
,
10477 _("This is the location of the conflicting usage"));
10478 /* Don't bother checking other paths, to avoid duplicating
10479 the same warning */
10485 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10487 remove_marked_resource (rs
);
10489 /* since the set of dependencies has changed, start over */
10490 /* FIXME -- since we're removing dvs as we go, we
10491 probably don't really need to start over... */
10504 /* Register new dependencies based on the given opcode. */
10507 mark_resources (struct ia64_opcode
*idesc
)
10510 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10511 int add_only_qp_reads
= 0;
10513 /* A conditional branch only uses its resources if it is taken; if it is
10514 taken, we stop following that path. The other branch types effectively
10515 *always* write their resources. If it's not taken, register only QP
10517 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10519 add_only_qp_reads
= 1;
10523 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10525 for (i
= 0; i
< opdeps
->nregs
; i
++)
10527 const struct ia64_dependency
*dep
;
10528 struct rsrc specs
[MAX_SPECS
];
10533 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10534 note
= NOTE (opdeps
->regs
[i
]);
10536 if (add_only_qp_reads
10537 && !(dep
->mode
== IA64_DV_WAR
10538 && (dep
->specifier
== IA64_RS_PR
10539 || dep
->specifier
== IA64_RS_PRr
10540 || dep
->specifier
== IA64_RS_PR63
)))
10543 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10545 while (count
-- > 0)
10547 mark_resource (idesc
, dep
, &specs
[count
],
10548 DEP (opdeps
->regs
[i
]), md
.path
);
10551 /* The execution path may affect register values, which may in turn
10552 affect which indirect-access resources are accessed. */
10553 switch (dep
->specifier
)
10557 case IA64_RS_CPUID
:
10565 for (path
= 0; path
< md
.path
; path
++)
10567 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10568 while (count
-- > 0)
10569 mark_resource (idesc
, dep
, &specs
[count
],
10570 DEP (opdeps
->regs
[i
]), path
);
10577 /* Remove dependencies when they no longer apply. */
10580 update_dependencies (struct ia64_opcode
*idesc
)
10584 if (strcmp (idesc
->name
, "srlz.i") == 0)
10586 instruction_serialization ();
10588 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10590 data_serialization ();
10592 else if (is_interruption_or_rfi (idesc
)
10593 || is_taken_branch (idesc
))
10595 /* Although technically the taken branch doesn't clear dependencies
10596 which require a srlz.[id], we don't follow the branch; the next
10597 instruction is assumed to start with a clean slate. */
10601 else if (is_conditional_branch (idesc
)
10602 && CURR_SLOT
.qp_regno
!= 0)
10604 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10606 for (i
= 0; i
< qp_implieslen
; i
++)
10608 /* If the conditional branch's predicate is implied by the predicate
10609 in an existing dependency, remove that dependency. */
10610 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10613 /* Note that this implied predicate takes a branch so that if
10614 a later insn generates a DV but its predicate implies this
10615 one, we can avoid the false DV warning. */
10616 qp_implies
[i
].p2_branched
= 1;
10617 while (depind
< regdepslen
)
10619 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10621 print_dependency ("Removing", depind
);
10622 regdeps
[depind
] = regdeps
[--regdepslen
];
10629 /* Any marked resources which have this same predicate should be
10630 cleared, provided that the QP hasn't been modified between the
10631 marking instruction and the branch. */
10634 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10639 while (i
< regdepslen
)
10641 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10642 && regdeps
[i
].link_to_qp_branch
10643 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10644 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10646 /* Treat like a taken branch */
10647 print_dependency ("Removing", i
);
10648 regdeps
[i
] = regdeps
[--regdepslen
];
10657 /* Examine the current instruction for dependency violations. */
10660 check_dv (struct ia64_opcode
*idesc
)
10664 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10665 idesc
->name
, CURR_SLOT
.src_line
,
10666 idesc
->dependencies
->nchks
,
10667 idesc
->dependencies
->nregs
);
10670 /* Look through the list of currently marked resources; if the current
10671 instruction has the dependency in its chks list which uses that resource,
10672 check against the specific resources used. */
10673 check_dependencies (idesc
);
10675 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10676 then add them to the list of marked resources. */
10677 mark_resources (idesc
);
10679 /* There are several types of dependency semantics, and each has its own
10680 requirements for being cleared
10682 Instruction serialization (insns separated by interruption, rfi, or
10683 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10685 Data serialization (instruction serialization, or writer + srlz.d +
10686 reader, where writer and srlz.d are in separate groups) clears
10687 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10688 always be the case).
10690 Instruction group break (groups separated by stop, taken branch,
10691 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10693 update_dependencies (idesc
);
10695 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10696 warning. Keep track of as many as possible that are useful. */
10697 note_register_values (idesc
);
10699 /* We don't need or want this anymore. */
10700 md
.mem_offset
.hint
= 0;
10705 /* Translate one line of assembly. Pseudo ops and labels do not show
10708 md_assemble (char *str
)
10710 char *saved_input_line_pointer
, *mnemonic
;
10711 const struct pseudo_opcode
*pdesc
;
10712 struct ia64_opcode
*idesc
;
10713 unsigned char qp_regno
;
10714 unsigned int flags
;
10717 saved_input_line_pointer
= input_line_pointer
;
10718 input_line_pointer
= str
;
10720 /* extract the opcode (mnemonic): */
10722 mnemonic
= input_line_pointer
;
10723 ch
= get_symbol_end ();
10724 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10727 *input_line_pointer
= ch
;
10728 (*pdesc
->handler
) (pdesc
->arg
);
10732 /* Find the instruction descriptor matching the arguments. */
10734 idesc
= ia64_find_opcode (mnemonic
);
10735 *input_line_pointer
= ch
;
10738 as_bad (_("Unknown opcode `%s'"), mnemonic
);
10742 idesc
= parse_operands (idesc
);
10746 /* Handle the dynamic ops we can handle now: */
10747 if (idesc
->type
== IA64_TYPE_DYN
)
10749 if (strcmp (idesc
->name
, "add") == 0)
10751 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10752 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10756 ia64_free_opcode (idesc
);
10757 idesc
= ia64_find_opcode (mnemonic
);
10759 else if (strcmp (idesc
->name
, "mov") == 0)
10761 enum ia64_opnd opnd1
, opnd2
;
10764 opnd1
= idesc
->operands
[0];
10765 opnd2
= idesc
->operands
[1];
10766 if (opnd1
== IA64_OPND_AR3
)
10768 else if (opnd2
== IA64_OPND_AR3
)
10772 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10774 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10775 mnemonic
= "mov.i";
10776 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10777 mnemonic
= "mov.m";
10785 ia64_free_opcode (idesc
);
10786 idesc
= ia64_find_opcode (mnemonic
);
10787 while (idesc
!= NULL
10788 && (idesc
->operands
[0] != opnd1
10789 || idesc
->operands
[1] != opnd2
))
10790 idesc
= get_next_opcode (idesc
);
10794 else if (strcmp (idesc
->name
, "mov.i") == 0
10795 || strcmp (idesc
->name
, "mov.m") == 0)
10797 enum ia64_opnd opnd1
, opnd2
;
10800 opnd1
= idesc
->operands
[0];
10801 opnd2
= idesc
->operands
[1];
10802 if (opnd1
== IA64_OPND_AR3
)
10804 else if (opnd2
== IA64_OPND_AR3
)
10808 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10811 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10813 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10815 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10816 as_bad (_("AR %d can only be accessed by %c-unit"),
10817 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10821 else if (strcmp (idesc
->name
, "hint.b") == 0)
10827 case hint_b_warning
:
10828 as_warn (_("hint.b may be treated as nop"));
10831 as_bad (_("hint.b shouldn't be used"));
10837 if (md
.qp
.X_op
== O_register
)
10839 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10840 md
.qp
.X_op
= O_absent
;
10843 flags
= idesc
->flags
;
10845 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10847 /* The alignment frag has to end with a stop bit only if the
10848 next instruction after the alignment directive has to be
10849 the first instruction in an instruction group. */
10852 while (align_frag
->fr_type
!= rs_align_code
)
10854 align_frag
= align_frag
->fr_next
;
10858 /* align_frag can be NULL if there are directives in
10860 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10861 align_frag
->tc_frag_data
= 1;
10864 insn_group_break (1, 0, 0);
10868 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10870 as_bad (_("`%s' cannot be predicated"), idesc
->name
);
10874 /* Build the instruction. */
10875 CURR_SLOT
.qp_regno
= qp_regno
;
10876 CURR_SLOT
.idesc
= idesc
;
10877 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10878 dwarf2_where (&CURR_SLOT
.debug_line
);
10879 dwarf2_consume_line_info ();
10881 /* Add unwind entries, if there are any. */
10882 if (unwind
.current_entry
)
10884 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10885 unwind
.current_entry
= NULL
;
10887 if (unwind
.pending_saves
)
10889 if (unwind
.pending_saves
->next
)
10891 /* Attach the next pending save to the next slot so that its
10892 slot number will get set correctly. */
10893 add_unwind_entry (unwind
.pending_saves
->next
, NOT_A_CHAR
);
10894 unwind
.pending_saves
= &unwind
.pending_saves
->next
->r
.record
.p
;
10897 unwind
.pending_saves
= NULL
;
10899 if (unwind
.proc_pending
.sym
&& S_IS_DEFINED (unwind
.proc_pending
.sym
))
10902 /* Check for dependency violations. */
10906 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10907 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10908 emit_one_bundle ();
10910 if ((flags
& IA64_OPCODE_LAST
) != 0)
10911 insn_group_break (1, 0, 0);
10913 md
.last_text_seg
= now_seg
;
10916 input_line_pointer
= saved_input_line_pointer
;
10919 /* Called when symbol NAME cannot be found in the symbol table.
10920 Should be used for dynamic valued symbols only. */
10923 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
10928 /* Called for any expression that can not be recognized. When the
10929 function is called, `input_line_pointer' will point to the start of
10933 md_operand (expressionS
*e
)
10935 switch (*input_line_pointer
)
10938 ++input_line_pointer
;
10939 expression_and_evaluate (e
);
10940 if (*input_line_pointer
!= ']')
10942 as_bad (_("Closing bracket missing"));
10947 if (e
->X_op
!= O_register
10948 || e
->X_add_number
< REG_GR
10949 || e
->X_add_number
> REG_GR
+ 127)
10951 as_bad (_("Index must be a general register"));
10952 e
->X_add_number
= REG_GR
;
10955 ++input_line_pointer
;
10966 ignore_rest_of_line ();
10969 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10970 a section symbol plus some offset. For relocs involving @fptr(),
10971 directives we don't want such adjustments since we need to have the
10972 original symbol's name in the reloc. */
10974 ia64_fix_adjustable (fixS
*fix
)
10976 /* Prevent all adjustments to global symbols */
10977 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10980 switch (fix
->fx_r_type
)
10982 case BFD_RELOC_IA64_FPTR64I
:
10983 case BFD_RELOC_IA64_FPTR32MSB
:
10984 case BFD_RELOC_IA64_FPTR32LSB
:
10985 case BFD_RELOC_IA64_FPTR64MSB
:
10986 case BFD_RELOC_IA64_FPTR64LSB
:
10987 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10988 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10998 ia64_force_relocation (fixS
*fix
)
11000 switch (fix
->fx_r_type
)
11002 case BFD_RELOC_IA64_FPTR64I
:
11003 case BFD_RELOC_IA64_FPTR32MSB
:
11004 case BFD_RELOC_IA64_FPTR32LSB
:
11005 case BFD_RELOC_IA64_FPTR64MSB
:
11006 case BFD_RELOC_IA64_FPTR64LSB
:
11008 case BFD_RELOC_IA64_LTOFF22
:
11009 case BFD_RELOC_IA64_LTOFF64I
:
11010 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11011 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11012 case BFD_RELOC_IA64_PLTOFF22
:
11013 case BFD_RELOC_IA64_PLTOFF64I
:
11014 case BFD_RELOC_IA64_PLTOFF64MSB
:
11015 case BFD_RELOC_IA64_PLTOFF64LSB
:
11017 case BFD_RELOC_IA64_LTOFF22X
:
11018 case BFD_RELOC_IA64_LDXMOV
:
11025 return generic_force_reloc (fix
);
11028 /* Decide from what point a pc-relative relocation is relative to,
11029 relative to the pc-relative fixup. Er, relatively speaking. */
11031 ia64_pcrel_from_section (fixS
*fix
, segT sec
)
11033 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
11035 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
11042 /* Used to emit section-relative relocs for the dwarf2 debug data. */
11044 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
11048 exp
.X_op
= O_pseudo_fixup
;
11049 exp
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
11050 exp
.X_add_number
= 0;
11051 exp
.X_add_symbol
= symbol
;
11052 emit_expr (&exp
, size
);
11055 /* This is called whenever some data item (not an instruction) needs a
11056 fixup. We pick the right reloc code depending on the byteorder
11057 currently in effect. */
11059 ia64_cons_fix_new (fragS
*f
, int where
, int nbytes
, expressionS
*exp
)
11061 bfd_reloc_code_real_type code
;
11066 /* There are no reloc for 8 and 16 bit quantities, but we allow
11067 them here since they will work fine as long as the expression
11068 is fully defined at the end of the pass over the source file. */
11069 case 1: code
= BFD_RELOC_8
; break;
11070 case 2: code
= BFD_RELOC_16
; break;
11072 if (target_big_endian
)
11073 code
= BFD_RELOC_IA64_DIR32MSB
;
11075 code
= BFD_RELOC_IA64_DIR32LSB
;
11079 /* In 32-bit mode, data8 could mean function descriptors too. */
11080 if (exp
->X_op
== O_pseudo_fixup
11081 && exp
->X_op_symbol
11082 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
11083 && !(md
.flags
& EF_IA_64_ABI64
))
11085 if (target_big_endian
)
11086 code
= BFD_RELOC_IA64_IPLTMSB
;
11088 code
= BFD_RELOC_IA64_IPLTLSB
;
11089 exp
->X_op
= O_symbol
;
11094 if (target_big_endian
)
11095 code
= BFD_RELOC_IA64_DIR64MSB
;
11097 code
= BFD_RELOC_IA64_DIR64LSB
;
11102 if (exp
->X_op
== O_pseudo_fixup
11103 && exp
->X_op_symbol
11104 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
11106 if (target_big_endian
)
11107 code
= BFD_RELOC_IA64_IPLTMSB
;
11109 code
= BFD_RELOC_IA64_IPLTLSB
;
11110 exp
->X_op
= O_symbol
;
11116 as_bad (_("Unsupported fixup size %d"), nbytes
);
11117 ignore_rest_of_line ();
11121 if (exp
->X_op
== O_pseudo_fixup
)
11123 exp
->X_op
= O_symbol
;
11124 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11125 /* ??? If code unchanged, unsupported. */
11128 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11129 /* We need to store the byte order in effect in case we're going
11130 to fix an 8 or 16 bit relocation (for which there no real
11131 relocs available). See md_apply_fix(). */
11132 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11135 /* Return the actual relocation we wish to associate with the pseudo
11136 reloc described by SYM and R_TYPE. SYM should be one of the
11137 symbols in the pseudo_func array, or NULL. */
11139 static bfd_reloc_code_real_type
11140 ia64_gen_real_reloc_type (struct symbol
*sym
, bfd_reloc_code_real_type r_type
)
11142 bfd_reloc_code_real_type newr
= 0;
11143 const char *type
= NULL
, *suffix
= "";
11150 switch (S_GET_VALUE (sym
))
11152 case FUNC_FPTR_RELATIVE
:
11155 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_FPTR64I
; break;
11156 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_FPTR32MSB
; break;
11157 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_FPTR32LSB
; break;
11158 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_FPTR64MSB
; break;
11159 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_FPTR64LSB
; break;
11160 default: type
= "FPTR"; break;
11164 case FUNC_GP_RELATIVE
:
11167 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_GPREL22
; break;
11168 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_GPREL64I
; break;
11169 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_GPREL32MSB
; break;
11170 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_GPREL32LSB
; break;
11171 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_GPREL64MSB
; break;
11172 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_GPREL64LSB
; break;
11173 default: type
= "GPREL"; break;
11177 case FUNC_LT_RELATIVE
:
11180 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22
; break;
11181 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_LTOFF64I
; break;
11182 default: type
= "LTOFF"; break;
11186 case FUNC_LT_RELATIVE_X
:
11189 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22X
; break;
11190 default: type
= "LTOFF"; suffix
= "X"; break;
11194 case FUNC_PC_RELATIVE
:
11197 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PCREL22
; break;
11198 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PCREL64I
; break;
11199 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_PCREL32MSB
; break;
11200 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_PCREL32LSB
; break;
11201 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PCREL64MSB
; break;
11202 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PCREL64LSB
; break;
11203 default: type
= "PCREL"; break;
11207 case FUNC_PLT_RELATIVE
:
11210 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PLTOFF22
; break;
11211 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PLTOFF64I
; break;
11212 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PLTOFF64MSB
;break;
11213 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PLTOFF64LSB
;break;
11214 default: type
= "PLTOFF"; break;
11218 case FUNC_SEC_RELATIVE
:
11221 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SECREL32MSB
;break;
11222 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SECREL32LSB
;break;
11223 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SECREL64MSB
;break;
11224 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SECREL64LSB
;break;
11225 default: type
= "SECREL"; break;
11229 case FUNC_SEG_RELATIVE
:
11232 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SEGREL32MSB
;break;
11233 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SEGREL32LSB
;break;
11234 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SEGREL64MSB
;break;
11235 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SEGREL64LSB
;break;
11236 default: type
= "SEGREL"; break;
11240 case FUNC_LTV_RELATIVE
:
11243 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_LTV32MSB
; break;
11244 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_LTV32LSB
; break;
11245 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_LTV64MSB
; break;
11246 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_LTV64LSB
; break;
11247 default: type
= "LTV"; break;
11251 case FUNC_LT_FPTR_RELATIVE
:
11254 case BFD_RELOC_IA64_IMM22
:
11255 newr
= BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11256 case BFD_RELOC_IA64_IMM64
:
11257 newr
= BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11258 case BFD_RELOC_IA64_DIR32MSB
:
11259 newr
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11260 case BFD_RELOC_IA64_DIR32LSB
:
11261 newr
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11262 case BFD_RELOC_IA64_DIR64MSB
:
11263 newr
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11264 case BFD_RELOC_IA64_DIR64LSB
:
11265 newr
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11267 type
= "LTOFF_FPTR"; break;
11271 case FUNC_TP_RELATIVE
:
11274 case BFD_RELOC_IA64_IMM14
: newr
= BFD_RELOC_IA64_TPREL14
; break;
11275 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_TPREL22
; break;
11276 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_TPREL64I
; break;
11277 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_TPREL64MSB
; break;
11278 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_TPREL64LSB
; break;
11279 default: type
= "TPREL"; break;
11283 case FUNC_LT_TP_RELATIVE
:
11286 case BFD_RELOC_IA64_IMM22
:
11287 newr
= BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11289 type
= "LTOFF_TPREL"; break;
11293 case FUNC_DTP_MODULE
:
11296 case BFD_RELOC_IA64_DIR64MSB
:
11297 newr
= BFD_RELOC_IA64_DTPMOD64MSB
; break;
11298 case BFD_RELOC_IA64_DIR64LSB
:
11299 newr
= BFD_RELOC_IA64_DTPMOD64LSB
; break;
11301 type
= "DTPMOD"; break;
11305 case FUNC_LT_DTP_MODULE
:
11308 case BFD_RELOC_IA64_IMM22
:
11309 newr
= BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11311 type
= "LTOFF_DTPMOD"; break;
11315 case FUNC_DTP_RELATIVE
:
11318 case BFD_RELOC_IA64_DIR32MSB
:
11319 newr
= BFD_RELOC_IA64_DTPREL32MSB
; break;
11320 case BFD_RELOC_IA64_DIR32LSB
:
11321 newr
= BFD_RELOC_IA64_DTPREL32LSB
; break;
11322 case BFD_RELOC_IA64_DIR64MSB
:
11323 newr
= BFD_RELOC_IA64_DTPREL64MSB
; break;
11324 case BFD_RELOC_IA64_DIR64LSB
:
11325 newr
= BFD_RELOC_IA64_DTPREL64LSB
; break;
11326 case BFD_RELOC_IA64_IMM14
:
11327 newr
= BFD_RELOC_IA64_DTPREL14
; break;
11328 case BFD_RELOC_IA64_IMM22
:
11329 newr
= BFD_RELOC_IA64_DTPREL22
; break;
11330 case BFD_RELOC_IA64_IMM64
:
11331 newr
= BFD_RELOC_IA64_DTPREL64I
; break;
11333 type
= "DTPREL"; break;
11337 case FUNC_LT_DTP_RELATIVE
:
11340 case BFD_RELOC_IA64_IMM22
:
11341 newr
= BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11343 type
= "LTOFF_DTPREL"; break;
11347 case FUNC_IPLT_RELOC
:
11350 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11351 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11352 default: type
= "IPLT"; break;
11357 case FUNC_SLOTCOUNT_RELOC
:
11358 return DUMMY_RELOC_IA64_SLOTCOUNT
;
11375 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11376 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11377 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11378 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11379 case BFD_RELOC_UNUSED
: width
= 13; break;
11380 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11381 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11382 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11386 /* This should be an error, but since previously there wasn't any
11387 diagnostic here, don't make it fail because of this for now. */
11388 as_warn (_("Cannot express %s%d%s relocation"), type
, width
, suffix
);
11393 /* Here is where generate the appropriate reloc for pseudo relocation
11396 ia64_validate_fix (fixS
*fix
)
11398 switch (fix
->fx_r_type
)
11400 case BFD_RELOC_IA64_FPTR64I
:
11401 case BFD_RELOC_IA64_FPTR32MSB
:
11402 case BFD_RELOC_IA64_FPTR64LSB
:
11403 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11404 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11405 if (fix
->fx_offset
!= 0)
11406 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11407 _("No addend allowed in @fptr() relocation"));
11415 fix_insn (fixS
*fix
, const struct ia64_operand
*odesc
, valueT value
)
11417 bfd_vma insn
[3], t0
, t1
, control_bits
;
11422 slot
= fix
->fx_where
& 0x3;
11423 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11425 /* Bundles are always in little-endian byte order */
11426 t0
= bfd_getl64 (fixpos
);
11427 t1
= bfd_getl64 (fixpos
+ 8);
11428 control_bits
= t0
& 0x1f;
11429 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11430 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11431 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11434 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11436 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11437 insn
[2] |= (((value
& 0x7f) << 13)
11438 | (((value
>> 7) & 0x1ff) << 27)
11439 | (((value
>> 16) & 0x1f) << 22)
11440 | (((value
>> 21) & 0x1) << 21)
11441 | (((value
>> 63) & 0x1) << 36));
11443 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11445 if (value
& ~0x3fffffffffffffffULL
)
11446 err
= _("integer operand out of range");
11447 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11448 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11450 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11453 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11454 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11455 | (((value
>> 0) & 0xfffff) << 13));
11458 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11461 as_bad_where (fix
->fx_file
, fix
->fx_line
, "%s", err
);
11463 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11464 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11465 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11466 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11469 /* Attempt to simplify or even eliminate a fixup. The return value is
11470 ignored; perhaps it was once meaningful, but now it is historical.
11471 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11473 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11477 md_apply_fix (fixS
*fix
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
11480 valueT value
= *valP
;
11482 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11486 switch (fix
->fx_r_type
)
11488 case BFD_RELOC_IA64_PCREL21B
: break;
11489 case BFD_RELOC_IA64_PCREL21BI
: break;
11490 case BFD_RELOC_IA64_PCREL21F
: break;
11491 case BFD_RELOC_IA64_PCREL21M
: break;
11492 case BFD_RELOC_IA64_PCREL60B
: break;
11493 case BFD_RELOC_IA64_PCREL22
: break;
11494 case BFD_RELOC_IA64_PCREL64I
: break;
11495 case BFD_RELOC_IA64_PCREL32MSB
: break;
11496 case BFD_RELOC_IA64_PCREL32LSB
: break;
11497 case BFD_RELOC_IA64_PCREL64MSB
: break;
11498 case BFD_RELOC_IA64_PCREL64LSB
: break;
11500 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11507 switch ((unsigned) fix
->fx_r_type
)
11509 case BFD_RELOC_UNUSED
:
11510 /* This must be a TAG13 or TAG13b operand. There are no external
11511 relocs defined for them, so we must give an error. */
11512 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11513 _("%s must have a constant value"),
11514 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11518 case BFD_RELOC_IA64_TPREL14
:
11519 case BFD_RELOC_IA64_TPREL22
:
11520 case BFD_RELOC_IA64_TPREL64I
:
11521 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11522 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11523 case BFD_RELOC_IA64_DTPREL14
:
11524 case BFD_RELOC_IA64_DTPREL22
:
11525 case BFD_RELOC_IA64_DTPREL64I
:
11526 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11527 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11531 case DUMMY_RELOC_IA64_SLOTCOUNT
:
11532 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11533 _("cannot resolve @slotcount parameter"));
11542 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11545 if (fix
->fx_r_type
== DUMMY_RELOC_IA64_SLOTCOUNT
)
11547 /* For @slotcount, convert an addresses difference to a slots
11551 v
= (value
>> 4) * 3;
11552 switch (value
& 0x0f)
11566 as_bad (_("invalid @slotcount value"));
11572 if (fix
->tc_fix_data
.bigendian
)
11573 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11575 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11580 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11585 /* Generate the BFD reloc to be stuck in the object file from the
11586 fixup used internally in the assembler. */
11589 tc_gen_reloc (asection
*sec ATTRIBUTE_UNUSED
, fixS
*fixp
)
11593 reloc
= xmalloc (sizeof (*reloc
));
11594 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11595 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11596 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11597 reloc
->addend
= fixp
->fx_offset
;
11598 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11602 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11603 _("Cannot represent %s relocation in object file"),
11604 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11611 /* Turn a string in input_line_pointer into a floating point constant
11612 of type TYPE, and store the appropriate bytes in *LIT. The number
11613 of LITTLENUMS emitted is stored in *SIZE. An error message is
11614 returned, or NULL on OK. */
11616 #define MAX_LITTLENUMS 5
11619 md_atof (int type
, char *lit
, int *size
)
11621 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11651 return _("Unrecognized or unsupported floating point constant");
11653 t
= atof_ieee (input_line_pointer
, type
, words
);
11655 input_line_pointer
= t
;
11657 (*ia64_float_to_chars
) (lit
, words
, prec
);
11661 /* It is 10 byte floating point with 6 byte padding. */
11662 memset (&lit
[10], 0, 6);
11663 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11666 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11671 /* Handle ia64 specific semantics of the align directive. */
11674 ia64_md_do_align (int n ATTRIBUTE_UNUSED
,
11675 const char *fill ATTRIBUTE_UNUSED
,
11676 int len ATTRIBUTE_UNUSED
,
11677 int max ATTRIBUTE_UNUSED
)
11679 if (subseg_text_p (now_seg
))
11680 ia64_flush_insns ();
11683 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11684 of an rs_align_code fragment. */
11687 ia64_handle_align (fragS
*fragp
)
11691 const unsigned char *nop_type
;
11693 if (fragp
->fr_type
!= rs_align_code
)
11696 /* Check if this frag has to end with a stop bit. */
11697 nop_type
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11699 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11700 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11702 /* If no paddings are needed, we check if we need a stop bit. */
11703 if (!bytes
&& fragp
->tc_frag_data
)
11705 if (fragp
->fr_fix
< 16)
11707 /* FIXME: It won't work with
11709 alloc r32=ar.pfs,1,2,4,0
11713 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11714 _("Can't add stop bit to mark end of instruction group"));
11717 /* Bundles are always in little-endian byte order. Make sure
11718 the previous bundle has the stop bit. */
11722 /* Make sure we are on a 16-byte boundary, in case someone has been
11723 putting data into a text section. */
11726 int fix
= bytes
& 15;
11727 memset (p
, 0, fix
);
11730 fragp
->fr_fix
+= fix
;
11733 /* Instruction bundles are always little-endian. */
11734 memcpy (p
, nop_type
, 16);
11735 fragp
->fr_var
= 16;
11739 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11744 number_to_chars_bigendian (lit
, (long) (*words
++),
11745 sizeof (LITTLENUM_TYPE
));
11746 lit
+= sizeof (LITTLENUM_TYPE
);
11751 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11756 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11757 sizeof (LITTLENUM_TYPE
));
11758 lit
+= sizeof (LITTLENUM_TYPE
);
11763 ia64_elf_section_change_hook (void)
11765 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11766 && elf_linked_to_section (now_seg
) == NULL
)
11767 elf_linked_to_section (now_seg
) = text_section
;
11768 dot_byteorder (-1);
11771 /* Check if a label should be made global. */
11773 ia64_check_label (symbolS
*label
)
11775 if (*input_line_pointer
== ':')
11777 S_SET_EXTERNAL (label
);
11778 input_line_pointer
++;
11782 /* Used to remember where .alias and .secalias directives are seen. We
11783 will rename symbol and section names when we are about to output
11784 the relocatable file. */
11787 char *file
; /* The file where the directive is seen. */
11788 unsigned int line
; /* The line number the directive is at. */
11789 const char *name
; /* The original name of the symbol. */
11792 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11793 .secalias. Otherwise, it is .alias. */
11795 dot_alias (int section
)
11797 char *name
, *alias
;
11801 const char *error_string
;
11804 struct hash_control
*ahash
, *nhash
;
11807 name
= input_line_pointer
;
11808 delim
= get_symbol_end ();
11809 end_name
= input_line_pointer
;
11812 if (name
== end_name
)
11814 as_bad (_("expected symbol name"));
11815 ignore_rest_of_line ();
11819 SKIP_WHITESPACE ();
11821 if (*input_line_pointer
!= ',')
11824 as_bad (_("expected comma after \"%s\""), name
);
11826 ignore_rest_of_line ();
11830 input_line_pointer
++;
11832 ia64_canonicalize_symbol_name (name
);
11834 /* We call demand_copy_C_string to check if alias string is valid.
11835 There should be a closing `"' and no `\0' in the string. */
11836 alias
= demand_copy_C_string (&len
);
11839 ignore_rest_of_line ();
11843 /* Make a copy of name string. */
11844 len
= strlen (name
) + 1;
11845 obstack_grow (¬es
, name
, len
);
11846 name
= obstack_finish (¬es
);
11851 ahash
= secalias_hash
;
11852 nhash
= secalias_name_hash
;
11857 ahash
= alias_hash
;
11858 nhash
= alias_name_hash
;
11861 /* Check if alias has been used before. */
11862 h
= (struct alias
*) hash_find (ahash
, alias
);
11865 if (strcmp (h
->name
, name
))
11866 as_bad (_("`%s' is already the alias of %s `%s'"),
11867 alias
, kind
, h
->name
);
11871 /* Check if name already has an alias. */
11872 a
= (const char *) hash_find (nhash
, name
);
11875 if (strcmp (a
, alias
))
11876 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11880 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11881 as_where (&h
->file
, &h
->line
);
11884 error_string
= hash_jam (ahash
, alias
, (void *) h
);
11887 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11888 alias
, kind
, error_string
);
11892 error_string
= hash_jam (nhash
, name
, (void *) alias
);
11895 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11896 alias
, kind
, error_string
);
11898 obstack_free (¬es
, name
);
11899 obstack_free (¬es
, alias
);
11902 demand_empty_rest_of_line ();
11905 /* It renames the original symbol name to its alias. */
11907 do_alias (const char *alias
, void *value
)
11909 struct alias
*h
= (struct alias
*) value
;
11910 symbolS
*sym
= symbol_find (h
->name
);
11915 /* Uses .alias extensively to alias CRTL functions to same with
11916 decc$ prefix. Sometimes function gets optimized away and a
11917 warning results, which should be suppressed. */
11918 if (strncmp (alias
, "decc$", 5) != 0)
11920 as_warn_where (h
->file
, h
->line
,
11921 _("symbol `%s' aliased to `%s' is not used"),
11925 S_SET_NAME (sym
, (char *) alias
);
11928 /* Called from write_object_file. */
11930 ia64_adjust_symtab (void)
11932 hash_traverse (alias_hash
, do_alias
);
11935 /* It renames the original section name to its alias. */
11937 do_secalias (const char *alias
, void *value
)
11939 struct alias
*h
= (struct alias
*) value
;
11940 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11943 as_warn_where (h
->file
, h
->line
,
11944 _("section `%s' aliased to `%s' is not used"),
11950 /* Called from write_object_file. */
11952 ia64_frob_file (void)
11954 hash_traverse (secalias_hash
, do_secalias
);
11958 #define NT_VMS_MHD 1
11959 #define NT_VMS_LNM 2
11961 /* Integrity VMS 8.x identifies it's ELF modules with a standard ELF
11964 /* Manufacture a VMS-like time string. */
11966 get_vms_time (char *Now
)
11972 pnt
= ctime (&timeb
);
11978 sprintf (Now
, "%2s-%3s-%s %s", pnt
+ 8, pnt
+ 4, pnt
+ 20, pnt
+ 11);
11982 ia64_vms_note (void)
11985 asection
*seg
= now_seg
;
11986 subsegT subseg
= now_subseg
;
11987 asection
*secp
= NULL
;
11992 /* Create the .note section. */
11994 secp
= subseg_new (".note", 0);
11995 bfd_set_section_flags (stdoutput
,
11997 SEC_HAS_CONTENTS
| SEC_READONLY
);
11999 /* Module header note (MHD). */
12000 bname
= xstrdup (lbasename (out_file_name
));
12001 if ((p
= strrchr (bname
, '.')))
12004 /* VMS note header is 24 bytes long. */
12005 p
= frag_more (8 + 8 + 8);
12006 number_to_chars_littleendian (p
+ 0, 8, 8);
12007 number_to_chars_littleendian (p
+ 8, 40 + strlen (bname
), 8);
12008 number_to_chars_littleendian (p
+ 16, NT_VMS_MHD
, 8);
12011 strcpy (p
, "IPF/VMS");
12013 p
= frag_more (17 + 17 + strlen (bname
) + 1 + 5);
12015 strcpy (p
+ 17, "24-FEB-2005 15:00");
12018 p
+= strlen (bname
) + 1;
12020 strcpy (p
, "V1.0");
12022 frag_align (3, 0, 0);
12024 /* Language processor name note. */
12025 sprintf (buf
, "GNU assembler version %s (%s) using BFD version %s",
12026 VERSION
, TARGET_ALIAS
, BFD_VERSION_STRING
);
12028 p
= frag_more (8 + 8 + 8);
12029 number_to_chars_littleendian (p
+ 0, 8, 8);
12030 number_to_chars_littleendian (p
+ 8, strlen (buf
) + 1, 8);
12031 number_to_chars_littleendian (p
+ 16, NT_VMS_LNM
, 8);
12034 strcpy (p
, "IPF/VMS");
12036 p
= frag_more (strlen (buf
) + 1);
12039 frag_align (3, 0, 0);
12041 secp
= subseg_new (".vms_display_name_info", 0);
12042 bfd_set_section_flags (stdoutput
,
12044 SEC_HAS_CONTENTS
| SEC_READONLY
);
12046 /* This symbol should be passed on the command line and be variable
12047 according to language. */
12048 sym
= symbol_new ("__gnat_vms_display_name@gnat_demangler_rtl",
12049 absolute_section
, 0, &zero_address_frag
);
12050 symbol_table_insert (sym
);
12051 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
| BSF_DYNAMIC
;
12054 /* Format 3 of VMS demangler Spec. */
12055 number_to_chars_littleendian (p
, 3, 4);
12058 /* Place holder for symbol table index of above symbol. */
12059 number_to_chars_littleendian (p
, -1, 4);
12061 frag_align (3, 0, 0);
12063 /* We probably can't restore the current segment, for there likely
12064 isn't one yet... */
12066 subseg_set (seg
, subseg
);
12069 #endif /* TE_VMS */