1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
58 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
60 /* Some systems define MIN in, e.g., param.h. */
62 #define MIN(a,b) ((a) < (b) ? (a) : (b))
65 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66 #define CURR_SLOT md.slot[md.curr_slot]
68 #define O_pseudo_fixup (O_max + 1)
72 /* IA-64 ABI section pseudo-ops. */
73 SPECIAL_SECTION_BSS
= 0,
75 SPECIAL_SECTION_SDATA
,
76 SPECIAL_SECTION_RODATA
,
77 SPECIAL_SECTION_COMMENT
,
78 SPECIAL_SECTION_UNWIND
,
79 SPECIAL_SECTION_UNWIND_INFO
,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY
,
82 SPECIAL_SECTION_FINI_ARRAY
,
99 FUNC_LT_FPTR_RELATIVE
,
101 FUNC_LT_DTP_RELATIVE
,
109 REG_FR
= (REG_GR
+ 128),
110 REG_AR
= (REG_FR
+ 128),
111 REG_CR
= (REG_AR
+ 128),
112 REG_P
= (REG_CR
+ 128),
113 REG_BR
= (REG_P
+ 64),
114 REG_IP
= (REG_BR
+ 8),
121 /* The following are pseudo-registers for use by gas only. */
132 /* The following pseudo-registers are used for unwind directives only: */
140 DYNREG_GR
= 0, /* dynamic general purpose register */
141 DYNREG_FR
, /* dynamic floating point register */
142 DYNREG_PR
, /* dynamic predicate register */
146 enum operand_match_result
149 OPERAND_OUT_OF_RANGE
,
153 /* On the ia64, we can't know the address of a text label until the
154 instructions are packed into a bundle. To handle this, we keep
155 track of the list of labels that appear in front of each
159 struct label_fix
*next
;
161 bfd_boolean dw2_mark_labels
;
164 /* This is the endianness of the current section. */
165 extern int target_big_endian
;
167 /* This is the default endianness. */
168 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
170 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
172 static void ia64_float_to_chars_bigendian
173 PARAMS ((char *, LITTLENUM_TYPE
*, int));
174 static void ia64_float_to_chars_littleendian
175 PARAMS ((char *, LITTLENUM_TYPE
*, int));
176 static void (*ia64_float_to_chars
)
177 PARAMS ((char *, LITTLENUM_TYPE
*, int));
179 static struct hash_control
*alias_hash
;
180 static struct hash_control
*alias_name_hash
;
181 static struct hash_control
*secalias_hash
;
182 static struct hash_control
*secalias_name_hash
;
184 /* List of chars besides those in app.c:symbol_chars that can start an
185 operand. Used to prevent the scrubber eating vital white-space. */
186 const char ia64_symbol_chars
[] = "@?";
188 /* Characters which always start a comment. */
189 const char comment_chars
[] = "";
191 /* Characters which start a comment at the beginning of a line. */
192 const char line_comment_chars
[] = "#";
194 /* Characters which may be used to separate multiple commands on a
196 const char line_separator_chars
[] = ";{}";
198 /* Characters which are used to indicate an exponent in a floating
200 const char EXP_CHARS
[] = "eE";
202 /* Characters which mean that a number is a floating point constant,
204 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
206 /* ia64-specific option processing: */
208 const char *md_shortopts
= "m:N:x::";
210 struct option md_longopts
[] =
212 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
213 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
214 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
215 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
218 size_t md_longopts_size
= sizeof (md_longopts
);
222 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
223 struct hash_control
*reg_hash
; /* register name hash table */
224 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
225 struct hash_control
*const_hash
; /* constant hash table */
226 struct hash_control
*entry_hash
; /* code entry hint hash table */
228 /* If X_op is != O_absent, the registername for the instruction's
229 qualifying predicate. If NULL, p0 is assumed for instructions
230 that are predicatable. */
233 /* Optimize for which CPU. */
240 /* What to do when hint.b is used. */
252 explicit_mode
: 1, /* which mode we're in */
253 default_explicit_mode
: 1, /* which mode is the default */
254 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
256 keep_pending_output
: 1;
258 /* What to do when something is wrong with unwind directives. */
261 unwind_check_warning
,
265 /* Each bundle consists of up to three instructions. We keep
266 track of four most recent instructions so we can correctly set
267 the end_of_insn_group for the last instruction in a bundle. */
269 int num_slots_in_use
;
273 end_of_insn_group
: 1,
274 manual_bundling_on
: 1,
275 manual_bundling_off
: 1,
276 loc_directive_seen
: 1;
277 signed char user_template
; /* user-selected template, if any */
278 unsigned char qp_regno
; /* qualifying predicate */
279 /* This duplicates a good fraction of "struct fix" but we
280 can't use a "struct fix" instead since we can't call
281 fix_new_exp() until we know the address of the instruction. */
285 bfd_reloc_code_real_type code
;
286 enum ia64_opnd opnd
; /* type of operand in need of fix */
287 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
288 expressionS expr
; /* the value to be inserted */
290 fixup
[2]; /* at most two fixups per insn */
291 struct ia64_opcode
*idesc
;
292 struct label_fix
*label_fixups
;
293 struct label_fix
*tag_fixups
;
294 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
297 unsigned int src_line
;
298 struct dwarf2_line_info debug_line
;
306 struct dynreg
*next
; /* next dynamic register */
308 unsigned short base
; /* the base register number */
309 unsigned short num_regs
; /* # of registers in this set */
311 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
313 flagword flags
; /* ELF-header flags */
316 unsigned hint
:1; /* is this hint currently valid? */
317 bfd_vma offset
; /* mem.offset offset */
318 bfd_vma base
; /* mem.offset base */
321 int path
; /* number of alt. entry points seen */
322 const char **entry_labels
; /* labels of all alternate paths in
323 the current DV-checking block. */
324 int maxpaths
; /* size currently allocated for
327 int pointer_size
; /* size in bytes of a pointer */
328 int pointer_size_shift
; /* shift size of a pointer for alignment */
330 symbolS
*indregsym
[IND_RR
- IND_CPUID
+ 1];
334 /* These are not const, because they are modified to MMI for non-itanium1
336 /* MFI bundle of nops. */
337 static unsigned char le_nop
[16] =
339 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
340 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
342 /* MFI bundle of nops with stop-bit. */
343 static unsigned char le_nop_stop
[16] =
345 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
349 /* application registers: */
355 #define AR_BSPSTORE 18
380 {"ar.k0", AR_K0
}, {"ar.k1", AR_K0
+ 1},
381 {"ar.k2", AR_K0
+ 2}, {"ar.k3", AR_K0
+ 3},
382 {"ar.k4", AR_K0
+ 4}, {"ar.k5", AR_K0
+ 5},
383 {"ar.k6", AR_K0
+ 6}, {"ar.k7", AR_K7
},
384 {"ar.rsc", AR_RSC
}, {"ar.bsp", AR_BSP
},
385 {"ar.bspstore", AR_BSPSTORE
}, {"ar.rnat", AR_RNAT
},
386 {"ar.fcr", AR_FCR
}, {"ar.eflag", AR_EFLAG
},
387 {"ar.csd", AR_CSD
}, {"ar.ssd", AR_SSD
},
388 {"ar.cflg", AR_CFLG
}, {"ar.fsr", AR_FSR
},
389 {"ar.fir", AR_FIR
}, {"ar.fdr", AR_FDR
},
390 {"ar.ccv", AR_CCV
}, {"ar.unat", AR_UNAT
},
391 {"ar.fpsr", AR_FPSR
}, {"ar.itc", AR_ITC
},
392 {"ar.pfs", AR_PFS
}, {"ar.lc", AR_LC
},
396 /* control registers: */
435 {"cr.gpta", CR_GPTA
},
436 {"cr.ipsr", CR_IPSR
},
440 {"cr.itir", CR_ITIR
},
441 {"cr.iipa", CR_IIPA
},
449 {"cr.irr0", CR_IRR0
},
450 {"cr.irr1", CR_IRR0
+ 1},
451 {"cr.irr2", CR_IRR0
+ 2},
452 {"cr.irr3", CR_IRR3
},
455 {"cr.cmcv", CR_CMCV
},
456 {"cr.lrr0", CR_LRR0
},
465 static const struct const_desc
472 /* PSR constant masks: */
475 {"psr.be", ((valueT
) 1) << 1},
476 {"psr.up", ((valueT
) 1) << 2},
477 {"psr.ac", ((valueT
) 1) << 3},
478 {"psr.mfl", ((valueT
) 1) << 4},
479 {"psr.mfh", ((valueT
) 1) << 5},
481 {"psr.ic", ((valueT
) 1) << 13},
482 {"psr.i", ((valueT
) 1) << 14},
483 {"psr.pk", ((valueT
) 1) << 15},
485 {"psr.dt", ((valueT
) 1) << 17},
486 {"psr.dfl", ((valueT
) 1) << 18},
487 {"psr.dfh", ((valueT
) 1) << 19},
488 {"psr.sp", ((valueT
) 1) << 20},
489 {"psr.pp", ((valueT
) 1) << 21},
490 {"psr.di", ((valueT
) 1) << 22},
491 {"psr.si", ((valueT
) 1) << 23},
492 {"psr.db", ((valueT
) 1) << 24},
493 {"psr.lp", ((valueT
) 1) << 25},
494 {"psr.tb", ((valueT
) 1) << 26},
495 {"psr.rt", ((valueT
) 1) << 27},
496 /* 28-31: reserved */
497 /* 32-33: cpl (current privilege level) */
498 {"psr.is", ((valueT
) 1) << 34},
499 {"psr.mc", ((valueT
) 1) << 35},
500 {"psr.it", ((valueT
) 1) << 36},
501 {"psr.id", ((valueT
) 1) << 37},
502 {"psr.da", ((valueT
) 1) << 38},
503 {"psr.dd", ((valueT
) 1) << 39},
504 {"psr.ss", ((valueT
) 1) << 40},
505 /* 41-42: ri (restart instruction) */
506 {"psr.ed", ((valueT
) 1) << 43},
507 {"psr.bn", ((valueT
) 1) << 44},
510 /* indirect register-sets/memory: */
519 { "CPUID", IND_CPUID
},
520 { "cpuid", IND_CPUID
},
532 /* Pseudo functions used to indicate relocation types (these functions
533 start with an at sign (@). */
555 /* reloc pseudo functions (these must come first!): */
556 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
557 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
558 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
559 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
560 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
561 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
562 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
563 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
564 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
565 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
566 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
567 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
568 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
569 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
570 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
571 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
572 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
574 /* mbtype4 constants: */
575 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
576 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
577 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
578 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
579 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
581 /* fclass constants: */
582 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
583 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
584 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
585 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
586 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
587 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
588 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
589 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
590 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
592 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
594 /* hint constants: */
595 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
597 /* unwind-related constants: */
598 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
599 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
600 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
601 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
602 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
603 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
604 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
606 /* unwind-related registers: */
607 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
610 /* 41-bit nop opcodes (one per unit): */
611 static const bfd_vma nop
[IA64_NUM_UNITS
] =
613 0x0000000000LL
, /* NIL => break 0 */
614 0x0008000000LL
, /* I-unit nop */
615 0x0008000000LL
, /* M-unit nop */
616 0x4000000000LL
, /* B-unit nop */
617 0x0008000000LL
, /* F-unit nop */
618 0x0000000000LL
, /* L-"unit" nop immediate */
619 0x0008000000LL
, /* X-unit nop */
622 /* Can't be `const' as it's passed to input routines (which have the
623 habit of setting temporary sentinels. */
624 static char special_section_name
[][20] =
626 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
627 {".IA_64.unwind"}, {".IA_64.unwind_info"},
628 {".init_array"}, {".fini_array"}
631 /* The best template for a particular sequence of up to three
633 #define N IA64_NUM_TYPES
634 static unsigned char best_template
[N
][N
][N
];
637 /* Resource dependencies currently in effect */
639 int depind
; /* dependency index */
640 const struct ia64_dependency
*dependency
; /* actual dependency */
641 unsigned specific
:1, /* is this a specific bit/regno? */
642 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
643 int index
; /* specific regno/bit within dependency */
644 int note
; /* optional qualifying note (0 if none) */
648 int insn_srlz
; /* current insn serialization state */
649 int data_srlz
; /* current data serialization state */
650 int qp_regno
; /* qualifying predicate for this usage */
651 char *file
; /* what file marked this dependency */
652 unsigned int line
; /* what line marked this dependency */
653 struct mem_offset mem_offset
; /* optional memory offset hint */
654 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
655 int path
; /* corresponding code entry index */
657 static int regdepslen
= 0;
658 static int regdepstotlen
= 0;
659 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
660 static const char *dv_sem
[] = { "none", "implied", "impliedf",
661 "data", "instr", "specific", "stop", "other" };
662 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
664 /* Current state of PR mutexation */
665 static struct qpmutex
{
668 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
669 static int qp_mutexeslen
= 0;
670 static int qp_mutexestotlen
= 0;
671 static valueT qp_safe_across_calls
= 0;
673 /* Current state of PR implications */
674 static struct qp_imply
{
677 unsigned p2_branched
:1;
679 } *qp_implies
= NULL
;
680 static int qp_implieslen
= 0;
681 static int qp_impliestotlen
= 0;
683 /* Keep track of static GR values so that indirect register usage can
684 sometimes be tracked. */
695 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
701 /* Remember the alignment frag. */
702 static fragS
*align_frag
;
704 /* These are the routines required to output the various types of
707 /* A slot_number is a frag address plus the slot index (0-2). We use the
708 frag address here so that if there is a section switch in the middle of
709 a function, then instructions emitted to a different section are not
710 counted. Since there may be more than one frag for a function, this
711 means we also need to keep track of which frag this address belongs to
712 so we can compute inter-frag distances. This also nicely solves the
713 problem with nops emitted for align directives, which can't easily be
714 counted, but can easily be derived from frag sizes. */
716 typedef struct unw_rec_list
{
718 unsigned long slot_number
;
720 struct unw_rec_list
*next
;
723 #define SLOT_NUM_NOT_SET (unsigned)-1
725 /* Linked list of saved prologue counts. A very poor
726 implementation of a map from label numbers to prologue counts. */
727 typedef struct label_prologue_count
729 struct label_prologue_count
*next
;
730 unsigned long label_number
;
731 unsigned int prologue_count
;
732 } label_prologue_count
;
734 typedef struct proc_pending
737 struct proc_pending
*next
;
742 /* Maintain a list of unwind entries for the current function. */
746 /* Any unwind entires that should be attached to the current slot
747 that an insn is being constructed for. */
748 unw_rec_list
*current_entry
;
750 /* These are used to create the unwind table entry for this function. */
751 proc_pending proc_pending
;
752 symbolS
*info
; /* pointer to unwind info */
753 symbolS
*personality_routine
;
755 subsegT saved_text_subseg
;
756 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
758 /* TRUE if processing unwind directives in a prologue region. */
759 unsigned int prologue
: 1;
760 unsigned int prologue_mask
: 4;
761 unsigned int prologue_gr
: 7;
762 unsigned int body
: 1;
763 unsigned int insn
: 1;
764 unsigned int prologue_count
; /* number of .prologues seen so far */
765 /* Prologue counts at previous .label_state directives. */
766 struct label_prologue_count
* saved_prologue_counts
;
768 /* List of split up .save-s. */
769 unw_p_record
*pending_saves
;
772 /* The input value is a negated offset from psp, and specifies an address
773 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
774 must add 16 and divide by 4 to get the encoded value. */
776 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
778 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
780 /* Forward declarations: */
781 static void set_section
PARAMS ((char *name
));
782 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
783 unsigned int, unsigned int));
784 static void dot_align (int);
785 static void dot_radix
PARAMS ((int));
786 static void dot_special_section
PARAMS ((int));
787 static void dot_proc
PARAMS ((int));
788 static void dot_fframe
PARAMS ((int));
789 static void dot_vframe
PARAMS ((int));
790 static void dot_vframesp
PARAMS ((int));
791 static void dot_save
PARAMS ((int));
792 static void dot_restore
PARAMS ((int));
793 static void dot_restorereg
PARAMS ((int));
794 static void dot_handlerdata
PARAMS ((int));
795 static void dot_unwentry
PARAMS ((int));
796 static void dot_altrp
PARAMS ((int));
797 static void dot_savemem
PARAMS ((int));
798 static void dot_saveg
PARAMS ((int));
799 static void dot_savef
PARAMS ((int));
800 static void dot_saveb
PARAMS ((int));
801 static void dot_savegf
PARAMS ((int));
802 static void dot_spill
PARAMS ((int));
803 static void dot_spillreg
PARAMS ((int));
804 static void dot_spillmem
PARAMS ((int));
805 static void dot_label_state
PARAMS ((int));
806 static void dot_copy_state
PARAMS ((int));
807 static void dot_unwabi
PARAMS ((int));
808 static void dot_personality
PARAMS ((int));
809 static void dot_body
PARAMS ((int));
810 static void dot_prologue
PARAMS ((int));
811 static void dot_endp
PARAMS ((int));
812 static void dot_template
PARAMS ((int));
813 static void dot_regstk
PARAMS ((int));
814 static void dot_rot
PARAMS ((int));
815 static void dot_byteorder
PARAMS ((int));
816 static void dot_psr
PARAMS ((int));
817 static void dot_alias
PARAMS ((int));
818 static void dot_ln
PARAMS ((int));
819 static void cross_section
PARAMS ((int ref
, void (*cons
) PARAMS((int)), int ua
));
820 static void dot_xdata
PARAMS ((int));
821 static void stmt_float_cons
PARAMS ((int));
822 static void stmt_cons_ua
PARAMS ((int));
823 static void dot_xfloat_cons
PARAMS ((int));
824 static void dot_xstringer
PARAMS ((int));
825 static void dot_xdata_ua
PARAMS ((int));
826 static void dot_xfloat_cons_ua
PARAMS ((int));
827 static void print_prmask
PARAMS ((valueT mask
));
828 static void dot_pred_rel
PARAMS ((int));
829 static void dot_reg_val
PARAMS ((int));
830 static void dot_serialize
PARAMS ((int));
831 static void dot_dv_mode
PARAMS ((int));
832 static void dot_entry
PARAMS ((int));
833 static void dot_mem_offset
PARAMS ((int));
834 static void add_unwind_entry
PARAMS((unw_rec_list
*, int));
835 static symbolS
*declare_register
PARAMS ((const char *name
, unsigned int regnum
));
836 static void declare_register_set
PARAMS ((const char *, unsigned int, unsigned int));
837 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
838 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
841 static int parse_operand
PARAMS ((expressionS
*, int));
842 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
843 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
844 static void emit_one_bundle
PARAMS ((void));
845 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
846 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
847 bfd_reloc_code_real_type r_type
));
848 static void insn_group_break
PARAMS ((int, int, int));
849 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
850 struct rsrc
*, int depind
, int path
));
851 static void add_qp_mutex
PARAMS((valueT mask
));
852 static void add_qp_imply
PARAMS((int p1
, int p2
));
853 static void clear_qp_branch_flag
PARAMS((valueT mask
));
854 static void clear_qp_mutex
PARAMS((valueT mask
));
855 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
856 static int has_suffix_p
PARAMS((const char *, const char *));
857 static void clear_register_values
PARAMS ((void));
858 static void print_dependency
PARAMS ((const char *action
, int depind
));
859 static void instruction_serialization
PARAMS ((void));
860 static void data_serialization
PARAMS ((void));
861 static void remove_marked_resource
PARAMS ((struct rsrc
*));
862 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
863 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
864 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
865 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
866 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
867 struct ia64_opcode
*, int, struct rsrc
[], int, int));
868 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
869 static void check_dependencies
PARAMS((struct ia64_opcode
*));
870 static void mark_resources
PARAMS((struct ia64_opcode
*));
871 static void update_dependencies
PARAMS((struct ia64_opcode
*));
872 static void note_register_values
PARAMS((struct ia64_opcode
*));
873 static int qp_mutex
PARAMS ((int, int, int));
874 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
875 static void output_vbyte_mem
PARAMS ((int, char *, char *));
876 static void count_output
PARAMS ((int, char *, char *));
877 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
878 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
879 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
880 static void output_P1_format
PARAMS ((vbyte_func
, int));
881 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
882 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
883 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
884 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
885 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
886 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
887 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
888 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
889 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
890 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
891 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
892 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
893 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
894 static char format_ab_reg
PARAMS ((int, int));
895 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
897 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
898 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
900 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
901 static unw_rec_list
*output_endp
PARAMS ((void));
902 static unw_rec_list
*output_prologue
PARAMS ((void));
903 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
904 static unw_rec_list
*output_body
PARAMS ((void));
905 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
906 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
907 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
908 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
909 static unw_rec_list
*output_rp_when
PARAMS ((void));
910 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
911 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
912 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
913 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
914 static unw_rec_list
*output_pfs_when
PARAMS ((void));
915 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
916 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
917 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
918 static unw_rec_list
*output_preds_when
PARAMS ((void));
919 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
920 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
921 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
922 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
923 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
924 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
925 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
926 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
927 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
928 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
929 static unw_rec_list
*output_unat_when
PARAMS ((void));
930 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
931 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
932 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
933 static unw_rec_list
*output_lc_when
PARAMS ((void));
934 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
935 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
936 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
937 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
938 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
939 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
940 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
941 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
942 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
943 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
944 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
945 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
946 static unw_rec_list
*output_bsp_when
PARAMS ((void));
947 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
948 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
949 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
950 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
951 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
952 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
953 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
954 static unw_rec_list
*output_rnat_when
PARAMS ((void));
955 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
956 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
957 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
958 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
959 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
960 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
961 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
962 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int,
964 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int,
966 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
967 unsigned int, unsigned int));
968 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
969 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
970 static int calc_record_size
PARAMS ((unw_rec_list
*));
971 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
972 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
973 unsigned long, fragS
*,
975 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
976 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
977 static int parse_predicate_and_operand
PARAMS ((expressionS
*, unsigned *, const char *));
978 static void convert_expr_to_ab_reg
PARAMS ((const expressionS
*, unsigned int *, unsigned int *, const char *, int));
979 static void convert_expr_to_xy_reg
PARAMS ((const expressionS
*, unsigned int *, unsigned int *, const char *, int));
980 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
981 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
982 static void free_saved_prologue_counts
PARAMS ((void));
984 /* Determine if application register REGNUM resides only in the integer
985 unit (as opposed to the memory unit). */
987 ar_is_only_in_integer_unit (int reg
)
990 return reg
>= 64 && reg
<= 111;
993 /* Determine if application register REGNUM resides only in the memory
994 unit (as opposed to the integer unit). */
996 ar_is_only_in_memory_unit (int reg
)
999 return reg
>= 0 && reg
<= 47;
1002 /* Switch to section NAME and create section if necessary. It's
1003 rather ugly that we have to manipulate input_line_pointer but I
1004 don't see any other way to accomplish the same thing without
1005 changing obj-elf.c (which may be the Right Thing, in the end). */
1010 char *saved_input_line_pointer
;
1012 saved_input_line_pointer
= input_line_pointer
;
1013 input_line_pointer
= name
;
1014 obj_elf_section (0);
1015 input_line_pointer
= saved_input_line_pointer
;
1018 /* Map 's' to SHF_IA_64_SHORT. */
1021 ia64_elf_section_letter (letter
, ptr_msg
)
1026 return SHF_IA_64_SHORT
;
1027 else if (letter
== 'o')
1028 return SHF_LINK_ORDER
;
1030 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1034 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1037 ia64_elf_section_flags (flags
, attr
, type
)
1039 int attr
, type ATTRIBUTE_UNUSED
;
1041 if (attr
& SHF_IA_64_SHORT
)
1042 flags
|= SEC_SMALL_DATA
;
1047 ia64_elf_section_type (str
, len
)
1051 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1053 if (STREQ (ELF_STRING_ia64_unwind_info
))
1054 return SHT_PROGBITS
;
1056 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
1057 return SHT_PROGBITS
;
1059 if (STREQ (ELF_STRING_ia64_unwind
))
1060 return SHT_IA_64_UNWIND
;
1062 if (STREQ (ELF_STRING_ia64_unwind_once
))
1063 return SHT_IA_64_UNWIND
;
1065 if (STREQ ("unwind"))
1066 return SHT_IA_64_UNWIND
;
1073 set_regstack (ins
, locs
, outs
, rots
)
1074 unsigned int ins
, locs
, outs
, rots
;
1076 /* Size of frame. */
1079 sof
= ins
+ locs
+ outs
;
1082 as_bad ("Size of frame exceeds maximum of 96 registers");
1087 as_warn ("Size of rotating registers exceeds frame size");
1090 md
.in
.base
= REG_GR
+ 32;
1091 md
.loc
.base
= md
.in
.base
+ ins
;
1092 md
.out
.base
= md
.loc
.base
+ locs
;
1094 md
.in
.num_regs
= ins
;
1095 md
.loc
.num_regs
= locs
;
1096 md
.out
.num_regs
= outs
;
1097 md
.rot
.num_regs
= rots
;
1104 struct label_fix
*lfix
;
1106 subsegT saved_subseg
;
1110 if (!md
.last_text_seg
)
1113 saved_seg
= now_seg
;
1114 saved_subseg
= now_subseg
;
1116 subseg_set (md
.last_text_seg
, 0);
1118 while (md
.num_slots_in_use
> 0)
1119 emit_one_bundle (); /* force out queued instructions */
1121 /* In case there are labels following the last instruction, resolve
1124 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1126 symbol_set_value_now (lfix
->sym
);
1127 mark
|= lfix
->dw2_mark_labels
;
1131 dwarf2_where (&CURR_SLOT
.debug_line
);
1132 CURR_SLOT
.debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
1133 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT
.debug_line
);
1135 CURR_SLOT
.label_fixups
= 0;
1137 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1138 symbol_set_value_now (lfix
->sym
);
1139 CURR_SLOT
.tag_fixups
= 0;
1141 /* In case there are unwind directives following the last instruction,
1142 resolve those now. We only handle prologue, body, and endp directives
1143 here. Give an error for others. */
1144 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1146 switch (ptr
->r
.type
)
1152 ptr
->slot_number
= (unsigned long) frag_more (0);
1153 ptr
->slot_frag
= frag_now
;
1156 /* Allow any record which doesn't have a "t" field (i.e.,
1157 doesn't relate to a particular instruction). */
1173 as_bad (_("Unwind directive not followed by an instruction."));
1177 unwind
.current_entry
= NULL
;
1179 subseg_set (saved_seg
, saved_subseg
);
1181 if (md
.qp
.X_op
== O_register
)
1182 as_bad ("qualifying predicate not followed by instruction");
1186 ia64_do_align (int nbytes
)
1188 char *saved_input_line_pointer
= input_line_pointer
;
1190 input_line_pointer
= "";
1191 s_align_bytes (nbytes
);
1192 input_line_pointer
= saved_input_line_pointer
;
1196 ia64_cons_align (nbytes
)
1201 char *saved_input_line_pointer
= input_line_pointer
;
1202 input_line_pointer
= "";
1203 s_align_bytes (nbytes
);
1204 input_line_pointer
= saved_input_line_pointer
;
1208 /* Output COUNT bytes to a memory location. */
1209 static char *vbyte_mem_ptr
= NULL
;
1212 output_vbyte_mem (count
, ptr
, comment
)
1215 char *comment ATTRIBUTE_UNUSED
;
1218 if (vbyte_mem_ptr
== NULL
)
1223 for (x
= 0; x
< count
; x
++)
1224 *(vbyte_mem_ptr
++) = ptr
[x
];
1227 /* Count the number of bytes required for records. */
1228 static int vbyte_count
= 0;
1230 count_output (count
, ptr
, comment
)
1232 char *ptr ATTRIBUTE_UNUSED
;
1233 char *comment ATTRIBUTE_UNUSED
;
1235 vbyte_count
+= count
;
1239 output_R1_format (f
, rtype
, rlen
)
1241 unw_record_type rtype
;
1248 output_R3_format (f
, rtype
, rlen
);
1254 else if (rtype
!= prologue
)
1255 as_bad ("record type is not valid");
1257 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1258 (*f
) (1, &byte
, NULL
);
1262 output_R2_format (f
, mask
, grsave
, rlen
)
1269 mask
= (mask
& 0x0f);
1270 grsave
= (grsave
& 0x7f);
1272 bytes
[0] = (UNW_R2
| (mask
>> 1));
1273 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1274 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1275 (*f
) (count
, bytes
, NULL
);
1279 output_R3_format (f
, rtype
, rlen
)
1281 unw_record_type rtype
;
1288 output_R1_format (f
, rtype
, rlen
);
1294 else if (rtype
!= prologue
)
1295 as_bad ("record type is not valid");
1296 bytes
[0] = (UNW_R3
| r
);
1297 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1298 (*f
) (count
+ 1, bytes
, NULL
);
1302 output_P1_format (f
, brmask
)
1307 byte
= UNW_P1
| (brmask
& 0x1f);
1308 (*f
) (1, &byte
, NULL
);
1312 output_P2_format (f
, brmask
, gr
)
1318 brmask
= (brmask
& 0x1f);
1319 bytes
[0] = UNW_P2
| (brmask
>> 1);
1320 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1321 (*f
) (2, bytes
, NULL
);
1325 output_P3_format (f
, rtype
, reg
)
1327 unw_record_type rtype
;
1372 as_bad ("Invalid record type for P3 format.");
1374 bytes
[0] = (UNW_P3
| (r
>> 1));
1375 bytes
[1] = (((r
& 1) << 7) | reg
);
1376 (*f
) (2, bytes
, NULL
);
1380 output_P4_format (f
, imask
, imask_size
)
1382 unsigned char *imask
;
1383 unsigned long imask_size
;
1386 (*f
) (imask_size
, (char *) imask
, NULL
);
1390 output_P5_format (f
, grmask
, frmask
)
1393 unsigned long frmask
;
1396 grmask
= (grmask
& 0x0f);
1399 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1400 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1401 bytes
[3] = (frmask
& 0x000000ff);
1402 (*f
) (4, bytes
, NULL
);
1406 output_P6_format (f
, rtype
, rmask
)
1408 unw_record_type rtype
;
1414 if (rtype
== gr_mem
)
1416 else if (rtype
!= fr_mem
)
1417 as_bad ("Invalid record type for format P6");
1418 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1419 (*f
) (1, &byte
, NULL
);
1423 output_P7_format (f
, rtype
, w1
, w2
)
1425 unw_record_type rtype
;
1432 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1437 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1487 bytes
[0] = (UNW_P7
| r
);
1488 (*f
) (count
, bytes
, NULL
);
1492 output_P8_format (f
, rtype
, t
)
1494 unw_record_type rtype
;
1533 case bspstore_psprel
:
1536 case bspstore_sprel
:
1548 case priunat_when_gr
:
1551 case priunat_psprel
:
1557 case priunat_when_mem
:
1564 count
+= output_leb128 (bytes
+ 2, t
, 0);
1565 (*f
) (count
, bytes
, NULL
);
1569 output_P9_format (f
, grmask
, gr
)
1576 bytes
[1] = (grmask
& 0x0f);
1577 bytes
[2] = (gr
& 0x7f);
1578 (*f
) (3, bytes
, NULL
);
1582 output_P10_format (f
, abi
, context
)
1589 bytes
[1] = (abi
& 0xff);
1590 bytes
[2] = (context
& 0xff);
1591 (*f
) (3, bytes
, NULL
);
1595 output_B1_format (f
, rtype
, label
)
1597 unw_record_type rtype
;
1598 unsigned long label
;
1604 output_B4_format (f
, rtype
, label
);
1607 if (rtype
== copy_state
)
1609 else if (rtype
!= label_state
)
1610 as_bad ("Invalid record type for format B1");
1612 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1613 (*f
) (1, &byte
, NULL
);
1617 output_B2_format (f
, ecount
, t
)
1619 unsigned long ecount
;
1626 output_B3_format (f
, ecount
, t
);
1629 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1630 count
+= output_leb128 (bytes
+ 1, t
, 0);
1631 (*f
) (count
, bytes
, NULL
);
1635 output_B3_format (f
, ecount
, t
)
1637 unsigned long ecount
;
1644 output_B2_format (f
, ecount
, t
);
1648 count
+= output_leb128 (bytes
+ 1, t
, 0);
1649 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1650 (*f
) (count
, bytes
, NULL
);
1654 output_B4_format (f
, rtype
, label
)
1656 unw_record_type rtype
;
1657 unsigned long label
;
1664 output_B1_format (f
, rtype
, label
);
1668 if (rtype
== copy_state
)
1670 else if (rtype
!= label_state
)
1671 as_bad ("Invalid record type for format B1");
1673 bytes
[0] = (UNW_B4
| (r
<< 3));
1674 count
+= output_leb128 (bytes
+ 1, label
, 0);
1675 (*f
) (count
, bytes
, NULL
);
1679 format_ab_reg (ab
, reg
)
1686 ret
= (ab
<< 5) | reg
;
1691 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1693 unw_record_type rtype
;
1703 if (rtype
== spill_sprel
)
1705 else if (rtype
!= spill_psprel
)
1706 as_bad ("Invalid record type for format X1");
1707 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1708 count
+= output_leb128 (bytes
+ 2, t
, 0);
1709 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1710 (*f
) (count
, bytes
, NULL
);
1714 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1723 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1724 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1725 count
+= output_leb128 (bytes
+ 3, t
, 0);
1726 (*f
) (count
, bytes
, NULL
);
1730 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1732 unw_record_type rtype
;
1743 if (rtype
== spill_sprel_p
)
1745 else if (rtype
!= spill_psprel_p
)
1746 as_bad ("Invalid record type for format X3");
1747 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1748 bytes
[2] = format_ab_reg (ab
, reg
);
1749 count
+= output_leb128 (bytes
+ 3, t
, 0);
1750 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1751 (*f
) (count
, bytes
, NULL
);
1755 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1765 bytes
[1] = (qp
& 0x3f);
1766 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1767 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1768 count
+= output_leb128 (bytes
+ 4, t
, 0);
1769 (*f
) (count
, bytes
, NULL
);
1772 /* This function checks whether there are any outstanding .save-s and
1773 discards them if so. */
1776 check_pending_save (void)
1778 if (unwind
.pending_saves
)
1780 unw_rec_list
*cur
, *prev
;
1782 as_warn ("Previous .save incomplete");
1783 for (cur
= unwind
.list
, prev
= NULL
; cur
; )
1784 if (&cur
->r
.record
.p
== unwind
.pending_saves
)
1787 prev
->next
= cur
->next
;
1789 unwind
.list
= cur
->next
;
1790 if (cur
== unwind
.tail
)
1792 if (cur
== unwind
.current_entry
)
1793 unwind
.current_entry
= cur
->next
;
1794 /* Don't free the first discarded record, it's being used as
1795 terminator for (currently) br_gr and gr_gr processing, and
1796 also prevents leaving a dangling pointer to it in its
1798 cur
->r
.record
.p
.grmask
= 0;
1799 cur
->r
.record
.p
.brmask
= 0;
1800 cur
->r
.record
.p
.frmask
= 0;
1801 prev
= cur
->r
.record
.p
.next
;
1802 cur
->r
.record
.p
.next
= NULL
;
1814 cur
= cur
->r
.record
.p
.next
;
1817 unwind
.pending_saves
= NULL
;
1821 /* This function allocates a record list structure, and initializes fields. */
1823 static unw_rec_list
*
1824 alloc_record (unw_record_type t
)
1827 ptr
= xmalloc (sizeof (*ptr
));
1828 memset (ptr
, 0, sizeof (*ptr
));
1829 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1834 /* Dummy unwind record used for calculating the length of the last prologue or
1837 static unw_rec_list
*
1840 unw_rec_list
*ptr
= alloc_record (endp
);
1844 static unw_rec_list
*
1847 unw_rec_list
*ptr
= alloc_record (prologue
);
1848 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1852 static unw_rec_list
*
1853 output_prologue_gr (saved_mask
, reg
)
1854 unsigned int saved_mask
;
1857 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1858 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1859 ptr
->r
.record
.r
.grmask
= saved_mask
;
1860 ptr
->r
.record
.r
.grsave
= reg
;
1864 static unw_rec_list
*
1867 unw_rec_list
*ptr
= alloc_record (body
);
1871 static unw_rec_list
*
1872 output_mem_stack_f (size
)
1875 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1876 ptr
->r
.record
.p
.size
= size
;
1880 static unw_rec_list
*
1881 output_mem_stack_v ()
1883 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1887 static unw_rec_list
*
1891 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1892 ptr
->r
.record
.p
.r
.gr
= gr
;
1896 static unw_rec_list
*
1897 output_psp_sprel (offset
)
1898 unsigned int offset
;
1900 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1901 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1905 static unw_rec_list
*
1908 unw_rec_list
*ptr
= alloc_record (rp_when
);
1912 static unw_rec_list
*
1916 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1917 ptr
->r
.record
.p
.r
.gr
= gr
;
1921 static unw_rec_list
*
1925 unw_rec_list
*ptr
= alloc_record (rp_br
);
1926 ptr
->r
.record
.p
.r
.br
= br
;
1930 static unw_rec_list
*
1931 output_rp_psprel (offset
)
1932 unsigned int offset
;
1934 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1935 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1939 static unw_rec_list
*
1940 output_rp_sprel (offset
)
1941 unsigned int offset
;
1943 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1944 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1948 static unw_rec_list
*
1951 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1955 static unw_rec_list
*
1959 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1960 ptr
->r
.record
.p
.r
.gr
= gr
;
1964 static unw_rec_list
*
1965 output_pfs_psprel (offset
)
1966 unsigned int offset
;
1968 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1969 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1973 static unw_rec_list
*
1974 output_pfs_sprel (offset
)
1975 unsigned int offset
;
1977 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1978 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1982 static unw_rec_list
*
1983 output_preds_when ()
1985 unw_rec_list
*ptr
= alloc_record (preds_when
);
1989 static unw_rec_list
*
1990 output_preds_gr (gr
)
1993 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1994 ptr
->r
.record
.p
.r
.gr
= gr
;
1998 static unw_rec_list
*
1999 output_preds_psprel (offset
)
2000 unsigned int offset
;
2002 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
2003 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2007 static unw_rec_list
*
2008 output_preds_sprel (offset
)
2009 unsigned int offset
;
2011 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
2012 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2016 static unw_rec_list
*
2017 output_fr_mem (mask
)
2020 unw_rec_list
*ptr
= alloc_record (fr_mem
);
2021 unw_rec_list
*cur
= ptr
;
2023 ptr
->r
.record
.p
.frmask
= mask
;
2024 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2027 unw_rec_list
*prev
= cur
;
2029 /* Clear least significant set bit. */
2030 mask
&= ~(mask
& (~mask
+ 1));
2033 cur
= alloc_record (fr_mem
);
2034 cur
->r
.record
.p
.frmask
= mask
;
2035 /* Retain only least significant bit. */
2036 prev
->r
.record
.p
.frmask
^= mask
;
2037 prev
->r
.record
.p
.next
= cur
;
2041 static unw_rec_list
*
2042 output_frgr_mem (gr_mask
, fr_mask
)
2043 unsigned int gr_mask
;
2044 unsigned int fr_mask
;
2046 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
2047 unw_rec_list
*cur
= ptr
;
2049 unwind
.pending_saves
= &cur
->r
.record
.p
;
2050 cur
->r
.record
.p
.frmask
= fr_mask
;
2053 unw_rec_list
*prev
= cur
;
2055 /* Clear least significant set bit. */
2056 fr_mask
&= ~(fr_mask
& (~fr_mask
+ 1));
2057 if (!gr_mask
&& !fr_mask
)
2059 cur
= alloc_record (frgr_mem
);
2060 cur
->r
.record
.p
.frmask
= fr_mask
;
2061 /* Retain only least significant bit. */
2062 prev
->r
.record
.p
.frmask
^= fr_mask
;
2063 prev
->r
.record
.p
.next
= cur
;
2065 cur
->r
.record
.p
.grmask
= gr_mask
;
2068 unw_rec_list
*prev
= cur
;
2070 /* Clear least significant set bit. */
2071 gr_mask
&= ~(gr_mask
& (~gr_mask
+ 1));
2074 cur
= alloc_record (frgr_mem
);
2075 cur
->r
.record
.p
.grmask
= gr_mask
;
2076 /* Retain only least significant bit. */
2077 prev
->r
.record
.p
.grmask
^= gr_mask
;
2078 prev
->r
.record
.p
.next
= cur
;
2082 static unw_rec_list
*
2083 output_gr_gr (mask
, reg
)
2087 unw_rec_list
*ptr
= alloc_record (gr_gr
);
2088 unw_rec_list
*cur
= ptr
;
2090 ptr
->r
.record
.p
.grmask
= mask
;
2091 ptr
->r
.record
.p
.r
.gr
= reg
;
2092 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2095 unw_rec_list
*prev
= cur
;
2097 /* Clear least significant set bit. */
2098 mask
&= ~(mask
& (~mask
+ 1));
2101 cur
= alloc_record (gr_gr
);
2102 cur
->r
.record
.p
.grmask
= mask
;
2103 /* Indicate this record shouldn't be output. */
2104 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2105 /* Retain only least significant bit. */
2106 prev
->r
.record
.p
.grmask
^= mask
;
2107 prev
->r
.record
.p
.next
= cur
;
2111 static unw_rec_list
*
2112 output_gr_mem (mask
)
2115 unw_rec_list
*ptr
= alloc_record (gr_mem
);
2116 unw_rec_list
*cur
= ptr
;
2118 ptr
->r
.record
.p
.grmask
= mask
;
2119 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2122 unw_rec_list
*prev
= cur
;
2124 /* Clear least significant set bit. */
2125 mask
&= ~(mask
& (~mask
+ 1));
2128 cur
= alloc_record (gr_mem
);
2129 cur
->r
.record
.p
.grmask
= mask
;
2130 /* Retain only least significant bit. */
2131 prev
->r
.record
.p
.grmask
^= mask
;
2132 prev
->r
.record
.p
.next
= cur
;
2136 static unw_rec_list
*
2137 output_br_mem (unsigned int mask
)
2139 unw_rec_list
*ptr
= alloc_record (br_mem
);
2140 unw_rec_list
*cur
= ptr
;
2142 ptr
->r
.record
.p
.brmask
= mask
;
2143 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2146 unw_rec_list
*prev
= cur
;
2148 /* Clear least significant set bit. */
2149 mask
&= ~(mask
& (~mask
+ 1));
2152 cur
= alloc_record (br_mem
);
2153 cur
->r
.record
.p
.brmask
= mask
;
2154 /* Retain only least significant bit. */
2155 prev
->r
.record
.p
.brmask
^= mask
;
2156 prev
->r
.record
.p
.next
= cur
;
2160 static unw_rec_list
*
2161 output_br_gr (mask
, reg
)
2165 unw_rec_list
*ptr
= alloc_record (br_gr
);
2166 unw_rec_list
*cur
= ptr
;
2168 ptr
->r
.record
.p
.brmask
= mask
;
2169 ptr
->r
.record
.p
.r
.gr
= reg
;
2170 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2173 unw_rec_list
*prev
= cur
;
2175 /* Clear least significant set bit. */
2176 mask
&= ~(mask
& (~mask
+ 1));
2179 cur
= alloc_record (br_gr
);
2180 cur
->r
.record
.p
.brmask
= mask
;
2181 /* Indicate this record shouldn't be output. */
2182 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2183 /* Retain only least significant bit. */
2184 prev
->r
.record
.p
.brmask
^= mask
;
2185 prev
->r
.record
.p
.next
= cur
;
2189 static unw_rec_list
*
2190 output_spill_base (offset
)
2191 unsigned int offset
;
2193 unw_rec_list
*ptr
= alloc_record (spill_base
);
2194 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2198 static unw_rec_list
*
2201 unw_rec_list
*ptr
= alloc_record (unat_when
);
2205 static unw_rec_list
*
2209 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2210 ptr
->r
.record
.p
.r
.gr
= gr
;
2214 static unw_rec_list
*
2215 output_unat_psprel (offset
)
2216 unsigned int offset
;
2218 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2219 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2223 static unw_rec_list
*
2224 output_unat_sprel (offset
)
2225 unsigned int offset
;
2227 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2228 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2232 static unw_rec_list
*
2235 unw_rec_list
*ptr
= alloc_record (lc_when
);
2239 static unw_rec_list
*
2243 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2244 ptr
->r
.record
.p
.r
.gr
= gr
;
2248 static unw_rec_list
*
2249 output_lc_psprel (offset
)
2250 unsigned int offset
;
2252 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2253 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2257 static unw_rec_list
*
2258 output_lc_sprel (offset
)
2259 unsigned int offset
;
2261 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2262 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2266 static unw_rec_list
*
2269 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2273 static unw_rec_list
*
2277 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2278 ptr
->r
.record
.p
.r
.gr
= gr
;
2282 static unw_rec_list
*
2283 output_fpsr_psprel (offset
)
2284 unsigned int offset
;
2286 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2287 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2291 static unw_rec_list
*
2292 output_fpsr_sprel (offset
)
2293 unsigned int offset
;
2295 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2296 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2300 static unw_rec_list
*
2301 output_priunat_when_gr ()
2303 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2307 static unw_rec_list
*
2308 output_priunat_when_mem ()
2310 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2314 static unw_rec_list
*
2315 output_priunat_gr (gr
)
2318 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2319 ptr
->r
.record
.p
.r
.gr
= gr
;
2323 static unw_rec_list
*
2324 output_priunat_psprel (offset
)
2325 unsigned int offset
;
2327 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2328 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2332 static unw_rec_list
*
2333 output_priunat_sprel (offset
)
2334 unsigned int offset
;
2336 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2337 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2341 static unw_rec_list
*
2344 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2348 static unw_rec_list
*
2352 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2353 ptr
->r
.record
.p
.r
.gr
= gr
;
2357 static unw_rec_list
*
2358 output_bsp_psprel (offset
)
2359 unsigned int offset
;
2361 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2362 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2366 static unw_rec_list
*
2367 output_bsp_sprel (offset
)
2368 unsigned int offset
;
2370 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2371 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2375 static unw_rec_list
*
2376 output_bspstore_when ()
2378 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2382 static unw_rec_list
*
2383 output_bspstore_gr (gr
)
2386 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2387 ptr
->r
.record
.p
.r
.gr
= gr
;
2391 static unw_rec_list
*
2392 output_bspstore_psprel (offset
)
2393 unsigned int offset
;
2395 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2396 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2400 static unw_rec_list
*
2401 output_bspstore_sprel (offset
)
2402 unsigned int offset
;
2404 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2405 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2409 static unw_rec_list
*
2412 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2416 static unw_rec_list
*
2420 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2421 ptr
->r
.record
.p
.r
.gr
= gr
;
2425 static unw_rec_list
*
2426 output_rnat_psprel (offset
)
2427 unsigned int offset
;
2429 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2430 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2434 static unw_rec_list
*
2435 output_rnat_sprel (offset
)
2436 unsigned int offset
;
2438 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2439 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2443 static unw_rec_list
*
2444 output_unwabi (abi
, context
)
2446 unsigned long context
;
2448 unw_rec_list
*ptr
= alloc_record (unwabi
);
2449 ptr
->r
.record
.p
.abi
= abi
;
2450 ptr
->r
.record
.p
.context
= context
;
2454 static unw_rec_list
*
2455 output_epilogue (unsigned long ecount
)
2457 unw_rec_list
*ptr
= alloc_record (epilogue
);
2458 ptr
->r
.record
.b
.ecount
= ecount
;
2462 static unw_rec_list
*
2463 output_label_state (unsigned long label
)
2465 unw_rec_list
*ptr
= alloc_record (label_state
);
2466 ptr
->r
.record
.b
.label
= label
;
2470 static unw_rec_list
*
2471 output_copy_state (unsigned long label
)
2473 unw_rec_list
*ptr
= alloc_record (copy_state
);
2474 ptr
->r
.record
.b
.label
= label
;
2478 static unw_rec_list
*
2479 output_spill_psprel (ab
, reg
, offset
, predicate
)
2482 unsigned int offset
;
2483 unsigned int predicate
;
2485 unw_rec_list
*ptr
= alloc_record (predicate
? spill_psprel_p
: spill_psprel
);
2486 ptr
->r
.record
.x
.ab
= ab
;
2487 ptr
->r
.record
.x
.reg
= reg
;
2488 ptr
->r
.record
.x
.where
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2489 ptr
->r
.record
.x
.qp
= predicate
;
2493 static unw_rec_list
*
2494 output_spill_sprel (ab
, reg
, offset
, predicate
)
2497 unsigned int offset
;
2498 unsigned int predicate
;
2500 unw_rec_list
*ptr
= alloc_record (predicate
? spill_sprel_p
: spill_sprel
);
2501 ptr
->r
.record
.x
.ab
= ab
;
2502 ptr
->r
.record
.x
.reg
= reg
;
2503 ptr
->r
.record
.x
.where
.spoff
= offset
/ 4;
2504 ptr
->r
.record
.x
.qp
= predicate
;
2508 static unw_rec_list
*
2509 output_spill_reg (ab
, reg
, targ_reg
, xy
, predicate
)
2512 unsigned int targ_reg
;
2514 unsigned int predicate
;
2516 unw_rec_list
*ptr
= alloc_record (predicate
? spill_reg_p
: spill_reg
);
2517 ptr
->r
.record
.x
.ab
= ab
;
2518 ptr
->r
.record
.x
.reg
= reg
;
2519 ptr
->r
.record
.x
.where
.reg
= targ_reg
;
2520 ptr
->r
.record
.x
.xy
= xy
;
2521 ptr
->r
.record
.x
.qp
= predicate
;
2525 /* Given a unw_rec_list process the correct format with the
2526 specified function. */
2529 process_one_record (ptr
, f
)
2533 unsigned int fr_mask
, gr_mask
;
2535 switch (ptr
->r
.type
)
2537 /* This is a dummy record that takes up no space in the output. */
2545 /* These are taken care of by prologue/prologue_gr. */
2550 if (ptr
->r
.type
== prologue_gr
)
2551 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2552 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2554 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2556 /* Output descriptor(s) for union of register spills (if any). */
2557 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2558 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2561 if ((fr_mask
& ~0xfUL
) == 0)
2562 output_P6_format (f
, fr_mem
, fr_mask
);
2565 output_P5_format (f
, gr_mask
, fr_mask
);
2570 output_P6_format (f
, gr_mem
, gr_mask
);
2571 if (ptr
->r
.record
.r
.mask
.br_mem
)
2572 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2574 /* output imask descriptor if necessary: */
2575 if (ptr
->r
.record
.r
.mask
.i
)
2576 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2577 ptr
->r
.record
.r
.imask_size
);
2581 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2585 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2586 ptr
->r
.record
.p
.size
);
2599 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.r
.gr
);
2602 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.r
.br
);
2605 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.off
.sp
, 0);
2613 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2622 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
, 0);
2632 case bspstore_sprel
:
2634 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.sp
);
2637 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2639 const unw_rec_list
*cur
= ptr
;
2641 gr_mask
= cur
->r
.record
.p
.grmask
;
2642 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2643 gr_mask
|= cur
->r
.record
.p
.grmask
;
2644 output_P9_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2648 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2650 const unw_rec_list
*cur
= ptr
;
2652 gr_mask
= cur
->r
.record
.p
.brmask
;
2653 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2654 gr_mask
|= cur
->r
.record
.p
.brmask
;
2655 output_P2_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2659 as_bad ("spill_mask record unimplemented.");
2661 case priunat_when_gr
:
2662 case priunat_when_mem
:
2666 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2668 case priunat_psprel
:
2670 case bspstore_psprel
:
2672 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
);
2675 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2678 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2682 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2685 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2686 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2687 ptr
->r
.record
.x
.where
.pspoff
);
2690 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2691 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2692 ptr
->r
.record
.x
.where
.spoff
);
2695 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2696 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2697 ptr
->r
.record
.x
.where
.reg
, ptr
->r
.record
.x
.t
);
2699 case spill_psprel_p
:
2700 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2701 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2702 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.pspoff
);
2705 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2706 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2707 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.spoff
);
2710 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2711 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2712 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.where
.reg
,
2716 as_bad ("record_type_not_valid");
2721 /* Given a unw_rec_list list, process all the records with
2722 the specified function. */
2724 process_unw_records (list
, f
)
2729 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2730 process_one_record (ptr
, f
);
2733 /* Determine the size of a record list in bytes. */
2735 calc_record_size (list
)
2739 process_unw_records (list
, count_output
);
2743 /* Return the number of bits set in the input value.
2744 Perhaps this has a better place... */
2745 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2746 # define popcount __builtin_popcount
2749 popcount (unsigned x
)
2751 static const unsigned char popcnt
[16] =
2759 if (x
< NELEMS (popcnt
))
2761 return popcnt
[x
% NELEMS (popcnt
)] + popcount (x
/ NELEMS (popcnt
));
2765 /* Update IMASK bitmask to reflect the fact that one or more registers
2766 of type TYPE are saved starting at instruction with index T. If N
2767 bits are set in REGMASK, it is assumed that instructions T through
2768 T+N-1 save these registers.
2772 1: instruction saves next fp reg
2773 2: instruction saves next general reg
2774 3: instruction saves next branch reg */
2776 set_imask (region
, regmask
, t
, type
)
2777 unw_rec_list
*region
;
2778 unsigned long regmask
;
2782 unsigned char *imask
;
2783 unsigned long imask_size
;
2787 imask
= region
->r
.record
.r
.mask
.i
;
2788 imask_size
= region
->r
.record
.r
.imask_size
;
2791 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2792 imask
= xmalloc (imask_size
);
2793 memset (imask
, 0, imask_size
);
2795 region
->r
.record
.r
.imask_size
= imask_size
;
2796 region
->r
.record
.r
.mask
.i
= imask
;
2800 pos
= 2 * (3 - t
% 4);
2803 if (i
>= imask_size
)
2805 as_bad ("Ignoring attempt to spill beyond end of region");
2809 imask
[i
] |= (type
& 0x3) << pos
;
2811 regmask
&= (regmask
- 1);
2821 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2822 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2823 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2827 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2828 unsigned long slot_addr
;
2830 unsigned long first_addr
;
2834 unsigned long index
= 0;
2836 /* First time we are called, the initial address and frag are invalid. */
2837 if (first_addr
== 0)
2840 /* If the two addresses are in different frags, then we need to add in
2841 the remaining size of this frag, and then the entire size of intermediate
2843 while (slot_frag
!= first_frag
)
2845 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2849 /* We can get the final addresses only during and after
2851 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2852 index
+= 3 * ((first_frag
->fr_next
->fr_address
2853 - first_frag
->fr_address
2854 - first_frag
->fr_fix
) >> 4);
2857 /* We don't know what the final addresses will be. We try our
2858 best to estimate. */
2859 switch (first_frag
->fr_type
)
2865 as_fatal ("only constant space allocation is supported");
2871 /* Take alignment into account. Assume the worst case
2872 before relaxation. */
2873 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2877 if (first_frag
->fr_symbol
)
2879 as_fatal ("only constant offsets are supported");
2883 index
+= 3 * (first_frag
->fr_offset
>> 4);
2887 /* Add in the full size of the frag converted to instruction slots. */
2888 index
+= 3 * (first_frag
->fr_fix
>> 4);
2889 /* Subtract away the initial part before first_addr. */
2890 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2891 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2893 /* Move to the beginning of the next frag. */
2894 first_frag
= first_frag
->fr_next
;
2895 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2897 /* This can happen if there is section switching in the middle of a
2898 function, causing the frag chain for the function to be broken.
2899 It is too difficult to recover safely from this problem, so we just
2900 exit with an error. */
2901 if (first_frag
== NULL
)
2902 as_fatal ("Section switching in code is not supported.");
2905 /* Add in the used part of the last frag. */
2906 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2907 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2911 /* Optimize unwind record directives. */
2913 static unw_rec_list
*
2914 optimize_unw_records (list
)
2920 /* If the only unwind record is ".prologue" or ".prologue" followed
2921 by ".body", then we can optimize the unwind directives away. */
2922 if (list
->r
.type
== prologue
2923 && (list
->next
->r
.type
== endp
2924 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2930 /* Given a complete record list, process any records which have
2931 unresolved fields, (ie length counts for a prologue). After
2932 this has been run, all necessary information should be available
2933 within each record to generate an image. */
2936 fixup_unw_records (list
, before_relax
)
2940 unw_rec_list
*ptr
, *region
= 0;
2941 unsigned long first_addr
= 0, rlen
= 0, t
;
2942 fragS
*first_frag
= 0;
2944 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2946 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2947 as_bad (" Insn slot not set in unwind record.");
2948 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2949 first_addr
, first_frag
, before_relax
);
2950 switch (ptr
->r
.type
)
2958 unsigned long last_addr
= 0;
2959 fragS
*last_frag
= NULL
;
2961 first_addr
= ptr
->slot_number
;
2962 first_frag
= ptr
->slot_frag
;
2963 /* Find either the next body/prologue start, or the end of
2964 the function, and determine the size of the region. */
2965 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2966 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2967 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2969 last_addr
= last
->slot_number
;
2970 last_frag
= last
->slot_frag
;
2973 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2975 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2976 if (ptr
->r
.type
== body
)
2977 /* End of region. */
2985 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2987 /* This happens when a memory-stack-less procedure uses a
2988 ".restore sp" directive at the end of a region to pop
2990 ptr
->r
.record
.b
.t
= 0;
3001 case priunat_when_gr
:
3002 case priunat_when_mem
:
3006 ptr
->r
.record
.p
.t
= t
;
3014 case spill_psprel_p
:
3015 ptr
->r
.record
.x
.t
= t
;
3021 as_bad ("frgr_mem record before region record!");
3024 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
3025 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
3026 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
3027 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
3032 as_bad ("fr_mem record before region record!");
3035 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
3036 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
3041 as_bad ("gr_mem record before region record!");
3044 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
3045 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
3050 as_bad ("br_mem record before region record!");
3053 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
3054 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
3060 as_bad ("gr_gr record before region record!");
3063 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
3068 as_bad ("br_gr record before region record!");
3071 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
3080 /* Estimate the size of a frag before relaxing. We only have one type of frag
3081 to handle here, which is the unwind info frag. */
3084 ia64_estimate_size_before_relax (fragS
*frag
,
3085 asection
*segtype ATTRIBUTE_UNUSED
)
3090 /* ??? This code is identical to the first part of ia64_convert_frag. */
3091 list
= (unw_rec_list
*) frag
->fr_opcode
;
3092 fixup_unw_records (list
, 0);
3094 len
= calc_record_size (list
);
3095 /* pad to pointer-size boundary. */
3096 pad
= len
% md
.pointer_size
;
3098 len
+= md
.pointer_size
- pad
;
3099 /* Add 8 for the header. */
3101 /* Add a pointer for the personality offset. */
3102 if (frag
->fr_offset
)
3103 size
+= md
.pointer_size
;
3105 /* fr_var carries the max_chars that we created the fragment with.
3106 We must, of course, have allocated enough memory earlier. */
3107 assert (frag
->fr_var
>= size
);
3109 return frag
->fr_fix
+ size
;
3112 /* This function converts a rs_machine_dependent variant frag into a
3113 normal fill frag with the unwind image from the the record list. */
3115 ia64_convert_frag (fragS
*frag
)
3121 /* ??? This code is identical to ia64_estimate_size_before_relax. */
3122 list
= (unw_rec_list
*) frag
->fr_opcode
;
3123 fixup_unw_records (list
, 0);
3125 len
= calc_record_size (list
);
3126 /* pad to pointer-size boundary. */
3127 pad
= len
% md
.pointer_size
;
3129 len
+= md
.pointer_size
- pad
;
3130 /* Add 8 for the header. */
3132 /* Add a pointer for the personality offset. */
3133 if (frag
->fr_offset
)
3134 size
+= md
.pointer_size
;
3136 /* fr_var carries the max_chars that we created the fragment with.
3137 We must, of course, have allocated enough memory earlier. */
3138 assert (frag
->fr_var
>= size
);
3140 /* Initialize the header area. fr_offset is initialized with
3141 unwind.personality_routine. */
3142 if (frag
->fr_offset
)
3144 if (md
.flags
& EF_IA_64_ABI64
)
3145 flag_value
= (bfd_vma
) 3 << 32;
3147 /* 32-bit unwind info block. */
3148 flag_value
= (bfd_vma
) 0x1003 << 32;
3153 md_number_to_chars (frag
->fr_literal
,
3154 (((bfd_vma
) 1 << 48) /* Version. */
3155 | flag_value
/* U & E handler flags. */
3156 | (len
/ md
.pointer_size
)), /* Length. */
3159 /* Skip the header. */
3160 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
3161 process_unw_records (list
, output_vbyte_mem
);
3163 /* Fill the padding bytes with zeros. */
3165 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
3166 md
.pointer_size
- pad
);
3168 frag
->fr_fix
+= size
;
3169 frag
->fr_type
= rs_fill
;
3171 frag
->fr_offset
= 0;
3175 parse_predicate_and_operand (e
, qp
, po
)
3180 int sep
= parse_operand (e
, ',');
3182 *qp
= e
->X_add_number
- REG_P
;
3183 if (e
->X_op
!= O_register
|| *qp
> 63)
3185 as_bad ("First operand to .%s must be a predicate", po
);
3189 as_warn ("Pointless use of p0 as first operand to .%s", po
);
3191 sep
= parse_operand (e
, ',');
3198 convert_expr_to_ab_reg (e
, ab
, regp
, po
, n
)
3199 const expressionS
*e
;
3205 unsigned int reg
= e
->X_add_number
;
3207 *ab
= *regp
= 0; /* Anything valid is good here. */
3209 if (e
->X_op
!= O_register
)
3210 reg
= REG_GR
; /* Anything invalid is good here. */
3212 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
3215 *regp
= reg
- REG_GR
;
3217 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
3218 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
3221 *regp
= reg
- REG_FR
;
3223 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3226 *regp
= reg
- REG_BR
;
3233 case REG_PR
: *regp
= 0; break;
3234 case REG_PSP
: *regp
= 1; break;
3235 case REG_PRIUNAT
: *regp
= 2; break;
3236 case REG_BR
+ 0: *regp
= 3; break;
3237 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3238 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3239 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3240 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3241 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3242 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3243 case REG_AR
+ AR_LC
: *regp
= 10; break;
3246 as_bad ("Operand %d to .%s must be a preserved register", n
, po
);
3253 convert_expr_to_xy_reg (e
, xy
, regp
, po
, n
)
3254 const expressionS
*e
;
3260 unsigned int reg
= e
->X_add_number
;
3262 *xy
= *regp
= 0; /* Anything valid is good here. */
3264 if (e
->X_op
!= O_register
)
3265 reg
= REG_GR
; /* Anything invalid is good here. */
3267 if (reg
>= (REG_GR
+ 1) && reg
<= (REG_GR
+ 127))
3270 *regp
= reg
- REG_GR
;
3272 else if (reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 127))
3275 *regp
= reg
- REG_FR
;
3277 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3280 *regp
= reg
- REG_BR
;
3283 as_bad ("Operand %d to .%s must be a writable register", n
, po
);
3289 /* The current frag is an alignment frag. */
3290 align_frag
= frag_now
;
3291 s_align_bytes (arg
);
3296 int dummy ATTRIBUTE_UNUSED
;
3303 if (is_it_end_of_statement ())
3305 radix
= input_line_pointer
;
3306 ch
= get_symbol_end ();
3307 ia64_canonicalize_symbol_name (radix
);
3308 if (strcasecmp (radix
, "C"))
3309 as_bad ("Radix `%s' unsupported or invalid", radix
);
3310 *input_line_pointer
= ch
;
3311 demand_empty_rest_of_line ();
3314 /* Helper function for .loc directives. If the assembler is not generating
3315 line number info, then we need to remember which instructions have a .loc
3316 directive, and only call dwarf2_gen_line_info for those instructions. */
3321 CURR_SLOT
.loc_directive_seen
= 1;
3322 dwarf2_directive_loc (x
);
3325 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3327 dot_special_section (which
)
3330 set_section ((char *) special_section_name
[which
]);
3333 /* Return -1 for warning and 0 for error. */
3336 unwind_diagnostic (const char * region
, const char *directive
)
3338 if (md
.unwind_check
== unwind_check_warning
)
3340 as_warn (".%s outside of %s", directive
, region
);
3345 as_bad (".%s outside of %s", directive
, region
);
3346 ignore_rest_of_line ();
3351 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3352 a procedure but the unwind directive check is set to warning, 0 if
3353 a directive isn't in a procedure and the unwind directive check is set
3357 in_procedure (const char *directive
)
3359 if (unwind
.proc_pending
.sym
3360 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3362 return unwind_diagnostic ("procedure", directive
);
3365 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3366 a prologue but the unwind directive check is set to warning, 0 if
3367 a directive isn't in a prologue and the unwind directive check is set
3371 in_prologue (const char *directive
)
3373 int in
= in_procedure (directive
);
3375 if (in
> 0 && !unwind
.prologue
)
3376 in
= unwind_diagnostic ("prologue", directive
);
3377 check_pending_save ();
3381 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3382 a body but the unwind directive check is set to warning, 0 if
3383 a directive isn't in a body and the unwind directive check is set
3387 in_body (const char *directive
)
3389 int in
= in_procedure (directive
);
3391 if (in
> 0 && !unwind
.body
)
3392 in
= unwind_diagnostic ("body region", directive
);
3397 add_unwind_entry (ptr
, sep
)
3404 unwind
.tail
->next
= ptr
;
3409 /* The current entry can in fact be a chain of unwind entries. */
3410 if (unwind
.current_entry
== NULL
)
3411 unwind
.current_entry
= ptr
;
3414 /* The current entry can in fact be a chain of unwind entries. */
3415 if (unwind
.current_entry
== NULL
)
3416 unwind
.current_entry
= ptr
;
3420 /* Parse a tag permitted for the current directive. */
3424 ch
= get_symbol_end ();
3425 /* FIXME: For now, just issue a warning that this isn't implemented. */
3432 as_warn ("Tags on unwind pseudo-ops aren't supported, yet");
3435 *input_line_pointer
= ch
;
3437 if (sep
!= NOT_A_CHAR
)
3438 demand_empty_rest_of_line ();
3443 int dummy ATTRIBUTE_UNUSED
;
3448 if (!in_prologue ("fframe"))
3451 sep
= parse_operand (&e
, ',');
3453 if (e
.X_op
!= O_constant
)
3455 as_bad ("First operand to .fframe must be a constant");
3458 add_unwind_entry (output_mem_stack_f (e
.X_add_number
), sep
);
3463 int dummy ATTRIBUTE_UNUSED
;
3469 if (!in_prologue ("vframe"))
3472 sep
= parse_operand (&e
, ',');
3473 reg
= e
.X_add_number
- REG_GR
;
3474 if (e
.X_op
!= O_register
|| reg
> 127)
3476 as_bad ("First operand to .vframe must be a general register");
3479 add_unwind_entry (output_mem_stack_v (), sep
);
3480 if (! (unwind
.prologue_mask
& 2))
3481 add_unwind_entry (output_psp_gr (reg
), NOT_A_CHAR
);
3482 else if (reg
!= unwind
.prologue_gr
3483 + (unsigned) popcount (unwind
.prologue_mask
& (-2 << 1)))
3484 as_warn ("Operand of .vframe contradicts .prologue");
3495 as_warn (".vframepsp is meaningless, assuming .vframesp was meant");
3497 if (!in_prologue ("vframesp"))
3500 sep
= parse_operand (&e
, ',');
3501 if (e
.X_op
!= O_constant
)
3503 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3506 add_unwind_entry (output_mem_stack_v (), sep
);
3507 add_unwind_entry (output_psp_sprel (e
.X_add_number
), NOT_A_CHAR
);
3512 int dummy ATTRIBUTE_UNUSED
;
3515 unsigned reg1
, reg2
;
3518 if (!in_prologue ("save"))
3521 sep
= parse_operand (&e1
, ',');
3523 sep
= parse_operand (&e2
, ',');
3527 reg1
= e1
.X_add_number
;
3528 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3529 if (e1
.X_op
!= O_register
)
3531 as_bad ("First operand to .save not a register");
3532 reg1
= REG_PR
; /* Anything valid is good here. */
3534 reg2
= e2
.X_add_number
- REG_GR
;
3535 if (e2
.X_op
!= O_register
|| reg2
> 127)
3537 as_bad ("Second operand to .save not a valid register");
3542 case REG_AR
+ AR_BSP
:
3543 add_unwind_entry (output_bsp_when (), sep
);
3544 add_unwind_entry (output_bsp_gr (reg2
), NOT_A_CHAR
);
3546 case REG_AR
+ AR_BSPSTORE
:
3547 add_unwind_entry (output_bspstore_when (), sep
);
3548 add_unwind_entry (output_bspstore_gr (reg2
), NOT_A_CHAR
);
3550 case REG_AR
+ AR_RNAT
:
3551 add_unwind_entry (output_rnat_when (), sep
);
3552 add_unwind_entry (output_rnat_gr (reg2
), NOT_A_CHAR
);
3554 case REG_AR
+ AR_UNAT
:
3555 add_unwind_entry (output_unat_when (), sep
);
3556 add_unwind_entry (output_unat_gr (reg2
), NOT_A_CHAR
);
3558 case REG_AR
+ AR_FPSR
:
3559 add_unwind_entry (output_fpsr_when (), sep
);
3560 add_unwind_entry (output_fpsr_gr (reg2
), NOT_A_CHAR
);
3562 case REG_AR
+ AR_PFS
:
3563 add_unwind_entry (output_pfs_when (), sep
);
3564 if (! (unwind
.prologue_mask
& 4))
3565 add_unwind_entry (output_pfs_gr (reg2
), NOT_A_CHAR
);
3566 else if (reg2
!= unwind
.prologue_gr
3567 + (unsigned) popcount (unwind
.prologue_mask
& (-4 << 1)))
3568 as_warn ("Second operand of .save contradicts .prologue");
3570 case REG_AR
+ AR_LC
:
3571 add_unwind_entry (output_lc_when (), sep
);
3572 add_unwind_entry (output_lc_gr (reg2
), NOT_A_CHAR
);
3575 add_unwind_entry (output_rp_when (), sep
);
3576 if (! (unwind
.prologue_mask
& 8))
3577 add_unwind_entry (output_rp_gr (reg2
), NOT_A_CHAR
);
3578 else if (reg2
!= unwind
.prologue_gr
)
3579 as_warn ("Second operand of .save contradicts .prologue");
3582 add_unwind_entry (output_preds_when (), sep
);
3583 if (! (unwind
.prologue_mask
& 1))
3584 add_unwind_entry (output_preds_gr (reg2
), NOT_A_CHAR
);
3585 else if (reg2
!= unwind
.prologue_gr
3586 + (unsigned) popcount (unwind
.prologue_mask
& (-1 << 1)))
3587 as_warn ("Second operand of .save contradicts .prologue");
3590 add_unwind_entry (output_priunat_when_gr (), sep
);
3591 add_unwind_entry (output_priunat_gr (reg2
), NOT_A_CHAR
);
3594 as_bad ("First operand to .save not a valid register");
3595 add_unwind_entry (NULL
, sep
);
3602 int dummy ATTRIBUTE_UNUSED
;
3605 unsigned long ecount
; /* # of _additional_ regions to pop */
3608 if (!in_body ("restore"))
3611 sep
= parse_operand (&e1
, ',');
3612 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3613 as_bad ("First operand to .restore must be stack pointer (sp)");
3619 sep
= parse_operand (&e2
, ',');
3620 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3622 as_bad ("Second operand to .restore must be a constant >= 0");
3623 e2
.X_add_number
= 0;
3625 ecount
= e2
.X_add_number
;
3628 ecount
= unwind
.prologue_count
- 1;
3630 if (ecount
>= unwind
.prologue_count
)
3632 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3633 ecount
+ 1, unwind
.prologue_count
);
3637 add_unwind_entry (output_epilogue (ecount
), sep
);
3639 if (ecount
< unwind
.prologue_count
)
3640 unwind
.prologue_count
-= ecount
+ 1;
3642 unwind
.prologue_count
= 0;
3646 dot_restorereg (pred
)
3649 unsigned int qp
, ab
, reg
;
3652 const char * const po
= pred
? "restorereg.p" : "restorereg";
3654 if (!in_procedure (po
))
3658 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3661 sep
= parse_operand (&e
, ',');
3664 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3666 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0, qp
), sep
);
3669 static char *special_linkonce_name
[] =
3671 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3675 start_unwind_section (const segT text_seg
, int sec_index
)
3678 Use a slightly ugly scheme to derive the unwind section names from
3679 the text section name:
3681 text sect. unwind table sect.
3682 name: name: comments:
3683 ---------- ----------------- --------------------------------
3685 .text.foo .IA_64.unwind.text.foo
3686 .foo .IA_64.unwind.foo
3688 .gnu.linkonce.ia64unw.foo
3689 _info .IA_64.unwind_info gas issues error message (ditto)
3690 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3692 This mapping is done so that:
3694 (a) An object file with unwind info only in .text will use
3695 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3696 This follows the letter of the ABI and also ensures backwards
3697 compatibility with older toolchains.
3699 (b) An object file with unwind info in multiple text sections
3700 will use separate unwind sections for each text section.
3701 This allows us to properly set the "sh_info" and "sh_link"
3702 fields in SHT_IA_64_UNWIND as required by the ABI and also
3703 lets GNU ld support programs with multiple segments
3704 containing unwind info (as might be the case for certain
3705 embedded applications).
3707 (c) An error is issued if there would be a name clash.
3710 const char *text_name
, *sec_text_name
;
3712 const char *prefix
= special_section_name
[sec_index
];
3714 size_t prefix_len
, suffix_len
, sec_name_len
;
3716 sec_text_name
= segment_name (text_seg
);
3717 text_name
= sec_text_name
;
3718 if (strncmp (text_name
, "_info", 5) == 0)
3720 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3722 ignore_rest_of_line ();
3725 if (strcmp (text_name
, ".text") == 0)
3728 /* Build the unwind section name by appending the (possibly stripped)
3729 text section name to the unwind prefix. */
3731 if (strncmp (text_name
, ".gnu.linkonce.t.",
3732 sizeof (".gnu.linkonce.t.") - 1) == 0)
3734 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3735 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3738 prefix_len
= strlen (prefix
);
3739 suffix_len
= strlen (suffix
);
3740 sec_name_len
= prefix_len
+ suffix_len
;
3741 sec_name
= alloca (sec_name_len
+ 1);
3742 memcpy (sec_name
, prefix
, prefix_len
);
3743 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3744 sec_name
[sec_name_len
] = '\0';
3746 /* Handle COMDAT group. */
3747 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3748 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3751 size_t len
, group_name_len
;
3752 const char *group_name
= elf_group_name (text_seg
);
3754 if (group_name
== NULL
)
3756 as_bad ("Group section `%s' has no group signature",
3758 ignore_rest_of_line ();
3761 /* We have to construct a fake section directive. */
3762 group_name_len
= strlen (group_name
);
3764 + 16 /* ,"aG",@progbits, */
3765 + group_name_len
/* ,group_name */
3768 section
= alloca (len
+ 1);
3769 memcpy (section
, sec_name
, sec_name_len
);
3770 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3771 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3772 memcpy (section
+ len
- 7, ",comdat", 7);
3773 section
[len
] = '\0';
3774 set_section (section
);
3778 set_section (sec_name
);
3779 bfd_set_section_flags (stdoutput
, now_seg
,
3780 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3783 elf_linked_to_section (now_seg
) = text_seg
;
3787 generate_unwind_image (const segT text_seg
)
3792 /* Mark the end of the unwind info, so that we can compute the size of the
3793 last unwind region. */
3794 add_unwind_entry (output_endp (), NOT_A_CHAR
);
3796 /* Force out pending instructions, to make sure all unwind records have
3797 a valid slot_number field. */
3798 ia64_flush_insns ();
3800 /* Generate the unwind record. */
3801 list
= optimize_unw_records (unwind
.list
);
3802 fixup_unw_records (list
, 1);
3803 size
= calc_record_size (list
);
3805 if (size
> 0 || unwind
.force_unwind_entry
)
3807 unwind
.force_unwind_entry
= 0;
3808 /* pad to pointer-size boundary. */
3809 pad
= size
% md
.pointer_size
;
3811 size
+= md
.pointer_size
- pad
;
3812 /* Add 8 for the header. */
3814 /* Add a pointer for the personality offset. */
3815 if (unwind
.personality_routine
)
3816 size
+= md
.pointer_size
;
3819 /* If there are unwind records, switch sections, and output the info. */
3823 bfd_reloc_code_real_type reloc
;
3825 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3827 /* Make sure the section has 4 byte alignment for ILP32 and
3828 8 byte alignment for LP64. */
3829 frag_align (md
.pointer_size_shift
, 0, 0);
3830 record_alignment (now_seg
, md
.pointer_size_shift
);
3832 /* Set expression which points to start of unwind descriptor area. */
3833 unwind
.info
= expr_build_dot ();
3835 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3836 (offsetT
) (long) unwind
.personality_routine
,
3839 /* Add the personality address to the image. */
3840 if (unwind
.personality_routine
!= 0)
3842 exp
.X_op
= O_symbol
;
3843 exp
.X_add_symbol
= unwind
.personality_routine
;
3844 exp
.X_add_number
= 0;
3846 if (md
.flags
& EF_IA_64_BE
)
3848 if (md
.flags
& EF_IA_64_ABI64
)
3849 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3851 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3855 if (md
.flags
& EF_IA_64_ABI64
)
3856 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3858 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3861 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3862 md
.pointer_size
, &exp
, 0, reloc
);
3863 unwind
.personality_routine
= 0;
3867 free_saved_prologue_counts ();
3868 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3872 dot_handlerdata (dummy
)
3873 int dummy ATTRIBUTE_UNUSED
;
3875 if (!in_procedure ("handlerdata"))
3877 unwind
.force_unwind_entry
= 1;
3879 /* Remember which segment we're in so we can switch back after .endp */
3880 unwind
.saved_text_seg
= now_seg
;
3881 unwind
.saved_text_subseg
= now_subseg
;
3883 /* Generate unwind info into unwind-info section and then leave that
3884 section as the currently active one so dataXX directives go into
3885 the language specific data area of the unwind info block. */
3886 generate_unwind_image (now_seg
);
3887 demand_empty_rest_of_line ();
3891 dot_unwentry (dummy
)
3892 int dummy ATTRIBUTE_UNUSED
;
3894 if (!in_procedure ("unwentry"))
3896 unwind
.force_unwind_entry
= 1;
3897 demand_empty_rest_of_line ();
3902 int dummy ATTRIBUTE_UNUSED
;
3907 if (!in_prologue ("altrp"))
3910 parse_operand (&e
, 0);
3911 reg
= e
.X_add_number
- REG_BR
;
3912 if (e
.X_op
!= O_register
|| reg
> 7)
3914 as_bad ("First operand to .altrp not a valid branch register");
3917 add_unwind_entry (output_rp_br (reg
), 0);
3921 dot_savemem (psprel
)
3927 const char * const po
= psprel
? "savepsp" : "savesp";
3929 if (!in_prologue (po
))
3932 sep
= parse_operand (&e1
, ',');
3934 sep
= parse_operand (&e2
, ',');
3938 reg1
= e1
.X_add_number
;
3939 val
= e2
.X_add_number
;
3941 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3942 if (e1
.X_op
!= O_register
)
3944 as_bad ("First operand to .%s not a register", po
);
3945 reg1
= REG_PR
; /* Anything valid is good here. */
3947 if (e2
.X_op
!= O_constant
)
3949 as_bad ("Second operand to .%s not a constant", po
);
3955 case REG_AR
+ AR_BSP
:
3956 add_unwind_entry (output_bsp_when (), sep
);
3957 add_unwind_entry ((psprel
3959 : output_bsp_sprel
) (val
), NOT_A_CHAR
);
3961 case REG_AR
+ AR_BSPSTORE
:
3962 add_unwind_entry (output_bspstore_when (), sep
);
3963 add_unwind_entry ((psprel
3964 ? output_bspstore_psprel
3965 : output_bspstore_sprel
) (val
), NOT_A_CHAR
);
3967 case REG_AR
+ AR_RNAT
:
3968 add_unwind_entry (output_rnat_when (), sep
);
3969 add_unwind_entry ((psprel
3970 ? output_rnat_psprel
3971 : output_rnat_sprel
) (val
), NOT_A_CHAR
);
3973 case REG_AR
+ AR_UNAT
:
3974 add_unwind_entry (output_unat_when (), sep
);
3975 add_unwind_entry ((psprel
3976 ? output_unat_psprel
3977 : output_unat_sprel
) (val
), NOT_A_CHAR
);
3979 case REG_AR
+ AR_FPSR
:
3980 add_unwind_entry (output_fpsr_when (), sep
);
3981 add_unwind_entry ((psprel
3982 ? output_fpsr_psprel
3983 : output_fpsr_sprel
) (val
), NOT_A_CHAR
);
3985 case REG_AR
+ AR_PFS
:
3986 add_unwind_entry (output_pfs_when (), sep
);
3987 add_unwind_entry ((psprel
3989 : output_pfs_sprel
) (val
), NOT_A_CHAR
);
3991 case REG_AR
+ AR_LC
:
3992 add_unwind_entry (output_lc_when (), sep
);
3993 add_unwind_entry ((psprel
3995 : output_lc_sprel
) (val
), NOT_A_CHAR
);
3998 add_unwind_entry (output_rp_when (), sep
);
3999 add_unwind_entry ((psprel
4001 : output_rp_sprel
) (val
), NOT_A_CHAR
);
4004 add_unwind_entry (output_preds_when (), sep
);
4005 add_unwind_entry ((psprel
4006 ? output_preds_psprel
4007 : output_preds_sprel
) (val
), NOT_A_CHAR
);
4010 add_unwind_entry (output_priunat_when_mem (), sep
);
4011 add_unwind_entry ((psprel
4012 ? output_priunat_psprel
4013 : output_priunat_sprel
) (val
), NOT_A_CHAR
);
4016 as_bad ("First operand to .%s not a valid register", po
);
4017 add_unwind_entry (NULL
, sep
);
4024 int dummy ATTRIBUTE_UNUSED
;
4030 if (!in_prologue ("save.g"))
4033 sep
= parse_operand (&e
, ',');
4035 grmask
= e
.X_add_number
;
4036 if (e
.X_op
!= O_constant
4037 || e
.X_add_number
<= 0
4038 || e
.X_add_number
> 0xf)
4040 as_bad ("First operand to .save.g must be a positive 4-bit constant");
4047 int n
= popcount (grmask
);
4049 parse_operand (&e
, 0);
4050 reg
= e
.X_add_number
- REG_GR
;
4051 if (e
.X_op
!= O_register
|| reg
> 127)
4053 as_bad ("Second operand to .save.g must be a general register");
4056 else if (reg
> 128U - n
)
4058 as_bad ("Second operand to .save.g must be the first of %d general registers", n
);
4061 add_unwind_entry (output_gr_gr (grmask
, reg
), 0);
4064 add_unwind_entry (output_gr_mem (grmask
), 0);
4069 int dummy ATTRIBUTE_UNUSED
;
4073 if (!in_prologue ("save.f"))
4076 parse_operand (&e
, 0);
4078 if (e
.X_op
!= O_constant
4079 || e
.X_add_number
<= 0
4080 || e
.X_add_number
> 0xfffff)
4082 as_bad ("Operand to .save.f must be a positive 20-bit constant");
4085 add_unwind_entry (output_fr_mem (e
.X_add_number
), 0);
4090 int dummy ATTRIBUTE_UNUSED
;
4096 if (!in_prologue ("save.b"))
4099 sep
= parse_operand (&e
, ',');
4101 brmask
= e
.X_add_number
;
4102 if (e
.X_op
!= O_constant
4103 || e
.X_add_number
<= 0
4104 || e
.X_add_number
> 0x1f)
4106 as_bad ("First operand to .save.b must be a positive 5-bit constant");
4113 int n
= popcount (brmask
);
4115 parse_operand (&e
, 0);
4116 reg
= e
.X_add_number
- REG_GR
;
4117 if (e
.X_op
!= O_register
|| reg
> 127)
4119 as_bad ("Second operand to .save.b must be a general register");
4122 else if (reg
> 128U - n
)
4124 as_bad ("Second operand to .save.b must be the first of %d general registers", n
);
4127 add_unwind_entry (output_br_gr (brmask
, reg
), 0);
4130 add_unwind_entry (output_br_mem (brmask
), 0);
4135 int dummy ATTRIBUTE_UNUSED
;
4139 if (!in_prologue ("save.gf"))
4142 if (parse_operand (&e1
, ',') == ',')
4143 parse_operand (&e2
, 0);
4147 if (e1
.X_op
!= O_constant
4148 || e1
.X_add_number
< 0
4149 || e1
.X_add_number
> 0xf)
4151 as_bad ("First operand to .save.gf must be a non-negative 4-bit constant");
4153 e1
.X_add_number
= 0;
4155 if (e2
.X_op
!= O_constant
4156 || e2
.X_add_number
< 0
4157 || e2
.X_add_number
> 0xfffff)
4159 as_bad ("Second operand to .save.gf must be a non-negative 20-bit constant");
4161 e2
.X_add_number
= 0;
4163 if (e1
.X_op
== O_constant
4164 && e2
.X_op
== O_constant
4165 && e1
.X_add_number
== 0
4166 && e2
.X_add_number
== 0)
4167 as_bad ("Operands to .save.gf may not be both zero");
4169 add_unwind_entry (output_frgr_mem (e1
.X_add_number
, e2
.X_add_number
), 0);
4174 int dummy ATTRIBUTE_UNUSED
;
4178 if (!in_prologue ("spill"))
4181 parse_operand (&e
, 0);
4183 if (e
.X_op
!= O_constant
)
4185 as_bad ("Operand to .spill must be a constant");
4188 add_unwind_entry (output_spill_base (e
.X_add_number
), 0);
4196 unsigned int qp
, ab
, xy
, reg
, treg
;
4198 const char * const po
= pred
? "spillreg.p" : "spillreg";
4200 if (!in_procedure (po
))
4204 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4207 sep
= parse_operand (&e
, ',');
4210 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4213 sep
= parse_operand (&e
, ',');
4216 convert_expr_to_xy_reg (&e
, &xy
, &treg
, po
, 2 + pred
);
4218 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
, qp
), sep
);
4222 dot_spillmem (psprel
)
4226 int pred
= (psprel
< 0), sep
;
4227 unsigned int qp
, ab
, reg
;
4233 po
= psprel
? "spillpsp.p" : "spillsp.p";
4236 po
= psprel
? "spillpsp" : "spillsp";
4238 if (!in_procedure (po
))
4242 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4245 sep
= parse_operand (&e
, ',');
4248 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4251 sep
= parse_operand (&e
, ',');
4254 if (e
.X_op
!= O_constant
)
4256 as_bad ("Operand %d to .%s must be a constant", 2 + pred
, po
);
4261 add_unwind_entry (output_spill_psprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4263 add_unwind_entry (output_spill_sprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4267 get_saved_prologue_count (lbl
)
4270 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4272 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4276 return lpc
->prologue_count
;
4278 as_bad ("Missing .label_state %ld", lbl
);
4283 save_prologue_count (lbl
, count
)
4287 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4289 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4293 lpc
->prologue_count
= count
;
4296 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4298 new_lpc
->next
= unwind
.saved_prologue_counts
;
4299 new_lpc
->label_number
= lbl
;
4300 new_lpc
->prologue_count
= count
;
4301 unwind
.saved_prologue_counts
= new_lpc
;
4306 free_saved_prologue_counts ()
4308 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4309 label_prologue_count
*next
;
4318 unwind
.saved_prologue_counts
= NULL
;
4322 dot_label_state (dummy
)
4323 int dummy ATTRIBUTE_UNUSED
;
4327 if (!in_body ("label_state"))
4330 parse_operand (&e
, 0);
4331 if (e
.X_op
== O_constant
)
4332 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4335 as_bad ("Operand to .label_state must be a constant");
4338 add_unwind_entry (output_label_state (e
.X_add_number
), 0);
4342 dot_copy_state (dummy
)
4343 int dummy ATTRIBUTE_UNUSED
;
4347 if (!in_body ("copy_state"))
4350 parse_operand (&e
, 0);
4351 if (e
.X_op
== O_constant
)
4352 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4355 as_bad ("Operand to .copy_state must be a constant");
4358 add_unwind_entry (output_copy_state (e
.X_add_number
), 0);
4363 int dummy ATTRIBUTE_UNUSED
;
4368 if (!in_prologue ("unwabi"))
4371 sep
= parse_operand (&e1
, ',');
4373 parse_operand (&e2
, 0);
4377 if (e1
.X_op
!= O_constant
)
4379 as_bad ("First operand to .unwabi must be a constant");
4380 e1
.X_add_number
= 0;
4383 if (e2
.X_op
!= O_constant
)
4385 as_bad ("Second operand to .unwabi must be a constant");
4386 e2
.X_add_number
= 0;
4389 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
), 0);
4393 dot_personality (dummy
)
4394 int dummy ATTRIBUTE_UNUSED
;
4397 if (!in_procedure ("personality"))
4400 name
= input_line_pointer
;
4401 c
= get_symbol_end ();
4402 p
= input_line_pointer
;
4403 unwind
.personality_routine
= symbol_find_or_make (name
);
4404 unwind
.force_unwind_entry
= 1;
4407 demand_empty_rest_of_line ();
4412 int dummy ATTRIBUTE_UNUSED
;
4416 proc_pending
*pending
, *last_pending
;
4418 if (unwind
.proc_pending
.sym
)
4420 (md
.unwind_check
== unwind_check_warning
4422 : as_bad
) ("Missing .endp after previous .proc");
4423 while (unwind
.proc_pending
.next
)
4425 pending
= unwind
.proc_pending
.next
;
4426 unwind
.proc_pending
.next
= pending
->next
;
4430 last_pending
= NULL
;
4432 /* Parse names of main and alternate entry points and mark them as
4433 function symbols: */
4437 name
= input_line_pointer
;
4438 c
= get_symbol_end ();
4439 p
= input_line_pointer
;
4441 as_bad ("Empty argument of .proc");
4444 sym
= symbol_find_or_make (name
);
4445 if (S_IS_DEFINED (sym
))
4446 as_bad ("`%s' was already defined", name
);
4447 else if (!last_pending
)
4449 unwind
.proc_pending
.sym
= sym
;
4450 last_pending
= &unwind
.proc_pending
;
4454 pending
= xmalloc (sizeof (*pending
));
4456 last_pending
= last_pending
->next
= pending
;
4458 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4462 if (*input_line_pointer
!= ',')
4464 ++input_line_pointer
;
4468 unwind
.proc_pending
.sym
= expr_build_dot ();
4469 last_pending
= &unwind
.proc_pending
;
4471 last_pending
->next
= NULL
;
4472 demand_empty_rest_of_line ();
4475 unwind
.prologue
= 0;
4476 unwind
.prologue_count
= 0;
4479 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4480 unwind
.personality_routine
= 0;
4485 int dummy ATTRIBUTE_UNUSED
;
4487 if (!in_procedure ("body"))
4489 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4490 as_warn ("Initial .body should precede any instructions");
4491 check_pending_save ();
4493 unwind
.prologue
= 0;
4494 unwind
.prologue_mask
= 0;
4497 add_unwind_entry (output_body (), 0);
4501 dot_prologue (dummy
)
4502 int dummy ATTRIBUTE_UNUSED
;
4504 unsigned mask
= 0, grsave
= 0;
4506 if (!in_procedure ("prologue"))
4508 if (unwind
.prologue
)
4510 as_bad (".prologue within prologue");
4511 ignore_rest_of_line ();
4514 if (!unwind
.body
&& unwind
.insn
)
4515 as_warn ("Initial .prologue should precede any instructions");
4517 if (!is_it_end_of_statement ())
4520 int n
, sep
= parse_operand (&e
, ',');
4522 if (e
.X_op
!= O_constant
4523 || e
.X_add_number
< 0
4524 || e
.X_add_number
> 0xf)
4525 as_bad ("First operand to .prologue must be a positive 4-bit constant");
4526 else if (e
.X_add_number
== 0)
4527 as_warn ("Pointless use of zero first operand to .prologue");
4529 mask
= e
.X_add_number
;
4530 n
= popcount (mask
);
4533 parse_operand (&e
, 0);
4536 if (e
.X_op
== O_constant
4537 && e
.X_add_number
>= 0
4538 && e
.X_add_number
< 128)
4540 if (md
.unwind_check
== unwind_check_error
)
4541 as_warn ("Using a constant as second operand to .prologue is deprecated");
4542 grsave
= e
.X_add_number
;
4544 else if (e
.X_op
!= O_register
4545 || (grsave
= e
.X_add_number
- REG_GR
) > 127)
4547 as_bad ("Second operand to .prologue must be a general register");
4550 else if (grsave
> 128U - n
)
4552 as_bad ("Second operand to .prologue must be the first of %d general registers", n
);
4559 add_unwind_entry (output_prologue_gr (mask
, grsave
), 0);
4561 add_unwind_entry (output_prologue (), 0);
4563 unwind
.prologue
= 1;
4564 unwind
.prologue_mask
= mask
;
4565 unwind
.prologue_gr
= grsave
;
4567 ++unwind
.prologue_count
;
4572 int dummy ATTRIBUTE_UNUSED
;
4575 int bytes_per_address
;
4578 subsegT saved_subseg
;
4579 proc_pending
*pending
;
4580 int unwind_check
= md
.unwind_check
;
4582 md
.unwind_check
= unwind_check_error
;
4583 if (!in_procedure ("endp"))
4585 md
.unwind_check
= unwind_check
;
4587 if (unwind
.saved_text_seg
)
4589 saved_seg
= unwind
.saved_text_seg
;
4590 saved_subseg
= unwind
.saved_text_subseg
;
4591 unwind
.saved_text_seg
= NULL
;
4595 saved_seg
= now_seg
;
4596 saved_subseg
= now_subseg
;
4599 insn_group_break (1, 0, 0);
4601 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4603 generate_unwind_image (saved_seg
);
4605 if (unwind
.info
|| unwind
.force_unwind_entry
)
4609 subseg_set (md
.last_text_seg
, 0);
4610 proc_end
= expr_build_dot ();
4612 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4614 /* Make sure that section has 4 byte alignment for ILP32 and
4615 8 byte alignment for LP64. */
4616 record_alignment (now_seg
, md
.pointer_size_shift
);
4618 /* Need space for 3 pointers for procedure start, procedure end,
4620 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4621 where
= frag_now_fix () - (3 * md
.pointer_size
);
4622 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4624 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4625 e
.X_op
= O_pseudo_fixup
;
4626 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4628 if (!S_IS_LOCAL (unwind
.proc_pending
.sym
)
4629 && S_IS_DEFINED (unwind
.proc_pending
.sym
))
4630 e
.X_add_symbol
= symbol_temp_new (S_GET_SEGMENT (unwind
.proc_pending
.sym
),
4631 S_GET_VALUE (unwind
.proc_pending
.sym
),
4632 symbol_get_frag (unwind
.proc_pending
.sym
));
4634 e
.X_add_symbol
= unwind
.proc_pending
.sym
;
4635 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4637 e
.X_op
= O_pseudo_fixup
;
4638 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4640 e
.X_add_symbol
= proc_end
;
4641 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4642 bytes_per_address
, &e
);
4646 e
.X_op
= O_pseudo_fixup
;
4647 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4649 e
.X_add_symbol
= unwind
.info
;
4650 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4651 bytes_per_address
, &e
);
4654 subseg_set (saved_seg
, saved_subseg
);
4656 /* Set symbol sizes. */
4657 pending
= &unwind
.proc_pending
;
4658 if (S_GET_NAME (pending
->sym
))
4662 symbolS
*sym
= pending
->sym
;
4664 if (!S_IS_DEFINED (sym
))
4665 as_bad ("`%s' was not defined within procedure", S_GET_NAME (sym
));
4666 else if (S_GET_SIZE (sym
) == 0
4667 && symbol_get_obj (sym
)->size
== NULL
)
4669 fragS
*frag
= symbol_get_frag (sym
);
4673 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4674 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4677 symbol_get_obj (sym
)->size
=
4678 (expressionS
*) xmalloc (sizeof (expressionS
));
4679 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4680 symbol_get_obj (sym
)->size
->X_add_symbol
4681 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4682 frag_now_fix (), frag_now
);
4683 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4684 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4688 } while ((pending
= pending
->next
) != NULL
);
4691 /* Parse names of main and alternate entry points. */
4697 name
= input_line_pointer
;
4698 c
= get_symbol_end ();
4699 p
= input_line_pointer
;
4701 (md
.unwind_check
== unwind_check_warning
4703 : as_bad
) ("Empty argument of .endp");
4706 symbolS
*sym
= symbol_find (name
);
4708 for (pending
= &unwind
.proc_pending
; pending
; pending
= pending
->next
)
4710 if (sym
== pending
->sym
)
4712 pending
->sym
= NULL
;
4716 if (!sym
|| !pending
)
4717 as_warn ("`%s' was not specified with previous .proc", name
);
4721 if (*input_line_pointer
!= ',')
4723 ++input_line_pointer
;
4725 demand_empty_rest_of_line ();
4727 /* Deliberately only checking for the main entry point here; the
4728 language spec even says all arguments to .endp are ignored. */
4729 if (unwind
.proc_pending
.sym
4730 && S_GET_NAME (unwind
.proc_pending
.sym
)
4731 && strcmp (S_GET_NAME (unwind
.proc_pending
.sym
), FAKE_LABEL_NAME
))
4732 as_warn ("`%s' should be an operand to this .endp",
4733 S_GET_NAME (unwind
.proc_pending
.sym
));
4734 while (unwind
.proc_pending
.next
)
4736 pending
= unwind
.proc_pending
.next
;
4737 unwind
.proc_pending
.next
= pending
->next
;
4740 unwind
.proc_pending
.sym
= unwind
.info
= NULL
;
4744 dot_template (template)
4747 CURR_SLOT
.user_template
= template;
4752 int dummy ATTRIBUTE_UNUSED
;
4754 int ins
, locs
, outs
, rots
;
4756 if (is_it_end_of_statement ())
4757 ins
= locs
= outs
= rots
= 0;
4760 ins
= get_absolute_expression ();
4761 if (*input_line_pointer
++ != ',')
4763 locs
= get_absolute_expression ();
4764 if (*input_line_pointer
++ != ',')
4766 outs
= get_absolute_expression ();
4767 if (*input_line_pointer
++ != ',')
4769 rots
= get_absolute_expression ();
4771 set_regstack (ins
, locs
, outs
, rots
);
4775 as_bad ("Comma expected");
4776 ignore_rest_of_line ();
4784 valueT num_alloced
= 0;
4785 struct dynreg
**drpp
, *dr
;
4786 int ch
, base_reg
= 0;
4792 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4793 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4794 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4798 /* First, remove existing names from hash table. */
4799 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4801 hash_delete (md
.dynreg_hash
, dr
->name
);
4802 /* FIXME: Free dr->name. */
4806 drpp
= &md
.dynreg
[type
];
4809 start
= input_line_pointer
;
4810 ch
= get_symbol_end ();
4811 len
= strlen (ia64_canonicalize_symbol_name (start
));
4812 *input_line_pointer
= ch
;
4815 if (*input_line_pointer
!= '[')
4817 as_bad ("Expected '['");
4820 ++input_line_pointer
; /* skip '[' */
4822 num_regs
= get_absolute_expression ();
4824 if (*input_line_pointer
++ != ']')
4826 as_bad ("Expected ']'");
4831 as_bad ("Number of elements must be positive");
4836 num_alloced
+= num_regs
;
4840 if (num_alloced
> md
.rot
.num_regs
)
4842 as_bad ("Used more than the declared %d rotating registers",
4848 if (num_alloced
> 96)
4850 as_bad ("Used more than the available 96 rotating registers");
4855 if (num_alloced
> 48)
4857 as_bad ("Used more than the available 48 rotating registers");
4868 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4869 memset (*drpp
, 0, sizeof (*dr
));
4872 name
= obstack_alloc (¬es
, len
+ 1);
4873 memcpy (name
, start
, len
);
4878 dr
->num_regs
= num_regs
;
4879 dr
->base
= base_reg
;
4881 base_reg
+= num_regs
;
4883 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4885 as_bad ("Attempt to redefine register set `%s'", name
);
4886 obstack_free (¬es
, name
);
4890 if (*input_line_pointer
!= ',')
4892 ++input_line_pointer
; /* skip comma */
4895 demand_empty_rest_of_line ();
4899 ignore_rest_of_line ();
4903 dot_byteorder (byteorder
)
4906 segment_info_type
*seginfo
= seg_info (now_seg
);
4908 if (byteorder
== -1)
4910 if (seginfo
->tc_segment_info_data
.endian
== 0)
4911 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4912 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4915 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4917 if (target_big_endian
!= byteorder
)
4919 target_big_endian
= byteorder
;
4920 if (target_big_endian
)
4922 ia64_number_to_chars
= number_to_chars_bigendian
;
4923 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4927 ia64_number_to_chars
= number_to_chars_littleendian
;
4928 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4935 int dummy ATTRIBUTE_UNUSED
;
4942 option
= input_line_pointer
;
4943 ch
= get_symbol_end ();
4944 if (strcmp (option
, "lsb") == 0)
4945 md
.flags
&= ~EF_IA_64_BE
;
4946 else if (strcmp (option
, "msb") == 0)
4947 md
.flags
|= EF_IA_64_BE
;
4948 else if (strcmp (option
, "abi32") == 0)
4949 md
.flags
&= ~EF_IA_64_ABI64
;
4950 else if (strcmp (option
, "abi64") == 0)
4951 md
.flags
|= EF_IA_64_ABI64
;
4953 as_bad ("Unknown psr option `%s'", option
);
4954 *input_line_pointer
= ch
;
4957 if (*input_line_pointer
!= ',')
4960 ++input_line_pointer
;
4963 demand_empty_rest_of_line ();
4968 int dummy ATTRIBUTE_UNUSED
;
4970 new_logical_line (0, get_absolute_expression ());
4971 demand_empty_rest_of_line ();
4975 cross_section (ref
, cons
, ua
)
4977 void (*cons
) PARAMS((int));
4981 int saved_auto_align
;
4982 unsigned int section_count
;
4985 start
= input_line_pointer
;
4991 name
= demand_copy_C_string (&len
);
4992 obstack_free(¬es
, name
);
4995 ignore_rest_of_line ();
5001 char c
= get_symbol_end ();
5003 if (input_line_pointer
== start
)
5005 as_bad ("Missing section name");
5006 ignore_rest_of_line ();
5009 *input_line_pointer
= c
;
5011 end
= input_line_pointer
;
5013 if (*input_line_pointer
!= ',')
5015 as_bad ("Comma expected after section name");
5016 ignore_rest_of_line ();
5020 end
= input_line_pointer
+ 1; /* skip comma */
5021 input_line_pointer
= start
;
5022 md
.keep_pending_output
= 1;
5023 section_count
= bfd_count_sections(stdoutput
);
5024 obj_elf_section (0);
5025 if (section_count
!= bfd_count_sections(stdoutput
))
5026 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
5027 input_line_pointer
= end
;
5028 saved_auto_align
= md
.auto_align
;
5033 md
.auto_align
= saved_auto_align
;
5034 obj_elf_previous (0);
5035 md
.keep_pending_output
= 0;
5042 cross_section (size
, cons
, 0);
5045 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
5048 stmt_float_cons (kind
)
5069 ia64_do_align (alignment
);
5077 int saved_auto_align
= md
.auto_align
;
5081 md
.auto_align
= saved_auto_align
;
5085 dot_xfloat_cons (kind
)
5088 cross_section (kind
, stmt_float_cons
, 0);
5092 dot_xstringer (zero
)
5095 cross_section (zero
, stringer
, 0);
5102 cross_section (size
, cons
, 1);
5106 dot_xfloat_cons_ua (kind
)
5109 cross_section (kind
, float_cons
, 1);
5112 /* .reg.val <regname>,value */
5116 int dummy ATTRIBUTE_UNUSED
;
5120 expression_and_evaluate (®
);
5121 if (reg
.X_op
!= O_register
)
5123 as_bad (_("Register name expected"));
5124 ignore_rest_of_line ();
5126 else if (*input_line_pointer
++ != ',')
5128 as_bad (_("Comma expected"));
5129 ignore_rest_of_line ();
5133 valueT value
= get_absolute_expression ();
5134 int regno
= reg
.X_add_number
;
5135 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
5136 as_warn (_("Register value annotation ignored"));
5139 gr_values
[regno
- REG_GR
].known
= 1;
5140 gr_values
[regno
- REG_GR
].value
= value
;
5141 gr_values
[regno
- REG_GR
].path
= md
.path
;
5144 demand_empty_rest_of_line ();
5149 .serialize.instruction
5152 dot_serialize (type
)
5155 insn_group_break (0, 0, 0);
5157 instruction_serialization ();
5159 data_serialization ();
5160 insn_group_break (0, 0, 0);
5161 demand_empty_rest_of_line ();
5164 /* select dv checking mode
5169 A stop is inserted when changing modes
5176 if (md
.manual_bundling
)
5177 as_warn (_("Directive invalid within a bundle"));
5179 if (type
== 'E' || type
== 'A')
5180 md
.mode_explicitly_set
= 0;
5182 md
.mode_explicitly_set
= 1;
5189 if (md
.explicit_mode
)
5190 insn_group_break (1, 0, 0);
5191 md
.explicit_mode
= 0;
5195 if (!md
.explicit_mode
)
5196 insn_group_break (1, 0, 0);
5197 md
.explicit_mode
= 1;
5201 if (md
.explicit_mode
!= md
.default_explicit_mode
)
5202 insn_group_break (1, 0, 0);
5203 md
.explicit_mode
= md
.default_explicit_mode
;
5204 md
.mode_explicitly_set
= 0;
5215 for (regno
= 0; regno
< 64; regno
++)
5217 if (mask
& ((valueT
) 1 << regno
))
5219 fprintf (stderr
, "%s p%d", comma
, regno
);
5226 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5227 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5228 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5229 .pred.safe_across_calls p1 [, p2 [,...]]
5238 int p1
= -1, p2
= -1;
5242 if (*input_line_pointer
== '"')
5245 char *form
= demand_copy_C_string (&len
);
5247 if (strcmp (form
, "mutex") == 0)
5249 else if (strcmp (form
, "clear") == 0)
5251 else if (strcmp (form
, "imply") == 0)
5253 obstack_free (¬es
, form
);
5255 else if (*input_line_pointer
== '@')
5257 char *form
= ++input_line_pointer
;
5258 char c
= get_symbol_end();
5260 if (strcmp (form
, "mutex") == 0)
5262 else if (strcmp (form
, "clear") == 0)
5264 else if (strcmp (form
, "imply") == 0)
5266 *input_line_pointer
= c
;
5270 as_bad (_("Missing predicate relation type"));
5271 ignore_rest_of_line ();
5276 as_bad (_("Unrecognized predicate relation type"));
5277 ignore_rest_of_line ();
5280 if (*input_line_pointer
== ',')
5281 ++input_line_pointer
;
5290 expressionS pr
, *pr1
, *pr2
;
5292 expression_and_evaluate (&pr
);
5293 if (pr
.X_op
== O_register
5294 && pr
.X_add_number
>= REG_P
5295 && pr
.X_add_number
<= REG_P
+ 63)
5297 regno
= pr
.X_add_number
- REG_P
;
5305 else if (type
!= 'i'
5306 && pr
.X_op
== O_subtract
5307 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5308 && pr1
->X_op
== O_register
5309 && pr1
->X_add_number
>= REG_P
5310 && pr1
->X_add_number
<= REG_P
+ 63
5311 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5312 && pr2
->X_op
== O_register
5313 && pr2
->X_add_number
>= REG_P
5314 && pr2
->X_add_number
<= REG_P
+ 63)
5319 regno
= pr1
->X_add_number
- REG_P
;
5320 stop
= pr2
->X_add_number
- REG_P
;
5323 as_bad (_("Bad register range"));
5324 ignore_rest_of_line ();
5327 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5328 count
+= stop
- regno
+ 1;
5332 as_bad (_("Predicate register expected"));
5333 ignore_rest_of_line ();
5337 as_warn (_("Duplicate predicate register ignored"));
5339 if (*input_line_pointer
!= ',')
5341 ++input_line_pointer
;
5350 clear_qp_mutex (mask
);
5351 clear_qp_implies (mask
, (valueT
) 0);
5354 if (count
!= 2 || p1
== -1 || p2
== -1)
5355 as_bad (_("Predicate source and target required"));
5356 else if (p1
== 0 || p2
== 0)
5357 as_bad (_("Use of p0 is not valid in this context"));
5359 add_qp_imply (p1
, p2
);
5364 as_bad (_("At least two PR arguments expected"));
5369 as_bad (_("Use of p0 is not valid in this context"));
5372 add_qp_mutex (mask
);
5375 /* note that we don't override any existing relations */
5378 as_bad (_("At least one PR argument expected"));
5383 fprintf (stderr
, "Safe across calls: ");
5384 print_prmask (mask
);
5385 fprintf (stderr
, "\n");
5387 qp_safe_across_calls
= mask
;
5390 demand_empty_rest_of_line ();
5393 /* .entry label [, label [, ...]]
5394 Hint to DV code that the given labels are to be considered entry points.
5395 Otherwise, only global labels are considered entry points. */
5399 int dummy ATTRIBUTE_UNUSED
;
5408 name
= input_line_pointer
;
5409 c
= get_symbol_end ();
5410 symbolP
= symbol_find_or_make (name
);
5412 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
5414 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5417 *input_line_pointer
= c
;
5419 c
= *input_line_pointer
;
5422 input_line_pointer
++;
5424 if (*input_line_pointer
== '\n')
5430 demand_empty_rest_of_line ();
5433 /* .mem.offset offset, base
5434 "base" is used to distinguish between offsets from a different base. */
5437 dot_mem_offset (dummy
)
5438 int dummy ATTRIBUTE_UNUSED
;
5440 md
.mem_offset
.hint
= 1;
5441 md
.mem_offset
.offset
= get_absolute_expression ();
5442 if (*input_line_pointer
!= ',')
5444 as_bad (_("Comma expected"));
5445 ignore_rest_of_line ();
5448 ++input_line_pointer
;
5449 md
.mem_offset
.base
= get_absolute_expression ();
5450 demand_empty_rest_of_line ();
5453 /* ia64-specific pseudo-ops: */
5454 const pseudo_typeS md_pseudo_table
[] =
5456 { "radix", dot_radix
, 0 },
5457 { "lcomm", s_lcomm_bytes
, 1 },
5458 { "loc", dot_loc
, 0 },
5459 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5460 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5461 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5462 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5463 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5464 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5465 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5466 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5467 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5468 { "proc", dot_proc
, 0 },
5469 { "body", dot_body
, 0 },
5470 { "prologue", dot_prologue
, 0 },
5471 { "endp", dot_endp
, 0 },
5473 { "fframe", dot_fframe
, 0 },
5474 { "vframe", dot_vframe
, 0 },
5475 { "vframesp", dot_vframesp
, 0 },
5476 { "vframepsp", dot_vframesp
, 1 },
5477 { "save", dot_save
, 0 },
5478 { "restore", dot_restore
, 0 },
5479 { "restorereg", dot_restorereg
, 0 },
5480 { "restorereg.p", dot_restorereg
, 1 },
5481 { "handlerdata", dot_handlerdata
, 0 },
5482 { "unwentry", dot_unwentry
, 0 },
5483 { "altrp", dot_altrp
, 0 },
5484 { "savesp", dot_savemem
, 0 },
5485 { "savepsp", dot_savemem
, 1 },
5486 { "save.g", dot_saveg
, 0 },
5487 { "save.f", dot_savef
, 0 },
5488 { "save.b", dot_saveb
, 0 },
5489 { "save.gf", dot_savegf
, 0 },
5490 { "spill", dot_spill
, 0 },
5491 { "spillreg", dot_spillreg
, 0 },
5492 { "spillsp", dot_spillmem
, 0 },
5493 { "spillpsp", dot_spillmem
, 1 },
5494 { "spillreg.p", dot_spillreg
, 1 },
5495 { "spillsp.p", dot_spillmem
, ~0 },
5496 { "spillpsp.p", dot_spillmem
, ~1 },
5497 { "label_state", dot_label_state
, 0 },
5498 { "copy_state", dot_copy_state
, 0 },
5499 { "unwabi", dot_unwabi
, 0 },
5500 { "personality", dot_personality
, 0 },
5501 { "mii", dot_template
, 0x0 },
5502 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5503 { "mlx", dot_template
, 0x2 },
5504 { "mmi", dot_template
, 0x4 },
5505 { "mfi", dot_template
, 0x6 },
5506 { "mmf", dot_template
, 0x7 },
5507 { "mib", dot_template
, 0x8 },
5508 { "mbb", dot_template
, 0x9 },
5509 { "bbb", dot_template
, 0xb },
5510 { "mmb", dot_template
, 0xc },
5511 { "mfb", dot_template
, 0xe },
5512 { "align", dot_align
, 0 },
5513 { "regstk", dot_regstk
, 0 },
5514 { "rotr", dot_rot
, DYNREG_GR
},
5515 { "rotf", dot_rot
, DYNREG_FR
},
5516 { "rotp", dot_rot
, DYNREG_PR
},
5517 { "lsb", dot_byteorder
, 0 },
5518 { "msb", dot_byteorder
, 1 },
5519 { "psr", dot_psr
, 0 },
5520 { "alias", dot_alias
, 0 },
5521 { "secalias", dot_alias
, 1 },
5522 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5524 { "xdata1", dot_xdata
, 1 },
5525 { "xdata2", dot_xdata
, 2 },
5526 { "xdata4", dot_xdata
, 4 },
5527 { "xdata8", dot_xdata
, 8 },
5528 { "xdata16", dot_xdata
, 16 },
5529 { "xreal4", dot_xfloat_cons
, 'f' },
5530 { "xreal8", dot_xfloat_cons
, 'd' },
5531 { "xreal10", dot_xfloat_cons
, 'x' },
5532 { "xreal16", dot_xfloat_cons
, 'X' },
5533 { "xstring", dot_xstringer
, 0 },
5534 { "xstringz", dot_xstringer
, 1 },
5536 /* unaligned versions: */
5537 { "xdata2.ua", dot_xdata_ua
, 2 },
5538 { "xdata4.ua", dot_xdata_ua
, 4 },
5539 { "xdata8.ua", dot_xdata_ua
, 8 },
5540 { "xdata16.ua", dot_xdata_ua
, 16 },
5541 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5542 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5543 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5544 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5546 /* annotations/DV checking support */
5547 { "entry", dot_entry
, 0 },
5548 { "mem.offset", dot_mem_offset
, 0 },
5549 { "pred.rel", dot_pred_rel
, 0 },
5550 { "pred.rel.clear", dot_pred_rel
, 'c' },
5551 { "pred.rel.imply", dot_pred_rel
, 'i' },
5552 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5553 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5554 { "reg.val", dot_reg_val
, 0 },
5555 { "serialize.data", dot_serialize
, 0 },
5556 { "serialize.instruction", dot_serialize
, 1 },
5557 { "auto", dot_dv_mode
, 'a' },
5558 { "explicit", dot_dv_mode
, 'e' },
5559 { "default", dot_dv_mode
, 'd' },
5561 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5562 IA-64 aligns data allocation pseudo-ops by default, so we have to
5563 tell it that these ones are supposed to be unaligned. Long term,
5564 should rewrite so that only IA-64 specific data allocation pseudo-ops
5565 are aligned by default. */
5566 {"2byte", stmt_cons_ua
, 2},
5567 {"4byte", stmt_cons_ua
, 4},
5568 {"8byte", stmt_cons_ua
, 8},
5573 static const struct pseudo_opcode
5576 void (*handler
) (int);
5581 /* these are more like pseudo-ops, but don't start with a dot */
5582 { "data1", cons
, 1 },
5583 { "data2", cons
, 2 },
5584 { "data4", cons
, 4 },
5585 { "data8", cons
, 8 },
5586 { "data16", cons
, 16 },
5587 { "real4", stmt_float_cons
, 'f' },
5588 { "real8", stmt_float_cons
, 'd' },
5589 { "real10", stmt_float_cons
, 'x' },
5590 { "real16", stmt_float_cons
, 'X' },
5591 { "string", stringer
, 0 },
5592 { "stringz", stringer
, 1 },
5594 /* unaligned versions: */
5595 { "data2.ua", stmt_cons_ua
, 2 },
5596 { "data4.ua", stmt_cons_ua
, 4 },
5597 { "data8.ua", stmt_cons_ua
, 8 },
5598 { "data16.ua", stmt_cons_ua
, 16 },
5599 { "real4.ua", float_cons
, 'f' },
5600 { "real8.ua", float_cons
, 'd' },
5601 { "real10.ua", float_cons
, 'x' },
5602 { "real16.ua", float_cons
, 'X' },
5605 /* Declare a register by creating a symbol for it and entering it in
5606 the symbol table. */
5609 declare_register (name
, regnum
)
5611 unsigned int regnum
;
5616 sym
= symbol_create (name
, reg_section
, regnum
, &zero_address_frag
);
5618 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5620 as_fatal ("Inserting \"%s\" into register table failed: %s",
5627 declare_register_set (prefix
, num_regs
, base_regnum
)
5629 unsigned int num_regs
;
5630 unsigned int base_regnum
;
5635 for (i
= 0; i
< num_regs
; ++i
)
5637 sprintf (name
, "%s%u", prefix
, i
);
5638 declare_register (name
, base_regnum
+ i
);
5643 operand_width (opnd
)
5644 enum ia64_opnd opnd
;
5646 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5647 unsigned int bits
= 0;
5651 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5652 bits
+= odesc
->field
[i
].bits
;
5657 static enum operand_match_result
5658 operand_match (idesc
, index
, e
)
5659 const struct ia64_opcode
*idesc
;
5663 enum ia64_opnd opnd
= idesc
->operands
[index
];
5664 int bits
, relocatable
= 0;
5665 struct insn_fix
*fix
;
5672 case IA64_OPND_AR_CCV
:
5673 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5674 return OPERAND_MATCH
;
5677 case IA64_OPND_AR_CSD
:
5678 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5679 return OPERAND_MATCH
;
5682 case IA64_OPND_AR_PFS
:
5683 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5684 return OPERAND_MATCH
;
5688 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5689 return OPERAND_MATCH
;
5693 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5694 return OPERAND_MATCH
;
5698 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5699 return OPERAND_MATCH
;
5702 case IA64_OPND_PR_ROT
:
5703 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5704 return OPERAND_MATCH
;
5708 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5709 return OPERAND_MATCH
;
5712 case IA64_OPND_PSR_L
:
5713 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5714 return OPERAND_MATCH
;
5717 case IA64_OPND_PSR_UM
:
5718 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5719 return OPERAND_MATCH
;
5723 if (e
->X_op
== O_constant
)
5725 if (e
->X_add_number
== 1)
5726 return OPERAND_MATCH
;
5728 return OPERAND_OUT_OF_RANGE
;
5733 if (e
->X_op
== O_constant
)
5735 if (e
->X_add_number
== 8)
5736 return OPERAND_MATCH
;
5738 return OPERAND_OUT_OF_RANGE
;
5743 if (e
->X_op
== O_constant
)
5745 if (e
->X_add_number
== 16)
5746 return OPERAND_MATCH
;
5748 return OPERAND_OUT_OF_RANGE
;
5752 /* register operands: */
5755 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5756 && e
->X_add_number
< REG_AR
+ 128)
5757 return OPERAND_MATCH
;
5762 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5763 && e
->X_add_number
< REG_BR
+ 8)
5764 return OPERAND_MATCH
;
5768 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5769 && e
->X_add_number
< REG_CR
+ 128)
5770 return OPERAND_MATCH
;
5777 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5778 && e
->X_add_number
< REG_FR
+ 128)
5779 return OPERAND_MATCH
;
5784 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5785 && e
->X_add_number
< REG_P
+ 64)
5786 return OPERAND_MATCH
;
5792 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5793 && e
->X_add_number
< REG_GR
+ 128)
5794 return OPERAND_MATCH
;
5797 case IA64_OPND_R3_2
:
5798 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5800 if (e
->X_add_number
< REG_GR
+ 4)
5801 return OPERAND_MATCH
;
5802 else if (e
->X_add_number
< REG_GR
+ 128)
5803 return OPERAND_OUT_OF_RANGE
;
5807 /* indirect operands: */
5808 case IA64_OPND_CPUID_R3
:
5809 case IA64_OPND_DBR_R3
:
5810 case IA64_OPND_DTR_R3
:
5811 case IA64_OPND_ITR_R3
:
5812 case IA64_OPND_IBR_R3
:
5813 case IA64_OPND_MSR_R3
:
5814 case IA64_OPND_PKR_R3
:
5815 case IA64_OPND_PMC_R3
:
5816 case IA64_OPND_PMD_R3
:
5817 case IA64_OPND_RR_R3
:
5818 if (e
->X_op
== O_index
&& e
->X_op_symbol
5819 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5820 == opnd
- IA64_OPND_CPUID_R3
))
5821 return OPERAND_MATCH
;
5825 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5826 return OPERAND_MATCH
;
5829 /* immediate operands: */
5830 case IA64_OPND_CNT2a
:
5831 case IA64_OPND_LEN4
:
5832 case IA64_OPND_LEN6
:
5833 bits
= operand_width (idesc
->operands
[index
]);
5834 if (e
->X_op
== O_constant
)
5836 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5837 return OPERAND_MATCH
;
5839 return OPERAND_OUT_OF_RANGE
;
5843 case IA64_OPND_CNT2b
:
5844 if (e
->X_op
== O_constant
)
5846 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5847 return OPERAND_MATCH
;
5849 return OPERAND_OUT_OF_RANGE
;
5853 case IA64_OPND_CNT2c
:
5854 val
= e
->X_add_number
;
5855 if (e
->X_op
== O_constant
)
5857 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5858 return OPERAND_MATCH
;
5860 return OPERAND_OUT_OF_RANGE
;
5865 /* SOR must be an integer multiple of 8 */
5866 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5867 return OPERAND_OUT_OF_RANGE
;
5870 if (e
->X_op
== O_constant
)
5872 if ((bfd_vma
) e
->X_add_number
<= 96)
5873 return OPERAND_MATCH
;
5875 return OPERAND_OUT_OF_RANGE
;
5879 case IA64_OPND_IMMU62
:
5880 if (e
->X_op
== O_constant
)
5882 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5883 return OPERAND_MATCH
;
5885 return OPERAND_OUT_OF_RANGE
;
5889 /* FIXME -- need 62-bit relocation type */
5890 as_bad (_("62-bit relocation not yet implemented"));
5894 case IA64_OPND_IMMU64
:
5895 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5896 || e
->X_op
== O_subtract
)
5898 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5899 fix
->code
= BFD_RELOC_IA64_IMM64
;
5900 if (e
->X_op
!= O_subtract
)
5902 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5903 if (e
->X_op
== O_pseudo_fixup
)
5907 fix
->opnd
= idesc
->operands
[index
];
5910 ++CURR_SLOT
.num_fixups
;
5911 return OPERAND_MATCH
;
5913 else if (e
->X_op
== O_constant
)
5914 return OPERAND_MATCH
;
5917 case IA64_OPND_IMMU5b
:
5918 if (e
->X_op
== O_constant
)
5920 val
= e
->X_add_number
;
5921 if (val
>= 32 && val
<= 63)
5922 return OPERAND_MATCH
;
5924 return OPERAND_OUT_OF_RANGE
;
5928 case IA64_OPND_CCNT5
:
5929 case IA64_OPND_CNT5
:
5930 case IA64_OPND_CNT6
:
5931 case IA64_OPND_CPOS6a
:
5932 case IA64_OPND_CPOS6b
:
5933 case IA64_OPND_CPOS6c
:
5934 case IA64_OPND_IMMU2
:
5935 case IA64_OPND_IMMU7a
:
5936 case IA64_OPND_IMMU7b
:
5937 case IA64_OPND_IMMU21
:
5938 case IA64_OPND_IMMU24
:
5939 case IA64_OPND_MBTYPE4
:
5940 case IA64_OPND_MHTYPE8
:
5941 case IA64_OPND_POS6
:
5942 bits
= operand_width (idesc
->operands
[index
]);
5943 if (e
->X_op
== O_constant
)
5945 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5946 return OPERAND_MATCH
;
5948 return OPERAND_OUT_OF_RANGE
;
5952 case IA64_OPND_IMMU9
:
5953 bits
= operand_width (idesc
->operands
[index
]);
5954 if (e
->X_op
== O_constant
)
5956 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5958 int lobits
= e
->X_add_number
& 0x3;
5959 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5960 e
->X_add_number
|= (bfd_vma
) 0x3;
5961 return OPERAND_MATCH
;
5964 return OPERAND_OUT_OF_RANGE
;
5968 case IA64_OPND_IMM44
:
5969 /* least 16 bits must be zero */
5970 if ((e
->X_add_number
& 0xffff) != 0)
5971 /* XXX technically, this is wrong: we should not be issuing warning
5972 messages until we're sure this instruction pattern is going to
5974 as_warn (_("lower 16 bits of mask ignored"));
5976 if (e
->X_op
== O_constant
)
5978 if (((e
->X_add_number
>= 0
5979 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5980 || (e
->X_add_number
< 0
5981 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5984 if (e
->X_add_number
>= 0
5985 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5987 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5989 return OPERAND_MATCH
;
5992 return OPERAND_OUT_OF_RANGE
;
5996 case IA64_OPND_IMM17
:
5997 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5998 if (e
->X_op
== O_constant
)
6000 if (((e
->X_add_number
>= 0
6001 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
6002 || (e
->X_add_number
< 0
6003 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
6006 if (e
->X_add_number
>= 0
6007 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
6009 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
6011 return OPERAND_MATCH
;
6014 return OPERAND_OUT_OF_RANGE
;
6018 case IA64_OPND_IMM14
:
6019 case IA64_OPND_IMM22
:
6021 case IA64_OPND_IMM1
:
6022 case IA64_OPND_IMM8
:
6023 case IA64_OPND_IMM8U4
:
6024 case IA64_OPND_IMM8M1
:
6025 case IA64_OPND_IMM8M1U4
:
6026 case IA64_OPND_IMM8M1U8
:
6027 case IA64_OPND_IMM9a
:
6028 case IA64_OPND_IMM9b
:
6029 bits
= operand_width (idesc
->operands
[index
]);
6030 if (relocatable
&& (e
->X_op
== O_symbol
6031 || e
->X_op
== O_subtract
6032 || e
->X_op
== O_pseudo_fixup
))
6034 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6036 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
6037 fix
->code
= BFD_RELOC_IA64_IMM14
;
6039 fix
->code
= BFD_RELOC_IA64_IMM22
;
6041 if (e
->X_op
!= O_subtract
)
6043 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
6044 if (e
->X_op
== O_pseudo_fixup
)
6048 fix
->opnd
= idesc
->operands
[index
];
6051 ++CURR_SLOT
.num_fixups
;
6052 return OPERAND_MATCH
;
6054 else if (e
->X_op
!= O_constant
6055 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
6056 return OPERAND_MISMATCH
;
6058 if (opnd
== IA64_OPND_IMM8M1U4
)
6060 /* Zero is not valid for unsigned compares that take an adjusted
6061 constant immediate range. */
6062 if (e
->X_add_number
== 0)
6063 return OPERAND_OUT_OF_RANGE
;
6065 /* Sign-extend 32-bit unsigned numbers, so that the following range
6066 checks will work. */
6067 val
= e
->X_add_number
;
6068 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
6069 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
6070 val
= ((val
<< 32) >> 32);
6072 /* Check for 0x100000000. This is valid because
6073 0x100000000-1 is the same as ((uint32_t) -1). */
6074 if (val
== ((bfd_signed_vma
) 1 << 32))
6075 return OPERAND_MATCH
;
6079 else if (opnd
== IA64_OPND_IMM8M1U8
)
6081 /* Zero is not valid for unsigned compares that take an adjusted
6082 constant immediate range. */
6083 if (e
->X_add_number
== 0)
6084 return OPERAND_OUT_OF_RANGE
;
6086 /* Check for 0x10000000000000000. */
6087 if (e
->X_op
== O_big
)
6089 if (generic_bignum
[0] == 0
6090 && generic_bignum
[1] == 0
6091 && generic_bignum
[2] == 0
6092 && generic_bignum
[3] == 0
6093 && generic_bignum
[4] == 1)
6094 return OPERAND_MATCH
;
6096 return OPERAND_OUT_OF_RANGE
;
6099 val
= e
->X_add_number
- 1;
6101 else if (opnd
== IA64_OPND_IMM8M1
)
6102 val
= e
->X_add_number
- 1;
6103 else if (opnd
== IA64_OPND_IMM8U4
)
6105 /* Sign-extend 32-bit unsigned numbers, so that the following range
6106 checks will work. */
6107 val
= e
->X_add_number
;
6108 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
6109 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
6110 val
= ((val
<< 32) >> 32);
6113 val
= e
->X_add_number
;
6115 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
6116 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
6117 return OPERAND_MATCH
;
6119 return OPERAND_OUT_OF_RANGE
;
6121 case IA64_OPND_INC3
:
6122 /* +/- 1, 4, 8, 16 */
6123 val
= e
->X_add_number
;
6126 if (e
->X_op
== O_constant
)
6128 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
6129 return OPERAND_MATCH
;
6131 return OPERAND_OUT_OF_RANGE
;
6135 case IA64_OPND_TGT25
:
6136 case IA64_OPND_TGT25b
:
6137 case IA64_OPND_TGT25c
:
6138 case IA64_OPND_TGT64
:
6139 if (e
->X_op
== O_symbol
)
6141 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6142 if (opnd
== IA64_OPND_TGT25
)
6143 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
6144 else if (opnd
== IA64_OPND_TGT25b
)
6145 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
6146 else if (opnd
== IA64_OPND_TGT25c
)
6147 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
6148 else if (opnd
== IA64_OPND_TGT64
)
6149 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
6153 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
6154 fix
->opnd
= idesc
->operands
[index
];
6157 ++CURR_SLOT
.num_fixups
;
6158 return OPERAND_MATCH
;
6160 case IA64_OPND_TAG13
:
6161 case IA64_OPND_TAG13b
:
6165 return OPERAND_MATCH
;
6168 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6169 /* There are no external relocs for TAG13/TAG13b fields, so we
6170 create a dummy reloc. This will not live past md_apply_fix. */
6171 fix
->code
= BFD_RELOC_UNUSED
;
6172 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
6173 fix
->opnd
= idesc
->operands
[index
];
6176 ++CURR_SLOT
.num_fixups
;
6177 return OPERAND_MATCH
;
6184 case IA64_OPND_LDXMOV
:
6185 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6186 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
6187 fix
->opnd
= idesc
->operands
[index
];
6190 ++CURR_SLOT
.num_fixups
;
6191 return OPERAND_MATCH
;
6196 return OPERAND_MISMATCH
;
6200 parse_operand (e
, more
)
6206 memset (e
, 0, sizeof (*e
));
6209 expression_and_evaluate (e
);
6210 sep
= *input_line_pointer
;
6211 if (more
&& (sep
== ',' || sep
== more
))
6212 ++input_line_pointer
;
6216 /* Returns the next entry in the opcode table that matches the one in
6217 IDESC, and frees the entry in IDESC. If no matching entry is
6218 found, NULL is returned instead. */
6220 static struct ia64_opcode
*
6221 get_next_opcode (struct ia64_opcode
*idesc
)
6223 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6224 ia64_free_opcode (idesc
);
6228 /* Parse the operands for the opcode and find the opcode variant that
6229 matches the specified operands, or NULL if no match is possible. */
6231 static struct ia64_opcode
*
6232 parse_operands (idesc
)
6233 struct ia64_opcode
*idesc
;
6235 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6236 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6239 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6240 enum operand_match_result result
;
6242 char *first_arg
= 0, *end
, *saved_input_pointer
;
6245 assert (strlen (idesc
->name
) <= 128);
6247 strcpy (mnemonic
, idesc
->name
);
6248 if (idesc
->operands
[2] == IA64_OPND_SOF
6249 || idesc
->operands
[1] == IA64_OPND_SOF
)
6251 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6252 can't parse the first operand until we have parsed the
6253 remaining operands of the "alloc" instruction. */
6255 first_arg
= input_line_pointer
;
6256 end
= strchr (input_line_pointer
, '=');
6259 as_bad ("Expected separator `='");
6262 input_line_pointer
= end
+ 1;
6269 if (i
< NELEMS (CURR_SLOT
.opnd
))
6271 sep
= parse_operand (CURR_SLOT
.opnd
+ i
, '=');
6272 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6279 sep
= parse_operand (&dummy
, '=');
6280 if (dummy
.X_op
== O_absent
)
6286 if (sep
!= '=' && sep
!= ',')
6291 if (num_outputs
> 0)
6292 as_bad ("Duplicate equal sign (=) in instruction");
6294 num_outputs
= i
+ 1;
6299 as_bad ("Illegal operand separator `%c'", sep
);
6303 if (idesc
->operands
[2] == IA64_OPND_SOF
6304 || idesc
->operands
[1] == IA64_OPND_SOF
)
6306 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6307 Note, however, that due to that mapping operand numbers in error
6308 messages for any of the constant operands will not be correct. */
6309 know (strcmp (idesc
->name
, "alloc") == 0);
6310 /* The first operand hasn't been parsed/initialized, yet (but
6311 num_operands intentionally doesn't account for that). */
6312 i
= num_operands
> 4 ? 2 : 1;
6313 #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6314 ? CURR_SLOT.opnd[n].X_add_number \
6316 sof
= set_regstack (FORCE_CONST(i
),
6319 FORCE_CONST(i
+ 3));
6322 /* now we can parse the first arg: */
6323 saved_input_pointer
= input_line_pointer
;
6324 input_line_pointer
= first_arg
;
6325 sep
= parse_operand (CURR_SLOT
.opnd
+ 0, '=');
6327 --num_outputs
; /* force error */
6328 input_line_pointer
= saved_input_pointer
;
6330 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6331 if (CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6332 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
)
6333 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6334 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6336 CURR_SLOT
.opnd
[i
+ 1].X_op
= O_illegal
;
6337 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6340 highest_unmatched_operand
= -4;
6341 curr_out_of_range_pos
= -1;
6343 for (; idesc
; idesc
= get_next_opcode (idesc
))
6345 if (num_outputs
!= idesc
->num_outputs
)
6346 continue; /* mismatch in # of outputs */
6347 if (highest_unmatched_operand
< 0)
6348 highest_unmatched_operand
|= 1;
6349 if (num_operands
> NELEMS (idesc
->operands
)
6350 || (num_operands
< NELEMS (idesc
->operands
)
6351 && idesc
->operands
[num_operands
])
6352 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6353 continue; /* mismatch in number of arguments */
6354 if (highest_unmatched_operand
< 0)
6355 highest_unmatched_operand
|= 2;
6357 CURR_SLOT
.num_fixups
= 0;
6359 /* Try to match all operands. If we see an out-of-range operand,
6360 then continue trying to match the rest of the operands, since if
6361 the rest match, then this idesc will give the best error message. */
6363 out_of_range_pos
= -1;
6364 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6366 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6367 if (result
!= OPERAND_MATCH
)
6369 if (result
!= OPERAND_OUT_OF_RANGE
)
6371 if (out_of_range_pos
< 0)
6372 /* remember position of the first out-of-range operand: */
6373 out_of_range_pos
= i
;
6377 /* If we did not match all operands, or if at least one operand was
6378 out-of-range, then this idesc does not match. Keep track of which
6379 idesc matched the most operands before failing. If we have two
6380 idescs that failed at the same position, and one had an out-of-range
6381 operand, then prefer the out-of-range operand. Thus if we have
6382 "add r0=0x1000000,r1" we get an error saying the constant is out
6383 of range instead of an error saying that the constant should have been
6386 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6388 if (i
> highest_unmatched_operand
6389 || (i
== highest_unmatched_operand
6390 && out_of_range_pos
> curr_out_of_range_pos
))
6392 highest_unmatched_operand
= i
;
6393 if (out_of_range_pos
>= 0)
6395 expected_operand
= idesc
->operands
[out_of_range_pos
];
6396 error_pos
= out_of_range_pos
;
6400 expected_operand
= idesc
->operands
[i
];
6403 curr_out_of_range_pos
= out_of_range_pos
;
6412 if (expected_operand
)
6413 as_bad ("Operand %u of `%s' should be %s",
6414 error_pos
+ 1, mnemonic
,
6415 elf64_ia64_operands
[expected_operand
].desc
);
6416 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6417 as_bad ("Wrong number of output operands");
6418 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6419 as_bad ("Wrong number of input operands");
6421 as_bad ("Operand mismatch");
6425 /* Check that the instruction doesn't use
6426 - r0, f0, or f1 as output operands
6427 - the same predicate twice as output operands
6428 - r0 as address of a base update load or store
6429 - the same GR as output and address of a base update load
6430 - two even- or two odd-numbered FRs as output operands of a floating
6431 point parallel load.
6432 At most two (conflicting) output (or output-like) operands can exist,
6433 (floating point parallel loads have three outputs, but the base register,
6434 if updated, cannot conflict with the actual outputs). */
6436 for (i
= 0; i
< num_operands
; ++i
)
6441 switch (idesc
->operands
[i
])
6446 if (i
< num_outputs
)
6448 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6451 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6453 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6458 if (i
< num_outputs
)
6461 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6463 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6470 if (i
< num_outputs
)
6472 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6473 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6476 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6479 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6481 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6485 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6487 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6490 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6492 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6503 as_warn ("Invalid use of `%c%d' as output operand", reg_class
, regno
);
6506 as_warn ("Invalid use of `r%d' as base update address operand", regno
);
6512 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6517 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6522 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6530 as_warn ("Invalid duplicate use of `%c%d'", reg_class
, reg1
);
6532 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6533 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6534 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6535 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6536 && ! ((reg1
^ reg2
) & 1))
6537 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6538 reg1
- REG_FR
, reg2
- REG_FR
);
6539 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6540 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6541 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6542 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6543 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6544 reg1
- REG_FR
, reg2
- REG_FR
);
6549 build_insn (slot
, insnp
)
6553 const struct ia64_operand
*odesc
, *o2desc
;
6554 struct ia64_opcode
*idesc
= slot
->idesc
;
6560 insn
= idesc
->opcode
| slot
->qp_regno
;
6562 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6564 if (slot
->opnd
[i
].X_op
== O_register
6565 || slot
->opnd
[i
].X_op
== O_constant
6566 || slot
->opnd
[i
].X_op
== O_index
)
6567 val
= slot
->opnd
[i
].X_add_number
;
6568 else if (slot
->opnd
[i
].X_op
== O_big
)
6570 /* This must be the value 0x10000000000000000. */
6571 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6577 switch (idesc
->operands
[i
])
6579 case IA64_OPND_IMMU64
:
6580 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6581 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6582 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6583 | (((val
>> 63) & 0x1) << 36));
6586 case IA64_OPND_IMMU62
:
6587 val
&= 0x3fffffffffffffffULL
;
6588 if (val
!= slot
->opnd
[i
].X_add_number
)
6589 as_warn (_("Value truncated to 62 bits"));
6590 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6591 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6594 case IA64_OPND_TGT64
:
6596 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6597 insn
|= ((((val
>> 59) & 0x1) << 36)
6598 | (((val
>> 0) & 0xfffff) << 13));
6629 case IA64_OPND_R3_2
:
6630 case IA64_OPND_CPUID_R3
:
6631 case IA64_OPND_DBR_R3
:
6632 case IA64_OPND_DTR_R3
:
6633 case IA64_OPND_ITR_R3
:
6634 case IA64_OPND_IBR_R3
:
6636 case IA64_OPND_MSR_R3
:
6637 case IA64_OPND_PKR_R3
:
6638 case IA64_OPND_PMC_R3
:
6639 case IA64_OPND_PMD_R3
:
6640 case IA64_OPND_RR_R3
:
6648 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6649 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6651 as_bad_where (slot
->src_file
, slot
->src_line
,
6652 "Bad operand value: %s", err
);
6653 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6655 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6656 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6658 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6659 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6661 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6662 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6663 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6665 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6666 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6676 int manual_bundling_off
= 0, manual_bundling
= 0;
6677 enum ia64_unit required_unit
, insn_unit
= 0;
6678 enum ia64_insn_type type
[3], insn_type
;
6679 unsigned int template, orig_template
;
6680 bfd_vma insn
[3] = { -1, -1, -1 };
6681 struct ia64_opcode
*idesc
;
6682 int end_of_insn_group
= 0, user_template
= -1;
6683 int n
, i
, j
, first
, curr
, last_slot
;
6684 bfd_vma t0
= 0, t1
= 0;
6685 struct label_fix
*lfix
;
6686 bfd_boolean mark_label
;
6687 struct insn_fix
*ifix
;
6693 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6694 know (first
>= 0 & first
< NUM_SLOTS
);
6695 n
= MIN (3, md
.num_slots_in_use
);
6697 /* Determine template: user user_template if specified, best match
6700 if (md
.slot
[first
].user_template
>= 0)
6701 user_template
= template = md
.slot
[first
].user_template
;
6704 /* Auto select appropriate template. */
6705 memset (type
, 0, sizeof (type
));
6707 for (i
= 0; i
< n
; ++i
)
6709 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6711 type
[i
] = md
.slot
[curr
].idesc
->type
;
6712 curr
= (curr
+ 1) % NUM_SLOTS
;
6714 template = best_template
[type
[0]][type
[1]][type
[2]];
6717 /* initialize instructions with appropriate nops: */
6718 for (i
= 0; i
< 3; ++i
)
6719 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6723 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6724 from the start of the frag. */
6725 addr_mod
= frag_now_fix () & 15;
6726 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6727 as_bad (_("instruction address is not a multiple of 16"));
6728 frag_now
->insn_addr
= addr_mod
;
6729 frag_now
->has_code
= 1;
6731 /* now fill in slots with as many insns as possible: */
6733 idesc
= md
.slot
[curr
].idesc
;
6734 end_of_insn_group
= 0;
6736 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6738 /* If we have unwind records, we may need to update some now. */
6739 unw_rec_list
*ptr
= md
.slot
[curr
].unwind_record
;
6740 unw_rec_list
*end_ptr
= NULL
;
6744 /* Find the last prologue/body record in the list for the current
6745 insn, and set the slot number for all records up to that point.
6746 This needs to be done now, because prologue/body records refer to
6747 the current point, not the point after the instruction has been
6748 issued. This matters because there may have been nops emitted
6749 meanwhile. Any non-prologue non-body record followed by a
6750 prologue/body record must also refer to the current point. */
6751 unw_rec_list
*last_ptr
;
6753 for (j
= 1; end_ptr
== NULL
&& j
< md
.num_slots_in_use
; ++j
)
6754 end_ptr
= md
.slot
[(curr
+ j
) % NUM_SLOTS
].unwind_record
;
6755 for (last_ptr
= NULL
; ptr
!= end_ptr
; ptr
= ptr
->next
)
6756 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6757 || ptr
->r
.type
== body
)
6761 /* Make last_ptr point one after the last prologue/body
6763 last_ptr
= last_ptr
->next
;
6764 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6767 ptr
->slot_number
= (unsigned long) f
+ i
;
6768 ptr
->slot_frag
= frag_now
;
6770 /* Remove the initialized records, so that we won't accidentally
6771 update them again if we insert a nop and continue. */
6772 md
.slot
[curr
].unwind_record
= last_ptr
;
6776 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6777 if (md
.slot
[curr
].manual_bundling_on
)
6780 manual_bundling
= 1;
6782 break; /* Need to start a new bundle. */
6785 /* If this instruction specifies a template, then it must be the first
6786 instruction of a bundle. */
6787 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6790 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6792 if (manual_bundling
&& !manual_bundling_off
)
6794 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6795 "`%s' must be last in bundle", idesc
->name
);
6797 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6801 if (idesc
->flags
& IA64_OPCODE_LAST
)
6804 unsigned int required_template
;
6806 /* If we need a stop bit after an M slot, our only choice is
6807 template 5 (M;;MI). If we need a stop bit after a B
6808 slot, our only choice is to place it at the end of the
6809 bundle, because the only available templates are MIB,
6810 MBB, BBB, MMB, and MFB. We don't handle anything other
6811 than M and B slots because these are the only kind of
6812 instructions that can have the IA64_OPCODE_LAST bit set. */
6813 required_template
= template;
6814 switch (idesc
->type
)
6818 required_template
= 5;
6826 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6827 "Internal error: don't know how to force %s to end"
6828 "of instruction group", idesc
->name
);
6833 && (i
> required_slot
6834 || (required_slot
== 2 && !manual_bundling_off
)
6835 || (user_template
>= 0
6836 /* Changing from MMI to M;MI is OK. */
6837 && (template ^ required_template
) > 1)))
6839 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6840 "`%s' must be last in instruction group",
6842 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6843 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6845 if (required_slot
< i
)
6846 /* Can't fit this instruction. */
6850 if (required_template
!= template)
6852 /* If we switch the template, we need to reset the NOPs
6853 after slot i. The slot-types of the instructions ahead
6854 of i never change, so we don't need to worry about
6855 changing NOPs in front of this slot. */
6856 for (j
= i
; j
< 3; ++j
)
6857 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6859 template = required_template
;
6861 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6863 if (manual_bundling
)
6865 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6866 "Label must be first in a bundle");
6867 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6869 /* This insn must go into the first slot of a bundle. */
6873 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6875 /* We need an instruction group boundary in the middle of a
6876 bundle. See if we can switch to an other template with
6877 an appropriate boundary. */
6879 orig_template
= template;
6880 if (i
== 1 && (user_template
== 4
6881 || (user_template
< 0
6882 && (ia64_templ_desc
[template].exec_unit
[0]
6886 end_of_insn_group
= 0;
6888 else if (i
== 2 && (user_template
== 0
6889 || (user_template
< 0
6890 && (ia64_templ_desc
[template].exec_unit
[1]
6892 /* This test makes sure we don't switch the template if
6893 the next instruction is one that needs to be first in
6894 an instruction group. Since all those instructions are
6895 in the M group, there is no way such an instruction can
6896 fit in this bundle even if we switch the template. The
6897 reason we have to check for this is that otherwise we
6898 may end up generating "MI;;I M.." which has the deadly
6899 effect that the second M instruction is no longer the
6900 first in the group! --davidm 99/12/16 */
6901 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6904 end_of_insn_group
= 0;
6907 && user_template
== 0
6908 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6909 /* Use the next slot. */
6911 else if (curr
!= first
)
6912 /* can't fit this insn */
6915 if (template != orig_template
)
6916 /* if we switch the template, we need to reset the NOPs
6917 after slot i. The slot-types of the instructions ahead
6918 of i never change, so we don't need to worry about
6919 changing NOPs in front of this slot. */
6920 for (j
= i
; j
< 3; ++j
)
6921 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6923 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6925 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6926 if (idesc
->type
== IA64_TYPE_DYN
)
6928 enum ia64_opnd opnd1
, opnd2
;
6930 if ((strcmp (idesc
->name
, "nop") == 0)
6931 || (strcmp (idesc
->name
, "break") == 0))
6932 insn_unit
= required_unit
;
6933 else if (strcmp (idesc
->name
, "hint") == 0)
6935 insn_unit
= required_unit
;
6936 if (required_unit
== IA64_UNIT_B
)
6942 case hint_b_warning
:
6943 as_warn ("hint in B unit may be treated as nop");
6946 /* When manual bundling is off and there is no
6947 user template, we choose a different unit so
6948 that hint won't go into the current slot. We
6949 will fill the current bundle with nops and
6950 try to put hint into the next bundle. */
6951 if (!manual_bundling
&& user_template
< 0)
6952 insn_unit
= IA64_UNIT_I
;
6954 as_bad ("hint in B unit can't be used");
6959 else if (strcmp (idesc
->name
, "chk.s") == 0
6960 || strcmp (idesc
->name
, "mov") == 0)
6962 insn_unit
= IA64_UNIT_M
;
6963 if (required_unit
== IA64_UNIT_I
6964 || (required_unit
== IA64_UNIT_F
&& template == 6))
6965 insn_unit
= IA64_UNIT_I
;
6968 as_fatal ("emit_one_bundle: unexpected dynamic op");
6970 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbfxx"[insn_unit
]);
6971 opnd1
= idesc
->operands
[0];
6972 opnd2
= idesc
->operands
[1];
6973 ia64_free_opcode (idesc
);
6974 idesc
= ia64_find_opcode (mnemonic
);
6975 /* moves to/from ARs have collisions */
6976 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6978 while (idesc
!= NULL
6979 && (idesc
->operands
[0] != opnd1
6980 || idesc
->operands
[1] != opnd2
))
6981 idesc
= get_next_opcode (idesc
);
6983 md
.slot
[curr
].idesc
= idesc
;
6987 insn_type
= idesc
->type
;
6988 insn_unit
= IA64_UNIT_NIL
;
6992 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6993 insn_unit
= required_unit
;
6995 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6996 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6997 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6998 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6999 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
7004 if (insn_unit
!= required_unit
)
7005 continue; /* Try next slot. */
7007 /* Now is a good time to fix up the labels for this insn. */
7009 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
7011 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
7012 symbol_set_frag (lfix
->sym
, frag_now
);
7013 mark_label
|= lfix
->dw2_mark_labels
;
7015 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
7017 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
7018 symbol_set_frag (lfix
->sym
, frag_now
);
7021 if (debug_type
== DEBUG_DWARF2
7022 || md
.slot
[curr
].loc_directive_seen
7025 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
7027 md
.slot
[curr
].loc_directive_seen
= 0;
7029 md
.slot
[curr
].debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
7031 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
7034 build_insn (md
.slot
+ curr
, insn
+ i
);
7036 ptr
= md
.slot
[curr
].unwind_record
;
7039 /* Set slot numbers for all remaining unwind records belonging to the
7040 current insn. There can not be any prologue/body unwind records
7042 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
7044 ptr
->slot_number
= (unsigned long) f
+ i
;
7045 ptr
->slot_frag
= frag_now
;
7047 md
.slot
[curr
].unwind_record
= NULL
;
7050 if (required_unit
== IA64_UNIT_L
)
7053 /* skip one slot for long/X-unit instructions */
7056 --md
.num_slots_in_use
;
7059 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
7061 ifix
= md
.slot
[curr
].fixup
+ j
;
7062 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
7063 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
7064 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
7065 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
7066 fix
->fx_file
= md
.slot
[curr
].src_file
;
7067 fix
->fx_line
= md
.slot
[curr
].src_line
;
7070 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
7073 ia64_free_opcode (md
.slot
[curr
].idesc
);
7074 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
7075 md
.slot
[curr
].user_template
= -1;
7077 if (manual_bundling_off
)
7079 manual_bundling
= 0;
7082 curr
= (curr
+ 1) % NUM_SLOTS
;
7083 idesc
= md
.slot
[curr
].idesc
;
7086 /* A user template was specified, but the first following instruction did
7087 not fit. This can happen with or without manual bundling. */
7088 if (md
.num_slots_in_use
> 0 && last_slot
< 0)
7090 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7091 "`%s' does not fit into %s template",
7092 idesc
->name
, ia64_templ_desc
[template].name
);
7093 /* Drop first insn so we don't livelock. */
7094 --md
.num_slots_in_use
;
7095 know (curr
== first
);
7096 ia64_free_opcode (md
.slot
[curr
].idesc
);
7097 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
7098 md
.slot
[curr
].user_template
= -1;
7100 else if (manual_bundling
> 0)
7102 if (md
.num_slots_in_use
> 0)
7105 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7106 "`%s' does not fit into bundle", idesc
->name
);
7113 else if (last_slot
== 0)
7114 where
= "slots 2 or 3";
7117 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7118 "`%s' can't go in %s of %s template",
7119 idesc
->name
, where
, ia64_templ_desc
[template].name
);
7123 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7124 "Missing '}' at end of file");
7127 know (md
.num_slots_in_use
< NUM_SLOTS
);
7129 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
7130 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
7132 number_to_chars_littleendian (f
+ 0, t0
, 8);
7133 number_to_chars_littleendian (f
+ 8, t1
, 8);
7137 md_parse_option (c
, arg
)
7144 /* Switches from the Intel assembler. */
7146 if (strcmp (arg
, "ilp64") == 0
7147 || strcmp (arg
, "lp64") == 0
7148 || strcmp (arg
, "p64") == 0)
7150 md
.flags
|= EF_IA_64_ABI64
;
7152 else if (strcmp (arg
, "ilp32") == 0)
7154 md
.flags
&= ~EF_IA_64_ABI64
;
7156 else if (strcmp (arg
, "le") == 0)
7158 md
.flags
&= ~EF_IA_64_BE
;
7159 default_big_endian
= 0;
7161 else if (strcmp (arg
, "be") == 0)
7163 md
.flags
|= EF_IA_64_BE
;
7164 default_big_endian
= 1;
7166 else if (strncmp (arg
, "unwind-check=", 13) == 0)
7169 if (strcmp (arg
, "warning") == 0)
7170 md
.unwind_check
= unwind_check_warning
;
7171 else if (strcmp (arg
, "error") == 0)
7172 md
.unwind_check
= unwind_check_error
;
7176 else if (strncmp (arg
, "hint.b=", 7) == 0)
7179 if (strcmp (arg
, "ok") == 0)
7180 md
.hint_b
= hint_b_ok
;
7181 else if (strcmp (arg
, "warning") == 0)
7182 md
.hint_b
= hint_b_warning
;
7183 else if (strcmp (arg
, "error") == 0)
7184 md
.hint_b
= hint_b_error
;
7188 else if (strncmp (arg
, "tune=", 5) == 0)
7191 if (strcmp (arg
, "itanium1") == 0)
7193 else if (strcmp (arg
, "itanium2") == 0)
7203 if (strcmp (arg
, "so") == 0)
7205 /* Suppress signon message. */
7207 else if (strcmp (arg
, "pi") == 0)
7209 /* Reject privileged instructions. FIXME */
7211 else if (strcmp (arg
, "us") == 0)
7213 /* Allow union of signed and unsigned range. FIXME */
7215 else if (strcmp (arg
, "close_fcalls") == 0)
7217 /* Do not resolve global function calls. */
7224 /* temp[="prefix"] Insert temporary labels into the object file
7225 symbol table prefixed by "prefix".
7226 Default prefix is ":temp:".
7231 /* indirect=<tgt> Assume unannotated indirect branches behavior
7232 according to <tgt> --
7233 exit: branch out from the current context (default)
7234 labels: all labels in context may be branch targets
7236 if (strncmp (arg
, "indirect=", 9) != 0)
7241 /* -X conflicts with an ignored option, use -x instead */
7243 if (!arg
|| strcmp (arg
, "explicit") == 0)
7245 /* set default mode to explicit */
7246 md
.default_explicit_mode
= 1;
7249 else if (strcmp (arg
, "auto") == 0)
7251 md
.default_explicit_mode
= 0;
7253 else if (strcmp (arg
, "none") == 0)
7257 else if (strcmp (arg
, "debug") == 0)
7261 else if (strcmp (arg
, "debugx") == 0)
7263 md
.default_explicit_mode
= 1;
7266 else if (strcmp (arg
, "debugn") == 0)
7273 as_bad (_("Unrecognized option '-x%s'"), arg
);
7278 /* nops Print nops statistics. */
7281 /* GNU specific switches for gcc. */
7282 case OPTION_MCONSTANT_GP
:
7283 md
.flags
|= EF_IA_64_CONS_GP
;
7286 case OPTION_MAUTO_PIC
:
7287 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7298 md_show_usage (stream
)
7303 --mconstant-gp mark output file as using the constant-GP model\n\
7304 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7305 --mauto-pic mark output file as using the constant-GP model\n\
7306 without function descriptors (sets ELF header flag\n\
7307 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7308 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7309 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7310 -mtune=[itanium1|itanium2]\n\
7311 tune for a specific CPU (default -mtune=itanium2)\n\
7312 -munwind-check=[warning|error]\n\
7313 unwind directive check (default -munwind-check=warning)\n\
7314 -mhint.b=[ok|warning|error]\n\
7315 hint.b check (default -mhint.b=error)\n\
7316 -x | -xexplicit turn on dependency violation checking\n\
7317 -xauto automagically remove dependency violations (default)\n\
7318 -xnone turn off dependency violation checking\n\
7319 -xdebug debug dependency violation checker\n\
7320 -xdebugn debug dependency violation checker but turn off\n\
7321 dependency violation checking\n\
7322 -xdebugx debug dependency violation checker and turn on\n\
7323 dependency violation checking\n"),
7328 ia64_after_parse_args ()
7330 if (debug_type
== DEBUG_STABS
)
7331 as_fatal (_("--gstabs is not supported for ia64"));
7334 /* Return true if TYPE fits in TEMPL at SLOT. */
7337 match (int templ
, int type
, int slot
)
7339 enum ia64_unit unit
;
7342 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7345 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7347 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7349 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7350 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7351 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7352 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7353 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7354 default: result
= 0; break;
7359 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7360 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7361 type M or I would fit in TEMPL at SLOT. */
7364 extra_goodness (int templ
, int slot
)
7369 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7371 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7377 if (match (templ
, IA64_TYPE_M
, slot
)
7378 || match (templ
, IA64_TYPE_I
, slot
))
7379 /* Favor M- and I-unit NOPs. We definitely want to avoid
7380 F-unit and B-unit may cause split-issue or less-than-optimal
7381 branch-prediction. */
7392 /* This function is called once, at assembler startup time. It sets
7393 up all the tables, etc. that the MD part of the assembler will need
7394 that can be determined before arguments are parsed. */
7398 int i
, j
, k
, t
, goodness
, best
, ok
;
7403 md
.explicit_mode
= md
.default_explicit_mode
;
7405 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7407 /* Make sure function pointers get initialized. */
7408 target_big_endian
= -1;
7409 dot_byteorder (default_big_endian
);
7411 alias_hash
= hash_new ();
7412 alias_name_hash
= hash_new ();
7413 secalias_hash
= hash_new ();
7414 secalias_name_hash
= hash_new ();
7416 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7417 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7418 &zero_address_frag
);
7420 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7421 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7422 &zero_address_frag
);
7424 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7425 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7426 &zero_address_frag
);
7428 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7429 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7430 &zero_address_frag
);
7432 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7433 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7434 &zero_address_frag
);
7436 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7437 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7438 &zero_address_frag
);
7440 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7441 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7442 &zero_address_frag
);
7444 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7445 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7446 &zero_address_frag
);
7448 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7449 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7450 &zero_address_frag
);
7452 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7453 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7454 &zero_address_frag
);
7456 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7457 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7458 &zero_address_frag
);
7460 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7461 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7462 &zero_address_frag
);
7464 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7465 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7466 &zero_address_frag
);
7468 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7469 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7470 &zero_address_frag
);
7472 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7473 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7474 &zero_address_frag
);
7476 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7477 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7478 &zero_address_frag
);
7480 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7481 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7482 &zero_address_frag
);
7484 if (md
.tune
!= itanium1
)
7486 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7488 le_nop_stop
[0] = 0x9;
7491 /* Compute the table of best templates. We compute goodness as a
7492 base 4 value, in which each match counts for 3. Match-failures
7493 result in NOPs and we use extra_goodness() to pick the execution
7494 units that are best suited for issuing the NOP. */
7495 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7496 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7497 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7500 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7503 if (match (t
, i
, 0))
7505 if (match (t
, j
, 1))
7507 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7508 goodness
= 3 + 3 + 3;
7510 goodness
= 3 + 3 + extra_goodness (t
, 2);
7512 else if (match (t
, j
, 2))
7513 goodness
= 3 + 3 + extra_goodness (t
, 1);
7517 goodness
+= extra_goodness (t
, 1);
7518 goodness
+= extra_goodness (t
, 2);
7521 else if (match (t
, i
, 1))
7523 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7526 goodness
= 3 + extra_goodness (t
, 2);
7528 else if (match (t
, i
, 2))
7529 goodness
= 3 + extra_goodness (t
, 1);
7531 if (goodness
> best
)
7534 best_template
[i
][j
][k
] = t
;
7539 #ifdef DEBUG_TEMPLATES
7540 /* For debugging changes to the best_template calculations. We don't care
7541 about combinations with invalid instructions, so start the loops at 1. */
7542 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7543 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7544 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7546 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7548 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7550 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7554 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7555 md
.slot
[i
].user_template
= -1;
7557 md
.pseudo_hash
= hash_new ();
7558 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7560 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7561 (void *) (pseudo_opcode
+ i
));
7563 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7564 pseudo_opcode
[i
].name
, err
);
7567 md
.reg_hash
= hash_new ();
7568 md
.dynreg_hash
= hash_new ();
7569 md
.const_hash
= hash_new ();
7570 md
.entry_hash
= hash_new ();
7572 /* general registers: */
7573 declare_register_set ("r", 128, REG_GR
);
7574 declare_register ("gp", REG_GR
+ 1);
7575 declare_register ("sp", REG_GR
+ 12);
7576 declare_register ("tp", REG_GR
+ 13);
7577 declare_register_set ("ret", 4, REG_GR
+ 8);
7579 /* floating point registers: */
7580 declare_register_set ("f", 128, REG_FR
);
7581 declare_register_set ("farg", 8, REG_FR
+ 8);
7582 declare_register_set ("fret", 8, REG_FR
+ 8);
7584 /* branch registers: */
7585 declare_register_set ("b", 8, REG_BR
);
7586 declare_register ("rp", REG_BR
+ 0);
7588 /* predicate registers: */
7589 declare_register_set ("p", 64, REG_P
);
7590 declare_register ("pr", REG_PR
);
7591 declare_register ("pr.rot", REG_PR_ROT
);
7593 /* application registers: */
7594 declare_register_set ("ar", 128, REG_AR
);
7595 for (i
= 0; i
< NELEMS (ar
); ++i
)
7596 declare_register (ar
[i
].name
, REG_AR
+ ar
[i
].regnum
);
7598 /* control registers: */
7599 declare_register_set ("cr", 128, REG_CR
);
7600 for (i
= 0; i
< NELEMS (cr
); ++i
)
7601 declare_register (cr
[i
].name
, REG_CR
+ cr
[i
].regnum
);
7603 declare_register ("ip", REG_IP
);
7604 declare_register ("cfm", REG_CFM
);
7605 declare_register ("psr", REG_PSR
);
7606 declare_register ("psr.l", REG_PSR_L
);
7607 declare_register ("psr.um", REG_PSR_UM
);
7609 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7611 unsigned int regnum
= indirect_reg
[i
].regnum
;
7613 md
.indregsym
[regnum
- IND_CPUID
] = declare_register (indirect_reg
[i
].name
, regnum
);
7616 /* pseudo-registers used to specify unwind info: */
7617 declare_register ("psp", REG_PSP
);
7619 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7621 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7622 (PTR
) (const_bits
+ i
));
7624 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7628 /* Set the architecture and machine depending on defaults and command line
7630 if (md
.flags
& EF_IA_64_ABI64
)
7631 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7633 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7636 as_warn (_("Could not set architecture and machine"));
7638 /* Set the pointer size and pointer shift size depending on md.flags */
7640 if (md
.flags
& EF_IA_64_ABI64
)
7642 md
.pointer_size
= 8; /* pointers are 8 bytes */
7643 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7647 md
.pointer_size
= 4; /* pointers are 4 bytes */
7648 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7651 md
.mem_offset
.hint
= 0;
7654 md
.entry_labels
= NULL
;
7657 /* Set the default options in md. Cannot do this in md_begin because
7658 that is called after md_parse_option which is where we set the
7659 options in md based on command line options. */
7662 ia64_init (argc
, argv
)
7663 int argc ATTRIBUTE_UNUSED
;
7664 char **argv ATTRIBUTE_UNUSED
;
7666 md
.flags
= MD_FLAGS_DEFAULT
;
7668 /* FIXME: We should change it to unwind_check_error someday. */
7669 md
.unwind_check
= unwind_check_warning
;
7670 md
.hint_b
= hint_b_error
;
7674 /* Return a string for the target object file format. */
7677 ia64_target_format ()
7679 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7681 if (md
.flags
& EF_IA_64_BE
)
7683 if (md
.flags
& EF_IA_64_ABI64
)
7684 #if defined(TE_AIX50)
7685 return "elf64-ia64-aix-big";
7686 #elif defined(TE_HPUX)
7687 return "elf64-ia64-hpux-big";
7689 return "elf64-ia64-big";
7692 #if defined(TE_AIX50)
7693 return "elf32-ia64-aix-big";
7694 #elif defined(TE_HPUX)
7695 return "elf32-ia64-hpux-big";
7697 return "elf32-ia64-big";
7702 if (md
.flags
& EF_IA_64_ABI64
)
7704 return "elf64-ia64-aix-little";
7706 return "elf64-ia64-little";
7710 return "elf32-ia64-aix-little";
7712 return "elf32-ia64-little";
7717 return "unknown-format";
7721 ia64_end_of_source ()
7723 /* terminate insn group upon reaching end of file: */
7724 insn_group_break (1, 0, 0);
7726 /* emits slots we haven't written yet: */
7727 ia64_flush_insns ();
7729 bfd_set_private_flags (stdoutput
, md
.flags
);
7731 md
.mem_offset
.hint
= 0;
7740 /* Make sure we don't reference input_line_pointer[-1] when that's
7746 if (md
.qp
.X_op
== O_register
)
7747 as_bad ("qualifying predicate not followed by instruction");
7748 md
.qp
.X_op
= O_absent
;
7750 if (ignore_input ())
7753 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7755 if (md
.detect_dv
&& !md
.explicit_mode
)
7762 as_warn (_("Explicit stops are ignored in auto mode"));
7766 insn_group_break (1, 0, 0);
7768 else if (input_line_pointer
[-1] == '{')
7770 if (md
.manual_bundling
)
7771 as_warn ("Found '{' when manual bundling is already turned on");
7773 CURR_SLOT
.manual_bundling_on
= 1;
7774 md
.manual_bundling
= 1;
7776 /* Bundling is only acceptable in explicit mode
7777 or when in default automatic mode. */
7778 if (md
.detect_dv
&& !md
.explicit_mode
)
7780 if (!md
.mode_explicitly_set
7781 && !md
.default_explicit_mode
)
7784 as_warn (_("Found '{' after explicit switch to automatic mode"));
7787 else if (input_line_pointer
[-1] == '}')
7789 if (!md
.manual_bundling
)
7790 as_warn ("Found '}' when manual bundling is off");
7792 PREV_SLOT
.manual_bundling_off
= 1;
7793 md
.manual_bundling
= 0;
7795 /* switch back to automatic mode, if applicable */
7798 && !md
.mode_explicitly_set
7799 && !md
.default_explicit_mode
)
7804 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7806 static int defining_tag
= 0;
7809 ia64_unrecognized_line (ch
)
7815 expression_and_evaluate (&md
.qp
);
7816 if (*input_line_pointer
++ != ')')
7818 as_bad ("Expected ')'");
7821 if (md
.qp
.X_op
!= O_register
)
7823 as_bad ("Qualifying predicate expected");
7826 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7828 as_bad ("Predicate register expected");
7840 if (md
.qp
.X_op
== O_register
)
7842 as_bad ("Tag must come before qualifying predicate.");
7846 /* This implements just enough of read_a_source_file in read.c to
7847 recognize labels. */
7848 if (is_name_beginner (*input_line_pointer
))
7850 s
= input_line_pointer
;
7851 c
= get_symbol_end ();
7853 else if (LOCAL_LABELS_FB
7854 && ISDIGIT (*input_line_pointer
))
7857 while (ISDIGIT (*input_line_pointer
))
7858 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7859 fb_label_instance_inc (temp
);
7860 s
= fb_label_name (temp
, 0);
7861 c
= *input_line_pointer
;
7870 /* Put ':' back for error messages' sake. */
7871 *input_line_pointer
++ = ':';
7872 as_bad ("Expected ':'");
7879 /* Put ':' back for error messages' sake. */
7880 *input_line_pointer
++ = ':';
7881 if (*input_line_pointer
++ != ']')
7883 as_bad ("Expected ']'");
7888 as_bad ("Tag name expected");
7898 /* Not a valid line. */
7903 ia64_frob_label (sym
)
7906 struct label_fix
*fix
;
7908 /* Tags need special handling since they are not bundle breaks like
7912 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7914 fix
->next
= CURR_SLOT
.tag_fixups
;
7915 fix
->dw2_mark_labels
= FALSE
;
7916 CURR_SLOT
.tag_fixups
= fix
;
7921 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7923 md
.last_text_seg
= now_seg
;
7924 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7926 fix
->next
= CURR_SLOT
.label_fixups
;
7927 fix
->dw2_mark_labels
= dwarf2_loc_mark_labels
;
7928 CURR_SLOT
.label_fixups
= fix
;
7930 /* Keep track of how many code entry points we've seen. */
7931 if (md
.path
== md
.maxpaths
)
7934 md
.entry_labels
= (const char **)
7935 xrealloc ((void *) md
.entry_labels
,
7936 md
.maxpaths
* sizeof (char *));
7938 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7943 /* The HP-UX linker will give unresolved symbol errors for symbols
7944 that are declared but unused. This routine removes declared,
7945 unused symbols from an object. */
7947 ia64_frob_symbol (sym
)
7950 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7951 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7952 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7953 && ! S_IS_EXTERNAL (sym
)))
7960 ia64_flush_pending_output ()
7962 if (!md
.keep_pending_output
7963 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7965 /* ??? This causes many unnecessary stop bits to be emitted.
7966 Unfortunately, it isn't clear if it is safe to remove this. */
7967 insn_group_break (1, 0, 0);
7968 ia64_flush_insns ();
7972 /* Do ia64-specific expression optimization. All that's done here is
7973 to transform index expressions that are either due to the indexing
7974 of rotating registers or due to the indexing of indirect register
7977 ia64_optimize_expr (l
, op
, r
)
7984 resolve_expression (l
);
7985 if (l
->X_op
== O_register
)
7987 unsigned num_regs
= l
->X_add_number
>> 16;
7989 resolve_expression (r
);
7992 /* Left side is a .rotX-allocated register. */
7993 if (r
->X_op
!= O_constant
)
7995 as_bad ("Rotating register index must be a non-negative constant");
7996 r
->X_add_number
= 0;
7998 else if ((valueT
) r
->X_add_number
>= num_regs
)
8000 as_bad ("Index out of range 0..%u", num_regs
- 1);
8001 r
->X_add_number
= 0;
8003 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
8006 else if (l
->X_add_number
>= IND_CPUID
&& l
->X_add_number
<= IND_RR
)
8008 if (r
->X_op
!= O_register
8009 || r
->X_add_number
< REG_GR
8010 || r
->X_add_number
> REG_GR
+ 127)
8012 as_bad ("Indirect register index must be a general register");
8013 r
->X_add_number
= REG_GR
;
8016 l
->X_op_symbol
= md
.indregsym
[l
->X_add_number
- IND_CPUID
];
8017 l
->X_add_number
= r
->X_add_number
;
8021 as_bad ("Index can only be applied to rotating or indirect registers");
8022 /* Fall back to some register use of which has as little as possible
8023 side effects, to minimize subsequent error messages. */
8024 l
->X_op
= O_register
;
8025 l
->X_add_number
= REG_GR
+ 3;
8030 ia64_parse_name (name
, e
, nextcharP
)
8035 struct const_desc
*cdesc
;
8036 struct dynreg
*dr
= 0;
8043 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
8045 /* Find what relocation pseudo-function we're dealing with. */
8046 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
8047 if (pseudo_func
[idx
].name
8048 && pseudo_func
[idx
].name
[0] == name
[1]
8049 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
8051 pseudo_type
= pseudo_func
[idx
].type
;
8054 switch (pseudo_type
)
8056 case PSEUDO_FUNC_RELOC
:
8057 end
= input_line_pointer
;
8058 if (*nextcharP
!= '(')
8060 as_bad ("Expected '('");
8064 ++input_line_pointer
;
8066 if (*input_line_pointer
!= ')')
8068 as_bad ("Missing ')'");
8072 ++input_line_pointer
;
8073 if (e
->X_op
!= O_symbol
)
8075 if (e
->X_op
!= O_pseudo_fixup
)
8077 as_bad ("Not a symbolic expression");
8080 if (idx
!= FUNC_LT_RELATIVE
)
8082 as_bad ("Illegal combination of relocation functions");
8085 switch (S_GET_VALUE (e
->X_op_symbol
))
8087 case FUNC_FPTR_RELATIVE
:
8088 idx
= FUNC_LT_FPTR_RELATIVE
; break;
8089 case FUNC_DTP_MODULE
:
8090 idx
= FUNC_LT_DTP_MODULE
; break;
8091 case FUNC_DTP_RELATIVE
:
8092 idx
= FUNC_LT_DTP_RELATIVE
; break;
8093 case FUNC_TP_RELATIVE
:
8094 idx
= FUNC_LT_TP_RELATIVE
; break;
8096 as_bad ("Illegal combination of relocation functions");
8100 /* Make sure gas doesn't get rid of local symbols that are used
8102 e
->X_op
= O_pseudo_fixup
;
8103 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
8105 *nextcharP
= *input_line_pointer
;
8108 case PSEUDO_FUNC_CONST
:
8109 e
->X_op
= O_constant
;
8110 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
8113 case PSEUDO_FUNC_REG
:
8114 e
->X_op
= O_register
;
8115 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
8124 /* first see if NAME is a known register name: */
8125 sym
= hash_find (md
.reg_hash
, name
);
8128 e
->X_op
= O_register
;
8129 e
->X_add_number
= S_GET_VALUE (sym
);
8133 cdesc
= hash_find (md
.const_hash
, name
);
8136 e
->X_op
= O_constant
;
8137 e
->X_add_number
= cdesc
->value
;
8141 /* check for inN, locN, or outN: */
8146 if (name
[1] == 'n' && ISDIGIT (name
[2]))
8154 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
8162 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
8173 /* Ignore register numbers with leading zeroes, except zero itself. */
8174 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
8176 unsigned long regnum
;
8178 /* The name is inN, locN, or outN; parse the register number. */
8179 regnum
= strtoul (name
+ idx
, &end
, 10);
8180 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
8182 if (regnum
>= dr
->num_regs
)
8185 as_bad ("No current frame");
8187 as_bad ("Register number out of range 0..%u",
8191 e
->X_op
= O_register
;
8192 e
->X_add_number
= dr
->base
+ regnum
;
8197 end
= alloca (strlen (name
) + 1);
8199 name
= ia64_canonicalize_symbol_name (end
);
8200 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8202 /* We've got ourselves the name of a rotating register set.
8203 Store the base register number in the low 16 bits of
8204 X_add_number and the size of the register set in the top 16
8206 e
->X_op
= O_register
;
8207 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8213 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8216 ia64_canonicalize_symbol_name (name
)
8219 size_t len
= strlen (name
), full
= len
;
8221 while (len
> 0 && name
[len
- 1] == '#')
8226 as_bad ("Standalone `#' is illegal");
8228 else if (len
< full
- 1)
8229 as_warn ("Redundant `#' suffix operators");
8234 /* Return true if idesc is a conditional branch instruction. This excludes
8235 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8236 because they always read/write resources regardless of the value of the
8237 qualifying predicate. br.ia must always use p0, and hence is always
8238 taken. Thus this function returns true for branches which can fall
8239 through, and which use no resources if they do fall through. */
8242 is_conditional_branch (idesc
)
8243 struct ia64_opcode
*idesc
;
8245 /* br is a conditional branch. Everything that starts with br. except
8246 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8247 Everything that starts with brl is a conditional branch. */
8248 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8249 && (idesc
->name
[2] == '\0'
8250 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8251 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8252 || idesc
->name
[2] == 'l'
8253 /* br.cond, br.call, br.clr */
8254 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8255 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8256 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8259 /* Return whether the given opcode is a taken branch. If there's any doubt,
8263 is_taken_branch (idesc
)
8264 struct ia64_opcode
*idesc
;
8266 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8267 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8270 /* Return whether the given opcode is an interruption or rfi. If there's any
8271 doubt, returns zero. */
8274 is_interruption_or_rfi (idesc
)
8275 struct ia64_opcode
*idesc
;
8277 if (strcmp (idesc
->name
, "rfi") == 0)
8282 /* Returns the index of the given dependency in the opcode's list of chks, or
8283 -1 if there is no dependency. */
8286 depends_on (depind
, idesc
)
8288 struct ia64_opcode
*idesc
;
8291 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8292 for (i
= 0; i
< dep
->nchks
; i
++)
8294 if (depind
== DEP (dep
->chks
[i
]))
8300 /* Determine a set of specific resources used for a particular resource
8301 class. Returns the number of specific resources identified For those
8302 cases which are not determinable statically, the resource returned is
8305 Meanings of value in 'NOTE':
8306 1) only read/write when the register number is explicitly encoded in the
8308 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8309 accesses CFM when qualifying predicate is in the rotating region.
8310 3) general register value is used to specify an indirect register; not
8311 determinable statically.
8312 4) only read the given resource when bits 7:0 of the indirect index
8313 register value does not match the register number of the resource; not
8314 determinable statically.
8315 5) all rules are implementation specific.
8316 6) only when both the index specified by the reader and the index specified
8317 by the writer have the same value in bits 63:61; not determinable
8319 7) only access the specified resource when the corresponding mask bit is
8321 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8322 only read when these insns reference FR2-31
8323 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8324 written when these insns write FR32-127
8325 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8327 11) The target predicates are written independently of PR[qp], but source
8328 registers are only read if PR[qp] is true. Since the state of PR[qp]
8329 cannot statically be determined, all source registers are marked used.
8330 12) This insn only reads the specified predicate register when that
8331 register is the PR[qp].
8332 13) This reference to ld-c only applies to teh GR whose value is loaded
8333 with data returned from memory, not the post-incremented address register.
8334 14) The RSE resource includes the implementation-specific RSE internal
8335 state resources. At least one (and possibly more) of these resources are
8336 read by each instruction listed in IC:rse-readers. At least one (and
8337 possibly more) of these resources are written by each insn listed in
8339 15+16) Represents reserved instructions, which the assembler does not
8341 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and
8342 mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up.
8344 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8345 this code; there are no dependency violations based on memory access.
8348 #define MAX_SPECS 256
8353 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
8354 const struct ia64_dependency
*dep
;
8355 struct ia64_opcode
*idesc
;
8356 int type
; /* is this a DV chk or a DV reg? */
8357 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
8358 int note
; /* resource note for this insn's usage */
8359 int path
; /* which execution path to examine */
8366 if (dep
->mode
== IA64_DV_WAW
8367 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8368 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8371 /* template for any resources we identify */
8372 tmpl
.dependency
= dep
;
8374 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8375 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8376 tmpl
.link_to_qp_branch
= 1;
8377 tmpl
.mem_offset
.hint
= 0;
8378 tmpl
.mem_offset
.offset
= 0;
8379 tmpl
.mem_offset
.base
= 0;
8382 tmpl
.cmp_type
= CMP_NONE
;
8389 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8390 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8391 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8393 /* we don't need to track these */
8394 if (dep
->semantics
== IA64_DVS_NONE
)
8397 switch (dep
->specifier
)
8402 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8404 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8405 if (regno
>= 0 && regno
<= 7)
8407 specs
[count
] = tmpl
;
8408 specs
[count
++].index
= regno
;
8414 for (i
= 0; i
< 8; i
++)
8416 specs
[count
] = tmpl
;
8417 specs
[count
++].index
= i
;
8426 case IA64_RS_AR_UNAT
:
8427 /* This is a mov =AR or mov AR= instruction. */
8428 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8430 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8431 if (regno
== AR_UNAT
)
8433 specs
[count
++] = tmpl
;
8438 /* This is a spill/fill, or other instruction that modifies the
8441 /* Unless we can determine the specific bits used, mark the whole
8442 thing; bits 8:3 of the memory address indicate the bit used in
8443 UNAT. The .mem.offset hint may be used to eliminate a small
8444 subset of conflicts. */
8445 specs
[count
] = tmpl
;
8446 if (md
.mem_offset
.hint
)
8449 fprintf (stderr
, " Using hint for spill/fill\n");
8450 /* The index isn't actually used, just set it to something
8451 approximating the bit index. */
8452 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8453 specs
[count
].mem_offset
.hint
= 1;
8454 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8455 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8459 specs
[count
++].specific
= 0;
8467 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8469 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8470 if ((regno
>= 8 && regno
<= 15)
8471 || (regno
>= 20 && regno
<= 23)
8472 || (regno
>= 31 && regno
<= 39)
8473 || (regno
>= 41 && regno
<= 47)
8474 || (regno
>= 67 && regno
<= 111))
8476 specs
[count
] = tmpl
;
8477 specs
[count
++].index
= regno
;
8490 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8492 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8493 if ((regno
>= 48 && regno
<= 63)
8494 || (regno
>= 112 && regno
<= 127))
8496 specs
[count
] = tmpl
;
8497 specs
[count
++].index
= regno
;
8503 for (i
= 48; i
< 64; i
++)
8505 specs
[count
] = tmpl
;
8506 specs
[count
++].index
= i
;
8508 for (i
= 112; i
< 128; i
++)
8510 specs
[count
] = tmpl
;
8511 specs
[count
++].index
= i
;
8529 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8530 if (idesc
->operands
[i
] == IA64_OPND_B1
8531 || idesc
->operands
[i
] == IA64_OPND_B2
)
8533 specs
[count
] = tmpl
;
8534 specs
[count
++].index
=
8535 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8540 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8541 if (idesc
->operands
[i
] == IA64_OPND_B1
8542 || idesc
->operands
[i
] == IA64_OPND_B2
)
8544 specs
[count
] = tmpl
;
8545 specs
[count
++].index
=
8546 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8552 case IA64_RS_CPUID
: /* four or more registers */
8555 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8557 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8558 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8561 specs
[count
] = tmpl
;
8562 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8566 specs
[count
] = tmpl
;
8567 specs
[count
++].specific
= 0;
8577 case IA64_RS_DBR
: /* four or more registers */
8580 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8582 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8583 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8586 specs
[count
] = tmpl
;
8587 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8591 specs
[count
] = tmpl
;
8592 specs
[count
++].specific
= 0;
8596 else if (note
== 0 && !rsrc_write
)
8598 specs
[count
] = tmpl
;
8599 specs
[count
++].specific
= 0;
8607 case IA64_RS_IBR
: /* four or more registers */
8610 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8612 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8613 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8616 specs
[count
] = tmpl
;
8617 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8621 specs
[count
] = tmpl
;
8622 specs
[count
++].specific
= 0;
8635 /* These are implementation specific. Force all references to
8636 conflict with all other references. */
8637 specs
[count
] = tmpl
;
8638 specs
[count
++].specific
= 0;
8646 case IA64_RS_PKR
: /* 16 or more registers */
8647 if (note
== 3 || note
== 4)
8649 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8651 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8652 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8657 specs
[count
] = tmpl
;
8658 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8661 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8663 /* Uses all registers *except* the one in R3. */
8664 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8666 specs
[count
] = tmpl
;
8667 specs
[count
++].index
= i
;
8673 specs
[count
] = tmpl
;
8674 specs
[count
++].specific
= 0;
8681 specs
[count
] = tmpl
;
8682 specs
[count
++].specific
= 0;
8686 case IA64_RS_PMC
: /* four or more registers */
8689 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8690 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8693 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8695 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
8696 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8699 specs
[count
] = tmpl
;
8700 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8704 specs
[count
] = tmpl
;
8705 specs
[count
++].specific
= 0;
8715 case IA64_RS_PMD
: /* four or more registers */
8718 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8720 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8721 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8724 specs
[count
] = tmpl
;
8725 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8729 specs
[count
] = tmpl
;
8730 specs
[count
++].specific
= 0;
8740 case IA64_RS_RR
: /* eight registers */
8743 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8745 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8746 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8749 specs
[count
] = tmpl
;
8750 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8754 specs
[count
] = tmpl
;
8755 specs
[count
++].specific
= 0;
8759 else if (note
== 0 && !rsrc_write
)
8761 specs
[count
] = tmpl
;
8762 specs
[count
++].specific
= 0;
8770 case IA64_RS_CR_IRR
:
8773 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8774 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8776 && idesc
->operands
[1] == IA64_OPND_CR3
8779 for (i
= 0; i
< 4; i
++)
8781 specs
[count
] = tmpl
;
8782 specs
[count
++].index
= CR_IRR0
+ i
;
8788 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8789 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8791 && regno
<= CR_IRR3
)
8793 specs
[count
] = tmpl
;
8794 specs
[count
++].index
= regno
;
8803 case IA64_RS_CR_LRR
:
8810 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8811 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8812 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8814 specs
[count
] = tmpl
;
8815 specs
[count
++].index
= regno
;
8823 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8825 specs
[count
] = tmpl
;
8826 specs
[count
++].index
=
8827 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8842 else if (rsrc_write
)
8844 if (dep
->specifier
== IA64_RS_FRb
8845 && idesc
->operands
[0] == IA64_OPND_F1
)
8847 specs
[count
] = tmpl
;
8848 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8853 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8855 if (idesc
->operands
[i
] == IA64_OPND_F2
8856 || idesc
->operands
[i
] == IA64_OPND_F3
8857 || idesc
->operands
[i
] == IA64_OPND_F4
)
8859 specs
[count
] = tmpl
;
8860 specs
[count
++].index
=
8861 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8870 /* This reference applies only to the GR whose value is loaded with
8871 data returned from memory. */
8872 specs
[count
] = tmpl
;
8873 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8879 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8880 if (idesc
->operands
[i
] == IA64_OPND_R1
8881 || idesc
->operands
[i
] == IA64_OPND_R2
8882 || idesc
->operands
[i
] == IA64_OPND_R3
)
8884 specs
[count
] = tmpl
;
8885 specs
[count
++].index
=
8886 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8888 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8889 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8890 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8892 specs
[count
] = tmpl
;
8893 specs
[count
++].index
=
8894 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8899 /* Look for anything that reads a GR. */
8900 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8902 if (idesc
->operands
[i
] == IA64_OPND_MR3
8903 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8904 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8905 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8906 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8907 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8908 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8909 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8910 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8911 || ((i
>= idesc
->num_outputs
)
8912 && (idesc
->operands
[i
] == IA64_OPND_R1
8913 || idesc
->operands
[i
] == IA64_OPND_R2
8914 || idesc
->operands
[i
] == IA64_OPND_R3
8915 /* addl source register. */
8916 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8918 specs
[count
] = tmpl
;
8919 specs
[count
++].index
=
8920 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8931 /* This is the same as IA64_RS_PRr, except that the register range is
8932 from 1 - 15, and there are no rotating register reads/writes here. */
8936 for (i
= 1; i
< 16; i
++)
8938 specs
[count
] = tmpl
;
8939 specs
[count
++].index
= i
;
8945 /* Mark only those registers indicated by the mask. */
8948 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8949 for (i
= 1; i
< 16; i
++)
8950 if (mask
& ((valueT
) 1 << i
))
8952 specs
[count
] = tmpl
;
8953 specs
[count
++].index
= i
;
8961 else if (note
== 11) /* note 11 implies note 1 as well */
8965 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8967 if (idesc
->operands
[i
] == IA64_OPND_P1
8968 || idesc
->operands
[i
] == IA64_OPND_P2
)
8970 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8971 if (regno
>= 1 && regno
< 16)
8973 specs
[count
] = tmpl
;
8974 specs
[count
++].index
= regno
;
8984 else if (note
== 12)
8986 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8988 specs
[count
] = tmpl
;
8989 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8996 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8997 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8998 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8999 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9001 if ((idesc
->operands
[0] == IA64_OPND_P1
9002 || idesc
->operands
[0] == IA64_OPND_P2
)
9003 && p1
>= 1 && p1
< 16)
9005 specs
[count
] = tmpl
;
9006 specs
[count
].cmp_type
=
9007 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9008 specs
[count
++].index
= p1
;
9010 if ((idesc
->operands
[1] == IA64_OPND_P1
9011 || idesc
->operands
[1] == IA64_OPND_P2
)
9012 && p2
>= 1 && p2
< 16)
9014 specs
[count
] = tmpl
;
9015 specs
[count
].cmp_type
=
9016 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9017 specs
[count
++].index
= p2
;
9022 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
9024 specs
[count
] = tmpl
;
9025 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9027 if (idesc
->operands
[1] == IA64_OPND_PR
)
9029 for (i
= 1; i
< 16; i
++)
9031 specs
[count
] = tmpl
;
9032 specs
[count
++].index
= i
;
9043 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
9044 simplified cases of this. */
9048 for (i
= 16; i
< 63; i
++)
9050 specs
[count
] = tmpl
;
9051 specs
[count
++].index
= i
;
9057 /* Mark only those registers indicated by the mask. */
9059 && idesc
->operands
[0] == IA64_OPND_PR
)
9061 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9062 if (mask
& ((valueT
) 1 << 16))
9063 for (i
= 16; i
< 63; i
++)
9065 specs
[count
] = tmpl
;
9066 specs
[count
++].index
= i
;
9070 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
9072 for (i
= 16; i
< 63; i
++)
9074 specs
[count
] = tmpl
;
9075 specs
[count
++].index
= i
;
9083 else if (note
== 11) /* note 11 implies note 1 as well */
9087 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9089 if (idesc
->operands
[i
] == IA64_OPND_P1
9090 || idesc
->operands
[i
] == IA64_OPND_P2
)
9092 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9093 if (regno
>= 16 && regno
< 63)
9095 specs
[count
] = tmpl
;
9096 specs
[count
++].index
= regno
;
9106 else if (note
== 12)
9108 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9110 specs
[count
] = tmpl
;
9111 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9118 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9119 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9120 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9121 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9123 if ((idesc
->operands
[0] == IA64_OPND_P1
9124 || idesc
->operands
[0] == IA64_OPND_P2
)
9125 && p1
>= 16 && p1
< 63)
9127 specs
[count
] = tmpl
;
9128 specs
[count
].cmp_type
=
9129 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9130 specs
[count
++].index
= p1
;
9132 if ((idesc
->operands
[1] == IA64_OPND_P1
9133 || idesc
->operands
[1] == IA64_OPND_P2
)
9134 && p2
>= 16 && p2
< 63)
9136 specs
[count
] = tmpl
;
9137 specs
[count
].cmp_type
=
9138 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9139 specs
[count
++].index
= p2
;
9144 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9146 specs
[count
] = tmpl
;
9147 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9149 if (idesc
->operands
[1] == IA64_OPND_PR
)
9151 for (i
= 16; i
< 63; i
++)
9153 specs
[count
] = tmpl
;
9154 specs
[count
++].index
= i
;
9166 /* Verify that the instruction is using the PSR bit indicated in
9170 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
9172 if (dep
->regindex
< 6)
9174 specs
[count
++] = tmpl
;
9177 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
9179 if (dep
->regindex
< 32
9180 || dep
->regindex
== 35
9181 || dep
->regindex
== 36
9182 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
9184 specs
[count
++] = tmpl
;
9187 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
9189 if (dep
->regindex
< 32
9190 || dep
->regindex
== 35
9191 || dep
->regindex
== 36
9192 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
9194 specs
[count
++] = tmpl
;
9199 /* Several PSR bits have very specific dependencies. */
9200 switch (dep
->regindex
)
9203 specs
[count
++] = tmpl
;
9208 specs
[count
++] = tmpl
;
9212 /* Only certain CR accesses use PSR.ic */
9213 if (idesc
->operands
[0] == IA64_OPND_CR3
9214 || idesc
->operands
[1] == IA64_OPND_CR3
)
9217 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9220 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
9235 specs
[count
++] = tmpl
;
9244 specs
[count
++] = tmpl
;
9248 /* Only some AR accesses use cpl */
9249 if (idesc
->operands
[0] == IA64_OPND_AR3
9250 || idesc
->operands
[1] == IA64_OPND_AR3
)
9253 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9256 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
9263 && regno
<= AR_K7
))))
9265 specs
[count
++] = tmpl
;
9270 specs
[count
++] = tmpl
;
9280 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9282 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9288 if (mask
& ((valueT
) 1 << dep
->regindex
))
9290 specs
[count
++] = tmpl
;
9295 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9296 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9297 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9298 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9300 if (idesc
->operands
[i
] == IA64_OPND_F1
9301 || idesc
->operands
[i
] == IA64_OPND_F2
9302 || idesc
->operands
[i
] == IA64_OPND_F3
9303 || idesc
->operands
[i
] == IA64_OPND_F4
)
9305 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9306 if (reg
>= min
&& reg
<= max
)
9308 specs
[count
++] = tmpl
;
9315 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9316 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9317 /* mfh is read on writes to FR32-127; mfl is read on writes to
9319 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9321 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9323 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9324 if (reg
>= min
&& reg
<= max
)
9326 specs
[count
++] = tmpl
;
9331 else if (note
== 10)
9333 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9335 if (idesc
->operands
[i
] == IA64_OPND_R1
9336 || idesc
->operands
[i
] == IA64_OPND_R2
9337 || idesc
->operands
[i
] == IA64_OPND_R3
)
9339 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9340 if (regno
>= 16 && regno
<= 31)
9342 specs
[count
++] = tmpl
;
9353 case IA64_RS_AR_FPSR
:
9354 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9356 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9357 if (regno
== AR_FPSR
)
9359 specs
[count
++] = tmpl
;
9364 specs
[count
++] = tmpl
;
9369 /* Handle all AR[REG] resources */
9370 if (note
== 0 || note
== 1)
9372 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9373 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9374 && regno
== dep
->regindex
)
9376 specs
[count
++] = tmpl
;
9378 /* other AR[REG] resources may be affected by AR accesses */
9379 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9382 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9383 switch (dep
->regindex
)
9389 if (regno
== AR_BSPSTORE
)
9391 specs
[count
++] = tmpl
;
9395 (regno
== AR_BSPSTORE
9396 || regno
== AR_RNAT
))
9398 specs
[count
++] = tmpl
;
9403 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9406 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9407 switch (dep
->regindex
)
9412 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9414 specs
[count
++] = tmpl
;
9421 specs
[count
++] = tmpl
;
9431 /* Handle all CR[REG] resources.
9432 ??? FIXME: The rule 17 isn't really handled correctly. */
9433 if (note
== 0 || note
== 1 || note
== 17)
9435 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9437 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9438 if (regno
== dep
->regindex
)
9440 specs
[count
++] = tmpl
;
9442 else if (!rsrc_write
)
9444 /* Reads from CR[IVR] affect other resources. */
9445 if (regno
== CR_IVR
)
9447 if ((dep
->regindex
>= CR_IRR0
9448 && dep
->regindex
<= CR_IRR3
)
9449 || dep
->regindex
== CR_TPR
)
9451 specs
[count
++] = tmpl
;
9458 specs
[count
++] = tmpl
;
9467 case IA64_RS_INSERVICE
:
9468 /* look for write of EOI (67) or read of IVR (65) */
9469 if ((idesc
->operands
[0] == IA64_OPND_CR3
9470 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9471 || (idesc
->operands
[1] == IA64_OPND_CR3
9472 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9474 specs
[count
++] = tmpl
;
9481 specs
[count
++] = tmpl
;
9492 specs
[count
++] = tmpl
;
9496 /* Check if any of the registers accessed are in the rotating region.
9497 mov to/from pr accesses CFM only when qp_regno is in the rotating
9499 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9501 if (idesc
->operands
[i
] == IA64_OPND_R1
9502 || idesc
->operands
[i
] == IA64_OPND_R2
9503 || idesc
->operands
[i
] == IA64_OPND_R3
)
9505 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9506 /* Assumes that md.rot.num_regs is always valid */
9507 if (md
.rot
.num_regs
> 0
9509 && num
< 31 + md
.rot
.num_regs
)
9511 specs
[count
] = tmpl
;
9512 specs
[count
++].specific
= 0;
9515 else if (idesc
->operands
[i
] == IA64_OPND_F1
9516 || idesc
->operands
[i
] == IA64_OPND_F2
9517 || idesc
->operands
[i
] == IA64_OPND_F3
9518 || idesc
->operands
[i
] == IA64_OPND_F4
)
9520 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9523 specs
[count
] = tmpl
;
9524 specs
[count
++].specific
= 0;
9527 else if (idesc
->operands
[i
] == IA64_OPND_P1
9528 || idesc
->operands
[i
] == IA64_OPND_P2
)
9530 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9533 specs
[count
] = tmpl
;
9534 specs
[count
++].specific
= 0;
9538 if (CURR_SLOT
.qp_regno
> 15)
9540 specs
[count
] = tmpl
;
9541 specs
[count
++].specific
= 0;
9546 /* This is the same as IA64_RS_PRr, except simplified to account for
9547 the fact that there is only one register. */
9551 specs
[count
++] = tmpl
;
9556 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9557 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9558 if (mask
& ((valueT
) 1 << 63))
9559 specs
[count
++] = tmpl
;
9561 else if (note
== 11)
9563 if ((idesc
->operands
[0] == IA64_OPND_P1
9564 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9565 || (idesc
->operands
[1] == IA64_OPND_P2
9566 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9568 specs
[count
++] = tmpl
;
9571 else if (note
== 12)
9573 if (CURR_SLOT
.qp_regno
== 63)
9575 specs
[count
++] = tmpl
;
9582 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9583 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9584 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9585 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9588 && (idesc
->operands
[0] == IA64_OPND_P1
9589 || idesc
->operands
[0] == IA64_OPND_P2
))
9591 specs
[count
] = tmpl
;
9592 specs
[count
++].cmp_type
=
9593 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9596 && (idesc
->operands
[1] == IA64_OPND_P1
9597 || idesc
->operands
[1] == IA64_OPND_P2
))
9599 specs
[count
] = tmpl
;
9600 specs
[count
++].cmp_type
=
9601 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9606 if (CURR_SLOT
.qp_regno
== 63)
9608 specs
[count
++] = tmpl
;
9619 /* FIXME we can identify some individual RSE written resources, but RSE
9620 read resources have not yet been completely identified, so for now
9621 treat RSE as a single resource */
9622 if (strncmp (idesc
->name
, "mov", 3) == 0)
9626 if (idesc
->operands
[0] == IA64_OPND_AR3
9627 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9629 specs
[count
++] = tmpl
;
9634 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9636 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9637 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9639 specs
[count
++] = tmpl
;
9642 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9644 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9645 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9646 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9648 specs
[count
++] = tmpl
;
9655 specs
[count
++] = tmpl
;
9660 /* FIXME -- do any of these need to be non-specific? */
9661 specs
[count
++] = tmpl
;
9665 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9672 /* Clear branch flags on marked resources. This breaks the link between the
9673 QP of the marking instruction and a subsequent branch on the same QP. */
9676 clear_qp_branch_flag (mask
)
9680 for (i
= 0; i
< regdepslen
; i
++)
9682 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9683 if ((bit
& mask
) != 0)
9685 regdeps
[i
].link_to_qp_branch
= 0;
9690 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9691 any mutexes which contain one of the PRs and create new ones when
9695 update_qp_mutex (valueT mask
)
9701 while (i
< qp_mutexeslen
)
9703 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9705 /* If it destroys and creates the same mutex, do nothing. */
9706 if (qp_mutexes
[i
].prmask
== mask
9707 && qp_mutexes
[i
].path
== md
.path
)
9718 fprintf (stderr
, " Clearing mutex relation");
9719 print_prmask (qp_mutexes
[i
].prmask
);
9720 fprintf (stderr
, "\n");
9723 /* Deal with the old mutex with more than 3+ PRs only if
9724 the new mutex on the same execution path with it.
9726 FIXME: The 3+ mutex support is incomplete.
9727 dot_pred_rel () may be a better place to fix it. */
9728 if (qp_mutexes
[i
].path
== md
.path
)
9730 /* If it is a proper subset of the mutex, create a
9733 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9736 qp_mutexes
[i
].prmask
&= ~mask
;
9737 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9739 /* Modify the mutex if there are more than one
9747 /* Remove the mutex. */
9748 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9756 add_qp_mutex (mask
);
9761 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9763 Any changes to a PR clears the mutex relations which include that PR. */
9766 clear_qp_mutex (mask
)
9772 while (i
< qp_mutexeslen
)
9774 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9778 fprintf (stderr
, " Clearing mutex relation");
9779 print_prmask (qp_mutexes
[i
].prmask
);
9780 fprintf (stderr
, "\n");
9782 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9789 /* Clear implies relations which contain PRs in the given masks.
9790 P1_MASK indicates the source of the implies relation, while P2_MASK
9791 indicates the implied PR. */
9794 clear_qp_implies (p1_mask
, p2_mask
)
9801 while (i
< qp_implieslen
)
9803 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9804 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9807 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9808 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9809 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9816 /* Add the PRs specified to the list of implied relations. */
9819 add_qp_imply (p1
, p2
)
9826 /* p0 is not meaningful here. */
9827 if (p1
== 0 || p2
== 0)
9833 /* If it exists already, ignore it. */
9834 for (i
= 0; i
< qp_implieslen
; i
++)
9836 if (qp_implies
[i
].p1
== p1
9837 && qp_implies
[i
].p2
== p2
9838 && qp_implies
[i
].path
== md
.path
9839 && !qp_implies
[i
].p2_branched
)
9843 if (qp_implieslen
== qp_impliestotlen
)
9845 qp_impliestotlen
+= 20;
9846 qp_implies
= (struct qp_imply
*)
9847 xrealloc ((void *) qp_implies
,
9848 qp_impliestotlen
* sizeof (struct qp_imply
));
9851 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9852 qp_implies
[qp_implieslen
].p1
= p1
;
9853 qp_implies
[qp_implieslen
].p2
= p2
;
9854 qp_implies
[qp_implieslen
].path
= md
.path
;
9855 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9857 /* Add in the implied transitive relations; for everything that p2 implies,
9858 make p1 imply that, too; for everything that implies p1, make it imply p2
9860 for (i
= 0; i
< qp_implieslen
; i
++)
9862 if (qp_implies
[i
].p1
== p2
)
9863 add_qp_imply (p1
, qp_implies
[i
].p2
);
9864 if (qp_implies
[i
].p2
== p1
)
9865 add_qp_imply (qp_implies
[i
].p1
, p2
);
9867 /* Add in mutex relations implied by this implies relation; for each mutex
9868 relation containing p2, duplicate it and replace p2 with p1. */
9869 bit
= (valueT
) 1 << p1
;
9870 mask
= (valueT
) 1 << p2
;
9871 for (i
= 0; i
< qp_mutexeslen
; i
++)
9873 if (qp_mutexes
[i
].prmask
& mask
)
9874 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9878 /* Add the PRs specified in the mask to the mutex list; this means that only
9879 one of the PRs can be true at any time. PR0 should never be included in
9889 if (qp_mutexeslen
== qp_mutexestotlen
)
9891 qp_mutexestotlen
+= 20;
9892 qp_mutexes
= (struct qpmutex
*)
9893 xrealloc ((void *) qp_mutexes
,
9894 qp_mutexestotlen
* sizeof (struct qpmutex
));
9898 fprintf (stderr
, " Registering mutex on");
9899 print_prmask (mask
);
9900 fprintf (stderr
, "\n");
9902 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9903 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9907 has_suffix_p (name
, suffix
)
9911 size_t namelen
= strlen (name
);
9912 size_t sufflen
= strlen (suffix
);
9914 if (namelen
<= sufflen
)
9916 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9920 clear_register_values ()
9924 fprintf (stderr
, " Clearing register values\n");
9925 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9926 gr_values
[i
].known
= 0;
9929 /* Keep track of register values/changes which affect DV tracking.
9931 optimization note: should add a flag to classes of insns where otherwise we
9932 have to examine a group of strings to identify them. */
9935 note_register_values (idesc
)
9936 struct ia64_opcode
*idesc
;
9938 valueT qp_changemask
= 0;
9941 /* Invalidate values for registers being written to. */
9942 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9944 if (idesc
->operands
[i
] == IA64_OPND_R1
9945 || idesc
->operands
[i
] == IA64_OPND_R2
9946 || idesc
->operands
[i
] == IA64_OPND_R3
)
9948 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9949 if (regno
> 0 && regno
< NELEMS (gr_values
))
9950 gr_values
[regno
].known
= 0;
9952 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9954 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9955 if (regno
> 0 && regno
< 4)
9956 gr_values
[regno
].known
= 0;
9958 else if (idesc
->operands
[i
] == IA64_OPND_P1
9959 || idesc
->operands
[i
] == IA64_OPND_P2
)
9961 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9962 qp_changemask
|= (valueT
) 1 << regno
;
9964 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9966 if (idesc
->operands
[2] & (valueT
) 0x10000)
9967 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9969 qp_changemask
= idesc
->operands
[2];
9972 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9974 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9975 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9977 qp_changemask
= idesc
->operands
[1];
9978 qp_changemask
&= ~(valueT
) 0xFFFF;
9983 /* Always clear qp branch flags on any PR change. */
9984 /* FIXME there may be exceptions for certain compares. */
9985 clear_qp_branch_flag (qp_changemask
);
9987 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9988 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9990 qp_changemask
|= ~(valueT
) 0xFFFF;
9991 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9993 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9994 gr_values
[i
].known
= 0;
9996 clear_qp_mutex (qp_changemask
);
9997 clear_qp_implies (qp_changemask
, qp_changemask
);
9999 /* After a call, all register values are undefined, except those marked
10001 else if (strncmp (idesc
->name
, "br.call", 6) == 0
10002 || strncmp (idesc
->name
, "brl.call", 7) == 0)
10004 /* FIXME keep GR values which are marked as "safe_across_calls" */
10005 clear_register_values ();
10006 clear_qp_mutex (~qp_safe_across_calls
);
10007 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
10008 clear_qp_branch_flag (~qp_safe_across_calls
);
10010 else if (is_interruption_or_rfi (idesc
)
10011 || is_taken_branch (idesc
))
10013 clear_register_values ();
10014 clear_qp_mutex (~(valueT
) 0);
10015 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
10017 /* Look for mutex and implies relations. */
10018 else if ((idesc
->operands
[0] == IA64_OPND_P1
10019 || idesc
->operands
[0] == IA64_OPND_P2
)
10020 && (idesc
->operands
[1] == IA64_OPND_P1
10021 || idesc
->operands
[1] == IA64_OPND_P2
))
10023 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
10024 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
10025 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
10026 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
10028 /* If both PRs are PR0, we can't really do anything. */
10029 if (p1
== 0 && p2
== 0)
10032 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
10034 /* In general, clear mutexes and implies which include P1 or P2,
10035 with the following exceptions. */
10036 else if (has_suffix_p (idesc
->name
, ".or.andcm")
10037 || has_suffix_p (idesc
->name
, ".and.orcm"))
10039 clear_qp_implies (p2mask
, p1mask
);
10041 else if (has_suffix_p (idesc
->name
, ".andcm")
10042 || has_suffix_p (idesc
->name
, ".and"))
10044 clear_qp_implies (0, p1mask
| p2mask
);
10046 else if (has_suffix_p (idesc
->name
, ".orcm")
10047 || has_suffix_p (idesc
->name
, ".or"))
10049 clear_qp_mutex (p1mask
| p2mask
);
10050 clear_qp_implies (p1mask
| p2mask
, 0);
10056 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
10058 /* If one of the PRs is PR0, we call clear_qp_mutex. */
10059 if (p1
== 0 || p2
== 0)
10060 clear_qp_mutex (p1mask
| p2mask
);
10062 added
= update_qp_mutex (p1mask
| p2mask
);
10064 if (CURR_SLOT
.qp_regno
== 0
10065 || has_suffix_p (idesc
->name
, ".unc"))
10067 if (added
== 0 && p1
&& p2
)
10068 add_qp_mutex (p1mask
| p2mask
);
10069 if (CURR_SLOT
.qp_regno
!= 0)
10072 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
10074 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
10079 /* Look for mov imm insns into GRs. */
10080 else if (idesc
->operands
[0] == IA64_OPND_R1
10081 && (idesc
->operands
[1] == IA64_OPND_IMM22
10082 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
10083 && CURR_SLOT
.opnd
[1].X_op
== O_constant
10084 && (strcmp (idesc
->name
, "mov") == 0
10085 || strcmp (idesc
->name
, "movl") == 0))
10087 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
10088 if (regno
> 0 && regno
< NELEMS (gr_values
))
10090 gr_values
[regno
].known
= 1;
10091 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
10092 gr_values
[regno
].path
= md
.path
;
10095 fprintf (stderr
, " Know gr%d = ", regno
);
10096 fprintf_vma (stderr
, gr_values
[regno
].value
);
10097 fputs ("\n", stderr
);
10101 /* Look for dep.z imm insns. */
10102 else if (idesc
->operands
[0] == IA64_OPND_R1
10103 && idesc
->operands
[1] == IA64_OPND_IMM8
10104 && strcmp (idesc
->name
, "dep.z") == 0)
10106 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
10107 if (regno
> 0 && regno
< NELEMS (gr_values
))
10109 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
10111 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
10112 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
10113 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
10114 gr_values
[regno
].known
= 1;
10115 gr_values
[regno
].value
= value
;
10116 gr_values
[regno
].path
= md
.path
;
10119 fprintf (stderr
, " Know gr%d = ", regno
);
10120 fprintf_vma (stderr
, gr_values
[regno
].value
);
10121 fputs ("\n", stderr
);
10127 clear_qp_mutex (qp_changemask
);
10128 clear_qp_implies (qp_changemask
, qp_changemask
);
10132 /* Return whether the given predicate registers are currently mutex. */
10135 qp_mutex (p1
, p2
, path
)
10145 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
10146 for (i
= 0; i
< qp_mutexeslen
; i
++)
10148 if (qp_mutexes
[i
].path
>= path
10149 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
10156 /* Return whether the given resource is in the given insn's list of chks
10157 Return 1 if the conflict is absolutely determined, 2 if it's a potential
10161 resources_match (rs
, idesc
, note
, qp_regno
, path
)
10163 struct ia64_opcode
*idesc
;
10168 struct rsrc specs
[MAX_SPECS
];
10171 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10172 we don't need to check. One exception is note 11, which indicates that
10173 target predicates are written regardless of PR[qp]. */
10174 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
10178 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
10179 while (count
-- > 0)
10181 /* UNAT checking is a bit more specific than other resources */
10182 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
10183 && specs
[count
].mem_offset
.hint
10184 && rs
->mem_offset
.hint
)
10186 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
10188 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
10189 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
10196 /* Skip apparent PR write conflicts where both writes are an AND or both
10197 writes are an OR. */
10198 if (rs
->dependency
->specifier
== IA64_RS_PR
10199 || rs
->dependency
->specifier
== IA64_RS_PRr
10200 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10202 if (specs
[count
].cmp_type
!= CMP_NONE
10203 && specs
[count
].cmp_type
== rs
->cmp_type
)
10206 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10207 dv_mode
[rs
->dependency
->mode
],
10208 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10209 specs
[count
].index
: 63);
10214 " %s on parallel compare conflict %s vs %s on PR%d\n",
10215 dv_mode
[rs
->dependency
->mode
],
10216 dv_cmp_type
[rs
->cmp_type
],
10217 dv_cmp_type
[specs
[count
].cmp_type
],
10218 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10219 specs
[count
].index
: 63);
10223 /* If either resource is not specific, conservatively assume a conflict
10225 if (!specs
[count
].specific
|| !rs
->specific
)
10227 else if (specs
[count
].index
== rs
->index
)
10234 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10235 insert a stop to create the break. Update all resource dependencies
10236 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10237 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10238 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10242 insn_group_break (insert_stop
, qp_regno
, save_current
)
10249 if (insert_stop
&& md
.num_slots_in_use
> 0)
10250 PREV_SLOT
.end_of_insn_group
= 1;
10254 fprintf (stderr
, " Insn group break%s",
10255 (insert_stop
? " (w/stop)" : ""));
10257 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10258 fprintf (stderr
, "\n");
10262 while (i
< regdepslen
)
10264 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10267 && regdeps
[i
].qp_regno
!= qp_regno
)
10274 && CURR_SLOT
.src_file
== regdeps
[i
].file
10275 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10281 /* clear dependencies which are automatically cleared by a stop, or
10282 those that have reached the appropriate state of insn serialization */
10283 if (dep
->semantics
== IA64_DVS_IMPLIED
10284 || dep
->semantics
== IA64_DVS_IMPLIEDF
10285 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10287 print_dependency ("Removing", i
);
10288 regdeps
[i
] = regdeps
[--regdepslen
];
10292 if (dep
->semantics
== IA64_DVS_DATA
10293 || dep
->semantics
== IA64_DVS_INSTR
10294 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10296 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10297 regdeps
[i
].insn_srlz
= STATE_STOP
;
10298 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10299 regdeps
[i
].data_srlz
= STATE_STOP
;
10306 /* Add the given resource usage spec to the list of active dependencies. */
10309 mark_resource (idesc
, dep
, spec
, depind
, path
)
10310 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
10311 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
10316 if (regdepslen
== regdepstotlen
)
10318 regdepstotlen
+= 20;
10319 regdeps
= (struct rsrc
*)
10320 xrealloc ((void *) regdeps
,
10321 regdepstotlen
* sizeof (struct rsrc
));
10324 regdeps
[regdepslen
] = *spec
;
10325 regdeps
[regdepslen
].depind
= depind
;
10326 regdeps
[regdepslen
].path
= path
;
10327 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10328 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10330 print_dependency ("Adding", regdepslen
);
10336 print_dependency (action
, depind
)
10337 const char *action
;
10342 fprintf (stderr
, " %s %s '%s'",
10343 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10344 (regdeps
[depind
].dependency
)->name
);
10345 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10346 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10347 if (regdeps
[depind
].mem_offset
.hint
)
10349 fputs (" ", stderr
);
10350 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10351 fputs ("+", stderr
);
10352 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10354 fprintf (stderr
, "\n");
10359 instruction_serialization ()
10363 fprintf (stderr
, " Instruction serialization\n");
10364 for (i
= 0; i
< regdepslen
; i
++)
10365 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10366 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10370 data_serialization ()
10374 fprintf (stderr
, " Data serialization\n");
10375 while (i
< regdepslen
)
10377 if (regdeps
[i
].data_srlz
== STATE_STOP
10378 /* Note: as of 991210, all "other" dependencies are cleared by a
10379 data serialization. This might change with new tables */
10380 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10382 print_dependency ("Removing", i
);
10383 regdeps
[i
] = regdeps
[--regdepslen
];
10390 /* Insert stops and serializations as needed to avoid DVs. */
10393 remove_marked_resource (rs
)
10396 switch (rs
->dependency
->semantics
)
10398 case IA64_DVS_SPECIFIC
:
10400 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10401 /* ...fall through... */
10402 case IA64_DVS_INSTR
:
10404 fprintf (stderr
, "Inserting instr serialization\n");
10405 if (rs
->insn_srlz
< STATE_STOP
)
10406 insn_group_break (1, 0, 0);
10407 if (rs
->insn_srlz
< STATE_SRLZ
)
10409 struct slot oldslot
= CURR_SLOT
;
10410 /* Manually jam a srlz.i insn into the stream */
10411 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10412 CURR_SLOT
.user_template
= -1;
10413 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10414 instruction_serialization ();
10415 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10416 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10417 emit_one_bundle ();
10418 CURR_SLOT
= oldslot
;
10420 insn_group_break (1, 0, 0);
10422 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10423 "other" types of DV are eliminated
10424 by a data serialization */
10425 case IA64_DVS_DATA
:
10427 fprintf (stderr
, "Inserting data serialization\n");
10428 if (rs
->data_srlz
< STATE_STOP
)
10429 insn_group_break (1, 0, 0);
10431 struct slot oldslot
= CURR_SLOT
;
10432 /* Manually jam a srlz.d insn into the stream */
10433 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10434 CURR_SLOT
.user_template
= -1;
10435 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10436 data_serialization ();
10437 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10438 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10439 emit_one_bundle ();
10440 CURR_SLOT
= oldslot
;
10443 case IA64_DVS_IMPLIED
:
10444 case IA64_DVS_IMPLIEDF
:
10446 fprintf (stderr
, "Inserting stop\n");
10447 insn_group_break (1, 0, 0);
10454 /* Check the resources used by the given opcode against the current dependency
10457 The check is run once for each execution path encountered. In this case,
10458 a unique execution path is the sequence of instructions following a code
10459 entry point, e.g. the following has three execution paths, one starting
10460 at L0, one at L1, and one at L2.
10469 check_dependencies (idesc
)
10470 struct ia64_opcode
*idesc
;
10472 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10476 /* Note that the number of marked resources may change within the
10477 loop if in auto mode. */
10479 while (i
< regdepslen
)
10481 struct rsrc
*rs
= ®deps
[i
];
10482 const struct ia64_dependency
*dep
= rs
->dependency
;
10485 int start_over
= 0;
10487 if (dep
->semantics
== IA64_DVS_NONE
10488 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10494 note
= NOTE (opdeps
->chks
[chkind
]);
10496 /* Check this resource against each execution path seen thus far. */
10497 for (path
= 0; path
<= md
.path
; path
++)
10501 /* If the dependency wasn't on the path being checked, ignore it. */
10502 if (rs
->path
< path
)
10505 /* If the QP for this insn implies a QP which has branched, don't
10506 bother checking. Ed. NOTE: I don't think this check is terribly
10507 useful; what's the point of generating code which will only be
10508 reached if its QP is zero?
10509 This code was specifically inserted to handle the following code,
10510 based on notes from Intel's DV checking code, where p1 implies p2.
10516 if (CURR_SLOT
.qp_regno
!= 0)
10520 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10522 if (qp_implies
[implies
].path
>= path
10523 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10524 && qp_implies
[implies
].p2_branched
)
10534 if ((matchtype
= resources_match (rs
, idesc
, note
,
10535 CURR_SLOT
.qp_regno
, path
)) != 0)
10538 char pathmsg
[256] = "";
10539 char indexmsg
[256] = "";
10540 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10543 sprintf (pathmsg
, " when entry is at label '%s'",
10544 md
.entry_labels
[path
- 1]);
10545 if (matchtype
== 1 && rs
->index
>= 0)
10546 sprintf (indexmsg
, ", specific resource number is %d",
10548 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10550 (certain
? "violates" : "may violate"),
10551 dv_mode
[dep
->mode
], dep
->name
,
10552 dv_sem
[dep
->semantics
],
10553 pathmsg
, indexmsg
);
10555 if (md
.explicit_mode
)
10557 as_warn ("%s", msg
);
10558 if (path
< md
.path
)
10559 as_warn (_("Only the first path encountering the conflict "
10561 as_warn_where (rs
->file
, rs
->line
,
10562 _("This is the location of the "
10563 "conflicting usage"));
10564 /* Don't bother checking other paths, to avoid duplicating
10565 the same warning */
10571 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10573 remove_marked_resource (rs
);
10575 /* since the set of dependencies has changed, start over */
10576 /* FIXME -- since we're removing dvs as we go, we
10577 probably don't really need to start over... */
10590 /* Register new dependencies based on the given opcode. */
10593 mark_resources (idesc
)
10594 struct ia64_opcode
*idesc
;
10597 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10598 int add_only_qp_reads
= 0;
10600 /* A conditional branch only uses its resources if it is taken; if it is
10601 taken, we stop following that path. The other branch types effectively
10602 *always* write their resources. If it's not taken, register only QP
10604 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10606 add_only_qp_reads
= 1;
10610 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10612 for (i
= 0; i
< opdeps
->nregs
; i
++)
10614 const struct ia64_dependency
*dep
;
10615 struct rsrc specs
[MAX_SPECS
];
10620 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10621 note
= NOTE (opdeps
->regs
[i
]);
10623 if (add_only_qp_reads
10624 && !(dep
->mode
== IA64_DV_WAR
10625 && (dep
->specifier
== IA64_RS_PR
10626 || dep
->specifier
== IA64_RS_PRr
10627 || dep
->specifier
== IA64_RS_PR63
)))
10630 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10632 while (count
-- > 0)
10634 mark_resource (idesc
, dep
, &specs
[count
],
10635 DEP (opdeps
->regs
[i
]), md
.path
);
10638 /* The execution path may affect register values, which may in turn
10639 affect which indirect-access resources are accessed. */
10640 switch (dep
->specifier
)
10644 case IA64_RS_CPUID
:
10652 for (path
= 0; path
< md
.path
; path
++)
10654 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10655 while (count
-- > 0)
10656 mark_resource (idesc
, dep
, &specs
[count
],
10657 DEP (opdeps
->regs
[i
]), path
);
10664 /* Remove dependencies when they no longer apply. */
10667 update_dependencies (idesc
)
10668 struct ia64_opcode
*idesc
;
10672 if (strcmp (idesc
->name
, "srlz.i") == 0)
10674 instruction_serialization ();
10676 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10678 data_serialization ();
10680 else if (is_interruption_or_rfi (idesc
)
10681 || is_taken_branch (idesc
))
10683 /* Although technically the taken branch doesn't clear dependencies
10684 which require a srlz.[id], we don't follow the branch; the next
10685 instruction is assumed to start with a clean slate. */
10689 else if (is_conditional_branch (idesc
)
10690 && CURR_SLOT
.qp_regno
!= 0)
10692 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10694 for (i
= 0; i
< qp_implieslen
; i
++)
10696 /* If the conditional branch's predicate is implied by the predicate
10697 in an existing dependency, remove that dependency. */
10698 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10701 /* Note that this implied predicate takes a branch so that if
10702 a later insn generates a DV but its predicate implies this
10703 one, we can avoid the false DV warning. */
10704 qp_implies
[i
].p2_branched
= 1;
10705 while (depind
< regdepslen
)
10707 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10709 print_dependency ("Removing", depind
);
10710 regdeps
[depind
] = regdeps
[--regdepslen
];
10717 /* Any marked resources which have this same predicate should be
10718 cleared, provided that the QP hasn't been modified between the
10719 marking instruction and the branch. */
10722 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10727 while (i
< regdepslen
)
10729 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10730 && regdeps
[i
].link_to_qp_branch
10731 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10732 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10734 /* Treat like a taken branch */
10735 print_dependency ("Removing", i
);
10736 regdeps
[i
] = regdeps
[--regdepslen
];
10745 /* Examine the current instruction for dependency violations. */
10749 struct ia64_opcode
*idesc
;
10753 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10754 idesc
->name
, CURR_SLOT
.src_line
,
10755 idesc
->dependencies
->nchks
,
10756 idesc
->dependencies
->nregs
);
10759 /* Look through the list of currently marked resources; if the current
10760 instruction has the dependency in its chks list which uses that resource,
10761 check against the specific resources used. */
10762 check_dependencies (idesc
);
10764 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10765 then add them to the list of marked resources. */
10766 mark_resources (idesc
);
10768 /* There are several types of dependency semantics, and each has its own
10769 requirements for being cleared
10771 Instruction serialization (insns separated by interruption, rfi, or
10772 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10774 Data serialization (instruction serialization, or writer + srlz.d +
10775 reader, where writer and srlz.d are in separate groups) clears
10776 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10777 always be the case).
10779 Instruction group break (groups separated by stop, taken branch,
10780 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10782 update_dependencies (idesc
);
10784 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10785 warning. Keep track of as many as possible that are useful. */
10786 note_register_values (idesc
);
10788 /* We don't need or want this anymore. */
10789 md
.mem_offset
.hint
= 0;
10794 /* Translate one line of assembly. Pseudo ops and labels do not show
10800 char *saved_input_line_pointer
, *mnemonic
;
10801 const struct pseudo_opcode
*pdesc
;
10802 struct ia64_opcode
*idesc
;
10803 unsigned char qp_regno
;
10804 unsigned int flags
;
10807 saved_input_line_pointer
= input_line_pointer
;
10808 input_line_pointer
= str
;
10810 /* extract the opcode (mnemonic): */
10812 mnemonic
= input_line_pointer
;
10813 ch
= get_symbol_end ();
10814 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10817 *input_line_pointer
= ch
;
10818 (*pdesc
->handler
) (pdesc
->arg
);
10822 /* Find the instruction descriptor matching the arguments. */
10824 idesc
= ia64_find_opcode (mnemonic
);
10825 *input_line_pointer
= ch
;
10828 as_bad ("Unknown opcode `%s'", mnemonic
);
10832 idesc
= parse_operands (idesc
);
10836 /* Handle the dynamic ops we can handle now: */
10837 if (idesc
->type
== IA64_TYPE_DYN
)
10839 if (strcmp (idesc
->name
, "add") == 0)
10841 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10842 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10846 ia64_free_opcode (idesc
);
10847 idesc
= ia64_find_opcode (mnemonic
);
10849 else if (strcmp (idesc
->name
, "mov") == 0)
10851 enum ia64_opnd opnd1
, opnd2
;
10854 opnd1
= idesc
->operands
[0];
10855 opnd2
= idesc
->operands
[1];
10856 if (opnd1
== IA64_OPND_AR3
)
10858 else if (opnd2
== IA64_OPND_AR3
)
10862 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10864 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10865 mnemonic
= "mov.i";
10866 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10867 mnemonic
= "mov.m";
10875 ia64_free_opcode (idesc
);
10876 idesc
= ia64_find_opcode (mnemonic
);
10877 while (idesc
!= NULL
10878 && (idesc
->operands
[0] != opnd1
10879 || idesc
->operands
[1] != opnd2
))
10880 idesc
= get_next_opcode (idesc
);
10884 else if (strcmp (idesc
->name
, "mov.i") == 0
10885 || strcmp (idesc
->name
, "mov.m") == 0)
10887 enum ia64_opnd opnd1
, opnd2
;
10890 opnd1
= idesc
->operands
[0];
10891 opnd2
= idesc
->operands
[1];
10892 if (opnd1
== IA64_OPND_AR3
)
10894 else if (opnd2
== IA64_OPND_AR3
)
10898 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10901 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10903 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10905 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10906 as_bad ("AR %d can only be accessed by %c-unit",
10907 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10911 else if (strcmp (idesc
->name
, "hint.b") == 0)
10917 case hint_b_warning
:
10918 as_warn ("hint.b may be treated as nop");
10921 as_bad ("hint.b shouldn't be used");
10927 if (md
.qp
.X_op
== O_register
)
10929 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10930 md
.qp
.X_op
= O_absent
;
10933 flags
= idesc
->flags
;
10935 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10937 /* The alignment frag has to end with a stop bit only if the
10938 next instruction after the alignment directive has to be
10939 the first instruction in an instruction group. */
10942 while (align_frag
->fr_type
!= rs_align_code
)
10944 align_frag
= align_frag
->fr_next
;
10948 /* align_frag can be NULL if there are directives in
10950 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10951 align_frag
->tc_frag_data
= 1;
10954 insn_group_break (1, 0, 0);
10958 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10960 as_bad ("`%s' cannot be predicated", idesc
->name
);
10964 /* Build the instruction. */
10965 CURR_SLOT
.qp_regno
= qp_regno
;
10966 CURR_SLOT
.idesc
= idesc
;
10967 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10968 dwarf2_where (&CURR_SLOT
.debug_line
);
10970 /* Add unwind entries, if there are any. */
10971 if (unwind
.current_entry
)
10973 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10974 unwind
.current_entry
= NULL
;
10976 if (unwind
.pending_saves
)
10978 if (unwind
.pending_saves
->next
)
10980 /* Attach the next pending save to the next slot so that its
10981 slot number will get set correctly. */
10982 add_unwind_entry (unwind
.pending_saves
->next
, NOT_A_CHAR
);
10983 unwind
.pending_saves
= &unwind
.pending_saves
->next
->r
.record
.p
;
10986 unwind
.pending_saves
= NULL
;
10988 if (unwind
.proc_pending
.sym
&& S_IS_DEFINED (unwind
.proc_pending
.sym
))
10991 /* Check for dependency violations. */
10995 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10996 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10997 emit_one_bundle ();
10999 if ((flags
& IA64_OPCODE_LAST
) != 0)
11000 insn_group_break (1, 0, 0);
11002 md
.last_text_seg
= now_seg
;
11005 input_line_pointer
= saved_input_line_pointer
;
11008 /* Called when symbol NAME cannot be found in the symbol table.
11009 Should be used for dynamic valued symbols only. */
11012 md_undefined_symbol (name
)
11013 char *name ATTRIBUTE_UNUSED
;
11018 /* Called for any expression that can not be recognized. When the
11019 function is called, `input_line_pointer' will point to the start of
11026 switch (*input_line_pointer
)
11029 ++input_line_pointer
;
11030 expression_and_evaluate (e
);
11031 if (*input_line_pointer
!= ']')
11033 as_bad ("Closing bracket missing");
11038 if (e
->X_op
!= O_register
11039 || e
->X_add_number
< REG_GR
11040 || e
->X_add_number
> REG_GR
+ 127)
11042 as_bad ("Index must be a general register");
11043 e
->X_add_number
= REG_GR
;
11046 ++input_line_pointer
;
11057 ignore_rest_of_line ();
11060 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
11061 a section symbol plus some offset. For relocs involving @fptr(),
11062 directives we don't want such adjustments since we need to have the
11063 original symbol's name in the reloc. */
11065 ia64_fix_adjustable (fix
)
11068 /* Prevent all adjustments to global symbols */
11069 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
11072 switch (fix
->fx_r_type
)
11074 case BFD_RELOC_IA64_FPTR64I
:
11075 case BFD_RELOC_IA64_FPTR32MSB
:
11076 case BFD_RELOC_IA64_FPTR32LSB
:
11077 case BFD_RELOC_IA64_FPTR64MSB
:
11078 case BFD_RELOC_IA64_FPTR64LSB
:
11079 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11080 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11090 ia64_force_relocation (fix
)
11093 switch (fix
->fx_r_type
)
11095 case BFD_RELOC_IA64_FPTR64I
:
11096 case BFD_RELOC_IA64_FPTR32MSB
:
11097 case BFD_RELOC_IA64_FPTR32LSB
:
11098 case BFD_RELOC_IA64_FPTR64MSB
:
11099 case BFD_RELOC_IA64_FPTR64LSB
:
11101 case BFD_RELOC_IA64_LTOFF22
:
11102 case BFD_RELOC_IA64_LTOFF64I
:
11103 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11104 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11105 case BFD_RELOC_IA64_PLTOFF22
:
11106 case BFD_RELOC_IA64_PLTOFF64I
:
11107 case BFD_RELOC_IA64_PLTOFF64MSB
:
11108 case BFD_RELOC_IA64_PLTOFF64LSB
:
11110 case BFD_RELOC_IA64_LTOFF22X
:
11111 case BFD_RELOC_IA64_LDXMOV
:
11118 return generic_force_reloc (fix
);
11121 /* Decide from what point a pc-relative relocation is relative to,
11122 relative to the pc-relative fixup. Er, relatively speaking. */
11124 ia64_pcrel_from_section (fix
, sec
)
11128 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
11130 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
11137 /* Used to emit section-relative relocs for the dwarf2 debug data. */
11139 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
11143 expr
.X_op
= O_pseudo_fixup
;
11144 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
11145 expr
.X_add_number
= 0;
11146 expr
.X_add_symbol
= symbol
;
11147 emit_expr (&expr
, size
);
11150 /* This is called whenever some data item (not an instruction) needs a
11151 fixup. We pick the right reloc code depending on the byteorder
11152 currently in effect. */
11154 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
11160 bfd_reloc_code_real_type code
;
11165 /* There are no reloc for 8 and 16 bit quantities, but we allow
11166 them here since they will work fine as long as the expression
11167 is fully defined at the end of the pass over the source file. */
11168 case 1: code
= BFD_RELOC_8
; break;
11169 case 2: code
= BFD_RELOC_16
; break;
11171 if (target_big_endian
)
11172 code
= BFD_RELOC_IA64_DIR32MSB
;
11174 code
= BFD_RELOC_IA64_DIR32LSB
;
11178 /* In 32-bit mode, data8 could mean function descriptors too. */
11179 if (exp
->X_op
== O_pseudo_fixup
11180 && exp
->X_op_symbol
11181 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
11182 && !(md
.flags
& EF_IA_64_ABI64
))
11184 if (target_big_endian
)
11185 code
= BFD_RELOC_IA64_IPLTMSB
;
11187 code
= BFD_RELOC_IA64_IPLTLSB
;
11188 exp
->X_op
= O_symbol
;
11193 if (target_big_endian
)
11194 code
= BFD_RELOC_IA64_DIR64MSB
;
11196 code
= BFD_RELOC_IA64_DIR64LSB
;
11201 if (exp
->X_op
== O_pseudo_fixup
11202 && exp
->X_op_symbol
11203 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
11205 if (target_big_endian
)
11206 code
= BFD_RELOC_IA64_IPLTMSB
;
11208 code
= BFD_RELOC_IA64_IPLTLSB
;
11209 exp
->X_op
= O_symbol
;
11215 as_bad ("Unsupported fixup size %d", nbytes
);
11216 ignore_rest_of_line ();
11220 if (exp
->X_op
== O_pseudo_fixup
)
11222 exp
->X_op
= O_symbol
;
11223 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11224 /* ??? If code unchanged, unsupported. */
11227 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11228 /* We need to store the byte order in effect in case we're going
11229 to fix an 8 or 16 bit relocation (for which there no real
11230 relocs available). See md_apply_fix(). */
11231 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11234 /* Return the actual relocation we wish to associate with the pseudo
11235 reloc described by SYM and R_TYPE. SYM should be one of the
11236 symbols in the pseudo_func array, or NULL. */
11238 static bfd_reloc_code_real_type
11239 ia64_gen_real_reloc_type (sym
, r_type
)
11240 struct symbol
*sym
;
11241 bfd_reloc_code_real_type r_type
;
11243 bfd_reloc_code_real_type
new = 0;
11244 const char *type
= NULL
, *suffix
= "";
11251 switch (S_GET_VALUE (sym
))
11253 case FUNC_FPTR_RELATIVE
:
11256 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
11257 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
11258 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
11259 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
11260 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
11261 default: type
= "FPTR"; break;
11265 case FUNC_GP_RELATIVE
:
11268 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
11269 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
11270 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
11271 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
11272 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
11273 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
11274 default: type
= "GPREL"; break;
11278 case FUNC_LT_RELATIVE
:
11281 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
11282 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
11283 default: type
= "LTOFF"; break;
11287 case FUNC_LT_RELATIVE_X
:
11290 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
11291 default: type
= "LTOFF"; suffix
= "X"; break;
11295 case FUNC_PC_RELATIVE
:
11298 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
11299 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
11300 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
11301 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
11302 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
11303 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
11304 default: type
= "PCREL"; break;
11308 case FUNC_PLT_RELATIVE
:
11311 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
11312 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
11313 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
11314 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
11315 default: type
= "PLTOFF"; break;
11319 case FUNC_SEC_RELATIVE
:
11322 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
11323 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
11324 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
11325 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
11326 default: type
= "SECREL"; break;
11330 case FUNC_SEG_RELATIVE
:
11333 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
11334 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
11335 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
11336 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
11337 default: type
= "SEGREL"; break;
11341 case FUNC_LTV_RELATIVE
:
11344 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
11345 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
11346 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
11347 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
11348 default: type
= "LTV"; break;
11352 case FUNC_LT_FPTR_RELATIVE
:
11355 case BFD_RELOC_IA64_IMM22
:
11356 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11357 case BFD_RELOC_IA64_IMM64
:
11358 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11359 case BFD_RELOC_IA64_DIR32MSB
:
11360 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11361 case BFD_RELOC_IA64_DIR32LSB
:
11362 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11363 case BFD_RELOC_IA64_DIR64MSB
:
11364 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11365 case BFD_RELOC_IA64_DIR64LSB
:
11366 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11368 type
= "LTOFF_FPTR"; break;
11372 case FUNC_TP_RELATIVE
:
11375 case BFD_RELOC_IA64_IMM14
: new = BFD_RELOC_IA64_TPREL14
; break;
11376 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_TPREL22
; break;
11377 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_TPREL64I
; break;
11378 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_TPREL64MSB
; break;
11379 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_TPREL64LSB
; break;
11380 default: type
= "TPREL"; break;
11384 case FUNC_LT_TP_RELATIVE
:
11387 case BFD_RELOC_IA64_IMM22
:
11388 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11390 type
= "LTOFF_TPREL"; break;
11394 case FUNC_DTP_MODULE
:
11397 case BFD_RELOC_IA64_DIR64MSB
:
11398 new = BFD_RELOC_IA64_DTPMOD64MSB
; break;
11399 case BFD_RELOC_IA64_DIR64LSB
:
11400 new = BFD_RELOC_IA64_DTPMOD64LSB
; break;
11402 type
= "DTPMOD"; break;
11406 case FUNC_LT_DTP_MODULE
:
11409 case BFD_RELOC_IA64_IMM22
:
11410 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11412 type
= "LTOFF_DTPMOD"; break;
11416 case FUNC_DTP_RELATIVE
:
11419 case BFD_RELOC_IA64_DIR32MSB
:
11420 new = BFD_RELOC_IA64_DTPREL32MSB
; break;
11421 case BFD_RELOC_IA64_DIR32LSB
:
11422 new = BFD_RELOC_IA64_DTPREL32LSB
; break;
11423 case BFD_RELOC_IA64_DIR64MSB
:
11424 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
11425 case BFD_RELOC_IA64_DIR64LSB
:
11426 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
11427 case BFD_RELOC_IA64_IMM14
:
11428 new = BFD_RELOC_IA64_DTPREL14
; break;
11429 case BFD_RELOC_IA64_IMM22
:
11430 new = BFD_RELOC_IA64_DTPREL22
; break;
11431 case BFD_RELOC_IA64_IMM64
:
11432 new = BFD_RELOC_IA64_DTPREL64I
; break;
11434 type
= "DTPREL"; break;
11438 case FUNC_LT_DTP_RELATIVE
:
11441 case BFD_RELOC_IA64_IMM22
:
11442 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11444 type
= "LTOFF_DTPREL"; break;
11448 case FUNC_IPLT_RELOC
:
11451 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11452 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11453 default: type
= "IPLT"; break;
11471 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11472 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11473 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11474 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11475 case BFD_RELOC_UNUSED
: width
= 13; break;
11476 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11477 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11478 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11482 /* This should be an error, but since previously there wasn't any
11483 diagnostic here, dont't make it fail because of this for now. */
11484 as_warn ("Cannot express %s%d%s relocation", type
, width
, suffix
);
11489 /* Here is where generate the appropriate reloc for pseudo relocation
11492 ia64_validate_fix (fix
)
11495 switch (fix
->fx_r_type
)
11497 case BFD_RELOC_IA64_FPTR64I
:
11498 case BFD_RELOC_IA64_FPTR32MSB
:
11499 case BFD_RELOC_IA64_FPTR64LSB
:
11500 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11501 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11502 if (fix
->fx_offset
!= 0)
11503 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11504 "No addend allowed in @fptr() relocation");
11512 fix_insn (fix
, odesc
, value
)
11514 const struct ia64_operand
*odesc
;
11517 bfd_vma insn
[3], t0
, t1
, control_bits
;
11522 slot
= fix
->fx_where
& 0x3;
11523 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11525 /* Bundles are always in little-endian byte order */
11526 t0
= bfd_getl64 (fixpos
);
11527 t1
= bfd_getl64 (fixpos
+ 8);
11528 control_bits
= t0
& 0x1f;
11529 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11530 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11531 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11534 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11536 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11537 insn
[2] |= (((value
& 0x7f) << 13)
11538 | (((value
>> 7) & 0x1ff) << 27)
11539 | (((value
>> 16) & 0x1f) << 22)
11540 | (((value
>> 21) & 0x1) << 21)
11541 | (((value
>> 63) & 0x1) << 36));
11543 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11545 if (value
& ~0x3fffffffffffffffULL
)
11546 err
= "integer operand out of range";
11547 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11548 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11550 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11553 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11554 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11555 | (((value
>> 0) & 0xfffff) << 13));
11558 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11561 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
11563 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11564 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11565 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11566 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11569 /* Attempt to simplify or even eliminate a fixup. The return value is
11570 ignored; perhaps it was once meaningful, but now it is historical.
11571 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11573 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11577 md_apply_fix (fix
, valP
, seg
)
11580 segT seg ATTRIBUTE_UNUSED
;
11583 valueT value
= *valP
;
11585 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11589 switch (fix
->fx_r_type
)
11591 case BFD_RELOC_IA64_PCREL21B
: break;
11592 case BFD_RELOC_IA64_PCREL21BI
: break;
11593 case BFD_RELOC_IA64_PCREL21F
: break;
11594 case BFD_RELOC_IA64_PCREL21M
: break;
11595 case BFD_RELOC_IA64_PCREL60B
: break;
11596 case BFD_RELOC_IA64_PCREL22
: break;
11597 case BFD_RELOC_IA64_PCREL64I
: break;
11598 case BFD_RELOC_IA64_PCREL32MSB
: break;
11599 case BFD_RELOC_IA64_PCREL32LSB
: break;
11600 case BFD_RELOC_IA64_PCREL64MSB
: break;
11601 case BFD_RELOC_IA64_PCREL64LSB
: break;
11603 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11610 switch (fix
->fx_r_type
)
11612 case BFD_RELOC_UNUSED
:
11613 /* This must be a TAG13 or TAG13b operand. There are no external
11614 relocs defined for them, so we must give an error. */
11615 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11616 "%s must have a constant value",
11617 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11621 case BFD_RELOC_IA64_TPREL14
:
11622 case BFD_RELOC_IA64_TPREL22
:
11623 case BFD_RELOC_IA64_TPREL64I
:
11624 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11625 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11626 case BFD_RELOC_IA64_DTPREL14
:
11627 case BFD_RELOC_IA64_DTPREL22
:
11628 case BFD_RELOC_IA64_DTPREL64I
:
11629 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11630 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11637 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11639 if (fix
->tc_fix_data
.bigendian
)
11640 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11642 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11647 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11652 /* Generate the BFD reloc to be stuck in the object file from the
11653 fixup used internally in the assembler. */
11656 tc_gen_reloc (sec
, fixp
)
11657 asection
*sec ATTRIBUTE_UNUSED
;
11662 reloc
= xmalloc (sizeof (*reloc
));
11663 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11664 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11665 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11666 reloc
->addend
= fixp
->fx_offset
;
11667 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11671 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11672 "Cannot represent %s relocation in object file",
11673 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11678 /* Turn a string in input_line_pointer into a floating point constant
11679 of type TYPE, and store the appropriate bytes in *LIT. The number
11680 of LITTLENUMS emitted is stored in *SIZE. An error message is
11681 returned, or NULL on OK. */
11683 #define MAX_LITTLENUMS 5
11686 md_atof (type
, lit
, size
)
11691 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11721 return "Bad call to MD_ATOF()";
11723 t
= atof_ieee (input_line_pointer
, type
, words
);
11725 input_line_pointer
= t
;
11727 (*ia64_float_to_chars
) (lit
, words
, prec
);
11731 /* It is 10 byte floating point with 6 byte padding. */
11732 memset (&lit
[10], 0, 6);
11733 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11736 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11741 /* Handle ia64 specific semantics of the align directive. */
11744 ia64_md_do_align (n
, fill
, len
, max
)
11745 int n ATTRIBUTE_UNUSED
;
11746 const char *fill ATTRIBUTE_UNUSED
;
11747 int len ATTRIBUTE_UNUSED
;
11748 int max ATTRIBUTE_UNUSED
;
11750 if (subseg_text_p (now_seg
))
11751 ia64_flush_insns ();
11754 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11755 of an rs_align_code fragment. */
11758 ia64_handle_align (fragp
)
11763 const unsigned char *nop
;
11765 if (fragp
->fr_type
!= rs_align_code
)
11768 /* Check if this frag has to end with a stop bit. */
11769 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11771 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11772 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11774 /* If no paddings are needed, we check if we need a stop bit. */
11775 if (!bytes
&& fragp
->tc_frag_data
)
11777 if (fragp
->fr_fix
< 16)
11779 /* FIXME: It won't work with
11781 alloc r32=ar.pfs,1,2,4,0
11785 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11786 _("Can't add stop bit to mark end of instruction group"));
11789 /* Bundles are always in little-endian byte order. Make sure
11790 the previous bundle has the stop bit. */
11794 /* Make sure we are on a 16-byte boundary, in case someone has been
11795 putting data into a text section. */
11798 int fix
= bytes
& 15;
11799 memset (p
, 0, fix
);
11802 fragp
->fr_fix
+= fix
;
11805 /* Instruction bundles are always little-endian. */
11806 memcpy (p
, nop
, 16);
11807 fragp
->fr_var
= 16;
11811 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11816 number_to_chars_bigendian (lit
, (long) (*words
++),
11817 sizeof (LITTLENUM_TYPE
));
11818 lit
+= sizeof (LITTLENUM_TYPE
);
11823 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11828 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11829 sizeof (LITTLENUM_TYPE
));
11830 lit
+= sizeof (LITTLENUM_TYPE
);
11835 ia64_elf_section_change_hook (void)
11837 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11838 && elf_linked_to_section (now_seg
) == NULL
)
11839 elf_linked_to_section (now_seg
) = text_section
;
11840 dot_byteorder (-1);
11843 /* Check if a label should be made global. */
11845 ia64_check_label (symbolS
*label
)
11847 if (*input_line_pointer
== ':')
11849 S_SET_EXTERNAL (label
);
11850 input_line_pointer
++;
11854 /* Used to remember where .alias and .secalias directives are seen. We
11855 will rename symbol and section names when we are about to output
11856 the relocatable file. */
11859 char *file
; /* The file where the directive is seen. */
11860 unsigned int line
; /* The line number the directive is at. */
11861 const char *name
; /* The orignale name of the symbol. */
11864 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11865 .secalias. Otherwise, it is .alias. */
11867 dot_alias (int section
)
11869 char *name
, *alias
;
11873 const char *error_string
;
11876 struct hash_control
*ahash
, *nhash
;
11879 name
= input_line_pointer
;
11880 delim
= get_symbol_end ();
11881 end_name
= input_line_pointer
;
11884 if (name
== end_name
)
11886 as_bad (_("expected symbol name"));
11887 ignore_rest_of_line ();
11891 SKIP_WHITESPACE ();
11893 if (*input_line_pointer
!= ',')
11896 as_bad (_("expected comma after \"%s\""), name
);
11898 ignore_rest_of_line ();
11902 input_line_pointer
++;
11904 ia64_canonicalize_symbol_name (name
);
11906 /* We call demand_copy_C_string to check if alias string is valid.
11907 There should be a closing `"' and no `\0' in the string. */
11908 alias
= demand_copy_C_string (&len
);
11911 ignore_rest_of_line ();
11915 /* Make a copy of name string. */
11916 len
= strlen (name
) + 1;
11917 obstack_grow (¬es
, name
, len
);
11918 name
= obstack_finish (¬es
);
11923 ahash
= secalias_hash
;
11924 nhash
= secalias_name_hash
;
11929 ahash
= alias_hash
;
11930 nhash
= alias_name_hash
;
11933 /* Check if alias has been used before. */
11934 h
= (struct alias
*) hash_find (ahash
, alias
);
11937 if (strcmp (h
->name
, name
))
11938 as_bad (_("`%s' is already the alias of %s `%s'"),
11939 alias
, kind
, h
->name
);
11943 /* Check if name already has an alias. */
11944 a
= (const char *) hash_find (nhash
, name
);
11947 if (strcmp (a
, alias
))
11948 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11952 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11953 as_where (&h
->file
, &h
->line
);
11956 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11959 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11960 alias
, kind
, error_string
);
11964 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11967 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11968 alias
, kind
, error_string
);
11970 obstack_free (¬es
, name
);
11971 obstack_free (¬es
, alias
);
11974 demand_empty_rest_of_line ();
11977 /* It renames the original symbol name to its alias. */
11979 do_alias (const char *alias
, PTR value
)
11981 struct alias
*h
= (struct alias
*) value
;
11982 symbolS
*sym
= symbol_find (h
->name
);
11985 as_warn_where (h
->file
, h
->line
,
11986 _("symbol `%s' aliased to `%s' is not used"),
11989 S_SET_NAME (sym
, (char *) alias
);
11992 /* Called from write_object_file. */
11994 ia64_adjust_symtab (void)
11996 hash_traverse (alias_hash
, do_alias
);
11999 /* It renames the original section name to its alias. */
12001 do_secalias (const char *alias
, PTR value
)
12003 struct alias
*h
= (struct alias
*) value
;
12004 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
12007 as_warn_where (h
->file
, h
->line
,
12008 _("section `%s' aliased to `%s' is not used"),
12014 /* Called from write_object_file. */
12016 ia64_frob_file (void)
12018 hash_traverse (secalias_hash
, do_secalias
);