1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
54 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
55 #define MIN(a,b) ((a) < (b) ? (a) : (b))
58 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
59 #define CURR_SLOT md.slot[md.curr_slot]
61 #define O_pseudo_fixup (O_max + 1)
65 /* IA-64 ABI section pseudo-ops. */
66 SPECIAL_SECTION_BSS
= 0,
68 SPECIAL_SECTION_SDATA
,
69 SPECIAL_SECTION_RODATA
,
70 SPECIAL_SECTION_COMMENT
,
71 SPECIAL_SECTION_UNWIND
,
72 SPECIAL_SECTION_UNWIND_INFO
,
73 /* HPUX specific section pseudo-ops. */
74 SPECIAL_SECTION_INIT_ARRAY
,
75 SPECIAL_SECTION_FINI_ARRAY
,
92 FUNC_LT_FPTR_RELATIVE
,
102 REG_FR
= (REG_GR
+ 128),
103 REG_AR
= (REG_FR
+ 128),
104 REG_CR
= (REG_AR
+ 128),
105 REG_P
= (REG_CR
+ 128),
106 REG_BR
= (REG_P
+ 64),
107 REG_IP
= (REG_BR
+ 8),
114 /* The following are pseudo-registers for use by gas only. */
126 /* The following pseudo-registers are used for unwind directives only: */
134 DYNREG_GR
= 0, /* dynamic general purpose register */
135 DYNREG_FR
, /* dynamic floating point register */
136 DYNREG_PR
, /* dynamic predicate register */
140 enum operand_match_result
143 OPERAND_OUT_OF_RANGE
,
147 /* On the ia64, we can't know the address of a text label until the
148 instructions are packed into a bundle. To handle this, we keep
149 track of the list of labels that appear in front of each
153 struct label_fix
*next
;
157 /* This is the endianness of the current section. */
158 extern int target_big_endian
;
160 /* This is the default endianness. */
161 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
163 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
165 static void ia64_float_to_chars_bigendian
166 PARAMS ((char *, LITTLENUM_TYPE
*, int));
167 static void ia64_float_to_chars_littleendian
168 PARAMS ((char *, LITTLENUM_TYPE
*, int));
169 static void (*ia64_float_to_chars
)
170 PARAMS ((char *, LITTLENUM_TYPE
*, int));
172 static struct hash_control
*alias_hash
;
173 static struct hash_control
*alias_name_hash
;
174 static struct hash_control
*secalias_hash
;
175 static struct hash_control
*secalias_name_hash
;
177 /* Characters which always start a comment. */
178 const char comment_chars
[] = "";
180 /* Characters which start a comment at the beginning of a line. */
181 const char line_comment_chars
[] = "#";
183 /* Characters which may be used to separate multiple commands on a
185 const char line_separator_chars
[] = ";";
187 /* Characters which are used to indicate an exponent in a floating
189 const char EXP_CHARS
[] = "eE";
191 /* Characters which mean that a number is a floating point constant,
193 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
195 /* ia64-specific option processing: */
197 const char *md_shortopts
= "m:N:x::";
199 struct option md_longopts
[] =
201 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
202 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
203 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
204 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
207 size_t md_longopts_size
= sizeof (md_longopts
);
211 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
212 struct hash_control
*reg_hash
; /* register name hash table */
213 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
214 struct hash_control
*const_hash
; /* constant hash table */
215 struct hash_control
*entry_hash
; /* code entry hint hash table */
217 symbolS
*regsym
[REG_NUM
];
219 /* If X_op is != O_absent, the registername for the instruction's
220 qualifying predicate. If NULL, p0 is assumed for instructions
221 that are predicatable. */
228 explicit_mode
: 1, /* which mode we're in */
229 default_explicit_mode
: 1, /* which mode is the default */
230 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
232 keep_pending_output
: 1;
234 /* Each bundle consists of up to three instructions. We keep
235 track of four most recent instructions so we can correctly set
236 the end_of_insn_group for the last instruction in a bundle. */
238 int num_slots_in_use
;
242 end_of_insn_group
: 1,
243 manual_bundling_on
: 1,
244 manual_bundling_off
: 1;
245 signed char user_template
; /* user-selected template, if any */
246 unsigned char qp_regno
; /* qualifying predicate */
247 /* This duplicates a good fraction of "struct fix" but we
248 can't use a "struct fix" instead since we can't call
249 fix_new_exp() until we know the address of the instruction. */
253 bfd_reloc_code_real_type code
;
254 enum ia64_opnd opnd
; /* type of operand in need of fix */
255 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
256 expressionS expr
; /* the value to be inserted */
258 fixup
[2]; /* at most two fixups per insn */
259 struct ia64_opcode
*idesc
;
260 struct label_fix
*label_fixups
;
261 struct label_fix
*tag_fixups
;
262 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
265 unsigned int src_line
;
266 struct dwarf2_line_info debug_line
;
274 struct dynreg
*next
; /* next dynamic register */
276 unsigned short base
; /* the base register number */
277 unsigned short num_regs
; /* # of registers in this set */
279 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
281 flagword flags
; /* ELF-header flags */
284 unsigned hint
:1; /* is this hint currently valid? */
285 bfd_vma offset
; /* mem.offset offset */
286 bfd_vma base
; /* mem.offset base */
289 int path
; /* number of alt. entry points seen */
290 const char **entry_labels
; /* labels of all alternate paths in
291 the current DV-checking block. */
292 int maxpaths
; /* size currently allocated for
294 /* Support for hardware errata workarounds. */
296 /* Record data about the last three insn groups. */
299 /* B-step workaround.
300 For each predicate register, this is set if the corresponding insn
301 group conditionally sets this register with one of the affected
304 /* B-step workaround.
305 For each general register, this is set if the corresponding insn
306 a) is conditional one one of the predicate registers for which
307 P_REG_SET is 1 in the corresponding entry of the previous group,
308 b) sets this general register with one of the affected
310 int g_reg_set_conditionally
[128];
314 int pointer_size
; /* size in bytes of a pointer */
315 int pointer_size_shift
; /* shift size of a pointer for alignment */
319 /* application registers: */
325 #define AR_BSPSTORE 18
340 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
341 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
342 {"ar.rsc", 16}, {"ar.bsp", 17},
343 {"ar.bspstore", 18}, {"ar.rnat", 19},
344 {"ar.fcr", 21}, {"ar.eflag", 24},
345 {"ar.csd", 25}, {"ar.ssd", 26},
346 {"ar.cflg", 27}, {"ar.fsr", 28},
347 {"ar.fir", 29}, {"ar.fdr", 30},
348 {"ar.ccv", 32}, {"ar.unat", 36},
349 {"ar.fpsr", 40}, {"ar.itc", 44},
350 {"ar.pfs", 64}, {"ar.lc", 65},
371 /* control registers: */
413 static const struct const_desc
420 /* PSR constant masks: */
423 {"psr.be", ((valueT
) 1) << 1},
424 {"psr.up", ((valueT
) 1) << 2},
425 {"psr.ac", ((valueT
) 1) << 3},
426 {"psr.mfl", ((valueT
) 1) << 4},
427 {"psr.mfh", ((valueT
) 1) << 5},
429 {"psr.ic", ((valueT
) 1) << 13},
430 {"psr.i", ((valueT
) 1) << 14},
431 {"psr.pk", ((valueT
) 1) << 15},
433 {"psr.dt", ((valueT
) 1) << 17},
434 {"psr.dfl", ((valueT
) 1) << 18},
435 {"psr.dfh", ((valueT
) 1) << 19},
436 {"psr.sp", ((valueT
) 1) << 20},
437 {"psr.pp", ((valueT
) 1) << 21},
438 {"psr.di", ((valueT
) 1) << 22},
439 {"psr.si", ((valueT
) 1) << 23},
440 {"psr.db", ((valueT
) 1) << 24},
441 {"psr.lp", ((valueT
) 1) << 25},
442 {"psr.tb", ((valueT
) 1) << 26},
443 {"psr.rt", ((valueT
) 1) << 27},
444 /* 28-31: reserved */
445 /* 32-33: cpl (current privilege level) */
446 {"psr.is", ((valueT
) 1) << 34},
447 {"psr.mc", ((valueT
) 1) << 35},
448 {"psr.it", ((valueT
) 1) << 36},
449 {"psr.id", ((valueT
) 1) << 37},
450 {"psr.da", ((valueT
) 1) << 38},
451 {"psr.dd", ((valueT
) 1) << 39},
452 {"psr.ss", ((valueT
) 1) << 40},
453 /* 41-42: ri (restart instruction) */
454 {"psr.ed", ((valueT
) 1) << 43},
455 {"psr.bn", ((valueT
) 1) << 44},
458 /* indirect register-sets/memory: */
467 { "CPUID", IND_CPUID
},
468 { "cpuid", IND_CPUID
},
480 /* Pseudo functions used to indicate relocation types (these functions
481 start with an at sign (@). */
503 /* reloc pseudo functions (these must come first!): */
504 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
505 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
506 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
507 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
508 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
509 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
510 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
511 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
512 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
513 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
514 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
515 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
516 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
517 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
518 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
519 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
520 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
522 /* mbtype4 constants: */
523 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
524 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
525 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
526 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
527 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
529 /* fclass constants: */
530 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
531 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
532 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
533 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
534 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
535 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
536 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
537 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
538 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
540 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
542 /* hint constants: */
543 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
545 /* unwind-related constants: */
546 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
547 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
548 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
549 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
550 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
551 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
552 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
554 /* unwind-related registers: */
555 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
558 /* 41-bit nop opcodes (one per unit): */
559 static const bfd_vma nop
[IA64_NUM_UNITS
] =
561 0x0000000000LL
, /* NIL => break 0 */
562 0x0008000000LL
, /* I-unit nop */
563 0x0008000000LL
, /* M-unit nop */
564 0x4000000000LL
, /* B-unit nop */
565 0x0008000000LL
, /* F-unit nop */
566 0x0008000000LL
, /* L-"unit" nop */
567 0x0008000000LL
, /* X-unit nop */
570 /* Can't be `const' as it's passed to input routines (which have the
571 habit of setting temporary sentinels. */
572 static char special_section_name
[][20] =
574 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
575 {".IA_64.unwind"}, {".IA_64.unwind_info"},
576 {".init_array"}, {".fini_array"}
579 /* The best template for a particular sequence of up to three
581 #define N IA64_NUM_TYPES
582 static unsigned char best_template
[N
][N
][N
];
585 /* Resource dependencies currently in effect */
587 int depind
; /* dependency index */
588 const struct ia64_dependency
*dependency
; /* actual dependency */
589 unsigned specific
:1, /* is this a specific bit/regno? */
590 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
591 int index
; /* specific regno/bit within dependency */
592 int note
; /* optional qualifying note (0 if none) */
596 int insn_srlz
; /* current insn serialization state */
597 int data_srlz
; /* current data serialization state */
598 int qp_regno
; /* qualifying predicate for this usage */
599 char *file
; /* what file marked this dependency */
600 unsigned int line
; /* what line marked this dependency */
601 struct mem_offset mem_offset
; /* optional memory offset hint */
602 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
603 int path
; /* corresponding code entry index */
605 static int regdepslen
= 0;
606 static int regdepstotlen
= 0;
607 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
608 static const char *dv_sem
[] = { "none", "implied", "impliedf",
609 "data", "instr", "specific", "stop", "other" };
610 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
612 /* Current state of PR mutexation */
613 static struct qpmutex
{
616 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
617 static int qp_mutexeslen
= 0;
618 static int qp_mutexestotlen
= 0;
619 static valueT qp_safe_across_calls
= 0;
621 /* Current state of PR implications */
622 static struct qp_imply
{
625 unsigned p2_branched
:1;
627 } *qp_implies
= NULL
;
628 static int qp_implieslen
= 0;
629 static int qp_impliestotlen
= 0;
631 /* Keep track of static GR values so that indirect register usage can
632 sometimes be tracked. */
637 } gr_values
[128] = {{ 1, 0, 0 }};
639 /* Remember the alignment frag. */
640 static fragS
*align_frag
;
642 /* These are the routines required to output the various types of
645 /* A slot_number is a frag address plus the slot index (0-2). We use the
646 frag address here so that if there is a section switch in the middle of
647 a function, then instructions emitted to a different section are not
648 counted. Since there may be more than one frag for a function, this
649 means we also need to keep track of which frag this address belongs to
650 so we can compute inter-frag distances. This also nicely solves the
651 problem with nops emitted for align directives, which can't easily be
652 counted, but can easily be derived from frag sizes. */
654 typedef struct unw_rec_list
{
656 unsigned long slot_number
;
658 unsigned long next_slot_number
;
659 fragS
*next_slot_frag
;
660 struct unw_rec_list
*next
;
663 #define SLOT_NUM_NOT_SET (unsigned)-1
665 /* Linked list of saved prologue counts. A very poor
666 implementation of a map from label numbers to prologue counts. */
667 typedef struct label_prologue_count
669 struct label_prologue_count
*next
;
670 unsigned long label_number
;
671 unsigned int prologue_count
;
672 } label_prologue_count
;
676 /* Maintain a list of unwind entries for the current function. */
680 /* Any unwind entires that should be attached to the current slot
681 that an insn is being constructed for. */
682 unw_rec_list
*current_entry
;
684 /* These are used to create the unwind table entry for this function. */
687 symbolS
*info
; /* pointer to unwind info */
688 symbolS
*personality_routine
;
690 subsegT saved_text_subseg
;
691 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
693 /* TRUE if processing unwind directives in a prologue region. */
696 unsigned int prologue_count
; /* number of .prologues seen so far */
697 /* Prologue counts at previous .label_state directives. */
698 struct label_prologue_count
* saved_prologue_counts
;
701 /* The input value is a negated offset from psp, and specifies an address
702 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
703 must add 16 and divide by 4 to get the encoded value. */
705 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
707 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
709 /* Forward declarations: */
710 static void set_section
PARAMS ((char *name
));
711 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
712 unsigned int, unsigned int));
713 static void dot_align (int);
714 static void dot_radix
PARAMS ((int));
715 static void dot_special_section
PARAMS ((int));
716 static void dot_proc
PARAMS ((int));
717 static void dot_fframe
PARAMS ((int));
718 static void dot_vframe
PARAMS ((int));
719 static void dot_vframesp
PARAMS ((int));
720 static void dot_vframepsp
PARAMS ((int));
721 static void dot_save
PARAMS ((int));
722 static void dot_restore
PARAMS ((int));
723 static void dot_restorereg
PARAMS ((int));
724 static void dot_restorereg_p
PARAMS ((int));
725 static void dot_handlerdata
PARAMS ((int));
726 static void dot_unwentry
PARAMS ((int));
727 static void dot_altrp
PARAMS ((int));
728 static void dot_savemem
PARAMS ((int));
729 static void dot_saveg
PARAMS ((int));
730 static void dot_savef
PARAMS ((int));
731 static void dot_saveb
PARAMS ((int));
732 static void dot_savegf
PARAMS ((int));
733 static void dot_spill
PARAMS ((int));
734 static void dot_spillreg
PARAMS ((int));
735 static void dot_spillmem
PARAMS ((int));
736 static void dot_spillreg_p
PARAMS ((int));
737 static void dot_spillmem_p
PARAMS ((int));
738 static void dot_label_state
PARAMS ((int));
739 static void dot_copy_state
PARAMS ((int));
740 static void dot_unwabi
PARAMS ((int));
741 static void dot_personality
PARAMS ((int));
742 static void dot_body
PARAMS ((int));
743 static void dot_prologue
PARAMS ((int));
744 static void dot_endp
PARAMS ((int));
745 static void dot_template
PARAMS ((int));
746 static void dot_regstk
PARAMS ((int));
747 static void dot_rot
PARAMS ((int));
748 static void dot_byteorder
PARAMS ((int));
749 static void dot_psr
PARAMS ((int));
750 static void dot_alias
PARAMS ((int));
751 static void dot_ln
PARAMS ((int));
752 static char *parse_section_name
PARAMS ((void));
753 static void dot_xdata
PARAMS ((int));
754 static void stmt_float_cons
PARAMS ((int));
755 static void stmt_cons_ua
PARAMS ((int));
756 static void dot_xfloat_cons
PARAMS ((int));
757 static void dot_xstringer
PARAMS ((int));
758 static void dot_xdata_ua
PARAMS ((int));
759 static void dot_xfloat_cons_ua
PARAMS ((int));
760 static void print_prmask
PARAMS ((valueT mask
));
761 static void dot_pred_rel
PARAMS ((int));
762 static void dot_reg_val
PARAMS ((int));
763 static void dot_serialize
PARAMS ((int));
764 static void dot_dv_mode
PARAMS ((int));
765 static void dot_entry
PARAMS ((int));
766 static void dot_mem_offset
PARAMS ((int));
767 static void add_unwind_entry
PARAMS((unw_rec_list
*ptr
));
768 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
769 static void declare_register_set
PARAMS ((const char *, int, int));
770 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
771 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
774 static int parse_operand
PARAMS ((expressionS
*e
));
775 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
776 static int errata_nop_necessary_p
PARAMS ((struct slot
*, enum ia64_unit
));
777 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
778 static void emit_one_bundle
PARAMS ((void));
779 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
780 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
781 bfd_reloc_code_real_type r_type
));
782 static void insn_group_break
PARAMS ((int, int, int));
783 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
784 struct rsrc
*, int depind
, int path
));
785 static void add_qp_mutex
PARAMS((valueT mask
));
786 static void add_qp_imply
PARAMS((int p1
, int p2
));
787 static void clear_qp_branch_flag
PARAMS((valueT mask
));
788 static void clear_qp_mutex
PARAMS((valueT mask
));
789 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
790 static int has_suffix_p
PARAMS((const char *, const char *));
791 static void clear_register_values
PARAMS ((void));
792 static void print_dependency
PARAMS ((const char *action
, int depind
));
793 static void instruction_serialization
PARAMS ((void));
794 static void data_serialization
PARAMS ((void));
795 static void remove_marked_resource
PARAMS ((struct rsrc
*));
796 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
797 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
798 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
799 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
800 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
801 struct ia64_opcode
*, int, struct rsrc
[], int, int));
802 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
803 static void check_dependencies
PARAMS((struct ia64_opcode
*));
804 static void mark_resources
PARAMS((struct ia64_opcode
*));
805 static void update_dependencies
PARAMS((struct ia64_opcode
*));
806 static void note_register_values
PARAMS((struct ia64_opcode
*));
807 static int qp_mutex
PARAMS ((int, int, int));
808 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
809 static void output_vbyte_mem
PARAMS ((int, char *, char *));
810 static void count_output
PARAMS ((int, char *, char *));
811 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
812 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
813 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
814 static void output_P1_format
PARAMS ((vbyte_func
, int));
815 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
816 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
817 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
818 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
819 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
820 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
821 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
822 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
823 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
824 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
825 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
826 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
827 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
828 static char format_ab_reg
PARAMS ((int, int));
829 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
831 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
832 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
834 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
835 static unw_rec_list
*output_endp
PARAMS ((void));
836 static unw_rec_list
*output_prologue
PARAMS ((void));
837 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
838 static unw_rec_list
*output_body
PARAMS ((void));
839 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
840 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
841 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
842 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
843 static unw_rec_list
*output_rp_when
PARAMS ((void));
844 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
845 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
846 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
847 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
848 static unw_rec_list
*output_pfs_when
PARAMS ((void));
849 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
850 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
851 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
852 static unw_rec_list
*output_preds_when
PARAMS ((void));
853 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
854 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
855 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
856 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
857 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
858 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
859 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
860 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
861 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
862 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
863 static unw_rec_list
*output_unat_when
PARAMS ((void));
864 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
865 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
866 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
867 static unw_rec_list
*output_lc_when
PARAMS ((void));
868 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
869 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
870 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
871 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
872 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
873 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
874 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
875 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
876 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
877 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
878 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
879 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
880 static unw_rec_list
*output_bsp_when
PARAMS ((void));
881 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
882 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
883 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
884 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
885 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
886 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
887 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
888 static unw_rec_list
*output_rnat_when
PARAMS ((void));
889 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
890 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
891 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
892 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
893 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
894 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
895 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
896 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int));
897 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int));
898 static unw_rec_list
*output_spill_psprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
900 static unw_rec_list
*output_spill_sprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
902 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
904 static unw_rec_list
*output_spill_reg_p
PARAMS ((unsigned int, unsigned int, unsigned int,
905 unsigned int, unsigned int));
906 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
907 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
908 static int calc_record_size
PARAMS ((unw_rec_list
*));
909 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
910 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
911 unsigned long, fragS
*,
913 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
914 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
915 static int convert_expr_to_ab_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
916 static int convert_expr_to_xy_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
917 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
918 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
919 static void free_saved_prologue_counts
PARAMS ((void));
921 /* Determine if application register REGNUM resides only in the integer
922 unit (as opposed to the memory unit). */
924 ar_is_only_in_integer_unit (int reg
)
927 return reg
>= 64 && reg
<= 111;
930 /* Determine if application register REGNUM resides only in the memory
931 unit (as opposed to the integer unit). */
933 ar_is_only_in_memory_unit (int reg
)
936 return reg
>= 0 && reg
<= 47;
939 /* Switch to section NAME and create section if necessary. It's
940 rather ugly that we have to manipulate input_line_pointer but I
941 don't see any other way to accomplish the same thing without
942 changing obj-elf.c (which may be the Right Thing, in the end). */
947 char *saved_input_line_pointer
;
949 saved_input_line_pointer
= input_line_pointer
;
950 input_line_pointer
= name
;
952 input_line_pointer
= saved_input_line_pointer
;
955 /* Map 's' to SHF_IA_64_SHORT. */
958 ia64_elf_section_letter (letter
, ptr_msg
)
963 return SHF_IA_64_SHORT
;
964 else if (letter
== 'o')
965 return SHF_LINK_ORDER
;
967 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
971 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
974 ia64_elf_section_flags (flags
, attr
, type
)
976 int attr
, type ATTRIBUTE_UNUSED
;
978 if (attr
& SHF_IA_64_SHORT
)
979 flags
|= SEC_SMALL_DATA
;
984 ia64_elf_section_type (str
, len
)
988 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
990 if (STREQ (ELF_STRING_ia64_unwind_info
))
993 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
996 if (STREQ (ELF_STRING_ia64_unwind
))
997 return SHT_IA_64_UNWIND
;
999 if (STREQ (ELF_STRING_ia64_unwind_once
))
1000 return SHT_IA_64_UNWIND
;
1002 if (STREQ ("unwind"))
1003 return SHT_IA_64_UNWIND
;
1010 set_regstack (ins
, locs
, outs
, rots
)
1011 unsigned int ins
, locs
, outs
, rots
;
1013 /* Size of frame. */
1016 sof
= ins
+ locs
+ outs
;
1019 as_bad ("Size of frame exceeds maximum of 96 registers");
1024 as_warn ("Size of rotating registers exceeds frame size");
1027 md
.in
.base
= REG_GR
+ 32;
1028 md
.loc
.base
= md
.in
.base
+ ins
;
1029 md
.out
.base
= md
.loc
.base
+ locs
;
1031 md
.in
.num_regs
= ins
;
1032 md
.loc
.num_regs
= locs
;
1033 md
.out
.num_regs
= outs
;
1034 md
.rot
.num_regs
= rots
;
1041 struct label_fix
*lfix
;
1043 subsegT saved_subseg
;
1046 if (!md
.last_text_seg
)
1049 saved_seg
= now_seg
;
1050 saved_subseg
= now_subseg
;
1052 subseg_set (md
.last_text_seg
, 0);
1054 while (md
.num_slots_in_use
> 0)
1055 emit_one_bundle (); /* force out queued instructions */
1057 /* In case there are labels following the last instruction, resolve
1059 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1061 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1062 symbol_set_frag (lfix
->sym
, frag_now
);
1064 CURR_SLOT
.label_fixups
= 0;
1065 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1067 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1068 symbol_set_frag (lfix
->sym
, frag_now
);
1070 CURR_SLOT
.tag_fixups
= 0;
1072 /* In case there are unwind directives following the last instruction,
1073 resolve those now. We only handle prologue, body, and endp directives
1074 here. Give an error for others. */
1075 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1077 switch (ptr
->r
.type
)
1083 ptr
->slot_number
= (unsigned long) frag_more (0);
1084 ptr
->slot_frag
= frag_now
;
1087 /* Allow any record which doesn't have a "t" field (i.e.,
1088 doesn't relate to a particular instruction). */
1104 as_bad (_("Unwind directive not followed by an instruction."));
1108 unwind
.current_entry
= NULL
;
1110 subseg_set (saved_seg
, saved_subseg
);
1112 if (md
.qp
.X_op
== O_register
)
1113 as_bad ("qualifying predicate not followed by instruction");
1117 ia64_do_align (int nbytes
)
1119 char *saved_input_line_pointer
= input_line_pointer
;
1121 input_line_pointer
= "";
1122 s_align_bytes (nbytes
);
1123 input_line_pointer
= saved_input_line_pointer
;
1127 ia64_cons_align (nbytes
)
1132 char *saved_input_line_pointer
= input_line_pointer
;
1133 input_line_pointer
= "";
1134 s_align_bytes (nbytes
);
1135 input_line_pointer
= saved_input_line_pointer
;
1139 /* Output COUNT bytes to a memory location. */
1140 static unsigned char *vbyte_mem_ptr
= NULL
;
1143 output_vbyte_mem (count
, ptr
, comment
)
1146 char *comment ATTRIBUTE_UNUSED
;
1149 if (vbyte_mem_ptr
== NULL
)
1154 for (x
= 0; x
< count
; x
++)
1155 *(vbyte_mem_ptr
++) = ptr
[x
];
1158 /* Count the number of bytes required for records. */
1159 static int vbyte_count
= 0;
1161 count_output (count
, ptr
, comment
)
1163 char *ptr ATTRIBUTE_UNUSED
;
1164 char *comment ATTRIBUTE_UNUSED
;
1166 vbyte_count
+= count
;
1170 output_R1_format (f
, rtype
, rlen
)
1172 unw_record_type rtype
;
1179 output_R3_format (f
, rtype
, rlen
);
1185 else if (rtype
!= prologue
)
1186 as_bad ("record type is not valid");
1188 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1189 (*f
) (1, &byte
, NULL
);
1193 output_R2_format (f
, mask
, grsave
, rlen
)
1200 mask
= (mask
& 0x0f);
1201 grsave
= (grsave
& 0x7f);
1203 bytes
[0] = (UNW_R2
| (mask
>> 1));
1204 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1205 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1206 (*f
) (count
, bytes
, NULL
);
1210 output_R3_format (f
, rtype
, rlen
)
1212 unw_record_type rtype
;
1219 output_R1_format (f
, rtype
, rlen
);
1225 else if (rtype
!= prologue
)
1226 as_bad ("record type is not valid");
1227 bytes
[0] = (UNW_R3
| r
);
1228 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1229 (*f
) (count
+ 1, bytes
, NULL
);
1233 output_P1_format (f
, brmask
)
1238 byte
= UNW_P1
| (brmask
& 0x1f);
1239 (*f
) (1, &byte
, NULL
);
1243 output_P2_format (f
, brmask
, gr
)
1249 brmask
= (brmask
& 0x1f);
1250 bytes
[0] = UNW_P2
| (brmask
>> 1);
1251 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1252 (*f
) (2, bytes
, NULL
);
1256 output_P3_format (f
, rtype
, reg
)
1258 unw_record_type rtype
;
1303 as_bad ("Invalid record type for P3 format.");
1305 bytes
[0] = (UNW_P3
| (r
>> 1));
1306 bytes
[1] = (((r
& 1) << 7) | reg
);
1307 (*f
) (2, bytes
, NULL
);
1311 output_P4_format (f
, imask
, imask_size
)
1313 unsigned char *imask
;
1314 unsigned long imask_size
;
1317 (*f
) (imask_size
, imask
, NULL
);
1321 output_P5_format (f
, grmask
, frmask
)
1324 unsigned long frmask
;
1327 grmask
= (grmask
& 0x0f);
1330 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1331 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1332 bytes
[3] = (frmask
& 0x000000ff);
1333 (*f
) (4, bytes
, NULL
);
1337 output_P6_format (f
, rtype
, rmask
)
1339 unw_record_type rtype
;
1345 if (rtype
== gr_mem
)
1347 else if (rtype
!= fr_mem
)
1348 as_bad ("Invalid record type for format P6");
1349 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1350 (*f
) (1, &byte
, NULL
);
1354 output_P7_format (f
, rtype
, w1
, w2
)
1356 unw_record_type rtype
;
1363 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1368 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1418 bytes
[0] = (UNW_P7
| r
);
1419 (*f
) (count
, bytes
, NULL
);
1423 output_P8_format (f
, rtype
, t
)
1425 unw_record_type rtype
;
1464 case bspstore_psprel
:
1467 case bspstore_sprel
:
1479 case priunat_when_gr
:
1482 case priunat_psprel
:
1488 case priunat_when_mem
:
1495 count
+= output_leb128 (bytes
+ 2, t
, 0);
1496 (*f
) (count
, bytes
, NULL
);
1500 output_P9_format (f
, grmask
, gr
)
1507 bytes
[1] = (grmask
& 0x0f);
1508 bytes
[2] = (gr
& 0x7f);
1509 (*f
) (3, bytes
, NULL
);
1513 output_P10_format (f
, abi
, context
)
1520 bytes
[1] = (abi
& 0xff);
1521 bytes
[2] = (context
& 0xff);
1522 (*f
) (3, bytes
, NULL
);
1526 output_B1_format (f
, rtype
, label
)
1528 unw_record_type rtype
;
1529 unsigned long label
;
1535 output_B4_format (f
, rtype
, label
);
1538 if (rtype
== copy_state
)
1540 else if (rtype
!= label_state
)
1541 as_bad ("Invalid record type for format B1");
1543 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1544 (*f
) (1, &byte
, NULL
);
1548 output_B2_format (f
, ecount
, t
)
1550 unsigned long ecount
;
1557 output_B3_format (f
, ecount
, t
);
1560 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1561 count
+= output_leb128 (bytes
+ 1, t
, 0);
1562 (*f
) (count
, bytes
, NULL
);
1566 output_B3_format (f
, ecount
, t
)
1568 unsigned long ecount
;
1575 output_B2_format (f
, ecount
, t
);
1579 count
+= output_leb128 (bytes
+ 1, t
, 0);
1580 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1581 (*f
) (count
, bytes
, NULL
);
1585 output_B4_format (f
, rtype
, label
)
1587 unw_record_type rtype
;
1588 unsigned long label
;
1595 output_B1_format (f
, rtype
, label
);
1599 if (rtype
== copy_state
)
1601 else if (rtype
!= label_state
)
1602 as_bad ("Invalid record type for format B1");
1604 bytes
[0] = (UNW_B4
| (r
<< 3));
1605 count
+= output_leb128 (bytes
+ 1, label
, 0);
1606 (*f
) (count
, bytes
, NULL
);
1610 format_ab_reg (ab
, reg
)
1617 ret
= (ab
<< 5) | reg
;
1622 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1624 unw_record_type rtype
;
1634 if (rtype
== spill_sprel
)
1636 else if (rtype
!= spill_psprel
)
1637 as_bad ("Invalid record type for format X1");
1638 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1639 count
+= output_leb128 (bytes
+ 2, t
, 0);
1640 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1641 (*f
) (count
, bytes
, NULL
);
1645 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1654 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1655 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1656 count
+= output_leb128 (bytes
+ 3, t
, 0);
1657 (*f
) (count
, bytes
, NULL
);
1661 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1663 unw_record_type rtype
;
1674 if (rtype
== spill_sprel_p
)
1676 else if (rtype
!= spill_psprel_p
)
1677 as_bad ("Invalid record type for format X3");
1678 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1679 bytes
[2] = format_ab_reg (ab
, reg
);
1680 count
+= output_leb128 (bytes
+ 3, t
, 0);
1681 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1682 (*f
) (count
, bytes
, NULL
);
1686 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1696 bytes
[1] = (qp
& 0x3f);
1697 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1698 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1699 count
+= output_leb128 (bytes
+ 4, t
, 0);
1700 (*f
) (count
, bytes
, NULL
);
1703 /* This function allocates a record list structure, and initializes fields. */
1705 static unw_rec_list
*
1706 alloc_record (unw_record_type t
)
1709 ptr
= xmalloc (sizeof (*ptr
));
1711 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1713 ptr
->next_slot_number
= 0;
1714 ptr
->next_slot_frag
= 0;
1718 /* Dummy unwind record used for calculating the length of the last prologue or
1721 static unw_rec_list
*
1724 unw_rec_list
*ptr
= alloc_record (endp
);
1728 static unw_rec_list
*
1731 unw_rec_list
*ptr
= alloc_record (prologue
);
1732 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1736 static unw_rec_list
*
1737 output_prologue_gr (saved_mask
, reg
)
1738 unsigned int saved_mask
;
1741 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1742 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1743 ptr
->r
.record
.r
.grmask
= saved_mask
;
1744 ptr
->r
.record
.r
.grsave
= reg
;
1748 static unw_rec_list
*
1751 unw_rec_list
*ptr
= alloc_record (body
);
1755 static unw_rec_list
*
1756 output_mem_stack_f (size
)
1759 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1760 ptr
->r
.record
.p
.size
= size
;
1764 static unw_rec_list
*
1765 output_mem_stack_v ()
1767 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1771 static unw_rec_list
*
1775 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1776 ptr
->r
.record
.p
.gr
= gr
;
1780 static unw_rec_list
*
1781 output_psp_sprel (offset
)
1782 unsigned int offset
;
1784 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1785 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1789 static unw_rec_list
*
1792 unw_rec_list
*ptr
= alloc_record (rp_when
);
1796 static unw_rec_list
*
1800 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1801 ptr
->r
.record
.p
.gr
= gr
;
1805 static unw_rec_list
*
1809 unw_rec_list
*ptr
= alloc_record (rp_br
);
1810 ptr
->r
.record
.p
.br
= br
;
1814 static unw_rec_list
*
1815 output_rp_psprel (offset
)
1816 unsigned int offset
;
1818 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1819 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1823 static unw_rec_list
*
1824 output_rp_sprel (offset
)
1825 unsigned int offset
;
1827 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1828 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1832 static unw_rec_list
*
1835 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1839 static unw_rec_list
*
1843 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1844 ptr
->r
.record
.p
.gr
= gr
;
1848 static unw_rec_list
*
1849 output_pfs_psprel (offset
)
1850 unsigned int offset
;
1852 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1853 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1857 static unw_rec_list
*
1858 output_pfs_sprel (offset
)
1859 unsigned int offset
;
1861 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1862 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1866 static unw_rec_list
*
1867 output_preds_when ()
1869 unw_rec_list
*ptr
= alloc_record (preds_when
);
1873 static unw_rec_list
*
1874 output_preds_gr (gr
)
1877 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1878 ptr
->r
.record
.p
.gr
= gr
;
1882 static unw_rec_list
*
1883 output_preds_psprel (offset
)
1884 unsigned int offset
;
1886 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1887 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1891 static unw_rec_list
*
1892 output_preds_sprel (offset
)
1893 unsigned int offset
;
1895 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1896 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1900 static unw_rec_list
*
1901 output_fr_mem (mask
)
1904 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1905 ptr
->r
.record
.p
.rmask
= mask
;
1909 static unw_rec_list
*
1910 output_frgr_mem (gr_mask
, fr_mask
)
1911 unsigned int gr_mask
;
1912 unsigned int fr_mask
;
1914 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1915 ptr
->r
.record
.p
.grmask
= gr_mask
;
1916 ptr
->r
.record
.p
.frmask
= fr_mask
;
1920 static unw_rec_list
*
1921 output_gr_gr (mask
, reg
)
1925 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1926 ptr
->r
.record
.p
.grmask
= mask
;
1927 ptr
->r
.record
.p
.gr
= reg
;
1931 static unw_rec_list
*
1932 output_gr_mem (mask
)
1935 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1936 ptr
->r
.record
.p
.rmask
= mask
;
1940 static unw_rec_list
*
1941 output_br_mem (unsigned int mask
)
1943 unw_rec_list
*ptr
= alloc_record (br_mem
);
1944 ptr
->r
.record
.p
.brmask
= mask
;
1948 static unw_rec_list
*
1949 output_br_gr (save_mask
, reg
)
1950 unsigned int save_mask
;
1953 unw_rec_list
*ptr
= alloc_record (br_gr
);
1954 ptr
->r
.record
.p
.brmask
= save_mask
;
1955 ptr
->r
.record
.p
.gr
= reg
;
1959 static unw_rec_list
*
1960 output_spill_base (offset
)
1961 unsigned int offset
;
1963 unw_rec_list
*ptr
= alloc_record (spill_base
);
1964 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1968 static unw_rec_list
*
1971 unw_rec_list
*ptr
= alloc_record (unat_when
);
1975 static unw_rec_list
*
1979 unw_rec_list
*ptr
= alloc_record (unat_gr
);
1980 ptr
->r
.record
.p
.gr
= gr
;
1984 static unw_rec_list
*
1985 output_unat_psprel (offset
)
1986 unsigned int offset
;
1988 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
1989 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1993 static unw_rec_list
*
1994 output_unat_sprel (offset
)
1995 unsigned int offset
;
1997 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
1998 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2002 static unw_rec_list
*
2005 unw_rec_list
*ptr
= alloc_record (lc_when
);
2009 static unw_rec_list
*
2013 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2014 ptr
->r
.record
.p
.gr
= gr
;
2018 static unw_rec_list
*
2019 output_lc_psprel (offset
)
2020 unsigned int offset
;
2022 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2023 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2027 static unw_rec_list
*
2028 output_lc_sprel (offset
)
2029 unsigned int offset
;
2031 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2032 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2036 static unw_rec_list
*
2039 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2043 static unw_rec_list
*
2047 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2048 ptr
->r
.record
.p
.gr
= gr
;
2052 static unw_rec_list
*
2053 output_fpsr_psprel (offset
)
2054 unsigned int offset
;
2056 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2057 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2061 static unw_rec_list
*
2062 output_fpsr_sprel (offset
)
2063 unsigned int offset
;
2065 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2066 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2070 static unw_rec_list
*
2071 output_priunat_when_gr ()
2073 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2077 static unw_rec_list
*
2078 output_priunat_when_mem ()
2080 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2084 static unw_rec_list
*
2085 output_priunat_gr (gr
)
2088 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2089 ptr
->r
.record
.p
.gr
= gr
;
2093 static unw_rec_list
*
2094 output_priunat_psprel (offset
)
2095 unsigned int offset
;
2097 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2098 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2102 static unw_rec_list
*
2103 output_priunat_sprel (offset
)
2104 unsigned int offset
;
2106 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2107 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2111 static unw_rec_list
*
2114 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2118 static unw_rec_list
*
2122 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2123 ptr
->r
.record
.p
.gr
= gr
;
2127 static unw_rec_list
*
2128 output_bsp_psprel (offset
)
2129 unsigned int offset
;
2131 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2132 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2136 static unw_rec_list
*
2137 output_bsp_sprel (offset
)
2138 unsigned int offset
;
2140 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2141 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2145 static unw_rec_list
*
2146 output_bspstore_when ()
2148 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2152 static unw_rec_list
*
2153 output_bspstore_gr (gr
)
2156 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2157 ptr
->r
.record
.p
.gr
= gr
;
2161 static unw_rec_list
*
2162 output_bspstore_psprel (offset
)
2163 unsigned int offset
;
2165 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2166 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2170 static unw_rec_list
*
2171 output_bspstore_sprel (offset
)
2172 unsigned int offset
;
2174 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2175 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2179 static unw_rec_list
*
2182 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2186 static unw_rec_list
*
2190 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2191 ptr
->r
.record
.p
.gr
= gr
;
2195 static unw_rec_list
*
2196 output_rnat_psprel (offset
)
2197 unsigned int offset
;
2199 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2200 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2204 static unw_rec_list
*
2205 output_rnat_sprel (offset
)
2206 unsigned int offset
;
2208 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2209 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2213 static unw_rec_list
*
2214 output_unwabi (abi
, context
)
2216 unsigned long context
;
2218 unw_rec_list
*ptr
= alloc_record (unwabi
);
2219 ptr
->r
.record
.p
.abi
= abi
;
2220 ptr
->r
.record
.p
.context
= context
;
2224 static unw_rec_list
*
2225 output_epilogue (unsigned long ecount
)
2227 unw_rec_list
*ptr
= alloc_record (epilogue
);
2228 ptr
->r
.record
.b
.ecount
= ecount
;
2232 static unw_rec_list
*
2233 output_label_state (unsigned long label
)
2235 unw_rec_list
*ptr
= alloc_record (label_state
);
2236 ptr
->r
.record
.b
.label
= label
;
2240 static unw_rec_list
*
2241 output_copy_state (unsigned long label
)
2243 unw_rec_list
*ptr
= alloc_record (copy_state
);
2244 ptr
->r
.record
.b
.label
= label
;
2248 static unw_rec_list
*
2249 output_spill_psprel (ab
, reg
, offset
)
2252 unsigned int offset
;
2254 unw_rec_list
*ptr
= alloc_record (spill_psprel
);
2255 ptr
->r
.record
.x
.ab
= ab
;
2256 ptr
->r
.record
.x
.reg
= reg
;
2257 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2261 static unw_rec_list
*
2262 output_spill_sprel (ab
, reg
, offset
)
2265 unsigned int offset
;
2267 unw_rec_list
*ptr
= alloc_record (spill_sprel
);
2268 ptr
->r
.record
.x
.ab
= ab
;
2269 ptr
->r
.record
.x
.reg
= reg
;
2270 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2274 static unw_rec_list
*
2275 output_spill_psprel_p (ab
, reg
, offset
, predicate
)
2278 unsigned int offset
;
2279 unsigned int predicate
;
2281 unw_rec_list
*ptr
= alloc_record (spill_psprel_p
);
2282 ptr
->r
.record
.x
.ab
= ab
;
2283 ptr
->r
.record
.x
.reg
= reg
;
2284 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2285 ptr
->r
.record
.x
.qp
= predicate
;
2289 static unw_rec_list
*
2290 output_spill_sprel_p (ab
, reg
, offset
, predicate
)
2293 unsigned int offset
;
2294 unsigned int predicate
;
2296 unw_rec_list
*ptr
= alloc_record (spill_sprel_p
);
2297 ptr
->r
.record
.x
.ab
= ab
;
2298 ptr
->r
.record
.x
.reg
= reg
;
2299 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2300 ptr
->r
.record
.x
.qp
= predicate
;
2304 static unw_rec_list
*
2305 output_spill_reg (ab
, reg
, targ_reg
, xy
)
2308 unsigned int targ_reg
;
2311 unw_rec_list
*ptr
= alloc_record (spill_reg
);
2312 ptr
->r
.record
.x
.ab
= ab
;
2313 ptr
->r
.record
.x
.reg
= reg
;
2314 ptr
->r
.record
.x
.treg
= targ_reg
;
2315 ptr
->r
.record
.x
.xy
= xy
;
2319 static unw_rec_list
*
2320 output_spill_reg_p (ab
, reg
, targ_reg
, xy
, predicate
)
2323 unsigned int targ_reg
;
2325 unsigned int predicate
;
2327 unw_rec_list
*ptr
= alloc_record (spill_reg_p
);
2328 ptr
->r
.record
.x
.ab
= ab
;
2329 ptr
->r
.record
.x
.reg
= reg
;
2330 ptr
->r
.record
.x
.treg
= targ_reg
;
2331 ptr
->r
.record
.x
.xy
= xy
;
2332 ptr
->r
.record
.x
.qp
= predicate
;
2336 /* Given a unw_rec_list process the correct format with the
2337 specified function. */
2340 process_one_record (ptr
, f
)
2344 unsigned long fr_mask
, gr_mask
;
2346 switch (ptr
->r
.type
)
2348 /* This is a dummy record that takes up no space in the output. */
2356 /* These are taken care of by prologue/prologue_gr. */
2361 if (ptr
->r
.type
== prologue_gr
)
2362 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2363 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2365 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2367 /* Output descriptor(s) for union of register spills (if any). */
2368 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2369 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2372 if ((fr_mask
& ~0xfUL
) == 0)
2373 output_P6_format (f
, fr_mem
, fr_mask
);
2376 output_P5_format (f
, gr_mask
, fr_mask
);
2381 output_P6_format (f
, gr_mem
, gr_mask
);
2382 if (ptr
->r
.record
.r
.mask
.br_mem
)
2383 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2385 /* output imask descriptor if necessary: */
2386 if (ptr
->r
.record
.r
.mask
.i
)
2387 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2388 ptr
->r
.record
.r
.imask_size
);
2392 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2396 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2397 ptr
->r
.record
.p
.size
);
2410 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2413 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2416 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2424 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2433 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2443 case bspstore_sprel
:
2445 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2448 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2451 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2454 as_bad ("spill_mask record unimplemented.");
2456 case priunat_when_gr
:
2457 case priunat_when_mem
:
2461 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2463 case priunat_psprel
:
2465 case bspstore_psprel
:
2467 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2470 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2473 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2477 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2480 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2481 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2482 ptr
->r
.record
.x
.pspoff
);
2485 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2486 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2487 ptr
->r
.record
.x
.spoff
);
2490 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2491 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2492 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2494 case spill_psprel_p
:
2495 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2496 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2497 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2500 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2501 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2502 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2505 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2506 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2507 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2511 as_bad ("record_type_not_valid");
2516 /* Given a unw_rec_list list, process all the records with
2517 the specified function. */
2519 process_unw_records (list
, f
)
2524 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2525 process_one_record (ptr
, f
);
2528 /* Determine the size of a record list in bytes. */
2530 calc_record_size (list
)
2534 process_unw_records (list
, count_output
);
2538 /* Update IMASK bitmask to reflect the fact that one or more registers
2539 of type TYPE are saved starting at instruction with index T. If N
2540 bits are set in REGMASK, it is assumed that instructions T through
2541 T+N-1 save these registers.
2545 1: instruction saves next fp reg
2546 2: instruction saves next general reg
2547 3: instruction saves next branch reg */
2549 set_imask (region
, regmask
, t
, type
)
2550 unw_rec_list
*region
;
2551 unsigned long regmask
;
2555 unsigned char *imask
;
2556 unsigned long imask_size
;
2560 imask
= region
->r
.record
.r
.mask
.i
;
2561 imask_size
= region
->r
.record
.r
.imask_size
;
2564 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2565 imask
= xmalloc (imask_size
);
2566 memset (imask
, 0, imask_size
);
2568 region
->r
.record
.r
.imask_size
= imask_size
;
2569 region
->r
.record
.r
.mask
.i
= imask
;
2573 pos
= 2 * (3 - t
% 4);
2576 if (i
>= imask_size
)
2578 as_bad ("Ignoring attempt to spill beyond end of region");
2582 imask
[i
] |= (type
& 0x3) << pos
;
2584 regmask
&= (regmask
- 1);
2594 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2595 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2596 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2600 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2601 unsigned long slot_addr
;
2603 unsigned long first_addr
;
2607 unsigned long index
= 0;
2609 /* First time we are called, the initial address and frag are invalid. */
2610 if (first_addr
== 0)
2613 /* If the two addresses are in different frags, then we need to add in
2614 the remaining size of this frag, and then the entire size of intermediate
2616 while (slot_frag
!= first_frag
)
2618 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2622 /* We can get the final addresses only during and after
2624 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2625 index
+= 3 * ((first_frag
->fr_next
->fr_address
2626 - first_frag
->fr_address
2627 - first_frag
->fr_fix
) >> 4);
2630 /* We don't know what the final addresses will be. We try our
2631 best to estimate. */
2632 switch (first_frag
->fr_type
)
2638 as_fatal ("only constant space allocation is supported");
2644 /* Take alignment into account. Assume the worst case
2645 before relaxation. */
2646 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2650 if (first_frag
->fr_symbol
)
2652 as_fatal ("only constant offsets are supported");
2656 index
+= 3 * (first_frag
->fr_offset
>> 4);
2660 /* Add in the full size of the frag converted to instruction slots. */
2661 index
+= 3 * (first_frag
->fr_fix
>> 4);
2662 /* Subtract away the initial part before first_addr. */
2663 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2664 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2666 /* Move to the beginning of the next frag. */
2667 first_frag
= first_frag
->fr_next
;
2668 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2671 /* Add in the used part of the last frag. */
2672 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2673 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2677 /* Optimize unwind record directives. */
2679 static unw_rec_list
*
2680 optimize_unw_records (list
)
2686 /* If the only unwind record is ".prologue" or ".prologue" followed
2687 by ".body", then we can optimize the unwind directives away. */
2688 if (list
->r
.type
== prologue
2689 && (list
->next
->r
.type
== endp
2690 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2696 /* Given a complete record list, process any records which have
2697 unresolved fields, (ie length counts for a prologue). After
2698 this has been run, all necessary information should be available
2699 within each record to generate an image. */
2702 fixup_unw_records (list
, before_relax
)
2706 unw_rec_list
*ptr
, *region
= 0;
2707 unsigned long first_addr
= 0, rlen
= 0, t
;
2708 fragS
*first_frag
= 0;
2710 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2712 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2713 as_bad (" Insn slot not set in unwind record.");
2714 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2715 first_addr
, first_frag
, before_relax
);
2716 switch (ptr
->r
.type
)
2724 unsigned long last_addr
= 0;
2725 fragS
*last_frag
= NULL
;
2727 first_addr
= ptr
->slot_number
;
2728 first_frag
= ptr
->slot_frag
;
2729 /* Find either the next body/prologue start, or the end of
2730 the function, and determine the size of the region. */
2731 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2732 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2733 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2735 last_addr
= last
->slot_number
;
2736 last_frag
= last
->slot_frag
;
2739 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2741 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2742 if (ptr
->r
.type
== body
)
2743 /* End of region. */
2751 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2753 /* This happens when a memory-stack-less procedure uses a
2754 ".restore sp" directive at the end of a region to pop
2756 ptr
->r
.record
.b
.t
= 0;
2767 case priunat_when_gr
:
2768 case priunat_when_mem
:
2772 ptr
->r
.record
.p
.t
= t
;
2780 case spill_psprel_p
:
2781 ptr
->r
.record
.x
.t
= t
;
2787 as_bad ("frgr_mem record before region record!\n");
2790 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2791 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2792 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2793 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2798 as_bad ("fr_mem record before region record!\n");
2801 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2802 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2807 as_bad ("gr_mem record before region record!\n");
2810 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2811 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2816 as_bad ("br_mem record before region record!\n");
2819 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2820 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2826 as_bad ("gr_gr record before region record!\n");
2829 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2834 as_bad ("br_gr record before region record!\n");
2837 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2846 /* Estimate the size of a frag before relaxing. We only have one type of frag
2847 to handle here, which is the unwind info frag. */
2850 ia64_estimate_size_before_relax (fragS
*frag
,
2851 asection
*segtype ATTRIBUTE_UNUSED
)
2856 /* ??? This code is identical to the first part of ia64_convert_frag. */
2857 list
= (unw_rec_list
*) frag
->fr_opcode
;
2858 fixup_unw_records (list
, 0);
2860 len
= calc_record_size (list
);
2861 /* pad to pointer-size boundary. */
2862 pad
= len
% md
.pointer_size
;
2864 len
+= md
.pointer_size
- pad
;
2865 /* Add 8 for the header + a pointer for the personality offset. */
2866 size
= len
+ 8 + md
.pointer_size
;
2868 /* fr_var carries the max_chars that we created the fragment with.
2869 We must, of course, have allocated enough memory earlier. */
2870 assert (frag
->fr_var
>= size
);
2872 return frag
->fr_fix
+ size
;
2875 /* This function converts a rs_machine_dependent variant frag into a
2876 normal fill frag with the unwind image from the the record list. */
2878 ia64_convert_frag (fragS
*frag
)
2884 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2885 list
= (unw_rec_list
*) frag
->fr_opcode
;
2886 fixup_unw_records (list
, 0);
2888 len
= calc_record_size (list
);
2889 /* pad to pointer-size boundary. */
2890 pad
= len
% md
.pointer_size
;
2892 len
+= md
.pointer_size
- pad
;
2893 /* Add 8 for the header + a pointer for the personality offset. */
2894 size
= len
+ 8 + md
.pointer_size
;
2896 /* fr_var carries the max_chars that we created the fragment with.
2897 We must, of course, have allocated enough memory earlier. */
2898 assert (frag
->fr_var
>= size
);
2900 /* Initialize the header area. fr_offset is initialized with
2901 unwind.personality_routine. */
2902 if (frag
->fr_offset
)
2904 if (md
.flags
& EF_IA_64_ABI64
)
2905 flag_value
= (bfd_vma
) 3 << 32;
2907 /* 32-bit unwind info block. */
2908 flag_value
= (bfd_vma
) 0x1003 << 32;
2913 md_number_to_chars (frag
->fr_literal
,
2914 (((bfd_vma
) 1 << 48) /* Version. */
2915 | flag_value
/* U & E handler flags. */
2916 | (len
/ md
.pointer_size
)), /* Length. */
2919 /* Skip the header. */
2920 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
2921 process_unw_records (list
, output_vbyte_mem
);
2923 /* Fill the padding bytes with zeros. */
2925 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
2926 md
.pointer_size
- pad
);
2928 frag
->fr_fix
+= size
;
2929 frag
->fr_type
= rs_fill
;
2931 frag
->fr_offset
= 0;
2935 convert_expr_to_ab_reg (e
, ab
, regp
)
2942 if (e
->X_op
!= O_register
)
2945 reg
= e
->X_add_number
;
2946 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2949 *regp
= reg
- REG_GR
;
2951 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
2952 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
2955 *regp
= reg
- REG_FR
;
2957 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
2960 *regp
= reg
- REG_BR
;
2967 case REG_PR
: *regp
= 0; break;
2968 case REG_PSP
: *regp
= 1; break;
2969 case REG_PRIUNAT
: *regp
= 2; break;
2970 case REG_BR
+ 0: *regp
= 3; break;
2971 case REG_AR
+ AR_BSP
: *regp
= 4; break;
2972 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
2973 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
2974 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
2975 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
2976 case REG_AR
+ AR_PFS
: *regp
= 9; break;
2977 case REG_AR
+ AR_LC
: *regp
= 10; break;
2987 convert_expr_to_xy_reg (e
, xy
, regp
)
2994 if (e
->X_op
!= O_register
)
2997 reg
= e
->X_add_number
;
2999 if (/* reg >= REG_GR && */ reg
<= (REG_GR
+ 127))
3002 *regp
= reg
- REG_GR
;
3004 else if (reg
>= REG_FR
&& reg
<= (REG_FR
+ 127))
3007 *regp
= reg
- REG_FR
;
3009 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3012 *regp
= reg
- REG_BR
;
3022 /* The current frag is an alignment frag. */
3023 align_frag
= frag_now
;
3024 s_align_bytes (arg
);
3029 int dummy ATTRIBUTE_UNUSED
;
3034 radix
= *input_line_pointer
++;
3036 if (radix
!= 'C' && !is_end_of_line
[(unsigned char) radix
])
3038 as_bad ("Radix `%c' unsupported", *input_line_pointer
);
3039 ignore_rest_of_line ();
3044 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3046 dot_special_section (which
)
3049 set_section ((char *) special_section_name
[which
]);
3053 add_unwind_entry (ptr
)
3057 unwind
.tail
->next
= ptr
;
3062 /* The current entry can in fact be a chain of unwind entries. */
3063 if (unwind
.current_entry
== NULL
)
3064 unwind
.current_entry
= ptr
;
3069 int dummy ATTRIBUTE_UNUSED
;
3075 if (e
.X_op
!= O_constant
)
3076 as_bad ("Operand to .fframe must be a constant");
3078 add_unwind_entry (output_mem_stack_f (e
.X_add_number
));
3083 int dummy ATTRIBUTE_UNUSED
;
3089 reg
= e
.X_add_number
- REG_GR
;
3090 if (e
.X_op
== O_register
&& reg
< 128)
3092 add_unwind_entry (output_mem_stack_v ());
3093 if (! (unwind
.prologue_mask
& 2))
3094 add_unwind_entry (output_psp_gr (reg
));
3097 as_bad ("First operand to .vframe must be a general register");
3101 dot_vframesp (dummy
)
3102 int dummy ATTRIBUTE_UNUSED
;
3107 if (e
.X_op
== O_constant
)
3109 add_unwind_entry (output_mem_stack_v ());
3110 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3113 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3117 dot_vframepsp (dummy
)
3118 int dummy ATTRIBUTE_UNUSED
;
3123 if (e
.X_op
== O_constant
)
3125 add_unwind_entry (output_mem_stack_v ());
3126 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3129 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3134 int dummy ATTRIBUTE_UNUSED
;
3140 sep
= parse_operand (&e1
);
3142 as_bad ("No second operand to .save");
3143 sep
= parse_operand (&e2
);
3145 reg1
= e1
.X_add_number
;
3146 reg2
= e2
.X_add_number
- REG_GR
;
3148 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3149 if (e1
.X_op
== O_register
)
3151 if (e2
.X_op
== O_register
&& reg2
>= 0 && reg2
< 128)
3155 case REG_AR
+ AR_BSP
:
3156 add_unwind_entry (output_bsp_when ());
3157 add_unwind_entry (output_bsp_gr (reg2
));
3159 case REG_AR
+ AR_BSPSTORE
:
3160 add_unwind_entry (output_bspstore_when ());
3161 add_unwind_entry (output_bspstore_gr (reg2
));
3163 case REG_AR
+ AR_RNAT
:
3164 add_unwind_entry (output_rnat_when ());
3165 add_unwind_entry (output_rnat_gr (reg2
));
3167 case REG_AR
+ AR_UNAT
:
3168 add_unwind_entry (output_unat_when ());
3169 add_unwind_entry (output_unat_gr (reg2
));
3171 case REG_AR
+ AR_FPSR
:
3172 add_unwind_entry (output_fpsr_when ());
3173 add_unwind_entry (output_fpsr_gr (reg2
));
3175 case REG_AR
+ AR_PFS
:
3176 add_unwind_entry (output_pfs_when ());
3177 if (! (unwind
.prologue_mask
& 4))
3178 add_unwind_entry (output_pfs_gr (reg2
));
3180 case REG_AR
+ AR_LC
:
3181 add_unwind_entry (output_lc_when ());
3182 add_unwind_entry (output_lc_gr (reg2
));
3185 add_unwind_entry (output_rp_when ());
3186 if (! (unwind
.prologue_mask
& 8))
3187 add_unwind_entry (output_rp_gr (reg2
));
3190 add_unwind_entry (output_preds_when ());
3191 if (! (unwind
.prologue_mask
& 1))
3192 add_unwind_entry (output_preds_gr (reg2
));
3195 add_unwind_entry (output_priunat_when_gr ());
3196 add_unwind_entry (output_priunat_gr (reg2
));
3199 as_bad ("First operand not a valid register");
3203 as_bad (" Second operand not a valid register");
3206 as_bad ("First operand not a register");
3211 int dummy ATTRIBUTE_UNUSED
;
3214 unsigned long ecount
; /* # of _additional_ regions to pop */
3217 sep
= parse_operand (&e1
);
3218 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3220 as_bad ("First operand to .restore must be stack pointer (sp)");
3226 parse_operand (&e2
);
3227 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3229 as_bad ("Second operand to .restore must be a constant >= 0");
3232 ecount
= e2
.X_add_number
;
3235 ecount
= unwind
.prologue_count
- 1;
3237 if (ecount
>= unwind
.prologue_count
)
3239 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3240 ecount
+ 1, unwind
.prologue_count
);
3244 add_unwind_entry (output_epilogue (ecount
));
3246 if (ecount
< unwind
.prologue_count
)
3247 unwind
.prologue_count
-= ecount
+ 1;
3249 unwind
.prologue_count
= 0;
3253 dot_restorereg (dummy
)
3254 int dummy ATTRIBUTE_UNUSED
;
3256 unsigned int ab
, reg
;
3261 if (!convert_expr_to_ab_reg (&e
, &ab
, ®
))
3263 as_bad ("First operand to .restorereg must be a preserved register");
3266 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0));
3270 dot_restorereg_p (dummy
)
3271 int dummy ATTRIBUTE_UNUSED
;
3273 unsigned int qp
, ab
, reg
;
3277 sep
= parse_operand (&e1
);
3280 as_bad ("No second operand to .restorereg.p");
3284 parse_operand (&e2
);
3286 qp
= e1
.X_add_number
- REG_P
;
3287 if (e1
.X_op
!= O_register
|| qp
> 63)
3289 as_bad ("First operand to .restorereg.p must be a predicate");
3293 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3295 as_bad ("Second operand to .restorereg.p must be a preserved register");
3298 add_unwind_entry (output_spill_reg_p (ab
, reg
, 0, 0, qp
));
3301 static char *special_linkonce_name
[] =
3303 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3307 start_unwind_section (const segT text_seg
, int sec_index
, int linkonce_empty
)
3310 Use a slightly ugly scheme to derive the unwind section names from
3311 the text section name:
3313 text sect. unwind table sect.
3314 name: name: comments:
3315 ---------- ----------------- --------------------------------
3317 .text.foo .IA_64.unwind.text.foo
3318 .foo .IA_64.unwind.foo
3320 .gnu.linkonce.ia64unw.foo
3321 _info .IA_64.unwind_info gas issues error message (ditto)
3322 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3324 This mapping is done so that:
3326 (a) An object file with unwind info only in .text will use
3327 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3328 This follows the letter of the ABI and also ensures backwards
3329 compatibility with older toolchains.
3331 (b) An object file with unwind info in multiple text sections
3332 will use separate unwind sections for each text section.
3333 This allows us to properly set the "sh_info" and "sh_link"
3334 fields in SHT_IA_64_UNWIND as required by the ABI and also
3335 lets GNU ld support programs with multiple segments
3336 containing unwind info (as might be the case for certain
3337 embedded applications).
3339 (c) An error is issued if there would be a name clash.
3342 const char *text_name
, *sec_text_name
;
3344 const char *prefix
= special_section_name
[sec_index
];
3346 size_t prefix_len
, suffix_len
, sec_name_len
;
3348 sec_text_name
= segment_name (text_seg
);
3349 text_name
= sec_text_name
;
3350 if (strncmp (text_name
, "_info", 5) == 0)
3352 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3354 ignore_rest_of_line ();
3357 if (strcmp (text_name
, ".text") == 0)
3360 /* Build the unwind section name by appending the (possibly stripped)
3361 text section name to the unwind prefix. */
3363 if (strncmp (text_name
, ".gnu.linkonce.t.",
3364 sizeof (".gnu.linkonce.t.") - 1) == 0)
3366 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3367 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3369 else if (linkonce_empty
)
3372 prefix_len
= strlen (prefix
);
3373 suffix_len
= strlen (suffix
);
3374 sec_name_len
= prefix_len
+ suffix_len
;
3375 sec_name
= alloca (sec_name_len
+ 1);
3376 memcpy (sec_name
, prefix
, prefix_len
);
3377 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3378 sec_name
[sec_name_len
] = '\0';
3380 /* Handle COMDAT group. */
3381 if (suffix
== text_name
&& (text_seg
->flags
& SEC_LINK_ONCE
) != 0)
3384 size_t len
, group_name_len
;
3385 const char *group_name
= elf_group_name (text_seg
);
3387 if (group_name
== NULL
)
3389 as_bad ("Group section `%s' has no group signature",
3391 ignore_rest_of_line ();
3394 /* We have to construct a fake section directive. */
3395 group_name_len
= strlen (group_name
);
3397 + 16 /* ,"aG",@progbits, */
3398 + group_name_len
/* ,group_name */
3401 section
= alloca (len
+ 1);
3402 memcpy (section
, sec_name
, sec_name_len
);
3403 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3404 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3405 memcpy (section
+ len
- 7, ",comdat", 7);
3406 section
[len
] = '\0';
3407 set_section (section
);
3411 set_section (sec_name
);
3412 bfd_set_section_flags (stdoutput
, now_seg
,
3413 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3416 elf_linked_to_section (now_seg
) = text_seg
;
3420 generate_unwind_image (const segT text_seg
)
3425 /* Mark the end of the unwind info, so that we can compute the size of the
3426 last unwind region. */
3427 add_unwind_entry (output_endp ());
3429 /* Force out pending instructions, to make sure all unwind records have
3430 a valid slot_number field. */
3431 ia64_flush_insns ();
3433 /* Generate the unwind record. */
3434 list
= optimize_unw_records (unwind
.list
);
3435 fixup_unw_records (list
, 1);
3436 size
= calc_record_size (list
);
3438 if (size
> 0 || unwind
.force_unwind_entry
)
3440 unwind
.force_unwind_entry
= 0;
3441 /* pad to pointer-size boundary. */
3442 pad
= size
% md
.pointer_size
;
3444 size
+= md
.pointer_size
- pad
;
3445 /* Add 8 for the header + a pointer for the personality
3447 size
+= 8 + md
.pointer_size
;
3450 /* If there are unwind records, switch sections, and output the info. */
3454 bfd_reloc_code_real_type reloc
;
3456 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
, 0);
3458 /* Make sure the section has 4 byte alignment for ILP32 and
3459 8 byte alignment for LP64. */
3460 frag_align (md
.pointer_size_shift
, 0, 0);
3461 record_alignment (now_seg
, md
.pointer_size_shift
);
3463 /* Set expression which points to start of unwind descriptor area. */
3464 unwind
.info
= expr_build_dot ();
3466 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3467 (offsetT
) (long) unwind
.personality_routine
,
3470 /* Add the personality address to the image. */
3471 if (unwind
.personality_routine
!= 0)
3473 exp
.X_op
= O_symbol
;
3474 exp
.X_add_symbol
= unwind
.personality_routine
;
3475 exp
.X_add_number
= 0;
3477 if (md
.flags
& EF_IA_64_BE
)
3479 if (md
.flags
& EF_IA_64_ABI64
)
3480 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3482 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3486 if (md
.flags
& EF_IA_64_ABI64
)
3487 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3489 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3492 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3493 md
.pointer_size
, &exp
, 0, reloc
);
3494 unwind
.personality_routine
= 0;
3498 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
, 1);
3500 free_saved_prologue_counts ();
3501 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3505 dot_handlerdata (dummy
)
3506 int dummy ATTRIBUTE_UNUSED
;
3508 unwind
.force_unwind_entry
= 1;
3510 /* Remember which segment we're in so we can switch back after .endp */
3511 unwind
.saved_text_seg
= now_seg
;
3512 unwind
.saved_text_subseg
= now_subseg
;
3514 /* Generate unwind info into unwind-info section and then leave that
3515 section as the currently active one so dataXX directives go into
3516 the language specific data area of the unwind info block. */
3517 generate_unwind_image (now_seg
);
3518 demand_empty_rest_of_line ();
3522 dot_unwentry (dummy
)
3523 int dummy ATTRIBUTE_UNUSED
;
3525 unwind
.force_unwind_entry
= 1;
3526 demand_empty_rest_of_line ();
3531 int dummy ATTRIBUTE_UNUSED
;
3537 reg
= e
.X_add_number
- REG_BR
;
3538 if (e
.X_op
== O_register
&& reg
< 8)
3539 add_unwind_entry (output_rp_br (reg
));
3541 as_bad ("First operand not a valid branch register");
3545 dot_savemem (psprel
)
3552 sep
= parse_operand (&e1
);
3554 as_bad ("No second operand to .save%ssp", psprel
? "p" : "");
3555 sep
= parse_operand (&e2
);
3557 reg1
= e1
.X_add_number
;
3558 val
= e2
.X_add_number
;
3560 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3561 if (e1
.X_op
== O_register
)
3563 if (e2
.X_op
== O_constant
)
3567 case REG_AR
+ AR_BSP
:
3568 add_unwind_entry (output_bsp_when ());
3569 add_unwind_entry ((psprel
3571 : output_bsp_sprel
) (val
));
3573 case REG_AR
+ AR_BSPSTORE
:
3574 add_unwind_entry (output_bspstore_when ());
3575 add_unwind_entry ((psprel
3576 ? output_bspstore_psprel
3577 : output_bspstore_sprel
) (val
));
3579 case REG_AR
+ AR_RNAT
:
3580 add_unwind_entry (output_rnat_when ());
3581 add_unwind_entry ((psprel
3582 ? output_rnat_psprel
3583 : output_rnat_sprel
) (val
));
3585 case REG_AR
+ AR_UNAT
:
3586 add_unwind_entry (output_unat_when ());
3587 add_unwind_entry ((psprel
3588 ? output_unat_psprel
3589 : output_unat_sprel
) (val
));
3591 case REG_AR
+ AR_FPSR
:
3592 add_unwind_entry (output_fpsr_when ());
3593 add_unwind_entry ((psprel
3594 ? output_fpsr_psprel
3595 : output_fpsr_sprel
) (val
));
3597 case REG_AR
+ AR_PFS
:
3598 add_unwind_entry (output_pfs_when ());
3599 add_unwind_entry ((psprel
3601 : output_pfs_sprel
) (val
));
3603 case REG_AR
+ AR_LC
:
3604 add_unwind_entry (output_lc_when ());
3605 add_unwind_entry ((psprel
3607 : output_lc_sprel
) (val
));
3610 add_unwind_entry (output_rp_when ());
3611 add_unwind_entry ((psprel
3613 : output_rp_sprel
) (val
));
3616 add_unwind_entry (output_preds_when ());
3617 add_unwind_entry ((psprel
3618 ? output_preds_psprel
3619 : output_preds_sprel
) (val
));
3622 add_unwind_entry (output_priunat_when_mem ());
3623 add_unwind_entry ((psprel
3624 ? output_priunat_psprel
3625 : output_priunat_sprel
) (val
));
3628 as_bad ("First operand not a valid register");
3632 as_bad (" Second operand not a valid constant");
3635 as_bad ("First operand not a register");
3640 int dummy ATTRIBUTE_UNUSED
;
3644 sep
= parse_operand (&e1
);
3646 parse_operand (&e2
);
3648 if (e1
.X_op
!= O_constant
)
3649 as_bad ("First operand to .save.g must be a constant.");
3652 int grmask
= e1
.X_add_number
;
3654 add_unwind_entry (output_gr_mem (grmask
));
3657 int reg
= e2
.X_add_number
- REG_GR
;
3658 if (e2
.X_op
== O_register
&& reg
>= 0 && reg
< 128)
3659 add_unwind_entry (output_gr_gr (grmask
, reg
));
3661 as_bad ("Second operand is an invalid register.");
3668 int dummy ATTRIBUTE_UNUSED
;
3672 sep
= parse_operand (&e1
);
3674 if (e1
.X_op
!= O_constant
)
3675 as_bad ("Operand to .save.f must be a constant.");
3677 add_unwind_entry (output_fr_mem (e1
.X_add_number
));
3682 int dummy ATTRIBUTE_UNUSED
;
3689 sep
= parse_operand (&e1
);
3690 if (e1
.X_op
!= O_constant
)
3692 as_bad ("First operand to .save.b must be a constant.");
3695 brmask
= e1
.X_add_number
;
3699 sep
= parse_operand (&e2
);
3700 reg
= e2
.X_add_number
- REG_GR
;
3701 if (e2
.X_op
!= O_register
|| reg
> 127)
3703 as_bad ("Second operand to .save.b must be a general register.");
3706 add_unwind_entry (output_br_gr (brmask
, e2
.X_add_number
));
3709 add_unwind_entry (output_br_mem (brmask
));
3711 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3712 demand_empty_rest_of_line ();
3717 int dummy ATTRIBUTE_UNUSED
;
3721 sep
= parse_operand (&e1
);
3723 parse_operand (&e2
);
3725 if (e1
.X_op
!= O_constant
|| sep
!= ',' || e2
.X_op
!= O_constant
)
3726 as_bad ("Both operands of .save.gf must be constants.");
3729 int grmask
= e1
.X_add_number
;
3730 int frmask
= e2
.X_add_number
;
3731 add_unwind_entry (output_frgr_mem (grmask
, frmask
));
3737 int dummy ATTRIBUTE_UNUSED
;
3742 sep
= parse_operand (&e
);
3743 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3744 demand_empty_rest_of_line ();
3746 if (e
.X_op
!= O_constant
)
3747 as_bad ("Operand to .spill must be a constant");
3749 add_unwind_entry (output_spill_base (e
.X_add_number
));
3753 dot_spillreg (dummy
)
3754 int dummy ATTRIBUTE_UNUSED
;
3756 int sep
, ab
, xy
, reg
, treg
;
3759 sep
= parse_operand (&e1
);
3762 as_bad ("No second operand to .spillreg");
3766 parse_operand (&e2
);
3768 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3770 as_bad ("First operand to .spillreg must be a preserved register");
3774 if (!convert_expr_to_xy_reg (&e2
, &xy
, &treg
))
3776 as_bad ("Second operand to .spillreg must be a register");
3780 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
));
3784 dot_spillmem (psprel
)
3790 sep
= parse_operand (&e1
);
3793 as_bad ("Second operand missing");
3797 parse_operand (&e2
);
3799 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3801 as_bad ("First operand to .spill%s must be a preserved register",
3802 psprel
? "psp" : "sp");
3806 if (e2
.X_op
!= O_constant
)
3808 as_bad ("Second operand to .spill%s must be a constant",
3809 psprel
? "psp" : "sp");
3814 add_unwind_entry (output_spill_psprel (ab
, reg
, e2
.X_add_number
));
3816 add_unwind_entry (output_spill_sprel (ab
, reg
, e2
.X_add_number
));
3820 dot_spillreg_p (dummy
)
3821 int dummy ATTRIBUTE_UNUSED
;
3823 int sep
, ab
, xy
, reg
, treg
;
3824 expressionS e1
, e2
, e3
;
3827 sep
= parse_operand (&e1
);
3830 as_bad ("No second and third operand to .spillreg.p");
3834 sep
= parse_operand (&e2
);
3837 as_bad ("No third operand to .spillreg.p");
3841 parse_operand (&e3
);
3843 qp
= e1
.X_add_number
- REG_P
;
3845 if (e1
.X_op
!= O_register
|| qp
> 63)
3847 as_bad ("First operand to .spillreg.p must be a predicate");
3851 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3853 as_bad ("Second operand to .spillreg.p must be a preserved register");
3857 if (!convert_expr_to_xy_reg (&e3
, &xy
, &treg
))
3859 as_bad ("Third operand to .spillreg.p must be a register");
3863 add_unwind_entry (output_spill_reg_p (ab
, reg
, treg
, xy
, qp
));
3867 dot_spillmem_p (psprel
)
3870 expressionS e1
, e2
, e3
;
3874 sep
= parse_operand (&e1
);
3877 as_bad ("Second operand missing");
3881 parse_operand (&e2
);
3884 as_bad ("Second operand missing");
3888 parse_operand (&e3
);
3890 qp
= e1
.X_add_number
- REG_P
;
3891 if (e1
.X_op
!= O_register
|| qp
> 63)
3893 as_bad ("First operand to .spill%s_p must be a predicate",
3894 psprel
? "psp" : "sp");
3898 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3900 as_bad ("Second operand to .spill%s_p must be a preserved register",
3901 psprel
? "psp" : "sp");
3905 if (e3
.X_op
!= O_constant
)
3907 as_bad ("Third operand to .spill%s_p must be a constant",
3908 psprel
? "psp" : "sp");
3913 add_unwind_entry (output_spill_psprel_p (ab
, reg
, e3
.X_add_number
, qp
));
3915 add_unwind_entry (output_spill_sprel_p (ab
, reg
, e3
.X_add_number
, qp
));
3919 get_saved_prologue_count (lbl
)
3922 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3924 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
3928 return lpc
->prologue_count
;
3930 as_bad ("Missing .label_state %ld", lbl
);
3935 save_prologue_count (lbl
, count
)
3939 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3941 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
3945 lpc
->prologue_count
= count
;
3948 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
3950 new_lpc
->next
= unwind
.saved_prologue_counts
;
3951 new_lpc
->label_number
= lbl
;
3952 new_lpc
->prologue_count
= count
;
3953 unwind
.saved_prologue_counts
= new_lpc
;
3958 free_saved_prologue_counts ()
3960 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3961 label_prologue_count
*next
;
3970 unwind
.saved_prologue_counts
= NULL
;
3974 dot_label_state (dummy
)
3975 int dummy ATTRIBUTE_UNUSED
;
3980 if (e
.X_op
!= O_constant
)
3982 as_bad ("Operand to .label_state must be a constant");
3985 add_unwind_entry (output_label_state (e
.X_add_number
));
3986 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
3990 dot_copy_state (dummy
)
3991 int dummy ATTRIBUTE_UNUSED
;
3996 if (e
.X_op
!= O_constant
)
3998 as_bad ("Operand to .copy_state must be a constant");
4001 add_unwind_entry (output_copy_state (e
.X_add_number
));
4002 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4007 int dummy ATTRIBUTE_UNUSED
;
4012 sep
= parse_operand (&e1
);
4015 as_bad ("Second operand to .unwabi missing");
4018 sep
= parse_operand (&e2
);
4019 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4020 demand_empty_rest_of_line ();
4022 if (e1
.X_op
!= O_constant
)
4024 as_bad ("First operand to .unwabi must be a constant");
4028 if (e2
.X_op
!= O_constant
)
4030 as_bad ("Second operand to .unwabi must be a constant");
4034 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
));
4038 dot_personality (dummy
)
4039 int dummy ATTRIBUTE_UNUSED
;
4043 name
= input_line_pointer
;
4044 c
= get_symbol_end ();
4045 p
= input_line_pointer
;
4046 unwind
.personality_routine
= symbol_find_or_make (name
);
4047 unwind
.force_unwind_entry
= 1;
4050 demand_empty_rest_of_line ();
4055 int dummy ATTRIBUTE_UNUSED
;
4060 unwind
.proc_start
= expr_build_dot ();
4061 /* Parse names of main and alternate entry points and mark them as
4062 function symbols: */
4066 name
= input_line_pointer
;
4067 c
= get_symbol_end ();
4068 p
= input_line_pointer
;
4069 sym
= symbol_find_or_make (name
);
4070 if (unwind
.proc_start
== 0)
4072 unwind
.proc_start
= sym
;
4074 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4077 if (*input_line_pointer
!= ',')
4079 ++input_line_pointer
;
4081 demand_empty_rest_of_line ();
4084 unwind
.prologue_count
= 0;
4085 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4086 unwind
.personality_routine
= 0;
4091 int dummy ATTRIBUTE_UNUSED
;
4093 unwind
.prologue
= 0;
4094 unwind
.prologue_mask
= 0;
4096 add_unwind_entry (output_body ());
4097 demand_empty_rest_of_line ();
4101 dot_prologue (dummy
)
4102 int dummy ATTRIBUTE_UNUSED
;
4105 int mask
= 0, grsave
= 0;
4107 if (!is_it_end_of_statement ())
4110 sep
= parse_operand (&e1
);
4112 as_bad ("No second operand to .prologue");
4113 sep
= parse_operand (&e2
);
4114 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4115 demand_empty_rest_of_line ();
4117 if (e1
.X_op
== O_constant
)
4119 mask
= e1
.X_add_number
;
4121 if (e2
.X_op
== O_constant
)
4122 grsave
= e2
.X_add_number
;
4123 else if (e2
.X_op
== O_register
4124 && (grsave
= e2
.X_add_number
- REG_GR
) < 128)
4127 as_bad ("Second operand not a constant or general register");
4129 add_unwind_entry (output_prologue_gr (mask
, grsave
));
4132 as_bad ("First operand not a constant");
4135 add_unwind_entry (output_prologue ());
4137 unwind
.prologue
= 1;
4138 unwind
.prologue_mask
= mask
;
4139 ++unwind
.prologue_count
;
4144 int dummy ATTRIBUTE_UNUSED
;
4148 int bytes_per_address
;
4151 subsegT saved_subseg
;
4155 if (unwind
.saved_text_seg
)
4157 saved_seg
= unwind
.saved_text_seg
;
4158 saved_subseg
= unwind
.saved_text_subseg
;
4159 unwind
.saved_text_seg
= NULL
;
4163 saved_seg
= now_seg
;
4164 saved_subseg
= now_subseg
;
4167 insn_group_break (1, 0, 0);
4169 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4171 generate_unwind_image (saved_seg
);
4173 if (unwind
.info
|| unwind
.force_unwind_entry
)
4175 subseg_set (md
.last_text_seg
, 0);
4176 unwind
.proc_end
= expr_build_dot ();
4178 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
, 0);
4180 /* Make sure that section has 4 byte alignment for ILP32 and
4181 8 byte alignment for LP64. */
4182 record_alignment (now_seg
, md
.pointer_size_shift
);
4184 /* Need space for 3 pointers for procedure start, procedure end,
4186 ptr
= frag_more (3 * md
.pointer_size
);
4187 where
= frag_now_fix () - (3 * md
.pointer_size
);
4188 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4190 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4191 e
.X_op
= O_pseudo_fixup
;
4192 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4194 e
.X_add_symbol
= unwind
.proc_start
;
4195 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4197 e
.X_op
= O_pseudo_fixup
;
4198 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4200 e
.X_add_symbol
= unwind
.proc_end
;
4201 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4202 bytes_per_address
, &e
);
4206 e
.X_op
= O_pseudo_fixup
;
4207 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4209 e
.X_add_symbol
= unwind
.info
;
4210 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4211 bytes_per_address
, &e
);
4214 md_number_to_chars (ptr
+ (bytes_per_address
* 2), 0,
4219 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
, 1);
4221 subseg_set (saved_seg
, saved_subseg
);
4223 /* Parse names of main and alternate entry points and set symbol sizes. */
4227 name
= input_line_pointer
;
4228 c
= get_symbol_end ();
4229 p
= input_line_pointer
;
4230 sym
= symbol_find (name
);
4231 if (sym
&& unwind
.proc_start
4232 && (symbol_get_bfdsym (sym
)->flags
& BSF_FUNCTION
)
4233 && S_GET_SIZE (sym
) == 0 && symbol_get_obj (sym
)->size
== NULL
)
4235 fragS
*fr
= symbol_get_frag (unwind
.proc_start
);
4236 fragS
*frag
= symbol_get_frag (sym
);
4238 /* Check whether the function label is at or beyond last
4240 while (fr
&& fr
!= frag
)
4244 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4245 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4248 symbol_get_obj (sym
)->size
=
4249 (expressionS
*) xmalloc (sizeof (expressionS
));
4250 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4251 symbol_get_obj (sym
)->size
->X_add_symbol
4252 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4253 frag_now_fix (), frag_now
);
4254 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4255 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4261 if (*input_line_pointer
!= ',')
4263 ++input_line_pointer
;
4265 demand_empty_rest_of_line ();
4266 unwind
.proc_start
= unwind
.proc_end
= unwind
.info
= 0;
4270 dot_template (template)
4273 CURR_SLOT
.user_template
= template;
4278 int dummy ATTRIBUTE_UNUSED
;
4280 int ins
, locs
, outs
, rots
;
4282 if (is_it_end_of_statement ())
4283 ins
= locs
= outs
= rots
= 0;
4286 ins
= get_absolute_expression ();
4287 if (*input_line_pointer
++ != ',')
4289 locs
= get_absolute_expression ();
4290 if (*input_line_pointer
++ != ',')
4292 outs
= get_absolute_expression ();
4293 if (*input_line_pointer
++ != ',')
4295 rots
= get_absolute_expression ();
4297 set_regstack (ins
, locs
, outs
, rots
);
4301 as_bad ("Comma expected");
4302 ignore_rest_of_line ();
4309 unsigned num_regs
, num_alloced
= 0;
4310 struct dynreg
**drpp
, *dr
;
4311 int ch
, base_reg
= 0;
4317 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4318 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4319 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4323 /* First, remove existing names from hash table. */
4324 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4326 hash_delete (md
.dynreg_hash
, dr
->name
);
4330 drpp
= &md
.dynreg
[type
];
4333 start
= input_line_pointer
;
4334 ch
= get_symbol_end ();
4335 *input_line_pointer
= ch
;
4336 len
= (input_line_pointer
- start
);
4339 if (*input_line_pointer
!= '[')
4341 as_bad ("Expected '['");
4344 ++input_line_pointer
; /* skip '[' */
4346 num_regs
= get_absolute_expression ();
4348 if (*input_line_pointer
++ != ']')
4350 as_bad ("Expected ']'");
4355 num_alloced
+= num_regs
;
4359 if (num_alloced
> md
.rot
.num_regs
)
4361 as_bad ("Used more than the declared %d rotating registers",
4367 if (num_alloced
> 96)
4369 as_bad ("Used more than the available 96 rotating registers");
4374 if (num_alloced
> 48)
4376 as_bad ("Used more than the available 48 rotating registers");
4385 name
= obstack_alloc (¬es
, len
+ 1);
4386 memcpy (name
, start
, len
);
4391 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4392 memset (*drpp
, 0, sizeof (*dr
));
4397 dr
->num_regs
= num_regs
;
4398 dr
->base
= base_reg
;
4400 base_reg
+= num_regs
;
4402 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4404 as_bad ("Attempt to redefine register set `%s'", name
);
4408 if (*input_line_pointer
!= ',')
4410 ++input_line_pointer
; /* skip comma */
4413 demand_empty_rest_of_line ();
4417 ignore_rest_of_line ();
4421 dot_byteorder (byteorder
)
4424 segment_info_type
*seginfo
= seg_info (now_seg
);
4426 if (byteorder
== -1)
4428 if (seginfo
->tc_segment_info_data
.endian
== 0)
4429 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4430 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4433 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4435 if (target_big_endian
!= byteorder
)
4437 target_big_endian
= byteorder
;
4438 if (target_big_endian
)
4440 ia64_number_to_chars
= number_to_chars_bigendian
;
4441 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4445 ia64_number_to_chars
= number_to_chars_littleendian
;
4446 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4453 int dummy ATTRIBUTE_UNUSED
;
4460 option
= input_line_pointer
;
4461 ch
= get_symbol_end ();
4462 if (strcmp (option
, "lsb") == 0)
4463 md
.flags
&= ~EF_IA_64_BE
;
4464 else if (strcmp (option
, "msb") == 0)
4465 md
.flags
|= EF_IA_64_BE
;
4466 else if (strcmp (option
, "abi32") == 0)
4467 md
.flags
&= ~EF_IA_64_ABI64
;
4468 else if (strcmp (option
, "abi64") == 0)
4469 md
.flags
|= EF_IA_64_ABI64
;
4471 as_bad ("Unknown psr option `%s'", option
);
4472 *input_line_pointer
= ch
;
4475 if (*input_line_pointer
!= ',')
4478 ++input_line_pointer
;
4481 demand_empty_rest_of_line ();
4486 int dummy ATTRIBUTE_UNUSED
;
4488 new_logical_line (0, get_absolute_expression ());
4489 demand_empty_rest_of_line ();
4493 parse_section_name ()
4499 if (*input_line_pointer
!= '"')
4501 as_bad ("Missing section name");
4502 ignore_rest_of_line ();
4505 name
= demand_copy_C_string (&len
);
4508 ignore_rest_of_line ();
4512 if (*input_line_pointer
!= ',')
4514 as_bad ("Comma expected after section name");
4515 ignore_rest_of_line ();
4518 ++input_line_pointer
; /* skip comma */
4526 char *name
= parse_section_name ();
4530 md
.keep_pending_output
= 1;
4533 obj_elf_previous (0);
4534 md
.keep_pending_output
= 0;
4537 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4540 stmt_float_cons (kind
)
4561 ia64_do_align (alignment
);
4569 int saved_auto_align
= md
.auto_align
;
4573 md
.auto_align
= saved_auto_align
;
4577 dot_xfloat_cons (kind
)
4580 char *name
= parse_section_name ();
4584 md
.keep_pending_output
= 1;
4586 stmt_float_cons (kind
);
4587 obj_elf_previous (0);
4588 md
.keep_pending_output
= 0;
4592 dot_xstringer (zero
)
4595 char *name
= parse_section_name ();
4599 md
.keep_pending_output
= 1;
4602 obj_elf_previous (0);
4603 md
.keep_pending_output
= 0;
4610 int saved_auto_align
= md
.auto_align
;
4611 char *name
= parse_section_name ();
4615 md
.keep_pending_output
= 1;
4619 md
.auto_align
= saved_auto_align
;
4620 obj_elf_previous (0);
4621 md
.keep_pending_output
= 0;
4625 dot_xfloat_cons_ua (kind
)
4628 int saved_auto_align
= md
.auto_align
;
4629 char *name
= parse_section_name ();
4633 md
.keep_pending_output
= 1;
4636 stmt_float_cons (kind
);
4637 md
.auto_align
= saved_auto_align
;
4638 obj_elf_previous (0);
4639 md
.keep_pending_output
= 0;
4642 /* .reg.val <regname>,value */
4646 int dummy ATTRIBUTE_UNUSED
;
4651 if (reg
.X_op
!= O_register
)
4653 as_bad (_("Register name expected"));
4654 ignore_rest_of_line ();
4656 else if (*input_line_pointer
++ != ',')
4658 as_bad (_("Comma expected"));
4659 ignore_rest_of_line ();
4663 valueT value
= get_absolute_expression ();
4664 int regno
= reg
.X_add_number
;
4665 if (regno
< REG_GR
|| regno
> REG_GR
+ 128)
4666 as_warn (_("Register value annotation ignored"));
4669 gr_values
[regno
- REG_GR
].known
= 1;
4670 gr_values
[regno
- REG_GR
].value
= value
;
4671 gr_values
[regno
- REG_GR
].path
= md
.path
;
4674 demand_empty_rest_of_line ();
4679 .serialize.instruction
4682 dot_serialize (type
)
4685 insn_group_break (0, 0, 0);
4687 instruction_serialization ();
4689 data_serialization ();
4690 insn_group_break (0, 0, 0);
4691 demand_empty_rest_of_line ();
4694 /* select dv checking mode
4699 A stop is inserted when changing modes
4706 if (md
.manual_bundling
)
4707 as_warn (_("Directive invalid within a bundle"));
4709 if (type
== 'E' || type
== 'A')
4710 md
.mode_explicitly_set
= 0;
4712 md
.mode_explicitly_set
= 1;
4719 if (md
.explicit_mode
)
4720 insn_group_break (1, 0, 0);
4721 md
.explicit_mode
= 0;
4725 if (!md
.explicit_mode
)
4726 insn_group_break (1, 0, 0);
4727 md
.explicit_mode
= 1;
4731 if (md
.explicit_mode
!= md
.default_explicit_mode
)
4732 insn_group_break (1, 0, 0);
4733 md
.explicit_mode
= md
.default_explicit_mode
;
4734 md
.mode_explicitly_set
= 0;
4745 for (regno
= 0; regno
< 64; regno
++)
4747 if (mask
& ((valueT
) 1 << regno
))
4749 fprintf (stderr
, "%s p%d", comma
, regno
);
4756 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4757 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4758 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4759 .pred.safe_across_calls p1 [, p2 [,...]]
4768 int p1
= -1, p2
= -1;
4772 if (*input_line_pointer
!= '"')
4774 as_bad (_("Missing predicate relation type"));
4775 ignore_rest_of_line ();
4781 char *form
= demand_copy_C_string (&len
);
4782 if (strcmp (form
, "mutex") == 0)
4784 else if (strcmp (form
, "clear") == 0)
4786 else if (strcmp (form
, "imply") == 0)
4790 as_bad (_("Unrecognized predicate relation type"));
4791 ignore_rest_of_line ();
4795 if (*input_line_pointer
== ',')
4796 ++input_line_pointer
;
4806 if (TOUPPER (*input_line_pointer
) != 'P'
4807 || (regno
= atoi (++input_line_pointer
)) < 0
4810 as_bad (_("Predicate register expected"));
4811 ignore_rest_of_line ();
4814 while (ISDIGIT (*input_line_pointer
))
4815 ++input_line_pointer
;
4822 as_warn (_("Duplicate predicate register ignored"));
4825 /* See if it's a range. */
4826 if (*input_line_pointer
== '-')
4829 ++input_line_pointer
;
4831 if (TOUPPER (*input_line_pointer
) != 'P'
4832 || (regno
= atoi (++input_line_pointer
)) < 0
4835 as_bad (_("Predicate register expected"));
4836 ignore_rest_of_line ();
4839 while (ISDIGIT (*input_line_pointer
))
4840 ++input_line_pointer
;
4844 as_bad (_("Bad register range"));
4845 ignore_rest_of_line ();
4856 if (*input_line_pointer
!= ',')
4858 ++input_line_pointer
;
4867 clear_qp_mutex (mask
);
4868 clear_qp_implies (mask
, (valueT
) 0);
4871 if (count
!= 2 || p1
== -1 || p2
== -1)
4872 as_bad (_("Predicate source and target required"));
4873 else if (p1
== 0 || p2
== 0)
4874 as_bad (_("Use of p0 is not valid in this context"));
4876 add_qp_imply (p1
, p2
);
4881 as_bad (_("At least two PR arguments expected"));
4886 as_bad (_("Use of p0 is not valid in this context"));
4889 add_qp_mutex (mask
);
4892 /* note that we don't override any existing relations */
4895 as_bad (_("At least one PR argument expected"));
4900 fprintf (stderr
, "Safe across calls: ");
4901 print_prmask (mask
);
4902 fprintf (stderr
, "\n");
4904 qp_safe_across_calls
= mask
;
4907 demand_empty_rest_of_line ();
4910 /* .entry label [, label [, ...]]
4911 Hint to DV code that the given labels are to be considered entry points.
4912 Otherwise, only global labels are considered entry points. */
4916 int dummy ATTRIBUTE_UNUSED
;
4925 name
= input_line_pointer
;
4926 c
= get_symbol_end ();
4927 symbolP
= symbol_find_or_make (name
);
4929 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
4931 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
4934 *input_line_pointer
= c
;
4936 c
= *input_line_pointer
;
4939 input_line_pointer
++;
4941 if (*input_line_pointer
== '\n')
4947 demand_empty_rest_of_line ();
4950 /* .mem.offset offset, base
4951 "base" is used to distinguish between offsets from a different base. */
4954 dot_mem_offset (dummy
)
4955 int dummy ATTRIBUTE_UNUSED
;
4957 md
.mem_offset
.hint
= 1;
4958 md
.mem_offset
.offset
= get_absolute_expression ();
4959 if (*input_line_pointer
!= ',')
4961 as_bad (_("Comma expected"));
4962 ignore_rest_of_line ();
4965 ++input_line_pointer
;
4966 md
.mem_offset
.base
= get_absolute_expression ();
4967 demand_empty_rest_of_line ();
4970 /* ia64-specific pseudo-ops: */
4971 const pseudo_typeS md_pseudo_table
[] =
4973 { "radix", dot_radix
, 0 },
4974 { "lcomm", s_lcomm_bytes
, 1 },
4975 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
4976 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
4977 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
4978 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
4979 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
4980 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
4981 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
4982 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
4983 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
4984 { "proc", dot_proc
, 0 },
4985 { "body", dot_body
, 0 },
4986 { "prologue", dot_prologue
, 0 },
4987 { "endp", dot_endp
, 0 },
4989 { "fframe", dot_fframe
, 0 },
4990 { "vframe", dot_vframe
, 0 },
4991 { "vframesp", dot_vframesp
, 0 },
4992 { "vframepsp", dot_vframepsp
, 0 },
4993 { "save", dot_save
, 0 },
4994 { "restore", dot_restore
, 0 },
4995 { "restorereg", dot_restorereg
, 0 },
4996 { "restorereg.p", dot_restorereg_p
, 0 },
4997 { "handlerdata", dot_handlerdata
, 0 },
4998 { "unwentry", dot_unwentry
, 0 },
4999 { "altrp", dot_altrp
, 0 },
5000 { "savesp", dot_savemem
, 0 },
5001 { "savepsp", dot_savemem
, 1 },
5002 { "save.g", dot_saveg
, 0 },
5003 { "save.f", dot_savef
, 0 },
5004 { "save.b", dot_saveb
, 0 },
5005 { "save.gf", dot_savegf
, 0 },
5006 { "spill", dot_spill
, 0 },
5007 { "spillreg", dot_spillreg
, 0 },
5008 { "spillsp", dot_spillmem
, 0 },
5009 { "spillpsp", dot_spillmem
, 1 },
5010 { "spillreg.p", dot_spillreg_p
, 0 },
5011 { "spillsp.p", dot_spillmem_p
, 0 },
5012 { "spillpsp.p", dot_spillmem_p
, 1 },
5013 { "label_state", dot_label_state
, 0 },
5014 { "copy_state", dot_copy_state
, 0 },
5015 { "unwabi", dot_unwabi
, 0 },
5016 { "personality", dot_personality
, 0 },
5018 { "estate", dot_estate
, 0 },
5020 { "mii", dot_template
, 0x0 },
5021 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5022 { "mlx", dot_template
, 0x2 },
5023 { "mmi", dot_template
, 0x4 },
5024 { "mfi", dot_template
, 0x6 },
5025 { "mmf", dot_template
, 0x7 },
5026 { "mib", dot_template
, 0x8 },
5027 { "mbb", dot_template
, 0x9 },
5028 { "bbb", dot_template
, 0xb },
5029 { "mmb", dot_template
, 0xc },
5030 { "mfb", dot_template
, 0xe },
5032 { "lb", dot_scope
, 0 },
5033 { "le", dot_scope
, 1 },
5035 { "align", dot_align
, 0 },
5036 { "regstk", dot_regstk
, 0 },
5037 { "rotr", dot_rot
, DYNREG_GR
},
5038 { "rotf", dot_rot
, DYNREG_FR
},
5039 { "rotp", dot_rot
, DYNREG_PR
},
5040 { "lsb", dot_byteorder
, 0 },
5041 { "msb", dot_byteorder
, 1 },
5042 { "psr", dot_psr
, 0 },
5043 { "alias", dot_alias
, 0 },
5044 { "secalias", dot_alias
, 1 },
5045 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5047 { "xdata1", dot_xdata
, 1 },
5048 { "xdata2", dot_xdata
, 2 },
5049 { "xdata4", dot_xdata
, 4 },
5050 { "xdata8", dot_xdata
, 8 },
5051 { "xreal4", dot_xfloat_cons
, 'f' },
5052 { "xreal8", dot_xfloat_cons
, 'd' },
5053 { "xreal10", dot_xfloat_cons
, 'x' },
5054 { "xreal16", dot_xfloat_cons
, 'X' },
5055 { "xstring", dot_xstringer
, 0 },
5056 { "xstringz", dot_xstringer
, 1 },
5058 /* unaligned versions: */
5059 { "xdata2.ua", dot_xdata_ua
, 2 },
5060 { "xdata4.ua", dot_xdata_ua
, 4 },
5061 { "xdata8.ua", dot_xdata_ua
, 8 },
5062 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5063 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5064 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5065 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5067 /* annotations/DV checking support */
5068 { "entry", dot_entry
, 0 },
5069 { "mem.offset", dot_mem_offset
, 0 },
5070 { "pred.rel", dot_pred_rel
, 0 },
5071 { "pred.rel.clear", dot_pred_rel
, 'c' },
5072 { "pred.rel.imply", dot_pred_rel
, 'i' },
5073 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5074 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5075 { "reg.val", dot_reg_val
, 0 },
5076 { "serialize.data", dot_serialize
, 0 },
5077 { "serialize.instruction", dot_serialize
, 1 },
5078 { "auto", dot_dv_mode
, 'a' },
5079 { "explicit", dot_dv_mode
, 'e' },
5080 { "default", dot_dv_mode
, 'd' },
5082 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5083 IA-64 aligns data allocation pseudo-ops by default, so we have to
5084 tell it that these ones are supposed to be unaligned. Long term,
5085 should rewrite so that only IA-64 specific data allocation pseudo-ops
5086 are aligned by default. */
5087 {"2byte", stmt_cons_ua
, 2},
5088 {"4byte", stmt_cons_ua
, 4},
5089 {"8byte", stmt_cons_ua
, 8},
5094 static const struct pseudo_opcode
5097 void (*handler
) (int);
5102 /* these are more like pseudo-ops, but don't start with a dot */
5103 { "data1", cons
, 1 },
5104 { "data2", cons
, 2 },
5105 { "data4", cons
, 4 },
5106 { "data8", cons
, 8 },
5107 { "data16", cons
, 16 },
5108 { "real4", stmt_float_cons
, 'f' },
5109 { "real8", stmt_float_cons
, 'd' },
5110 { "real10", stmt_float_cons
, 'x' },
5111 { "real16", stmt_float_cons
, 'X' },
5112 { "string", stringer
, 0 },
5113 { "stringz", stringer
, 1 },
5115 /* unaligned versions: */
5116 { "data2.ua", stmt_cons_ua
, 2 },
5117 { "data4.ua", stmt_cons_ua
, 4 },
5118 { "data8.ua", stmt_cons_ua
, 8 },
5119 { "data16.ua", stmt_cons_ua
, 16 },
5120 { "real4.ua", float_cons
, 'f' },
5121 { "real8.ua", float_cons
, 'd' },
5122 { "real10.ua", float_cons
, 'x' },
5123 { "real16.ua", float_cons
, 'X' },
5126 /* Declare a register by creating a symbol for it and entering it in
5127 the symbol table. */
5130 declare_register (name
, regnum
)
5137 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
5139 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5141 as_fatal ("Inserting \"%s\" into register table failed: %s",
5148 declare_register_set (prefix
, num_regs
, base_regnum
)
5156 for (i
= 0; i
< num_regs
; ++i
)
5158 sprintf (name
, "%s%u", prefix
, i
);
5159 declare_register (name
, base_regnum
+ i
);
5164 operand_width (opnd
)
5165 enum ia64_opnd opnd
;
5167 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5168 unsigned int bits
= 0;
5172 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5173 bits
+= odesc
->field
[i
].bits
;
5178 static enum operand_match_result
5179 operand_match (idesc
, index
, e
)
5180 const struct ia64_opcode
*idesc
;
5184 enum ia64_opnd opnd
= idesc
->operands
[index
];
5185 int bits
, relocatable
= 0;
5186 struct insn_fix
*fix
;
5193 case IA64_OPND_AR_CCV
:
5194 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5195 return OPERAND_MATCH
;
5198 case IA64_OPND_AR_CSD
:
5199 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5200 return OPERAND_MATCH
;
5203 case IA64_OPND_AR_PFS
:
5204 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5205 return OPERAND_MATCH
;
5209 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5210 return OPERAND_MATCH
;
5214 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5215 return OPERAND_MATCH
;
5219 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5220 return OPERAND_MATCH
;
5223 case IA64_OPND_PR_ROT
:
5224 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5225 return OPERAND_MATCH
;
5229 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5230 return OPERAND_MATCH
;
5233 case IA64_OPND_PSR_L
:
5234 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5235 return OPERAND_MATCH
;
5238 case IA64_OPND_PSR_UM
:
5239 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5240 return OPERAND_MATCH
;
5244 if (e
->X_op
== O_constant
)
5246 if (e
->X_add_number
== 1)
5247 return OPERAND_MATCH
;
5249 return OPERAND_OUT_OF_RANGE
;
5254 if (e
->X_op
== O_constant
)
5256 if (e
->X_add_number
== 8)
5257 return OPERAND_MATCH
;
5259 return OPERAND_OUT_OF_RANGE
;
5264 if (e
->X_op
== O_constant
)
5266 if (e
->X_add_number
== 16)
5267 return OPERAND_MATCH
;
5269 return OPERAND_OUT_OF_RANGE
;
5273 /* register operands: */
5276 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5277 && e
->X_add_number
< REG_AR
+ 128)
5278 return OPERAND_MATCH
;
5283 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5284 && e
->X_add_number
< REG_BR
+ 8)
5285 return OPERAND_MATCH
;
5289 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5290 && e
->X_add_number
< REG_CR
+ 128)
5291 return OPERAND_MATCH
;
5298 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5299 && e
->X_add_number
< REG_FR
+ 128)
5300 return OPERAND_MATCH
;
5305 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5306 && e
->X_add_number
< REG_P
+ 64)
5307 return OPERAND_MATCH
;
5313 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5314 && e
->X_add_number
< REG_GR
+ 128)
5315 return OPERAND_MATCH
;
5318 case IA64_OPND_R3_2
:
5319 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5321 if (e
->X_add_number
< REG_GR
+ 4)
5322 return OPERAND_MATCH
;
5323 else if (e
->X_add_number
< REG_GR
+ 128)
5324 return OPERAND_OUT_OF_RANGE
;
5328 /* indirect operands: */
5329 case IA64_OPND_CPUID_R3
:
5330 case IA64_OPND_DBR_R3
:
5331 case IA64_OPND_DTR_R3
:
5332 case IA64_OPND_ITR_R3
:
5333 case IA64_OPND_IBR_R3
:
5334 case IA64_OPND_MSR_R3
:
5335 case IA64_OPND_PKR_R3
:
5336 case IA64_OPND_PMC_R3
:
5337 case IA64_OPND_PMD_R3
:
5338 case IA64_OPND_RR_R3
:
5339 if (e
->X_op
== O_index
&& e
->X_op_symbol
5340 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5341 == opnd
- IA64_OPND_CPUID_R3
))
5342 return OPERAND_MATCH
;
5346 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5347 return OPERAND_MATCH
;
5350 /* immediate operands: */
5351 case IA64_OPND_CNT2a
:
5352 case IA64_OPND_LEN4
:
5353 case IA64_OPND_LEN6
:
5354 bits
= operand_width (idesc
->operands
[index
]);
5355 if (e
->X_op
== O_constant
)
5357 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5358 return OPERAND_MATCH
;
5360 return OPERAND_OUT_OF_RANGE
;
5364 case IA64_OPND_CNT2b
:
5365 if (e
->X_op
== O_constant
)
5367 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5368 return OPERAND_MATCH
;
5370 return OPERAND_OUT_OF_RANGE
;
5374 case IA64_OPND_CNT2c
:
5375 val
= e
->X_add_number
;
5376 if (e
->X_op
== O_constant
)
5378 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5379 return OPERAND_MATCH
;
5381 return OPERAND_OUT_OF_RANGE
;
5386 /* SOR must be an integer multiple of 8 */
5387 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5388 return OPERAND_OUT_OF_RANGE
;
5391 if (e
->X_op
== O_constant
)
5393 if ((bfd_vma
) e
->X_add_number
<= 96)
5394 return OPERAND_MATCH
;
5396 return OPERAND_OUT_OF_RANGE
;
5400 case IA64_OPND_IMMU62
:
5401 if (e
->X_op
== O_constant
)
5403 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5404 return OPERAND_MATCH
;
5406 return OPERAND_OUT_OF_RANGE
;
5410 /* FIXME -- need 62-bit relocation type */
5411 as_bad (_("62-bit relocation not yet implemented"));
5415 case IA64_OPND_IMMU64
:
5416 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5417 || e
->X_op
== O_subtract
)
5419 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5420 fix
->code
= BFD_RELOC_IA64_IMM64
;
5421 if (e
->X_op
!= O_subtract
)
5423 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5424 if (e
->X_op
== O_pseudo_fixup
)
5428 fix
->opnd
= idesc
->operands
[index
];
5431 ++CURR_SLOT
.num_fixups
;
5432 return OPERAND_MATCH
;
5434 else if (e
->X_op
== O_constant
)
5435 return OPERAND_MATCH
;
5438 case IA64_OPND_CCNT5
:
5439 case IA64_OPND_CNT5
:
5440 case IA64_OPND_CNT6
:
5441 case IA64_OPND_CPOS6a
:
5442 case IA64_OPND_CPOS6b
:
5443 case IA64_OPND_CPOS6c
:
5444 case IA64_OPND_IMMU2
:
5445 case IA64_OPND_IMMU7a
:
5446 case IA64_OPND_IMMU7b
:
5447 case IA64_OPND_IMMU21
:
5448 case IA64_OPND_IMMU24
:
5449 case IA64_OPND_MBTYPE4
:
5450 case IA64_OPND_MHTYPE8
:
5451 case IA64_OPND_POS6
:
5452 bits
= operand_width (idesc
->operands
[index
]);
5453 if (e
->X_op
== O_constant
)
5455 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5456 return OPERAND_MATCH
;
5458 return OPERAND_OUT_OF_RANGE
;
5462 case IA64_OPND_IMMU9
:
5463 bits
= operand_width (idesc
->operands
[index
]);
5464 if (e
->X_op
== O_constant
)
5466 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5468 int lobits
= e
->X_add_number
& 0x3;
5469 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5470 e
->X_add_number
|= (bfd_vma
) 0x3;
5471 return OPERAND_MATCH
;
5474 return OPERAND_OUT_OF_RANGE
;
5478 case IA64_OPND_IMM44
:
5479 /* least 16 bits must be zero */
5480 if ((e
->X_add_number
& 0xffff) != 0)
5481 /* XXX technically, this is wrong: we should not be issuing warning
5482 messages until we're sure this instruction pattern is going to
5484 as_warn (_("lower 16 bits of mask ignored"));
5486 if (e
->X_op
== O_constant
)
5488 if (((e
->X_add_number
>= 0
5489 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5490 || (e
->X_add_number
< 0
5491 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5494 if (e
->X_add_number
>= 0
5495 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5497 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5499 return OPERAND_MATCH
;
5502 return OPERAND_OUT_OF_RANGE
;
5506 case IA64_OPND_IMM17
:
5507 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5508 if (e
->X_op
== O_constant
)
5510 if (((e
->X_add_number
>= 0
5511 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5512 || (e
->X_add_number
< 0
5513 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5516 if (e
->X_add_number
>= 0
5517 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5519 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5521 return OPERAND_MATCH
;
5524 return OPERAND_OUT_OF_RANGE
;
5528 case IA64_OPND_IMM14
:
5529 case IA64_OPND_IMM22
:
5531 case IA64_OPND_IMM1
:
5532 case IA64_OPND_IMM8
:
5533 case IA64_OPND_IMM8U4
:
5534 case IA64_OPND_IMM8M1
:
5535 case IA64_OPND_IMM8M1U4
:
5536 case IA64_OPND_IMM8M1U8
:
5537 case IA64_OPND_IMM9a
:
5538 case IA64_OPND_IMM9b
:
5539 bits
= operand_width (idesc
->operands
[index
]);
5540 if (relocatable
&& (e
->X_op
== O_symbol
5541 || e
->X_op
== O_subtract
5542 || e
->X_op
== O_pseudo_fixup
))
5544 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5546 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5547 fix
->code
= BFD_RELOC_IA64_IMM14
;
5549 fix
->code
= BFD_RELOC_IA64_IMM22
;
5551 if (e
->X_op
!= O_subtract
)
5553 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5554 if (e
->X_op
== O_pseudo_fixup
)
5558 fix
->opnd
= idesc
->operands
[index
];
5561 ++CURR_SLOT
.num_fixups
;
5562 return OPERAND_MATCH
;
5564 else if (e
->X_op
!= O_constant
5565 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5566 return OPERAND_MISMATCH
;
5568 if (opnd
== IA64_OPND_IMM8M1U4
)
5570 /* Zero is not valid for unsigned compares that take an adjusted
5571 constant immediate range. */
5572 if (e
->X_add_number
== 0)
5573 return OPERAND_OUT_OF_RANGE
;
5575 /* Sign-extend 32-bit unsigned numbers, so that the following range
5576 checks will work. */
5577 val
= e
->X_add_number
;
5578 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5579 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5580 val
= ((val
<< 32) >> 32);
5582 /* Check for 0x100000000. This is valid because
5583 0x100000000-1 is the same as ((uint32_t) -1). */
5584 if (val
== ((bfd_signed_vma
) 1 << 32))
5585 return OPERAND_MATCH
;
5589 else if (opnd
== IA64_OPND_IMM8M1U8
)
5591 /* Zero is not valid for unsigned compares that take an adjusted
5592 constant immediate range. */
5593 if (e
->X_add_number
== 0)
5594 return OPERAND_OUT_OF_RANGE
;
5596 /* Check for 0x10000000000000000. */
5597 if (e
->X_op
== O_big
)
5599 if (generic_bignum
[0] == 0
5600 && generic_bignum
[1] == 0
5601 && generic_bignum
[2] == 0
5602 && generic_bignum
[3] == 0
5603 && generic_bignum
[4] == 1)
5604 return OPERAND_MATCH
;
5606 return OPERAND_OUT_OF_RANGE
;
5609 val
= e
->X_add_number
- 1;
5611 else if (opnd
== IA64_OPND_IMM8M1
)
5612 val
= e
->X_add_number
- 1;
5613 else if (opnd
== IA64_OPND_IMM8U4
)
5615 /* Sign-extend 32-bit unsigned numbers, so that the following range
5616 checks will work. */
5617 val
= e
->X_add_number
;
5618 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5619 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5620 val
= ((val
<< 32) >> 32);
5623 val
= e
->X_add_number
;
5625 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5626 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5627 return OPERAND_MATCH
;
5629 return OPERAND_OUT_OF_RANGE
;
5631 case IA64_OPND_INC3
:
5632 /* +/- 1, 4, 8, 16 */
5633 val
= e
->X_add_number
;
5636 if (e
->X_op
== O_constant
)
5638 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5639 return OPERAND_MATCH
;
5641 return OPERAND_OUT_OF_RANGE
;
5645 case IA64_OPND_TGT25
:
5646 case IA64_OPND_TGT25b
:
5647 case IA64_OPND_TGT25c
:
5648 case IA64_OPND_TGT64
:
5649 if (e
->X_op
== O_symbol
)
5651 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5652 if (opnd
== IA64_OPND_TGT25
)
5653 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5654 else if (opnd
== IA64_OPND_TGT25b
)
5655 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5656 else if (opnd
== IA64_OPND_TGT25c
)
5657 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5658 else if (opnd
== IA64_OPND_TGT64
)
5659 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5663 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5664 fix
->opnd
= idesc
->operands
[index
];
5667 ++CURR_SLOT
.num_fixups
;
5668 return OPERAND_MATCH
;
5670 case IA64_OPND_TAG13
:
5671 case IA64_OPND_TAG13b
:
5675 return OPERAND_MATCH
;
5678 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5679 /* There are no external relocs for TAG13/TAG13b fields, so we
5680 create a dummy reloc. This will not live past md_apply_fix3. */
5681 fix
->code
= BFD_RELOC_UNUSED
;
5682 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5683 fix
->opnd
= idesc
->operands
[index
];
5686 ++CURR_SLOT
.num_fixups
;
5687 return OPERAND_MATCH
;
5694 case IA64_OPND_LDXMOV
:
5695 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5696 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5697 fix
->opnd
= idesc
->operands
[index
];
5700 ++CURR_SLOT
.num_fixups
;
5701 return OPERAND_MATCH
;
5706 return OPERAND_MISMATCH
;
5715 memset (e
, 0, sizeof (*e
));
5718 if (*input_line_pointer
!= '}')
5720 sep
= *input_line_pointer
++;
5724 if (!md
.manual_bundling
)
5725 as_warn ("Found '}' when manual bundling is off");
5727 CURR_SLOT
.manual_bundling_off
= 1;
5728 md
.manual_bundling
= 0;
5734 /* Returns the next entry in the opcode table that matches the one in
5735 IDESC, and frees the entry in IDESC. If no matching entry is
5736 found, NULL is returned instead. */
5738 static struct ia64_opcode
*
5739 get_next_opcode (struct ia64_opcode
*idesc
)
5741 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
5742 ia64_free_opcode (idesc
);
5746 /* Parse the operands for the opcode and find the opcode variant that
5747 matches the specified operands, or NULL if no match is possible. */
5749 static struct ia64_opcode
*
5750 parse_operands (idesc
)
5751 struct ia64_opcode
*idesc
;
5753 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
5754 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
5755 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
5756 enum operand_match_result result
;
5758 char *first_arg
= 0, *end
, *saved_input_pointer
;
5761 assert (strlen (idesc
->name
) <= 128);
5763 strcpy (mnemonic
, idesc
->name
);
5764 if (idesc
->operands
[2] == IA64_OPND_SOF
)
5766 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5767 can't parse the first operand until we have parsed the
5768 remaining operands of the "alloc" instruction. */
5770 first_arg
= input_line_pointer
;
5771 end
= strchr (input_line_pointer
, '=');
5774 as_bad ("Expected separator `='");
5777 input_line_pointer
= end
+ 1;
5782 for (; i
< NELEMS (CURR_SLOT
.opnd
); ++i
)
5784 sep
= parse_operand (CURR_SLOT
.opnd
+ i
);
5785 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
5790 if (sep
!= '=' && sep
!= ',')
5795 if (num_outputs
> 0)
5796 as_bad ("Duplicate equal sign (=) in instruction");
5798 num_outputs
= i
+ 1;
5803 as_bad ("Illegal operand separator `%c'", sep
);
5807 if (idesc
->operands
[2] == IA64_OPND_SOF
)
5809 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5810 know (strcmp (idesc
->name
, "alloc") == 0);
5811 if (num_operands
== 5 /* first_arg not included in this count! */
5812 && CURR_SLOT
.opnd
[2].X_op
== O_constant
5813 && CURR_SLOT
.opnd
[3].X_op
== O_constant
5814 && CURR_SLOT
.opnd
[4].X_op
== O_constant
5815 && CURR_SLOT
.opnd
[5].X_op
== O_constant
)
5817 sof
= set_regstack (CURR_SLOT
.opnd
[2].X_add_number
,
5818 CURR_SLOT
.opnd
[3].X_add_number
,
5819 CURR_SLOT
.opnd
[4].X_add_number
,
5820 CURR_SLOT
.opnd
[5].X_add_number
);
5822 /* now we can parse the first arg: */
5823 saved_input_pointer
= input_line_pointer
;
5824 input_line_pointer
= first_arg
;
5825 sep
= parse_operand (CURR_SLOT
.opnd
+ 0);
5827 --num_outputs
; /* force error */
5828 input_line_pointer
= saved_input_pointer
;
5830 CURR_SLOT
.opnd
[2].X_add_number
= sof
;
5831 CURR_SLOT
.opnd
[3].X_add_number
5832 = sof
- CURR_SLOT
.opnd
[4].X_add_number
;
5833 CURR_SLOT
.opnd
[4] = CURR_SLOT
.opnd
[5];
5837 highest_unmatched_operand
= 0;
5838 curr_out_of_range_pos
= -1;
5840 expected_operand
= idesc
->operands
[0];
5841 for (; idesc
; idesc
= get_next_opcode (idesc
))
5843 if (num_outputs
!= idesc
->num_outputs
)
5844 continue; /* mismatch in # of outputs */
5846 CURR_SLOT
.num_fixups
= 0;
5848 /* Try to match all operands. If we see an out-of-range operand,
5849 then continue trying to match the rest of the operands, since if
5850 the rest match, then this idesc will give the best error message. */
5852 out_of_range_pos
= -1;
5853 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
5855 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
5856 if (result
!= OPERAND_MATCH
)
5858 if (result
!= OPERAND_OUT_OF_RANGE
)
5860 if (out_of_range_pos
< 0)
5861 /* remember position of the first out-of-range operand: */
5862 out_of_range_pos
= i
;
5866 /* If we did not match all operands, or if at least one operand was
5867 out-of-range, then this idesc does not match. Keep track of which
5868 idesc matched the most operands before failing. If we have two
5869 idescs that failed at the same position, and one had an out-of-range
5870 operand, then prefer the out-of-range operand. Thus if we have
5871 "add r0=0x1000000,r1" we get an error saying the constant is out
5872 of range instead of an error saying that the constant should have been
5875 if (i
!= num_operands
|| out_of_range_pos
>= 0)
5877 if (i
> highest_unmatched_operand
5878 || (i
== highest_unmatched_operand
5879 && out_of_range_pos
> curr_out_of_range_pos
))
5881 highest_unmatched_operand
= i
;
5882 if (out_of_range_pos
>= 0)
5884 expected_operand
= idesc
->operands
[out_of_range_pos
];
5885 error_pos
= out_of_range_pos
;
5889 expected_operand
= idesc
->operands
[i
];
5892 curr_out_of_range_pos
= out_of_range_pos
;
5897 if (num_operands
< NELEMS (idesc
->operands
)
5898 && idesc
->operands
[num_operands
])
5899 continue; /* mismatch in number of arguments */
5905 if (expected_operand
)
5906 as_bad ("Operand %u of `%s' should be %s",
5907 error_pos
+ 1, mnemonic
,
5908 elf64_ia64_operands
[expected_operand
].desc
);
5910 as_bad ("Operand mismatch");
5916 /* Keep track of state necessary to determine whether a NOP is necessary
5917 to avoid an erratum in A and B step Itanium chips, and return 1 if we
5918 detect a case where additional NOPs may be necessary. */
5920 errata_nop_necessary_p (slot
, insn_unit
)
5922 enum ia64_unit insn_unit
;
5925 struct group
*this_group
= md
.last_groups
+ md
.group_idx
;
5926 struct group
*prev_group
= md
.last_groups
+ (md
.group_idx
+ 2) % 3;
5927 struct ia64_opcode
*idesc
= slot
->idesc
;
5929 /* Test whether this could be the first insn in a problematic sequence. */
5930 if (insn_unit
== IA64_UNIT_F
)
5932 for (i
= 0; i
< idesc
->num_outputs
; i
++)
5933 if (idesc
->operands
[i
] == IA64_OPND_P1
5934 || idesc
->operands
[i
] == IA64_OPND_P2
)
5936 int regno
= slot
->opnd
[i
].X_add_number
- REG_P
;
5937 /* Ignore invalid operands; they generate errors elsewhere. */
5940 this_group
->p_reg_set
[regno
] = 1;
5944 /* Test whether this could be the second insn in a problematic sequence. */
5945 if (insn_unit
== IA64_UNIT_M
&& slot
->qp_regno
> 0
5946 && prev_group
->p_reg_set
[slot
->qp_regno
])
5948 for (i
= 0; i
< idesc
->num_outputs
; i
++)
5949 if (idesc
->operands
[i
] == IA64_OPND_R1
5950 || idesc
->operands
[i
] == IA64_OPND_R2
5951 || idesc
->operands
[i
] == IA64_OPND_R3
)
5953 int regno
= slot
->opnd
[i
].X_add_number
- REG_GR
;
5954 /* Ignore invalid operands; they generate errors elsewhere. */
5957 if (strncmp (idesc
->name
, "add", 3) != 0
5958 && strncmp (idesc
->name
, "sub", 3) != 0
5959 && strncmp (idesc
->name
, "shladd", 6) != 0
5960 && (idesc
->flags
& IA64_OPCODE_POSTINC
) == 0)
5961 this_group
->g_reg_set_conditionally
[regno
] = 1;
5965 /* Test whether this could be the third insn in a problematic sequence. */
5966 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; i
++)
5968 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
5969 idesc
->operands
[i
] == IA64_OPND_R3
5970 /* For mov indirect. */
5971 || idesc
->operands
[i
] == IA64_OPND_RR_R3
5972 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
5973 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
5974 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
5975 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
5976 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
5977 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
5978 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
5980 || idesc
->operands
[i
] == IA64_OPND_ITR_R3
5981 || idesc
->operands
[i
] == IA64_OPND_DTR_R3
5982 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
5983 || idesc
->operands
[i
] == IA64_OPND_MR3
)
5985 int regno
= slot
->opnd
[i
].X_add_number
- REG_GR
;
5986 /* Ignore invalid operands; they generate errors elsewhere. */
5989 if (idesc
->operands
[i
] == IA64_OPND_R3
)
5991 if (strcmp (idesc
->name
, "fc") != 0
5992 && strcmp (idesc
->name
, "tak") != 0
5993 && strcmp (idesc
->name
, "thash") != 0
5994 && strcmp (idesc
->name
, "tpa") != 0
5995 && strcmp (idesc
->name
, "ttag") != 0
5996 && strncmp (idesc
->name
, "ptr", 3) != 0
5997 && strncmp (idesc
->name
, "ptc", 3) != 0
5998 && strncmp (idesc
->name
, "probe", 5) != 0)
6001 if (prev_group
->g_reg_set_conditionally
[regno
])
6009 build_insn (slot
, insnp
)
6013 const struct ia64_operand
*odesc
, *o2desc
;
6014 struct ia64_opcode
*idesc
= slot
->idesc
;
6015 bfd_signed_vma insn
, val
;
6019 insn
= idesc
->opcode
| slot
->qp_regno
;
6021 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6023 if (slot
->opnd
[i
].X_op
== O_register
6024 || slot
->opnd
[i
].X_op
== O_constant
6025 || slot
->opnd
[i
].X_op
== O_index
)
6026 val
= slot
->opnd
[i
].X_add_number
;
6027 else if (slot
->opnd
[i
].X_op
== O_big
)
6029 /* This must be the value 0x10000000000000000. */
6030 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6036 switch (idesc
->operands
[i
])
6038 case IA64_OPND_IMMU64
:
6039 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6040 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6041 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6042 | (((val
>> 63) & 0x1) << 36));
6045 case IA64_OPND_IMMU62
:
6046 val
&= 0x3fffffffffffffffULL
;
6047 if (val
!= slot
->opnd
[i
].X_add_number
)
6048 as_warn (_("Value truncated to 62 bits"));
6049 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6050 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6053 case IA64_OPND_TGT64
:
6055 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6056 insn
|= ((((val
>> 59) & 0x1) << 36)
6057 | (((val
>> 0) & 0xfffff) << 13));
6088 case IA64_OPND_R3_2
:
6089 case IA64_OPND_CPUID_R3
:
6090 case IA64_OPND_DBR_R3
:
6091 case IA64_OPND_DTR_R3
:
6092 case IA64_OPND_ITR_R3
:
6093 case IA64_OPND_IBR_R3
:
6095 case IA64_OPND_MSR_R3
:
6096 case IA64_OPND_PKR_R3
:
6097 case IA64_OPND_PMC_R3
:
6098 case IA64_OPND_PMD_R3
:
6099 case IA64_OPND_RR_R3
:
6107 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6108 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6110 as_bad_where (slot
->src_file
, slot
->src_line
,
6111 "Bad operand value: %s", err
);
6112 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6114 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6115 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6117 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6118 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6120 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6121 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6122 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6124 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6125 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6135 unsigned int manual_bundling_on
= 0, manual_bundling_off
= 0;
6136 unsigned int manual_bundling
= 0;
6137 enum ia64_unit required_unit
, insn_unit
= 0;
6138 enum ia64_insn_type type
[3], insn_type
;
6139 unsigned int template, orig_template
;
6140 bfd_vma insn
[3] = { -1, -1, -1 };
6141 struct ia64_opcode
*idesc
;
6142 int end_of_insn_group
= 0, user_template
= -1;
6143 int n
, i
, j
, first
, curr
;
6144 unw_rec_list
*ptr
, *last_ptr
, *end_ptr
;
6145 bfd_vma t0
= 0, t1
= 0;
6146 struct label_fix
*lfix
;
6147 struct insn_fix
*ifix
;
6153 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6154 know (first
>= 0 & first
< NUM_SLOTS
);
6155 n
= MIN (3, md
.num_slots_in_use
);
6157 /* Determine template: user user_template if specified, best match
6160 if (md
.slot
[first
].user_template
>= 0)
6161 user_template
= template = md
.slot
[first
].user_template
;
6164 /* Auto select appropriate template. */
6165 memset (type
, 0, sizeof (type
));
6167 for (i
= 0; i
< n
; ++i
)
6169 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6171 type
[i
] = md
.slot
[curr
].idesc
->type
;
6172 curr
= (curr
+ 1) % NUM_SLOTS
;
6174 template = best_template
[type
[0]][type
[1]][type
[2]];
6177 /* initialize instructions with appropriate nops: */
6178 for (i
= 0; i
< 3; ++i
)
6179 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6183 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6184 from the start of the frag. */
6185 addr_mod
= frag_now_fix () & 15;
6186 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6187 as_bad (_("instruction address is not a multiple of 16"));
6188 frag_now
->insn_addr
= addr_mod
;
6189 frag_now
->has_code
= 1;
6191 /* now fill in slots with as many insns as possible: */
6193 idesc
= md
.slot
[curr
].idesc
;
6194 end_of_insn_group
= 0;
6195 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6197 /* If we have unwind records, we may need to update some now. */
6198 ptr
= md
.slot
[curr
].unwind_record
;
6201 /* Find the last prologue/body record in the list for the current
6202 insn, and set the slot number for all records up to that point.
6203 This needs to be done now, because prologue/body records refer to
6204 the current point, not the point after the instruction has been
6205 issued. This matters because there may have been nops emitted
6206 meanwhile. Any non-prologue non-body record followed by a
6207 prologue/body record must also refer to the current point. */
6209 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6210 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6211 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6212 || ptr
->r
.type
== body
)
6216 /* Make last_ptr point one after the last prologue/body
6218 last_ptr
= last_ptr
->next
;
6219 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6222 ptr
->slot_number
= (unsigned long) f
+ i
;
6223 ptr
->slot_frag
= frag_now
;
6225 /* Remove the initialized records, so that we won't accidentally
6226 update them again if we insert a nop and continue. */
6227 md
.slot
[curr
].unwind_record
= last_ptr
;
6231 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6233 if (manual_bundling
&& i
!= 2)
6234 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6235 "`%s' must be last in bundle", idesc
->name
);
6239 if (idesc
->flags
& IA64_OPCODE_LAST
)
6242 unsigned int required_template
;
6244 /* If we need a stop bit after an M slot, our only choice is
6245 template 5 (M;;MI). If we need a stop bit after a B
6246 slot, our only choice is to place it at the end of the
6247 bundle, because the only available templates are MIB,
6248 MBB, BBB, MMB, and MFB. We don't handle anything other
6249 than M and B slots because these are the only kind of
6250 instructions that can have the IA64_OPCODE_LAST bit set. */
6251 required_template
= template;
6252 switch (idesc
->type
)
6256 required_template
= 5;
6264 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6265 "Internal error: don't know how to force %s to end"
6266 "of instruction group", idesc
->name
);
6270 if (manual_bundling
&& i
!= required_slot
)
6271 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6272 "`%s' must be last in instruction group",
6274 if (required_slot
< i
)
6275 /* Can't fit this instruction. */
6279 if (required_template
!= template)
6281 /* If we switch the template, we need to reset the NOPs
6282 after slot i. The slot-types of the instructions ahead
6283 of i never change, so we don't need to worry about
6284 changing NOPs in front of this slot. */
6285 for (j
= i
; j
< 3; ++j
)
6286 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6288 template = required_template
;
6290 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6292 if (manual_bundling_on
)
6293 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6294 "Label must be first in a bundle");
6295 /* This insn must go into the first slot of a bundle. */
6299 manual_bundling_on
= md
.slot
[curr
].manual_bundling_on
;
6300 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6302 if (manual_bundling_on
)
6305 manual_bundling
= 1;
6307 break; /* need to start a new bundle */
6310 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6312 /* We need an instruction group boundary in the middle of a
6313 bundle. See if we can switch to an other template with
6314 an appropriate boundary. */
6316 orig_template
= template;
6317 if (i
== 1 && (user_template
== 4
6318 || (user_template
< 0
6319 && (ia64_templ_desc
[template].exec_unit
[0]
6323 end_of_insn_group
= 0;
6325 else if (i
== 2 && (user_template
== 0
6326 || (user_template
< 0
6327 && (ia64_templ_desc
[template].exec_unit
[1]
6329 /* This test makes sure we don't switch the template if
6330 the next instruction is one that needs to be first in
6331 an instruction group. Since all those instructions are
6332 in the M group, there is no way such an instruction can
6333 fit in this bundle even if we switch the template. The
6334 reason we have to check for this is that otherwise we
6335 may end up generating "MI;;I M.." which has the deadly
6336 effect that the second M instruction is no longer the
6337 first in the bundle! --davidm 99/12/16 */
6338 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6341 end_of_insn_group
= 0;
6343 else if (curr
!= first
)
6344 /* can't fit this insn */
6347 if (template != orig_template
)
6348 /* if we switch the template, we need to reset the NOPs
6349 after slot i. The slot-types of the instructions ahead
6350 of i never change, so we don't need to worry about
6351 changing NOPs in front of this slot. */
6352 for (j
= i
; j
< 3; ++j
)
6353 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6355 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6357 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6358 if (idesc
->type
== IA64_TYPE_DYN
)
6360 if ((strcmp (idesc
->name
, "nop") == 0)
6361 || (strcmp (idesc
->name
, "hint") == 0)
6362 || (strcmp (idesc
->name
, "break") == 0))
6363 insn_unit
= required_unit
;
6364 else if (strcmp (idesc
->name
, "chk.s") == 0)
6366 insn_unit
= IA64_UNIT_M
;
6367 if (required_unit
== IA64_UNIT_I
)
6368 insn_unit
= IA64_UNIT_I
;
6371 as_fatal ("emit_one_bundle: unexpected dynamic op");
6373 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbf??"[insn_unit
]);
6374 ia64_free_opcode (idesc
);
6375 md
.slot
[curr
].idesc
= idesc
= ia64_find_opcode (mnemonic
);
6377 know (!idesc
->next
); /* no resolved dynamic ops have collisions */
6382 insn_type
= idesc
->type
;
6383 insn_unit
= IA64_UNIT_NIL
;
6387 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6388 insn_unit
= required_unit
;
6390 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6391 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6392 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6393 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6394 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6399 if (insn_unit
!= required_unit
)
6401 if (required_unit
== IA64_UNIT_L
6402 && insn_unit
== IA64_UNIT_I
6403 && !(idesc
->flags
& IA64_OPCODE_X_IN_MLX
))
6405 /* we got ourselves an MLX template but the current
6406 instruction isn't an X-unit, or an I-unit instruction
6407 that can go into the X slot of an MLX template. Duh. */
6408 if (md
.num_slots_in_use
>= NUM_SLOTS
)
6410 as_bad_where (md
.slot
[curr
].src_file
,
6411 md
.slot
[curr
].src_line
,
6412 "`%s' can't go in X slot of "
6413 "MLX template", idesc
->name
);
6414 /* drop this insn so we don't livelock: */
6415 --md
.num_slots_in_use
;
6419 continue; /* try next slot */
6425 addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6426 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6429 if (errata_nop_necessary_p (md
.slot
+ curr
, insn_unit
))
6430 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6432 build_insn (md
.slot
+ curr
, insn
+ i
);
6434 ptr
= md
.slot
[curr
].unwind_record
;
6437 /* Set slot numbers for all remaining unwind records belonging to the
6438 current insn. There can not be any prologue/body unwind records
6440 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6441 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6443 ptr
->slot_number
= (unsigned long) f
+ i
;
6444 ptr
->slot_frag
= frag_now
;
6446 md
.slot
[curr
].unwind_record
= NULL
;
6449 if (required_unit
== IA64_UNIT_L
)
6452 /* skip one slot for long/X-unit instructions */
6455 --md
.num_slots_in_use
;
6457 /* now is a good time to fix up the labels for this insn: */
6458 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6460 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6461 symbol_set_frag (lfix
->sym
, frag_now
);
6463 /* and fix up the tags also. */
6464 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6466 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6467 symbol_set_frag (lfix
->sym
, frag_now
);
6470 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6472 ifix
= md
.slot
[curr
].fixup
+ j
;
6473 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6474 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6475 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6476 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6477 fix
->fx_file
= md
.slot
[curr
].src_file
;
6478 fix
->fx_line
= md
.slot
[curr
].src_line
;
6481 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6483 if (end_of_insn_group
)
6485 md
.group_idx
= (md
.group_idx
+ 1) % 3;
6486 memset (md
.last_groups
+ md
.group_idx
, 0, sizeof md
.last_groups
[0]);
6490 ia64_free_opcode (md
.slot
[curr
].idesc
);
6491 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6492 md
.slot
[curr
].user_template
= -1;
6494 if (manual_bundling_off
)
6496 manual_bundling
= 0;
6499 curr
= (curr
+ 1) % NUM_SLOTS
;
6500 idesc
= md
.slot
[curr
].idesc
;
6502 if (manual_bundling
)
6504 if (md
.num_slots_in_use
> 0)
6506 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6507 "`%s' does not fit into %s template",
6508 idesc
->name
, ia64_templ_desc
[template].name
);
6509 --md
.num_slots_in_use
;
6512 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6513 "Missing '}' at end of file");
6515 know (md
.num_slots_in_use
< NUM_SLOTS
);
6517 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6518 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6520 number_to_chars_littleendian (f
+ 0, t0
, 8);
6521 number_to_chars_littleendian (f
+ 8, t1
, 8);
6525 unwind
.list
->next_slot_number
= (unsigned long) f
+ 16;
6526 unwind
.list
->next_slot_frag
= frag_now
;
6531 md_parse_option (c
, arg
)
6538 /* Switches from the Intel assembler. */
6540 if (strcmp (arg
, "ilp64") == 0
6541 || strcmp (arg
, "lp64") == 0
6542 || strcmp (arg
, "p64") == 0)
6544 md
.flags
|= EF_IA_64_ABI64
;
6546 else if (strcmp (arg
, "ilp32") == 0)
6548 md
.flags
&= ~EF_IA_64_ABI64
;
6550 else if (strcmp (arg
, "le") == 0)
6552 md
.flags
&= ~EF_IA_64_BE
;
6553 default_big_endian
= 0;
6555 else if (strcmp (arg
, "be") == 0)
6557 md
.flags
|= EF_IA_64_BE
;
6558 default_big_endian
= 1;
6565 if (strcmp (arg
, "so") == 0)
6567 /* Suppress signon message. */
6569 else if (strcmp (arg
, "pi") == 0)
6571 /* Reject privileged instructions. FIXME */
6573 else if (strcmp (arg
, "us") == 0)
6575 /* Allow union of signed and unsigned range. FIXME */
6577 else if (strcmp (arg
, "close_fcalls") == 0)
6579 /* Do not resolve global function calls. */
6586 /* temp[="prefix"] Insert temporary labels into the object file
6587 symbol table prefixed by "prefix".
6588 Default prefix is ":temp:".
6593 /* indirect=<tgt> Assume unannotated indirect branches behavior
6594 according to <tgt> --
6595 exit: branch out from the current context (default)
6596 labels: all labels in context may be branch targets
6598 if (strncmp (arg
, "indirect=", 9) != 0)
6603 /* -X conflicts with an ignored option, use -x instead */
6605 if (!arg
|| strcmp (arg
, "explicit") == 0)
6607 /* set default mode to explicit */
6608 md
.default_explicit_mode
= 1;
6611 else if (strcmp (arg
, "auto") == 0)
6613 md
.default_explicit_mode
= 0;
6615 else if (strcmp (arg
, "debug") == 0)
6619 else if (strcmp (arg
, "debugx") == 0)
6621 md
.default_explicit_mode
= 1;
6626 as_bad (_("Unrecognized option '-x%s'"), arg
);
6631 /* nops Print nops statistics. */
6634 /* GNU specific switches for gcc. */
6635 case OPTION_MCONSTANT_GP
:
6636 md
.flags
|= EF_IA_64_CONS_GP
;
6639 case OPTION_MAUTO_PIC
:
6640 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
6651 md_show_usage (stream
)
6656 --mconstant-gp mark output file as using the constant-GP model\n\
6657 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6658 --mauto-pic mark output file as using the constant-GP model\n\
6659 without function descriptors (sets ELF header flag\n\
6660 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6661 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6662 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6663 -x | -xexplicit turn on dependency violation checking (default)\n\
6664 -xauto automagically remove dependency violations\n\
6665 -xdebug debug dependency violation checker\n"),
6670 ia64_after_parse_args ()
6672 if (debug_type
== DEBUG_STABS
)
6673 as_fatal (_("--gstabs is not supported for ia64"));
6676 /* Return true if TYPE fits in TEMPL at SLOT. */
6679 match (int templ
, int type
, int slot
)
6681 enum ia64_unit unit
;
6684 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
6687 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
6689 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
6691 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
6692 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
6693 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
6694 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
6695 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
6696 default: result
= 0; break;
6701 /* Add a bit of extra goodness if a nop of type F or B would fit
6702 in TEMPL at SLOT. */
6705 extra_goodness (int templ
, int slot
)
6707 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
6709 if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
6714 /* This function is called once, at assembler startup time. It sets
6715 up all the tables, etc. that the MD part of the assembler will need
6716 that can be determined before arguments are parsed. */
6720 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
6725 md
.explicit_mode
= md
.default_explicit_mode
;
6727 bfd_set_section_alignment (stdoutput
, text_section
, 4);
6729 /* Make sure function pointers get initialized. */
6730 target_big_endian
= -1;
6731 dot_byteorder (default_big_endian
);
6733 alias_hash
= hash_new ();
6734 alias_name_hash
= hash_new ();
6735 secalias_hash
= hash_new ();
6736 secalias_name_hash
= hash_new ();
6738 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
6739 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
6740 &zero_address_frag
);
6742 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
6743 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
6744 &zero_address_frag
);
6746 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
6747 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
6748 &zero_address_frag
);
6750 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
6751 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
6752 &zero_address_frag
);
6754 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
6755 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
6756 &zero_address_frag
);
6758 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
6759 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
6760 &zero_address_frag
);
6762 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
6763 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
6764 &zero_address_frag
);
6766 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
6767 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
6768 &zero_address_frag
);
6770 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
6771 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
6772 &zero_address_frag
);
6774 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
6775 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
6776 &zero_address_frag
);
6778 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
6779 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
6780 &zero_address_frag
);
6782 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
6783 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
6784 &zero_address_frag
);
6786 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
6787 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
6788 &zero_address_frag
);
6790 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
6791 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
6792 &zero_address_frag
);
6794 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
6795 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
6796 &zero_address_frag
);
6798 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
6799 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
6800 &zero_address_frag
);
6802 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
6803 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
6804 &zero_address_frag
);
6806 /* Compute the table of best templates. We compute goodness as a
6807 base 4 value, in which each match counts for 3, each F counts
6808 for 2, each B counts for 1. This should maximize the number of
6809 F and B nops in the chosen bundles, which is good because these
6810 pipelines are least likely to be overcommitted. */
6811 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
6812 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
6813 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
6816 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
6819 if (match (t
, i
, 0))
6821 if (match (t
, j
, 1))
6823 if (match (t
, k
, 2))
6824 goodness
= 3 + 3 + 3;
6826 goodness
= 3 + 3 + extra_goodness (t
, 2);
6828 else if (match (t
, j
, 2))
6829 goodness
= 3 + 3 + extra_goodness (t
, 1);
6833 goodness
+= extra_goodness (t
, 1);
6834 goodness
+= extra_goodness (t
, 2);
6837 else if (match (t
, i
, 1))
6839 if (match (t
, j
, 2))
6842 goodness
= 3 + extra_goodness (t
, 2);
6844 else if (match (t
, i
, 2))
6845 goodness
= 3 + extra_goodness (t
, 1);
6847 if (goodness
> best
)
6850 best_template
[i
][j
][k
] = t
;
6855 for (i
= 0; i
< NUM_SLOTS
; ++i
)
6856 md
.slot
[i
].user_template
= -1;
6858 md
.pseudo_hash
= hash_new ();
6859 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
6861 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
6862 (void *) (pseudo_opcode
+ i
));
6864 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6865 pseudo_opcode
[i
].name
, err
);
6868 md
.reg_hash
= hash_new ();
6869 md
.dynreg_hash
= hash_new ();
6870 md
.const_hash
= hash_new ();
6871 md
.entry_hash
= hash_new ();
6873 /* general registers: */
6876 for (i
= 0; i
< total
; ++i
)
6878 sprintf (name
, "r%d", i
- REG_GR
);
6879 md
.regsym
[i
] = declare_register (name
, i
);
6882 /* floating point registers: */
6884 for (; i
< total
; ++i
)
6886 sprintf (name
, "f%d", i
- REG_FR
);
6887 md
.regsym
[i
] = declare_register (name
, i
);
6890 /* application registers: */
6893 for (; i
< total
; ++i
)
6895 sprintf (name
, "ar%d", i
- REG_AR
);
6896 md
.regsym
[i
] = declare_register (name
, i
);
6899 /* control registers: */
6902 for (; i
< total
; ++i
)
6904 sprintf (name
, "cr%d", i
- REG_CR
);
6905 md
.regsym
[i
] = declare_register (name
, i
);
6908 /* predicate registers: */
6910 for (; i
< total
; ++i
)
6912 sprintf (name
, "p%d", i
- REG_P
);
6913 md
.regsym
[i
] = declare_register (name
, i
);
6916 /* branch registers: */
6918 for (; i
< total
; ++i
)
6920 sprintf (name
, "b%d", i
- REG_BR
);
6921 md
.regsym
[i
] = declare_register (name
, i
);
6924 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
6925 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
6926 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
6927 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
6928 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
6929 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
6930 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
6932 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
6934 regnum
= indirect_reg
[i
].regnum
;
6935 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
6938 /* define synonyms for application registers: */
6939 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
6940 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
6941 REG_AR
+ ar
[i
- REG_AR
].regnum
);
6943 /* define synonyms for control registers: */
6944 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
6945 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
6946 REG_CR
+ cr
[i
- REG_CR
].regnum
);
6948 declare_register ("gp", REG_GR
+ 1);
6949 declare_register ("sp", REG_GR
+ 12);
6950 declare_register ("rp", REG_BR
+ 0);
6952 /* pseudo-registers used to specify unwind info: */
6953 declare_register ("psp", REG_PSP
);
6955 declare_register_set ("ret", 4, REG_GR
+ 8);
6956 declare_register_set ("farg", 8, REG_FR
+ 8);
6957 declare_register_set ("fret", 8, REG_FR
+ 8);
6959 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
6961 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
6962 (PTR
) (const_bits
+ i
));
6964 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
6968 /* Set the architecture and machine depending on defaults and command line
6970 if (md
.flags
& EF_IA_64_ABI64
)
6971 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
6973 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
6976 as_warn (_("Could not set architecture and machine"));
6978 /* Set the pointer size and pointer shift size depending on md.flags */
6980 if (md
.flags
& EF_IA_64_ABI64
)
6982 md
.pointer_size
= 8; /* pointers are 8 bytes */
6983 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
6987 md
.pointer_size
= 4; /* pointers are 4 bytes */
6988 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
6991 md
.mem_offset
.hint
= 0;
6994 md
.entry_labels
= NULL
;
6997 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
6998 because that is called after md_parse_option which is where we do the
6999 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
7000 default endianness. */
7003 ia64_init (argc
, argv
)
7004 int argc ATTRIBUTE_UNUSED
;
7005 char **argv ATTRIBUTE_UNUSED
;
7007 md
.flags
= MD_FLAGS_DEFAULT
;
7010 /* Return a string for the target object file format. */
7013 ia64_target_format ()
7015 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7017 if (md
.flags
& EF_IA_64_BE
)
7019 if (md
.flags
& EF_IA_64_ABI64
)
7020 #if defined(TE_AIX50)
7021 return "elf64-ia64-aix-big";
7022 #elif defined(TE_HPUX)
7023 return "elf64-ia64-hpux-big";
7025 return "elf64-ia64-big";
7028 #if defined(TE_AIX50)
7029 return "elf32-ia64-aix-big";
7030 #elif defined(TE_HPUX)
7031 return "elf32-ia64-hpux-big";
7033 return "elf32-ia64-big";
7038 if (md
.flags
& EF_IA_64_ABI64
)
7040 return "elf64-ia64-aix-little";
7042 return "elf64-ia64-little";
7046 return "elf32-ia64-aix-little";
7048 return "elf32-ia64-little";
7053 return "unknown-format";
7057 ia64_end_of_source ()
7059 /* terminate insn group upon reaching end of file: */
7060 insn_group_break (1, 0, 0);
7062 /* emits slots we haven't written yet: */
7063 ia64_flush_insns ();
7065 bfd_set_private_flags (stdoutput
, md
.flags
);
7067 md
.mem_offset
.hint
= 0;
7073 if (md
.qp
.X_op
== O_register
)
7074 as_bad ("qualifying predicate not followed by instruction");
7075 md
.qp
.X_op
= O_absent
;
7077 if (ignore_input ())
7080 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7082 if (md
.detect_dv
&& !md
.explicit_mode
)
7083 as_warn (_("Explicit stops are ignored in auto mode"));
7085 insn_group_break (1, 0, 0);
7089 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7091 static int defining_tag
= 0;
7094 ia64_unrecognized_line (ch
)
7100 expression (&md
.qp
);
7101 if (*input_line_pointer
++ != ')')
7103 as_bad ("Expected ')'");
7106 if (md
.qp
.X_op
!= O_register
)
7108 as_bad ("Qualifying predicate expected");
7111 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7113 as_bad ("Predicate register expected");
7119 if (md
.manual_bundling
)
7120 as_warn ("Found '{' when manual bundling is already turned on");
7122 CURR_SLOT
.manual_bundling_on
= 1;
7123 md
.manual_bundling
= 1;
7125 /* Bundling is only acceptable in explicit mode
7126 or when in default automatic mode. */
7127 if (md
.detect_dv
&& !md
.explicit_mode
)
7129 if (!md
.mode_explicitly_set
7130 && !md
.default_explicit_mode
)
7133 as_warn (_("Found '{' after explicit switch to automatic mode"));
7138 if (!md
.manual_bundling
)
7139 as_warn ("Found '}' when manual bundling is off");
7141 PREV_SLOT
.manual_bundling_off
= 1;
7142 md
.manual_bundling
= 0;
7144 /* switch back to automatic mode, if applicable */
7147 && !md
.mode_explicitly_set
7148 && !md
.default_explicit_mode
)
7151 /* Allow '{' to follow on the same line. We also allow ";;", but that
7152 happens automatically because ';' is an end of line marker. */
7154 if (input_line_pointer
[0] == '{')
7156 input_line_pointer
++;
7157 return ia64_unrecognized_line ('{');
7160 demand_empty_rest_of_line ();
7170 if (md
.qp
.X_op
== O_register
)
7172 as_bad ("Tag must come before qualifying predicate.");
7176 /* This implements just enough of read_a_source_file in read.c to
7177 recognize labels. */
7178 if (is_name_beginner (*input_line_pointer
))
7180 s
= input_line_pointer
;
7181 c
= get_symbol_end ();
7183 else if (LOCAL_LABELS_FB
7184 && ISDIGIT (*input_line_pointer
))
7187 while (ISDIGIT (*input_line_pointer
))
7188 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7189 fb_label_instance_inc (temp
);
7190 s
= fb_label_name (temp
, 0);
7191 c
= *input_line_pointer
;
7200 /* Put ':' back for error messages' sake. */
7201 *input_line_pointer
++ = ':';
7202 as_bad ("Expected ':'");
7209 /* Put ':' back for error messages' sake. */
7210 *input_line_pointer
++ = ':';
7211 if (*input_line_pointer
++ != ']')
7213 as_bad ("Expected ']'");
7218 as_bad ("Tag name expected");
7228 /* Not a valid line. */
7233 ia64_frob_label (sym
)
7236 struct label_fix
*fix
;
7238 /* Tags need special handling since they are not bundle breaks like
7242 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7244 fix
->next
= CURR_SLOT
.tag_fixups
;
7245 CURR_SLOT
.tag_fixups
= fix
;
7250 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7252 md
.last_text_seg
= now_seg
;
7253 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7255 fix
->next
= CURR_SLOT
.label_fixups
;
7256 CURR_SLOT
.label_fixups
= fix
;
7258 /* Keep track of how many code entry points we've seen. */
7259 if (md
.path
== md
.maxpaths
)
7262 md
.entry_labels
= (const char **)
7263 xrealloc ((void *) md
.entry_labels
,
7264 md
.maxpaths
* sizeof (char *));
7266 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7271 /* The HP-UX linker will give unresolved symbol errors for symbols
7272 that are declared but unused. This routine removes declared,
7273 unused symbols from an object. */
7275 ia64_frob_symbol (sym
)
7278 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7279 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7280 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7281 && ! S_IS_EXTERNAL (sym
)))
7288 ia64_flush_pending_output ()
7290 if (!md
.keep_pending_output
7291 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7293 /* ??? This causes many unnecessary stop bits to be emitted.
7294 Unfortunately, it isn't clear if it is safe to remove this. */
7295 insn_group_break (1, 0, 0);
7296 ia64_flush_insns ();
7300 /* Do ia64-specific expression optimization. All that's done here is
7301 to transform index expressions that are either due to the indexing
7302 of rotating registers or due to the indexing of indirect register
7305 ia64_optimize_expr (l
, op
, r
)
7314 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
7316 num_regs
= (l
->X_add_number
>> 16);
7317 if ((unsigned) r
->X_add_number
>= num_regs
)
7320 as_bad ("No current frame");
7322 as_bad ("Index out of range 0..%u", num_regs
- 1);
7323 r
->X_add_number
= 0;
7325 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7328 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
7330 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
7331 || l
->X_add_number
== IND_MEM
)
7333 as_bad ("Indirect register set name expected");
7334 l
->X_add_number
= IND_CPUID
;
7337 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
7338 l
->X_add_number
= r
->X_add_number
;
7346 ia64_parse_name (name
, e
)
7350 struct const_desc
*cdesc
;
7351 struct dynreg
*dr
= 0;
7352 unsigned int regnum
;
7356 /* first see if NAME is a known register name: */
7357 sym
= hash_find (md
.reg_hash
, name
);
7360 e
->X_op
= O_register
;
7361 e
->X_add_number
= S_GET_VALUE (sym
);
7365 cdesc
= hash_find (md
.const_hash
, name
);
7368 e
->X_op
= O_constant
;
7369 e
->X_add_number
= cdesc
->value
;
7373 /* check for inN, locN, or outN: */
7377 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7385 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
7393 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
7406 /* The name is inN, locN, or outN; parse the register number. */
7407 regnum
= strtoul (name
, &end
, 10);
7408 if (end
> name
&& *end
== '\0')
7410 if ((unsigned) regnum
>= dr
->num_regs
)
7413 as_bad ("No current frame");
7415 as_bad ("Register number out of range 0..%u",
7419 e
->X_op
= O_register
;
7420 e
->X_add_number
= dr
->base
+ regnum
;
7425 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
7427 /* We've got ourselves the name of a rotating register set.
7428 Store the base register number in the low 16 bits of
7429 X_add_number and the size of the register set in the top 16
7431 e
->X_op
= O_register
;
7432 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
7438 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7441 ia64_canonicalize_symbol_name (name
)
7444 size_t len
= strlen (name
);
7445 if (len
> 1 && name
[len
- 1] == '#')
7446 name
[len
- 1] = '\0';
7450 /* Return true if idesc is a conditional branch instruction. This excludes
7451 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7452 because they always read/write resources regardless of the value of the
7453 qualifying predicate. br.ia must always use p0, and hence is always
7454 taken. Thus this function returns true for branches which can fall
7455 through, and which use no resources if they do fall through. */
7458 is_conditional_branch (idesc
)
7459 struct ia64_opcode
*idesc
;
7461 /* br is a conditional branch. Everything that starts with br. except
7462 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7463 Everything that starts with brl is a conditional branch. */
7464 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
7465 && (idesc
->name
[2] == '\0'
7466 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
7467 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
7468 || idesc
->name
[2] == 'l'
7469 /* br.cond, br.call, br.clr */
7470 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
7471 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
7472 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
7475 /* Return whether the given opcode is a taken branch. If there's any doubt,
7479 is_taken_branch (idesc
)
7480 struct ia64_opcode
*idesc
;
7482 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
7483 || strncmp (idesc
->name
, "br.ia", 5) == 0);
7486 /* Return whether the given opcode is an interruption or rfi. If there's any
7487 doubt, returns zero. */
7490 is_interruption_or_rfi (idesc
)
7491 struct ia64_opcode
*idesc
;
7493 if (strcmp (idesc
->name
, "rfi") == 0)
7498 /* Returns the index of the given dependency in the opcode's list of chks, or
7499 -1 if there is no dependency. */
7502 depends_on (depind
, idesc
)
7504 struct ia64_opcode
*idesc
;
7507 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
7508 for (i
= 0; i
< dep
->nchks
; i
++)
7510 if (depind
== DEP (dep
->chks
[i
]))
7516 /* Determine a set of specific resources used for a particular resource
7517 class. Returns the number of specific resources identified For those
7518 cases which are not determinable statically, the resource returned is
7521 Meanings of value in 'NOTE':
7522 1) only read/write when the register number is explicitly encoded in the
7524 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7525 accesses CFM when qualifying predicate is in the rotating region.
7526 3) general register value is used to specify an indirect register; not
7527 determinable statically.
7528 4) only read the given resource when bits 7:0 of the indirect index
7529 register value does not match the register number of the resource; not
7530 determinable statically.
7531 5) all rules are implementation specific.
7532 6) only when both the index specified by the reader and the index specified
7533 by the writer have the same value in bits 63:61; not determinable
7535 7) only access the specified resource when the corresponding mask bit is
7537 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7538 only read when these insns reference FR2-31
7539 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7540 written when these insns write FR32-127
7541 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7543 11) The target predicates are written independently of PR[qp], but source
7544 registers are only read if PR[qp] is true. Since the state of PR[qp]
7545 cannot statically be determined, all source registers are marked used.
7546 12) This insn only reads the specified predicate register when that
7547 register is the PR[qp].
7548 13) This reference to ld-c only applies to teh GR whose value is loaded
7549 with data returned from memory, not the post-incremented address register.
7550 14) The RSE resource includes the implementation-specific RSE internal
7551 state resources. At least one (and possibly more) of these resources are
7552 read by each instruction listed in IC:rse-readers. At least one (and
7553 possibly more) of these resources are written by each insn listed in
7555 15+16) Represents reserved instructions, which the assembler does not
7558 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7559 this code; there are no dependency violations based on memory access.
7562 #define MAX_SPECS 256
7567 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
7568 const struct ia64_dependency
*dep
;
7569 struct ia64_opcode
*idesc
;
7570 int type
; /* is this a DV chk or a DV reg? */
7571 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
7572 int note
; /* resource note for this insn's usage */
7573 int path
; /* which execution path to examine */
7580 if (dep
->mode
== IA64_DV_WAW
7581 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
7582 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
7585 /* template for any resources we identify */
7586 tmpl
.dependency
= dep
;
7588 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
7589 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
7590 tmpl
.link_to_qp_branch
= 1;
7591 tmpl
.mem_offset
.hint
= 0;
7594 tmpl
.cmp_type
= CMP_NONE
;
7597 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7598 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7599 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7601 /* we don't need to track these */
7602 if (dep
->semantics
== IA64_DVS_NONE
)
7605 switch (dep
->specifier
)
7610 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7612 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7613 if (regno
>= 0 && regno
<= 7)
7615 specs
[count
] = tmpl
;
7616 specs
[count
++].index
= regno
;
7622 for (i
= 0; i
< 8; i
++)
7624 specs
[count
] = tmpl
;
7625 specs
[count
++].index
= i
;
7634 case IA64_RS_AR_UNAT
:
7635 /* This is a mov =AR or mov AR= instruction. */
7636 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7638 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7639 if (regno
== AR_UNAT
)
7641 specs
[count
++] = tmpl
;
7646 /* This is a spill/fill, or other instruction that modifies the
7649 /* Unless we can determine the specific bits used, mark the whole
7650 thing; bits 8:3 of the memory address indicate the bit used in
7651 UNAT. The .mem.offset hint may be used to eliminate a small
7652 subset of conflicts. */
7653 specs
[count
] = tmpl
;
7654 if (md
.mem_offset
.hint
)
7657 fprintf (stderr
, " Using hint for spill/fill\n");
7658 /* The index isn't actually used, just set it to something
7659 approximating the bit index. */
7660 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
7661 specs
[count
].mem_offset
.hint
= 1;
7662 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
7663 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
7667 specs
[count
++].specific
= 0;
7675 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7677 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7678 if ((regno
>= 8 && regno
<= 15)
7679 || (regno
>= 20 && regno
<= 23)
7680 || (regno
>= 31 && regno
<= 39)
7681 || (regno
>= 41 && regno
<= 47)
7682 || (regno
>= 67 && regno
<= 111))
7684 specs
[count
] = tmpl
;
7685 specs
[count
++].index
= regno
;
7698 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7700 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7701 if ((regno
>= 48 && regno
<= 63)
7702 || (regno
>= 112 && regno
<= 127))
7704 specs
[count
] = tmpl
;
7705 specs
[count
++].index
= regno
;
7711 for (i
= 48; i
< 64; i
++)
7713 specs
[count
] = tmpl
;
7714 specs
[count
++].index
= i
;
7716 for (i
= 112; i
< 128; i
++)
7718 specs
[count
] = tmpl
;
7719 specs
[count
++].index
= i
;
7737 for (i
= 0; i
< idesc
->num_outputs
; i
++)
7738 if (idesc
->operands
[i
] == IA64_OPND_B1
7739 || idesc
->operands
[i
] == IA64_OPND_B2
)
7741 specs
[count
] = tmpl
;
7742 specs
[count
++].index
=
7743 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7748 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
7749 if (idesc
->operands
[i
] == IA64_OPND_B1
7750 || idesc
->operands
[i
] == IA64_OPND_B2
)
7752 specs
[count
] = tmpl
;
7753 specs
[count
++].index
=
7754 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7760 case IA64_RS_CPUID
: /* four or more registers */
7763 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
7765 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7766 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7769 specs
[count
] = tmpl
;
7770 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7774 specs
[count
] = tmpl
;
7775 specs
[count
++].specific
= 0;
7785 case IA64_RS_DBR
: /* four or more registers */
7788 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
7790 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7791 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7794 specs
[count
] = tmpl
;
7795 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7799 specs
[count
] = tmpl
;
7800 specs
[count
++].specific
= 0;
7804 else if (note
== 0 && !rsrc_write
)
7806 specs
[count
] = tmpl
;
7807 specs
[count
++].specific
= 0;
7815 case IA64_RS_IBR
: /* four or more registers */
7818 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
7820 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7821 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7824 specs
[count
] = tmpl
;
7825 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7829 specs
[count
] = tmpl
;
7830 specs
[count
++].specific
= 0;
7843 /* These are implementation specific. Force all references to
7844 conflict with all other references. */
7845 specs
[count
] = tmpl
;
7846 specs
[count
++].specific
= 0;
7854 case IA64_RS_PKR
: /* 16 or more registers */
7855 if (note
== 3 || note
== 4)
7857 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
7859 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7860 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7865 specs
[count
] = tmpl
;
7866 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7869 for (i
= 0; i
< NELEMS (gr_values
); i
++)
7871 /* Uses all registers *except* the one in R3. */
7872 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
7874 specs
[count
] = tmpl
;
7875 specs
[count
++].index
= i
;
7881 specs
[count
] = tmpl
;
7882 specs
[count
++].specific
= 0;
7889 specs
[count
] = tmpl
;
7890 specs
[count
++].specific
= 0;
7894 case IA64_RS_PMC
: /* four or more registers */
7897 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
7898 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
7901 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
7903 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
7904 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7907 specs
[count
] = tmpl
;
7908 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7912 specs
[count
] = tmpl
;
7913 specs
[count
++].specific
= 0;
7923 case IA64_RS_PMD
: /* four or more registers */
7926 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
7928 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7929 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7932 specs
[count
] = tmpl
;
7933 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7937 specs
[count
] = tmpl
;
7938 specs
[count
++].specific
= 0;
7948 case IA64_RS_RR
: /* eight registers */
7951 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
7953 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7954 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7957 specs
[count
] = tmpl
;
7958 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
7962 specs
[count
] = tmpl
;
7963 specs
[count
++].specific
= 0;
7967 else if (note
== 0 && !rsrc_write
)
7969 specs
[count
] = tmpl
;
7970 specs
[count
++].specific
= 0;
7978 case IA64_RS_CR_IRR
:
7981 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
7982 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
7984 && idesc
->operands
[1] == IA64_OPND_CR3
7987 for (i
= 0; i
< 4; i
++)
7989 specs
[count
] = tmpl
;
7990 specs
[count
++].index
= CR_IRR0
+ i
;
7996 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
7997 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
7999 && regno
<= CR_IRR3
)
8001 specs
[count
] = tmpl
;
8002 specs
[count
++].index
= regno
;
8011 case IA64_RS_CR_LRR
:
8018 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8019 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8020 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8022 specs
[count
] = tmpl
;
8023 specs
[count
++].index
= regno
;
8031 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8033 specs
[count
] = tmpl
;
8034 specs
[count
++].index
=
8035 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8050 else if (rsrc_write
)
8052 if (dep
->specifier
== IA64_RS_FRb
8053 && idesc
->operands
[0] == IA64_OPND_F1
)
8055 specs
[count
] = tmpl
;
8056 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8061 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8063 if (idesc
->operands
[i
] == IA64_OPND_F2
8064 || idesc
->operands
[i
] == IA64_OPND_F3
8065 || idesc
->operands
[i
] == IA64_OPND_F4
)
8067 specs
[count
] = tmpl
;
8068 specs
[count
++].index
=
8069 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8078 /* This reference applies only to the GR whose value is loaded with
8079 data returned from memory. */
8080 specs
[count
] = tmpl
;
8081 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8087 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8088 if (idesc
->operands
[i
] == IA64_OPND_R1
8089 || idesc
->operands
[i
] == IA64_OPND_R2
8090 || idesc
->operands
[i
] == IA64_OPND_R3
)
8092 specs
[count
] = tmpl
;
8093 specs
[count
++].index
=
8094 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8096 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8097 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8098 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8100 specs
[count
] = tmpl
;
8101 specs
[count
++].index
=
8102 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8107 /* Look for anything that reads a GR. */
8108 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8110 if (idesc
->operands
[i
] == IA64_OPND_MR3
8111 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8112 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8113 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8114 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8115 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8116 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8117 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8118 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8119 || ((i
>= idesc
->num_outputs
)
8120 && (idesc
->operands
[i
] == IA64_OPND_R1
8121 || idesc
->operands
[i
] == IA64_OPND_R2
8122 || idesc
->operands
[i
] == IA64_OPND_R3
8123 /* addl source register. */
8124 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8126 specs
[count
] = tmpl
;
8127 specs
[count
++].index
=
8128 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8139 /* This is the same as IA64_RS_PRr, except that the register range is
8140 from 1 - 15, and there are no rotating register reads/writes here. */
8144 for (i
= 1; i
< 16; i
++)
8146 specs
[count
] = tmpl
;
8147 specs
[count
++].index
= i
;
8153 /* Mark only those registers indicated by the mask. */
8156 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8157 for (i
= 1; i
< 16; i
++)
8158 if (mask
& ((valueT
) 1 << i
))
8160 specs
[count
] = tmpl
;
8161 specs
[count
++].index
= i
;
8169 else if (note
== 11) /* note 11 implies note 1 as well */
8173 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8175 if (idesc
->operands
[i
] == IA64_OPND_P1
8176 || idesc
->operands
[i
] == IA64_OPND_P2
)
8178 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8179 if (regno
>= 1 && regno
< 16)
8181 specs
[count
] = tmpl
;
8182 specs
[count
++].index
= regno
;
8192 else if (note
== 12)
8194 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8196 specs
[count
] = tmpl
;
8197 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8204 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8205 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8206 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8207 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8209 if ((idesc
->operands
[0] == IA64_OPND_P1
8210 || idesc
->operands
[0] == IA64_OPND_P2
)
8211 && p1
>= 1 && p1
< 16)
8213 specs
[count
] = tmpl
;
8214 specs
[count
].cmp_type
=
8215 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8216 specs
[count
++].index
= p1
;
8218 if ((idesc
->operands
[1] == IA64_OPND_P1
8219 || idesc
->operands
[1] == IA64_OPND_P2
)
8220 && p2
>= 1 && p2
< 16)
8222 specs
[count
] = tmpl
;
8223 specs
[count
].cmp_type
=
8224 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8225 specs
[count
++].index
= p2
;
8230 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8232 specs
[count
] = tmpl
;
8233 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8235 if (idesc
->operands
[1] == IA64_OPND_PR
)
8237 for (i
= 1; i
< 16; i
++)
8239 specs
[count
] = tmpl
;
8240 specs
[count
++].index
= i
;
8251 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8252 simplified cases of this. */
8256 for (i
= 16; i
< 63; i
++)
8258 specs
[count
] = tmpl
;
8259 specs
[count
++].index
= i
;
8265 /* Mark only those registers indicated by the mask. */
8267 && idesc
->operands
[0] == IA64_OPND_PR
)
8269 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8270 if (mask
& ((valueT
) 1 << 16))
8271 for (i
= 16; i
< 63; i
++)
8273 specs
[count
] = tmpl
;
8274 specs
[count
++].index
= i
;
8278 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8280 for (i
= 16; i
< 63; i
++)
8282 specs
[count
] = tmpl
;
8283 specs
[count
++].index
= i
;
8291 else if (note
== 11) /* note 11 implies note 1 as well */
8295 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8297 if (idesc
->operands
[i
] == IA64_OPND_P1
8298 || idesc
->operands
[i
] == IA64_OPND_P2
)
8300 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8301 if (regno
>= 16 && regno
< 63)
8303 specs
[count
] = tmpl
;
8304 specs
[count
++].index
= regno
;
8314 else if (note
== 12)
8316 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8318 specs
[count
] = tmpl
;
8319 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8326 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8327 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8328 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8329 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8331 if ((idesc
->operands
[0] == IA64_OPND_P1
8332 || idesc
->operands
[0] == IA64_OPND_P2
)
8333 && p1
>= 16 && p1
< 63)
8335 specs
[count
] = tmpl
;
8336 specs
[count
].cmp_type
=
8337 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8338 specs
[count
++].index
= p1
;
8340 if ((idesc
->operands
[1] == IA64_OPND_P1
8341 || idesc
->operands
[1] == IA64_OPND_P2
)
8342 && p2
>= 16 && p2
< 63)
8344 specs
[count
] = tmpl
;
8345 specs
[count
].cmp_type
=
8346 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8347 specs
[count
++].index
= p2
;
8352 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8354 specs
[count
] = tmpl
;
8355 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8357 if (idesc
->operands
[1] == IA64_OPND_PR
)
8359 for (i
= 16; i
< 63; i
++)
8361 specs
[count
] = tmpl
;
8362 specs
[count
++].index
= i
;
8374 /* Verify that the instruction is using the PSR bit indicated in
8378 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
8380 if (dep
->regindex
< 6)
8382 specs
[count
++] = tmpl
;
8385 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
8387 if (dep
->regindex
< 32
8388 || dep
->regindex
== 35
8389 || dep
->regindex
== 36
8390 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
8392 specs
[count
++] = tmpl
;
8395 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
8397 if (dep
->regindex
< 32
8398 || dep
->regindex
== 35
8399 || dep
->regindex
== 36
8400 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
8402 specs
[count
++] = tmpl
;
8407 /* Several PSR bits have very specific dependencies. */
8408 switch (dep
->regindex
)
8411 specs
[count
++] = tmpl
;
8416 specs
[count
++] = tmpl
;
8420 /* Only certain CR accesses use PSR.ic */
8421 if (idesc
->operands
[0] == IA64_OPND_CR3
8422 || idesc
->operands
[1] == IA64_OPND_CR3
)
8425 ((idesc
->operands
[0] == IA64_OPND_CR3
)
8428 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
8443 specs
[count
++] = tmpl
;
8452 specs
[count
++] = tmpl
;
8456 /* Only some AR accesses use cpl */
8457 if (idesc
->operands
[0] == IA64_OPND_AR3
8458 || idesc
->operands
[1] == IA64_OPND_AR3
)
8461 ((idesc
->operands
[0] == IA64_OPND_AR3
)
8464 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
8471 && regno
<= AR_K7
))))
8473 specs
[count
++] = tmpl
;
8478 specs
[count
++] = tmpl
;
8488 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
8490 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
8496 if (mask
& ((valueT
) 1 << dep
->regindex
))
8498 specs
[count
++] = tmpl
;
8503 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
8504 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
8505 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8506 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8508 if (idesc
->operands
[i
] == IA64_OPND_F1
8509 || idesc
->operands
[i
] == IA64_OPND_F2
8510 || idesc
->operands
[i
] == IA64_OPND_F3
8511 || idesc
->operands
[i
] == IA64_OPND_F4
)
8513 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8514 if (reg
>= min
&& reg
<= max
)
8516 specs
[count
++] = tmpl
;
8523 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
8524 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
8525 /* mfh is read on writes to FR32-127; mfl is read on writes to
8527 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8529 if (idesc
->operands
[i
] == IA64_OPND_F1
)
8531 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8532 if (reg
>= min
&& reg
<= max
)
8534 specs
[count
++] = tmpl
;
8539 else if (note
== 10)
8541 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8543 if (idesc
->operands
[i
] == IA64_OPND_R1
8544 || idesc
->operands
[i
] == IA64_OPND_R2
8545 || idesc
->operands
[i
] == IA64_OPND_R3
)
8547 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8548 if (regno
>= 16 && regno
<= 31)
8550 specs
[count
++] = tmpl
;
8561 case IA64_RS_AR_FPSR
:
8562 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8564 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8565 if (regno
== AR_FPSR
)
8567 specs
[count
++] = tmpl
;
8572 specs
[count
++] = tmpl
;
8577 /* Handle all AR[REG] resources */
8578 if (note
== 0 || note
== 1)
8580 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8581 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
8582 && regno
== dep
->regindex
)
8584 specs
[count
++] = tmpl
;
8586 /* other AR[REG] resources may be affected by AR accesses */
8587 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
8590 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
8591 switch (dep
->regindex
)
8597 if (regno
== AR_BSPSTORE
)
8599 specs
[count
++] = tmpl
;
8603 (regno
== AR_BSPSTORE
8604 || regno
== AR_RNAT
))
8606 specs
[count
++] = tmpl
;
8611 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
8614 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
8615 switch (dep
->regindex
)
8620 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
8622 specs
[count
++] = tmpl
;
8629 specs
[count
++] = tmpl
;
8639 /* Handle all CR[REG] resources */
8640 if (note
== 0 || note
== 1)
8642 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8644 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8645 if (regno
== dep
->regindex
)
8647 specs
[count
++] = tmpl
;
8649 else if (!rsrc_write
)
8651 /* Reads from CR[IVR] affect other resources. */
8652 if (regno
== CR_IVR
)
8654 if ((dep
->regindex
>= CR_IRR0
8655 && dep
->regindex
<= CR_IRR3
)
8656 || dep
->regindex
== CR_TPR
)
8658 specs
[count
++] = tmpl
;
8665 specs
[count
++] = tmpl
;
8674 case IA64_RS_INSERVICE
:
8675 /* look for write of EOI (67) or read of IVR (65) */
8676 if ((idesc
->operands
[0] == IA64_OPND_CR3
8677 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
8678 || (idesc
->operands
[1] == IA64_OPND_CR3
8679 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
8681 specs
[count
++] = tmpl
;
8688 specs
[count
++] = tmpl
;
8699 specs
[count
++] = tmpl
;
8703 /* Check if any of the registers accessed are in the rotating region.
8704 mov to/from pr accesses CFM only when qp_regno is in the rotating
8706 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8708 if (idesc
->operands
[i
] == IA64_OPND_R1
8709 || idesc
->operands
[i
] == IA64_OPND_R2
8710 || idesc
->operands
[i
] == IA64_OPND_R3
)
8712 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8713 /* Assumes that md.rot.num_regs is always valid */
8714 if (md
.rot
.num_regs
> 0
8716 && num
< 31 + md
.rot
.num_regs
)
8718 specs
[count
] = tmpl
;
8719 specs
[count
++].specific
= 0;
8722 else if (idesc
->operands
[i
] == IA64_OPND_F1
8723 || idesc
->operands
[i
] == IA64_OPND_F2
8724 || idesc
->operands
[i
] == IA64_OPND_F3
8725 || idesc
->operands
[i
] == IA64_OPND_F4
)
8727 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8730 specs
[count
] = tmpl
;
8731 specs
[count
++].specific
= 0;
8734 else if (idesc
->operands
[i
] == IA64_OPND_P1
8735 || idesc
->operands
[i
] == IA64_OPND_P2
)
8737 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8740 specs
[count
] = tmpl
;
8741 specs
[count
++].specific
= 0;
8745 if (CURR_SLOT
.qp_regno
> 15)
8747 specs
[count
] = tmpl
;
8748 specs
[count
++].specific
= 0;
8753 /* This is the same as IA64_RS_PRr, except simplified to account for
8754 the fact that there is only one register. */
8758 specs
[count
++] = tmpl
;
8763 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
8764 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8765 if (mask
& ((valueT
) 1 << 63))
8766 specs
[count
++] = tmpl
;
8768 else if (note
== 11)
8770 if ((idesc
->operands
[0] == IA64_OPND_P1
8771 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
8772 || (idesc
->operands
[1] == IA64_OPND_P2
8773 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
8775 specs
[count
++] = tmpl
;
8778 else if (note
== 12)
8780 if (CURR_SLOT
.qp_regno
== 63)
8782 specs
[count
++] = tmpl
;
8789 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8790 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8791 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8792 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8795 && (idesc
->operands
[0] == IA64_OPND_P1
8796 || idesc
->operands
[0] == IA64_OPND_P2
))
8798 specs
[count
] = tmpl
;
8799 specs
[count
++].cmp_type
=
8800 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8803 && (idesc
->operands
[1] == IA64_OPND_P1
8804 || idesc
->operands
[1] == IA64_OPND_P2
))
8806 specs
[count
] = tmpl
;
8807 specs
[count
++].cmp_type
=
8808 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8813 if (CURR_SLOT
.qp_regno
== 63)
8815 specs
[count
++] = tmpl
;
8826 /* FIXME we can identify some individual RSE written resources, but RSE
8827 read resources have not yet been completely identified, so for now
8828 treat RSE as a single resource */
8829 if (strncmp (idesc
->name
, "mov", 3) == 0)
8833 if (idesc
->operands
[0] == IA64_OPND_AR3
8834 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
8836 specs
[count
] = tmpl
;
8837 specs
[count
++].index
= 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8842 if (idesc
->operands
[0] == IA64_OPND_AR3
)
8844 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
8845 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
8847 specs
[count
++] = tmpl
;
8850 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
8852 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
8853 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
8854 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
8856 specs
[count
++] = tmpl
;
8863 specs
[count
++] = tmpl
;
8868 /* FIXME -- do any of these need to be non-specific? */
8869 specs
[count
++] = tmpl
;
8873 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
8880 /* Clear branch flags on marked resources. This breaks the link between the
8881 QP of the marking instruction and a subsequent branch on the same QP. */
8884 clear_qp_branch_flag (mask
)
8888 for (i
= 0; i
< regdepslen
; i
++)
8890 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
8891 if ((bit
& mask
) != 0)
8893 regdeps
[i
].link_to_qp_branch
= 0;
8898 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
8899 any mutexes which contain one of the PRs and create new ones when
8903 update_qp_mutex (valueT mask
)
8909 while (i
< qp_mutexeslen
)
8911 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
8913 /* If it destroys and creates the same mutex, do nothing. */
8914 if (qp_mutexes
[i
].prmask
== mask
8915 && qp_mutexes
[i
].path
== md
.path
)
8926 fprintf (stderr
, " Clearing mutex relation");
8927 print_prmask (qp_mutexes
[i
].prmask
);
8928 fprintf (stderr
, "\n");
8931 /* Deal with the old mutex with more than 3+ PRs only if
8932 the new mutex on the same execution path with it.
8934 FIXME: The 3+ mutex support is incomplete.
8935 dot_pred_rel () may be a better place to fix it. */
8936 if (qp_mutexes
[i
].path
== md
.path
)
8938 /* If it is a proper subset of the mutex, create a
8941 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
8944 qp_mutexes
[i
].prmask
&= ~mask
;
8945 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
8947 /* Modify the mutex if there are more than one
8955 /* Remove the mutex. */
8956 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
8964 add_qp_mutex (mask
);
8969 /* Remove any mutexes which contain any of the PRs indicated in the mask.
8971 Any changes to a PR clears the mutex relations which include that PR. */
8974 clear_qp_mutex (mask
)
8980 while (i
< qp_mutexeslen
)
8982 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
8986 fprintf (stderr
, " Clearing mutex relation");
8987 print_prmask (qp_mutexes
[i
].prmask
);
8988 fprintf (stderr
, "\n");
8990 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
8997 /* Clear implies relations which contain PRs in the given masks.
8998 P1_MASK indicates the source of the implies relation, while P2_MASK
8999 indicates the implied PR. */
9002 clear_qp_implies (p1_mask
, p2_mask
)
9009 while (i
< qp_implieslen
)
9011 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9012 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9015 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9016 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9017 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9024 /* Add the PRs specified to the list of implied relations. */
9027 add_qp_imply (p1
, p2
)
9034 /* p0 is not meaningful here. */
9035 if (p1
== 0 || p2
== 0)
9041 /* If it exists already, ignore it. */
9042 for (i
= 0; i
< qp_implieslen
; i
++)
9044 if (qp_implies
[i
].p1
== p1
9045 && qp_implies
[i
].p2
== p2
9046 && qp_implies
[i
].path
== md
.path
9047 && !qp_implies
[i
].p2_branched
)
9051 if (qp_implieslen
== qp_impliestotlen
)
9053 qp_impliestotlen
+= 20;
9054 qp_implies
= (struct qp_imply
*)
9055 xrealloc ((void *) qp_implies
,
9056 qp_impliestotlen
* sizeof (struct qp_imply
));
9059 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9060 qp_implies
[qp_implieslen
].p1
= p1
;
9061 qp_implies
[qp_implieslen
].p2
= p2
;
9062 qp_implies
[qp_implieslen
].path
= md
.path
;
9063 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9065 /* Add in the implied transitive relations; for everything that p2 implies,
9066 make p1 imply that, too; for everything that implies p1, make it imply p2
9068 for (i
= 0; i
< qp_implieslen
; i
++)
9070 if (qp_implies
[i
].p1
== p2
)
9071 add_qp_imply (p1
, qp_implies
[i
].p2
);
9072 if (qp_implies
[i
].p2
== p1
)
9073 add_qp_imply (qp_implies
[i
].p1
, p2
);
9075 /* Add in mutex relations implied by this implies relation; for each mutex
9076 relation containing p2, duplicate it and replace p2 with p1. */
9077 bit
= (valueT
) 1 << p1
;
9078 mask
= (valueT
) 1 << p2
;
9079 for (i
= 0; i
< qp_mutexeslen
; i
++)
9081 if (qp_mutexes
[i
].prmask
& mask
)
9082 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9086 /* Add the PRs specified in the mask to the mutex list; this means that only
9087 one of the PRs can be true at any time. PR0 should never be included in
9097 if (qp_mutexeslen
== qp_mutexestotlen
)
9099 qp_mutexestotlen
+= 20;
9100 qp_mutexes
= (struct qpmutex
*)
9101 xrealloc ((void *) qp_mutexes
,
9102 qp_mutexestotlen
* sizeof (struct qpmutex
));
9106 fprintf (stderr
, " Registering mutex on");
9107 print_prmask (mask
);
9108 fprintf (stderr
, "\n");
9110 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9111 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9115 has_suffix_p (name
, suffix
)
9119 size_t namelen
= strlen (name
);
9120 size_t sufflen
= strlen (suffix
);
9122 if (namelen
<= sufflen
)
9124 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9128 clear_register_values ()
9132 fprintf (stderr
, " Clearing register values\n");
9133 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9134 gr_values
[i
].known
= 0;
9137 /* Keep track of register values/changes which affect DV tracking.
9139 optimization note: should add a flag to classes of insns where otherwise we
9140 have to examine a group of strings to identify them. */
9143 note_register_values (idesc
)
9144 struct ia64_opcode
*idesc
;
9146 valueT qp_changemask
= 0;
9149 /* Invalidate values for registers being written to. */
9150 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9152 if (idesc
->operands
[i
] == IA64_OPND_R1
9153 || idesc
->operands
[i
] == IA64_OPND_R2
9154 || idesc
->operands
[i
] == IA64_OPND_R3
)
9156 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9157 if (regno
> 0 && regno
< NELEMS (gr_values
))
9158 gr_values
[regno
].known
= 0;
9160 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9162 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9163 if (regno
> 0 && regno
< 4)
9164 gr_values
[regno
].known
= 0;
9166 else if (idesc
->operands
[i
] == IA64_OPND_P1
9167 || idesc
->operands
[i
] == IA64_OPND_P2
)
9169 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9170 qp_changemask
|= (valueT
) 1 << regno
;
9172 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9174 if (idesc
->operands
[2] & (valueT
) 0x10000)
9175 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9177 qp_changemask
= idesc
->operands
[2];
9180 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9182 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9183 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9185 qp_changemask
= idesc
->operands
[1];
9186 qp_changemask
&= ~(valueT
) 0xFFFF;
9191 /* Always clear qp branch flags on any PR change. */
9192 /* FIXME there may be exceptions for certain compares. */
9193 clear_qp_branch_flag (qp_changemask
);
9195 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9196 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9198 qp_changemask
|= ~(valueT
) 0xFFFF;
9199 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9201 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9202 gr_values
[i
].known
= 0;
9204 clear_qp_mutex (qp_changemask
);
9205 clear_qp_implies (qp_changemask
, qp_changemask
);
9207 /* After a call, all register values are undefined, except those marked
9209 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9210 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9212 /* FIXME keep GR values which are marked as "safe_across_calls" */
9213 clear_register_values ();
9214 clear_qp_mutex (~qp_safe_across_calls
);
9215 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9216 clear_qp_branch_flag (~qp_safe_across_calls
);
9218 else if (is_interruption_or_rfi (idesc
)
9219 || is_taken_branch (idesc
))
9221 clear_register_values ();
9222 clear_qp_mutex (~(valueT
) 0);
9223 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9225 /* Look for mutex and implies relations. */
9226 else if ((idesc
->operands
[0] == IA64_OPND_P1
9227 || idesc
->operands
[0] == IA64_OPND_P2
)
9228 && (idesc
->operands
[1] == IA64_OPND_P1
9229 || idesc
->operands
[1] == IA64_OPND_P2
))
9231 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9232 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9233 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9234 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9236 /* If both PRs are PR0, we can't really do anything. */
9237 if (p1
== 0 && p2
== 0)
9240 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9242 /* In general, clear mutexes and implies which include P1 or P2,
9243 with the following exceptions. */
9244 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9245 || has_suffix_p (idesc
->name
, ".and.orcm"))
9247 clear_qp_implies (p2mask
, p1mask
);
9249 else if (has_suffix_p (idesc
->name
, ".andcm")
9250 || has_suffix_p (idesc
->name
, ".and"))
9252 clear_qp_implies (0, p1mask
| p2mask
);
9254 else if (has_suffix_p (idesc
->name
, ".orcm")
9255 || has_suffix_p (idesc
->name
, ".or"))
9257 clear_qp_mutex (p1mask
| p2mask
);
9258 clear_qp_implies (p1mask
| p2mask
, 0);
9264 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9266 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9267 if (p1
== 0 || p2
== 0)
9268 clear_qp_mutex (p1mask
| p2mask
);
9270 added
= update_qp_mutex (p1mask
| p2mask
);
9272 if (CURR_SLOT
.qp_regno
== 0
9273 || has_suffix_p (idesc
->name
, ".unc"))
9275 if (added
== 0 && p1
&& p2
)
9276 add_qp_mutex (p1mask
| p2mask
);
9277 if (CURR_SLOT
.qp_regno
!= 0)
9280 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9282 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9287 /* Look for mov imm insns into GRs. */
9288 else if (idesc
->operands
[0] == IA64_OPND_R1
9289 && (idesc
->operands
[1] == IA64_OPND_IMM22
9290 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9291 && (strcmp (idesc
->name
, "mov") == 0
9292 || strcmp (idesc
->name
, "movl") == 0))
9294 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9295 if (regno
> 0 && regno
< NELEMS (gr_values
))
9297 gr_values
[regno
].known
= 1;
9298 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9299 gr_values
[regno
].path
= md
.path
;
9302 fprintf (stderr
, " Know gr%d = ", regno
);
9303 fprintf_vma (stderr
, gr_values
[regno
].value
);
9304 fputs ("\n", stderr
);
9310 clear_qp_mutex (qp_changemask
);
9311 clear_qp_implies (qp_changemask
, qp_changemask
);
9315 /* Return whether the given predicate registers are currently mutex. */
9318 qp_mutex (p1
, p2
, path
)
9328 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9329 for (i
= 0; i
< qp_mutexeslen
; i
++)
9331 if (qp_mutexes
[i
].path
>= path
9332 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9339 /* Return whether the given resource is in the given insn's list of chks
9340 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9344 resources_match (rs
, idesc
, note
, qp_regno
, path
)
9346 struct ia64_opcode
*idesc
;
9351 struct rsrc specs
[MAX_SPECS
];
9354 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9355 we don't need to check. One exception is note 11, which indicates that
9356 target predicates are written regardless of PR[qp]. */
9357 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
9361 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
9364 /* UNAT checking is a bit more specific than other resources */
9365 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
9366 && specs
[count
].mem_offset
.hint
9367 && rs
->mem_offset
.hint
)
9369 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
9371 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
9372 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
9379 /* Skip apparent PR write conflicts where both writes are an AND or both
9380 writes are an OR. */
9381 if (rs
->dependency
->specifier
== IA64_RS_PR
9382 || rs
->dependency
->specifier
== IA64_RS_PRr
9383 || rs
->dependency
->specifier
== IA64_RS_PR63
)
9385 if (specs
[count
].cmp_type
!= CMP_NONE
9386 && specs
[count
].cmp_type
== rs
->cmp_type
)
9389 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
9390 dv_mode
[rs
->dependency
->mode
],
9391 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9392 specs
[count
].index
: 63);
9397 " %s on parallel compare conflict %s vs %s on PR%d\n",
9398 dv_mode
[rs
->dependency
->mode
],
9399 dv_cmp_type
[rs
->cmp_type
],
9400 dv_cmp_type
[specs
[count
].cmp_type
],
9401 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9402 specs
[count
].index
: 63);
9406 /* If either resource is not specific, conservatively assume a conflict
9408 if (!specs
[count
].specific
|| !rs
->specific
)
9410 else if (specs
[count
].index
== rs
->index
)
9415 fprintf (stderr
, " No %s conflicts\n", rs
->dependency
->name
);
9421 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9422 insert a stop to create the break. Update all resource dependencies
9423 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9424 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9425 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9429 insn_group_break (insert_stop
, qp_regno
, save_current
)
9436 if (insert_stop
&& md
.num_slots_in_use
> 0)
9437 PREV_SLOT
.end_of_insn_group
= 1;
9441 fprintf (stderr
, " Insn group break%s",
9442 (insert_stop
? " (w/stop)" : ""));
9444 fprintf (stderr
, " effective for QP=%d", qp_regno
);
9445 fprintf (stderr
, "\n");
9449 while (i
< regdepslen
)
9451 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
9454 && regdeps
[i
].qp_regno
!= qp_regno
)
9461 && CURR_SLOT
.src_file
== regdeps
[i
].file
9462 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
9468 /* clear dependencies which are automatically cleared by a stop, or
9469 those that have reached the appropriate state of insn serialization */
9470 if (dep
->semantics
== IA64_DVS_IMPLIED
9471 || dep
->semantics
== IA64_DVS_IMPLIEDF
9472 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
9474 print_dependency ("Removing", i
);
9475 regdeps
[i
] = regdeps
[--regdepslen
];
9479 if (dep
->semantics
== IA64_DVS_DATA
9480 || dep
->semantics
== IA64_DVS_INSTR
9481 || dep
->semantics
== IA64_DVS_SPECIFIC
)
9483 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
9484 regdeps
[i
].insn_srlz
= STATE_STOP
;
9485 if (regdeps
[i
].data_srlz
== STATE_NONE
)
9486 regdeps
[i
].data_srlz
= STATE_STOP
;
9493 /* Add the given resource usage spec to the list of active dependencies. */
9496 mark_resource (idesc
, dep
, spec
, depind
, path
)
9497 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
9498 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
9503 if (regdepslen
== regdepstotlen
)
9505 regdepstotlen
+= 20;
9506 regdeps
= (struct rsrc
*)
9507 xrealloc ((void *) regdeps
,
9508 regdepstotlen
* sizeof (struct rsrc
));
9511 regdeps
[regdepslen
] = *spec
;
9512 regdeps
[regdepslen
].depind
= depind
;
9513 regdeps
[regdepslen
].path
= path
;
9514 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
9515 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
9517 print_dependency ("Adding", regdepslen
);
9523 print_dependency (action
, depind
)
9529 fprintf (stderr
, " %s %s '%s'",
9530 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
9531 (regdeps
[depind
].dependency
)->name
);
9532 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
!= 0)
9533 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
9534 if (regdeps
[depind
].mem_offset
.hint
)
9536 fputs (" ", stderr
);
9537 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
9538 fputs ("+", stderr
);
9539 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
9541 fprintf (stderr
, "\n");
9546 instruction_serialization ()
9550 fprintf (stderr
, " Instruction serialization\n");
9551 for (i
= 0; i
< regdepslen
; i
++)
9552 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
9553 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
9557 data_serialization ()
9561 fprintf (stderr
, " Data serialization\n");
9562 while (i
< regdepslen
)
9564 if (regdeps
[i
].data_srlz
== STATE_STOP
9565 /* Note: as of 991210, all "other" dependencies are cleared by a
9566 data serialization. This might change with new tables */
9567 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
9569 print_dependency ("Removing", i
);
9570 regdeps
[i
] = regdeps
[--regdepslen
];
9577 /* Insert stops and serializations as needed to avoid DVs. */
9580 remove_marked_resource (rs
)
9583 switch (rs
->dependency
->semantics
)
9585 case IA64_DVS_SPECIFIC
:
9587 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
9588 /* ...fall through... */
9589 case IA64_DVS_INSTR
:
9591 fprintf (stderr
, "Inserting instr serialization\n");
9592 if (rs
->insn_srlz
< STATE_STOP
)
9593 insn_group_break (1, 0, 0);
9594 if (rs
->insn_srlz
< STATE_SRLZ
)
9596 struct slot oldslot
= CURR_SLOT
;
9597 /* Manually jam a srlz.i insn into the stream */
9598 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
9599 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
9600 instruction_serialization ();
9601 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9602 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9604 CURR_SLOT
= oldslot
;
9606 insn_group_break (1, 0, 0);
9608 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
9609 "other" types of DV are eliminated
9610 by a data serialization */
9613 fprintf (stderr
, "Inserting data serialization\n");
9614 if (rs
->data_srlz
< STATE_STOP
)
9615 insn_group_break (1, 0, 0);
9617 struct slot oldslot
= CURR_SLOT
;
9618 /* Manually jam a srlz.d insn into the stream */
9619 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
9620 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
9621 data_serialization ();
9622 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9623 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9625 CURR_SLOT
= oldslot
;
9628 case IA64_DVS_IMPLIED
:
9629 case IA64_DVS_IMPLIEDF
:
9631 fprintf (stderr
, "Inserting stop\n");
9632 insn_group_break (1, 0, 0);
9639 /* Check the resources used by the given opcode against the current dependency
9642 The check is run once for each execution path encountered. In this case,
9643 a unique execution path is the sequence of instructions following a code
9644 entry point, e.g. the following has three execution paths, one starting
9645 at L0, one at L1, and one at L2.
9654 check_dependencies (idesc
)
9655 struct ia64_opcode
*idesc
;
9657 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
9661 /* Note that the number of marked resources may change within the
9662 loop if in auto mode. */
9664 while (i
< regdepslen
)
9666 struct rsrc
*rs
= ®deps
[i
];
9667 const struct ia64_dependency
*dep
= rs
->dependency
;
9672 if (dep
->semantics
== IA64_DVS_NONE
9673 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
9679 note
= NOTE (opdeps
->chks
[chkind
]);
9681 /* Check this resource against each execution path seen thus far. */
9682 for (path
= 0; path
<= md
.path
; path
++)
9686 /* If the dependency wasn't on the path being checked, ignore it. */
9687 if (rs
->path
< path
)
9690 /* If the QP for this insn implies a QP which has branched, don't
9691 bother checking. Ed. NOTE: I don't think this check is terribly
9692 useful; what's the point of generating code which will only be
9693 reached if its QP is zero?
9694 This code was specifically inserted to handle the following code,
9695 based on notes from Intel's DV checking code, where p1 implies p2.
9701 if (CURR_SLOT
.qp_regno
!= 0)
9705 for (implies
= 0; implies
< qp_implieslen
; implies
++)
9707 if (qp_implies
[implies
].path
>= path
9708 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
9709 && qp_implies
[implies
].p2_branched
)
9719 if ((matchtype
= resources_match (rs
, idesc
, note
,
9720 CURR_SLOT
.qp_regno
, path
)) != 0)
9723 char pathmsg
[256] = "";
9724 char indexmsg
[256] = "";
9725 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
9728 sprintf (pathmsg
, " when entry is at label '%s'",
9729 md
.entry_labels
[path
- 1]);
9730 if (rs
->specific
&& rs
->index
!= 0)
9731 sprintf (indexmsg
, ", specific resource number is %d",
9733 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9735 (certain
? "violates" : "may violate"),
9736 dv_mode
[dep
->mode
], dep
->name
,
9737 dv_sem
[dep
->semantics
],
9740 if (md
.explicit_mode
)
9742 as_warn ("%s", msg
);
9744 as_warn (_("Only the first path encountering the conflict "
9746 as_warn_where (rs
->file
, rs
->line
,
9747 _("This is the location of the "
9748 "conflicting usage"));
9749 /* Don't bother checking other paths, to avoid duplicating
9756 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
9758 remove_marked_resource (rs
);
9760 /* since the set of dependencies has changed, start over */
9761 /* FIXME -- since we're removing dvs as we go, we
9762 probably don't really need to start over... */
9775 /* Register new dependencies based on the given opcode. */
9778 mark_resources (idesc
)
9779 struct ia64_opcode
*idesc
;
9782 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
9783 int add_only_qp_reads
= 0;
9785 /* A conditional branch only uses its resources if it is taken; if it is
9786 taken, we stop following that path. The other branch types effectively
9787 *always* write their resources. If it's not taken, register only QP
9789 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
9791 add_only_qp_reads
= 1;
9795 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
9797 for (i
= 0; i
< opdeps
->nregs
; i
++)
9799 const struct ia64_dependency
*dep
;
9800 struct rsrc specs
[MAX_SPECS
];
9805 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
9806 note
= NOTE (opdeps
->regs
[i
]);
9808 if (add_only_qp_reads
9809 && !(dep
->mode
== IA64_DV_WAR
9810 && (dep
->specifier
== IA64_RS_PR
9811 || dep
->specifier
== IA64_RS_PRr
9812 || dep
->specifier
== IA64_RS_PR63
)))
9815 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
9818 if (md
.debug_dv
&& !count
)
9819 fprintf (stderr
, " No %s %s usage found (path %d)\n",
9820 dv_mode
[dep
->mode
], dep
->name
, md
.path
);
9825 mark_resource (idesc
, dep
, &specs
[count
],
9826 DEP (opdeps
->regs
[i
]), md
.path
);
9829 /* The execution path may affect register values, which may in turn
9830 affect which indirect-access resources are accessed. */
9831 switch (dep
->specifier
)
9843 for (path
= 0; path
< md
.path
; path
++)
9845 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
9847 mark_resource (idesc
, dep
, &specs
[count
],
9848 DEP (opdeps
->regs
[i
]), path
);
9855 /* Remove dependencies when they no longer apply. */
9858 update_dependencies (idesc
)
9859 struct ia64_opcode
*idesc
;
9863 if (strcmp (idesc
->name
, "srlz.i") == 0)
9865 instruction_serialization ();
9867 else if (strcmp (idesc
->name
, "srlz.d") == 0)
9869 data_serialization ();
9871 else if (is_interruption_or_rfi (idesc
)
9872 || is_taken_branch (idesc
))
9874 /* Although technically the taken branch doesn't clear dependencies
9875 which require a srlz.[id], we don't follow the branch; the next
9876 instruction is assumed to start with a clean slate. */
9880 else if (is_conditional_branch (idesc
)
9881 && CURR_SLOT
.qp_regno
!= 0)
9883 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
9885 for (i
= 0; i
< qp_implieslen
; i
++)
9887 /* If the conditional branch's predicate is implied by the predicate
9888 in an existing dependency, remove that dependency. */
9889 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
9892 /* Note that this implied predicate takes a branch so that if
9893 a later insn generates a DV but its predicate implies this
9894 one, we can avoid the false DV warning. */
9895 qp_implies
[i
].p2_branched
= 1;
9896 while (depind
< regdepslen
)
9898 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
9900 print_dependency ("Removing", depind
);
9901 regdeps
[depind
] = regdeps
[--regdepslen
];
9908 /* Any marked resources which have this same predicate should be
9909 cleared, provided that the QP hasn't been modified between the
9910 marking instruction and the branch. */
9913 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
9918 while (i
< regdepslen
)
9920 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
9921 && regdeps
[i
].link_to_qp_branch
9922 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
9923 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
9925 /* Treat like a taken branch */
9926 print_dependency ("Removing", i
);
9927 regdeps
[i
] = regdeps
[--regdepslen
];
9936 /* Examine the current instruction for dependency violations. */
9940 struct ia64_opcode
*idesc
;
9944 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
9945 idesc
->name
, CURR_SLOT
.src_line
,
9946 idesc
->dependencies
->nchks
,
9947 idesc
->dependencies
->nregs
);
9950 /* Look through the list of currently marked resources; if the current
9951 instruction has the dependency in its chks list which uses that resource,
9952 check against the specific resources used. */
9953 check_dependencies (idesc
);
9955 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
9956 then add them to the list of marked resources. */
9957 mark_resources (idesc
);
9959 /* There are several types of dependency semantics, and each has its own
9960 requirements for being cleared
9962 Instruction serialization (insns separated by interruption, rfi, or
9963 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
9965 Data serialization (instruction serialization, or writer + srlz.d +
9966 reader, where writer and srlz.d are in separate groups) clears
9967 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
9968 always be the case).
9970 Instruction group break (groups separated by stop, taken branch,
9971 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
9973 update_dependencies (idesc
);
9975 /* Sometimes, knowing a register value allows us to avoid giving a false DV
9976 warning. Keep track of as many as possible that are useful. */
9977 note_register_values (idesc
);
9979 /* We don't need or want this anymore. */
9980 md
.mem_offset
.hint
= 0;
9985 /* Translate one line of assembly. Pseudo ops and labels do not show
9991 char *saved_input_line_pointer
, *mnemonic
;
9992 const struct pseudo_opcode
*pdesc
;
9993 struct ia64_opcode
*idesc
;
9994 unsigned char qp_regno
;
9998 saved_input_line_pointer
= input_line_pointer
;
9999 input_line_pointer
= str
;
10001 /* extract the opcode (mnemonic): */
10003 mnemonic
= input_line_pointer
;
10004 ch
= get_symbol_end ();
10005 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10008 *input_line_pointer
= ch
;
10009 (*pdesc
->handler
) (pdesc
->arg
);
10013 /* Find the instruction descriptor matching the arguments. */
10015 idesc
= ia64_find_opcode (mnemonic
);
10016 *input_line_pointer
= ch
;
10019 as_bad ("Unknown opcode `%s'", mnemonic
);
10023 idesc
= parse_operands (idesc
);
10027 /* Handle the dynamic ops we can handle now: */
10028 if (idesc
->type
== IA64_TYPE_DYN
)
10030 if (strcmp (idesc
->name
, "add") == 0)
10032 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10033 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10037 ia64_free_opcode (idesc
);
10038 idesc
= ia64_find_opcode (mnemonic
);
10040 know (!idesc
->next
);
10043 else if (strcmp (idesc
->name
, "mov") == 0)
10045 enum ia64_opnd opnd1
, opnd2
;
10048 opnd1
= idesc
->operands
[0];
10049 opnd2
= idesc
->operands
[1];
10050 if (opnd1
== IA64_OPND_AR3
)
10052 else if (opnd2
== IA64_OPND_AR3
)
10056 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10058 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10059 mnemonic
= "mov.i";
10061 mnemonic
= "mov.m";
10065 ia64_free_opcode (idesc
);
10066 idesc
= ia64_find_opcode (mnemonic
);
10067 while (idesc
!= NULL
10068 && (idesc
->operands
[0] != opnd1
10069 || idesc
->operands
[1] != opnd2
))
10070 idesc
= get_next_opcode (idesc
);
10073 else if (strcmp (idesc
->name
, "mov.i") == 0
10074 || strcmp (idesc
->name
, "mov.m") == 0)
10076 enum ia64_opnd opnd1
, opnd2
;
10079 opnd1
= idesc
->operands
[0];
10080 opnd2
= idesc
->operands
[1];
10081 if (opnd1
== IA64_OPND_AR3
)
10083 else if (opnd2
== IA64_OPND_AR3
)
10087 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10090 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10092 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10094 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10095 as_bad ("AR %d cannot be accessed by %c-unit",
10096 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10102 if (md
.qp
.X_op
== O_register
)
10104 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10105 md
.qp
.X_op
= O_absent
;
10108 flags
= idesc
->flags
;
10110 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10112 /* The alignment frag has to end with a stop bit only if the
10113 next instruction after the alignment directive has to be
10114 the first instruction in an instruction group. */
10117 while (align_frag
->fr_type
!= rs_align_code
)
10119 align_frag
= align_frag
->fr_next
;
10123 /* align_frag can be NULL if there are directives in
10125 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10126 align_frag
->tc_frag_data
= 1;
10129 insn_group_break (1, 0, 0);
10133 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10135 as_bad ("`%s' cannot be predicated", idesc
->name
);
10139 /* Build the instruction. */
10140 CURR_SLOT
.qp_regno
= qp_regno
;
10141 CURR_SLOT
.idesc
= idesc
;
10142 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10143 dwarf2_where (&CURR_SLOT
.debug_line
);
10145 /* Add unwind entry, if there is one. */
10146 if (unwind
.current_entry
)
10148 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10149 unwind
.current_entry
= NULL
;
10152 /* Check for dependency violations. */
10156 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10157 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10158 emit_one_bundle ();
10160 if ((flags
& IA64_OPCODE_LAST
) != 0)
10161 insn_group_break (1, 0, 0);
10163 md
.last_text_seg
= now_seg
;
10166 input_line_pointer
= saved_input_line_pointer
;
10169 /* Called when symbol NAME cannot be found in the symbol table.
10170 Should be used for dynamic valued symbols only. */
10173 md_undefined_symbol (name
)
10174 char *name ATTRIBUTE_UNUSED
;
10179 /* Called for any expression that can not be recognized. When the
10180 function is called, `input_line_pointer' will point to the start of
10187 enum pseudo_type pseudo_type
;
10192 switch (*input_line_pointer
)
10195 /* Find what relocation pseudo-function we're dealing with. */
10197 ch
= *++input_line_pointer
;
10198 for (i
= 0; i
< NELEMS (pseudo_func
); ++i
)
10199 if (pseudo_func
[i
].name
&& pseudo_func
[i
].name
[0] == ch
)
10201 len
= strlen (pseudo_func
[i
].name
);
10202 if (strncmp (pseudo_func
[i
].name
+ 1,
10203 input_line_pointer
+ 1, len
- 1) == 0
10204 && !is_part_of_name (input_line_pointer
[len
]))
10206 input_line_pointer
+= len
;
10207 pseudo_type
= pseudo_func
[i
].type
;
10211 switch (pseudo_type
)
10213 case PSEUDO_FUNC_RELOC
:
10214 SKIP_WHITESPACE ();
10215 if (*input_line_pointer
!= '(')
10217 as_bad ("Expected '('");
10221 ++input_line_pointer
;
10223 if (*input_line_pointer
++ != ')')
10225 as_bad ("Missing ')'");
10228 if (e
->X_op
!= O_symbol
)
10230 if (e
->X_op
!= O_pseudo_fixup
)
10232 as_bad ("Not a symbolic expression");
10235 if (i
!= FUNC_LT_RELATIVE
)
10237 as_bad ("Illegal combination of relocation functions");
10240 switch (S_GET_VALUE (e
->X_op_symbol
))
10242 case FUNC_FPTR_RELATIVE
:
10243 i
= FUNC_LT_FPTR_RELATIVE
; break;
10244 case FUNC_DTP_MODULE
:
10245 i
= FUNC_LT_DTP_MODULE
; break;
10246 case FUNC_DTP_RELATIVE
:
10247 i
= FUNC_LT_DTP_RELATIVE
; break;
10248 case FUNC_TP_RELATIVE
:
10249 i
= FUNC_LT_TP_RELATIVE
; break;
10251 as_bad ("Illegal combination of relocation functions");
10255 /* Make sure gas doesn't get rid of local symbols that are used
10257 e
->X_op
= O_pseudo_fixup
;
10258 e
->X_op_symbol
= pseudo_func
[i
].u
.sym
;
10261 case PSEUDO_FUNC_CONST
:
10262 e
->X_op
= O_constant
;
10263 e
->X_add_number
= pseudo_func
[i
].u
.ival
;
10266 case PSEUDO_FUNC_REG
:
10267 e
->X_op
= O_register
;
10268 e
->X_add_number
= pseudo_func
[i
].u
.ival
;
10272 name
= input_line_pointer
- 1;
10274 as_bad ("Unknown pseudo function `%s'", name
);
10280 ++input_line_pointer
;
10282 if (*input_line_pointer
!= ']')
10284 as_bad ("Closing bracket misssing");
10289 if (e
->X_op
!= O_register
)
10290 as_bad ("Register expected as index");
10292 ++input_line_pointer
;
10303 ignore_rest_of_line ();
10306 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10307 a section symbol plus some offset. For relocs involving @fptr(),
10308 directives we don't want such adjustments since we need to have the
10309 original symbol's name in the reloc. */
10311 ia64_fix_adjustable (fix
)
10314 /* Prevent all adjustments to global symbols */
10315 if (S_IS_EXTERN (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10318 switch (fix
->fx_r_type
)
10320 case BFD_RELOC_IA64_FPTR64I
:
10321 case BFD_RELOC_IA64_FPTR32MSB
:
10322 case BFD_RELOC_IA64_FPTR32LSB
:
10323 case BFD_RELOC_IA64_FPTR64MSB
:
10324 case BFD_RELOC_IA64_FPTR64LSB
:
10325 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10326 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10336 ia64_force_relocation (fix
)
10339 switch (fix
->fx_r_type
)
10341 case BFD_RELOC_IA64_FPTR64I
:
10342 case BFD_RELOC_IA64_FPTR32MSB
:
10343 case BFD_RELOC_IA64_FPTR32LSB
:
10344 case BFD_RELOC_IA64_FPTR64MSB
:
10345 case BFD_RELOC_IA64_FPTR64LSB
:
10347 case BFD_RELOC_IA64_LTOFF22
:
10348 case BFD_RELOC_IA64_LTOFF64I
:
10349 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10350 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10351 case BFD_RELOC_IA64_PLTOFF22
:
10352 case BFD_RELOC_IA64_PLTOFF64I
:
10353 case BFD_RELOC_IA64_PLTOFF64MSB
:
10354 case BFD_RELOC_IA64_PLTOFF64LSB
:
10356 case BFD_RELOC_IA64_LTOFF22X
:
10357 case BFD_RELOC_IA64_LDXMOV
:
10364 return generic_force_reloc (fix
);
10367 /* Decide from what point a pc-relative relocation is relative to,
10368 relative to the pc-relative fixup. Er, relatively speaking. */
10370 ia64_pcrel_from_section (fix
, sec
)
10374 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10376 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10383 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10385 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10389 expr
.X_op
= O_pseudo_fixup
;
10390 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10391 expr
.X_add_number
= 0;
10392 expr
.X_add_symbol
= symbol
;
10393 emit_expr (&expr
, size
);
10396 /* This is called whenever some data item (not an instruction) needs a
10397 fixup. We pick the right reloc code depending on the byteorder
10398 currently in effect. */
10400 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
10406 bfd_reloc_code_real_type code
;
10411 /* There are no reloc for 8 and 16 bit quantities, but we allow
10412 them here since they will work fine as long as the expression
10413 is fully defined at the end of the pass over the source file. */
10414 case 1: code
= BFD_RELOC_8
; break;
10415 case 2: code
= BFD_RELOC_16
; break;
10417 if (target_big_endian
)
10418 code
= BFD_RELOC_IA64_DIR32MSB
;
10420 code
= BFD_RELOC_IA64_DIR32LSB
;
10424 /* In 32-bit mode, data8 could mean function descriptors too. */
10425 if (exp
->X_op
== O_pseudo_fixup
10426 && exp
->X_op_symbol
10427 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
10428 && !(md
.flags
& EF_IA_64_ABI64
))
10430 if (target_big_endian
)
10431 code
= BFD_RELOC_IA64_IPLTMSB
;
10433 code
= BFD_RELOC_IA64_IPLTLSB
;
10434 exp
->X_op
= O_symbol
;
10439 if (target_big_endian
)
10440 code
= BFD_RELOC_IA64_DIR64MSB
;
10442 code
= BFD_RELOC_IA64_DIR64LSB
;
10447 if (exp
->X_op
== O_pseudo_fixup
10448 && exp
->X_op_symbol
10449 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
10451 if (target_big_endian
)
10452 code
= BFD_RELOC_IA64_IPLTMSB
;
10454 code
= BFD_RELOC_IA64_IPLTLSB
;
10455 exp
->X_op
= O_symbol
;
10461 as_bad ("Unsupported fixup size %d", nbytes
);
10462 ignore_rest_of_line ();
10466 if (exp
->X_op
== O_pseudo_fixup
)
10468 exp
->X_op
= O_symbol
;
10469 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
10470 /* ??? If code unchanged, unsupported. */
10473 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
10474 /* We need to store the byte order in effect in case we're going
10475 to fix an 8 or 16 bit relocation (for which there no real
10476 relocs available). See md_apply_fix3(). */
10477 fix
->tc_fix_data
.bigendian
= target_big_endian
;
10480 /* Return the actual relocation we wish to associate with the pseudo
10481 reloc described by SYM and R_TYPE. SYM should be one of the
10482 symbols in the pseudo_func array, or NULL. */
10484 static bfd_reloc_code_real_type
10485 ia64_gen_real_reloc_type (sym
, r_type
)
10486 struct symbol
*sym
;
10487 bfd_reloc_code_real_type r_type
;
10489 bfd_reloc_code_real_type
new = 0;
10496 switch (S_GET_VALUE (sym
))
10498 case FUNC_FPTR_RELATIVE
:
10501 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
10502 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
10503 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
10504 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
10505 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
10510 case FUNC_GP_RELATIVE
:
10513 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
10514 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
10515 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
10516 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
10517 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
10518 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
10523 case FUNC_LT_RELATIVE
:
10526 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
10527 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
10532 case FUNC_LT_RELATIVE_X
:
10535 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
10540 case FUNC_PC_RELATIVE
:
10543 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
10544 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
10545 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
10546 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
10547 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
10548 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
10553 case FUNC_PLT_RELATIVE
:
10556 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
10557 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
10558 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
10559 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
10564 case FUNC_SEC_RELATIVE
:
10567 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
10568 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
10569 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
10570 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
10575 case FUNC_SEG_RELATIVE
:
10578 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
10579 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
10580 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
10581 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
10586 case FUNC_LTV_RELATIVE
:
10589 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
10590 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
10591 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
10592 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
10597 case FUNC_LT_FPTR_RELATIVE
:
10600 case BFD_RELOC_IA64_IMM22
:
10601 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
10602 case BFD_RELOC_IA64_IMM64
:
10603 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
10609 case FUNC_TP_RELATIVE
:
10612 case BFD_RELOC_IA64_IMM14
:
10613 new = BFD_RELOC_IA64_TPREL14
; break;
10614 case BFD_RELOC_IA64_IMM22
:
10615 new = BFD_RELOC_IA64_TPREL22
; break;
10616 case BFD_RELOC_IA64_IMM64
:
10617 new = BFD_RELOC_IA64_TPREL64I
; break;
10623 case FUNC_LT_TP_RELATIVE
:
10626 case BFD_RELOC_IA64_IMM22
:
10627 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
10633 case FUNC_LT_DTP_MODULE
:
10636 case BFD_RELOC_IA64_IMM22
:
10637 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
10643 case FUNC_DTP_RELATIVE
:
10646 case BFD_RELOC_IA64_DIR64MSB
:
10647 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
10648 case BFD_RELOC_IA64_DIR64LSB
:
10649 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
10650 case BFD_RELOC_IA64_IMM14
:
10651 new = BFD_RELOC_IA64_DTPREL14
; break;
10652 case BFD_RELOC_IA64_IMM22
:
10653 new = BFD_RELOC_IA64_DTPREL22
; break;
10654 case BFD_RELOC_IA64_IMM64
:
10655 new = BFD_RELOC_IA64_DTPREL64I
; break;
10661 case FUNC_LT_DTP_RELATIVE
:
10664 case BFD_RELOC_IA64_IMM22
:
10665 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
10671 case FUNC_IPLT_RELOC
:
10678 /* Hmmmm. Should this ever occur? */
10685 /* Here is where generate the appropriate reloc for pseudo relocation
10688 ia64_validate_fix (fix
)
10691 switch (fix
->fx_r_type
)
10693 case BFD_RELOC_IA64_FPTR64I
:
10694 case BFD_RELOC_IA64_FPTR32MSB
:
10695 case BFD_RELOC_IA64_FPTR64LSB
:
10696 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10697 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10698 if (fix
->fx_offset
!= 0)
10699 as_bad_where (fix
->fx_file
, fix
->fx_line
,
10700 "No addend allowed in @fptr() relocation");
10708 fix_insn (fix
, odesc
, value
)
10710 const struct ia64_operand
*odesc
;
10713 bfd_vma insn
[3], t0
, t1
, control_bits
;
10718 slot
= fix
->fx_where
& 0x3;
10719 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
10721 /* Bundles are always in little-endian byte order */
10722 t0
= bfd_getl64 (fixpos
);
10723 t1
= bfd_getl64 (fixpos
+ 8);
10724 control_bits
= t0
& 0x1f;
10725 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
10726 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
10727 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
10730 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
10732 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
10733 insn
[2] |= (((value
& 0x7f) << 13)
10734 | (((value
>> 7) & 0x1ff) << 27)
10735 | (((value
>> 16) & 0x1f) << 22)
10736 | (((value
>> 21) & 0x1) << 21)
10737 | (((value
>> 63) & 0x1) << 36));
10739 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
10741 if (value
& ~0x3fffffffffffffffULL
)
10742 err
= "integer operand out of range";
10743 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
10744 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
10746 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
10749 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
10750 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
10751 | (((value
>> 0) & 0xfffff) << 13));
10754 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
10757 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
10759 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
10760 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
10761 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
10762 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
10765 /* Attempt to simplify or even eliminate a fixup. The return value is
10766 ignored; perhaps it was once meaningful, but now it is historical.
10767 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10769 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10773 md_apply_fix3 (fix
, valP
, seg
)
10776 segT seg ATTRIBUTE_UNUSED
;
10779 valueT value
= *valP
;
10781 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
10785 switch (fix
->fx_r_type
)
10787 case BFD_RELOC_IA64_DIR32MSB
:
10788 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32MSB
;
10791 case BFD_RELOC_IA64_DIR32LSB
:
10792 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32LSB
;
10795 case BFD_RELOC_IA64_DIR64MSB
:
10796 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64MSB
;
10799 case BFD_RELOC_IA64_DIR64LSB
:
10800 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64LSB
;
10809 switch (fix
->fx_r_type
)
10811 case BFD_RELOC_UNUSED
:
10812 /* This must be a TAG13 or TAG13b operand. There are no external
10813 relocs defined for them, so we must give an error. */
10814 as_bad_where (fix
->fx_file
, fix
->fx_line
,
10815 "%s must have a constant value",
10816 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
10820 case BFD_RELOC_IA64_TPREL14
:
10821 case BFD_RELOC_IA64_TPREL22
:
10822 case BFD_RELOC_IA64_TPREL64I
:
10823 case BFD_RELOC_IA64_LTOFF_TPREL22
:
10824 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
10825 case BFD_RELOC_IA64_DTPREL14
:
10826 case BFD_RELOC_IA64_DTPREL22
:
10827 case BFD_RELOC_IA64_DTPREL64I
:
10828 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
10829 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
10836 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
10838 if (fix
->tc_fix_data
.bigendian
)
10839 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
10841 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
10846 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
10851 /* Generate the BFD reloc to be stuck in the object file from the
10852 fixup used internally in the assembler. */
10855 tc_gen_reloc (sec
, fixp
)
10856 asection
*sec ATTRIBUTE_UNUSED
;
10861 reloc
= xmalloc (sizeof (*reloc
));
10862 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
10863 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
10864 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
10865 reloc
->addend
= fixp
->fx_offset
;
10866 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
10870 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
10871 "Cannot represent %s relocation in object file",
10872 bfd_get_reloc_code_name (fixp
->fx_r_type
));
10877 /* Turn a string in input_line_pointer into a floating point constant
10878 of type TYPE, and store the appropriate bytes in *LIT. The number
10879 of LITTLENUMS emitted is stored in *SIZE. An error message is
10880 returned, or NULL on OK. */
10882 #define MAX_LITTLENUMS 5
10885 md_atof (type
, lit
, size
)
10890 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
10920 return "Bad call to MD_ATOF()";
10922 t
= atof_ieee (input_line_pointer
, type
, words
);
10924 input_line_pointer
= t
;
10926 (*ia64_float_to_chars
) (lit
, words
, prec
);
10930 /* It is 10 byte floating point with 6 byte padding. */
10931 memset (&lit
[10], 0, 6);
10932 *size
= 8 * sizeof (LITTLENUM_TYPE
);
10935 *size
= prec
* sizeof (LITTLENUM_TYPE
);
10940 /* Handle ia64 specific semantics of the align directive. */
10943 ia64_md_do_align (n
, fill
, len
, max
)
10944 int n ATTRIBUTE_UNUSED
;
10945 const char *fill ATTRIBUTE_UNUSED
;
10946 int len ATTRIBUTE_UNUSED
;
10947 int max ATTRIBUTE_UNUSED
;
10949 if (subseg_text_p (now_seg
))
10950 ia64_flush_insns ();
10953 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
10954 of an rs_align_code fragment. */
10957 ia64_handle_align (fragp
)
10960 /* Use mfi bundle of nops with no stop bits. */
10961 static const unsigned char le_nop
[]
10962 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10963 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10964 static const unsigned char le_nop_stop
[]
10965 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10966 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10970 const unsigned char *nop
;
10972 if (fragp
->fr_type
!= rs_align_code
)
10975 /* Check if this frag has to end with a stop bit. */
10976 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
10978 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
10979 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
10981 /* If no paddings are needed, we check if we need a stop bit. */
10982 if (!bytes
&& fragp
->tc_frag_data
)
10984 if (fragp
->fr_fix
< 16)
10986 /* FIXME: It won't work with
10988 alloc r32=ar.pfs,1,2,4,0
10992 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
10993 _("Can't add stop bit to mark end of instruction group"));
10996 /* Bundles are always in little-endian byte order. Make sure
10997 the previous bundle has the stop bit. */
11001 /* Make sure we are on a 16-byte boundary, in case someone has been
11002 putting data into a text section. */
11005 int fix
= bytes
& 15;
11006 memset (p
, 0, fix
);
11009 fragp
->fr_fix
+= fix
;
11012 /* Instruction bundles are always little-endian. */
11013 memcpy (p
, nop
, 16);
11014 fragp
->fr_var
= 16;
11018 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11023 number_to_chars_bigendian (lit
, (long) (*words
++),
11024 sizeof (LITTLENUM_TYPE
));
11025 lit
+= sizeof (LITTLENUM_TYPE
);
11030 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11035 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11036 sizeof (LITTLENUM_TYPE
));
11037 lit
+= sizeof (LITTLENUM_TYPE
);
11042 ia64_elf_section_change_hook (void)
11044 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11045 && elf_linked_to_section (now_seg
) == NULL
)
11046 elf_linked_to_section (now_seg
) = text_section
;
11047 dot_byteorder (-1);
11050 /* Check if a label should be made global. */
11052 ia64_check_label (symbolS
*label
)
11054 if (*input_line_pointer
== ':')
11056 S_SET_EXTERNAL (label
);
11057 input_line_pointer
++;
11061 /* Used to remember where .alias and .secalias directives are seen. We
11062 will rename symbol and section names when we are about to output
11063 the relocatable file. */
11066 char *file
; /* The file where the directive is seen. */
11067 unsigned int line
; /* The line number the directive is at. */
11068 const char *name
; /* The orignale name of the symbol. */
11071 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11072 .secalias. Otherwise, it is .alias. */
11074 dot_alias (int section
)
11076 char *name
, *alias
;
11080 const char *error_string
;
11083 struct hash_control
*ahash
, *nhash
;
11086 name
= input_line_pointer
;
11087 delim
= get_symbol_end ();
11088 end_name
= input_line_pointer
;
11091 if (name
== end_name
)
11093 as_bad (_("expected symbol name"));
11094 discard_rest_of_line ();
11098 SKIP_WHITESPACE ();
11100 if (*input_line_pointer
!= ',')
11103 as_bad (_("expected comma after \"%s\""), name
);
11105 ignore_rest_of_line ();
11109 input_line_pointer
++;
11112 /* We call demand_copy_C_string to check if alias string is valid.
11113 There should be a closing `"' and no `\0' in the string. */
11114 alias
= demand_copy_C_string (&len
);
11117 ignore_rest_of_line ();
11121 /* Make a copy of name string. */
11122 len
= strlen (name
) + 1;
11123 obstack_grow (¬es
, name
, len
);
11124 name
= obstack_finish (¬es
);
11129 ahash
= secalias_hash
;
11130 nhash
= secalias_name_hash
;
11135 ahash
= alias_hash
;
11136 nhash
= alias_name_hash
;
11139 /* Check if alias has been used before. */
11140 h
= (struct alias
*) hash_find (ahash
, alias
);
11143 if (strcmp (h
->name
, name
))
11144 as_bad (_("`%s' is already the alias of %s `%s'"),
11145 alias
, kind
, h
->name
);
11149 /* Check if name already has an alias. */
11150 a
= (const char *) hash_find (nhash
, name
);
11153 if (strcmp (a
, alias
))
11154 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11158 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11159 as_where (&h
->file
, &h
->line
);
11162 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11165 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11166 alias
, kind
, error_string
);
11170 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11173 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11174 alias
, kind
, error_string
);
11176 obstack_free (¬es
, name
);
11177 obstack_free (¬es
, alias
);
11180 demand_empty_rest_of_line ();
11183 /* It renames the original symbol name to its alias. */
11185 do_alias (const char *alias
, PTR value
)
11187 struct alias
*h
= (struct alias
*) value
;
11188 symbolS
*sym
= symbol_find (h
->name
);
11191 as_warn_where (h
->file
, h
->line
,
11192 _("symbol `%s' aliased to `%s' is not used"),
11195 S_SET_NAME (sym
, (char *) alias
);
11198 /* Called from write_object_file. */
11200 ia64_adjust_symtab (void)
11202 hash_traverse (alias_hash
, do_alias
);
11205 /* It renames the original section name to its alias. */
11207 do_secalias (const char *alias
, PTR value
)
11209 struct alias
*h
= (struct alias
*) value
;
11210 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11213 as_warn_where (h
->file
, h
->line
,
11214 _("section `%s' aliased to `%s' is not used"),
11220 /* Called from write_object_file. */
11222 ia64_frob_file (void)
11224 hash_traverse (secalias_hash
, do_secalias
);