1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
58 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
60 /* Some systems define MIN in, e.g., param.h. */
62 #define MIN(a,b) ((a) < (b) ? (a) : (b))
65 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66 #define CURR_SLOT md.slot[md.curr_slot]
68 #define O_pseudo_fixup (O_max + 1)
72 /* IA-64 ABI section pseudo-ops. */
73 SPECIAL_SECTION_BSS
= 0,
75 SPECIAL_SECTION_SDATA
,
76 SPECIAL_SECTION_RODATA
,
77 SPECIAL_SECTION_COMMENT
,
78 SPECIAL_SECTION_UNWIND
,
79 SPECIAL_SECTION_UNWIND_INFO
,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY
,
82 SPECIAL_SECTION_FINI_ARRAY
,
99 FUNC_LT_FPTR_RELATIVE
,
101 FUNC_LT_DTP_RELATIVE
,
109 REG_FR
= (REG_GR
+ 128),
110 REG_AR
= (REG_FR
+ 128),
111 REG_CR
= (REG_AR
+ 128),
112 REG_P
= (REG_CR
+ 128),
113 REG_BR
= (REG_P
+ 64),
114 REG_IP
= (REG_BR
+ 8),
121 /* The following are pseudo-registers for use by gas only. */
133 /* The following pseudo-registers are used for unwind directives only: */
141 DYNREG_GR
= 0, /* dynamic general purpose register */
142 DYNREG_FR
, /* dynamic floating point register */
143 DYNREG_PR
, /* dynamic predicate register */
147 enum operand_match_result
150 OPERAND_OUT_OF_RANGE
,
154 /* On the ia64, we can't know the address of a text label until the
155 instructions are packed into a bundle. To handle this, we keep
156 track of the list of labels that appear in front of each
160 struct label_fix
*next
;
164 /* This is the endianness of the current section. */
165 extern int target_big_endian
;
167 /* This is the default endianness. */
168 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
170 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
172 static void ia64_float_to_chars_bigendian
173 PARAMS ((char *, LITTLENUM_TYPE
*, int));
174 static void ia64_float_to_chars_littleendian
175 PARAMS ((char *, LITTLENUM_TYPE
*, int));
176 static void (*ia64_float_to_chars
)
177 PARAMS ((char *, LITTLENUM_TYPE
*, int));
179 static struct hash_control
*alias_hash
;
180 static struct hash_control
*alias_name_hash
;
181 static struct hash_control
*secalias_hash
;
182 static struct hash_control
*secalias_name_hash
;
184 /* List of chars besides those in app.c:symbol_chars that can start an
185 operand. Used to prevent the scrubber eating vital white-space. */
186 const char ia64_symbol_chars
[] = "@?";
188 /* Characters which always start a comment. */
189 const char comment_chars
[] = "";
191 /* Characters which start a comment at the beginning of a line. */
192 const char line_comment_chars
[] = "#";
194 /* Characters which may be used to separate multiple commands on a
196 const char line_separator_chars
[] = ";";
198 /* Characters which are used to indicate an exponent in a floating
200 const char EXP_CHARS
[] = "eE";
202 /* Characters which mean that a number is a floating point constant,
204 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
206 /* ia64-specific option processing: */
208 const char *md_shortopts
= "m:N:x::";
210 struct option md_longopts
[] =
212 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
213 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
214 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
215 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
218 size_t md_longopts_size
= sizeof (md_longopts
);
222 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
223 struct hash_control
*reg_hash
; /* register name hash table */
224 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
225 struct hash_control
*const_hash
; /* constant hash table */
226 struct hash_control
*entry_hash
; /* code entry hint hash table */
228 symbolS
*regsym
[REG_NUM
];
230 /* If X_op is != O_absent, the registername for the instruction's
231 qualifying predicate. If NULL, p0 is assumed for instructions
232 that are predicatable. */
235 /* Optimize for which CPU. */
242 /* What to do when hint.b is used. */
254 explicit_mode
: 1, /* which mode we're in */
255 default_explicit_mode
: 1, /* which mode is the default */
256 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
258 keep_pending_output
: 1;
260 /* What to do when something is wrong with unwind directives. */
263 unwind_check_warning
,
267 /* Each bundle consists of up to three instructions. We keep
268 track of four most recent instructions so we can correctly set
269 the end_of_insn_group for the last instruction in a bundle. */
271 int num_slots_in_use
;
275 end_of_insn_group
: 1,
276 manual_bundling_on
: 1,
277 manual_bundling_off
: 1,
278 loc_directive_seen
: 1;
279 signed char user_template
; /* user-selected template, if any */
280 unsigned char qp_regno
; /* qualifying predicate */
281 /* This duplicates a good fraction of "struct fix" but we
282 can't use a "struct fix" instead since we can't call
283 fix_new_exp() until we know the address of the instruction. */
287 bfd_reloc_code_real_type code
;
288 enum ia64_opnd opnd
; /* type of operand in need of fix */
289 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
290 expressionS expr
; /* the value to be inserted */
292 fixup
[2]; /* at most two fixups per insn */
293 struct ia64_opcode
*idesc
;
294 struct label_fix
*label_fixups
;
295 struct label_fix
*tag_fixups
;
296 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
299 unsigned int src_line
;
300 struct dwarf2_line_info debug_line
;
308 struct dynreg
*next
; /* next dynamic register */
310 unsigned short base
; /* the base register number */
311 unsigned short num_regs
; /* # of registers in this set */
313 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
315 flagword flags
; /* ELF-header flags */
318 unsigned hint
:1; /* is this hint currently valid? */
319 bfd_vma offset
; /* mem.offset offset */
320 bfd_vma base
; /* mem.offset base */
323 int path
; /* number of alt. entry points seen */
324 const char **entry_labels
; /* labels of all alternate paths in
325 the current DV-checking block. */
326 int maxpaths
; /* size currently allocated for
329 int pointer_size
; /* size in bytes of a pointer */
330 int pointer_size_shift
; /* shift size of a pointer for alignment */
334 /* These are not const, because they are modified to MMI for non-itanium1
336 /* MFI bundle of nops. */
337 static unsigned char le_nop
[16] =
339 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
340 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
342 /* MFI bundle of nops with stop-bit. */
343 static unsigned char le_nop_stop
[16] =
345 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
349 /* application registers: */
355 #define AR_BSPSTORE 18
370 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
371 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
372 {"ar.rsc", 16}, {"ar.bsp", 17},
373 {"ar.bspstore", 18}, {"ar.rnat", 19},
374 {"ar.fcr", 21}, {"ar.eflag", 24},
375 {"ar.csd", 25}, {"ar.ssd", 26},
376 {"ar.cflg", 27}, {"ar.fsr", 28},
377 {"ar.fir", 29}, {"ar.fdr", 30},
378 {"ar.ccv", 32}, {"ar.unat", 36},
379 {"ar.fpsr", 40}, {"ar.itc", 44},
380 {"ar.pfs", 64}, {"ar.lc", 65},
401 /* control registers: */
443 static const struct const_desc
450 /* PSR constant masks: */
453 {"psr.be", ((valueT
) 1) << 1},
454 {"psr.up", ((valueT
) 1) << 2},
455 {"psr.ac", ((valueT
) 1) << 3},
456 {"psr.mfl", ((valueT
) 1) << 4},
457 {"psr.mfh", ((valueT
) 1) << 5},
459 {"psr.ic", ((valueT
) 1) << 13},
460 {"psr.i", ((valueT
) 1) << 14},
461 {"psr.pk", ((valueT
) 1) << 15},
463 {"psr.dt", ((valueT
) 1) << 17},
464 {"psr.dfl", ((valueT
) 1) << 18},
465 {"psr.dfh", ((valueT
) 1) << 19},
466 {"psr.sp", ((valueT
) 1) << 20},
467 {"psr.pp", ((valueT
) 1) << 21},
468 {"psr.di", ((valueT
) 1) << 22},
469 {"psr.si", ((valueT
) 1) << 23},
470 {"psr.db", ((valueT
) 1) << 24},
471 {"psr.lp", ((valueT
) 1) << 25},
472 {"psr.tb", ((valueT
) 1) << 26},
473 {"psr.rt", ((valueT
) 1) << 27},
474 /* 28-31: reserved */
475 /* 32-33: cpl (current privilege level) */
476 {"psr.is", ((valueT
) 1) << 34},
477 {"psr.mc", ((valueT
) 1) << 35},
478 {"psr.it", ((valueT
) 1) << 36},
479 {"psr.id", ((valueT
) 1) << 37},
480 {"psr.da", ((valueT
) 1) << 38},
481 {"psr.dd", ((valueT
) 1) << 39},
482 {"psr.ss", ((valueT
) 1) << 40},
483 /* 41-42: ri (restart instruction) */
484 {"psr.ed", ((valueT
) 1) << 43},
485 {"psr.bn", ((valueT
) 1) << 44},
488 /* indirect register-sets/memory: */
497 { "CPUID", IND_CPUID
},
498 { "cpuid", IND_CPUID
},
510 /* Pseudo functions used to indicate relocation types (these functions
511 start with an at sign (@). */
533 /* reloc pseudo functions (these must come first!): */
534 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
535 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
536 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
537 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
538 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
539 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
540 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
541 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
542 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
543 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
544 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
545 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
546 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
547 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
548 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
549 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
550 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
552 /* mbtype4 constants: */
553 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
554 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
555 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
556 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
557 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
559 /* fclass constants: */
560 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
561 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
562 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
563 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
564 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
565 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
566 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
567 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
568 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
570 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
572 /* hint constants: */
573 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
575 /* unwind-related constants: */
576 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
577 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
578 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
579 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
580 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
581 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
582 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
584 /* unwind-related registers: */
585 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
588 /* 41-bit nop opcodes (one per unit): */
589 static const bfd_vma nop
[IA64_NUM_UNITS
] =
591 0x0000000000LL
, /* NIL => break 0 */
592 0x0008000000LL
, /* I-unit nop */
593 0x0008000000LL
, /* M-unit nop */
594 0x4000000000LL
, /* B-unit nop */
595 0x0008000000LL
, /* F-unit nop */
596 0x0008000000LL
, /* L-"unit" nop */
597 0x0008000000LL
, /* X-unit nop */
600 /* Can't be `const' as it's passed to input routines (which have the
601 habit of setting temporary sentinels. */
602 static char special_section_name
[][20] =
604 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
605 {".IA_64.unwind"}, {".IA_64.unwind_info"},
606 {".init_array"}, {".fini_array"}
609 /* The best template for a particular sequence of up to three
611 #define N IA64_NUM_TYPES
612 static unsigned char best_template
[N
][N
][N
];
615 /* Resource dependencies currently in effect */
617 int depind
; /* dependency index */
618 const struct ia64_dependency
*dependency
; /* actual dependency */
619 unsigned specific
:1, /* is this a specific bit/regno? */
620 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
621 int index
; /* specific regno/bit within dependency */
622 int note
; /* optional qualifying note (0 if none) */
626 int insn_srlz
; /* current insn serialization state */
627 int data_srlz
; /* current data serialization state */
628 int qp_regno
; /* qualifying predicate for this usage */
629 char *file
; /* what file marked this dependency */
630 unsigned int line
; /* what line marked this dependency */
631 struct mem_offset mem_offset
; /* optional memory offset hint */
632 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
633 int path
; /* corresponding code entry index */
635 static int regdepslen
= 0;
636 static int regdepstotlen
= 0;
637 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
638 static const char *dv_sem
[] = { "none", "implied", "impliedf",
639 "data", "instr", "specific", "stop", "other" };
640 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
642 /* Current state of PR mutexation */
643 static struct qpmutex
{
646 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
647 static int qp_mutexeslen
= 0;
648 static int qp_mutexestotlen
= 0;
649 static valueT qp_safe_across_calls
= 0;
651 /* Current state of PR implications */
652 static struct qp_imply
{
655 unsigned p2_branched
:1;
657 } *qp_implies
= NULL
;
658 static int qp_implieslen
= 0;
659 static int qp_impliestotlen
= 0;
661 /* Keep track of static GR values so that indirect register usage can
662 sometimes be tracked. */
673 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
679 /* Remember the alignment frag. */
680 static fragS
*align_frag
;
682 /* These are the routines required to output the various types of
685 /* A slot_number is a frag address plus the slot index (0-2). We use the
686 frag address here so that if there is a section switch in the middle of
687 a function, then instructions emitted to a different section are not
688 counted. Since there may be more than one frag for a function, this
689 means we also need to keep track of which frag this address belongs to
690 so we can compute inter-frag distances. This also nicely solves the
691 problem with nops emitted for align directives, which can't easily be
692 counted, but can easily be derived from frag sizes. */
694 typedef struct unw_rec_list
{
696 unsigned long slot_number
;
698 struct unw_rec_list
*next
;
701 #define SLOT_NUM_NOT_SET (unsigned)-1
703 /* Linked list of saved prologue counts. A very poor
704 implementation of a map from label numbers to prologue counts. */
705 typedef struct label_prologue_count
707 struct label_prologue_count
*next
;
708 unsigned long label_number
;
709 unsigned int prologue_count
;
710 } label_prologue_count
;
712 typedef struct proc_pending
715 struct proc_pending
*next
;
720 /* Maintain a list of unwind entries for the current function. */
724 /* Any unwind entires that should be attached to the current slot
725 that an insn is being constructed for. */
726 unw_rec_list
*current_entry
;
728 /* These are used to create the unwind table entry for this function. */
729 proc_pending proc_pending
;
730 symbolS
*info
; /* pointer to unwind info */
731 symbolS
*personality_routine
;
733 subsegT saved_text_subseg
;
734 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
736 /* TRUE if processing unwind directives in a prologue region. */
737 unsigned int prologue
: 1;
738 unsigned int prologue_mask
: 4;
739 unsigned int body
: 1;
740 unsigned int insn
: 1;
741 unsigned int prologue_count
; /* number of .prologues seen so far */
742 /* Prologue counts at previous .label_state directives. */
743 struct label_prologue_count
* saved_prologue_counts
;
746 /* The input value is a negated offset from psp, and specifies an address
747 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
748 must add 16 and divide by 4 to get the encoded value. */
750 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
752 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
754 /* Forward declarations: */
755 static void set_section
PARAMS ((char *name
));
756 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
757 unsigned int, unsigned int));
758 static void dot_align (int);
759 static void dot_radix
PARAMS ((int));
760 static void dot_special_section
PARAMS ((int));
761 static void dot_proc
PARAMS ((int));
762 static void dot_fframe
PARAMS ((int));
763 static void dot_vframe
PARAMS ((int));
764 static void dot_vframesp
PARAMS ((int));
765 static void dot_vframepsp
PARAMS ((int));
766 static void dot_save
PARAMS ((int));
767 static void dot_restore
PARAMS ((int));
768 static void dot_restorereg
PARAMS ((int));
769 static void dot_restorereg_p
PARAMS ((int));
770 static void dot_handlerdata
PARAMS ((int));
771 static void dot_unwentry
PARAMS ((int));
772 static void dot_altrp
PARAMS ((int));
773 static void dot_savemem
PARAMS ((int));
774 static void dot_saveg
PARAMS ((int));
775 static void dot_savef
PARAMS ((int));
776 static void dot_saveb
PARAMS ((int));
777 static void dot_savegf
PARAMS ((int));
778 static void dot_spill
PARAMS ((int));
779 static void dot_spillreg
PARAMS ((int));
780 static void dot_spillmem
PARAMS ((int));
781 static void dot_spillreg_p
PARAMS ((int));
782 static void dot_spillmem_p
PARAMS ((int));
783 static void dot_label_state
PARAMS ((int));
784 static void dot_copy_state
PARAMS ((int));
785 static void dot_unwabi
PARAMS ((int));
786 static void dot_personality
PARAMS ((int));
787 static void dot_body
PARAMS ((int));
788 static void dot_prologue
PARAMS ((int));
789 static void dot_endp
PARAMS ((int));
790 static void dot_template
PARAMS ((int));
791 static void dot_regstk
PARAMS ((int));
792 static void dot_rot
PARAMS ((int));
793 static void dot_byteorder
PARAMS ((int));
794 static void dot_psr
PARAMS ((int));
795 static void dot_alias
PARAMS ((int));
796 static void dot_ln
PARAMS ((int));
797 static void cross_section
PARAMS ((int ref
, void (*cons
) PARAMS((int)), int ua
));
798 static void dot_xdata
PARAMS ((int));
799 static void stmt_float_cons
PARAMS ((int));
800 static void stmt_cons_ua
PARAMS ((int));
801 static void dot_xfloat_cons
PARAMS ((int));
802 static void dot_xstringer
PARAMS ((int));
803 static void dot_xdata_ua
PARAMS ((int));
804 static void dot_xfloat_cons_ua
PARAMS ((int));
805 static void print_prmask
PARAMS ((valueT mask
));
806 static void dot_pred_rel
PARAMS ((int));
807 static void dot_reg_val
PARAMS ((int));
808 static void dot_serialize
PARAMS ((int));
809 static void dot_dv_mode
PARAMS ((int));
810 static void dot_entry
PARAMS ((int));
811 static void dot_mem_offset
PARAMS ((int));
812 static void add_unwind_entry
PARAMS((unw_rec_list
*ptr
));
813 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
814 static void declare_register_set
PARAMS ((const char *, int, int));
815 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
816 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
819 static int parse_operand
PARAMS ((expressionS
*e
));
820 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
821 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
822 static void emit_one_bundle
PARAMS ((void));
823 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
824 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
825 bfd_reloc_code_real_type r_type
));
826 static void insn_group_break
PARAMS ((int, int, int));
827 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
828 struct rsrc
*, int depind
, int path
));
829 static void add_qp_mutex
PARAMS((valueT mask
));
830 static void add_qp_imply
PARAMS((int p1
, int p2
));
831 static void clear_qp_branch_flag
PARAMS((valueT mask
));
832 static void clear_qp_mutex
PARAMS((valueT mask
));
833 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
834 static int has_suffix_p
PARAMS((const char *, const char *));
835 static void clear_register_values
PARAMS ((void));
836 static void print_dependency
PARAMS ((const char *action
, int depind
));
837 static void instruction_serialization
PARAMS ((void));
838 static void data_serialization
PARAMS ((void));
839 static void remove_marked_resource
PARAMS ((struct rsrc
*));
840 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
841 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
842 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
843 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
844 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
845 struct ia64_opcode
*, int, struct rsrc
[], int, int));
846 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
847 static void check_dependencies
PARAMS((struct ia64_opcode
*));
848 static void mark_resources
PARAMS((struct ia64_opcode
*));
849 static void update_dependencies
PARAMS((struct ia64_opcode
*));
850 static void note_register_values
PARAMS((struct ia64_opcode
*));
851 static int qp_mutex
PARAMS ((int, int, int));
852 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
853 static void output_vbyte_mem
PARAMS ((int, char *, char *));
854 static void count_output
PARAMS ((int, char *, char *));
855 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
856 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
857 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
858 static void output_P1_format
PARAMS ((vbyte_func
, int));
859 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
860 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
861 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
862 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
863 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
864 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
865 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
866 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
867 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
868 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
869 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
870 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
871 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
872 static char format_ab_reg
PARAMS ((int, int));
873 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
875 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
876 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
878 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
879 static unw_rec_list
*output_endp
PARAMS ((void));
880 static unw_rec_list
*output_prologue
PARAMS ((void));
881 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
882 static unw_rec_list
*output_body
PARAMS ((void));
883 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
884 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
885 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
886 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
887 static unw_rec_list
*output_rp_when
PARAMS ((void));
888 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
889 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
890 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
891 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
892 static unw_rec_list
*output_pfs_when
PARAMS ((void));
893 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
894 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
895 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
896 static unw_rec_list
*output_preds_when
PARAMS ((void));
897 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
898 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
899 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
900 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
901 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
902 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
903 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
904 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
905 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
906 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
907 static unw_rec_list
*output_unat_when
PARAMS ((void));
908 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
909 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
910 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
911 static unw_rec_list
*output_lc_when
PARAMS ((void));
912 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
913 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
914 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
915 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
916 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
917 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
918 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
919 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
920 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
921 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
922 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
923 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
924 static unw_rec_list
*output_bsp_when
PARAMS ((void));
925 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
926 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
927 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
928 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
929 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
930 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
931 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
932 static unw_rec_list
*output_rnat_when
PARAMS ((void));
933 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
934 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
935 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
936 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
937 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
938 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
939 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
940 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int));
941 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int));
942 static unw_rec_list
*output_spill_psprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
944 static unw_rec_list
*output_spill_sprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
946 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
948 static unw_rec_list
*output_spill_reg_p
PARAMS ((unsigned int, unsigned int, unsigned int,
949 unsigned int, unsigned int));
950 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
951 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
952 static int calc_record_size
PARAMS ((unw_rec_list
*));
953 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
954 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
955 unsigned long, fragS
*,
957 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
958 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
959 static int convert_expr_to_ab_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
960 static int convert_expr_to_xy_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
961 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
962 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
963 static void free_saved_prologue_counts
PARAMS ((void));
965 /* Determine if application register REGNUM resides only in the integer
966 unit (as opposed to the memory unit). */
968 ar_is_only_in_integer_unit (int reg
)
971 return reg
>= 64 && reg
<= 111;
974 /* Determine if application register REGNUM resides only in the memory
975 unit (as opposed to the integer unit). */
977 ar_is_only_in_memory_unit (int reg
)
980 return reg
>= 0 && reg
<= 47;
983 /* Switch to section NAME and create section if necessary. It's
984 rather ugly that we have to manipulate input_line_pointer but I
985 don't see any other way to accomplish the same thing without
986 changing obj-elf.c (which may be the Right Thing, in the end). */
991 char *saved_input_line_pointer
;
993 saved_input_line_pointer
= input_line_pointer
;
994 input_line_pointer
= name
;
996 input_line_pointer
= saved_input_line_pointer
;
999 /* Map 's' to SHF_IA_64_SHORT. */
1002 ia64_elf_section_letter (letter
, ptr_msg
)
1007 return SHF_IA_64_SHORT
;
1008 else if (letter
== 'o')
1009 return SHF_LINK_ORDER
;
1011 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1015 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1018 ia64_elf_section_flags (flags
, attr
, type
)
1020 int attr
, type ATTRIBUTE_UNUSED
;
1022 if (attr
& SHF_IA_64_SHORT
)
1023 flags
|= SEC_SMALL_DATA
;
1028 ia64_elf_section_type (str
, len
)
1032 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1034 if (STREQ (ELF_STRING_ia64_unwind_info
))
1035 return SHT_PROGBITS
;
1037 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
1038 return SHT_PROGBITS
;
1040 if (STREQ (ELF_STRING_ia64_unwind
))
1041 return SHT_IA_64_UNWIND
;
1043 if (STREQ (ELF_STRING_ia64_unwind_once
))
1044 return SHT_IA_64_UNWIND
;
1046 if (STREQ ("unwind"))
1047 return SHT_IA_64_UNWIND
;
1054 set_regstack (ins
, locs
, outs
, rots
)
1055 unsigned int ins
, locs
, outs
, rots
;
1057 /* Size of frame. */
1060 sof
= ins
+ locs
+ outs
;
1063 as_bad ("Size of frame exceeds maximum of 96 registers");
1068 as_warn ("Size of rotating registers exceeds frame size");
1071 md
.in
.base
= REG_GR
+ 32;
1072 md
.loc
.base
= md
.in
.base
+ ins
;
1073 md
.out
.base
= md
.loc
.base
+ locs
;
1075 md
.in
.num_regs
= ins
;
1076 md
.loc
.num_regs
= locs
;
1077 md
.out
.num_regs
= outs
;
1078 md
.rot
.num_regs
= rots
;
1085 struct label_fix
*lfix
;
1087 subsegT saved_subseg
;
1090 if (!md
.last_text_seg
)
1093 saved_seg
= now_seg
;
1094 saved_subseg
= now_subseg
;
1096 subseg_set (md
.last_text_seg
, 0);
1098 while (md
.num_slots_in_use
> 0)
1099 emit_one_bundle (); /* force out queued instructions */
1101 /* In case there are labels following the last instruction, resolve
1103 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1105 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1106 symbol_set_frag (lfix
->sym
, frag_now
);
1108 CURR_SLOT
.label_fixups
= 0;
1109 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1111 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1112 symbol_set_frag (lfix
->sym
, frag_now
);
1114 CURR_SLOT
.tag_fixups
= 0;
1116 /* In case there are unwind directives following the last instruction,
1117 resolve those now. We only handle prologue, body, and endp directives
1118 here. Give an error for others. */
1119 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1121 switch (ptr
->r
.type
)
1127 ptr
->slot_number
= (unsigned long) frag_more (0);
1128 ptr
->slot_frag
= frag_now
;
1131 /* Allow any record which doesn't have a "t" field (i.e.,
1132 doesn't relate to a particular instruction). */
1148 as_bad (_("Unwind directive not followed by an instruction."));
1152 unwind
.current_entry
= NULL
;
1154 subseg_set (saved_seg
, saved_subseg
);
1156 if (md
.qp
.X_op
== O_register
)
1157 as_bad ("qualifying predicate not followed by instruction");
1161 ia64_do_align (int nbytes
)
1163 char *saved_input_line_pointer
= input_line_pointer
;
1165 input_line_pointer
= "";
1166 s_align_bytes (nbytes
);
1167 input_line_pointer
= saved_input_line_pointer
;
1171 ia64_cons_align (nbytes
)
1176 char *saved_input_line_pointer
= input_line_pointer
;
1177 input_line_pointer
= "";
1178 s_align_bytes (nbytes
);
1179 input_line_pointer
= saved_input_line_pointer
;
1183 /* Output COUNT bytes to a memory location. */
1184 static char *vbyte_mem_ptr
= NULL
;
1187 output_vbyte_mem (count
, ptr
, comment
)
1190 char *comment ATTRIBUTE_UNUSED
;
1193 if (vbyte_mem_ptr
== NULL
)
1198 for (x
= 0; x
< count
; x
++)
1199 *(vbyte_mem_ptr
++) = ptr
[x
];
1202 /* Count the number of bytes required for records. */
1203 static int vbyte_count
= 0;
1205 count_output (count
, ptr
, comment
)
1207 char *ptr ATTRIBUTE_UNUSED
;
1208 char *comment ATTRIBUTE_UNUSED
;
1210 vbyte_count
+= count
;
1214 output_R1_format (f
, rtype
, rlen
)
1216 unw_record_type rtype
;
1223 output_R3_format (f
, rtype
, rlen
);
1229 else if (rtype
!= prologue
)
1230 as_bad ("record type is not valid");
1232 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1233 (*f
) (1, &byte
, NULL
);
1237 output_R2_format (f
, mask
, grsave
, rlen
)
1244 mask
= (mask
& 0x0f);
1245 grsave
= (grsave
& 0x7f);
1247 bytes
[0] = (UNW_R2
| (mask
>> 1));
1248 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1249 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1250 (*f
) (count
, bytes
, NULL
);
1254 output_R3_format (f
, rtype
, rlen
)
1256 unw_record_type rtype
;
1263 output_R1_format (f
, rtype
, rlen
);
1269 else if (rtype
!= prologue
)
1270 as_bad ("record type is not valid");
1271 bytes
[0] = (UNW_R3
| r
);
1272 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1273 (*f
) (count
+ 1, bytes
, NULL
);
1277 output_P1_format (f
, brmask
)
1282 byte
= UNW_P1
| (brmask
& 0x1f);
1283 (*f
) (1, &byte
, NULL
);
1287 output_P2_format (f
, brmask
, gr
)
1293 brmask
= (brmask
& 0x1f);
1294 bytes
[0] = UNW_P2
| (brmask
>> 1);
1295 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1296 (*f
) (2, bytes
, NULL
);
1300 output_P3_format (f
, rtype
, reg
)
1302 unw_record_type rtype
;
1347 as_bad ("Invalid record type for P3 format.");
1349 bytes
[0] = (UNW_P3
| (r
>> 1));
1350 bytes
[1] = (((r
& 1) << 7) | reg
);
1351 (*f
) (2, bytes
, NULL
);
1355 output_P4_format (f
, imask
, imask_size
)
1357 unsigned char *imask
;
1358 unsigned long imask_size
;
1361 (*f
) (imask_size
, (char *) imask
, NULL
);
1365 output_P5_format (f
, grmask
, frmask
)
1368 unsigned long frmask
;
1371 grmask
= (grmask
& 0x0f);
1374 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1375 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1376 bytes
[3] = (frmask
& 0x000000ff);
1377 (*f
) (4, bytes
, NULL
);
1381 output_P6_format (f
, rtype
, rmask
)
1383 unw_record_type rtype
;
1389 if (rtype
== gr_mem
)
1391 else if (rtype
!= fr_mem
)
1392 as_bad ("Invalid record type for format P6");
1393 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1394 (*f
) (1, &byte
, NULL
);
1398 output_P7_format (f
, rtype
, w1
, w2
)
1400 unw_record_type rtype
;
1407 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1412 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1462 bytes
[0] = (UNW_P7
| r
);
1463 (*f
) (count
, bytes
, NULL
);
1467 output_P8_format (f
, rtype
, t
)
1469 unw_record_type rtype
;
1508 case bspstore_psprel
:
1511 case bspstore_sprel
:
1523 case priunat_when_gr
:
1526 case priunat_psprel
:
1532 case priunat_when_mem
:
1539 count
+= output_leb128 (bytes
+ 2, t
, 0);
1540 (*f
) (count
, bytes
, NULL
);
1544 output_P9_format (f
, grmask
, gr
)
1551 bytes
[1] = (grmask
& 0x0f);
1552 bytes
[2] = (gr
& 0x7f);
1553 (*f
) (3, bytes
, NULL
);
1557 output_P10_format (f
, abi
, context
)
1564 bytes
[1] = (abi
& 0xff);
1565 bytes
[2] = (context
& 0xff);
1566 (*f
) (3, bytes
, NULL
);
1570 output_B1_format (f
, rtype
, label
)
1572 unw_record_type rtype
;
1573 unsigned long label
;
1579 output_B4_format (f
, rtype
, label
);
1582 if (rtype
== copy_state
)
1584 else if (rtype
!= label_state
)
1585 as_bad ("Invalid record type for format B1");
1587 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1588 (*f
) (1, &byte
, NULL
);
1592 output_B2_format (f
, ecount
, t
)
1594 unsigned long ecount
;
1601 output_B3_format (f
, ecount
, t
);
1604 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1605 count
+= output_leb128 (bytes
+ 1, t
, 0);
1606 (*f
) (count
, bytes
, NULL
);
1610 output_B3_format (f
, ecount
, t
)
1612 unsigned long ecount
;
1619 output_B2_format (f
, ecount
, t
);
1623 count
+= output_leb128 (bytes
+ 1, t
, 0);
1624 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1625 (*f
) (count
, bytes
, NULL
);
1629 output_B4_format (f
, rtype
, label
)
1631 unw_record_type rtype
;
1632 unsigned long label
;
1639 output_B1_format (f
, rtype
, label
);
1643 if (rtype
== copy_state
)
1645 else if (rtype
!= label_state
)
1646 as_bad ("Invalid record type for format B1");
1648 bytes
[0] = (UNW_B4
| (r
<< 3));
1649 count
+= output_leb128 (bytes
+ 1, label
, 0);
1650 (*f
) (count
, bytes
, NULL
);
1654 format_ab_reg (ab
, reg
)
1661 ret
= (ab
<< 5) | reg
;
1666 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1668 unw_record_type rtype
;
1678 if (rtype
== spill_sprel
)
1680 else if (rtype
!= spill_psprel
)
1681 as_bad ("Invalid record type for format X1");
1682 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1683 count
+= output_leb128 (bytes
+ 2, t
, 0);
1684 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1685 (*f
) (count
, bytes
, NULL
);
1689 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1698 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1699 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1700 count
+= output_leb128 (bytes
+ 3, t
, 0);
1701 (*f
) (count
, bytes
, NULL
);
1705 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1707 unw_record_type rtype
;
1718 if (rtype
== spill_sprel_p
)
1720 else if (rtype
!= spill_psprel_p
)
1721 as_bad ("Invalid record type for format X3");
1722 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1723 bytes
[2] = format_ab_reg (ab
, reg
);
1724 count
+= output_leb128 (bytes
+ 3, t
, 0);
1725 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1726 (*f
) (count
, bytes
, NULL
);
1730 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1740 bytes
[1] = (qp
& 0x3f);
1741 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1742 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1743 count
+= output_leb128 (bytes
+ 4, t
, 0);
1744 (*f
) (count
, bytes
, NULL
);
1747 /* This function allocates a record list structure, and initializes fields. */
1749 static unw_rec_list
*
1750 alloc_record (unw_record_type t
)
1753 ptr
= xmalloc (sizeof (*ptr
));
1755 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1760 /* Dummy unwind record used for calculating the length of the last prologue or
1763 static unw_rec_list
*
1766 unw_rec_list
*ptr
= alloc_record (endp
);
1770 static unw_rec_list
*
1773 unw_rec_list
*ptr
= alloc_record (prologue
);
1774 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1778 static unw_rec_list
*
1779 output_prologue_gr (saved_mask
, reg
)
1780 unsigned int saved_mask
;
1783 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1784 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1785 ptr
->r
.record
.r
.grmask
= saved_mask
;
1786 ptr
->r
.record
.r
.grsave
= reg
;
1790 static unw_rec_list
*
1793 unw_rec_list
*ptr
= alloc_record (body
);
1797 static unw_rec_list
*
1798 output_mem_stack_f (size
)
1801 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1802 ptr
->r
.record
.p
.size
= size
;
1806 static unw_rec_list
*
1807 output_mem_stack_v ()
1809 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1813 static unw_rec_list
*
1817 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1818 ptr
->r
.record
.p
.gr
= gr
;
1822 static unw_rec_list
*
1823 output_psp_sprel (offset
)
1824 unsigned int offset
;
1826 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1827 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1831 static unw_rec_list
*
1834 unw_rec_list
*ptr
= alloc_record (rp_when
);
1838 static unw_rec_list
*
1842 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1843 ptr
->r
.record
.p
.gr
= gr
;
1847 static unw_rec_list
*
1851 unw_rec_list
*ptr
= alloc_record (rp_br
);
1852 ptr
->r
.record
.p
.br
= br
;
1856 static unw_rec_list
*
1857 output_rp_psprel (offset
)
1858 unsigned int offset
;
1860 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1861 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1865 static unw_rec_list
*
1866 output_rp_sprel (offset
)
1867 unsigned int offset
;
1869 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1870 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1874 static unw_rec_list
*
1877 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1881 static unw_rec_list
*
1885 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1886 ptr
->r
.record
.p
.gr
= gr
;
1890 static unw_rec_list
*
1891 output_pfs_psprel (offset
)
1892 unsigned int offset
;
1894 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1895 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1899 static unw_rec_list
*
1900 output_pfs_sprel (offset
)
1901 unsigned int offset
;
1903 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1904 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1908 static unw_rec_list
*
1909 output_preds_when ()
1911 unw_rec_list
*ptr
= alloc_record (preds_when
);
1915 static unw_rec_list
*
1916 output_preds_gr (gr
)
1919 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1920 ptr
->r
.record
.p
.gr
= gr
;
1924 static unw_rec_list
*
1925 output_preds_psprel (offset
)
1926 unsigned int offset
;
1928 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1929 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1933 static unw_rec_list
*
1934 output_preds_sprel (offset
)
1935 unsigned int offset
;
1937 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1938 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1942 static unw_rec_list
*
1943 output_fr_mem (mask
)
1946 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1947 ptr
->r
.record
.p
.rmask
= mask
;
1951 static unw_rec_list
*
1952 output_frgr_mem (gr_mask
, fr_mask
)
1953 unsigned int gr_mask
;
1954 unsigned int fr_mask
;
1956 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1957 ptr
->r
.record
.p
.grmask
= gr_mask
;
1958 ptr
->r
.record
.p
.frmask
= fr_mask
;
1962 static unw_rec_list
*
1963 output_gr_gr (mask
, reg
)
1967 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1968 ptr
->r
.record
.p
.grmask
= mask
;
1969 ptr
->r
.record
.p
.gr
= reg
;
1973 static unw_rec_list
*
1974 output_gr_mem (mask
)
1977 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1978 ptr
->r
.record
.p
.rmask
= mask
;
1982 static unw_rec_list
*
1983 output_br_mem (unsigned int mask
)
1985 unw_rec_list
*ptr
= alloc_record (br_mem
);
1986 ptr
->r
.record
.p
.brmask
= mask
;
1990 static unw_rec_list
*
1991 output_br_gr (save_mask
, reg
)
1992 unsigned int save_mask
;
1995 unw_rec_list
*ptr
= alloc_record (br_gr
);
1996 ptr
->r
.record
.p
.brmask
= save_mask
;
1997 ptr
->r
.record
.p
.gr
= reg
;
2001 static unw_rec_list
*
2002 output_spill_base (offset
)
2003 unsigned int offset
;
2005 unw_rec_list
*ptr
= alloc_record (spill_base
);
2006 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2010 static unw_rec_list
*
2013 unw_rec_list
*ptr
= alloc_record (unat_when
);
2017 static unw_rec_list
*
2021 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2022 ptr
->r
.record
.p
.gr
= gr
;
2026 static unw_rec_list
*
2027 output_unat_psprel (offset
)
2028 unsigned int offset
;
2030 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2031 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2035 static unw_rec_list
*
2036 output_unat_sprel (offset
)
2037 unsigned int offset
;
2039 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2040 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2044 static unw_rec_list
*
2047 unw_rec_list
*ptr
= alloc_record (lc_when
);
2051 static unw_rec_list
*
2055 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2056 ptr
->r
.record
.p
.gr
= gr
;
2060 static unw_rec_list
*
2061 output_lc_psprel (offset
)
2062 unsigned int offset
;
2064 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2065 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2069 static unw_rec_list
*
2070 output_lc_sprel (offset
)
2071 unsigned int offset
;
2073 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2074 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2078 static unw_rec_list
*
2081 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2085 static unw_rec_list
*
2089 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2090 ptr
->r
.record
.p
.gr
= gr
;
2094 static unw_rec_list
*
2095 output_fpsr_psprel (offset
)
2096 unsigned int offset
;
2098 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2099 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2103 static unw_rec_list
*
2104 output_fpsr_sprel (offset
)
2105 unsigned int offset
;
2107 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2108 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2112 static unw_rec_list
*
2113 output_priunat_when_gr ()
2115 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2119 static unw_rec_list
*
2120 output_priunat_when_mem ()
2122 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2126 static unw_rec_list
*
2127 output_priunat_gr (gr
)
2130 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2131 ptr
->r
.record
.p
.gr
= gr
;
2135 static unw_rec_list
*
2136 output_priunat_psprel (offset
)
2137 unsigned int offset
;
2139 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2140 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2144 static unw_rec_list
*
2145 output_priunat_sprel (offset
)
2146 unsigned int offset
;
2148 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2149 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2153 static unw_rec_list
*
2156 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2160 static unw_rec_list
*
2164 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2165 ptr
->r
.record
.p
.gr
= gr
;
2169 static unw_rec_list
*
2170 output_bsp_psprel (offset
)
2171 unsigned int offset
;
2173 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2174 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2178 static unw_rec_list
*
2179 output_bsp_sprel (offset
)
2180 unsigned int offset
;
2182 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2183 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2187 static unw_rec_list
*
2188 output_bspstore_when ()
2190 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2194 static unw_rec_list
*
2195 output_bspstore_gr (gr
)
2198 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2199 ptr
->r
.record
.p
.gr
= gr
;
2203 static unw_rec_list
*
2204 output_bspstore_psprel (offset
)
2205 unsigned int offset
;
2207 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2208 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2212 static unw_rec_list
*
2213 output_bspstore_sprel (offset
)
2214 unsigned int offset
;
2216 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2217 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2221 static unw_rec_list
*
2224 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2228 static unw_rec_list
*
2232 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2233 ptr
->r
.record
.p
.gr
= gr
;
2237 static unw_rec_list
*
2238 output_rnat_psprel (offset
)
2239 unsigned int offset
;
2241 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2242 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2246 static unw_rec_list
*
2247 output_rnat_sprel (offset
)
2248 unsigned int offset
;
2250 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2251 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2255 static unw_rec_list
*
2256 output_unwabi (abi
, context
)
2258 unsigned long context
;
2260 unw_rec_list
*ptr
= alloc_record (unwabi
);
2261 ptr
->r
.record
.p
.abi
= abi
;
2262 ptr
->r
.record
.p
.context
= context
;
2266 static unw_rec_list
*
2267 output_epilogue (unsigned long ecount
)
2269 unw_rec_list
*ptr
= alloc_record (epilogue
);
2270 ptr
->r
.record
.b
.ecount
= ecount
;
2274 static unw_rec_list
*
2275 output_label_state (unsigned long label
)
2277 unw_rec_list
*ptr
= alloc_record (label_state
);
2278 ptr
->r
.record
.b
.label
= label
;
2282 static unw_rec_list
*
2283 output_copy_state (unsigned long label
)
2285 unw_rec_list
*ptr
= alloc_record (copy_state
);
2286 ptr
->r
.record
.b
.label
= label
;
2290 static unw_rec_list
*
2291 output_spill_psprel (ab
, reg
, offset
)
2294 unsigned int offset
;
2296 unw_rec_list
*ptr
= alloc_record (spill_psprel
);
2297 ptr
->r
.record
.x
.ab
= ab
;
2298 ptr
->r
.record
.x
.reg
= reg
;
2299 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2303 static unw_rec_list
*
2304 output_spill_sprel (ab
, reg
, offset
)
2307 unsigned int offset
;
2309 unw_rec_list
*ptr
= alloc_record (spill_sprel
);
2310 ptr
->r
.record
.x
.ab
= ab
;
2311 ptr
->r
.record
.x
.reg
= reg
;
2312 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2316 static unw_rec_list
*
2317 output_spill_psprel_p (ab
, reg
, offset
, predicate
)
2320 unsigned int offset
;
2321 unsigned int predicate
;
2323 unw_rec_list
*ptr
= alloc_record (spill_psprel_p
);
2324 ptr
->r
.record
.x
.ab
= ab
;
2325 ptr
->r
.record
.x
.reg
= reg
;
2326 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2327 ptr
->r
.record
.x
.qp
= predicate
;
2331 static unw_rec_list
*
2332 output_spill_sprel_p (ab
, reg
, offset
, predicate
)
2335 unsigned int offset
;
2336 unsigned int predicate
;
2338 unw_rec_list
*ptr
= alloc_record (spill_sprel_p
);
2339 ptr
->r
.record
.x
.ab
= ab
;
2340 ptr
->r
.record
.x
.reg
= reg
;
2341 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2342 ptr
->r
.record
.x
.qp
= predicate
;
2346 static unw_rec_list
*
2347 output_spill_reg (ab
, reg
, targ_reg
, xy
)
2350 unsigned int targ_reg
;
2353 unw_rec_list
*ptr
= alloc_record (spill_reg
);
2354 ptr
->r
.record
.x
.ab
= ab
;
2355 ptr
->r
.record
.x
.reg
= reg
;
2356 ptr
->r
.record
.x
.treg
= targ_reg
;
2357 ptr
->r
.record
.x
.xy
= xy
;
2361 static unw_rec_list
*
2362 output_spill_reg_p (ab
, reg
, targ_reg
, xy
, predicate
)
2365 unsigned int targ_reg
;
2367 unsigned int predicate
;
2369 unw_rec_list
*ptr
= alloc_record (spill_reg_p
);
2370 ptr
->r
.record
.x
.ab
= ab
;
2371 ptr
->r
.record
.x
.reg
= reg
;
2372 ptr
->r
.record
.x
.treg
= targ_reg
;
2373 ptr
->r
.record
.x
.xy
= xy
;
2374 ptr
->r
.record
.x
.qp
= predicate
;
2378 /* Given a unw_rec_list process the correct format with the
2379 specified function. */
2382 process_one_record (ptr
, f
)
2386 unsigned long fr_mask
, gr_mask
;
2388 switch (ptr
->r
.type
)
2390 /* This is a dummy record that takes up no space in the output. */
2398 /* These are taken care of by prologue/prologue_gr. */
2403 if (ptr
->r
.type
== prologue_gr
)
2404 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2405 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2407 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2409 /* Output descriptor(s) for union of register spills (if any). */
2410 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2411 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2414 if ((fr_mask
& ~0xfUL
) == 0)
2415 output_P6_format (f
, fr_mem
, fr_mask
);
2418 output_P5_format (f
, gr_mask
, fr_mask
);
2423 output_P6_format (f
, gr_mem
, gr_mask
);
2424 if (ptr
->r
.record
.r
.mask
.br_mem
)
2425 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2427 /* output imask descriptor if necessary: */
2428 if (ptr
->r
.record
.r
.mask
.i
)
2429 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2430 ptr
->r
.record
.r
.imask_size
);
2434 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2438 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2439 ptr
->r
.record
.p
.size
);
2452 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2455 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2458 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2466 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2475 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2485 case bspstore_sprel
:
2487 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2490 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2493 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2496 as_bad ("spill_mask record unimplemented.");
2498 case priunat_when_gr
:
2499 case priunat_when_mem
:
2503 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2505 case priunat_psprel
:
2507 case bspstore_psprel
:
2509 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2512 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2515 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2519 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2522 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2523 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2524 ptr
->r
.record
.x
.pspoff
);
2527 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2528 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2529 ptr
->r
.record
.x
.spoff
);
2532 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2533 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2534 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2536 case spill_psprel_p
:
2537 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2538 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2539 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2542 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2543 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2544 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2547 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2548 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2549 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2553 as_bad ("record_type_not_valid");
2558 /* Given a unw_rec_list list, process all the records with
2559 the specified function. */
2561 process_unw_records (list
, f
)
2566 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2567 process_one_record (ptr
, f
);
2570 /* Determine the size of a record list in bytes. */
2572 calc_record_size (list
)
2576 process_unw_records (list
, count_output
);
2580 /* Update IMASK bitmask to reflect the fact that one or more registers
2581 of type TYPE are saved starting at instruction with index T. If N
2582 bits are set in REGMASK, it is assumed that instructions T through
2583 T+N-1 save these registers.
2587 1: instruction saves next fp reg
2588 2: instruction saves next general reg
2589 3: instruction saves next branch reg */
2591 set_imask (region
, regmask
, t
, type
)
2592 unw_rec_list
*region
;
2593 unsigned long regmask
;
2597 unsigned char *imask
;
2598 unsigned long imask_size
;
2602 imask
= region
->r
.record
.r
.mask
.i
;
2603 imask_size
= region
->r
.record
.r
.imask_size
;
2606 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2607 imask
= xmalloc (imask_size
);
2608 memset (imask
, 0, imask_size
);
2610 region
->r
.record
.r
.imask_size
= imask_size
;
2611 region
->r
.record
.r
.mask
.i
= imask
;
2615 pos
= 2 * (3 - t
% 4);
2618 if (i
>= imask_size
)
2620 as_bad ("Ignoring attempt to spill beyond end of region");
2624 imask
[i
] |= (type
& 0x3) << pos
;
2626 regmask
&= (regmask
- 1);
2636 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2637 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2638 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2642 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2643 unsigned long slot_addr
;
2645 unsigned long first_addr
;
2649 unsigned long index
= 0;
2651 /* First time we are called, the initial address and frag are invalid. */
2652 if (first_addr
== 0)
2655 /* If the two addresses are in different frags, then we need to add in
2656 the remaining size of this frag, and then the entire size of intermediate
2658 while (slot_frag
!= first_frag
)
2660 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2664 /* We can get the final addresses only during and after
2666 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2667 index
+= 3 * ((first_frag
->fr_next
->fr_address
2668 - first_frag
->fr_address
2669 - first_frag
->fr_fix
) >> 4);
2672 /* We don't know what the final addresses will be. We try our
2673 best to estimate. */
2674 switch (first_frag
->fr_type
)
2680 as_fatal ("only constant space allocation is supported");
2686 /* Take alignment into account. Assume the worst case
2687 before relaxation. */
2688 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2692 if (first_frag
->fr_symbol
)
2694 as_fatal ("only constant offsets are supported");
2698 index
+= 3 * (first_frag
->fr_offset
>> 4);
2702 /* Add in the full size of the frag converted to instruction slots. */
2703 index
+= 3 * (first_frag
->fr_fix
>> 4);
2704 /* Subtract away the initial part before first_addr. */
2705 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2706 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2708 /* Move to the beginning of the next frag. */
2709 first_frag
= first_frag
->fr_next
;
2710 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2713 /* Add in the used part of the last frag. */
2714 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2715 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2719 /* Optimize unwind record directives. */
2721 static unw_rec_list
*
2722 optimize_unw_records (list
)
2728 /* If the only unwind record is ".prologue" or ".prologue" followed
2729 by ".body", then we can optimize the unwind directives away. */
2730 if (list
->r
.type
== prologue
2731 && (list
->next
->r
.type
== endp
2732 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2738 /* Given a complete record list, process any records which have
2739 unresolved fields, (ie length counts for a prologue). After
2740 this has been run, all necessary information should be available
2741 within each record to generate an image. */
2744 fixup_unw_records (list
, before_relax
)
2748 unw_rec_list
*ptr
, *region
= 0;
2749 unsigned long first_addr
= 0, rlen
= 0, t
;
2750 fragS
*first_frag
= 0;
2752 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2754 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2755 as_bad (" Insn slot not set in unwind record.");
2756 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2757 first_addr
, first_frag
, before_relax
);
2758 switch (ptr
->r
.type
)
2766 unsigned long last_addr
= 0;
2767 fragS
*last_frag
= NULL
;
2769 first_addr
= ptr
->slot_number
;
2770 first_frag
= ptr
->slot_frag
;
2771 /* Find either the next body/prologue start, or the end of
2772 the function, and determine the size of the region. */
2773 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2774 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2775 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2777 last_addr
= last
->slot_number
;
2778 last_frag
= last
->slot_frag
;
2781 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2783 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2784 if (ptr
->r
.type
== body
)
2785 /* End of region. */
2793 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2795 /* This happens when a memory-stack-less procedure uses a
2796 ".restore sp" directive at the end of a region to pop
2798 ptr
->r
.record
.b
.t
= 0;
2809 case priunat_when_gr
:
2810 case priunat_when_mem
:
2814 ptr
->r
.record
.p
.t
= t
;
2822 case spill_psprel_p
:
2823 ptr
->r
.record
.x
.t
= t
;
2829 as_bad ("frgr_mem record before region record!");
2832 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2833 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2834 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2835 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2840 as_bad ("fr_mem record before region record!");
2843 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2844 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2849 as_bad ("gr_mem record before region record!");
2852 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2853 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2858 as_bad ("br_mem record before region record!");
2861 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2862 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2868 as_bad ("gr_gr record before region record!");
2871 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2876 as_bad ("br_gr record before region record!");
2879 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2888 /* Estimate the size of a frag before relaxing. We only have one type of frag
2889 to handle here, which is the unwind info frag. */
2892 ia64_estimate_size_before_relax (fragS
*frag
,
2893 asection
*segtype ATTRIBUTE_UNUSED
)
2898 /* ??? This code is identical to the first part of ia64_convert_frag. */
2899 list
= (unw_rec_list
*) frag
->fr_opcode
;
2900 fixup_unw_records (list
, 0);
2902 len
= calc_record_size (list
);
2903 /* pad to pointer-size boundary. */
2904 pad
= len
% md
.pointer_size
;
2906 len
+= md
.pointer_size
- pad
;
2907 /* Add 8 for the header. */
2909 /* Add a pointer for the personality offset. */
2910 if (frag
->fr_offset
)
2911 size
+= md
.pointer_size
;
2913 /* fr_var carries the max_chars that we created the fragment with.
2914 We must, of course, have allocated enough memory earlier. */
2915 assert (frag
->fr_var
>= size
);
2917 return frag
->fr_fix
+ size
;
2920 /* This function converts a rs_machine_dependent variant frag into a
2921 normal fill frag with the unwind image from the the record list. */
2923 ia64_convert_frag (fragS
*frag
)
2929 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2930 list
= (unw_rec_list
*) frag
->fr_opcode
;
2931 fixup_unw_records (list
, 0);
2933 len
= calc_record_size (list
);
2934 /* pad to pointer-size boundary. */
2935 pad
= len
% md
.pointer_size
;
2937 len
+= md
.pointer_size
- pad
;
2938 /* Add 8 for the header. */
2940 /* Add a pointer for the personality offset. */
2941 if (frag
->fr_offset
)
2942 size
+= md
.pointer_size
;
2944 /* fr_var carries the max_chars that we created the fragment with.
2945 We must, of course, have allocated enough memory earlier. */
2946 assert (frag
->fr_var
>= size
);
2948 /* Initialize the header area. fr_offset is initialized with
2949 unwind.personality_routine. */
2950 if (frag
->fr_offset
)
2952 if (md
.flags
& EF_IA_64_ABI64
)
2953 flag_value
= (bfd_vma
) 3 << 32;
2955 /* 32-bit unwind info block. */
2956 flag_value
= (bfd_vma
) 0x1003 << 32;
2961 md_number_to_chars (frag
->fr_literal
,
2962 (((bfd_vma
) 1 << 48) /* Version. */
2963 | flag_value
/* U & E handler flags. */
2964 | (len
/ md
.pointer_size
)), /* Length. */
2967 /* Skip the header. */
2968 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
2969 process_unw_records (list
, output_vbyte_mem
);
2971 /* Fill the padding bytes with zeros. */
2973 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
2974 md
.pointer_size
- pad
);
2976 frag
->fr_fix
+= size
;
2977 frag
->fr_type
= rs_fill
;
2979 frag
->fr_offset
= 0;
2983 convert_expr_to_ab_reg (e
, ab
, regp
)
2990 if (e
->X_op
!= O_register
)
2993 reg
= e
->X_add_number
;
2994 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2997 *regp
= reg
- REG_GR
;
2999 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
3000 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
3003 *regp
= reg
- REG_FR
;
3005 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3008 *regp
= reg
- REG_BR
;
3015 case REG_PR
: *regp
= 0; break;
3016 case REG_PSP
: *regp
= 1; break;
3017 case REG_PRIUNAT
: *regp
= 2; break;
3018 case REG_BR
+ 0: *regp
= 3; break;
3019 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3020 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3021 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3022 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3023 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3024 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3025 case REG_AR
+ AR_LC
: *regp
= 10; break;
3035 convert_expr_to_xy_reg (e
, xy
, regp
)
3042 if (e
->X_op
!= O_register
)
3045 reg
= e
->X_add_number
;
3047 if (/* reg >= REG_GR && */ reg
<= (REG_GR
+ 127))
3050 *regp
= reg
- REG_GR
;
3052 else if (reg
>= REG_FR
&& reg
<= (REG_FR
+ 127))
3055 *regp
= reg
- REG_FR
;
3057 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3060 *regp
= reg
- REG_BR
;
3070 /* The current frag is an alignment frag. */
3071 align_frag
= frag_now
;
3072 s_align_bytes (arg
);
3077 int dummy ATTRIBUTE_UNUSED
;
3084 if (is_it_end_of_statement ())
3086 radix
= input_line_pointer
;
3087 ch
= get_symbol_end ();
3088 ia64_canonicalize_symbol_name (radix
);
3089 if (strcasecmp (radix
, "C"))
3090 as_bad ("Radix `%s' unsupported or invalid", radix
);
3091 *input_line_pointer
= ch
;
3092 demand_empty_rest_of_line ();
3095 /* Helper function for .loc directives. If the assembler is not generating
3096 line number info, then we need to remember which instructions have a .loc
3097 directive, and only call dwarf2_gen_line_info for those instructions. */
3102 CURR_SLOT
.loc_directive_seen
= 1;
3103 dwarf2_directive_loc (x
);
3106 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3108 dot_special_section (which
)
3111 set_section ((char *) special_section_name
[which
]);
3114 /* Return -1 for warning and 0 for error. */
3117 unwind_diagnostic (const char * region
, const char *directive
)
3119 if (md
.unwind_check
== unwind_check_warning
)
3121 as_warn (".%s outside of %s", directive
, region
);
3126 as_bad (".%s outside of %s", directive
, region
);
3127 ignore_rest_of_line ();
3132 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3133 a procedure but the unwind directive check is set to warning, 0 if
3134 a directive isn't in a procedure and the unwind directive check is set
3138 in_procedure (const char *directive
)
3140 if (unwind
.proc_pending
.sym
3141 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3143 return unwind_diagnostic ("procedure", directive
);
3146 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3147 a prologue but the unwind directive check is set to warning, 0 if
3148 a directive isn't in a prologue and the unwind directive check is set
3152 in_prologue (const char *directive
)
3154 int in
= in_procedure (directive
);
3157 /* We are in a procedure. Check if we are in a prologue. */
3158 if (unwind
.prologue
)
3160 /* We only want to issue one message. */
3162 return unwind_diagnostic ("prologue", directive
);
3169 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3170 a body but the unwind directive check is set to warning, 0 if
3171 a directive isn't in a body and the unwind directive check is set
3175 in_body (const char *directive
)
3177 int in
= in_procedure (directive
);
3180 /* We are in a procedure. Check if we are in a body. */
3183 /* We only want to issue one message. */
3185 return unwind_diagnostic ("body region", directive
);
3193 add_unwind_entry (ptr
)
3197 unwind
.tail
->next
= ptr
;
3202 /* The current entry can in fact be a chain of unwind entries. */
3203 if (unwind
.current_entry
== NULL
)
3204 unwind
.current_entry
= ptr
;
3209 int dummy ATTRIBUTE_UNUSED
;
3213 if (!in_prologue ("fframe"))
3218 if (e
.X_op
!= O_constant
)
3219 as_bad ("Operand to .fframe must be a constant");
3221 add_unwind_entry (output_mem_stack_f (e
.X_add_number
));
3226 int dummy ATTRIBUTE_UNUSED
;
3231 if (!in_prologue ("vframe"))
3235 reg
= e
.X_add_number
- REG_GR
;
3236 if (e
.X_op
== O_register
&& reg
< 128)
3238 add_unwind_entry (output_mem_stack_v ());
3239 if (! (unwind
.prologue_mask
& 2))
3240 add_unwind_entry (output_psp_gr (reg
));
3243 as_bad ("First operand to .vframe must be a general register");
3247 dot_vframesp (dummy
)
3248 int dummy ATTRIBUTE_UNUSED
;
3252 if (!in_prologue ("vframesp"))
3256 if (e
.X_op
== O_constant
)
3258 add_unwind_entry (output_mem_stack_v ());
3259 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3262 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3266 dot_vframepsp (dummy
)
3267 int dummy ATTRIBUTE_UNUSED
;
3271 if (!in_prologue ("vframepsp"))
3275 if (e
.X_op
== O_constant
)
3277 add_unwind_entry (output_mem_stack_v ());
3278 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3281 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3286 int dummy ATTRIBUTE_UNUSED
;
3292 if (!in_prologue ("save"))
3295 sep
= parse_operand (&e1
);
3297 as_bad ("No second operand to .save");
3298 sep
= parse_operand (&e2
);
3300 reg1
= e1
.X_add_number
;
3301 reg2
= e2
.X_add_number
- REG_GR
;
3303 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3304 if (e1
.X_op
== O_register
)
3306 if (e2
.X_op
== O_register
&& reg2
>= 0 && reg2
< 128)
3310 case REG_AR
+ AR_BSP
:
3311 add_unwind_entry (output_bsp_when ());
3312 add_unwind_entry (output_bsp_gr (reg2
));
3314 case REG_AR
+ AR_BSPSTORE
:
3315 add_unwind_entry (output_bspstore_when ());
3316 add_unwind_entry (output_bspstore_gr (reg2
));
3318 case REG_AR
+ AR_RNAT
:
3319 add_unwind_entry (output_rnat_when ());
3320 add_unwind_entry (output_rnat_gr (reg2
));
3322 case REG_AR
+ AR_UNAT
:
3323 add_unwind_entry (output_unat_when ());
3324 add_unwind_entry (output_unat_gr (reg2
));
3326 case REG_AR
+ AR_FPSR
:
3327 add_unwind_entry (output_fpsr_when ());
3328 add_unwind_entry (output_fpsr_gr (reg2
));
3330 case REG_AR
+ AR_PFS
:
3331 add_unwind_entry (output_pfs_when ());
3332 if (! (unwind
.prologue_mask
& 4))
3333 add_unwind_entry (output_pfs_gr (reg2
));
3335 case REG_AR
+ AR_LC
:
3336 add_unwind_entry (output_lc_when ());
3337 add_unwind_entry (output_lc_gr (reg2
));
3340 add_unwind_entry (output_rp_when ());
3341 if (! (unwind
.prologue_mask
& 8))
3342 add_unwind_entry (output_rp_gr (reg2
));
3345 add_unwind_entry (output_preds_when ());
3346 if (! (unwind
.prologue_mask
& 1))
3347 add_unwind_entry (output_preds_gr (reg2
));
3350 add_unwind_entry (output_priunat_when_gr ());
3351 add_unwind_entry (output_priunat_gr (reg2
));
3354 as_bad ("First operand not a valid register");
3358 as_bad (" Second operand not a valid register");
3361 as_bad ("First operand not a register");
3366 int dummy ATTRIBUTE_UNUSED
;
3369 unsigned long ecount
; /* # of _additional_ regions to pop */
3372 if (!in_body ("restore"))
3375 sep
= parse_operand (&e1
);
3376 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3378 as_bad ("First operand to .restore must be stack pointer (sp)");
3384 parse_operand (&e2
);
3385 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3387 as_bad ("Second operand to .restore must be a constant >= 0");
3390 ecount
= e2
.X_add_number
;
3393 ecount
= unwind
.prologue_count
- 1;
3395 if (ecount
>= unwind
.prologue_count
)
3397 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3398 ecount
+ 1, unwind
.prologue_count
);
3402 add_unwind_entry (output_epilogue (ecount
));
3404 if (ecount
< unwind
.prologue_count
)
3405 unwind
.prologue_count
-= ecount
+ 1;
3407 unwind
.prologue_count
= 0;
3411 dot_restorereg (dummy
)
3412 int dummy ATTRIBUTE_UNUSED
;
3414 unsigned int ab
, reg
;
3417 if (!in_procedure ("restorereg"))
3422 if (!convert_expr_to_ab_reg (&e
, &ab
, ®
))
3424 as_bad ("First operand to .restorereg must be a preserved register");
3427 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0));
3431 dot_restorereg_p (dummy
)
3432 int dummy ATTRIBUTE_UNUSED
;
3434 unsigned int qp
, ab
, reg
;
3438 if (!in_procedure ("restorereg.p"))
3441 sep
= parse_operand (&e1
);
3444 as_bad ("No second operand to .restorereg.p");
3448 parse_operand (&e2
);
3450 qp
= e1
.X_add_number
- REG_P
;
3451 if (e1
.X_op
!= O_register
|| qp
> 63)
3453 as_bad ("First operand to .restorereg.p must be a predicate");
3457 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3459 as_bad ("Second operand to .restorereg.p must be a preserved register");
3462 add_unwind_entry (output_spill_reg_p (ab
, reg
, 0, 0, qp
));
3465 static char *special_linkonce_name
[] =
3467 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3471 start_unwind_section (const segT text_seg
, int sec_index
)
3474 Use a slightly ugly scheme to derive the unwind section names from
3475 the text section name:
3477 text sect. unwind table sect.
3478 name: name: comments:
3479 ---------- ----------------- --------------------------------
3481 .text.foo .IA_64.unwind.text.foo
3482 .foo .IA_64.unwind.foo
3484 .gnu.linkonce.ia64unw.foo
3485 _info .IA_64.unwind_info gas issues error message (ditto)
3486 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3488 This mapping is done so that:
3490 (a) An object file with unwind info only in .text will use
3491 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3492 This follows the letter of the ABI and also ensures backwards
3493 compatibility with older toolchains.
3495 (b) An object file with unwind info in multiple text sections
3496 will use separate unwind sections for each text section.
3497 This allows us to properly set the "sh_info" and "sh_link"
3498 fields in SHT_IA_64_UNWIND as required by the ABI and also
3499 lets GNU ld support programs with multiple segments
3500 containing unwind info (as might be the case for certain
3501 embedded applications).
3503 (c) An error is issued if there would be a name clash.
3506 const char *text_name
, *sec_text_name
;
3508 const char *prefix
= special_section_name
[sec_index
];
3510 size_t prefix_len
, suffix_len
, sec_name_len
;
3512 sec_text_name
= segment_name (text_seg
);
3513 text_name
= sec_text_name
;
3514 if (strncmp (text_name
, "_info", 5) == 0)
3516 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3518 ignore_rest_of_line ();
3521 if (strcmp (text_name
, ".text") == 0)
3524 /* Build the unwind section name by appending the (possibly stripped)
3525 text section name to the unwind prefix. */
3527 if (strncmp (text_name
, ".gnu.linkonce.t.",
3528 sizeof (".gnu.linkonce.t.") - 1) == 0)
3530 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3531 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3534 prefix_len
= strlen (prefix
);
3535 suffix_len
= strlen (suffix
);
3536 sec_name_len
= prefix_len
+ suffix_len
;
3537 sec_name
= alloca (sec_name_len
+ 1);
3538 memcpy (sec_name
, prefix
, prefix_len
);
3539 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3540 sec_name
[sec_name_len
] = '\0';
3542 /* Handle COMDAT group. */
3543 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3544 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3547 size_t len
, group_name_len
;
3548 const char *group_name
= elf_group_name (text_seg
);
3550 if (group_name
== NULL
)
3552 as_bad ("Group section `%s' has no group signature",
3554 ignore_rest_of_line ();
3557 /* We have to construct a fake section directive. */
3558 group_name_len
= strlen (group_name
);
3560 + 16 /* ,"aG",@progbits, */
3561 + group_name_len
/* ,group_name */
3564 section
= alloca (len
+ 1);
3565 memcpy (section
, sec_name
, sec_name_len
);
3566 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3567 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3568 memcpy (section
+ len
- 7, ",comdat", 7);
3569 section
[len
] = '\0';
3570 set_section (section
);
3574 set_section (sec_name
);
3575 bfd_set_section_flags (stdoutput
, now_seg
,
3576 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3579 elf_linked_to_section (now_seg
) = text_seg
;
3583 generate_unwind_image (const segT text_seg
)
3588 /* Mark the end of the unwind info, so that we can compute the size of the
3589 last unwind region. */
3590 add_unwind_entry (output_endp ());
3592 /* Force out pending instructions, to make sure all unwind records have
3593 a valid slot_number field. */
3594 ia64_flush_insns ();
3596 /* Generate the unwind record. */
3597 list
= optimize_unw_records (unwind
.list
);
3598 fixup_unw_records (list
, 1);
3599 size
= calc_record_size (list
);
3601 if (size
> 0 || unwind
.force_unwind_entry
)
3603 unwind
.force_unwind_entry
= 0;
3604 /* pad to pointer-size boundary. */
3605 pad
= size
% md
.pointer_size
;
3607 size
+= md
.pointer_size
- pad
;
3608 /* Add 8 for the header. */
3610 /* Add a pointer for the personality offset. */
3611 if (unwind
.personality_routine
)
3612 size
+= md
.pointer_size
;
3615 /* If there are unwind records, switch sections, and output the info. */
3619 bfd_reloc_code_real_type reloc
;
3621 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3623 /* Make sure the section has 4 byte alignment for ILP32 and
3624 8 byte alignment for LP64. */
3625 frag_align (md
.pointer_size_shift
, 0, 0);
3626 record_alignment (now_seg
, md
.pointer_size_shift
);
3628 /* Set expression which points to start of unwind descriptor area. */
3629 unwind
.info
= expr_build_dot ();
3631 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3632 (offsetT
) (long) unwind
.personality_routine
,
3635 /* Add the personality address to the image. */
3636 if (unwind
.personality_routine
!= 0)
3638 exp
.X_op
= O_symbol
;
3639 exp
.X_add_symbol
= unwind
.personality_routine
;
3640 exp
.X_add_number
= 0;
3642 if (md
.flags
& EF_IA_64_BE
)
3644 if (md
.flags
& EF_IA_64_ABI64
)
3645 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3647 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3651 if (md
.flags
& EF_IA_64_ABI64
)
3652 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3654 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3657 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3658 md
.pointer_size
, &exp
, 0, reloc
);
3659 unwind
.personality_routine
= 0;
3663 free_saved_prologue_counts ();
3664 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3668 dot_handlerdata (dummy
)
3669 int dummy ATTRIBUTE_UNUSED
;
3671 if (!in_procedure ("handlerdata"))
3673 unwind
.force_unwind_entry
= 1;
3675 /* Remember which segment we're in so we can switch back after .endp */
3676 unwind
.saved_text_seg
= now_seg
;
3677 unwind
.saved_text_subseg
= now_subseg
;
3679 /* Generate unwind info into unwind-info section and then leave that
3680 section as the currently active one so dataXX directives go into
3681 the language specific data area of the unwind info block. */
3682 generate_unwind_image (now_seg
);
3683 demand_empty_rest_of_line ();
3687 dot_unwentry (dummy
)
3688 int dummy ATTRIBUTE_UNUSED
;
3690 if (!in_procedure ("unwentry"))
3692 unwind
.force_unwind_entry
= 1;
3693 demand_empty_rest_of_line ();
3698 int dummy ATTRIBUTE_UNUSED
;
3703 if (!in_prologue ("altrp"))
3707 reg
= e
.X_add_number
- REG_BR
;
3708 if (e
.X_op
== O_register
&& reg
< 8)
3709 add_unwind_entry (output_rp_br (reg
));
3711 as_bad ("First operand not a valid branch register");
3715 dot_savemem (psprel
)
3722 if (!in_prologue (psprel
? "savepsp" : "savesp"))
3725 sep
= parse_operand (&e1
);
3727 as_bad ("No second operand to .save%ssp", psprel
? "p" : "");
3728 sep
= parse_operand (&e2
);
3730 reg1
= e1
.X_add_number
;
3731 val
= e2
.X_add_number
;
3733 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3734 if (e1
.X_op
== O_register
)
3736 if (e2
.X_op
== O_constant
)
3740 case REG_AR
+ AR_BSP
:
3741 add_unwind_entry (output_bsp_when ());
3742 add_unwind_entry ((psprel
3744 : output_bsp_sprel
) (val
));
3746 case REG_AR
+ AR_BSPSTORE
:
3747 add_unwind_entry (output_bspstore_when ());
3748 add_unwind_entry ((psprel
3749 ? output_bspstore_psprel
3750 : output_bspstore_sprel
) (val
));
3752 case REG_AR
+ AR_RNAT
:
3753 add_unwind_entry (output_rnat_when ());
3754 add_unwind_entry ((psprel
3755 ? output_rnat_psprel
3756 : output_rnat_sprel
) (val
));
3758 case REG_AR
+ AR_UNAT
:
3759 add_unwind_entry (output_unat_when ());
3760 add_unwind_entry ((psprel
3761 ? output_unat_psprel
3762 : output_unat_sprel
) (val
));
3764 case REG_AR
+ AR_FPSR
:
3765 add_unwind_entry (output_fpsr_when ());
3766 add_unwind_entry ((psprel
3767 ? output_fpsr_psprel
3768 : output_fpsr_sprel
) (val
));
3770 case REG_AR
+ AR_PFS
:
3771 add_unwind_entry (output_pfs_when ());
3772 add_unwind_entry ((psprel
3774 : output_pfs_sprel
) (val
));
3776 case REG_AR
+ AR_LC
:
3777 add_unwind_entry (output_lc_when ());
3778 add_unwind_entry ((psprel
3780 : output_lc_sprel
) (val
));
3783 add_unwind_entry (output_rp_when ());
3784 add_unwind_entry ((psprel
3786 : output_rp_sprel
) (val
));
3789 add_unwind_entry (output_preds_when ());
3790 add_unwind_entry ((psprel
3791 ? output_preds_psprel
3792 : output_preds_sprel
) (val
));
3795 add_unwind_entry (output_priunat_when_mem ());
3796 add_unwind_entry ((psprel
3797 ? output_priunat_psprel
3798 : output_priunat_sprel
) (val
));
3801 as_bad ("First operand not a valid register");
3805 as_bad (" Second operand not a valid constant");
3808 as_bad ("First operand not a register");
3813 int dummy ATTRIBUTE_UNUSED
;
3818 if (!in_prologue ("save.g"))
3821 sep
= parse_operand (&e1
);
3823 parse_operand (&e2
);
3825 if (e1
.X_op
!= O_constant
)
3826 as_bad ("First operand to .save.g must be a constant.");
3829 int grmask
= e1
.X_add_number
;
3831 add_unwind_entry (output_gr_mem (grmask
));
3834 int reg
= e2
.X_add_number
- REG_GR
;
3835 if (e2
.X_op
== O_register
&& reg
>= 0 && reg
< 128)
3836 add_unwind_entry (output_gr_gr (grmask
, reg
));
3838 as_bad ("Second operand is an invalid register.");
3845 int dummy ATTRIBUTE_UNUSED
;
3850 if (!in_prologue ("save.f"))
3853 sep
= parse_operand (&e1
);
3855 if (e1
.X_op
!= O_constant
)
3856 as_bad ("Operand to .save.f must be a constant.");
3858 add_unwind_entry (output_fr_mem (e1
.X_add_number
));
3863 int dummy ATTRIBUTE_UNUSED
;
3870 if (!in_prologue ("save.b"))
3873 sep
= parse_operand (&e1
);
3874 if (e1
.X_op
!= O_constant
)
3876 as_bad ("First operand to .save.b must be a constant.");
3879 brmask
= e1
.X_add_number
;
3883 sep
= parse_operand (&e2
);
3884 reg
= e2
.X_add_number
- REG_GR
;
3885 if (e2
.X_op
!= O_register
|| reg
> 127)
3887 as_bad ("Second operand to .save.b must be a general register.");
3890 add_unwind_entry (output_br_gr (brmask
, e2
.X_add_number
));
3893 add_unwind_entry (output_br_mem (brmask
));
3895 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3896 demand_empty_rest_of_line ();
3901 int dummy ATTRIBUTE_UNUSED
;
3906 if (!in_prologue ("save.gf"))
3909 sep
= parse_operand (&e1
);
3911 parse_operand (&e2
);
3913 if (e1
.X_op
!= O_constant
|| sep
!= ',' || e2
.X_op
!= O_constant
)
3914 as_bad ("Both operands of .save.gf must be constants.");
3917 int grmask
= e1
.X_add_number
;
3918 int frmask
= e2
.X_add_number
;
3919 add_unwind_entry (output_frgr_mem (grmask
, frmask
));
3925 int dummy ATTRIBUTE_UNUSED
;
3930 if (!in_prologue ("spill"))
3933 sep
= parse_operand (&e
);
3934 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3935 demand_empty_rest_of_line ();
3937 if (e
.X_op
!= O_constant
)
3938 as_bad ("Operand to .spill must be a constant");
3940 add_unwind_entry (output_spill_base (e
.X_add_number
));
3944 dot_spillreg (dummy
)
3945 int dummy ATTRIBUTE_UNUSED
;
3948 unsigned int ab
, xy
, reg
, treg
;
3951 if (!in_procedure ("spillreg"))
3954 sep
= parse_operand (&e1
);
3957 as_bad ("No second operand to .spillreg");
3961 parse_operand (&e2
);
3963 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3965 as_bad ("First operand to .spillreg must be a preserved register");
3969 if (!convert_expr_to_xy_reg (&e2
, &xy
, &treg
))
3971 as_bad ("Second operand to .spillreg must be a register");
3975 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
));
3979 dot_spillmem (psprel
)
3984 unsigned int ab
, reg
;
3986 if (!in_procedure ("spillmem"))
3989 sep
= parse_operand (&e1
);
3992 as_bad ("Second operand missing");
3996 parse_operand (&e2
);
3998 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
4000 as_bad ("First operand to .spill%s must be a preserved register",
4001 psprel
? "psp" : "sp");
4005 if (e2
.X_op
!= O_constant
)
4007 as_bad ("Second operand to .spill%s must be a constant",
4008 psprel
? "psp" : "sp");
4013 add_unwind_entry (output_spill_psprel (ab
, reg
, e2
.X_add_number
));
4015 add_unwind_entry (output_spill_sprel (ab
, reg
, e2
.X_add_number
));
4019 dot_spillreg_p (dummy
)
4020 int dummy ATTRIBUTE_UNUSED
;
4023 unsigned int ab
, xy
, reg
, treg
;
4024 expressionS e1
, e2
, e3
;
4027 if (!in_procedure ("spillreg.p"))
4030 sep
= parse_operand (&e1
);
4033 as_bad ("No second and third operand to .spillreg.p");
4037 sep
= parse_operand (&e2
);
4040 as_bad ("No third operand to .spillreg.p");
4044 parse_operand (&e3
);
4046 qp
= e1
.X_add_number
- REG_P
;
4048 if (e1
.X_op
!= O_register
|| qp
> 63)
4050 as_bad ("First operand to .spillreg.p must be a predicate");
4054 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4056 as_bad ("Second operand to .spillreg.p must be a preserved register");
4060 if (!convert_expr_to_xy_reg (&e3
, &xy
, &treg
))
4062 as_bad ("Third operand to .spillreg.p must be a register");
4066 add_unwind_entry (output_spill_reg_p (ab
, reg
, treg
, xy
, qp
));
4070 dot_spillmem_p (psprel
)
4073 expressionS e1
, e2
, e3
;
4075 unsigned int ab
, reg
;
4078 if (!in_procedure ("spillmem.p"))
4081 sep
= parse_operand (&e1
);
4084 as_bad ("Second operand missing");
4088 parse_operand (&e2
);
4091 as_bad ("Second operand missing");
4095 parse_operand (&e3
);
4097 qp
= e1
.X_add_number
- REG_P
;
4098 if (e1
.X_op
!= O_register
|| qp
> 63)
4100 as_bad ("First operand to .spill%s_p must be a predicate",
4101 psprel
? "psp" : "sp");
4105 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4107 as_bad ("Second operand to .spill%s_p must be a preserved register",
4108 psprel
? "psp" : "sp");
4112 if (e3
.X_op
!= O_constant
)
4114 as_bad ("Third operand to .spill%s_p must be a constant",
4115 psprel
? "psp" : "sp");
4120 add_unwind_entry (output_spill_psprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4122 add_unwind_entry (output_spill_sprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4126 get_saved_prologue_count (lbl
)
4129 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4131 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4135 return lpc
->prologue_count
;
4137 as_bad ("Missing .label_state %ld", lbl
);
4142 save_prologue_count (lbl
, count
)
4146 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4148 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4152 lpc
->prologue_count
= count
;
4155 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4157 new_lpc
->next
= unwind
.saved_prologue_counts
;
4158 new_lpc
->label_number
= lbl
;
4159 new_lpc
->prologue_count
= count
;
4160 unwind
.saved_prologue_counts
= new_lpc
;
4165 free_saved_prologue_counts ()
4167 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4168 label_prologue_count
*next
;
4177 unwind
.saved_prologue_counts
= NULL
;
4181 dot_label_state (dummy
)
4182 int dummy ATTRIBUTE_UNUSED
;
4186 if (!in_body ("label_state"))
4190 if (e
.X_op
!= O_constant
)
4192 as_bad ("Operand to .label_state must be a constant");
4195 add_unwind_entry (output_label_state (e
.X_add_number
));
4196 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4200 dot_copy_state (dummy
)
4201 int dummy ATTRIBUTE_UNUSED
;
4205 if (!in_body ("copy_state"))
4209 if (e
.X_op
!= O_constant
)
4211 as_bad ("Operand to .copy_state must be a constant");
4214 add_unwind_entry (output_copy_state (e
.X_add_number
));
4215 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4220 int dummy ATTRIBUTE_UNUSED
;
4225 if (!in_procedure ("unwabi"))
4228 sep
= parse_operand (&e1
);
4231 as_bad ("Second operand to .unwabi missing");
4234 sep
= parse_operand (&e2
);
4235 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4236 demand_empty_rest_of_line ();
4238 if (e1
.X_op
!= O_constant
)
4240 as_bad ("First operand to .unwabi must be a constant");
4244 if (e2
.X_op
!= O_constant
)
4246 as_bad ("Second operand to .unwabi must be a constant");
4250 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
));
4254 dot_personality (dummy
)
4255 int dummy ATTRIBUTE_UNUSED
;
4258 if (!in_procedure ("personality"))
4261 name
= input_line_pointer
;
4262 c
= get_symbol_end ();
4263 p
= input_line_pointer
;
4264 unwind
.personality_routine
= symbol_find_or_make (name
);
4265 unwind
.force_unwind_entry
= 1;
4268 demand_empty_rest_of_line ();
4273 int dummy ATTRIBUTE_UNUSED
;
4277 proc_pending
*pending
, *last_pending
;
4279 if (unwind
.proc_pending
.sym
)
4281 (md
.unwind_check
== unwind_check_warning
4283 : as_bad
) ("Missing .endp after previous .proc");
4284 while (unwind
.proc_pending
.next
)
4286 pending
= unwind
.proc_pending
.next
;
4287 unwind
.proc_pending
.next
= pending
->next
;
4291 last_pending
= NULL
;
4293 /* Parse names of main and alternate entry points and mark them as
4294 function symbols: */
4298 name
= input_line_pointer
;
4299 c
= get_symbol_end ();
4300 p
= input_line_pointer
;
4302 as_bad ("Empty argument of .proc");
4305 sym
= symbol_find_or_make (name
);
4306 if (S_IS_DEFINED (sym
))
4307 as_bad ("`%s' was already defined", name
);
4308 else if (!last_pending
)
4310 unwind
.proc_pending
.sym
= sym
;
4311 last_pending
= &unwind
.proc_pending
;
4315 pending
= xmalloc (sizeof (*pending
));
4317 last_pending
= last_pending
->next
= pending
;
4319 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4323 if (*input_line_pointer
!= ',')
4325 ++input_line_pointer
;
4329 unwind
.proc_pending
.sym
= expr_build_dot ();
4330 last_pending
= &unwind
.proc_pending
;
4332 last_pending
->next
= NULL
;
4333 demand_empty_rest_of_line ();
4336 unwind
.prologue
= 0;
4337 unwind
.prologue_count
= 0;
4340 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4341 unwind
.personality_routine
= 0;
4346 int dummy ATTRIBUTE_UNUSED
;
4348 if (!in_procedure ("body"))
4350 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4351 as_warn ("Initial .body should precede any instructions");
4353 unwind
.prologue
= 0;
4354 unwind
.prologue_mask
= 0;
4357 add_unwind_entry (output_body ());
4358 demand_empty_rest_of_line ();
4362 dot_prologue (dummy
)
4363 int dummy ATTRIBUTE_UNUSED
;
4366 int mask
= 0, grsave
= 0;
4368 if (!in_procedure ("prologue"))
4370 if (unwind
.prologue
)
4372 as_bad (".prologue within prologue");
4373 ignore_rest_of_line ();
4376 if (!unwind
.body
&& unwind
.insn
)
4377 as_warn ("Initial .prologue should precede any instructions");
4379 if (!is_it_end_of_statement ())
4382 sep
= parse_operand (&e1
);
4384 as_bad ("No second operand to .prologue");
4385 sep
= parse_operand (&e2
);
4386 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4387 demand_empty_rest_of_line ();
4389 if (e1
.X_op
== O_constant
)
4391 mask
= e1
.X_add_number
;
4393 if (e2
.X_op
== O_constant
)
4394 grsave
= e2
.X_add_number
;
4395 else if (e2
.X_op
== O_register
4396 && (grsave
= e2
.X_add_number
- REG_GR
) < 128)
4399 as_bad ("Second operand not a constant or general register");
4401 add_unwind_entry (output_prologue_gr (mask
, grsave
));
4404 as_bad ("First operand not a constant");
4407 add_unwind_entry (output_prologue ());
4409 unwind
.prologue
= 1;
4410 unwind
.prologue_mask
= mask
;
4412 ++unwind
.prologue_count
;
4417 int dummy ATTRIBUTE_UNUSED
;
4420 int bytes_per_address
;
4423 subsegT saved_subseg
;
4424 proc_pending
*pending
;
4425 int unwind_check
= md
.unwind_check
;
4427 md
.unwind_check
= unwind_check_error
;
4428 if (!in_procedure ("endp"))
4430 md
.unwind_check
= unwind_check
;
4432 if (unwind
.saved_text_seg
)
4434 saved_seg
= unwind
.saved_text_seg
;
4435 saved_subseg
= unwind
.saved_text_subseg
;
4436 unwind
.saved_text_seg
= NULL
;
4440 saved_seg
= now_seg
;
4441 saved_subseg
= now_subseg
;
4444 insn_group_break (1, 0, 0);
4446 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4448 generate_unwind_image (saved_seg
);
4450 if (unwind
.info
|| unwind
.force_unwind_entry
)
4454 subseg_set (md
.last_text_seg
, 0);
4455 proc_end
= expr_build_dot ();
4457 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4459 /* Make sure that section has 4 byte alignment for ILP32 and
4460 8 byte alignment for LP64. */
4461 record_alignment (now_seg
, md
.pointer_size_shift
);
4463 /* Need space for 3 pointers for procedure start, procedure end,
4465 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4466 where
= frag_now_fix () - (3 * md
.pointer_size
);
4467 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4469 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4470 e
.X_op
= O_pseudo_fixup
;
4471 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4473 if (!S_IS_LOCAL (unwind
.proc_pending
.sym
)
4474 && S_IS_DEFINED (unwind
.proc_pending
.sym
))
4475 e
.X_add_symbol
= symbol_temp_new (S_GET_SEGMENT (unwind
.proc_pending
.sym
),
4476 S_GET_VALUE (unwind
.proc_pending
.sym
),
4477 symbol_get_frag (unwind
.proc_pending
.sym
));
4479 e
.X_add_symbol
= unwind
.proc_pending
.sym
;
4480 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4482 e
.X_op
= O_pseudo_fixup
;
4483 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4485 e
.X_add_symbol
= proc_end
;
4486 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4487 bytes_per_address
, &e
);
4491 e
.X_op
= O_pseudo_fixup
;
4492 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4494 e
.X_add_symbol
= unwind
.info
;
4495 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4496 bytes_per_address
, &e
);
4499 subseg_set (saved_seg
, saved_subseg
);
4501 /* Set symbol sizes. */
4502 pending
= &unwind
.proc_pending
;
4503 if (S_GET_NAME (pending
->sym
))
4507 symbolS
*sym
= pending
->sym
;
4509 if (!S_IS_DEFINED (sym
))
4510 as_bad ("`%s' was not defined within procedure", S_GET_NAME (sym
));
4511 else if (S_GET_SIZE (sym
) == 0
4512 && symbol_get_obj (sym
)->size
== NULL
)
4514 fragS
*frag
= symbol_get_frag (sym
);
4518 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4519 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4522 symbol_get_obj (sym
)->size
=
4523 (expressionS
*) xmalloc (sizeof (expressionS
));
4524 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4525 symbol_get_obj (sym
)->size
->X_add_symbol
4526 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4527 frag_now_fix (), frag_now
);
4528 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4529 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4533 } while ((pending
= pending
->next
) != NULL
);
4536 /* Parse names of main and alternate entry points. */
4542 name
= input_line_pointer
;
4543 c
= get_symbol_end ();
4544 p
= input_line_pointer
;
4546 (md
.unwind_check
== unwind_check_warning
4548 : as_bad
) ("Empty argument of .endp");
4551 symbolS
*sym
= symbol_find (name
);
4553 for (pending
= &unwind
.proc_pending
; pending
; pending
= pending
->next
)
4555 if (sym
== pending
->sym
)
4557 pending
->sym
= NULL
;
4561 if (!sym
|| !pending
)
4562 as_warn ("`%s' was not specified with previous .proc", name
);
4566 if (*input_line_pointer
!= ',')
4568 ++input_line_pointer
;
4570 demand_empty_rest_of_line ();
4572 /* Deliberately only checking for the main entry point here; the
4573 language spec even says all arguments to .endp are ignored. */
4574 if (unwind
.proc_pending
.sym
4575 && S_GET_NAME (unwind
.proc_pending
.sym
)
4576 && strcmp (S_GET_NAME (unwind
.proc_pending
.sym
), FAKE_LABEL_NAME
))
4577 as_warn ("`%s' should be an operand to this .endp",
4578 S_GET_NAME (unwind
.proc_pending
.sym
));
4579 while (unwind
.proc_pending
.next
)
4581 pending
= unwind
.proc_pending
.next
;
4582 unwind
.proc_pending
.next
= pending
->next
;
4585 unwind
.proc_pending
.sym
= unwind
.info
= NULL
;
4589 dot_template (template)
4592 CURR_SLOT
.user_template
= template;
4597 int dummy ATTRIBUTE_UNUSED
;
4599 int ins
, locs
, outs
, rots
;
4601 if (is_it_end_of_statement ())
4602 ins
= locs
= outs
= rots
= 0;
4605 ins
= get_absolute_expression ();
4606 if (*input_line_pointer
++ != ',')
4608 locs
= get_absolute_expression ();
4609 if (*input_line_pointer
++ != ',')
4611 outs
= get_absolute_expression ();
4612 if (*input_line_pointer
++ != ',')
4614 rots
= get_absolute_expression ();
4616 set_regstack (ins
, locs
, outs
, rots
);
4620 as_bad ("Comma expected");
4621 ignore_rest_of_line ();
4628 unsigned num_regs
, num_alloced
= 0;
4629 struct dynreg
**drpp
, *dr
;
4630 int ch
, base_reg
= 0;
4636 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4637 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4638 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4642 /* First, remove existing names from hash table. */
4643 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4645 hash_delete (md
.dynreg_hash
, dr
->name
);
4646 /* FIXME: Free dr->name. */
4650 drpp
= &md
.dynreg
[type
];
4653 start
= input_line_pointer
;
4654 ch
= get_symbol_end ();
4655 len
= strlen (ia64_canonicalize_symbol_name (start
));
4656 *input_line_pointer
= ch
;
4659 if (*input_line_pointer
!= '[')
4661 as_bad ("Expected '['");
4664 ++input_line_pointer
; /* skip '[' */
4666 num_regs
= get_absolute_expression ();
4668 if (*input_line_pointer
++ != ']')
4670 as_bad ("Expected ']'");
4675 num_alloced
+= num_regs
;
4679 if (num_alloced
> md
.rot
.num_regs
)
4681 as_bad ("Used more than the declared %d rotating registers",
4687 if (num_alloced
> 96)
4689 as_bad ("Used more than the available 96 rotating registers");
4694 if (num_alloced
> 48)
4696 as_bad ("Used more than the available 48 rotating registers");
4707 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4708 memset (*drpp
, 0, sizeof (*dr
));
4711 name
= obstack_alloc (¬es
, len
+ 1);
4712 memcpy (name
, start
, len
);
4717 dr
->num_regs
= num_regs
;
4718 dr
->base
= base_reg
;
4720 base_reg
+= num_regs
;
4722 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4724 as_bad ("Attempt to redefine register set `%s'", name
);
4725 obstack_free (¬es
, name
);
4729 if (*input_line_pointer
!= ',')
4731 ++input_line_pointer
; /* skip comma */
4734 demand_empty_rest_of_line ();
4738 ignore_rest_of_line ();
4742 dot_byteorder (byteorder
)
4745 segment_info_type
*seginfo
= seg_info (now_seg
);
4747 if (byteorder
== -1)
4749 if (seginfo
->tc_segment_info_data
.endian
== 0)
4750 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4751 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4754 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4756 if (target_big_endian
!= byteorder
)
4758 target_big_endian
= byteorder
;
4759 if (target_big_endian
)
4761 ia64_number_to_chars
= number_to_chars_bigendian
;
4762 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4766 ia64_number_to_chars
= number_to_chars_littleendian
;
4767 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4774 int dummy ATTRIBUTE_UNUSED
;
4781 option
= input_line_pointer
;
4782 ch
= get_symbol_end ();
4783 if (strcmp (option
, "lsb") == 0)
4784 md
.flags
&= ~EF_IA_64_BE
;
4785 else if (strcmp (option
, "msb") == 0)
4786 md
.flags
|= EF_IA_64_BE
;
4787 else if (strcmp (option
, "abi32") == 0)
4788 md
.flags
&= ~EF_IA_64_ABI64
;
4789 else if (strcmp (option
, "abi64") == 0)
4790 md
.flags
|= EF_IA_64_ABI64
;
4792 as_bad ("Unknown psr option `%s'", option
);
4793 *input_line_pointer
= ch
;
4796 if (*input_line_pointer
!= ',')
4799 ++input_line_pointer
;
4802 demand_empty_rest_of_line ();
4807 int dummy ATTRIBUTE_UNUSED
;
4809 new_logical_line (0, get_absolute_expression ());
4810 demand_empty_rest_of_line ();
4814 cross_section (ref
, cons
, ua
)
4816 void (*cons
) PARAMS((int));
4820 int saved_auto_align
;
4821 unsigned int section_count
;
4824 start
= input_line_pointer
;
4830 name
= demand_copy_C_string (&len
);
4831 obstack_free(¬es
, name
);
4834 ignore_rest_of_line ();
4840 char c
= get_symbol_end ();
4842 if (input_line_pointer
== start
)
4844 as_bad ("Missing section name");
4845 ignore_rest_of_line ();
4848 *input_line_pointer
= c
;
4850 end
= input_line_pointer
;
4852 if (*input_line_pointer
!= ',')
4854 as_bad ("Comma expected after section name");
4855 ignore_rest_of_line ();
4859 end
= input_line_pointer
+ 1; /* skip comma */
4860 input_line_pointer
= start
;
4861 md
.keep_pending_output
= 1;
4862 section_count
= bfd_count_sections(stdoutput
);
4863 obj_elf_section (0);
4864 if (section_count
!= bfd_count_sections(stdoutput
))
4865 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
4866 input_line_pointer
= end
;
4867 saved_auto_align
= md
.auto_align
;
4872 md
.auto_align
= saved_auto_align
;
4873 obj_elf_previous (0);
4874 md
.keep_pending_output
= 0;
4881 cross_section (size
, cons
, 0);
4884 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4887 stmt_float_cons (kind
)
4908 ia64_do_align (alignment
);
4916 int saved_auto_align
= md
.auto_align
;
4920 md
.auto_align
= saved_auto_align
;
4924 dot_xfloat_cons (kind
)
4927 cross_section (kind
, stmt_float_cons
, 0);
4931 dot_xstringer (zero
)
4934 cross_section (zero
, stringer
, 0);
4941 cross_section (size
, cons
, 1);
4945 dot_xfloat_cons_ua (kind
)
4948 cross_section (kind
, float_cons
, 1);
4951 /* .reg.val <regname>,value */
4955 int dummy ATTRIBUTE_UNUSED
;
4960 if (reg
.X_op
!= O_register
)
4962 as_bad (_("Register name expected"));
4963 ignore_rest_of_line ();
4965 else if (*input_line_pointer
++ != ',')
4967 as_bad (_("Comma expected"));
4968 ignore_rest_of_line ();
4972 valueT value
= get_absolute_expression ();
4973 int regno
= reg
.X_add_number
;
4974 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4975 as_warn (_("Register value annotation ignored"));
4978 gr_values
[regno
- REG_GR
].known
= 1;
4979 gr_values
[regno
- REG_GR
].value
= value
;
4980 gr_values
[regno
- REG_GR
].path
= md
.path
;
4983 demand_empty_rest_of_line ();
4988 .serialize.instruction
4991 dot_serialize (type
)
4994 insn_group_break (0, 0, 0);
4996 instruction_serialization ();
4998 data_serialization ();
4999 insn_group_break (0, 0, 0);
5000 demand_empty_rest_of_line ();
5003 /* select dv checking mode
5008 A stop is inserted when changing modes
5015 if (md
.manual_bundling
)
5016 as_warn (_("Directive invalid within a bundle"));
5018 if (type
== 'E' || type
== 'A')
5019 md
.mode_explicitly_set
= 0;
5021 md
.mode_explicitly_set
= 1;
5028 if (md
.explicit_mode
)
5029 insn_group_break (1, 0, 0);
5030 md
.explicit_mode
= 0;
5034 if (!md
.explicit_mode
)
5035 insn_group_break (1, 0, 0);
5036 md
.explicit_mode
= 1;
5040 if (md
.explicit_mode
!= md
.default_explicit_mode
)
5041 insn_group_break (1, 0, 0);
5042 md
.explicit_mode
= md
.default_explicit_mode
;
5043 md
.mode_explicitly_set
= 0;
5054 for (regno
= 0; regno
< 64; regno
++)
5056 if (mask
& ((valueT
) 1 << regno
))
5058 fprintf (stderr
, "%s p%d", comma
, regno
);
5065 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5066 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5067 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5068 .pred.safe_across_calls p1 [, p2 [,...]]
5077 int p1
= -1, p2
= -1;
5081 if (*input_line_pointer
== '"')
5084 char *form
= demand_copy_C_string (&len
);
5086 if (strcmp (form
, "mutex") == 0)
5088 else if (strcmp (form
, "clear") == 0)
5090 else if (strcmp (form
, "imply") == 0)
5092 obstack_free (¬es
, form
);
5094 else if (*input_line_pointer
== '@')
5096 char *form
= ++input_line_pointer
;
5097 char c
= get_symbol_end();
5099 if (strcmp (form
, "mutex") == 0)
5101 else if (strcmp (form
, "clear") == 0)
5103 else if (strcmp (form
, "imply") == 0)
5105 *input_line_pointer
= c
;
5109 as_bad (_("Missing predicate relation type"));
5110 ignore_rest_of_line ();
5115 as_bad (_("Unrecognized predicate relation type"));
5116 ignore_rest_of_line ();
5119 if (*input_line_pointer
== ',')
5120 ++input_line_pointer
;
5129 expressionS pr
, *pr1
, *pr2
;
5132 if (pr
.X_op
== O_register
5133 && pr
.X_add_number
>= REG_P
5134 && pr
.X_add_number
<= REG_P
+ 63)
5136 regno
= pr
.X_add_number
- REG_P
;
5144 else if (type
!= 'i'
5145 && pr
.X_op
== O_subtract
5146 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5147 && pr1
->X_op
== O_register
5148 && pr1
->X_add_number
>= REG_P
5149 && pr1
->X_add_number
<= REG_P
+ 63
5150 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5151 && pr2
->X_op
== O_register
5152 && pr2
->X_add_number
>= REG_P
5153 && pr2
->X_add_number
<= REG_P
+ 63)
5158 regno
= pr1
->X_add_number
- REG_P
;
5159 stop
= pr2
->X_add_number
- REG_P
;
5162 as_bad (_("Bad register range"));
5163 ignore_rest_of_line ();
5166 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5167 count
+= stop
- regno
+ 1;
5171 as_bad (_("Predicate register expected"));
5172 ignore_rest_of_line ();
5176 as_warn (_("Duplicate predicate register ignored"));
5178 if (*input_line_pointer
!= ',')
5180 ++input_line_pointer
;
5189 clear_qp_mutex (mask
);
5190 clear_qp_implies (mask
, (valueT
) 0);
5193 if (count
!= 2 || p1
== -1 || p2
== -1)
5194 as_bad (_("Predicate source and target required"));
5195 else if (p1
== 0 || p2
== 0)
5196 as_bad (_("Use of p0 is not valid in this context"));
5198 add_qp_imply (p1
, p2
);
5203 as_bad (_("At least two PR arguments expected"));
5208 as_bad (_("Use of p0 is not valid in this context"));
5211 add_qp_mutex (mask
);
5214 /* note that we don't override any existing relations */
5217 as_bad (_("At least one PR argument expected"));
5222 fprintf (stderr
, "Safe across calls: ");
5223 print_prmask (mask
);
5224 fprintf (stderr
, "\n");
5226 qp_safe_across_calls
= mask
;
5229 demand_empty_rest_of_line ();
5232 /* .entry label [, label [, ...]]
5233 Hint to DV code that the given labels are to be considered entry points.
5234 Otherwise, only global labels are considered entry points. */
5238 int dummy ATTRIBUTE_UNUSED
;
5247 name
= input_line_pointer
;
5248 c
= get_symbol_end ();
5249 symbolP
= symbol_find_or_make (name
);
5251 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
5253 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5256 *input_line_pointer
= c
;
5258 c
= *input_line_pointer
;
5261 input_line_pointer
++;
5263 if (*input_line_pointer
== '\n')
5269 demand_empty_rest_of_line ();
5272 /* .mem.offset offset, base
5273 "base" is used to distinguish between offsets from a different base. */
5276 dot_mem_offset (dummy
)
5277 int dummy ATTRIBUTE_UNUSED
;
5279 md
.mem_offset
.hint
= 1;
5280 md
.mem_offset
.offset
= get_absolute_expression ();
5281 if (*input_line_pointer
!= ',')
5283 as_bad (_("Comma expected"));
5284 ignore_rest_of_line ();
5287 ++input_line_pointer
;
5288 md
.mem_offset
.base
= get_absolute_expression ();
5289 demand_empty_rest_of_line ();
5292 /* ia64-specific pseudo-ops: */
5293 const pseudo_typeS md_pseudo_table
[] =
5295 { "radix", dot_radix
, 0 },
5296 { "lcomm", s_lcomm_bytes
, 1 },
5297 { "loc", dot_loc
, 0 },
5298 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5299 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5300 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5301 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5302 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5303 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5304 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5305 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5306 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5307 { "proc", dot_proc
, 0 },
5308 { "body", dot_body
, 0 },
5309 { "prologue", dot_prologue
, 0 },
5310 { "endp", dot_endp
, 0 },
5312 { "fframe", dot_fframe
, 0 },
5313 { "vframe", dot_vframe
, 0 },
5314 { "vframesp", dot_vframesp
, 0 },
5315 { "vframepsp", dot_vframepsp
, 0 },
5316 { "save", dot_save
, 0 },
5317 { "restore", dot_restore
, 0 },
5318 { "restorereg", dot_restorereg
, 0 },
5319 { "restorereg.p", dot_restorereg_p
, 0 },
5320 { "handlerdata", dot_handlerdata
, 0 },
5321 { "unwentry", dot_unwentry
, 0 },
5322 { "altrp", dot_altrp
, 0 },
5323 { "savesp", dot_savemem
, 0 },
5324 { "savepsp", dot_savemem
, 1 },
5325 { "save.g", dot_saveg
, 0 },
5326 { "save.f", dot_savef
, 0 },
5327 { "save.b", dot_saveb
, 0 },
5328 { "save.gf", dot_savegf
, 0 },
5329 { "spill", dot_spill
, 0 },
5330 { "spillreg", dot_spillreg
, 0 },
5331 { "spillsp", dot_spillmem
, 0 },
5332 { "spillpsp", dot_spillmem
, 1 },
5333 { "spillreg.p", dot_spillreg_p
, 0 },
5334 { "spillsp.p", dot_spillmem_p
, 0 },
5335 { "spillpsp.p", dot_spillmem_p
, 1 },
5336 { "label_state", dot_label_state
, 0 },
5337 { "copy_state", dot_copy_state
, 0 },
5338 { "unwabi", dot_unwabi
, 0 },
5339 { "personality", dot_personality
, 0 },
5340 { "mii", dot_template
, 0x0 },
5341 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5342 { "mlx", dot_template
, 0x2 },
5343 { "mmi", dot_template
, 0x4 },
5344 { "mfi", dot_template
, 0x6 },
5345 { "mmf", dot_template
, 0x7 },
5346 { "mib", dot_template
, 0x8 },
5347 { "mbb", dot_template
, 0x9 },
5348 { "bbb", dot_template
, 0xb },
5349 { "mmb", dot_template
, 0xc },
5350 { "mfb", dot_template
, 0xe },
5351 { "align", dot_align
, 0 },
5352 { "regstk", dot_regstk
, 0 },
5353 { "rotr", dot_rot
, DYNREG_GR
},
5354 { "rotf", dot_rot
, DYNREG_FR
},
5355 { "rotp", dot_rot
, DYNREG_PR
},
5356 { "lsb", dot_byteorder
, 0 },
5357 { "msb", dot_byteorder
, 1 },
5358 { "psr", dot_psr
, 0 },
5359 { "alias", dot_alias
, 0 },
5360 { "secalias", dot_alias
, 1 },
5361 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5363 { "xdata1", dot_xdata
, 1 },
5364 { "xdata2", dot_xdata
, 2 },
5365 { "xdata4", dot_xdata
, 4 },
5366 { "xdata8", dot_xdata
, 8 },
5367 { "xdata16", dot_xdata
, 16 },
5368 { "xreal4", dot_xfloat_cons
, 'f' },
5369 { "xreal8", dot_xfloat_cons
, 'd' },
5370 { "xreal10", dot_xfloat_cons
, 'x' },
5371 { "xreal16", dot_xfloat_cons
, 'X' },
5372 { "xstring", dot_xstringer
, 0 },
5373 { "xstringz", dot_xstringer
, 1 },
5375 /* unaligned versions: */
5376 { "xdata2.ua", dot_xdata_ua
, 2 },
5377 { "xdata4.ua", dot_xdata_ua
, 4 },
5378 { "xdata8.ua", dot_xdata_ua
, 8 },
5379 { "xdata16.ua", dot_xdata_ua
, 16 },
5380 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5381 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5382 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5383 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5385 /* annotations/DV checking support */
5386 { "entry", dot_entry
, 0 },
5387 { "mem.offset", dot_mem_offset
, 0 },
5388 { "pred.rel", dot_pred_rel
, 0 },
5389 { "pred.rel.clear", dot_pred_rel
, 'c' },
5390 { "pred.rel.imply", dot_pred_rel
, 'i' },
5391 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5392 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5393 { "reg.val", dot_reg_val
, 0 },
5394 { "serialize.data", dot_serialize
, 0 },
5395 { "serialize.instruction", dot_serialize
, 1 },
5396 { "auto", dot_dv_mode
, 'a' },
5397 { "explicit", dot_dv_mode
, 'e' },
5398 { "default", dot_dv_mode
, 'd' },
5400 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5401 IA-64 aligns data allocation pseudo-ops by default, so we have to
5402 tell it that these ones are supposed to be unaligned. Long term,
5403 should rewrite so that only IA-64 specific data allocation pseudo-ops
5404 are aligned by default. */
5405 {"2byte", stmt_cons_ua
, 2},
5406 {"4byte", stmt_cons_ua
, 4},
5407 {"8byte", stmt_cons_ua
, 8},
5412 static const struct pseudo_opcode
5415 void (*handler
) (int);
5420 /* these are more like pseudo-ops, but don't start with a dot */
5421 { "data1", cons
, 1 },
5422 { "data2", cons
, 2 },
5423 { "data4", cons
, 4 },
5424 { "data8", cons
, 8 },
5425 { "data16", cons
, 16 },
5426 { "real4", stmt_float_cons
, 'f' },
5427 { "real8", stmt_float_cons
, 'd' },
5428 { "real10", stmt_float_cons
, 'x' },
5429 { "real16", stmt_float_cons
, 'X' },
5430 { "string", stringer
, 0 },
5431 { "stringz", stringer
, 1 },
5433 /* unaligned versions: */
5434 { "data2.ua", stmt_cons_ua
, 2 },
5435 { "data4.ua", stmt_cons_ua
, 4 },
5436 { "data8.ua", stmt_cons_ua
, 8 },
5437 { "data16.ua", stmt_cons_ua
, 16 },
5438 { "real4.ua", float_cons
, 'f' },
5439 { "real8.ua", float_cons
, 'd' },
5440 { "real10.ua", float_cons
, 'x' },
5441 { "real16.ua", float_cons
, 'X' },
5444 /* Declare a register by creating a symbol for it and entering it in
5445 the symbol table. */
5448 declare_register (name
, regnum
)
5455 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
5457 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5459 as_fatal ("Inserting \"%s\" into register table failed: %s",
5466 declare_register_set (prefix
, num_regs
, base_regnum
)
5474 for (i
= 0; i
< num_regs
; ++i
)
5476 sprintf (name
, "%s%u", prefix
, i
);
5477 declare_register (name
, base_regnum
+ i
);
5482 operand_width (opnd
)
5483 enum ia64_opnd opnd
;
5485 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5486 unsigned int bits
= 0;
5490 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5491 bits
+= odesc
->field
[i
].bits
;
5496 static enum operand_match_result
5497 operand_match (idesc
, index
, e
)
5498 const struct ia64_opcode
*idesc
;
5502 enum ia64_opnd opnd
= idesc
->operands
[index
];
5503 int bits
, relocatable
= 0;
5504 struct insn_fix
*fix
;
5511 case IA64_OPND_AR_CCV
:
5512 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5513 return OPERAND_MATCH
;
5516 case IA64_OPND_AR_CSD
:
5517 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5518 return OPERAND_MATCH
;
5521 case IA64_OPND_AR_PFS
:
5522 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5523 return OPERAND_MATCH
;
5527 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5528 return OPERAND_MATCH
;
5532 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5533 return OPERAND_MATCH
;
5537 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5538 return OPERAND_MATCH
;
5541 case IA64_OPND_PR_ROT
:
5542 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5543 return OPERAND_MATCH
;
5547 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5548 return OPERAND_MATCH
;
5551 case IA64_OPND_PSR_L
:
5552 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5553 return OPERAND_MATCH
;
5556 case IA64_OPND_PSR_UM
:
5557 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5558 return OPERAND_MATCH
;
5562 if (e
->X_op
== O_constant
)
5564 if (e
->X_add_number
== 1)
5565 return OPERAND_MATCH
;
5567 return OPERAND_OUT_OF_RANGE
;
5572 if (e
->X_op
== O_constant
)
5574 if (e
->X_add_number
== 8)
5575 return OPERAND_MATCH
;
5577 return OPERAND_OUT_OF_RANGE
;
5582 if (e
->X_op
== O_constant
)
5584 if (e
->X_add_number
== 16)
5585 return OPERAND_MATCH
;
5587 return OPERAND_OUT_OF_RANGE
;
5591 /* register operands: */
5594 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5595 && e
->X_add_number
< REG_AR
+ 128)
5596 return OPERAND_MATCH
;
5601 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5602 && e
->X_add_number
< REG_BR
+ 8)
5603 return OPERAND_MATCH
;
5607 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5608 && e
->X_add_number
< REG_CR
+ 128)
5609 return OPERAND_MATCH
;
5616 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5617 && e
->X_add_number
< REG_FR
+ 128)
5618 return OPERAND_MATCH
;
5623 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5624 && e
->X_add_number
< REG_P
+ 64)
5625 return OPERAND_MATCH
;
5631 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5632 && e
->X_add_number
< REG_GR
+ 128)
5633 return OPERAND_MATCH
;
5636 case IA64_OPND_R3_2
:
5637 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5639 if (e
->X_add_number
< REG_GR
+ 4)
5640 return OPERAND_MATCH
;
5641 else if (e
->X_add_number
< REG_GR
+ 128)
5642 return OPERAND_OUT_OF_RANGE
;
5646 /* indirect operands: */
5647 case IA64_OPND_CPUID_R3
:
5648 case IA64_OPND_DBR_R3
:
5649 case IA64_OPND_DTR_R3
:
5650 case IA64_OPND_ITR_R3
:
5651 case IA64_OPND_IBR_R3
:
5652 case IA64_OPND_MSR_R3
:
5653 case IA64_OPND_PKR_R3
:
5654 case IA64_OPND_PMC_R3
:
5655 case IA64_OPND_PMD_R3
:
5656 case IA64_OPND_RR_R3
:
5657 if (e
->X_op
== O_index
&& e
->X_op_symbol
5658 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5659 == opnd
- IA64_OPND_CPUID_R3
))
5660 return OPERAND_MATCH
;
5664 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5665 return OPERAND_MATCH
;
5668 /* immediate operands: */
5669 case IA64_OPND_CNT2a
:
5670 case IA64_OPND_LEN4
:
5671 case IA64_OPND_LEN6
:
5672 bits
= operand_width (idesc
->operands
[index
]);
5673 if (e
->X_op
== O_constant
)
5675 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5676 return OPERAND_MATCH
;
5678 return OPERAND_OUT_OF_RANGE
;
5682 case IA64_OPND_CNT2b
:
5683 if (e
->X_op
== O_constant
)
5685 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5686 return OPERAND_MATCH
;
5688 return OPERAND_OUT_OF_RANGE
;
5692 case IA64_OPND_CNT2c
:
5693 val
= e
->X_add_number
;
5694 if (e
->X_op
== O_constant
)
5696 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5697 return OPERAND_MATCH
;
5699 return OPERAND_OUT_OF_RANGE
;
5704 /* SOR must be an integer multiple of 8 */
5705 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5706 return OPERAND_OUT_OF_RANGE
;
5709 if (e
->X_op
== O_constant
)
5711 if ((bfd_vma
) e
->X_add_number
<= 96)
5712 return OPERAND_MATCH
;
5714 return OPERAND_OUT_OF_RANGE
;
5718 case IA64_OPND_IMMU62
:
5719 if (e
->X_op
== O_constant
)
5721 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5722 return OPERAND_MATCH
;
5724 return OPERAND_OUT_OF_RANGE
;
5728 /* FIXME -- need 62-bit relocation type */
5729 as_bad (_("62-bit relocation not yet implemented"));
5733 case IA64_OPND_IMMU64
:
5734 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5735 || e
->X_op
== O_subtract
)
5737 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5738 fix
->code
= BFD_RELOC_IA64_IMM64
;
5739 if (e
->X_op
!= O_subtract
)
5741 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5742 if (e
->X_op
== O_pseudo_fixup
)
5746 fix
->opnd
= idesc
->operands
[index
];
5749 ++CURR_SLOT
.num_fixups
;
5750 return OPERAND_MATCH
;
5752 else if (e
->X_op
== O_constant
)
5753 return OPERAND_MATCH
;
5756 case IA64_OPND_CCNT5
:
5757 case IA64_OPND_CNT5
:
5758 case IA64_OPND_CNT6
:
5759 case IA64_OPND_CPOS6a
:
5760 case IA64_OPND_CPOS6b
:
5761 case IA64_OPND_CPOS6c
:
5762 case IA64_OPND_IMMU2
:
5763 case IA64_OPND_IMMU7a
:
5764 case IA64_OPND_IMMU7b
:
5765 case IA64_OPND_IMMU21
:
5766 case IA64_OPND_IMMU24
:
5767 case IA64_OPND_MBTYPE4
:
5768 case IA64_OPND_MHTYPE8
:
5769 case IA64_OPND_POS6
:
5770 bits
= operand_width (idesc
->operands
[index
]);
5771 if (e
->X_op
== O_constant
)
5773 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5774 return OPERAND_MATCH
;
5776 return OPERAND_OUT_OF_RANGE
;
5780 case IA64_OPND_IMMU9
:
5781 bits
= operand_width (idesc
->operands
[index
]);
5782 if (e
->X_op
== O_constant
)
5784 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5786 int lobits
= e
->X_add_number
& 0x3;
5787 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5788 e
->X_add_number
|= (bfd_vma
) 0x3;
5789 return OPERAND_MATCH
;
5792 return OPERAND_OUT_OF_RANGE
;
5796 case IA64_OPND_IMM44
:
5797 /* least 16 bits must be zero */
5798 if ((e
->X_add_number
& 0xffff) != 0)
5799 /* XXX technically, this is wrong: we should not be issuing warning
5800 messages until we're sure this instruction pattern is going to
5802 as_warn (_("lower 16 bits of mask ignored"));
5804 if (e
->X_op
== O_constant
)
5806 if (((e
->X_add_number
>= 0
5807 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5808 || (e
->X_add_number
< 0
5809 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5812 if (e
->X_add_number
>= 0
5813 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5815 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5817 return OPERAND_MATCH
;
5820 return OPERAND_OUT_OF_RANGE
;
5824 case IA64_OPND_IMM17
:
5825 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5826 if (e
->X_op
== O_constant
)
5828 if (((e
->X_add_number
>= 0
5829 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5830 || (e
->X_add_number
< 0
5831 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5834 if (e
->X_add_number
>= 0
5835 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5837 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5839 return OPERAND_MATCH
;
5842 return OPERAND_OUT_OF_RANGE
;
5846 case IA64_OPND_IMM14
:
5847 case IA64_OPND_IMM22
:
5849 case IA64_OPND_IMM1
:
5850 case IA64_OPND_IMM8
:
5851 case IA64_OPND_IMM8U4
:
5852 case IA64_OPND_IMM8M1
:
5853 case IA64_OPND_IMM8M1U4
:
5854 case IA64_OPND_IMM8M1U8
:
5855 case IA64_OPND_IMM9a
:
5856 case IA64_OPND_IMM9b
:
5857 bits
= operand_width (idesc
->operands
[index
]);
5858 if (relocatable
&& (e
->X_op
== O_symbol
5859 || e
->X_op
== O_subtract
5860 || e
->X_op
== O_pseudo_fixup
))
5862 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5864 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5865 fix
->code
= BFD_RELOC_IA64_IMM14
;
5867 fix
->code
= BFD_RELOC_IA64_IMM22
;
5869 if (e
->X_op
!= O_subtract
)
5871 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5872 if (e
->X_op
== O_pseudo_fixup
)
5876 fix
->opnd
= idesc
->operands
[index
];
5879 ++CURR_SLOT
.num_fixups
;
5880 return OPERAND_MATCH
;
5882 else if (e
->X_op
!= O_constant
5883 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5884 return OPERAND_MISMATCH
;
5886 if (opnd
== IA64_OPND_IMM8M1U4
)
5888 /* Zero is not valid for unsigned compares that take an adjusted
5889 constant immediate range. */
5890 if (e
->X_add_number
== 0)
5891 return OPERAND_OUT_OF_RANGE
;
5893 /* Sign-extend 32-bit unsigned numbers, so that the following range
5894 checks will work. */
5895 val
= e
->X_add_number
;
5896 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5897 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5898 val
= ((val
<< 32) >> 32);
5900 /* Check for 0x100000000. This is valid because
5901 0x100000000-1 is the same as ((uint32_t) -1). */
5902 if (val
== ((bfd_signed_vma
) 1 << 32))
5903 return OPERAND_MATCH
;
5907 else if (opnd
== IA64_OPND_IMM8M1U8
)
5909 /* Zero is not valid for unsigned compares that take an adjusted
5910 constant immediate range. */
5911 if (e
->X_add_number
== 0)
5912 return OPERAND_OUT_OF_RANGE
;
5914 /* Check for 0x10000000000000000. */
5915 if (e
->X_op
== O_big
)
5917 if (generic_bignum
[0] == 0
5918 && generic_bignum
[1] == 0
5919 && generic_bignum
[2] == 0
5920 && generic_bignum
[3] == 0
5921 && generic_bignum
[4] == 1)
5922 return OPERAND_MATCH
;
5924 return OPERAND_OUT_OF_RANGE
;
5927 val
= e
->X_add_number
- 1;
5929 else if (opnd
== IA64_OPND_IMM8M1
)
5930 val
= e
->X_add_number
- 1;
5931 else if (opnd
== IA64_OPND_IMM8U4
)
5933 /* Sign-extend 32-bit unsigned numbers, so that the following range
5934 checks will work. */
5935 val
= e
->X_add_number
;
5936 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5937 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5938 val
= ((val
<< 32) >> 32);
5941 val
= e
->X_add_number
;
5943 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5944 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5945 return OPERAND_MATCH
;
5947 return OPERAND_OUT_OF_RANGE
;
5949 case IA64_OPND_INC3
:
5950 /* +/- 1, 4, 8, 16 */
5951 val
= e
->X_add_number
;
5954 if (e
->X_op
== O_constant
)
5956 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5957 return OPERAND_MATCH
;
5959 return OPERAND_OUT_OF_RANGE
;
5963 case IA64_OPND_TGT25
:
5964 case IA64_OPND_TGT25b
:
5965 case IA64_OPND_TGT25c
:
5966 case IA64_OPND_TGT64
:
5967 if (e
->X_op
== O_symbol
)
5969 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5970 if (opnd
== IA64_OPND_TGT25
)
5971 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5972 else if (opnd
== IA64_OPND_TGT25b
)
5973 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5974 else if (opnd
== IA64_OPND_TGT25c
)
5975 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5976 else if (opnd
== IA64_OPND_TGT64
)
5977 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5981 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5982 fix
->opnd
= idesc
->operands
[index
];
5985 ++CURR_SLOT
.num_fixups
;
5986 return OPERAND_MATCH
;
5988 case IA64_OPND_TAG13
:
5989 case IA64_OPND_TAG13b
:
5993 return OPERAND_MATCH
;
5996 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5997 /* There are no external relocs for TAG13/TAG13b fields, so we
5998 create a dummy reloc. This will not live past md_apply_fix. */
5999 fix
->code
= BFD_RELOC_UNUSED
;
6000 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
6001 fix
->opnd
= idesc
->operands
[index
];
6004 ++CURR_SLOT
.num_fixups
;
6005 return OPERAND_MATCH
;
6012 case IA64_OPND_LDXMOV
:
6013 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6014 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
6015 fix
->opnd
= idesc
->operands
[index
];
6018 ++CURR_SLOT
.num_fixups
;
6019 return OPERAND_MATCH
;
6024 return OPERAND_MISMATCH
;
6033 memset (e
, 0, sizeof (*e
));
6036 if (*input_line_pointer
!= '}')
6038 sep
= *input_line_pointer
++;
6042 if (!md
.manual_bundling
)
6043 as_warn ("Found '}' when manual bundling is off");
6045 CURR_SLOT
.manual_bundling_off
= 1;
6046 md
.manual_bundling
= 0;
6052 /* Returns the next entry in the opcode table that matches the one in
6053 IDESC, and frees the entry in IDESC. If no matching entry is
6054 found, NULL is returned instead. */
6056 static struct ia64_opcode
*
6057 get_next_opcode (struct ia64_opcode
*idesc
)
6059 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6060 ia64_free_opcode (idesc
);
6064 /* Parse the operands for the opcode and find the opcode variant that
6065 matches the specified operands, or NULL if no match is possible. */
6067 static struct ia64_opcode
*
6068 parse_operands (idesc
)
6069 struct ia64_opcode
*idesc
;
6071 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6072 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6075 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6076 enum operand_match_result result
;
6078 char *first_arg
= 0, *end
, *saved_input_pointer
;
6081 assert (strlen (idesc
->name
) <= 128);
6083 strcpy (mnemonic
, idesc
->name
);
6084 if (idesc
->operands
[2] == IA64_OPND_SOF
6085 || idesc
->operands
[1] == IA64_OPND_SOF
)
6087 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6088 can't parse the first operand until we have parsed the
6089 remaining operands of the "alloc" instruction. */
6091 first_arg
= input_line_pointer
;
6092 end
= strchr (input_line_pointer
, '=');
6095 as_bad ("Expected separator `='");
6098 input_line_pointer
= end
+ 1;
6105 if (i
< NELEMS (CURR_SLOT
.opnd
))
6107 sep
= parse_operand (CURR_SLOT
.opnd
+ i
);
6108 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6115 sep
= parse_operand (&dummy
);
6116 if (dummy
.X_op
== O_absent
)
6122 if (sep
!= '=' && sep
!= ',')
6127 if (num_outputs
> 0)
6128 as_bad ("Duplicate equal sign (=) in instruction");
6130 num_outputs
= i
+ 1;
6135 as_bad ("Illegal operand separator `%c'", sep
);
6139 if (idesc
->operands
[2] == IA64_OPND_SOF
6140 || idesc
->operands
[1] == IA64_OPND_SOF
)
6142 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6143 know (strcmp (idesc
->name
, "alloc") == 0);
6144 i
= (CURR_SLOT
.opnd
[1].X_op
== O_register
6145 && CURR_SLOT
.opnd
[1].X_add_number
== REG_AR
+ AR_PFS
) ? 2 : 1;
6146 if (num_operands
== i
+ 3 /* first_arg not included in this count! */
6147 && CURR_SLOT
.opnd
[i
].X_op
== O_constant
6148 && CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6149 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
6150 && CURR_SLOT
.opnd
[i
+ 3].X_op
== O_constant
)
6152 sof
= set_regstack (CURR_SLOT
.opnd
[i
].X_add_number
,
6153 CURR_SLOT
.opnd
[i
+ 1].X_add_number
,
6154 CURR_SLOT
.opnd
[i
+ 2].X_add_number
,
6155 CURR_SLOT
.opnd
[i
+ 3].X_add_number
);
6157 /* now we can parse the first arg: */
6158 saved_input_pointer
= input_line_pointer
;
6159 input_line_pointer
= first_arg
;
6160 sep
= parse_operand (CURR_SLOT
.opnd
+ 0);
6162 --num_outputs
; /* force error */
6163 input_line_pointer
= saved_input_pointer
;
6165 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6166 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6167 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6168 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6172 highest_unmatched_operand
= -4;
6173 curr_out_of_range_pos
= -1;
6175 for (; idesc
; idesc
= get_next_opcode (idesc
))
6177 if (num_outputs
!= idesc
->num_outputs
)
6178 continue; /* mismatch in # of outputs */
6179 if (highest_unmatched_operand
< 0)
6180 highest_unmatched_operand
|= 1;
6181 if (num_operands
> NELEMS (idesc
->operands
)
6182 || (num_operands
< NELEMS (idesc
->operands
)
6183 && idesc
->operands
[num_operands
])
6184 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6185 continue; /* mismatch in number of arguments */
6186 if (highest_unmatched_operand
< 0)
6187 highest_unmatched_operand
|= 2;
6189 CURR_SLOT
.num_fixups
= 0;
6191 /* Try to match all operands. If we see an out-of-range operand,
6192 then continue trying to match the rest of the operands, since if
6193 the rest match, then this idesc will give the best error message. */
6195 out_of_range_pos
= -1;
6196 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6198 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6199 if (result
!= OPERAND_MATCH
)
6201 if (result
!= OPERAND_OUT_OF_RANGE
)
6203 if (out_of_range_pos
< 0)
6204 /* remember position of the first out-of-range operand: */
6205 out_of_range_pos
= i
;
6209 /* If we did not match all operands, or if at least one operand was
6210 out-of-range, then this idesc does not match. Keep track of which
6211 idesc matched the most operands before failing. If we have two
6212 idescs that failed at the same position, and one had an out-of-range
6213 operand, then prefer the out-of-range operand. Thus if we have
6214 "add r0=0x1000000,r1" we get an error saying the constant is out
6215 of range instead of an error saying that the constant should have been
6218 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6220 if (i
> highest_unmatched_operand
6221 || (i
== highest_unmatched_operand
6222 && out_of_range_pos
> curr_out_of_range_pos
))
6224 highest_unmatched_operand
= i
;
6225 if (out_of_range_pos
>= 0)
6227 expected_operand
= idesc
->operands
[out_of_range_pos
];
6228 error_pos
= out_of_range_pos
;
6232 expected_operand
= idesc
->operands
[i
];
6235 curr_out_of_range_pos
= out_of_range_pos
;
6244 if (expected_operand
)
6245 as_bad ("Operand %u of `%s' should be %s",
6246 error_pos
+ 1, mnemonic
,
6247 elf64_ia64_operands
[expected_operand
].desc
);
6248 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6249 as_bad ("Wrong number of output operands");
6250 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6251 as_bad ("Wrong number of input operands");
6253 as_bad ("Operand mismatch");
6257 /* Check that the instruction doesn't use
6258 - r0, f0, or f1 as output operands
6259 - the same predicate twice as output operands
6260 - r0 as address of a base update load or store
6261 - the same GR as output and address of a base update load
6262 - two even- or two odd-numbered FRs as output operands of a floating
6263 point parallel load.
6264 At most two (conflicting) output (or output-like) operands can exist,
6265 (floating point parallel loads have three outputs, but the base register,
6266 if updated, cannot conflict with the actual outputs). */
6268 for (i
= 0; i
< num_operands
; ++i
)
6273 switch (idesc
->operands
[i
])
6278 if (i
< num_outputs
)
6280 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6283 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6285 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6290 if (i
< num_outputs
)
6293 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6295 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6302 if (i
< num_outputs
)
6304 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6305 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6308 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6311 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6313 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6317 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6319 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6322 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6324 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6335 as_warn ("Invalid use of `%c%d' as output operand", reg_class
, regno
);
6338 as_warn ("Invalid use of `r%d' as base update address operand", regno
);
6344 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6349 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6354 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6362 as_warn ("Invalid duplicate use of `%c%d'", reg_class
, reg1
);
6364 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6365 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6366 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6367 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6368 && ! ((reg1
^ reg2
) & 1))
6369 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6370 reg1
- REG_FR
, reg2
- REG_FR
);
6371 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6372 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6373 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6374 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6375 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6376 reg1
- REG_FR
, reg2
- REG_FR
);
6381 build_insn (slot
, insnp
)
6385 const struct ia64_operand
*odesc
, *o2desc
;
6386 struct ia64_opcode
*idesc
= slot
->idesc
;
6392 insn
= idesc
->opcode
| slot
->qp_regno
;
6394 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6396 if (slot
->opnd
[i
].X_op
== O_register
6397 || slot
->opnd
[i
].X_op
== O_constant
6398 || slot
->opnd
[i
].X_op
== O_index
)
6399 val
= slot
->opnd
[i
].X_add_number
;
6400 else if (slot
->opnd
[i
].X_op
== O_big
)
6402 /* This must be the value 0x10000000000000000. */
6403 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6409 switch (idesc
->operands
[i
])
6411 case IA64_OPND_IMMU64
:
6412 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6413 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6414 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6415 | (((val
>> 63) & 0x1) << 36));
6418 case IA64_OPND_IMMU62
:
6419 val
&= 0x3fffffffffffffffULL
;
6420 if (val
!= slot
->opnd
[i
].X_add_number
)
6421 as_warn (_("Value truncated to 62 bits"));
6422 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6423 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6426 case IA64_OPND_TGT64
:
6428 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6429 insn
|= ((((val
>> 59) & 0x1) << 36)
6430 | (((val
>> 0) & 0xfffff) << 13));
6461 case IA64_OPND_R3_2
:
6462 case IA64_OPND_CPUID_R3
:
6463 case IA64_OPND_DBR_R3
:
6464 case IA64_OPND_DTR_R3
:
6465 case IA64_OPND_ITR_R3
:
6466 case IA64_OPND_IBR_R3
:
6468 case IA64_OPND_MSR_R3
:
6469 case IA64_OPND_PKR_R3
:
6470 case IA64_OPND_PMC_R3
:
6471 case IA64_OPND_PMD_R3
:
6472 case IA64_OPND_RR_R3
:
6480 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6481 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6483 as_bad_where (slot
->src_file
, slot
->src_line
,
6484 "Bad operand value: %s", err
);
6485 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6487 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6488 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6490 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6491 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6493 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6494 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6495 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6497 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6498 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6508 int manual_bundling_off
= 0, manual_bundling
= 0;
6509 enum ia64_unit required_unit
, insn_unit
= 0;
6510 enum ia64_insn_type type
[3], insn_type
;
6511 unsigned int template, orig_template
;
6512 bfd_vma insn
[3] = { -1, -1, -1 };
6513 struct ia64_opcode
*idesc
;
6514 int end_of_insn_group
= 0, user_template
= -1;
6515 int n
, i
, j
, first
, curr
, last_slot
;
6516 bfd_vma t0
= 0, t1
= 0;
6517 struct label_fix
*lfix
;
6518 struct insn_fix
*ifix
;
6524 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6525 know (first
>= 0 & first
< NUM_SLOTS
);
6526 n
= MIN (3, md
.num_slots_in_use
);
6528 /* Determine template: user user_template if specified, best match
6531 if (md
.slot
[first
].user_template
>= 0)
6532 user_template
= template = md
.slot
[first
].user_template
;
6535 /* Auto select appropriate template. */
6536 memset (type
, 0, sizeof (type
));
6538 for (i
= 0; i
< n
; ++i
)
6540 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6542 type
[i
] = md
.slot
[curr
].idesc
->type
;
6543 curr
= (curr
+ 1) % NUM_SLOTS
;
6545 template = best_template
[type
[0]][type
[1]][type
[2]];
6548 /* initialize instructions with appropriate nops: */
6549 for (i
= 0; i
< 3; ++i
)
6550 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6554 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6555 from the start of the frag. */
6556 addr_mod
= frag_now_fix () & 15;
6557 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6558 as_bad (_("instruction address is not a multiple of 16"));
6559 frag_now
->insn_addr
= addr_mod
;
6560 frag_now
->has_code
= 1;
6562 /* now fill in slots with as many insns as possible: */
6564 idesc
= md
.slot
[curr
].idesc
;
6565 end_of_insn_group
= 0;
6567 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6569 /* If we have unwind records, we may need to update some now. */
6570 unw_rec_list
*ptr
= md
.slot
[curr
].unwind_record
;
6571 unw_rec_list
*end_ptr
= NULL
;
6575 /* Find the last prologue/body record in the list for the current
6576 insn, and set the slot number for all records up to that point.
6577 This needs to be done now, because prologue/body records refer to
6578 the current point, not the point after the instruction has been
6579 issued. This matters because there may have been nops emitted
6580 meanwhile. Any non-prologue non-body record followed by a
6581 prologue/body record must also refer to the current point. */
6582 unw_rec_list
*last_ptr
;
6584 for (j
= 1; end_ptr
== NULL
&& j
< md
.num_slots_in_use
; ++j
)
6585 end_ptr
= md
.slot
[(curr
+ j
) % NUM_SLOTS
].unwind_record
;
6586 for (last_ptr
= NULL
; ptr
!= end_ptr
; ptr
= ptr
->next
)
6587 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6588 || ptr
->r
.type
== body
)
6592 /* Make last_ptr point one after the last prologue/body
6594 last_ptr
= last_ptr
->next
;
6595 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6598 ptr
->slot_number
= (unsigned long) f
+ i
;
6599 ptr
->slot_frag
= frag_now
;
6601 /* Remove the initialized records, so that we won't accidentally
6602 update them again if we insert a nop and continue. */
6603 md
.slot
[curr
].unwind_record
= last_ptr
;
6607 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6608 if (md
.slot
[curr
].manual_bundling_on
)
6611 manual_bundling
= 1;
6613 break; /* Need to start a new bundle. */
6616 /* If this instruction specifies a template, then it must be the first
6617 instruction of a bundle. */
6618 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6621 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6623 if (manual_bundling
&& !manual_bundling_off
)
6625 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6626 "`%s' must be last in bundle", idesc
->name
);
6628 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6632 if (idesc
->flags
& IA64_OPCODE_LAST
)
6635 unsigned int required_template
;
6637 /* If we need a stop bit after an M slot, our only choice is
6638 template 5 (M;;MI). If we need a stop bit after a B
6639 slot, our only choice is to place it at the end of the
6640 bundle, because the only available templates are MIB,
6641 MBB, BBB, MMB, and MFB. We don't handle anything other
6642 than M and B slots because these are the only kind of
6643 instructions that can have the IA64_OPCODE_LAST bit set. */
6644 required_template
= template;
6645 switch (idesc
->type
)
6649 required_template
= 5;
6657 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6658 "Internal error: don't know how to force %s to end"
6659 "of instruction group", idesc
->name
);
6664 && (i
> required_slot
6665 || (required_slot
== 2 && !manual_bundling_off
)
6666 || (user_template
>= 0
6667 /* Changing from MMI to M;MI is OK. */
6668 && (template ^ required_template
) > 1)))
6670 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6671 "`%s' must be last in instruction group",
6673 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6674 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6676 if (required_slot
< i
)
6677 /* Can't fit this instruction. */
6681 if (required_template
!= template)
6683 /* If we switch the template, we need to reset the NOPs
6684 after slot i. The slot-types of the instructions ahead
6685 of i never change, so we don't need to worry about
6686 changing NOPs in front of this slot. */
6687 for (j
= i
; j
< 3; ++j
)
6688 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6690 template = required_template
;
6692 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6694 if (manual_bundling
)
6696 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6697 "Label must be first in a bundle");
6698 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6700 /* This insn must go into the first slot of a bundle. */
6704 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6706 /* We need an instruction group boundary in the middle of a
6707 bundle. See if we can switch to an other template with
6708 an appropriate boundary. */
6710 orig_template
= template;
6711 if (i
== 1 && (user_template
== 4
6712 || (user_template
< 0
6713 && (ia64_templ_desc
[template].exec_unit
[0]
6717 end_of_insn_group
= 0;
6719 else if (i
== 2 && (user_template
== 0
6720 || (user_template
< 0
6721 && (ia64_templ_desc
[template].exec_unit
[1]
6723 /* This test makes sure we don't switch the template if
6724 the next instruction is one that needs to be first in
6725 an instruction group. Since all those instructions are
6726 in the M group, there is no way such an instruction can
6727 fit in this bundle even if we switch the template. The
6728 reason we have to check for this is that otherwise we
6729 may end up generating "MI;;I M.." which has the deadly
6730 effect that the second M instruction is no longer the
6731 first in the group! --davidm 99/12/16 */
6732 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6735 end_of_insn_group
= 0;
6738 && user_template
== 0
6739 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6740 /* Use the next slot. */
6742 else if (curr
!= first
)
6743 /* can't fit this insn */
6746 if (template != orig_template
)
6747 /* if we switch the template, we need to reset the NOPs
6748 after slot i. The slot-types of the instructions ahead
6749 of i never change, so we don't need to worry about
6750 changing NOPs in front of this slot. */
6751 for (j
= i
; j
< 3; ++j
)
6752 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6754 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6756 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6757 if (idesc
->type
== IA64_TYPE_DYN
)
6759 enum ia64_opnd opnd1
, opnd2
;
6761 if ((strcmp (idesc
->name
, "nop") == 0)
6762 || (strcmp (idesc
->name
, "break") == 0))
6763 insn_unit
= required_unit
;
6764 else if (strcmp (idesc
->name
, "hint") == 0)
6766 insn_unit
= required_unit
;
6767 if (required_unit
== IA64_UNIT_B
)
6773 case hint_b_warning
:
6774 as_warn ("hint in B unit may be treated as nop");
6777 /* When manual bundling is off and there is no
6778 user template, we choose a different unit so
6779 that hint won't go into the current slot. We
6780 will fill the current bundle with nops and
6781 try to put hint into the next bundle. */
6782 if (!manual_bundling
&& user_template
< 0)
6783 insn_unit
= IA64_UNIT_I
;
6785 as_bad ("hint in B unit can't be used");
6790 else if (strcmp (idesc
->name
, "chk.s") == 0
6791 || strcmp (idesc
->name
, "mov") == 0)
6793 insn_unit
= IA64_UNIT_M
;
6794 if (required_unit
== IA64_UNIT_I
6795 || (required_unit
== IA64_UNIT_F
&& template == 6))
6796 insn_unit
= IA64_UNIT_I
;
6799 as_fatal ("emit_one_bundle: unexpected dynamic op");
6801 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbfxx"[insn_unit
]);
6802 opnd1
= idesc
->operands
[0];
6803 opnd2
= idesc
->operands
[1];
6804 ia64_free_opcode (idesc
);
6805 idesc
= ia64_find_opcode (mnemonic
);
6806 /* moves to/from ARs have collisions */
6807 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6809 while (idesc
!= NULL
6810 && (idesc
->operands
[0] != opnd1
6811 || idesc
->operands
[1] != opnd2
))
6812 idesc
= get_next_opcode (idesc
);
6814 md
.slot
[curr
].idesc
= idesc
;
6818 insn_type
= idesc
->type
;
6819 insn_unit
= IA64_UNIT_NIL
;
6823 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6824 insn_unit
= required_unit
;
6826 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6827 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6828 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6829 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6830 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6835 if (insn_unit
!= required_unit
)
6836 continue; /* Try next slot. */
6838 if (debug_type
== DEBUG_DWARF2
|| md
.slot
[curr
].loc_directive_seen
)
6840 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6842 md
.slot
[curr
].loc_directive_seen
= 0;
6843 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6846 build_insn (md
.slot
+ curr
, insn
+ i
);
6848 ptr
= md
.slot
[curr
].unwind_record
;
6851 /* Set slot numbers for all remaining unwind records belonging to the
6852 current insn. There can not be any prologue/body unwind records
6854 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6856 ptr
->slot_number
= (unsigned long) f
+ i
;
6857 ptr
->slot_frag
= frag_now
;
6859 md
.slot
[curr
].unwind_record
= NULL
;
6862 if (required_unit
== IA64_UNIT_L
)
6865 /* skip one slot for long/X-unit instructions */
6868 --md
.num_slots_in_use
;
6871 /* now is a good time to fix up the labels for this insn: */
6872 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6874 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6875 symbol_set_frag (lfix
->sym
, frag_now
);
6877 /* and fix up the tags also. */
6878 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6880 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6881 symbol_set_frag (lfix
->sym
, frag_now
);
6884 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6886 ifix
= md
.slot
[curr
].fixup
+ j
;
6887 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6888 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6889 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6890 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6891 fix
->fx_file
= md
.slot
[curr
].src_file
;
6892 fix
->fx_line
= md
.slot
[curr
].src_line
;
6895 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6898 ia64_free_opcode (md
.slot
[curr
].idesc
);
6899 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6900 md
.slot
[curr
].user_template
= -1;
6902 if (manual_bundling_off
)
6904 manual_bundling
= 0;
6907 curr
= (curr
+ 1) % NUM_SLOTS
;
6908 idesc
= md
.slot
[curr
].idesc
;
6910 if (manual_bundling
> 0)
6912 if (md
.num_slots_in_use
> 0)
6915 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6916 "`%s' does not fit into bundle", idesc
->name
);
6917 else if (last_slot
< 0)
6919 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6920 "`%s' does not fit into %s template",
6921 idesc
->name
, ia64_templ_desc
[template].name
);
6922 /* Drop first insn so we don't livelock. */
6923 --md
.num_slots_in_use
;
6924 know (curr
== first
);
6925 ia64_free_opcode (md
.slot
[curr
].idesc
);
6926 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6927 md
.slot
[curr
].user_template
= -1;
6935 else if (last_slot
== 0)
6936 where
= "slots 2 or 3";
6939 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6940 "`%s' can't go in %s of %s template",
6941 idesc
->name
, where
, ia64_templ_desc
[template].name
);
6945 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6946 "Missing '}' at end of file");
6948 know (md
.num_slots_in_use
< NUM_SLOTS
);
6950 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6951 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6953 number_to_chars_littleendian (f
+ 0, t0
, 8);
6954 number_to_chars_littleendian (f
+ 8, t1
, 8);
6958 md_parse_option (c
, arg
)
6965 /* Switches from the Intel assembler. */
6967 if (strcmp (arg
, "ilp64") == 0
6968 || strcmp (arg
, "lp64") == 0
6969 || strcmp (arg
, "p64") == 0)
6971 md
.flags
|= EF_IA_64_ABI64
;
6973 else if (strcmp (arg
, "ilp32") == 0)
6975 md
.flags
&= ~EF_IA_64_ABI64
;
6977 else if (strcmp (arg
, "le") == 0)
6979 md
.flags
&= ~EF_IA_64_BE
;
6980 default_big_endian
= 0;
6982 else if (strcmp (arg
, "be") == 0)
6984 md
.flags
|= EF_IA_64_BE
;
6985 default_big_endian
= 1;
6987 else if (strncmp (arg
, "unwind-check=", 13) == 0)
6990 if (strcmp (arg
, "warning") == 0)
6991 md
.unwind_check
= unwind_check_warning
;
6992 else if (strcmp (arg
, "error") == 0)
6993 md
.unwind_check
= unwind_check_error
;
6997 else if (strncmp (arg
, "hint.b=", 7) == 0)
7000 if (strcmp (arg
, "ok") == 0)
7001 md
.hint_b
= hint_b_ok
;
7002 else if (strcmp (arg
, "warning") == 0)
7003 md
.hint_b
= hint_b_warning
;
7004 else if (strcmp (arg
, "error") == 0)
7005 md
.hint_b
= hint_b_error
;
7009 else if (strncmp (arg
, "tune=", 5) == 0)
7012 if (strcmp (arg
, "itanium1") == 0)
7014 else if (strcmp (arg
, "itanium2") == 0)
7024 if (strcmp (arg
, "so") == 0)
7026 /* Suppress signon message. */
7028 else if (strcmp (arg
, "pi") == 0)
7030 /* Reject privileged instructions. FIXME */
7032 else if (strcmp (arg
, "us") == 0)
7034 /* Allow union of signed and unsigned range. FIXME */
7036 else if (strcmp (arg
, "close_fcalls") == 0)
7038 /* Do not resolve global function calls. */
7045 /* temp[="prefix"] Insert temporary labels into the object file
7046 symbol table prefixed by "prefix".
7047 Default prefix is ":temp:".
7052 /* indirect=<tgt> Assume unannotated indirect branches behavior
7053 according to <tgt> --
7054 exit: branch out from the current context (default)
7055 labels: all labels in context may be branch targets
7057 if (strncmp (arg
, "indirect=", 9) != 0)
7062 /* -X conflicts with an ignored option, use -x instead */
7064 if (!arg
|| strcmp (arg
, "explicit") == 0)
7066 /* set default mode to explicit */
7067 md
.default_explicit_mode
= 1;
7070 else if (strcmp (arg
, "auto") == 0)
7072 md
.default_explicit_mode
= 0;
7074 else if (strcmp (arg
, "none") == 0)
7078 else if (strcmp (arg
, "debug") == 0)
7082 else if (strcmp (arg
, "debugx") == 0)
7084 md
.default_explicit_mode
= 1;
7087 else if (strcmp (arg
, "debugn") == 0)
7094 as_bad (_("Unrecognized option '-x%s'"), arg
);
7099 /* nops Print nops statistics. */
7102 /* GNU specific switches for gcc. */
7103 case OPTION_MCONSTANT_GP
:
7104 md
.flags
|= EF_IA_64_CONS_GP
;
7107 case OPTION_MAUTO_PIC
:
7108 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7119 md_show_usage (stream
)
7124 --mconstant-gp mark output file as using the constant-GP model\n\
7125 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7126 --mauto-pic mark output file as using the constant-GP model\n\
7127 without function descriptors (sets ELF header flag\n\
7128 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7129 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7130 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7131 -mtune=[itanium1|itanium2]\n\
7132 tune for a specific CPU (default -mtune=itanium2)\n\
7133 -munwind-check=[warning|error]\n\
7134 unwind directive check (default -munwind-check=warning)\n\
7135 -mhint.b=[ok|warning|error]\n\
7136 hint.b check (default -mhint.b=error)\n\
7137 -x | -xexplicit turn on dependency violation checking\n\
7138 -xauto automagically remove dependency violations (default)\n\
7139 -xnone turn off dependency violation checking\n\
7140 -xdebug debug dependency violation checker\n\
7141 -xdebugn debug dependency violation checker but turn off\n\
7142 dependency violation checking\n\
7143 -xdebugx debug dependency violation checker and turn on\n\
7144 dependency violation checking\n"),
7149 ia64_after_parse_args ()
7151 if (debug_type
== DEBUG_STABS
)
7152 as_fatal (_("--gstabs is not supported for ia64"));
7155 /* Return true if TYPE fits in TEMPL at SLOT. */
7158 match (int templ
, int type
, int slot
)
7160 enum ia64_unit unit
;
7163 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7166 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7168 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7170 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7171 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7172 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7173 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7174 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7175 default: result
= 0; break;
7180 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7181 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7182 type M or I would fit in TEMPL at SLOT. */
7185 extra_goodness (int templ
, int slot
)
7190 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7192 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7198 if (match (templ
, IA64_TYPE_M
, slot
)
7199 || match (templ
, IA64_TYPE_I
, slot
))
7200 /* Favor M- and I-unit NOPs. We definitely want to avoid
7201 F-unit and B-unit may cause split-issue or less-than-optimal
7202 branch-prediction. */
7213 /* This function is called once, at assembler startup time. It sets
7214 up all the tables, etc. that the MD part of the assembler will need
7215 that can be determined before arguments are parsed. */
7219 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
7224 md
.explicit_mode
= md
.default_explicit_mode
;
7226 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7228 /* Make sure function pointers get initialized. */
7229 target_big_endian
= -1;
7230 dot_byteorder (default_big_endian
);
7232 alias_hash
= hash_new ();
7233 alias_name_hash
= hash_new ();
7234 secalias_hash
= hash_new ();
7235 secalias_name_hash
= hash_new ();
7237 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7238 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7239 &zero_address_frag
);
7241 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7242 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7243 &zero_address_frag
);
7245 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7246 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7247 &zero_address_frag
);
7249 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7250 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7251 &zero_address_frag
);
7253 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7254 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7255 &zero_address_frag
);
7257 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7258 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7259 &zero_address_frag
);
7261 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7262 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7263 &zero_address_frag
);
7265 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7266 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7267 &zero_address_frag
);
7269 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7270 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7271 &zero_address_frag
);
7273 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7274 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7275 &zero_address_frag
);
7277 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7278 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7279 &zero_address_frag
);
7281 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7282 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7283 &zero_address_frag
);
7285 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7286 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7287 &zero_address_frag
);
7289 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7290 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7291 &zero_address_frag
);
7293 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7294 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7295 &zero_address_frag
);
7297 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7298 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7299 &zero_address_frag
);
7301 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7302 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7303 &zero_address_frag
);
7305 if (md
.tune
!= itanium1
)
7307 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7309 le_nop_stop
[0] = 0x9;
7312 /* Compute the table of best templates. We compute goodness as a
7313 base 4 value, in which each match counts for 3. Match-failures
7314 result in NOPs and we use extra_goodness() to pick the execution
7315 units that are best suited for issuing the NOP. */
7316 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7317 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7318 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7321 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7324 if (match (t
, i
, 0))
7326 if (match (t
, j
, 1))
7328 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7329 goodness
= 3 + 3 + 3;
7331 goodness
= 3 + 3 + extra_goodness (t
, 2);
7333 else if (match (t
, j
, 2))
7334 goodness
= 3 + 3 + extra_goodness (t
, 1);
7338 goodness
+= extra_goodness (t
, 1);
7339 goodness
+= extra_goodness (t
, 2);
7342 else if (match (t
, i
, 1))
7344 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7347 goodness
= 3 + extra_goodness (t
, 2);
7349 else if (match (t
, i
, 2))
7350 goodness
= 3 + extra_goodness (t
, 1);
7352 if (goodness
> best
)
7355 best_template
[i
][j
][k
] = t
;
7360 #ifdef DEBUG_TEMPLATES
7361 /* For debugging changes to the best_template calculations. We don't care
7362 about combinations with invalid instructions, so start the loops at 1. */
7363 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7364 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7365 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7367 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7369 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7371 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7375 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7376 md
.slot
[i
].user_template
= -1;
7378 md
.pseudo_hash
= hash_new ();
7379 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7381 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7382 (void *) (pseudo_opcode
+ i
));
7384 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7385 pseudo_opcode
[i
].name
, err
);
7388 md
.reg_hash
= hash_new ();
7389 md
.dynreg_hash
= hash_new ();
7390 md
.const_hash
= hash_new ();
7391 md
.entry_hash
= hash_new ();
7393 /* general registers: */
7396 for (i
= 0; i
< total
; ++i
)
7398 sprintf (name
, "r%d", i
- REG_GR
);
7399 md
.regsym
[i
] = declare_register (name
, i
);
7402 /* floating point registers: */
7404 for (; i
< total
; ++i
)
7406 sprintf (name
, "f%d", i
- REG_FR
);
7407 md
.regsym
[i
] = declare_register (name
, i
);
7410 /* application registers: */
7413 for (; i
< total
; ++i
)
7415 sprintf (name
, "ar%d", i
- REG_AR
);
7416 md
.regsym
[i
] = declare_register (name
, i
);
7419 /* control registers: */
7422 for (; i
< total
; ++i
)
7424 sprintf (name
, "cr%d", i
- REG_CR
);
7425 md
.regsym
[i
] = declare_register (name
, i
);
7428 /* predicate registers: */
7430 for (; i
< total
; ++i
)
7432 sprintf (name
, "p%d", i
- REG_P
);
7433 md
.regsym
[i
] = declare_register (name
, i
);
7436 /* branch registers: */
7438 for (; i
< total
; ++i
)
7440 sprintf (name
, "b%d", i
- REG_BR
);
7441 md
.regsym
[i
] = declare_register (name
, i
);
7444 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
7445 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
7446 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
7447 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
7448 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
7449 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
7450 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
7452 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7454 regnum
= indirect_reg
[i
].regnum
;
7455 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
7458 /* define synonyms for application registers: */
7459 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
7460 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
7461 REG_AR
+ ar
[i
- REG_AR
].regnum
);
7463 /* define synonyms for control registers: */
7464 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
7465 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
7466 REG_CR
+ cr
[i
- REG_CR
].regnum
);
7468 declare_register ("gp", REG_GR
+ 1);
7469 declare_register ("sp", REG_GR
+ 12);
7470 declare_register ("rp", REG_BR
+ 0);
7472 /* pseudo-registers used to specify unwind info: */
7473 declare_register ("psp", REG_PSP
);
7475 declare_register_set ("ret", 4, REG_GR
+ 8);
7476 declare_register_set ("farg", 8, REG_FR
+ 8);
7477 declare_register_set ("fret", 8, REG_FR
+ 8);
7479 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7481 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7482 (PTR
) (const_bits
+ i
));
7484 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7488 /* Set the architecture and machine depending on defaults and command line
7490 if (md
.flags
& EF_IA_64_ABI64
)
7491 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7493 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7496 as_warn (_("Could not set architecture and machine"));
7498 /* Set the pointer size and pointer shift size depending on md.flags */
7500 if (md
.flags
& EF_IA_64_ABI64
)
7502 md
.pointer_size
= 8; /* pointers are 8 bytes */
7503 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7507 md
.pointer_size
= 4; /* pointers are 4 bytes */
7508 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7511 md
.mem_offset
.hint
= 0;
7514 md
.entry_labels
= NULL
;
7517 /* Set the default options in md. Cannot do this in md_begin because
7518 that is called after md_parse_option which is where we set the
7519 options in md based on command line options. */
7522 ia64_init (argc
, argv
)
7523 int argc ATTRIBUTE_UNUSED
;
7524 char **argv ATTRIBUTE_UNUSED
;
7526 md
.flags
= MD_FLAGS_DEFAULT
;
7528 /* FIXME: We should change it to unwind_check_error someday. */
7529 md
.unwind_check
= unwind_check_warning
;
7530 md
.hint_b
= hint_b_error
;
7534 /* Return a string for the target object file format. */
7537 ia64_target_format ()
7539 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7541 if (md
.flags
& EF_IA_64_BE
)
7543 if (md
.flags
& EF_IA_64_ABI64
)
7544 #if defined(TE_AIX50)
7545 return "elf64-ia64-aix-big";
7546 #elif defined(TE_HPUX)
7547 return "elf64-ia64-hpux-big";
7549 return "elf64-ia64-big";
7552 #if defined(TE_AIX50)
7553 return "elf32-ia64-aix-big";
7554 #elif defined(TE_HPUX)
7555 return "elf32-ia64-hpux-big";
7557 return "elf32-ia64-big";
7562 if (md
.flags
& EF_IA_64_ABI64
)
7564 return "elf64-ia64-aix-little";
7566 return "elf64-ia64-little";
7570 return "elf32-ia64-aix-little";
7572 return "elf32-ia64-little";
7577 return "unknown-format";
7581 ia64_end_of_source ()
7583 /* terminate insn group upon reaching end of file: */
7584 insn_group_break (1, 0, 0);
7586 /* emits slots we haven't written yet: */
7587 ia64_flush_insns ();
7589 bfd_set_private_flags (stdoutput
, md
.flags
);
7591 md
.mem_offset
.hint
= 0;
7597 if (md
.qp
.X_op
== O_register
)
7598 as_bad ("qualifying predicate not followed by instruction");
7599 md
.qp
.X_op
= O_absent
;
7601 if (ignore_input ())
7604 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7606 if (md
.detect_dv
&& !md
.explicit_mode
)
7613 as_warn (_("Explicit stops are ignored in auto mode"));
7617 insn_group_break (1, 0, 0);
7621 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7623 static int defining_tag
= 0;
7626 ia64_unrecognized_line (ch
)
7632 expression (&md
.qp
);
7633 if (*input_line_pointer
++ != ')')
7635 as_bad ("Expected ')'");
7638 if (md
.qp
.X_op
!= O_register
)
7640 as_bad ("Qualifying predicate expected");
7643 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7645 as_bad ("Predicate register expected");
7651 if (md
.manual_bundling
)
7652 as_warn ("Found '{' when manual bundling is already turned on");
7654 CURR_SLOT
.manual_bundling_on
= 1;
7655 md
.manual_bundling
= 1;
7657 /* Bundling is only acceptable in explicit mode
7658 or when in default automatic mode. */
7659 if (md
.detect_dv
&& !md
.explicit_mode
)
7661 if (!md
.mode_explicitly_set
7662 && !md
.default_explicit_mode
)
7665 as_warn (_("Found '{' after explicit switch to automatic mode"));
7670 if (!md
.manual_bundling
)
7671 as_warn ("Found '}' when manual bundling is off");
7673 PREV_SLOT
.manual_bundling_off
= 1;
7674 md
.manual_bundling
= 0;
7676 /* switch back to automatic mode, if applicable */
7679 && !md
.mode_explicitly_set
7680 && !md
.default_explicit_mode
)
7683 /* Allow '{' to follow on the same line. We also allow ";;", but that
7684 happens automatically because ';' is an end of line marker. */
7686 if (input_line_pointer
[0] == '{')
7688 input_line_pointer
++;
7689 return ia64_unrecognized_line ('{');
7692 demand_empty_rest_of_line ();
7702 if (md
.qp
.X_op
== O_register
)
7704 as_bad ("Tag must come before qualifying predicate.");
7708 /* This implements just enough of read_a_source_file in read.c to
7709 recognize labels. */
7710 if (is_name_beginner (*input_line_pointer
))
7712 s
= input_line_pointer
;
7713 c
= get_symbol_end ();
7715 else if (LOCAL_LABELS_FB
7716 && ISDIGIT (*input_line_pointer
))
7719 while (ISDIGIT (*input_line_pointer
))
7720 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7721 fb_label_instance_inc (temp
);
7722 s
= fb_label_name (temp
, 0);
7723 c
= *input_line_pointer
;
7732 /* Put ':' back for error messages' sake. */
7733 *input_line_pointer
++ = ':';
7734 as_bad ("Expected ':'");
7741 /* Put ':' back for error messages' sake. */
7742 *input_line_pointer
++ = ':';
7743 if (*input_line_pointer
++ != ']')
7745 as_bad ("Expected ']'");
7750 as_bad ("Tag name expected");
7760 /* Not a valid line. */
7765 ia64_frob_label (sym
)
7768 struct label_fix
*fix
;
7770 /* Tags need special handling since they are not bundle breaks like
7774 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7776 fix
->next
= CURR_SLOT
.tag_fixups
;
7777 CURR_SLOT
.tag_fixups
= fix
;
7782 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7784 md
.last_text_seg
= now_seg
;
7785 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7787 fix
->next
= CURR_SLOT
.label_fixups
;
7788 CURR_SLOT
.label_fixups
= fix
;
7790 /* Keep track of how many code entry points we've seen. */
7791 if (md
.path
== md
.maxpaths
)
7794 md
.entry_labels
= (const char **)
7795 xrealloc ((void *) md
.entry_labels
,
7796 md
.maxpaths
* sizeof (char *));
7798 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7803 /* The HP-UX linker will give unresolved symbol errors for symbols
7804 that are declared but unused. This routine removes declared,
7805 unused symbols from an object. */
7807 ia64_frob_symbol (sym
)
7810 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7811 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7812 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7813 && ! S_IS_EXTERNAL (sym
)))
7820 ia64_flush_pending_output ()
7822 if (!md
.keep_pending_output
7823 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7825 /* ??? This causes many unnecessary stop bits to be emitted.
7826 Unfortunately, it isn't clear if it is safe to remove this. */
7827 insn_group_break (1, 0, 0);
7828 ia64_flush_insns ();
7832 /* Do ia64-specific expression optimization. All that's done here is
7833 to transform index expressions that are either due to the indexing
7834 of rotating registers or due to the indexing of indirect register
7837 ia64_optimize_expr (l
, op
, r
)
7846 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
7848 num_regs
= (l
->X_add_number
>> 16);
7849 if ((unsigned) r
->X_add_number
>= num_regs
)
7852 as_bad ("No current frame");
7854 as_bad ("Index out of range 0..%u", num_regs
- 1);
7855 r
->X_add_number
= 0;
7857 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7860 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
7862 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
7863 || l
->X_add_number
== IND_MEM
)
7865 as_bad ("Indirect register set name expected");
7866 l
->X_add_number
= IND_CPUID
;
7869 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
7870 l
->X_add_number
= r
->X_add_number
;
7878 ia64_parse_name (name
, e
, nextcharP
)
7883 struct const_desc
*cdesc
;
7884 struct dynreg
*dr
= 0;
7891 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7893 /* Find what relocation pseudo-function we're dealing with. */
7894 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7895 if (pseudo_func
[idx
].name
7896 && pseudo_func
[idx
].name
[0] == name
[1]
7897 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7899 pseudo_type
= pseudo_func
[idx
].type
;
7902 switch (pseudo_type
)
7904 case PSEUDO_FUNC_RELOC
:
7905 end
= input_line_pointer
;
7906 if (*nextcharP
!= '(')
7908 as_bad ("Expected '('");
7912 ++input_line_pointer
;
7914 if (*input_line_pointer
!= ')')
7916 as_bad ("Missing ')'");
7920 ++input_line_pointer
;
7921 if (e
->X_op
!= O_symbol
)
7923 if (e
->X_op
!= O_pseudo_fixup
)
7925 as_bad ("Not a symbolic expression");
7928 if (idx
!= FUNC_LT_RELATIVE
)
7930 as_bad ("Illegal combination of relocation functions");
7933 switch (S_GET_VALUE (e
->X_op_symbol
))
7935 case FUNC_FPTR_RELATIVE
:
7936 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7937 case FUNC_DTP_MODULE
:
7938 idx
= FUNC_LT_DTP_MODULE
; break;
7939 case FUNC_DTP_RELATIVE
:
7940 idx
= FUNC_LT_DTP_RELATIVE
; break;
7941 case FUNC_TP_RELATIVE
:
7942 idx
= FUNC_LT_TP_RELATIVE
; break;
7944 as_bad ("Illegal combination of relocation functions");
7948 /* Make sure gas doesn't get rid of local symbols that are used
7950 e
->X_op
= O_pseudo_fixup
;
7951 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7953 *nextcharP
= *input_line_pointer
;
7956 case PSEUDO_FUNC_CONST
:
7957 e
->X_op
= O_constant
;
7958 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7961 case PSEUDO_FUNC_REG
:
7962 e
->X_op
= O_register
;
7963 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7972 /* first see if NAME is a known register name: */
7973 sym
= hash_find (md
.reg_hash
, name
);
7976 e
->X_op
= O_register
;
7977 e
->X_add_number
= S_GET_VALUE (sym
);
7981 cdesc
= hash_find (md
.const_hash
, name
);
7984 e
->X_op
= O_constant
;
7985 e
->X_add_number
= cdesc
->value
;
7989 /* check for inN, locN, or outN: */
7994 if (name
[1] == 'n' && ISDIGIT (name
[2]))
8002 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
8010 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
8021 /* Ignore register numbers with leading zeroes, except zero itself. */
8022 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
8024 unsigned long regnum
;
8026 /* The name is inN, locN, or outN; parse the register number. */
8027 regnum
= strtoul (name
+ idx
, &end
, 10);
8028 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
8030 if (regnum
>= dr
->num_regs
)
8033 as_bad ("No current frame");
8035 as_bad ("Register number out of range 0..%u",
8039 e
->X_op
= O_register
;
8040 e
->X_add_number
= dr
->base
+ regnum
;
8045 end
= alloca (strlen (name
) + 1);
8047 name
= ia64_canonicalize_symbol_name (end
);
8048 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8050 /* We've got ourselves the name of a rotating register set.
8051 Store the base register number in the low 16 bits of
8052 X_add_number and the size of the register set in the top 16
8054 e
->X_op
= O_register
;
8055 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8061 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8064 ia64_canonicalize_symbol_name (name
)
8067 size_t len
= strlen (name
), full
= len
;
8069 while (len
> 0 && name
[len
- 1] == '#')
8074 as_bad ("Standalone `#' is illegal");
8076 else if (len
< full
- 1)
8077 as_warn ("Redundant `#' suffix operators");
8082 /* Return true if idesc is a conditional branch instruction. This excludes
8083 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8084 because they always read/write resources regardless of the value of the
8085 qualifying predicate. br.ia must always use p0, and hence is always
8086 taken. Thus this function returns true for branches which can fall
8087 through, and which use no resources if they do fall through. */
8090 is_conditional_branch (idesc
)
8091 struct ia64_opcode
*idesc
;
8093 /* br is a conditional branch. Everything that starts with br. except
8094 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8095 Everything that starts with brl is a conditional branch. */
8096 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8097 && (idesc
->name
[2] == '\0'
8098 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8099 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8100 || idesc
->name
[2] == 'l'
8101 /* br.cond, br.call, br.clr */
8102 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8103 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8104 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8107 /* Return whether the given opcode is a taken branch. If there's any doubt,
8111 is_taken_branch (idesc
)
8112 struct ia64_opcode
*idesc
;
8114 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8115 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8118 /* Return whether the given opcode is an interruption or rfi. If there's any
8119 doubt, returns zero. */
8122 is_interruption_or_rfi (idesc
)
8123 struct ia64_opcode
*idesc
;
8125 if (strcmp (idesc
->name
, "rfi") == 0)
8130 /* Returns the index of the given dependency in the opcode's list of chks, or
8131 -1 if there is no dependency. */
8134 depends_on (depind
, idesc
)
8136 struct ia64_opcode
*idesc
;
8139 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8140 for (i
= 0; i
< dep
->nchks
; i
++)
8142 if (depind
== DEP (dep
->chks
[i
]))
8148 /* Determine a set of specific resources used for a particular resource
8149 class. Returns the number of specific resources identified For those
8150 cases which are not determinable statically, the resource returned is
8153 Meanings of value in 'NOTE':
8154 1) only read/write when the register number is explicitly encoded in the
8156 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8157 accesses CFM when qualifying predicate is in the rotating region.
8158 3) general register value is used to specify an indirect register; not
8159 determinable statically.
8160 4) only read the given resource when bits 7:0 of the indirect index
8161 register value does not match the register number of the resource; not
8162 determinable statically.
8163 5) all rules are implementation specific.
8164 6) only when both the index specified by the reader and the index specified
8165 by the writer have the same value in bits 63:61; not determinable
8167 7) only access the specified resource when the corresponding mask bit is
8169 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8170 only read when these insns reference FR2-31
8171 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8172 written when these insns write FR32-127
8173 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8175 11) The target predicates are written independently of PR[qp], but source
8176 registers are only read if PR[qp] is true. Since the state of PR[qp]
8177 cannot statically be determined, all source registers are marked used.
8178 12) This insn only reads the specified predicate register when that
8179 register is the PR[qp].
8180 13) This reference to ld-c only applies to teh GR whose value is loaded
8181 with data returned from memory, not the post-incremented address register.
8182 14) The RSE resource includes the implementation-specific RSE internal
8183 state resources. At least one (and possibly more) of these resources are
8184 read by each instruction listed in IC:rse-readers. At least one (and
8185 possibly more) of these resources are written by each insn listed in
8187 15+16) Represents reserved instructions, which the assembler does not
8190 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8191 this code; there are no dependency violations based on memory access.
8194 #define MAX_SPECS 256
8199 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
8200 const struct ia64_dependency
*dep
;
8201 struct ia64_opcode
*idesc
;
8202 int type
; /* is this a DV chk or a DV reg? */
8203 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
8204 int note
; /* resource note for this insn's usage */
8205 int path
; /* which execution path to examine */
8212 if (dep
->mode
== IA64_DV_WAW
8213 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8214 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8217 /* template for any resources we identify */
8218 tmpl
.dependency
= dep
;
8220 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8221 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8222 tmpl
.link_to_qp_branch
= 1;
8223 tmpl
.mem_offset
.hint
= 0;
8224 tmpl
.mem_offset
.offset
= 0;
8225 tmpl
.mem_offset
.base
= 0;
8228 tmpl
.cmp_type
= CMP_NONE
;
8235 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8236 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8237 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8239 /* we don't need to track these */
8240 if (dep
->semantics
== IA64_DVS_NONE
)
8243 switch (dep
->specifier
)
8248 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8250 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8251 if (regno
>= 0 && regno
<= 7)
8253 specs
[count
] = tmpl
;
8254 specs
[count
++].index
= regno
;
8260 for (i
= 0; i
< 8; i
++)
8262 specs
[count
] = tmpl
;
8263 specs
[count
++].index
= i
;
8272 case IA64_RS_AR_UNAT
:
8273 /* This is a mov =AR or mov AR= instruction. */
8274 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8276 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8277 if (regno
== AR_UNAT
)
8279 specs
[count
++] = tmpl
;
8284 /* This is a spill/fill, or other instruction that modifies the
8287 /* Unless we can determine the specific bits used, mark the whole
8288 thing; bits 8:3 of the memory address indicate the bit used in
8289 UNAT. The .mem.offset hint may be used to eliminate a small
8290 subset of conflicts. */
8291 specs
[count
] = tmpl
;
8292 if (md
.mem_offset
.hint
)
8295 fprintf (stderr
, " Using hint for spill/fill\n");
8296 /* The index isn't actually used, just set it to something
8297 approximating the bit index. */
8298 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8299 specs
[count
].mem_offset
.hint
= 1;
8300 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8301 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8305 specs
[count
++].specific
= 0;
8313 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8315 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8316 if ((regno
>= 8 && regno
<= 15)
8317 || (regno
>= 20 && regno
<= 23)
8318 || (regno
>= 31 && regno
<= 39)
8319 || (regno
>= 41 && regno
<= 47)
8320 || (regno
>= 67 && regno
<= 111))
8322 specs
[count
] = tmpl
;
8323 specs
[count
++].index
= regno
;
8336 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8338 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8339 if ((regno
>= 48 && regno
<= 63)
8340 || (regno
>= 112 && regno
<= 127))
8342 specs
[count
] = tmpl
;
8343 specs
[count
++].index
= regno
;
8349 for (i
= 48; i
< 64; i
++)
8351 specs
[count
] = tmpl
;
8352 specs
[count
++].index
= i
;
8354 for (i
= 112; i
< 128; i
++)
8356 specs
[count
] = tmpl
;
8357 specs
[count
++].index
= i
;
8375 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8376 if (idesc
->operands
[i
] == IA64_OPND_B1
8377 || idesc
->operands
[i
] == IA64_OPND_B2
)
8379 specs
[count
] = tmpl
;
8380 specs
[count
++].index
=
8381 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8386 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8387 if (idesc
->operands
[i
] == IA64_OPND_B1
8388 || idesc
->operands
[i
] == IA64_OPND_B2
)
8390 specs
[count
] = tmpl
;
8391 specs
[count
++].index
=
8392 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8398 case IA64_RS_CPUID
: /* four or more registers */
8401 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8403 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8404 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8407 specs
[count
] = tmpl
;
8408 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8412 specs
[count
] = tmpl
;
8413 specs
[count
++].specific
= 0;
8423 case IA64_RS_DBR
: /* four or more registers */
8426 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8428 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8429 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8432 specs
[count
] = tmpl
;
8433 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8437 specs
[count
] = tmpl
;
8438 specs
[count
++].specific
= 0;
8442 else if (note
== 0 && !rsrc_write
)
8444 specs
[count
] = tmpl
;
8445 specs
[count
++].specific
= 0;
8453 case IA64_RS_IBR
: /* four or more registers */
8456 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8458 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8459 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8462 specs
[count
] = tmpl
;
8463 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8467 specs
[count
] = tmpl
;
8468 specs
[count
++].specific
= 0;
8481 /* These are implementation specific. Force all references to
8482 conflict with all other references. */
8483 specs
[count
] = tmpl
;
8484 specs
[count
++].specific
= 0;
8492 case IA64_RS_PKR
: /* 16 or more registers */
8493 if (note
== 3 || note
== 4)
8495 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8497 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8498 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8503 specs
[count
] = tmpl
;
8504 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8507 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8509 /* Uses all registers *except* the one in R3. */
8510 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8512 specs
[count
] = tmpl
;
8513 specs
[count
++].index
= i
;
8519 specs
[count
] = tmpl
;
8520 specs
[count
++].specific
= 0;
8527 specs
[count
] = tmpl
;
8528 specs
[count
++].specific
= 0;
8532 case IA64_RS_PMC
: /* four or more registers */
8535 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8536 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8539 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8541 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
8542 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8545 specs
[count
] = tmpl
;
8546 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8550 specs
[count
] = tmpl
;
8551 specs
[count
++].specific
= 0;
8561 case IA64_RS_PMD
: /* four or more registers */
8564 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8566 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8567 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8570 specs
[count
] = tmpl
;
8571 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8575 specs
[count
] = tmpl
;
8576 specs
[count
++].specific
= 0;
8586 case IA64_RS_RR
: /* eight registers */
8589 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8591 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8592 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8595 specs
[count
] = tmpl
;
8596 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8600 specs
[count
] = tmpl
;
8601 specs
[count
++].specific
= 0;
8605 else if (note
== 0 && !rsrc_write
)
8607 specs
[count
] = tmpl
;
8608 specs
[count
++].specific
= 0;
8616 case IA64_RS_CR_IRR
:
8619 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8620 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8622 && idesc
->operands
[1] == IA64_OPND_CR3
8625 for (i
= 0; i
< 4; i
++)
8627 specs
[count
] = tmpl
;
8628 specs
[count
++].index
= CR_IRR0
+ i
;
8634 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8635 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8637 && regno
<= CR_IRR3
)
8639 specs
[count
] = tmpl
;
8640 specs
[count
++].index
= regno
;
8649 case IA64_RS_CR_LRR
:
8656 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8657 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8658 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8660 specs
[count
] = tmpl
;
8661 specs
[count
++].index
= regno
;
8669 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8671 specs
[count
] = tmpl
;
8672 specs
[count
++].index
=
8673 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8688 else if (rsrc_write
)
8690 if (dep
->specifier
== IA64_RS_FRb
8691 && idesc
->operands
[0] == IA64_OPND_F1
)
8693 specs
[count
] = tmpl
;
8694 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8699 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8701 if (idesc
->operands
[i
] == IA64_OPND_F2
8702 || idesc
->operands
[i
] == IA64_OPND_F3
8703 || idesc
->operands
[i
] == IA64_OPND_F4
)
8705 specs
[count
] = tmpl
;
8706 specs
[count
++].index
=
8707 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8716 /* This reference applies only to the GR whose value is loaded with
8717 data returned from memory. */
8718 specs
[count
] = tmpl
;
8719 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8725 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8726 if (idesc
->operands
[i
] == IA64_OPND_R1
8727 || idesc
->operands
[i
] == IA64_OPND_R2
8728 || idesc
->operands
[i
] == IA64_OPND_R3
)
8730 specs
[count
] = tmpl
;
8731 specs
[count
++].index
=
8732 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8734 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8735 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8736 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8738 specs
[count
] = tmpl
;
8739 specs
[count
++].index
=
8740 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8745 /* Look for anything that reads a GR. */
8746 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8748 if (idesc
->operands
[i
] == IA64_OPND_MR3
8749 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8750 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8751 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8752 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8753 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8754 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8755 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8756 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8757 || ((i
>= idesc
->num_outputs
)
8758 && (idesc
->operands
[i
] == IA64_OPND_R1
8759 || idesc
->operands
[i
] == IA64_OPND_R2
8760 || idesc
->operands
[i
] == IA64_OPND_R3
8761 /* addl source register. */
8762 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8764 specs
[count
] = tmpl
;
8765 specs
[count
++].index
=
8766 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8777 /* This is the same as IA64_RS_PRr, except that the register range is
8778 from 1 - 15, and there are no rotating register reads/writes here. */
8782 for (i
= 1; i
< 16; i
++)
8784 specs
[count
] = tmpl
;
8785 specs
[count
++].index
= i
;
8791 /* Mark only those registers indicated by the mask. */
8794 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8795 for (i
= 1; i
< 16; i
++)
8796 if (mask
& ((valueT
) 1 << i
))
8798 specs
[count
] = tmpl
;
8799 specs
[count
++].index
= i
;
8807 else if (note
== 11) /* note 11 implies note 1 as well */
8811 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8813 if (idesc
->operands
[i
] == IA64_OPND_P1
8814 || idesc
->operands
[i
] == IA64_OPND_P2
)
8816 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8817 if (regno
>= 1 && regno
< 16)
8819 specs
[count
] = tmpl
;
8820 specs
[count
++].index
= regno
;
8830 else if (note
== 12)
8832 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8834 specs
[count
] = tmpl
;
8835 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8842 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8843 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8844 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8845 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8847 if ((idesc
->operands
[0] == IA64_OPND_P1
8848 || idesc
->operands
[0] == IA64_OPND_P2
)
8849 && p1
>= 1 && p1
< 16)
8851 specs
[count
] = tmpl
;
8852 specs
[count
].cmp_type
=
8853 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8854 specs
[count
++].index
= p1
;
8856 if ((idesc
->operands
[1] == IA64_OPND_P1
8857 || idesc
->operands
[1] == IA64_OPND_P2
)
8858 && p2
>= 1 && p2
< 16)
8860 specs
[count
] = tmpl
;
8861 specs
[count
].cmp_type
=
8862 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8863 specs
[count
++].index
= p2
;
8868 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8870 specs
[count
] = tmpl
;
8871 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8873 if (idesc
->operands
[1] == IA64_OPND_PR
)
8875 for (i
= 1; i
< 16; i
++)
8877 specs
[count
] = tmpl
;
8878 specs
[count
++].index
= i
;
8889 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8890 simplified cases of this. */
8894 for (i
= 16; i
< 63; i
++)
8896 specs
[count
] = tmpl
;
8897 specs
[count
++].index
= i
;
8903 /* Mark only those registers indicated by the mask. */
8905 && idesc
->operands
[0] == IA64_OPND_PR
)
8907 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8908 if (mask
& ((valueT
) 1 << 16))
8909 for (i
= 16; i
< 63; i
++)
8911 specs
[count
] = tmpl
;
8912 specs
[count
++].index
= i
;
8916 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8918 for (i
= 16; i
< 63; i
++)
8920 specs
[count
] = tmpl
;
8921 specs
[count
++].index
= i
;
8929 else if (note
== 11) /* note 11 implies note 1 as well */
8933 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8935 if (idesc
->operands
[i
] == IA64_OPND_P1
8936 || idesc
->operands
[i
] == IA64_OPND_P2
)
8938 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8939 if (regno
>= 16 && regno
< 63)
8941 specs
[count
] = tmpl
;
8942 specs
[count
++].index
= regno
;
8952 else if (note
== 12)
8954 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8956 specs
[count
] = tmpl
;
8957 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8964 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8965 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8966 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8967 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8969 if ((idesc
->operands
[0] == IA64_OPND_P1
8970 || idesc
->operands
[0] == IA64_OPND_P2
)
8971 && p1
>= 16 && p1
< 63)
8973 specs
[count
] = tmpl
;
8974 specs
[count
].cmp_type
=
8975 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8976 specs
[count
++].index
= p1
;
8978 if ((idesc
->operands
[1] == IA64_OPND_P1
8979 || idesc
->operands
[1] == IA64_OPND_P2
)
8980 && p2
>= 16 && p2
< 63)
8982 specs
[count
] = tmpl
;
8983 specs
[count
].cmp_type
=
8984 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8985 specs
[count
++].index
= p2
;
8990 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8992 specs
[count
] = tmpl
;
8993 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8995 if (idesc
->operands
[1] == IA64_OPND_PR
)
8997 for (i
= 16; i
< 63; i
++)
8999 specs
[count
] = tmpl
;
9000 specs
[count
++].index
= i
;
9012 /* Verify that the instruction is using the PSR bit indicated in
9016 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
9018 if (dep
->regindex
< 6)
9020 specs
[count
++] = tmpl
;
9023 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
9025 if (dep
->regindex
< 32
9026 || dep
->regindex
== 35
9027 || dep
->regindex
== 36
9028 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
9030 specs
[count
++] = tmpl
;
9033 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
9035 if (dep
->regindex
< 32
9036 || dep
->regindex
== 35
9037 || dep
->regindex
== 36
9038 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
9040 specs
[count
++] = tmpl
;
9045 /* Several PSR bits have very specific dependencies. */
9046 switch (dep
->regindex
)
9049 specs
[count
++] = tmpl
;
9054 specs
[count
++] = tmpl
;
9058 /* Only certain CR accesses use PSR.ic */
9059 if (idesc
->operands
[0] == IA64_OPND_CR3
9060 || idesc
->operands
[1] == IA64_OPND_CR3
)
9063 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9066 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
9081 specs
[count
++] = tmpl
;
9090 specs
[count
++] = tmpl
;
9094 /* Only some AR accesses use cpl */
9095 if (idesc
->operands
[0] == IA64_OPND_AR3
9096 || idesc
->operands
[1] == IA64_OPND_AR3
)
9099 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9102 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
9109 && regno
<= AR_K7
))))
9111 specs
[count
++] = tmpl
;
9116 specs
[count
++] = tmpl
;
9126 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9128 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9134 if (mask
& ((valueT
) 1 << dep
->regindex
))
9136 specs
[count
++] = tmpl
;
9141 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9142 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9143 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9144 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9146 if (idesc
->operands
[i
] == IA64_OPND_F1
9147 || idesc
->operands
[i
] == IA64_OPND_F2
9148 || idesc
->operands
[i
] == IA64_OPND_F3
9149 || idesc
->operands
[i
] == IA64_OPND_F4
)
9151 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9152 if (reg
>= min
&& reg
<= max
)
9154 specs
[count
++] = tmpl
;
9161 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9162 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9163 /* mfh is read on writes to FR32-127; mfl is read on writes to
9165 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9167 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9169 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9170 if (reg
>= min
&& reg
<= max
)
9172 specs
[count
++] = tmpl
;
9177 else if (note
== 10)
9179 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9181 if (idesc
->operands
[i
] == IA64_OPND_R1
9182 || idesc
->operands
[i
] == IA64_OPND_R2
9183 || idesc
->operands
[i
] == IA64_OPND_R3
)
9185 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9186 if (regno
>= 16 && regno
<= 31)
9188 specs
[count
++] = tmpl
;
9199 case IA64_RS_AR_FPSR
:
9200 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9202 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9203 if (regno
== AR_FPSR
)
9205 specs
[count
++] = tmpl
;
9210 specs
[count
++] = tmpl
;
9215 /* Handle all AR[REG] resources */
9216 if (note
== 0 || note
== 1)
9218 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9219 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9220 && regno
== dep
->regindex
)
9222 specs
[count
++] = tmpl
;
9224 /* other AR[REG] resources may be affected by AR accesses */
9225 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9228 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9229 switch (dep
->regindex
)
9235 if (regno
== AR_BSPSTORE
)
9237 specs
[count
++] = tmpl
;
9241 (regno
== AR_BSPSTORE
9242 || regno
== AR_RNAT
))
9244 specs
[count
++] = tmpl
;
9249 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9252 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9253 switch (dep
->regindex
)
9258 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9260 specs
[count
++] = tmpl
;
9267 specs
[count
++] = tmpl
;
9277 /* Handle all CR[REG] resources */
9278 if (note
== 0 || note
== 1)
9280 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9282 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9283 if (regno
== dep
->regindex
)
9285 specs
[count
++] = tmpl
;
9287 else if (!rsrc_write
)
9289 /* Reads from CR[IVR] affect other resources. */
9290 if (regno
== CR_IVR
)
9292 if ((dep
->regindex
>= CR_IRR0
9293 && dep
->regindex
<= CR_IRR3
)
9294 || dep
->regindex
== CR_TPR
)
9296 specs
[count
++] = tmpl
;
9303 specs
[count
++] = tmpl
;
9312 case IA64_RS_INSERVICE
:
9313 /* look for write of EOI (67) or read of IVR (65) */
9314 if ((idesc
->operands
[0] == IA64_OPND_CR3
9315 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9316 || (idesc
->operands
[1] == IA64_OPND_CR3
9317 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9319 specs
[count
++] = tmpl
;
9326 specs
[count
++] = tmpl
;
9337 specs
[count
++] = tmpl
;
9341 /* Check if any of the registers accessed are in the rotating region.
9342 mov to/from pr accesses CFM only when qp_regno is in the rotating
9344 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9346 if (idesc
->operands
[i
] == IA64_OPND_R1
9347 || idesc
->operands
[i
] == IA64_OPND_R2
9348 || idesc
->operands
[i
] == IA64_OPND_R3
)
9350 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9351 /* Assumes that md.rot.num_regs is always valid */
9352 if (md
.rot
.num_regs
> 0
9354 && num
< 31 + md
.rot
.num_regs
)
9356 specs
[count
] = tmpl
;
9357 specs
[count
++].specific
= 0;
9360 else if (idesc
->operands
[i
] == IA64_OPND_F1
9361 || idesc
->operands
[i
] == IA64_OPND_F2
9362 || idesc
->operands
[i
] == IA64_OPND_F3
9363 || idesc
->operands
[i
] == IA64_OPND_F4
)
9365 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9368 specs
[count
] = tmpl
;
9369 specs
[count
++].specific
= 0;
9372 else if (idesc
->operands
[i
] == IA64_OPND_P1
9373 || idesc
->operands
[i
] == IA64_OPND_P2
)
9375 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9378 specs
[count
] = tmpl
;
9379 specs
[count
++].specific
= 0;
9383 if (CURR_SLOT
.qp_regno
> 15)
9385 specs
[count
] = tmpl
;
9386 specs
[count
++].specific
= 0;
9391 /* This is the same as IA64_RS_PRr, except simplified to account for
9392 the fact that there is only one register. */
9396 specs
[count
++] = tmpl
;
9401 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9402 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9403 if (mask
& ((valueT
) 1 << 63))
9404 specs
[count
++] = tmpl
;
9406 else if (note
== 11)
9408 if ((idesc
->operands
[0] == IA64_OPND_P1
9409 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9410 || (idesc
->operands
[1] == IA64_OPND_P2
9411 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9413 specs
[count
++] = tmpl
;
9416 else if (note
== 12)
9418 if (CURR_SLOT
.qp_regno
== 63)
9420 specs
[count
++] = tmpl
;
9427 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9428 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9429 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9430 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9433 && (idesc
->operands
[0] == IA64_OPND_P1
9434 || idesc
->operands
[0] == IA64_OPND_P2
))
9436 specs
[count
] = tmpl
;
9437 specs
[count
++].cmp_type
=
9438 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9441 && (idesc
->operands
[1] == IA64_OPND_P1
9442 || idesc
->operands
[1] == IA64_OPND_P2
))
9444 specs
[count
] = tmpl
;
9445 specs
[count
++].cmp_type
=
9446 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9451 if (CURR_SLOT
.qp_regno
== 63)
9453 specs
[count
++] = tmpl
;
9464 /* FIXME we can identify some individual RSE written resources, but RSE
9465 read resources have not yet been completely identified, so for now
9466 treat RSE as a single resource */
9467 if (strncmp (idesc
->name
, "mov", 3) == 0)
9471 if (idesc
->operands
[0] == IA64_OPND_AR3
9472 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9474 specs
[count
++] = tmpl
;
9479 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9481 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9482 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9484 specs
[count
++] = tmpl
;
9487 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9489 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9490 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9491 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9493 specs
[count
++] = tmpl
;
9500 specs
[count
++] = tmpl
;
9505 /* FIXME -- do any of these need to be non-specific? */
9506 specs
[count
++] = tmpl
;
9510 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9517 /* Clear branch flags on marked resources. This breaks the link between the
9518 QP of the marking instruction and a subsequent branch on the same QP. */
9521 clear_qp_branch_flag (mask
)
9525 for (i
= 0; i
< regdepslen
; i
++)
9527 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9528 if ((bit
& mask
) != 0)
9530 regdeps
[i
].link_to_qp_branch
= 0;
9535 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9536 any mutexes which contain one of the PRs and create new ones when
9540 update_qp_mutex (valueT mask
)
9546 while (i
< qp_mutexeslen
)
9548 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9550 /* If it destroys and creates the same mutex, do nothing. */
9551 if (qp_mutexes
[i
].prmask
== mask
9552 && qp_mutexes
[i
].path
== md
.path
)
9563 fprintf (stderr
, " Clearing mutex relation");
9564 print_prmask (qp_mutexes
[i
].prmask
);
9565 fprintf (stderr
, "\n");
9568 /* Deal with the old mutex with more than 3+ PRs only if
9569 the new mutex on the same execution path with it.
9571 FIXME: The 3+ mutex support is incomplete.
9572 dot_pred_rel () may be a better place to fix it. */
9573 if (qp_mutexes
[i
].path
== md
.path
)
9575 /* If it is a proper subset of the mutex, create a
9578 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9581 qp_mutexes
[i
].prmask
&= ~mask
;
9582 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9584 /* Modify the mutex if there are more than one
9592 /* Remove the mutex. */
9593 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9601 add_qp_mutex (mask
);
9606 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9608 Any changes to a PR clears the mutex relations which include that PR. */
9611 clear_qp_mutex (mask
)
9617 while (i
< qp_mutexeslen
)
9619 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9623 fprintf (stderr
, " Clearing mutex relation");
9624 print_prmask (qp_mutexes
[i
].prmask
);
9625 fprintf (stderr
, "\n");
9627 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9634 /* Clear implies relations which contain PRs in the given masks.
9635 P1_MASK indicates the source of the implies relation, while P2_MASK
9636 indicates the implied PR. */
9639 clear_qp_implies (p1_mask
, p2_mask
)
9646 while (i
< qp_implieslen
)
9648 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9649 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9652 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9653 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9654 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9661 /* Add the PRs specified to the list of implied relations. */
9664 add_qp_imply (p1
, p2
)
9671 /* p0 is not meaningful here. */
9672 if (p1
== 0 || p2
== 0)
9678 /* If it exists already, ignore it. */
9679 for (i
= 0; i
< qp_implieslen
; i
++)
9681 if (qp_implies
[i
].p1
== p1
9682 && qp_implies
[i
].p2
== p2
9683 && qp_implies
[i
].path
== md
.path
9684 && !qp_implies
[i
].p2_branched
)
9688 if (qp_implieslen
== qp_impliestotlen
)
9690 qp_impliestotlen
+= 20;
9691 qp_implies
= (struct qp_imply
*)
9692 xrealloc ((void *) qp_implies
,
9693 qp_impliestotlen
* sizeof (struct qp_imply
));
9696 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9697 qp_implies
[qp_implieslen
].p1
= p1
;
9698 qp_implies
[qp_implieslen
].p2
= p2
;
9699 qp_implies
[qp_implieslen
].path
= md
.path
;
9700 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9702 /* Add in the implied transitive relations; for everything that p2 implies,
9703 make p1 imply that, too; for everything that implies p1, make it imply p2
9705 for (i
= 0; i
< qp_implieslen
; i
++)
9707 if (qp_implies
[i
].p1
== p2
)
9708 add_qp_imply (p1
, qp_implies
[i
].p2
);
9709 if (qp_implies
[i
].p2
== p1
)
9710 add_qp_imply (qp_implies
[i
].p1
, p2
);
9712 /* Add in mutex relations implied by this implies relation; for each mutex
9713 relation containing p2, duplicate it and replace p2 with p1. */
9714 bit
= (valueT
) 1 << p1
;
9715 mask
= (valueT
) 1 << p2
;
9716 for (i
= 0; i
< qp_mutexeslen
; i
++)
9718 if (qp_mutexes
[i
].prmask
& mask
)
9719 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9723 /* Add the PRs specified in the mask to the mutex list; this means that only
9724 one of the PRs can be true at any time. PR0 should never be included in
9734 if (qp_mutexeslen
== qp_mutexestotlen
)
9736 qp_mutexestotlen
+= 20;
9737 qp_mutexes
= (struct qpmutex
*)
9738 xrealloc ((void *) qp_mutexes
,
9739 qp_mutexestotlen
* sizeof (struct qpmutex
));
9743 fprintf (stderr
, " Registering mutex on");
9744 print_prmask (mask
);
9745 fprintf (stderr
, "\n");
9747 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9748 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9752 has_suffix_p (name
, suffix
)
9756 size_t namelen
= strlen (name
);
9757 size_t sufflen
= strlen (suffix
);
9759 if (namelen
<= sufflen
)
9761 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9765 clear_register_values ()
9769 fprintf (stderr
, " Clearing register values\n");
9770 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9771 gr_values
[i
].known
= 0;
9774 /* Keep track of register values/changes which affect DV tracking.
9776 optimization note: should add a flag to classes of insns where otherwise we
9777 have to examine a group of strings to identify them. */
9780 note_register_values (idesc
)
9781 struct ia64_opcode
*idesc
;
9783 valueT qp_changemask
= 0;
9786 /* Invalidate values for registers being written to. */
9787 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9789 if (idesc
->operands
[i
] == IA64_OPND_R1
9790 || idesc
->operands
[i
] == IA64_OPND_R2
9791 || idesc
->operands
[i
] == IA64_OPND_R3
)
9793 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9794 if (regno
> 0 && regno
< NELEMS (gr_values
))
9795 gr_values
[regno
].known
= 0;
9797 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9799 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9800 if (regno
> 0 && regno
< 4)
9801 gr_values
[regno
].known
= 0;
9803 else if (idesc
->operands
[i
] == IA64_OPND_P1
9804 || idesc
->operands
[i
] == IA64_OPND_P2
)
9806 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9807 qp_changemask
|= (valueT
) 1 << regno
;
9809 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9811 if (idesc
->operands
[2] & (valueT
) 0x10000)
9812 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9814 qp_changemask
= idesc
->operands
[2];
9817 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9819 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9820 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9822 qp_changemask
= idesc
->operands
[1];
9823 qp_changemask
&= ~(valueT
) 0xFFFF;
9828 /* Always clear qp branch flags on any PR change. */
9829 /* FIXME there may be exceptions for certain compares. */
9830 clear_qp_branch_flag (qp_changemask
);
9832 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9833 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9835 qp_changemask
|= ~(valueT
) 0xFFFF;
9836 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9838 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9839 gr_values
[i
].known
= 0;
9841 clear_qp_mutex (qp_changemask
);
9842 clear_qp_implies (qp_changemask
, qp_changemask
);
9844 /* After a call, all register values are undefined, except those marked
9846 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9847 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9849 /* FIXME keep GR values which are marked as "safe_across_calls" */
9850 clear_register_values ();
9851 clear_qp_mutex (~qp_safe_across_calls
);
9852 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9853 clear_qp_branch_flag (~qp_safe_across_calls
);
9855 else if (is_interruption_or_rfi (idesc
)
9856 || is_taken_branch (idesc
))
9858 clear_register_values ();
9859 clear_qp_mutex (~(valueT
) 0);
9860 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9862 /* Look for mutex and implies relations. */
9863 else if ((idesc
->operands
[0] == IA64_OPND_P1
9864 || idesc
->operands
[0] == IA64_OPND_P2
)
9865 && (idesc
->operands
[1] == IA64_OPND_P1
9866 || idesc
->operands
[1] == IA64_OPND_P2
))
9868 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9869 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9870 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9871 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9873 /* If both PRs are PR0, we can't really do anything. */
9874 if (p1
== 0 && p2
== 0)
9877 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9879 /* In general, clear mutexes and implies which include P1 or P2,
9880 with the following exceptions. */
9881 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9882 || has_suffix_p (idesc
->name
, ".and.orcm"))
9884 clear_qp_implies (p2mask
, p1mask
);
9886 else if (has_suffix_p (idesc
->name
, ".andcm")
9887 || has_suffix_p (idesc
->name
, ".and"))
9889 clear_qp_implies (0, p1mask
| p2mask
);
9891 else if (has_suffix_p (idesc
->name
, ".orcm")
9892 || has_suffix_p (idesc
->name
, ".or"))
9894 clear_qp_mutex (p1mask
| p2mask
);
9895 clear_qp_implies (p1mask
| p2mask
, 0);
9901 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9903 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9904 if (p1
== 0 || p2
== 0)
9905 clear_qp_mutex (p1mask
| p2mask
);
9907 added
= update_qp_mutex (p1mask
| p2mask
);
9909 if (CURR_SLOT
.qp_regno
== 0
9910 || has_suffix_p (idesc
->name
, ".unc"))
9912 if (added
== 0 && p1
&& p2
)
9913 add_qp_mutex (p1mask
| p2mask
);
9914 if (CURR_SLOT
.qp_regno
!= 0)
9917 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9919 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9924 /* Look for mov imm insns into GRs. */
9925 else if (idesc
->operands
[0] == IA64_OPND_R1
9926 && (idesc
->operands
[1] == IA64_OPND_IMM22
9927 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9928 && CURR_SLOT
.opnd
[1].X_op
== O_constant
9929 && (strcmp (idesc
->name
, "mov") == 0
9930 || strcmp (idesc
->name
, "movl") == 0))
9932 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9933 if (regno
> 0 && regno
< NELEMS (gr_values
))
9935 gr_values
[regno
].known
= 1;
9936 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9937 gr_values
[regno
].path
= md
.path
;
9940 fprintf (stderr
, " Know gr%d = ", regno
);
9941 fprintf_vma (stderr
, gr_values
[regno
].value
);
9942 fputs ("\n", stderr
);
9946 /* Look for dep.z imm insns. */
9947 else if (idesc
->operands
[0] == IA64_OPND_R1
9948 && idesc
->operands
[1] == IA64_OPND_IMM8
9949 && strcmp (idesc
->name
, "dep.z") == 0)
9951 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9952 if (regno
> 0 && regno
< NELEMS (gr_values
))
9954 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
9956 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
9957 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
9958 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
9959 gr_values
[regno
].known
= 1;
9960 gr_values
[regno
].value
= value
;
9961 gr_values
[regno
].path
= md
.path
;
9964 fprintf (stderr
, " Know gr%d = ", regno
);
9965 fprintf_vma (stderr
, gr_values
[regno
].value
);
9966 fputs ("\n", stderr
);
9972 clear_qp_mutex (qp_changemask
);
9973 clear_qp_implies (qp_changemask
, qp_changemask
);
9977 /* Return whether the given predicate registers are currently mutex. */
9980 qp_mutex (p1
, p2
, path
)
9990 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9991 for (i
= 0; i
< qp_mutexeslen
; i
++)
9993 if (qp_mutexes
[i
].path
>= path
9994 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
10001 /* Return whether the given resource is in the given insn's list of chks
10002 Return 1 if the conflict is absolutely determined, 2 if it's a potential
10006 resources_match (rs
, idesc
, note
, qp_regno
, path
)
10008 struct ia64_opcode
*idesc
;
10013 struct rsrc specs
[MAX_SPECS
];
10016 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10017 we don't need to check. One exception is note 11, which indicates that
10018 target predicates are written regardless of PR[qp]. */
10019 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
10023 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
10024 while (count
-- > 0)
10026 /* UNAT checking is a bit more specific than other resources */
10027 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
10028 && specs
[count
].mem_offset
.hint
10029 && rs
->mem_offset
.hint
)
10031 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
10033 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
10034 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
10041 /* Skip apparent PR write conflicts where both writes are an AND or both
10042 writes are an OR. */
10043 if (rs
->dependency
->specifier
== IA64_RS_PR
10044 || rs
->dependency
->specifier
== IA64_RS_PRr
10045 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10047 if (specs
[count
].cmp_type
!= CMP_NONE
10048 && specs
[count
].cmp_type
== rs
->cmp_type
)
10051 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10052 dv_mode
[rs
->dependency
->mode
],
10053 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10054 specs
[count
].index
: 63);
10059 " %s on parallel compare conflict %s vs %s on PR%d\n",
10060 dv_mode
[rs
->dependency
->mode
],
10061 dv_cmp_type
[rs
->cmp_type
],
10062 dv_cmp_type
[specs
[count
].cmp_type
],
10063 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10064 specs
[count
].index
: 63);
10068 /* If either resource is not specific, conservatively assume a conflict
10070 if (!specs
[count
].specific
|| !rs
->specific
)
10072 else if (specs
[count
].index
== rs
->index
)
10079 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10080 insert a stop to create the break. Update all resource dependencies
10081 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10082 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10083 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10087 insn_group_break (insert_stop
, qp_regno
, save_current
)
10094 if (insert_stop
&& md
.num_slots_in_use
> 0)
10095 PREV_SLOT
.end_of_insn_group
= 1;
10099 fprintf (stderr
, " Insn group break%s",
10100 (insert_stop
? " (w/stop)" : ""));
10102 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10103 fprintf (stderr
, "\n");
10107 while (i
< regdepslen
)
10109 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10112 && regdeps
[i
].qp_regno
!= qp_regno
)
10119 && CURR_SLOT
.src_file
== regdeps
[i
].file
10120 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10126 /* clear dependencies which are automatically cleared by a stop, or
10127 those that have reached the appropriate state of insn serialization */
10128 if (dep
->semantics
== IA64_DVS_IMPLIED
10129 || dep
->semantics
== IA64_DVS_IMPLIEDF
10130 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10132 print_dependency ("Removing", i
);
10133 regdeps
[i
] = regdeps
[--regdepslen
];
10137 if (dep
->semantics
== IA64_DVS_DATA
10138 || dep
->semantics
== IA64_DVS_INSTR
10139 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10141 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10142 regdeps
[i
].insn_srlz
= STATE_STOP
;
10143 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10144 regdeps
[i
].data_srlz
= STATE_STOP
;
10151 /* Add the given resource usage spec to the list of active dependencies. */
10154 mark_resource (idesc
, dep
, spec
, depind
, path
)
10155 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
10156 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
10161 if (regdepslen
== regdepstotlen
)
10163 regdepstotlen
+= 20;
10164 regdeps
= (struct rsrc
*)
10165 xrealloc ((void *) regdeps
,
10166 regdepstotlen
* sizeof (struct rsrc
));
10169 regdeps
[regdepslen
] = *spec
;
10170 regdeps
[regdepslen
].depind
= depind
;
10171 regdeps
[regdepslen
].path
= path
;
10172 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10173 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10175 print_dependency ("Adding", regdepslen
);
10181 print_dependency (action
, depind
)
10182 const char *action
;
10187 fprintf (stderr
, " %s %s '%s'",
10188 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10189 (regdeps
[depind
].dependency
)->name
);
10190 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10191 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10192 if (regdeps
[depind
].mem_offset
.hint
)
10194 fputs (" ", stderr
);
10195 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10196 fputs ("+", stderr
);
10197 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10199 fprintf (stderr
, "\n");
10204 instruction_serialization ()
10208 fprintf (stderr
, " Instruction serialization\n");
10209 for (i
= 0; i
< regdepslen
; i
++)
10210 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10211 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10215 data_serialization ()
10219 fprintf (stderr
, " Data serialization\n");
10220 while (i
< regdepslen
)
10222 if (regdeps
[i
].data_srlz
== STATE_STOP
10223 /* Note: as of 991210, all "other" dependencies are cleared by a
10224 data serialization. This might change with new tables */
10225 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10227 print_dependency ("Removing", i
);
10228 regdeps
[i
] = regdeps
[--regdepslen
];
10235 /* Insert stops and serializations as needed to avoid DVs. */
10238 remove_marked_resource (rs
)
10241 switch (rs
->dependency
->semantics
)
10243 case IA64_DVS_SPECIFIC
:
10245 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10246 /* ...fall through... */
10247 case IA64_DVS_INSTR
:
10249 fprintf (stderr
, "Inserting instr serialization\n");
10250 if (rs
->insn_srlz
< STATE_STOP
)
10251 insn_group_break (1, 0, 0);
10252 if (rs
->insn_srlz
< STATE_SRLZ
)
10254 struct slot oldslot
= CURR_SLOT
;
10255 /* Manually jam a srlz.i insn into the stream */
10256 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10257 CURR_SLOT
.user_template
= -1;
10258 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10259 instruction_serialization ();
10260 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10261 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10262 emit_one_bundle ();
10263 CURR_SLOT
= oldslot
;
10265 insn_group_break (1, 0, 0);
10267 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10268 "other" types of DV are eliminated
10269 by a data serialization */
10270 case IA64_DVS_DATA
:
10272 fprintf (stderr
, "Inserting data serialization\n");
10273 if (rs
->data_srlz
< STATE_STOP
)
10274 insn_group_break (1, 0, 0);
10276 struct slot oldslot
= CURR_SLOT
;
10277 /* Manually jam a srlz.d insn into the stream */
10278 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10279 CURR_SLOT
.user_template
= -1;
10280 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10281 data_serialization ();
10282 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10283 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10284 emit_one_bundle ();
10285 CURR_SLOT
= oldslot
;
10288 case IA64_DVS_IMPLIED
:
10289 case IA64_DVS_IMPLIEDF
:
10291 fprintf (stderr
, "Inserting stop\n");
10292 insn_group_break (1, 0, 0);
10299 /* Check the resources used by the given opcode against the current dependency
10302 The check is run once for each execution path encountered. In this case,
10303 a unique execution path is the sequence of instructions following a code
10304 entry point, e.g. the following has three execution paths, one starting
10305 at L0, one at L1, and one at L2.
10314 check_dependencies (idesc
)
10315 struct ia64_opcode
*idesc
;
10317 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10321 /* Note that the number of marked resources may change within the
10322 loop if in auto mode. */
10324 while (i
< regdepslen
)
10326 struct rsrc
*rs
= ®deps
[i
];
10327 const struct ia64_dependency
*dep
= rs
->dependency
;
10330 int start_over
= 0;
10332 if (dep
->semantics
== IA64_DVS_NONE
10333 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10339 note
= NOTE (opdeps
->chks
[chkind
]);
10341 /* Check this resource against each execution path seen thus far. */
10342 for (path
= 0; path
<= md
.path
; path
++)
10346 /* If the dependency wasn't on the path being checked, ignore it. */
10347 if (rs
->path
< path
)
10350 /* If the QP for this insn implies a QP which has branched, don't
10351 bother checking. Ed. NOTE: I don't think this check is terribly
10352 useful; what's the point of generating code which will only be
10353 reached if its QP is zero?
10354 This code was specifically inserted to handle the following code,
10355 based on notes from Intel's DV checking code, where p1 implies p2.
10361 if (CURR_SLOT
.qp_regno
!= 0)
10365 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10367 if (qp_implies
[implies
].path
>= path
10368 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10369 && qp_implies
[implies
].p2_branched
)
10379 if ((matchtype
= resources_match (rs
, idesc
, note
,
10380 CURR_SLOT
.qp_regno
, path
)) != 0)
10383 char pathmsg
[256] = "";
10384 char indexmsg
[256] = "";
10385 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10388 sprintf (pathmsg
, " when entry is at label '%s'",
10389 md
.entry_labels
[path
- 1]);
10390 if (matchtype
== 1 && rs
->index
>= 0)
10391 sprintf (indexmsg
, ", specific resource number is %d",
10393 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10395 (certain
? "violates" : "may violate"),
10396 dv_mode
[dep
->mode
], dep
->name
,
10397 dv_sem
[dep
->semantics
],
10398 pathmsg
, indexmsg
);
10400 if (md
.explicit_mode
)
10402 as_warn ("%s", msg
);
10403 if (path
< md
.path
)
10404 as_warn (_("Only the first path encountering the conflict "
10406 as_warn_where (rs
->file
, rs
->line
,
10407 _("This is the location of the "
10408 "conflicting usage"));
10409 /* Don't bother checking other paths, to avoid duplicating
10410 the same warning */
10416 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10418 remove_marked_resource (rs
);
10420 /* since the set of dependencies has changed, start over */
10421 /* FIXME -- since we're removing dvs as we go, we
10422 probably don't really need to start over... */
10435 /* Register new dependencies based on the given opcode. */
10438 mark_resources (idesc
)
10439 struct ia64_opcode
*idesc
;
10442 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10443 int add_only_qp_reads
= 0;
10445 /* A conditional branch only uses its resources if it is taken; if it is
10446 taken, we stop following that path. The other branch types effectively
10447 *always* write their resources. If it's not taken, register only QP
10449 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10451 add_only_qp_reads
= 1;
10455 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10457 for (i
= 0; i
< opdeps
->nregs
; i
++)
10459 const struct ia64_dependency
*dep
;
10460 struct rsrc specs
[MAX_SPECS
];
10465 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10466 note
= NOTE (opdeps
->regs
[i
]);
10468 if (add_only_qp_reads
10469 && !(dep
->mode
== IA64_DV_WAR
10470 && (dep
->specifier
== IA64_RS_PR
10471 || dep
->specifier
== IA64_RS_PRr
10472 || dep
->specifier
== IA64_RS_PR63
)))
10475 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10477 while (count
-- > 0)
10479 mark_resource (idesc
, dep
, &specs
[count
],
10480 DEP (opdeps
->regs
[i
]), md
.path
);
10483 /* The execution path may affect register values, which may in turn
10484 affect which indirect-access resources are accessed. */
10485 switch (dep
->specifier
)
10489 case IA64_RS_CPUID
:
10497 for (path
= 0; path
< md
.path
; path
++)
10499 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10500 while (count
-- > 0)
10501 mark_resource (idesc
, dep
, &specs
[count
],
10502 DEP (opdeps
->regs
[i
]), path
);
10509 /* Remove dependencies when they no longer apply. */
10512 update_dependencies (idesc
)
10513 struct ia64_opcode
*idesc
;
10517 if (strcmp (idesc
->name
, "srlz.i") == 0)
10519 instruction_serialization ();
10521 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10523 data_serialization ();
10525 else if (is_interruption_or_rfi (idesc
)
10526 || is_taken_branch (idesc
))
10528 /* Although technically the taken branch doesn't clear dependencies
10529 which require a srlz.[id], we don't follow the branch; the next
10530 instruction is assumed to start with a clean slate. */
10534 else if (is_conditional_branch (idesc
)
10535 && CURR_SLOT
.qp_regno
!= 0)
10537 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10539 for (i
= 0; i
< qp_implieslen
; i
++)
10541 /* If the conditional branch's predicate is implied by the predicate
10542 in an existing dependency, remove that dependency. */
10543 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10546 /* Note that this implied predicate takes a branch so that if
10547 a later insn generates a DV but its predicate implies this
10548 one, we can avoid the false DV warning. */
10549 qp_implies
[i
].p2_branched
= 1;
10550 while (depind
< regdepslen
)
10552 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10554 print_dependency ("Removing", depind
);
10555 regdeps
[depind
] = regdeps
[--regdepslen
];
10562 /* Any marked resources which have this same predicate should be
10563 cleared, provided that the QP hasn't been modified between the
10564 marking instruction and the branch. */
10567 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10572 while (i
< regdepslen
)
10574 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10575 && regdeps
[i
].link_to_qp_branch
10576 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10577 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10579 /* Treat like a taken branch */
10580 print_dependency ("Removing", i
);
10581 regdeps
[i
] = regdeps
[--regdepslen
];
10590 /* Examine the current instruction for dependency violations. */
10594 struct ia64_opcode
*idesc
;
10598 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10599 idesc
->name
, CURR_SLOT
.src_line
,
10600 idesc
->dependencies
->nchks
,
10601 idesc
->dependencies
->nregs
);
10604 /* Look through the list of currently marked resources; if the current
10605 instruction has the dependency in its chks list which uses that resource,
10606 check against the specific resources used. */
10607 check_dependencies (idesc
);
10609 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10610 then add them to the list of marked resources. */
10611 mark_resources (idesc
);
10613 /* There are several types of dependency semantics, and each has its own
10614 requirements for being cleared
10616 Instruction serialization (insns separated by interruption, rfi, or
10617 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10619 Data serialization (instruction serialization, or writer + srlz.d +
10620 reader, where writer and srlz.d are in separate groups) clears
10621 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10622 always be the case).
10624 Instruction group break (groups separated by stop, taken branch,
10625 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10627 update_dependencies (idesc
);
10629 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10630 warning. Keep track of as many as possible that are useful. */
10631 note_register_values (idesc
);
10633 /* We don't need or want this anymore. */
10634 md
.mem_offset
.hint
= 0;
10639 /* Translate one line of assembly. Pseudo ops and labels do not show
10645 char *saved_input_line_pointer
, *mnemonic
;
10646 const struct pseudo_opcode
*pdesc
;
10647 struct ia64_opcode
*idesc
;
10648 unsigned char qp_regno
;
10649 unsigned int flags
;
10652 saved_input_line_pointer
= input_line_pointer
;
10653 input_line_pointer
= str
;
10655 /* extract the opcode (mnemonic): */
10657 mnemonic
= input_line_pointer
;
10658 ch
= get_symbol_end ();
10659 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10662 *input_line_pointer
= ch
;
10663 (*pdesc
->handler
) (pdesc
->arg
);
10667 /* Find the instruction descriptor matching the arguments. */
10669 idesc
= ia64_find_opcode (mnemonic
);
10670 *input_line_pointer
= ch
;
10673 as_bad ("Unknown opcode `%s'", mnemonic
);
10677 idesc
= parse_operands (idesc
);
10681 /* Handle the dynamic ops we can handle now: */
10682 if (idesc
->type
== IA64_TYPE_DYN
)
10684 if (strcmp (idesc
->name
, "add") == 0)
10686 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10687 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10691 ia64_free_opcode (idesc
);
10692 idesc
= ia64_find_opcode (mnemonic
);
10694 else if (strcmp (idesc
->name
, "mov") == 0)
10696 enum ia64_opnd opnd1
, opnd2
;
10699 opnd1
= idesc
->operands
[0];
10700 opnd2
= idesc
->operands
[1];
10701 if (opnd1
== IA64_OPND_AR3
)
10703 else if (opnd2
== IA64_OPND_AR3
)
10707 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10709 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10710 mnemonic
= "mov.i";
10711 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10712 mnemonic
= "mov.m";
10720 ia64_free_opcode (idesc
);
10721 idesc
= ia64_find_opcode (mnemonic
);
10722 while (idesc
!= NULL
10723 && (idesc
->operands
[0] != opnd1
10724 || idesc
->operands
[1] != opnd2
))
10725 idesc
= get_next_opcode (idesc
);
10729 else if (strcmp (idesc
->name
, "mov.i") == 0
10730 || strcmp (idesc
->name
, "mov.m") == 0)
10732 enum ia64_opnd opnd1
, opnd2
;
10735 opnd1
= idesc
->operands
[0];
10736 opnd2
= idesc
->operands
[1];
10737 if (opnd1
== IA64_OPND_AR3
)
10739 else if (opnd2
== IA64_OPND_AR3
)
10743 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10746 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10748 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10750 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10751 as_bad ("AR %d can only be accessed by %c-unit",
10752 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10756 else if (strcmp (idesc
->name
, "hint.b") == 0)
10762 case hint_b_warning
:
10763 as_warn ("hint.b may be treated as nop");
10766 as_bad ("hint.b shouldn't be used");
10772 if (md
.qp
.X_op
== O_register
)
10774 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10775 md
.qp
.X_op
= O_absent
;
10778 flags
= idesc
->flags
;
10780 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10782 /* The alignment frag has to end with a stop bit only if the
10783 next instruction after the alignment directive has to be
10784 the first instruction in an instruction group. */
10787 while (align_frag
->fr_type
!= rs_align_code
)
10789 align_frag
= align_frag
->fr_next
;
10793 /* align_frag can be NULL if there are directives in
10795 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10796 align_frag
->tc_frag_data
= 1;
10799 insn_group_break (1, 0, 0);
10803 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10805 as_bad ("`%s' cannot be predicated", idesc
->name
);
10809 /* Build the instruction. */
10810 CURR_SLOT
.qp_regno
= qp_regno
;
10811 CURR_SLOT
.idesc
= idesc
;
10812 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10813 dwarf2_where (&CURR_SLOT
.debug_line
);
10815 /* Add unwind entry, if there is one. */
10816 if (unwind
.current_entry
)
10818 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10819 unwind
.current_entry
= NULL
;
10821 if (unwind
.proc_pending
.sym
&& S_IS_DEFINED (unwind
.proc_pending
.sym
))
10824 /* Check for dependency violations. */
10828 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10829 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10830 emit_one_bundle ();
10832 if ((flags
& IA64_OPCODE_LAST
) != 0)
10833 insn_group_break (1, 0, 0);
10835 md
.last_text_seg
= now_seg
;
10838 input_line_pointer
= saved_input_line_pointer
;
10841 /* Called when symbol NAME cannot be found in the symbol table.
10842 Should be used for dynamic valued symbols only. */
10845 md_undefined_symbol (name
)
10846 char *name ATTRIBUTE_UNUSED
;
10851 /* Called for any expression that can not be recognized. When the
10852 function is called, `input_line_pointer' will point to the start of
10859 switch (*input_line_pointer
)
10862 ++input_line_pointer
;
10864 if (*input_line_pointer
!= ']')
10866 as_bad ("Closing bracket missing");
10871 if (e
->X_op
!= O_register
)
10872 as_bad ("Register expected as index");
10874 ++input_line_pointer
;
10885 ignore_rest_of_line ();
10888 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10889 a section symbol plus some offset. For relocs involving @fptr(),
10890 directives we don't want such adjustments since we need to have the
10891 original symbol's name in the reloc. */
10893 ia64_fix_adjustable (fix
)
10896 /* Prevent all adjustments to global symbols */
10897 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10900 switch (fix
->fx_r_type
)
10902 case BFD_RELOC_IA64_FPTR64I
:
10903 case BFD_RELOC_IA64_FPTR32MSB
:
10904 case BFD_RELOC_IA64_FPTR32LSB
:
10905 case BFD_RELOC_IA64_FPTR64MSB
:
10906 case BFD_RELOC_IA64_FPTR64LSB
:
10907 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10908 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10918 ia64_force_relocation (fix
)
10921 switch (fix
->fx_r_type
)
10923 case BFD_RELOC_IA64_FPTR64I
:
10924 case BFD_RELOC_IA64_FPTR32MSB
:
10925 case BFD_RELOC_IA64_FPTR32LSB
:
10926 case BFD_RELOC_IA64_FPTR64MSB
:
10927 case BFD_RELOC_IA64_FPTR64LSB
:
10929 case BFD_RELOC_IA64_LTOFF22
:
10930 case BFD_RELOC_IA64_LTOFF64I
:
10931 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10932 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10933 case BFD_RELOC_IA64_PLTOFF22
:
10934 case BFD_RELOC_IA64_PLTOFF64I
:
10935 case BFD_RELOC_IA64_PLTOFF64MSB
:
10936 case BFD_RELOC_IA64_PLTOFF64LSB
:
10938 case BFD_RELOC_IA64_LTOFF22X
:
10939 case BFD_RELOC_IA64_LDXMOV
:
10946 return generic_force_reloc (fix
);
10949 /* Decide from what point a pc-relative relocation is relative to,
10950 relative to the pc-relative fixup. Er, relatively speaking. */
10952 ia64_pcrel_from_section (fix
, sec
)
10956 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10958 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10965 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10967 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10971 expr
.X_op
= O_pseudo_fixup
;
10972 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10973 expr
.X_add_number
= 0;
10974 expr
.X_add_symbol
= symbol
;
10975 emit_expr (&expr
, size
);
10978 /* This is called whenever some data item (not an instruction) needs a
10979 fixup. We pick the right reloc code depending on the byteorder
10980 currently in effect. */
10982 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
10988 bfd_reloc_code_real_type code
;
10993 /* There are no reloc for 8 and 16 bit quantities, but we allow
10994 them here since they will work fine as long as the expression
10995 is fully defined at the end of the pass over the source file. */
10996 case 1: code
= BFD_RELOC_8
; break;
10997 case 2: code
= BFD_RELOC_16
; break;
10999 if (target_big_endian
)
11000 code
= BFD_RELOC_IA64_DIR32MSB
;
11002 code
= BFD_RELOC_IA64_DIR32LSB
;
11006 /* In 32-bit mode, data8 could mean function descriptors too. */
11007 if (exp
->X_op
== O_pseudo_fixup
11008 && exp
->X_op_symbol
11009 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
11010 && !(md
.flags
& EF_IA_64_ABI64
))
11012 if (target_big_endian
)
11013 code
= BFD_RELOC_IA64_IPLTMSB
;
11015 code
= BFD_RELOC_IA64_IPLTLSB
;
11016 exp
->X_op
= O_symbol
;
11021 if (target_big_endian
)
11022 code
= BFD_RELOC_IA64_DIR64MSB
;
11024 code
= BFD_RELOC_IA64_DIR64LSB
;
11029 if (exp
->X_op
== O_pseudo_fixup
11030 && exp
->X_op_symbol
11031 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
11033 if (target_big_endian
)
11034 code
= BFD_RELOC_IA64_IPLTMSB
;
11036 code
= BFD_RELOC_IA64_IPLTLSB
;
11037 exp
->X_op
= O_symbol
;
11043 as_bad ("Unsupported fixup size %d", nbytes
);
11044 ignore_rest_of_line ();
11048 if (exp
->X_op
== O_pseudo_fixup
)
11050 exp
->X_op
= O_symbol
;
11051 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11052 /* ??? If code unchanged, unsupported. */
11055 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11056 /* We need to store the byte order in effect in case we're going
11057 to fix an 8 or 16 bit relocation (for which there no real
11058 relocs available). See md_apply_fix(). */
11059 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11062 /* Return the actual relocation we wish to associate with the pseudo
11063 reloc described by SYM and R_TYPE. SYM should be one of the
11064 symbols in the pseudo_func array, or NULL. */
11066 static bfd_reloc_code_real_type
11067 ia64_gen_real_reloc_type (sym
, r_type
)
11068 struct symbol
*sym
;
11069 bfd_reloc_code_real_type r_type
;
11071 bfd_reloc_code_real_type
new = 0;
11072 const char *type
= NULL
, *suffix
= "";
11079 switch (S_GET_VALUE (sym
))
11081 case FUNC_FPTR_RELATIVE
:
11084 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
11085 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
11086 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
11087 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
11088 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
11089 default: type
= "FPTR"; break;
11093 case FUNC_GP_RELATIVE
:
11096 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
11097 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
11098 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
11099 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
11100 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
11101 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
11102 default: type
= "GPREL"; break;
11106 case FUNC_LT_RELATIVE
:
11109 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
11110 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
11111 default: type
= "LTOFF"; break;
11115 case FUNC_LT_RELATIVE_X
:
11118 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
11119 default: type
= "LTOFF"; suffix
= "X"; break;
11123 case FUNC_PC_RELATIVE
:
11126 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
11127 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
11128 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
11129 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
11130 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
11131 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
11132 default: type
= "PCREL"; break;
11136 case FUNC_PLT_RELATIVE
:
11139 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
11140 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
11141 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
11142 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
11143 default: type
= "PLTOFF"; break;
11147 case FUNC_SEC_RELATIVE
:
11150 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
11151 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
11152 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
11153 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
11154 default: type
= "SECREL"; break;
11158 case FUNC_SEG_RELATIVE
:
11161 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
11162 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
11163 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
11164 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
11165 default: type
= "SEGREL"; break;
11169 case FUNC_LTV_RELATIVE
:
11172 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
11173 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
11174 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
11175 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
11176 default: type
= "LTV"; break;
11180 case FUNC_LT_FPTR_RELATIVE
:
11183 case BFD_RELOC_IA64_IMM22
:
11184 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11185 case BFD_RELOC_IA64_IMM64
:
11186 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11187 case BFD_RELOC_IA64_DIR32MSB
:
11188 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11189 case BFD_RELOC_IA64_DIR32LSB
:
11190 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11191 case BFD_RELOC_IA64_DIR64MSB
:
11192 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11193 case BFD_RELOC_IA64_DIR64LSB
:
11194 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11196 type
= "LTOFF_FPTR"; break;
11200 case FUNC_TP_RELATIVE
:
11203 case BFD_RELOC_IA64_IMM14
: new = BFD_RELOC_IA64_TPREL14
; break;
11204 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_TPREL22
; break;
11205 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_TPREL64I
; break;
11206 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_TPREL64MSB
; break;
11207 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_TPREL64LSB
; break;
11208 default: type
= "TPREL"; break;
11212 case FUNC_LT_TP_RELATIVE
:
11215 case BFD_RELOC_IA64_IMM22
:
11216 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11218 type
= "LTOFF_TPREL"; break;
11222 case FUNC_DTP_MODULE
:
11225 case BFD_RELOC_IA64_DIR64MSB
:
11226 new = BFD_RELOC_IA64_DTPMOD64MSB
; break;
11227 case BFD_RELOC_IA64_DIR64LSB
:
11228 new = BFD_RELOC_IA64_DTPMOD64LSB
; break;
11230 type
= "DTPMOD"; break;
11234 case FUNC_LT_DTP_MODULE
:
11237 case BFD_RELOC_IA64_IMM22
:
11238 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11240 type
= "LTOFF_DTPMOD"; break;
11244 case FUNC_DTP_RELATIVE
:
11247 case BFD_RELOC_IA64_DIR32MSB
:
11248 new = BFD_RELOC_IA64_DTPREL32MSB
; break;
11249 case BFD_RELOC_IA64_DIR32LSB
:
11250 new = BFD_RELOC_IA64_DTPREL32LSB
; break;
11251 case BFD_RELOC_IA64_DIR64MSB
:
11252 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
11253 case BFD_RELOC_IA64_DIR64LSB
:
11254 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
11255 case BFD_RELOC_IA64_IMM14
:
11256 new = BFD_RELOC_IA64_DTPREL14
; break;
11257 case BFD_RELOC_IA64_IMM22
:
11258 new = BFD_RELOC_IA64_DTPREL22
; break;
11259 case BFD_RELOC_IA64_IMM64
:
11260 new = BFD_RELOC_IA64_DTPREL64I
; break;
11262 type
= "DTPREL"; break;
11266 case FUNC_LT_DTP_RELATIVE
:
11269 case BFD_RELOC_IA64_IMM22
:
11270 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11272 type
= "LTOFF_DTPREL"; break;
11276 case FUNC_IPLT_RELOC
:
11279 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11280 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11281 default: type
= "IPLT"; break;
11299 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11300 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11301 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11302 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11303 case BFD_RELOC_UNUSED
: width
= 13; break;
11304 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11305 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11306 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11310 /* This should be an error, but since previously there wasn't any
11311 diagnostic here, dont't make it fail because of this for now. */
11312 as_warn ("Cannot express %s%d%s relocation", type
, width
, suffix
);
11317 /* Here is where generate the appropriate reloc for pseudo relocation
11320 ia64_validate_fix (fix
)
11323 switch (fix
->fx_r_type
)
11325 case BFD_RELOC_IA64_FPTR64I
:
11326 case BFD_RELOC_IA64_FPTR32MSB
:
11327 case BFD_RELOC_IA64_FPTR64LSB
:
11328 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11329 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11330 if (fix
->fx_offset
!= 0)
11331 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11332 "No addend allowed in @fptr() relocation");
11340 fix_insn (fix
, odesc
, value
)
11342 const struct ia64_operand
*odesc
;
11345 bfd_vma insn
[3], t0
, t1
, control_bits
;
11350 slot
= fix
->fx_where
& 0x3;
11351 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11353 /* Bundles are always in little-endian byte order */
11354 t0
= bfd_getl64 (fixpos
);
11355 t1
= bfd_getl64 (fixpos
+ 8);
11356 control_bits
= t0
& 0x1f;
11357 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11358 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11359 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11362 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11364 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11365 insn
[2] |= (((value
& 0x7f) << 13)
11366 | (((value
>> 7) & 0x1ff) << 27)
11367 | (((value
>> 16) & 0x1f) << 22)
11368 | (((value
>> 21) & 0x1) << 21)
11369 | (((value
>> 63) & 0x1) << 36));
11371 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11373 if (value
& ~0x3fffffffffffffffULL
)
11374 err
= "integer operand out of range";
11375 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11376 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11378 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11381 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11382 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11383 | (((value
>> 0) & 0xfffff) << 13));
11386 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11389 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
11391 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11392 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11393 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11394 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11397 /* Attempt to simplify or even eliminate a fixup. The return value is
11398 ignored; perhaps it was once meaningful, but now it is historical.
11399 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11401 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11405 md_apply_fix (fix
, valP
, seg
)
11408 segT seg ATTRIBUTE_UNUSED
;
11411 valueT value
= *valP
;
11413 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11417 switch (fix
->fx_r_type
)
11419 case BFD_RELOC_IA64_PCREL21B
: break;
11420 case BFD_RELOC_IA64_PCREL21BI
: break;
11421 case BFD_RELOC_IA64_PCREL21F
: break;
11422 case BFD_RELOC_IA64_PCREL21M
: break;
11423 case BFD_RELOC_IA64_PCREL60B
: break;
11424 case BFD_RELOC_IA64_PCREL22
: break;
11425 case BFD_RELOC_IA64_PCREL64I
: break;
11426 case BFD_RELOC_IA64_PCREL32MSB
: break;
11427 case BFD_RELOC_IA64_PCREL32LSB
: break;
11428 case BFD_RELOC_IA64_PCREL64MSB
: break;
11429 case BFD_RELOC_IA64_PCREL64LSB
: break;
11431 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11438 switch (fix
->fx_r_type
)
11440 case BFD_RELOC_UNUSED
:
11441 /* This must be a TAG13 or TAG13b operand. There are no external
11442 relocs defined for them, so we must give an error. */
11443 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11444 "%s must have a constant value",
11445 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11449 case BFD_RELOC_IA64_TPREL14
:
11450 case BFD_RELOC_IA64_TPREL22
:
11451 case BFD_RELOC_IA64_TPREL64I
:
11452 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11453 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11454 case BFD_RELOC_IA64_DTPREL14
:
11455 case BFD_RELOC_IA64_DTPREL22
:
11456 case BFD_RELOC_IA64_DTPREL64I
:
11457 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11458 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11465 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11467 if (fix
->tc_fix_data
.bigendian
)
11468 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11470 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11475 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11480 /* Generate the BFD reloc to be stuck in the object file from the
11481 fixup used internally in the assembler. */
11484 tc_gen_reloc (sec
, fixp
)
11485 asection
*sec ATTRIBUTE_UNUSED
;
11490 reloc
= xmalloc (sizeof (*reloc
));
11491 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11492 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11493 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11494 reloc
->addend
= fixp
->fx_offset
;
11495 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11499 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11500 "Cannot represent %s relocation in object file",
11501 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11506 /* Turn a string in input_line_pointer into a floating point constant
11507 of type TYPE, and store the appropriate bytes in *LIT. The number
11508 of LITTLENUMS emitted is stored in *SIZE. An error message is
11509 returned, or NULL on OK. */
11511 #define MAX_LITTLENUMS 5
11514 md_atof (type
, lit
, size
)
11519 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11549 return "Bad call to MD_ATOF()";
11551 t
= atof_ieee (input_line_pointer
, type
, words
);
11553 input_line_pointer
= t
;
11555 (*ia64_float_to_chars
) (lit
, words
, prec
);
11559 /* It is 10 byte floating point with 6 byte padding. */
11560 memset (&lit
[10], 0, 6);
11561 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11564 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11569 /* Handle ia64 specific semantics of the align directive. */
11572 ia64_md_do_align (n
, fill
, len
, max
)
11573 int n ATTRIBUTE_UNUSED
;
11574 const char *fill ATTRIBUTE_UNUSED
;
11575 int len ATTRIBUTE_UNUSED
;
11576 int max ATTRIBUTE_UNUSED
;
11578 if (subseg_text_p (now_seg
))
11579 ia64_flush_insns ();
11582 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11583 of an rs_align_code fragment. */
11586 ia64_handle_align (fragp
)
11591 const unsigned char *nop
;
11593 if (fragp
->fr_type
!= rs_align_code
)
11596 /* Check if this frag has to end with a stop bit. */
11597 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11599 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11600 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11602 /* If no paddings are needed, we check if we need a stop bit. */
11603 if (!bytes
&& fragp
->tc_frag_data
)
11605 if (fragp
->fr_fix
< 16)
11607 /* FIXME: It won't work with
11609 alloc r32=ar.pfs,1,2,4,0
11613 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11614 _("Can't add stop bit to mark end of instruction group"));
11617 /* Bundles are always in little-endian byte order. Make sure
11618 the previous bundle has the stop bit. */
11622 /* Make sure we are on a 16-byte boundary, in case someone has been
11623 putting data into a text section. */
11626 int fix
= bytes
& 15;
11627 memset (p
, 0, fix
);
11630 fragp
->fr_fix
+= fix
;
11633 /* Instruction bundles are always little-endian. */
11634 memcpy (p
, nop
, 16);
11635 fragp
->fr_var
= 16;
11639 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11644 number_to_chars_bigendian (lit
, (long) (*words
++),
11645 sizeof (LITTLENUM_TYPE
));
11646 lit
+= sizeof (LITTLENUM_TYPE
);
11651 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11656 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11657 sizeof (LITTLENUM_TYPE
));
11658 lit
+= sizeof (LITTLENUM_TYPE
);
11663 ia64_elf_section_change_hook (void)
11665 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11666 && elf_linked_to_section (now_seg
) == NULL
)
11667 elf_linked_to_section (now_seg
) = text_section
;
11668 dot_byteorder (-1);
11671 /* Check if a label should be made global. */
11673 ia64_check_label (symbolS
*label
)
11675 if (*input_line_pointer
== ':')
11677 S_SET_EXTERNAL (label
);
11678 input_line_pointer
++;
11682 /* Used to remember where .alias and .secalias directives are seen. We
11683 will rename symbol and section names when we are about to output
11684 the relocatable file. */
11687 char *file
; /* The file where the directive is seen. */
11688 unsigned int line
; /* The line number the directive is at. */
11689 const char *name
; /* The orignale name of the symbol. */
11692 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11693 .secalias. Otherwise, it is .alias. */
11695 dot_alias (int section
)
11697 char *name
, *alias
;
11701 const char *error_string
;
11704 struct hash_control
*ahash
, *nhash
;
11707 name
= input_line_pointer
;
11708 delim
= get_symbol_end ();
11709 end_name
= input_line_pointer
;
11712 if (name
== end_name
)
11714 as_bad (_("expected symbol name"));
11715 discard_rest_of_line ();
11719 SKIP_WHITESPACE ();
11721 if (*input_line_pointer
!= ',')
11724 as_bad (_("expected comma after \"%s\""), name
);
11726 ignore_rest_of_line ();
11730 input_line_pointer
++;
11732 ia64_canonicalize_symbol_name (name
);
11734 /* We call demand_copy_C_string to check if alias string is valid.
11735 There should be a closing `"' and no `\0' in the string. */
11736 alias
= demand_copy_C_string (&len
);
11739 ignore_rest_of_line ();
11743 /* Make a copy of name string. */
11744 len
= strlen (name
) + 1;
11745 obstack_grow (¬es
, name
, len
);
11746 name
= obstack_finish (¬es
);
11751 ahash
= secalias_hash
;
11752 nhash
= secalias_name_hash
;
11757 ahash
= alias_hash
;
11758 nhash
= alias_name_hash
;
11761 /* Check if alias has been used before. */
11762 h
= (struct alias
*) hash_find (ahash
, alias
);
11765 if (strcmp (h
->name
, name
))
11766 as_bad (_("`%s' is already the alias of %s `%s'"),
11767 alias
, kind
, h
->name
);
11771 /* Check if name already has an alias. */
11772 a
= (const char *) hash_find (nhash
, name
);
11775 if (strcmp (a
, alias
))
11776 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11780 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11781 as_where (&h
->file
, &h
->line
);
11784 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11787 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11788 alias
, kind
, error_string
);
11792 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11795 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11796 alias
, kind
, error_string
);
11798 obstack_free (¬es
, name
);
11799 obstack_free (¬es
, alias
);
11802 demand_empty_rest_of_line ();
11805 /* It renames the original symbol name to its alias. */
11807 do_alias (const char *alias
, PTR value
)
11809 struct alias
*h
= (struct alias
*) value
;
11810 symbolS
*sym
= symbol_find (h
->name
);
11813 as_warn_where (h
->file
, h
->line
,
11814 _("symbol `%s' aliased to `%s' is not used"),
11817 S_SET_NAME (sym
, (char *) alias
);
11820 /* Called from write_object_file. */
11822 ia64_adjust_symtab (void)
11824 hash_traverse (alias_hash
, do_alias
);
11827 /* It renames the original section name to its alias. */
11829 do_secalias (const char *alias
, PTR value
)
11831 struct alias
*h
= (struct alias
*) value
;
11832 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11835 as_warn_where (h
->file
, h
->line
,
11836 _("section `%s' aliased to `%s' is not used"),
11842 /* Called from write_object_file. */
11844 ia64_frob_file (void)
11846 hash_traverse (secalias_hash
, do_secalias
);