1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
58 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
59 #define MIN(a,b) ((a) < (b) ? (a) : (b))
62 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
63 #define CURR_SLOT md.slot[md.curr_slot]
65 #define O_pseudo_fixup (O_max + 1)
69 /* IA-64 ABI section pseudo-ops. */
70 SPECIAL_SECTION_BSS
= 0,
72 SPECIAL_SECTION_SDATA
,
73 SPECIAL_SECTION_RODATA
,
74 SPECIAL_SECTION_COMMENT
,
75 SPECIAL_SECTION_UNWIND
,
76 SPECIAL_SECTION_UNWIND_INFO
,
77 /* HPUX specific section pseudo-ops. */
78 SPECIAL_SECTION_INIT_ARRAY
,
79 SPECIAL_SECTION_FINI_ARRAY
,
96 FUNC_LT_FPTR_RELATIVE
,
106 REG_FR
= (REG_GR
+ 128),
107 REG_AR
= (REG_FR
+ 128),
108 REG_CR
= (REG_AR
+ 128),
109 REG_P
= (REG_CR
+ 128),
110 REG_BR
= (REG_P
+ 64),
111 REG_IP
= (REG_BR
+ 8),
118 /* The following are pseudo-registers for use by gas only. */
130 /* The following pseudo-registers are used for unwind directives only: */
138 DYNREG_GR
= 0, /* dynamic general purpose register */
139 DYNREG_FR
, /* dynamic floating point register */
140 DYNREG_PR
, /* dynamic predicate register */
144 enum operand_match_result
147 OPERAND_OUT_OF_RANGE
,
151 /* On the ia64, we can't know the address of a text label until the
152 instructions are packed into a bundle. To handle this, we keep
153 track of the list of labels that appear in front of each
157 struct label_fix
*next
;
161 /* This is the endianness of the current section. */
162 extern int target_big_endian
;
164 /* This is the default endianness. */
165 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
167 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
169 static void ia64_float_to_chars_bigendian
170 PARAMS ((char *, LITTLENUM_TYPE
*, int));
171 static void ia64_float_to_chars_littleendian
172 PARAMS ((char *, LITTLENUM_TYPE
*, int));
173 static void (*ia64_float_to_chars
)
174 PARAMS ((char *, LITTLENUM_TYPE
*, int));
176 static struct hash_control
*alias_hash
;
177 static struct hash_control
*alias_name_hash
;
178 static struct hash_control
*secalias_hash
;
179 static struct hash_control
*secalias_name_hash
;
181 /* List of chars besides those in app.c:symbol_chars that can start an
182 operand. Used to prevent the scrubber eating vital white-space. */
183 const char ia64_symbol_chars
[] = "@?";
185 /* Characters which always start a comment. */
186 const char comment_chars
[] = "";
188 /* Characters which start a comment at the beginning of a line. */
189 const char line_comment_chars
[] = "#";
191 /* Characters which may be used to separate multiple commands on a
193 const char line_separator_chars
[] = ";";
195 /* Characters which are used to indicate an exponent in a floating
197 const char EXP_CHARS
[] = "eE";
199 /* Characters which mean that a number is a floating point constant,
201 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
203 /* ia64-specific option processing: */
205 const char *md_shortopts
= "m:N:x::";
207 struct option md_longopts
[] =
209 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
210 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
211 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
212 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
215 size_t md_longopts_size
= sizeof (md_longopts
);
219 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
220 struct hash_control
*reg_hash
; /* register name hash table */
221 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
222 struct hash_control
*const_hash
; /* constant hash table */
223 struct hash_control
*entry_hash
; /* code entry hint hash table */
225 symbolS
*regsym
[REG_NUM
];
227 /* If X_op is != O_absent, the registername for the instruction's
228 qualifying predicate. If NULL, p0 is assumed for instructions
229 that are predicatable. */
232 /* What to do when hint.b is used. */
244 explicit_mode
: 1, /* which mode we're in */
245 default_explicit_mode
: 1, /* which mode is the default */
246 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
248 keep_pending_output
: 1;
250 /* What to do when something is wrong with unwind directives. */
253 unwind_check_warning
,
257 /* Each bundle consists of up to three instructions. We keep
258 track of four most recent instructions so we can correctly set
259 the end_of_insn_group for the last instruction in a bundle. */
261 int num_slots_in_use
;
265 end_of_insn_group
: 1,
266 manual_bundling_on
: 1,
267 manual_bundling_off
: 1,
268 loc_directive_seen
: 1;
269 signed char user_template
; /* user-selected template, if any */
270 unsigned char qp_regno
; /* qualifying predicate */
271 /* This duplicates a good fraction of "struct fix" but we
272 can't use a "struct fix" instead since we can't call
273 fix_new_exp() until we know the address of the instruction. */
277 bfd_reloc_code_real_type code
;
278 enum ia64_opnd opnd
; /* type of operand in need of fix */
279 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
280 expressionS expr
; /* the value to be inserted */
282 fixup
[2]; /* at most two fixups per insn */
283 struct ia64_opcode
*idesc
;
284 struct label_fix
*label_fixups
;
285 struct label_fix
*tag_fixups
;
286 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
289 unsigned int src_line
;
290 struct dwarf2_line_info debug_line
;
298 struct dynreg
*next
; /* next dynamic register */
300 unsigned short base
; /* the base register number */
301 unsigned short num_regs
; /* # of registers in this set */
303 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
305 flagword flags
; /* ELF-header flags */
308 unsigned hint
:1; /* is this hint currently valid? */
309 bfd_vma offset
; /* mem.offset offset */
310 bfd_vma base
; /* mem.offset base */
313 int path
; /* number of alt. entry points seen */
314 const char **entry_labels
; /* labels of all alternate paths in
315 the current DV-checking block. */
316 int maxpaths
; /* size currently allocated for
319 int pointer_size
; /* size in bytes of a pointer */
320 int pointer_size_shift
; /* shift size of a pointer for alignment */
324 /* application registers: */
330 #define AR_BSPSTORE 18
345 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
346 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
347 {"ar.rsc", 16}, {"ar.bsp", 17},
348 {"ar.bspstore", 18}, {"ar.rnat", 19},
349 {"ar.fcr", 21}, {"ar.eflag", 24},
350 {"ar.csd", 25}, {"ar.ssd", 26},
351 {"ar.cflg", 27}, {"ar.fsr", 28},
352 {"ar.fir", 29}, {"ar.fdr", 30},
353 {"ar.ccv", 32}, {"ar.unat", 36},
354 {"ar.fpsr", 40}, {"ar.itc", 44},
355 {"ar.pfs", 64}, {"ar.lc", 65},
376 /* control registers: */
418 static const struct const_desc
425 /* PSR constant masks: */
428 {"psr.be", ((valueT
) 1) << 1},
429 {"psr.up", ((valueT
) 1) << 2},
430 {"psr.ac", ((valueT
) 1) << 3},
431 {"psr.mfl", ((valueT
) 1) << 4},
432 {"psr.mfh", ((valueT
) 1) << 5},
434 {"psr.ic", ((valueT
) 1) << 13},
435 {"psr.i", ((valueT
) 1) << 14},
436 {"psr.pk", ((valueT
) 1) << 15},
438 {"psr.dt", ((valueT
) 1) << 17},
439 {"psr.dfl", ((valueT
) 1) << 18},
440 {"psr.dfh", ((valueT
) 1) << 19},
441 {"psr.sp", ((valueT
) 1) << 20},
442 {"psr.pp", ((valueT
) 1) << 21},
443 {"psr.di", ((valueT
) 1) << 22},
444 {"psr.si", ((valueT
) 1) << 23},
445 {"psr.db", ((valueT
) 1) << 24},
446 {"psr.lp", ((valueT
) 1) << 25},
447 {"psr.tb", ((valueT
) 1) << 26},
448 {"psr.rt", ((valueT
) 1) << 27},
449 /* 28-31: reserved */
450 /* 32-33: cpl (current privilege level) */
451 {"psr.is", ((valueT
) 1) << 34},
452 {"psr.mc", ((valueT
) 1) << 35},
453 {"psr.it", ((valueT
) 1) << 36},
454 {"psr.id", ((valueT
) 1) << 37},
455 {"psr.da", ((valueT
) 1) << 38},
456 {"psr.dd", ((valueT
) 1) << 39},
457 {"psr.ss", ((valueT
) 1) << 40},
458 /* 41-42: ri (restart instruction) */
459 {"psr.ed", ((valueT
) 1) << 43},
460 {"psr.bn", ((valueT
) 1) << 44},
463 /* indirect register-sets/memory: */
472 { "CPUID", IND_CPUID
},
473 { "cpuid", IND_CPUID
},
485 /* Pseudo functions used to indicate relocation types (these functions
486 start with an at sign (@). */
508 /* reloc pseudo functions (these must come first!): */
509 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
510 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
511 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
512 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
513 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
514 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
515 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
516 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
517 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
518 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
519 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
520 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
521 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
522 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
523 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
524 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
525 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
527 /* mbtype4 constants: */
528 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
529 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
530 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
531 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
532 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
534 /* fclass constants: */
535 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
536 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
537 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
538 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
539 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
540 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
541 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
542 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
543 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
545 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
547 /* hint constants: */
548 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
550 /* unwind-related constants: */
551 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
552 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
553 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
554 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
555 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
556 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
557 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
559 /* unwind-related registers: */
560 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
563 /* 41-bit nop opcodes (one per unit): */
564 static const bfd_vma nop
[IA64_NUM_UNITS
] =
566 0x0000000000LL
, /* NIL => break 0 */
567 0x0008000000LL
, /* I-unit nop */
568 0x0008000000LL
, /* M-unit nop */
569 0x4000000000LL
, /* B-unit nop */
570 0x0008000000LL
, /* F-unit nop */
571 0x0008000000LL
, /* L-"unit" nop */
572 0x0008000000LL
, /* X-unit nop */
575 /* Can't be `const' as it's passed to input routines (which have the
576 habit of setting temporary sentinels. */
577 static char special_section_name
[][20] =
579 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
580 {".IA_64.unwind"}, {".IA_64.unwind_info"},
581 {".init_array"}, {".fini_array"}
584 /* The best template for a particular sequence of up to three
586 #define N IA64_NUM_TYPES
587 static unsigned char best_template
[N
][N
][N
];
590 /* Resource dependencies currently in effect */
592 int depind
; /* dependency index */
593 const struct ia64_dependency
*dependency
; /* actual dependency */
594 unsigned specific
:1, /* is this a specific bit/regno? */
595 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
596 int index
; /* specific regno/bit within dependency */
597 int note
; /* optional qualifying note (0 if none) */
601 int insn_srlz
; /* current insn serialization state */
602 int data_srlz
; /* current data serialization state */
603 int qp_regno
; /* qualifying predicate for this usage */
604 char *file
; /* what file marked this dependency */
605 unsigned int line
; /* what line marked this dependency */
606 struct mem_offset mem_offset
; /* optional memory offset hint */
607 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
608 int path
; /* corresponding code entry index */
610 static int regdepslen
= 0;
611 static int regdepstotlen
= 0;
612 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
613 static const char *dv_sem
[] = { "none", "implied", "impliedf",
614 "data", "instr", "specific", "stop", "other" };
615 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
617 /* Current state of PR mutexation */
618 static struct qpmutex
{
621 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
622 static int qp_mutexeslen
= 0;
623 static int qp_mutexestotlen
= 0;
624 static valueT qp_safe_across_calls
= 0;
626 /* Current state of PR implications */
627 static struct qp_imply
{
630 unsigned p2_branched
:1;
632 } *qp_implies
= NULL
;
633 static int qp_implieslen
= 0;
634 static int qp_impliestotlen
= 0;
636 /* Keep track of static GR values so that indirect register usage can
637 sometimes be tracked. */
648 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
654 /* Remember the alignment frag. */
655 static fragS
*align_frag
;
657 /* These are the routines required to output the various types of
660 /* A slot_number is a frag address plus the slot index (0-2). We use the
661 frag address here so that if there is a section switch in the middle of
662 a function, then instructions emitted to a different section are not
663 counted. Since there may be more than one frag for a function, this
664 means we also need to keep track of which frag this address belongs to
665 so we can compute inter-frag distances. This also nicely solves the
666 problem with nops emitted for align directives, which can't easily be
667 counted, but can easily be derived from frag sizes. */
669 typedef struct unw_rec_list
{
671 unsigned long slot_number
;
673 unsigned long next_slot_number
;
674 fragS
*next_slot_frag
;
675 struct unw_rec_list
*next
;
678 #define SLOT_NUM_NOT_SET (unsigned)-1
680 /* Linked list of saved prologue counts. A very poor
681 implementation of a map from label numbers to prologue counts. */
682 typedef struct label_prologue_count
684 struct label_prologue_count
*next
;
685 unsigned long label_number
;
686 unsigned int prologue_count
;
687 } label_prologue_count
;
691 /* Maintain a list of unwind entries for the current function. */
695 /* Any unwind entires that should be attached to the current slot
696 that an insn is being constructed for. */
697 unw_rec_list
*current_entry
;
699 /* These are used to create the unwind table entry for this function. */
701 symbolS
*info
; /* pointer to unwind info */
702 symbolS
*personality_routine
;
704 subsegT saved_text_subseg
;
705 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
707 /* TRUE if processing unwind directives in a prologue region. */
708 unsigned int prologue
: 1;
709 unsigned int prologue_mask
: 4;
710 unsigned int body
: 1;
711 unsigned int insn
: 1;
712 unsigned int prologue_count
; /* number of .prologues seen so far */
713 /* Prologue counts at previous .label_state directives. */
714 struct label_prologue_count
* saved_prologue_counts
;
717 /* The input value is a negated offset from psp, and specifies an address
718 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
719 must add 16 and divide by 4 to get the encoded value. */
721 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
723 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
725 /* Forward declarations: */
726 static void set_section
PARAMS ((char *name
));
727 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
728 unsigned int, unsigned int));
729 static void dot_align (int);
730 static void dot_radix
PARAMS ((int));
731 static void dot_special_section
PARAMS ((int));
732 static void dot_proc
PARAMS ((int));
733 static void dot_fframe
PARAMS ((int));
734 static void dot_vframe
PARAMS ((int));
735 static void dot_vframesp
PARAMS ((int));
736 static void dot_vframepsp
PARAMS ((int));
737 static void dot_save
PARAMS ((int));
738 static void dot_restore
PARAMS ((int));
739 static void dot_restorereg
PARAMS ((int));
740 static void dot_restorereg_p
PARAMS ((int));
741 static void dot_handlerdata
PARAMS ((int));
742 static void dot_unwentry
PARAMS ((int));
743 static void dot_altrp
PARAMS ((int));
744 static void dot_savemem
PARAMS ((int));
745 static void dot_saveg
PARAMS ((int));
746 static void dot_savef
PARAMS ((int));
747 static void dot_saveb
PARAMS ((int));
748 static void dot_savegf
PARAMS ((int));
749 static void dot_spill
PARAMS ((int));
750 static void dot_spillreg
PARAMS ((int));
751 static void dot_spillmem
PARAMS ((int));
752 static void dot_spillreg_p
PARAMS ((int));
753 static void dot_spillmem_p
PARAMS ((int));
754 static void dot_label_state
PARAMS ((int));
755 static void dot_copy_state
PARAMS ((int));
756 static void dot_unwabi
PARAMS ((int));
757 static void dot_personality
PARAMS ((int));
758 static void dot_body
PARAMS ((int));
759 static void dot_prologue
PARAMS ((int));
760 static void dot_endp
PARAMS ((int));
761 static void dot_template
PARAMS ((int));
762 static void dot_regstk
PARAMS ((int));
763 static void dot_rot
PARAMS ((int));
764 static void dot_byteorder
PARAMS ((int));
765 static void dot_psr
PARAMS ((int));
766 static void dot_alias
PARAMS ((int));
767 static void dot_ln
PARAMS ((int));
768 static char *parse_section_name
PARAMS ((void));
769 static void dot_xdata
PARAMS ((int));
770 static void stmt_float_cons
PARAMS ((int));
771 static void stmt_cons_ua
PARAMS ((int));
772 static void dot_xfloat_cons
PARAMS ((int));
773 static void dot_xstringer
PARAMS ((int));
774 static void dot_xdata_ua
PARAMS ((int));
775 static void dot_xfloat_cons_ua
PARAMS ((int));
776 static void print_prmask
PARAMS ((valueT mask
));
777 static void dot_pred_rel
PARAMS ((int));
778 static void dot_reg_val
PARAMS ((int));
779 static void dot_serialize
PARAMS ((int));
780 static void dot_dv_mode
PARAMS ((int));
781 static void dot_entry
PARAMS ((int));
782 static void dot_mem_offset
PARAMS ((int));
783 static void add_unwind_entry
PARAMS((unw_rec_list
*ptr
));
784 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
785 static void declare_register_set
PARAMS ((const char *, int, int));
786 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
787 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
790 static int parse_operand
PARAMS ((expressionS
*e
));
791 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
792 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
793 static void emit_one_bundle
PARAMS ((void));
794 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
795 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
796 bfd_reloc_code_real_type r_type
));
797 static void insn_group_break
PARAMS ((int, int, int));
798 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
799 struct rsrc
*, int depind
, int path
));
800 static void add_qp_mutex
PARAMS((valueT mask
));
801 static void add_qp_imply
PARAMS((int p1
, int p2
));
802 static void clear_qp_branch_flag
PARAMS((valueT mask
));
803 static void clear_qp_mutex
PARAMS((valueT mask
));
804 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
805 static int has_suffix_p
PARAMS((const char *, const char *));
806 static void clear_register_values
PARAMS ((void));
807 static void print_dependency
PARAMS ((const char *action
, int depind
));
808 static void instruction_serialization
PARAMS ((void));
809 static void data_serialization
PARAMS ((void));
810 static void remove_marked_resource
PARAMS ((struct rsrc
*));
811 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
812 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
813 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
814 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
815 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
816 struct ia64_opcode
*, int, struct rsrc
[], int, int));
817 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
818 static void check_dependencies
PARAMS((struct ia64_opcode
*));
819 static void mark_resources
PARAMS((struct ia64_opcode
*));
820 static void update_dependencies
PARAMS((struct ia64_opcode
*));
821 static void note_register_values
PARAMS((struct ia64_opcode
*));
822 static int qp_mutex
PARAMS ((int, int, int));
823 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
824 static void output_vbyte_mem
PARAMS ((int, char *, char *));
825 static void count_output
PARAMS ((int, char *, char *));
826 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
827 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
828 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
829 static void output_P1_format
PARAMS ((vbyte_func
, int));
830 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
831 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
832 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
833 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
834 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
835 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
836 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
837 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
838 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
839 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
840 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
841 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
842 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
843 static char format_ab_reg
PARAMS ((int, int));
844 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
846 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
847 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
849 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
850 static unw_rec_list
*output_endp
PARAMS ((void));
851 static unw_rec_list
*output_prologue
PARAMS ((void));
852 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
853 static unw_rec_list
*output_body
PARAMS ((void));
854 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
855 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
856 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
857 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
858 static unw_rec_list
*output_rp_when
PARAMS ((void));
859 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
860 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
861 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
862 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
863 static unw_rec_list
*output_pfs_when
PARAMS ((void));
864 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
865 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
866 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
867 static unw_rec_list
*output_preds_when
PARAMS ((void));
868 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
869 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
870 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
871 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
872 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
873 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
874 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
875 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
876 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
877 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
878 static unw_rec_list
*output_unat_when
PARAMS ((void));
879 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
880 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
881 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
882 static unw_rec_list
*output_lc_when
PARAMS ((void));
883 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
884 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
885 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
886 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
887 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
888 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
889 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
890 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
891 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
892 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
893 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
894 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
895 static unw_rec_list
*output_bsp_when
PARAMS ((void));
896 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
897 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
898 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
899 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
900 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
901 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
902 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
903 static unw_rec_list
*output_rnat_when
PARAMS ((void));
904 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
905 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
906 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
907 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
908 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
909 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
910 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
911 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int));
912 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int));
913 static unw_rec_list
*output_spill_psprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
915 static unw_rec_list
*output_spill_sprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
917 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
919 static unw_rec_list
*output_spill_reg_p
PARAMS ((unsigned int, unsigned int, unsigned int,
920 unsigned int, unsigned int));
921 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
922 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
923 static int calc_record_size
PARAMS ((unw_rec_list
*));
924 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
925 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
926 unsigned long, fragS
*,
928 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
929 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
930 static int convert_expr_to_ab_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
931 static int convert_expr_to_xy_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
932 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
933 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
934 static void free_saved_prologue_counts
PARAMS ((void));
936 /* Determine if application register REGNUM resides only in the integer
937 unit (as opposed to the memory unit). */
939 ar_is_only_in_integer_unit (int reg
)
942 return reg
>= 64 && reg
<= 111;
945 /* Determine if application register REGNUM resides only in the memory
946 unit (as opposed to the integer unit). */
948 ar_is_only_in_memory_unit (int reg
)
951 return reg
>= 0 && reg
<= 47;
954 /* Switch to section NAME and create section if necessary. It's
955 rather ugly that we have to manipulate input_line_pointer but I
956 don't see any other way to accomplish the same thing without
957 changing obj-elf.c (which may be the Right Thing, in the end). */
962 char *saved_input_line_pointer
;
964 saved_input_line_pointer
= input_line_pointer
;
965 input_line_pointer
= name
;
967 input_line_pointer
= saved_input_line_pointer
;
970 /* Map 's' to SHF_IA_64_SHORT. */
973 ia64_elf_section_letter (letter
, ptr_msg
)
978 return SHF_IA_64_SHORT
;
979 else if (letter
== 'o')
980 return SHF_LINK_ORDER
;
982 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
986 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
989 ia64_elf_section_flags (flags
, attr
, type
)
991 int attr
, type ATTRIBUTE_UNUSED
;
993 if (attr
& SHF_IA_64_SHORT
)
994 flags
|= SEC_SMALL_DATA
;
999 ia64_elf_section_type (str
, len
)
1003 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1005 if (STREQ (ELF_STRING_ia64_unwind_info
))
1006 return SHT_PROGBITS
;
1008 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
1009 return SHT_PROGBITS
;
1011 if (STREQ (ELF_STRING_ia64_unwind
))
1012 return SHT_IA_64_UNWIND
;
1014 if (STREQ (ELF_STRING_ia64_unwind_once
))
1015 return SHT_IA_64_UNWIND
;
1017 if (STREQ ("unwind"))
1018 return SHT_IA_64_UNWIND
;
1025 set_regstack (ins
, locs
, outs
, rots
)
1026 unsigned int ins
, locs
, outs
, rots
;
1028 /* Size of frame. */
1031 sof
= ins
+ locs
+ outs
;
1034 as_bad ("Size of frame exceeds maximum of 96 registers");
1039 as_warn ("Size of rotating registers exceeds frame size");
1042 md
.in
.base
= REG_GR
+ 32;
1043 md
.loc
.base
= md
.in
.base
+ ins
;
1044 md
.out
.base
= md
.loc
.base
+ locs
;
1046 md
.in
.num_regs
= ins
;
1047 md
.loc
.num_regs
= locs
;
1048 md
.out
.num_regs
= outs
;
1049 md
.rot
.num_regs
= rots
;
1056 struct label_fix
*lfix
;
1058 subsegT saved_subseg
;
1061 if (!md
.last_text_seg
)
1064 saved_seg
= now_seg
;
1065 saved_subseg
= now_subseg
;
1067 subseg_set (md
.last_text_seg
, 0);
1069 while (md
.num_slots_in_use
> 0)
1070 emit_one_bundle (); /* force out queued instructions */
1072 /* In case there are labels following the last instruction, resolve
1074 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1076 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1077 symbol_set_frag (lfix
->sym
, frag_now
);
1079 CURR_SLOT
.label_fixups
= 0;
1080 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1082 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1083 symbol_set_frag (lfix
->sym
, frag_now
);
1085 CURR_SLOT
.tag_fixups
= 0;
1087 /* In case there are unwind directives following the last instruction,
1088 resolve those now. We only handle prologue, body, and endp directives
1089 here. Give an error for others. */
1090 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1092 switch (ptr
->r
.type
)
1098 ptr
->slot_number
= (unsigned long) frag_more (0);
1099 ptr
->slot_frag
= frag_now
;
1102 /* Allow any record which doesn't have a "t" field (i.e.,
1103 doesn't relate to a particular instruction). */
1119 as_bad (_("Unwind directive not followed by an instruction."));
1123 unwind
.current_entry
= NULL
;
1125 subseg_set (saved_seg
, saved_subseg
);
1127 if (md
.qp
.X_op
== O_register
)
1128 as_bad ("qualifying predicate not followed by instruction");
1132 ia64_do_align (int nbytes
)
1134 char *saved_input_line_pointer
= input_line_pointer
;
1136 input_line_pointer
= "";
1137 s_align_bytes (nbytes
);
1138 input_line_pointer
= saved_input_line_pointer
;
1142 ia64_cons_align (nbytes
)
1147 char *saved_input_line_pointer
= input_line_pointer
;
1148 input_line_pointer
= "";
1149 s_align_bytes (nbytes
);
1150 input_line_pointer
= saved_input_line_pointer
;
1154 /* Output COUNT bytes to a memory location. */
1155 static unsigned char *vbyte_mem_ptr
= NULL
;
1158 output_vbyte_mem (count
, ptr
, comment
)
1161 char *comment ATTRIBUTE_UNUSED
;
1164 if (vbyte_mem_ptr
== NULL
)
1169 for (x
= 0; x
< count
; x
++)
1170 *(vbyte_mem_ptr
++) = ptr
[x
];
1173 /* Count the number of bytes required for records. */
1174 static int vbyte_count
= 0;
1176 count_output (count
, ptr
, comment
)
1178 char *ptr ATTRIBUTE_UNUSED
;
1179 char *comment ATTRIBUTE_UNUSED
;
1181 vbyte_count
+= count
;
1185 output_R1_format (f
, rtype
, rlen
)
1187 unw_record_type rtype
;
1194 output_R3_format (f
, rtype
, rlen
);
1200 else if (rtype
!= prologue
)
1201 as_bad ("record type is not valid");
1203 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1204 (*f
) (1, &byte
, NULL
);
1208 output_R2_format (f
, mask
, grsave
, rlen
)
1215 mask
= (mask
& 0x0f);
1216 grsave
= (grsave
& 0x7f);
1218 bytes
[0] = (UNW_R2
| (mask
>> 1));
1219 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1220 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1221 (*f
) (count
, bytes
, NULL
);
1225 output_R3_format (f
, rtype
, rlen
)
1227 unw_record_type rtype
;
1234 output_R1_format (f
, rtype
, rlen
);
1240 else if (rtype
!= prologue
)
1241 as_bad ("record type is not valid");
1242 bytes
[0] = (UNW_R3
| r
);
1243 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1244 (*f
) (count
+ 1, bytes
, NULL
);
1248 output_P1_format (f
, brmask
)
1253 byte
= UNW_P1
| (brmask
& 0x1f);
1254 (*f
) (1, &byte
, NULL
);
1258 output_P2_format (f
, brmask
, gr
)
1264 brmask
= (brmask
& 0x1f);
1265 bytes
[0] = UNW_P2
| (brmask
>> 1);
1266 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1267 (*f
) (2, bytes
, NULL
);
1271 output_P3_format (f
, rtype
, reg
)
1273 unw_record_type rtype
;
1318 as_bad ("Invalid record type for P3 format.");
1320 bytes
[0] = (UNW_P3
| (r
>> 1));
1321 bytes
[1] = (((r
& 1) << 7) | reg
);
1322 (*f
) (2, bytes
, NULL
);
1326 output_P4_format (f
, imask
, imask_size
)
1328 unsigned char *imask
;
1329 unsigned long imask_size
;
1332 (*f
) (imask_size
, imask
, NULL
);
1336 output_P5_format (f
, grmask
, frmask
)
1339 unsigned long frmask
;
1342 grmask
= (grmask
& 0x0f);
1345 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1346 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1347 bytes
[3] = (frmask
& 0x000000ff);
1348 (*f
) (4, bytes
, NULL
);
1352 output_P6_format (f
, rtype
, rmask
)
1354 unw_record_type rtype
;
1360 if (rtype
== gr_mem
)
1362 else if (rtype
!= fr_mem
)
1363 as_bad ("Invalid record type for format P6");
1364 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1365 (*f
) (1, &byte
, NULL
);
1369 output_P7_format (f
, rtype
, w1
, w2
)
1371 unw_record_type rtype
;
1378 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1383 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1433 bytes
[0] = (UNW_P7
| r
);
1434 (*f
) (count
, bytes
, NULL
);
1438 output_P8_format (f
, rtype
, t
)
1440 unw_record_type rtype
;
1479 case bspstore_psprel
:
1482 case bspstore_sprel
:
1494 case priunat_when_gr
:
1497 case priunat_psprel
:
1503 case priunat_when_mem
:
1510 count
+= output_leb128 (bytes
+ 2, t
, 0);
1511 (*f
) (count
, bytes
, NULL
);
1515 output_P9_format (f
, grmask
, gr
)
1522 bytes
[1] = (grmask
& 0x0f);
1523 bytes
[2] = (gr
& 0x7f);
1524 (*f
) (3, bytes
, NULL
);
1528 output_P10_format (f
, abi
, context
)
1535 bytes
[1] = (abi
& 0xff);
1536 bytes
[2] = (context
& 0xff);
1537 (*f
) (3, bytes
, NULL
);
1541 output_B1_format (f
, rtype
, label
)
1543 unw_record_type rtype
;
1544 unsigned long label
;
1550 output_B4_format (f
, rtype
, label
);
1553 if (rtype
== copy_state
)
1555 else if (rtype
!= label_state
)
1556 as_bad ("Invalid record type for format B1");
1558 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1559 (*f
) (1, &byte
, NULL
);
1563 output_B2_format (f
, ecount
, t
)
1565 unsigned long ecount
;
1572 output_B3_format (f
, ecount
, t
);
1575 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1576 count
+= output_leb128 (bytes
+ 1, t
, 0);
1577 (*f
) (count
, bytes
, NULL
);
1581 output_B3_format (f
, ecount
, t
)
1583 unsigned long ecount
;
1590 output_B2_format (f
, ecount
, t
);
1594 count
+= output_leb128 (bytes
+ 1, t
, 0);
1595 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1596 (*f
) (count
, bytes
, NULL
);
1600 output_B4_format (f
, rtype
, label
)
1602 unw_record_type rtype
;
1603 unsigned long label
;
1610 output_B1_format (f
, rtype
, label
);
1614 if (rtype
== copy_state
)
1616 else if (rtype
!= label_state
)
1617 as_bad ("Invalid record type for format B1");
1619 bytes
[0] = (UNW_B4
| (r
<< 3));
1620 count
+= output_leb128 (bytes
+ 1, label
, 0);
1621 (*f
) (count
, bytes
, NULL
);
1625 format_ab_reg (ab
, reg
)
1632 ret
= (ab
<< 5) | reg
;
1637 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1639 unw_record_type rtype
;
1649 if (rtype
== spill_sprel
)
1651 else if (rtype
!= spill_psprel
)
1652 as_bad ("Invalid record type for format X1");
1653 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1654 count
+= output_leb128 (bytes
+ 2, t
, 0);
1655 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1656 (*f
) (count
, bytes
, NULL
);
1660 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1669 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1670 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1671 count
+= output_leb128 (bytes
+ 3, t
, 0);
1672 (*f
) (count
, bytes
, NULL
);
1676 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1678 unw_record_type rtype
;
1689 if (rtype
== spill_sprel_p
)
1691 else if (rtype
!= spill_psprel_p
)
1692 as_bad ("Invalid record type for format X3");
1693 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1694 bytes
[2] = format_ab_reg (ab
, reg
);
1695 count
+= output_leb128 (bytes
+ 3, t
, 0);
1696 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1697 (*f
) (count
, bytes
, NULL
);
1701 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1711 bytes
[1] = (qp
& 0x3f);
1712 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1713 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1714 count
+= output_leb128 (bytes
+ 4, t
, 0);
1715 (*f
) (count
, bytes
, NULL
);
1718 /* This function allocates a record list structure, and initializes fields. */
1720 static unw_rec_list
*
1721 alloc_record (unw_record_type t
)
1724 ptr
= xmalloc (sizeof (*ptr
));
1726 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1728 ptr
->next_slot_number
= 0;
1729 ptr
->next_slot_frag
= 0;
1733 /* Dummy unwind record used for calculating the length of the last prologue or
1736 static unw_rec_list
*
1739 unw_rec_list
*ptr
= alloc_record (endp
);
1743 static unw_rec_list
*
1746 unw_rec_list
*ptr
= alloc_record (prologue
);
1747 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1751 static unw_rec_list
*
1752 output_prologue_gr (saved_mask
, reg
)
1753 unsigned int saved_mask
;
1756 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1757 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1758 ptr
->r
.record
.r
.grmask
= saved_mask
;
1759 ptr
->r
.record
.r
.grsave
= reg
;
1763 static unw_rec_list
*
1766 unw_rec_list
*ptr
= alloc_record (body
);
1770 static unw_rec_list
*
1771 output_mem_stack_f (size
)
1774 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1775 ptr
->r
.record
.p
.size
= size
;
1779 static unw_rec_list
*
1780 output_mem_stack_v ()
1782 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1786 static unw_rec_list
*
1790 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1791 ptr
->r
.record
.p
.gr
= gr
;
1795 static unw_rec_list
*
1796 output_psp_sprel (offset
)
1797 unsigned int offset
;
1799 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1800 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1804 static unw_rec_list
*
1807 unw_rec_list
*ptr
= alloc_record (rp_when
);
1811 static unw_rec_list
*
1815 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1816 ptr
->r
.record
.p
.gr
= gr
;
1820 static unw_rec_list
*
1824 unw_rec_list
*ptr
= alloc_record (rp_br
);
1825 ptr
->r
.record
.p
.br
= br
;
1829 static unw_rec_list
*
1830 output_rp_psprel (offset
)
1831 unsigned int offset
;
1833 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1834 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1838 static unw_rec_list
*
1839 output_rp_sprel (offset
)
1840 unsigned int offset
;
1842 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1843 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1847 static unw_rec_list
*
1850 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1854 static unw_rec_list
*
1858 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1859 ptr
->r
.record
.p
.gr
= gr
;
1863 static unw_rec_list
*
1864 output_pfs_psprel (offset
)
1865 unsigned int offset
;
1867 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1868 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1872 static unw_rec_list
*
1873 output_pfs_sprel (offset
)
1874 unsigned int offset
;
1876 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1877 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1881 static unw_rec_list
*
1882 output_preds_when ()
1884 unw_rec_list
*ptr
= alloc_record (preds_when
);
1888 static unw_rec_list
*
1889 output_preds_gr (gr
)
1892 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1893 ptr
->r
.record
.p
.gr
= gr
;
1897 static unw_rec_list
*
1898 output_preds_psprel (offset
)
1899 unsigned int offset
;
1901 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1902 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1906 static unw_rec_list
*
1907 output_preds_sprel (offset
)
1908 unsigned int offset
;
1910 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1911 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1915 static unw_rec_list
*
1916 output_fr_mem (mask
)
1919 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1920 ptr
->r
.record
.p
.rmask
= mask
;
1924 static unw_rec_list
*
1925 output_frgr_mem (gr_mask
, fr_mask
)
1926 unsigned int gr_mask
;
1927 unsigned int fr_mask
;
1929 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1930 ptr
->r
.record
.p
.grmask
= gr_mask
;
1931 ptr
->r
.record
.p
.frmask
= fr_mask
;
1935 static unw_rec_list
*
1936 output_gr_gr (mask
, reg
)
1940 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1941 ptr
->r
.record
.p
.grmask
= mask
;
1942 ptr
->r
.record
.p
.gr
= reg
;
1946 static unw_rec_list
*
1947 output_gr_mem (mask
)
1950 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1951 ptr
->r
.record
.p
.rmask
= mask
;
1955 static unw_rec_list
*
1956 output_br_mem (unsigned int mask
)
1958 unw_rec_list
*ptr
= alloc_record (br_mem
);
1959 ptr
->r
.record
.p
.brmask
= mask
;
1963 static unw_rec_list
*
1964 output_br_gr (save_mask
, reg
)
1965 unsigned int save_mask
;
1968 unw_rec_list
*ptr
= alloc_record (br_gr
);
1969 ptr
->r
.record
.p
.brmask
= save_mask
;
1970 ptr
->r
.record
.p
.gr
= reg
;
1974 static unw_rec_list
*
1975 output_spill_base (offset
)
1976 unsigned int offset
;
1978 unw_rec_list
*ptr
= alloc_record (spill_base
);
1979 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1983 static unw_rec_list
*
1986 unw_rec_list
*ptr
= alloc_record (unat_when
);
1990 static unw_rec_list
*
1994 unw_rec_list
*ptr
= alloc_record (unat_gr
);
1995 ptr
->r
.record
.p
.gr
= gr
;
1999 static unw_rec_list
*
2000 output_unat_psprel (offset
)
2001 unsigned int offset
;
2003 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2004 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2008 static unw_rec_list
*
2009 output_unat_sprel (offset
)
2010 unsigned int offset
;
2012 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2013 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2017 static unw_rec_list
*
2020 unw_rec_list
*ptr
= alloc_record (lc_when
);
2024 static unw_rec_list
*
2028 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2029 ptr
->r
.record
.p
.gr
= gr
;
2033 static unw_rec_list
*
2034 output_lc_psprel (offset
)
2035 unsigned int offset
;
2037 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2038 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2042 static unw_rec_list
*
2043 output_lc_sprel (offset
)
2044 unsigned int offset
;
2046 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2047 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2051 static unw_rec_list
*
2054 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2058 static unw_rec_list
*
2062 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2063 ptr
->r
.record
.p
.gr
= gr
;
2067 static unw_rec_list
*
2068 output_fpsr_psprel (offset
)
2069 unsigned int offset
;
2071 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2072 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2076 static unw_rec_list
*
2077 output_fpsr_sprel (offset
)
2078 unsigned int offset
;
2080 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2081 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2085 static unw_rec_list
*
2086 output_priunat_when_gr ()
2088 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2092 static unw_rec_list
*
2093 output_priunat_when_mem ()
2095 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2099 static unw_rec_list
*
2100 output_priunat_gr (gr
)
2103 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2104 ptr
->r
.record
.p
.gr
= gr
;
2108 static unw_rec_list
*
2109 output_priunat_psprel (offset
)
2110 unsigned int offset
;
2112 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2113 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2117 static unw_rec_list
*
2118 output_priunat_sprel (offset
)
2119 unsigned int offset
;
2121 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2122 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2126 static unw_rec_list
*
2129 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2133 static unw_rec_list
*
2137 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2138 ptr
->r
.record
.p
.gr
= gr
;
2142 static unw_rec_list
*
2143 output_bsp_psprel (offset
)
2144 unsigned int offset
;
2146 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2147 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2151 static unw_rec_list
*
2152 output_bsp_sprel (offset
)
2153 unsigned int offset
;
2155 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2156 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2160 static unw_rec_list
*
2161 output_bspstore_when ()
2163 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2167 static unw_rec_list
*
2168 output_bspstore_gr (gr
)
2171 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2172 ptr
->r
.record
.p
.gr
= gr
;
2176 static unw_rec_list
*
2177 output_bspstore_psprel (offset
)
2178 unsigned int offset
;
2180 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2181 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2185 static unw_rec_list
*
2186 output_bspstore_sprel (offset
)
2187 unsigned int offset
;
2189 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2190 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2194 static unw_rec_list
*
2197 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2201 static unw_rec_list
*
2205 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2206 ptr
->r
.record
.p
.gr
= gr
;
2210 static unw_rec_list
*
2211 output_rnat_psprel (offset
)
2212 unsigned int offset
;
2214 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2215 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2219 static unw_rec_list
*
2220 output_rnat_sprel (offset
)
2221 unsigned int offset
;
2223 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2224 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2228 static unw_rec_list
*
2229 output_unwabi (abi
, context
)
2231 unsigned long context
;
2233 unw_rec_list
*ptr
= alloc_record (unwabi
);
2234 ptr
->r
.record
.p
.abi
= abi
;
2235 ptr
->r
.record
.p
.context
= context
;
2239 static unw_rec_list
*
2240 output_epilogue (unsigned long ecount
)
2242 unw_rec_list
*ptr
= alloc_record (epilogue
);
2243 ptr
->r
.record
.b
.ecount
= ecount
;
2247 static unw_rec_list
*
2248 output_label_state (unsigned long label
)
2250 unw_rec_list
*ptr
= alloc_record (label_state
);
2251 ptr
->r
.record
.b
.label
= label
;
2255 static unw_rec_list
*
2256 output_copy_state (unsigned long label
)
2258 unw_rec_list
*ptr
= alloc_record (copy_state
);
2259 ptr
->r
.record
.b
.label
= label
;
2263 static unw_rec_list
*
2264 output_spill_psprel (ab
, reg
, offset
)
2267 unsigned int offset
;
2269 unw_rec_list
*ptr
= alloc_record (spill_psprel
);
2270 ptr
->r
.record
.x
.ab
= ab
;
2271 ptr
->r
.record
.x
.reg
= reg
;
2272 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2276 static unw_rec_list
*
2277 output_spill_sprel (ab
, reg
, offset
)
2280 unsigned int offset
;
2282 unw_rec_list
*ptr
= alloc_record (spill_sprel
);
2283 ptr
->r
.record
.x
.ab
= ab
;
2284 ptr
->r
.record
.x
.reg
= reg
;
2285 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2289 static unw_rec_list
*
2290 output_spill_psprel_p (ab
, reg
, offset
, predicate
)
2293 unsigned int offset
;
2294 unsigned int predicate
;
2296 unw_rec_list
*ptr
= alloc_record (spill_psprel_p
);
2297 ptr
->r
.record
.x
.ab
= ab
;
2298 ptr
->r
.record
.x
.reg
= reg
;
2299 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2300 ptr
->r
.record
.x
.qp
= predicate
;
2304 static unw_rec_list
*
2305 output_spill_sprel_p (ab
, reg
, offset
, predicate
)
2308 unsigned int offset
;
2309 unsigned int predicate
;
2311 unw_rec_list
*ptr
= alloc_record (spill_sprel_p
);
2312 ptr
->r
.record
.x
.ab
= ab
;
2313 ptr
->r
.record
.x
.reg
= reg
;
2314 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2315 ptr
->r
.record
.x
.qp
= predicate
;
2319 static unw_rec_list
*
2320 output_spill_reg (ab
, reg
, targ_reg
, xy
)
2323 unsigned int targ_reg
;
2326 unw_rec_list
*ptr
= alloc_record (spill_reg
);
2327 ptr
->r
.record
.x
.ab
= ab
;
2328 ptr
->r
.record
.x
.reg
= reg
;
2329 ptr
->r
.record
.x
.treg
= targ_reg
;
2330 ptr
->r
.record
.x
.xy
= xy
;
2334 static unw_rec_list
*
2335 output_spill_reg_p (ab
, reg
, targ_reg
, xy
, predicate
)
2338 unsigned int targ_reg
;
2340 unsigned int predicate
;
2342 unw_rec_list
*ptr
= alloc_record (spill_reg_p
);
2343 ptr
->r
.record
.x
.ab
= ab
;
2344 ptr
->r
.record
.x
.reg
= reg
;
2345 ptr
->r
.record
.x
.treg
= targ_reg
;
2346 ptr
->r
.record
.x
.xy
= xy
;
2347 ptr
->r
.record
.x
.qp
= predicate
;
2351 /* Given a unw_rec_list process the correct format with the
2352 specified function. */
2355 process_one_record (ptr
, f
)
2359 unsigned long fr_mask
, gr_mask
;
2361 switch (ptr
->r
.type
)
2363 /* This is a dummy record that takes up no space in the output. */
2371 /* These are taken care of by prologue/prologue_gr. */
2376 if (ptr
->r
.type
== prologue_gr
)
2377 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2378 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2380 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2382 /* Output descriptor(s) for union of register spills (if any). */
2383 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2384 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2387 if ((fr_mask
& ~0xfUL
) == 0)
2388 output_P6_format (f
, fr_mem
, fr_mask
);
2391 output_P5_format (f
, gr_mask
, fr_mask
);
2396 output_P6_format (f
, gr_mem
, gr_mask
);
2397 if (ptr
->r
.record
.r
.mask
.br_mem
)
2398 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2400 /* output imask descriptor if necessary: */
2401 if (ptr
->r
.record
.r
.mask
.i
)
2402 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2403 ptr
->r
.record
.r
.imask_size
);
2407 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2411 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2412 ptr
->r
.record
.p
.size
);
2425 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2428 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2431 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2439 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2448 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2458 case bspstore_sprel
:
2460 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2463 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2466 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2469 as_bad ("spill_mask record unimplemented.");
2471 case priunat_when_gr
:
2472 case priunat_when_mem
:
2476 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2478 case priunat_psprel
:
2480 case bspstore_psprel
:
2482 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2485 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2488 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2492 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2495 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2496 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2497 ptr
->r
.record
.x
.pspoff
);
2500 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2501 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2502 ptr
->r
.record
.x
.spoff
);
2505 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2506 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2507 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2509 case spill_psprel_p
:
2510 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2511 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2512 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2515 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2516 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2517 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2520 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2521 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2522 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2526 as_bad ("record_type_not_valid");
2531 /* Given a unw_rec_list list, process all the records with
2532 the specified function. */
2534 process_unw_records (list
, f
)
2539 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2540 process_one_record (ptr
, f
);
2543 /* Determine the size of a record list in bytes. */
2545 calc_record_size (list
)
2549 process_unw_records (list
, count_output
);
2553 /* Update IMASK bitmask to reflect the fact that one or more registers
2554 of type TYPE are saved starting at instruction with index T. If N
2555 bits are set in REGMASK, it is assumed that instructions T through
2556 T+N-1 save these registers.
2560 1: instruction saves next fp reg
2561 2: instruction saves next general reg
2562 3: instruction saves next branch reg */
2564 set_imask (region
, regmask
, t
, type
)
2565 unw_rec_list
*region
;
2566 unsigned long regmask
;
2570 unsigned char *imask
;
2571 unsigned long imask_size
;
2575 imask
= region
->r
.record
.r
.mask
.i
;
2576 imask_size
= region
->r
.record
.r
.imask_size
;
2579 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2580 imask
= xmalloc (imask_size
);
2581 memset (imask
, 0, imask_size
);
2583 region
->r
.record
.r
.imask_size
= imask_size
;
2584 region
->r
.record
.r
.mask
.i
= imask
;
2588 pos
= 2 * (3 - t
% 4);
2591 if (i
>= imask_size
)
2593 as_bad ("Ignoring attempt to spill beyond end of region");
2597 imask
[i
] |= (type
& 0x3) << pos
;
2599 regmask
&= (regmask
- 1);
2609 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2610 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2611 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2615 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2616 unsigned long slot_addr
;
2618 unsigned long first_addr
;
2622 unsigned long index
= 0;
2624 /* First time we are called, the initial address and frag are invalid. */
2625 if (first_addr
== 0)
2628 /* If the two addresses are in different frags, then we need to add in
2629 the remaining size of this frag, and then the entire size of intermediate
2631 while (slot_frag
!= first_frag
)
2633 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2637 /* We can get the final addresses only during and after
2639 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2640 index
+= 3 * ((first_frag
->fr_next
->fr_address
2641 - first_frag
->fr_address
2642 - first_frag
->fr_fix
) >> 4);
2645 /* We don't know what the final addresses will be. We try our
2646 best to estimate. */
2647 switch (first_frag
->fr_type
)
2653 as_fatal ("only constant space allocation is supported");
2659 /* Take alignment into account. Assume the worst case
2660 before relaxation. */
2661 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2665 if (first_frag
->fr_symbol
)
2667 as_fatal ("only constant offsets are supported");
2671 index
+= 3 * (first_frag
->fr_offset
>> 4);
2675 /* Add in the full size of the frag converted to instruction slots. */
2676 index
+= 3 * (first_frag
->fr_fix
>> 4);
2677 /* Subtract away the initial part before first_addr. */
2678 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2679 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2681 /* Move to the beginning of the next frag. */
2682 first_frag
= first_frag
->fr_next
;
2683 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2686 /* Add in the used part of the last frag. */
2687 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2688 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2692 /* Optimize unwind record directives. */
2694 static unw_rec_list
*
2695 optimize_unw_records (list
)
2701 /* If the only unwind record is ".prologue" or ".prologue" followed
2702 by ".body", then we can optimize the unwind directives away. */
2703 if (list
->r
.type
== prologue
2704 && (list
->next
->r
.type
== endp
2705 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2711 /* Given a complete record list, process any records which have
2712 unresolved fields, (ie length counts for a prologue). After
2713 this has been run, all necessary information should be available
2714 within each record to generate an image. */
2717 fixup_unw_records (list
, before_relax
)
2721 unw_rec_list
*ptr
, *region
= 0;
2722 unsigned long first_addr
= 0, rlen
= 0, t
;
2723 fragS
*first_frag
= 0;
2725 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2727 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2728 as_bad (" Insn slot not set in unwind record.");
2729 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2730 first_addr
, first_frag
, before_relax
);
2731 switch (ptr
->r
.type
)
2739 unsigned long last_addr
= 0;
2740 fragS
*last_frag
= NULL
;
2742 first_addr
= ptr
->slot_number
;
2743 first_frag
= ptr
->slot_frag
;
2744 /* Find either the next body/prologue start, or the end of
2745 the function, and determine the size of the region. */
2746 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2747 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2748 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2750 last_addr
= last
->slot_number
;
2751 last_frag
= last
->slot_frag
;
2754 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2756 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2757 if (ptr
->r
.type
== body
)
2758 /* End of region. */
2766 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2768 /* This happens when a memory-stack-less procedure uses a
2769 ".restore sp" directive at the end of a region to pop
2771 ptr
->r
.record
.b
.t
= 0;
2782 case priunat_when_gr
:
2783 case priunat_when_mem
:
2787 ptr
->r
.record
.p
.t
= t
;
2795 case spill_psprel_p
:
2796 ptr
->r
.record
.x
.t
= t
;
2802 as_bad ("frgr_mem record before region record!");
2805 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2806 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2807 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2808 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2813 as_bad ("fr_mem record before region record!");
2816 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2817 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2822 as_bad ("gr_mem record before region record!");
2825 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2826 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2831 as_bad ("br_mem record before region record!");
2834 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2835 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2841 as_bad ("gr_gr record before region record!");
2844 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2849 as_bad ("br_gr record before region record!");
2852 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2861 /* Estimate the size of a frag before relaxing. We only have one type of frag
2862 to handle here, which is the unwind info frag. */
2865 ia64_estimate_size_before_relax (fragS
*frag
,
2866 asection
*segtype ATTRIBUTE_UNUSED
)
2871 /* ??? This code is identical to the first part of ia64_convert_frag. */
2872 list
= (unw_rec_list
*) frag
->fr_opcode
;
2873 fixup_unw_records (list
, 0);
2875 len
= calc_record_size (list
);
2876 /* pad to pointer-size boundary. */
2877 pad
= len
% md
.pointer_size
;
2879 len
+= md
.pointer_size
- pad
;
2880 /* Add 8 for the header. */
2882 /* Add a pointer for the personality offset. */
2883 if (frag
->fr_offset
)
2884 size
+= md
.pointer_size
;
2886 /* fr_var carries the max_chars that we created the fragment with.
2887 We must, of course, have allocated enough memory earlier. */
2888 assert (frag
->fr_var
>= size
);
2890 return frag
->fr_fix
+ size
;
2893 /* This function converts a rs_machine_dependent variant frag into a
2894 normal fill frag with the unwind image from the the record list. */
2896 ia64_convert_frag (fragS
*frag
)
2902 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2903 list
= (unw_rec_list
*) frag
->fr_opcode
;
2904 fixup_unw_records (list
, 0);
2906 len
= calc_record_size (list
);
2907 /* pad to pointer-size boundary. */
2908 pad
= len
% md
.pointer_size
;
2910 len
+= md
.pointer_size
- pad
;
2911 /* Add 8 for the header. */
2913 /* Add a pointer for the personality offset. */
2914 if (frag
->fr_offset
)
2915 size
+= md
.pointer_size
;
2917 /* fr_var carries the max_chars that we created the fragment with.
2918 We must, of course, have allocated enough memory earlier. */
2919 assert (frag
->fr_var
>= size
);
2921 /* Initialize the header area. fr_offset is initialized with
2922 unwind.personality_routine. */
2923 if (frag
->fr_offset
)
2925 if (md
.flags
& EF_IA_64_ABI64
)
2926 flag_value
= (bfd_vma
) 3 << 32;
2928 /* 32-bit unwind info block. */
2929 flag_value
= (bfd_vma
) 0x1003 << 32;
2934 md_number_to_chars (frag
->fr_literal
,
2935 (((bfd_vma
) 1 << 48) /* Version. */
2936 | flag_value
/* U & E handler flags. */
2937 | (len
/ md
.pointer_size
)), /* Length. */
2940 /* Skip the header. */
2941 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
2942 process_unw_records (list
, output_vbyte_mem
);
2944 /* Fill the padding bytes with zeros. */
2946 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
2947 md
.pointer_size
- pad
);
2949 frag
->fr_fix
+= size
;
2950 frag
->fr_type
= rs_fill
;
2952 frag
->fr_offset
= 0;
2956 convert_expr_to_ab_reg (e
, ab
, regp
)
2963 if (e
->X_op
!= O_register
)
2966 reg
= e
->X_add_number
;
2967 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2970 *regp
= reg
- REG_GR
;
2972 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
2973 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
2976 *regp
= reg
- REG_FR
;
2978 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
2981 *regp
= reg
- REG_BR
;
2988 case REG_PR
: *regp
= 0; break;
2989 case REG_PSP
: *regp
= 1; break;
2990 case REG_PRIUNAT
: *regp
= 2; break;
2991 case REG_BR
+ 0: *regp
= 3; break;
2992 case REG_AR
+ AR_BSP
: *regp
= 4; break;
2993 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
2994 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
2995 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
2996 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
2997 case REG_AR
+ AR_PFS
: *regp
= 9; break;
2998 case REG_AR
+ AR_LC
: *regp
= 10; break;
3008 convert_expr_to_xy_reg (e
, xy
, regp
)
3015 if (e
->X_op
!= O_register
)
3018 reg
= e
->X_add_number
;
3020 if (/* reg >= REG_GR && */ reg
<= (REG_GR
+ 127))
3023 *regp
= reg
- REG_GR
;
3025 else if (reg
>= REG_FR
&& reg
<= (REG_FR
+ 127))
3028 *regp
= reg
- REG_FR
;
3030 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3033 *regp
= reg
- REG_BR
;
3043 /* The current frag is an alignment frag. */
3044 align_frag
= frag_now
;
3045 s_align_bytes (arg
);
3050 int dummy ATTRIBUTE_UNUSED
;
3055 radix
= *input_line_pointer
++;
3057 if (radix
!= 'C' && !is_end_of_line
[(unsigned char) radix
])
3059 as_bad ("Radix `%c' unsupported", *input_line_pointer
);
3060 ignore_rest_of_line ();
3065 /* Helper function for .loc directives. If the assembler is not generating
3066 line number info, then we need to remember which instructions have a .loc
3067 directive, and only call dwarf2_gen_line_info for those instructions. */
3072 CURR_SLOT
.loc_directive_seen
= 1;
3073 dwarf2_directive_loc (x
);
3076 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3078 dot_special_section (which
)
3081 set_section ((char *) special_section_name
[which
]);
3084 /* Return -1 for warning and 0 for error. */
3087 unwind_diagnostic (const char * region
, const char *directive
)
3089 if (md
.unwind_check
== unwind_check_warning
)
3091 as_warn (".%s outside of %s", directive
, region
);
3096 as_bad (".%s outside of %s", directive
, region
);
3097 ignore_rest_of_line ();
3102 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3103 a procedure but the unwind directive check is set to warning, 0 if
3104 a directive isn't in a procedure and the unwind directive check is set
3108 in_procedure (const char *directive
)
3110 if (unwind
.proc_start
3111 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3113 return unwind_diagnostic ("procedure", directive
);
3116 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3117 a prologue but the unwind directive check is set to warning, 0 if
3118 a directive isn't in a prologue and the unwind directive check is set
3122 in_prologue (const char *directive
)
3124 int in
= in_procedure (directive
);
3127 /* We are in a procedure. Check if we are in a prologue. */
3128 if (unwind
.prologue
)
3130 /* We only want to issue one message. */
3132 return unwind_diagnostic ("prologue", directive
);
3139 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3140 a body but the unwind directive check is set to warning, 0 if
3141 a directive isn't in a body and the unwind directive check is set
3145 in_body (const char *directive
)
3147 int in
= in_procedure (directive
);
3150 /* We are in a procedure. Check if we are in a body. */
3153 /* We only want to issue one message. */
3155 return unwind_diagnostic ("body region", directive
);
3163 add_unwind_entry (ptr
)
3167 unwind
.tail
->next
= ptr
;
3172 /* The current entry can in fact be a chain of unwind entries. */
3173 if (unwind
.current_entry
== NULL
)
3174 unwind
.current_entry
= ptr
;
3179 int dummy ATTRIBUTE_UNUSED
;
3183 if (!in_prologue ("fframe"))
3188 if (e
.X_op
!= O_constant
)
3189 as_bad ("Operand to .fframe must be a constant");
3191 add_unwind_entry (output_mem_stack_f (e
.X_add_number
));
3196 int dummy ATTRIBUTE_UNUSED
;
3201 if (!in_prologue ("vframe"))
3205 reg
= e
.X_add_number
- REG_GR
;
3206 if (e
.X_op
== O_register
&& reg
< 128)
3208 add_unwind_entry (output_mem_stack_v ());
3209 if (! (unwind
.prologue_mask
& 2))
3210 add_unwind_entry (output_psp_gr (reg
));
3213 as_bad ("First operand to .vframe must be a general register");
3217 dot_vframesp (dummy
)
3218 int dummy ATTRIBUTE_UNUSED
;
3222 if (!in_prologue ("vframesp"))
3226 if (e
.X_op
== O_constant
)
3228 add_unwind_entry (output_mem_stack_v ());
3229 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3232 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3236 dot_vframepsp (dummy
)
3237 int dummy ATTRIBUTE_UNUSED
;
3241 if (!in_prologue ("vframepsp"))
3245 if (e
.X_op
== O_constant
)
3247 add_unwind_entry (output_mem_stack_v ());
3248 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3251 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3256 int dummy ATTRIBUTE_UNUSED
;
3262 if (!in_prologue ("save"))
3265 sep
= parse_operand (&e1
);
3267 as_bad ("No second operand to .save");
3268 sep
= parse_operand (&e2
);
3270 reg1
= e1
.X_add_number
;
3271 reg2
= e2
.X_add_number
- REG_GR
;
3273 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3274 if (e1
.X_op
== O_register
)
3276 if (e2
.X_op
== O_register
&& reg2
>= 0 && reg2
< 128)
3280 case REG_AR
+ AR_BSP
:
3281 add_unwind_entry (output_bsp_when ());
3282 add_unwind_entry (output_bsp_gr (reg2
));
3284 case REG_AR
+ AR_BSPSTORE
:
3285 add_unwind_entry (output_bspstore_when ());
3286 add_unwind_entry (output_bspstore_gr (reg2
));
3288 case REG_AR
+ AR_RNAT
:
3289 add_unwind_entry (output_rnat_when ());
3290 add_unwind_entry (output_rnat_gr (reg2
));
3292 case REG_AR
+ AR_UNAT
:
3293 add_unwind_entry (output_unat_when ());
3294 add_unwind_entry (output_unat_gr (reg2
));
3296 case REG_AR
+ AR_FPSR
:
3297 add_unwind_entry (output_fpsr_when ());
3298 add_unwind_entry (output_fpsr_gr (reg2
));
3300 case REG_AR
+ AR_PFS
:
3301 add_unwind_entry (output_pfs_when ());
3302 if (! (unwind
.prologue_mask
& 4))
3303 add_unwind_entry (output_pfs_gr (reg2
));
3305 case REG_AR
+ AR_LC
:
3306 add_unwind_entry (output_lc_when ());
3307 add_unwind_entry (output_lc_gr (reg2
));
3310 add_unwind_entry (output_rp_when ());
3311 if (! (unwind
.prologue_mask
& 8))
3312 add_unwind_entry (output_rp_gr (reg2
));
3315 add_unwind_entry (output_preds_when ());
3316 if (! (unwind
.prologue_mask
& 1))
3317 add_unwind_entry (output_preds_gr (reg2
));
3320 add_unwind_entry (output_priunat_when_gr ());
3321 add_unwind_entry (output_priunat_gr (reg2
));
3324 as_bad ("First operand not a valid register");
3328 as_bad (" Second operand not a valid register");
3331 as_bad ("First operand not a register");
3336 int dummy ATTRIBUTE_UNUSED
;
3339 unsigned long ecount
; /* # of _additional_ regions to pop */
3342 if (!in_body ("restore"))
3345 sep
= parse_operand (&e1
);
3346 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3348 as_bad ("First operand to .restore must be stack pointer (sp)");
3354 parse_operand (&e2
);
3355 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3357 as_bad ("Second operand to .restore must be a constant >= 0");
3360 ecount
= e2
.X_add_number
;
3363 ecount
= unwind
.prologue_count
- 1;
3365 if (ecount
>= unwind
.prologue_count
)
3367 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3368 ecount
+ 1, unwind
.prologue_count
);
3372 add_unwind_entry (output_epilogue (ecount
));
3374 if (ecount
< unwind
.prologue_count
)
3375 unwind
.prologue_count
-= ecount
+ 1;
3377 unwind
.prologue_count
= 0;
3381 dot_restorereg (dummy
)
3382 int dummy ATTRIBUTE_UNUSED
;
3384 unsigned int ab
, reg
;
3387 if (!in_procedure ("restorereg"))
3392 if (!convert_expr_to_ab_reg (&e
, &ab
, ®
))
3394 as_bad ("First operand to .restorereg must be a preserved register");
3397 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0));
3401 dot_restorereg_p (dummy
)
3402 int dummy ATTRIBUTE_UNUSED
;
3404 unsigned int qp
, ab
, reg
;
3408 if (!in_procedure ("restorereg.p"))
3411 sep
= parse_operand (&e1
);
3414 as_bad ("No second operand to .restorereg.p");
3418 parse_operand (&e2
);
3420 qp
= e1
.X_add_number
- REG_P
;
3421 if (e1
.X_op
!= O_register
|| qp
> 63)
3423 as_bad ("First operand to .restorereg.p must be a predicate");
3427 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3429 as_bad ("Second operand to .restorereg.p must be a preserved register");
3432 add_unwind_entry (output_spill_reg_p (ab
, reg
, 0, 0, qp
));
3435 static char *special_linkonce_name
[] =
3437 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3441 start_unwind_section (const segT text_seg
, int sec_index
, int linkonce_empty
)
3444 Use a slightly ugly scheme to derive the unwind section names from
3445 the text section name:
3447 text sect. unwind table sect.
3448 name: name: comments:
3449 ---------- ----------------- --------------------------------
3451 .text.foo .IA_64.unwind.text.foo
3452 .foo .IA_64.unwind.foo
3454 .gnu.linkonce.ia64unw.foo
3455 _info .IA_64.unwind_info gas issues error message (ditto)
3456 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3458 This mapping is done so that:
3460 (a) An object file with unwind info only in .text will use
3461 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3462 This follows the letter of the ABI and also ensures backwards
3463 compatibility with older toolchains.
3465 (b) An object file with unwind info in multiple text sections
3466 will use separate unwind sections for each text section.
3467 This allows us to properly set the "sh_info" and "sh_link"
3468 fields in SHT_IA_64_UNWIND as required by the ABI and also
3469 lets GNU ld support programs with multiple segments
3470 containing unwind info (as might be the case for certain
3471 embedded applications).
3473 (c) An error is issued if there would be a name clash.
3476 const char *text_name
, *sec_text_name
;
3478 const char *prefix
= special_section_name
[sec_index
];
3480 size_t prefix_len
, suffix_len
, sec_name_len
;
3482 sec_text_name
= segment_name (text_seg
);
3483 text_name
= sec_text_name
;
3484 if (strncmp (text_name
, "_info", 5) == 0)
3486 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3488 ignore_rest_of_line ();
3491 if (strcmp (text_name
, ".text") == 0)
3494 /* Build the unwind section name by appending the (possibly stripped)
3495 text section name to the unwind prefix. */
3497 if (strncmp (text_name
, ".gnu.linkonce.t.",
3498 sizeof (".gnu.linkonce.t.") - 1) == 0)
3500 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3501 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3503 else if (linkonce_empty
)
3506 prefix_len
= strlen (prefix
);
3507 suffix_len
= strlen (suffix
);
3508 sec_name_len
= prefix_len
+ suffix_len
;
3509 sec_name
= alloca (sec_name_len
+ 1);
3510 memcpy (sec_name
, prefix
, prefix_len
);
3511 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3512 sec_name
[sec_name_len
] = '\0';
3514 /* Handle COMDAT group. */
3515 if (suffix
== text_name
&& (text_seg
->flags
& SEC_LINK_ONCE
) != 0)
3518 size_t len
, group_name_len
;
3519 const char *group_name
= elf_group_name (text_seg
);
3521 if (group_name
== NULL
)
3523 as_bad ("Group section `%s' has no group signature",
3525 ignore_rest_of_line ();
3528 /* We have to construct a fake section directive. */
3529 group_name_len
= strlen (group_name
);
3531 + 16 /* ,"aG",@progbits, */
3532 + group_name_len
/* ,group_name */
3535 section
= alloca (len
+ 1);
3536 memcpy (section
, sec_name
, sec_name_len
);
3537 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3538 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3539 memcpy (section
+ len
- 7, ",comdat", 7);
3540 section
[len
] = '\0';
3541 set_section (section
);
3545 set_section (sec_name
);
3546 bfd_set_section_flags (stdoutput
, now_seg
,
3547 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3550 elf_linked_to_section (now_seg
) = text_seg
;
3554 generate_unwind_image (const segT text_seg
)
3559 /* Mark the end of the unwind info, so that we can compute the size of the
3560 last unwind region. */
3561 add_unwind_entry (output_endp ());
3563 /* Force out pending instructions, to make sure all unwind records have
3564 a valid slot_number field. */
3565 ia64_flush_insns ();
3567 /* Generate the unwind record. */
3568 list
= optimize_unw_records (unwind
.list
);
3569 fixup_unw_records (list
, 1);
3570 size
= calc_record_size (list
);
3572 if (size
> 0 || unwind
.force_unwind_entry
)
3574 unwind
.force_unwind_entry
= 0;
3575 /* pad to pointer-size boundary. */
3576 pad
= size
% md
.pointer_size
;
3578 size
+= md
.pointer_size
- pad
;
3579 /* Add 8 for the header. */
3581 /* Add a pointer for the personality offset. */
3582 if (unwind
.personality_routine
)
3583 size
+= md
.pointer_size
;
3586 /* If there are unwind records, switch sections, and output the info. */
3590 bfd_reloc_code_real_type reloc
;
3592 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
, 0);
3594 /* Make sure the section has 4 byte alignment for ILP32 and
3595 8 byte alignment for LP64. */
3596 frag_align (md
.pointer_size_shift
, 0, 0);
3597 record_alignment (now_seg
, md
.pointer_size_shift
);
3599 /* Set expression which points to start of unwind descriptor area. */
3600 unwind
.info
= expr_build_dot ();
3602 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3603 (offsetT
) (long) unwind
.personality_routine
,
3606 /* Add the personality address to the image. */
3607 if (unwind
.personality_routine
!= 0)
3609 exp
.X_op
= O_symbol
;
3610 exp
.X_add_symbol
= unwind
.personality_routine
;
3611 exp
.X_add_number
= 0;
3613 if (md
.flags
& EF_IA_64_BE
)
3615 if (md
.flags
& EF_IA_64_ABI64
)
3616 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3618 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3622 if (md
.flags
& EF_IA_64_ABI64
)
3623 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3625 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3628 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3629 md
.pointer_size
, &exp
, 0, reloc
);
3630 unwind
.personality_routine
= 0;
3634 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
, 1);
3636 free_saved_prologue_counts ();
3637 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3641 dot_handlerdata (dummy
)
3642 int dummy ATTRIBUTE_UNUSED
;
3644 if (!in_procedure ("handlerdata"))
3646 unwind
.force_unwind_entry
= 1;
3648 /* Remember which segment we're in so we can switch back after .endp */
3649 unwind
.saved_text_seg
= now_seg
;
3650 unwind
.saved_text_subseg
= now_subseg
;
3652 /* Generate unwind info into unwind-info section and then leave that
3653 section as the currently active one so dataXX directives go into
3654 the language specific data area of the unwind info block. */
3655 generate_unwind_image (now_seg
);
3656 demand_empty_rest_of_line ();
3660 dot_unwentry (dummy
)
3661 int dummy ATTRIBUTE_UNUSED
;
3663 if (!in_procedure ("unwentry"))
3665 unwind
.force_unwind_entry
= 1;
3666 demand_empty_rest_of_line ();
3671 int dummy ATTRIBUTE_UNUSED
;
3676 if (!in_prologue ("altrp"))
3680 reg
= e
.X_add_number
- REG_BR
;
3681 if (e
.X_op
== O_register
&& reg
< 8)
3682 add_unwind_entry (output_rp_br (reg
));
3684 as_bad ("First operand not a valid branch register");
3688 dot_savemem (psprel
)
3695 if (!in_prologue (psprel
? "savepsp" : "savesp"))
3698 sep
= parse_operand (&e1
);
3700 as_bad ("No second operand to .save%ssp", psprel
? "p" : "");
3701 sep
= parse_operand (&e2
);
3703 reg1
= e1
.X_add_number
;
3704 val
= e2
.X_add_number
;
3706 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3707 if (e1
.X_op
== O_register
)
3709 if (e2
.X_op
== O_constant
)
3713 case REG_AR
+ AR_BSP
:
3714 add_unwind_entry (output_bsp_when ());
3715 add_unwind_entry ((psprel
3717 : output_bsp_sprel
) (val
));
3719 case REG_AR
+ AR_BSPSTORE
:
3720 add_unwind_entry (output_bspstore_when ());
3721 add_unwind_entry ((psprel
3722 ? output_bspstore_psprel
3723 : output_bspstore_sprel
) (val
));
3725 case REG_AR
+ AR_RNAT
:
3726 add_unwind_entry (output_rnat_when ());
3727 add_unwind_entry ((psprel
3728 ? output_rnat_psprel
3729 : output_rnat_sprel
) (val
));
3731 case REG_AR
+ AR_UNAT
:
3732 add_unwind_entry (output_unat_when ());
3733 add_unwind_entry ((psprel
3734 ? output_unat_psprel
3735 : output_unat_sprel
) (val
));
3737 case REG_AR
+ AR_FPSR
:
3738 add_unwind_entry (output_fpsr_when ());
3739 add_unwind_entry ((psprel
3740 ? output_fpsr_psprel
3741 : output_fpsr_sprel
) (val
));
3743 case REG_AR
+ AR_PFS
:
3744 add_unwind_entry (output_pfs_when ());
3745 add_unwind_entry ((psprel
3747 : output_pfs_sprel
) (val
));
3749 case REG_AR
+ AR_LC
:
3750 add_unwind_entry (output_lc_when ());
3751 add_unwind_entry ((psprel
3753 : output_lc_sprel
) (val
));
3756 add_unwind_entry (output_rp_when ());
3757 add_unwind_entry ((psprel
3759 : output_rp_sprel
) (val
));
3762 add_unwind_entry (output_preds_when ());
3763 add_unwind_entry ((psprel
3764 ? output_preds_psprel
3765 : output_preds_sprel
) (val
));
3768 add_unwind_entry (output_priunat_when_mem ());
3769 add_unwind_entry ((psprel
3770 ? output_priunat_psprel
3771 : output_priunat_sprel
) (val
));
3774 as_bad ("First operand not a valid register");
3778 as_bad (" Second operand not a valid constant");
3781 as_bad ("First operand not a register");
3786 int dummy ATTRIBUTE_UNUSED
;
3791 if (!in_prologue ("save.g"))
3794 sep
= parse_operand (&e1
);
3796 parse_operand (&e2
);
3798 if (e1
.X_op
!= O_constant
)
3799 as_bad ("First operand to .save.g must be a constant.");
3802 int grmask
= e1
.X_add_number
;
3804 add_unwind_entry (output_gr_mem (grmask
));
3807 int reg
= e2
.X_add_number
- REG_GR
;
3808 if (e2
.X_op
== O_register
&& reg
>= 0 && reg
< 128)
3809 add_unwind_entry (output_gr_gr (grmask
, reg
));
3811 as_bad ("Second operand is an invalid register.");
3818 int dummy ATTRIBUTE_UNUSED
;
3823 if (!in_prologue ("save.f"))
3826 sep
= parse_operand (&e1
);
3828 if (e1
.X_op
!= O_constant
)
3829 as_bad ("Operand to .save.f must be a constant.");
3831 add_unwind_entry (output_fr_mem (e1
.X_add_number
));
3836 int dummy ATTRIBUTE_UNUSED
;
3843 if (!in_prologue ("save.b"))
3846 sep
= parse_operand (&e1
);
3847 if (e1
.X_op
!= O_constant
)
3849 as_bad ("First operand to .save.b must be a constant.");
3852 brmask
= e1
.X_add_number
;
3856 sep
= parse_operand (&e2
);
3857 reg
= e2
.X_add_number
- REG_GR
;
3858 if (e2
.X_op
!= O_register
|| reg
> 127)
3860 as_bad ("Second operand to .save.b must be a general register.");
3863 add_unwind_entry (output_br_gr (brmask
, e2
.X_add_number
));
3866 add_unwind_entry (output_br_mem (brmask
));
3868 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3869 demand_empty_rest_of_line ();
3874 int dummy ATTRIBUTE_UNUSED
;
3879 if (!in_prologue ("save.gf"))
3882 sep
= parse_operand (&e1
);
3884 parse_operand (&e2
);
3886 if (e1
.X_op
!= O_constant
|| sep
!= ',' || e2
.X_op
!= O_constant
)
3887 as_bad ("Both operands of .save.gf must be constants.");
3890 int grmask
= e1
.X_add_number
;
3891 int frmask
= e2
.X_add_number
;
3892 add_unwind_entry (output_frgr_mem (grmask
, frmask
));
3898 int dummy ATTRIBUTE_UNUSED
;
3903 if (!in_prologue ("spill"))
3906 sep
= parse_operand (&e
);
3907 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3908 demand_empty_rest_of_line ();
3910 if (e
.X_op
!= O_constant
)
3911 as_bad ("Operand to .spill must be a constant");
3913 add_unwind_entry (output_spill_base (e
.X_add_number
));
3917 dot_spillreg (dummy
)
3918 int dummy ATTRIBUTE_UNUSED
;
3920 int sep
, ab
, xy
, reg
, treg
;
3923 if (!in_procedure ("spillreg"))
3926 sep
= parse_operand (&e1
);
3929 as_bad ("No second operand to .spillreg");
3933 parse_operand (&e2
);
3935 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3937 as_bad ("First operand to .spillreg must be a preserved register");
3941 if (!convert_expr_to_xy_reg (&e2
, &xy
, &treg
))
3943 as_bad ("Second operand to .spillreg must be a register");
3947 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
));
3951 dot_spillmem (psprel
)
3957 if (!in_procedure ("spillmem"))
3960 sep
= parse_operand (&e1
);
3963 as_bad ("Second operand missing");
3967 parse_operand (&e2
);
3969 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3971 as_bad ("First operand to .spill%s must be a preserved register",
3972 psprel
? "psp" : "sp");
3976 if (e2
.X_op
!= O_constant
)
3978 as_bad ("Second operand to .spill%s must be a constant",
3979 psprel
? "psp" : "sp");
3984 add_unwind_entry (output_spill_psprel (ab
, reg
, e2
.X_add_number
));
3986 add_unwind_entry (output_spill_sprel (ab
, reg
, e2
.X_add_number
));
3990 dot_spillreg_p (dummy
)
3991 int dummy ATTRIBUTE_UNUSED
;
3993 int sep
, ab
, xy
, reg
, treg
;
3994 expressionS e1
, e2
, e3
;
3997 if (!in_procedure ("spillreg.p"))
4000 sep
= parse_operand (&e1
);
4003 as_bad ("No second and third operand to .spillreg.p");
4007 sep
= parse_operand (&e2
);
4010 as_bad ("No third operand to .spillreg.p");
4014 parse_operand (&e3
);
4016 qp
= e1
.X_add_number
- REG_P
;
4018 if (e1
.X_op
!= O_register
|| qp
> 63)
4020 as_bad ("First operand to .spillreg.p must be a predicate");
4024 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4026 as_bad ("Second operand to .spillreg.p must be a preserved register");
4030 if (!convert_expr_to_xy_reg (&e3
, &xy
, &treg
))
4032 as_bad ("Third operand to .spillreg.p must be a register");
4036 add_unwind_entry (output_spill_reg_p (ab
, reg
, treg
, xy
, qp
));
4040 dot_spillmem_p (psprel
)
4043 expressionS e1
, e2
, e3
;
4047 if (!in_procedure ("spillmem.p"))
4050 sep
= parse_operand (&e1
);
4053 as_bad ("Second operand missing");
4057 parse_operand (&e2
);
4060 as_bad ("Second operand missing");
4064 parse_operand (&e3
);
4066 qp
= e1
.X_add_number
- REG_P
;
4067 if (e1
.X_op
!= O_register
|| qp
> 63)
4069 as_bad ("First operand to .spill%s_p must be a predicate",
4070 psprel
? "psp" : "sp");
4074 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4076 as_bad ("Second operand to .spill%s_p must be a preserved register",
4077 psprel
? "psp" : "sp");
4081 if (e3
.X_op
!= O_constant
)
4083 as_bad ("Third operand to .spill%s_p must be a constant",
4084 psprel
? "psp" : "sp");
4089 add_unwind_entry (output_spill_psprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4091 add_unwind_entry (output_spill_sprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4095 get_saved_prologue_count (lbl
)
4098 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4100 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4104 return lpc
->prologue_count
;
4106 as_bad ("Missing .label_state %ld", lbl
);
4111 save_prologue_count (lbl
, count
)
4115 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4117 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4121 lpc
->prologue_count
= count
;
4124 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4126 new_lpc
->next
= unwind
.saved_prologue_counts
;
4127 new_lpc
->label_number
= lbl
;
4128 new_lpc
->prologue_count
= count
;
4129 unwind
.saved_prologue_counts
= new_lpc
;
4134 free_saved_prologue_counts ()
4136 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4137 label_prologue_count
*next
;
4146 unwind
.saved_prologue_counts
= NULL
;
4150 dot_label_state (dummy
)
4151 int dummy ATTRIBUTE_UNUSED
;
4155 if (!in_body ("label_state"))
4159 if (e
.X_op
!= O_constant
)
4161 as_bad ("Operand to .label_state must be a constant");
4164 add_unwind_entry (output_label_state (e
.X_add_number
));
4165 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4169 dot_copy_state (dummy
)
4170 int dummy ATTRIBUTE_UNUSED
;
4174 if (!in_body ("copy_state"))
4178 if (e
.X_op
!= O_constant
)
4180 as_bad ("Operand to .copy_state must be a constant");
4183 add_unwind_entry (output_copy_state (e
.X_add_number
));
4184 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4189 int dummy ATTRIBUTE_UNUSED
;
4194 if (!in_procedure ("unwabi"))
4197 sep
= parse_operand (&e1
);
4200 as_bad ("Second operand to .unwabi missing");
4203 sep
= parse_operand (&e2
);
4204 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4205 demand_empty_rest_of_line ();
4207 if (e1
.X_op
!= O_constant
)
4209 as_bad ("First operand to .unwabi must be a constant");
4213 if (e2
.X_op
!= O_constant
)
4215 as_bad ("Second operand to .unwabi must be a constant");
4219 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
));
4223 dot_personality (dummy
)
4224 int dummy ATTRIBUTE_UNUSED
;
4227 if (!in_procedure ("personality"))
4230 name
= input_line_pointer
;
4231 c
= get_symbol_end ();
4232 p
= input_line_pointer
;
4233 unwind
.personality_routine
= symbol_find_or_make (name
);
4234 unwind
.force_unwind_entry
= 1;
4237 demand_empty_rest_of_line ();
4242 int dummy ATTRIBUTE_UNUSED
;
4247 unwind
.proc_start
= 0;
4248 /* Parse names of main and alternate entry points and mark them as
4249 function symbols: */
4253 name
= input_line_pointer
;
4254 c
= get_symbol_end ();
4255 p
= input_line_pointer
;
4257 as_bad ("Empty argument of .proc");
4260 sym
= symbol_find_or_make (name
);
4261 if (S_IS_DEFINED (sym
))
4262 as_bad ("`%s' was already defined", name
);
4263 else if (unwind
.proc_start
== 0)
4265 unwind
.proc_start
= sym
;
4267 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4271 if (*input_line_pointer
!= ',')
4273 ++input_line_pointer
;
4275 if (unwind
.proc_start
== 0)
4276 unwind
.proc_start
= expr_build_dot ();
4277 demand_empty_rest_of_line ();
4280 unwind
.prologue
= 0;
4281 unwind
.prologue_count
= 0;
4284 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4285 unwind
.personality_routine
= 0;
4290 int dummy ATTRIBUTE_UNUSED
;
4292 if (!in_procedure ("body"))
4294 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4295 as_warn ("Initial .body should precede any instructions");
4297 unwind
.prologue
= 0;
4298 unwind
.prologue_mask
= 0;
4301 add_unwind_entry (output_body ());
4302 demand_empty_rest_of_line ();
4306 dot_prologue (dummy
)
4307 int dummy ATTRIBUTE_UNUSED
;
4310 int mask
= 0, grsave
= 0;
4312 if (!in_procedure ("prologue"))
4314 if (unwind
.prologue
)
4316 as_bad (".prologue within prologue");
4317 ignore_rest_of_line ();
4320 if (!unwind
.body
&& unwind
.insn
)
4321 as_warn ("Initial .prologue should precede any instructions");
4323 if (!is_it_end_of_statement ())
4326 sep
= parse_operand (&e1
);
4328 as_bad ("No second operand to .prologue");
4329 sep
= parse_operand (&e2
);
4330 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4331 demand_empty_rest_of_line ();
4333 if (e1
.X_op
== O_constant
)
4335 mask
= e1
.X_add_number
;
4337 if (e2
.X_op
== O_constant
)
4338 grsave
= e2
.X_add_number
;
4339 else if (e2
.X_op
== O_register
4340 && (grsave
= e2
.X_add_number
- REG_GR
) < 128)
4343 as_bad ("Second operand not a constant or general register");
4345 add_unwind_entry (output_prologue_gr (mask
, grsave
));
4348 as_bad ("First operand not a constant");
4351 add_unwind_entry (output_prologue ());
4353 unwind
.prologue
= 1;
4354 unwind
.prologue_mask
= mask
;
4356 ++unwind
.prologue_count
;
4361 int dummy ATTRIBUTE_UNUSED
;
4365 int bytes_per_address
;
4368 subsegT saved_subseg
;
4369 char *name
, *default_name
, *p
, c
;
4371 int unwind_check
= md
.unwind_check
;
4373 md
.unwind_check
= unwind_check_error
;
4374 if (!in_procedure ("endp"))
4376 md
.unwind_check
= unwind_check
;
4378 if (unwind
.saved_text_seg
)
4380 saved_seg
= unwind
.saved_text_seg
;
4381 saved_subseg
= unwind
.saved_text_subseg
;
4382 unwind
.saved_text_seg
= NULL
;
4386 saved_seg
= now_seg
;
4387 saved_subseg
= now_subseg
;
4390 insn_group_break (1, 0, 0);
4392 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4394 generate_unwind_image (saved_seg
);
4396 if (unwind
.info
|| unwind
.force_unwind_entry
)
4400 subseg_set (md
.last_text_seg
, 0);
4401 proc_end
= expr_build_dot ();
4403 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
, 0);
4405 /* Make sure that section has 4 byte alignment for ILP32 and
4406 8 byte alignment for LP64. */
4407 record_alignment (now_seg
, md
.pointer_size_shift
);
4409 /* Need space for 3 pointers for procedure start, procedure end,
4411 ptr
= frag_more (3 * md
.pointer_size
);
4412 where
= frag_now_fix () - (3 * md
.pointer_size
);
4413 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4415 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4416 e
.X_op
= O_pseudo_fixup
;
4417 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4419 e
.X_add_symbol
= unwind
.proc_start
;
4420 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4422 e
.X_op
= O_pseudo_fixup
;
4423 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4425 e
.X_add_symbol
= proc_end
;
4426 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4427 bytes_per_address
, &e
);
4431 e
.X_op
= O_pseudo_fixup
;
4432 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4434 e
.X_add_symbol
= unwind
.info
;
4435 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4436 bytes_per_address
, &e
);
4439 md_number_to_chars (ptr
+ (bytes_per_address
* 2), 0,
4444 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
, 1);
4446 subseg_set (saved_seg
, saved_subseg
);
4448 if (unwind
.proc_start
)
4449 default_name
= (char *) S_GET_NAME (unwind
.proc_start
);
4451 default_name
= NULL
;
4453 /* Parse names of main and alternate entry points and set symbol sizes. */
4457 name
= input_line_pointer
;
4458 c
= get_symbol_end ();
4459 p
= input_line_pointer
;
4462 if (md
.unwind_check
== unwind_check_warning
)
4466 as_warn ("Empty argument of .endp. Use the default name `%s'",
4468 name
= default_name
;
4471 as_warn ("Empty argument of .endp");
4474 as_bad ("Empty argument of .endp");
4478 sym
= symbol_find (name
);
4480 && md
.unwind_check
== unwind_check_warning
4482 && default_name
!= name
)
4484 /* We have a bad name. Try the default one if needed. */
4485 as_warn ("`%s' was not defined within procedure. Use the default name `%s'",
4486 name
, default_name
);
4487 name
= default_name
;
4488 sym
= symbol_find (name
);
4490 if (!sym
|| !S_IS_DEFINED (sym
))
4491 as_bad ("`%s' was not defined within procedure", name
);
4492 else if (unwind
.proc_start
4493 && (symbol_get_bfdsym (sym
)->flags
& BSF_FUNCTION
)
4494 && S_GET_SIZE (sym
) == 0 && symbol_get_obj (sym
)->size
== NULL
)
4496 fragS
*fr
= symbol_get_frag (unwind
.proc_start
);
4497 fragS
*frag
= symbol_get_frag (sym
);
4499 /* Check whether the function label is at or beyond last
4501 while (fr
&& fr
!= frag
)
4505 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4506 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4509 symbol_get_obj (sym
)->size
=
4510 (expressionS
*) xmalloc (sizeof (expressionS
));
4511 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4512 symbol_get_obj (sym
)->size
->X_add_symbol
4513 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4514 frag_now_fix (), frag_now
);
4515 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4516 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4523 if (*input_line_pointer
!= ',')
4525 ++input_line_pointer
;
4527 demand_empty_rest_of_line ();
4528 unwind
.proc_start
= unwind
.info
= 0;
4532 dot_template (template)
4535 CURR_SLOT
.user_template
= template;
4540 int dummy ATTRIBUTE_UNUSED
;
4542 int ins
, locs
, outs
, rots
;
4544 if (is_it_end_of_statement ())
4545 ins
= locs
= outs
= rots
= 0;
4548 ins
= get_absolute_expression ();
4549 if (*input_line_pointer
++ != ',')
4551 locs
= get_absolute_expression ();
4552 if (*input_line_pointer
++ != ',')
4554 outs
= get_absolute_expression ();
4555 if (*input_line_pointer
++ != ',')
4557 rots
= get_absolute_expression ();
4559 set_regstack (ins
, locs
, outs
, rots
);
4563 as_bad ("Comma expected");
4564 ignore_rest_of_line ();
4571 unsigned num_regs
, num_alloced
= 0;
4572 struct dynreg
**drpp
, *dr
;
4573 int ch
, base_reg
= 0;
4579 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4580 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4581 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4585 /* First, remove existing names from hash table. */
4586 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4588 hash_delete (md
.dynreg_hash
, dr
->name
);
4589 /* FIXME: Free dr->name. */
4593 drpp
= &md
.dynreg
[type
];
4596 start
= input_line_pointer
;
4597 ch
= get_symbol_end ();
4598 len
= strlen (ia64_canonicalize_symbol_name (start
));
4599 *input_line_pointer
= ch
;
4602 if (*input_line_pointer
!= '[')
4604 as_bad ("Expected '['");
4607 ++input_line_pointer
; /* skip '[' */
4609 num_regs
= get_absolute_expression ();
4611 if (*input_line_pointer
++ != ']')
4613 as_bad ("Expected ']'");
4618 num_alloced
+= num_regs
;
4622 if (num_alloced
> md
.rot
.num_regs
)
4624 as_bad ("Used more than the declared %d rotating registers",
4630 if (num_alloced
> 96)
4632 as_bad ("Used more than the available 96 rotating registers");
4637 if (num_alloced
> 48)
4639 as_bad ("Used more than the available 48 rotating registers");
4650 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4651 memset (*drpp
, 0, sizeof (*dr
));
4654 name
= obstack_alloc (¬es
, len
+ 1);
4655 memcpy (name
, start
, len
);
4660 dr
->num_regs
= num_regs
;
4661 dr
->base
= base_reg
;
4663 base_reg
+= num_regs
;
4665 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4667 as_bad ("Attempt to redefine register set `%s'", name
);
4668 obstack_free (¬es
, name
);
4672 if (*input_line_pointer
!= ',')
4674 ++input_line_pointer
; /* skip comma */
4677 demand_empty_rest_of_line ();
4681 ignore_rest_of_line ();
4685 dot_byteorder (byteorder
)
4688 segment_info_type
*seginfo
= seg_info (now_seg
);
4690 if (byteorder
== -1)
4692 if (seginfo
->tc_segment_info_data
.endian
== 0)
4693 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4694 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4697 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4699 if (target_big_endian
!= byteorder
)
4701 target_big_endian
= byteorder
;
4702 if (target_big_endian
)
4704 ia64_number_to_chars
= number_to_chars_bigendian
;
4705 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4709 ia64_number_to_chars
= number_to_chars_littleendian
;
4710 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4717 int dummy ATTRIBUTE_UNUSED
;
4724 option
= input_line_pointer
;
4725 ch
= get_symbol_end ();
4726 if (strcmp (option
, "lsb") == 0)
4727 md
.flags
&= ~EF_IA_64_BE
;
4728 else if (strcmp (option
, "msb") == 0)
4729 md
.flags
|= EF_IA_64_BE
;
4730 else if (strcmp (option
, "abi32") == 0)
4731 md
.flags
&= ~EF_IA_64_ABI64
;
4732 else if (strcmp (option
, "abi64") == 0)
4733 md
.flags
|= EF_IA_64_ABI64
;
4735 as_bad ("Unknown psr option `%s'", option
);
4736 *input_line_pointer
= ch
;
4739 if (*input_line_pointer
!= ',')
4742 ++input_line_pointer
;
4745 demand_empty_rest_of_line ();
4750 int dummy ATTRIBUTE_UNUSED
;
4752 new_logical_line (0, get_absolute_expression ());
4753 demand_empty_rest_of_line ();
4757 parse_section_name ()
4763 if (*input_line_pointer
== '"')
4764 name
= demand_copy_C_string (&len
);
4767 char *start
= input_line_pointer
;
4768 char c
= get_symbol_end ();
4770 if (input_line_pointer
== start
)
4772 as_bad ("Missing section name");
4773 ignore_rest_of_line ();
4776 name
= obstack_copy (¬es
, start
, input_line_pointer
- start
+ 1);
4777 *input_line_pointer
= c
;
4781 ignore_rest_of_line ();
4785 if (*input_line_pointer
!= ',')
4787 as_bad ("Comma expected after section name");
4788 ignore_rest_of_line ();
4791 ++input_line_pointer
; /* skip comma */
4799 char *name
= parse_section_name ();
4803 md
.keep_pending_output
= 1;
4806 obj_elf_previous (0);
4807 md
.keep_pending_output
= 0;
4810 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4813 stmt_float_cons (kind
)
4834 ia64_do_align (alignment
);
4842 int saved_auto_align
= md
.auto_align
;
4846 md
.auto_align
= saved_auto_align
;
4850 dot_xfloat_cons (kind
)
4853 char *name
= parse_section_name ();
4857 md
.keep_pending_output
= 1;
4859 stmt_float_cons (kind
);
4860 obj_elf_previous (0);
4861 md
.keep_pending_output
= 0;
4865 dot_xstringer (zero
)
4868 char *name
= parse_section_name ();
4872 md
.keep_pending_output
= 1;
4875 obj_elf_previous (0);
4876 md
.keep_pending_output
= 0;
4883 int saved_auto_align
= md
.auto_align
;
4884 char *name
= parse_section_name ();
4888 md
.keep_pending_output
= 1;
4892 md
.auto_align
= saved_auto_align
;
4893 obj_elf_previous (0);
4894 md
.keep_pending_output
= 0;
4898 dot_xfloat_cons_ua (kind
)
4901 int saved_auto_align
= md
.auto_align
;
4902 char *name
= parse_section_name ();
4906 md
.keep_pending_output
= 1;
4909 stmt_float_cons (kind
);
4910 md
.auto_align
= saved_auto_align
;
4911 obj_elf_previous (0);
4912 md
.keep_pending_output
= 0;
4915 /* .reg.val <regname>,value */
4919 int dummy ATTRIBUTE_UNUSED
;
4924 if (reg
.X_op
!= O_register
)
4926 as_bad (_("Register name expected"));
4927 ignore_rest_of_line ();
4929 else if (*input_line_pointer
++ != ',')
4931 as_bad (_("Comma expected"));
4932 ignore_rest_of_line ();
4936 valueT value
= get_absolute_expression ();
4937 int regno
= reg
.X_add_number
;
4938 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4939 as_warn (_("Register value annotation ignored"));
4942 gr_values
[regno
- REG_GR
].known
= 1;
4943 gr_values
[regno
- REG_GR
].value
= value
;
4944 gr_values
[regno
- REG_GR
].path
= md
.path
;
4947 demand_empty_rest_of_line ();
4952 .serialize.instruction
4955 dot_serialize (type
)
4958 insn_group_break (0, 0, 0);
4960 instruction_serialization ();
4962 data_serialization ();
4963 insn_group_break (0, 0, 0);
4964 demand_empty_rest_of_line ();
4967 /* select dv checking mode
4972 A stop is inserted when changing modes
4979 if (md
.manual_bundling
)
4980 as_warn (_("Directive invalid within a bundle"));
4982 if (type
== 'E' || type
== 'A')
4983 md
.mode_explicitly_set
= 0;
4985 md
.mode_explicitly_set
= 1;
4992 if (md
.explicit_mode
)
4993 insn_group_break (1, 0, 0);
4994 md
.explicit_mode
= 0;
4998 if (!md
.explicit_mode
)
4999 insn_group_break (1, 0, 0);
5000 md
.explicit_mode
= 1;
5004 if (md
.explicit_mode
!= md
.default_explicit_mode
)
5005 insn_group_break (1, 0, 0);
5006 md
.explicit_mode
= md
.default_explicit_mode
;
5007 md
.mode_explicitly_set
= 0;
5018 for (regno
= 0; regno
< 64; regno
++)
5020 if (mask
& ((valueT
) 1 << regno
))
5022 fprintf (stderr
, "%s p%d", comma
, regno
);
5029 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5030 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5031 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5032 .pred.safe_across_calls p1 [, p2 [,...]]
5041 int p1
= -1, p2
= -1;
5045 if (*input_line_pointer
== '"')
5048 char *form
= demand_copy_C_string (&len
);
5050 if (strcmp (form
, "mutex") == 0)
5052 else if (strcmp (form
, "clear") == 0)
5054 else if (strcmp (form
, "imply") == 0)
5056 obstack_free (¬es
, form
);
5058 else if (*input_line_pointer
== '@')
5060 char *form
= ++input_line_pointer
;
5061 char c
= get_symbol_end();
5063 if (strcmp (form
, "mutex") == 0)
5065 else if (strcmp (form
, "clear") == 0)
5067 else if (strcmp (form
, "imply") == 0)
5069 *input_line_pointer
= c
;
5073 as_bad (_("Missing predicate relation type"));
5074 ignore_rest_of_line ();
5079 as_bad (_("Unrecognized predicate relation type"));
5080 ignore_rest_of_line ();
5083 if (*input_line_pointer
== ',')
5084 ++input_line_pointer
;
5093 expressionS pr
, *pr1
, *pr2
;
5096 if (pr
.X_op
== O_register
5097 && pr
.X_add_number
>= REG_P
5098 && pr
.X_add_number
<= REG_P
+ 63)
5100 regno
= pr
.X_add_number
- REG_P
;
5108 else if (type
!= 'i'
5109 && pr
.X_op
== O_subtract
5110 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5111 && pr1
->X_op
== O_register
5112 && pr1
->X_add_number
>= REG_P
5113 && pr1
->X_add_number
<= REG_P
+ 63
5114 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5115 && pr2
->X_op
== O_register
5116 && pr2
->X_add_number
>= REG_P
5117 && pr2
->X_add_number
<= REG_P
+ 63)
5122 regno
= pr1
->X_add_number
- REG_P
;
5123 stop
= pr2
->X_add_number
- REG_P
;
5126 as_bad (_("Bad register range"));
5127 ignore_rest_of_line ();
5130 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5131 count
+= stop
- regno
+ 1;
5135 as_bad (_("Predicate register expected"));
5136 ignore_rest_of_line ();
5140 as_warn (_("Duplicate predicate register ignored"));
5142 if (*input_line_pointer
!= ',')
5144 ++input_line_pointer
;
5153 clear_qp_mutex (mask
);
5154 clear_qp_implies (mask
, (valueT
) 0);
5157 if (count
!= 2 || p1
== -1 || p2
== -1)
5158 as_bad (_("Predicate source and target required"));
5159 else if (p1
== 0 || p2
== 0)
5160 as_bad (_("Use of p0 is not valid in this context"));
5162 add_qp_imply (p1
, p2
);
5167 as_bad (_("At least two PR arguments expected"));
5172 as_bad (_("Use of p0 is not valid in this context"));
5175 add_qp_mutex (mask
);
5178 /* note that we don't override any existing relations */
5181 as_bad (_("At least one PR argument expected"));
5186 fprintf (stderr
, "Safe across calls: ");
5187 print_prmask (mask
);
5188 fprintf (stderr
, "\n");
5190 qp_safe_across_calls
= mask
;
5193 demand_empty_rest_of_line ();
5196 /* .entry label [, label [, ...]]
5197 Hint to DV code that the given labels are to be considered entry points.
5198 Otherwise, only global labels are considered entry points. */
5202 int dummy ATTRIBUTE_UNUSED
;
5211 name
= input_line_pointer
;
5212 c
= get_symbol_end ();
5213 symbolP
= symbol_find_or_make (name
);
5215 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
5217 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5220 *input_line_pointer
= c
;
5222 c
= *input_line_pointer
;
5225 input_line_pointer
++;
5227 if (*input_line_pointer
== '\n')
5233 demand_empty_rest_of_line ();
5236 /* .mem.offset offset, base
5237 "base" is used to distinguish between offsets from a different base. */
5240 dot_mem_offset (dummy
)
5241 int dummy ATTRIBUTE_UNUSED
;
5243 md
.mem_offset
.hint
= 1;
5244 md
.mem_offset
.offset
= get_absolute_expression ();
5245 if (*input_line_pointer
!= ',')
5247 as_bad (_("Comma expected"));
5248 ignore_rest_of_line ();
5251 ++input_line_pointer
;
5252 md
.mem_offset
.base
= get_absolute_expression ();
5253 demand_empty_rest_of_line ();
5256 /* ia64-specific pseudo-ops: */
5257 const pseudo_typeS md_pseudo_table
[] =
5259 { "radix", dot_radix
, 0 },
5260 { "lcomm", s_lcomm_bytes
, 1 },
5261 { "loc", dot_loc
, 0 },
5262 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5263 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5264 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5265 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5266 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5267 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5268 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5269 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5270 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5271 { "proc", dot_proc
, 0 },
5272 { "body", dot_body
, 0 },
5273 { "prologue", dot_prologue
, 0 },
5274 { "endp", dot_endp
, 0 },
5276 { "fframe", dot_fframe
, 0 },
5277 { "vframe", dot_vframe
, 0 },
5278 { "vframesp", dot_vframesp
, 0 },
5279 { "vframepsp", dot_vframepsp
, 0 },
5280 { "save", dot_save
, 0 },
5281 { "restore", dot_restore
, 0 },
5282 { "restorereg", dot_restorereg
, 0 },
5283 { "restorereg.p", dot_restorereg_p
, 0 },
5284 { "handlerdata", dot_handlerdata
, 0 },
5285 { "unwentry", dot_unwentry
, 0 },
5286 { "altrp", dot_altrp
, 0 },
5287 { "savesp", dot_savemem
, 0 },
5288 { "savepsp", dot_savemem
, 1 },
5289 { "save.g", dot_saveg
, 0 },
5290 { "save.f", dot_savef
, 0 },
5291 { "save.b", dot_saveb
, 0 },
5292 { "save.gf", dot_savegf
, 0 },
5293 { "spill", dot_spill
, 0 },
5294 { "spillreg", dot_spillreg
, 0 },
5295 { "spillsp", dot_spillmem
, 0 },
5296 { "spillpsp", dot_spillmem
, 1 },
5297 { "spillreg.p", dot_spillreg_p
, 0 },
5298 { "spillsp.p", dot_spillmem_p
, 0 },
5299 { "spillpsp.p", dot_spillmem_p
, 1 },
5300 { "label_state", dot_label_state
, 0 },
5301 { "copy_state", dot_copy_state
, 0 },
5302 { "unwabi", dot_unwabi
, 0 },
5303 { "personality", dot_personality
, 0 },
5304 { "mii", dot_template
, 0x0 },
5305 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5306 { "mlx", dot_template
, 0x2 },
5307 { "mmi", dot_template
, 0x4 },
5308 { "mfi", dot_template
, 0x6 },
5309 { "mmf", dot_template
, 0x7 },
5310 { "mib", dot_template
, 0x8 },
5311 { "mbb", dot_template
, 0x9 },
5312 { "bbb", dot_template
, 0xb },
5313 { "mmb", dot_template
, 0xc },
5314 { "mfb", dot_template
, 0xe },
5315 { "align", dot_align
, 0 },
5316 { "regstk", dot_regstk
, 0 },
5317 { "rotr", dot_rot
, DYNREG_GR
},
5318 { "rotf", dot_rot
, DYNREG_FR
},
5319 { "rotp", dot_rot
, DYNREG_PR
},
5320 { "lsb", dot_byteorder
, 0 },
5321 { "msb", dot_byteorder
, 1 },
5322 { "psr", dot_psr
, 0 },
5323 { "alias", dot_alias
, 0 },
5324 { "secalias", dot_alias
, 1 },
5325 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5327 { "xdata1", dot_xdata
, 1 },
5328 { "xdata2", dot_xdata
, 2 },
5329 { "xdata4", dot_xdata
, 4 },
5330 { "xdata8", dot_xdata
, 8 },
5331 { "xdata16", dot_xdata
, 16 },
5332 { "xreal4", dot_xfloat_cons
, 'f' },
5333 { "xreal8", dot_xfloat_cons
, 'd' },
5334 { "xreal10", dot_xfloat_cons
, 'x' },
5335 { "xreal16", dot_xfloat_cons
, 'X' },
5336 { "xstring", dot_xstringer
, 0 },
5337 { "xstringz", dot_xstringer
, 1 },
5339 /* unaligned versions: */
5340 { "xdata2.ua", dot_xdata_ua
, 2 },
5341 { "xdata4.ua", dot_xdata_ua
, 4 },
5342 { "xdata8.ua", dot_xdata_ua
, 8 },
5343 { "xdata16.ua", dot_xdata_ua
, 16 },
5344 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5345 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5346 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5347 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5349 /* annotations/DV checking support */
5350 { "entry", dot_entry
, 0 },
5351 { "mem.offset", dot_mem_offset
, 0 },
5352 { "pred.rel", dot_pred_rel
, 0 },
5353 { "pred.rel.clear", dot_pred_rel
, 'c' },
5354 { "pred.rel.imply", dot_pred_rel
, 'i' },
5355 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5356 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5357 { "reg.val", dot_reg_val
, 0 },
5358 { "serialize.data", dot_serialize
, 0 },
5359 { "serialize.instruction", dot_serialize
, 1 },
5360 { "auto", dot_dv_mode
, 'a' },
5361 { "explicit", dot_dv_mode
, 'e' },
5362 { "default", dot_dv_mode
, 'd' },
5364 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5365 IA-64 aligns data allocation pseudo-ops by default, so we have to
5366 tell it that these ones are supposed to be unaligned. Long term,
5367 should rewrite so that only IA-64 specific data allocation pseudo-ops
5368 are aligned by default. */
5369 {"2byte", stmt_cons_ua
, 2},
5370 {"4byte", stmt_cons_ua
, 4},
5371 {"8byte", stmt_cons_ua
, 8},
5376 static const struct pseudo_opcode
5379 void (*handler
) (int);
5384 /* these are more like pseudo-ops, but don't start with a dot */
5385 { "data1", cons
, 1 },
5386 { "data2", cons
, 2 },
5387 { "data4", cons
, 4 },
5388 { "data8", cons
, 8 },
5389 { "data16", cons
, 16 },
5390 { "real4", stmt_float_cons
, 'f' },
5391 { "real8", stmt_float_cons
, 'd' },
5392 { "real10", stmt_float_cons
, 'x' },
5393 { "real16", stmt_float_cons
, 'X' },
5394 { "string", stringer
, 0 },
5395 { "stringz", stringer
, 1 },
5397 /* unaligned versions: */
5398 { "data2.ua", stmt_cons_ua
, 2 },
5399 { "data4.ua", stmt_cons_ua
, 4 },
5400 { "data8.ua", stmt_cons_ua
, 8 },
5401 { "data16.ua", stmt_cons_ua
, 16 },
5402 { "real4.ua", float_cons
, 'f' },
5403 { "real8.ua", float_cons
, 'd' },
5404 { "real10.ua", float_cons
, 'x' },
5405 { "real16.ua", float_cons
, 'X' },
5408 /* Declare a register by creating a symbol for it and entering it in
5409 the symbol table. */
5412 declare_register (name
, regnum
)
5419 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
5421 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5423 as_fatal ("Inserting \"%s\" into register table failed: %s",
5430 declare_register_set (prefix
, num_regs
, base_regnum
)
5438 for (i
= 0; i
< num_regs
; ++i
)
5440 sprintf (name
, "%s%u", prefix
, i
);
5441 declare_register (name
, base_regnum
+ i
);
5446 operand_width (opnd
)
5447 enum ia64_opnd opnd
;
5449 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5450 unsigned int bits
= 0;
5454 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5455 bits
+= odesc
->field
[i
].bits
;
5460 static enum operand_match_result
5461 operand_match (idesc
, index
, e
)
5462 const struct ia64_opcode
*idesc
;
5466 enum ia64_opnd opnd
= idesc
->operands
[index
];
5467 int bits
, relocatable
= 0;
5468 struct insn_fix
*fix
;
5475 case IA64_OPND_AR_CCV
:
5476 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5477 return OPERAND_MATCH
;
5480 case IA64_OPND_AR_CSD
:
5481 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5482 return OPERAND_MATCH
;
5485 case IA64_OPND_AR_PFS
:
5486 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5487 return OPERAND_MATCH
;
5491 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5492 return OPERAND_MATCH
;
5496 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5497 return OPERAND_MATCH
;
5501 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5502 return OPERAND_MATCH
;
5505 case IA64_OPND_PR_ROT
:
5506 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5507 return OPERAND_MATCH
;
5511 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5512 return OPERAND_MATCH
;
5515 case IA64_OPND_PSR_L
:
5516 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5517 return OPERAND_MATCH
;
5520 case IA64_OPND_PSR_UM
:
5521 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5522 return OPERAND_MATCH
;
5526 if (e
->X_op
== O_constant
)
5528 if (e
->X_add_number
== 1)
5529 return OPERAND_MATCH
;
5531 return OPERAND_OUT_OF_RANGE
;
5536 if (e
->X_op
== O_constant
)
5538 if (e
->X_add_number
== 8)
5539 return OPERAND_MATCH
;
5541 return OPERAND_OUT_OF_RANGE
;
5546 if (e
->X_op
== O_constant
)
5548 if (e
->X_add_number
== 16)
5549 return OPERAND_MATCH
;
5551 return OPERAND_OUT_OF_RANGE
;
5555 /* register operands: */
5558 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5559 && e
->X_add_number
< REG_AR
+ 128)
5560 return OPERAND_MATCH
;
5565 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5566 && e
->X_add_number
< REG_BR
+ 8)
5567 return OPERAND_MATCH
;
5571 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5572 && e
->X_add_number
< REG_CR
+ 128)
5573 return OPERAND_MATCH
;
5580 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5581 && e
->X_add_number
< REG_FR
+ 128)
5582 return OPERAND_MATCH
;
5587 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5588 && e
->X_add_number
< REG_P
+ 64)
5589 return OPERAND_MATCH
;
5595 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5596 && e
->X_add_number
< REG_GR
+ 128)
5597 return OPERAND_MATCH
;
5600 case IA64_OPND_R3_2
:
5601 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5603 if (e
->X_add_number
< REG_GR
+ 4)
5604 return OPERAND_MATCH
;
5605 else if (e
->X_add_number
< REG_GR
+ 128)
5606 return OPERAND_OUT_OF_RANGE
;
5610 /* indirect operands: */
5611 case IA64_OPND_CPUID_R3
:
5612 case IA64_OPND_DBR_R3
:
5613 case IA64_OPND_DTR_R3
:
5614 case IA64_OPND_ITR_R3
:
5615 case IA64_OPND_IBR_R3
:
5616 case IA64_OPND_MSR_R3
:
5617 case IA64_OPND_PKR_R3
:
5618 case IA64_OPND_PMC_R3
:
5619 case IA64_OPND_PMD_R3
:
5620 case IA64_OPND_RR_R3
:
5621 if (e
->X_op
== O_index
&& e
->X_op_symbol
5622 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5623 == opnd
- IA64_OPND_CPUID_R3
))
5624 return OPERAND_MATCH
;
5628 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5629 return OPERAND_MATCH
;
5632 /* immediate operands: */
5633 case IA64_OPND_CNT2a
:
5634 case IA64_OPND_LEN4
:
5635 case IA64_OPND_LEN6
:
5636 bits
= operand_width (idesc
->operands
[index
]);
5637 if (e
->X_op
== O_constant
)
5639 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5640 return OPERAND_MATCH
;
5642 return OPERAND_OUT_OF_RANGE
;
5646 case IA64_OPND_CNT2b
:
5647 if (e
->X_op
== O_constant
)
5649 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5650 return OPERAND_MATCH
;
5652 return OPERAND_OUT_OF_RANGE
;
5656 case IA64_OPND_CNT2c
:
5657 val
= e
->X_add_number
;
5658 if (e
->X_op
== O_constant
)
5660 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5661 return OPERAND_MATCH
;
5663 return OPERAND_OUT_OF_RANGE
;
5668 /* SOR must be an integer multiple of 8 */
5669 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5670 return OPERAND_OUT_OF_RANGE
;
5673 if (e
->X_op
== O_constant
)
5675 if ((bfd_vma
) e
->X_add_number
<= 96)
5676 return OPERAND_MATCH
;
5678 return OPERAND_OUT_OF_RANGE
;
5682 case IA64_OPND_IMMU62
:
5683 if (e
->X_op
== O_constant
)
5685 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5686 return OPERAND_MATCH
;
5688 return OPERAND_OUT_OF_RANGE
;
5692 /* FIXME -- need 62-bit relocation type */
5693 as_bad (_("62-bit relocation not yet implemented"));
5697 case IA64_OPND_IMMU64
:
5698 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5699 || e
->X_op
== O_subtract
)
5701 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5702 fix
->code
= BFD_RELOC_IA64_IMM64
;
5703 if (e
->X_op
!= O_subtract
)
5705 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5706 if (e
->X_op
== O_pseudo_fixup
)
5710 fix
->opnd
= idesc
->operands
[index
];
5713 ++CURR_SLOT
.num_fixups
;
5714 return OPERAND_MATCH
;
5716 else if (e
->X_op
== O_constant
)
5717 return OPERAND_MATCH
;
5720 case IA64_OPND_CCNT5
:
5721 case IA64_OPND_CNT5
:
5722 case IA64_OPND_CNT6
:
5723 case IA64_OPND_CPOS6a
:
5724 case IA64_OPND_CPOS6b
:
5725 case IA64_OPND_CPOS6c
:
5726 case IA64_OPND_IMMU2
:
5727 case IA64_OPND_IMMU7a
:
5728 case IA64_OPND_IMMU7b
:
5729 case IA64_OPND_IMMU21
:
5730 case IA64_OPND_IMMU24
:
5731 case IA64_OPND_MBTYPE4
:
5732 case IA64_OPND_MHTYPE8
:
5733 case IA64_OPND_POS6
:
5734 bits
= operand_width (idesc
->operands
[index
]);
5735 if (e
->X_op
== O_constant
)
5737 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5738 return OPERAND_MATCH
;
5740 return OPERAND_OUT_OF_RANGE
;
5744 case IA64_OPND_IMMU9
:
5745 bits
= operand_width (idesc
->operands
[index
]);
5746 if (e
->X_op
== O_constant
)
5748 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5750 int lobits
= e
->X_add_number
& 0x3;
5751 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5752 e
->X_add_number
|= (bfd_vma
) 0x3;
5753 return OPERAND_MATCH
;
5756 return OPERAND_OUT_OF_RANGE
;
5760 case IA64_OPND_IMM44
:
5761 /* least 16 bits must be zero */
5762 if ((e
->X_add_number
& 0xffff) != 0)
5763 /* XXX technically, this is wrong: we should not be issuing warning
5764 messages until we're sure this instruction pattern is going to
5766 as_warn (_("lower 16 bits of mask ignored"));
5768 if (e
->X_op
== O_constant
)
5770 if (((e
->X_add_number
>= 0
5771 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5772 || (e
->X_add_number
< 0
5773 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5776 if (e
->X_add_number
>= 0
5777 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5779 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5781 return OPERAND_MATCH
;
5784 return OPERAND_OUT_OF_RANGE
;
5788 case IA64_OPND_IMM17
:
5789 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5790 if (e
->X_op
== O_constant
)
5792 if (((e
->X_add_number
>= 0
5793 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5794 || (e
->X_add_number
< 0
5795 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5798 if (e
->X_add_number
>= 0
5799 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5801 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5803 return OPERAND_MATCH
;
5806 return OPERAND_OUT_OF_RANGE
;
5810 case IA64_OPND_IMM14
:
5811 case IA64_OPND_IMM22
:
5813 case IA64_OPND_IMM1
:
5814 case IA64_OPND_IMM8
:
5815 case IA64_OPND_IMM8U4
:
5816 case IA64_OPND_IMM8M1
:
5817 case IA64_OPND_IMM8M1U4
:
5818 case IA64_OPND_IMM8M1U8
:
5819 case IA64_OPND_IMM9a
:
5820 case IA64_OPND_IMM9b
:
5821 bits
= operand_width (idesc
->operands
[index
]);
5822 if (relocatable
&& (e
->X_op
== O_symbol
5823 || e
->X_op
== O_subtract
5824 || e
->X_op
== O_pseudo_fixup
))
5826 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5828 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5829 fix
->code
= BFD_RELOC_IA64_IMM14
;
5831 fix
->code
= BFD_RELOC_IA64_IMM22
;
5833 if (e
->X_op
!= O_subtract
)
5835 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5836 if (e
->X_op
== O_pseudo_fixup
)
5840 fix
->opnd
= idesc
->operands
[index
];
5843 ++CURR_SLOT
.num_fixups
;
5844 return OPERAND_MATCH
;
5846 else if (e
->X_op
!= O_constant
5847 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5848 return OPERAND_MISMATCH
;
5850 if (opnd
== IA64_OPND_IMM8M1U4
)
5852 /* Zero is not valid for unsigned compares that take an adjusted
5853 constant immediate range. */
5854 if (e
->X_add_number
== 0)
5855 return OPERAND_OUT_OF_RANGE
;
5857 /* Sign-extend 32-bit unsigned numbers, so that the following range
5858 checks will work. */
5859 val
= e
->X_add_number
;
5860 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5861 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5862 val
= ((val
<< 32) >> 32);
5864 /* Check for 0x100000000. This is valid because
5865 0x100000000-1 is the same as ((uint32_t) -1). */
5866 if (val
== ((bfd_signed_vma
) 1 << 32))
5867 return OPERAND_MATCH
;
5871 else if (opnd
== IA64_OPND_IMM8M1U8
)
5873 /* Zero is not valid for unsigned compares that take an adjusted
5874 constant immediate range. */
5875 if (e
->X_add_number
== 0)
5876 return OPERAND_OUT_OF_RANGE
;
5878 /* Check for 0x10000000000000000. */
5879 if (e
->X_op
== O_big
)
5881 if (generic_bignum
[0] == 0
5882 && generic_bignum
[1] == 0
5883 && generic_bignum
[2] == 0
5884 && generic_bignum
[3] == 0
5885 && generic_bignum
[4] == 1)
5886 return OPERAND_MATCH
;
5888 return OPERAND_OUT_OF_RANGE
;
5891 val
= e
->X_add_number
- 1;
5893 else if (opnd
== IA64_OPND_IMM8M1
)
5894 val
= e
->X_add_number
- 1;
5895 else if (opnd
== IA64_OPND_IMM8U4
)
5897 /* Sign-extend 32-bit unsigned numbers, so that the following range
5898 checks will work. */
5899 val
= e
->X_add_number
;
5900 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5901 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5902 val
= ((val
<< 32) >> 32);
5905 val
= e
->X_add_number
;
5907 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5908 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5909 return OPERAND_MATCH
;
5911 return OPERAND_OUT_OF_RANGE
;
5913 case IA64_OPND_INC3
:
5914 /* +/- 1, 4, 8, 16 */
5915 val
= e
->X_add_number
;
5918 if (e
->X_op
== O_constant
)
5920 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5921 return OPERAND_MATCH
;
5923 return OPERAND_OUT_OF_RANGE
;
5927 case IA64_OPND_TGT25
:
5928 case IA64_OPND_TGT25b
:
5929 case IA64_OPND_TGT25c
:
5930 case IA64_OPND_TGT64
:
5931 if (e
->X_op
== O_symbol
)
5933 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5934 if (opnd
== IA64_OPND_TGT25
)
5935 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5936 else if (opnd
== IA64_OPND_TGT25b
)
5937 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5938 else if (opnd
== IA64_OPND_TGT25c
)
5939 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5940 else if (opnd
== IA64_OPND_TGT64
)
5941 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5945 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5946 fix
->opnd
= idesc
->operands
[index
];
5949 ++CURR_SLOT
.num_fixups
;
5950 return OPERAND_MATCH
;
5952 case IA64_OPND_TAG13
:
5953 case IA64_OPND_TAG13b
:
5957 return OPERAND_MATCH
;
5960 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5961 /* There are no external relocs for TAG13/TAG13b fields, so we
5962 create a dummy reloc. This will not live past md_apply_fix3. */
5963 fix
->code
= BFD_RELOC_UNUSED
;
5964 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5965 fix
->opnd
= idesc
->operands
[index
];
5968 ++CURR_SLOT
.num_fixups
;
5969 return OPERAND_MATCH
;
5976 case IA64_OPND_LDXMOV
:
5977 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5978 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5979 fix
->opnd
= idesc
->operands
[index
];
5982 ++CURR_SLOT
.num_fixups
;
5983 return OPERAND_MATCH
;
5988 return OPERAND_MISMATCH
;
5997 memset (e
, 0, sizeof (*e
));
6000 if (*input_line_pointer
!= '}')
6002 sep
= *input_line_pointer
++;
6006 if (!md
.manual_bundling
)
6007 as_warn ("Found '}' when manual bundling is off");
6009 CURR_SLOT
.manual_bundling_off
= 1;
6010 md
.manual_bundling
= 0;
6016 /* Returns the next entry in the opcode table that matches the one in
6017 IDESC, and frees the entry in IDESC. If no matching entry is
6018 found, NULL is returned instead. */
6020 static struct ia64_opcode
*
6021 get_next_opcode (struct ia64_opcode
*idesc
)
6023 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6024 ia64_free_opcode (idesc
);
6028 /* Parse the operands for the opcode and find the opcode variant that
6029 matches the specified operands, or NULL if no match is possible. */
6031 static struct ia64_opcode
*
6032 parse_operands (idesc
)
6033 struct ia64_opcode
*idesc
;
6035 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6036 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6039 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6040 enum operand_match_result result
;
6042 char *first_arg
= 0, *end
, *saved_input_pointer
;
6045 assert (strlen (idesc
->name
) <= 128);
6047 strcpy (mnemonic
, idesc
->name
);
6048 if (idesc
->operands
[2] == IA64_OPND_SOF
6049 || idesc
->operands
[1] == IA64_OPND_SOF
)
6051 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6052 can't parse the first operand until we have parsed the
6053 remaining operands of the "alloc" instruction. */
6055 first_arg
= input_line_pointer
;
6056 end
= strchr (input_line_pointer
, '=');
6059 as_bad ("Expected separator `='");
6062 input_line_pointer
= end
+ 1;
6069 if (i
< NELEMS (CURR_SLOT
.opnd
))
6071 sep
= parse_operand (CURR_SLOT
.opnd
+ i
);
6072 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6079 sep
= parse_operand (&dummy
);
6080 if (dummy
.X_op
== O_absent
)
6086 if (sep
!= '=' && sep
!= ',')
6091 if (num_outputs
> 0)
6092 as_bad ("Duplicate equal sign (=) in instruction");
6094 num_outputs
= i
+ 1;
6099 as_bad ("Illegal operand separator `%c'", sep
);
6103 if (idesc
->operands
[2] == IA64_OPND_SOF
6104 || idesc
->operands
[1] == IA64_OPND_SOF
)
6106 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6107 know (strcmp (idesc
->name
, "alloc") == 0);
6108 i
= (CURR_SLOT
.opnd
[1].X_op
== O_register
6109 && CURR_SLOT
.opnd
[1].X_add_number
== REG_AR
+ AR_PFS
) ? 2 : 1;
6110 if (num_operands
== i
+ 3 /* first_arg not included in this count! */
6111 && CURR_SLOT
.opnd
[i
].X_op
== O_constant
6112 && CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6113 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
6114 && CURR_SLOT
.opnd
[i
+ 3].X_op
== O_constant
)
6116 sof
= set_regstack (CURR_SLOT
.opnd
[i
].X_add_number
,
6117 CURR_SLOT
.opnd
[i
+ 1].X_add_number
,
6118 CURR_SLOT
.opnd
[i
+ 2].X_add_number
,
6119 CURR_SLOT
.opnd
[i
+ 3].X_add_number
);
6121 /* now we can parse the first arg: */
6122 saved_input_pointer
= input_line_pointer
;
6123 input_line_pointer
= first_arg
;
6124 sep
= parse_operand (CURR_SLOT
.opnd
+ 0);
6126 --num_outputs
; /* force error */
6127 input_line_pointer
= saved_input_pointer
;
6129 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6130 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6131 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6132 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6136 highest_unmatched_operand
= -4;
6137 curr_out_of_range_pos
= -1;
6139 for (; idesc
; idesc
= get_next_opcode (idesc
))
6141 if (num_outputs
!= idesc
->num_outputs
)
6142 continue; /* mismatch in # of outputs */
6143 if (highest_unmatched_operand
< 0)
6144 highest_unmatched_operand
|= 1;
6145 if (num_operands
> NELEMS (idesc
->operands
)
6146 || (num_operands
< NELEMS (idesc
->operands
)
6147 && idesc
->operands
[num_operands
])
6148 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6149 continue; /* mismatch in number of arguments */
6150 if (highest_unmatched_operand
< 0)
6151 highest_unmatched_operand
|= 2;
6153 CURR_SLOT
.num_fixups
= 0;
6155 /* Try to match all operands. If we see an out-of-range operand,
6156 then continue trying to match the rest of the operands, since if
6157 the rest match, then this idesc will give the best error message. */
6159 out_of_range_pos
= -1;
6160 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6162 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6163 if (result
!= OPERAND_MATCH
)
6165 if (result
!= OPERAND_OUT_OF_RANGE
)
6167 if (out_of_range_pos
< 0)
6168 /* remember position of the first out-of-range operand: */
6169 out_of_range_pos
= i
;
6173 /* If we did not match all operands, or if at least one operand was
6174 out-of-range, then this idesc does not match. Keep track of which
6175 idesc matched the most operands before failing. If we have two
6176 idescs that failed at the same position, and one had an out-of-range
6177 operand, then prefer the out-of-range operand. Thus if we have
6178 "add r0=0x1000000,r1" we get an error saying the constant is out
6179 of range instead of an error saying that the constant should have been
6182 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6184 if (i
> highest_unmatched_operand
6185 || (i
== highest_unmatched_operand
6186 && out_of_range_pos
> curr_out_of_range_pos
))
6188 highest_unmatched_operand
= i
;
6189 if (out_of_range_pos
>= 0)
6191 expected_operand
= idesc
->operands
[out_of_range_pos
];
6192 error_pos
= out_of_range_pos
;
6196 expected_operand
= idesc
->operands
[i
];
6199 curr_out_of_range_pos
= out_of_range_pos
;
6208 if (expected_operand
)
6209 as_bad ("Operand %u of `%s' should be %s",
6210 error_pos
+ 1, mnemonic
,
6211 elf64_ia64_operands
[expected_operand
].desc
);
6212 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6213 as_bad ("Wrong number of output operands");
6214 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6215 as_bad ("Wrong number of input operands");
6217 as_bad ("Operand mismatch");
6221 /* Check that the instruction doesn't use
6222 - r0, f0, or f1 as output operands
6223 - the same predicate twice as output operands
6224 - r0 as address of a base update load or store
6225 - the same GR as output and address of a base update load
6226 - two even- or two odd-numbered FRs as output operands of a floating
6227 point parallel load.
6228 At most two (conflicting) output (or output-like) operands can exist,
6229 (floating point parallel loads have three outputs, but the base register,
6230 if updated, cannot conflict with the actual outputs). */
6232 for (i
= 0; i
< num_operands
; ++i
)
6237 switch (idesc
->operands
[i
])
6242 if (i
< num_outputs
)
6244 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6247 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6249 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6254 if (i
< num_outputs
)
6257 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6259 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6266 if (i
< num_outputs
)
6268 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6269 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6272 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6275 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6277 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6281 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6283 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6286 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6288 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6299 as_warn ("Invalid use of `%c%d' as output operand", reg_class
, regno
);
6302 as_warn ("Invalid use of `r%d' as base update address operand", regno
);
6308 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6313 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6318 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6326 as_warn ("Invalid duplicate use of `%c%d'", reg_class
, reg1
);
6328 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6329 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6330 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6331 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6332 && ! ((reg1
^ reg2
) & 1))
6333 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6334 reg1
- REG_FR
, reg2
- REG_FR
);
6335 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6336 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6337 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6338 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6339 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6340 reg1
- REG_FR
, reg2
- REG_FR
);
6345 build_insn (slot
, insnp
)
6349 const struct ia64_operand
*odesc
, *o2desc
;
6350 struct ia64_opcode
*idesc
= slot
->idesc
;
6351 bfd_signed_vma insn
, val
;
6355 insn
= idesc
->opcode
| slot
->qp_regno
;
6357 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6359 if (slot
->opnd
[i
].X_op
== O_register
6360 || slot
->opnd
[i
].X_op
== O_constant
6361 || slot
->opnd
[i
].X_op
== O_index
)
6362 val
= slot
->opnd
[i
].X_add_number
;
6363 else if (slot
->opnd
[i
].X_op
== O_big
)
6365 /* This must be the value 0x10000000000000000. */
6366 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6372 switch (idesc
->operands
[i
])
6374 case IA64_OPND_IMMU64
:
6375 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6376 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6377 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6378 | (((val
>> 63) & 0x1) << 36));
6381 case IA64_OPND_IMMU62
:
6382 val
&= 0x3fffffffffffffffULL
;
6383 if (val
!= slot
->opnd
[i
].X_add_number
)
6384 as_warn (_("Value truncated to 62 bits"));
6385 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6386 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6389 case IA64_OPND_TGT64
:
6391 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6392 insn
|= ((((val
>> 59) & 0x1) << 36)
6393 | (((val
>> 0) & 0xfffff) << 13));
6424 case IA64_OPND_R3_2
:
6425 case IA64_OPND_CPUID_R3
:
6426 case IA64_OPND_DBR_R3
:
6427 case IA64_OPND_DTR_R3
:
6428 case IA64_OPND_ITR_R3
:
6429 case IA64_OPND_IBR_R3
:
6431 case IA64_OPND_MSR_R3
:
6432 case IA64_OPND_PKR_R3
:
6433 case IA64_OPND_PMC_R3
:
6434 case IA64_OPND_PMD_R3
:
6435 case IA64_OPND_RR_R3
:
6443 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6444 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6446 as_bad_where (slot
->src_file
, slot
->src_line
,
6447 "Bad operand value: %s", err
);
6448 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6450 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6451 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6453 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6454 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6456 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6457 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6458 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6460 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6461 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6471 int manual_bundling_off
= 0, manual_bundling
= 0;
6472 enum ia64_unit required_unit
, insn_unit
= 0;
6473 enum ia64_insn_type type
[3], insn_type
;
6474 unsigned int template, orig_template
;
6475 bfd_vma insn
[3] = { -1, -1, -1 };
6476 struct ia64_opcode
*idesc
;
6477 int end_of_insn_group
= 0, user_template
= -1;
6478 int n
, i
, j
, first
, curr
;
6479 unw_rec_list
*ptr
, *last_ptr
, *end_ptr
;
6480 bfd_vma t0
= 0, t1
= 0;
6481 struct label_fix
*lfix
;
6482 struct insn_fix
*ifix
;
6488 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6489 know (first
>= 0 & first
< NUM_SLOTS
);
6490 n
= MIN (3, md
.num_slots_in_use
);
6492 /* Determine template: user user_template if specified, best match
6495 if (md
.slot
[first
].user_template
>= 0)
6496 user_template
= template = md
.slot
[first
].user_template
;
6499 /* Auto select appropriate template. */
6500 memset (type
, 0, sizeof (type
));
6502 for (i
= 0; i
< n
; ++i
)
6504 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6506 type
[i
] = md
.slot
[curr
].idesc
->type
;
6507 curr
= (curr
+ 1) % NUM_SLOTS
;
6509 template = best_template
[type
[0]][type
[1]][type
[2]];
6512 /* initialize instructions with appropriate nops: */
6513 for (i
= 0; i
< 3; ++i
)
6514 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6518 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6519 from the start of the frag. */
6520 addr_mod
= frag_now_fix () & 15;
6521 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6522 as_bad (_("instruction address is not a multiple of 16"));
6523 frag_now
->insn_addr
= addr_mod
;
6524 frag_now
->has_code
= 1;
6526 /* now fill in slots with as many insns as possible: */
6528 idesc
= md
.slot
[curr
].idesc
;
6529 end_of_insn_group
= 0;
6530 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6532 /* If we have unwind records, we may need to update some now. */
6533 ptr
= md
.slot
[curr
].unwind_record
;
6536 /* Find the last prologue/body record in the list for the current
6537 insn, and set the slot number for all records up to that point.
6538 This needs to be done now, because prologue/body records refer to
6539 the current point, not the point after the instruction has been
6540 issued. This matters because there may have been nops emitted
6541 meanwhile. Any non-prologue non-body record followed by a
6542 prologue/body record must also refer to the current point. */
6544 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6545 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6546 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6547 || ptr
->r
.type
== body
)
6551 /* Make last_ptr point one after the last prologue/body
6553 last_ptr
= last_ptr
->next
;
6554 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6557 ptr
->slot_number
= (unsigned long) f
+ i
;
6558 ptr
->slot_frag
= frag_now
;
6560 /* Remove the initialized records, so that we won't accidentally
6561 update them again if we insert a nop and continue. */
6562 md
.slot
[curr
].unwind_record
= last_ptr
;
6566 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6567 if (md
.slot
[curr
].manual_bundling_on
)
6570 manual_bundling
= 1;
6572 break; /* Need to start a new bundle. */
6575 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6577 if (manual_bundling
&& !manual_bundling_off
)
6579 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6580 "`%s' must be last in bundle", idesc
->name
);
6582 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6586 if (idesc
->flags
& IA64_OPCODE_LAST
)
6589 unsigned int required_template
;
6591 /* If we need a stop bit after an M slot, our only choice is
6592 template 5 (M;;MI). If we need a stop bit after a B
6593 slot, our only choice is to place it at the end of the
6594 bundle, because the only available templates are MIB,
6595 MBB, BBB, MMB, and MFB. We don't handle anything other
6596 than M and B slots because these are the only kind of
6597 instructions that can have the IA64_OPCODE_LAST bit set. */
6598 required_template
= template;
6599 switch (idesc
->type
)
6603 required_template
= 5;
6611 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6612 "Internal error: don't know how to force %s to end"
6613 "of instruction group", idesc
->name
);
6618 && (i
> required_slot
6619 || (required_slot
== 2 && !manual_bundling_off
)
6620 || (user_template
>= 0
6621 /* Changing from MMI to M;MI is OK. */
6622 && (template ^ required_template
) > 1)))
6624 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6625 "`%s' must be last in instruction group",
6627 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6628 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6630 if (required_slot
< i
)
6631 /* Can't fit this instruction. */
6635 if (required_template
!= template)
6637 /* If we switch the template, we need to reset the NOPs
6638 after slot i. The slot-types of the instructions ahead
6639 of i never change, so we don't need to worry about
6640 changing NOPs in front of this slot. */
6641 for (j
= i
; j
< 3; ++j
)
6642 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6644 template = required_template
;
6646 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6648 if (manual_bundling
)
6650 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6651 "Label must be first in a bundle");
6652 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6654 /* This insn must go into the first slot of a bundle. */
6658 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6660 /* We need an instruction group boundary in the middle of a
6661 bundle. See if we can switch to an other template with
6662 an appropriate boundary. */
6664 orig_template
= template;
6665 if (i
== 1 && (user_template
== 4
6666 || (user_template
< 0
6667 && (ia64_templ_desc
[template].exec_unit
[0]
6671 end_of_insn_group
= 0;
6673 else if (i
== 2 && (user_template
== 0
6674 || (user_template
< 0
6675 && (ia64_templ_desc
[template].exec_unit
[1]
6677 /* This test makes sure we don't switch the template if
6678 the next instruction is one that needs to be first in
6679 an instruction group. Since all those instructions are
6680 in the M group, there is no way such an instruction can
6681 fit in this bundle even if we switch the template. The
6682 reason we have to check for this is that otherwise we
6683 may end up generating "MI;;I M.." which has the deadly
6684 effect that the second M instruction is no longer the
6685 first in the group! --davidm 99/12/16 */
6686 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6689 end_of_insn_group
= 0;
6692 && user_template
== 0
6693 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6694 /* Use the next slot. */
6696 else if (curr
!= first
)
6697 /* can't fit this insn */
6700 if (template != orig_template
)
6701 /* if we switch the template, we need to reset the NOPs
6702 after slot i. The slot-types of the instructions ahead
6703 of i never change, so we don't need to worry about
6704 changing NOPs in front of this slot. */
6705 for (j
= i
; j
< 3; ++j
)
6706 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6708 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6710 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6711 if (idesc
->type
== IA64_TYPE_DYN
)
6713 enum ia64_opnd opnd1
, opnd2
;
6715 if ((strcmp (idesc
->name
, "nop") == 0)
6716 || (strcmp (idesc
->name
, "break") == 0))
6717 insn_unit
= required_unit
;
6718 else if (strcmp (idesc
->name
, "hint") == 0)
6720 insn_unit
= required_unit
;
6721 if (required_unit
== IA64_UNIT_B
)
6727 case hint_b_warning
:
6728 as_warn ("hint in B unit may be treated as nop");
6731 /* When manual bundling is off and there is no
6732 user template, we choose a different unit so
6733 that hint won't go into the current slot. We
6734 will fill the current bundle with nops and
6735 try to put hint into the next bundle. */
6736 if (!manual_bundling
&& user_template
< 0)
6737 insn_unit
= IA64_UNIT_I
;
6739 as_bad ("hint in B unit can't be used");
6744 else if (strcmp (idesc
->name
, "chk.s") == 0
6745 || strcmp (idesc
->name
, "mov") == 0)
6747 insn_unit
= IA64_UNIT_M
;
6748 if (required_unit
== IA64_UNIT_I
6749 || (required_unit
== IA64_UNIT_F
&& template == 6))
6750 insn_unit
= IA64_UNIT_I
;
6753 as_fatal ("emit_one_bundle: unexpected dynamic op");
6755 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbfxx"[insn_unit
]);
6756 opnd1
= idesc
->operands
[0];
6757 opnd2
= idesc
->operands
[1];
6758 ia64_free_opcode (idesc
);
6759 idesc
= ia64_find_opcode (mnemonic
);
6760 /* moves to/from ARs have collisions */
6761 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6763 while (idesc
!= NULL
6764 && (idesc
->operands
[0] != opnd1
6765 || idesc
->operands
[1] != opnd2
))
6766 idesc
= get_next_opcode (idesc
);
6768 md
.slot
[curr
].idesc
= idesc
;
6772 insn_type
= idesc
->type
;
6773 insn_unit
= IA64_UNIT_NIL
;
6777 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6778 insn_unit
= required_unit
;
6780 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6781 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6782 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6783 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6784 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6789 if (insn_unit
!= required_unit
)
6791 if (required_unit
== IA64_UNIT_L
6792 && insn_unit
== IA64_UNIT_I
6793 && !(idesc
->flags
& IA64_OPCODE_X_IN_MLX
))
6795 /* we got ourselves an MLX template but the current
6796 instruction isn't an X-unit, or an I-unit instruction
6797 that can go into the X slot of an MLX template. Duh. */
6798 if (md
.num_slots_in_use
>= NUM_SLOTS
)
6800 as_bad_where (md
.slot
[curr
].src_file
,
6801 md
.slot
[curr
].src_line
,
6802 "`%s' can't go in X slot of "
6803 "MLX template", idesc
->name
);
6804 /* drop this insn so we don't livelock: */
6805 --md
.num_slots_in_use
;
6809 continue; /* try next slot */
6812 if (debug_type
== DEBUG_DWARF2
|| md
.slot
[curr
].loc_directive_seen
)
6814 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6816 md
.slot
[curr
].loc_directive_seen
= 0;
6817 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6820 build_insn (md
.slot
+ curr
, insn
+ i
);
6822 ptr
= md
.slot
[curr
].unwind_record
;
6825 /* Set slot numbers for all remaining unwind records belonging to the
6826 current insn. There can not be any prologue/body unwind records
6828 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6829 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6831 ptr
->slot_number
= (unsigned long) f
+ i
;
6832 ptr
->slot_frag
= frag_now
;
6834 md
.slot
[curr
].unwind_record
= NULL
;
6837 if (required_unit
== IA64_UNIT_L
)
6840 /* skip one slot for long/X-unit instructions */
6843 --md
.num_slots_in_use
;
6845 /* now is a good time to fix up the labels for this insn: */
6846 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6848 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6849 symbol_set_frag (lfix
->sym
, frag_now
);
6851 /* and fix up the tags also. */
6852 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6854 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6855 symbol_set_frag (lfix
->sym
, frag_now
);
6858 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6860 ifix
= md
.slot
[curr
].fixup
+ j
;
6861 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6862 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6863 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6864 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6865 fix
->fx_file
= md
.slot
[curr
].src_file
;
6866 fix
->fx_line
= md
.slot
[curr
].src_line
;
6869 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6872 ia64_free_opcode (md
.slot
[curr
].idesc
);
6873 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6874 md
.slot
[curr
].user_template
= -1;
6876 if (manual_bundling_off
)
6878 manual_bundling
= 0;
6881 curr
= (curr
+ 1) % NUM_SLOTS
;
6882 idesc
= md
.slot
[curr
].idesc
;
6884 if (manual_bundling
> 0)
6886 if (md
.num_slots_in_use
> 0)
6888 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6889 "`%s' does not fit into %s template",
6890 idesc
->name
, ia64_templ_desc
[template].name
);
6891 --md
.num_slots_in_use
;
6894 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6895 "Missing '}' at end of file");
6897 know (md
.num_slots_in_use
< NUM_SLOTS
);
6899 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6900 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6902 number_to_chars_littleendian (f
+ 0, t0
, 8);
6903 number_to_chars_littleendian (f
+ 8, t1
, 8);
6907 unwind
.list
->next_slot_number
= (unsigned long) f
+ 16;
6908 unwind
.list
->next_slot_frag
= frag_now
;
6913 md_parse_option (c
, arg
)
6920 /* Switches from the Intel assembler. */
6922 if (strcmp (arg
, "ilp64") == 0
6923 || strcmp (arg
, "lp64") == 0
6924 || strcmp (arg
, "p64") == 0)
6926 md
.flags
|= EF_IA_64_ABI64
;
6928 else if (strcmp (arg
, "ilp32") == 0)
6930 md
.flags
&= ~EF_IA_64_ABI64
;
6932 else if (strcmp (arg
, "le") == 0)
6934 md
.flags
&= ~EF_IA_64_BE
;
6935 default_big_endian
= 0;
6937 else if (strcmp (arg
, "be") == 0)
6939 md
.flags
|= EF_IA_64_BE
;
6940 default_big_endian
= 1;
6942 else if (strncmp (arg
, "unwind-check=", 13) == 0)
6945 if (strcmp (arg
, "warning") == 0)
6946 md
.unwind_check
= unwind_check_warning
;
6947 else if (strcmp (arg
, "error") == 0)
6948 md
.unwind_check
= unwind_check_error
;
6952 else if (strncmp (arg
, "hint.b=", 7) == 0)
6955 if (strcmp (arg
, "ok") == 0)
6956 md
.hint_b
= hint_b_ok
;
6957 else if (strcmp (arg
, "warning") == 0)
6958 md
.hint_b
= hint_b_warning
;
6959 else if (strcmp (arg
, "error") == 0)
6960 md
.hint_b
= hint_b_error
;
6969 if (strcmp (arg
, "so") == 0)
6971 /* Suppress signon message. */
6973 else if (strcmp (arg
, "pi") == 0)
6975 /* Reject privileged instructions. FIXME */
6977 else if (strcmp (arg
, "us") == 0)
6979 /* Allow union of signed and unsigned range. FIXME */
6981 else if (strcmp (arg
, "close_fcalls") == 0)
6983 /* Do not resolve global function calls. */
6990 /* temp[="prefix"] Insert temporary labels into the object file
6991 symbol table prefixed by "prefix".
6992 Default prefix is ":temp:".
6997 /* indirect=<tgt> Assume unannotated indirect branches behavior
6998 according to <tgt> --
6999 exit: branch out from the current context (default)
7000 labels: all labels in context may be branch targets
7002 if (strncmp (arg
, "indirect=", 9) != 0)
7007 /* -X conflicts with an ignored option, use -x instead */
7009 if (!arg
|| strcmp (arg
, "explicit") == 0)
7011 /* set default mode to explicit */
7012 md
.default_explicit_mode
= 1;
7015 else if (strcmp (arg
, "auto") == 0)
7017 md
.default_explicit_mode
= 0;
7019 else if (strcmp (arg
, "none") == 0)
7023 else if (strcmp (arg
, "debug") == 0)
7027 else if (strcmp (arg
, "debugx") == 0)
7029 md
.default_explicit_mode
= 1;
7032 else if (strcmp (arg
, "debugn") == 0)
7039 as_bad (_("Unrecognized option '-x%s'"), arg
);
7044 /* nops Print nops statistics. */
7047 /* GNU specific switches for gcc. */
7048 case OPTION_MCONSTANT_GP
:
7049 md
.flags
|= EF_IA_64_CONS_GP
;
7052 case OPTION_MAUTO_PIC
:
7053 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7064 md_show_usage (stream
)
7069 --mconstant-gp mark output file as using the constant-GP model\n\
7070 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7071 --mauto-pic mark output file as using the constant-GP model\n\
7072 without function descriptors (sets ELF header flag\n\
7073 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7074 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7075 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7076 -munwind-check=[warning|error]\n\
7077 unwind directive check (default -munwind-check=warning)\n\
7078 -mhint.b=[ok|warning|error]\n\
7079 hint.b check (default -mhint.b=error)\n\
7080 -x | -xexplicit turn on dependency violation checking\n\
7081 -xauto automagically remove dependency violations (default)\n\
7082 -xnone turn off dependency violation checking\n\
7083 -xdebug debug dependency violation checker\n\
7084 -xdebugn debug dependency violation checker but turn off\n\
7085 dependency violation checking\n\
7086 -xdebugx debug dependency violation checker and turn on\n\
7087 dependency violation checking\n"),
7092 ia64_after_parse_args ()
7094 if (debug_type
== DEBUG_STABS
)
7095 as_fatal (_("--gstabs is not supported for ia64"));
7098 /* Return true if TYPE fits in TEMPL at SLOT. */
7101 match (int templ
, int type
, int slot
)
7103 enum ia64_unit unit
;
7106 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7109 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7111 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7113 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7114 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7115 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7116 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7117 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7118 default: result
= 0; break;
7123 /* Add a bit of extra goodness if a nop of type F or B would fit
7124 in TEMPL at SLOT. */
7127 extra_goodness (int templ
, int slot
)
7129 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7131 if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7136 /* This function is called once, at assembler startup time. It sets
7137 up all the tables, etc. that the MD part of the assembler will need
7138 that can be determined before arguments are parsed. */
7142 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
7147 md
.explicit_mode
= md
.default_explicit_mode
;
7149 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7151 /* Make sure function pointers get initialized. */
7152 target_big_endian
= -1;
7153 dot_byteorder (default_big_endian
);
7155 alias_hash
= hash_new ();
7156 alias_name_hash
= hash_new ();
7157 secalias_hash
= hash_new ();
7158 secalias_name_hash
= hash_new ();
7160 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7161 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7162 &zero_address_frag
);
7164 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7165 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7166 &zero_address_frag
);
7168 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7169 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7170 &zero_address_frag
);
7172 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7173 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7174 &zero_address_frag
);
7176 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7177 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7178 &zero_address_frag
);
7180 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7181 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7182 &zero_address_frag
);
7184 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7185 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7186 &zero_address_frag
);
7188 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7189 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7190 &zero_address_frag
);
7192 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7193 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7194 &zero_address_frag
);
7196 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7197 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7198 &zero_address_frag
);
7200 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7201 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7202 &zero_address_frag
);
7204 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7205 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7206 &zero_address_frag
);
7208 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7209 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7210 &zero_address_frag
);
7212 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7213 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7214 &zero_address_frag
);
7216 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7217 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7218 &zero_address_frag
);
7220 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7221 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7222 &zero_address_frag
);
7224 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7225 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7226 &zero_address_frag
);
7228 /* Compute the table of best templates. We compute goodness as a
7229 base 4 value, in which each match counts for 3, each F counts
7230 for 2, each B counts for 1. This should maximize the number of
7231 F and B nops in the chosen bundles, which is good because these
7232 pipelines are least likely to be overcommitted. */
7233 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7234 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7235 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7238 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7241 if (match (t
, i
, 0))
7243 if (match (t
, j
, 1))
7245 if (match (t
, k
, 2))
7246 goodness
= 3 + 3 + 3;
7248 goodness
= 3 + 3 + extra_goodness (t
, 2);
7250 else if (match (t
, j
, 2))
7251 goodness
= 3 + 3 + extra_goodness (t
, 1);
7255 goodness
+= extra_goodness (t
, 1);
7256 goodness
+= extra_goodness (t
, 2);
7259 else if (match (t
, i
, 1))
7261 if (match (t
, j
, 2))
7264 goodness
= 3 + extra_goodness (t
, 2);
7266 else if (match (t
, i
, 2))
7267 goodness
= 3 + extra_goodness (t
, 1);
7269 if (goodness
> best
)
7272 best_template
[i
][j
][k
] = t
;
7277 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7278 md
.slot
[i
].user_template
= -1;
7280 md
.pseudo_hash
= hash_new ();
7281 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7283 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7284 (void *) (pseudo_opcode
+ i
));
7286 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7287 pseudo_opcode
[i
].name
, err
);
7290 md
.reg_hash
= hash_new ();
7291 md
.dynreg_hash
= hash_new ();
7292 md
.const_hash
= hash_new ();
7293 md
.entry_hash
= hash_new ();
7295 /* general registers: */
7298 for (i
= 0; i
< total
; ++i
)
7300 sprintf (name
, "r%d", i
- REG_GR
);
7301 md
.regsym
[i
] = declare_register (name
, i
);
7304 /* floating point registers: */
7306 for (; i
< total
; ++i
)
7308 sprintf (name
, "f%d", i
- REG_FR
);
7309 md
.regsym
[i
] = declare_register (name
, i
);
7312 /* application registers: */
7315 for (; i
< total
; ++i
)
7317 sprintf (name
, "ar%d", i
- REG_AR
);
7318 md
.regsym
[i
] = declare_register (name
, i
);
7321 /* control registers: */
7324 for (; i
< total
; ++i
)
7326 sprintf (name
, "cr%d", i
- REG_CR
);
7327 md
.regsym
[i
] = declare_register (name
, i
);
7330 /* predicate registers: */
7332 for (; i
< total
; ++i
)
7334 sprintf (name
, "p%d", i
- REG_P
);
7335 md
.regsym
[i
] = declare_register (name
, i
);
7338 /* branch registers: */
7340 for (; i
< total
; ++i
)
7342 sprintf (name
, "b%d", i
- REG_BR
);
7343 md
.regsym
[i
] = declare_register (name
, i
);
7346 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
7347 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
7348 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
7349 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
7350 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
7351 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
7352 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
7354 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7356 regnum
= indirect_reg
[i
].regnum
;
7357 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
7360 /* define synonyms for application registers: */
7361 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
7362 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
7363 REG_AR
+ ar
[i
- REG_AR
].regnum
);
7365 /* define synonyms for control registers: */
7366 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
7367 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
7368 REG_CR
+ cr
[i
- REG_CR
].regnum
);
7370 declare_register ("gp", REG_GR
+ 1);
7371 declare_register ("sp", REG_GR
+ 12);
7372 declare_register ("rp", REG_BR
+ 0);
7374 /* pseudo-registers used to specify unwind info: */
7375 declare_register ("psp", REG_PSP
);
7377 declare_register_set ("ret", 4, REG_GR
+ 8);
7378 declare_register_set ("farg", 8, REG_FR
+ 8);
7379 declare_register_set ("fret", 8, REG_FR
+ 8);
7381 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7383 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7384 (PTR
) (const_bits
+ i
));
7386 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7390 /* Set the architecture and machine depending on defaults and command line
7392 if (md
.flags
& EF_IA_64_ABI64
)
7393 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7395 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7398 as_warn (_("Could not set architecture and machine"));
7400 /* Set the pointer size and pointer shift size depending on md.flags */
7402 if (md
.flags
& EF_IA_64_ABI64
)
7404 md
.pointer_size
= 8; /* pointers are 8 bytes */
7405 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7409 md
.pointer_size
= 4; /* pointers are 4 bytes */
7410 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7413 md
.mem_offset
.hint
= 0;
7416 md
.entry_labels
= NULL
;
7419 /* Set the default options in md. Cannot do this in md_begin because
7420 that is called after md_parse_option which is where we set the
7421 options in md based on command line options. */
7424 ia64_init (argc
, argv
)
7425 int argc ATTRIBUTE_UNUSED
;
7426 char **argv ATTRIBUTE_UNUSED
;
7428 md
.flags
= MD_FLAGS_DEFAULT
;
7430 /* FIXME: We should change it to unwind_check_error someday. */
7431 md
.unwind_check
= unwind_check_warning
;
7432 md
.hint_b
= hint_b_error
;
7435 /* Return a string for the target object file format. */
7438 ia64_target_format ()
7440 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7442 if (md
.flags
& EF_IA_64_BE
)
7444 if (md
.flags
& EF_IA_64_ABI64
)
7445 #if defined(TE_AIX50)
7446 return "elf64-ia64-aix-big";
7447 #elif defined(TE_HPUX)
7448 return "elf64-ia64-hpux-big";
7450 return "elf64-ia64-big";
7453 #if defined(TE_AIX50)
7454 return "elf32-ia64-aix-big";
7455 #elif defined(TE_HPUX)
7456 return "elf32-ia64-hpux-big";
7458 return "elf32-ia64-big";
7463 if (md
.flags
& EF_IA_64_ABI64
)
7465 return "elf64-ia64-aix-little";
7467 return "elf64-ia64-little";
7471 return "elf32-ia64-aix-little";
7473 return "elf32-ia64-little";
7478 return "unknown-format";
7482 ia64_end_of_source ()
7484 /* terminate insn group upon reaching end of file: */
7485 insn_group_break (1, 0, 0);
7487 /* emits slots we haven't written yet: */
7488 ia64_flush_insns ();
7490 bfd_set_private_flags (stdoutput
, md
.flags
);
7492 md
.mem_offset
.hint
= 0;
7498 if (md
.qp
.X_op
== O_register
)
7499 as_bad ("qualifying predicate not followed by instruction");
7500 md
.qp
.X_op
= O_absent
;
7502 if (ignore_input ())
7505 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7507 if (md
.detect_dv
&& !md
.explicit_mode
)
7514 as_warn (_("Explicit stops are ignored in auto mode"));
7518 insn_group_break (1, 0, 0);
7522 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7524 static int defining_tag
= 0;
7527 ia64_unrecognized_line (ch
)
7533 expression (&md
.qp
);
7534 if (*input_line_pointer
++ != ')')
7536 as_bad ("Expected ')'");
7539 if (md
.qp
.X_op
!= O_register
)
7541 as_bad ("Qualifying predicate expected");
7544 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7546 as_bad ("Predicate register expected");
7552 if (md
.manual_bundling
)
7553 as_warn ("Found '{' when manual bundling is already turned on");
7555 CURR_SLOT
.manual_bundling_on
= 1;
7556 md
.manual_bundling
= 1;
7558 /* Bundling is only acceptable in explicit mode
7559 or when in default automatic mode. */
7560 if (md
.detect_dv
&& !md
.explicit_mode
)
7562 if (!md
.mode_explicitly_set
7563 && !md
.default_explicit_mode
)
7566 as_warn (_("Found '{' after explicit switch to automatic mode"));
7571 if (!md
.manual_bundling
)
7572 as_warn ("Found '}' when manual bundling is off");
7574 PREV_SLOT
.manual_bundling_off
= 1;
7575 md
.manual_bundling
= 0;
7577 /* switch back to automatic mode, if applicable */
7580 && !md
.mode_explicitly_set
7581 && !md
.default_explicit_mode
)
7584 /* Allow '{' to follow on the same line. We also allow ";;", but that
7585 happens automatically because ';' is an end of line marker. */
7587 if (input_line_pointer
[0] == '{')
7589 input_line_pointer
++;
7590 return ia64_unrecognized_line ('{');
7593 demand_empty_rest_of_line ();
7603 if (md
.qp
.X_op
== O_register
)
7605 as_bad ("Tag must come before qualifying predicate.");
7609 /* This implements just enough of read_a_source_file in read.c to
7610 recognize labels. */
7611 if (is_name_beginner (*input_line_pointer
))
7613 s
= input_line_pointer
;
7614 c
= get_symbol_end ();
7616 else if (LOCAL_LABELS_FB
7617 && ISDIGIT (*input_line_pointer
))
7620 while (ISDIGIT (*input_line_pointer
))
7621 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7622 fb_label_instance_inc (temp
);
7623 s
= fb_label_name (temp
, 0);
7624 c
= *input_line_pointer
;
7633 /* Put ':' back for error messages' sake. */
7634 *input_line_pointer
++ = ':';
7635 as_bad ("Expected ':'");
7642 /* Put ':' back for error messages' sake. */
7643 *input_line_pointer
++ = ':';
7644 if (*input_line_pointer
++ != ']')
7646 as_bad ("Expected ']'");
7651 as_bad ("Tag name expected");
7661 /* Not a valid line. */
7666 ia64_frob_label (sym
)
7669 struct label_fix
*fix
;
7671 /* Tags need special handling since they are not bundle breaks like
7675 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7677 fix
->next
= CURR_SLOT
.tag_fixups
;
7678 CURR_SLOT
.tag_fixups
= fix
;
7683 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7685 md
.last_text_seg
= now_seg
;
7686 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7688 fix
->next
= CURR_SLOT
.label_fixups
;
7689 CURR_SLOT
.label_fixups
= fix
;
7691 /* Keep track of how many code entry points we've seen. */
7692 if (md
.path
== md
.maxpaths
)
7695 md
.entry_labels
= (const char **)
7696 xrealloc ((void *) md
.entry_labels
,
7697 md
.maxpaths
* sizeof (char *));
7699 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7704 /* The HP-UX linker will give unresolved symbol errors for symbols
7705 that are declared but unused. This routine removes declared,
7706 unused symbols from an object. */
7708 ia64_frob_symbol (sym
)
7711 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7712 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7713 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7714 && ! S_IS_EXTERNAL (sym
)))
7721 ia64_flush_pending_output ()
7723 if (!md
.keep_pending_output
7724 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7726 /* ??? This causes many unnecessary stop bits to be emitted.
7727 Unfortunately, it isn't clear if it is safe to remove this. */
7728 insn_group_break (1, 0, 0);
7729 ia64_flush_insns ();
7733 /* Do ia64-specific expression optimization. All that's done here is
7734 to transform index expressions that are either due to the indexing
7735 of rotating registers or due to the indexing of indirect register
7738 ia64_optimize_expr (l
, op
, r
)
7747 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
7749 num_regs
= (l
->X_add_number
>> 16);
7750 if ((unsigned) r
->X_add_number
>= num_regs
)
7753 as_bad ("No current frame");
7755 as_bad ("Index out of range 0..%u", num_regs
- 1);
7756 r
->X_add_number
= 0;
7758 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7761 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
7763 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
7764 || l
->X_add_number
== IND_MEM
)
7766 as_bad ("Indirect register set name expected");
7767 l
->X_add_number
= IND_CPUID
;
7770 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
7771 l
->X_add_number
= r
->X_add_number
;
7779 ia64_parse_name (name
, e
, nextcharP
)
7784 struct const_desc
*cdesc
;
7785 struct dynreg
*dr
= 0;
7792 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7794 /* Find what relocation pseudo-function we're dealing with. */
7795 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7796 if (pseudo_func
[idx
].name
7797 && pseudo_func
[idx
].name
[0] == name
[1]
7798 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7800 pseudo_type
= pseudo_func
[idx
].type
;
7803 switch (pseudo_type
)
7805 case PSEUDO_FUNC_RELOC
:
7806 end
= input_line_pointer
;
7807 if (*nextcharP
!= '(')
7809 as_bad ("Expected '('");
7813 ++input_line_pointer
;
7815 if (*input_line_pointer
!= ')')
7817 as_bad ("Missing ')'");
7821 ++input_line_pointer
;
7822 if (e
->X_op
!= O_symbol
)
7824 if (e
->X_op
!= O_pseudo_fixup
)
7826 as_bad ("Not a symbolic expression");
7829 if (idx
!= FUNC_LT_RELATIVE
)
7831 as_bad ("Illegal combination of relocation functions");
7834 switch (S_GET_VALUE (e
->X_op_symbol
))
7836 case FUNC_FPTR_RELATIVE
:
7837 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7838 case FUNC_DTP_MODULE
:
7839 idx
= FUNC_LT_DTP_MODULE
; break;
7840 case FUNC_DTP_RELATIVE
:
7841 idx
= FUNC_LT_DTP_RELATIVE
; break;
7842 case FUNC_TP_RELATIVE
:
7843 idx
= FUNC_LT_TP_RELATIVE
; break;
7845 as_bad ("Illegal combination of relocation functions");
7849 /* Make sure gas doesn't get rid of local symbols that are used
7851 e
->X_op
= O_pseudo_fixup
;
7852 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7854 *nextcharP
= *input_line_pointer
;
7857 case PSEUDO_FUNC_CONST
:
7858 e
->X_op
= O_constant
;
7859 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7862 case PSEUDO_FUNC_REG
:
7863 e
->X_op
= O_register
;
7864 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7873 /* first see if NAME is a known register name: */
7874 sym
= hash_find (md
.reg_hash
, name
);
7877 e
->X_op
= O_register
;
7878 e
->X_add_number
= S_GET_VALUE (sym
);
7882 cdesc
= hash_find (md
.const_hash
, name
);
7885 e
->X_op
= O_constant
;
7886 e
->X_add_number
= cdesc
->value
;
7890 /* check for inN, locN, or outN: */
7895 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7903 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
7911 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
7922 /* Ignore register numbers with leading zeroes, except zero itself. */
7923 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
7925 unsigned long regnum
;
7927 /* The name is inN, locN, or outN; parse the register number. */
7928 regnum
= strtoul (name
+ idx
, &end
, 10);
7929 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
7931 if (regnum
>= dr
->num_regs
)
7934 as_bad ("No current frame");
7936 as_bad ("Register number out of range 0..%u",
7940 e
->X_op
= O_register
;
7941 e
->X_add_number
= dr
->base
+ regnum
;
7946 end
= alloca (strlen (name
) + 1);
7948 name
= ia64_canonicalize_symbol_name (end
);
7949 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
7951 /* We've got ourselves the name of a rotating register set.
7952 Store the base register number in the low 16 bits of
7953 X_add_number and the size of the register set in the top 16
7955 e
->X_op
= O_register
;
7956 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
7962 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7965 ia64_canonicalize_symbol_name (name
)
7968 size_t len
= strlen (name
), full
= len
;
7970 while (len
> 0 && name
[len
- 1] == '#')
7975 as_bad ("Standalone `#' is illegal");
7977 as_bad ("Zero-length symbol is illegal");
7979 else if (len
< full
- 1)
7980 as_warn ("Redundant `#' suffix operators");
7985 /* Return true if idesc is a conditional branch instruction. This excludes
7986 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7987 because they always read/write resources regardless of the value of the
7988 qualifying predicate. br.ia must always use p0, and hence is always
7989 taken. Thus this function returns true for branches which can fall
7990 through, and which use no resources if they do fall through. */
7993 is_conditional_branch (idesc
)
7994 struct ia64_opcode
*idesc
;
7996 /* br is a conditional branch. Everything that starts with br. except
7997 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7998 Everything that starts with brl is a conditional branch. */
7999 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8000 && (idesc
->name
[2] == '\0'
8001 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8002 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8003 || idesc
->name
[2] == 'l'
8004 /* br.cond, br.call, br.clr */
8005 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8006 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8007 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8010 /* Return whether the given opcode is a taken branch. If there's any doubt,
8014 is_taken_branch (idesc
)
8015 struct ia64_opcode
*idesc
;
8017 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8018 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8021 /* Return whether the given opcode is an interruption or rfi. If there's any
8022 doubt, returns zero. */
8025 is_interruption_or_rfi (idesc
)
8026 struct ia64_opcode
*idesc
;
8028 if (strcmp (idesc
->name
, "rfi") == 0)
8033 /* Returns the index of the given dependency in the opcode's list of chks, or
8034 -1 if there is no dependency. */
8037 depends_on (depind
, idesc
)
8039 struct ia64_opcode
*idesc
;
8042 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8043 for (i
= 0; i
< dep
->nchks
; i
++)
8045 if (depind
== DEP (dep
->chks
[i
]))
8051 /* Determine a set of specific resources used for a particular resource
8052 class. Returns the number of specific resources identified For those
8053 cases which are not determinable statically, the resource returned is
8056 Meanings of value in 'NOTE':
8057 1) only read/write when the register number is explicitly encoded in the
8059 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8060 accesses CFM when qualifying predicate is in the rotating region.
8061 3) general register value is used to specify an indirect register; not
8062 determinable statically.
8063 4) only read the given resource when bits 7:0 of the indirect index
8064 register value does not match the register number of the resource; not
8065 determinable statically.
8066 5) all rules are implementation specific.
8067 6) only when both the index specified by the reader and the index specified
8068 by the writer have the same value in bits 63:61; not determinable
8070 7) only access the specified resource when the corresponding mask bit is
8072 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8073 only read when these insns reference FR2-31
8074 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8075 written when these insns write FR32-127
8076 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8078 11) The target predicates are written independently of PR[qp], but source
8079 registers are only read if PR[qp] is true. Since the state of PR[qp]
8080 cannot statically be determined, all source registers are marked used.
8081 12) This insn only reads the specified predicate register when that
8082 register is the PR[qp].
8083 13) This reference to ld-c only applies to teh GR whose value is loaded
8084 with data returned from memory, not the post-incremented address register.
8085 14) The RSE resource includes the implementation-specific RSE internal
8086 state resources. At least one (and possibly more) of these resources are
8087 read by each instruction listed in IC:rse-readers. At least one (and
8088 possibly more) of these resources are written by each insn listed in
8090 15+16) Represents reserved instructions, which the assembler does not
8093 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8094 this code; there are no dependency violations based on memory access.
8097 #define MAX_SPECS 256
8102 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
8103 const struct ia64_dependency
*dep
;
8104 struct ia64_opcode
*idesc
;
8105 int type
; /* is this a DV chk or a DV reg? */
8106 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
8107 int note
; /* resource note for this insn's usage */
8108 int path
; /* which execution path to examine */
8115 if (dep
->mode
== IA64_DV_WAW
8116 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8117 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8120 /* template for any resources we identify */
8121 tmpl
.dependency
= dep
;
8123 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8124 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8125 tmpl
.link_to_qp_branch
= 1;
8126 tmpl
.mem_offset
.hint
= 0;
8129 tmpl
.cmp_type
= CMP_NONE
;
8132 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8133 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8134 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8136 /* we don't need to track these */
8137 if (dep
->semantics
== IA64_DVS_NONE
)
8140 switch (dep
->specifier
)
8145 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8147 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8148 if (regno
>= 0 && regno
<= 7)
8150 specs
[count
] = tmpl
;
8151 specs
[count
++].index
= regno
;
8157 for (i
= 0; i
< 8; i
++)
8159 specs
[count
] = tmpl
;
8160 specs
[count
++].index
= i
;
8169 case IA64_RS_AR_UNAT
:
8170 /* This is a mov =AR or mov AR= instruction. */
8171 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8173 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8174 if (regno
== AR_UNAT
)
8176 specs
[count
++] = tmpl
;
8181 /* This is a spill/fill, or other instruction that modifies the
8184 /* Unless we can determine the specific bits used, mark the whole
8185 thing; bits 8:3 of the memory address indicate the bit used in
8186 UNAT. The .mem.offset hint may be used to eliminate a small
8187 subset of conflicts. */
8188 specs
[count
] = tmpl
;
8189 if (md
.mem_offset
.hint
)
8192 fprintf (stderr
, " Using hint for spill/fill\n");
8193 /* The index isn't actually used, just set it to something
8194 approximating the bit index. */
8195 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8196 specs
[count
].mem_offset
.hint
= 1;
8197 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8198 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8202 specs
[count
++].specific
= 0;
8210 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8212 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8213 if ((regno
>= 8 && regno
<= 15)
8214 || (regno
>= 20 && regno
<= 23)
8215 || (regno
>= 31 && regno
<= 39)
8216 || (regno
>= 41 && regno
<= 47)
8217 || (regno
>= 67 && regno
<= 111))
8219 specs
[count
] = tmpl
;
8220 specs
[count
++].index
= regno
;
8233 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8235 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8236 if ((regno
>= 48 && regno
<= 63)
8237 || (regno
>= 112 && regno
<= 127))
8239 specs
[count
] = tmpl
;
8240 specs
[count
++].index
= regno
;
8246 for (i
= 48; i
< 64; i
++)
8248 specs
[count
] = tmpl
;
8249 specs
[count
++].index
= i
;
8251 for (i
= 112; i
< 128; i
++)
8253 specs
[count
] = tmpl
;
8254 specs
[count
++].index
= i
;
8272 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8273 if (idesc
->operands
[i
] == IA64_OPND_B1
8274 || idesc
->operands
[i
] == IA64_OPND_B2
)
8276 specs
[count
] = tmpl
;
8277 specs
[count
++].index
=
8278 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8283 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8284 if (idesc
->operands
[i
] == IA64_OPND_B1
8285 || idesc
->operands
[i
] == IA64_OPND_B2
)
8287 specs
[count
] = tmpl
;
8288 specs
[count
++].index
=
8289 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8295 case IA64_RS_CPUID
: /* four or more registers */
8298 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8300 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8301 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8304 specs
[count
] = tmpl
;
8305 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8309 specs
[count
] = tmpl
;
8310 specs
[count
++].specific
= 0;
8320 case IA64_RS_DBR
: /* four or more registers */
8323 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8325 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8326 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8329 specs
[count
] = tmpl
;
8330 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8334 specs
[count
] = tmpl
;
8335 specs
[count
++].specific
= 0;
8339 else if (note
== 0 && !rsrc_write
)
8341 specs
[count
] = tmpl
;
8342 specs
[count
++].specific
= 0;
8350 case IA64_RS_IBR
: /* four or more registers */
8353 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8355 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8356 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8359 specs
[count
] = tmpl
;
8360 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8364 specs
[count
] = tmpl
;
8365 specs
[count
++].specific
= 0;
8378 /* These are implementation specific. Force all references to
8379 conflict with all other references. */
8380 specs
[count
] = tmpl
;
8381 specs
[count
++].specific
= 0;
8389 case IA64_RS_PKR
: /* 16 or more registers */
8390 if (note
== 3 || note
== 4)
8392 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8394 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8395 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8400 specs
[count
] = tmpl
;
8401 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8404 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8406 /* Uses all registers *except* the one in R3. */
8407 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8409 specs
[count
] = tmpl
;
8410 specs
[count
++].index
= i
;
8416 specs
[count
] = tmpl
;
8417 specs
[count
++].specific
= 0;
8424 specs
[count
] = tmpl
;
8425 specs
[count
++].specific
= 0;
8429 case IA64_RS_PMC
: /* four or more registers */
8432 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8433 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8436 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8438 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
8439 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8442 specs
[count
] = tmpl
;
8443 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8447 specs
[count
] = tmpl
;
8448 specs
[count
++].specific
= 0;
8458 case IA64_RS_PMD
: /* four or more registers */
8461 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8463 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8464 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8467 specs
[count
] = tmpl
;
8468 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8472 specs
[count
] = tmpl
;
8473 specs
[count
++].specific
= 0;
8483 case IA64_RS_RR
: /* eight registers */
8486 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8488 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8489 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8492 specs
[count
] = tmpl
;
8493 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8497 specs
[count
] = tmpl
;
8498 specs
[count
++].specific
= 0;
8502 else if (note
== 0 && !rsrc_write
)
8504 specs
[count
] = tmpl
;
8505 specs
[count
++].specific
= 0;
8513 case IA64_RS_CR_IRR
:
8516 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8517 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8519 && idesc
->operands
[1] == IA64_OPND_CR3
8522 for (i
= 0; i
< 4; i
++)
8524 specs
[count
] = tmpl
;
8525 specs
[count
++].index
= CR_IRR0
+ i
;
8531 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8532 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8534 && regno
<= CR_IRR3
)
8536 specs
[count
] = tmpl
;
8537 specs
[count
++].index
= regno
;
8546 case IA64_RS_CR_LRR
:
8553 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8554 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8555 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8557 specs
[count
] = tmpl
;
8558 specs
[count
++].index
= regno
;
8566 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8568 specs
[count
] = tmpl
;
8569 specs
[count
++].index
=
8570 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8585 else if (rsrc_write
)
8587 if (dep
->specifier
== IA64_RS_FRb
8588 && idesc
->operands
[0] == IA64_OPND_F1
)
8590 specs
[count
] = tmpl
;
8591 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8596 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8598 if (idesc
->operands
[i
] == IA64_OPND_F2
8599 || idesc
->operands
[i
] == IA64_OPND_F3
8600 || idesc
->operands
[i
] == IA64_OPND_F4
)
8602 specs
[count
] = tmpl
;
8603 specs
[count
++].index
=
8604 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8613 /* This reference applies only to the GR whose value is loaded with
8614 data returned from memory. */
8615 specs
[count
] = tmpl
;
8616 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8622 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8623 if (idesc
->operands
[i
] == IA64_OPND_R1
8624 || idesc
->operands
[i
] == IA64_OPND_R2
8625 || idesc
->operands
[i
] == IA64_OPND_R3
)
8627 specs
[count
] = tmpl
;
8628 specs
[count
++].index
=
8629 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8631 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8632 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8633 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8635 specs
[count
] = tmpl
;
8636 specs
[count
++].index
=
8637 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8642 /* Look for anything that reads a GR. */
8643 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8645 if (idesc
->operands
[i
] == IA64_OPND_MR3
8646 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8647 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8648 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8649 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8650 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8651 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8652 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8653 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8654 || ((i
>= idesc
->num_outputs
)
8655 && (idesc
->operands
[i
] == IA64_OPND_R1
8656 || idesc
->operands
[i
] == IA64_OPND_R2
8657 || idesc
->operands
[i
] == IA64_OPND_R3
8658 /* addl source register. */
8659 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8661 specs
[count
] = tmpl
;
8662 specs
[count
++].index
=
8663 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8674 /* This is the same as IA64_RS_PRr, except that the register range is
8675 from 1 - 15, and there are no rotating register reads/writes here. */
8679 for (i
= 1; i
< 16; i
++)
8681 specs
[count
] = tmpl
;
8682 specs
[count
++].index
= i
;
8688 /* Mark only those registers indicated by the mask. */
8691 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8692 for (i
= 1; i
< 16; i
++)
8693 if (mask
& ((valueT
) 1 << i
))
8695 specs
[count
] = tmpl
;
8696 specs
[count
++].index
= i
;
8704 else if (note
== 11) /* note 11 implies note 1 as well */
8708 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8710 if (idesc
->operands
[i
] == IA64_OPND_P1
8711 || idesc
->operands
[i
] == IA64_OPND_P2
)
8713 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8714 if (regno
>= 1 && regno
< 16)
8716 specs
[count
] = tmpl
;
8717 specs
[count
++].index
= regno
;
8727 else if (note
== 12)
8729 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8731 specs
[count
] = tmpl
;
8732 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8739 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8740 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8741 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8742 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8744 if ((idesc
->operands
[0] == IA64_OPND_P1
8745 || idesc
->operands
[0] == IA64_OPND_P2
)
8746 && p1
>= 1 && p1
< 16)
8748 specs
[count
] = tmpl
;
8749 specs
[count
].cmp_type
=
8750 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8751 specs
[count
++].index
= p1
;
8753 if ((idesc
->operands
[1] == IA64_OPND_P1
8754 || idesc
->operands
[1] == IA64_OPND_P2
)
8755 && p2
>= 1 && p2
< 16)
8757 specs
[count
] = tmpl
;
8758 specs
[count
].cmp_type
=
8759 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8760 specs
[count
++].index
= p2
;
8765 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8767 specs
[count
] = tmpl
;
8768 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8770 if (idesc
->operands
[1] == IA64_OPND_PR
)
8772 for (i
= 1; i
< 16; i
++)
8774 specs
[count
] = tmpl
;
8775 specs
[count
++].index
= i
;
8786 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8787 simplified cases of this. */
8791 for (i
= 16; i
< 63; i
++)
8793 specs
[count
] = tmpl
;
8794 specs
[count
++].index
= i
;
8800 /* Mark only those registers indicated by the mask. */
8802 && idesc
->operands
[0] == IA64_OPND_PR
)
8804 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8805 if (mask
& ((valueT
) 1 << 16))
8806 for (i
= 16; i
< 63; i
++)
8808 specs
[count
] = tmpl
;
8809 specs
[count
++].index
= i
;
8813 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8815 for (i
= 16; i
< 63; i
++)
8817 specs
[count
] = tmpl
;
8818 specs
[count
++].index
= i
;
8826 else if (note
== 11) /* note 11 implies note 1 as well */
8830 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8832 if (idesc
->operands
[i
] == IA64_OPND_P1
8833 || idesc
->operands
[i
] == IA64_OPND_P2
)
8835 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8836 if (regno
>= 16 && regno
< 63)
8838 specs
[count
] = tmpl
;
8839 specs
[count
++].index
= regno
;
8849 else if (note
== 12)
8851 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8853 specs
[count
] = tmpl
;
8854 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8861 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8862 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8863 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8864 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8866 if ((idesc
->operands
[0] == IA64_OPND_P1
8867 || idesc
->operands
[0] == IA64_OPND_P2
)
8868 && p1
>= 16 && p1
< 63)
8870 specs
[count
] = tmpl
;
8871 specs
[count
].cmp_type
=
8872 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8873 specs
[count
++].index
= p1
;
8875 if ((idesc
->operands
[1] == IA64_OPND_P1
8876 || idesc
->operands
[1] == IA64_OPND_P2
)
8877 && p2
>= 16 && p2
< 63)
8879 specs
[count
] = tmpl
;
8880 specs
[count
].cmp_type
=
8881 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8882 specs
[count
++].index
= p2
;
8887 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8889 specs
[count
] = tmpl
;
8890 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8892 if (idesc
->operands
[1] == IA64_OPND_PR
)
8894 for (i
= 16; i
< 63; i
++)
8896 specs
[count
] = tmpl
;
8897 specs
[count
++].index
= i
;
8909 /* Verify that the instruction is using the PSR bit indicated in
8913 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
8915 if (dep
->regindex
< 6)
8917 specs
[count
++] = tmpl
;
8920 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
8922 if (dep
->regindex
< 32
8923 || dep
->regindex
== 35
8924 || dep
->regindex
== 36
8925 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
8927 specs
[count
++] = tmpl
;
8930 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
8932 if (dep
->regindex
< 32
8933 || dep
->regindex
== 35
8934 || dep
->regindex
== 36
8935 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
8937 specs
[count
++] = tmpl
;
8942 /* Several PSR bits have very specific dependencies. */
8943 switch (dep
->regindex
)
8946 specs
[count
++] = tmpl
;
8951 specs
[count
++] = tmpl
;
8955 /* Only certain CR accesses use PSR.ic */
8956 if (idesc
->operands
[0] == IA64_OPND_CR3
8957 || idesc
->operands
[1] == IA64_OPND_CR3
)
8960 ((idesc
->operands
[0] == IA64_OPND_CR3
)
8963 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
8978 specs
[count
++] = tmpl
;
8987 specs
[count
++] = tmpl
;
8991 /* Only some AR accesses use cpl */
8992 if (idesc
->operands
[0] == IA64_OPND_AR3
8993 || idesc
->operands
[1] == IA64_OPND_AR3
)
8996 ((idesc
->operands
[0] == IA64_OPND_AR3
)
8999 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
9006 && regno
<= AR_K7
))))
9008 specs
[count
++] = tmpl
;
9013 specs
[count
++] = tmpl
;
9023 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9025 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9031 if (mask
& ((valueT
) 1 << dep
->regindex
))
9033 specs
[count
++] = tmpl
;
9038 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9039 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9040 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9041 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9043 if (idesc
->operands
[i
] == IA64_OPND_F1
9044 || idesc
->operands
[i
] == IA64_OPND_F2
9045 || idesc
->operands
[i
] == IA64_OPND_F3
9046 || idesc
->operands
[i
] == IA64_OPND_F4
)
9048 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9049 if (reg
>= min
&& reg
<= max
)
9051 specs
[count
++] = tmpl
;
9058 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9059 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9060 /* mfh is read on writes to FR32-127; mfl is read on writes to
9062 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9064 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9066 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9067 if (reg
>= min
&& reg
<= max
)
9069 specs
[count
++] = tmpl
;
9074 else if (note
== 10)
9076 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9078 if (idesc
->operands
[i
] == IA64_OPND_R1
9079 || idesc
->operands
[i
] == IA64_OPND_R2
9080 || idesc
->operands
[i
] == IA64_OPND_R3
)
9082 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9083 if (regno
>= 16 && regno
<= 31)
9085 specs
[count
++] = tmpl
;
9096 case IA64_RS_AR_FPSR
:
9097 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9099 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9100 if (regno
== AR_FPSR
)
9102 specs
[count
++] = tmpl
;
9107 specs
[count
++] = tmpl
;
9112 /* Handle all AR[REG] resources */
9113 if (note
== 0 || note
== 1)
9115 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9116 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9117 && regno
== dep
->regindex
)
9119 specs
[count
++] = tmpl
;
9121 /* other AR[REG] resources may be affected by AR accesses */
9122 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9125 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9126 switch (dep
->regindex
)
9132 if (regno
== AR_BSPSTORE
)
9134 specs
[count
++] = tmpl
;
9138 (regno
== AR_BSPSTORE
9139 || regno
== AR_RNAT
))
9141 specs
[count
++] = tmpl
;
9146 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9149 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9150 switch (dep
->regindex
)
9155 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9157 specs
[count
++] = tmpl
;
9164 specs
[count
++] = tmpl
;
9174 /* Handle all CR[REG] resources */
9175 if (note
== 0 || note
== 1)
9177 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9179 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9180 if (regno
== dep
->regindex
)
9182 specs
[count
++] = tmpl
;
9184 else if (!rsrc_write
)
9186 /* Reads from CR[IVR] affect other resources. */
9187 if (regno
== CR_IVR
)
9189 if ((dep
->regindex
>= CR_IRR0
9190 && dep
->regindex
<= CR_IRR3
)
9191 || dep
->regindex
== CR_TPR
)
9193 specs
[count
++] = tmpl
;
9200 specs
[count
++] = tmpl
;
9209 case IA64_RS_INSERVICE
:
9210 /* look for write of EOI (67) or read of IVR (65) */
9211 if ((idesc
->operands
[0] == IA64_OPND_CR3
9212 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9213 || (idesc
->operands
[1] == IA64_OPND_CR3
9214 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9216 specs
[count
++] = tmpl
;
9223 specs
[count
++] = tmpl
;
9234 specs
[count
++] = tmpl
;
9238 /* Check if any of the registers accessed are in the rotating region.
9239 mov to/from pr accesses CFM only when qp_regno is in the rotating
9241 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9243 if (idesc
->operands
[i
] == IA64_OPND_R1
9244 || idesc
->operands
[i
] == IA64_OPND_R2
9245 || idesc
->operands
[i
] == IA64_OPND_R3
)
9247 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9248 /* Assumes that md.rot.num_regs is always valid */
9249 if (md
.rot
.num_regs
> 0
9251 && num
< 31 + md
.rot
.num_regs
)
9253 specs
[count
] = tmpl
;
9254 specs
[count
++].specific
= 0;
9257 else if (idesc
->operands
[i
] == IA64_OPND_F1
9258 || idesc
->operands
[i
] == IA64_OPND_F2
9259 || idesc
->operands
[i
] == IA64_OPND_F3
9260 || idesc
->operands
[i
] == IA64_OPND_F4
)
9262 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9265 specs
[count
] = tmpl
;
9266 specs
[count
++].specific
= 0;
9269 else if (idesc
->operands
[i
] == IA64_OPND_P1
9270 || idesc
->operands
[i
] == IA64_OPND_P2
)
9272 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9275 specs
[count
] = tmpl
;
9276 specs
[count
++].specific
= 0;
9280 if (CURR_SLOT
.qp_regno
> 15)
9282 specs
[count
] = tmpl
;
9283 specs
[count
++].specific
= 0;
9288 /* This is the same as IA64_RS_PRr, except simplified to account for
9289 the fact that there is only one register. */
9293 specs
[count
++] = tmpl
;
9298 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9299 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9300 if (mask
& ((valueT
) 1 << 63))
9301 specs
[count
++] = tmpl
;
9303 else if (note
== 11)
9305 if ((idesc
->operands
[0] == IA64_OPND_P1
9306 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9307 || (idesc
->operands
[1] == IA64_OPND_P2
9308 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9310 specs
[count
++] = tmpl
;
9313 else if (note
== 12)
9315 if (CURR_SLOT
.qp_regno
== 63)
9317 specs
[count
++] = tmpl
;
9324 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9325 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9326 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9327 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9330 && (idesc
->operands
[0] == IA64_OPND_P1
9331 || idesc
->operands
[0] == IA64_OPND_P2
))
9333 specs
[count
] = tmpl
;
9334 specs
[count
++].cmp_type
=
9335 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9338 && (idesc
->operands
[1] == IA64_OPND_P1
9339 || idesc
->operands
[1] == IA64_OPND_P2
))
9341 specs
[count
] = tmpl
;
9342 specs
[count
++].cmp_type
=
9343 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9348 if (CURR_SLOT
.qp_regno
== 63)
9350 specs
[count
++] = tmpl
;
9361 /* FIXME we can identify some individual RSE written resources, but RSE
9362 read resources have not yet been completely identified, so for now
9363 treat RSE as a single resource */
9364 if (strncmp (idesc
->name
, "mov", 3) == 0)
9368 if (idesc
->operands
[0] == IA64_OPND_AR3
9369 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9371 specs
[count
++] = tmpl
;
9376 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9378 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9379 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9381 specs
[count
++] = tmpl
;
9384 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9386 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9387 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9388 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9390 specs
[count
++] = tmpl
;
9397 specs
[count
++] = tmpl
;
9402 /* FIXME -- do any of these need to be non-specific? */
9403 specs
[count
++] = tmpl
;
9407 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9414 /* Clear branch flags on marked resources. This breaks the link between the
9415 QP of the marking instruction and a subsequent branch on the same QP. */
9418 clear_qp_branch_flag (mask
)
9422 for (i
= 0; i
< regdepslen
; i
++)
9424 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9425 if ((bit
& mask
) != 0)
9427 regdeps
[i
].link_to_qp_branch
= 0;
9432 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9433 any mutexes which contain one of the PRs and create new ones when
9437 update_qp_mutex (valueT mask
)
9443 while (i
< qp_mutexeslen
)
9445 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9447 /* If it destroys and creates the same mutex, do nothing. */
9448 if (qp_mutexes
[i
].prmask
== mask
9449 && qp_mutexes
[i
].path
== md
.path
)
9460 fprintf (stderr
, " Clearing mutex relation");
9461 print_prmask (qp_mutexes
[i
].prmask
);
9462 fprintf (stderr
, "\n");
9465 /* Deal with the old mutex with more than 3+ PRs only if
9466 the new mutex on the same execution path with it.
9468 FIXME: The 3+ mutex support is incomplete.
9469 dot_pred_rel () may be a better place to fix it. */
9470 if (qp_mutexes
[i
].path
== md
.path
)
9472 /* If it is a proper subset of the mutex, create a
9475 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9478 qp_mutexes
[i
].prmask
&= ~mask
;
9479 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9481 /* Modify the mutex if there are more than one
9489 /* Remove the mutex. */
9490 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9498 add_qp_mutex (mask
);
9503 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9505 Any changes to a PR clears the mutex relations which include that PR. */
9508 clear_qp_mutex (mask
)
9514 while (i
< qp_mutexeslen
)
9516 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9520 fprintf (stderr
, " Clearing mutex relation");
9521 print_prmask (qp_mutexes
[i
].prmask
);
9522 fprintf (stderr
, "\n");
9524 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9531 /* Clear implies relations which contain PRs in the given masks.
9532 P1_MASK indicates the source of the implies relation, while P2_MASK
9533 indicates the implied PR. */
9536 clear_qp_implies (p1_mask
, p2_mask
)
9543 while (i
< qp_implieslen
)
9545 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9546 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9549 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9550 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9551 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9558 /* Add the PRs specified to the list of implied relations. */
9561 add_qp_imply (p1
, p2
)
9568 /* p0 is not meaningful here. */
9569 if (p1
== 0 || p2
== 0)
9575 /* If it exists already, ignore it. */
9576 for (i
= 0; i
< qp_implieslen
; i
++)
9578 if (qp_implies
[i
].p1
== p1
9579 && qp_implies
[i
].p2
== p2
9580 && qp_implies
[i
].path
== md
.path
9581 && !qp_implies
[i
].p2_branched
)
9585 if (qp_implieslen
== qp_impliestotlen
)
9587 qp_impliestotlen
+= 20;
9588 qp_implies
= (struct qp_imply
*)
9589 xrealloc ((void *) qp_implies
,
9590 qp_impliestotlen
* sizeof (struct qp_imply
));
9593 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9594 qp_implies
[qp_implieslen
].p1
= p1
;
9595 qp_implies
[qp_implieslen
].p2
= p2
;
9596 qp_implies
[qp_implieslen
].path
= md
.path
;
9597 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9599 /* Add in the implied transitive relations; for everything that p2 implies,
9600 make p1 imply that, too; for everything that implies p1, make it imply p2
9602 for (i
= 0; i
< qp_implieslen
; i
++)
9604 if (qp_implies
[i
].p1
== p2
)
9605 add_qp_imply (p1
, qp_implies
[i
].p2
);
9606 if (qp_implies
[i
].p2
== p1
)
9607 add_qp_imply (qp_implies
[i
].p1
, p2
);
9609 /* Add in mutex relations implied by this implies relation; for each mutex
9610 relation containing p2, duplicate it and replace p2 with p1. */
9611 bit
= (valueT
) 1 << p1
;
9612 mask
= (valueT
) 1 << p2
;
9613 for (i
= 0; i
< qp_mutexeslen
; i
++)
9615 if (qp_mutexes
[i
].prmask
& mask
)
9616 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9620 /* Add the PRs specified in the mask to the mutex list; this means that only
9621 one of the PRs can be true at any time. PR0 should never be included in
9631 if (qp_mutexeslen
== qp_mutexestotlen
)
9633 qp_mutexestotlen
+= 20;
9634 qp_mutexes
= (struct qpmutex
*)
9635 xrealloc ((void *) qp_mutexes
,
9636 qp_mutexestotlen
* sizeof (struct qpmutex
));
9640 fprintf (stderr
, " Registering mutex on");
9641 print_prmask (mask
);
9642 fprintf (stderr
, "\n");
9644 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9645 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9649 has_suffix_p (name
, suffix
)
9653 size_t namelen
= strlen (name
);
9654 size_t sufflen
= strlen (suffix
);
9656 if (namelen
<= sufflen
)
9658 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9662 clear_register_values ()
9666 fprintf (stderr
, " Clearing register values\n");
9667 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9668 gr_values
[i
].known
= 0;
9671 /* Keep track of register values/changes which affect DV tracking.
9673 optimization note: should add a flag to classes of insns where otherwise we
9674 have to examine a group of strings to identify them. */
9677 note_register_values (idesc
)
9678 struct ia64_opcode
*idesc
;
9680 valueT qp_changemask
= 0;
9683 /* Invalidate values for registers being written to. */
9684 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9686 if (idesc
->operands
[i
] == IA64_OPND_R1
9687 || idesc
->operands
[i
] == IA64_OPND_R2
9688 || idesc
->operands
[i
] == IA64_OPND_R3
)
9690 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9691 if (regno
> 0 && regno
< NELEMS (gr_values
))
9692 gr_values
[regno
].known
= 0;
9694 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9696 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9697 if (regno
> 0 && regno
< 4)
9698 gr_values
[regno
].known
= 0;
9700 else if (idesc
->operands
[i
] == IA64_OPND_P1
9701 || idesc
->operands
[i
] == IA64_OPND_P2
)
9703 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9704 qp_changemask
|= (valueT
) 1 << regno
;
9706 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9708 if (idesc
->operands
[2] & (valueT
) 0x10000)
9709 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9711 qp_changemask
= idesc
->operands
[2];
9714 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9716 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9717 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9719 qp_changemask
= idesc
->operands
[1];
9720 qp_changemask
&= ~(valueT
) 0xFFFF;
9725 /* Always clear qp branch flags on any PR change. */
9726 /* FIXME there may be exceptions for certain compares. */
9727 clear_qp_branch_flag (qp_changemask
);
9729 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9730 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9732 qp_changemask
|= ~(valueT
) 0xFFFF;
9733 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9735 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9736 gr_values
[i
].known
= 0;
9738 clear_qp_mutex (qp_changemask
);
9739 clear_qp_implies (qp_changemask
, qp_changemask
);
9741 /* After a call, all register values are undefined, except those marked
9743 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9744 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9746 /* FIXME keep GR values which are marked as "safe_across_calls" */
9747 clear_register_values ();
9748 clear_qp_mutex (~qp_safe_across_calls
);
9749 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9750 clear_qp_branch_flag (~qp_safe_across_calls
);
9752 else if (is_interruption_or_rfi (idesc
)
9753 || is_taken_branch (idesc
))
9755 clear_register_values ();
9756 clear_qp_mutex (~(valueT
) 0);
9757 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9759 /* Look for mutex and implies relations. */
9760 else if ((idesc
->operands
[0] == IA64_OPND_P1
9761 || idesc
->operands
[0] == IA64_OPND_P2
)
9762 && (idesc
->operands
[1] == IA64_OPND_P1
9763 || idesc
->operands
[1] == IA64_OPND_P2
))
9765 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9766 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9767 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9768 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9770 /* If both PRs are PR0, we can't really do anything. */
9771 if (p1
== 0 && p2
== 0)
9774 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9776 /* In general, clear mutexes and implies which include P1 or P2,
9777 with the following exceptions. */
9778 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9779 || has_suffix_p (idesc
->name
, ".and.orcm"))
9781 clear_qp_implies (p2mask
, p1mask
);
9783 else if (has_suffix_p (idesc
->name
, ".andcm")
9784 || has_suffix_p (idesc
->name
, ".and"))
9786 clear_qp_implies (0, p1mask
| p2mask
);
9788 else if (has_suffix_p (idesc
->name
, ".orcm")
9789 || has_suffix_p (idesc
->name
, ".or"))
9791 clear_qp_mutex (p1mask
| p2mask
);
9792 clear_qp_implies (p1mask
| p2mask
, 0);
9798 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9800 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9801 if (p1
== 0 || p2
== 0)
9802 clear_qp_mutex (p1mask
| p2mask
);
9804 added
= update_qp_mutex (p1mask
| p2mask
);
9806 if (CURR_SLOT
.qp_regno
== 0
9807 || has_suffix_p (idesc
->name
, ".unc"))
9809 if (added
== 0 && p1
&& p2
)
9810 add_qp_mutex (p1mask
| p2mask
);
9811 if (CURR_SLOT
.qp_regno
!= 0)
9814 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9816 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9821 /* Look for mov imm insns into GRs. */
9822 else if (idesc
->operands
[0] == IA64_OPND_R1
9823 && (idesc
->operands
[1] == IA64_OPND_IMM22
9824 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9825 && CURR_SLOT
.opnd
[1].X_op
== O_constant
9826 && (strcmp (idesc
->name
, "mov") == 0
9827 || strcmp (idesc
->name
, "movl") == 0))
9829 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9830 if (regno
> 0 && regno
< NELEMS (gr_values
))
9832 gr_values
[regno
].known
= 1;
9833 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9834 gr_values
[regno
].path
= md
.path
;
9837 fprintf (stderr
, " Know gr%d = ", regno
);
9838 fprintf_vma (stderr
, gr_values
[regno
].value
);
9839 fputs ("\n", stderr
);
9843 /* Look for dep.z imm insns. */
9844 else if (idesc
->operands
[0] == IA64_OPND_R1
9845 && idesc
->operands
[1] == IA64_OPND_IMM8
9846 && strcmp (idesc
->name
, "dep.z") == 0)
9848 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9849 if (regno
> 0 && regno
< NELEMS (gr_values
))
9851 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
9853 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
9854 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
9855 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
9856 gr_values
[regno
].known
= 1;
9857 gr_values
[regno
].value
= value
;
9858 gr_values
[regno
].path
= md
.path
;
9861 fprintf (stderr
, " Know gr%d = ", regno
);
9862 fprintf_vma (stderr
, gr_values
[regno
].value
);
9863 fputs ("\n", stderr
);
9869 clear_qp_mutex (qp_changemask
);
9870 clear_qp_implies (qp_changemask
, qp_changemask
);
9874 /* Return whether the given predicate registers are currently mutex. */
9877 qp_mutex (p1
, p2
, path
)
9887 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9888 for (i
= 0; i
< qp_mutexeslen
; i
++)
9890 if (qp_mutexes
[i
].path
>= path
9891 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9898 /* Return whether the given resource is in the given insn's list of chks
9899 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9903 resources_match (rs
, idesc
, note
, qp_regno
, path
)
9905 struct ia64_opcode
*idesc
;
9910 struct rsrc specs
[MAX_SPECS
];
9913 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9914 we don't need to check. One exception is note 11, which indicates that
9915 target predicates are written regardless of PR[qp]. */
9916 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
9920 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
9923 /* UNAT checking is a bit more specific than other resources */
9924 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
9925 && specs
[count
].mem_offset
.hint
9926 && rs
->mem_offset
.hint
)
9928 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
9930 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
9931 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
9938 /* Skip apparent PR write conflicts where both writes are an AND or both
9939 writes are an OR. */
9940 if (rs
->dependency
->specifier
== IA64_RS_PR
9941 || rs
->dependency
->specifier
== IA64_RS_PRr
9942 || rs
->dependency
->specifier
== IA64_RS_PR63
)
9944 if (specs
[count
].cmp_type
!= CMP_NONE
9945 && specs
[count
].cmp_type
== rs
->cmp_type
)
9948 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
9949 dv_mode
[rs
->dependency
->mode
],
9950 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9951 specs
[count
].index
: 63);
9956 " %s on parallel compare conflict %s vs %s on PR%d\n",
9957 dv_mode
[rs
->dependency
->mode
],
9958 dv_cmp_type
[rs
->cmp_type
],
9959 dv_cmp_type
[specs
[count
].cmp_type
],
9960 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9961 specs
[count
].index
: 63);
9965 /* If either resource is not specific, conservatively assume a conflict
9967 if (!specs
[count
].specific
|| !rs
->specific
)
9969 else if (specs
[count
].index
== rs
->index
)
9976 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9977 insert a stop to create the break. Update all resource dependencies
9978 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9979 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9980 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9984 insn_group_break (insert_stop
, qp_regno
, save_current
)
9991 if (insert_stop
&& md
.num_slots_in_use
> 0)
9992 PREV_SLOT
.end_of_insn_group
= 1;
9996 fprintf (stderr
, " Insn group break%s",
9997 (insert_stop
? " (w/stop)" : ""));
9999 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10000 fprintf (stderr
, "\n");
10004 while (i
< regdepslen
)
10006 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10009 && regdeps
[i
].qp_regno
!= qp_regno
)
10016 && CURR_SLOT
.src_file
== regdeps
[i
].file
10017 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10023 /* clear dependencies which are automatically cleared by a stop, or
10024 those that have reached the appropriate state of insn serialization */
10025 if (dep
->semantics
== IA64_DVS_IMPLIED
10026 || dep
->semantics
== IA64_DVS_IMPLIEDF
10027 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10029 print_dependency ("Removing", i
);
10030 regdeps
[i
] = regdeps
[--regdepslen
];
10034 if (dep
->semantics
== IA64_DVS_DATA
10035 || dep
->semantics
== IA64_DVS_INSTR
10036 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10038 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10039 regdeps
[i
].insn_srlz
= STATE_STOP
;
10040 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10041 regdeps
[i
].data_srlz
= STATE_STOP
;
10048 /* Add the given resource usage spec to the list of active dependencies. */
10051 mark_resource (idesc
, dep
, spec
, depind
, path
)
10052 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
10053 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
10058 if (regdepslen
== regdepstotlen
)
10060 regdepstotlen
+= 20;
10061 regdeps
= (struct rsrc
*)
10062 xrealloc ((void *) regdeps
,
10063 regdepstotlen
* sizeof (struct rsrc
));
10066 regdeps
[regdepslen
] = *spec
;
10067 regdeps
[regdepslen
].depind
= depind
;
10068 regdeps
[regdepslen
].path
= path
;
10069 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10070 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10072 print_dependency ("Adding", regdepslen
);
10078 print_dependency (action
, depind
)
10079 const char *action
;
10084 fprintf (stderr
, " %s %s '%s'",
10085 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10086 (regdeps
[depind
].dependency
)->name
);
10087 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10088 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10089 if (regdeps
[depind
].mem_offset
.hint
)
10091 fputs (" ", stderr
);
10092 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10093 fputs ("+", stderr
);
10094 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10096 fprintf (stderr
, "\n");
10101 instruction_serialization ()
10105 fprintf (stderr
, " Instruction serialization\n");
10106 for (i
= 0; i
< regdepslen
; i
++)
10107 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10108 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10112 data_serialization ()
10116 fprintf (stderr
, " Data serialization\n");
10117 while (i
< regdepslen
)
10119 if (regdeps
[i
].data_srlz
== STATE_STOP
10120 /* Note: as of 991210, all "other" dependencies are cleared by a
10121 data serialization. This might change with new tables */
10122 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10124 print_dependency ("Removing", i
);
10125 regdeps
[i
] = regdeps
[--regdepslen
];
10132 /* Insert stops and serializations as needed to avoid DVs. */
10135 remove_marked_resource (rs
)
10138 switch (rs
->dependency
->semantics
)
10140 case IA64_DVS_SPECIFIC
:
10142 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10143 /* ...fall through... */
10144 case IA64_DVS_INSTR
:
10146 fprintf (stderr
, "Inserting instr serialization\n");
10147 if (rs
->insn_srlz
< STATE_STOP
)
10148 insn_group_break (1, 0, 0);
10149 if (rs
->insn_srlz
< STATE_SRLZ
)
10151 struct slot oldslot
= CURR_SLOT
;
10152 /* Manually jam a srlz.i insn into the stream */
10153 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10154 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10155 instruction_serialization ();
10156 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10157 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10158 emit_one_bundle ();
10159 CURR_SLOT
= oldslot
;
10161 insn_group_break (1, 0, 0);
10163 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10164 "other" types of DV are eliminated
10165 by a data serialization */
10166 case IA64_DVS_DATA
:
10168 fprintf (stderr
, "Inserting data serialization\n");
10169 if (rs
->data_srlz
< STATE_STOP
)
10170 insn_group_break (1, 0, 0);
10172 struct slot oldslot
= CURR_SLOT
;
10173 /* Manually jam a srlz.d insn into the stream */
10174 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10175 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10176 data_serialization ();
10177 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10178 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10179 emit_one_bundle ();
10180 CURR_SLOT
= oldslot
;
10183 case IA64_DVS_IMPLIED
:
10184 case IA64_DVS_IMPLIEDF
:
10186 fprintf (stderr
, "Inserting stop\n");
10187 insn_group_break (1, 0, 0);
10194 /* Check the resources used by the given opcode against the current dependency
10197 The check is run once for each execution path encountered. In this case,
10198 a unique execution path is the sequence of instructions following a code
10199 entry point, e.g. the following has three execution paths, one starting
10200 at L0, one at L1, and one at L2.
10209 check_dependencies (idesc
)
10210 struct ia64_opcode
*idesc
;
10212 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10216 /* Note that the number of marked resources may change within the
10217 loop if in auto mode. */
10219 while (i
< regdepslen
)
10221 struct rsrc
*rs
= ®deps
[i
];
10222 const struct ia64_dependency
*dep
= rs
->dependency
;
10225 int start_over
= 0;
10227 if (dep
->semantics
== IA64_DVS_NONE
10228 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10234 note
= NOTE (opdeps
->chks
[chkind
]);
10236 /* Check this resource against each execution path seen thus far. */
10237 for (path
= 0; path
<= md
.path
; path
++)
10241 /* If the dependency wasn't on the path being checked, ignore it. */
10242 if (rs
->path
< path
)
10245 /* If the QP for this insn implies a QP which has branched, don't
10246 bother checking. Ed. NOTE: I don't think this check is terribly
10247 useful; what's the point of generating code which will only be
10248 reached if its QP is zero?
10249 This code was specifically inserted to handle the following code,
10250 based on notes from Intel's DV checking code, where p1 implies p2.
10256 if (CURR_SLOT
.qp_regno
!= 0)
10260 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10262 if (qp_implies
[implies
].path
>= path
10263 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10264 && qp_implies
[implies
].p2_branched
)
10274 if ((matchtype
= resources_match (rs
, idesc
, note
,
10275 CURR_SLOT
.qp_regno
, path
)) != 0)
10278 char pathmsg
[256] = "";
10279 char indexmsg
[256] = "";
10280 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10283 sprintf (pathmsg
, " when entry is at label '%s'",
10284 md
.entry_labels
[path
- 1]);
10285 if (matchtype
== 1 && rs
->index
>= 0)
10286 sprintf (indexmsg
, ", specific resource number is %d",
10288 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10290 (certain
? "violates" : "may violate"),
10291 dv_mode
[dep
->mode
], dep
->name
,
10292 dv_sem
[dep
->semantics
],
10293 pathmsg
, indexmsg
);
10295 if (md
.explicit_mode
)
10297 as_warn ("%s", msg
);
10298 if (path
< md
.path
)
10299 as_warn (_("Only the first path encountering the conflict "
10301 as_warn_where (rs
->file
, rs
->line
,
10302 _("This is the location of the "
10303 "conflicting usage"));
10304 /* Don't bother checking other paths, to avoid duplicating
10305 the same warning */
10311 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10313 remove_marked_resource (rs
);
10315 /* since the set of dependencies has changed, start over */
10316 /* FIXME -- since we're removing dvs as we go, we
10317 probably don't really need to start over... */
10330 /* Register new dependencies based on the given opcode. */
10333 mark_resources (idesc
)
10334 struct ia64_opcode
*idesc
;
10337 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10338 int add_only_qp_reads
= 0;
10340 /* A conditional branch only uses its resources if it is taken; if it is
10341 taken, we stop following that path. The other branch types effectively
10342 *always* write their resources. If it's not taken, register only QP
10344 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10346 add_only_qp_reads
= 1;
10350 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10352 for (i
= 0; i
< opdeps
->nregs
; i
++)
10354 const struct ia64_dependency
*dep
;
10355 struct rsrc specs
[MAX_SPECS
];
10360 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10361 note
= NOTE (opdeps
->regs
[i
]);
10363 if (add_only_qp_reads
10364 && !(dep
->mode
== IA64_DV_WAR
10365 && (dep
->specifier
== IA64_RS_PR
10366 || dep
->specifier
== IA64_RS_PRr
10367 || dep
->specifier
== IA64_RS_PR63
)))
10370 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10372 while (count
-- > 0)
10374 mark_resource (idesc
, dep
, &specs
[count
],
10375 DEP (opdeps
->regs
[i
]), md
.path
);
10378 /* The execution path may affect register values, which may in turn
10379 affect which indirect-access resources are accessed. */
10380 switch (dep
->specifier
)
10384 case IA64_RS_CPUID
:
10392 for (path
= 0; path
< md
.path
; path
++)
10394 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10395 while (count
-- > 0)
10396 mark_resource (idesc
, dep
, &specs
[count
],
10397 DEP (opdeps
->regs
[i
]), path
);
10404 /* Remove dependencies when they no longer apply. */
10407 update_dependencies (idesc
)
10408 struct ia64_opcode
*idesc
;
10412 if (strcmp (idesc
->name
, "srlz.i") == 0)
10414 instruction_serialization ();
10416 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10418 data_serialization ();
10420 else if (is_interruption_or_rfi (idesc
)
10421 || is_taken_branch (idesc
))
10423 /* Although technically the taken branch doesn't clear dependencies
10424 which require a srlz.[id], we don't follow the branch; the next
10425 instruction is assumed to start with a clean slate. */
10429 else if (is_conditional_branch (idesc
)
10430 && CURR_SLOT
.qp_regno
!= 0)
10432 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10434 for (i
= 0; i
< qp_implieslen
; i
++)
10436 /* If the conditional branch's predicate is implied by the predicate
10437 in an existing dependency, remove that dependency. */
10438 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10441 /* Note that this implied predicate takes a branch so that if
10442 a later insn generates a DV but its predicate implies this
10443 one, we can avoid the false DV warning. */
10444 qp_implies
[i
].p2_branched
= 1;
10445 while (depind
< regdepslen
)
10447 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10449 print_dependency ("Removing", depind
);
10450 regdeps
[depind
] = regdeps
[--regdepslen
];
10457 /* Any marked resources which have this same predicate should be
10458 cleared, provided that the QP hasn't been modified between the
10459 marking instruction and the branch. */
10462 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10467 while (i
< regdepslen
)
10469 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10470 && regdeps
[i
].link_to_qp_branch
10471 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10472 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10474 /* Treat like a taken branch */
10475 print_dependency ("Removing", i
);
10476 regdeps
[i
] = regdeps
[--regdepslen
];
10485 /* Examine the current instruction for dependency violations. */
10489 struct ia64_opcode
*idesc
;
10493 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10494 idesc
->name
, CURR_SLOT
.src_line
,
10495 idesc
->dependencies
->nchks
,
10496 idesc
->dependencies
->nregs
);
10499 /* Look through the list of currently marked resources; if the current
10500 instruction has the dependency in its chks list which uses that resource,
10501 check against the specific resources used. */
10502 check_dependencies (idesc
);
10504 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10505 then add them to the list of marked resources. */
10506 mark_resources (idesc
);
10508 /* There are several types of dependency semantics, and each has its own
10509 requirements for being cleared
10511 Instruction serialization (insns separated by interruption, rfi, or
10512 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10514 Data serialization (instruction serialization, or writer + srlz.d +
10515 reader, where writer and srlz.d are in separate groups) clears
10516 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10517 always be the case).
10519 Instruction group break (groups separated by stop, taken branch,
10520 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10522 update_dependencies (idesc
);
10524 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10525 warning. Keep track of as many as possible that are useful. */
10526 note_register_values (idesc
);
10528 /* We don't need or want this anymore. */
10529 md
.mem_offset
.hint
= 0;
10534 /* Translate one line of assembly. Pseudo ops and labels do not show
10540 char *saved_input_line_pointer
, *mnemonic
;
10541 const struct pseudo_opcode
*pdesc
;
10542 struct ia64_opcode
*idesc
;
10543 unsigned char qp_regno
;
10544 unsigned int flags
;
10547 saved_input_line_pointer
= input_line_pointer
;
10548 input_line_pointer
= str
;
10550 /* extract the opcode (mnemonic): */
10552 mnemonic
= input_line_pointer
;
10553 ch
= get_symbol_end ();
10554 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10557 *input_line_pointer
= ch
;
10558 (*pdesc
->handler
) (pdesc
->arg
);
10562 /* Find the instruction descriptor matching the arguments. */
10564 idesc
= ia64_find_opcode (mnemonic
);
10565 *input_line_pointer
= ch
;
10568 as_bad ("Unknown opcode `%s'", mnemonic
);
10572 idesc
= parse_operands (idesc
);
10576 /* Handle the dynamic ops we can handle now: */
10577 if (idesc
->type
== IA64_TYPE_DYN
)
10579 if (strcmp (idesc
->name
, "add") == 0)
10581 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10582 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10586 ia64_free_opcode (idesc
);
10587 idesc
= ia64_find_opcode (mnemonic
);
10589 else if (strcmp (idesc
->name
, "mov") == 0)
10591 enum ia64_opnd opnd1
, opnd2
;
10594 opnd1
= idesc
->operands
[0];
10595 opnd2
= idesc
->operands
[1];
10596 if (opnd1
== IA64_OPND_AR3
)
10598 else if (opnd2
== IA64_OPND_AR3
)
10602 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10604 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10605 mnemonic
= "mov.i";
10606 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10607 mnemonic
= "mov.m";
10615 ia64_free_opcode (idesc
);
10616 idesc
= ia64_find_opcode (mnemonic
);
10617 while (idesc
!= NULL
10618 && (idesc
->operands
[0] != opnd1
10619 || idesc
->operands
[1] != opnd2
))
10620 idesc
= get_next_opcode (idesc
);
10624 else if (strcmp (idesc
->name
, "mov.i") == 0
10625 || strcmp (idesc
->name
, "mov.m") == 0)
10627 enum ia64_opnd opnd1
, opnd2
;
10630 opnd1
= idesc
->operands
[0];
10631 opnd2
= idesc
->operands
[1];
10632 if (opnd1
== IA64_OPND_AR3
)
10634 else if (opnd2
== IA64_OPND_AR3
)
10638 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10641 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10643 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10645 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10646 as_bad ("AR %d cannot be accessed by %c-unit",
10647 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10651 else if (strcmp (idesc
->name
, "hint.b") == 0)
10657 case hint_b_warning
:
10658 as_warn ("hint.b may be treated as nop");
10661 as_bad ("hint.b shouldn't be used");
10667 if (md
.qp
.X_op
== O_register
)
10669 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10670 md
.qp
.X_op
= O_absent
;
10673 flags
= idesc
->flags
;
10675 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10677 /* The alignment frag has to end with a stop bit only if the
10678 next instruction after the alignment directive has to be
10679 the first instruction in an instruction group. */
10682 while (align_frag
->fr_type
!= rs_align_code
)
10684 align_frag
= align_frag
->fr_next
;
10688 /* align_frag can be NULL if there are directives in
10690 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10691 align_frag
->tc_frag_data
= 1;
10694 insn_group_break (1, 0, 0);
10698 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10700 as_bad ("`%s' cannot be predicated", idesc
->name
);
10704 /* Build the instruction. */
10705 CURR_SLOT
.qp_regno
= qp_regno
;
10706 CURR_SLOT
.idesc
= idesc
;
10707 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10708 dwarf2_where (&CURR_SLOT
.debug_line
);
10710 /* Add unwind entry, if there is one. */
10711 if (unwind
.current_entry
)
10713 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10714 unwind
.current_entry
= NULL
;
10716 if (unwind
.proc_start
&& S_IS_DEFINED (unwind
.proc_start
))
10719 /* Check for dependency violations. */
10723 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10724 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10725 emit_one_bundle ();
10727 if ((flags
& IA64_OPCODE_LAST
) != 0)
10728 insn_group_break (1, 0, 0);
10730 md
.last_text_seg
= now_seg
;
10733 input_line_pointer
= saved_input_line_pointer
;
10736 /* Called when symbol NAME cannot be found in the symbol table.
10737 Should be used for dynamic valued symbols only. */
10740 md_undefined_symbol (name
)
10741 char *name ATTRIBUTE_UNUSED
;
10746 /* Called for any expression that can not be recognized. When the
10747 function is called, `input_line_pointer' will point to the start of
10754 switch (*input_line_pointer
)
10757 ++input_line_pointer
;
10759 if (*input_line_pointer
!= ']')
10761 as_bad ("Closing bracket missing");
10766 if (e
->X_op
!= O_register
)
10767 as_bad ("Register expected as index");
10769 ++input_line_pointer
;
10780 ignore_rest_of_line ();
10783 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10784 a section symbol plus some offset. For relocs involving @fptr(),
10785 directives we don't want such adjustments since we need to have the
10786 original symbol's name in the reloc. */
10788 ia64_fix_adjustable (fix
)
10791 /* Prevent all adjustments to global symbols */
10792 if (S_IS_EXTERN (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10795 switch (fix
->fx_r_type
)
10797 case BFD_RELOC_IA64_FPTR64I
:
10798 case BFD_RELOC_IA64_FPTR32MSB
:
10799 case BFD_RELOC_IA64_FPTR32LSB
:
10800 case BFD_RELOC_IA64_FPTR64MSB
:
10801 case BFD_RELOC_IA64_FPTR64LSB
:
10802 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10803 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10813 ia64_force_relocation (fix
)
10816 switch (fix
->fx_r_type
)
10818 case BFD_RELOC_IA64_FPTR64I
:
10819 case BFD_RELOC_IA64_FPTR32MSB
:
10820 case BFD_RELOC_IA64_FPTR32LSB
:
10821 case BFD_RELOC_IA64_FPTR64MSB
:
10822 case BFD_RELOC_IA64_FPTR64LSB
:
10824 case BFD_RELOC_IA64_LTOFF22
:
10825 case BFD_RELOC_IA64_LTOFF64I
:
10826 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10827 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10828 case BFD_RELOC_IA64_PLTOFF22
:
10829 case BFD_RELOC_IA64_PLTOFF64I
:
10830 case BFD_RELOC_IA64_PLTOFF64MSB
:
10831 case BFD_RELOC_IA64_PLTOFF64LSB
:
10833 case BFD_RELOC_IA64_LTOFF22X
:
10834 case BFD_RELOC_IA64_LDXMOV
:
10841 return generic_force_reloc (fix
);
10844 /* Decide from what point a pc-relative relocation is relative to,
10845 relative to the pc-relative fixup. Er, relatively speaking. */
10847 ia64_pcrel_from_section (fix
, sec
)
10851 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10853 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10860 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10862 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10866 expr
.X_op
= O_pseudo_fixup
;
10867 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10868 expr
.X_add_number
= 0;
10869 expr
.X_add_symbol
= symbol
;
10870 emit_expr (&expr
, size
);
10873 /* This is called whenever some data item (not an instruction) needs a
10874 fixup. We pick the right reloc code depending on the byteorder
10875 currently in effect. */
10877 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
10883 bfd_reloc_code_real_type code
;
10888 /* There are no reloc for 8 and 16 bit quantities, but we allow
10889 them here since they will work fine as long as the expression
10890 is fully defined at the end of the pass over the source file. */
10891 case 1: code
= BFD_RELOC_8
; break;
10892 case 2: code
= BFD_RELOC_16
; break;
10894 if (target_big_endian
)
10895 code
= BFD_RELOC_IA64_DIR32MSB
;
10897 code
= BFD_RELOC_IA64_DIR32LSB
;
10901 /* In 32-bit mode, data8 could mean function descriptors too. */
10902 if (exp
->X_op
== O_pseudo_fixup
10903 && exp
->X_op_symbol
10904 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
10905 && !(md
.flags
& EF_IA_64_ABI64
))
10907 if (target_big_endian
)
10908 code
= BFD_RELOC_IA64_IPLTMSB
;
10910 code
= BFD_RELOC_IA64_IPLTLSB
;
10911 exp
->X_op
= O_symbol
;
10916 if (target_big_endian
)
10917 code
= BFD_RELOC_IA64_DIR64MSB
;
10919 code
= BFD_RELOC_IA64_DIR64LSB
;
10924 if (exp
->X_op
== O_pseudo_fixup
10925 && exp
->X_op_symbol
10926 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
10928 if (target_big_endian
)
10929 code
= BFD_RELOC_IA64_IPLTMSB
;
10931 code
= BFD_RELOC_IA64_IPLTLSB
;
10932 exp
->X_op
= O_symbol
;
10938 as_bad ("Unsupported fixup size %d", nbytes
);
10939 ignore_rest_of_line ();
10943 if (exp
->X_op
== O_pseudo_fixup
)
10945 exp
->X_op
= O_symbol
;
10946 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
10947 /* ??? If code unchanged, unsupported. */
10950 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
10951 /* We need to store the byte order in effect in case we're going
10952 to fix an 8 or 16 bit relocation (for which there no real
10953 relocs available). See md_apply_fix3(). */
10954 fix
->tc_fix_data
.bigendian
= target_big_endian
;
10957 /* Return the actual relocation we wish to associate with the pseudo
10958 reloc described by SYM and R_TYPE. SYM should be one of the
10959 symbols in the pseudo_func array, or NULL. */
10961 static bfd_reloc_code_real_type
10962 ia64_gen_real_reloc_type (sym
, r_type
)
10963 struct symbol
*sym
;
10964 bfd_reloc_code_real_type r_type
;
10966 bfd_reloc_code_real_type
new = 0;
10967 const char *type
= NULL
, *suffix
= "";
10974 switch (S_GET_VALUE (sym
))
10976 case FUNC_FPTR_RELATIVE
:
10979 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
10980 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
10981 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
10982 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
10983 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
10984 default: type
= "FPTR"; break;
10988 case FUNC_GP_RELATIVE
:
10991 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
10992 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
10993 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
10994 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
10995 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
10996 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
10997 default: type
= "GPREL"; break;
11001 case FUNC_LT_RELATIVE
:
11004 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
11005 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
11006 default: type
= "LTOFF"; break;
11010 case FUNC_LT_RELATIVE_X
:
11013 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
11014 default: type
= "LTOFF"; suffix
= "X"; break;
11018 case FUNC_PC_RELATIVE
:
11021 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
11022 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
11023 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
11024 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
11025 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
11026 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
11027 default: type
= "PCREL"; break;
11031 case FUNC_PLT_RELATIVE
:
11034 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
11035 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
11036 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
11037 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
11038 default: type
= "PLTOFF"; break;
11042 case FUNC_SEC_RELATIVE
:
11045 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
11046 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
11047 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
11048 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
11049 default: type
= "SECREL"; break;
11053 case FUNC_SEG_RELATIVE
:
11056 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
11057 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
11058 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
11059 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
11060 default: type
= "SEGREL"; break;
11064 case FUNC_LTV_RELATIVE
:
11067 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
11068 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
11069 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
11070 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
11071 default: type
= "LTV"; break;
11075 case FUNC_LT_FPTR_RELATIVE
:
11078 case BFD_RELOC_IA64_IMM22
:
11079 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11080 case BFD_RELOC_IA64_IMM64
:
11081 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11082 case BFD_RELOC_IA64_DIR32MSB
:
11083 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11084 case BFD_RELOC_IA64_DIR32LSB
:
11085 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11086 case BFD_RELOC_IA64_DIR64MSB
:
11087 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11088 case BFD_RELOC_IA64_DIR64LSB
:
11089 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11091 type
= "LTOFF_FPTR"; break;
11095 case FUNC_TP_RELATIVE
:
11098 case BFD_RELOC_IA64_IMM14
: new = BFD_RELOC_IA64_TPREL14
; break;
11099 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_TPREL22
; break;
11100 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_TPREL64I
; break;
11101 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_TPREL64MSB
; break;
11102 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_TPREL64LSB
; break;
11103 default: type
= "TPREL"; break;
11107 case FUNC_LT_TP_RELATIVE
:
11110 case BFD_RELOC_IA64_IMM22
:
11111 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11113 type
= "LTOFF_TPREL"; break;
11117 case FUNC_DTP_MODULE
:
11120 case BFD_RELOC_IA64_DIR64MSB
:
11121 new = BFD_RELOC_IA64_DTPMOD64MSB
; break;
11122 case BFD_RELOC_IA64_DIR64LSB
:
11123 new = BFD_RELOC_IA64_DTPMOD64LSB
; break;
11125 type
= "DTPMOD"; break;
11129 case FUNC_LT_DTP_MODULE
:
11132 case BFD_RELOC_IA64_IMM22
:
11133 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11135 type
= "LTOFF_DTPMOD"; break;
11139 case FUNC_DTP_RELATIVE
:
11142 case BFD_RELOC_IA64_DIR32MSB
:
11143 new = BFD_RELOC_IA64_DTPREL32MSB
; break;
11144 case BFD_RELOC_IA64_DIR32LSB
:
11145 new = BFD_RELOC_IA64_DTPREL32LSB
; break;
11146 case BFD_RELOC_IA64_DIR64MSB
:
11147 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
11148 case BFD_RELOC_IA64_DIR64LSB
:
11149 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
11150 case BFD_RELOC_IA64_IMM14
:
11151 new = BFD_RELOC_IA64_DTPREL14
; break;
11152 case BFD_RELOC_IA64_IMM22
:
11153 new = BFD_RELOC_IA64_DTPREL22
; break;
11154 case BFD_RELOC_IA64_IMM64
:
11155 new = BFD_RELOC_IA64_DTPREL64I
; break;
11157 type
= "DTPREL"; break;
11161 case FUNC_LT_DTP_RELATIVE
:
11164 case BFD_RELOC_IA64_IMM22
:
11165 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11167 type
= "LTOFF_DTPREL"; break;
11171 case FUNC_IPLT_RELOC
:
11174 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11175 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11176 default: type
= "IPLT"; break;
11194 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11195 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11196 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11197 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11198 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11199 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11200 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11204 /* This should be an error, but since previously there wasn't any
11205 diagnostic here, dont't make it fail because of this for now. */
11206 as_warn ("Cannot express %s%d%s relocation", type
, width
, suffix
);
11211 /* Here is where generate the appropriate reloc for pseudo relocation
11214 ia64_validate_fix (fix
)
11217 switch (fix
->fx_r_type
)
11219 case BFD_RELOC_IA64_FPTR64I
:
11220 case BFD_RELOC_IA64_FPTR32MSB
:
11221 case BFD_RELOC_IA64_FPTR64LSB
:
11222 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11223 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11224 if (fix
->fx_offset
!= 0)
11225 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11226 "No addend allowed in @fptr() relocation");
11234 fix_insn (fix
, odesc
, value
)
11236 const struct ia64_operand
*odesc
;
11239 bfd_vma insn
[3], t0
, t1
, control_bits
;
11244 slot
= fix
->fx_where
& 0x3;
11245 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11247 /* Bundles are always in little-endian byte order */
11248 t0
= bfd_getl64 (fixpos
);
11249 t1
= bfd_getl64 (fixpos
+ 8);
11250 control_bits
= t0
& 0x1f;
11251 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11252 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11253 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11256 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11258 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11259 insn
[2] |= (((value
& 0x7f) << 13)
11260 | (((value
>> 7) & 0x1ff) << 27)
11261 | (((value
>> 16) & 0x1f) << 22)
11262 | (((value
>> 21) & 0x1) << 21)
11263 | (((value
>> 63) & 0x1) << 36));
11265 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11267 if (value
& ~0x3fffffffffffffffULL
)
11268 err
= "integer operand out of range";
11269 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11270 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11272 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11275 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11276 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11277 | (((value
>> 0) & 0xfffff) << 13));
11280 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11283 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
11285 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11286 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11287 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11288 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11291 /* Attempt to simplify or even eliminate a fixup. The return value is
11292 ignored; perhaps it was once meaningful, but now it is historical.
11293 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11295 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11299 md_apply_fix3 (fix
, valP
, seg
)
11302 segT seg ATTRIBUTE_UNUSED
;
11305 valueT value
= *valP
;
11307 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11311 switch (fix
->fx_r_type
)
11313 case BFD_RELOC_IA64_PCREL21B
: break;
11314 case BFD_RELOC_IA64_PCREL21BI
: break;
11315 case BFD_RELOC_IA64_PCREL21F
: break;
11316 case BFD_RELOC_IA64_PCREL21M
: break;
11317 case BFD_RELOC_IA64_PCREL60B
: break;
11318 case BFD_RELOC_IA64_PCREL22
: break;
11319 case BFD_RELOC_IA64_PCREL64I
: break;
11320 case BFD_RELOC_IA64_PCREL32MSB
: break;
11321 case BFD_RELOC_IA64_PCREL32LSB
: break;
11322 case BFD_RELOC_IA64_PCREL64MSB
: break;
11323 case BFD_RELOC_IA64_PCREL64LSB
: break;
11325 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11332 switch (fix
->fx_r_type
)
11334 case BFD_RELOC_UNUSED
:
11335 /* This must be a TAG13 or TAG13b operand. There are no external
11336 relocs defined for them, so we must give an error. */
11337 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11338 "%s must have a constant value",
11339 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11343 case BFD_RELOC_IA64_TPREL14
:
11344 case BFD_RELOC_IA64_TPREL22
:
11345 case BFD_RELOC_IA64_TPREL64I
:
11346 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11347 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11348 case BFD_RELOC_IA64_DTPREL14
:
11349 case BFD_RELOC_IA64_DTPREL22
:
11350 case BFD_RELOC_IA64_DTPREL64I
:
11351 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11352 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11359 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11361 if (fix
->tc_fix_data
.bigendian
)
11362 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11364 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11369 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11374 /* Generate the BFD reloc to be stuck in the object file from the
11375 fixup used internally in the assembler. */
11378 tc_gen_reloc (sec
, fixp
)
11379 asection
*sec ATTRIBUTE_UNUSED
;
11384 reloc
= xmalloc (sizeof (*reloc
));
11385 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11386 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11387 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11388 reloc
->addend
= fixp
->fx_offset
;
11389 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11393 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11394 "Cannot represent %s relocation in object file",
11395 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11400 /* Turn a string in input_line_pointer into a floating point constant
11401 of type TYPE, and store the appropriate bytes in *LIT. The number
11402 of LITTLENUMS emitted is stored in *SIZE. An error message is
11403 returned, or NULL on OK. */
11405 #define MAX_LITTLENUMS 5
11408 md_atof (type
, lit
, size
)
11413 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11443 return "Bad call to MD_ATOF()";
11445 t
= atof_ieee (input_line_pointer
, type
, words
);
11447 input_line_pointer
= t
;
11449 (*ia64_float_to_chars
) (lit
, words
, prec
);
11453 /* It is 10 byte floating point with 6 byte padding. */
11454 memset (&lit
[10], 0, 6);
11455 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11458 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11463 /* Handle ia64 specific semantics of the align directive. */
11466 ia64_md_do_align (n
, fill
, len
, max
)
11467 int n ATTRIBUTE_UNUSED
;
11468 const char *fill ATTRIBUTE_UNUSED
;
11469 int len ATTRIBUTE_UNUSED
;
11470 int max ATTRIBUTE_UNUSED
;
11472 if (subseg_text_p (now_seg
))
11473 ia64_flush_insns ();
11476 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11477 of an rs_align_code fragment. */
11480 ia64_handle_align (fragp
)
11483 /* Use mfi bundle of nops with no stop bits. */
11484 static const unsigned char le_nop
[]
11485 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11486 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11487 static const unsigned char le_nop_stop
[]
11488 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11489 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11493 const unsigned char *nop
;
11495 if (fragp
->fr_type
!= rs_align_code
)
11498 /* Check if this frag has to end with a stop bit. */
11499 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11501 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11502 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11504 /* If no paddings are needed, we check if we need a stop bit. */
11505 if (!bytes
&& fragp
->tc_frag_data
)
11507 if (fragp
->fr_fix
< 16)
11509 /* FIXME: It won't work with
11511 alloc r32=ar.pfs,1,2,4,0
11515 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11516 _("Can't add stop bit to mark end of instruction group"));
11519 /* Bundles are always in little-endian byte order. Make sure
11520 the previous bundle has the stop bit. */
11524 /* Make sure we are on a 16-byte boundary, in case someone has been
11525 putting data into a text section. */
11528 int fix
= bytes
& 15;
11529 memset (p
, 0, fix
);
11532 fragp
->fr_fix
+= fix
;
11535 /* Instruction bundles are always little-endian. */
11536 memcpy (p
, nop
, 16);
11537 fragp
->fr_var
= 16;
11541 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11546 number_to_chars_bigendian (lit
, (long) (*words
++),
11547 sizeof (LITTLENUM_TYPE
));
11548 lit
+= sizeof (LITTLENUM_TYPE
);
11553 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11558 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11559 sizeof (LITTLENUM_TYPE
));
11560 lit
+= sizeof (LITTLENUM_TYPE
);
11565 ia64_elf_section_change_hook (void)
11567 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11568 && elf_linked_to_section (now_seg
) == NULL
)
11569 elf_linked_to_section (now_seg
) = text_section
;
11570 dot_byteorder (-1);
11573 /* Check if a label should be made global. */
11575 ia64_check_label (symbolS
*label
)
11577 if (*input_line_pointer
== ':')
11579 S_SET_EXTERNAL (label
);
11580 input_line_pointer
++;
11584 /* Used to remember where .alias and .secalias directives are seen. We
11585 will rename symbol and section names when we are about to output
11586 the relocatable file. */
11589 char *file
; /* The file where the directive is seen. */
11590 unsigned int line
; /* The line number the directive is at. */
11591 const char *name
; /* The orignale name of the symbol. */
11594 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11595 .secalias. Otherwise, it is .alias. */
11597 dot_alias (int section
)
11599 char *name
, *alias
;
11603 const char *error_string
;
11606 struct hash_control
*ahash
, *nhash
;
11609 name
= input_line_pointer
;
11610 delim
= get_symbol_end ();
11611 end_name
= input_line_pointer
;
11614 if (name
== end_name
)
11616 as_bad (_("expected symbol name"));
11617 discard_rest_of_line ();
11621 SKIP_WHITESPACE ();
11623 if (*input_line_pointer
!= ',')
11626 as_bad (_("expected comma after \"%s\""), name
);
11628 ignore_rest_of_line ();
11632 input_line_pointer
++;
11634 ia64_canonicalize_symbol_name (name
);
11636 /* We call demand_copy_C_string to check if alias string is valid.
11637 There should be a closing `"' and no `\0' in the string. */
11638 alias
= demand_copy_C_string (&len
);
11641 ignore_rest_of_line ();
11645 /* Make a copy of name string. */
11646 len
= strlen (name
) + 1;
11647 obstack_grow (¬es
, name
, len
);
11648 name
= obstack_finish (¬es
);
11653 ahash
= secalias_hash
;
11654 nhash
= secalias_name_hash
;
11659 ahash
= alias_hash
;
11660 nhash
= alias_name_hash
;
11663 /* Check if alias has been used before. */
11664 h
= (struct alias
*) hash_find (ahash
, alias
);
11667 if (strcmp (h
->name
, name
))
11668 as_bad (_("`%s' is already the alias of %s `%s'"),
11669 alias
, kind
, h
->name
);
11673 /* Check if name already has an alias. */
11674 a
= (const char *) hash_find (nhash
, name
);
11677 if (strcmp (a
, alias
))
11678 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11682 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11683 as_where (&h
->file
, &h
->line
);
11686 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11689 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11690 alias
, kind
, error_string
);
11694 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11697 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11698 alias
, kind
, error_string
);
11700 obstack_free (¬es
, name
);
11701 obstack_free (¬es
, alias
);
11704 demand_empty_rest_of_line ();
11707 /* It renames the original symbol name to its alias. */
11709 do_alias (const char *alias
, PTR value
)
11711 struct alias
*h
= (struct alias
*) value
;
11712 symbolS
*sym
= symbol_find (h
->name
);
11715 as_warn_where (h
->file
, h
->line
,
11716 _("symbol `%s' aliased to `%s' is not used"),
11719 S_SET_NAME (sym
, (char *) alias
);
11722 /* Called from write_object_file. */
11724 ia64_adjust_symtab (void)
11726 hash_traverse (alias_hash
, do_alias
);
11729 /* It renames the original section name to its alias. */
11731 do_secalias (const char *alias
, PTR value
)
11733 struct alias
*h
= (struct alias
*) value
;
11734 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11737 as_warn_where (h
->file
, h
->line
,
11738 _("section `%s' aliased to `%s' is not used"),
11744 /* Called from write_object_file. */
11746 ia64_frob_file (void)
11748 hash_traverse (secalias_hash
, do_secalias
);