1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
54 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
55 #define MIN(a,b) ((a) < (b) ? (a) : (b))
58 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
59 #define CURR_SLOT md.slot[md.curr_slot]
61 #define O_pseudo_fixup (O_max + 1)
65 /* IA-64 ABI section pseudo-ops. */
66 SPECIAL_SECTION_BSS
= 0,
68 SPECIAL_SECTION_SDATA
,
69 SPECIAL_SECTION_RODATA
,
70 SPECIAL_SECTION_COMMENT
,
71 SPECIAL_SECTION_UNWIND
,
72 SPECIAL_SECTION_UNWIND_INFO
,
73 /* HPUX specific section pseudo-ops. */
74 SPECIAL_SECTION_INIT_ARRAY
,
75 SPECIAL_SECTION_FINI_ARRAY
,
92 FUNC_LT_FPTR_RELATIVE
,
102 REG_FR
= (REG_GR
+ 128),
103 REG_AR
= (REG_FR
+ 128),
104 REG_CR
= (REG_AR
+ 128),
105 REG_P
= (REG_CR
+ 128),
106 REG_BR
= (REG_P
+ 64),
107 REG_IP
= (REG_BR
+ 8),
114 /* The following are pseudo-registers for use by gas only. */
126 /* The following pseudo-registers are used for unwind directives only: */
134 DYNREG_GR
= 0, /* dynamic general purpose register */
135 DYNREG_FR
, /* dynamic floating point register */
136 DYNREG_PR
, /* dynamic predicate register */
140 enum operand_match_result
143 OPERAND_OUT_OF_RANGE
,
147 /* On the ia64, we can't know the address of a text label until the
148 instructions are packed into a bundle. To handle this, we keep
149 track of the list of labels that appear in front of each
153 struct label_fix
*next
;
157 /* This is the endianness of the current section. */
158 extern int target_big_endian
;
160 /* This is the default endianness. */
161 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
163 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
165 static void ia64_float_to_chars_bigendian
166 PARAMS ((char *, LITTLENUM_TYPE
*, int));
167 static void ia64_float_to_chars_littleendian
168 PARAMS ((char *, LITTLENUM_TYPE
*, int));
169 static void (*ia64_float_to_chars
)
170 PARAMS ((char *, LITTLENUM_TYPE
*, int));
172 static struct hash_control
*alias_hash
;
173 static struct hash_control
*alias_name_hash
;
174 static struct hash_control
*secalias_hash
;
175 static struct hash_control
*secalias_name_hash
;
177 /* Characters which always start a comment. */
178 const char comment_chars
[] = "";
180 /* Characters which start a comment at the beginning of a line. */
181 const char line_comment_chars
[] = "#";
183 /* Characters which may be used to separate multiple commands on a
185 const char line_separator_chars
[] = ";";
187 /* Characters which are used to indicate an exponent in a floating
189 const char EXP_CHARS
[] = "eE";
191 /* Characters which mean that a number is a floating point constant,
193 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
195 /* ia64-specific option processing: */
197 const char *md_shortopts
= "m:N:x::";
199 struct option md_longopts
[] =
201 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
202 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
203 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
204 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
207 size_t md_longopts_size
= sizeof (md_longopts
);
211 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
212 struct hash_control
*reg_hash
; /* register name hash table */
213 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
214 struct hash_control
*const_hash
; /* constant hash table */
215 struct hash_control
*entry_hash
; /* code entry hint hash table */
217 symbolS
*regsym
[REG_NUM
];
219 /* If X_op is != O_absent, the registername for the instruction's
220 qualifying predicate. If NULL, p0 is assumed for instructions
221 that are predicatable. */
228 explicit_mode
: 1, /* which mode we're in */
229 default_explicit_mode
: 1, /* which mode is the default */
230 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
232 keep_pending_output
: 1;
234 /* Each bundle consists of up to three instructions. We keep
235 track of four most recent instructions so we can correctly set
236 the end_of_insn_group for the last instruction in a bundle. */
238 int num_slots_in_use
;
242 end_of_insn_group
: 1,
243 manual_bundling_on
: 1,
244 manual_bundling_off
: 1,
245 loc_directive_seen
: 1;
246 signed char user_template
; /* user-selected template, if any */
247 unsigned char qp_regno
; /* qualifying predicate */
248 /* This duplicates a good fraction of "struct fix" but we
249 can't use a "struct fix" instead since we can't call
250 fix_new_exp() until we know the address of the instruction. */
254 bfd_reloc_code_real_type code
;
255 enum ia64_opnd opnd
; /* type of operand in need of fix */
256 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
257 expressionS expr
; /* the value to be inserted */
259 fixup
[2]; /* at most two fixups per insn */
260 struct ia64_opcode
*idesc
;
261 struct label_fix
*label_fixups
;
262 struct label_fix
*tag_fixups
;
263 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
266 unsigned int src_line
;
267 struct dwarf2_line_info debug_line
;
275 struct dynreg
*next
; /* next dynamic register */
277 unsigned short base
; /* the base register number */
278 unsigned short num_regs
; /* # of registers in this set */
280 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
282 flagword flags
; /* ELF-header flags */
285 unsigned hint
:1; /* is this hint currently valid? */
286 bfd_vma offset
; /* mem.offset offset */
287 bfd_vma base
; /* mem.offset base */
290 int path
; /* number of alt. entry points seen */
291 const char **entry_labels
; /* labels of all alternate paths in
292 the current DV-checking block. */
293 int maxpaths
; /* size currently allocated for
295 /* Support for hardware errata workarounds. */
297 /* Record data about the last three insn groups. */
300 /* B-step workaround.
301 For each predicate register, this is set if the corresponding insn
302 group conditionally sets this register with one of the affected
305 /* B-step workaround.
306 For each general register, this is set if the corresponding insn
307 a) is conditional one one of the predicate registers for which
308 P_REG_SET is 1 in the corresponding entry of the previous group,
309 b) sets this general register with one of the affected
311 int g_reg_set_conditionally
[128];
315 int pointer_size
; /* size in bytes of a pointer */
316 int pointer_size_shift
; /* shift size of a pointer for alignment */
320 /* application registers: */
326 #define AR_BSPSTORE 18
341 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
342 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
343 {"ar.rsc", 16}, {"ar.bsp", 17},
344 {"ar.bspstore", 18}, {"ar.rnat", 19},
345 {"ar.fcr", 21}, {"ar.eflag", 24},
346 {"ar.csd", 25}, {"ar.ssd", 26},
347 {"ar.cflg", 27}, {"ar.fsr", 28},
348 {"ar.fir", 29}, {"ar.fdr", 30},
349 {"ar.ccv", 32}, {"ar.unat", 36},
350 {"ar.fpsr", 40}, {"ar.itc", 44},
351 {"ar.pfs", 64}, {"ar.lc", 65},
372 /* control registers: */
414 static const struct const_desc
421 /* PSR constant masks: */
424 {"psr.be", ((valueT
) 1) << 1},
425 {"psr.up", ((valueT
) 1) << 2},
426 {"psr.ac", ((valueT
) 1) << 3},
427 {"psr.mfl", ((valueT
) 1) << 4},
428 {"psr.mfh", ((valueT
) 1) << 5},
430 {"psr.ic", ((valueT
) 1) << 13},
431 {"psr.i", ((valueT
) 1) << 14},
432 {"psr.pk", ((valueT
) 1) << 15},
434 {"psr.dt", ((valueT
) 1) << 17},
435 {"psr.dfl", ((valueT
) 1) << 18},
436 {"psr.dfh", ((valueT
) 1) << 19},
437 {"psr.sp", ((valueT
) 1) << 20},
438 {"psr.pp", ((valueT
) 1) << 21},
439 {"psr.di", ((valueT
) 1) << 22},
440 {"psr.si", ((valueT
) 1) << 23},
441 {"psr.db", ((valueT
) 1) << 24},
442 {"psr.lp", ((valueT
) 1) << 25},
443 {"psr.tb", ((valueT
) 1) << 26},
444 {"psr.rt", ((valueT
) 1) << 27},
445 /* 28-31: reserved */
446 /* 32-33: cpl (current privilege level) */
447 {"psr.is", ((valueT
) 1) << 34},
448 {"psr.mc", ((valueT
) 1) << 35},
449 {"psr.it", ((valueT
) 1) << 36},
450 {"psr.id", ((valueT
) 1) << 37},
451 {"psr.da", ((valueT
) 1) << 38},
452 {"psr.dd", ((valueT
) 1) << 39},
453 {"psr.ss", ((valueT
) 1) << 40},
454 /* 41-42: ri (restart instruction) */
455 {"psr.ed", ((valueT
) 1) << 43},
456 {"psr.bn", ((valueT
) 1) << 44},
459 /* indirect register-sets/memory: */
468 { "CPUID", IND_CPUID
},
469 { "cpuid", IND_CPUID
},
481 /* Pseudo functions used to indicate relocation types (these functions
482 start with an at sign (@). */
504 /* reloc pseudo functions (these must come first!): */
505 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
506 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
507 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
508 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
509 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
510 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
511 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
512 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
513 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
514 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
515 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
516 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
517 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
518 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
519 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
520 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
521 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
523 /* mbtype4 constants: */
524 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
525 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
526 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
527 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
528 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
530 /* fclass constants: */
531 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
532 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
533 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
534 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
535 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
536 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
537 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
538 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
539 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
541 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
543 /* hint constants: */
544 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
546 /* unwind-related constants: */
547 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
548 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
549 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
550 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
551 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
552 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
553 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
555 /* unwind-related registers: */
556 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
559 /* 41-bit nop opcodes (one per unit): */
560 static const bfd_vma nop
[IA64_NUM_UNITS
] =
562 0x0000000000LL
, /* NIL => break 0 */
563 0x0008000000LL
, /* I-unit nop */
564 0x0008000000LL
, /* M-unit nop */
565 0x4000000000LL
, /* B-unit nop */
566 0x0008000000LL
, /* F-unit nop */
567 0x0008000000LL
, /* L-"unit" nop */
568 0x0008000000LL
, /* X-unit nop */
571 /* Can't be `const' as it's passed to input routines (which have the
572 habit of setting temporary sentinels. */
573 static char special_section_name
[][20] =
575 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
576 {".IA_64.unwind"}, {".IA_64.unwind_info"},
577 {".init_array"}, {".fini_array"}
580 /* The best template for a particular sequence of up to three
582 #define N IA64_NUM_TYPES
583 static unsigned char best_template
[N
][N
][N
];
586 /* Resource dependencies currently in effect */
588 int depind
; /* dependency index */
589 const struct ia64_dependency
*dependency
; /* actual dependency */
590 unsigned specific
:1, /* is this a specific bit/regno? */
591 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
592 int index
; /* specific regno/bit within dependency */
593 int note
; /* optional qualifying note (0 if none) */
597 int insn_srlz
; /* current insn serialization state */
598 int data_srlz
; /* current data serialization state */
599 int qp_regno
; /* qualifying predicate for this usage */
600 char *file
; /* what file marked this dependency */
601 unsigned int line
; /* what line marked this dependency */
602 struct mem_offset mem_offset
; /* optional memory offset hint */
603 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
604 int path
; /* corresponding code entry index */
606 static int regdepslen
= 0;
607 static int regdepstotlen
= 0;
608 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
609 static const char *dv_sem
[] = { "none", "implied", "impliedf",
610 "data", "instr", "specific", "stop", "other" };
611 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
613 /* Current state of PR mutexation */
614 static struct qpmutex
{
617 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
618 static int qp_mutexeslen
= 0;
619 static int qp_mutexestotlen
= 0;
620 static valueT qp_safe_across_calls
= 0;
622 /* Current state of PR implications */
623 static struct qp_imply
{
626 unsigned p2_branched
:1;
628 } *qp_implies
= NULL
;
629 static int qp_implieslen
= 0;
630 static int qp_impliestotlen
= 0;
632 /* Keep track of static GR values so that indirect register usage can
633 sometimes be tracked. */
638 } gr_values
[128] = {{ 1, 0, 0 }};
640 /* Remember the alignment frag. */
641 static fragS
*align_frag
;
643 /* These are the routines required to output the various types of
646 /* A slot_number is a frag address plus the slot index (0-2). We use the
647 frag address here so that if there is a section switch in the middle of
648 a function, then instructions emitted to a different section are not
649 counted. Since there may be more than one frag for a function, this
650 means we also need to keep track of which frag this address belongs to
651 so we can compute inter-frag distances. This also nicely solves the
652 problem with nops emitted for align directives, which can't easily be
653 counted, but can easily be derived from frag sizes. */
655 typedef struct unw_rec_list
{
657 unsigned long slot_number
;
659 unsigned long next_slot_number
;
660 fragS
*next_slot_frag
;
661 struct unw_rec_list
*next
;
664 #define SLOT_NUM_NOT_SET (unsigned)-1
666 /* Linked list of saved prologue counts. A very poor
667 implementation of a map from label numbers to prologue counts. */
668 typedef struct label_prologue_count
670 struct label_prologue_count
*next
;
671 unsigned long label_number
;
672 unsigned int prologue_count
;
673 } label_prologue_count
;
677 /* Maintain a list of unwind entries for the current function. */
681 /* Any unwind entires that should be attached to the current slot
682 that an insn is being constructed for. */
683 unw_rec_list
*current_entry
;
685 /* These are used to create the unwind table entry for this function. */
687 symbolS
*info
; /* pointer to unwind info */
688 symbolS
*personality_routine
;
690 subsegT saved_text_subseg
;
691 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
693 /* TRUE if processing unwind directives in a prologue region. */
694 unsigned int prologue
: 1;
695 unsigned int prologue_mask
: 4;
696 unsigned int body
: 1;
697 unsigned int insn
: 1;
698 unsigned int prologue_count
; /* number of .prologues seen so far */
699 /* Prologue counts at previous .label_state directives. */
700 struct label_prologue_count
* saved_prologue_counts
;
703 /* The input value is a negated offset from psp, and specifies an address
704 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
705 must add 16 and divide by 4 to get the encoded value. */
707 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
709 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
711 /* Forward declarations: */
712 static void set_section
PARAMS ((char *name
));
713 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
714 unsigned int, unsigned int));
715 static void dot_align (int);
716 static void dot_radix
PARAMS ((int));
717 static void dot_special_section
PARAMS ((int));
718 static void dot_proc
PARAMS ((int));
719 static void dot_fframe
PARAMS ((int));
720 static void dot_vframe
PARAMS ((int));
721 static void dot_vframesp
PARAMS ((int));
722 static void dot_vframepsp
PARAMS ((int));
723 static void dot_save
PARAMS ((int));
724 static void dot_restore
PARAMS ((int));
725 static void dot_restorereg
PARAMS ((int));
726 static void dot_restorereg_p
PARAMS ((int));
727 static void dot_handlerdata
PARAMS ((int));
728 static void dot_unwentry
PARAMS ((int));
729 static void dot_altrp
PARAMS ((int));
730 static void dot_savemem
PARAMS ((int));
731 static void dot_saveg
PARAMS ((int));
732 static void dot_savef
PARAMS ((int));
733 static void dot_saveb
PARAMS ((int));
734 static void dot_savegf
PARAMS ((int));
735 static void dot_spill
PARAMS ((int));
736 static void dot_spillreg
PARAMS ((int));
737 static void dot_spillmem
PARAMS ((int));
738 static void dot_spillreg_p
PARAMS ((int));
739 static void dot_spillmem_p
PARAMS ((int));
740 static void dot_label_state
PARAMS ((int));
741 static void dot_copy_state
PARAMS ((int));
742 static void dot_unwabi
PARAMS ((int));
743 static void dot_personality
PARAMS ((int));
744 static void dot_body
PARAMS ((int));
745 static void dot_prologue
PARAMS ((int));
746 static void dot_endp
PARAMS ((int));
747 static void dot_template
PARAMS ((int));
748 static void dot_regstk
PARAMS ((int));
749 static void dot_rot
PARAMS ((int));
750 static void dot_byteorder
PARAMS ((int));
751 static void dot_psr
PARAMS ((int));
752 static void dot_alias
PARAMS ((int));
753 static void dot_ln
PARAMS ((int));
754 static char *parse_section_name
PARAMS ((void));
755 static void dot_xdata
PARAMS ((int));
756 static void stmt_float_cons
PARAMS ((int));
757 static void stmt_cons_ua
PARAMS ((int));
758 static void dot_xfloat_cons
PARAMS ((int));
759 static void dot_xstringer
PARAMS ((int));
760 static void dot_xdata_ua
PARAMS ((int));
761 static void dot_xfloat_cons_ua
PARAMS ((int));
762 static void print_prmask
PARAMS ((valueT mask
));
763 static void dot_pred_rel
PARAMS ((int));
764 static void dot_reg_val
PARAMS ((int));
765 static void dot_serialize
PARAMS ((int));
766 static void dot_dv_mode
PARAMS ((int));
767 static void dot_entry
PARAMS ((int));
768 static void dot_mem_offset
PARAMS ((int));
769 static void add_unwind_entry
PARAMS((unw_rec_list
*ptr
));
770 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
771 static void declare_register_set
PARAMS ((const char *, int, int));
772 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
773 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
776 static int parse_operand
PARAMS ((expressionS
*e
));
777 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
778 static int errata_nop_necessary_p
PARAMS ((struct slot
*, enum ia64_unit
));
779 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
780 static void emit_one_bundle
PARAMS ((void));
781 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
782 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
783 bfd_reloc_code_real_type r_type
));
784 static void insn_group_break
PARAMS ((int, int, int));
785 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
786 struct rsrc
*, int depind
, int path
));
787 static void add_qp_mutex
PARAMS((valueT mask
));
788 static void add_qp_imply
PARAMS((int p1
, int p2
));
789 static void clear_qp_branch_flag
PARAMS((valueT mask
));
790 static void clear_qp_mutex
PARAMS((valueT mask
));
791 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
792 static int has_suffix_p
PARAMS((const char *, const char *));
793 static void clear_register_values
PARAMS ((void));
794 static void print_dependency
PARAMS ((const char *action
, int depind
));
795 static void instruction_serialization
PARAMS ((void));
796 static void data_serialization
PARAMS ((void));
797 static void remove_marked_resource
PARAMS ((struct rsrc
*));
798 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
799 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
800 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
801 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
802 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
803 struct ia64_opcode
*, int, struct rsrc
[], int, int));
804 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
805 static void check_dependencies
PARAMS((struct ia64_opcode
*));
806 static void mark_resources
PARAMS((struct ia64_opcode
*));
807 static void update_dependencies
PARAMS((struct ia64_opcode
*));
808 static void note_register_values
PARAMS((struct ia64_opcode
*));
809 static int qp_mutex
PARAMS ((int, int, int));
810 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
811 static void output_vbyte_mem
PARAMS ((int, char *, char *));
812 static void count_output
PARAMS ((int, char *, char *));
813 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
814 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
815 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
816 static void output_P1_format
PARAMS ((vbyte_func
, int));
817 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
818 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
819 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
820 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
821 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
822 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
823 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
824 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
825 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
826 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
827 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
828 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
829 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
830 static char format_ab_reg
PARAMS ((int, int));
831 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
833 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
834 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
836 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
837 static unw_rec_list
*output_endp
PARAMS ((void));
838 static unw_rec_list
*output_prologue
PARAMS ((void));
839 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
840 static unw_rec_list
*output_body
PARAMS ((void));
841 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
842 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
843 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
844 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
845 static unw_rec_list
*output_rp_when
PARAMS ((void));
846 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
847 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
848 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
849 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
850 static unw_rec_list
*output_pfs_when
PARAMS ((void));
851 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
852 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
853 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
854 static unw_rec_list
*output_preds_when
PARAMS ((void));
855 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
856 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
857 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
858 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
859 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
860 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
861 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
862 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
863 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
864 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
865 static unw_rec_list
*output_unat_when
PARAMS ((void));
866 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
867 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
868 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
869 static unw_rec_list
*output_lc_when
PARAMS ((void));
870 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
871 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
872 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
873 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
874 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
875 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
876 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
877 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
878 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
879 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
880 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
881 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
882 static unw_rec_list
*output_bsp_when
PARAMS ((void));
883 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
884 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
885 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
886 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
887 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
888 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
889 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
890 static unw_rec_list
*output_rnat_when
PARAMS ((void));
891 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
892 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
893 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
894 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
895 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
896 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
897 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
898 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int));
899 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int));
900 static unw_rec_list
*output_spill_psprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
902 static unw_rec_list
*output_spill_sprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
904 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
906 static unw_rec_list
*output_spill_reg_p
PARAMS ((unsigned int, unsigned int, unsigned int,
907 unsigned int, unsigned int));
908 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
909 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
910 static int calc_record_size
PARAMS ((unw_rec_list
*));
911 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
912 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
913 unsigned long, fragS
*,
915 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
916 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
917 static int convert_expr_to_ab_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
918 static int convert_expr_to_xy_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
919 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
920 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
921 static void free_saved_prologue_counts
PARAMS ((void));
923 /* Determine if application register REGNUM resides only in the integer
924 unit (as opposed to the memory unit). */
926 ar_is_only_in_integer_unit (int reg
)
929 return reg
>= 64 && reg
<= 111;
932 /* Determine if application register REGNUM resides only in the memory
933 unit (as opposed to the integer unit). */
935 ar_is_only_in_memory_unit (int reg
)
938 return reg
>= 0 && reg
<= 47;
941 /* Switch to section NAME and create section if necessary. It's
942 rather ugly that we have to manipulate input_line_pointer but I
943 don't see any other way to accomplish the same thing without
944 changing obj-elf.c (which may be the Right Thing, in the end). */
949 char *saved_input_line_pointer
;
951 saved_input_line_pointer
= input_line_pointer
;
952 input_line_pointer
= name
;
954 input_line_pointer
= saved_input_line_pointer
;
957 /* Map 's' to SHF_IA_64_SHORT. */
960 ia64_elf_section_letter (letter
, ptr_msg
)
965 return SHF_IA_64_SHORT
;
966 else if (letter
== 'o')
967 return SHF_LINK_ORDER
;
969 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
973 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
976 ia64_elf_section_flags (flags
, attr
, type
)
978 int attr
, type ATTRIBUTE_UNUSED
;
980 if (attr
& SHF_IA_64_SHORT
)
981 flags
|= SEC_SMALL_DATA
;
986 ia64_elf_section_type (str
, len
)
990 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
992 if (STREQ (ELF_STRING_ia64_unwind_info
))
995 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
998 if (STREQ (ELF_STRING_ia64_unwind
))
999 return SHT_IA_64_UNWIND
;
1001 if (STREQ (ELF_STRING_ia64_unwind_once
))
1002 return SHT_IA_64_UNWIND
;
1004 if (STREQ ("unwind"))
1005 return SHT_IA_64_UNWIND
;
1012 set_regstack (ins
, locs
, outs
, rots
)
1013 unsigned int ins
, locs
, outs
, rots
;
1015 /* Size of frame. */
1018 sof
= ins
+ locs
+ outs
;
1021 as_bad ("Size of frame exceeds maximum of 96 registers");
1026 as_warn ("Size of rotating registers exceeds frame size");
1029 md
.in
.base
= REG_GR
+ 32;
1030 md
.loc
.base
= md
.in
.base
+ ins
;
1031 md
.out
.base
= md
.loc
.base
+ locs
;
1033 md
.in
.num_regs
= ins
;
1034 md
.loc
.num_regs
= locs
;
1035 md
.out
.num_regs
= outs
;
1036 md
.rot
.num_regs
= rots
;
1043 struct label_fix
*lfix
;
1045 subsegT saved_subseg
;
1048 if (!md
.last_text_seg
)
1051 saved_seg
= now_seg
;
1052 saved_subseg
= now_subseg
;
1054 subseg_set (md
.last_text_seg
, 0);
1056 while (md
.num_slots_in_use
> 0)
1057 emit_one_bundle (); /* force out queued instructions */
1059 /* In case there are labels following the last instruction, resolve
1061 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1063 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1064 symbol_set_frag (lfix
->sym
, frag_now
);
1066 CURR_SLOT
.label_fixups
= 0;
1067 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1069 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1070 symbol_set_frag (lfix
->sym
, frag_now
);
1072 CURR_SLOT
.tag_fixups
= 0;
1074 /* In case there are unwind directives following the last instruction,
1075 resolve those now. We only handle prologue, body, and endp directives
1076 here. Give an error for others. */
1077 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1079 switch (ptr
->r
.type
)
1085 ptr
->slot_number
= (unsigned long) frag_more (0);
1086 ptr
->slot_frag
= frag_now
;
1089 /* Allow any record which doesn't have a "t" field (i.e.,
1090 doesn't relate to a particular instruction). */
1106 as_bad (_("Unwind directive not followed by an instruction."));
1110 unwind
.current_entry
= NULL
;
1112 subseg_set (saved_seg
, saved_subseg
);
1114 if (md
.qp
.X_op
== O_register
)
1115 as_bad ("qualifying predicate not followed by instruction");
1119 ia64_do_align (int nbytes
)
1121 char *saved_input_line_pointer
= input_line_pointer
;
1123 input_line_pointer
= "";
1124 s_align_bytes (nbytes
);
1125 input_line_pointer
= saved_input_line_pointer
;
1129 ia64_cons_align (nbytes
)
1134 char *saved_input_line_pointer
= input_line_pointer
;
1135 input_line_pointer
= "";
1136 s_align_bytes (nbytes
);
1137 input_line_pointer
= saved_input_line_pointer
;
1141 /* Output COUNT bytes to a memory location. */
1142 static unsigned char *vbyte_mem_ptr
= NULL
;
1145 output_vbyte_mem (count
, ptr
, comment
)
1148 char *comment ATTRIBUTE_UNUSED
;
1151 if (vbyte_mem_ptr
== NULL
)
1156 for (x
= 0; x
< count
; x
++)
1157 *(vbyte_mem_ptr
++) = ptr
[x
];
1160 /* Count the number of bytes required for records. */
1161 static int vbyte_count
= 0;
1163 count_output (count
, ptr
, comment
)
1165 char *ptr ATTRIBUTE_UNUSED
;
1166 char *comment ATTRIBUTE_UNUSED
;
1168 vbyte_count
+= count
;
1172 output_R1_format (f
, rtype
, rlen
)
1174 unw_record_type rtype
;
1181 output_R3_format (f
, rtype
, rlen
);
1187 else if (rtype
!= prologue
)
1188 as_bad ("record type is not valid");
1190 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1191 (*f
) (1, &byte
, NULL
);
1195 output_R2_format (f
, mask
, grsave
, rlen
)
1202 mask
= (mask
& 0x0f);
1203 grsave
= (grsave
& 0x7f);
1205 bytes
[0] = (UNW_R2
| (mask
>> 1));
1206 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1207 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1208 (*f
) (count
, bytes
, NULL
);
1212 output_R3_format (f
, rtype
, rlen
)
1214 unw_record_type rtype
;
1221 output_R1_format (f
, rtype
, rlen
);
1227 else if (rtype
!= prologue
)
1228 as_bad ("record type is not valid");
1229 bytes
[0] = (UNW_R3
| r
);
1230 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1231 (*f
) (count
+ 1, bytes
, NULL
);
1235 output_P1_format (f
, brmask
)
1240 byte
= UNW_P1
| (brmask
& 0x1f);
1241 (*f
) (1, &byte
, NULL
);
1245 output_P2_format (f
, brmask
, gr
)
1251 brmask
= (brmask
& 0x1f);
1252 bytes
[0] = UNW_P2
| (brmask
>> 1);
1253 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1254 (*f
) (2, bytes
, NULL
);
1258 output_P3_format (f
, rtype
, reg
)
1260 unw_record_type rtype
;
1305 as_bad ("Invalid record type for P3 format.");
1307 bytes
[0] = (UNW_P3
| (r
>> 1));
1308 bytes
[1] = (((r
& 1) << 7) | reg
);
1309 (*f
) (2, bytes
, NULL
);
1313 output_P4_format (f
, imask
, imask_size
)
1315 unsigned char *imask
;
1316 unsigned long imask_size
;
1319 (*f
) (imask_size
, imask
, NULL
);
1323 output_P5_format (f
, grmask
, frmask
)
1326 unsigned long frmask
;
1329 grmask
= (grmask
& 0x0f);
1332 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1333 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1334 bytes
[3] = (frmask
& 0x000000ff);
1335 (*f
) (4, bytes
, NULL
);
1339 output_P6_format (f
, rtype
, rmask
)
1341 unw_record_type rtype
;
1347 if (rtype
== gr_mem
)
1349 else if (rtype
!= fr_mem
)
1350 as_bad ("Invalid record type for format P6");
1351 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1352 (*f
) (1, &byte
, NULL
);
1356 output_P7_format (f
, rtype
, w1
, w2
)
1358 unw_record_type rtype
;
1365 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1370 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1420 bytes
[0] = (UNW_P7
| r
);
1421 (*f
) (count
, bytes
, NULL
);
1425 output_P8_format (f
, rtype
, t
)
1427 unw_record_type rtype
;
1466 case bspstore_psprel
:
1469 case bspstore_sprel
:
1481 case priunat_when_gr
:
1484 case priunat_psprel
:
1490 case priunat_when_mem
:
1497 count
+= output_leb128 (bytes
+ 2, t
, 0);
1498 (*f
) (count
, bytes
, NULL
);
1502 output_P9_format (f
, grmask
, gr
)
1509 bytes
[1] = (grmask
& 0x0f);
1510 bytes
[2] = (gr
& 0x7f);
1511 (*f
) (3, bytes
, NULL
);
1515 output_P10_format (f
, abi
, context
)
1522 bytes
[1] = (abi
& 0xff);
1523 bytes
[2] = (context
& 0xff);
1524 (*f
) (3, bytes
, NULL
);
1528 output_B1_format (f
, rtype
, label
)
1530 unw_record_type rtype
;
1531 unsigned long label
;
1537 output_B4_format (f
, rtype
, label
);
1540 if (rtype
== copy_state
)
1542 else if (rtype
!= label_state
)
1543 as_bad ("Invalid record type for format B1");
1545 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1546 (*f
) (1, &byte
, NULL
);
1550 output_B2_format (f
, ecount
, t
)
1552 unsigned long ecount
;
1559 output_B3_format (f
, ecount
, t
);
1562 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1563 count
+= output_leb128 (bytes
+ 1, t
, 0);
1564 (*f
) (count
, bytes
, NULL
);
1568 output_B3_format (f
, ecount
, t
)
1570 unsigned long ecount
;
1577 output_B2_format (f
, ecount
, t
);
1581 count
+= output_leb128 (bytes
+ 1, t
, 0);
1582 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1583 (*f
) (count
, bytes
, NULL
);
1587 output_B4_format (f
, rtype
, label
)
1589 unw_record_type rtype
;
1590 unsigned long label
;
1597 output_B1_format (f
, rtype
, label
);
1601 if (rtype
== copy_state
)
1603 else if (rtype
!= label_state
)
1604 as_bad ("Invalid record type for format B1");
1606 bytes
[0] = (UNW_B4
| (r
<< 3));
1607 count
+= output_leb128 (bytes
+ 1, label
, 0);
1608 (*f
) (count
, bytes
, NULL
);
1612 format_ab_reg (ab
, reg
)
1619 ret
= (ab
<< 5) | reg
;
1624 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1626 unw_record_type rtype
;
1636 if (rtype
== spill_sprel
)
1638 else if (rtype
!= spill_psprel
)
1639 as_bad ("Invalid record type for format X1");
1640 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1641 count
+= output_leb128 (bytes
+ 2, t
, 0);
1642 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1643 (*f
) (count
, bytes
, NULL
);
1647 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1656 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1657 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1658 count
+= output_leb128 (bytes
+ 3, t
, 0);
1659 (*f
) (count
, bytes
, NULL
);
1663 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1665 unw_record_type rtype
;
1676 if (rtype
== spill_sprel_p
)
1678 else if (rtype
!= spill_psprel_p
)
1679 as_bad ("Invalid record type for format X3");
1680 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1681 bytes
[2] = format_ab_reg (ab
, reg
);
1682 count
+= output_leb128 (bytes
+ 3, t
, 0);
1683 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1684 (*f
) (count
, bytes
, NULL
);
1688 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1698 bytes
[1] = (qp
& 0x3f);
1699 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1700 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1701 count
+= output_leb128 (bytes
+ 4, t
, 0);
1702 (*f
) (count
, bytes
, NULL
);
1705 /* This function allocates a record list structure, and initializes fields. */
1707 static unw_rec_list
*
1708 alloc_record (unw_record_type t
)
1711 ptr
= xmalloc (sizeof (*ptr
));
1713 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1715 ptr
->next_slot_number
= 0;
1716 ptr
->next_slot_frag
= 0;
1720 /* Dummy unwind record used for calculating the length of the last prologue or
1723 static unw_rec_list
*
1726 unw_rec_list
*ptr
= alloc_record (endp
);
1730 static unw_rec_list
*
1733 unw_rec_list
*ptr
= alloc_record (prologue
);
1734 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1738 static unw_rec_list
*
1739 output_prologue_gr (saved_mask
, reg
)
1740 unsigned int saved_mask
;
1743 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1744 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1745 ptr
->r
.record
.r
.grmask
= saved_mask
;
1746 ptr
->r
.record
.r
.grsave
= reg
;
1750 static unw_rec_list
*
1753 unw_rec_list
*ptr
= alloc_record (body
);
1757 static unw_rec_list
*
1758 output_mem_stack_f (size
)
1761 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1762 ptr
->r
.record
.p
.size
= size
;
1766 static unw_rec_list
*
1767 output_mem_stack_v ()
1769 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1773 static unw_rec_list
*
1777 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1778 ptr
->r
.record
.p
.gr
= gr
;
1782 static unw_rec_list
*
1783 output_psp_sprel (offset
)
1784 unsigned int offset
;
1786 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1787 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1791 static unw_rec_list
*
1794 unw_rec_list
*ptr
= alloc_record (rp_when
);
1798 static unw_rec_list
*
1802 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1803 ptr
->r
.record
.p
.gr
= gr
;
1807 static unw_rec_list
*
1811 unw_rec_list
*ptr
= alloc_record (rp_br
);
1812 ptr
->r
.record
.p
.br
= br
;
1816 static unw_rec_list
*
1817 output_rp_psprel (offset
)
1818 unsigned int offset
;
1820 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1821 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1825 static unw_rec_list
*
1826 output_rp_sprel (offset
)
1827 unsigned int offset
;
1829 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1830 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1834 static unw_rec_list
*
1837 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1841 static unw_rec_list
*
1845 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1846 ptr
->r
.record
.p
.gr
= gr
;
1850 static unw_rec_list
*
1851 output_pfs_psprel (offset
)
1852 unsigned int offset
;
1854 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1855 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1859 static unw_rec_list
*
1860 output_pfs_sprel (offset
)
1861 unsigned int offset
;
1863 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1864 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1868 static unw_rec_list
*
1869 output_preds_when ()
1871 unw_rec_list
*ptr
= alloc_record (preds_when
);
1875 static unw_rec_list
*
1876 output_preds_gr (gr
)
1879 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1880 ptr
->r
.record
.p
.gr
= gr
;
1884 static unw_rec_list
*
1885 output_preds_psprel (offset
)
1886 unsigned int offset
;
1888 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1889 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1893 static unw_rec_list
*
1894 output_preds_sprel (offset
)
1895 unsigned int offset
;
1897 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1898 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1902 static unw_rec_list
*
1903 output_fr_mem (mask
)
1906 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1907 ptr
->r
.record
.p
.rmask
= mask
;
1911 static unw_rec_list
*
1912 output_frgr_mem (gr_mask
, fr_mask
)
1913 unsigned int gr_mask
;
1914 unsigned int fr_mask
;
1916 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1917 ptr
->r
.record
.p
.grmask
= gr_mask
;
1918 ptr
->r
.record
.p
.frmask
= fr_mask
;
1922 static unw_rec_list
*
1923 output_gr_gr (mask
, reg
)
1927 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1928 ptr
->r
.record
.p
.grmask
= mask
;
1929 ptr
->r
.record
.p
.gr
= reg
;
1933 static unw_rec_list
*
1934 output_gr_mem (mask
)
1937 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1938 ptr
->r
.record
.p
.rmask
= mask
;
1942 static unw_rec_list
*
1943 output_br_mem (unsigned int mask
)
1945 unw_rec_list
*ptr
= alloc_record (br_mem
);
1946 ptr
->r
.record
.p
.brmask
= mask
;
1950 static unw_rec_list
*
1951 output_br_gr (save_mask
, reg
)
1952 unsigned int save_mask
;
1955 unw_rec_list
*ptr
= alloc_record (br_gr
);
1956 ptr
->r
.record
.p
.brmask
= save_mask
;
1957 ptr
->r
.record
.p
.gr
= reg
;
1961 static unw_rec_list
*
1962 output_spill_base (offset
)
1963 unsigned int offset
;
1965 unw_rec_list
*ptr
= alloc_record (spill_base
);
1966 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1970 static unw_rec_list
*
1973 unw_rec_list
*ptr
= alloc_record (unat_when
);
1977 static unw_rec_list
*
1981 unw_rec_list
*ptr
= alloc_record (unat_gr
);
1982 ptr
->r
.record
.p
.gr
= gr
;
1986 static unw_rec_list
*
1987 output_unat_psprel (offset
)
1988 unsigned int offset
;
1990 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
1991 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1995 static unw_rec_list
*
1996 output_unat_sprel (offset
)
1997 unsigned int offset
;
1999 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2000 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2004 static unw_rec_list
*
2007 unw_rec_list
*ptr
= alloc_record (lc_when
);
2011 static unw_rec_list
*
2015 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2016 ptr
->r
.record
.p
.gr
= gr
;
2020 static unw_rec_list
*
2021 output_lc_psprel (offset
)
2022 unsigned int offset
;
2024 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2025 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2029 static unw_rec_list
*
2030 output_lc_sprel (offset
)
2031 unsigned int offset
;
2033 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2034 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2038 static unw_rec_list
*
2041 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2045 static unw_rec_list
*
2049 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2050 ptr
->r
.record
.p
.gr
= gr
;
2054 static unw_rec_list
*
2055 output_fpsr_psprel (offset
)
2056 unsigned int offset
;
2058 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2059 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2063 static unw_rec_list
*
2064 output_fpsr_sprel (offset
)
2065 unsigned int offset
;
2067 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2068 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2072 static unw_rec_list
*
2073 output_priunat_when_gr ()
2075 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2079 static unw_rec_list
*
2080 output_priunat_when_mem ()
2082 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2086 static unw_rec_list
*
2087 output_priunat_gr (gr
)
2090 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2091 ptr
->r
.record
.p
.gr
= gr
;
2095 static unw_rec_list
*
2096 output_priunat_psprel (offset
)
2097 unsigned int offset
;
2099 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2100 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2104 static unw_rec_list
*
2105 output_priunat_sprel (offset
)
2106 unsigned int offset
;
2108 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2109 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2113 static unw_rec_list
*
2116 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2120 static unw_rec_list
*
2124 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2125 ptr
->r
.record
.p
.gr
= gr
;
2129 static unw_rec_list
*
2130 output_bsp_psprel (offset
)
2131 unsigned int offset
;
2133 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2134 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2138 static unw_rec_list
*
2139 output_bsp_sprel (offset
)
2140 unsigned int offset
;
2142 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2143 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2147 static unw_rec_list
*
2148 output_bspstore_when ()
2150 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2154 static unw_rec_list
*
2155 output_bspstore_gr (gr
)
2158 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2159 ptr
->r
.record
.p
.gr
= gr
;
2163 static unw_rec_list
*
2164 output_bspstore_psprel (offset
)
2165 unsigned int offset
;
2167 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2168 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2172 static unw_rec_list
*
2173 output_bspstore_sprel (offset
)
2174 unsigned int offset
;
2176 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2177 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2181 static unw_rec_list
*
2184 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2188 static unw_rec_list
*
2192 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2193 ptr
->r
.record
.p
.gr
= gr
;
2197 static unw_rec_list
*
2198 output_rnat_psprel (offset
)
2199 unsigned int offset
;
2201 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2202 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2206 static unw_rec_list
*
2207 output_rnat_sprel (offset
)
2208 unsigned int offset
;
2210 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2211 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2215 static unw_rec_list
*
2216 output_unwabi (abi
, context
)
2218 unsigned long context
;
2220 unw_rec_list
*ptr
= alloc_record (unwabi
);
2221 ptr
->r
.record
.p
.abi
= abi
;
2222 ptr
->r
.record
.p
.context
= context
;
2226 static unw_rec_list
*
2227 output_epilogue (unsigned long ecount
)
2229 unw_rec_list
*ptr
= alloc_record (epilogue
);
2230 ptr
->r
.record
.b
.ecount
= ecount
;
2234 static unw_rec_list
*
2235 output_label_state (unsigned long label
)
2237 unw_rec_list
*ptr
= alloc_record (label_state
);
2238 ptr
->r
.record
.b
.label
= label
;
2242 static unw_rec_list
*
2243 output_copy_state (unsigned long label
)
2245 unw_rec_list
*ptr
= alloc_record (copy_state
);
2246 ptr
->r
.record
.b
.label
= label
;
2250 static unw_rec_list
*
2251 output_spill_psprel (ab
, reg
, offset
)
2254 unsigned int offset
;
2256 unw_rec_list
*ptr
= alloc_record (spill_psprel
);
2257 ptr
->r
.record
.x
.ab
= ab
;
2258 ptr
->r
.record
.x
.reg
= reg
;
2259 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2263 static unw_rec_list
*
2264 output_spill_sprel (ab
, reg
, offset
)
2267 unsigned int offset
;
2269 unw_rec_list
*ptr
= alloc_record (spill_sprel
);
2270 ptr
->r
.record
.x
.ab
= ab
;
2271 ptr
->r
.record
.x
.reg
= reg
;
2272 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2276 static unw_rec_list
*
2277 output_spill_psprel_p (ab
, reg
, offset
, predicate
)
2280 unsigned int offset
;
2281 unsigned int predicate
;
2283 unw_rec_list
*ptr
= alloc_record (spill_psprel_p
);
2284 ptr
->r
.record
.x
.ab
= ab
;
2285 ptr
->r
.record
.x
.reg
= reg
;
2286 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2287 ptr
->r
.record
.x
.qp
= predicate
;
2291 static unw_rec_list
*
2292 output_spill_sprel_p (ab
, reg
, offset
, predicate
)
2295 unsigned int offset
;
2296 unsigned int predicate
;
2298 unw_rec_list
*ptr
= alloc_record (spill_sprel_p
);
2299 ptr
->r
.record
.x
.ab
= ab
;
2300 ptr
->r
.record
.x
.reg
= reg
;
2301 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2302 ptr
->r
.record
.x
.qp
= predicate
;
2306 static unw_rec_list
*
2307 output_spill_reg (ab
, reg
, targ_reg
, xy
)
2310 unsigned int targ_reg
;
2313 unw_rec_list
*ptr
= alloc_record (spill_reg
);
2314 ptr
->r
.record
.x
.ab
= ab
;
2315 ptr
->r
.record
.x
.reg
= reg
;
2316 ptr
->r
.record
.x
.treg
= targ_reg
;
2317 ptr
->r
.record
.x
.xy
= xy
;
2321 static unw_rec_list
*
2322 output_spill_reg_p (ab
, reg
, targ_reg
, xy
, predicate
)
2325 unsigned int targ_reg
;
2327 unsigned int predicate
;
2329 unw_rec_list
*ptr
= alloc_record (spill_reg_p
);
2330 ptr
->r
.record
.x
.ab
= ab
;
2331 ptr
->r
.record
.x
.reg
= reg
;
2332 ptr
->r
.record
.x
.treg
= targ_reg
;
2333 ptr
->r
.record
.x
.xy
= xy
;
2334 ptr
->r
.record
.x
.qp
= predicate
;
2338 /* Given a unw_rec_list process the correct format with the
2339 specified function. */
2342 process_one_record (ptr
, f
)
2346 unsigned long fr_mask
, gr_mask
;
2348 switch (ptr
->r
.type
)
2350 /* This is a dummy record that takes up no space in the output. */
2358 /* These are taken care of by prologue/prologue_gr. */
2363 if (ptr
->r
.type
== prologue_gr
)
2364 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2365 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2367 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2369 /* Output descriptor(s) for union of register spills (if any). */
2370 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2371 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2374 if ((fr_mask
& ~0xfUL
) == 0)
2375 output_P6_format (f
, fr_mem
, fr_mask
);
2378 output_P5_format (f
, gr_mask
, fr_mask
);
2383 output_P6_format (f
, gr_mem
, gr_mask
);
2384 if (ptr
->r
.record
.r
.mask
.br_mem
)
2385 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2387 /* output imask descriptor if necessary: */
2388 if (ptr
->r
.record
.r
.mask
.i
)
2389 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2390 ptr
->r
.record
.r
.imask_size
);
2394 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2398 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2399 ptr
->r
.record
.p
.size
);
2412 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2415 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2418 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2426 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2435 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2445 case bspstore_sprel
:
2447 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2450 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2453 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2456 as_bad ("spill_mask record unimplemented.");
2458 case priunat_when_gr
:
2459 case priunat_when_mem
:
2463 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2465 case priunat_psprel
:
2467 case bspstore_psprel
:
2469 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2472 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2475 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2479 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2482 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2483 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2484 ptr
->r
.record
.x
.pspoff
);
2487 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2488 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2489 ptr
->r
.record
.x
.spoff
);
2492 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2493 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2494 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2496 case spill_psprel_p
:
2497 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2498 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2499 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2502 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2503 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2504 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2507 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2508 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2509 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2513 as_bad ("record_type_not_valid");
2518 /* Given a unw_rec_list list, process all the records with
2519 the specified function. */
2521 process_unw_records (list
, f
)
2526 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2527 process_one_record (ptr
, f
);
2530 /* Determine the size of a record list in bytes. */
2532 calc_record_size (list
)
2536 process_unw_records (list
, count_output
);
2540 /* Update IMASK bitmask to reflect the fact that one or more registers
2541 of type TYPE are saved starting at instruction with index T. If N
2542 bits are set in REGMASK, it is assumed that instructions T through
2543 T+N-1 save these registers.
2547 1: instruction saves next fp reg
2548 2: instruction saves next general reg
2549 3: instruction saves next branch reg */
2551 set_imask (region
, regmask
, t
, type
)
2552 unw_rec_list
*region
;
2553 unsigned long regmask
;
2557 unsigned char *imask
;
2558 unsigned long imask_size
;
2562 imask
= region
->r
.record
.r
.mask
.i
;
2563 imask_size
= region
->r
.record
.r
.imask_size
;
2566 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2567 imask
= xmalloc (imask_size
);
2568 memset (imask
, 0, imask_size
);
2570 region
->r
.record
.r
.imask_size
= imask_size
;
2571 region
->r
.record
.r
.mask
.i
= imask
;
2575 pos
= 2 * (3 - t
% 4);
2578 if (i
>= imask_size
)
2580 as_bad ("Ignoring attempt to spill beyond end of region");
2584 imask
[i
] |= (type
& 0x3) << pos
;
2586 regmask
&= (regmask
- 1);
2596 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2597 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2598 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2602 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2603 unsigned long slot_addr
;
2605 unsigned long first_addr
;
2609 unsigned long index
= 0;
2611 /* First time we are called, the initial address and frag are invalid. */
2612 if (first_addr
== 0)
2615 /* If the two addresses are in different frags, then we need to add in
2616 the remaining size of this frag, and then the entire size of intermediate
2618 while (slot_frag
!= first_frag
)
2620 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2624 /* We can get the final addresses only during and after
2626 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2627 index
+= 3 * ((first_frag
->fr_next
->fr_address
2628 - first_frag
->fr_address
2629 - first_frag
->fr_fix
) >> 4);
2632 /* We don't know what the final addresses will be. We try our
2633 best to estimate. */
2634 switch (first_frag
->fr_type
)
2640 as_fatal ("only constant space allocation is supported");
2646 /* Take alignment into account. Assume the worst case
2647 before relaxation. */
2648 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2652 if (first_frag
->fr_symbol
)
2654 as_fatal ("only constant offsets are supported");
2658 index
+= 3 * (first_frag
->fr_offset
>> 4);
2662 /* Add in the full size of the frag converted to instruction slots. */
2663 index
+= 3 * (first_frag
->fr_fix
>> 4);
2664 /* Subtract away the initial part before first_addr. */
2665 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2666 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2668 /* Move to the beginning of the next frag. */
2669 first_frag
= first_frag
->fr_next
;
2670 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2673 /* Add in the used part of the last frag. */
2674 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2675 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2679 /* Optimize unwind record directives. */
2681 static unw_rec_list
*
2682 optimize_unw_records (list
)
2688 /* If the only unwind record is ".prologue" or ".prologue" followed
2689 by ".body", then we can optimize the unwind directives away. */
2690 if (list
->r
.type
== prologue
2691 && (list
->next
->r
.type
== endp
2692 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2698 /* Given a complete record list, process any records which have
2699 unresolved fields, (ie length counts for a prologue). After
2700 this has been run, all necessary information should be available
2701 within each record to generate an image. */
2704 fixup_unw_records (list
, before_relax
)
2708 unw_rec_list
*ptr
, *region
= 0;
2709 unsigned long first_addr
= 0, rlen
= 0, t
;
2710 fragS
*first_frag
= 0;
2712 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2714 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2715 as_bad (" Insn slot not set in unwind record.");
2716 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2717 first_addr
, first_frag
, before_relax
);
2718 switch (ptr
->r
.type
)
2726 unsigned long last_addr
= 0;
2727 fragS
*last_frag
= NULL
;
2729 first_addr
= ptr
->slot_number
;
2730 first_frag
= ptr
->slot_frag
;
2731 /* Find either the next body/prologue start, or the end of
2732 the function, and determine the size of the region. */
2733 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2734 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2735 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2737 last_addr
= last
->slot_number
;
2738 last_frag
= last
->slot_frag
;
2741 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2743 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2744 if (ptr
->r
.type
== body
)
2745 /* End of region. */
2753 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2755 /* This happens when a memory-stack-less procedure uses a
2756 ".restore sp" directive at the end of a region to pop
2758 ptr
->r
.record
.b
.t
= 0;
2769 case priunat_when_gr
:
2770 case priunat_when_mem
:
2774 ptr
->r
.record
.p
.t
= t
;
2782 case spill_psprel_p
:
2783 ptr
->r
.record
.x
.t
= t
;
2789 as_bad ("frgr_mem record before region record!");
2792 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2793 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2794 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2795 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2800 as_bad ("fr_mem record before region record!");
2803 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2804 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2809 as_bad ("gr_mem record before region record!");
2812 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2813 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2818 as_bad ("br_mem record before region record!");
2821 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2822 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2828 as_bad ("gr_gr record before region record!");
2831 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2836 as_bad ("br_gr record before region record!");
2839 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2848 /* Estimate the size of a frag before relaxing. We only have one type of frag
2849 to handle here, which is the unwind info frag. */
2852 ia64_estimate_size_before_relax (fragS
*frag
,
2853 asection
*segtype ATTRIBUTE_UNUSED
)
2858 /* ??? This code is identical to the first part of ia64_convert_frag. */
2859 list
= (unw_rec_list
*) frag
->fr_opcode
;
2860 fixup_unw_records (list
, 0);
2862 len
= calc_record_size (list
);
2863 /* pad to pointer-size boundary. */
2864 pad
= len
% md
.pointer_size
;
2866 len
+= md
.pointer_size
- pad
;
2867 /* Add 8 for the header. */
2869 /* Add a pointer for the personality offset. */
2870 if (frag
->fr_offset
)
2871 size
+= md
.pointer_size
;
2873 /* fr_var carries the max_chars that we created the fragment with.
2874 We must, of course, have allocated enough memory earlier. */
2875 assert (frag
->fr_var
>= size
);
2877 return frag
->fr_fix
+ size
;
2880 /* This function converts a rs_machine_dependent variant frag into a
2881 normal fill frag with the unwind image from the the record list. */
2883 ia64_convert_frag (fragS
*frag
)
2889 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2890 list
= (unw_rec_list
*) frag
->fr_opcode
;
2891 fixup_unw_records (list
, 0);
2893 len
= calc_record_size (list
);
2894 /* pad to pointer-size boundary. */
2895 pad
= len
% md
.pointer_size
;
2897 len
+= md
.pointer_size
- pad
;
2898 /* Add 8 for the header. */
2900 /* Add a pointer for the personality offset. */
2901 if (frag
->fr_offset
)
2902 size
+= md
.pointer_size
;
2904 /* fr_var carries the max_chars that we created the fragment with.
2905 We must, of course, have allocated enough memory earlier. */
2906 assert (frag
->fr_var
>= size
);
2908 /* Initialize the header area. fr_offset is initialized with
2909 unwind.personality_routine. */
2910 if (frag
->fr_offset
)
2912 if (md
.flags
& EF_IA_64_ABI64
)
2913 flag_value
= (bfd_vma
) 3 << 32;
2915 /* 32-bit unwind info block. */
2916 flag_value
= (bfd_vma
) 0x1003 << 32;
2921 md_number_to_chars (frag
->fr_literal
,
2922 (((bfd_vma
) 1 << 48) /* Version. */
2923 | flag_value
/* U & E handler flags. */
2924 | (len
/ md
.pointer_size
)), /* Length. */
2927 /* Skip the header. */
2928 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
2929 process_unw_records (list
, output_vbyte_mem
);
2931 /* Fill the padding bytes with zeros. */
2933 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
2934 md
.pointer_size
- pad
);
2936 frag
->fr_fix
+= size
;
2937 frag
->fr_type
= rs_fill
;
2939 frag
->fr_offset
= 0;
2943 convert_expr_to_ab_reg (e
, ab
, regp
)
2950 if (e
->X_op
!= O_register
)
2953 reg
= e
->X_add_number
;
2954 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2957 *regp
= reg
- REG_GR
;
2959 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
2960 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
2963 *regp
= reg
- REG_FR
;
2965 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
2968 *regp
= reg
- REG_BR
;
2975 case REG_PR
: *regp
= 0; break;
2976 case REG_PSP
: *regp
= 1; break;
2977 case REG_PRIUNAT
: *regp
= 2; break;
2978 case REG_BR
+ 0: *regp
= 3; break;
2979 case REG_AR
+ AR_BSP
: *regp
= 4; break;
2980 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
2981 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
2982 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
2983 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
2984 case REG_AR
+ AR_PFS
: *regp
= 9; break;
2985 case REG_AR
+ AR_LC
: *regp
= 10; break;
2995 convert_expr_to_xy_reg (e
, xy
, regp
)
3002 if (e
->X_op
!= O_register
)
3005 reg
= e
->X_add_number
;
3007 if (/* reg >= REG_GR && */ reg
<= (REG_GR
+ 127))
3010 *regp
= reg
- REG_GR
;
3012 else if (reg
>= REG_FR
&& reg
<= (REG_FR
+ 127))
3015 *regp
= reg
- REG_FR
;
3017 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3020 *regp
= reg
- REG_BR
;
3030 /* The current frag is an alignment frag. */
3031 align_frag
= frag_now
;
3032 s_align_bytes (arg
);
3037 int dummy ATTRIBUTE_UNUSED
;
3042 radix
= *input_line_pointer
++;
3044 if (radix
!= 'C' && !is_end_of_line
[(unsigned char) radix
])
3046 as_bad ("Radix `%c' unsupported", *input_line_pointer
);
3047 ignore_rest_of_line ();
3052 /* Helper function for .loc directives. If the assembler is not generating
3053 line number info, then we need to remember which instructions have a .loc
3054 directive, and only call dwarf2_gen_line_info for those instructions. */
3059 CURR_SLOT
.loc_directive_seen
= 1;
3060 dwarf2_directive_loc (x
);
3063 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3065 dot_special_section (which
)
3068 set_section ((char *) special_section_name
[which
]);
3072 in_procedure (const char *directive
)
3074 if (unwind
.proc_start
3075 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3077 as_bad (".%s outside of procedure", directive
);
3078 ignore_rest_of_line ();
3083 in_prologue (const char *directive
)
3085 if (in_procedure (directive
))
3087 if (unwind
.prologue
)
3089 as_bad (".%s outside of prologue", directive
);
3090 ignore_rest_of_line ();
3096 in_body (const char *directive
)
3098 if (in_procedure (directive
))
3102 as_bad (".%s outside of body region", directive
);
3103 ignore_rest_of_line ();
3109 add_unwind_entry (ptr
)
3113 unwind
.tail
->next
= ptr
;
3118 /* The current entry can in fact be a chain of unwind entries. */
3119 if (unwind
.current_entry
== NULL
)
3120 unwind
.current_entry
= ptr
;
3125 int dummy ATTRIBUTE_UNUSED
;
3129 if (!in_prologue ("fframe"))
3134 if (e
.X_op
!= O_constant
)
3135 as_bad ("Operand to .fframe must be a constant");
3137 add_unwind_entry (output_mem_stack_f (e
.X_add_number
));
3142 int dummy ATTRIBUTE_UNUSED
;
3147 if (!in_prologue ("vframe"))
3151 reg
= e
.X_add_number
- REG_GR
;
3152 if (e
.X_op
== O_register
&& reg
< 128)
3154 add_unwind_entry (output_mem_stack_v ());
3155 if (! (unwind
.prologue_mask
& 2))
3156 add_unwind_entry (output_psp_gr (reg
));
3159 as_bad ("First operand to .vframe must be a general register");
3163 dot_vframesp (dummy
)
3164 int dummy ATTRIBUTE_UNUSED
;
3168 if (!in_prologue ("vframesp"))
3172 if (e
.X_op
== O_constant
)
3174 add_unwind_entry (output_mem_stack_v ());
3175 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3178 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3182 dot_vframepsp (dummy
)
3183 int dummy ATTRIBUTE_UNUSED
;
3187 if (!in_prologue ("vframepsp"))
3191 if (e
.X_op
== O_constant
)
3193 add_unwind_entry (output_mem_stack_v ());
3194 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3197 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3202 int dummy ATTRIBUTE_UNUSED
;
3208 if (!in_prologue ("save"))
3211 sep
= parse_operand (&e1
);
3213 as_bad ("No second operand to .save");
3214 sep
= parse_operand (&e2
);
3216 reg1
= e1
.X_add_number
;
3217 reg2
= e2
.X_add_number
- REG_GR
;
3219 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3220 if (e1
.X_op
== O_register
)
3222 if (e2
.X_op
== O_register
&& reg2
>= 0 && reg2
< 128)
3226 case REG_AR
+ AR_BSP
:
3227 add_unwind_entry (output_bsp_when ());
3228 add_unwind_entry (output_bsp_gr (reg2
));
3230 case REG_AR
+ AR_BSPSTORE
:
3231 add_unwind_entry (output_bspstore_when ());
3232 add_unwind_entry (output_bspstore_gr (reg2
));
3234 case REG_AR
+ AR_RNAT
:
3235 add_unwind_entry (output_rnat_when ());
3236 add_unwind_entry (output_rnat_gr (reg2
));
3238 case REG_AR
+ AR_UNAT
:
3239 add_unwind_entry (output_unat_when ());
3240 add_unwind_entry (output_unat_gr (reg2
));
3242 case REG_AR
+ AR_FPSR
:
3243 add_unwind_entry (output_fpsr_when ());
3244 add_unwind_entry (output_fpsr_gr (reg2
));
3246 case REG_AR
+ AR_PFS
:
3247 add_unwind_entry (output_pfs_when ());
3248 if (! (unwind
.prologue_mask
& 4))
3249 add_unwind_entry (output_pfs_gr (reg2
));
3251 case REG_AR
+ AR_LC
:
3252 add_unwind_entry (output_lc_when ());
3253 add_unwind_entry (output_lc_gr (reg2
));
3256 add_unwind_entry (output_rp_when ());
3257 if (! (unwind
.prologue_mask
& 8))
3258 add_unwind_entry (output_rp_gr (reg2
));
3261 add_unwind_entry (output_preds_when ());
3262 if (! (unwind
.prologue_mask
& 1))
3263 add_unwind_entry (output_preds_gr (reg2
));
3266 add_unwind_entry (output_priunat_when_gr ());
3267 add_unwind_entry (output_priunat_gr (reg2
));
3270 as_bad ("First operand not a valid register");
3274 as_bad (" Second operand not a valid register");
3277 as_bad ("First operand not a register");
3282 int dummy ATTRIBUTE_UNUSED
;
3285 unsigned long ecount
; /* # of _additional_ regions to pop */
3288 if (!in_body ("restore"))
3291 sep
= parse_operand (&e1
);
3292 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3294 as_bad ("First operand to .restore must be stack pointer (sp)");
3300 parse_operand (&e2
);
3301 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3303 as_bad ("Second operand to .restore must be a constant >= 0");
3306 ecount
= e2
.X_add_number
;
3309 ecount
= unwind
.prologue_count
- 1;
3311 if (ecount
>= unwind
.prologue_count
)
3313 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3314 ecount
+ 1, unwind
.prologue_count
);
3318 add_unwind_entry (output_epilogue (ecount
));
3320 if (ecount
< unwind
.prologue_count
)
3321 unwind
.prologue_count
-= ecount
+ 1;
3323 unwind
.prologue_count
= 0;
3327 dot_restorereg (dummy
)
3328 int dummy ATTRIBUTE_UNUSED
;
3330 unsigned int ab
, reg
;
3333 if (!in_procedure ("restorereg"))
3338 if (!convert_expr_to_ab_reg (&e
, &ab
, ®
))
3340 as_bad ("First operand to .restorereg must be a preserved register");
3343 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0));
3347 dot_restorereg_p (dummy
)
3348 int dummy ATTRIBUTE_UNUSED
;
3350 unsigned int qp
, ab
, reg
;
3354 if (!in_procedure ("restorereg.p"))
3357 sep
= parse_operand (&e1
);
3360 as_bad ("No second operand to .restorereg.p");
3364 parse_operand (&e2
);
3366 qp
= e1
.X_add_number
- REG_P
;
3367 if (e1
.X_op
!= O_register
|| qp
> 63)
3369 as_bad ("First operand to .restorereg.p must be a predicate");
3373 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3375 as_bad ("Second operand to .restorereg.p must be a preserved register");
3378 add_unwind_entry (output_spill_reg_p (ab
, reg
, 0, 0, qp
));
3381 static char *special_linkonce_name
[] =
3383 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3387 start_unwind_section (const segT text_seg
, int sec_index
, int linkonce_empty
)
3390 Use a slightly ugly scheme to derive the unwind section names from
3391 the text section name:
3393 text sect. unwind table sect.
3394 name: name: comments:
3395 ---------- ----------------- --------------------------------
3397 .text.foo .IA_64.unwind.text.foo
3398 .foo .IA_64.unwind.foo
3400 .gnu.linkonce.ia64unw.foo
3401 _info .IA_64.unwind_info gas issues error message (ditto)
3402 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3404 This mapping is done so that:
3406 (a) An object file with unwind info only in .text will use
3407 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3408 This follows the letter of the ABI and also ensures backwards
3409 compatibility with older toolchains.
3411 (b) An object file with unwind info in multiple text sections
3412 will use separate unwind sections for each text section.
3413 This allows us to properly set the "sh_info" and "sh_link"
3414 fields in SHT_IA_64_UNWIND as required by the ABI and also
3415 lets GNU ld support programs with multiple segments
3416 containing unwind info (as might be the case for certain
3417 embedded applications).
3419 (c) An error is issued if there would be a name clash.
3422 const char *text_name
, *sec_text_name
;
3424 const char *prefix
= special_section_name
[sec_index
];
3426 size_t prefix_len
, suffix_len
, sec_name_len
;
3428 sec_text_name
= segment_name (text_seg
);
3429 text_name
= sec_text_name
;
3430 if (strncmp (text_name
, "_info", 5) == 0)
3432 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3434 ignore_rest_of_line ();
3437 if (strcmp (text_name
, ".text") == 0)
3440 /* Build the unwind section name by appending the (possibly stripped)
3441 text section name to the unwind prefix. */
3443 if (strncmp (text_name
, ".gnu.linkonce.t.",
3444 sizeof (".gnu.linkonce.t.") - 1) == 0)
3446 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3447 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3449 else if (linkonce_empty
)
3452 prefix_len
= strlen (prefix
);
3453 suffix_len
= strlen (suffix
);
3454 sec_name_len
= prefix_len
+ suffix_len
;
3455 sec_name
= alloca (sec_name_len
+ 1);
3456 memcpy (sec_name
, prefix
, prefix_len
);
3457 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3458 sec_name
[sec_name_len
] = '\0';
3460 /* Handle COMDAT group. */
3461 if (suffix
== text_name
&& (text_seg
->flags
& SEC_LINK_ONCE
) != 0)
3464 size_t len
, group_name_len
;
3465 const char *group_name
= elf_group_name (text_seg
);
3467 if (group_name
== NULL
)
3469 as_bad ("Group section `%s' has no group signature",
3471 ignore_rest_of_line ();
3474 /* We have to construct a fake section directive. */
3475 group_name_len
= strlen (group_name
);
3477 + 16 /* ,"aG",@progbits, */
3478 + group_name_len
/* ,group_name */
3481 section
= alloca (len
+ 1);
3482 memcpy (section
, sec_name
, sec_name_len
);
3483 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3484 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3485 memcpy (section
+ len
- 7, ",comdat", 7);
3486 section
[len
] = '\0';
3487 set_section (section
);
3491 set_section (sec_name
);
3492 bfd_set_section_flags (stdoutput
, now_seg
,
3493 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3496 elf_linked_to_section (now_seg
) = text_seg
;
3500 generate_unwind_image (const segT text_seg
)
3505 /* Mark the end of the unwind info, so that we can compute the size of the
3506 last unwind region. */
3507 add_unwind_entry (output_endp ());
3509 /* Force out pending instructions, to make sure all unwind records have
3510 a valid slot_number field. */
3511 ia64_flush_insns ();
3513 /* Generate the unwind record. */
3514 list
= optimize_unw_records (unwind
.list
);
3515 fixup_unw_records (list
, 1);
3516 size
= calc_record_size (list
);
3518 if (size
> 0 || unwind
.force_unwind_entry
)
3520 unwind
.force_unwind_entry
= 0;
3521 /* pad to pointer-size boundary. */
3522 pad
= size
% md
.pointer_size
;
3524 size
+= md
.pointer_size
- pad
;
3525 /* Add 8 for the header. */
3527 /* Add a pointer for the personality offset. */
3528 if (unwind
.personality_routine
)
3529 size
+= md
.pointer_size
;
3532 /* If there are unwind records, switch sections, and output the info. */
3536 bfd_reloc_code_real_type reloc
;
3538 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
, 0);
3540 /* Make sure the section has 4 byte alignment for ILP32 and
3541 8 byte alignment for LP64. */
3542 frag_align (md
.pointer_size_shift
, 0, 0);
3543 record_alignment (now_seg
, md
.pointer_size_shift
);
3545 /* Set expression which points to start of unwind descriptor area. */
3546 unwind
.info
= expr_build_dot ();
3548 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3549 (offsetT
) (long) unwind
.personality_routine
,
3552 /* Add the personality address to the image. */
3553 if (unwind
.personality_routine
!= 0)
3555 exp
.X_op
= O_symbol
;
3556 exp
.X_add_symbol
= unwind
.personality_routine
;
3557 exp
.X_add_number
= 0;
3559 if (md
.flags
& EF_IA_64_BE
)
3561 if (md
.flags
& EF_IA_64_ABI64
)
3562 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3564 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3568 if (md
.flags
& EF_IA_64_ABI64
)
3569 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3571 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3574 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3575 md
.pointer_size
, &exp
, 0, reloc
);
3576 unwind
.personality_routine
= 0;
3580 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
, 1);
3582 free_saved_prologue_counts ();
3583 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3587 dot_handlerdata (dummy
)
3588 int dummy ATTRIBUTE_UNUSED
;
3590 if (!in_procedure ("handlerdata"))
3592 unwind
.force_unwind_entry
= 1;
3594 /* Remember which segment we're in so we can switch back after .endp */
3595 unwind
.saved_text_seg
= now_seg
;
3596 unwind
.saved_text_subseg
= now_subseg
;
3598 /* Generate unwind info into unwind-info section and then leave that
3599 section as the currently active one so dataXX directives go into
3600 the language specific data area of the unwind info block. */
3601 generate_unwind_image (now_seg
);
3602 demand_empty_rest_of_line ();
3606 dot_unwentry (dummy
)
3607 int dummy ATTRIBUTE_UNUSED
;
3609 if (!in_procedure ("unwentry"))
3611 unwind
.force_unwind_entry
= 1;
3612 demand_empty_rest_of_line ();
3617 int dummy ATTRIBUTE_UNUSED
;
3622 if (!in_prologue ("altrp"))
3626 reg
= e
.X_add_number
- REG_BR
;
3627 if (e
.X_op
== O_register
&& reg
< 8)
3628 add_unwind_entry (output_rp_br (reg
));
3630 as_bad ("First operand not a valid branch register");
3634 dot_savemem (psprel
)
3641 if (!in_prologue (psprel
? "savepsp" : "savesp"))
3644 sep
= parse_operand (&e1
);
3646 as_bad ("No second operand to .save%ssp", psprel
? "p" : "");
3647 sep
= parse_operand (&e2
);
3649 reg1
= e1
.X_add_number
;
3650 val
= e2
.X_add_number
;
3652 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3653 if (e1
.X_op
== O_register
)
3655 if (e2
.X_op
== O_constant
)
3659 case REG_AR
+ AR_BSP
:
3660 add_unwind_entry (output_bsp_when ());
3661 add_unwind_entry ((psprel
3663 : output_bsp_sprel
) (val
));
3665 case REG_AR
+ AR_BSPSTORE
:
3666 add_unwind_entry (output_bspstore_when ());
3667 add_unwind_entry ((psprel
3668 ? output_bspstore_psprel
3669 : output_bspstore_sprel
) (val
));
3671 case REG_AR
+ AR_RNAT
:
3672 add_unwind_entry (output_rnat_when ());
3673 add_unwind_entry ((psprel
3674 ? output_rnat_psprel
3675 : output_rnat_sprel
) (val
));
3677 case REG_AR
+ AR_UNAT
:
3678 add_unwind_entry (output_unat_when ());
3679 add_unwind_entry ((psprel
3680 ? output_unat_psprel
3681 : output_unat_sprel
) (val
));
3683 case REG_AR
+ AR_FPSR
:
3684 add_unwind_entry (output_fpsr_when ());
3685 add_unwind_entry ((psprel
3686 ? output_fpsr_psprel
3687 : output_fpsr_sprel
) (val
));
3689 case REG_AR
+ AR_PFS
:
3690 add_unwind_entry (output_pfs_when ());
3691 add_unwind_entry ((psprel
3693 : output_pfs_sprel
) (val
));
3695 case REG_AR
+ AR_LC
:
3696 add_unwind_entry (output_lc_when ());
3697 add_unwind_entry ((psprel
3699 : output_lc_sprel
) (val
));
3702 add_unwind_entry (output_rp_when ());
3703 add_unwind_entry ((psprel
3705 : output_rp_sprel
) (val
));
3708 add_unwind_entry (output_preds_when ());
3709 add_unwind_entry ((psprel
3710 ? output_preds_psprel
3711 : output_preds_sprel
) (val
));
3714 add_unwind_entry (output_priunat_when_mem ());
3715 add_unwind_entry ((psprel
3716 ? output_priunat_psprel
3717 : output_priunat_sprel
) (val
));
3720 as_bad ("First operand not a valid register");
3724 as_bad (" Second operand not a valid constant");
3727 as_bad ("First operand not a register");
3732 int dummy ATTRIBUTE_UNUSED
;
3737 if (!in_prologue ("save.g"))
3740 sep
= parse_operand (&e1
);
3742 parse_operand (&e2
);
3744 if (e1
.X_op
!= O_constant
)
3745 as_bad ("First operand to .save.g must be a constant.");
3748 int grmask
= e1
.X_add_number
;
3750 add_unwind_entry (output_gr_mem (grmask
));
3753 int reg
= e2
.X_add_number
- REG_GR
;
3754 if (e2
.X_op
== O_register
&& reg
>= 0 && reg
< 128)
3755 add_unwind_entry (output_gr_gr (grmask
, reg
));
3757 as_bad ("Second operand is an invalid register.");
3764 int dummy ATTRIBUTE_UNUSED
;
3769 if (!in_prologue ("save.f"))
3772 sep
= parse_operand (&e1
);
3774 if (e1
.X_op
!= O_constant
)
3775 as_bad ("Operand to .save.f must be a constant.");
3777 add_unwind_entry (output_fr_mem (e1
.X_add_number
));
3782 int dummy ATTRIBUTE_UNUSED
;
3789 if (!in_prologue ("save.b"))
3792 sep
= parse_operand (&e1
);
3793 if (e1
.X_op
!= O_constant
)
3795 as_bad ("First operand to .save.b must be a constant.");
3798 brmask
= e1
.X_add_number
;
3802 sep
= parse_operand (&e2
);
3803 reg
= e2
.X_add_number
- REG_GR
;
3804 if (e2
.X_op
!= O_register
|| reg
> 127)
3806 as_bad ("Second operand to .save.b must be a general register.");
3809 add_unwind_entry (output_br_gr (brmask
, e2
.X_add_number
));
3812 add_unwind_entry (output_br_mem (brmask
));
3814 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3815 demand_empty_rest_of_line ();
3820 int dummy ATTRIBUTE_UNUSED
;
3825 if (!in_prologue ("save.gf"))
3828 sep
= parse_operand (&e1
);
3830 parse_operand (&e2
);
3832 if (e1
.X_op
!= O_constant
|| sep
!= ',' || e2
.X_op
!= O_constant
)
3833 as_bad ("Both operands of .save.gf must be constants.");
3836 int grmask
= e1
.X_add_number
;
3837 int frmask
= e2
.X_add_number
;
3838 add_unwind_entry (output_frgr_mem (grmask
, frmask
));
3844 int dummy ATTRIBUTE_UNUSED
;
3849 if (!in_prologue ("spill"))
3852 sep
= parse_operand (&e
);
3853 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3854 demand_empty_rest_of_line ();
3856 if (e
.X_op
!= O_constant
)
3857 as_bad ("Operand to .spill must be a constant");
3859 add_unwind_entry (output_spill_base (e
.X_add_number
));
3863 dot_spillreg (dummy
)
3864 int dummy ATTRIBUTE_UNUSED
;
3866 int sep
, ab
, xy
, reg
, treg
;
3869 if (!in_procedure ("spillreg"))
3872 sep
= parse_operand (&e1
);
3875 as_bad ("No second operand to .spillreg");
3879 parse_operand (&e2
);
3881 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3883 as_bad ("First operand to .spillreg must be a preserved register");
3887 if (!convert_expr_to_xy_reg (&e2
, &xy
, &treg
))
3889 as_bad ("Second operand to .spillreg must be a register");
3893 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
));
3897 dot_spillmem (psprel
)
3903 if (!in_procedure ("spillmem"))
3906 sep
= parse_operand (&e1
);
3909 as_bad ("Second operand missing");
3913 parse_operand (&e2
);
3915 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3917 as_bad ("First operand to .spill%s must be a preserved register",
3918 psprel
? "psp" : "sp");
3922 if (e2
.X_op
!= O_constant
)
3924 as_bad ("Second operand to .spill%s must be a constant",
3925 psprel
? "psp" : "sp");
3930 add_unwind_entry (output_spill_psprel (ab
, reg
, e2
.X_add_number
));
3932 add_unwind_entry (output_spill_sprel (ab
, reg
, e2
.X_add_number
));
3936 dot_spillreg_p (dummy
)
3937 int dummy ATTRIBUTE_UNUSED
;
3939 int sep
, ab
, xy
, reg
, treg
;
3940 expressionS e1
, e2
, e3
;
3943 if (!in_procedure ("spillreg.p"))
3946 sep
= parse_operand (&e1
);
3949 as_bad ("No second and third operand to .spillreg.p");
3953 sep
= parse_operand (&e2
);
3956 as_bad ("No third operand to .spillreg.p");
3960 parse_operand (&e3
);
3962 qp
= e1
.X_add_number
- REG_P
;
3964 if (e1
.X_op
!= O_register
|| qp
> 63)
3966 as_bad ("First operand to .spillreg.p must be a predicate");
3970 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3972 as_bad ("Second operand to .spillreg.p must be a preserved register");
3976 if (!convert_expr_to_xy_reg (&e3
, &xy
, &treg
))
3978 as_bad ("Third operand to .spillreg.p must be a register");
3982 add_unwind_entry (output_spill_reg_p (ab
, reg
, treg
, xy
, qp
));
3986 dot_spillmem_p (psprel
)
3989 expressionS e1
, e2
, e3
;
3993 if (!in_procedure ("spillmem.p"))
3996 sep
= parse_operand (&e1
);
3999 as_bad ("Second operand missing");
4003 parse_operand (&e2
);
4006 as_bad ("Second operand missing");
4010 parse_operand (&e3
);
4012 qp
= e1
.X_add_number
- REG_P
;
4013 if (e1
.X_op
!= O_register
|| qp
> 63)
4015 as_bad ("First operand to .spill%s_p must be a predicate",
4016 psprel
? "psp" : "sp");
4020 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4022 as_bad ("Second operand to .spill%s_p must be a preserved register",
4023 psprel
? "psp" : "sp");
4027 if (e3
.X_op
!= O_constant
)
4029 as_bad ("Third operand to .spill%s_p must be a constant",
4030 psprel
? "psp" : "sp");
4035 add_unwind_entry (output_spill_psprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4037 add_unwind_entry (output_spill_sprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4041 get_saved_prologue_count (lbl
)
4044 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4046 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4050 return lpc
->prologue_count
;
4052 as_bad ("Missing .label_state %ld", lbl
);
4057 save_prologue_count (lbl
, count
)
4061 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4063 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4067 lpc
->prologue_count
= count
;
4070 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4072 new_lpc
->next
= unwind
.saved_prologue_counts
;
4073 new_lpc
->label_number
= lbl
;
4074 new_lpc
->prologue_count
= count
;
4075 unwind
.saved_prologue_counts
= new_lpc
;
4080 free_saved_prologue_counts ()
4082 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4083 label_prologue_count
*next
;
4092 unwind
.saved_prologue_counts
= NULL
;
4096 dot_label_state (dummy
)
4097 int dummy ATTRIBUTE_UNUSED
;
4101 if (!in_body ("label_state"))
4105 if (e
.X_op
!= O_constant
)
4107 as_bad ("Operand to .label_state must be a constant");
4110 add_unwind_entry (output_label_state (e
.X_add_number
));
4111 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4115 dot_copy_state (dummy
)
4116 int dummy ATTRIBUTE_UNUSED
;
4120 if (!in_body ("copy_state"))
4124 if (e
.X_op
!= O_constant
)
4126 as_bad ("Operand to .copy_state must be a constant");
4129 add_unwind_entry (output_copy_state (e
.X_add_number
));
4130 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4135 int dummy ATTRIBUTE_UNUSED
;
4140 if (!in_procedure ("unwabi"))
4143 sep
= parse_operand (&e1
);
4146 as_bad ("Second operand to .unwabi missing");
4149 sep
= parse_operand (&e2
);
4150 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4151 demand_empty_rest_of_line ();
4153 if (e1
.X_op
!= O_constant
)
4155 as_bad ("First operand to .unwabi must be a constant");
4159 if (e2
.X_op
!= O_constant
)
4161 as_bad ("Second operand to .unwabi must be a constant");
4165 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
));
4169 dot_personality (dummy
)
4170 int dummy ATTRIBUTE_UNUSED
;
4173 if (!in_procedure ("personality"))
4176 name
= input_line_pointer
;
4177 c
= get_symbol_end ();
4178 p
= input_line_pointer
;
4179 unwind
.personality_routine
= symbol_find_or_make (name
);
4180 unwind
.force_unwind_entry
= 1;
4183 demand_empty_rest_of_line ();
4188 int dummy ATTRIBUTE_UNUSED
;
4193 unwind
.proc_start
= 0;
4194 /* Parse names of main and alternate entry points and mark them as
4195 function symbols: */
4199 name
= input_line_pointer
;
4200 c
= get_symbol_end ();
4201 p
= input_line_pointer
;
4203 as_bad ("Empty argument of .proc");
4206 sym
= symbol_find_or_make (name
);
4207 if (S_IS_DEFINED (sym
))
4208 as_bad ("`%s' was already defined", name
);
4209 else if (unwind
.proc_start
== 0)
4211 unwind
.proc_start
= sym
;
4213 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4217 if (*input_line_pointer
!= ',')
4219 ++input_line_pointer
;
4221 if (unwind
.proc_start
== 0)
4222 unwind
.proc_start
= expr_build_dot ();
4223 demand_empty_rest_of_line ();
4226 unwind
.prologue
= 0;
4227 unwind
.prologue_count
= 0;
4230 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4231 unwind
.personality_routine
= 0;
4236 int dummy ATTRIBUTE_UNUSED
;
4238 if (!in_procedure ("body"))
4240 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4241 as_warn ("Initial .body should precede any instructions");
4243 unwind
.prologue
= 0;
4244 unwind
.prologue_mask
= 0;
4247 add_unwind_entry (output_body ());
4248 demand_empty_rest_of_line ();
4252 dot_prologue (dummy
)
4253 int dummy ATTRIBUTE_UNUSED
;
4256 int mask
= 0, grsave
= 0;
4258 if (!in_procedure ("prologue"))
4260 if (unwind
.prologue
)
4262 as_bad (".prologue within prologue");
4263 ignore_rest_of_line ();
4266 if (!unwind
.body
&& unwind
.insn
)
4267 as_warn ("Initial .prologue should precede any instructions");
4269 if (!is_it_end_of_statement ())
4272 sep
= parse_operand (&e1
);
4274 as_bad ("No second operand to .prologue");
4275 sep
= parse_operand (&e2
);
4276 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4277 demand_empty_rest_of_line ();
4279 if (e1
.X_op
== O_constant
)
4281 mask
= e1
.X_add_number
;
4283 if (e2
.X_op
== O_constant
)
4284 grsave
= e2
.X_add_number
;
4285 else if (e2
.X_op
== O_register
4286 && (grsave
= e2
.X_add_number
- REG_GR
) < 128)
4289 as_bad ("Second operand not a constant or general register");
4291 add_unwind_entry (output_prologue_gr (mask
, grsave
));
4294 as_bad ("First operand not a constant");
4297 add_unwind_entry (output_prologue ());
4299 unwind
.prologue
= 1;
4300 unwind
.prologue_mask
= mask
;
4302 ++unwind
.prologue_count
;
4307 int dummy ATTRIBUTE_UNUSED
;
4311 int bytes_per_address
;
4314 subsegT saved_subseg
;
4318 if (!in_procedure ("endp"))
4321 if (unwind
.saved_text_seg
)
4323 saved_seg
= unwind
.saved_text_seg
;
4324 saved_subseg
= unwind
.saved_text_subseg
;
4325 unwind
.saved_text_seg
= NULL
;
4329 saved_seg
= now_seg
;
4330 saved_subseg
= now_subseg
;
4333 insn_group_break (1, 0, 0);
4335 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4337 generate_unwind_image (saved_seg
);
4339 if (unwind
.info
|| unwind
.force_unwind_entry
)
4343 subseg_set (md
.last_text_seg
, 0);
4344 proc_end
= expr_build_dot ();
4346 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
, 0);
4348 /* Make sure that section has 4 byte alignment for ILP32 and
4349 8 byte alignment for LP64. */
4350 record_alignment (now_seg
, md
.pointer_size_shift
);
4352 /* Need space for 3 pointers for procedure start, procedure end,
4354 ptr
= frag_more (3 * md
.pointer_size
);
4355 where
= frag_now_fix () - (3 * md
.pointer_size
);
4356 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4358 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4359 e
.X_op
= O_pseudo_fixup
;
4360 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4362 e
.X_add_symbol
= unwind
.proc_start
;
4363 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4365 e
.X_op
= O_pseudo_fixup
;
4366 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4368 e
.X_add_symbol
= proc_end
;
4369 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4370 bytes_per_address
, &e
);
4374 e
.X_op
= O_pseudo_fixup
;
4375 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4377 e
.X_add_symbol
= unwind
.info
;
4378 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4379 bytes_per_address
, &e
);
4382 md_number_to_chars (ptr
+ (bytes_per_address
* 2), 0,
4387 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
, 1);
4389 subseg_set (saved_seg
, saved_subseg
);
4391 /* Parse names of main and alternate entry points and set symbol sizes. */
4395 name
= input_line_pointer
;
4396 c
= get_symbol_end ();
4397 p
= input_line_pointer
;
4399 as_bad ("Empty argument of .endp");
4402 sym
= symbol_find (name
);
4403 if (!sym
|| !S_IS_DEFINED (sym
))
4404 as_bad ("`%s' was not defined within procedure", name
);
4405 else if (unwind
.proc_start
4406 && (symbol_get_bfdsym (sym
)->flags
& BSF_FUNCTION
)
4407 && S_GET_SIZE (sym
) == 0 && symbol_get_obj (sym
)->size
== NULL
)
4409 fragS
*fr
= symbol_get_frag (unwind
.proc_start
);
4410 fragS
*frag
= symbol_get_frag (sym
);
4412 /* Check whether the function label is at or beyond last
4414 while (fr
&& fr
!= frag
)
4418 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4419 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4422 symbol_get_obj (sym
)->size
=
4423 (expressionS
*) xmalloc (sizeof (expressionS
));
4424 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4425 symbol_get_obj (sym
)->size
->X_add_symbol
4426 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4427 frag_now_fix (), frag_now
);
4428 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4429 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4436 if (*input_line_pointer
!= ',')
4438 ++input_line_pointer
;
4440 demand_empty_rest_of_line ();
4441 unwind
.proc_start
= unwind
.info
= 0;
4445 dot_template (template)
4448 CURR_SLOT
.user_template
= template;
4453 int dummy ATTRIBUTE_UNUSED
;
4455 int ins
, locs
, outs
, rots
;
4457 if (is_it_end_of_statement ())
4458 ins
= locs
= outs
= rots
= 0;
4461 ins
= get_absolute_expression ();
4462 if (*input_line_pointer
++ != ',')
4464 locs
= get_absolute_expression ();
4465 if (*input_line_pointer
++ != ',')
4467 outs
= get_absolute_expression ();
4468 if (*input_line_pointer
++ != ',')
4470 rots
= get_absolute_expression ();
4472 set_regstack (ins
, locs
, outs
, rots
);
4476 as_bad ("Comma expected");
4477 ignore_rest_of_line ();
4484 unsigned num_regs
, num_alloced
= 0;
4485 struct dynreg
**drpp
, *dr
;
4486 int ch
, base_reg
= 0;
4492 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4493 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4494 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4498 /* First, remove existing names from hash table. */
4499 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4501 hash_delete (md
.dynreg_hash
, dr
->name
);
4505 drpp
= &md
.dynreg
[type
];
4508 start
= input_line_pointer
;
4509 ch
= get_symbol_end ();
4510 *input_line_pointer
= ch
;
4511 len
= (input_line_pointer
- start
);
4514 if (*input_line_pointer
!= '[')
4516 as_bad ("Expected '['");
4519 ++input_line_pointer
; /* skip '[' */
4521 num_regs
= get_absolute_expression ();
4523 if (*input_line_pointer
++ != ']')
4525 as_bad ("Expected ']'");
4530 num_alloced
+= num_regs
;
4534 if (num_alloced
> md
.rot
.num_regs
)
4536 as_bad ("Used more than the declared %d rotating registers",
4542 if (num_alloced
> 96)
4544 as_bad ("Used more than the available 96 rotating registers");
4549 if (num_alloced
> 48)
4551 as_bad ("Used more than the available 48 rotating registers");
4560 name
= obstack_alloc (¬es
, len
+ 1);
4561 memcpy (name
, start
, len
);
4566 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4567 memset (*drpp
, 0, sizeof (*dr
));
4572 dr
->num_regs
= num_regs
;
4573 dr
->base
= base_reg
;
4575 base_reg
+= num_regs
;
4577 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4579 as_bad ("Attempt to redefine register set `%s'", name
);
4583 if (*input_line_pointer
!= ',')
4585 ++input_line_pointer
; /* skip comma */
4588 demand_empty_rest_of_line ();
4592 ignore_rest_of_line ();
4596 dot_byteorder (byteorder
)
4599 segment_info_type
*seginfo
= seg_info (now_seg
);
4601 if (byteorder
== -1)
4603 if (seginfo
->tc_segment_info_data
.endian
== 0)
4604 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4605 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4608 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4610 if (target_big_endian
!= byteorder
)
4612 target_big_endian
= byteorder
;
4613 if (target_big_endian
)
4615 ia64_number_to_chars
= number_to_chars_bigendian
;
4616 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4620 ia64_number_to_chars
= number_to_chars_littleendian
;
4621 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4628 int dummy ATTRIBUTE_UNUSED
;
4635 option
= input_line_pointer
;
4636 ch
= get_symbol_end ();
4637 if (strcmp (option
, "lsb") == 0)
4638 md
.flags
&= ~EF_IA_64_BE
;
4639 else if (strcmp (option
, "msb") == 0)
4640 md
.flags
|= EF_IA_64_BE
;
4641 else if (strcmp (option
, "abi32") == 0)
4642 md
.flags
&= ~EF_IA_64_ABI64
;
4643 else if (strcmp (option
, "abi64") == 0)
4644 md
.flags
|= EF_IA_64_ABI64
;
4646 as_bad ("Unknown psr option `%s'", option
);
4647 *input_line_pointer
= ch
;
4650 if (*input_line_pointer
!= ',')
4653 ++input_line_pointer
;
4656 demand_empty_rest_of_line ();
4661 int dummy ATTRIBUTE_UNUSED
;
4663 new_logical_line (0, get_absolute_expression ());
4664 demand_empty_rest_of_line ();
4668 parse_section_name ()
4674 if (*input_line_pointer
!= '"')
4676 as_bad ("Missing section name");
4677 ignore_rest_of_line ();
4680 name
= demand_copy_C_string (&len
);
4683 ignore_rest_of_line ();
4687 if (*input_line_pointer
!= ',')
4689 as_bad ("Comma expected after section name");
4690 ignore_rest_of_line ();
4693 ++input_line_pointer
; /* skip comma */
4701 char *name
= parse_section_name ();
4705 md
.keep_pending_output
= 1;
4708 obj_elf_previous (0);
4709 md
.keep_pending_output
= 0;
4712 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4715 stmt_float_cons (kind
)
4736 ia64_do_align (alignment
);
4744 int saved_auto_align
= md
.auto_align
;
4748 md
.auto_align
= saved_auto_align
;
4752 dot_xfloat_cons (kind
)
4755 char *name
= parse_section_name ();
4759 md
.keep_pending_output
= 1;
4761 stmt_float_cons (kind
);
4762 obj_elf_previous (0);
4763 md
.keep_pending_output
= 0;
4767 dot_xstringer (zero
)
4770 char *name
= parse_section_name ();
4774 md
.keep_pending_output
= 1;
4777 obj_elf_previous (0);
4778 md
.keep_pending_output
= 0;
4785 int saved_auto_align
= md
.auto_align
;
4786 char *name
= parse_section_name ();
4790 md
.keep_pending_output
= 1;
4794 md
.auto_align
= saved_auto_align
;
4795 obj_elf_previous (0);
4796 md
.keep_pending_output
= 0;
4800 dot_xfloat_cons_ua (kind
)
4803 int saved_auto_align
= md
.auto_align
;
4804 char *name
= parse_section_name ();
4808 md
.keep_pending_output
= 1;
4811 stmt_float_cons (kind
);
4812 md
.auto_align
= saved_auto_align
;
4813 obj_elf_previous (0);
4814 md
.keep_pending_output
= 0;
4817 /* .reg.val <regname>,value */
4821 int dummy ATTRIBUTE_UNUSED
;
4826 if (reg
.X_op
!= O_register
)
4828 as_bad (_("Register name expected"));
4829 ignore_rest_of_line ();
4831 else if (*input_line_pointer
++ != ',')
4833 as_bad (_("Comma expected"));
4834 ignore_rest_of_line ();
4838 valueT value
= get_absolute_expression ();
4839 int regno
= reg
.X_add_number
;
4840 if (regno
< REG_GR
|| regno
> REG_GR
+ 128)
4841 as_warn (_("Register value annotation ignored"));
4844 gr_values
[regno
- REG_GR
].known
= 1;
4845 gr_values
[regno
- REG_GR
].value
= value
;
4846 gr_values
[regno
- REG_GR
].path
= md
.path
;
4849 demand_empty_rest_of_line ();
4854 .serialize.instruction
4857 dot_serialize (type
)
4860 insn_group_break (0, 0, 0);
4862 instruction_serialization ();
4864 data_serialization ();
4865 insn_group_break (0, 0, 0);
4866 demand_empty_rest_of_line ();
4869 /* select dv checking mode
4874 A stop is inserted when changing modes
4881 if (md
.manual_bundling
)
4882 as_warn (_("Directive invalid within a bundle"));
4884 if (type
== 'E' || type
== 'A')
4885 md
.mode_explicitly_set
= 0;
4887 md
.mode_explicitly_set
= 1;
4894 if (md
.explicit_mode
)
4895 insn_group_break (1, 0, 0);
4896 md
.explicit_mode
= 0;
4900 if (!md
.explicit_mode
)
4901 insn_group_break (1, 0, 0);
4902 md
.explicit_mode
= 1;
4906 if (md
.explicit_mode
!= md
.default_explicit_mode
)
4907 insn_group_break (1, 0, 0);
4908 md
.explicit_mode
= md
.default_explicit_mode
;
4909 md
.mode_explicitly_set
= 0;
4920 for (regno
= 0; regno
< 64; regno
++)
4922 if (mask
& ((valueT
) 1 << regno
))
4924 fprintf (stderr
, "%s p%d", comma
, regno
);
4931 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4932 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4933 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4934 .pred.safe_across_calls p1 [, p2 [,...]]
4943 int p1
= -1, p2
= -1;
4947 if (*input_line_pointer
!= '"')
4949 as_bad (_("Missing predicate relation type"));
4950 ignore_rest_of_line ();
4956 char *form
= demand_copy_C_string (&len
);
4957 if (strcmp (form
, "mutex") == 0)
4959 else if (strcmp (form
, "clear") == 0)
4961 else if (strcmp (form
, "imply") == 0)
4965 as_bad (_("Unrecognized predicate relation type"));
4966 ignore_rest_of_line ();
4970 if (*input_line_pointer
== ',')
4971 ++input_line_pointer
;
4981 if (TOUPPER (*input_line_pointer
) != 'P'
4982 || (regno
= atoi (++input_line_pointer
)) < 0
4985 as_bad (_("Predicate register expected"));
4986 ignore_rest_of_line ();
4989 while (ISDIGIT (*input_line_pointer
))
4990 ++input_line_pointer
;
4997 as_warn (_("Duplicate predicate register ignored"));
5000 /* See if it's a range. */
5001 if (*input_line_pointer
== '-')
5004 ++input_line_pointer
;
5006 if (TOUPPER (*input_line_pointer
) != 'P'
5007 || (regno
= atoi (++input_line_pointer
)) < 0
5010 as_bad (_("Predicate register expected"));
5011 ignore_rest_of_line ();
5014 while (ISDIGIT (*input_line_pointer
))
5015 ++input_line_pointer
;
5019 as_bad (_("Bad register range"));
5020 ignore_rest_of_line ();
5031 if (*input_line_pointer
!= ',')
5033 ++input_line_pointer
;
5042 clear_qp_mutex (mask
);
5043 clear_qp_implies (mask
, (valueT
) 0);
5046 if (count
!= 2 || p1
== -1 || p2
== -1)
5047 as_bad (_("Predicate source and target required"));
5048 else if (p1
== 0 || p2
== 0)
5049 as_bad (_("Use of p0 is not valid in this context"));
5051 add_qp_imply (p1
, p2
);
5056 as_bad (_("At least two PR arguments expected"));
5061 as_bad (_("Use of p0 is not valid in this context"));
5064 add_qp_mutex (mask
);
5067 /* note that we don't override any existing relations */
5070 as_bad (_("At least one PR argument expected"));
5075 fprintf (stderr
, "Safe across calls: ");
5076 print_prmask (mask
);
5077 fprintf (stderr
, "\n");
5079 qp_safe_across_calls
= mask
;
5082 demand_empty_rest_of_line ();
5085 /* .entry label [, label [, ...]]
5086 Hint to DV code that the given labels are to be considered entry points.
5087 Otherwise, only global labels are considered entry points. */
5091 int dummy ATTRIBUTE_UNUSED
;
5100 name
= input_line_pointer
;
5101 c
= get_symbol_end ();
5102 symbolP
= symbol_find_or_make (name
);
5104 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
5106 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5109 *input_line_pointer
= c
;
5111 c
= *input_line_pointer
;
5114 input_line_pointer
++;
5116 if (*input_line_pointer
== '\n')
5122 demand_empty_rest_of_line ();
5125 /* .mem.offset offset, base
5126 "base" is used to distinguish between offsets from a different base. */
5129 dot_mem_offset (dummy
)
5130 int dummy ATTRIBUTE_UNUSED
;
5132 md
.mem_offset
.hint
= 1;
5133 md
.mem_offset
.offset
= get_absolute_expression ();
5134 if (*input_line_pointer
!= ',')
5136 as_bad (_("Comma expected"));
5137 ignore_rest_of_line ();
5140 ++input_line_pointer
;
5141 md
.mem_offset
.base
= get_absolute_expression ();
5142 demand_empty_rest_of_line ();
5145 /* ia64-specific pseudo-ops: */
5146 const pseudo_typeS md_pseudo_table
[] =
5148 { "radix", dot_radix
, 0 },
5149 { "lcomm", s_lcomm_bytes
, 1 },
5150 { "loc", dot_loc
, 0 },
5151 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5152 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5153 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5154 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5155 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5156 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5157 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5158 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5159 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5160 { "proc", dot_proc
, 0 },
5161 { "body", dot_body
, 0 },
5162 { "prologue", dot_prologue
, 0 },
5163 { "endp", dot_endp
, 0 },
5165 { "fframe", dot_fframe
, 0 },
5166 { "vframe", dot_vframe
, 0 },
5167 { "vframesp", dot_vframesp
, 0 },
5168 { "vframepsp", dot_vframepsp
, 0 },
5169 { "save", dot_save
, 0 },
5170 { "restore", dot_restore
, 0 },
5171 { "restorereg", dot_restorereg
, 0 },
5172 { "restorereg.p", dot_restorereg_p
, 0 },
5173 { "handlerdata", dot_handlerdata
, 0 },
5174 { "unwentry", dot_unwentry
, 0 },
5175 { "altrp", dot_altrp
, 0 },
5176 { "savesp", dot_savemem
, 0 },
5177 { "savepsp", dot_savemem
, 1 },
5178 { "save.g", dot_saveg
, 0 },
5179 { "save.f", dot_savef
, 0 },
5180 { "save.b", dot_saveb
, 0 },
5181 { "save.gf", dot_savegf
, 0 },
5182 { "spill", dot_spill
, 0 },
5183 { "spillreg", dot_spillreg
, 0 },
5184 { "spillsp", dot_spillmem
, 0 },
5185 { "spillpsp", dot_spillmem
, 1 },
5186 { "spillreg.p", dot_spillreg_p
, 0 },
5187 { "spillsp.p", dot_spillmem_p
, 0 },
5188 { "spillpsp.p", dot_spillmem_p
, 1 },
5189 { "label_state", dot_label_state
, 0 },
5190 { "copy_state", dot_copy_state
, 0 },
5191 { "unwabi", dot_unwabi
, 0 },
5192 { "personality", dot_personality
, 0 },
5194 { "estate", dot_estate
, 0 },
5196 { "mii", dot_template
, 0x0 },
5197 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5198 { "mlx", dot_template
, 0x2 },
5199 { "mmi", dot_template
, 0x4 },
5200 { "mfi", dot_template
, 0x6 },
5201 { "mmf", dot_template
, 0x7 },
5202 { "mib", dot_template
, 0x8 },
5203 { "mbb", dot_template
, 0x9 },
5204 { "bbb", dot_template
, 0xb },
5205 { "mmb", dot_template
, 0xc },
5206 { "mfb", dot_template
, 0xe },
5208 { "lb", dot_scope
, 0 },
5209 { "le", dot_scope
, 1 },
5211 { "align", dot_align
, 0 },
5212 { "regstk", dot_regstk
, 0 },
5213 { "rotr", dot_rot
, DYNREG_GR
},
5214 { "rotf", dot_rot
, DYNREG_FR
},
5215 { "rotp", dot_rot
, DYNREG_PR
},
5216 { "lsb", dot_byteorder
, 0 },
5217 { "msb", dot_byteorder
, 1 },
5218 { "psr", dot_psr
, 0 },
5219 { "alias", dot_alias
, 0 },
5220 { "secalias", dot_alias
, 1 },
5221 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5223 { "xdata1", dot_xdata
, 1 },
5224 { "xdata2", dot_xdata
, 2 },
5225 { "xdata4", dot_xdata
, 4 },
5226 { "xdata8", dot_xdata
, 8 },
5227 { "xreal4", dot_xfloat_cons
, 'f' },
5228 { "xreal8", dot_xfloat_cons
, 'd' },
5229 { "xreal10", dot_xfloat_cons
, 'x' },
5230 { "xreal16", dot_xfloat_cons
, 'X' },
5231 { "xstring", dot_xstringer
, 0 },
5232 { "xstringz", dot_xstringer
, 1 },
5234 /* unaligned versions: */
5235 { "xdata2.ua", dot_xdata_ua
, 2 },
5236 { "xdata4.ua", dot_xdata_ua
, 4 },
5237 { "xdata8.ua", dot_xdata_ua
, 8 },
5238 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5239 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5240 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5241 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5243 /* annotations/DV checking support */
5244 { "entry", dot_entry
, 0 },
5245 { "mem.offset", dot_mem_offset
, 0 },
5246 { "pred.rel", dot_pred_rel
, 0 },
5247 { "pred.rel.clear", dot_pred_rel
, 'c' },
5248 { "pred.rel.imply", dot_pred_rel
, 'i' },
5249 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5250 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5251 { "reg.val", dot_reg_val
, 0 },
5252 { "serialize.data", dot_serialize
, 0 },
5253 { "serialize.instruction", dot_serialize
, 1 },
5254 { "auto", dot_dv_mode
, 'a' },
5255 { "explicit", dot_dv_mode
, 'e' },
5256 { "default", dot_dv_mode
, 'd' },
5258 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5259 IA-64 aligns data allocation pseudo-ops by default, so we have to
5260 tell it that these ones are supposed to be unaligned. Long term,
5261 should rewrite so that only IA-64 specific data allocation pseudo-ops
5262 are aligned by default. */
5263 {"2byte", stmt_cons_ua
, 2},
5264 {"4byte", stmt_cons_ua
, 4},
5265 {"8byte", stmt_cons_ua
, 8},
5270 static const struct pseudo_opcode
5273 void (*handler
) (int);
5278 /* these are more like pseudo-ops, but don't start with a dot */
5279 { "data1", cons
, 1 },
5280 { "data2", cons
, 2 },
5281 { "data4", cons
, 4 },
5282 { "data8", cons
, 8 },
5283 { "data16", cons
, 16 },
5284 { "real4", stmt_float_cons
, 'f' },
5285 { "real8", stmt_float_cons
, 'd' },
5286 { "real10", stmt_float_cons
, 'x' },
5287 { "real16", stmt_float_cons
, 'X' },
5288 { "string", stringer
, 0 },
5289 { "stringz", stringer
, 1 },
5291 /* unaligned versions: */
5292 { "data2.ua", stmt_cons_ua
, 2 },
5293 { "data4.ua", stmt_cons_ua
, 4 },
5294 { "data8.ua", stmt_cons_ua
, 8 },
5295 { "data16.ua", stmt_cons_ua
, 16 },
5296 { "real4.ua", float_cons
, 'f' },
5297 { "real8.ua", float_cons
, 'd' },
5298 { "real10.ua", float_cons
, 'x' },
5299 { "real16.ua", float_cons
, 'X' },
5302 /* Declare a register by creating a symbol for it and entering it in
5303 the symbol table. */
5306 declare_register (name
, regnum
)
5313 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
5315 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5317 as_fatal ("Inserting \"%s\" into register table failed: %s",
5324 declare_register_set (prefix
, num_regs
, base_regnum
)
5332 for (i
= 0; i
< num_regs
; ++i
)
5334 sprintf (name
, "%s%u", prefix
, i
);
5335 declare_register (name
, base_regnum
+ i
);
5340 operand_width (opnd
)
5341 enum ia64_opnd opnd
;
5343 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5344 unsigned int bits
= 0;
5348 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5349 bits
+= odesc
->field
[i
].bits
;
5354 static enum operand_match_result
5355 operand_match (idesc
, index
, e
)
5356 const struct ia64_opcode
*idesc
;
5360 enum ia64_opnd opnd
= idesc
->operands
[index
];
5361 int bits
, relocatable
= 0;
5362 struct insn_fix
*fix
;
5369 case IA64_OPND_AR_CCV
:
5370 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5371 return OPERAND_MATCH
;
5374 case IA64_OPND_AR_CSD
:
5375 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5376 return OPERAND_MATCH
;
5379 case IA64_OPND_AR_PFS
:
5380 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5381 return OPERAND_MATCH
;
5385 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5386 return OPERAND_MATCH
;
5390 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5391 return OPERAND_MATCH
;
5395 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5396 return OPERAND_MATCH
;
5399 case IA64_OPND_PR_ROT
:
5400 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5401 return OPERAND_MATCH
;
5405 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5406 return OPERAND_MATCH
;
5409 case IA64_OPND_PSR_L
:
5410 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5411 return OPERAND_MATCH
;
5414 case IA64_OPND_PSR_UM
:
5415 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5416 return OPERAND_MATCH
;
5420 if (e
->X_op
== O_constant
)
5422 if (e
->X_add_number
== 1)
5423 return OPERAND_MATCH
;
5425 return OPERAND_OUT_OF_RANGE
;
5430 if (e
->X_op
== O_constant
)
5432 if (e
->X_add_number
== 8)
5433 return OPERAND_MATCH
;
5435 return OPERAND_OUT_OF_RANGE
;
5440 if (e
->X_op
== O_constant
)
5442 if (e
->X_add_number
== 16)
5443 return OPERAND_MATCH
;
5445 return OPERAND_OUT_OF_RANGE
;
5449 /* register operands: */
5452 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5453 && e
->X_add_number
< REG_AR
+ 128)
5454 return OPERAND_MATCH
;
5459 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5460 && e
->X_add_number
< REG_BR
+ 8)
5461 return OPERAND_MATCH
;
5465 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5466 && e
->X_add_number
< REG_CR
+ 128)
5467 return OPERAND_MATCH
;
5474 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5475 && e
->X_add_number
< REG_FR
+ 128)
5476 return OPERAND_MATCH
;
5481 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5482 && e
->X_add_number
< REG_P
+ 64)
5483 return OPERAND_MATCH
;
5489 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5490 && e
->X_add_number
< REG_GR
+ 128)
5491 return OPERAND_MATCH
;
5494 case IA64_OPND_R3_2
:
5495 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5497 if (e
->X_add_number
< REG_GR
+ 4)
5498 return OPERAND_MATCH
;
5499 else if (e
->X_add_number
< REG_GR
+ 128)
5500 return OPERAND_OUT_OF_RANGE
;
5504 /* indirect operands: */
5505 case IA64_OPND_CPUID_R3
:
5506 case IA64_OPND_DBR_R3
:
5507 case IA64_OPND_DTR_R3
:
5508 case IA64_OPND_ITR_R3
:
5509 case IA64_OPND_IBR_R3
:
5510 case IA64_OPND_MSR_R3
:
5511 case IA64_OPND_PKR_R3
:
5512 case IA64_OPND_PMC_R3
:
5513 case IA64_OPND_PMD_R3
:
5514 case IA64_OPND_RR_R3
:
5515 if (e
->X_op
== O_index
&& e
->X_op_symbol
5516 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5517 == opnd
- IA64_OPND_CPUID_R3
))
5518 return OPERAND_MATCH
;
5522 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5523 return OPERAND_MATCH
;
5526 /* immediate operands: */
5527 case IA64_OPND_CNT2a
:
5528 case IA64_OPND_LEN4
:
5529 case IA64_OPND_LEN6
:
5530 bits
= operand_width (idesc
->operands
[index
]);
5531 if (e
->X_op
== O_constant
)
5533 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5534 return OPERAND_MATCH
;
5536 return OPERAND_OUT_OF_RANGE
;
5540 case IA64_OPND_CNT2b
:
5541 if (e
->X_op
== O_constant
)
5543 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5544 return OPERAND_MATCH
;
5546 return OPERAND_OUT_OF_RANGE
;
5550 case IA64_OPND_CNT2c
:
5551 val
= e
->X_add_number
;
5552 if (e
->X_op
== O_constant
)
5554 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5555 return OPERAND_MATCH
;
5557 return OPERAND_OUT_OF_RANGE
;
5562 /* SOR must be an integer multiple of 8 */
5563 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5564 return OPERAND_OUT_OF_RANGE
;
5567 if (e
->X_op
== O_constant
)
5569 if ((bfd_vma
) e
->X_add_number
<= 96)
5570 return OPERAND_MATCH
;
5572 return OPERAND_OUT_OF_RANGE
;
5576 case IA64_OPND_IMMU62
:
5577 if (e
->X_op
== O_constant
)
5579 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5580 return OPERAND_MATCH
;
5582 return OPERAND_OUT_OF_RANGE
;
5586 /* FIXME -- need 62-bit relocation type */
5587 as_bad (_("62-bit relocation not yet implemented"));
5591 case IA64_OPND_IMMU64
:
5592 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5593 || e
->X_op
== O_subtract
)
5595 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5596 fix
->code
= BFD_RELOC_IA64_IMM64
;
5597 if (e
->X_op
!= O_subtract
)
5599 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5600 if (e
->X_op
== O_pseudo_fixup
)
5604 fix
->opnd
= idesc
->operands
[index
];
5607 ++CURR_SLOT
.num_fixups
;
5608 return OPERAND_MATCH
;
5610 else if (e
->X_op
== O_constant
)
5611 return OPERAND_MATCH
;
5614 case IA64_OPND_CCNT5
:
5615 case IA64_OPND_CNT5
:
5616 case IA64_OPND_CNT6
:
5617 case IA64_OPND_CPOS6a
:
5618 case IA64_OPND_CPOS6b
:
5619 case IA64_OPND_CPOS6c
:
5620 case IA64_OPND_IMMU2
:
5621 case IA64_OPND_IMMU7a
:
5622 case IA64_OPND_IMMU7b
:
5623 case IA64_OPND_IMMU21
:
5624 case IA64_OPND_IMMU24
:
5625 case IA64_OPND_MBTYPE4
:
5626 case IA64_OPND_MHTYPE8
:
5627 case IA64_OPND_POS6
:
5628 bits
= operand_width (idesc
->operands
[index
]);
5629 if (e
->X_op
== O_constant
)
5631 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5632 return OPERAND_MATCH
;
5634 return OPERAND_OUT_OF_RANGE
;
5638 case IA64_OPND_IMMU9
:
5639 bits
= operand_width (idesc
->operands
[index
]);
5640 if (e
->X_op
== O_constant
)
5642 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5644 int lobits
= e
->X_add_number
& 0x3;
5645 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5646 e
->X_add_number
|= (bfd_vma
) 0x3;
5647 return OPERAND_MATCH
;
5650 return OPERAND_OUT_OF_RANGE
;
5654 case IA64_OPND_IMM44
:
5655 /* least 16 bits must be zero */
5656 if ((e
->X_add_number
& 0xffff) != 0)
5657 /* XXX technically, this is wrong: we should not be issuing warning
5658 messages until we're sure this instruction pattern is going to
5660 as_warn (_("lower 16 bits of mask ignored"));
5662 if (e
->X_op
== O_constant
)
5664 if (((e
->X_add_number
>= 0
5665 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5666 || (e
->X_add_number
< 0
5667 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5670 if (e
->X_add_number
>= 0
5671 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5673 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5675 return OPERAND_MATCH
;
5678 return OPERAND_OUT_OF_RANGE
;
5682 case IA64_OPND_IMM17
:
5683 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5684 if (e
->X_op
== O_constant
)
5686 if (((e
->X_add_number
>= 0
5687 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5688 || (e
->X_add_number
< 0
5689 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5692 if (e
->X_add_number
>= 0
5693 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5695 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5697 return OPERAND_MATCH
;
5700 return OPERAND_OUT_OF_RANGE
;
5704 case IA64_OPND_IMM14
:
5705 case IA64_OPND_IMM22
:
5707 case IA64_OPND_IMM1
:
5708 case IA64_OPND_IMM8
:
5709 case IA64_OPND_IMM8U4
:
5710 case IA64_OPND_IMM8M1
:
5711 case IA64_OPND_IMM8M1U4
:
5712 case IA64_OPND_IMM8M1U8
:
5713 case IA64_OPND_IMM9a
:
5714 case IA64_OPND_IMM9b
:
5715 bits
= operand_width (idesc
->operands
[index
]);
5716 if (relocatable
&& (e
->X_op
== O_symbol
5717 || e
->X_op
== O_subtract
5718 || e
->X_op
== O_pseudo_fixup
))
5720 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5722 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5723 fix
->code
= BFD_RELOC_IA64_IMM14
;
5725 fix
->code
= BFD_RELOC_IA64_IMM22
;
5727 if (e
->X_op
!= O_subtract
)
5729 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5730 if (e
->X_op
== O_pseudo_fixup
)
5734 fix
->opnd
= idesc
->operands
[index
];
5737 ++CURR_SLOT
.num_fixups
;
5738 return OPERAND_MATCH
;
5740 else if (e
->X_op
!= O_constant
5741 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5742 return OPERAND_MISMATCH
;
5744 if (opnd
== IA64_OPND_IMM8M1U4
)
5746 /* Zero is not valid for unsigned compares that take an adjusted
5747 constant immediate range. */
5748 if (e
->X_add_number
== 0)
5749 return OPERAND_OUT_OF_RANGE
;
5751 /* Sign-extend 32-bit unsigned numbers, so that the following range
5752 checks will work. */
5753 val
= e
->X_add_number
;
5754 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5755 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5756 val
= ((val
<< 32) >> 32);
5758 /* Check for 0x100000000. This is valid because
5759 0x100000000-1 is the same as ((uint32_t) -1). */
5760 if (val
== ((bfd_signed_vma
) 1 << 32))
5761 return OPERAND_MATCH
;
5765 else if (opnd
== IA64_OPND_IMM8M1U8
)
5767 /* Zero is not valid for unsigned compares that take an adjusted
5768 constant immediate range. */
5769 if (e
->X_add_number
== 0)
5770 return OPERAND_OUT_OF_RANGE
;
5772 /* Check for 0x10000000000000000. */
5773 if (e
->X_op
== O_big
)
5775 if (generic_bignum
[0] == 0
5776 && generic_bignum
[1] == 0
5777 && generic_bignum
[2] == 0
5778 && generic_bignum
[3] == 0
5779 && generic_bignum
[4] == 1)
5780 return OPERAND_MATCH
;
5782 return OPERAND_OUT_OF_RANGE
;
5785 val
= e
->X_add_number
- 1;
5787 else if (opnd
== IA64_OPND_IMM8M1
)
5788 val
= e
->X_add_number
- 1;
5789 else if (opnd
== IA64_OPND_IMM8U4
)
5791 /* Sign-extend 32-bit unsigned numbers, so that the following range
5792 checks will work. */
5793 val
= e
->X_add_number
;
5794 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5795 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5796 val
= ((val
<< 32) >> 32);
5799 val
= e
->X_add_number
;
5801 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5802 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5803 return OPERAND_MATCH
;
5805 return OPERAND_OUT_OF_RANGE
;
5807 case IA64_OPND_INC3
:
5808 /* +/- 1, 4, 8, 16 */
5809 val
= e
->X_add_number
;
5812 if (e
->X_op
== O_constant
)
5814 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5815 return OPERAND_MATCH
;
5817 return OPERAND_OUT_OF_RANGE
;
5821 case IA64_OPND_TGT25
:
5822 case IA64_OPND_TGT25b
:
5823 case IA64_OPND_TGT25c
:
5824 case IA64_OPND_TGT64
:
5825 if (e
->X_op
== O_symbol
)
5827 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5828 if (opnd
== IA64_OPND_TGT25
)
5829 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5830 else if (opnd
== IA64_OPND_TGT25b
)
5831 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5832 else if (opnd
== IA64_OPND_TGT25c
)
5833 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5834 else if (opnd
== IA64_OPND_TGT64
)
5835 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5839 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5840 fix
->opnd
= idesc
->operands
[index
];
5843 ++CURR_SLOT
.num_fixups
;
5844 return OPERAND_MATCH
;
5846 case IA64_OPND_TAG13
:
5847 case IA64_OPND_TAG13b
:
5851 return OPERAND_MATCH
;
5854 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5855 /* There are no external relocs for TAG13/TAG13b fields, so we
5856 create a dummy reloc. This will not live past md_apply_fix3. */
5857 fix
->code
= BFD_RELOC_UNUSED
;
5858 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5859 fix
->opnd
= idesc
->operands
[index
];
5862 ++CURR_SLOT
.num_fixups
;
5863 return OPERAND_MATCH
;
5870 case IA64_OPND_LDXMOV
:
5871 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5872 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5873 fix
->opnd
= idesc
->operands
[index
];
5876 ++CURR_SLOT
.num_fixups
;
5877 return OPERAND_MATCH
;
5882 return OPERAND_MISMATCH
;
5891 memset (e
, 0, sizeof (*e
));
5894 if (*input_line_pointer
!= '}')
5896 sep
= *input_line_pointer
++;
5900 if (!md
.manual_bundling
)
5901 as_warn ("Found '}' when manual bundling is off");
5903 CURR_SLOT
.manual_bundling_off
= 1;
5904 md
.manual_bundling
= 0;
5910 /* Returns the next entry in the opcode table that matches the one in
5911 IDESC, and frees the entry in IDESC. If no matching entry is
5912 found, NULL is returned instead. */
5914 static struct ia64_opcode
*
5915 get_next_opcode (struct ia64_opcode
*idesc
)
5917 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
5918 ia64_free_opcode (idesc
);
5922 /* Parse the operands for the opcode and find the opcode variant that
5923 matches the specified operands, or NULL if no match is possible. */
5925 static struct ia64_opcode
*
5926 parse_operands (idesc
)
5927 struct ia64_opcode
*idesc
;
5929 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
5930 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
5931 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
5932 enum operand_match_result result
;
5934 char *first_arg
= 0, *end
, *saved_input_pointer
;
5937 assert (strlen (idesc
->name
) <= 128);
5939 strcpy (mnemonic
, idesc
->name
);
5940 if (idesc
->operands
[2] == IA64_OPND_SOF
5941 || idesc
->operands
[1] == IA64_OPND_SOF
)
5943 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5944 can't parse the first operand until we have parsed the
5945 remaining operands of the "alloc" instruction. */
5947 first_arg
= input_line_pointer
;
5948 end
= strchr (input_line_pointer
, '=');
5951 as_bad ("Expected separator `='");
5954 input_line_pointer
= end
+ 1;
5961 if (i
< NELEMS (CURR_SLOT
.opnd
))
5963 sep
= parse_operand (CURR_SLOT
.opnd
+ i
);
5964 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
5971 sep
= parse_operand (&dummy
);
5972 if (dummy
.X_op
== O_absent
)
5978 if (sep
!= '=' && sep
!= ',')
5983 if (num_outputs
> 0)
5984 as_bad ("Duplicate equal sign (=) in instruction");
5986 num_outputs
= i
+ 1;
5991 as_bad ("Illegal operand separator `%c'", sep
);
5995 if (idesc
->operands
[2] == IA64_OPND_SOF
5996 || idesc
->operands
[1] == IA64_OPND_SOF
)
5998 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5999 know (strcmp (idesc
->name
, "alloc") == 0);
6000 i
= (CURR_SLOT
.opnd
[1].X_op
== O_register
6001 && CURR_SLOT
.opnd
[1].X_add_number
== REG_AR
+ AR_PFS
) ? 2 : 1;
6002 if (num_operands
== i
+ 3 /* first_arg not included in this count! */
6003 && CURR_SLOT
.opnd
[i
].X_op
== O_constant
6004 && CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6005 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
6006 && CURR_SLOT
.opnd
[i
+ 3].X_op
== O_constant
)
6008 sof
= set_regstack (CURR_SLOT
.opnd
[i
].X_add_number
,
6009 CURR_SLOT
.opnd
[i
+ 1].X_add_number
,
6010 CURR_SLOT
.opnd
[i
+ 2].X_add_number
,
6011 CURR_SLOT
.opnd
[i
+ 3].X_add_number
);
6013 /* now we can parse the first arg: */
6014 saved_input_pointer
= input_line_pointer
;
6015 input_line_pointer
= first_arg
;
6016 sep
= parse_operand (CURR_SLOT
.opnd
+ 0);
6018 --num_outputs
; /* force error */
6019 input_line_pointer
= saved_input_pointer
;
6021 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6022 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6023 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6024 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6028 highest_unmatched_operand
= -4;
6029 curr_out_of_range_pos
= -1;
6031 for (; idesc
; idesc
= get_next_opcode (idesc
))
6033 if (num_outputs
!= idesc
->num_outputs
)
6034 continue; /* mismatch in # of outputs */
6035 if (highest_unmatched_operand
< 0)
6036 highest_unmatched_operand
|= 1;
6037 if (num_operands
> NELEMS (idesc
->operands
)
6038 || (num_operands
< NELEMS (idesc
->operands
)
6039 && idesc
->operands
[num_operands
])
6040 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6041 continue; /* mismatch in number of arguments */
6042 if (highest_unmatched_operand
< 0)
6043 highest_unmatched_operand
|= 2;
6045 CURR_SLOT
.num_fixups
= 0;
6047 /* Try to match all operands. If we see an out-of-range operand,
6048 then continue trying to match the rest of the operands, since if
6049 the rest match, then this idesc will give the best error message. */
6051 out_of_range_pos
= -1;
6052 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6054 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6055 if (result
!= OPERAND_MATCH
)
6057 if (result
!= OPERAND_OUT_OF_RANGE
)
6059 if (out_of_range_pos
< 0)
6060 /* remember position of the first out-of-range operand: */
6061 out_of_range_pos
= i
;
6065 /* If we did not match all operands, or if at least one operand was
6066 out-of-range, then this idesc does not match. Keep track of which
6067 idesc matched the most operands before failing. If we have two
6068 idescs that failed at the same position, and one had an out-of-range
6069 operand, then prefer the out-of-range operand. Thus if we have
6070 "add r0=0x1000000,r1" we get an error saying the constant is out
6071 of range instead of an error saying that the constant should have been
6074 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6076 if (i
> highest_unmatched_operand
6077 || (i
== highest_unmatched_operand
6078 && out_of_range_pos
> curr_out_of_range_pos
))
6080 highest_unmatched_operand
= i
;
6081 if (out_of_range_pos
>= 0)
6083 expected_operand
= idesc
->operands
[out_of_range_pos
];
6084 error_pos
= out_of_range_pos
;
6088 expected_operand
= idesc
->operands
[i
];
6091 curr_out_of_range_pos
= out_of_range_pos
;
6100 if (expected_operand
)
6101 as_bad ("Operand %u of `%s' should be %s",
6102 error_pos
+ 1, mnemonic
,
6103 elf64_ia64_operands
[expected_operand
].desc
);
6104 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6105 as_bad ("Wrong number of output operands");
6106 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6107 as_bad ("Wrong number of input operands");
6109 as_bad ("Operand mismatch");
6115 /* Keep track of state necessary to determine whether a NOP is necessary
6116 to avoid an erratum in A and B step Itanium chips, and return 1 if we
6117 detect a case where additional NOPs may be necessary. */
6119 errata_nop_necessary_p (slot
, insn_unit
)
6121 enum ia64_unit insn_unit
;
6124 struct group
*this_group
= md
.last_groups
+ md
.group_idx
;
6125 struct group
*prev_group
= md
.last_groups
+ (md
.group_idx
+ 2) % 3;
6126 struct ia64_opcode
*idesc
= slot
->idesc
;
6128 /* Test whether this could be the first insn in a problematic sequence. */
6129 if (insn_unit
== IA64_UNIT_F
)
6131 for (i
= 0; i
< idesc
->num_outputs
; i
++)
6132 if (idesc
->operands
[i
] == IA64_OPND_P1
6133 || idesc
->operands
[i
] == IA64_OPND_P2
)
6135 int regno
= slot
->opnd
[i
].X_add_number
- REG_P
;
6136 /* Ignore invalid operands; they generate errors elsewhere. */
6139 this_group
->p_reg_set
[regno
] = 1;
6143 /* Test whether this could be the second insn in a problematic sequence. */
6144 if (insn_unit
== IA64_UNIT_M
&& slot
->qp_regno
> 0
6145 && prev_group
->p_reg_set
[slot
->qp_regno
])
6147 for (i
= 0; i
< idesc
->num_outputs
; i
++)
6148 if (idesc
->operands
[i
] == IA64_OPND_R1
6149 || idesc
->operands
[i
] == IA64_OPND_R2
6150 || idesc
->operands
[i
] == IA64_OPND_R3
)
6152 int regno
= slot
->opnd
[i
].X_add_number
- REG_GR
;
6153 /* Ignore invalid operands; they generate errors elsewhere. */
6156 if (strncmp (idesc
->name
, "add", 3) != 0
6157 && strncmp (idesc
->name
, "sub", 3) != 0
6158 && strncmp (idesc
->name
, "shladd", 6) != 0
6159 && (idesc
->flags
& IA64_OPCODE_POSTINC
) == 0)
6160 this_group
->g_reg_set_conditionally
[regno
] = 1;
6164 /* Test whether this could be the third insn in a problematic sequence. */
6165 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; i
++)
6167 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
6168 idesc
->operands
[i
] == IA64_OPND_R3
6169 /* For mov indirect. */
6170 || idesc
->operands
[i
] == IA64_OPND_RR_R3
6171 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
6172 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
6173 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
6174 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
6175 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
6176 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
6177 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
6179 || idesc
->operands
[i
] == IA64_OPND_ITR_R3
6180 || idesc
->operands
[i
] == IA64_OPND_DTR_R3
6181 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
6182 || idesc
->operands
[i
] == IA64_OPND_MR3
)
6184 int regno
= slot
->opnd
[i
].X_add_number
- REG_GR
;
6185 /* Ignore invalid operands; they generate errors elsewhere. */
6188 if (idesc
->operands
[i
] == IA64_OPND_R3
)
6190 if (strcmp (idesc
->name
, "fc") != 0
6191 && strcmp (idesc
->name
, "tak") != 0
6192 && strcmp (idesc
->name
, "thash") != 0
6193 && strcmp (idesc
->name
, "tpa") != 0
6194 && strcmp (idesc
->name
, "ttag") != 0
6195 && strncmp (idesc
->name
, "ptr", 3) != 0
6196 && strncmp (idesc
->name
, "ptc", 3) != 0
6197 && strncmp (idesc
->name
, "probe", 5) != 0)
6200 if (prev_group
->g_reg_set_conditionally
[regno
])
6208 build_insn (slot
, insnp
)
6212 const struct ia64_operand
*odesc
, *o2desc
;
6213 struct ia64_opcode
*idesc
= slot
->idesc
;
6214 bfd_signed_vma insn
, val
;
6218 insn
= idesc
->opcode
| slot
->qp_regno
;
6220 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6222 if (slot
->opnd
[i
].X_op
== O_register
6223 || slot
->opnd
[i
].X_op
== O_constant
6224 || slot
->opnd
[i
].X_op
== O_index
)
6225 val
= slot
->opnd
[i
].X_add_number
;
6226 else if (slot
->opnd
[i
].X_op
== O_big
)
6228 /* This must be the value 0x10000000000000000. */
6229 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6235 switch (idesc
->operands
[i
])
6237 case IA64_OPND_IMMU64
:
6238 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6239 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6240 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6241 | (((val
>> 63) & 0x1) << 36));
6244 case IA64_OPND_IMMU62
:
6245 val
&= 0x3fffffffffffffffULL
;
6246 if (val
!= slot
->opnd
[i
].X_add_number
)
6247 as_warn (_("Value truncated to 62 bits"));
6248 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6249 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6252 case IA64_OPND_TGT64
:
6254 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6255 insn
|= ((((val
>> 59) & 0x1) << 36)
6256 | (((val
>> 0) & 0xfffff) << 13));
6287 case IA64_OPND_R3_2
:
6288 case IA64_OPND_CPUID_R3
:
6289 case IA64_OPND_DBR_R3
:
6290 case IA64_OPND_DTR_R3
:
6291 case IA64_OPND_ITR_R3
:
6292 case IA64_OPND_IBR_R3
:
6294 case IA64_OPND_MSR_R3
:
6295 case IA64_OPND_PKR_R3
:
6296 case IA64_OPND_PMC_R3
:
6297 case IA64_OPND_PMD_R3
:
6298 case IA64_OPND_RR_R3
:
6306 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6307 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6309 as_bad_where (slot
->src_file
, slot
->src_line
,
6310 "Bad operand value: %s", err
);
6311 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6313 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6314 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6316 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6317 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6319 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6320 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6321 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6323 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6324 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6334 int manual_bundling_off
= 0, manual_bundling
= 0;
6335 enum ia64_unit required_unit
, insn_unit
= 0;
6336 enum ia64_insn_type type
[3], insn_type
;
6337 unsigned int template, orig_template
;
6338 bfd_vma insn
[3] = { -1, -1, -1 };
6339 struct ia64_opcode
*idesc
;
6340 int end_of_insn_group
= 0, user_template
= -1;
6341 int n
, i
, j
, first
, curr
;
6342 unw_rec_list
*ptr
, *last_ptr
, *end_ptr
;
6343 bfd_vma t0
= 0, t1
= 0;
6344 struct label_fix
*lfix
;
6345 struct insn_fix
*ifix
;
6351 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6352 know (first
>= 0 & first
< NUM_SLOTS
);
6353 n
= MIN (3, md
.num_slots_in_use
);
6355 /* Determine template: user user_template if specified, best match
6358 if (md
.slot
[first
].user_template
>= 0)
6359 user_template
= template = md
.slot
[first
].user_template
;
6362 /* Auto select appropriate template. */
6363 memset (type
, 0, sizeof (type
));
6365 for (i
= 0; i
< n
; ++i
)
6367 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6369 type
[i
] = md
.slot
[curr
].idesc
->type
;
6370 curr
= (curr
+ 1) % NUM_SLOTS
;
6372 template = best_template
[type
[0]][type
[1]][type
[2]];
6375 /* initialize instructions with appropriate nops: */
6376 for (i
= 0; i
< 3; ++i
)
6377 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6381 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6382 from the start of the frag. */
6383 addr_mod
= frag_now_fix () & 15;
6384 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6385 as_bad (_("instruction address is not a multiple of 16"));
6386 frag_now
->insn_addr
= addr_mod
;
6387 frag_now
->has_code
= 1;
6389 /* now fill in slots with as many insns as possible: */
6391 idesc
= md
.slot
[curr
].idesc
;
6392 end_of_insn_group
= 0;
6393 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6395 /* If we have unwind records, we may need to update some now. */
6396 ptr
= md
.slot
[curr
].unwind_record
;
6399 /* Find the last prologue/body record in the list for the current
6400 insn, and set the slot number for all records up to that point.
6401 This needs to be done now, because prologue/body records refer to
6402 the current point, not the point after the instruction has been
6403 issued. This matters because there may have been nops emitted
6404 meanwhile. Any non-prologue non-body record followed by a
6405 prologue/body record must also refer to the current point. */
6407 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6408 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6409 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6410 || ptr
->r
.type
== body
)
6414 /* Make last_ptr point one after the last prologue/body
6416 last_ptr
= last_ptr
->next
;
6417 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6420 ptr
->slot_number
= (unsigned long) f
+ i
;
6421 ptr
->slot_frag
= frag_now
;
6423 /* Remove the initialized records, so that we won't accidentally
6424 update them again if we insert a nop and continue. */
6425 md
.slot
[curr
].unwind_record
= last_ptr
;
6429 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6430 if (md
.slot
[curr
].manual_bundling_on
)
6433 manual_bundling
= 1;
6435 break; /* Need to start a new bundle. */
6438 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6440 if (manual_bundling
&& !manual_bundling_off
)
6442 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6443 "`%s' must be last in bundle", idesc
->name
);
6445 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6449 if (idesc
->flags
& IA64_OPCODE_LAST
)
6452 unsigned int required_template
;
6454 /* If we need a stop bit after an M slot, our only choice is
6455 template 5 (M;;MI). If we need a stop bit after a B
6456 slot, our only choice is to place it at the end of the
6457 bundle, because the only available templates are MIB,
6458 MBB, BBB, MMB, and MFB. We don't handle anything other
6459 than M and B slots because these are the only kind of
6460 instructions that can have the IA64_OPCODE_LAST bit set. */
6461 required_template
= template;
6462 switch (idesc
->type
)
6466 required_template
= 5;
6474 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6475 "Internal error: don't know how to force %s to end"
6476 "of instruction group", idesc
->name
);
6481 && (i
> required_slot
6482 || (required_slot
== 2 && !manual_bundling_off
)
6483 || (user_template
>= 0
6484 /* Changing from MMI to M;MI is OK. */
6485 && (template ^ required_template
) > 1)))
6487 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6488 "`%s' must be last in instruction group",
6490 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6491 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6493 if (required_slot
< i
)
6494 /* Can't fit this instruction. */
6498 if (required_template
!= template)
6500 /* If we switch the template, we need to reset the NOPs
6501 after slot i. The slot-types of the instructions ahead
6502 of i never change, so we don't need to worry about
6503 changing NOPs in front of this slot. */
6504 for (j
= i
; j
< 3; ++j
)
6505 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6507 template = required_template
;
6509 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6511 if (manual_bundling
)
6513 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6514 "Label must be first in a bundle");
6515 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6517 /* This insn must go into the first slot of a bundle. */
6521 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6523 /* We need an instruction group boundary in the middle of a
6524 bundle. See if we can switch to an other template with
6525 an appropriate boundary. */
6527 orig_template
= template;
6528 if (i
== 1 && (user_template
== 4
6529 || (user_template
< 0
6530 && (ia64_templ_desc
[template].exec_unit
[0]
6534 end_of_insn_group
= 0;
6536 else if (i
== 2 && (user_template
== 0
6537 || (user_template
< 0
6538 && (ia64_templ_desc
[template].exec_unit
[1]
6540 /* This test makes sure we don't switch the template if
6541 the next instruction is one that needs to be first in
6542 an instruction group. Since all those instructions are
6543 in the M group, there is no way such an instruction can
6544 fit in this bundle even if we switch the template. The
6545 reason we have to check for this is that otherwise we
6546 may end up generating "MI;;I M.." which has the deadly
6547 effect that the second M instruction is no longer the
6548 first in the group! --davidm 99/12/16 */
6549 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6552 end_of_insn_group
= 0;
6555 && user_template
== 0
6556 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6557 /* Use the next slot. */
6559 else if (curr
!= first
)
6560 /* can't fit this insn */
6563 if (template != orig_template
)
6564 /* if we switch the template, we need to reset the NOPs
6565 after slot i. The slot-types of the instructions ahead
6566 of i never change, so we don't need to worry about
6567 changing NOPs in front of this slot. */
6568 for (j
= i
; j
< 3; ++j
)
6569 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6571 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6573 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6574 if (idesc
->type
== IA64_TYPE_DYN
)
6576 enum ia64_opnd opnd1
, opnd2
;
6578 if ((strcmp (idesc
->name
, "nop") == 0)
6579 || (strcmp (idesc
->name
, "hint") == 0)
6580 || (strcmp (idesc
->name
, "break") == 0))
6581 insn_unit
= required_unit
;
6582 else if (strcmp (idesc
->name
, "chk.s") == 0
6583 || strcmp (idesc
->name
, "mov") == 0)
6585 insn_unit
= IA64_UNIT_M
;
6586 if (required_unit
== IA64_UNIT_I
6587 || (required_unit
== IA64_UNIT_F
&& template == 6))
6588 insn_unit
= IA64_UNIT_I
;
6591 as_fatal ("emit_one_bundle: unexpected dynamic op");
6593 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbfxx"[insn_unit
]);
6594 opnd1
= idesc
->operands
[0];
6595 opnd2
= idesc
->operands
[1];
6596 ia64_free_opcode (idesc
);
6597 idesc
= ia64_find_opcode (mnemonic
);
6598 /* moves to/from ARs have collisions */
6599 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6601 while (idesc
!= NULL
6602 && (idesc
->operands
[0] != opnd1
6603 || idesc
->operands
[1] != opnd2
))
6604 idesc
= get_next_opcode (idesc
);
6608 /* no other resolved dynamic ops have collisions */
6609 know (!get_next_opcode (idesc
));
6611 md
.slot
[curr
].idesc
= idesc
;
6615 insn_type
= idesc
->type
;
6616 insn_unit
= IA64_UNIT_NIL
;
6620 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6621 insn_unit
= required_unit
;
6623 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6624 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6625 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6626 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6627 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6632 if (insn_unit
!= required_unit
)
6634 if (required_unit
== IA64_UNIT_L
6635 && insn_unit
== IA64_UNIT_I
6636 && !(idesc
->flags
& IA64_OPCODE_X_IN_MLX
))
6638 /* we got ourselves an MLX template but the current
6639 instruction isn't an X-unit, or an I-unit instruction
6640 that can go into the X slot of an MLX template. Duh. */
6641 if (md
.num_slots_in_use
>= NUM_SLOTS
)
6643 as_bad_where (md
.slot
[curr
].src_file
,
6644 md
.slot
[curr
].src_line
,
6645 "`%s' can't go in X slot of "
6646 "MLX template", idesc
->name
);
6647 /* drop this insn so we don't livelock: */
6648 --md
.num_slots_in_use
;
6652 continue; /* try next slot */
6655 if (debug_type
== DEBUG_DWARF2
|| md
.slot
[curr
].loc_directive_seen
)
6657 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6659 md
.slot
[curr
].loc_directive_seen
= 0;
6660 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6663 if (errata_nop_necessary_p (md
.slot
+ curr
, insn_unit
))
6664 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6666 build_insn (md
.slot
+ curr
, insn
+ i
);
6668 ptr
= md
.slot
[curr
].unwind_record
;
6671 /* Set slot numbers for all remaining unwind records belonging to the
6672 current insn. There can not be any prologue/body unwind records
6674 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6675 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6677 ptr
->slot_number
= (unsigned long) f
+ i
;
6678 ptr
->slot_frag
= frag_now
;
6680 md
.slot
[curr
].unwind_record
= NULL
;
6683 if (required_unit
== IA64_UNIT_L
)
6686 /* skip one slot for long/X-unit instructions */
6689 --md
.num_slots_in_use
;
6691 /* now is a good time to fix up the labels for this insn: */
6692 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6694 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6695 symbol_set_frag (lfix
->sym
, frag_now
);
6697 /* and fix up the tags also. */
6698 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6700 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6701 symbol_set_frag (lfix
->sym
, frag_now
);
6704 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6706 ifix
= md
.slot
[curr
].fixup
+ j
;
6707 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6708 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6709 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6710 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6711 fix
->fx_file
= md
.slot
[curr
].src_file
;
6712 fix
->fx_line
= md
.slot
[curr
].src_line
;
6715 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6717 if (end_of_insn_group
)
6719 md
.group_idx
= (md
.group_idx
+ 1) % 3;
6720 memset (md
.last_groups
+ md
.group_idx
, 0, sizeof md
.last_groups
[0]);
6724 ia64_free_opcode (md
.slot
[curr
].idesc
);
6725 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6726 md
.slot
[curr
].user_template
= -1;
6728 if (manual_bundling_off
)
6730 manual_bundling
= 0;
6733 curr
= (curr
+ 1) % NUM_SLOTS
;
6734 idesc
= md
.slot
[curr
].idesc
;
6736 if (manual_bundling
> 0)
6738 if (md
.num_slots_in_use
> 0)
6740 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6741 "`%s' does not fit into %s template",
6742 idesc
->name
, ia64_templ_desc
[template].name
);
6743 --md
.num_slots_in_use
;
6746 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6747 "Missing '}' at end of file");
6749 know (md
.num_slots_in_use
< NUM_SLOTS
);
6751 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6752 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6754 number_to_chars_littleendian (f
+ 0, t0
, 8);
6755 number_to_chars_littleendian (f
+ 8, t1
, 8);
6759 unwind
.list
->next_slot_number
= (unsigned long) f
+ 16;
6760 unwind
.list
->next_slot_frag
= frag_now
;
6765 md_parse_option (c
, arg
)
6772 /* Switches from the Intel assembler. */
6774 if (strcmp (arg
, "ilp64") == 0
6775 || strcmp (arg
, "lp64") == 0
6776 || strcmp (arg
, "p64") == 0)
6778 md
.flags
|= EF_IA_64_ABI64
;
6780 else if (strcmp (arg
, "ilp32") == 0)
6782 md
.flags
&= ~EF_IA_64_ABI64
;
6784 else if (strcmp (arg
, "le") == 0)
6786 md
.flags
&= ~EF_IA_64_BE
;
6787 default_big_endian
= 0;
6789 else if (strcmp (arg
, "be") == 0)
6791 md
.flags
|= EF_IA_64_BE
;
6792 default_big_endian
= 1;
6799 if (strcmp (arg
, "so") == 0)
6801 /* Suppress signon message. */
6803 else if (strcmp (arg
, "pi") == 0)
6805 /* Reject privileged instructions. FIXME */
6807 else if (strcmp (arg
, "us") == 0)
6809 /* Allow union of signed and unsigned range. FIXME */
6811 else if (strcmp (arg
, "close_fcalls") == 0)
6813 /* Do not resolve global function calls. */
6820 /* temp[="prefix"] Insert temporary labels into the object file
6821 symbol table prefixed by "prefix".
6822 Default prefix is ":temp:".
6827 /* indirect=<tgt> Assume unannotated indirect branches behavior
6828 according to <tgt> --
6829 exit: branch out from the current context (default)
6830 labels: all labels in context may be branch targets
6832 if (strncmp (arg
, "indirect=", 9) != 0)
6837 /* -X conflicts with an ignored option, use -x instead */
6839 if (!arg
|| strcmp (arg
, "explicit") == 0)
6841 /* set default mode to explicit */
6842 md
.default_explicit_mode
= 1;
6845 else if (strcmp (arg
, "auto") == 0)
6847 md
.default_explicit_mode
= 0;
6849 else if (strcmp (arg
, "debug") == 0)
6853 else if (strcmp (arg
, "debugx") == 0)
6855 md
.default_explicit_mode
= 1;
6860 as_bad (_("Unrecognized option '-x%s'"), arg
);
6865 /* nops Print nops statistics. */
6868 /* GNU specific switches for gcc. */
6869 case OPTION_MCONSTANT_GP
:
6870 md
.flags
|= EF_IA_64_CONS_GP
;
6873 case OPTION_MAUTO_PIC
:
6874 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
6885 md_show_usage (stream
)
6890 --mconstant-gp mark output file as using the constant-GP model\n\
6891 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6892 --mauto-pic mark output file as using the constant-GP model\n\
6893 without function descriptors (sets ELF header flag\n\
6894 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6895 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6896 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6897 -x | -xexplicit turn on dependency violation checking (default)\n\
6898 -xauto automagically remove dependency violations\n\
6899 -xdebug debug dependency violation checker\n"),
6904 ia64_after_parse_args ()
6906 if (debug_type
== DEBUG_STABS
)
6907 as_fatal (_("--gstabs is not supported for ia64"));
6910 /* Return true if TYPE fits in TEMPL at SLOT. */
6913 match (int templ
, int type
, int slot
)
6915 enum ia64_unit unit
;
6918 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
6921 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
6923 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
6925 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
6926 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
6927 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
6928 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
6929 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
6930 default: result
= 0; break;
6935 /* Add a bit of extra goodness if a nop of type F or B would fit
6936 in TEMPL at SLOT. */
6939 extra_goodness (int templ
, int slot
)
6941 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
6943 if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
6948 /* This function is called once, at assembler startup time. It sets
6949 up all the tables, etc. that the MD part of the assembler will need
6950 that can be determined before arguments are parsed. */
6954 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
6959 md
.explicit_mode
= md
.default_explicit_mode
;
6961 bfd_set_section_alignment (stdoutput
, text_section
, 4);
6963 /* Make sure function pointers get initialized. */
6964 target_big_endian
= -1;
6965 dot_byteorder (default_big_endian
);
6967 alias_hash
= hash_new ();
6968 alias_name_hash
= hash_new ();
6969 secalias_hash
= hash_new ();
6970 secalias_name_hash
= hash_new ();
6972 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
6973 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
6974 &zero_address_frag
);
6976 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
6977 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
6978 &zero_address_frag
);
6980 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
6981 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
6982 &zero_address_frag
);
6984 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
6985 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
6986 &zero_address_frag
);
6988 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
6989 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
6990 &zero_address_frag
);
6992 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
6993 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
6994 &zero_address_frag
);
6996 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
6997 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
6998 &zero_address_frag
);
7000 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7001 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7002 &zero_address_frag
);
7004 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7005 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7006 &zero_address_frag
);
7008 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7009 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7010 &zero_address_frag
);
7012 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7013 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7014 &zero_address_frag
);
7016 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7017 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7018 &zero_address_frag
);
7020 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7021 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7022 &zero_address_frag
);
7024 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7025 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7026 &zero_address_frag
);
7028 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7029 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7030 &zero_address_frag
);
7032 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7033 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7034 &zero_address_frag
);
7036 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7037 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7038 &zero_address_frag
);
7040 /* Compute the table of best templates. We compute goodness as a
7041 base 4 value, in which each match counts for 3, each F counts
7042 for 2, each B counts for 1. This should maximize the number of
7043 F and B nops in the chosen bundles, which is good because these
7044 pipelines are least likely to be overcommitted. */
7045 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7046 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7047 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7050 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7053 if (match (t
, i
, 0))
7055 if (match (t
, j
, 1))
7057 if (match (t
, k
, 2))
7058 goodness
= 3 + 3 + 3;
7060 goodness
= 3 + 3 + extra_goodness (t
, 2);
7062 else if (match (t
, j
, 2))
7063 goodness
= 3 + 3 + extra_goodness (t
, 1);
7067 goodness
+= extra_goodness (t
, 1);
7068 goodness
+= extra_goodness (t
, 2);
7071 else if (match (t
, i
, 1))
7073 if (match (t
, j
, 2))
7076 goodness
= 3 + extra_goodness (t
, 2);
7078 else if (match (t
, i
, 2))
7079 goodness
= 3 + extra_goodness (t
, 1);
7081 if (goodness
> best
)
7084 best_template
[i
][j
][k
] = t
;
7089 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7090 md
.slot
[i
].user_template
= -1;
7092 md
.pseudo_hash
= hash_new ();
7093 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7095 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7096 (void *) (pseudo_opcode
+ i
));
7098 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7099 pseudo_opcode
[i
].name
, err
);
7102 md
.reg_hash
= hash_new ();
7103 md
.dynreg_hash
= hash_new ();
7104 md
.const_hash
= hash_new ();
7105 md
.entry_hash
= hash_new ();
7107 /* general registers: */
7110 for (i
= 0; i
< total
; ++i
)
7112 sprintf (name
, "r%d", i
- REG_GR
);
7113 md
.regsym
[i
] = declare_register (name
, i
);
7116 /* floating point registers: */
7118 for (; i
< total
; ++i
)
7120 sprintf (name
, "f%d", i
- REG_FR
);
7121 md
.regsym
[i
] = declare_register (name
, i
);
7124 /* application registers: */
7127 for (; i
< total
; ++i
)
7129 sprintf (name
, "ar%d", i
- REG_AR
);
7130 md
.regsym
[i
] = declare_register (name
, i
);
7133 /* control registers: */
7136 for (; i
< total
; ++i
)
7138 sprintf (name
, "cr%d", i
- REG_CR
);
7139 md
.regsym
[i
] = declare_register (name
, i
);
7142 /* predicate registers: */
7144 for (; i
< total
; ++i
)
7146 sprintf (name
, "p%d", i
- REG_P
);
7147 md
.regsym
[i
] = declare_register (name
, i
);
7150 /* branch registers: */
7152 for (; i
< total
; ++i
)
7154 sprintf (name
, "b%d", i
- REG_BR
);
7155 md
.regsym
[i
] = declare_register (name
, i
);
7158 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
7159 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
7160 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
7161 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
7162 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
7163 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
7164 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
7166 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7168 regnum
= indirect_reg
[i
].regnum
;
7169 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
7172 /* define synonyms for application registers: */
7173 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
7174 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
7175 REG_AR
+ ar
[i
- REG_AR
].regnum
);
7177 /* define synonyms for control registers: */
7178 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
7179 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
7180 REG_CR
+ cr
[i
- REG_CR
].regnum
);
7182 declare_register ("gp", REG_GR
+ 1);
7183 declare_register ("sp", REG_GR
+ 12);
7184 declare_register ("rp", REG_BR
+ 0);
7186 /* pseudo-registers used to specify unwind info: */
7187 declare_register ("psp", REG_PSP
);
7189 declare_register_set ("ret", 4, REG_GR
+ 8);
7190 declare_register_set ("farg", 8, REG_FR
+ 8);
7191 declare_register_set ("fret", 8, REG_FR
+ 8);
7193 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7195 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7196 (PTR
) (const_bits
+ i
));
7198 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7202 /* Set the architecture and machine depending on defaults and command line
7204 if (md
.flags
& EF_IA_64_ABI64
)
7205 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7207 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7210 as_warn (_("Could not set architecture and machine"));
7212 /* Set the pointer size and pointer shift size depending on md.flags */
7214 if (md
.flags
& EF_IA_64_ABI64
)
7216 md
.pointer_size
= 8; /* pointers are 8 bytes */
7217 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7221 md
.pointer_size
= 4; /* pointers are 4 bytes */
7222 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7225 md
.mem_offset
.hint
= 0;
7228 md
.entry_labels
= NULL
;
7231 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
7232 because that is called after md_parse_option which is where we do the
7233 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
7234 default endianness. */
7237 ia64_init (argc
, argv
)
7238 int argc ATTRIBUTE_UNUSED
;
7239 char **argv ATTRIBUTE_UNUSED
;
7241 md
.flags
= MD_FLAGS_DEFAULT
;
7244 /* Return a string for the target object file format. */
7247 ia64_target_format ()
7249 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7251 if (md
.flags
& EF_IA_64_BE
)
7253 if (md
.flags
& EF_IA_64_ABI64
)
7254 #if defined(TE_AIX50)
7255 return "elf64-ia64-aix-big";
7256 #elif defined(TE_HPUX)
7257 return "elf64-ia64-hpux-big";
7259 return "elf64-ia64-big";
7262 #if defined(TE_AIX50)
7263 return "elf32-ia64-aix-big";
7264 #elif defined(TE_HPUX)
7265 return "elf32-ia64-hpux-big";
7267 return "elf32-ia64-big";
7272 if (md
.flags
& EF_IA_64_ABI64
)
7274 return "elf64-ia64-aix-little";
7276 return "elf64-ia64-little";
7280 return "elf32-ia64-aix-little";
7282 return "elf32-ia64-little";
7287 return "unknown-format";
7291 ia64_end_of_source ()
7293 /* terminate insn group upon reaching end of file: */
7294 insn_group_break (1, 0, 0);
7296 /* emits slots we haven't written yet: */
7297 ia64_flush_insns ();
7299 bfd_set_private_flags (stdoutput
, md
.flags
);
7301 md
.mem_offset
.hint
= 0;
7307 if (md
.qp
.X_op
== O_register
)
7308 as_bad ("qualifying predicate not followed by instruction");
7309 md
.qp
.X_op
= O_absent
;
7311 if (ignore_input ())
7314 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7316 if (md
.detect_dv
&& !md
.explicit_mode
)
7317 as_warn (_("Explicit stops are ignored in auto mode"));
7319 insn_group_break (1, 0, 0);
7323 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7325 static int defining_tag
= 0;
7328 ia64_unrecognized_line (ch
)
7334 expression (&md
.qp
);
7335 if (*input_line_pointer
++ != ')')
7337 as_bad ("Expected ')'");
7340 if (md
.qp
.X_op
!= O_register
)
7342 as_bad ("Qualifying predicate expected");
7345 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7347 as_bad ("Predicate register expected");
7353 if (md
.manual_bundling
)
7354 as_warn ("Found '{' when manual bundling is already turned on");
7356 CURR_SLOT
.manual_bundling_on
= 1;
7357 md
.manual_bundling
= 1;
7359 /* Bundling is only acceptable in explicit mode
7360 or when in default automatic mode. */
7361 if (md
.detect_dv
&& !md
.explicit_mode
)
7363 if (!md
.mode_explicitly_set
7364 && !md
.default_explicit_mode
)
7367 as_warn (_("Found '{' after explicit switch to automatic mode"));
7372 if (!md
.manual_bundling
)
7373 as_warn ("Found '}' when manual bundling is off");
7375 PREV_SLOT
.manual_bundling_off
= 1;
7376 md
.manual_bundling
= 0;
7378 /* switch back to automatic mode, if applicable */
7381 && !md
.mode_explicitly_set
7382 && !md
.default_explicit_mode
)
7385 /* Allow '{' to follow on the same line. We also allow ";;", but that
7386 happens automatically because ';' is an end of line marker. */
7388 if (input_line_pointer
[0] == '{')
7390 input_line_pointer
++;
7391 return ia64_unrecognized_line ('{');
7394 demand_empty_rest_of_line ();
7404 if (md
.qp
.X_op
== O_register
)
7406 as_bad ("Tag must come before qualifying predicate.");
7410 /* This implements just enough of read_a_source_file in read.c to
7411 recognize labels. */
7412 if (is_name_beginner (*input_line_pointer
))
7414 s
= input_line_pointer
;
7415 c
= get_symbol_end ();
7417 else if (LOCAL_LABELS_FB
7418 && ISDIGIT (*input_line_pointer
))
7421 while (ISDIGIT (*input_line_pointer
))
7422 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7423 fb_label_instance_inc (temp
);
7424 s
= fb_label_name (temp
, 0);
7425 c
= *input_line_pointer
;
7434 /* Put ':' back for error messages' sake. */
7435 *input_line_pointer
++ = ':';
7436 as_bad ("Expected ':'");
7443 /* Put ':' back for error messages' sake. */
7444 *input_line_pointer
++ = ':';
7445 if (*input_line_pointer
++ != ']')
7447 as_bad ("Expected ']'");
7452 as_bad ("Tag name expected");
7462 /* Not a valid line. */
7467 ia64_frob_label (sym
)
7470 struct label_fix
*fix
;
7472 /* Tags need special handling since they are not bundle breaks like
7476 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7478 fix
->next
= CURR_SLOT
.tag_fixups
;
7479 CURR_SLOT
.tag_fixups
= fix
;
7484 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7486 md
.last_text_seg
= now_seg
;
7487 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7489 fix
->next
= CURR_SLOT
.label_fixups
;
7490 CURR_SLOT
.label_fixups
= fix
;
7492 /* Keep track of how many code entry points we've seen. */
7493 if (md
.path
== md
.maxpaths
)
7496 md
.entry_labels
= (const char **)
7497 xrealloc ((void *) md
.entry_labels
,
7498 md
.maxpaths
* sizeof (char *));
7500 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7505 /* The HP-UX linker will give unresolved symbol errors for symbols
7506 that are declared but unused. This routine removes declared,
7507 unused symbols from an object. */
7509 ia64_frob_symbol (sym
)
7512 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7513 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7514 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7515 && ! S_IS_EXTERNAL (sym
)))
7522 ia64_flush_pending_output ()
7524 if (!md
.keep_pending_output
7525 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7527 /* ??? This causes many unnecessary stop bits to be emitted.
7528 Unfortunately, it isn't clear if it is safe to remove this. */
7529 insn_group_break (1, 0, 0);
7530 ia64_flush_insns ();
7534 /* Do ia64-specific expression optimization. All that's done here is
7535 to transform index expressions that are either due to the indexing
7536 of rotating registers or due to the indexing of indirect register
7539 ia64_optimize_expr (l
, op
, r
)
7548 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
7550 num_regs
= (l
->X_add_number
>> 16);
7551 if ((unsigned) r
->X_add_number
>= num_regs
)
7554 as_bad ("No current frame");
7556 as_bad ("Index out of range 0..%u", num_regs
- 1);
7557 r
->X_add_number
= 0;
7559 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7562 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
7564 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
7565 || l
->X_add_number
== IND_MEM
)
7567 as_bad ("Indirect register set name expected");
7568 l
->X_add_number
= IND_CPUID
;
7571 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
7572 l
->X_add_number
= r
->X_add_number
;
7580 ia64_parse_name (name
, e
)
7584 struct const_desc
*cdesc
;
7585 struct dynreg
*dr
= 0;
7586 unsigned int regnum
;
7590 /* first see if NAME is a known register name: */
7591 sym
= hash_find (md
.reg_hash
, name
);
7594 e
->X_op
= O_register
;
7595 e
->X_add_number
= S_GET_VALUE (sym
);
7599 cdesc
= hash_find (md
.const_hash
, name
);
7602 e
->X_op
= O_constant
;
7603 e
->X_add_number
= cdesc
->value
;
7607 /* check for inN, locN, or outN: */
7611 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7619 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
7627 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
7640 /* The name is inN, locN, or outN; parse the register number. */
7641 regnum
= strtoul (name
, &end
, 10);
7642 if (end
> name
&& *end
== '\0')
7644 if ((unsigned) regnum
>= dr
->num_regs
)
7647 as_bad ("No current frame");
7649 as_bad ("Register number out of range 0..%u",
7653 e
->X_op
= O_register
;
7654 e
->X_add_number
= dr
->base
+ regnum
;
7659 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
7661 /* We've got ourselves the name of a rotating register set.
7662 Store the base register number in the low 16 bits of
7663 X_add_number and the size of the register set in the top 16
7665 e
->X_op
= O_register
;
7666 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
7672 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7675 ia64_canonicalize_symbol_name (name
)
7678 size_t len
= strlen (name
);
7679 if (len
> 1 && name
[len
- 1] == '#')
7680 name
[len
- 1] = '\0';
7684 /* Return true if idesc is a conditional branch instruction. This excludes
7685 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7686 because they always read/write resources regardless of the value of the
7687 qualifying predicate. br.ia must always use p0, and hence is always
7688 taken. Thus this function returns true for branches which can fall
7689 through, and which use no resources if they do fall through. */
7692 is_conditional_branch (idesc
)
7693 struct ia64_opcode
*idesc
;
7695 /* br is a conditional branch. Everything that starts with br. except
7696 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7697 Everything that starts with brl is a conditional branch. */
7698 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
7699 && (idesc
->name
[2] == '\0'
7700 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
7701 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
7702 || idesc
->name
[2] == 'l'
7703 /* br.cond, br.call, br.clr */
7704 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
7705 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
7706 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
7709 /* Return whether the given opcode is a taken branch. If there's any doubt,
7713 is_taken_branch (idesc
)
7714 struct ia64_opcode
*idesc
;
7716 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
7717 || strncmp (idesc
->name
, "br.ia", 5) == 0);
7720 /* Return whether the given opcode is an interruption or rfi. If there's any
7721 doubt, returns zero. */
7724 is_interruption_or_rfi (idesc
)
7725 struct ia64_opcode
*idesc
;
7727 if (strcmp (idesc
->name
, "rfi") == 0)
7732 /* Returns the index of the given dependency in the opcode's list of chks, or
7733 -1 if there is no dependency. */
7736 depends_on (depind
, idesc
)
7738 struct ia64_opcode
*idesc
;
7741 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
7742 for (i
= 0; i
< dep
->nchks
; i
++)
7744 if (depind
== DEP (dep
->chks
[i
]))
7750 /* Determine a set of specific resources used for a particular resource
7751 class. Returns the number of specific resources identified For those
7752 cases which are not determinable statically, the resource returned is
7755 Meanings of value in 'NOTE':
7756 1) only read/write when the register number is explicitly encoded in the
7758 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7759 accesses CFM when qualifying predicate is in the rotating region.
7760 3) general register value is used to specify an indirect register; not
7761 determinable statically.
7762 4) only read the given resource when bits 7:0 of the indirect index
7763 register value does not match the register number of the resource; not
7764 determinable statically.
7765 5) all rules are implementation specific.
7766 6) only when both the index specified by the reader and the index specified
7767 by the writer have the same value in bits 63:61; not determinable
7769 7) only access the specified resource when the corresponding mask bit is
7771 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7772 only read when these insns reference FR2-31
7773 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7774 written when these insns write FR32-127
7775 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7777 11) The target predicates are written independently of PR[qp], but source
7778 registers are only read if PR[qp] is true. Since the state of PR[qp]
7779 cannot statically be determined, all source registers are marked used.
7780 12) This insn only reads the specified predicate register when that
7781 register is the PR[qp].
7782 13) This reference to ld-c only applies to teh GR whose value is loaded
7783 with data returned from memory, not the post-incremented address register.
7784 14) The RSE resource includes the implementation-specific RSE internal
7785 state resources. At least one (and possibly more) of these resources are
7786 read by each instruction listed in IC:rse-readers. At least one (and
7787 possibly more) of these resources are written by each insn listed in
7789 15+16) Represents reserved instructions, which the assembler does not
7792 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7793 this code; there are no dependency violations based on memory access.
7796 #define MAX_SPECS 256
7801 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
7802 const struct ia64_dependency
*dep
;
7803 struct ia64_opcode
*idesc
;
7804 int type
; /* is this a DV chk or a DV reg? */
7805 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
7806 int note
; /* resource note for this insn's usage */
7807 int path
; /* which execution path to examine */
7814 if (dep
->mode
== IA64_DV_WAW
7815 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
7816 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
7819 /* template for any resources we identify */
7820 tmpl
.dependency
= dep
;
7822 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
7823 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
7824 tmpl
.link_to_qp_branch
= 1;
7825 tmpl
.mem_offset
.hint
= 0;
7828 tmpl
.cmp_type
= CMP_NONE
;
7831 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7832 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7833 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7835 /* we don't need to track these */
7836 if (dep
->semantics
== IA64_DVS_NONE
)
7839 switch (dep
->specifier
)
7844 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7846 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7847 if (regno
>= 0 && regno
<= 7)
7849 specs
[count
] = tmpl
;
7850 specs
[count
++].index
= regno
;
7856 for (i
= 0; i
< 8; i
++)
7858 specs
[count
] = tmpl
;
7859 specs
[count
++].index
= i
;
7868 case IA64_RS_AR_UNAT
:
7869 /* This is a mov =AR or mov AR= instruction. */
7870 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7872 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7873 if (regno
== AR_UNAT
)
7875 specs
[count
++] = tmpl
;
7880 /* This is a spill/fill, or other instruction that modifies the
7883 /* Unless we can determine the specific bits used, mark the whole
7884 thing; bits 8:3 of the memory address indicate the bit used in
7885 UNAT. The .mem.offset hint may be used to eliminate a small
7886 subset of conflicts. */
7887 specs
[count
] = tmpl
;
7888 if (md
.mem_offset
.hint
)
7891 fprintf (stderr
, " Using hint for spill/fill\n");
7892 /* The index isn't actually used, just set it to something
7893 approximating the bit index. */
7894 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
7895 specs
[count
].mem_offset
.hint
= 1;
7896 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
7897 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
7901 specs
[count
++].specific
= 0;
7909 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7911 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7912 if ((regno
>= 8 && regno
<= 15)
7913 || (regno
>= 20 && regno
<= 23)
7914 || (regno
>= 31 && regno
<= 39)
7915 || (regno
>= 41 && regno
<= 47)
7916 || (regno
>= 67 && regno
<= 111))
7918 specs
[count
] = tmpl
;
7919 specs
[count
++].index
= regno
;
7932 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7934 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7935 if ((regno
>= 48 && regno
<= 63)
7936 || (regno
>= 112 && regno
<= 127))
7938 specs
[count
] = tmpl
;
7939 specs
[count
++].index
= regno
;
7945 for (i
= 48; i
< 64; i
++)
7947 specs
[count
] = tmpl
;
7948 specs
[count
++].index
= i
;
7950 for (i
= 112; i
< 128; i
++)
7952 specs
[count
] = tmpl
;
7953 specs
[count
++].index
= i
;
7971 for (i
= 0; i
< idesc
->num_outputs
; i
++)
7972 if (idesc
->operands
[i
] == IA64_OPND_B1
7973 || idesc
->operands
[i
] == IA64_OPND_B2
)
7975 specs
[count
] = tmpl
;
7976 specs
[count
++].index
=
7977 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7982 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
7983 if (idesc
->operands
[i
] == IA64_OPND_B1
7984 || idesc
->operands
[i
] == IA64_OPND_B2
)
7986 specs
[count
] = tmpl
;
7987 specs
[count
++].index
=
7988 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7994 case IA64_RS_CPUID
: /* four or more registers */
7997 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
7999 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8000 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8003 specs
[count
] = tmpl
;
8004 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8008 specs
[count
] = tmpl
;
8009 specs
[count
++].specific
= 0;
8019 case IA64_RS_DBR
: /* four or more registers */
8022 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8024 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8025 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8028 specs
[count
] = tmpl
;
8029 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8033 specs
[count
] = tmpl
;
8034 specs
[count
++].specific
= 0;
8038 else if (note
== 0 && !rsrc_write
)
8040 specs
[count
] = tmpl
;
8041 specs
[count
++].specific
= 0;
8049 case IA64_RS_IBR
: /* four or more registers */
8052 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8054 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8055 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8058 specs
[count
] = tmpl
;
8059 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8063 specs
[count
] = tmpl
;
8064 specs
[count
++].specific
= 0;
8077 /* These are implementation specific. Force all references to
8078 conflict with all other references. */
8079 specs
[count
] = tmpl
;
8080 specs
[count
++].specific
= 0;
8088 case IA64_RS_PKR
: /* 16 or more registers */
8089 if (note
== 3 || note
== 4)
8091 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8093 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8094 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8099 specs
[count
] = tmpl
;
8100 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8103 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8105 /* Uses all registers *except* the one in R3. */
8106 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8108 specs
[count
] = tmpl
;
8109 specs
[count
++].index
= i
;
8115 specs
[count
] = tmpl
;
8116 specs
[count
++].specific
= 0;
8123 specs
[count
] = tmpl
;
8124 specs
[count
++].specific
= 0;
8128 case IA64_RS_PMC
: /* four or more registers */
8131 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8132 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8135 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8137 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
8138 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8141 specs
[count
] = tmpl
;
8142 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8146 specs
[count
] = tmpl
;
8147 specs
[count
++].specific
= 0;
8157 case IA64_RS_PMD
: /* four or more registers */
8160 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8162 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8163 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8166 specs
[count
] = tmpl
;
8167 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8171 specs
[count
] = tmpl
;
8172 specs
[count
++].specific
= 0;
8182 case IA64_RS_RR
: /* eight registers */
8185 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8187 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8188 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8191 specs
[count
] = tmpl
;
8192 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8196 specs
[count
] = tmpl
;
8197 specs
[count
++].specific
= 0;
8201 else if (note
== 0 && !rsrc_write
)
8203 specs
[count
] = tmpl
;
8204 specs
[count
++].specific
= 0;
8212 case IA64_RS_CR_IRR
:
8215 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8216 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8218 && idesc
->operands
[1] == IA64_OPND_CR3
8221 for (i
= 0; i
< 4; i
++)
8223 specs
[count
] = tmpl
;
8224 specs
[count
++].index
= CR_IRR0
+ i
;
8230 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8231 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8233 && regno
<= CR_IRR3
)
8235 specs
[count
] = tmpl
;
8236 specs
[count
++].index
= regno
;
8245 case IA64_RS_CR_LRR
:
8252 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8253 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8254 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8256 specs
[count
] = tmpl
;
8257 specs
[count
++].index
= regno
;
8265 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8267 specs
[count
] = tmpl
;
8268 specs
[count
++].index
=
8269 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8284 else if (rsrc_write
)
8286 if (dep
->specifier
== IA64_RS_FRb
8287 && idesc
->operands
[0] == IA64_OPND_F1
)
8289 specs
[count
] = tmpl
;
8290 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8295 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8297 if (idesc
->operands
[i
] == IA64_OPND_F2
8298 || idesc
->operands
[i
] == IA64_OPND_F3
8299 || idesc
->operands
[i
] == IA64_OPND_F4
)
8301 specs
[count
] = tmpl
;
8302 specs
[count
++].index
=
8303 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8312 /* This reference applies only to the GR whose value is loaded with
8313 data returned from memory. */
8314 specs
[count
] = tmpl
;
8315 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8321 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8322 if (idesc
->operands
[i
] == IA64_OPND_R1
8323 || idesc
->operands
[i
] == IA64_OPND_R2
8324 || idesc
->operands
[i
] == IA64_OPND_R3
)
8326 specs
[count
] = tmpl
;
8327 specs
[count
++].index
=
8328 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8330 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8331 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8332 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8334 specs
[count
] = tmpl
;
8335 specs
[count
++].index
=
8336 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8341 /* Look for anything that reads a GR. */
8342 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8344 if (idesc
->operands
[i
] == IA64_OPND_MR3
8345 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8346 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8347 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8348 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8349 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8350 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8351 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8352 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8353 || ((i
>= idesc
->num_outputs
)
8354 && (idesc
->operands
[i
] == IA64_OPND_R1
8355 || idesc
->operands
[i
] == IA64_OPND_R2
8356 || idesc
->operands
[i
] == IA64_OPND_R3
8357 /* addl source register. */
8358 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8360 specs
[count
] = tmpl
;
8361 specs
[count
++].index
=
8362 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8373 /* This is the same as IA64_RS_PRr, except that the register range is
8374 from 1 - 15, and there are no rotating register reads/writes here. */
8378 for (i
= 1; i
< 16; i
++)
8380 specs
[count
] = tmpl
;
8381 specs
[count
++].index
= i
;
8387 /* Mark only those registers indicated by the mask. */
8390 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8391 for (i
= 1; i
< 16; i
++)
8392 if (mask
& ((valueT
) 1 << i
))
8394 specs
[count
] = tmpl
;
8395 specs
[count
++].index
= i
;
8403 else if (note
== 11) /* note 11 implies note 1 as well */
8407 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8409 if (idesc
->operands
[i
] == IA64_OPND_P1
8410 || idesc
->operands
[i
] == IA64_OPND_P2
)
8412 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8413 if (regno
>= 1 && regno
< 16)
8415 specs
[count
] = tmpl
;
8416 specs
[count
++].index
= regno
;
8426 else if (note
== 12)
8428 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8430 specs
[count
] = tmpl
;
8431 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8438 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8439 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8440 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8441 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8443 if ((idesc
->operands
[0] == IA64_OPND_P1
8444 || idesc
->operands
[0] == IA64_OPND_P2
)
8445 && p1
>= 1 && p1
< 16)
8447 specs
[count
] = tmpl
;
8448 specs
[count
].cmp_type
=
8449 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8450 specs
[count
++].index
= p1
;
8452 if ((idesc
->operands
[1] == IA64_OPND_P1
8453 || idesc
->operands
[1] == IA64_OPND_P2
)
8454 && p2
>= 1 && p2
< 16)
8456 specs
[count
] = tmpl
;
8457 specs
[count
].cmp_type
=
8458 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8459 specs
[count
++].index
= p2
;
8464 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8466 specs
[count
] = tmpl
;
8467 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8469 if (idesc
->operands
[1] == IA64_OPND_PR
)
8471 for (i
= 1; i
< 16; i
++)
8473 specs
[count
] = tmpl
;
8474 specs
[count
++].index
= i
;
8485 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8486 simplified cases of this. */
8490 for (i
= 16; i
< 63; i
++)
8492 specs
[count
] = tmpl
;
8493 specs
[count
++].index
= i
;
8499 /* Mark only those registers indicated by the mask. */
8501 && idesc
->operands
[0] == IA64_OPND_PR
)
8503 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8504 if (mask
& ((valueT
) 1 << 16))
8505 for (i
= 16; i
< 63; i
++)
8507 specs
[count
] = tmpl
;
8508 specs
[count
++].index
= i
;
8512 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8514 for (i
= 16; i
< 63; i
++)
8516 specs
[count
] = tmpl
;
8517 specs
[count
++].index
= i
;
8525 else if (note
== 11) /* note 11 implies note 1 as well */
8529 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8531 if (idesc
->operands
[i
] == IA64_OPND_P1
8532 || idesc
->operands
[i
] == IA64_OPND_P2
)
8534 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8535 if (regno
>= 16 && regno
< 63)
8537 specs
[count
] = tmpl
;
8538 specs
[count
++].index
= regno
;
8548 else if (note
== 12)
8550 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8552 specs
[count
] = tmpl
;
8553 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8560 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8561 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8562 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8563 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8565 if ((idesc
->operands
[0] == IA64_OPND_P1
8566 || idesc
->operands
[0] == IA64_OPND_P2
)
8567 && p1
>= 16 && p1
< 63)
8569 specs
[count
] = tmpl
;
8570 specs
[count
].cmp_type
=
8571 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8572 specs
[count
++].index
= p1
;
8574 if ((idesc
->operands
[1] == IA64_OPND_P1
8575 || idesc
->operands
[1] == IA64_OPND_P2
)
8576 && p2
>= 16 && p2
< 63)
8578 specs
[count
] = tmpl
;
8579 specs
[count
].cmp_type
=
8580 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8581 specs
[count
++].index
= p2
;
8586 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8588 specs
[count
] = tmpl
;
8589 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8591 if (idesc
->operands
[1] == IA64_OPND_PR
)
8593 for (i
= 16; i
< 63; i
++)
8595 specs
[count
] = tmpl
;
8596 specs
[count
++].index
= i
;
8608 /* Verify that the instruction is using the PSR bit indicated in
8612 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
8614 if (dep
->regindex
< 6)
8616 specs
[count
++] = tmpl
;
8619 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
8621 if (dep
->regindex
< 32
8622 || dep
->regindex
== 35
8623 || dep
->regindex
== 36
8624 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
8626 specs
[count
++] = tmpl
;
8629 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
8631 if (dep
->regindex
< 32
8632 || dep
->regindex
== 35
8633 || dep
->regindex
== 36
8634 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
8636 specs
[count
++] = tmpl
;
8641 /* Several PSR bits have very specific dependencies. */
8642 switch (dep
->regindex
)
8645 specs
[count
++] = tmpl
;
8650 specs
[count
++] = tmpl
;
8654 /* Only certain CR accesses use PSR.ic */
8655 if (idesc
->operands
[0] == IA64_OPND_CR3
8656 || idesc
->operands
[1] == IA64_OPND_CR3
)
8659 ((idesc
->operands
[0] == IA64_OPND_CR3
)
8662 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
8677 specs
[count
++] = tmpl
;
8686 specs
[count
++] = tmpl
;
8690 /* Only some AR accesses use cpl */
8691 if (idesc
->operands
[0] == IA64_OPND_AR3
8692 || idesc
->operands
[1] == IA64_OPND_AR3
)
8695 ((idesc
->operands
[0] == IA64_OPND_AR3
)
8698 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
8705 && regno
<= AR_K7
))))
8707 specs
[count
++] = tmpl
;
8712 specs
[count
++] = tmpl
;
8722 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
8724 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
8730 if (mask
& ((valueT
) 1 << dep
->regindex
))
8732 specs
[count
++] = tmpl
;
8737 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
8738 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
8739 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8740 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8742 if (idesc
->operands
[i
] == IA64_OPND_F1
8743 || idesc
->operands
[i
] == IA64_OPND_F2
8744 || idesc
->operands
[i
] == IA64_OPND_F3
8745 || idesc
->operands
[i
] == IA64_OPND_F4
)
8747 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8748 if (reg
>= min
&& reg
<= max
)
8750 specs
[count
++] = tmpl
;
8757 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
8758 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
8759 /* mfh is read on writes to FR32-127; mfl is read on writes to
8761 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8763 if (idesc
->operands
[i
] == IA64_OPND_F1
)
8765 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8766 if (reg
>= min
&& reg
<= max
)
8768 specs
[count
++] = tmpl
;
8773 else if (note
== 10)
8775 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8777 if (idesc
->operands
[i
] == IA64_OPND_R1
8778 || idesc
->operands
[i
] == IA64_OPND_R2
8779 || idesc
->operands
[i
] == IA64_OPND_R3
)
8781 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8782 if (regno
>= 16 && regno
<= 31)
8784 specs
[count
++] = tmpl
;
8795 case IA64_RS_AR_FPSR
:
8796 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8798 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8799 if (regno
== AR_FPSR
)
8801 specs
[count
++] = tmpl
;
8806 specs
[count
++] = tmpl
;
8811 /* Handle all AR[REG] resources */
8812 if (note
== 0 || note
== 1)
8814 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8815 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
8816 && regno
== dep
->regindex
)
8818 specs
[count
++] = tmpl
;
8820 /* other AR[REG] resources may be affected by AR accesses */
8821 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
8824 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
8825 switch (dep
->regindex
)
8831 if (regno
== AR_BSPSTORE
)
8833 specs
[count
++] = tmpl
;
8837 (regno
== AR_BSPSTORE
8838 || regno
== AR_RNAT
))
8840 specs
[count
++] = tmpl
;
8845 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
8848 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
8849 switch (dep
->regindex
)
8854 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
8856 specs
[count
++] = tmpl
;
8863 specs
[count
++] = tmpl
;
8873 /* Handle all CR[REG] resources */
8874 if (note
== 0 || note
== 1)
8876 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8878 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8879 if (regno
== dep
->regindex
)
8881 specs
[count
++] = tmpl
;
8883 else if (!rsrc_write
)
8885 /* Reads from CR[IVR] affect other resources. */
8886 if (regno
== CR_IVR
)
8888 if ((dep
->regindex
>= CR_IRR0
8889 && dep
->regindex
<= CR_IRR3
)
8890 || dep
->regindex
== CR_TPR
)
8892 specs
[count
++] = tmpl
;
8899 specs
[count
++] = tmpl
;
8908 case IA64_RS_INSERVICE
:
8909 /* look for write of EOI (67) or read of IVR (65) */
8910 if ((idesc
->operands
[0] == IA64_OPND_CR3
8911 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
8912 || (idesc
->operands
[1] == IA64_OPND_CR3
8913 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
8915 specs
[count
++] = tmpl
;
8922 specs
[count
++] = tmpl
;
8933 specs
[count
++] = tmpl
;
8937 /* Check if any of the registers accessed are in the rotating region.
8938 mov to/from pr accesses CFM only when qp_regno is in the rotating
8940 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8942 if (idesc
->operands
[i
] == IA64_OPND_R1
8943 || idesc
->operands
[i
] == IA64_OPND_R2
8944 || idesc
->operands
[i
] == IA64_OPND_R3
)
8946 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8947 /* Assumes that md.rot.num_regs is always valid */
8948 if (md
.rot
.num_regs
> 0
8950 && num
< 31 + md
.rot
.num_regs
)
8952 specs
[count
] = tmpl
;
8953 specs
[count
++].specific
= 0;
8956 else if (idesc
->operands
[i
] == IA64_OPND_F1
8957 || idesc
->operands
[i
] == IA64_OPND_F2
8958 || idesc
->operands
[i
] == IA64_OPND_F3
8959 || idesc
->operands
[i
] == IA64_OPND_F4
)
8961 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8964 specs
[count
] = tmpl
;
8965 specs
[count
++].specific
= 0;
8968 else if (idesc
->operands
[i
] == IA64_OPND_P1
8969 || idesc
->operands
[i
] == IA64_OPND_P2
)
8971 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8974 specs
[count
] = tmpl
;
8975 specs
[count
++].specific
= 0;
8979 if (CURR_SLOT
.qp_regno
> 15)
8981 specs
[count
] = tmpl
;
8982 specs
[count
++].specific
= 0;
8987 /* This is the same as IA64_RS_PRr, except simplified to account for
8988 the fact that there is only one register. */
8992 specs
[count
++] = tmpl
;
8997 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
8998 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8999 if (mask
& ((valueT
) 1 << 63))
9000 specs
[count
++] = tmpl
;
9002 else if (note
== 11)
9004 if ((idesc
->operands
[0] == IA64_OPND_P1
9005 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9006 || (idesc
->operands
[1] == IA64_OPND_P2
9007 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9009 specs
[count
++] = tmpl
;
9012 else if (note
== 12)
9014 if (CURR_SLOT
.qp_regno
== 63)
9016 specs
[count
++] = tmpl
;
9023 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9024 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9025 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9026 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9029 && (idesc
->operands
[0] == IA64_OPND_P1
9030 || idesc
->operands
[0] == IA64_OPND_P2
))
9032 specs
[count
] = tmpl
;
9033 specs
[count
++].cmp_type
=
9034 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9037 && (idesc
->operands
[1] == IA64_OPND_P1
9038 || idesc
->operands
[1] == IA64_OPND_P2
))
9040 specs
[count
] = tmpl
;
9041 specs
[count
++].cmp_type
=
9042 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9047 if (CURR_SLOT
.qp_regno
== 63)
9049 specs
[count
++] = tmpl
;
9060 /* FIXME we can identify some individual RSE written resources, but RSE
9061 read resources have not yet been completely identified, so for now
9062 treat RSE as a single resource */
9063 if (strncmp (idesc
->name
, "mov", 3) == 0)
9067 if (idesc
->operands
[0] == IA64_OPND_AR3
9068 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9070 specs
[count
] = tmpl
;
9071 specs
[count
++].index
= 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
9076 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9078 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9079 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9081 specs
[count
++] = tmpl
;
9084 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9086 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9087 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9088 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9090 specs
[count
++] = tmpl
;
9097 specs
[count
++] = tmpl
;
9102 /* FIXME -- do any of these need to be non-specific? */
9103 specs
[count
++] = tmpl
;
9107 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9114 /* Clear branch flags on marked resources. This breaks the link between the
9115 QP of the marking instruction and a subsequent branch on the same QP. */
9118 clear_qp_branch_flag (mask
)
9122 for (i
= 0; i
< regdepslen
; i
++)
9124 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9125 if ((bit
& mask
) != 0)
9127 regdeps
[i
].link_to_qp_branch
= 0;
9132 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9133 any mutexes which contain one of the PRs and create new ones when
9137 update_qp_mutex (valueT mask
)
9143 while (i
< qp_mutexeslen
)
9145 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9147 /* If it destroys and creates the same mutex, do nothing. */
9148 if (qp_mutexes
[i
].prmask
== mask
9149 && qp_mutexes
[i
].path
== md
.path
)
9160 fprintf (stderr
, " Clearing mutex relation");
9161 print_prmask (qp_mutexes
[i
].prmask
);
9162 fprintf (stderr
, "\n");
9165 /* Deal with the old mutex with more than 3+ PRs only if
9166 the new mutex on the same execution path with it.
9168 FIXME: The 3+ mutex support is incomplete.
9169 dot_pred_rel () may be a better place to fix it. */
9170 if (qp_mutexes
[i
].path
== md
.path
)
9172 /* If it is a proper subset of the mutex, create a
9175 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9178 qp_mutexes
[i
].prmask
&= ~mask
;
9179 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9181 /* Modify the mutex if there are more than one
9189 /* Remove the mutex. */
9190 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9198 add_qp_mutex (mask
);
9203 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9205 Any changes to a PR clears the mutex relations which include that PR. */
9208 clear_qp_mutex (mask
)
9214 while (i
< qp_mutexeslen
)
9216 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9220 fprintf (stderr
, " Clearing mutex relation");
9221 print_prmask (qp_mutexes
[i
].prmask
);
9222 fprintf (stderr
, "\n");
9224 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9231 /* Clear implies relations which contain PRs in the given masks.
9232 P1_MASK indicates the source of the implies relation, while P2_MASK
9233 indicates the implied PR. */
9236 clear_qp_implies (p1_mask
, p2_mask
)
9243 while (i
< qp_implieslen
)
9245 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9246 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9249 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9250 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9251 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9258 /* Add the PRs specified to the list of implied relations. */
9261 add_qp_imply (p1
, p2
)
9268 /* p0 is not meaningful here. */
9269 if (p1
== 0 || p2
== 0)
9275 /* If it exists already, ignore it. */
9276 for (i
= 0; i
< qp_implieslen
; i
++)
9278 if (qp_implies
[i
].p1
== p1
9279 && qp_implies
[i
].p2
== p2
9280 && qp_implies
[i
].path
== md
.path
9281 && !qp_implies
[i
].p2_branched
)
9285 if (qp_implieslen
== qp_impliestotlen
)
9287 qp_impliestotlen
+= 20;
9288 qp_implies
= (struct qp_imply
*)
9289 xrealloc ((void *) qp_implies
,
9290 qp_impliestotlen
* sizeof (struct qp_imply
));
9293 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9294 qp_implies
[qp_implieslen
].p1
= p1
;
9295 qp_implies
[qp_implieslen
].p2
= p2
;
9296 qp_implies
[qp_implieslen
].path
= md
.path
;
9297 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9299 /* Add in the implied transitive relations; for everything that p2 implies,
9300 make p1 imply that, too; for everything that implies p1, make it imply p2
9302 for (i
= 0; i
< qp_implieslen
; i
++)
9304 if (qp_implies
[i
].p1
== p2
)
9305 add_qp_imply (p1
, qp_implies
[i
].p2
);
9306 if (qp_implies
[i
].p2
== p1
)
9307 add_qp_imply (qp_implies
[i
].p1
, p2
);
9309 /* Add in mutex relations implied by this implies relation; for each mutex
9310 relation containing p2, duplicate it and replace p2 with p1. */
9311 bit
= (valueT
) 1 << p1
;
9312 mask
= (valueT
) 1 << p2
;
9313 for (i
= 0; i
< qp_mutexeslen
; i
++)
9315 if (qp_mutexes
[i
].prmask
& mask
)
9316 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9320 /* Add the PRs specified in the mask to the mutex list; this means that only
9321 one of the PRs can be true at any time. PR0 should never be included in
9331 if (qp_mutexeslen
== qp_mutexestotlen
)
9333 qp_mutexestotlen
+= 20;
9334 qp_mutexes
= (struct qpmutex
*)
9335 xrealloc ((void *) qp_mutexes
,
9336 qp_mutexestotlen
* sizeof (struct qpmutex
));
9340 fprintf (stderr
, " Registering mutex on");
9341 print_prmask (mask
);
9342 fprintf (stderr
, "\n");
9344 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9345 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9349 has_suffix_p (name
, suffix
)
9353 size_t namelen
= strlen (name
);
9354 size_t sufflen
= strlen (suffix
);
9356 if (namelen
<= sufflen
)
9358 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9362 clear_register_values ()
9366 fprintf (stderr
, " Clearing register values\n");
9367 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9368 gr_values
[i
].known
= 0;
9371 /* Keep track of register values/changes which affect DV tracking.
9373 optimization note: should add a flag to classes of insns where otherwise we
9374 have to examine a group of strings to identify them. */
9377 note_register_values (idesc
)
9378 struct ia64_opcode
*idesc
;
9380 valueT qp_changemask
= 0;
9383 /* Invalidate values for registers being written to. */
9384 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9386 if (idesc
->operands
[i
] == IA64_OPND_R1
9387 || idesc
->operands
[i
] == IA64_OPND_R2
9388 || idesc
->operands
[i
] == IA64_OPND_R3
)
9390 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9391 if (regno
> 0 && regno
< NELEMS (gr_values
))
9392 gr_values
[regno
].known
= 0;
9394 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9396 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9397 if (regno
> 0 && regno
< 4)
9398 gr_values
[regno
].known
= 0;
9400 else if (idesc
->operands
[i
] == IA64_OPND_P1
9401 || idesc
->operands
[i
] == IA64_OPND_P2
)
9403 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9404 qp_changemask
|= (valueT
) 1 << regno
;
9406 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9408 if (idesc
->operands
[2] & (valueT
) 0x10000)
9409 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9411 qp_changemask
= idesc
->operands
[2];
9414 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9416 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9417 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9419 qp_changemask
= idesc
->operands
[1];
9420 qp_changemask
&= ~(valueT
) 0xFFFF;
9425 /* Always clear qp branch flags on any PR change. */
9426 /* FIXME there may be exceptions for certain compares. */
9427 clear_qp_branch_flag (qp_changemask
);
9429 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9430 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9432 qp_changemask
|= ~(valueT
) 0xFFFF;
9433 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9435 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9436 gr_values
[i
].known
= 0;
9438 clear_qp_mutex (qp_changemask
);
9439 clear_qp_implies (qp_changemask
, qp_changemask
);
9441 /* After a call, all register values are undefined, except those marked
9443 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9444 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9446 /* FIXME keep GR values which are marked as "safe_across_calls" */
9447 clear_register_values ();
9448 clear_qp_mutex (~qp_safe_across_calls
);
9449 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9450 clear_qp_branch_flag (~qp_safe_across_calls
);
9452 else if (is_interruption_or_rfi (idesc
)
9453 || is_taken_branch (idesc
))
9455 clear_register_values ();
9456 clear_qp_mutex (~(valueT
) 0);
9457 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9459 /* Look for mutex and implies relations. */
9460 else if ((idesc
->operands
[0] == IA64_OPND_P1
9461 || idesc
->operands
[0] == IA64_OPND_P2
)
9462 && (idesc
->operands
[1] == IA64_OPND_P1
9463 || idesc
->operands
[1] == IA64_OPND_P2
))
9465 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9466 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9467 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9468 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9470 /* If both PRs are PR0, we can't really do anything. */
9471 if (p1
== 0 && p2
== 0)
9474 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9476 /* In general, clear mutexes and implies which include P1 or P2,
9477 with the following exceptions. */
9478 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9479 || has_suffix_p (idesc
->name
, ".and.orcm"))
9481 clear_qp_implies (p2mask
, p1mask
);
9483 else if (has_suffix_p (idesc
->name
, ".andcm")
9484 || has_suffix_p (idesc
->name
, ".and"))
9486 clear_qp_implies (0, p1mask
| p2mask
);
9488 else if (has_suffix_p (idesc
->name
, ".orcm")
9489 || has_suffix_p (idesc
->name
, ".or"))
9491 clear_qp_mutex (p1mask
| p2mask
);
9492 clear_qp_implies (p1mask
| p2mask
, 0);
9498 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9500 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9501 if (p1
== 0 || p2
== 0)
9502 clear_qp_mutex (p1mask
| p2mask
);
9504 added
= update_qp_mutex (p1mask
| p2mask
);
9506 if (CURR_SLOT
.qp_regno
== 0
9507 || has_suffix_p (idesc
->name
, ".unc"))
9509 if (added
== 0 && p1
&& p2
)
9510 add_qp_mutex (p1mask
| p2mask
);
9511 if (CURR_SLOT
.qp_regno
!= 0)
9514 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9516 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9521 /* Look for mov imm insns into GRs. */
9522 else if (idesc
->operands
[0] == IA64_OPND_R1
9523 && (idesc
->operands
[1] == IA64_OPND_IMM22
9524 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9525 && (strcmp (idesc
->name
, "mov") == 0
9526 || strcmp (idesc
->name
, "movl") == 0))
9528 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9529 if (regno
> 0 && regno
< NELEMS (gr_values
))
9531 gr_values
[regno
].known
= 1;
9532 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9533 gr_values
[regno
].path
= md
.path
;
9536 fprintf (stderr
, " Know gr%d = ", regno
);
9537 fprintf_vma (stderr
, gr_values
[regno
].value
);
9538 fputs ("\n", stderr
);
9544 clear_qp_mutex (qp_changemask
);
9545 clear_qp_implies (qp_changemask
, qp_changemask
);
9549 /* Return whether the given predicate registers are currently mutex. */
9552 qp_mutex (p1
, p2
, path
)
9562 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9563 for (i
= 0; i
< qp_mutexeslen
; i
++)
9565 if (qp_mutexes
[i
].path
>= path
9566 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9573 /* Return whether the given resource is in the given insn's list of chks
9574 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9578 resources_match (rs
, idesc
, note
, qp_regno
, path
)
9580 struct ia64_opcode
*idesc
;
9585 struct rsrc specs
[MAX_SPECS
];
9588 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9589 we don't need to check. One exception is note 11, which indicates that
9590 target predicates are written regardless of PR[qp]. */
9591 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
9595 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
9598 /* UNAT checking is a bit more specific than other resources */
9599 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
9600 && specs
[count
].mem_offset
.hint
9601 && rs
->mem_offset
.hint
)
9603 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
9605 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
9606 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
9613 /* Skip apparent PR write conflicts where both writes are an AND or both
9614 writes are an OR. */
9615 if (rs
->dependency
->specifier
== IA64_RS_PR
9616 || rs
->dependency
->specifier
== IA64_RS_PRr
9617 || rs
->dependency
->specifier
== IA64_RS_PR63
)
9619 if (specs
[count
].cmp_type
!= CMP_NONE
9620 && specs
[count
].cmp_type
== rs
->cmp_type
)
9623 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
9624 dv_mode
[rs
->dependency
->mode
],
9625 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9626 specs
[count
].index
: 63);
9631 " %s on parallel compare conflict %s vs %s on PR%d\n",
9632 dv_mode
[rs
->dependency
->mode
],
9633 dv_cmp_type
[rs
->cmp_type
],
9634 dv_cmp_type
[specs
[count
].cmp_type
],
9635 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9636 specs
[count
].index
: 63);
9640 /* If either resource is not specific, conservatively assume a conflict
9642 if (!specs
[count
].specific
|| !rs
->specific
)
9644 else if (specs
[count
].index
== rs
->index
)
9649 fprintf (stderr
, " No %s conflicts\n", rs
->dependency
->name
);
9655 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9656 insert a stop to create the break. Update all resource dependencies
9657 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9658 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9659 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9663 insn_group_break (insert_stop
, qp_regno
, save_current
)
9670 if (insert_stop
&& md
.num_slots_in_use
> 0)
9671 PREV_SLOT
.end_of_insn_group
= 1;
9675 fprintf (stderr
, " Insn group break%s",
9676 (insert_stop
? " (w/stop)" : ""));
9678 fprintf (stderr
, " effective for QP=%d", qp_regno
);
9679 fprintf (stderr
, "\n");
9683 while (i
< regdepslen
)
9685 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
9688 && regdeps
[i
].qp_regno
!= qp_regno
)
9695 && CURR_SLOT
.src_file
== regdeps
[i
].file
9696 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
9702 /* clear dependencies which are automatically cleared by a stop, or
9703 those that have reached the appropriate state of insn serialization */
9704 if (dep
->semantics
== IA64_DVS_IMPLIED
9705 || dep
->semantics
== IA64_DVS_IMPLIEDF
9706 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
9708 print_dependency ("Removing", i
);
9709 regdeps
[i
] = regdeps
[--regdepslen
];
9713 if (dep
->semantics
== IA64_DVS_DATA
9714 || dep
->semantics
== IA64_DVS_INSTR
9715 || dep
->semantics
== IA64_DVS_SPECIFIC
)
9717 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
9718 regdeps
[i
].insn_srlz
= STATE_STOP
;
9719 if (regdeps
[i
].data_srlz
== STATE_NONE
)
9720 regdeps
[i
].data_srlz
= STATE_STOP
;
9727 /* Add the given resource usage spec to the list of active dependencies. */
9730 mark_resource (idesc
, dep
, spec
, depind
, path
)
9731 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
9732 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
9737 if (regdepslen
== regdepstotlen
)
9739 regdepstotlen
+= 20;
9740 regdeps
= (struct rsrc
*)
9741 xrealloc ((void *) regdeps
,
9742 regdepstotlen
* sizeof (struct rsrc
));
9745 regdeps
[regdepslen
] = *spec
;
9746 regdeps
[regdepslen
].depind
= depind
;
9747 regdeps
[regdepslen
].path
= path
;
9748 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
9749 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
9751 print_dependency ("Adding", regdepslen
);
9757 print_dependency (action
, depind
)
9763 fprintf (stderr
, " %s %s '%s'",
9764 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
9765 (regdeps
[depind
].dependency
)->name
);
9766 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
!= 0)
9767 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
9768 if (regdeps
[depind
].mem_offset
.hint
)
9770 fputs (" ", stderr
);
9771 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
9772 fputs ("+", stderr
);
9773 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
9775 fprintf (stderr
, "\n");
9780 instruction_serialization ()
9784 fprintf (stderr
, " Instruction serialization\n");
9785 for (i
= 0; i
< regdepslen
; i
++)
9786 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
9787 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
9791 data_serialization ()
9795 fprintf (stderr
, " Data serialization\n");
9796 while (i
< regdepslen
)
9798 if (regdeps
[i
].data_srlz
== STATE_STOP
9799 /* Note: as of 991210, all "other" dependencies are cleared by a
9800 data serialization. This might change with new tables */
9801 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
9803 print_dependency ("Removing", i
);
9804 regdeps
[i
] = regdeps
[--regdepslen
];
9811 /* Insert stops and serializations as needed to avoid DVs. */
9814 remove_marked_resource (rs
)
9817 switch (rs
->dependency
->semantics
)
9819 case IA64_DVS_SPECIFIC
:
9821 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
9822 /* ...fall through... */
9823 case IA64_DVS_INSTR
:
9825 fprintf (stderr
, "Inserting instr serialization\n");
9826 if (rs
->insn_srlz
< STATE_STOP
)
9827 insn_group_break (1, 0, 0);
9828 if (rs
->insn_srlz
< STATE_SRLZ
)
9830 struct slot oldslot
= CURR_SLOT
;
9831 /* Manually jam a srlz.i insn into the stream */
9832 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
9833 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
9834 instruction_serialization ();
9835 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9836 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9838 CURR_SLOT
= oldslot
;
9840 insn_group_break (1, 0, 0);
9842 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
9843 "other" types of DV are eliminated
9844 by a data serialization */
9847 fprintf (stderr
, "Inserting data serialization\n");
9848 if (rs
->data_srlz
< STATE_STOP
)
9849 insn_group_break (1, 0, 0);
9851 struct slot oldslot
= CURR_SLOT
;
9852 /* Manually jam a srlz.d insn into the stream */
9853 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
9854 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
9855 data_serialization ();
9856 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9857 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9859 CURR_SLOT
= oldslot
;
9862 case IA64_DVS_IMPLIED
:
9863 case IA64_DVS_IMPLIEDF
:
9865 fprintf (stderr
, "Inserting stop\n");
9866 insn_group_break (1, 0, 0);
9873 /* Check the resources used by the given opcode against the current dependency
9876 The check is run once for each execution path encountered. In this case,
9877 a unique execution path is the sequence of instructions following a code
9878 entry point, e.g. the following has three execution paths, one starting
9879 at L0, one at L1, and one at L2.
9888 check_dependencies (idesc
)
9889 struct ia64_opcode
*idesc
;
9891 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
9895 /* Note that the number of marked resources may change within the
9896 loop if in auto mode. */
9898 while (i
< regdepslen
)
9900 struct rsrc
*rs
= ®deps
[i
];
9901 const struct ia64_dependency
*dep
= rs
->dependency
;
9906 if (dep
->semantics
== IA64_DVS_NONE
9907 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
9913 note
= NOTE (opdeps
->chks
[chkind
]);
9915 /* Check this resource against each execution path seen thus far. */
9916 for (path
= 0; path
<= md
.path
; path
++)
9920 /* If the dependency wasn't on the path being checked, ignore it. */
9921 if (rs
->path
< path
)
9924 /* If the QP for this insn implies a QP which has branched, don't
9925 bother checking. Ed. NOTE: I don't think this check is terribly
9926 useful; what's the point of generating code which will only be
9927 reached if its QP is zero?
9928 This code was specifically inserted to handle the following code,
9929 based on notes from Intel's DV checking code, where p1 implies p2.
9935 if (CURR_SLOT
.qp_regno
!= 0)
9939 for (implies
= 0; implies
< qp_implieslen
; implies
++)
9941 if (qp_implies
[implies
].path
>= path
9942 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
9943 && qp_implies
[implies
].p2_branched
)
9953 if ((matchtype
= resources_match (rs
, idesc
, note
,
9954 CURR_SLOT
.qp_regno
, path
)) != 0)
9957 char pathmsg
[256] = "";
9958 char indexmsg
[256] = "";
9959 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
9962 sprintf (pathmsg
, " when entry is at label '%s'",
9963 md
.entry_labels
[path
- 1]);
9964 if (rs
->specific
&& rs
->index
!= 0)
9965 sprintf (indexmsg
, ", specific resource number is %d",
9967 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9969 (certain
? "violates" : "may violate"),
9970 dv_mode
[dep
->mode
], dep
->name
,
9971 dv_sem
[dep
->semantics
],
9974 if (md
.explicit_mode
)
9976 as_warn ("%s", msg
);
9978 as_warn (_("Only the first path encountering the conflict "
9980 as_warn_where (rs
->file
, rs
->line
,
9981 _("This is the location of the "
9982 "conflicting usage"));
9983 /* Don't bother checking other paths, to avoid duplicating
9990 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
9992 remove_marked_resource (rs
);
9994 /* since the set of dependencies has changed, start over */
9995 /* FIXME -- since we're removing dvs as we go, we
9996 probably don't really need to start over... */
10009 /* Register new dependencies based on the given opcode. */
10012 mark_resources (idesc
)
10013 struct ia64_opcode
*idesc
;
10016 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10017 int add_only_qp_reads
= 0;
10019 /* A conditional branch only uses its resources if it is taken; if it is
10020 taken, we stop following that path. The other branch types effectively
10021 *always* write their resources. If it's not taken, register only QP
10023 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10025 add_only_qp_reads
= 1;
10029 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10031 for (i
= 0; i
< opdeps
->nregs
; i
++)
10033 const struct ia64_dependency
*dep
;
10034 struct rsrc specs
[MAX_SPECS
];
10039 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10040 note
= NOTE (opdeps
->regs
[i
]);
10042 if (add_only_qp_reads
10043 && !(dep
->mode
== IA64_DV_WAR
10044 && (dep
->specifier
== IA64_RS_PR
10045 || dep
->specifier
== IA64_RS_PRr
10046 || dep
->specifier
== IA64_RS_PR63
)))
10049 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10052 if (md
.debug_dv
&& !count
)
10053 fprintf (stderr
, " No %s %s usage found (path %d)\n",
10054 dv_mode
[dep
->mode
], dep
->name
, md
.path
);
10057 while (count
-- > 0)
10059 mark_resource (idesc
, dep
, &specs
[count
],
10060 DEP (opdeps
->regs
[i
]), md
.path
);
10063 /* The execution path may affect register values, which may in turn
10064 affect which indirect-access resources are accessed. */
10065 switch (dep
->specifier
)
10069 case IA64_RS_CPUID
:
10077 for (path
= 0; path
< md
.path
; path
++)
10079 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10080 while (count
-- > 0)
10081 mark_resource (idesc
, dep
, &specs
[count
],
10082 DEP (opdeps
->regs
[i
]), path
);
10089 /* Remove dependencies when they no longer apply. */
10092 update_dependencies (idesc
)
10093 struct ia64_opcode
*idesc
;
10097 if (strcmp (idesc
->name
, "srlz.i") == 0)
10099 instruction_serialization ();
10101 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10103 data_serialization ();
10105 else if (is_interruption_or_rfi (idesc
)
10106 || is_taken_branch (idesc
))
10108 /* Although technically the taken branch doesn't clear dependencies
10109 which require a srlz.[id], we don't follow the branch; the next
10110 instruction is assumed to start with a clean slate. */
10114 else if (is_conditional_branch (idesc
)
10115 && CURR_SLOT
.qp_regno
!= 0)
10117 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10119 for (i
= 0; i
< qp_implieslen
; i
++)
10121 /* If the conditional branch's predicate is implied by the predicate
10122 in an existing dependency, remove that dependency. */
10123 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10126 /* Note that this implied predicate takes a branch so that if
10127 a later insn generates a DV but its predicate implies this
10128 one, we can avoid the false DV warning. */
10129 qp_implies
[i
].p2_branched
= 1;
10130 while (depind
< regdepslen
)
10132 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10134 print_dependency ("Removing", depind
);
10135 regdeps
[depind
] = regdeps
[--regdepslen
];
10142 /* Any marked resources which have this same predicate should be
10143 cleared, provided that the QP hasn't been modified between the
10144 marking instruction and the branch. */
10147 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10152 while (i
< regdepslen
)
10154 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10155 && regdeps
[i
].link_to_qp_branch
10156 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10157 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10159 /* Treat like a taken branch */
10160 print_dependency ("Removing", i
);
10161 regdeps
[i
] = regdeps
[--regdepslen
];
10170 /* Examine the current instruction for dependency violations. */
10174 struct ia64_opcode
*idesc
;
10178 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10179 idesc
->name
, CURR_SLOT
.src_line
,
10180 idesc
->dependencies
->nchks
,
10181 idesc
->dependencies
->nregs
);
10184 /* Look through the list of currently marked resources; if the current
10185 instruction has the dependency in its chks list which uses that resource,
10186 check against the specific resources used. */
10187 check_dependencies (idesc
);
10189 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10190 then add them to the list of marked resources. */
10191 mark_resources (idesc
);
10193 /* There are several types of dependency semantics, and each has its own
10194 requirements for being cleared
10196 Instruction serialization (insns separated by interruption, rfi, or
10197 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10199 Data serialization (instruction serialization, or writer + srlz.d +
10200 reader, where writer and srlz.d are in separate groups) clears
10201 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10202 always be the case).
10204 Instruction group break (groups separated by stop, taken branch,
10205 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10207 update_dependencies (idesc
);
10209 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10210 warning. Keep track of as many as possible that are useful. */
10211 note_register_values (idesc
);
10213 /* We don't need or want this anymore. */
10214 md
.mem_offset
.hint
= 0;
10219 /* Translate one line of assembly. Pseudo ops and labels do not show
10225 char *saved_input_line_pointer
, *mnemonic
;
10226 const struct pseudo_opcode
*pdesc
;
10227 struct ia64_opcode
*idesc
;
10228 unsigned char qp_regno
;
10229 unsigned int flags
;
10232 saved_input_line_pointer
= input_line_pointer
;
10233 input_line_pointer
= str
;
10235 /* extract the opcode (mnemonic): */
10237 mnemonic
= input_line_pointer
;
10238 ch
= get_symbol_end ();
10239 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10242 *input_line_pointer
= ch
;
10243 (*pdesc
->handler
) (pdesc
->arg
);
10247 /* Find the instruction descriptor matching the arguments. */
10249 idesc
= ia64_find_opcode (mnemonic
);
10250 *input_line_pointer
= ch
;
10253 as_bad ("Unknown opcode `%s'", mnemonic
);
10257 idesc
= parse_operands (idesc
);
10261 /* Handle the dynamic ops we can handle now: */
10262 if (idesc
->type
== IA64_TYPE_DYN
)
10264 if (strcmp (idesc
->name
, "add") == 0)
10266 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10267 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10271 ia64_free_opcode (idesc
);
10272 idesc
= ia64_find_opcode (mnemonic
);
10274 know (!idesc
->next
);
10277 else if (strcmp (idesc
->name
, "mov") == 0)
10279 enum ia64_opnd opnd1
, opnd2
;
10282 opnd1
= idesc
->operands
[0];
10283 opnd2
= idesc
->operands
[1];
10284 if (opnd1
== IA64_OPND_AR3
)
10286 else if (opnd2
== IA64_OPND_AR3
)
10290 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10292 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10293 mnemonic
= "mov.i";
10294 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10295 mnemonic
= "mov.m";
10303 ia64_free_opcode (idesc
);
10304 idesc
= ia64_find_opcode (mnemonic
);
10305 while (idesc
!= NULL
10306 && (idesc
->operands
[0] != opnd1
10307 || idesc
->operands
[1] != opnd2
))
10308 idesc
= get_next_opcode (idesc
);
10312 else if (strcmp (idesc
->name
, "mov.i") == 0
10313 || strcmp (idesc
->name
, "mov.m") == 0)
10315 enum ia64_opnd opnd1
, opnd2
;
10318 opnd1
= idesc
->operands
[0];
10319 opnd2
= idesc
->operands
[1];
10320 if (opnd1
== IA64_OPND_AR3
)
10322 else if (opnd2
== IA64_OPND_AR3
)
10326 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10329 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10331 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10333 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10334 as_bad ("AR %d cannot be accessed by %c-unit",
10335 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10341 if (md
.qp
.X_op
== O_register
)
10343 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10344 md
.qp
.X_op
= O_absent
;
10347 flags
= idesc
->flags
;
10349 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10351 /* The alignment frag has to end with a stop bit only if the
10352 next instruction after the alignment directive has to be
10353 the first instruction in an instruction group. */
10356 while (align_frag
->fr_type
!= rs_align_code
)
10358 align_frag
= align_frag
->fr_next
;
10362 /* align_frag can be NULL if there are directives in
10364 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10365 align_frag
->tc_frag_data
= 1;
10368 insn_group_break (1, 0, 0);
10372 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10374 as_bad ("`%s' cannot be predicated", idesc
->name
);
10378 /* Build the instruction. */
10379 CURR_SLOT
.qp_regno
= qp_regno
;
10380 CURR_SLOT
.idesc
= idesc
;
10381 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10382 dwarf2_where (&CURR_SLOT
.debug_line
);
10384 /* Add unwind entry, if there is one. */
10385 if (unwind
.current_entry
)
10387 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10388 unwind
.current_entry
= NULL
;
10390 if (unwind
.proc_start
&& S_IS_DEFINED (unwind
.proc_start
))
10393 /* Check for dependency violations. */
10397 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10398 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10399 emit_one_bundle ();
10401 if ((flags
& IA64_OPCODE_LAST
) != 0)
10402 insn_group_break (1, 0, 0);
10404 md
.last_text_seg
= now_seg
;
10407 input_line_pointer
= saved_input_line_pointer
;
10410 /* Called when symbol NAME cannot be found in the symbol table.
10411 Should be used for dynamic valued symbols only. */
10414 md_undefined_symbol (name
)
10415 char *name ATTRIBUTE_UNUSED
;
10420 /* Called for any expression that can not be recognized. When the
10421 function is called, `input_line_pointer' will point to the start of
10428 enum pseudo_type pseudo_type
;
10433 switch (*input_line_pointer
)
10436 /* Find what relocation pseudo-function we're dealing with. */
10438 ch
= *++input_line_pointer
;
10439 for (i
= 0; i
< NELEMS (pseudo_func
); ++i
)
10440 if (pseudo_func
[i
].name
&& pseudo_func
[i
].name
[0] == ch
)
10442 len
= strlen (pseudo_func
[i
].name
);
10443 if (strncmp (pseudo_func
[i
].name
+ 1,
10444 input_line_pointer
+ 1, len
- 1) == 0
10445 && !is_part_of_name (input_line_pointer
[len
]))
10447 input_line_pointer
+= len
;
10448 pseudo_type
= pseudo_func
[i
].type
;
10452 switch (pseudo_type
)
10454 case PSEUDO_FUNC_RELOC
:
10455 SKIP_WHITESPACE ();
10456 if (*input_line_pointer
!= '(')
10458 as_bad ("Expected '('");
10462 ++input_line_pointer
;
10464 if (*input_line_pointer
++ != ')')
10466 as_bad ("Missing ')'");
10469 if (e
->X_op
!= O_symbol
)
10471 if (e
->X_op
!= O_pseudo_fixup
)
10473 as_bad ("Not a symbolic expression");
10476 if (i
!= FUNC_LT_RELATIVE
)
10478 as_bad ("Illegal combination of relocation functions");
10481 switch (S_GET_VALUE (e
->X_op_symbol
))
10483 case FUNC_FPTR_RELATIVE
:
10484 i
= FUNC_LT_FPTR_RELATIVE
; break;
10485 case FUNC_DTP_MODULE
:
10486 i
= FUNC_LT_DTP_MODULE
; break;
10487 case FUNC_DTP_RELATIVE
:
10488 i
= FUNC_LT_DTP_RELATIVE
; break;
10489 case FUNC_TP_RELATIVE
:
10490 i
= FUNC_LT_TP_RELATIVE
; break;
10492 as_bad ("Illegal combination of relocation functions");
10496 /* Make sure gas doesn't get rid of local symbols that are used
10498 e
->X_op
= O_pseudo_fixup
;
10499 e
->X_op_symbol
= pseudo_func
[i
].u
.sym
;
10502 case PSEUDO_FUNC_CONST
:
10503 e
->X_op
= O_constant
;
10504 e
->X_add_number
= pseudo_func
[i
].u
.ival
;
10507 case PSEUDO_FUNC_REG
:
10508 e
->X_op
= O_register
;
10509 e
->X_add_number
= pseudo_func
[i
].u
.ival
;
10513 name
= input_line_pointer
- 1;
10515 as_bad ("Unknown pseudo function `%s'", name
);
10521 ++input_line_pointer
;
10523 if (*input_line_pointer
!= ']')
10525 as_bad ("Closing bracket misssing");
10530 if (e
->X_op
!= O_register
)
10531 as_bad ("Register expected as index");
10533 ++input_line_pointer
;
10544 ignore_rest_of_line ();
10547 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10548 a section symbol plus some offset. For relocs involving @fptr(),
10549 directives we don't want such adjustments since we need to have the
10550 original symbol's name in the reloc. */
10552 ia64_fix_adjustable (fix
)
10555 /* Prevent all adjustments to global symbols */
10556 if (S_IS_EXTERN (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10559 switch (fix
->fx_r_type
)
10561 case BFD_RELOC_IA64_FPTR64I
:
10562 case BFD_RELOC_IA64_FPTR32MSB
:
10563 case BFD_RELOC_IA64_FPTR32LSB
:
10564 case BFD_RELOC_IA64_FPTR64MSB
:
10565 case BFD_RELOC_IA64_FPTR64LSB
:
10566 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10567 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10577 ia64_force_relocation (fix
)
10580 switch (fix
->fx_r_type
)
10582 case BFD_RELOC_IA64_FPTR64I
:
10583 case BFD_RELOC_IA64_FPTR32MSB
:
10584 case BFD_RELOC_IA64_FPTR32LSB
:
10585 case BFD_RELOC_IA64_FPTR64MSB
:
10586 case BFD_RELOC_IA64_FPTR64LSB
:
10588 case BFD_RELOC_IA64_LTOFF22
:
10589 case BFD_RELOC_IA64_LTOFF64I
:
10590 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10591 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10592 case BFD_RELOC_IA64_PLTOFF22
:
10593 case BFD_RELOC_IA64_PLTOFF64I
:
10594 case BFD_RELOC_IA64_PLTOFF64MSB
:
10595 case BFD_RELOC_IA64_PLTOFF64LSB
:
10597 case BFD_RELOC_IA64_LTOFF22X
:
10598 case BFD_RELOC_IA64_LDXMOV
:
10605 return generic_force_reloc (fix
);
10608 /* Decide from what point a pc-relative relocation is relative to,
10609 relative to the pc-relative fixup. Er, relatively speaking. */
10611 ia64_pcrel_from_section (fix
, sec
)
10615 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10617 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10624 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10626 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10630 expr
.X_op
= O_pseudo_fixup
;
10631 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10632 expr
.X_add_number
= 0;
10633 expr
.X_add_symbol
= symbol
;
10634 emit_expr (&expr
, size
);
10637 /* This is called whenever some data item (not an instruction) needs a
10638 fixup. We pick the right reloc code depending on the byteorder
10639 currently in effect. */
10641 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
10647 bfd_reloc_code_real_type code
;
10652 /* There are no reloc for 8 and 16 bit quantities, but we allow
10653 them here since they will work fine as long as the expression
10654 is fully defined at the end of the pass over the source file. */
10655 case 1: code
= BFD_RELOC_8
; break;
10656 case 2: code
= BFD_RELOC_16
; break;
10658 if (target_big_endian
)
10659 code
= BFD_RELOC_IA64_DIR32MSB
;
10661 code
= BFD_RELOC_IA64_DIR32LSB
;
10665 /* In 32-bit mode, data8 could mean function descriptors too. */
10666 if (exp
->X_op
== O_pseudo_fixup
10667 && exp
->X_op_symbol
10668 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
10669 && !(md
.flags
& EF_IA_64_ABI64
))
10671 if (target_big_endian
)
10672 code
= BFD_RELOC_IA64_IPLTMSB
;
10674 code
= BFD_RELOC_IA64_IPLTLSB
;
10675 exp
->X_op
= O_symbol
;
10680 if (target_big_endian
)
10681 code
= BFD_RELOC_IA64_DIR64MSB
;
10683 code
= BFD_RELOC_IA64_DIR64LSB
;
10688 if (exp
->X_op
== O_pseudo_fixup
10689 && exp
->X_op_symbol
10690 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
10692 if (target_big_endian
)
10693 code
= BFD_RELOC_IA64_IPLTMSB
;
10695 code
= BFD_RELOC_IA64_IPLTLSB
;
10696 exp
->X_op
= O_symbol
;
10702 as_bad ("Unsupported fixup size %d", nbytes
);
10703 ignore_rest_of_line ();
10707 if (exp
->X_op
== O_pseudo_fixup
)
10709 exp
->X_op
= O_symbol
;
10710 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
10711 /* ??? If code unchanged, unsupported. */
10714 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
10715 /* We need to store the byte order in effect in case we're going
10716 to fix an 8 or 16 bit relocation (for which there no real
10717 relocs available). See md_apply_fix3(). */
10718 fix
->tc_fix_data
.bigendian
= target_big_endian
;
10721 /* Return the actual relocation we wish to associate with the pseudo
10722 reloc described by SYM and R_TYPE. SYM should be one of the
10723 symbols in the pseudo_func array, or NULL. */
10725 static bfd_reloc_code_real_type
10726 ia64_gen_real_reloc_type (sym
, r_type
)
10727 struct symbol
*sym
;
10728 bfd_reloc_code_real_type r_type
;
10730 bfd_reloc_code_real_type
new = 0;
10737 switch (S_GET_VALUE (sym
))
10739 case FUNC_FPTR_RELATIVE
:
10742 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
10743 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
10744 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
10745 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
10746 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
10751 case FUNC_GP_RELATIVE
:
10754 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
10755 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
10756 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
10757 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
10758 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
10759 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
10764 case FUNC_LT_RELATIVE
:
10767 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
10768 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
10773 case FUNC_LT_RELATIVE_X
:
10776 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
10781 case FUNC_PC_RELATIVE
:
10784 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
10785 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
10786 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
10787 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
10788 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
10789 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
10794 case FUNC_PLT_RELATIVE
:
10797 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
10798 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
10799 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
10800 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
10805 case FUNC_SEC_RELATIVE
:
10808 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
10809 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
10810 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
10811 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
10816 case FUNC_SEG_RELATIVE
:
10819 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
10820 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
10821 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
10822 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
10827 case FUNC_LTV_RELATIVE
:
10830 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
10831 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
10832 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
10833 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
10838 case FUNC_LT_FPTR_RELATIVE
:
10841 case BFD_RELOC_IA64_IMM22
:
10842 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
10843 case BFD_RELOC_IA64_IMM64
:
10844 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
10850 case FUNC_TP_RELATIVE
:
10853 case BFD_RELOC_IA64_IMM14
:
10854 new = BFD_RELOC_IA64_TPREL14
; break;
10855 case BFD_RELOC_IA64_IMM22
:
10856 new = BFD_RELOC_IA64_TPREL22
; break;
10857 case BFD_RELOC_IA64_IMM64
:
10858 new = BFD_RELOC_IA64_TPREL64I
; break;
10864 case FUNC_LT_TP_RELATIVE
:
10867 case BFD_RELOC_IA64_IMM22
:
10868 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
10874 case FUNC_LT_DTP_MODULE
:
10877 case BFD_RELOC_IA64_IMM22
:
10878 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
10884 case FUNC_DTP_RELATIVE
:
10887 case BFD_RELOC_IA64_DIR64MSB
:
10888 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
10889 case BFD_RELOC_IA64_DIR64LSB
:
10890 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
10891 case BFD_RELOC_IA64_IMM14
:
10892 new = BFD_RELOC_IA64_DTPREL14
; break;
10893 case BFD_RELOC_IA64_IMM22
:
10894 new = BFD_RELOC_IA64_DTPREL22
; break;
10895 case BFD_RELOC_IA64_IMM64
:
10896 new = BFD_RELOC_IA64_DTPREL64I
; break;
10902 case FUNC_LT_DTP_RELATIVE
:
10905 case BFD_RELOC_IA64_IMM22
:
10906 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
10912 case FUNC_IPLT_RELOC
:
10919 /* Hmmmm. Should this ever occur? */
10926 /* Here is where generate the appropriate reloc for pseudo relocation
10929 ia64_validate_fix (fix
)
10932 switch (fix
->fx_r_type
)
10934 case BFD_RELOC_IA64_FPTR64I
:
10935 case BFD_RELOC_IA64_FPTR32MSB
:
10936 case BFD_RELOC_IA64_FPTR64LSB
:
10937 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10938 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10939 if (fix
->fx_offset
!= 0)
10940 as_bad_where (fix
->fx_file
, fix
->fx_line
,
10941 "No addend allowed in @fptr() relocation");
10949 fix_insn (fix
, odesc
, value
)
10951 const struct ia64_operand
*odesc
;
10954 bfd_vma insn
[3], t0
, t1
, control_bits
;
10959 slot
= fix
->fx_where
& 0x3;
10960 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
10962 /* Bundles are always in little-endian byte order */
10963 t0
= bfd_getl64 (fixpos
);
10964 t1
= bfd_getl64 (fixpos
+ 8);
10965 control_bits
= t0
& 0x1f;
10966 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
10967 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
10968 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
10971 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
10973 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
10974 insn
[2] |= (((value
& 0x7f) << 13)
10975 | (((value
>> 7) & 0x1ff) << 27)
10976 | (((value
>> 16) & 0x1f) << 22)
10977 | (((value
>> 21) & 0x1) << 21)
10978 | (((value
>> 63) & 0x1) << 36));
10980 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
10982 if (value
& ~0x3fffffffffffffffULL
)
10983 err
= "integer operand out of range";
10984 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
10985 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
10987 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
10990 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
10991 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
10992 | (((value
>> 0) & 0xfffff) << 13));
10995 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
10998 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
11000 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11001 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11002 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11003 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11006 /* Attempt to simplify or even eliminate a fixup. The return value is
11007 ignored; perhaps it was once meaningful, but now it is historical.
11008 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11010 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11014 md_apply_fix3 (fix
, valP
, seg
)
11017 segT seg ATTRIBUTE_UNUSED
;
11020 valueT value
= *valP
;
11022 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11026 switch (fix
->fx_r_type
)
11028 case BFD_RELOC_IA64_DIR32MSB
:
11029 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32MSB
;
11032 case BFD_RELOC_IA64_DIR32LSB
:
11033 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32LSB
;
11036 case BFD_RELOC_IA64_DIR64MSB
:
11037 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64MSB
;
11040 case BFD_RELOC_IA64_DIR64LSB
:
11041 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64LSB
;
11050 switch (fix
->fx_r_type
)
11052 case BFD_RELOC_UNUSED
:
11053 /* This must be a TAG13 or TAG13b operand. There are no external
11054 relocs defined for them, so we must give an error. */
11055 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11056 "%s must have a constant value",
11057 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11061 case BFD_RELOC_IA64_TPREL14
:
11062 case BFD_RELOC_IA64_TPREL22
:
11063 case BFD_RELOC_IA64_TPREL64I
:
11064 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11065 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11066 case BFD_RELOC_IA64_DTPREL14
:
11067 case BFD_RELOC_IA64_DTPREL22
:
11068 case BFD_RELOC_IA64_DTPREL64I
:
11069 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11070 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11077 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11079 if (fix
->tc_fix_data
.bigendian
)
11080 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11082 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11087 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11092 /* Generate the BFD reloc to be stuck in the object file from the
11093 fixup used internally in the assembler. */
11096 tc_gen_reloc (sec
, fixp
)
11097 asection
*sec ATTRIBUTE_UNUSED
;
11102 reloc
= xmalloc (sizeof (*reloc
));
11103 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11104 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11105 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11106 reloc
->addend
= fixp
->fx_offset
;
11107 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11111 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11112 "Cannot represent %s relocation in object file",
11113 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11118 /* Turn a string in input_line_pointer into a floating point constant
11119 of type TYPE, and store the appropriate bytes in *LIT. The number
11120 of LITTLENUMS emitted is stored in *SIZE. An error message is
11121 returned, or NULL on OK. */
11123 #define MAX_LITTLENUMS 5
11126 md_atof (type
, lit
, size
)
11131 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11161 return "Bad call to MD_ATOF()";
11163 t
= atof_ieee (input_line_pointer
, type
, words
);
11165 input_line_pointer
= t
;
11167 (*ia64_float_to_chars
) (lit
, words
, prec
);
11171 /* It is 10 byte floating point with 6 byte padding. */
11172 memset (&lit
[10], 0, 6);
11173 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11176 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11181 /* Handle ia64 specific semantics of the align directive. */
11184 ia64_md_do_align (n
, fill
, len
, max
)
11185 int n ATTRIBUTE_UNUSED
;
11186 const char *fill ATTRIBUTE_UNUSED
;
11187 int len ATTRIBUTE_UNUSED
;
11188 int max ATTRIBUTE_UNUSED
;
11190 if (subseg_text_p (now_seg
))
11191 ia64_flush_insns ();
11194 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11195 of an rs_align_code fragment. */
11198 ia64_handle_align (fragp
)
11201 /* Use mfi bundle of nops with no stop bits. */
11202 static const unsigned char le_nop
[]
11203 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11204 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11205 static const unsigned char le_nop_stop
[]
11206 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11207 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11211 const unsigned char *nop
;
11213 if (fragp
->fr_type
!= rs_align_code
)
11216 /* Check if this frag has to end with a stop bit. */
11217 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11219 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11220 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11222 /* If no paddings are needed, we check if we need a stop bit. */
11223 if (!bytes
&& fragp
->tc_frag_data
)
11225 if (fragp
->fr_fix
< 16)
11227 /* FIXME: It won't work with
11229 alloc r32=ar.pfs,1,2,4,0
11233 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11234 _("Can't add stop bit to mark end of instruction group"));
11237 /* Bundles are always in little-endian byte order. Make sure
11238 the previous bundle has the stop bit. */
11242 /* Make sure we are on a 16-byte boundary, in case someone has been
11243 putting data into a text section. */
11246 int fix
= bytes
& 15;
11247 memset (p
, 0, fix
);
11250 fragp
->fr_fix
+= fix
;
11253 /* Instruction bundles are always little-endian. */
11254 memcpy (p
, nop
, 16);
11255 fragp
->fr_var
= 16;
11259 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11264 number_to_chars_bigendian (lit
, (long) (*words
++),
11265 sizeof (LITTLENUM_TYPE
));
11266 lit
+= sizeof (LITTLENUM_TYPE
);
11271 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11276 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11277 sizeof (LITTLENUM_TYPE
));
11278 lit
+= sizeof (LITTLENUM_TYPE
);
11283 ia64_elf_section_change_hook (void)
11285 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11286 && elf_linked_to_section (now_seg
) == NULL
)
11287 elf_linked_to_section (now_seg
) = text_section
;
11288 dot_byteorder (-1);
11291 /* Check if a label should be made global. */
11293 ia64_check_label (symbolS
*label
)
11295 if (*input_line_pointer
== ':')
11297 S_SET_EXTERNAL (label
);
11298 input_line_pointer
++;
11302 /* Used to remember where .alias and .secalias directives are seen. We
11303 will rename symbol and section names when we are about to output
11304 the relocatable file. */
11307 char *file
; /* The file where the directive is seen. */
11308 unsigned int line
; /* The line number the directive is at. */
11309 const char *name
; /* The orignale name of the symbol. */
11312 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11313 .secalias. Otherwise, it is .alias. */
11315 dot_alias (int section
)
11317 char *name
, *alias
;
11321 const char *error_string
;
11324 struct hash_control
*ahash
, *nhash
;
11327 name
= input_line_pointer
;
11328 delim
= get_symbol_end ();
11329 end_name
= input_line_pointer
;
11332 if (name
== end_name
)
11334 as_bad (_("expected symbol name"));
11335 discard_rest_of_line ();
11339 SKIP_WHITESPACE ();
11341 if (*input_line_pointer
!= ',')
11344 as_bad (_("expected comma after \"%s\""), name
);
11346 ignore_rest_of_line ();
11350 input_line_pointer
++;
11353 /* We call demand_copy_C_string to check if alias string is valid.
11354 There should be a closing `"' and no `\0' in the string. */
11355 alias
= demand_copy_C_string (&len
);
11358 ignore_rest_of_line ();
11362 /* Make a copy of name string. */
11363 len
= strlen (name
) + 1;
11364 obstack_grow (¬es
, name
, len
);
11365 name
= obstack_finish (¬es
);
11370 ahash
= secalias_hash
;
11371 nhash
= secalias_name_hash
;
11376 ahash
= alias_hash
;
11377 nhash
= alias_name_hash
;
11380 /* Check if alias has been used before. */
11381 h
= (struct alias
*) hash_find (ahash
, alias
);
11384 if (strcmp (h
->name
, name
))
11385 as_bad (_("`%s' is already the alias of %s `%s'"),
11386 alias
, kind
, h
->name
);
11390 /* Check if name already has an alias. */
11391 a
= (const char *) hash_find (nhash
, name
);
11394 if (strcmp (a
, alias
))
11395 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11399 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11400 as_where (&h
->file
, &h
->line
);
11403 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11406 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11407 alias
, kind
, error_string
);
11411 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11414 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11415 alias
, kind
, error_string
);
11417 obstack_free (¬es
, name
);
11418 obstack_free (¬es
, alias
);
11421 demand_empty_rest_of_line ();
11424 /* It renames the original symbol name to its alias. */
11426 do_alias (const char *alias
, PTR value
)
11428 struct alias
*h
= (struct alias
*) value
;
11429 symbolS
*sym
= symbol_find (h
->name
);
11432 as_warn_where (h
->file
, h
->line
,
11433 _("symbol `%s' aliased to `%s' is not used"),
11436 S_SET_NAME (sym
, (char *) alias
);
11439 /* Called from write_object_file. */
11441 ia64_adjust_symtab (void)
11443 hash_traverse (alias_hash
, do_alias
);
11446 /* It renames the original section name to its alias. */
11448 do_secalias (const char *alias
, PTR value
)
11450 struct alias
*h
= (struct alias
*) value
;
11451 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11454 as_warn_where (h
->file
, h
->line
,
11455 _("section `%s' aliased to `%s' is not used"),
11461 /* Called from write_object_file. */
11463 ia64_frob_file (void)
11465 hash_traverse (secalias_hash
, do_secalias
);