1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
59 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
61 /* Some systems define MIN in, e.g., param.h. */
63 #define MIN(a,b) ((a) < (b) ? (a) : (b))
66 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
67 #define CURR_SLOT md.slot[md.curr_slot]
69 #define O_pseudo_fixup (O_max + 1)
73 /* IA-64 ABI section pseudo-ops. */
74 SPECIAL_SECTION_BSS
= 0,
76 SPECIAL_SECTION_SDATA
,
77 SPECIAL_SECTION_RODATA
,
78 SPECIAL_SECTION_COMMENT
,
79 SPECIAL_SECTION_UNWIND
,
80 SPECIAL_SECTION_UNWIND_INFO
,
81 /* HPUX specific section pseudo-ops. */
82 SPECIAL_SECTION_INIT_ARRAY
,
83 SPECIAL_SECTION_FINI_ARRAY
,
100 FUNC_LT_FPTR_RELATIVE
,
102 FUNC_LT_DTP_RELATIVE
,
106 FUNC_SLOTCOUNT_RELOC
,
113 REG_FR
= (REG_GR
+ 128),
114 REG_AR
= (REG_FR
+ 128),
115 REG_CR
= (REG_AR
+ 128),
116 REG_DAHR
= (REG_CR
+ 128),
117 REG_P
= (REG_DAHR
+ 8),
118 REG_BR
= (REG_P
+ 64),
119 REG_IP
= (REG_BR
+ 8),
126 /* The following are pseudo-registers for use by gas only. */
138 /* The following pseudo-registers are used for unwind directives only: */
146 DYNREG_GR
= 0, /* dynamic general purpose register */
147 DYNREG_FR
, /* dynamic floating point register */
148 DYNREG_PR
, /* dynamic predicate register */
152 enum operand_match_result
155 OPERAND_OUT_OF_RANGE
,
159 /* On the ia64, we can't know the address of a text label until the
160 instructions are packed into a bundle. To handle this, we keep
161 track of the list of labels that appear in front of each
165 struct label_fix
*next
;
167 bfd_boolean dw2_mark_labels
;
171 /* An internally used relocation. */
172 #define DUMMY_RELOC_IA64_SLOTCOUNT (BFD_RELOC_UNUSED + 1)
175 /* This is the endianness of the current section. */
176 extern int target_big_endian
;
178 /* This is the default endianness. */
179 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
181 void (*ia64_number_to_chars
) (char *, valueT
, int);
183 static void ia64_float_to_chars_bigendian (char *, LITTLENUM_TYPE
*, int);
184 static void ia64_float_to_chars_littleendian (char *, LITTLENUM_TYPE
*, int);
186 static void (*ia64_float_to_chars
) (char *, LITTLENUM_TYPE
*, int);
188 static struct hash_control
*alias_hash
;
189 static struct hash_control
*alias_name_hash
;
190 static struct hash_control
*secalias_hash
;
191 static struct hash_control
*secalias_name_hash
;
193 /* List of chars besides those in app.c:symbol_chars that can start an
194 operand. Used to prevent the scrubber eating vital white-space. */
195 const char ia64_symbol_chars
[] = "@?";
197 /* Characters which always start a comment. */
198 const char comment_chars
[] = "";
200 /* Characters which start a comment at the beginning of a line. */
201 const char line_comment_chars
[] = "#";
203 /* Characters which may be used to separate multiple commands on a
205 const char line_separator_chars
[] = ";{}";
207 /* Characters which are used to indicate an exponent in a floating
209 const char EXP_CHARS
[] = "eE";
211 /* Characters which mean that a number is a floating point constant,
213 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
215 /* ia64-specific option processing: */
217 const char *md_shortopts
= "m:N:x::";
219 struct option md_longopts
[] =
221 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
222 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
223 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
224 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
227 size_t md_longopts_size
= sizeof (md_longopts
);
231 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
232 struct hash_control
*reg_hash
; /* register name hash table */
233 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
234 struct hash_control
*const_hash
; /* constant hash table */
235 struct hash_control
*entry_hash
; /* code entry hint hash table */
237 /* If X_op is != O_absent, the registername for the instruction's
238 qualifying predicate. If NULL, p0 is assumed for instructions
239 that are predictable. */
242 /* Optimize for which CPU. */
249 /* What to do when hint.b is used. */
261 explicit_mode
: 1, /* which mode we're in */
262 default_explicit_mode
: 1, /* which mode is the default */
263 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
265 keep_pending_output
: 1;
267 /* What to do when something is wrong with unwind directives. */
270 unwind_check_warning
,
274 /* Each bundle consists of up to three instructions. We keep
275 track of four most recent instructions so we can correctly set
276 the end_of_insn_group for the last instruction in a bundle. */
278 int num_slots_in_use
;
282 end_of_insn_group
: 1,
283 manual_bundling_on
: 1,
284 manual_bundling_off
: 1,
285 loc_directive_seen
: 1;
286 signed char user_template
; /* user-selected template, if any */
287 unsigned char qp_regno
; /* qualifying predicate */
288 /* This duplicates a good fraction of "struct fix" but we
289 can't use a "struct fix" instead since we can't call
290 fix_new_exp() until we know the address of the instruction. */
294 bfd_reloc_code_real_type code
;
295 enum ia64_opnd opnd
; /* type of operand in need of fix */
296 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
297 expressionS expr
; /* the value to be inserted */
299 fixup
[2]; /* at most two fixups per insn */
300 struct ia64_opcode
*idesc
;
301 struct label_fix
*label_fixups
;
302 struct label_fix
*tag_fixups
;
303 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
305 const char *src_file
;
306 unsigned int src_line
;
307 struct dwarf2_line_info debug_line
;
315 struct dynreg
*next
; /* next dynamic register */
317 unsigned short base
; /* the base register number */
318 unsigned short num_regs
; /* # of registers in this set */
320 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
322 flagword flags
; /* ELF-header flags */
325 unsigned hint
:1; /* is this hint currently valid? */
326 bfd_vma offset
; /* mem.offset offset */
327 bfd_vma base
; /* mem.offset base */
330 int path
; /* number of alt. entry points seen */
331 const char **entry_labels
; /* labels of all alternate paths in
332 the current DV-checking block. */
333 int maxpaths
; /* size currently allocated for
336 int pointer_size
; /* size in bytes of a pointer */
337 int pointer_size_shift
; /* shift size of a pointer for alignment */
339 symbolS
*indregsym
[IND_RR
- IND_CPUID
+ 1];
343 /* These are not const, because they are modified to MMI for non-itanium1
345 /* MFI bundle of nops. */
346 static unsigned char le_nop
[16] =
348 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
349 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
351 /* MFI bundle of nops with stop-bit. */
352 static unsigned char le_nop_stop
[16] =
354 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
355 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
358 /* application registers: */
364 #define AR_BSPSTORE 18
390 {"ar.k0", AR_K0
}, {"ar.k1", AR_K0
+ 1},
391 {"ar.k2", AR_K0
+ 2}, {"ar.k3", AR_K0
+ 3},
392 {"ar.k4", AR_K0
+ 4}, {"ar.k5", AR_K0
+ 5},
393 {"ar.k6", AR_K0
+ 6}, {"ar.k7", AR_K7
},
394 {"ar.rsc", AR_RSC
}, {"ar.bsp", AR_BSP
},
395 {"ar.bspstore", AR_BSPSTORE
}, {"ar.rnat", AR_RNAT
},
396 {"ar.fcr", AR_FCR
}, {"ar.eflag", AR_EFLAG
},
397 {"ar.csd", AR_CSD
}, {"ar.ssd", AR_SSD
},
398 {"ar.cflg", AR_CFLG
}, {"ar.fsr", AR_FSR
},
399 {"ar.fir", AR_FIR
}, {"ar.fdr", AR_FDR
},
400 {"ar.ccv", AR_CCV
}, {"ar.unat", AR_UNAT
},
401 {"ar.fpsr", AR_FPSR
}, {"ar.itc", AR_ITC
},
402 {"ar.ruc", AR_RUC
}, {"ar.pfs", AR_PFS
},
403 {"ar.lc", AR_LC
}, {"ar.ec", AR_EC
},
406 /* control registers: */
447 {"cr.gpta", CR_GPTA
},
448 {"cr.ipsr", CR_IPSR
},
452 {"cr.itir", CR_ITIR
},
453 {"cr.iipa", CR_IIPA
},
457 {"cr.iib0", CR_IIB0
},
458 {"cr.iib1", CR_IIB1
},
463 {"cr.irr0", CR_IRR0
},
464 {"cr.irr1", CR_IRR0
+ 1},
465 {"cr.irr2", CR_IRR0
+ 2},
466 {"cr.irr3", CR_IRR3
},
469 {"cr.cmcv", CR_CMCV
},
470 {"cr.lrr0", CR_LRR0
},
479 static const struct const_desc
486 /* PSR constant masks: */
489 {"psr.be", ((valueT
) 1) << 1},
490 {"psr.up", ((valueT
) 1) << 2},
491 {"psr.ac", ((valueT
) 1) << 3},
492 {"psr.mfl", ((valueT
) 1) << 4},
493 {"psr.mfh", ((valueT
) 1) << 5},
495 {"psr.ic", ((valueT
) 1) << 13},
496 {"psr.i", ((valueT
) 1) << 14},
497 {"psr.pk", ((valueT
) 1) << 15},
499 {"psr.dt", ((valueT
) 1) << 17},
500 {"psr.dfl", ((valueT
) 1) << 18},
501 {"psr.dfh", ((valueT
) 1) << 19},
502 {"psr.sp", ((valueT
) 1) << 20},
503 {"psr.pp", ((valueT
) 1) << 21},
504 {"psr.di", ((valueT
) 1) << 22},
505 {"psr.si", ((valueT
) 1) << 23},
506 {"psr.db", ((valueT
) 1) << 24},
507 {"psr.lp", ((valueT
) 1) << 25},
508 {"psr.tb", ((valueT
) 1) << 26},
509 {"psr.rt", ((valueT
) 1) << 27},
510 /* 28-31: reserved */
511 /* 32-33: cpl (current privilege level) */
512 {"psr.is", ((valueT
) 1) << 34},
513 {"psr.mc", ((valueT
) 1) << 35},
514 {"psr.it", ((valueT
) 1) << 36},
515 {"psr.id", ((valueT
) 1) << 37},
516 {"psr.da", ((valueT
) 1) << 38},
517 {"psr.dd", ((valueT
) 1) << 39},
518 {"psr.ss", ((valueT
) 1) << 40},
519 /* 41-42: ri (restart instruction) */
520 {"psr.ed", ((valueT
) 1) << 43},
521 {"psr.bn", ((valueT
) 1) << 44},
524 /* indirect register-sets/memory: */
533 { "CPUID", IND_CPUID
},
534 { "cpuid", IND_CPUID
},
543 { "dahr", IND_DAHR
},
547 /* Pseudo functions used to indicate relocation types (these functions
548 start with an at sign (@). */
570 /* reloc pseudo functions (these must come first!): */
571 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
572 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
573 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
574 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
575 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
576 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
577 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
578 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
579 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
580 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
581 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
582 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
583 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
584 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
585 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
586 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
587 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
589 { "slotcount", PSEUDO_FUNC_RELOC
, { 0 } },
592 /* mbtype4 constants: */
593 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
594 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
595 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
596 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
597 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
599 /* fclass constants: */
600 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
601 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
602 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
603 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
604 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
605 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
606 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
607 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
608 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
610 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
612 /* hint constants: */
613 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
614 { "priority", PSEUDO_FUNC_CONST
, { 0x1 } },
617 { "clz", PSEUDO_FUNC_CONST
, { 32 } },
618 { "mpy", PSEUDO_FUNC_CONST
, { 33 } },
619 { "datahints", PSEUDO_FUNC_CONST
, { 34 } },
621 /* unwind-related constants: */
622 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
623 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
624 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
625 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_GNU
} },
626 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
627 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
628 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
630 /* unwind-related registers: */
631 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
634 /* 41-bit nop opcodes (one per unit): */
635 static const bfd_vma nop
[IA64_NUM_UNITS
] =
637 0x0000000000LL
, /* NIL => break 0 */
638 0x0008000000LL
, /* I-unit nop */
639 0x0008000000LL
, /* M-unit nop */
640 0x4000000000LL
, /* B-unit nop */
641 0x0008000000LL
, /* F-unit nop */
642 0x0000000000LL
, /* L-"unit" nop immediate */
643 0x0008000000LL
, /* X-unit nop */
646 /* Can't be `const' as it's passed to input routines (which have the
647 habit of setting temporary sentinels. */
648 static char special_section_name
[][20] =
650 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
651 {".IA_64.unwind"}, {".IA_64.unwind_info"},
652 {".init_array"}, {".fini_array"}
655 /* The best template for a particular sequence of up to three
657 #define N IA64_NUM_TYPES
658 static unsigned char best_template
[N
][N
][N
];
661 /* Resource dependencies currently in effect */
663 int depind
; /* dependency index */
664 const struct ia64_dependency
*dependency
; /* actual dependency */
665 unsigned specific
:1, /* is this a specific bit/regno? */
666 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
667 int index
; /* specific regno/bit within dependency */
668 int note
; /* optional qualifying note (0 if none) */
672 int insn_srlz
; /* current insn serialization state */
673 int data_srlz
; /* current data serialization state */
674 int qp_regno
; /* qualifying predicate for this usage */
675 const char *file
; /* what file marked this dependency */
676 unsigned int line
; /* what line marked this dependency */
677 struct mem_offset mem_offset
; /* optional memory offset hint */
678 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
679 int path
; /* corresponding code entry index */
681 static int regdepslen
= 0;
682 static int regdepstotlen
= 0;
683 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
684 static const char *dv_sem
[] = { "none", "implied", "impliedf",
685 "data", "instr", "specific", "stop", "other" };
686 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
688 /* Current state of PR mutexation */
689 static struct qpmutex
{
692 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
693 static int qp_mutexeslen
= 0;
694 static int qp_mutexestotlen
= 0;
695 static valueT qp_safe_across_calls
= 0;
697 /* Current state of PR implications */
698 static struct qp_imply
{
701 unsigned p2_branched
:1;
703 } *qp_implies
= NULL
;
704 static int qp_implieslen
= 0;
705 static int qp_impliestotlen
= 0;
707 /* Keep track of static GR values so that indirect register usage can
708 sometimes be tracked. */
719 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
725 /* Remember the alignment frag. */
726 static fragS
*align_frag
;
728 /* These are the routines required to output the various types of
731 /* A slot_number is a frag address plus the slot index (0-2). We use the
732 frag address here so that if there is a section switch in the middle of
733 a function, then instructions emitted to a different section are not
734 counted. Since there may be more than one frag for a function, this
735 means we also need to keep track of which frag this address belongs to
736 so we can compute inter-frag distances. This also nicely solves the
737 problem with nops emitted for align directives, which can't easily be
738 counted, but can easily be derived from frag sizes. */
740 typedef struct unw_rec_list
{
742 unsigned long slot_number
;
744 struct unw_rec_list
*next
;
747 #define SLOT_NUM_NOT_SET (unsigned)-1
749 /* Linked list of saved prologue counts. A very poor
750 implementation of a map from label numbers to prologue counts. */
751 typedef struct label_prologue_count
753 struct label_prologue_count
*next
;
754 unsigned long label_number
;
755 unsigned int prologue_count
;
756 } label_prologue_count
;
758 typedef struct proc_pending
761 struct proc_pending
*next
;
766 /* Maintain a list of unwind entries for the current function. */
770 /* Any unwind entries that should be attached to the current slot
771 that an insn is being constructed for. */
772 unw_rec_list
*current_entry
;
774 /* These are used to create the unwind table entry for this function. */
775 proc_pending proc_pending
;
776 symbolS
*info
; /* pointer to unwind info */
777 symbolS
*personality_routine
;
779 subsegT saved_text_subseg
;
780 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
782 /* TRUE if processing unwind directives in a prologue region. */
783 unsigned int prologue
: 1;
784 unsigned int prologue_mask
: 4;
785 unsigned int prologue_gr
: 7;
786 unsigned int body
: 1;
787 unsigned int insn
: 1;
788 unsigned int prologue_count
; /* number of .prologues seen so far */
789 /* Prologue counts at previous .label_state directives. */
790 struct label_prologue_count
* saved_prologue_counts
;
792 /* List of split up .save-s. */
793 unw_p_record
*pending_saves
;
796 /* The input value is a negated offset from psp, and specifies an address
797 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
798 must add 16 and divide by 4 to get the encoded value. */
800 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
802 typedef void (*vbyte_func
) (int, char *, char *);
804 /* Forward declarations: */
805 static void dot_alias (int);
806 static int parse_operand_and_eval (expressionS
*, int);
807 static void emit_one_bundle (void);
808 static bfd_reloc_code_real_type
ia64_gen_real_reloc_type (struct symbol
*,
809 bfd_reloc_code_real_type
);
810 static void insn_group_break (int, int, int);
811 static void add_qp_mutex (valueT
);
812 static void add_qp_imply (int, int);
813 static void clear_qp_mutex (valueT
);
814 static void clear_qp_implies (valueT
, valueT
);
815 static void print_dependency (const char *, int);
816 static void instruction_serialization (void);
817 static void data_serialization (void);
818 static void output_R3_format (vbyte_func
, unw_record_type
, unsigned long);
819 static void output_B3_format (vbyte_func
, unsigned long, unsigned long);
820 static void output_B4_format (vbyte_func
, unw_record_type
, unsigned long);
821 static void free_saved_prologue_counts (void);
823 /* Determine if application register REGNUM resides only in the integer
824 unit (as opposed to the memory unit). */
826 ar_is_only_in_integer_unit (int reg
)
829 return reg
>= 64 && reg
<= 111;
832 /* Determine if application register REGNUM resides only in the memory
833 unit (as opposed to the integer unit). */
835 ar_is_only_in_memory_unit (int reg
)
838 return reg
>= 0 && reg
<= 47;
841 /* Switch to section NAME and create section if necessary. It's
842 rather ugly that we have to manipulate input_line_pointer but I
843 don't see any other way to accomplish the same thing without
844 changing obj-elf.c (which may be the Right Thing, in the end). */
846 set_section (char *name
)
848 char *saved_input_line_pointer
;
850 saved_input_line_pointer
= input_line_pointer
;
851 input_line_pointer
= name
;
853 input_line_pointer
= saved_input_line_pointer
;
856 /* Map 's' to SHF_IA_64_SHORT. */
859 ia64_elf_section_letter (int letter
, const char **ptr_msg
)
862 return SHF_IA_64_SHORT
;
863 else if (letter
== 'o')
864 return SHF_LINK_ORDER
;
866 else if (letter
== 'O')
867 return SHF_IA_64_VMS_OVERLAID
;
868 else if (letter
== 'g')
869 return SHF_IA_64_VMS_GLOBAL
;
872 *ptr_msg
= _("bad .section directive: want a,o,s,w,x,M,S,G,T in string");
876 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
879 ia64_elf_section_flags (flagword flags
,
881 int type ATTRIBUTE_UNUSED
)
883 if (attr
& SHF_IA_64_SHORT
)
884 flags
|= SEC_SMALL_DATA
;
889 ia64_elf_section_type (const char *str
, size_t len
)
891 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
893 if (STREQ (ELF_STRING_ia64_unwind_info
))
896 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
899 if (STREQ (ELF_STRING_ia64_unwind
))
900 return SHT_IA_64_UNWIND
;
902 if (STREQ (ELF_STRING_ia64_unwind_once
))
903 return SHT_IA_64_UNWIND
;
905 if (STREQ ("unwind"))
906 return SHT_IA_64_UNWIND
;
913 set_regstack (unsigned int ins
,
921 sof
= ins
+ locs
+ outs
;
924 as_bad (_("Size of frame exceeds maximum of 96 registers"));
929 as_warn (_("Size of rotating registers exceeds frame size"));
932 md
.in
.base
= REG_GR
+ 32;
933 md
.loc
.base
= md
.in
.base
+ ins
;
934 md
.out
.base
= md
.loc
.base
+ locs
;
936 md
.in
.num_regs
= ins
;
937 md
.loc
.num_regs
= locs
;
938 md
.out
.num_regs
= outs
;
939 md
.rot
.num_regs
= rots
;
944 ia64_flush_insns (void)
946 struct label_fix
*lfix
;
948 subsegT saved_subseg
;
952 if (!md
.last_text_seg
)
956 saved_subseg
= now_subseg
;
958 subseg_set (md
.last_text_seg
, 0);
960 while (md
.num_slots_in_use
> 0)
961 emit_one_bundle (); /* force out queued instructions */
963 /* In case there are labels following the last instruction, resolve
966 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
968 symbol_set_value_now (lfix
->sym
);
969 mark
|= lfix
->dw2_mark_labels
;
973 dwarf2_where (&CURR_SLOT
.debug_line
);
974 CURR_SLOT
.debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
975 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT
.debug_line
);
976 dwarf2_consume_line_info ();
978 CURR_SLOT
.label_fixups
= 0;
980 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
981 symbol_set_value_now (lfix
->sym
);
982 CURR_SLOT
.tag_fixups
= 0;
984 /* In case there are unwind directives following the last instruction,
985 resolve those now. We only handle prologue, body, and endp directives
986 here. Give an error for others. */
987 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
995 ptr
->slot_number
= (unsigned long) frag_more (0);
996 ptr
->slot_frag
= frag_now
;
999 /* Allow any record which doesn't have a "t" field (i.e.,
1000 doesn't relate to a particular instruction). */
1016 as_bad (_("Unwind directive not followed by an instruction."));
1020 unwind
.current_entry
= NULL
;
1022 subseg_set (saved_seg
, saved_subseg
);
1024 if (md
.qp
.X_op
== O_register
)
1025 as_bad (_("qualifying predicate not followed by instruction"));
1029 ia64_cons_align (int nbytes
)
1034 for (log
= 0; (nbytes
& 1) != 1; nbytes
>>= 1)
1037 do_align (log
, NULL
, 0, 0);
1043 /* .vms_common section, symbol, size, alignment */
1046 obj_elf_vms_common (int ignore ATTRIBUTE_UNUSED
)
1048 const char *sec_name
;
1055 segT current_seg
= now_seg
;
1056 subsegT current_subseg
= now_subseg
;
1060 sec_name
= obj_elf_section_name ();
1061 if (sec_name
== NULL
)
1066 if (*input_line_pointer
== ',')
1068 input_line_pointer
++;
1073 as_bad (_("expected ',' after section name"));
1074 ignore_rest_of_line ();
1078 c
= get_symbol_name (&sym_name
);
1080 if (input_line_pointer
== sym_name
)
1082 (void) restore_line_pointer (c
);
1083 as_bad (_("expected symbol name"));
1084 ignore_rest_of_line ();
1088 symbolP
= symbol_find_or_make (sym_name
);
1089 (void) restore_line_pointer (c
);
1091 if ((S_IS_DEFINED (symbolP
) || symbol_equated_p (symbolP
))
1092 && !S_IS_COMMON (symbolP
))
1094 as_bad (_("Ignoring attempt to re-define symbol"));
1095 ignore_rest_of_line ();
1101 if (*input_line_pointer
== ',')
1103 input_line_pointer
++;
1108 as_bad (_("expected ',' after symbol name"));
1109 ignore_rest_of_line ();
1113 temp
= get_absolute_expression ();
1115 size
&= ((offsetT
) 2 << (stdoutput
->arch_info
->bits_per_address
- 1)) - 1;
1118 as_warn (_("size (%ld) out of range, ignored"), (long) temp
);
1119 ignore_rest_of_line ();
1125 if (*input_line_pointer
== ',')
1127 input_line_pointer
++;
1132 as_bad (_("expected ',' after symbol size"));
1133 ignore_rest_of_line ();
1137 log_align
= get_absolute_expression ();
1139 demand_empty_rest_of_line ();
1141 obj_elf_change_section
1142 (sec_name
, SHT_NOBITS
,
1143 SHF_ALLOC
| SHF_WRITE
| SHF_IA_64_VMS_OVERLAID
| SHF_IA_64_VMS_GLOBAL
,
1146 S_SET_VALUE (symbolP
, 0);
1147 S_SET_SIZE (symbolP
, size
);
1148 S_SET_EXTERNAL (symbolP
);
1149 S_SET_SEGMENT (symbolP
, now_seg
);
1151 symbol_get_bfdsym (symbolP
)->flags
|= BSF_OBJECT
;
1153 record_alignment (now_seg
, log_align
);
1155 cur_size
= bfd_section_size (stdoutput
, now_seg
);
1156 if ((int) size
> cur_size
)
1159 = frag_var (rs_fill
, 1, 1, (relax_substateT
)0, NULL
,
1160 (valueT
)size
- (valueT
)cur_size
, NULL
);
1162 bfd_section_size (stdoutput
, now_seg
) = size
;
1165 /* Switch back to current segment. */
1166 subseg_set (current_seg
, current_subseg
);
1168 #ifdef md_elf_section_change_hook
1169 md_elf_section_change_hook ();
1175 /* Output COUNT bytes to a memory location. */
1176 static char *vbyte_mem_ptr
= NULL
;
1179 output_vbyte_mem (int count
, char *ptr
, char *comment ATTRIBUTE_UNUSED
)
1182 if (vbyte_mem_ptr
== NULL
)
1187 for (x
= 0; x
< count
; x
++)
1188 *(vbyte_mem_ptr
++) = ptr
[x
];
1191 /* Count the number of bytes required for records. */
1192 static int vbyte_count
= 0;
1194 count_output (int count
,
1195 char *ptr ATTRIBUTE_UNUSED
,
1196 char *comment ATTRIBUTE_UNUSED
)
1198 vbyte_count
+= count
;
1202 output_R1_format (vbyte_func f
, unw_record_type rtype
, int rlen
)
1208 output_R3_format (f
, rtype
, rlen
);
1214 else if (rtype
!= prologue
)
1215 as_bad (_("record type is not valid"));
1217 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1218 (*f
) (1, &byte
, NULL
);
1222 output_R2_format (vbyte_func f
, int mask
, int grsave
, unsigned long rlen
)
1226 mask
= (mask
& 0x0f);
1227 grsave
= (grsave
& 0x7f);
1229 bytes
[0] = (UNW_R2
| (mask
>> 1));
1230 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1231 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1232 (*f
) (count
, bytes
, NULL
);
1236 output_R3_format (vbyte_func f
, unw_record_type rtype
, unsigned long rlen
)
1242 output_R1_format (f
, rtype
, rlen
);
1248 else if (rtype
!= prologue
)
1249 as_bad (_("record type is not valid"));
1250 bytes
[0] = (UNW_R3
| r
);
1251 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1252 (*f
) (count
+ 1, bytes
, NULL
);
1256 output_P1_format (vbyte_func f
, int brmask
)
1259 byte
= UNW_P1
| (brmask
& 0x1f);
1260 (*f
) (1, &byte
, NULL
);
1264 output_P2_format (vbyte_func f
, int brmask
, int gr
)
1267 brmask
= (brmask
& 0x1f);
1268 bytes
[0] = UNW_P2
| (brmask
>> 1);
1269 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1270 (*f
) (2, bytes
, NULL
);
1274 output_P3_format (vbyte_func f
, unw_record_type rtype
, int reg
)
1318 as_bad (_("Invalid record type for P3 format."));
1320 bytes
[0] = (UNW_P3
| (r
>> 1));
1321 bytes
[1] = (((r
& 1) << 7) | reg
);
1322 (*f
) (2, bytes
, NULL
);
1326 output_P4_format (vbyte_func f
, unsigned char *imask
, unsigned long imask_size
)
1329 (*f
) (imask_size
, (char *) imask
, NULL
);
1333 output_P5_format (vbyte_func f
, int grmask
, unsigned long frmask
)
1336 grmask
= (grmask
& 0x0f);
1339 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1340 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1341 bytes
[3] = (frmask
& 0x000000ff);
1342 (*f
) (4, bytes
, NULL
);
1346 output_P6_format (vbyte_func f
, unw_record_type rtype
, int rmask
)
1351 if (rtype
== gr_mem
)
1353 else if (rtype
!= fr_mem
)
1354 as_bad (_("Invalid record type for format P6"));
1355 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1356 (*f
) (1, &byte
, NULL
);
1360 output_P7_format (vbyte_func f
,
1361 unw_record_type rtype
,
1368 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1373 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1423 bytes
[0] = (UNW_P7
| r
);
1424 (*f
) (count
, bytes
, NULL
);
1428 output_P8_format (vbyte_func f
, unw_record_type rtype
, unsigned long t
)
1466 case bspstore_psprel
:
1469 case bspstore_sprel
:
1481 case priunat_when_gr
:
1484 case priunat_psprel
:
1490 case priunat_when_mem
:
1497 count
+= output_leb128 (bytes
+ 2, t
, 0);
1498 (*f
) (count
, bytes
, NULL
);
1502 output_P9_format (vbyte_func f
, int grmask
, int gr
)
1506 bytes
[1] = (grmask
& 0x0f);
1507 bytes
[2] = (gr
& 0x7f);
1508 (*f
) (3, bytes
, NULL
);
1512 output_P10_format (vbyte_func f
, int abi
, int context
)
1516 bytes
[1] = (abi
& 0xff);
1517 bytes
[2] = (context
& 0xff);
1518 (*f
) (3, bytes
, NULL
);
1522 output_B1_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1528 output_B4_format (f
, rtype
, label
);
1531 if (rtype
== copy_state
)
1533 else if (rtype
!= label_state
)
1534 as_bad (_("Invalid record type for format B1"));
1536 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1537 (*f
) (1, &byte
, NULL
);
1541 output_B2_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1547 output_B3_format (f
, ecount
, t
);
1550 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1551 count
+= output_leb128 (bytes
+ 1, t
, 0);
1552 (*f
) (count
, bytes
, NULL
);
1556 output_B3_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1562 output_B2_format (f
, ecount
, t
);
1566 count
+= output_leb128 (bytes
+ 1, t
, 0);
1567 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1568 (*f
) (count
, bytes
, NULL
);
1572 output_B4_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1579 output_B1_format (f
, rtype
, label
);
1583 if (rtype
== copy_state
)
1585 else if (rtype
!= label_state
)
1586 as_bad (_("Invalid record type for format B1"));
1588 bytes
[0] = (UNW_B4
| (r
<< 3));
1589 count
+= output_leb128 (bytes
+ 1, label
, 0);
1590 (*f
) (count
, bytes
, NULL
);
1594 format_ab_reg (int ab
, int reg
)
1599 ret
= (ab
<< 5) | reg
;
1604 output_X1_format (vbyte_func f
,
1605 unw_record_type rtype
,
1616 if (rtype
== spill_sprel
)
1618 else if (rtype
!= spill_psprel
)
1619 as_bad (_("Invalid record type for format X1"));
1620 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1621 count
+= output_leb128 (bytes
+ 2, t
, 0);
1622 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1623 (*f
) (count
, bytes
, NULL
);
1627 output_X2_format (vbyte_func f
,
1638 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1639 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1640 count
+= output_leb128 (bytes
+ 3, t
, 0);
1641 (*f
) (count
, bytes
, NULL
);
1645 output_X3_format (vbyte_func f
,
1646 unw_record_type rtype
,
1658 if (rtype
== spill_sprel_p
)
1660 else if (rtype
!= spill_psprel_p
)
1661 as_bad (_("Invalid record type for format X3"));
1662 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1663 bytes
[2] = format_ab_reg (ab
, reg
);
1664 count
+= output_leb128 (bytes
+ 3, t
, 0);
1665 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1666 (*f
) (count
, bytes
, NULL
);
1670 output_X4_format (vbyte_func f
,
1682 bytes
[1] = (qp
& 0x3f);
1683 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1684 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1685 count
+= output_leb128 (bytes
+ 4, t
, 0);
1686 (*f
) (count
, bytes
, NULL
);
1689 /* This function checks whether there are any outstanding .save-s and
1690 discards them if so. */
1693 check_pending_save (void)
1695 if (unwind
.pending_saves
)
1697 unw_rec_list
*cur
, *prev
;
1699 as_warn (_("Previous .save incomplete"));
1700 for (cur
= unwind
.list
, prev
= NULL
; cur
; )
1701 if (&cur
->r
.record
.p
== unwind
.pending_saves
)
1704 prev
->next
= cur
->next
;
1706 unwind
.list
= cur
->next
;
1707 if (cur
== unwind
.tail
)
1709 if (cur
== unwind
.current_entry
)
1710 unwind
.current_entry
= cur
->next
;
1711 /* Don't free the first discarded record, it's being used as
1712 terminator for (currently) br_gr and gr_gr processing, and
1713 also prevents leaving a dangling pointer to it in its
1715 cur
->r
.record
.p
.grmask
= 0;
1716 cur
->r
.record
.p
.brmask
= 0;
1717 cur
->r
.record
.p
.frmask
= 0;
1718 prev
= cur
->r
.record
.p
.next
;
1719 cur
->r
.record
.p
.next
= NULL
;
1731 cur
= cur
->r
.record
.p
.next
;
1734 unwind
.pending_saves
= NULL
;
1738 /* This function allocates a record list structure, and initializes fields. */
1740 static unw_rec_list
*
1741 alloc_record (unw_record_type t
)
1744 ptr
= xmalloc (sizeof (*ptr
));
1745 memset (ptr
, 0, sizeof (*ptr
));
1746 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1751 /* Dummy unwind record used for calculating the length of the last prologue or
1754 static unw_rec_list
*
1757 unw_rec_list
*ptr
= alloc_record (endp
);
1761 static unw_rec_list
*
1762 output_prologue (void)
1764 unw_rec_list
*ptr
= alloc_record (prologue
);
1765 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1769 static unw_rec_list
*
1770 output_prologue_gr (unsigned int saved_mask
, unsigned int reg
)
1772 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1773 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1774 ptr
->r
.record
.r
.grmask
= saved_mask
;
1775 ptr
->r
.record
.r
.grsave
= reg
;
1779 static unw_rec_list
*
1782 unw_rec_list
*ptr
= alloc_record (body
);
1786 static unw_rec_list
*
1787 output_mem_stack_f (unsigned int size
)
1789 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1790 ptr
->r
.record
.p
.size
= size
;
1794 static unw_rec_list
*
1795 output_mem_stack_v (void)
1797 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1801 static unw_rec_list
*
1802 output_psp_gr (unsigned int gr
)
1804 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1805 ptr
->r
.record
.p
.r
.gr
= gr
;
1809 static unw_rec_list
*
1810 output_psp_sprel (unsigned int offset
)
1812 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1813 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1817 static unw_rec_list
*
1818 output_rp_when (void)
1820 unw_rec_list
*ptr
= alloc_record (rp_when
);
1824 static unw_rec_list
*
1825 output_rp_gr (unsigned int gr
)
1827 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1828 ptr
->r
.record
.p
.r
.gr
= gr
;
1832 static unw_rec_list
*
1833 output_rp_br (unsigned int br
)
1835 unw_rec_list
*ptr
= alloc_record (rp_br
);
1836 ptr
->r
.record
.p
.r
.br
= br
;
1840 static unw_rec_list
*
1841 output_rp_psprel (unsigned int offset
)
1843 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1844 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1848 static unw_rec_list
*
1849 output_rp_sprel (unsigned int offset
)
1851 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1852 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1856 static unw_rec_list
*
1857 output_pfs_when (void)
1859 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1863 static unw_rec_list
*
1864 output_pfs_gr (unsigned int gr
)
1866 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1867 ptr
->r
.record
.p
.r
.gr
= gr
;
1871 static unw_rec_list
*
1872 output_pfs_psprel (unsigned int offset
)
1874 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1875 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1879 static unw_rec_list
*
1880 output_pfs_sprel (unsigned int offset
)
1882 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1883 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1887 static unw_rec_list
*
1888 output_preds_when (void)
1890 unw_rec_list
*ptr
= alloc_record (preds_when
);
1894 static unw_rec_list
*
1895 output_preds_gr (unsigned int gr
)
1897 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1898 ptr
->r
.record
.p
.r
.gr
= gr
;
1902 static unw_rec_list
*
1903 output_preds_psprel (unsigned int offset
)
1905 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1906 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1910 static unw_rec_list
*
1911 output_preds_sprel (unsigned int offset
)
1913 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1914 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1918 static unw_rec_list
*
1919 output_fr_mem (unsigned int mask
)
1921 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1922 unw_rec_list
*cur
= ptr
;
1924 ptr
->r
.record
.p
.frmask
= mask
;
1925 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1928 unw_rec_list
*prev
= cur
;
1930 /* Clear least significant set bit. */
1931 mask
&= ~(mask
& (~mask
+ 1));
1934 cur
= alloc_record (fr_mem
);
1935 cur
->r
.record
.p
.frmask
= mask
;
1936 /* Retain only least significant bit. */
1937 prev
->r
.record
.p
.frmask
^= mask
;
1938 prev
->r
.record
.p
.next
= cur
;
1942 static unw_rec_list
*
1943 output_frgr_mem (unsigned int gr_mask
, unsigned int fr_mask
)
1945 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1946 unw_rec_list
*cur
= ptr
;
1948 unwind
.pending_saves
= &cur
->r
.record
.p
;
1949 cur
->r
.record
.p
.frmask
= fr_mask
;
1952 unw_rec_list
*prev
= cur
;
1954 /* Clear least significant set bit. */
1955 fr_mask
&= ~(fr_mask
& (~fr_mask
+ 1));
1956 if (!gr_mask
&& !fr_mask
)
1958 cur
= alloc_record (frgr_mem
);
1959 cur
->r
.record
.p
.frmask
= fr_mask
;
1960 /* Retain only least significant bit. */
1961 prev
->r
.record
.p
.frmask
^= fr_mask
;
1962 prev
->r
.record
.p
.next
= cur
;
1964 cur
->r
.record
.p
.grmask
= gr_mask
;
1967 unw_rec_list
*prev
= cur
;
1969 /* Clear least significant set bit. */
1970 gr_mask
&= ~(gr_mask
& (~gr_mask
+ 1));
1973 cur
= alloc_record (frgr_mem
);
1974 cur
->r
.record
.p
.grmask
= gr_mask
;
1975 /* Retain only least significant bit. */
1976 prev
->r
.record
.p
.grmask
^= gr_mask
;
1977 prev
->r
.record
.p
.next
= cur
;
1981 static unw_rec_list
*
1982 output_gr_gr (unsigned int mask
, unsigned int reg
)
1984 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1985 unw_rec_list
*cur
= ptr
;
1987 ptr
->r
.record
.p
.grmask
= mask
;
1988 ptr
->r
.record
.p
.r
.gr
= reg
;
1989 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1992 unw_rec_list
*prev
= cur
;
1994 /* Clear least significant set bit. */
1995 mask
&= ~(mask
& (~mask
+ 1));
1998 cur
= alloc_record (gr_gr
);
1999 cur
->r
.record
.p
.grmask
= mask
;
2000 /* Indicate this record shouldn't be output. */
2001 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2002 /* Retain only least significant bit. */
2003 prev
->r
.record
.p
.grmask
^= mask
;
2004 prev
->r
.record
.p
.next
= cur
;
2008 static unw_rec_list
*
2009 output_gr_mem (unsigned int mask
)
2011 unw_rec_list
*ptr
= alloc_record (gr_mem
);
2012 unw_rec_list
*cur
= ptr
;
2014 ptr
->r
.record
.p
.grmask
= mask
;
2015 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2018 unw_rec_list
*prev
= cur
;
2020 /* Clear least significant set bit. */
2021 mask
&= ~(mask
& (~mask
+ 1));
2024 cur
= alloc_record (gr_mem
);
2025 cur
->r
.record
.p
.grmask
= mask
;
2026 /* Retain only least significant bit. */
2027 prev
->r
.record
.p
.grmask
^= mask
;
2028 prev
->r
.record
.p
.next
= cur
;
2032 static unw_rec_list
*
2033 output_br_mem (unsigned int mask
)
2035 unw_rec_list
*ptr
= alloc_record (br_mem
);
2036 unw_rec_list
*cur
= ptr
;
2038 ptr
->r
.record
.p
.brmask
= mask
;
2039 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2042 unw_rec_list
*prev
= cur
;
2044 /* Clear least significant set bit. */
2045 mask
&= ~(mask
& (~mask
+ 1));
2048 cur
= alloc_record (br_mem
);
2049 cur
->r
.record
.p
.brmask
= mask
;
2050 /* Retain only least significant bit. */
2051 prev
->r
.record
.p
.brmask
^= mask
;
2052 prev
->r
.record
.p
.next
= cur
;
2056 static unw_rec_list
*
2057 output_br_gr (unsigned int mask
, unsigned int reg
)
2059 unw_rec_list
*ptr
= alloc_record (br_gr
);
2060 unw_rec_list
*cur
= ptr
;
2062 ptr
->r
.record
.p
.brmask
= mask
;
2063 ptr
->r
.record
.p
.r
.gr
= reg
;
2064 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2067 unw_rec_list
*prev
= cur
;
2069 /* Clear least significant set bit. */
2070 mask
&= ~(mask
& (~mask
+ 1));
2073 cur
= alloc_record (br_gr
);
2074 cur
->r
.record
.p
.brmask
= mask
;
2075 /* Indicate this record shouldn't be output. */
2076 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2077 /* Retain only least significant bit. */
2078 prev
->r
.record
.p
.brmask
^= mask
;
2079 prev
->r
.record
.p
.next
= cur
;
2083 static unw_rec_list
*
2084 output_spill_base (unsigned int offset
)
2086 unw_rec_list
*ptr
= alloc_record (spill_base
);
2087 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2091 static unw_rec_list
*
2092 output_unat_when (void)
2094 unw_rec_list
*ptr
= alloc_record (unat_when
);
2098 static unw_rec_list
*
2099 output_unat_gr (unsigned int gr
)
2101 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2102 ptr
->r
.record
.p
.r
.gr
= gr
;
2106 static unw_rec_list
*
2107 output_unat_psprel (unsigned int offset
)
2109 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2110 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2114 static unw_rec_list
*
2115 output_unat_sprel (unsigned int offset
)
2117 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2118 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2122 static unw_rec_list
*
2123 output_lc_when (void)
2125 unw_rec_list
*ptr
= alloc_record (lc_when
);
2129 static unw_rec_list
*
2130 output_lc_gr (unsigned int gr
)
2132 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2133 ptr
->r
.record
.p
.r
.gr
= gr
;
2137 static unw_rec_list
*
2138 output_lc_psprel (unsigned int offset
)
2140 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2141 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2145 static unw_rec_list
*
2146 output_lc_sprel (unsigned int offset
)
2148 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2149 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2153 static unw_rec_list
*
2154 output_fpsr_when (void)
2156 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2160 static unw_rec_list
*
2161 output_fpsr_gr (unsigned int gr
)
2163 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2164 ptr
->r
.record
.p
.r
.gr
= gr
;
2168 static unw_rec_list
*
2169 output_fpsr_psprel (unsigned int offset
)
2171 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2172 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2176 static unw_rec_list
*
2177 output_fpsr_sprel (unsigned int offset
)
2179 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2180 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2184 static unw_rec_list
*
2185 output_priunat_when_gr (void)
2187 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2191 static unw_rec_list
*
2192 output_priunat_when_mem (void)
2194 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2198 static unw_rec_list
*
2199 output_priunat_gr (unsigned int gr
)
2201 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2202 ptr
->r
.record
.p
.r
.gr
= gr
;
2206 static unw_rec_list
*
2207 output_priunat_psprel (unsigned int offset
)
2209 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2210 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2214 static unw_rec_list
*
2215 output_priunat_sprel (unsigned int offset
)
2217 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2218 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2222 static unw_rec_list
*
2223 output_bsp_when (void)
2225 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2229 static unw_rec_list
*
2230 output_bsp_gr (unsigned int gr
)
2232 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2233 ptr
->r
.record
.p
.r
.gr
= gr
;
2237 static unw_rec_list
*
2238 output_bsp_psprel (unsigned int offset
)
2240 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2241 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2245 static unw_rec_list
*
2246 output_bsp_sprel (unsigned int offset
)
2248 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2249 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2253 static unw_rec_list
*
2254 output_bspstore_when (void)
2256 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2260 static unw_rec_list
*
2261 output_bspstore_gr (unsigned int gr
)
2263 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2264 ptr
->r
.record
.p
.r
.gr
= gr
;
2268 static unw_rec_list
*
2269 output_bspstore_psprel (unsigned int offset
)
2271 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2272 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2276 static unw_rec_list
*
2277 output_bspstore_sprel (unsigned int offset
)
2279 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2280 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2284 static unw_rec_list
*
2285 output_rnat_when (void)
2287 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2291 static unw_rec_list
*
2292 output_rnat_gr (unsigned int gr
)
2294 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2295 ptr
->r
.record
.p
.r
.gr
= gr
;
2299 static unw_rec_list
*
2300 output_rnat_psprel (unsigned int offset
)
2302 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2303 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2307 static unw_rec_list
*
2308 output_rnat_sprel (unsigned int offset
)
2310 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2311 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2315 static unw_rec_list
*
2316 output_unwabi (unsigned long abi
, unsigned long context
)
2318 unw_rec_list
*ptr
= alloc_record (unwabi
);
2319 ptr
->r
.record
.p
.abi
= abi
;
2320 ptr
->r
.record
.p
.context
= context
;
2324 static unw_rec_list
*
2325 output_epilogue (unsigned long ecount
)
2327 unw_rec_list
*ptr
= alloc_record (epilogue
);
2328 ptr
->r
.record
.b
.ecount
= ecount
;
2332 static unw_rec_list
*
2333 output_label_state (unsigned long label
)
2335 unw_rec_list
*ptr
= alloc_record (label_state
);
2336 ptr
->r
.record
.b
.label
= label
;
2340 static unw_rec_list
*
2341 output_copy_state (unsigned long label
)
2343 unw_rec_list
*ptr
= alloc_record (copy_state
);
2344 ptr
->r
.record
.b
.label
= label
;
2348 static unw_rec_list
*
2349 output_spill_psprel (unsigned int ab
,
2351 unsigned int offset
,
2352 unsigned int predicate
)
2354 unw_rec_list
*ptr
= alloc_record (predicate
? spill_psprel_p
: spill_psprel
);
2355 ptr
->r
.record
.x
.ab
= ab
;
2356 ptr
->r
.record
.x
.reg
= reg
;
2357 ptr
->r
.record
.x
.where
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2358 ptr
->r
.record
.x
.qp
= predicate
;
2362 static unw_rec_list
*
2363 output_spill_sprel (unsigned int ab
,
2365 unsigned int offset
,
2366 unsigned int predicate
)
2368 unw_rec_list
*ptr
= alloc_record (predicate
? spill_sprel_p
: spill_sprel
);
2369 ptr
->r
.record
.x
.ab
= ab
;
2370 ptr
->r
.record
.x
.reg
= reg
;
2371 ptr
->r
.record
.x
.where
.spoff
= offset
/ 4;
2372 ptr
->r
.record
.x
.qp
= predicate
;
2376 static unw_rec_list
*
2377 output_spill_reg (unsigned int ab
,
2379 unsigned int targ_reg
,
2381 unsigned int predicate
)
2383 unw_rec_list
*ptr
= alloc_record (predicate
? spill_reg_p
: spill_reg
);
2384 ptr
->r
.record
.x
.ab
= ab
;
2385 ptr
->r
.record
.x
.reg
= reg
;
2386 ptr
->r
.record
.x
.where
.reg
= targ_reg
;
2387 ptr
->r
.record
.x
.xy
= xy
;
2388 ptr
->r
.record
.x
.qp
= predicate
;
2392 /* Given a unw_rec_list process the correct format with the
2393 specified function. */
2396 process_one_record (unw_rec_list
*ptr
, vbyte_func f
)
2398 unsigned int fr_mask
, gr_mask
;
2400 switch (ptr
->r
.type
)
2402 /* This is a dummy record that takes up no space in the output. */
2410 /* These are taken care of by prologue/prologue_gr. */
2415 if (ptr
->r
.type
== prologue_gr
)
2416 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2417 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2419 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2421 /* Output descriptor(s) for union of register spills (if any). */
2422 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2423 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2426 if ((fr_mask
& ~0xfUL
) == 0)
2427 output_P6_format (f
, fr_mem
, fr_mask
);
2430 output_P5_format (f
, gr_mask
, fr_mask
);
2435 output_P6_format (f
, gr_mem
, gr_mask
);
2436 if (ptr
->r
.record
.r
.mask
.br_mem
)
2437 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2439 /* output imask descriptor if necessary: */
2440 if (ptr
->r
.record
.r
.mask
.i
)
2441 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2442 ptr
->r
.record
.r
.imask_size
);
2446 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2450 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2451 ptr
->r
.record
.p
.size
);
2464 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.r
.gr
);
2467 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.r
.br
);
2470 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.off
.sp
, 0);
2478 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2487 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
, 0);
2497 case bspstore_sprel
:
2499 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.sp
);
2502 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2504 const unw_rec_list
*cur
= ptr
;
2506 gr_mask
= cur
->r
.record
.p
.grmask
;
2507 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2508 gr_mask
|= cur
->r
.record
.p
.grmask
;
2509 output_P9_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2513 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2515 const unw_rec_list
*cur
= ptr
;
2517 gr_mask
= cur
->r
.record
.p
.brmask
;
2518 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2519 gr_mask
|= cur
->r
.record
.p
.brmask
;
2520 output_P2_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2524 as_bad (_("spill_mask record unimplemented."));
2526 case priunat_when_gr
:
2527 case priunat_when_mem
:
2531 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2533 case priunat_psprel
:
2535 case bspstore_psprel
:
2537 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
);
2540 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2543 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2547 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2550 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2551 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2552 ptr
->r
.record
.x
.where
.pspoff
);
2555 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2556 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2557 ptr
->r
.record
.x
.where
.spoff
);
2560 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2561 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2562 ptr
->r
.record
.x
.where
.reg
, ptr
->r
.record
.x
.t
);
2564 case spill_psprel_p
:
2565 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2566 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2567 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.pspoff
);
2570 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2571 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2572 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.spoff
);
2575 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2576 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2577 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.where
.reg
,
2581 as_bad (_("record_type_not_valid"));
2586 /* Given a unw_rec_list list, process all the records with
2587 the specified function. */
2589 process_unw_records (unw_rec_list
*list
, vbyte_func f
)
2592 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2593 process_one_record (ptr
, f
);
2596 /* Determine the size of a record list in bytes. */
2598 calc_record_size (unw_rec_list
*list
)
2601 process_unw_records (list
, count_output
);
2605 /* Return the number of bits set in the input value.
2606 Perhaps this has a better place... */
2607 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2608 # define popcount __builtin_popcount
2611 popcount (unsigned x
)
2613 static const unsigned char popcnt
[16] =
2621 if (x
< NELEMS (popcnt
))
2623 return popcnt
[x
% NELEMS (popcnt
)] + popcount (x
/ NELEMS (popcnt
));
2627 /* Update IMASK bitmask to reflect the fact that one or more registers
2628 of type TYPE are saved starting at instruction with index T. If N
2629 bits are set in REGMASK, it is assumed that instructions T through
2630 T+N-1 save these registers.
2634 1: instruction saves next fp reg
2635 2: instruction saves next general reg
2636 3: instruction saves next branch reg */
2638 set_imask (unw_rec_list
*region
,
2639 unsigned long regmask
,
2643 unsigned char *imask
;
2644 unsigned long imask_size
;
2648 imask
= region
->r
.record
.r
.mask
.i
;
2649 imask_size
= region
->r
.record
.r
.imask_size
;
2652 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2653 imask
= xmalloc (imask_size
);
2654 memset (imask
, 0, imask_size
);
2656 region
->r
.record
.r
.imask_size
= imask_size
;
2657 region
->r
.record
.r
.mask
.i
= imask
;
2661 pos
= 2 * (3 - t
% 4);
2664 if (i
>= imask_size
)
2666 as_bad (_("Ignoring attempt to spill beyond end of region"));
2670 imask
[i
] |= (type
& 0x3) << pos
;
2672 regmask
&= (regmask
- 1);
2682 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2683 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2684 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2687 static unsigned long
2688 slot_index (unsigned long slot_addr
,
2690 unsigned long first_addr
,
2694 unsigned long s_index
= 0;
2696 /* First time we are called, the initial address and frag are invalid. */
2697 if (first_addr
== 0)
2700 /* If the two addresses are in different frags, then we need to add in
2701 the remaining size of this frag, and then the entire size of intermediate
2703 while (slot_frag
!= first_frag
)
2705 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2709 /* We can get the final addresses only during and after
2711 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2712 s_index
+= 3 * ((first_frag
->fr_next
->fr_address
2713 - first_frag
->fr_address
2714 - first_frag
->fr_fix
) >> 4);
2717 /* We don't know what the final addresses will be. We try our
2718 best to estimate. */
2719 switch (first_frag
->fr_type
)
2725 as_fatal (_("Only constant space allocation is supported"));
2731 /* Take alignment into account. Assume the worst case
2732 before relaxation. */
2733 s_index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2737 if (first_frag
->fr_symbol
)
2739 as_fatal (_("Only constant offsets are supported"));
2743 s_index
+= 3 * (first_frag
->fr_offset
>> 4);
2747 /* Add in the full size of the frag converted to instruction slots. */
2748 s_index
+= 3 * (first_frag
->fr_fix
>> 4);
2749 /* Subtract away the initial part before first_addr. */
2750 s_index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2751 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2753 /* Move to the beginning of the next frag. */
2754 first_frag
= first_frag
->fr_next
;
2755 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2757 /* This can happen if there is section switching in the middle of a
2758 function, causing the frag chain for the function to be broken.
2759 It is too difficult to recover safely from this problem, so we just
2760 exit with an error. */
2761 if (first_frag
== NULL
)
2762 as_fatal (_("Section switching in code is not supported."));
2765 /* Add in the used part of the last frag. */
2766 s_index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2767 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2771 /* Optimize unwind record directives. */
2773 static unw_rec_list
*
2774 optimize_unw_records (unw_rec_list
*list
)
2779 /* If the only unwind record is ".prologue" or ".prologue" followed
2780 by ".body", then we can optimize the unwind directives away. */
2781 if (list
->r
.type
== prologue
2782 && (list
->next
->r
.type
== endp
2783 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2789 /* Given a complete record list, process any records which have
2790 unresolved fields, (ie length counts for a prologue). After
2791 this has been run, all necessary information should be available
2792 within each record to generate an image. */
2795 fixup_unw_records (unw_rec_list
*list
, int before_relax
)
2797 unw_rec_list
*ptr
, *region
= 0;
2798 unsigned long first_addr
= 0, rlen
= 0, t
;
2799 fragS
*first_frag
= 0;
2801 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2803 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2804 as_bad (_(" Insn slot not set in unwind record."));
2805 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2806 first_addr
, first_frag
, before_relax
);
2807 switch (ptr
->r
.type
)
2815 unsigned long last_addr
= 0;
2816 fragS
*last_frag
= NULL
;
2818 first_addr
= ptr
->slot_number
;
2819 first_frag
= ptr
->slot_frag
;
2820 /* Find either the next body/prologue start, or the end of
2821 the function, and determine the size of the region. */
2822 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2823 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2824 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2826 last_addr
= last
->slot_number
;
2827 last_frag
= last
->slot_frag
;
2830 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2832 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2833 if (ptr
->r
.type
== body
)
2834 /* End of region. */
2842 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2844 /* This happens when a memory-stack-less procedure uses a
2845 ".restore sp" directive at the end of a region to pop
2847 ptr
->r
.record
.b
.t
= 0;
2858 case priunat_when_gr
:
2859 case priunat_when_mem
:
2863 ptr
->r
.record
.p
.t
= t
;
2871 case spill_psprel_p
:
2872 ptr
->r
.record
.x
.t
= t
;
2878 as_bad (_("frgr_mem record before region record!"));
2881 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2882 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2883 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2884 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2889 as_bad (_("fr_mem record before region record!"));
2892 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2893 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2898 as_bad (_("gr_mem record before region record!"));
2901 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2902 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2907 as_bad (_("br_mem record before region record!"));
2910 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2911 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2917 as_bad (_("gr_gr record before region record!"));
2920 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2925 as_bad (_("br_gr record before region record!"));
2928 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2937 /* Estimate the size of a frag before relaxing. We only have one type of frag
2938 to handle here, which is the unwind info frag. */
2941 ia64_estimate_size_before_relax (fragS
*frag
,
2942 asection
*segtype ATTRIBUTE_UNUSED
)
2947 /* ??? This code is identical to the first part of ia64_convert_frag. */
2948 list
= (unw_rec_list
*) frag
->fr_opcode
;
2949 fixup_unw_records (list
, 0);
2951 len
= calc_record_size (list
);
2952 /* pad to pointer-size boundary. */
2953 pad
= len
% md
.pointer_size
;
2955 len
+= md
.pointer_size
- pad
;
2956 /* Add 8 for the header. */
2958 /* Add a pointer for the personality offset. */
2959 if (frag
->fr_offset
)
2960 size
+= md
.pointer_size
;
2962 /* fr_var carries the max_chars that we created the fragment with.
2963 We must, of course, have allocated enough memory earlier. */
2964 gas_assert (frag
->fr_var
>= size
);
2966 return frag
->fr_fix
+ size
;
2969 /* This function converts a rs_machine_dependent variant frag into a
2970 normal fill frag with the unwind image from the record list. */
2972 ia64_convert_frag (fragS
*frag
)
2978 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2979 list
= (unw_rec_list
*) frag
->fr_opcode
;
2980 fixup_unw_records (list
, 0);
2982 len
= calc_record_size (list
);
2983 /* pad to pointer-size boundary. */
2984 pad
= len
% md
.pointer_size
;
2986 len
+= md
.pointer_size
- pad
;
2987 /* Add 8 for the header. */
2989 /* Add a pointer for the personality offset. */
2990 if (frag
->fr_offset
)
2991 size
+= md
.pointer_size
;
2993 /* fr_var carries the max_chars that we created the fragment with.
2994 We must, of course, have allocated enough memory earlier. */
2995 gas_assert (frag
->fr_var
>= size
);
2997 /* Initialize the header area. fr_offset is initialized with
2998 unwind.personality_routine. */
2999 if (frag
->fr_offset
)
3001 if (md
.flags
& EF_IA_64_ABI64
)
3002 flag_value
= (bfd_vma
) 3 << 32;
3004 /* 32-bit unwind info block. */
3005 flag_value
= (bfd_vma
) 0x1003 << 32;
3010 md_number_to_chars (frag
->fr_literal
,
3011 (((bfd_vma
) 1 << 48) /* Version. */
3012 | flag_value
/* U & E handler flags. */
3013 | (len
/ md
.pointer_size
)), /* Length. */
3016 /* Skip the header. */
3017 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
3018 process_unw_records (list
, output_vbyte_mem
);
3020 /* Fill the padding bytes with zeros. */
3022 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
3023 md
.pointer_size
- pad
);
3024 /* Fill the unwind personality with zeros. */
3025 if (frag
->fr_offset
)
3026 md_number_to_chars (frag
->fr_literal
+ size
- md
.pointer_size
, 0,
3029 frag
->fr_fix
+= size
;
3030 frag
->fr_type
= rs_fill
;
3032 frag
->fr_offset
= 0;
3036 parse_predicate_and_operand (expressionS
*e
, unsigned *qp
, const char *po
)
3038 int sep
= parse_operand_and_eval (e
, ',');
3040 *qp
= e
->X_add_number
- REG_P
;
3041 if (e
->X_op
!= O_register
|| *qp
> 63)
3043 as_bad (_("First operand to .%s must be a predicate"), po
);
3047 as_warn (_("Pointless use of p0 as first operand to .%s"), po
);
3049 sep
= parse_operand_and_eval (e
, ',');
3056 convert_expr_to_ab_reg (const expressionS
*e
,
3062 unsigned int reg
= e
->X_add_number
;
3064 *ab
= *regp
= 0; /* Anything valid is good here. */
3066 if (e
->X_op
!= O_register
)
3067 reg
= REG_GR
; /* Anything invalid is good here. */
3069 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
3072 *regp
= reg
- REG_GR
;
3074 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
3075 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
3078 *regp
= reg
- REG_FR
;
3080 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3083 *regp
= reg
- REG_BR
;
3090 case REG_PR
: *regp
= 0; break;
3091 case REG_PSP
: *regp
= 1; break;
3092 case REG_PRIUNAT
: *regp
= 2; break;
3093 case REG_BR
+ 0: *regp
= 3; break;
3094 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3095 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3096 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3097 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3098 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3099 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3100 case REG_AR
+ AR_LC
: *regp
= 10; break;
3103 as_bad (_("Operand %d to .%s must be a preserved register"), n
, po
);
3110 convert_expr_to_xy_reg (const expressionS
*e
,
3116 unsigned int reg
= e
->X_add_number
;
3118 *xy
= *regp
= 0; /* Anything valid is good here. */
3120 if (e
->X_op
!= O_register
)
3121 reg
= REG_GR
; /* Anything invalid is good here. */
3123 if (reg
>= (REG_GR
+ 1) && reg
<= (REG_GR
+ 127))
3126 *regp
= reg
- REG_GR
;
3128 else if (reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 127))
3131 *regp
= reg
- REG_FR
;
3133 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3136 *regp
= reg
- REG_BR
;
3139 as_bad (_("Operand %d to .%s must be a writable register"), n
, po
);
3145 /* The current frag is an alignment frag. */
3146 align_frag
= frag_now
;
3147 s_align_bytes (arg
);
3151 dot_radix (int dummy ATTRIBUTE_UNUSED
)
3158 if (is_it_end_of_statement ())
3160 ch
= get_symbol_name (&radix
);
3161 ia64_canonicalize_symbol_name (radix
);
3162 if (strcasecmp (radix
, "C"))
3163 as_bad (_("Radix `%s' unsupported or invalid"), radix
);
3164 (void) restore_line_pointer (ch
);
3165 demand_empty_rest_of_line ();
3168 /* Helper function for .loc directives. If the assembler is not generating
3169 line number info, then we need to remember which instructions have a .loc
3170 directive, and only call dwarf2_gen_line_info for those instructions. */
3175 CURR_SLOT
.loc_directive_seen
= 1;
3176 dwarf2_directive_loc (x
);
3179 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3181 dot_special_section (int which
)
3183 set_section ((char *) special_section_name
[which
]);
3186 /* Return -1 for warning and 0 for error. */
3189 unwind_diagnostic (const char * region
, const char *directive
)
3191 if (md
.unwind_check
== unwind_check_warning
)
3193 as_warn (_(".%s outside of %s"), directive
, region
);
3198 as_bad (_(".%s outside of %s"), directive
, region
);
3199 ignore_rest_of_line ();
3204 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3205 a procedure but the unwind directive check is set to warning, 0 if
3206 a directive isn't in a procedure and the unwind directive check is set
3210 in_procedure (const char *directive
)
3212 if (unwind
.proc_pending
.sym
3213 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3215 return unwind_diagnostic ("procedure", directive
);
3218 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3219 a prologue but the unwind directive check is set to warning, 0 if
3220 a directive isn't in a prologue and the unwind directive check is set
3224 in_prologue (const char *directive
)
3226 int in
= in_procedure (directive
);
3228 if (in
> 0 && !unwind
.prologue
)
3229 in
= unwind_diagnostic ("prologue", directive
);
3230 check_pending_save ();
3234 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3235 a body but the unwind directive check is set to warning, 0 if
3236 a directive isn't in a body and the unwind directive check is set
3240 in_body (const char *directive
)
3242 int in
= in_procedure (directive
);
3244 if (in
> 0 && !unwind
.body
)
3245 in
= unwind_diagnostic ("body region", directive
);
3250 add_unwind_entry (unw_rec_list
*ptr
, int sep
)
3255 unwind
.tail
->next
= ptr
;
3260 /* The current entry can in fact be a chain of unwind entries. */
3261 if (unwind
.current_entry
== NULL
)
3262 unwind
.current_entry
= ptr
;
3265 /* The current entry can in fact be a chain of unwind entries. */
3266 if (unwind
.current_entry
== NULL
)
3267 unwind
.current_entry
= ptr
;
3272 /* Parse a tag permitted for the current directive. */
3276 ch
= get_symbol_name (&name
);
3277 /* FIXME: For now, just issue a warning that this isn't implemented. */
3284 as_warn (_("Tags on unwind pseudo-ops aren't supported, yet"));
3287 (void) restore_line_pointer (ch
);
3289 if (sep
!= NOT_A_CHAR
)
3290 demand_empty_rest_of_line ();
3294 dot_fframe (int dummy ATTRIBUTE_UNUSED
)
3299 if (!in_prologue ("fframe"))
3302 sep
= parse_operand_and_eval (&e
, ',');
3304 if (e
.X_op
!= O_constant
)
3306 as_bad (_("First operand to .fframe must be a constant"));
3309 add_unwind_entry (output_mem_stack_f (e
.X_add_number
), sep
);
3313 dot_vframe (int dummy ATTRIBUTE_UNUSED
)
3319 if (!in_prologue ("vframe"))
3322 sep
= parse_operand_and_eval (&e
, ',');
3323 reg
= e
.X_add_number
- REG_GR
;
3324 if (e
.X_op
!= O_register
|| reg
> 127)
3326 as_bad (_("First operand to .vframe must be a general register"));
3329 add_unwind_entry (output_mem_stack_v (), sep
);
3330 if (! (unwind
.prologue_mask
& 2))
3331 add_unwind_entry (output_psp_gr (reg
), NOT_A_CHAR
);
3332 else if (reg
!= unwind
.prologue_gr
3333 + (unsigned) popcount (unwind
.prologue_mask
& -(2 << 1)))
3334 as_warn (_("Operand of .vframe contradicts .prologue"));
3338 dot_vframesp (int psp
)
3344 as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant"));
3346 if (!in_prologue ("vframesp"))
3349 sep
= parse_operand_and_eval (&e
, ',');
3350 if (e
.X_op
!= O_constant
)
3352 as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)"));
3355 add_unwind_entry (output_mem_stack_v (), sep
);
3356 add_unwind_entry (output_psp_sprel (e
.X_add_number
), NOT_A_CHAR
);
3360 dot_save (int dummy ATTRIBUTE_UNUSED
)
3363 unsigned reg1
, reg2
;
3366 if (!in_prologue ("save"))
3369 sep
= parse_operand_and_eval (&e1
, ',');
3371 sep
= parse_operand_and_eval (&e2
, ',');
3375 reg1
= e1
.X_add_number
;
3376 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3377 if (e1
.X_op
!= O_register
)
3379 as_bad (_("First operand to .save not a register"));
3380 reg1
= REG_PR
; /* Anything valid is good here. */
3382 reg2
= e2
.X_add_number
- REG_GR
;
3383 if (e2
.X_op
!= O_register
|| reg2
> 127)
3385 as_bad (_("Second operand to .save not a valid register"));
3390 case REG_AR
+ AR_BSP
:
3391 add_unwind_entry (output_bsp_when (), sep
);
3392 add_unwind_entry (output_bsp_gr (reg2
), NOT_A_CHAR
);
3394 case REG_AR
+ AR_BSPSTORE
:
3395 add_unwind_entry (output_bspstore_when (), sep
);
3396 add_unwind_entry (output_bspstore_gr (reg2
), NOT_A_CHAR
);
3398 case REG_AR
+ AR_RNAT
:
3399 add_unwind_entry (output_rnat_when (), sep
);
3400 add_unwind_entry (output_rnat_gr (reg2
), NOT_A_CHAR
);
3402 case REG_AR
+ AR_UNAT
:
3403 add_unwind_entry (output_unat_when (), sep
);
3404 add_unwind_entry (output_unat_gr (reg2
), NOT_A_CHAR
);
3406 case REG_AR
+ AR_FPSR
:
3407 add_unwind_entry (output_fpsr_when (), sep
);
3408 add_unwind_entry (output_fpsr_gr (reg2
), NOT_A_CHAR
);
3410 case REG_AR
+ AR_PFS
:
3411 add_unwind_entry (output_pfs_when (), sep
);
3412 if (! (unwind
.prologue_mask
& 4))
3413 add_unwind_entry (output_pfs_gr (reg2
), NOT_A_CHAR
);
3414 else if (reg2
!= unwind
.prologue_gr
3415 + (unsigned) popcount (unwind
.prologue_mask
& -(4 << 1)))
3416 as_warn (_("Second operand of .save contradicts .prologue"));
3418 case REG_AR
+ AR_LC
:
3419 add_unwind_entry (output_lc_when (), sep
);
3420 add_unwind_entry (output_lc_gr (reg2
), NOT_A_CHAR
);
3423 add_unwind_entry (output_rp_when (), sep
);
3424 if (! (unwind
.prologue_mask
& 8))
3425 add_unwind_entry (output_rp_gr (reg2
), NOT_A_CHAR
);
3426 else if (reg2
!= unwind
.prologue_gr
)
3427 as_warn (_("Second operand of .save contradicts .prologue"));
3430 add_unwind_entry (output_preds_when (), sep
);
3431 if (! (unwind
.prologue_mask
& 1))
3432 add_unwind_entry (output_preds_gr (reg2
), NOT_A_CHAR
);
3433 else if (reg2
!= unwind
.prologue_gr
3434 + (unsigned) popcount (unwind
.prologue_mask
& -(1 << 1)))
3435 as_warn (_("Second operand of .save contradicts .prologue"));
3438 add_unwind_entry (output_priunat_when_gr (), sep
);
3439 add_unwind_entry (output_priunat_gr (reg2
), NOT_A_CHAR
);
3442 as_bad (_("First operand to .save not a valid register"));
3443 add_unwind_entry (NULL
, sep
);
3449 dot_restore (int dummy ATTRIBUTE_UNUSED
)
3452 unsigned long ecount
; /* # of _additional_ regions to pop */
3455 if (!in_body ("restore"))
3458 sep
= parse_operand_and_eval (&e1
, ',');
3459 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3460 as_bad (_("First operand to .restore must be stack pointer (sp)"));
3466 sep
= parse_operand_and_eval (&e2
, ',');
3467 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3469 as_bad (_("Second operand to .restore must be a constant >= 0"));
3470 e2
.X_add_number
= 0;
3472 ecount
= e2
.X_add_number
;
3475 ecount
= unwind
.prologue_count
- 1;
3477 if (ecount
>= unwind
.prologue_count
)
3479 as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"),
3480 ecount
+ 1, unwind
.prologue_count
);
3484 add_unwind_entry (output_epilogue (ecount
), sep
);
3486 if (ecount
< unwind
.prologue_count
)
3487 unwind
.prologue_count
-= ecount
+ 1;
3489 unwind
.prologue_count
= 0;
3493 dot_restorereg (int pred
)
3495 unsigned int qp
, ab
, reg
;
3498 const char * const po
= pred
? "restorereg.p" : "restorereg";
3500 if (!in_procedure (po
))
3504 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3507 sep
= parse_operand_and_eval (&e
, ',');
3510 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3512 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0, qp
), sep
);
3515 static const char *special_linkonce_name
[] =
3517 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3521 start_unwind_section (const segT text_seg
, int sec_index
)
3524 Use a slightly ugly scheme to derive the unwind section names from
3525 the text section name:
3527 text sect. unwind table sect.
3528 name: name: comments:
3529 ---------- ----------------- --------------------------------
3531 .text.foo .IA_64.unwind.text.foo
3532 .foo .IA_64.unwind.foo
3534 .gnu.linkonce.ia64unw.foo
3535 _info .IA_64.unwind_info gas issues error message (ditto)
3536 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3538 This mapping is done so that:
3540 (a) An object file with unwind info only in .text will use
3541 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3542 This follows the letter of the ABI and also ensures backwards
3543 compatibility with older toolchains.
3545 (b) An object file with unwind info in multiple text sections
3546 will use separate unwind sections for each text section.
3547 This allows us to properly set the "sh_info" and "sh_link"
3548 fields in SHT_IA_64_UNWIND as required by the ABI and also
3549 lets GNU ld support programs with multiple segments
3550 containing unwind info (as might be the case for certain
3551 embedded applications).
3553 (c) An error is issued if there would be a name clash.
3556 const char *text_name
, *sec_text_name
;
3558 const char *prefix
= special_section_name
[sec_index
];
3561 sec_text_name
= segment_name (text_seg
);
3562 text_name
= sec_text_name
;
3563 if (strncmp (text_name
, "_info", 5) == 0)
3565 as_bad (_("Illegal section name `%s' (causes unwind section name clash)"),
3567 ignore_rest_of_line ();
3570 if (strcmp (text_name
, ".text") == 0)
3573 /* Build the unwind section name by appending the (possibly stripped)
3574 text section name to the unwind prefix. */
3576 if (strncmp (text_name
, ".gnu.linkonce.t.",
3577 sizeof (".gnu.linkonce.t.") - 1) == 0)
3579 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3580 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3583 sec_name
= concat (prefix
, suffix
, NULL
);
3585 /* Handle COMDAT group. */
3586 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3587 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3590 const char *group_name
= elf_group_name (text_seg
);
3592 if (group_name
== NULL
)
3594 as_bad (_("Group section `%s' has no group signature"),
3596 ignore_rest_of_line ();
3601 /* We have to construct a fake section directive. */
3602 section
= concat (sec_name
, ",\"aG\",@progbits,", group_name
, ",comdat", NULL
);
3603 set_section (section
);
3608 set_section (sec_name
);
3609 bfd_set_section_flags (stdoutput
, now_seg
,
3610 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3613 elf_linked_to_section (now_seg
) = text_seg
;
3618 generate_unwind_image (const segT text_seg
)
3623 /* Mark the end of the unwind info, so that we can compute the size of the
3624 last unwind region. */
3625 add_unwind_entry (output_endp (), NOT_A_CHAR
);
3627 /* Force out pending instructions, to make sure all unwind records have
3628 a valid slot_number field. */
3629 ia64_flush_insns ();
3631 /* Generate the unwind record. */
3632 list
= optimize_unw_records (unwind
.list
);
3633 fixup_unw_records (list
, 1);
3634 size
= calc_record_size (list
);
3636 if (size
> 0 || unwind
.force_unwind_entry
)
3638 unwind
.force_unwind_entry
= 0;
3639 /* pad to pointer-size boundary. */
3640 pad
= size
% md
.pointer_size
;
3642 size
+= md
.pointer_size
- pad
;
3643 /* Add 8 for the header. */
3645 /* Add a pointer for the personality offset. */
3646 if (unwind
.personality_routine
)
3647 size
+= md
.pointer_size
;
3650 /* If there are unwind records, switch sections, and output the info. */
3654 bfd_reloc_code_real_type reloc
;
3656 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3658 /* Make sure the section has 4 byte alignment for ILP32 and
3659 8 byte alignment for LP64. */
3660 frag_align (md
.pointer_size_shift
, 0, 0);
3661 record_alignment (now_seg
, md
.pointer_size_shift
);
3663 /* Set expression which points to start of unwind descriptor area. */
3664 unwind
.info
= expr_build_dot ();
3666 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3667 (offsetT
) (long) unwind
.personality_routine
,
3670 /* Add the personality address to the image. */
3671 if (unwind
.personality_routine
!= 0)
3673 exp
.X_op
= O_symbol
;
3674 exp
.X_add_symbol
= unwind
.personality_routine
;
3675 exp
.X_add_number
= 0;
3677 if (md
.flags
& EF_IA_64_BE
)
3679 if (md
.flags
& EF_IA_64_ABI64
)
3680 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3682 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3686 if (md
.flags
& EF_IA_64_ABI64
)
3687 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3689 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3692 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3693 md
.pointer_size
, &exp
, 0, reloc
);
3694 unwind
.personality_routine
= 0;
3698 free_saved_prologue_counts ();
3699 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3703 dot_handlerdata (int dummy ATTRIBUTE_UNUSED
)
3705 if (!in_procedure ("handlerdata"))
3707 unwind
.force_unwind_entry
= 1;
3709 /* Remember which segment we're in so we can switch back after .endp */
3710 unwind
.saved_text_seg
= now_seg
;
3711 unwind
.saved_text_subseg
= now_subseg
;
3713 /* Generate unwind info into unwind-info section and then leave that
3714 section as the currently active one so dataXX directives go into
3715 the language specific data area of the unwind info block. */
3716 generate_unwind_image (now_seg
);
3717 demand_empty_rest_of_line ();
3721 dot_unwentry (int dummy ATTRIBUTE_UNUSED
)
3723 if (!in_procedure ("unwentry"))
3725 unwind
.force_unwind_entry
= 1;
3726 demand_empty_rest_of_line ();
3730 dot_altrp (int dummy ATTRIBUTE_UNUSED
)
3735 if (!in_prologue ("altrp"))
3738 parse_operand_and_eval (&e
, 0);
3739 reg
= e
.X_add_number
- REG_BR
;
3740 if (e
.X_op
!= O_register
|| reg
> 7)
3742 as_bad (_("First operand to .altrp not a valid branch register"));
3745 add_unwind_entry (output_rp_br (reg
), 0);
3749 dot_savemem (int psprel
)
3754 const char * const po
= psprel
? "savepsp" : "savesp";
3756 if (!in_prologue (po
))
3759 sep
= parse_operand_and_eval (&e1
, ',');
3761 sep
= parse_operand_and_eval (&e2
, ',');
3765 reg1
= e1
.X_add_number
;
3766 val
= e2
.X_add_number
;
3768 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3769 if (e1
.X_op
!= O_register
)
3771 as_bad (_("First operand to .%s not a register"), po
);
3772 reg1
= REG_PR
; /* Anything valid is good here. */
3774 if (e2
.X_op
!= O_constant
)
3776 as_bad (_("Second operand to .%s not a constant"), po
);
3782 case REG_AR
+ AR_BSP
:
3783 add_unwind_entry (output_bsp_when (), sep
);
3784 add_unwind_entry ((psprel
3786 : output_bsp_sprel
) (val
), NOT_A_CHAR
);
3788 case REG_AR
+ AR_BSPSTORE
:
3789 add_unwind_entry (output_bspstore_when (), sep
);
3790 add_unwind_entry ((psprel
3791 ? output_bspstore_psprel
3792 : output_bspstore_sprel
) (val
), NOT_A_CHAR
);
3794 case REG_AR
+ AR_RNAT
:
3795 add_unwind_entry (output_rnat_when (), sep
);
3796 add_unwind_entry ((psprel
3797 ? output_rnat_psprel
3798 : output_rnat_sprel
) (val
), NOT_A_CHAR
);
3800 case REG_AR
+ AR_UNAT
:
3801 add_unwind_entry (output_unat_when (), sep
);
3802 add_unwind_entry ((psprel
3803 ? output_unat_psprel
3804 : output_unat_sprel
) (val
), NOT_A_CHAR
);
3806 case REG_AR
+ AR_FPSR
:
3807 add_unwind_entry (output_fpsr_when (), sep
);
3808 add_unwind_entry ((psprel
3809 ? output_fpsr_psprel
3810 : output_fpsr_sprel
) (val
), NOT_A_CHAR
);
3812 case REG_AR
+ AR_PFS
:
3813 add_unwind_entry (output_pfs_when (), sep
);
3814 add_unwind_entry ((psprel
3816 : output_pfs_sprel
) (val
), NOT_A_CHAR
);
3818 case REG_AR
+ AR_LC
:
3819 add_unwind_entry (output_lc_when (), sep
);
3820 add_unwind_entry ((psprel
3822 : output_lc_sprel
) (val
), NOT_A_CHAR
);
3825 add_unwind_entry (output_rp_when (), sep
);
3826 add_unwind_entry ((psprel
3828 : output_rp_sprel
) (val
), NOT_A_CHAR
);
3831 add_unwind_entry (output_preds_when (), sep
);
3832 add_unwind_entry ((psprel
3833 ? output_preds_psprel
3834 : output_preds_sprel
) (val
), NOT_A_CHAR
);
3837 add_unwind_entry (output_priunat_when_mem (), sep
);
3838 add_unwind_entry ((psprel
3839 ? output_priunat_psprel
3840 : output_priunat_sprel
) (val
), NOT_A_CHAR
);
3843 as_bad (_("First operand to .%s not a valid register"), po
);
3844 add_unwind_entry (NULL
, sep
);
3850 dot_saveg (int dummy ATTRIBUTE_UNUSED
)
3856 if (!in_prologue ("save.g"))
3859 sep
= parse_operand_and_eval (&e
, ',');
3861 grmask
= e
.X_add_number
;
3862 if (e
.X_op
!= O_constant
3863 || e
.X_add_number
<= 0
3864 || e
.X_add_number
> 0xf)
3866 as_bad (_("First operand to .save.g must be a positive 4-bit constant"));
3873 int n
= popcount (grmask
);
3875 parse_operand_and_eval (&e
, 0);
3876 reg
= e
.X_add_number
- REG_GR
;
3877 if (e
.X_op
!= O_register
|| reg
> 127)
3879 as_bad (_("Second operand to .save.g must be a general register"));
3882 else if (reg
> 128U - n
)
3884 as_bad (_("Second operand to .save.g must be the first of %d general registers"), n
);
3887 add_unwind_entry (output_gr_gr (grmask
, reg
), 0);
3890 add_unwind_entry (output_gr_mem (grmask
), 0);
3894 dot_savef (int dummy ATTRIBUTE_UNUSED
)
3898 if (!in_prologue ("save.f"))
3901 parse_operand_and_eval (&e
, 0);
3903 if (e
.X_op
!= O_constant
3904 || e
.X_add_number
<= 0
3905 || e
.X_add_number
> 0xfffff)
3907 as_bad (_("Operand to .save.f must be a positive 20-bit constant"));
3910 add_unwind_entry (output_fr_mem (e
.X_add_number
), 0);
3914 dot_saveb (int dummy ATTRIBUTE_UNUSED
)
3920 if (!in_prologue ("save.b"))
3923 sep
= parse_operand_and_eval (&e
, ',');
3925 brmask
= e
.X_add_number
;
3926 if (e
.X_op
!= O_constant
3927 || e
.X_add_number
<= 0
3928 || e
.X_add_number
> 0x1f)
3930 as_bad (_("First operand to .save.b must be a positive 5-bit constant"));
3937 int n
= popcount (brmask
);
3939 parse_operand_and_eval (&e
, 0);
3940 reg
= e
.X_add_number
- REG_GR
;
3941 if (e
.X_op
!= O_register
|| reg
> 127)
3943 as_bad (_("Second operand to .save.b must be a general register"));
3946 else if (reg
> 128U - n
)
3948 as_bad (_("Second operand to .save.b must be the first of %d general registers"), n
);
3951 add_unwind_entry (output_br_gr (brmask
, reg
), 0);
3954 add_unwind_entry (output_br_mem (brmask
), 0);
3958 dot_savegf (int dummy ATTRIBUTE_UNUSED
)
3962 if (!in_prologue ("save.gf"))
3965 if (parse_operand_and_eval (&e1
, ',') == ',')
3966 parse_operand_and_eval (&e2
, 0);
3970 if (e1
.X_op
!= O_constant
3971 || e1
.X_add_number
< 0
3972 || e1
.X_add_number
> 0xf)
3974 as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant"));
3976 e1
.X_add_number
= 0;
3978 if (e2
.X_op
!= O_constant
3979 || e2
.X_add_number
< 0
3980 || e2
.X_add_number
> 0xfffff)
3982 as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant"));
3984 e2
.X_add_number
= 0;
3986 if (e1
.X_op
== O_constant
3987 && e2
.X_op
== O_constant
3988 && e1
.X_add_number
== 0
3989 && e2
.X_add_number
== 0)
3990 as_bad (_("Operands to .save.gf may not be both zero"));
3992 add_unwind_entry (output_frgr_mem (e1
.X_add_number
, e2
.X_add_number
), 0);
3996 dot_spill (int dummy ATTRIBUTE_UNUSED
)
4000 if (!in_prologue ("spill"))
4003 parse_operand_and_eval (&e
, 0);
4005 if (e
.X_op
!= O_constant
)
4007 as_bad (_("Operand to .spill must be a constant"));
4010 add_unwind_entry (output_spill_base (e
.X_add_number
), 0);
4014 dot_spillreg (int pred
)
4017 unsigned int qp
, ab
, xy
, reg
, treg
;
4019 const char * const po
= pred
? "spillreg.p" : "spillreg";
4021 if (!in_procedure (po
))
4025 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4028 sep
= parse_operand_and_eval (&e
, ',');
4031 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4034 sep
= parse_operand_and_eval (&e
, ',');
4037 convert_expr_to_xy_reg (&e
, &xy
, &treg
, po
, 2 + pred
);
4039 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
, qp
), sep
);
4043 dot_spillmem (int psprel
)
4046 int pred
= (psprel
< 0), sep
;
4047 unsigned int qp
, ab
, reg
;
4053 po
= psprel
? "spillpsp.p" : "spillsp.p";
4056 po
= psprel
? "spillpsp" : "spillsp";
4058 if (!in_procedure (po
))
4062 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4065 sep
= parse_operand_and_eval (&e
, ',');
4068 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4071 sep
= parse_operand_and_eval (&e
, ',');
4074 if (e
.X_op
!= O_constant
)
4076 as_bad (_("Operand %d to .%s must be a constant"), 2 + pred
, po
);
4081 add_unwind_entry (output_spill_psprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4083 add_unwind_entry (output_spill_sprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4087 get_saved_prologue_count (unsigned long lbl
)
4089 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4091 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4095 return lpc
->prologue_count
;
4097 as_bad (_("Missing .label_state %ld"), lbl
);
4102 save_prologue_count (unsigned long lbl
, unsigned int count
)
4104 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4106 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4110 lpc
->prologue_count
= count
;
4113 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4115 new_lpc
->next
= unwind
.saved_prologue_counts
;
4116 new_lpc
->label_number
= lbl
;
4117 new_lpc
->prologue_count
= count
;
4118 unwind
.saved_prologue_counts
= new_lpc
;
4123 free_saved_prologue_counts (void)
4125 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4126 label_prologue_count
*next
;
4135 unwind
.saved_prologue_counts
= NULL
;
4139 dot_label_state (int dummy ATTRIBUTE_UNUSED
)
4143 if (!in_body ("label_state"))
4146 parse_operand_and_eval (&e
, 0);
4147 if (e
.X_op
== O_constant
)
4148 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4151 as_bad (_("Operand to .label_state must be a constant"));
4154 add_unwind_entry (output_label_state (e
.X_add_number
), 0);
4158 dot_copy_state (int dummy ATTRIBUTE_UNUSED
)
4162 if (!in_body ("copy_state"))
4165 parse_operand_and_eval (&e
, 0);
4166 if (e
.X_op
== O_constant
)
4167 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4170 as_bad (_("Operand to .copy_state must be a constant"));
4173 add_unwind_entry (output_copy_state (e
.X_add_number
), 0);
4177 dot_unwabi (int dummy ATTRIBUTE_UNUSED
)
4182 if (!in_prologue ("unwabi"))
4185 sep
= parse_operand_and_eval (&e1
, ',');
4187 parse_operand_and_eval (&e2
, 0);
4191 if (e1
.X_op
!= O_constant
)
4193 as_bad (_("First operand to .unwabi must be a constant"));
4194 e1
.X_add_number
= 0;
4197 if (e2
.X_op
!= O_constant
)
4199 as_bad (_("Second operand to .unwabi must be a constant"));
4200 e2
.X_add_number
= 0;
4203 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
), 0);
4207 dot_personality (int dummy ATTRIBUTE_UNUSED
)
4211 if (!in_procedure ("personality"))
4214 c
= get_symbol_name (&name
);
4215 p
= input_line_pointer
;
4216 unwind
.personality_routine
= symbol_find_or_make (name
);
4217 unwind
.force_unwind_entry
= 1;
4219 SKIP_WHITESPACE_AFTER_NAME ();
4220 demand_empty_rest_of_line ();
4224 dot_proc (int dummy ATTRIBUTE_UNUSED
)
4228 proc_pending
*pending
, *last_pending
;
4230 if (unwind
.proc_pending
.sym
)
4232 (md
.unwind_check
== unwind_check_warning
4234 : as_bad
) (_("Missing .endp after previous .proc"));
4235 while (unwind
.proc_pending
.next
)
4237 pending
= unwind
.proc_pending
.next
;
4238 unwind
.proc_pending
.next
= pending
->next
;
4242 last_pending
= NULL
;
4244 /* Parse names of main and alternate entry points and mark them as
4245 function symbols: */
4249 c
= get_symbol_name (&name
);
4250 p
= input_line_pointer
;
4252 as_bad (_("Empty argument of .proc"));
4255 sym
= symbol_find_or_make (name
);
4256 if (S_IS_DEFINED (sym
))
4257 as_bad (_("`%s' was already defined"), name
);
4258 else if (!last_pending
)
4260 unwind
.proc_pending
.sym
= sym
;
4261 last_pending
= &unwind
.proc_pending
;
4265 pending
= xmalloc (sizeof (*pending
));
4267 last_pending
= last_pending
->next
= pending
;
4269 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4272 SKIP_WHITESPACE_AFTER_NAME ();
4273 if (*input_line_pointer
!= ',')
4275 ++input_line_pointer
;
4279 unwind
.proc_pending
.sym
= expr_build_dot ();
4280 last_pending
= &unwind
.proc_pending
;
4282 last_pending
->next
= NULL
;
4283 demand_empty_rest_of_line ();
4284 do_align (4, NULL
, 0, 0);
4286 unwind
.prologue
= 0;
4287 unwind
.prologue_count
= 0;
4290 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4291 unwind
.personality_routine
= 0;
4295 dot_body (int dummy ATTRIBUTE_UNUSED
)
4297 if (!in_procedure ("body"))
4299 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4300 as_warn (_("Initial .body should precede any instructions"));
4301 check_pending_save ();
4303 unwind
.prologue
= 0;
4304 unwind
.prologue_mask
= 0;
4307 add_unwind_entry (output_body (), 0);
4311 dot_prologue (int dummy ATTRIBUTE_UNUSED
)
4313 unsigned mask
= 0, grsave
= 0;
4315 if (!in_procedure ("prologue"))
4317 if (unwind
.prologue
)
4319 as_bad (_(".prologue within prologue"));
4320 ignore_rest_of_line ();
4323 if (!unwind
.body
&& unwind
.insn
)
4324 as_warn (_("Initial .prologue should precede any instructions"));
4326 if (!is_it_end_of_statement ())
4329 int n
, sep
= parse_operand_and_eval (&e
, ',');
4331 if (e
.X_op
!= O_constant
4332 || e
.X_add_number
< 0
4333 || e
.X_add_number
> 0xf)
4334 as_bad (_("First operand to .prologue must be a positive 4-bit constant"));
4335 else if (e
.X_add_number
== 0)
4336 as_warn (_("Pointless use of zero first operand to .prologue"));
4338 mask
= e
.X_add_number
;
4340 n
= popcount (mask
);
4343 parse_operand_and_eval (&e
, 0);
4347 if (e
.X_op
== O_constant
4348 && e
.X_add_number
>= 0
4349 && e
.X_add_number
< 128)
4351 if (md
.unwind_check
== unwind_check_error
)
4352 as_warn (_("Using a constant as second operand to .prologue is deprecated"));
4353 grsave
= e
.X_add_number
;
4355 else if (e
.X_op
!= O_register
4356 || (grsave
= e
.X_add_number
- REG_GR
) > 127)
4358 as_bad (_("Second operand to .prologue must be a general register"));
4361 else if (grsave
> 128U - n
)
4363 as_bad (_("Second operand to .prologue must be the first of %d general registers"), n
);
4369 add_unwind_entry (output_prologue_gr (mask
, grsave
), 0);
4371 add_unwind_entry (output_prologue (), 0);
4373 unwind
.prologue
= 1;
4374 unwind
.prologue_mask
= mask
;
4375 unwind
.prologue_gr
= grsave
;
4377 ++unwind
.prologue_count
;
4381 dot_endp (int dummy ATTRIBUTE_UNUSED
)
4384 int bytes_per_address
;
4387 subsegT saved_subseg
;
4388 proc_pending
*pending
;
4389 int unwind_check
= md
.unwind_check
;
4391 md
.unwind_check
= unwind_check_error
;
4392 if (!in_procedure ("endp"))
4394 md
.unwind_check
= unwind_check
;
4396 if (unwind
.saved_text_seg
)
4398 saved_seg
= unwind
.saved_text_seg
;
4399 saved_subseg
= unwind
.saved_text_subseg
;
4400 unwind
.saved_text_seg
= NULL
;
4404 saved_seg
= now_seg
;
4405 saved_subseg
= now_subseg
;
4408 insn_group_break (1, 0, 0);
4410 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4412 generate_unwind_image (saved_seg
);
4414 if (unwind
.info
|| unwind
.force_unwind_entry
)
4418 subseg_set (md
.last_text_seg
, 0);
4419 proc_end
= expr_build_dot ();
4421 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4423 /* Make sure that section has 4 byte alignment for ILP32 and
4424 8 byte alignment for LP64. */
4425 record_alignment (now_seg
, md
.pointer_size_shift
);
4427 /* Need space for 3 pointers for procedure start, procedure end,
4429 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4430 where
= frag_now_fix () - (3 * md
.pointer_size
);
4431 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4433 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4434 e
.X_op
= O_pseudo_fixup
;
4435 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4437 if (!S_IS_LOCAL (unwind
.proc_pending
.sym
)
4438 && S_IS_DEFINED (unwind
.proc_pending
.sym
))
4439 e
.X_add_symbol
= symbol_temp_new (S_GET_SEGMENT (unwind
.proc_pending
.sym
),
4440 S_GET_VALUE (unwind
.proc_pending
.sym
),
4441 symbol_get_frag (unwind
.proc_pending
.sym
));
4443 e
.X_add_symbol
= unwind
.proc_pending
.sym
;
4444 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
,
4447 e
.X_op
= O_pseudo_fixup
;
4448 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4450 e
.X_add_symbol
= proc_end
;
4451 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4452 bytes_per_address
, &e
, BFD_RELOC_NONE
);
4456 e
.X_op
= O_pseudo_fixup
;
4457 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4459 e
.X_add_symbol
= unwind
.info
;
4460 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4461 bytes_per_address
, &e
, BFD_RELOC_NONE
);
4464 subseg_set (saved_seg
, saved_subseg
);
4466 /* Set symbol sizes. */
4467 pending
= &unwind
.proc_pending
;
4468 if (S_GET_NAME (pending
->sym
))
4472 symbolS
*sym
= pending
->sym
;
4474 if (!S_IS_DEFINED (sym
))
4475 as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym
));
4476 else if (S_GET_SIZE (sym
) == 0
4477 && symbol_get_obj (sym
)->size
== NULL
)
4479 fragS
*frag
= symbol_get_frag (sym
);
4483 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4484 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4487 symbol_get_obj (sym
)->size
=
4488 (expressionS
*) xmalloc (sizeof (expressionS
));
4489 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4490 symbol_get_obj (sym
)->size
->X_add_symbol
4491 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4492 frag_now_fix (), frag_now
);
4493 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4494 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4498 } while ((pending
= pending
->next
) != NULL
);
4501 /* Parse names of main and alternate entry points. */
4507 c
= get_symbol_name (&name
);
4508 p
= input_line_pointer
;
4510 (md
.unwind_check
== unwind_check_warning
4512 : as_bad
) (_("Empty argument of .endp"));
4515 symbolS
*sym
= symbol_find (name
);
4517 for (pending
= &unwind
.proc_pending
; pending
; pending
= pending
->next
)
4519 if (sym
== pending
->sym
)
4521 pending
->sym
= NULL
;
4525 if (!sym
|| !pending
)
4526 as_warn (_("`%s' was not specified with previous .proc"), name
);
4529 SKIP_WHITESPACE_AFTER_NAME ();
4530 if (*input_line_pointer
!= ',')
4532 ++input_line_pointer
;
4534 demand_empty_rest_of_line ();
4536 /* Deliberately only checking for the main entry point here; the
4537 language spec even says all arguments to .endp are ignored. */
4538 if (unwind
.proc_pending
.sym
4539 && S_GET_NAME (unwind
.proc_pending
.sym
)
4540 && strcmp (S_GET_NAME (unwind
.proc_pending
.sym
), FAKE_LABEL_NAME
))
4541 as_warn (_("`%s' should be an operand to this .endp"),
4542 S_GET_NAME (unwind
.proc_pending
.sym
));
4543 while (unwind
.proc_pending
.next
)
4545 pending
= unwind
.proc_pending
.next
;
4546 unwind
.proc_pending
.next
= pending
->next
;
4549 unwind
.proc_pending
.sym
= unwind
.info
= NULL
;
4553 dot_template (int template_val
)
4555 CURR_SLOT
.user_template
= template_val
;
4559 dot_regstk (int dummy ATTRIBUTE_UNUSED
)
4561 int ins
, locs
, outs
, rots
;
4563 if (is_it_end_of_statement ())
4564 ins
= locs
= outs
= rots
= 0;
4567 ins
= get_absolute_expression ();
4568 if (*input_line_pointer
++ != ',')
4570 locs
= get_absolute_expression ();
4571 if (*input_line_pointer
++ != ',')
4573 outs
= get_absolute_expression ();
4574 if (*input_line_pointer
++ != ',')
4576 rots
= get_absolute_expression ();
4578 set_regstack (ins
, locs
, outs
, rots
);
4582 as_bad (_("Comma expected"));
4583 ignore_rest_of_line ();
4590 valueT num_alloced
= 0;
4591 struct dynreg
**drpp
, *dr
;
4592 int ch
, base_reg
= 0;
4598 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4599 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4600 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4604 /* First, remove existing names from hash table. */
4605 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4607 hash_delete (md
.dynreg_hash
, dr
->name
, FALSE
);
4608 /* FIXME: Free dr->name. */
4612 drpp
= &md
.dynreg
[type
];
4615 ch
= get_symbol_name (&start
);
4616 len
= strlen (ia64_canonicalize_symbol_name (start
));
4617 *input_line_pointer
= ch
;
4619 SKIP_WHITESPACE_AFTER_NAME ();
4620 if (*input_line_pointer
!= '[')
4622 as_bad (_("Expected '['"));
4625 ++input_line_pointer
; /* skip '[' */
4627 num_regs
= get_absolute_expression ();
4629 if (*input_line_pointer
++ != ']')
4631 as_bad (_("Expected ']'"));
4636 as_bad (_("Number of elements must be positive"));
4641 num_alloced
+= num_regs
;
4645 if (num_alloced
> md
.rot
.num_regs
)
4647 as_bad (_("Used more than the declared %d rotating registers"),
4653 if (num_alloced
> 96)
4655 as_bad (_("Used more than the available 96 rotating registers"));
4660 if (num_alloced
> 48)
4662 as_bad (_("Used more than the available 48 rotating registers"));
4673 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4674 memset (*drpp
, 0, sizeof (*dr
));
4677 name
= obstack_alloc (¬es
, len
+ 1);
4678 memcpy (name
, start
, len
);
4683 dr
->num_regs
= num_regs
;
4684 dr
->base
= base_reg
;
4686 base_reg
+= num_regs
;
4688 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4690 as_bad (_("Attempt to redefine register set `%s'"), name
);
4691 obstack_free (¬es
, name
);
4695 if (*input_line_pointer
!= ',')
4697 ++input_line_pointer
; /* skip comma */
4700 demand_empty_rest_of_line ();
4704 ignore_rest_of_line ();
4708 dot_byteorder (int byteorder
)
4710 segment_info_type
*seginfo
= seg_info (now_seg
);
4712 if (byteorder
== -1)
4714 if (seginfo
->tc_segment_info_data
.endian
== 0)
4715 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4716 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4719 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4721 if (target_big_endian
!= byteorder
)
4723 target_big_endian
= byteorder
;
4724 if (target_big_endian
)
4726 ia64_number_to_chars
= number_to_chars_bigendian
;
4727 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4731 ia64_number_to_chars
= number_to_chars_littleendian
;
4732 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4738 dot_psr (int dummy ATTRIBUTE_UNUSED
)
4745 ch
= get_symbol_name (&option
);
4746 if (strcmp (option
, "lsb") == 0)
4747 md
.flags
&= ~EF_IA_64_BE
;
4748 else if (strcmp (option
, "msb") == 0)
4749 md
.flags
|= EF_IA_64_BE
;
4750 else if (strcmp (option
, "abi32") == 0)
4751 md
.flags
&= ~EF_IA_64_ABI64
;
4752 else if (strcmp (option
, "abi64") == 0)
4753 md
.flags
|= EF_IA_64_ABI64
;
4755 as_bad (_("Unknown psr option `%s'"), option
);
4756 *input_line_pointer
= ch
;
4758 SKIP_WHITESPACE_AFTER_NAME ();
4759 if (*input_line_pointer
!= ',')
4762 ++input_line_pointer
;
4765 demand_empty_rest_of_line ();
4769 dot_ln (int dummy ATTRIBUTE_UNUSED
)
4771 new_logical_line (0, get_absolute_expression ());
4772 demand_empty_rest_of_line ();
4776 cross_section (int ref
, void (*builder
) (int), int ua
)
4779 int saved_auto_align
;
4780 unsigned int section_count
;
4785 start
= input_line_pointer
;
4786 c
= get_symbol_name (&name
);
4787 if (input_line_pointer
== start
)
4789 as_bad (_("Missing section name"));
4790 ignore_rest_of_line ();
4793 * input_line_pointer
= c
;
4794 SKIP_WHITESPACE_AFTER_NAME ();
4795 end
= input_line_pointer
;
4796 if (*input_line_pointer
!= ',')
4798 as_bad (_("Comma expected after section name"));
4799 ignore_rest_of_line ();
4803 end
= input_line_pointer
+ 1; /* skip comma */
4804 input_line_pointer
= start
;
4805 md
.keep_pending_output
= 1;
4806 section_count
= bfd_count_sections (stdoutput
);
4807 obj_elf_section (0);
4808 if (section_count
!= bfd_count_sections (stdoutput
))
4809 as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."));
4810 input_line_pointer
= end
;
4811 saved_auto_align
= md
.auto_align
;
4816 md
.auto_align
= saved_auto_align
;
4817 obj_elf_previous (0);
4818 md
.keep_pending_output
= 0;
4822 dot_xdata (int size
)
4824 cross_section (size
, cons
, 0);
4827 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4830 stmt_float_cons (int kind
)
4850 do_align (alignment
, NULL
, 0, 0);
4855 stmt_cons_ua (int size
)
4857 int saved_auto_align
= md
.auto_align
;
4861 md
.auto_align
= saved_auto_align
;
4865 dot_xfloat_cons (int kind
)
4867 cross_section (kind
, stmt_float_cons
, 0);
4871 dot_xstringer (int zero
)
4873 cross_section (zero
, stringer
, 0);
4877 dot_xdata_ua (int size
)
4879 cross_section (size
, cons
, 1);
4883 dot_xfloat_cons_ua (int kind
)
4885 cross_section (kind
, float_cons
, 1);
4888 /* .reg.val <regname>,value */
4891 dot_reg_val (int dummy ATTRIBUTE_UNUSED
)
4895 expression_and_evaluate (®
);
4896 if (reg
.X_op
!= O_register
)
4898 as_bad (_("Register name expected"));
4899 ignore_rest_of_line ();
4901 else if (*input_line_pointer
++ != ',')
4903 as_bad (_("Comma expected"));
4904 ignore_rest_of_line ();
4908 valueT value
= get_absolute_expression ();
4909 int regno
= reg
.X_add_number
;
4910 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4911 as_warn (_("Register value annotation ignored"));
4914 gr_values
[regno
- REG_GR
].known
= 1;
4915 gr_values
[regno
- REG_GR
].value
= value
;
4916 gr_values
[regno
- REG_GR
].path
= md
.path
;
4919 demand_empty_rest_of_line ();
4924 .serialize.instruction
4927 dot_serialize (int type
)
4929 insn_group_break (0, 0, 0);
4931 instruction_serialization ();
4933 data_serialization ();
4934 insn_group_break (0, 0, 0);
4935 demand_empty_rest_of_line ();
4938 /* select dv checking mode
4943 A stop is inserted when changing modes
4947 dot_dv_mode (int type
)
4949 if (md
.manual_bundling
)
4950 as_warn (_("Directive invalid within a bundle"));
4952 if (type
== 'E' || type
== 'A')
4953 md
.mode_explicitly_set
= 0;
4955 md
.mode_explicitly_set
= 1;
4962 if (md
.explicit_mode
)
4963 insn_group_break (1, 0, 0);
4964 md
.explicit_mode
= 0;
4968 if (!md
.explicit_mode
)
4969 insn_group_break (1, 0, 0);
4970 md
.explicit_mode
= 1;
4974 if (md
.explicit_mode
!= md
.default_explicit_mode
)
4975 insn_group_break (1, 0, 0);
4976 md
.explicit_mode
= md
.default_explicit_mode
;
4977 md
.mode_explicitly_set
= 0;
4983 print_prmask (valueT mask
)
4986 const char *comma
= "";
4987 for (regno
= 0; regno
< 64; regno
++)
4989 if (mask
& ((valueT
) 1 << regno
))
4991 fprintf (stderr
, "%s p%d", comma
, regno
);
4998 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
4999 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5000 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5001 .pred.safe_across_calls p1 [, p2 [,...]]
5005 dot_pred_rel (int type
)
5009 int p1
= -1, p2
= -1;
5013 if (*input_line_pointer
== '"')
5016 char *form
= demand_copy_C_string (&len
);
5018 if (strcmp (form
, "mutex") == 0)
5020 else if (strcmp (form
, "clear") == 0)
5022 else if (strcmp (form
, "imply") == 0)
5024 obstack_free (¬es
, form
);
5026 else if (*input_line_pointer
== '@')
5031 ++input_line_pointer
;
5032 c
= get_symbol_name (&form
);
5034 if (strcmp (form
, "mutex") == 0)
5036 else if (strcmp (form
, "clear") == 0)
5038 else if (strcmp (form
, "imply") == 0)
5040 (void) restore_line_pointer (c
);
5044 as_bad (_("Missing predicate relation type"));
5045 ignore_rest_of_line ();
5050 as_bad (_("Unrecognized predicate relation type"));
5051 ignore_rest_of_line ();
5054 if (*input_line_pointer
== ',')
5055 ++input_line_pointer
;
5063 expressionS pr
, *pr1
, *pr2
;
5065 sep
= parse_operand_and_eval (&pr
, ',');
5066 if (pr
.X_op
== O_register
5067 && pr
.X_add_number
>= REG_P
5068 && pr
.X_add_number
<= REG_P
+ 63)
5070 regno
= pr
.X_add_number
- REG_P
;
5078 else if (type
!= 'i'
5079 && pr
.X_op
== O_subtract
5080 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5081 && pr1
->X_op
== O_register
5082 && pr1
->X_add_number
>= REG_P
5083 && pr1
->X_add_number
<= REG_P
+ 63
5084 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5085 && pr2
->X_op
== O_register
5086 && pr2
->X_add_number
>= REG_P
5087 && pr2
->X_add_number
<= REG_P
+ 63)
5092 regno
= pr1
->X_add_number
- REG_P
;
5093 stop
= pr2
->X_add_number
- REG_P
;
5096 as_bad (_("Bad register range"));
5097 ignore_rest_of_line ();
5100 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5101 count
+= stop
- regno
+ 1;
5105 as_bad (_("Predicate register expected"));
5106 ignore_rest_of_line ();
5110 as_warn (_("Duplicate predicate register ignored"));
5121 clear_qp_mutex (mask
);
5122 clear_qp_implies (mask
, (valueT
) 0);
5125 if (count
!= 2 || p1
== -1 || p2
== -1)
5126 as_bad (_("Predicate source and target required"));
5127 else if (p1
== 0 || p2
== 0)
5128 as_bad (_("Use of p0 is not valid in this context"));
5130 add_qp_imply (p1
, p2
);
5135 as_bad (_("At least two PR arguments expected"));
5140 as_bad (_("Use of p0 is not valid in this context"));
5143 add_qp_mutex (mask
);
5146 /* note that we don't override any existing relations */
5149 as_bad (_("At least one PR argument expected"));
5154 fprintf (stderr
, "Safe across calls: ");
5155 print_prmask (mask
);
5156 fprintf (stderr
, "\n");
5158 qp_safe_across_calls
= mask
;
5161 demand_empty_rest_of_line ();
5164 /* .entry label [, label [, ...]]
5165 Hint to DV code that the given labels are to be considered entry points.
5166 Otherwise, only global labels are considered entry points. */
5169 dot_entry (int dummy ATTRIBUTE_UNUSED
)
5178 c
= get_symbol_name (&name
);
5179 symbolP
= symbol_find_or_make (name
);
5181 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (void *) symbolP
);
5183 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5186 *input_line_pointer
= c
;
5187 SKIP_WHITESPACE_AFTER_NAME ();
5188 c
= *input_line_pointer
;
5191 input_line_pointer
++;
5193 if (*input_line_pointer
== '\n')
5199 demand_empty_rest_of_line ();
5202 /* .mem.offset offset, base
5203 "base" is used to distinguish between offsets from a different base. */
5206 dot_mem_offset (int dummy ATTRIBUTE_UNUSED
)
5208 md
.mem_offset
.hint
= 1;
5209 md
.mem_offset
.offset
= get_absolute_expression ();
5210 if (*input_line_pointer
!= ',')
5212 as_bad (_("Comma expected"));
5213 ignore_rest_of_line ();
5216 ++input_line_pointer
;
5217 md
.mem_offset
.base
= get_absolute_expression ();
5218 demand_empty_rest_of_line ();
5221 /* ia64-specific pseudo-ops: */
5222 const pseudo_typeS md_pseudo_table
[] =
5224 { "radix", dot_radix
, 0 },
5225 { "lcomm", s_lcomm_bytes
, 1 },
5226 { "loc", dot_loc
, 0 },
5227 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5228 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5229 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5230 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5231 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5232 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5233 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5234 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5235 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5236 { "proc", dot_proc
, 0 },
5237 { "body", dot_body
, 0 },
5238 { "prologue", dot_prologue
, 0 },
5239 { "endp", dot_endp
, 0 },
5241 { "fframe", dot_fframe
, 0 },
5242 { "vframe", dot_vframe
, 0 },
5243 { "vframesp", dot_vframesp
, 0 },
5244 { "vframepsp", dot_vframesp
, 1 },
5245 { "save", dot_save
, 0 },
5246 { "restore", dot_restore
, 0 },
5247 { "restorereg", dot_restorereg
, 0 },
5248 { "restorereg.p", dot_restorereg
, 1 },
5249 { "handlerdata", dot_handlerdata
, 0 },
5250 { "unwentry", dot_unwentry
, 0 },
5251 { "altrp", dot_altrp
, 0 },
5252 { "savesp", dot_savemem
, 0 },
5253 { "savepsp", dot_savemem
, 1 },
5254 { "save.g", dot_saveg
, 0 },
5255 { "save.f", dot_savef
, 0 },
5256 { "save.b", dot_saveb
, 0 },
5257 { "save.gf", dot_savegf
, 0 },
5258 { "spill", dot_spill
, 0 },
5259 { "spillreg", dot_spillreg
, 0 },
5260 { "spillsp", dot_spillmem
, 0 },
5261 { "spillpsp", dot_spillmem
, 1 },
5262 { "spillreg.p", dot_spillreg
, 1 },
5263 { "spillsp.p", dot_spillmem
, ~0 },
5264 { "spillpsp.p", dot_spillmem
, ~1 },
5265 { "label_state", dot_label_state
, 0 },
5266 { "copy_state", dot_copy_state
, 0 },
5267 { "unwabi", dot_unwabi
, 0 },
5268 { "personality", dot_personality
, 0 },
5269 { "mii", dot_template
, 0x0 },
5270 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5271 { "mlx", dot_template
, 0x2 },
5272 { "mmi", dot_template
, 0x4 },
5273 { "mfi", dot_template
, 0x6 },
5274 { "mmf", dot_template
, 0x7 },
5275 { "mib", dot_template
, 0x8 },
5276 { "mbb", dot_template
, 0x9 },
5277 { "bbb", dot_template
, 0xb },
5278 { "mmb", dot_template
, 0xc },
5279 { "mfb", dot_template
, 0xe },
5280 { "align", dot_align
, 0 },
5281 { "regstk", dot_regstk
, 0 },
5282 { "rotr", dot_rot
, DYNREG_GR
},
5283 { "rotf", dot_rot
, DYNREG_FR
},
5284 { "rotp", dot_rot
, DYNREG_PR
},
5285 { "lsb", dot_byteorder
, 0 },
5286 { "msb", dot_byteorder
, 1 },
5287 { "psr", dot_psr
, 0 },
5288 { "alias", dot_alias
, 0 },
5289 { "secalias", dot_alias
, 1 },
5290 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5292 { "xdata1", dot_xdata
, 1 },
5293 { "xdata2", dot_xdata
, 2 },
5294 { "xdata4", dot_xdata
, 4 },
5295 { "xdata8", dot_xdata
, 8 },
5296 { "xdata16", dot_xdata
, 16 },
5297 { "xreal4", dot_xfloat_cons
, 'f' },
5298 { "xreal8", dot_xfloat_cons
, 'd' },
5299 { "xreal10", dot_xfloat_cons
, 'x' },
5300 { "xreal16", dot_xfloat_cons
, 'X' },
5301 { "xstring", dot_xstringer
, 8 + 0 },
5302 { "xstringz", dot_xstringer
, 8 + 1 },
5304 /* unaligned versions: */
5305 { "xdata2.ua", dot_xdata_ua
, 2 },
5306 { "xdata4.ua", dot_xdata_ua
, 4 },
5307 { "xdata8.ua", dot_xdata_ua
, 8 },
5308 { "xdata16.ua", dot_xdata_ua
, 16 },
5309 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5310 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5311 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5312 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5314 /* annotations/DV checking support */
5315 { "entry", dot_entry
, 0 },
5316 { "mem.offset", dot_mem_offset
, 0 },
5317 { "pred.rel", dot_pred_rel
, 0 },
5318 { "pred.rel.clear", dot_pred_rel
, 'c' },
5319 { "pred.rel.imply", dot_pred_rel
, 'i' },
5320 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5321 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5322 { "reg.val", dot_reg_val
, 0 },
5323 { "serialize.data", dot_serialize
, 0 },
5324 { "serialize.instruction", dot_serialize
, 1 },
5325 { "auto", dot_dv_mode
, 'a' },
5326 { "explicit", dot_dv_mode
, 'e' },
5327 { "default", dot_dv_mode
, 'd' },
5329 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5330 IA-64 aligns data allocation pseudo-ops by default, so we have to
5331 tell it that these ones are supposed to be unaligned. Long term,
5332 should rewrite so that only IA-64 specific data allocation pseudo-ops
5333 are aligned by default. */
5334 {"2byte", stmt_cons_ua
, 2},
5335 {"4byte", stmt_cons_ua
, 4},
5336 {"8byte", stmt_cons_ua
, 8},
5339 {"vms_common", obj_elf_vms_common
, 0},
5345 static const struct pseudo_opcode
5348 void (*handler
) (int);
5353 /* these are more like pseudo-ops, but don't start with a dot */
5354 { "data1", cons
, 1 },
5355 { "data2", cons
, 2 },
5356 { "data4", cons
, 4 },
5357 { "data8", cons
, 8 },
5358 { "data16", cons
, 16 },
5359 { "real4", stmt_float_cons
, 'f' },
5360 { "real8", stmt_float_cons
, 'd' },
5361 { "real10", stmt_float_cons
, 'x' },
5362 { "real16", stmt_float_cons
, 'X' },
5363 { "string", stringer
, 8 + 0 },
5364 { "stringz", stringer
, 8 + 1 },
5366 /* unaligned versions: */
5367 { "data2.ua", stmt_cons_ua
, 2 },
5368 { "data4.ua", stmt_cons_ua
, 4 },
5369 { "data8.ua", stmt_cons_ua
, 8 },
5370 { "data16.ua", stmt_cons_ua
, 16 },
5371 { "real4.ua", float_cons
, 'f' },
5372 { "real8.ua", float_cons
, 'd' },
5373 { "real10.ua", float_cons
, 'x' },
5374 { "real16.ua", float_cons
, 'X' },
5377 /* Declare a register by creating a symbol for it and entering it in
5378 the symbol table. */
5381 declare_register (const char *name
, unsigned int regnum
)
5386 sym
= symbol_create (name
, reg_section
, regnum
, &zero_address_frag
);
5388 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (void *) sym
);
5390 as_fatal ("Inserting \"%s\" into register table failed: %s",
5397 declare_register_set (const char *prefix
,
5398 unsigned int num_regs
,
5399 unsigned int base_regnum
)
5404 for (i
= 0; i
< num_regs
; ++i
)
5406 snprintf (name
, sizeof (name
), "%s%u", prefix
, i
);
5407 declare_register (name
, base_regnum
+ i
);
5412 operand_width (enum ia64_opnd opnd
)
5414 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5415 unsigned int bits
= 0;
5419 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5420 bits
+= odesc
->field
[i
].bits
;
5425 static enum operand_match_result
5426 operand_match (const struct ia64_opcode
*idesc
, int res_index
, expressionS
*e
)
5428 enum ia64_opnd opnd
= idesc
->operands
[res_index
];
5429 int bits
, relocatable
= 0;
5430 struct insn_fix
*fix
;
5437 case IA64_OPND_AR_CCV
:
5438 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5439 return OPERAND_MATCH
;
5442 case IA64_OPND_AR_CSD
:
5443 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5444 return OPERAND_MATCH
;
5447 case IA64_OPND_AR_PFS
:
5448 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5449 return OPERAND_MATCH
;
5453 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5454 return OPERAND_MATCH
;
5458 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5459 return OPERAND_MATCH
;
5463 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5464 return OPERAND_MATCH
;
5467 case IA64_OPND_PR_ROT
:
5468 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5469 return OPERAND_MATCH
;
5473 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5474 return OPERAND_MATCH
;
5477 case IA64_OPND_PSR_L
:
5478 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5479 return OPERAND_MATCH
;
5482 case IA64_OPND_PSR_UM
:
5483 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5484 return OPERAND_MATCH
;
5488 if (e
->X_op
== O_constant
)
5490 if (e
->X_add_number
== 1)
5491 return OPERAND_MATCH
;
5493 return OPERAND_OUT_OF_RANGE
;
5498 if (e
->X_op
== O_constant
)
5500 if (e
->X_add_number
== 8)
5501 return OPERAND_MATCH
;
5503 return OPERAND_OUT_OF_RANGE
;
5508 if (e
->X_op
== O_constant
)
5510 if (e
->X_add_number
== 16)
5511 return OPERAND_MATCH
;
5513 return OPERAND_OUT_OF_RANGE
;
5517 /* register operands: */
5520 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5521 && e
->X_add_number
< REG_AR
+ 128)
5522 return OPERAND_MATCH
;
5527 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5528 && e
->X_add_number
< REG_BR
+ 8)
5529 return OPERAND_MATCH
;
5533 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5534 && e
->X_add_number
< REG_CR
+ 128)
5535 return OPERAND_MATCH
;
5538 case IA64_OPND_DAHR3
:
5539 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_DAHR
5540 && e
->X_add_number
< REG_DAHR
+ 8)
5541 return OPERAND_MATCH
;
5548 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5549 && e
->X_add_number
< REG_FR
+ 128)
5550 return OPERAND_MATCH
;
5555 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5556 && e
->X_add_number
< REG_P
+ 64)
5557 return OPERAND_MATCH
;
5563 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5564 && e
->X_add_number
< REG_GR
+ 128)
5565 return OPERAND_MATCH
;
5568 case IA64_OPND_R3_2
:
5569 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5571 if (e
->X_add_number
< REG_GR
+ 4)
5572 return OPERAND_MATCH
;
5573 else if (e
->X_add_number
< REG_GR
+ 128)
5574 return OPERAND_OUT_OF_RANGE
;
5578 /* indirect operands: */
5579 case IA64_OPND_CPUID_R3
:
5580 case IA64_OPND_DBR_R3
:
5581 case IA64_OPND_DTR_R3
:
5582 case IA64_OPND_ITR_R3
:
5583 case IA64_OPND_IBR_R3
:
5584 case IA64_OPND_MSR_R3
:
5585 case IA64_OPND_PKR_R3
:
5586 case IA64_OPND_PMC_R3
:
5587 case IA64_OPND_PMD_R3
:
5588 case IA64_OPND_DAHR_R3
:
5589 case IA64_OPND_RR_R3
:
5590 if (e
->X_op
== O_index
&& e
->X_op_symbol
5591 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5592 == opnd
- IA64_OPND_CPUID_R3
))
5593 return OPERAND_MATCH
;
5597 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5598 return OPERAND_MATCH
;
5601 /* immediate operands: */
5602 case IA64_OPND_CNT2a
:
5603 case IA64_OPND_LEN4
:
5604 case IA64_OPND_LEN6
:
5605 bits
= operand_width (idesc
->operands
[res_index
]);
5606 if (e
->X_op
== O_constant
)
5608 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5609 return OPERAND_MATCH
;
5611 return OPERAND_OUT_OF_RANGE
;
5615 case IA64_OPND_CNT2b
:
5616 if (e
->X_op
== O_constant
)
5618 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5619 return OPERAND_MATCH
;
5621 return OPERAND_OUT_OF_RANGE
;
5625 case IA64_OPND_CNT2c
:
5626 val
= e
->X_add_number
;
5627 if (e
->X_op
== O_constant
)
5629 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5630 return OPERAND_MATCH
;
5632 return OPERAND_OUT_OF_RANGE
;
5637 /* SOR must be an integer multiple of 8 */
5638 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5639 return OPERAND_OUT_OF_RANGE
;
5642 if (e
->X_op
== O_constant
)
5644 if ((bfd_vma
) e
->X_add_number
<= 96)
5645 return OPERAND_MATCH
;
5647 return OPERAND_OUT_OF_RANGE
;
5651 case IA64_OPND_IMMU62
:
5652 if (e
->X_op
== O_constant
)
5654 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5655 return OPERAND_MATCH
;
5657 return OPERAND_OUT_OF_RANGE
;
5661 /* FIXME -- need 62-bit relocation type */
5662 as_bad (_("62-bit relocation not yet implemented"));
5666 case IA64_OPND_IMMU64
:
5667 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5668 || e
->X_op
== O_subtract
)
5670 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5671 fix
->code
= BFD_RELOC_IA64_IMM64
;
5672 if (e
->X_op
!= O_subtract
)
5674 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5675 if (e
->X_op
== O_pseudo_fixup
)
5679 fix
->opnd
= idesc
->operands
[res_index
];
5682 ++CURR_SLOT
.num_fixups
;
5683 return OPERAND_MATCH
;
5685 else if (e
->X_op
== O_constant
)
5686 return OPERAND_MATCH
;
5689 case IA64_OPND_IMMU5b
:
5690 if (e
->X_op
== O_constant
)
5692 val
= e
->X_add_number
;
5693 if (val
>= 32 && val
<= 63)
5694 return OPERAND_MATCH
;
5696 return OPERAND_OUT_OF_RANGE
;
5700 case IA64_OPND_CCNT5
:
5701 case IA64_OPND_CNT5
:
5702 case IA64_OPND_CNT6
:
5703 case IA64_OPND_CPOS6a
:
5704 case IA64_OPND_CPOS6b
:
5705 case IA64_OPND_CPOS6c
:
5706 case IA64_OPND_IMMU2
:
5707 case IA64_OPND_IMMU7a
:
5708 case IA64_OPND_IMMU7b
:
5709 case IA64_OPND_IMMU16
:
5710 case IA64_OPND_IMMU19
:
5711 case IA64_OPND_IMMU21
:
5712 case IA64_OPND_IMMU24
:
5713 case IA64_OPND_MBTYPE4
:
5714 case IA64_OPND_MHTYPE8
:
5715 case IA64_OPND_POS6
:
5716 bits
= operand_width (idesc
->operands
[res_index
]);
5717 if (e
->X_op
== O_constant
)
5719 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5720 return OPERAND_MATCH
;
5722 return OPERAND_OUT_OF_RANGE
;
5726 case IA64_OPND_IMMU9
:
5727 bits
= operand_width (idesc
->operands
[res_index
]);
5728 if (e
->X_op
== O_constant
)
5730 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5732 int lobits
= e
->X_add_number
& 0x3;
5733 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5734 e
->X_add_number
|= (bfd_vma
) 0x3;
5735 return OPERAND_MATCH
;
5738 return OPERAND_OUT_OF_RANGE
;
5742 case IA64_OPND_IMM44
:
5743 /* least 16 bits must be zero */
5744 if ((e
->X_add_number
& 0xffff) != 0)
5745 /* XXX technically, this is wrong: we should not be issuing warning
5746 messages until we're sure this instruction pattern is going to
5748 as_warn (_("lower 16 bits of mask ignored"));
5750 if (e
->X_op
== O_constant
)
5752 if (((e
->X_add_number
>= 0
5753 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5754 || (e
->X_add_number
< 0
5755 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5758 if (e
->X_add_number
>= 0
5759 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5761 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5763 return OPERAND_MATCH
;
5766 return OPERAND_OUT_OF_RANGE
;
5770 case IA64_OPND_IMM17
:
5771 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5772 if (e
->X_op
== O_constant
)
5774 if (((e
->X_add_number
>= 0
5775 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5776 || (e
->X_add_number
< 0
5777 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5780 if (e
->X_add_number
>= 0
5781 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5783 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5785 return OPERAND_MATCH
;
5788 return OPERAND_OUT_OF_RANGE
;
5792 case IA64_OPND_IMM14
:
5793 case IA64_OPND_IMM22
:
5795 case IA64_OPND_IMM1
:
5796 case IA64_OPND_IMM8
:
5797 case IA64_OPND_IMM8U4
:
5798 case IA64_OPND_IMM8M1
:
5799 case IA64_OPND_IMM8M1U4
:
5800 case IA64_OPND_IMM8M1U8
:
5801 case IA64_OPND_IMM9a
:
5802 case IA64_OPND_IMM9b
:
5803 bits
= operand_width (idesc
->operands
[res_index
]);
5804 if (relocatable
&& (e
->X_op
== O_symbol
5805 || e
->X_op
== O_subtract
5806 || e
->X_op
== O_pseudo_fixup
))
5808 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5810 if (idesc
->operands
[res_index
] == IA64_OPND_IMM14
)
5811 fix
->code
= BFD_RELOC_IA64_IMM14
;
5813 fix
->code
= BFD_RELOC_IA64_IMM22
;
5815 if (e
->X_op
!= O_subtract
)
5817 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5818 if (e
->X_op
== O_pseudo_fixup
)
5822 fix
->opnd
= idesc
->operands
[res_index
];
5825 ++CURR_SLOT
.num_fixups
;
5826 return OPERAND_MATCH
;
5828 else if (e
->X_op
!= O_constant
5829 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5830 return OPERAND_MISMATCH
;
5832 if (opnd
== IA64_OPND_IMM8M1U4
)
5834 /* Zero is not valid for unsigned compares that take an adjusted
5835 constant immediate range. */
5836 if (e
->X_add_number
== 0)
5837 return OPERAND_OUT_OF_RANGE
;
5839 /* Sign-extend 32-bit unsigned numbers, so that the following range
5840 checks will work. */
5841 val
= e
->X_add_number
;
5842 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5843 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5844 val
= ((val
<< 32) >> 32);
5846 /* Check for 0x100000000. This is valid because
5847 0x100000000-1 is the same as ((uint32_t) -1). */
5848 if (val
== ((bfd_signed_vma
) 1 << 32))
5849 return OPERAND_MATCH
;
5853 else if (opnd
== IA64_OPND_IMM8M1U8
)
5855 /* Zero is not valid for unsigned compares that take an adjusted
5856 constant immediate range. */
5857 if (e
->X_add_number
== 0)
5858 return OPERAND_OUT_OF_RANGE
;
5860 /* Check for 0x10000000000000000. */
5861 if (e
->X_op
== O_big
)
5863 if (generic_bignum
[0] == 0
5864 && generic_bignum
[1] == 0
5865 && generic_bignum
[2] == 0
5866 && generic_bignum
[3] == 0
5867 && generic_bignum
[4] == 1)
5868 return OPERAND_MATCH
;
5870 return OPERAND_OUT_OF_RANGE
;
5873 val
= e
->X_add_number
- 1;
5875 else if (opnd
== IA64_OPND_IMM8M1
)
5876 val
= e
->X_add_number
- 1;
5877 else if (opnd
== IA64_OPND_IMM8U4
)
5879 /* Sign-extend 32-bit unsigned numbers, so that the following range
5880 checks will work. */
5881 val
= e
->X_add_number
;
5882 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5883 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5884 val
= ((val
<< 32) >> 32);
5887 val
= e
->X_add_number
;
5889 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5890 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5891 return OPERAND_MATCH
;
5893 return OPERAND_OUT_OF_RANGE
;
5895 case IA64_OPND_INC3
:
5896 /* +/- 1, 4, 8, 16 */
5897 val
= e
->X_add_number
;
5900 if (e
->X_op
== O_constant
)
5902 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5903 return OPERAND_MATCH
;
5905 return OPERAND_OUT_OF_RANGE
;
5909 case IA64_OPND_TGT25
:
5910 case IA64_OPND_TGT25b
:
5911 case IA64_OPND_TGT25c
:
5912 case IA64_OPND_TGT64
:
5913 if (e
->X_op
== O_symbol
)
5915 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5916 if (opnd
== IA64_OPND_TGT25
)
5917 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5918 else if (opnd
== IA64_OPND_TGT25b
)
5919 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5920 else if (opnd
== IA64_OPND_TGT25c
)
5921 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5922 else if (opnd
== IA64_OPND_TGT64
)
5923 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5927 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5928 fix
->opnd
= idesc
->operands
[res_index
];
5931 ++CURR_SLOT
.num_fixups
;
5932 return OPERAND_MATCH
;
5934 case IA64_OPND_TAG13
:
5935 case IA64_OPND_TAG13b
:
5939 return OPERAND_MATCH
;
5942 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5943 /* There are no external relocs for TAG13/TAG13b fields, so we
5944 create a dummy reloc. This will not live past md_apply_fix. */
5945 fix
->code
= BFD_RELOC_UNUSED
;
5946 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5947 fix
->opnd
= idesc
->operands
[res_index
];
5950 ++CURR_SLOT
.num_fixups
;
5951 return OPERAND_MATCH
;
5958 case IA64_OPND_LDXMOV
:
5959 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5960 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5961 fix
->opnd
= idesc
->operands
[res_index
];
5964 ++CURR_SLOT
.num_fixups
;
5965 return OPERAND_MATCH
;
5967 case IA64_OPND_STRD5b
:
5968 if (e
->X_op
== O_constant
)
5970 /* 5-bit signed scaled by 64 */
5971 if ((e
->X_add_number
<= ( 0xf << 6 ))
5972 && (e
->X_add_number
>= -( 0x10 << 6 )))
5975 /* Must be a multiple of 64 */
5976 if ((e
->X_add_number
& 0x3f) != 0)
5977 as_warn (_("stride must be a multiple of 64; lower 6 bits ignored"));
5979 e
->X_add_number
&= ~ 0x3f;
5980 return OPERAND_MATCH
;
5983 return OPERAND_OUT_OF_RANGE
;
5986 case IA64_OPND_CNT6a
:
5987 if (e
->X_op
== O_constant
)
5989 /* 6-bit unsigned biased by 1 -- count 0 is meaningless */
5990 if ((e
->X_add_number
<= 64)
5991 && (e
->X_add_number
> 0) )
5993 return OPERAND_MATCH
;
5996 return OPERAND_OUT_OF_RANGE
;
6003 return OPERAND_MISMATCH
;
6007 parse_operand (expressionS
*e
, int more
)
6011 memset (e
, 0, sizeof (*e
));
6015 sep
= *input_line_pointer
;
6016 if (more
&& (sep
== ',' || sep
== more
))
6017 ++input_line_pointer
;
6022 parse_operand_and_eval (expressionS
*e
, int more
)
6024 int sep
= parse_operand (e
, more
);
6025 resolve_expression (e
);
6030 parse_operand_maybe_eval (expressionS
*e
, int more
, enum ia64_opnd op
)
6032 int sep
= parse_operand (e
, more
);
6035 case IA64_OPND_IMM14
:
6036 case IA64_OPND_IMM22
:
6037 case IA64_OPND_IMMU64
:
6038 case IA64_OPND_TGT25
:
6039 case IA64_OPND_TGT25b
:
6040 case IA64_OPND_TGT25c
:
6041 case IA64_OPND_TGT64
:
6042 case IA64_OPND_TAG13
:
6043 case IA64_OPND_TAG13b
:
6044 case IA64_OPND_LDXMOV
:
6047 resolve_expression (e
);
6053 /* Returns the next entry in the opcode table that matches the one in
6054 IDESC, and frees the entry in IDESC. If no matching entry is
6055 found, NULL is returned instead. */
6057 static struct ia64_opcode
*
6058 get_next_opcode (struct ia64_opcode
*idesc
)
6060 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6061 ia64_free_opcode (idesc
);
6065 /* Parse the operands for the opcode and find the opcode variant that
6066 matches the specified operands, or NULL if no match is possible. */
6068 static struct ia64_opcode
*
6069 parse_operands (struct ia64_opcode
*idesc
)
6071 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6072 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6075 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6076 enum operand_match_result result
;
6078 char *first_arg
= 0, *end
, *saved_input_pointer
;
6081 gas_assert (strlen (idesc
->name
) <= 128);
6083 strcpy (mnemonic
, idesc
->name
);
6084 if (idesc
->operands
[2] == IA64_OPND_SOF
6085 || idesc
->operands
[1] == IA64_OPND_SOF
)
6087 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6088 can't parse the first operand until we have parsed the
6089 remaining operands of the "alloc" instruction. */
6091 first_arg
= input_line_pointer
;
6092 end
= strchr (input_line_pointer
, '=');
6095 as_bad (_("Expected separator `='"));
6098 input_line_pointer
= end
+ 1;
6105 if (i
< NELEMS (CURR_SLOT
.opnd
))
6107 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ i
, '=',
6108 idesc
->operands
[i
]);
6109 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6116 sep
= parse_operand (&dummy
, '=');
6117 if (dummy
.X_op
== O_absent
)
6123 if (sep
!= '=' && sep
!= ',')
6128 if (num_outputs
> 0)
6129 as_bad (_("Duplicate equal sign (=) in instruction"));
6131 num_outputs
= i
+ 1;
6136 as_bad (_("Illegal operand separator `%c'"), sep
);
6140 if (idesc
->operands
[2] == IA64_OPND_SOF
6141 || idesc
->operands
[1] == IA64_OPND_SOF
)
6143 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6144 Note, however, that due to that mapping operand numbers in error
6145 messages for any of the constant operands will not be correct. */
6146 know (strcmp (idesc
->name
, "alloc") == 0);
6147 /* The first operand hasn't been parsed/initialized, yet (but
6148 num_operands intentionally doesn't account for that). */
6149 i
= num_operands
> 4 ? 2 : 1;
6150 #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6151 ? CURR_SLOT.opnd[n].X_add_number \
6153 sof
= set_regstack (FORCE_CONST(i
),
6156 FORCE_CONST(i
+ 3));
6159 /* now we can parse the first arg: */
6160 saved_input_pointer
= input_line_pointer
;
6161 input_line_pointer
= first_arg
;
6162 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ 0, '=',
6163 idesc
->operands
[0]);
6165 --num_outputs
; /* force error */
6166 input_line_pointer
= saved_input_pointer
;
6168 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6169 if (CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6170 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
)
6171 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6172 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6174 CURR_SLOT
.opnd
[i
+ 1].X_op
= O_illegal
;
6175 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6178 highest_unmatched_operand
= -4;
6179 curr_out_of_range_pos
= -1;
6181 for (; idesc
; idesc
= get_next_opcode (idesc
))
6183 if (num_outputs
!= idesc
->num_outputs
)
6184 continue; /* mismatch in # of outputs */
6185 if (highest_unmatched_operand
< 0)
6186 highest_unmatched_operand
|= 1;
6187 if (num_operands
> NELEMS (idesc
->operands
)
6188 || (num_operands
< NELEMS (idesc
->operands
)
6189 && idesc
->operands
[num_operands
])
6190 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6191 continue; /* mismatch in number of arguments */
6192 if (highest_unmatched_operand
< 0)
6193 highest_unmatched_operand
|= 2;
6195 CURR_SLOT
.num_fixups
= 0;
6197 /* Try to match all operands. If we see an out-of-range operand,
6198 then continue trying to match the rest of the operands, since if
6199 the rest match, then this idesc will give the best error message. */
6201 out_of_range_pos
= -1;
6202 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6204 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6205 if (result
!= OPERAND_MATCH
)
6207 if (result
!= OPERAND_OUT_OF_RANGE
)
6209 if (out_of_range_pos
< 0)
6210 /* remember position of the first out-of-range operand: */
6211 out_of_range_pos
= i
;
6215 /* If we did not match all operands, or if at least one operand was
6216 out-of-range, then this idesc does not match. Keep track of which
6217 idesc matched the most operands before failing. If we have two
6218 idescs that failed at the same position, and one had an out-of-range
6219 operand, then prefer the out-of-range operand. Thus if we have
6220 "add r0=0x1000000,r1" we get an error saying the constant is out
6221 of range instead of an error saying that the constant should have been
6224 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6226 if (i
> highest_unmatched_operand
6227 || (i
== highest_unmatched_operand
6228 && out_of_range_pos
> curr_out_of_range_pos
))
6230 highest_unmatched_operand
= i
;
6231 if (out_of_range_pos
>= 0)
6233 expected_operand
= idesc
->operands
[out_of_range_pos
];
6234 error_pos
= out_of_range_pos
;
6238 expected_operand
= idesc
->operands
[i
];
6241 curr_out_of_range_pos
= out_of_range_pos
;
6250 if (expected_operand
)
6251 as_bad (_("Operand %u of `%s' should be %s"),
6252 error_pos
+ 1, mnemonic
,
6253 elf64_ia64_operands
[expected_operand
].desc
);
6254 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6255 as_bad (_("Wrong number of output operands"));
6256 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6257 as_bad (_("Wrong number of input operands"));
6259 as_bad (_("Operand mismatch"));
6263 /* Check that the instruction doesn't use
6264 - r0, f0, or f1 as output operands
6265 - the same predicate twice as output operands
6266 - r0 as address of a base update load or store
6267 - the same GR as output and address of a base update load
6268 - two even- or two odd-numbered FRs as output operands of a floating
6269 point parallel load.
6270 At most two (conflicting) output (or output-like) operands can exist,
6271 (floating point parallel loads have three outputs, but the base register,
6272 if updated, cannot conflict with the actual outputs). */
6274 for (i
= 0; i
< num_operands
; ++i
)
6279 switch (idesc
->operands
[i
])
6284 if (i
< num_outputs
)
6286 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6289 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6291 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6296 if (i
< num_outputs
)
6299 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6301 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6308 if (i
< num_outputs
)
6310 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6311 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6314 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6317 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6319 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6323 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6325 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6328 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6330 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6341 as_warn (_("Invalid use of `%c%d' as output operand"), reg_class
, regno
);
6344 as_warn (_("Invalid use of `r%d' as base update address operand"), regno
);
6350 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6355 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6360 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6368 as_warn (_("Invalid duplicate use of `%c%d'"), reg_class
, reg1
);
6370 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6371 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6372 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6373 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6374 && ! ((reg1
^ reg2
) & 1))
6375 as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"),
6376 reg1
- REG_FR
, reg2
- REG_FR
);
6377 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6378 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6379 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6380 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6381 as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"),
6382 reg1
- REG_FR
, reg2
- REG_FR
);
6387 build_insn (struct slot
*slot
, bfd_vma
*insnp
)
6389 const struct ia64_operand
*odesc
, *o2desc
;
6390 struct ia64_opcode
*idesc
= slot
->idesc
;
6396 insn
= idesc
->opcode
| slot
->qp_regno
;
6398 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6400 if (slot
->opnd
[i
].X_op
== O_register
6401 || slot
->opnd
[i
].X_op
== O_constant
6402 || slot
->opnd
[i
].X_op
== O_index
)
6403 val
= slot
->opnd
[i
].X_add_number
;
6404 else if (slot
->opnd
[i
].X_op
== O_big
)
6406 /* This must be the value 0x10000000000000000. */
6407 gas_assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6413 switch (idesc
->operands
[i
])
6415 case IA64_OPND_IMMU64
:
6416 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6417 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6418 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6419 | (((val
>> 63) & 0x1) << 36));
6422 case IA64_OPND_IMMU62
:
6423 val
&= 0x3fffffffffffffffULL
;
6424 if (val
!= slot
->opnd
[i
].X_add_number
)
6425 as_warn (_("Value truncated to 62 bits"));
6426 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6427 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6430 case IA64_OPND_TGT64
:
6432 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6433 insn
|= ((((val
>> 59) & 0x1) << 36)
6434 | (((val
>> 0) & 0xfffff) << 13));
6450 case IA64_OPND_DAHR3
:
6469 case IA64_OPND_R3_2
:
6470 case IA64_OPND_CPUID_R3
:
6471 case IA64_OPND_DBR_R3
:
6472 case IA64_OPND_DTR_R3
:
6473 case IA64_OPND_ITR_R3
:
6474 case IA64_OPND_IBR_R3
:
6476 case IA64_OPND_MSR_R3
:
6477 case IA64_OPND_PKR_R3
:
6478 case IA64_OPND_PMC_R3
:
6479 case IA64_OPND_PMD_R3
:
6480 case IA64_OPND_DAHR_R3
:
6481 case IA64_OPND_RR_R3
:
6489 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6490 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6492 as_bad_where (slot
->src_file
, slot
->src_line
,
6493 _("Bad operand value: %s"), err
);
6494 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6496 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6497 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6499 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6500 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6502 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6503 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6504 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6506 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6507 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6515 emit_one_bundle (void)
6517 int manual_bundling_off
= 0, manual_bundling
= 0;
6518 enum ia64_unit required_unit
, insn_unit
= 0;
6519 enum ia64_insn_type type
[3], insn_type
;
6520 unsigned int template_val
, orig_template
;
6521 bfd_vma insn
[3] = { -1, -1, -1 };
6522 struct ia64_opcode
*idesc
;
6523 int end_of_insn_group
= 0, user_template
= -1;
6524 int n
, i
, j
, first
, curr
, last_slot
;
6525 bfd_vma t0
= 0, t1
= 0;
6526 struct label_fix
*lfix
;
6527 bfd_boolean mark_label
;
6528 struct insn_fix
*ifix
;
6534 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6535 know (first
>= 0 && first
< NUM_SLOTS
);
6536 n
= MIN (3, md
.num_slots_in_use
);
6538 /* Determine template: user user_template if specified, best match
6541 if (md
.slot
[first
].user_template
>= 0)
6542 user_template
= template_val
= md
.slot
[first
].user_template
;
6545 /* Auto select appropriate template. */
6546 memset (type
, 0, sizeof (type
));
6548 for (i
= 0; i
< n
; ++i
)
6550 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6552 type
[i
] = md
.slot
[curr
].idesc
->type
;
6553 curr
= (curr
+ 1) % NUM_SLOTS
;
6555 template_val
= best_template
[type
[0]][type
[1]][type
[2]];
6558 /* initialize instructions with appropriate nops: */
6559 for (i
= 0; i
< 3; ++i
)
6560 insn
[i
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[i
]];
6564 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6565 from the start of the frag. */
6566 addr_mod
= frag_now_fix () & 15;
6567 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6568 as_bad (_("instruction address is not a multiple of 16"));
6569 frag_now
->insn_addr
= addr_mod
;
6570 frag_now
->has_code
= 1;
6572 /* now fill in slots with as many insns as possible: */
6574 idesc
= md
.slot
[curr
].idesc
;
6575 end_of_insn_group
= 0;
6577 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6579 /* If we have unwind records, we may need to update some now. */
6580 unw_rec_list
*ptr
= md
.slot
[curr
].unwind_record
;
6581 unw_rec_list
*end_ptr
= NULL
;
6585 /* Find the last prologue/body record in the list for the current
6586 insn, and set the slot number for all records up to that point.
6587 This needs to be done now, because prologue/body records refer to
6588 the current point, not the point after the instruction has been
6589 issued. This matters because there may have been nops emitted
6590 meanwhile. Any non-prologue non-body record followed by a
6591 prologue/body record must also refer to the current point. */
6592 unw_rec_list
*last_ptr
;
6594 for (j
= 1; end_ptr
== NULL
&& j
< md
.num_slots_in_use
; ++j
)
6595 end_ptr
= md
.slot
[(curr
+ j
) % NUM_SLOTS
].unwind_record
;
6596 for (last_ptr
= NULL
; ptr
!= end_ptr
; ptr
= ptr
->next
)
6597 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6598 || ptr
->r
.type
== body
)
6602 /* Make last_ptr point one after the last prologue/body
6604 last_ptr
= last_ptr
->next
;
6605 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6608 ptr
->slot_number
= (unsigned long) f
+ i
;
6609 ptr
->slot_frag
= frag_now
;
6611 /* Remove the initialized records, so that we won't accidentally
6612 update them again if we insert a nop and continue. */
6613 md
.slot
[curr
].unwind_record
= last_ptr
;
6617 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6618 if (md
.slot
[curr
].manual_bundling_on
)
6621 manual_bundling
= 1;
6623 break; /* Need to start a new bundle. */
6626 /* If this instruction specifies a template, then it must be the first
6627 instruction of a bundle. */
6628 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6631 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6633 if (manual_bundling
&& !manual_bundling_off
)
6635 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6636 _("`%s' must be last in bundle"), idesc
->name
);
6638 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6642 if (idesc
->flags
& IA64_OPCODE_LAST
)
6645 unsigned int required_template
;
6647 /* If we need a stop bit after an M slot, our only choice is
6648 template 5 (M;;MI). If we need a stop bit after a B
6649 slot, our only choice is to place it at the end of the
6650 bundle, because the only available templates are MIB,
6651 MBB, BBB, MMB, and MFB. We don't handle anything other
6652 than M and B slots because these are the only kind of
6653 instructions that can have the IA64_OPCODE_LAST bit set. */
6654 required_template
= template_val
;
6655 switch (idesc
->type
)
6659 required_template
= 5;
6667 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6668 _("Internal error: don't know how to force %s to end of instruction group"),
6674 && (i
> required_slot
6675 || (required_slot
== 2 && !manual_bundling_off
)
6676 || (user_template
>= 0
6677 /* Changing from MMI to M;MI is OK. */
6678 && (template_val
^ required_template
) > 1)))
6680 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6681 _("`%s' must be last in instruction group"),
6683 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6684 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6686 if (required_slot
< i
)
6687 /* Can't fit this instruction. */
6691 if (required_template
!= template_val
)
6693 /* If we switch the template, we need to reset the NOPs
6694 after slot i. The slot-types of the instructions ahead
6695 of i never change, so we don't need to worry about
6696 changing NOPs in front of this slot. */
6697 for (j
= i
; j
< 3; ++j
)
6698 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6700 /* We just picked a template that includes the stop bit in the
6701 middle, so we don't need another one emitted later. */
6702 md
.slot
[curr
].end_of_insn_group
= 0;
6704 template_val
= required_template
;
6706 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6708 if (manual_bundling
)
6710 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6711 _("Label must be first in a bundle"));
6712 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6714 /* This insn must go into the first slot of a bundle. */
6718 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6720 /* We need an instruction group boundary in the middle of a
6721 bundle. See if we can switch to an other template with
6722 an appropriate boundary. */
6724 orig_template
= template_val
;
6725 if (i
== 1 && (user_template
== 4
6726 || (user_template
< 0
6727 && (ia64_templ_desc
[template_val
].exec_unit
[0]
6731 end_of_insn_group
= 0;
6733 else if (i
== 2 && (user_template
== 0
6734 || (user_template
< 0
6735 && (ia64_templ_desc
[template_val
].exec_unit
[1]
6737 /* This test makes sure we don't switch the template if
6738 the next instruction is one that needs to be first in
6739 an instruction group. Since all those instructions are
6740 in the M group, there is no way such an instruction can
6741 fit in this bundle even if we switch the template. The
6742 reason we have to check for this is that otherwise we
6743 may end up generating "MI;;I M.." which has the deadly
6744 effect that the second M instruction is no longer the
6745 first in the group! --davidm 99/12/16 */
6746 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6749 end_of_insn_group
= 0;
6752 && user_template
== 0
6753 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6754 /* Use the next slot. */
6756 else if (curr
!= first
)
6757 /* can't fit this insn */
6760 if (template_val
!= orig_template
)
6761 /* if we switch the template, we need to reset the NOPs
6762 after slot i. The slot-types of the instructions ahead
6763 of i never change, so we don't need to worry about
6764 changing NOPs in front of this slot. */
6765 for (j
= i
; j
< 3; ++j
)
6766 insn
[j
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[j
]];
6768 required_unit
= ia64_templ_desc
[template_val
].exec_unit
[i
];
6770 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6771 if (idesc
->type
== IA64_TYPE_DYN
)
6773 enum ia64_opnd opnd1
, opnd2
;
6775 if ((strcmp (idesc
->name
, "nop") == 0)
6776 || (strcmp (idesc
->name
, "break") == 0))
6777 insn_unit
= required_unit
;
6778 else if (strcmp (idesc
->name
, "hint") == 0)
6780 insn_unit
= required_unit
;
6781 if (required_unit
== IA64_UNIT_B
)
6787 case hint_b_warning
:
6788 as_warn (_("hint in B unit may be treated as nop"));
6791 /* When manual bundling is off and there is no
6792 user template, we choose a different unit so
6793 that hint won't go into the current slot. We
6794 will fill the current bundle with nops and
6795 try to put hint into the next bundle. */
6796 if (!manual_bundling
&& user_template
< 0)
6797 insn_unit
= IA64_UNIT_I
;
6799 as_bad (_("hint in B unit can't be used"));
6804 else if (strcmp (idesc
->name
, "chk.s") == 0
6805 || strcmp (idesc
->name
, "mov") == 0)
6807 insn_unit
= IA64_UNIT_M
;
6808 if (required_unit
== IA64_UNIT_I
6809 || (required_unit
== IA64_UNIT_F
&& template_val
== 6))
6810 insn_unit
= IA64_UNIT_I
;
6813 as_fatal (_("emit_one_bundle: unexpected dynamic op"));
6815 snprintf (mnemonic
, sizeof (mnemonic
), "%s.%c",
6816 idesc
->name
, "?imbfxx"[insn_unit
]);
6817 opnd1
= idesc
->operands
[0];
6818 opnd2
= idesc
->operands
[1];
6819 ia64_free_opcode (idesc
);
6820 idesc
= ia64_find_opcode (mnemonic
);
6821 /* moves to/from ARs have collisions */
6822 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6824 while (idesc
!= NULL
6825 && (idesc
->operands
[0] != opnd1
6826 || idesc
->operands
[1] != opnd2
))
6827 idesc
= get_next_opcode (idesc
);
6829 md
.slot
[curr
].idesc
= idesc
;
6833 insn_type
= idesc
->type
;
6834 insn_unit
= IA64_UNIT_NIL
;
6838 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6839 insn_unit
= required_unit
;
6841 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6842 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6843 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6844 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6845 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6850 if (insn_unit
!= required_unit
)
6851 continue; /* Try next slot. */
6853 /* Now is a good time to fix up the labels for this insn. */
6855 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6857 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6858 symbol_set_frag (lfix
->sym
, frag_now
);
6859 mark_label
|= lfix
->dw2_mark_labels
;
6861 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6863 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6864 symbol_set_frag (lfix
->sym
, frag_now
);
6867 if (debug_type
== DEBUG_DWARF2
6868 || md
.slot
[curr
].loc_directive_seen
6871 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6873 md
.slot
[curr
].loc_directive_seen
= 0;
6875 md
.slot
[curr
].debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
6877 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6880 build_insn (md
.slot
+ curr
, insn
+ i
);
6882 ptr
= md
.slot
[curr
].unwind_record
;
6885 /* Set slot numbers for all remaining unwind records belonging to the
6886 current insn. There can not be any prologue/body unwind records
6888 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6890 ptr
->slot_number
= (unsigned long) f
+ i
;
6891 ptr
->slot_frag
= frag_now
;
6893 md
.slot
[curr
].unwind_record
= NULL
;
6896 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6898 ifix
= md
.slot
[curr
].fixup
+ j
;
6899 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6900 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6901 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6902 fix
->fx_file
= md
.slot
[curr
].src_file
;
6903 fix
->fx_line
= md
.slot
[curr
].src_line
;
6906 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6908 /* This adjustment to "i" must occur after the fix, otherwise the fix
6909 is assigned to the wrong slot, and the VMS linker complains. */
6910 if (required_unit
== IA64_UNIT_L
)
6913 /* skip one slot for long/X-unit instructions */
6916 --md
.num_slots_in_use
;
6920 ia64_free_opcode (md
.slot
[curr
].idesc
);
6921 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6922 md
.slot
[curr
].user_template
= -1;
6924 if (manual_bundling_off
)
6926 manual_bundling
= 0;
6929 curr
= (curr
+ 1) % NUM_SLOTS
;
6930 idesc
= md
.slot
[curr
].idesc
;
6933 /* A user template was specified, but the first following instruction did
6934 not fit. This can happen with or without manual bundling. */
6935 if (md
.num_slots_in_use
> 0 && last_slot
< 0)
6937 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6938 _("`%s' does not fit into %s template"),
6939 idesc
->name
, ia64_templ_desc
[template_val
].name
);
6940 /* Drop first insn so we don't livelock. */
6941 --md
.num_slots_in_use
;
6942 know (curr
== first
);
6943 ia64_free_opcode (md
.slot
[curr
].idesc
);
6944 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6945 md
.slot
[curr
].user_template
= -1;
6947 else if (manual_bundling
> 0)
6949 if (md
.num_slots_in_use
> 0)
6952 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6953 _("`%s' does not fit into bundle"), idesc
->name
);
6958 if (template_val
== 2)
6960 else if (last_slot
== 0)
6961 where
= "slots 2 or 3";
6964 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6965 _("`%s' can't go in %s of %s template"),
6966 idesc
->name
, where
, ia64_templ_desc
[template_val
].name
);
6970 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6971 _("Missing '}' at end of file"));
6974 know (md
.num_slots_in_use
< NUM_SLOTS
);
6976 t0
= end_of_insn_group
| (template_val
<< 1) | (insn
[0] << 5) | (insn
[1] << 46);
6977 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6979 number_to_chars_littleendian (f
+ 0, t0
, 8);
6980 number_to_chars_littleendian (f
+ 8, t1
, 8);
6984 md_parse_option (int c
, const char *arg
)
6989 /* Switches from the Intel assembler. */
6991 if (strcmp (arg
, "ilp64") == 0
6992 || strcmp (arg
, "lp64") == 0
6993 || strcmp (arg
, "p64") == 0)
6995 md
.flags
|= EF_IA_64_ABI64
;
6997 else if (strcmp (arg
, "ilp32") == 0)
6999 md
.flags
&= ~EF_IA_64_ABI64
;
7001 else if (strcmp (arg
, "le") == 0)
7003 md
.flags
&= ~EF_IA_64_BE
;
7004 default_big_endian
= 0;
7006 else if (strcmp (arg
, "be") == 0)
7008 md
.flags
|= EF_IA_64_BE
;
7009 default_big_endian
= 1;
7011 else if (strncmp (arg
, "unwind-check=", 13) == 0)
7014 if (strcmp (arg
, "warning") == 0)
7015 md
.unwind_check
= unwind_check_warning
;
7016 else if (strcmp (arg
, "error") == 0)
7017 md
.unwind_check
= unwind_check_error
;
7021 else if (strncmp (arg
, "hint.b=", 7) == 0)
7024 if (strcmp (arg
, "ok") == 0)
7025 md
.hint_b
= hint_b_ok
;
7026 else if (strcmp (arg
, "warning") == 0)
7027 md
.hint_b
= hint_b_warning
;
7028 else if (strcmp (arg
, "error") == 0)
7029 md
.hint_b
= hint_b_error
;
7033 else if (strncmp (arg
, "tune=", 5) == 0)
7036 if (strcmp (arg
, "itanium1") == 0)
7038 else if (strcmp (arg
, "itanium2") == 0)
7048 if (strcmp (arg
, "so") == 0)
7050 /* Suppress signon message. */
7052 else if (strcmp (arg
, "pi") == 0)
7054 /* Reject privileged instructions. FIXME */
7056 else if (strcmp (arg
, "us") == 0)
7058 /* Allow union of signed and unsigned range. FIXME */
7060 else if (strcmp (arg
, "close_fcalls") == 0)
7062 /* Do not resolve global function calls. */
7069 /* temp[="prefix"] Insert temporary labels into the object file
7070 symbol table prefixed by "prefix".
7071 Default prefix is ":temp:".
7076 /* indirect=<tgt> Assume unannotated indirect branches behavior
7077 according to <tgt> --
7078 exit: branch out from the current context (default)
7079 labels: all labels in context may be branch targets
7081 if (strncmp (arg
, "indirect=", 9) != 0)
7086 /* -X conflicts with an ignored option, use -x instead */
7088 if (!arg
|| strcmp (arg
, "explicit") == 0)
7090 /* set default mode to explicit */
7091 md
.default_explicit_mode
= 1;
7094 else if (strcmp (arg
, "auto") == 0)
7096 md
.default_explicit_mode
= 0;
7098 else if (strcmp (arg
, "none") == 0)
7102 else if (strcmp (arg
, "debug") == 0)
7106 else if (strcmp (arg
, "debugx") == 0)
7108 md
.default_explicit_mode
= 1;
7111 else if (strcmp (arg
, "debugn") == 0)
7118 as_bad (_("Unrecognized option '-x%s'"), arg
);
7123 /* nops Print nops statistics. */
7126 /* GNU specific switches for gcc. */
7127 case OPTION_MCONSTANT_GP
:
7128 md
.flags
|= EF_IA_64_CONS_GP
;
7131 case OPTION_MAUTO_PIC
:
7132 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7143 md_show_usage (FILE *stream
)
7147 --mconstant-gp mark output file as using the constant-GP model\n\
7148 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7149 --mauto-pic mark output file as using the constant-GP model\n\
7150 without function descriptors (sets ELF header flag\n\
7151 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7152 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7153 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7154 -mtune=[itanium1|itanium2]\n\
7155 tune for a specific CPU (default -mtune=itanium2)\n\
7156 -munwind-check=[warning|error]\n\
7157 unwind directive check (default -munwind-check=warning)\n\
7158 -mhint.b=[ok|warning|error]\n\
7159 hint.b check (default -mhint.b=error)\n\
7160 -x | -xexplicit turn on dependency violation checking\n"), stream
);
7161 /* Note for translators: "automagically" can be translated as "automatically" here. */
7163 -xauto automagically remove dependency violations (default)\n\
7164 -xnone turn off dependency violation checking\n\
7165 -xdebug debug dependency violation checker\n\
7166 -xdebugn debug dependency violation checker but turn off\n\
7167 dependency violation checking\n\
7168 -xdebugx debug dependency violation checker and turn on\n\
7169 dependency violation checking\n"),
7174 ia64_after_parse_args (void)
7176 if (debug_type
== DEBUG_STABS
)
7177 as_fatal (_("--gstabs is not supported for ia64"));
7180 /* Return true if TYPE fits in TEMPL at SLOT. */
7183 match (int templ
, int type
, int slot
)
7185 enum ia64_unit unit
;
7188 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7191 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7193 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7195 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7196 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7197 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7198 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7199 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7200 default: result
= 0; break;
7205 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7206 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7207 type M or I would fit in TEMPL at SLOT. */
7210 extra_goodness (int templ
, int slot
)
7215 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7217 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7223 if (match (templ
, IA64_TYPE_M
, slot
)
7224 || match (templ
, IA64_TYPE_I
, slot
))
7225 /* Favor M- and I-unit NOPs. We definitely want to avoid
7226 F-unit and B-unit may cause split-issue or less-than-optimal
7227 branch-prediction. */
7238 /* This function is called once, at assembler startup time. It sets
7239 up all the tables, etc. that the MD part of the assembler will need
7240 that can be determined before arguments are parsed. */
7244 int i
, j
, k
, t
, goodness
, best
, ok
;
7249 md
.explicit_mode
= md
.default_explicit_mode
;
7251 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7253 /* Make sure function pointers get initialized. */
7254 target_big_endian
= -1;
7255 dot_byteorder (default_big_endian
);
7257 alias_hash
= hash_new ();
7258 alias_name_hash
= hash_new ();
7259 secalias_hash
= hash_new ();
7260 secalias_name_hash
= hash_new ();
7262 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7263 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7264 &zero_address_frag
);
7266 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7267 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7268 &zero_address_frag
);
7270 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7271 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7272 &zero_address_frag
);
7274 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7275 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7276 &zero_address_frag
);
7278 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7279 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7280 &zero_address_frag
);
7282 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7283 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7284 &zero_address_frag
);
7286 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7287 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7288 &zero_address_frag
);
7290 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7291 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7292 &zero_address_frag
);
7294 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7295 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7296 &zero_address_frag
);
7298 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7299 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7300 &zero_address_frag
);
7302 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7303 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7304 &zero_address_frag
);
7306 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7307 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7308 &zero_address_frag
);
7310 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7311 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7312 &zero_address_frag
);
7314 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7315 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7316 &zero_address_frag
);
7318 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7319 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7320 &zero_address_frag
);
7322 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7323 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7324 &zero_address_frag
);
7326 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7327 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7328 &zero_address_frag
);
7331 pseudo_func
[FUNC_SLOTCOUNT_RELOC
].u
.sym
=
7332 symbol_new (".<slotcount>", undefined_section
, FUNC_SLOTCOUNT_RELOC
,
7333 &zero_address_frag
);
7336 if (md
.tune
!= itanium1
)
7338 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7340 le_nop_stop
[0] = 0x9;
7343 /* Compute the table of best templates. We compute goodness as a
7344 base 4 value, in which each match counts for 3. Match-failures
7345 result in NOPs and we use extra_goodness() to pick the execution
7346 units that are best suited for issuing the NOP. */
7347 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7348 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7349 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7352 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7355 if (match (t
, i
, 0))
7357 if (match (t
, j
, 1))
7359 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7360 goodness
= 3 + 3 + 3;
7362 goodness
= 3 + 3 + extra_goodness (t
, 2);
7364 else if (match (t
, j
, 2))
7365 goodness
= 3 + 3 + extra_goodness (t
, 1);
7369 goodness
+= extra_goodness (t
, 1);
7370 goodness
+= extra_goodness (t
, 2);
7373 else if (match (t
, i
, 1))
7375 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7378 goodness
= 3 + extra_goodness (t
, 2);
7380 else if (match (t
, i
, 2))
7381 goodness
= 3 + extra_goodness (t
, 1);
7383 if (goodness
> best
)
7386 best_template
[i
][j
][k
] = t
;
7391 #ifdef DEBUG_TEMPLATES
7392 /* For debugging changes to the best_template calculations. We don't care
7393 about combinations with invalid instructions, so start the loops at 1. */
7394 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7395 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7396 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7398 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7400 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7402 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7406 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7407 md
.slot
[i
].user_template
= -1;
7409 md
.pseudo_hash
= hash_new ();
7410 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7412 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7413 (void *) (pseudo_opcode
+ i
));
7415 as_fatal (_("ia64.md_begin: can't hash `%s': %s"),
7416 pseudo_opcode
[i
].name
, err
);
7419 md
.reg_hash
= hash_new ();
7420 md
.dynreg_hash
= hash_new ();
7421 md
.const_hash
= hash_new ();
7422 md
.entry_hash
= hash_new ();
7424 /* general registers: */
7425 declare_register_set ("r", 128, REG_GR
);
7426 declare_register ("gp", REG_GR
+ 1);
7427 declare_register ("sp", REG_GR
+ 12);
7428 declare_register ("tp", REG_GR
+ 13);
7429 declare_register_set ("ret", 4, REG_GR
+ 8);
7431 /* floating point registers: */
7432 declare_register_set ("f", 128, REG_FR
);
7433 declare_register_set ("farg", 8, REG_FR
+ 8);
7434 declare_register_set ("fret", 8, REG_FR
+ 8);
7436 /* branch registers: */
7437 declare_register_set ("b", 8, REG_BR
);
7438 declare_register ("rp", REG_BR
+ 0);
7440 /* predicate registers: */
7441 declare_register_set ("p", 64, REG_P
);
7442 declare_register ("pr", REG_PR
);
7443 declare_register ("pr.rot", REG_PR_ROT
);
7445 /* application registers: */
7446 declare_register_set ("ar", 128, REG_AR
);
7447 for (i
= 0; i
< NELEMS (ar
); ++i
)
7448 declare_register (ar
[i
].name
, REG_AR
+ ar
[i
].regnum
);
7450 /* control registers: */
7451 declare_register_set ("cr", 128, REG_CR
);
7452 for (i
= 0; i
< NELEMS (cr
); ++i
)
7453 declare_register (cr
[i
].name
, REG_CR
+ cr
[i
].regnum
);
7455 /* dahr registers: */
7456 declare_register_set ("dahr", 8, REG_DAHR
);
7458 declare_register ("ip", REG_IP
);
7459 declare_register ("cfm", REG_CFM
);
7460 declare_register ("psr", REG_PSR
);
7461 declare_register ("psr.l", REG_PSR_L
);
7462 declare_register ("psr.um", REG_PSR_UM
);
7464 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7466 unsigned int regnum
= indirect_reg
[i
].regnum
;
7468 md
.indregsym
[regnum
- IND_CPUID
] = declare_register (indirect_reg
[i
].name
, regnum
);
7471 /* pseudo-registers used to specify unwind info: */
7472 declare_register ("psp", REG_PSP
);
7474 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7476 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7477 (void *) (const_bits
+ i
));
7479 as_fatal (_("Inserting \"%s\" into constant hash table failed: %s"),
7483 /* Set the architecture and machine depending on defaults and command line
7485 if (md
.flags
& EF_IA_64_ABI64
)
7486 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7488 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7491 as_warn (_("Could not set architecture and machine"));
7493 /* Set the pointer size and pointer shift size depending on md.flags */
7495 if (md
.flags
& EF_IA_64_ABI64
)
7497 md
.pointer_size
= 8; /* pointers are 8 bytes */
7498 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7502 md
.pointer_size
= 4; /* pointers are 4 bytes */
7503 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7506 md
.mem_offset
.hint
= 0;
7509 md
.entry_labels
= NULL
;
7512 /* Set the default options in md. Cannot do this in md_begin because
7513 that is called after md_parse_option which is where we set the
7514 options in md based on command line options. */
7517 ia64_init (int argc ATTRIBUTE_UNUSED
, char **argv ATTRIBUTE_UNUSED
)
7519 md
.flags
= MD_FLAGS_DEFAULT
;
7521 /* Don't turn on dependency checking for VMS, doesn't work. */
7524 /* FIXME: We should change it to unwind_check_error someday. */
7525 md
.unwind_check
= unwind_check_warning
;
7526 md
.hint_b
= hint_b_error
;
7530 /* Return a string for the target object file format. */
7533 ia64_target_format (void)
7535 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7537 if (md
.flags
& EF_IA_64_BE
)
7539 if (md
.flags
& EF_IA_64_ABI64
)
7540 #if defined(TE_AIX50)
7541 return "elf64-ia64-aix-big";
7542 #elif defined(TE_HPUX)
7543 return "elf64-ia64-hpux-big";
7545 return "elf64-ia64-big";
7548 #if defined(TE_AIX50)
7549 return "elf32-ia64-aix-big";
7550 #elif defined(TE_HPUX)
7551 return "elf32-ia64-hpux-big";
7553 return "elf32-ia64-big";
7558 if (md
.flags
& EF_IA_64_ABI64
)
7559 #if defined (TE_AIX50)
7560 return "elf64-ia64-aix-little";
7561 #elif defined (TE_VMS)
7563 md
.flags
|= EF_IA_64_ARCHVER_1
;
7564 return "elf64-ia64-vms";
7567 return "elf64-ia64-little";
7571 return "elf32-ia64-aix-little";
7573 return "elf32-ia64-little";
7578 return "unknown-format";
7582 ia64_end_of_source (void)
7584 /* terminate insn group upon reaching end of file: */
7585 insn_group_break (1, 0, 0);
7587 /* emits slots we haven't written yet: */
7588 ia64_flush_insns ();
7590 bfd_set_private_flags (stdoutput
, md
.flags
);
7592 md
.mem_offset
.hint
= 0;
7596 ia64_start_line (void)
7601 /* Make sure we don't reference input_line_pointer[-1] when that's
7607 if (md
.qp
.X_op
== O_register
)
7608 as_bad (_("qualifying predicate not followed by instruction"));
7609 md
.qp
.X_op
= O_absent
;
7611 if (ignore_input ())
7614 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7616 if (md
.detect_dv
&& !md
.explicit_mode
)
7623 as_warn (_("Explicit stops are ignored in auto mode"));
7627 insn_group_break (1, 0, 0);
7629 else if (input_line_pointer
[-1] == '{')
7631 if (md
.manual_bundling
)
7632 as_warn (_("Found '{' when manual bundling is already turned on"));
7634 CURR_SLOT
.manual_bundling_on
= 1;
7635 md
.manual_bundling
= 1;
7637 /* Bundling is only acceptable in explicit mode
7638 or when in default automatic mode. */
7639 if (md
.detect_dv
&& !md
.explicit_mode
)
7641 if (!md
.mode_explicitly_set
7642 && !md
.default_explicit_mode
)
7645 as_warn (_("Found '{' after explicit switch to automatic mode"));
7648 else if (input_line_pointer
[-1] == '}')
7650 if (!md
.manual_bundling
)
7651 as_warn (_("Found '}' when manual bundling is off"));
7653 PREV_SLOT
.manual_bundling_off
= 1;
7654 md
.manual_bundling
= 0;
7656 /* switch back to automatic mode, if applicable */
7659 && !md
.mode_explicitly_set
7660 && !md
.default_explicit_mode
)
7665 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7667 static int defining_tag
= 0;
7670 ia64_unrecognized_line (int ch
)
7675 expression_and_evaluate (&md
.qp
);
7676 if (*input_line_pointer
++ != ')')
7678 as_bad (_("Expected ')'"));
7681 if (md
.qp
.X_op
!= O_register
)
7683 as_bad (_("Qualifying predicate expected"));
7686 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7688 as_bad (_("Predicate register expected"));
7700 if (md
.qp
.X_op
== O_register
)
7702 as_bad (_("Tag must come before qualifying predicate."));
7706 /* This implements just enough of read_a_source_file in read.c to
7707 recognize labels. */
7708 if (is_name_beginner (*input_line_pointer
))
7710 c
= get_symbol_name (&s
);
7712 else if (LOCAL_LABELS_FB
7713 && ISDIGIT (*input_line_pointer
))
7716 while (ISDIGIT (*input_line_pointer
))
7717 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7718 fb_label_instance_inc (temp
);
7719 s
= fb_label_name (temp
, 0);
7720 c
= *input_line_pointer
;
7729 /* Put ':' back for error messages' sake. */
7730 *input_line_pointer
++ = ':';
7731 as_bad (_("Expected ':'"));
7738 /* Put ':' back for error messages' sake. */
7739 *input_line_pointer
++ = ':';
7740 if (*input_line_pointer
++ != ']')
7742 as_bad (_("Expected ']'"));
7747 as_bad (_("Tag name expected"));
7757 /* Not a valid line. */
7762 ia64_frob_label (struct symbol
*sym
)
7764 struct label_fix
*fix
;
7766 /* Tags need special handling since they are not bundle breaks like
7770 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7772 fix
->next
= CURR_SLOT
.tag_fixups
;
7773 fix
->dw2_mark_labels
= FALSE
;
7774 CURR_SLOT
.tag_fixups
= fix
;
7779 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7781 md
.last_text_seg
= now_seg
;
7782 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7784 fix
->next
= CURR_SLOT
.label_fixups
;
7785 fix
->dw2_mark_labels
= dwarf2_loc_mark_labels
;
7786 CURR_SLOT
.label_fixups
= fix
;
7788 /* Keep track of how many code entry points we've seen. */
7789 if (md
.path
== md
.maxpaths
)
7792 md
.entry_labels
= (const char **)
7793 xrealloc ((void *) md
.entry_labels
,
7794 md
.maxpaths
* sizeof (char *));
7796 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7801 /* The HP-UX linker will give unresolved symbol errors for symbols
7802 that are declared but unused. This routine removes declared,
7803 unused symbols from an object. */
7805 ia64_frob_symbol (struct symbol
*sym
)
7807 if ((S_GET_SEGMENT (sym
) == bfd_und_section_ptr
&& ! symbol_used_p (sym
) &&
7808 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7809 || (S_GET_SEGMENT (sym
) == bfd_abs_section_ptr
7810 && ! S_IS_EXTERNAL (sym
)))
7817 ia64_flush_pending_output (void)
7819 if (!md
.keep_pending_output
7820 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7822 /* ??? This causes many unnecessary stop bits to be emitted.
7823 Unfortunately, it isn't clear if it is safe to remove this. */
7824 insn_group_break (1, 0, 0);
7825 ia64_flush_insns ();
7829 /* Do ia64-specific expression optimization. All that's done here is
7830 to transform index expressions that are either due to the indexing
7831 of rotating registers or due to the indexing of indirect register
7834 ia64_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
7838 resolve_expression (l
);
7839 if (l
->X_op
== O_register
)
7841 unsigned num_regs
= l
->X_add_number
>> 16;
7843 resolve_expression (r
);
7846 /* Left side is a .rotX-allocated register. */
7847 if (r
->X_op
!= O_constant
)
7849 as_bad (_("Rotating register index must be a non-negative constant"));
7850 r
->X_add_number
= 0;
7852 else if ((valueT
) r
->X_add_number
>= num_regs
)
7854 as_bad (_("Index out of range 0..%u"), num_regs
- 1);
7855 r
->X_add_number
= 0;
7857 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7860 else if (l
->X_add_number
>= IND_CPUID
&& l
->X_add_number
<= IND_RR
)
7862 if (r
->X_op
!= O_register
7863 || r
->X_add_number
< REG_GR
7864 || r
->X_add_number
> REG_GR
+ 127)
7866 as_bad (_("Indirect register index must be a general register"));
7867 r
->X_add_number
= REG_GR
;
7870 l
->X_op_symbol
= md
.indregsym
[l
->X_add_number
- IND_CPUID
];
7871 l
->X_add_number
= r
->X_add_number
;
7875 as_bad (_("Index can only be applied to rotating or indirect registers"));
7876 /* Fall back to some register use of which has as little as possible
7877 side effects, to minimize subsequent error messages. */
7878 l
->X_op
= O_register
;
7879 l
->X_add_number
= REG_GR
+ 3;
7884 ia64_parse_name (char *name
, expressionS
*e
, char *nextcharP
)
7886 struct const_desc
*cdesc
;
7887 struct dynreg
*dr
= 0;
7894 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7896 /* Find what relocation pseudo-function we're dealing with. */
7897 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7898 if (pseudo_func
[idx
].name
7899 && pseudo_func
[idx
].name
[0] == name
[1]
7900 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7902 pseudo_type
= pseudo_func
[idx
].type
;
7905 switch (pseudo_type
)
7907 case PSEUDO_FUNC_RELOC
:
7908 end
= input_line_pointer
;
7909 if (*nextcharP
!= '(')
7911 as_bad (_("Expected '('"));
7915 ++input_line_pointer
;
7917 if (*input_line_pointer
!= ')')
7919 as_bad (_("Missing ')'"));
7923 ++input_line_pointer
;
7925 if (idx
== FUNC_SLOTCOUNT_RELOC
)
7927 /* @slotcount can accept any expression. Canonicalize. */
7928 e
->X_add_symbol
= make_expr_symbol (e
);
7930 e
->X_add_number
= 0;
7933 if (e
->X_op
!= O_symbol
)
7935 if (e
->X_op
!= O_pseudo_fixup
)
7937 as_bad (_("Not a symbolic expression"));
7940 if (idx
!= FUNC_LT_RELATIVE
)
7942 as_bad (_("Illegal combination of relocation functions"));
7945 switch (S_GET_VALUE (e
->X_op_symbol
))
7947 case FUNC_FPTR_RELATIVE
:
7948 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7949 case FUNC_DTP_MODULE
:
7950 idx
= FUNC_LT_DTP_MODULE
; break;
7951 case FUNC_DTP_RELATIVE
:
7952 idx
= FUNC_LT_DTP_RELATIVE
; break;
7953 case FUNC_TP_RELATIVE
:
7954 idx
= FUNC_LT_TP_RELATIVE
; break;
7956 as_bad (_("Illegal combination of relocation functions"));
7960 /* Make sure gas doesn't get rid of local symbols that are used
7962 e
->X_op
= O_pseudo_fixup
;
7963 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7965 *nextcharP
= *input_line_pointer
;
7968 case PSEUDO_FUNC_CONST
:
7969 e
->X_op
= O_constant
;
7970 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7973 case PSEUDO_FUNC_REG
:
7974 e
->X_op
= O_register
;
7975 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7984 /* first see if NAME is a known register name: */
7985 sym
= hash_find (md
.reg_hash
, name
);
7988 e
->X_op
= O_register
;
7989 e
->X_add_number
= S_GET_VALUE (sym
);
7993 cdesc
= hash_find (md
.const_hash
, name
);
7996 e
->X_op
= O_constant
;
7997 e
->X_add_number
= cdesc
->value
;
8001 /* check for inN, locN, or outN: */
8006 if (name
[1] == 'n' && ISDIGIT (name
[2]))
8014 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
8022 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
8033 /* Ignore register numbers with leading zeroes, except zero itself. */
8034 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
8036 unsigned long regnum
;
8038 /* The name is inN, locN, or outN; parse the register number. */
8039 regnum
= strtoul (name
+ idx
, &end
, 10);
8040 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
8042 if (regnum
>= dr
->num_regs
)
8045 as_bad (_("No current frame"));
8047 as_bad (_("Register number out of range 0..%u"),
8051 e
->X_op
= O_register
;
8052 e
->X_add_number
= dr
->base
+ regnum
;
8057 end
= xstrdup (name
);
8058 name
= ia64_canonicalize_symbol_name (end
);
8059 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8061 /* We've got ourselves the name of a rotating register set.
8062 Store the base register number in the low 16 bits of
8063 X_add_number and the size of the register set in the top 16
8065 e
->X_op
= O_register
;
8066 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8074 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8077 ia64_canonicalize_symbol_name (char *name
)
8079 size_t len
= strlen (name
), full
= len
;
8081 while (len
> 0 && name
[len
- 1] == '#')
8086 as_bad (_("Standalone `#' is illegal"));
8088 else if (len
< full
- 1)
8089 as_warn (_("Redundant `#' suffix operators"));
8094 /* Return true if idesc is a conditional branch instruction. This excludes
8095 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8096 because they always read/write resources regardless of the value of the
8097 qualifying predicate. br.ia must always use p0, and hence is always
8098 taken. Thus this function returns true for branches which can fall
8099 through, and which use no resources if they do fall through. */
8102 is_conditional_branch (struct ia64_opcode
*idesc
)
8104 /* br is a conditional branch. Everything that starts with br. except
8105 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8106 Everything that starts with brl is a conditional branch. */
8107 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8108 && (idesc
->name
[2] == '\0'
8109 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8110 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8111 || idesc
->name
[2] == 'l'
8112 /* br.cond, br.call, br.clr */
8113 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8114 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8115 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8118 /* Return whether the given opcode is a taken branch. If there's any doubt,
8122 is_taken_branch (struct ia64_opcode
*idesc
)
8124 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8125 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8128 /* Return whether the given opcode is an interruption or rfi. If there's any
8129 doubt, returns zero. */
8132 is_interruption_or_rfi (struct ia64_opcode
*idesc
)
8134 if (strcmp (idesc
->name
, "rfi") == 0)
8139 /* Returns the index of the given dependency in the opcode's list of chks, or
8140 -1 if there is no dependency. */
8143 depends_on (int depind
, struct ia64_opcode
*idesc
)
8146 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8147 for (i
= 0; i
< dep
->nchks
; i
++)
8149 if (depind
== DEP (dep
->chks
[i
]))
8155 /* Determine a set of specific resources used for a particular resource
8156 class. Returns the number of specific resources identified For those
8157 cases which are not determinable statically, the resource returned is
8160 Meanings of value in 'NOTE':
8161 1) only read/write when the register number is explicitly encoded in the
8163 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8164 accesses CFM when qualifying predicate is in the rotating region.
8165 3) general register value is used to specify an indirect register; not
8166 determinable statically.
8167 4) only read the given resource when bits 7:0 of the indirect index
8168 register value does not match the register number of the resource; not
8169 determinable statically.
8170 5) all rules are implementation specific.
8171 6) only when both the index specified by the reader and the index specified
8172 by the writer have the same value in bits 63:61; not determinable
8174 7) only access the specified resource when the corresponding mask bit is
8176 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8177 only read when these insns reference FR2-31
8178 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8179 written when these insns write FR32-127
8180 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8182 11) The target predicates are written independently of PR[qp], but source
8183 registers are only read if PR[qp] is true. Since the state of PR[qp]
8184 cannot statically be determined, all source registers are marked used.
8185 12) This insn only reads the specified predicate register when that
8186 register is the PR[qp].
8187 13) This reference to ld-c only applies to the GR whose value is loaded
8188 with data returned from memory, not the post-incremented address register.
8189 14) The RSE resource includes the implementation-specific RSE internal
8190 state resources. At least one (and possibly more) of these resources are
8191 read by each instruction listed in IC:rse-readers. At least one (and
8192 possibly more) of these resources are written by each insn listed in
8194 15+16) Represents reserved instructions, which the assembler does not
8196 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and
8197 mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up.
8199 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8200 this code; there are no dependency violations based on memory access.
8203 #define MAX_SPECS 256
8208 specify_resource (const struct ia64_dependency
*dep
,
8209 struct ia64_opcode
*idesc
,
8210 /* is this a DV chk or a DV reg? */
8212 /* returned specific resources */
8213 struct rsrc specs
[MAX_SPECS
],
8214 /* resource note for this insn's usage */
8216 /* which execution path to examine */
8224 if (dep
->mode
== IA64_DV_WAW
8225 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8226 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8229 /* template for any resources we identify */
8230 tmpl
.dependency
= dep
;
8232 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8233 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8234 tmpl
.link_to_qp_branch
= 1;
8235 tmpl
.mem_offset
.hint
= 0;
8236 tmpl
.mem_offset
.offset
= 0;
8237 tmpl
.mem_offset
.base
= 0;
8240 tmpl
.cmp_type
= CMP_NONE
;
8247 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8248 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8249 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8251 /* we don't need to track these */
8252 if (dep
->semantics
== IA64_DVS_NONE
)
8255 switch (dep
->specifier
)
8260 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8262 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8263 if (regno
>= 0 && regno
<= 7)
8265 specs
[count
] = tmpl
;
8266 specs
[count
++].index
= regno
;
8272 for (i
= 0; i
< 8; i
++)
8274 specs
[count
] = tmpl
;
8275 specs
[count
++].index
= i
;
8284 case IA64_RS_AR_UNAT
:
8285 /* This is a mov =AR or mov AR= instruction. */
8286 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8288 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8289 if (regno
== AR_UNAT
)
8291 specs
[count
++] = tmpl
;
8296 /* This is a spill/fill, or other instruction that modifies the
8299 /* Unless we can determine the specific bits used, mark the whole
8300 thing; bits 8:3 of the memory address indicate the bit used in
8301 UNAT. The .mem.offset hint may be used to eliminate a small
8302 subset of conflicts. */
8303 specs
[count
] = tmpl
;
8304 if (md
.mem_offset
.hint
)
8307 fprintf (stderr
, " Using hint for spill/fill\n");
8308 /* The index isn't actually used, just set it to something
8309 approximating the bit index. */
8310 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8311 specs
[count
].mem_offset
.hint
= 1;
8312 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8313 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8317 specs
[count
++].specific
= 0;
8325 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8327 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8328 if ((regno
>= 8 && regno
<= 15)
8329 || (regno
>= 20 && regno
<= 23)
8330 || (regno
>= 31 && regno
<= 39)
8331 || (regno
>= 41 && regno
<= 47)
8332 || (regno
>= 67 && regno
<= 111))
8334 specs
[count
] = tmpl
;
8335 specs
[count
++].index
= regno
;
8348 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8350 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8351 if ((regno
>= 48 && regno
<= 63)
8352 || (regno
>= 112 && regno
<= 127))
8354 specs
[count
] = tmpl
;
8355 specs
[count
++].index
= regno
;
8361 for (i
= 48; i
< 64; i
++)
8363 specs
[count
] = tmpl
;
8364 specs
[count
++].index
= i
;
8366 for (i
= 112; i
< 128; i
++)
8368 specs
[count
] = tmpl
;
8369 specs
[count
++].index
= i
;
8387 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8388 if (idesc
->operands
[i
] == IA64_OPND_B1
8389 || idesc
->operands
[i
] == IA64_OPND_B2
)
8391 specs
[count
] = tmpl
;
8392 specs
[count
++].index
=
8393 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8398 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8399 if (idesc
->operands
[i
] == IA64_OPND_B1
8400 || idesc
->operands
[i
] == IA64_OPND_B2
)
8402 specs
[count
] = tmpl
;
8403 specs
[count
++].index
=
8404 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8410 case IA64_RS_CPUID
: /* four or more registers */
8413 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8415 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8416 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8419 specs
[count
] = tmpl
;
8420 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8424 specs
[count
] = tmpl
;
8425 specs
[count
++].specific
= 0;
8435 case IA64_RS_DBR
: /* four or more registers */
8438 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8440 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8441 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8444 specs
[count
] = tmpl
;
8445 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8449 specs
[count
] = tmpl
;
8450 specs
[count
++].specific
= 0;
8454 else if (note
== 0 && !rsrc_write
)
8456 specs
[count
] = tmpl
;
8457 specs
[count
++].specific
= 0;
8465 case IA64_RS_IBR
: /* four or more registers */
8468 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8470 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8471 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8474 specs
[count
] = tmpl
;
8475 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8479 specs
[count
] = tmpl
;
8480 specs
[count
++].specific
= 0;
8493 /* These are implementation specific. Force all references to
8494 conflict with all other references. */
8495 specs
[count
] = tmpl
;
8496 specs
[count
++].specific
= 0;
8504 case IA64_RS_PKR
: /* 16 or more registers */
8505 if (note
== 3 || note
== 4)
8507 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8509 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8510 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8515 specs
[count
] = tmpl
;
8516 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8519 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8521 /* Uses all registers *except* the one in R3. */
8522 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8524 specs
[count
] = tmpl
;
8525 specs
[count
++].index
= i
;
8531 specs
[count
] = tmpl
;
8532 specs
[count
++].specific
= 0;
8539 specs
[count
] = tmpl
;
8540 specs
[count
++].specific
= 0;
8544 case IA64_RS_PMC
: /* four or more registers */
8547 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8548 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8551 int reg_index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8553 int regno
= CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_GR
;
8554 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8557 specs
[count
] = tmpl
;
8558 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8562 specs
[count
] = tmpl
;
8563 specs
[count
++].specific
= 0;
8573 case IA64_RS_PMD
: /* four or more registers */
8576 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8578 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8579 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8582 specs
[count
] = tmpl
;
8583 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8587 specs
[count
] = tmpl
;
8588 specs
[count
++].specific
= 0;
8598 case IA64_RS_RR
: /* eight registers */
8601 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8603 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8604 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8607 specs
[count
] = tmpl
;
8608 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8612 specs
[count
] = tmpl
;
8613 specs
[count
++].specific
= 0;
8617 else if (note
== 0 && !rsrc_write
)
8619 specs
[count
] = tmpl
;
8620 specs
[count
++].specific
= 0;
8628 case IA64_RS_CR_IRR
:
8631 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8632 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8634 && idesc
->operands
[1] == IA64_OPND_CR3
8637 for (i
= 0; i
< 4; i
++)
8639 specs
[count
] = tmpl
;
8640 specs
[count
++].index
= CR_IRR0
+ i
;
8646 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8647 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8649 && regno
<= CR_IRR3
)
8651 specs
[count
] = tmpl
;
8652 specs
[count
++].index
= regno
;
8661 case IA64_RS_CR_IIB
:
8668 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8669 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8670 && (regno
== CR_IIB0
|| regno
== CR_IIB1
))
8672 specs
[count
] = tmpl
;
8673 specs
[count
++].index
= regno
;
8678 case IA64_RS_CR_LRR
:
8685 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8686 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8687 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8689 specs
[count
] = tmpl
;
8690 specs
[count
++].index
= regno
;
8698 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8700 specs
[count
] = tmpl
;
8701 specs
[count
++].index
=
8702 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8714 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DAHR3
)
8716 specs
[count
] = tmpl
;
8717 specs
[count
++].index
=
8718 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_DAHR
;
8733 else if (rsrc_write
)
8735 if (dep
->specifier
== IA64_RS_FRb
8736 && idesc
->operands
[0] == IA64_OPND_F1
)
8738 specs
[count
] = tmpl
;
8739 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8744 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8746 if (idesc
->operands
[i
] == IA64_OPND_F2
8747 || idesc
->operands
[i
] == IA64_OPND_F3
8748 || idesc
->operands
[i
] == IA64_OPND_F4
)
8750 specs
[count
] = tmpl
;
8751 specs
[count
++].index
=
8752 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8761 /* This reference applies only to the GR whose value is loaded with
8762 data returned from memory. */
8763 specs
[count
] = tmpl
;
8764 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8770 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8771 if (idesc
->operands
[i
] == IA64_OPND_R1
8772 || idesc
->operands
[i
] == IA64_OPND_R2
8773 || idesc
->operands
[i
] == IA64_OPND_R3
)
8775 specs
[count
] = tmpl
;
8776 specs
[count
++].index
=
8777 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8779 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8780 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8781 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8783 specs
[count
] = tmpl
;
8784 specs
[count
++].index
=
8785 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8790 /* Look for anything that reads a GR. */
8791 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8793 if (idesc
->operands
[i
] == IA64_OPND_MR3
8794 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8795 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8796 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8797 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8798 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8799 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8800 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8801 || idesc
->operands
[i
] == IA64_OPND_DAHR_R3
8802 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8803 || ((i
>= idesc
->num_outputs
)
8804 && (idesc
->operands
[i
] == IA64_OPND_R1
8805 || idesc
->operands
[i
] == IA64_OPND_R2
8806 || idesc
->operands
[i
] == IA64_OPND_R3
8807 /* addl source register. */
8808 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8810 specs
[count
] = tmpl
;
8811 specs
[count
++].index
=
8812 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8823 /* This is the same as IA64_RS_PRr, except that the register range is
8824 from 1 - 15, and there are no rotating register reads/writes here. */
8828 for (i
= 1; i
< 16; i
++)
8830 specs
[count
] = tmpl
;
8831 specs
[count
++].index
= i
;
8837 /* Mark only those registers indicated by the mask. */
8840 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8841 for (i
= 1; i
< 16; i
++)
8842 if (mask
& ((valueT
) 1 << i
))
8844 specs
[count
] = tmpl
;
8845 specs
[count
++].index
= i
;
8853 else if (note
== 11) /* note 11 implies note 1 as well */
8857 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8859 if (idesc
->operands
[i
] == IA64_OPND_P1
8860 || idesc
->operands
[i
] == IA64_OPND_P2
)
8862 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8863 if (regno
>= 1 && regno
< 16)
8865 specs
[count
] = tmpl
;
8866 specs
[count
++].index
= regno
;
8876 else if (note
== 12)
8878 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8880 specs
[count
] = tmpl
;
8881 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8888 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8889 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8890 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8891 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8893 if ((idesc
->operands
[0] == IA64_OPND_P1
8894 || idesc
->operands
[0] == IA64_OPND_P2
)
8895 && p1
>= 1 && p1
< 16)
8897 specs
[count
] = tmpl
;
8898 specs
[count
].cmp_type
=
8899 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8900 specs
[count
++].index
= p1
;
8902 if ((idesc
->operands
[1] == IA64_OPND_P1
8903 || idesc
->operands
[1] == IA64_OPND_P2
)
8904 && p2
>= 1 && p2
< 16)
8906 specs
[count
] = tmpl
;
8907 specs
[count
].cmp_type
=
8908 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8909 specs
[count
++].index
= p2
;
8914 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8916 specs
[count
] = tmpl
;
8917 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8919 if (idesc
->operands
[1] == IA64_OPND_PR
)
8921 for (i
= 1; i
< 16; i
++)
8923 specs
[count
] = tmpl
;
8924 specs
[count
++].index
= i
;
8935 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8936 simplified cases of this. */
8940 for (i
= 16; i
< 63; i
++)
8942 specs
[count
] = tmpl
;
8943 specs
[count
++].index
= i
;
8949 /* Mark only those registers indicated by the mask. */
8951 && idesc
->operands
[0] == IA64_OPND_PR
)
8953 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8954 if (mask
& ((valueT
) 1 << 16))
8955 for (i
= 16; i
< 63; i
++)
8957 specs
[count
] = tmpl
;
8958 specs
[count
++].index
= i
;
8962 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8964 for (i
= 16; i
< 63; i
++)
8966 specs
[count
] = tmpl
;
8967 specs
[count
++].index
= i
;
8975 else if (note
== 11) /* note 11 implies note 1 as well */
8979 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8981 if (idesc
->operands
[i
] == IA64_OPND_P1
8982 || idesc
->operands
[i
] == IA64_OPND_P2
)
8984 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8985 if (regno
>= 16 && regno
< 63)
8987 specs
[count
] = tmpl
;
8988 specs
[count
++].index
= regno
;
8998 else if (note
== 12)
9000 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9002 specs
[count
] = tmpl
;
9003 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9010 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9011 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9012 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9013 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9015 if ((idesc
->operands
[0] == IA64_OPND_P1
9016 || idesc
->operands
[0] == IA64_OPND_P2
)
9017 && p1
>= 16 && p1
< 63)
9019 specs
[count
] = tmpl
;
9020 specs
[count
].cmp_type
=
9021 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9022 specs
[count
++].index
= p1
;
9024 if ((idesc
->operands
[1] == IA64_OPND_P1
9025 || idesc
->operands
[1] == IA64_OPND_P2
)
9026 && p2
>= 16 && p2
< 63)
9028 specs
[count
] = tmpl
;
9029 specs
[count
].cmp_type
=
9030 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9031 specs
[count
++].index
= p2
;
9036 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9038 specs
[count
] = tmpl
;
9039 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9041 if (idesc
->operands
[1] == IA64_OPND_PR
)
9043 for (i
= 16; i
< 63; i
++)
9045 specs
[count
] = tmpl
;
9046 specs
[count
++].index
= i
;
9058 /* Verify that the instruction is using the PSR bit indicated in
9062 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
9064 if (dep
->regindex
< 6)
9066 specs
[count
++] = tmpl
;
9069 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
9071 if (dep
->regindex
< 32
9072 || dep
->regindex
== 35
9073 || dep
->regindex
== 36
9074 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
9076 specs
[count
++] = tmpl
;
9079 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
9081 if (dep
->regindex
< 32
9082 || dep
->regindex
== 35
9083 || dep
->regindex
== 36
9084 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
9086 specs
[count
++] = tmpl
;
9091 /* Several PSR bits have very specific dependencies. */
9092 switch (dep
->regindex
)
9095 specs
[count
++] = tmpl
;
9100 specs
[count
++] = tmpl
;
9104 /* Only certain CR accesses use PSR.ic */
9105 if (idesc
->operands
[0] == IA64_OPND_CR3
9106 || idesc
->operands
[1] == IA64_OPND_CR3
)
9109 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9112 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_CR
;
9129 specs
[count
++] = tmpl
;
9138 specs
[count
++] = tmpl
;
9142 /* Only some AR accesses use cpl */
9143 if (idesc
->operands
[0] == IA64_OPND_AR3
9144 || idesc
->operands
[1] == IA64_OPND_AR3
)
9147 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9150 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_AR
;
9157 && regno
<= AR_K7
))))
9159 specs
[count
++] = tmpl
;
9164 specs
[count
++] = tmpl
;
9174 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9176 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9182 if (mask
& ((valueT
) 1 << dep
->regindex
))
9184 specs
[count
++] = tmpl
;
9189 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9190 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9191 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9192 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9194 if (idesc
->operands
[i
] == IA64_OPND_F1
9195 || idesc
->operands
[i
] == IA64_OPND_F2
9196 || idesc
->operands
[i
] == IA64_OPND_F3
9197 || idesc
->operands
[i
] == IA64_OPND_F4
)
9199 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9200 if (reg
>= min
&& reg
<= max
)
9202 specs
[count
++] = tmpl
;
9209 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9210 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9211 /* mfh is read on writes to FR32-127; mfl is read on writes to
9213 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9215 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9217 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9218 if (reg
>= min
&& reg
<= max
)
9220 specs
[count
++] = tmpl
;
9225 else if (note
== 10)
9227 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9229 if (idesc
->operands
[i
] == IA64_OPND_R1
9230 || idesc
->operands
[i
] == IA64_OPND_R2
9231 || idesc
->operands
[i
] == IA64_OPND_R3
)
9233 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9234 if (regno
>= 16 && regno
<= 31)
9236 specs
[count
++] = tmpl
;
9247 case IA64_RS_AR_FPSR
:
9248 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9250 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9251 if (regno
== AR_FPSR
)
9253 specs
[count
++] = tmpl
;
9258 specs
[count
++] = tmpl
;
9263 /* Handle all AR[REG] resources */
9264 if (note
== 0 || note
== 1)
9266 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9267 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9268 && regno
== dep
->regindex
)
9270 specs
[count
++] = tmpl
;
9272 /* other AR[REG] resources may be affected by AR accesses */
9273 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9276 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9277 switch (dep
->regindex
)
9283 if (regno
== AR_BSPSTORE
)
9285 specs
[count
++] = tmpl
;
9289 (regno
== AR_BSPSTORE
9290 || regno
== AR_RNAT
))
9292 specs
[count
++] = tmpl
;
9297 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9300 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9301 switch (dep
->regindex
)
9306 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9308 specs
[count
++] = tmpl
;
9315 specs
[count
++] = tmpl
;
9325 /* Handle all CR[REG] resources.
9326 ??? FIXME: The rule 17 isn't really handled correctly. */
9327 if (note
== 0 || note
== 1 || note
== 17)
9329 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9331 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9332 if (regno
== dep
->regindex
)
9334 specs
[count
++] = tmpl
;
9336 else if (!rsrc_write
)
9338 /* Reads from CR[IVR] affect other resources. */
9339 if (regno
== CR_IVR
)
9341 if ((dep
->regindex
>= CR_IRR0
9342 && dep
->regindex
<= CR_IRR3
)
9343 || dep
->regindex
== CR_TPR
)
9345 specs
[count
++] = tmpl
;
9352 specs
[count
++] = tmpl
;
9361 case IA64_RS_INSERVICE
:
9362 /* look for write of EOI (67) or read of IVR (65) */
9363 if ((idesc
->operands
[0] == IA64_OPND_CR3
9364 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9365 || (idesc
->operands
[1] == IA64_OPND_CR3
9366 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9368 specs
[count
++] = tmpl
;
9375 specs
[count
++] = tmpl
;
9386 specs
[count
++] = tmpl
;
9390 /* Check if any of the registers accessed are in the rotating region.
9391 mov to/from pr accesses CFM only when qp_regno is in the rotating
9393 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9395 if (idesc
->operands
[i
] == IA64_OPND_R1
9396 || idesc
->operands
[i
] == IA64_OPND_R2
9397 || idesc
->operands
[i
] == IA64_OPND_R3
)
9399 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9400 /* Assumes that md.rot.num_regs is always valid */
9401 if (md
.rot
.num_regs
> 0
9403 && num
< 31 + md
.rot
.num_regs
)
9405 specs
[count
] = tmpl
;
9406 specs
[count
++].specific
= 0;
9409 else if (idesc
->operands
[i
] == IA64_OPND_F1
9410 || idesc
->operands
[i
] == IA64_OPND_F2
9411 || idesc
->operands
[i
] == IA64_OPND_F3
9412 || idesc
->operands
[i
] == IA64_OPND_F4
)
9414 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9417 specs
[count
] = tmpl
;
9418 specs
[count
++].specific
= 0;
9421 else if (idesc
->operands
[i
] == IA64_OPND_P1
9422 || idesc
->operands
[i
] == IA64_OPND_P2
)
9424 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9427 specs
[count
] = tmpl
;
9428 specs
[count
++].specific
= 0;
9432 if (CURR_SLOT
.qp_regno
> 15)
9434 specs
[count
] = tmpl
;
9435 specs
[count
++].specific
= 0;
9440 /* This is the same as IA64_RS_PRr, except simplified to account for
9441 the fact that there is only one register. */
9445 specs
[count
++] = tmpl
;
9450 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9451 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9452 if (mask
& ((valueT
) 1 << 63))
9453 specs
[count
++] = tmpl
;
9455 else if (note
== 11)
9457 if ((idesc
->operands
[0] == IA64_OPND_P1
9458 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9459 || (idesc
->operands
[1] == IA64_OPND_P2
9460 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9462 specs
[count
++] = tmpl
;
9465 else if (note
== 12)
9467 if (CURR_SLOT
.qp_regno
== 63)
9469 specs
[count
++] = tmpl
;
9476 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9477 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9478 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9479 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9482 && (idesc
->operands
[0] == IA64_OPND_P1
9483 || idesc
->operands
[0] == IA64_OPND_P2
))
9485 specs
[count
] = tmpl
;
9486 specs
[count
++].cmp_type
=
9487 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9490 && (idesc
->operands
[1] == IA64_OPND_P1
9491 || idesc
->operands
[1] == IA64_OPND_P2
))
9493 specs
[count
] = tmpl
;
9494 specs
[count
++].cmp_type
=
9495 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9500 if (CURR_SLOT
.qp_regno
== 63)
9502 specs
[count
++] = tmpl
;
9513 /* FIXME we can identify some individual RSE written resources, but RSE
9514 read resources have not yet been completely identified, so for now
9515 treat RSE as a single resource */
9516 if (strncmp (idesc
->name
, "mov", 3) == 0)
9520 if (idesc
->operands
[0] == IA64_OPND_AR3
9521 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9523 specs
[count
++] = tmpl
;
9528 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9530 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9531 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9533 specs
[count
++] = tmpl
;
9536 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9538 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9539 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9540 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9542 specs
[count
++] = tmpl
;
9549 specs
[count
++] = tmpl
;
9554 /* FIXME -- do any of these need to be non-specific? */
9555 specs
[count
++] = tmpl
;
9559 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9566 /* Clear branch flags on marked resources. This breaks the link between the
9567 QP of the marking instruction and a subsequent branch on the same QP. */
9570 clear_qp_branch_flag (valueT mask
)
9573 for (i
= 0; i
< regdepslen
; i
++)
9575 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9576 if ((bit
& mask
) != 0)
9578 regdeps
[i
].link_to_qp_branch
= 0;
9583 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9584 any mutexes which contain one of the PRs and create new ones when
9588 update_qp_mutex (valueT mask
)
9594 while (i
< qp_mutexeslen
)
9596 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9598 /* If it destroys and creates the same mutex, do nothing. */
9599 if (qp_mutexes
[i
].prmask
== mask
9600 && qp_mutexes
[i
].path
== md
.path
)
9611 fprintf (stderr
, " Clearing mutex relation");
9612 print_prmask (qp_mutexes
[i
].prmask
);
9613 fprintf (stderr
, "\n");
9616 /* Deal with the old mutex with more than 3+ PRs only if
9617 the new mutex on the same execution path with it.
9619 FIXME: The 3+ mutex support is incomplete.
9620 dot_pred_rel () may be a better place to fix it. */
9621 if (qp_mutexes
[i
].path
== md
.path
)
9623 /* If it is a proper subset of the mutex, create a
9626 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9629 qp_mutexes
[i
].prmask
&= ~mask
;
9630 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9632 /* Modify the mutex if there are more than one
9640 /* Remove the mutex. */
9641 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9649 add_qp_mutex (mask
);
9654 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9656 Any changes to a PR clears the mutex relations which include that PR. */
9659 clear_qp_mutex (valueT mask
)
9664 while (i
< qp_mutexeslen
)
9666 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9670 fprintf (stderr
, " Clearing mutex relation");
9671 print_prmask (qp_mutexes
[i
].prmask
);
9672 fprintf (stderr
, "\n");
9674 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9681 /* Clear implies relations which contain PRs in the given masks.
9682 P1_MASK indicates the source of the implies relation, while P2_MASK
9683 indicates the implied PR. */
9686 clear_qp_implies (valueT p1_mask
, valueT p2_mask
)
9691 while (i
< qp_implieslen
)
9693 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9694 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9697 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9698 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9699 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9706 /* Add the PRs specified to the list of implied relations. */
9709 add_qp_imply (int p1
, int p2
)
9715 /* p0 is not meaningful here. */
9716 if (p1
== 0 || p2
== 0)
9722 /* If it exists already, ignore it. */
9723 for (i
= 0; i
< qp_implieslen
; i
++)
9725 if (qp_implies
[i
].p1
== p1
9726 && qp_implies
[i
].p2
== p2
9727 && qp_implies
[i
].path
== md
.path
9728 && !qp_implies
[i
].p2_branched
)
9732 if (qp_implieslen
== qp_impliestotlen
)
9734 qp_impliestotlen
+= 20;
9735 qp_implies
= (struct qp_imply
*)
9736 xrealloc ((void *) qp_implies
,
9737 qp_impliestotlen
* sizeof (struct qp_imply
));
9740 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9741 qp_implies
[qp_implieslen
].p1
= p1
;
9742 qp_implies
[qp_implieslen
].p2
= p2
;
9743 qp_implies
[qp_implieslen
].path
= md
.path
;
9744 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9746 /* Add in the implied transitive relations; for everything that p2 implies,
9747 make p1 imply that, too; for everything that implies p1, make it imply p2
9749 for (i
= 0; i
< qp_implieslen
; i
++)
9751 if (qp_implies
[i
].p1
== p2
)
9752 add_qp_imply (p1
, qp_implies
[i
].p2
);
9753 if (qp_implies
[i
].p2
== p1
)
9754 add_qp_imply (qp_implies
[i
].p1
, p2
);
9756 /* Add in mutex relations implied by this implies relation; for each mutex
9757 relation containing p2, duplicate it and replace p2 with p1. */
9758 bit
= (valueT
) 1 << p1
;
9759 mask
= (valueT
) 1 << p2
;
9760 for (i
= 0; i
< qp_mutexeslen
; i
++)
9762 if (qp_mutexes
[i
].prmask
& mask
)
9763 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9767 /* Add the PRs specified in the mask to the mutex list; this means that only
9768 one of the PRs can be true at any time. PR0 should never be included in
9772 add_qp_mutex (valueT mask
)
9777 if (qp_mutexeslen
== qp_mutexestotlen
)
9779 qp_mutexestotlen
+= 20;
9780 qp_mutexes
= (struct qpmutex
*)
9781 xrealloc ((void *) qp_mutexes
,
9782 qp_mutexestotlen
* sizeof (struct qpmutex
));
9786 fprintf (stderr
, " Registering mutex on");
9787 print_prmask (mask
);
9788 fprintf (stderr
, "\n");
9790 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9791 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9795 has_suffix_p (const char *name
, const char *suffix
)
9797 size_t namelen
= strlen (name
);
9798 size_t sufflen
= strlen (suffix
);
9800 if (namelen
<= sufflen
)
9802 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9806 clear_register_values (void)
9810 fprintf (stderr
, " Clearing register values\n");
9811 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9812 gr_values
[i
].known
= 0;
9815 /* Keep track of register values/changes which affect DV tracking.
9817 optimization note: should add a flag to classes of insns where otherwise we
9818 have to examine a group of strings to identify them. */
9821 note_register_values (struct ia64_opcode
*idesc
)
9823 valueT qp_changemask
= 0;
9826 /* Invalidate values for registers being written to. */
9827 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9829 if (idesc
->operands
[i
] == IA64_OPND_R1
9830 || idesc
->operands
[i
] == IA64_OPND_R2
9831 || idesc
->operands
[i
] == IA64_OPND_R3
)
9833 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9834 if (regno
> 0 && regno
< NELEMS (gr_values
))
9835 gr_values
[regno
].known
= 0;
9837 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9839 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9840 if (regno
> 0 && regno
< 4)
9841 gr_values
[regno
].known
= 0;
9843 else if (idesc
->operands
[i
] == IA64_OPND_P1
9844 || idesc
->operands
[i
] == IA64_OPND_P2
)
9846 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9847 qp_changemask
|= (valueT
) 1 << regno
;
9849 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9851 if (idesc
->operands
[2] & (valueT
) 0x10000)
9852 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9854 qp_changemask
= idesc
->operands
[2];
9857 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9859 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9860 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9862 qp_changemask
= idesc
->operands
[1];
9863 qp_changemask
&= ~(valueT
) 0xFFFF;
9868 /* Always clear qp branch flags on any PR change. */
9869 /* FIXME there may be exceptions for certain compares. */
9870 clear_qp_branch_flag (qp_changemask
);
9872 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9873 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9875 qp_changemask
|= ~(valueT
) 0xFFFF;
9876 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9878 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9879 gr_values
[i
].known
= 0;
9881 clear_qp_mutex (qp_changemask
);
9882 clear_qp_implies (qp_changemask
, qp_changemask
);
9884 /* After a call, all register values are undefined, except those marked
9886 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9887 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9889 /* FIXME keep GR values which are marked as "safe_across_calls" */
9890 clear_register_values ();
9891 clear_qp_mutex (~qp_safe_across_calls
);
9892 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9893 clear_qp_branch_flag (~qp_safe_across_calls
);
9895 else if (is_interruption_or_rfi (idesc
)
9896 || is_taken_branch (idesc
))
9898 clear_register_values ();
9899 clear_qp_mutex (~(valueT
) 0);
9900 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9902 /* Look for mutex and implies relations. */
9903 else if ((idesc
->operands
[0] == IA64_OPND_P1
9904 || idesc
->operands
[0] == IA64_OPND_P2
)
9905 && (idesc
->operands
[1] == IA64_OPND_P1
9906 || idesc
->operands
[1] == IA64_OPND_P2
))
9908 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9909 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9910 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9911 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9913 /* If both PRs are PR0, we can't really do anything. */
9914 if (p1
== 0 && p2
== 0)
9917 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9919 /* In general, clear mutexes and implies which include P1 or P2,
9920 with the following exceptions. */
9921 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9922 || has_suffix_p (idesc
->name
, ".and.orcm"))
9924 clear_qp_implies (p2mask
, p1mask
);
9926 else if (has_suffix_p (idesc
->name
, ".andcm")
9927 || has_suffix_p (idesc
->name
, ".and"))
9929 clear_qp_implies (0, p1mask
| p2mask
);
9931 else if (has_suffix_p (idesc
->name
, ".orcm")
9932 || has_suffix_p (idesc
->name
, ".or"))
9934 clear_qp_mutex (p1mask
| p2mask
);
9935 clear_qp_implies (p1mask
| p2mask
, 0);
9941 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9943 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9944 if (p1
== 0 || p2
== 0)
9945 clear_qp_mutex (p1mask
| p2mask
);
9947 added
= update_qp_mutex (p1mask
| p2mask
);
9949 if (CURR_SLOT
.qp_regno
== 0
9950 || has_suffix_p (idesc
->name
, ".unc"))
9952 if (added
== 0 && p1
&& p2
)
9953 add_qp_mutex (p1mask
| p2mask
);
9954 if (CURR_SLOT
.qp_regno
!= 0)
9957 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9959 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9964 /* Look for mov imm insns into GRs. */
9965 else if (idesc
->operands
[0] == IA64_OPND_R1
9966 && (idesc
->operands
[1] == IA64_OPND_IMM22
9967 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9968 && CURR_SLOT
.opnd
[1].X_op
== O_constant
9969 && (strcmp (idesc
->name
, "mov") == 0
9970 || strcmp (idesc
->name
, "movl") == 0))
9972 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9973 if (regno
> 0 && regno
< NELEMS (gr_values
))
9975 gr_values
[regno
].known
= 1;
9976 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9977 gr_values
[regno
].path
= md
.path
;
9980 fprintf (stderr
, " Know gr%d = ", regno
);
9981 fprintf_vma (stderr
, gr_values
[regno
].value
);
9982 fputs ("\n", stderr
);
9986 /* Look for dep.z imm insns. */
9987 else if (idesc
->operands
[0] == IA64_OPND_R1
9988 && idesc
->operands
[1] == IA64_OPND_IMM8
9989 && strcmp (idesc
->name
, "dep.z") == 0)
9991 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9992 if (regno
> 0 && regno
< NELEMS (gr_values
))
9994 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
9996 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
9997 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
9998 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
9999 gr_values
[regno
].known
= 1;
10000 gr_values
[regno
].value
= value
;
10001 gr_values
[regno
].path
= md
.path
;
10004 fprintf (stderr
, " Know gr%d = ", regno
);
10005 fprintf_vma (stderr
, gr_values
[regno
].value
);
10006 fputs ("\n", stderr
);
10012 clear_qp_mutex (qp_changemask
);
10013 clear_qp_implies (qp_changemask
, qp_changemask
);
10017 /* Return whether the given predicate registers are currently mutex. */
10020 qp_mutex (int p1
, int p2
, int path
)
10027 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
10028 for (i
= 0; i
< qp_mutexeslen
; i
++)
10030 if (qp_mutexes
[i
].path
>= path
10031 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
10038 /* Return whether the given resource is in the given insn's list of chks
10039 Return 1 if the conflict is absolutely determined, 2 if it's a potential
10043 resources_match (struct rsrc
*rs
,
10044 struct ia64_opcode
*idesc
,
10049 struct rsrc specs
[MAX_SPECS
];
10052 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10053 we don't need to check. One exception is note 11, which indicates that
10054 target predicates are written regardless of PR[qp]. */
10055 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
10059 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
10060 while (count
-- > 0)
10062 /* UNAT checking is a bit more specific than other resources */
10063 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
10064 && specs
[count
].mem_offset
.hint
10065 && rs
->mem_offset
.hint
)
10067 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
10069 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
10070 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
10077 /* Skip apparent PR write conflicts where both writes are an AND or both
10078 writes are an OR. */
10079 if (rs
->dependency
->specifier
== IA64_RS_PR
10080 || rs
->dependency
->specifier
== IA64_RS_PRr
10081 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10083 if (specs
[count
].cmp_type
!= CMP_NONE
10084 && specs
[count
].cmp_type
== rs
->cmp_type
)
10087 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10088 dv_mode
[rs
->dependency
->mode
],
10089 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10090 specs
[count
].index
: 63);
10095 " %s on parallel compare conflict %s vs %s on PR%d\n",
10096 dv_mode
[rs
->dependency
->mode
],
10097 dv_cmp_type
[rs
->cmp_type
],
10098 dv_cmp_type
[specs
[count
].cmp_type
],
10099 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10100 specs
[count
].index
: 63);
10104 /* If either resource is not specific, conservatively assume a conflict
10106 if (!specs
[count
].specific
|| !rs
->specific
)
10108 else if (specs
[count
].index
== rs
->index
)
10115 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10116 insert a stop to create the break. Update all resource dependencies
10117 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10118 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10119 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10123 insn_group_break (int insert_stop
, int qp_regno
, int save_current
)
10127 if (insert_stop
&& md
.num_slots_in_use
> 0)
10128 PREV_SLOT
.end_of_insn_group
= 1;
10132 fprintf (stderr
, " Insn group break%s",
10133 (insert_stop
? " (w/stop)" : ""));
10135 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10136 fprintf (stderr
, "\n");
10140 while (i
< regdepslen
)
10142 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10145 && regdeps
[i
].qp_regno
!= qp_regno
)
10152 && CURR_SLOT
.src_file
== regdeps
[i
].file
10153 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10159 /* clear dependencies which are automatically cleared by a stop, or
10160 those that have reached the appropriate state of insn serialization */
10161 if (dep
->semantics
== IA64_DVS_IMPLIED
10162 || dep
->semantics
== IA64_DVS_IMPLIEDF
10163 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10165 print_dependency ("Removing", i
);
10166 regdeps
[i
] = regdeps
[--regdepslen
];
10170 if (dep
->semantics
== IA64_DVS_DATA
10171 || dep
->semantics
== IA64_DVS_INSTR
10172 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10174 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10175 regdeps
[i
].insn_srlz
= STATE_STOP
;
10176 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10177 regdeps
[i
].data_srlz
= STATE_STOP
;
10184 /* Add the given resource usage spec to the list of active dependencies. */
10187 mark_resource (struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
,
10188 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
,
10193 if (regdepslen
== regdepstotlen
)
10195 regdepstotlen
+= 20;
10196 regdeps
= (struct rsrc
*)
10197 xrealloc ((void *) regdeps
,
10198 regdepstotlen
* sizeof (struct rsrc
));
10201 regdeps
[regdepslen
] = *spec
;
10202 regdeps
[regdepslen
].depind
= depind
;
10203 regdeps
[regdepslen
].path
= path
;
10204 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10205 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10207 print_dependency ("Adding", regdepslen
);
10213 print_dependency (const char *action
, int depind
)
10217 fprintf (stderr
, " %s %s '%s'",
10218 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10219 (regdeps
[depind
].dependency
)->name
);
10220 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10221 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10222 if (regdeps
[depind
].mem_offset
.hint
)
10224 fputs (" ", stderr
);
10225 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10226 fputs ("+", stderr
);
10227 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10229 fprintf (stderr
, "\n");
10234 instruction_serialization (void)
10238 fprintf (stderr
, " Instruction serialization\n");
10239 for (i
= 0; i
< regdepslen
; i
++)
10240 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10241 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10245 data_serialization (void)
10249 fprintf (stderr
, " Data serialization\n");
10250 while (i
< regdepslen
)
10252 if (regdeps
[i
].data_srlz
== STATE_STOP
10253 /* Note: as of 991210, all "other" dependencies are cleared by a
10254 data serialization. This might change with new tables */
10255 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10257 print_dependency ("Removing", i
);
10258 regdeps
[i
] = regdeps
[--regdepslen
];
10265 /* Insert stops and serializations as needed to avoid DVs. */
10268 remove_marked_resource (struct rsrc
*rs
)
10270 switch (rs
->dependency
->semantics
)
10272 case IA64_DVS_SPECIFIC
:
10274 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10275 /* ...fall through... */
10276 case IA64_DVS_INSTR
:
10278 fprintf (stderr
, "Inserting instr serialization\n");
10279 if (rs
->insn_srlz
< STATE_STOP
)
10280 insn_group_break (1, 0, 0);
10281 if (rs
->insn_srlz
< STATE_SRLZ
)
10283 struct slot oldslot
= CURR_SLOT
;
10284 /* Manually jam a srlz.i insn into the stream */
10285 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10286 CURR_SLOT
.user_template
= -1;
10287 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10288 instruction_serialization ();
10289 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10290 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10291 emit_one_bundle ();
10292 CURR_SLOT
= oldslot
;
10294 insn_group_break (1, 0, 0);
10296 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10297 "other" types of DV are eliminated
10298 by a data serialization */
10299 case IA64_DVS_DATA
:
10301 fprintf (stderr
, "Inserting data serialization\n");
10302 if (rs
->data_srlz
< STATE_STOP
)
10303 insn_group_break (1, 0, 0);
10305 struct slot oldslot
= CURR_SLOT
;
10306 /* Manually jam a srlz.d insn into the stream */
10307 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10308 CURR_SLOT
.user_template
= -1;
10309 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10310 data_serialization ();
10311 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10312 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10313 emit_one_bundle ();
10314 CURR_SLOT
= oldslot
;
10317 case IA64_DVS_IMPLIED
:
10318 case IA64_DVS_IMPLIEDF
:
10320 fprintf (stderr
, "Inserting stop\n");
10321 insn_group_break (1, 0, 0);
10328 /* Check the resources used by the given opcode against the current dependency
10331 The check is run once for each execution path encountered. In this case,
10332 a unique execution path is the sequence of instructions following a code
10333 entry point, e.g. the following has three execution paths, one starting
10334 at L0, one at L1, and one at L2.
10343 check_dependencies (struct ia64_opcode
*idesc
)
10345 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10349 /* Note that the number of marked resources may change within the
10350 loop if in auto mode. */
10352 while (i
< regdepslen
)
10354 struct rsrc
*rs
= ®deps
[i
];
10355 const struct ia64_dependency
*dep
= rs
->dependency
;
10358 int start_over
= 0;
10360 if (dep
->semantics
== IA64_DVS_NONE
10361 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10367 note
= NOTE (opdeps
->chks
[chkind
]);
10369 /* Check this resource against each execution path seen thus far. */
10370 for (path
= 0; path
<= md
.path
; path
++)
10374 /* If the dependency wasn't on the path being checked, ignore it. */
10375 if (rs
->path
< path
)
10378 /* If the QP for this insn implies a QP which has branched, don't
10379 bother checking. Ed. NOTE: I don't think this check is terribly
10380 useful; what's the point of generating code which will only be
10381 reached if its QP is zero?
10382 This code was specifically inserted to handle the following code,
10383 based on notes from Intel's DV checking code, where p1 implies p2.
10389 if (CURR_SLOT
.qp_regno
!= 0)
10393 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10395 if (qp_implies
[implies
].path
>= path
10396 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10397 && qp_implies
[implies
].p2_branched
)
10407 if ((matchtype
= resources_match (rs
, idesc
, note
,
10408 CURR_SLOT
.qp_regno
, path
)) != 0)
10411 char pathmsg
[256] = "";
10412 char indexmsg
[256] = "";
10413 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10416 snprintf (pathmsg
, sizeof (pathmsg
),
10417 " when entry is at label '%s'",
10418 md
.entry_labels
[path
- 1]);
10419 if (matchtype
== 1 && rs
->index
>= 0)
10420 snprintf (indexmsg
, sizeof (indexmsg
),
10421 ", specific resource number is %d",
10423 snprintf (msg
, sizeof (msg
),
10424 "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10426 (certain
? "violates" : "may violate"),
10427 dv_mode
[dep
->mode
], dep
->name
,
10428 dv_sem
[dep
->semantics
],
10429 pathmsg
, indexmsg
);
10431 if (md
.explicit_mode
)
10433 as_warn ("%s", msg
);
10434 if (path
< md
.path
)
10435 as_warn (_("Only the first path encountering the conflict is reported"));
10436 as_warn_where (rs
->file
, rs
->line
,
10437 _("This is the location of the conflicting usage"));
10438 /* Don't bother checking other paths, to avoid duplicating
10439 the same warning */
10445 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10447 remove_marked_resource (rs
);
10449 /* since the set of dependencies has changed, start over */
10450 /* FIXME -- since we're removing dvs as we go, we
10451 probably don't really need to start over... */
10464 /* Register new dependencies based on the given opcode. */
10467 mark_resources (struct ia64_opcode
*idesc
)
10470 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10471 int add_only_qp_reads
= 0;
10473 /* A conditional branch only uses its resources if it is taken; if it is
10474 taken, we stop following that path. The other branch types effectively
10475 *always* write their resources. If it's not taken, register only QP
10477 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10479 add_only_qp_reads
= 1;
10483 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10485 for (i
= 0; i
< opdeps
->nregs
; i
++)
10487 const struct ia64_dependency
*dep
;
10488 struct rsrc specs
[MAX_SPECS
];
10493 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10494 note
= NOTE (opdeps
->regs
[i
]);
10496 if (add_only_qp_reads
10497 && !(dep
->mode
== IA64_DV_WAR
10498 && (dep
->specifier
== IA64_RS_PR
10499 || dep
->specifier
== IA64_RS_PRr
10500 || dep
->specifier
== IA64_RS_PR63
)))
10503 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10505 while (count
-- > 0)
10507 mark_resource (idesc
, dep
, &specs
[count
],
10508 DEP (opdeps
->regs
[i
]), md
.path
);
10511 /* The execution path may affect register values, which may in turn
10512 affect which indirect-access resources are accessed. */
10513 switch (dep
->specifier
)
10517 case IA64_RS_CPUID
:
10525 for (path
= 0; path
< md
.path
; path
++)
10527 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10528 while (count
-- > 0)
10529 mark_resource (idesc
, dep
, &specs
[count
],
10530 DEP (opdeps
->regs
[i
]), path
);
10537 /* Remove dependencies when they no longer apply. */
10540 update_dependencies (struct ia64_opcode
*idesc
)
10544 if (strcmp (idesc
->name
, "srlz.i") == 0)
10546 instruction_serialization ();
10548 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10550 data_serialization ();
10552 else if (is_interruption_or_rfi (idesc
)
10553 || is_taken_branch (idesc
))
10555 /* Although technically the taken branch doesn't clear dependencies
10556 which require a srlz.[id], we don't follow the branch; the next
10557 instruction is assumed to start with a clean slate. */
10561 else if (is_conditional_branch (idesc
)
10562 && CURR_SLOT
.qp_regno
!= 0)
10564 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10566 for (i
= 0; i
< qp_implieslen
; i
++)
10568 /* If the conditional branch's predicate is implied by the predicate
10569 in an existing dependency, remove that dependency. */
10570 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10573 /* Note that this implied predicate takes a branch so that if
10574 a later insn generates a DV but its predicate implies this
10575 one, we can avoid the false DV warning. */
10576 qp_implies
[i
].p2_branched
= 1;
10577 while (depind
< regdepslen
)
10579 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10581 print_dependency ("Removing", depind
);
10582 regdeps
[depind
] = regdeps
[--regdepslen
];
10589 /* Any marked resources which have this same predicate should be
10590 cleared, provided that the QP hasn't been modified between the
10591 marking instruction and the branch. */
10594 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10599 while (i
< regdepslen
)
10601 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10602 && regdeps
[i
].link_to_qp_branch
10603 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10604 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10606 /* Treat like a taken branch */
10607 print_dependency ("Removing", i
);
10608 regdeps
[i
] = regdeps
[--regdepslen
];
10617 /* Examine the current instruction for dependency violations. */
10620 check_dv (struct ia64_opcode
*idesc
)
10624 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10625 idesc
->name
, CURR_SLOT
.src_line
,
10626 idesc
->dependencies
->nchks
,
10627 idesc
->dependencies
->nregs
);
10630 /* Look through the list of currently marked resources; if the current
10631 instruction has the dependency in its chks list which uses that resource,
10632 check against the specific resources used. */
10633 check_dependencies (idesc
);
10635 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10636 then add them to the list of marked resources. */
10637 mark_resources (idesc
);
10639 /* There are several types of dependency semantics, and each has its own
10640 requirements for being cleared
10642 Instruction serialization (insns separated by interruption, rfi, or
10643 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10645 Data serialization (instruction serialization, or writer + srlz.d +
10646 reader, where writer and srlz.d are in separate groups) clears
10647 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10648 always be the case).
10650 Instruction group break (groups separated by stop, taken branch,
10651 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10653 update_dependencies (idesc
);
10655 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10656 warning. Keep track of as many as possible that are useful. */
10657 note_register_values (idesc
);
10659 /* We don't need or want this anymore. */
10660 md
.mem_offset
.hint
= 0;
10665 /* Translate one line of assembly. Pseudo ops and labels do not show
10668 md_assemble (char *str
)
10670 char *saved_input_line_pointer
, *temp
;
10671 const char *mnemonic
;
10672 const struct pseudo_opcode
*pdesc
;
10673 struct ia64_opcode
*idesc
;
10674 unsigned char qp_regno
;
10675 unsigned int flags
;
10678 saved_input_line_pointer
= input_line_pointer
;
10679 input_line_pointer
= str
;
10681 /* extract the opcode (mnemonic): */
10683 ch
= get_symbol_name (&temp
);
10685 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10688 (void) restore_line_pointer (ch
);
10689 (*pdesc
->handler
) (pdesc
->arg
);
10693 /* Find the instruction descriptor matching the arguments. */
10695 idesc
= ia64_find_opcode (mnemonic
);
10696 (void) restore_line_pointer (ch
);
10699 as_bad (_("Unknown opcode `%s'"), mnemonic
);
10703 idesc
= parse_operands (idesc
);
10707 /* Handle the dynamic ops we can handle now: */
10708 if (idesc
->type
== IA64_TYPE_DYN
)
10710 if (strcmp (idesc
->name
, "add") == 0)
10712 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10713 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10717 ia64_free_opcode (idesc
);
10718 idesc
= ia64_find_opcode (mnemonic
);
10720 else if (strcmp (idesc
->name
, "mov") == 0)
10722 enum ia64_opnd opnd1
, opnd2
;
10725 opnd1
= idesc
->operands
[0];
10726 opnd2
= idesc
->operands
[1];
10727 if (opnd1
== IA64_OPND_AR3
)
10729 else if (opnd2
== IA64_OPND_AR3
)
10733 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10735 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10736 mnemonic
= "mov.i";
10737 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10738 mnemonic
= "mov.m";
10746 ia64_free_opcode (idesc
);
10747 idesc
= ia64_find_opcode (mnemonic
);
10748 while (idesc
!= NULL
10749 && (idesc
->operands
[0] != opnd1
10750 || idesc
->operands
[1] != opnd2
))
10751 idesc
= get_next_opcode (idesc
);
10755 else if (strcmp (idesc
->name
, "mov.i") == 0
10756 || strcmp (idesc
->name
, "mov.m") == 0)
10758 enum ia64_opnd opnd1
, opnd2
;
10761 opnd1
= idesc
->operands
[0];
10762 opnd2
= idesc
->operands
[1];
10763 if (opnd1
== IA64_OPND_AR3
)
10765 else if (opnd2
== IA64_OPND_AR3
)
10769 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10772 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10774 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10776 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10777 as_bad (_("AR %d can only be accessed by %c-unit"),
10778 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10782 else if (strcmp (idesc
->name
, "hint.b") == 0)
10788 case hint_b_warning
:
10789 as_warn (_("hint.b may be treated as nop"));
10792 as_bad (_("hint.b shouldn't be used"));
10798 if (md
.qp
.X_op
== O_register
)
10800 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10801 md
.qp
.X_op
= O_absent
;
10804 flags
= idesc
->flags
;
10806 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10808 /* The alignment frag has to end with a stop bit only if the
10809 next instruction after the alignment directive has to be
10810 the first instruction in an instruction group. */
10813 while (align_frag
->fr_type
!= rs_align_code
)
10815 align_frag
= align_frag
->fr_next
;
10819 /* align_frag can be NULL if there are directives in
10821 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10822 align_frag
->tc_frag_data
= 1;
10825 insn_group_break (1, 0, 0);
10829 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10831 as_bad (_("`%s' cannot be predicated"), idesc
->name
);
10835 /* Build the instruction. */
10836 CURR_SLOT
.qp_regno
= qp_regno
;
10837 CURR_SLOT
.idesc
= idesc
;
10838 CURR_SLOT
.src_file
= as_where (&CURR_SLOT
.src_line
);
10839 dwarf2_where (&CURR_SLOT
.debug_line
);
10840 dwarf2_consume_line_info ();
10842 /* Add unwind entries, if there are any. */
10843 if (unwind
.current_entry
)
10845 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10846 unwind
.current_entry
= NULL
;
10848 if (unwind
.pending_saves
)
10850 if (unwind
.pending_saves
->next
)
10852 /* Attach the next pending save to the next slot so that its
10853 slot number will get set correctly. */
10854 add_unwind_entry (unwind
.pending_saves
->next
, NOT_A_CHAR
);
10855 unwind
.pending_saves
= &unwind
.pending_saves
->next
->r
.record
.p
;
10858 unwind
.pending_saves
= NULL
;
10860 if (unwind
.proc_pending
.sym
&& S_IS_DEFINED (unwind
.proc_pending
.sym
))
10863 /* Check for dependency violations. */
10867 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10868 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10869 emit_one_bundle ();
10871 if ((flags
& IA64_OPCODE_LAST
) != 0)
10872 insn_group_break (1, 0, 0);
10874 md
.last_text_seg
= now_seg
;
10877 input_line_pointer
= saved_input_line_pointer
;
10880 /* Called when symbol NAME cannot be found in the symbol table.
10881 Should be used for dynamic valued symbols only. */
10884 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
10889 /* Called for any expression that can not be recognized. When the
10890 function is called, `input_line_pointer' will point to the start of
10894 md_operand (expressionS
*e
)
10896 switch (*input_line_pointer
)
10899 ++input_line_pointer
;
10900 expression_and_evaluate (e
);
10901 if (*input_line_pointer
!= ']')
10903 as_bad (_("Closing bracket missing"));
10908 if (e
->X_op
!= O_register
10909 || e
->X_add_number
< REG_GR
10910 || e
->X_add_number
> REG_GR
+ 127)
10912 as_bad (_("Index must be a general register"));
10913 e
->X_add_number
= REG_GR
;
10916 ++input_line_pointer
;
10927 ignore_rest_of_line ();
10930 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10931 a section symbol plus some offset. For relocs involving @fptr(),
10932 directives we don't want such adjustments since we need to have the
10933 original symbol's name in the reloc. */
10935 ia64_fix_adjustable (fixS
*fix
)
10937 /* Prevent all adjustments to global symbols */
10938 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10941 switch (fix
->fx_r_type
)
10943 case BFD_RELOC_IA64_FPTR64I
:
10944 case BFD_RELOC_IA64_FPTR32MSB
:
10945 case BFD_RELOC_IA64_FPTR32LSB
:
10946 case BFD_RELOC_IA64_FPTR64MSB
:
10947 case BFD_RELOC_IA64_FPTR64LSB
:
10948 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10949 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10959 ia64_force_relocation (fixS
*fix
)
10961 switch (fix
->fx_r_type
)
10963 case BFD_RELOC_IA64_FPTR64I
:
10964 case BFD_RELOC_IA64_FPTR32MSB
:
10965 case BFD_RELOC_IA64_FPTR32LSB
:
10966 case BFD_RELOC_IA64_FPTR64MSB
:
10967 case BFD_RELOC_IA64_FPTR64LSB
:
10969 case BFD_RELOC_IA64_LTOFF22
:
10970 case BFD_RELOC_IA64_LTOFF64I
:
10971 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10972 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10973 case BFD_RELOC_IA64_PLTOFF22
:
10974 case BFD_RELOC_IA64_PLTOFF64I
:
10975 case BFD_RELOC_IA64_PLTOFF64MSB
:
10976 case BFD_RELOC_IA64_PLTOFF64LSB
:
10978 case BFD_RELOC_IA64_LTOFF22X
:
10979 case BFD_RELOC_IA64_LDXMOV
:
10986 return generic_force_reloc (fix
);
10989 /* Decide from what point a pc-relative relocation is relative to,
10990 relative to the pc-relative fixup. Er, relatively speaking. */
10992 ia64_pcrel_from_section (fixS
*fix
, segT sec
)
10994 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10996 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
11003 /* Used to emit section-relative relocs for the dwarf2 debug data. */
11005 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
11009 exp
.X_op
= O_pseudo_fixup
;
11010 exp
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
11011 exp
.X_add_number
= 0;
11012 exp
.X_add_symbol
= symbol
;
11013 emit_expr (&exp
, size
);
11016 /* This is called whenever some data item (not an instruction) needs a
11017 fixup. We pick the right reloc code depending on the byteorder
11018 currently in effect. */
11020 ia64_cons_fix_new (fragS
*f
, int where
, int nbytes
, expressionS
*exp
,
11021 bfd_reloc_code_real_type code
)
11027 /* There are no reloc for 8 and 16 bit quantities, but we allow
11028 them here since they will work fine as long as the expression
11029 is fully defined at the end of the pass over the source file. */
11030 case 1: code
= BFD_RELOC_8
; break;
11031 case 2: code
= BFD_RELOC_16
; break;
11033 if (target_big_endian
)
11034 code
= BFD_RELOC_IA64_DIR32MSB
;
11036 code
= BFD_RELOC_IA64_DIR32LSB
;
11040 /* In 32-bit mode, data8 could mean function descriptors too. */
11041 if (exp
->X_op
== O_pseudo_fixup
11042 && exp
->X_op_symbol
11043 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
11044 && !(md
.flags
& EF_IA_64_ABI64
))
11046 if (target_big_endian
)
11047 code
= BFD_RELOC_IA64_IPLTMSB
;
11049 code
= BFD_RELOC_IA64_IPLTLSB
;
11050 exp
->X_op
= O_symbol
;
11055 if (target_big_endian
)
11056 code
= BFD_RELOC_IA64_DIR64MSB
;
11058 code
= BFD_RELOC_IA64_DIR64LSB
;
11063 if (exp
->X_op
== O_pseudo_fixup
11064 && exp
->X_op_symbol
11065 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
11067 if (target_big_endian
)
11068 code
= BFD_RELOC_IA64_IPLTMSB
;
11070 code
= BFD_RELOC_IA64_IPLTLSB
;
11071 exp
->X_op
= O_symbol
;
11077 as_bad (_("Unsupported fixup size %d"), nbytes
);
11078 ignore_rest_of_line ();
11082 if (exp
->X_op
== O_pseudo_fixup
)
11084 exp
->X_op
= O_symbol
;
11085 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11086 /* ??? If code unchanged, unsupported. */
11089 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11090 /* We need to store the byte order in effect in case we're going
11091 to fix an 8 or 16 bit relocation (for which there no real
11092 relocs available). See md_apply_fix(). */
11093 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11096 /* Return the actual relocation we wish to associate with the pseudo
11097 reloc described by SYM and R_TYPE. SYM should be one of the
11098 symbols in the pseudo_func array, or NULL. */
11100 static bfd_reloc_code_real_type
11101 ia64_gen_real_reloc_type (struct symbol
*sym
, bfd_reloc_code_real_type r_type
)
11103 bfd_reloc_code_real_type newr
= 0;
11104 const char *type
= NULL
, *suffix
= "";
11111 switch (S_GET_VALUE (sym
))
11113 case FUNC_FPTR_RELATIVE
:
11116 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_FPTR64I
; break;
11117 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_FPTR32MSB
; break;
11118 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_FPTR32LSB
; break;
11119 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_FPTR64MSB
; break;
11120 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_FPTR64LSB
; break;
11121 default: type
= "FPTR"; break;
11125 case FUNC_GP_RELATIVE
:
11128 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_GPREL22
; break;
11129 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_GPREL64I
; break;
11130 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_GPREL32MSB
; break;
11131 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_GPREL32LSB
; break;
11132 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_GPREL64MSB
; break;
11133 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_GPREL64LSB
; break;
11134 default: type
= "GPREL"; break;
11138 case FUNC_LT_RELATIVE
:
11141 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22
; break;
11142 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_LTOFF64I
; break;
11143 default: type
= "LTOFF"; break;
11147 case FUNC_LT_RELATIVE_X
:
11150 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22X
; break;
11151 default: type
= "LTOFF"; suffix
= "X"; break;
11155 case FUNC_PC_RELATIVE
:
11158 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PCREL22
; break;
11159 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PCREL64I
; break;
11160 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_PCREL32MSB
; break;
11161 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_PCREL32LSB
; break;
11162 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PCREL64MSB
; break;
11163 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PCREL64LSB
; break;
11164 default: type
= "PCREL"; break;
11168 case FUNC_PLT_RELATIVE
:
11171 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PLTOFF22
; break;
11172 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PLTOFF64I
; break;
11173 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PLTOFF64MSB
;break;
11174 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PLTOFF64LSB
;break;
11175 default: type
= "PLTOFF"; break;
11179 case FUNC_SEC_RELATIVE
:
11182 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SECREL32MSB
;break;
11183 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SECREL32LSB
;break;
11184 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SECREL64MSB
;break;
11185 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SECREL64LSB
;break;
11186 default: type
= "SECREL"; break;
11190 case FUNC_SEG_RELATIVE
:
11193 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SEGREL32MSB
;break;
11194 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SEGREL32LSB
;break;
11195 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SEGREL64MSB
;break;
11196 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SEGREL64LSB
;break;
11197 default: type
= "SEGREL"; break;
11201 case FUNC_LTV_RELATIVE
:
11204 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_LTV32MSB
; break;
11205 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_LTV32LSB
; break;
11206 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_LTV64MSB
; break;
11207 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_LTV64LSB
; break;
11208 default: type
= "LTV"; break;
11212 case FUNC_LT_FPTR_RELATIVE
:
11215 case BFD_RELOC_IA64_IMM22
:
11216 newr
= BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11217 case BFD_RELOC_IA64_IMM64
:
11218 newr
= BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11219 case BFD_RELOC_IA64_DIR32MSB
:
11220 newr
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11221 case BFD_RELOC_IA64_DIR32LSB
:
11222 newr
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11223 case BFD_RELOC_IA64_DIR64MSB
:
11224 newr
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11225 case BFD_RELOC_IA64_DIR64LSB
:
11226 newr
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11228 type
= "LTOFF_FPTR"; break;
11232 case FUNC_TP_RELATIVE
:
11235 case BFD_RELOC_IA64_IMM14
: newr
= BFD_RELOC_IA64_TPREL14
; break;
11236 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_TPREL22
; break;
11237 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_TPREL64I
; break;
11238 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_TPREL64MSB
; break;
11239 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_TPREL64LSB
; break;
11240 default: type
= "TPREL"; break;
11244 case FUNC_LT_TP_RELATIVE
:
11247 case BFD_RELOC_IA64_IMM22
:
11248 newr
= BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11250 type
= "LTOFF_TPREL"; break;
11254 case FUNC_DTP_MODULE
:
11257 case BFD_RELOC_IA64_DIR64MSB
:
11258 newr
= BFD_RELOC_IA64_DTPMOD64MSB
; break;
11259 case BFD_RELOC_IA64_DIR64LSB
:
11260 newr
= BFD_RELOC_IA64_DTPMOD64LSB
; break;
11262 type
= "DTPMOD"; break;
11266 case FUNC_LT_DTP_MODULE
:
11269 case BFD_RELOC_IA64_IMM22
:
11270 newr
= BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11272 type
= "LTOFF_DTPMOD"; break;
11276 case FUNC_DTP_RELATIVE
:
11279 case BFD_RELOC_IA64_DIR32MSB
:
11280 newr
= BFD_RELOC_IA64_DTPREL32MSB
; break;
11281 case BFD_RELOC_IA64_DIR32LSB
:
11282 newr
= BFD_RELOC_IA64_DTPREL32LSB
; break;
11283 case BFD_RELOC_IA64_DIR64MSB
:
11284 newr
= BFD_RELOC_IA64_DTPREL64MSB
; break;
11285 case BFD_RELOC_IA64_DIR64LSB
:
11286 newr
= BFD_RELOC_IA64_DTPREL64LSB
; break;
11287 case BFD_RELOC_IA64_IMM14
:
11288 newr
= BFD_RELOC_IA64_DTPREL14
; break;
11289 case BFD_RELOC_IA64_IMM22
:
11290 newr
= BFD_RELOC_IA64_DTPREL22
; break;
11291 case BFD_RELOC_IA64_IMM64
:
11292 newr
= BFD_RELOC_IA64_DTPREL64I
; break;
11294 type
= "DTPREL"; break;
11298 case FUNC_LT_DTP_RELATIVE
:
11301 case BFD_RELOC_IA64_IMM22
:
11302 newr
= BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11304 type
= "LTOFF_DTPREL"; break;
11308 case FUNC_IPLT_RELOC
:
11311 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11312 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11313 default: type
= "IPLT"; break;
11318 case FUNC_SLOTCOUNT_RELOC
:
11319 return DUMMY_RELOC_IA64_SLOTCOUNT
;
11336 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11337 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11338 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11339 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11340 case BFD_RELOC_UNUSED
: width
= 13; break;
11341 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11342 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11343 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11347 /* This should be an error, but since previously there wasn't any
11348 diagnostic here, don't make it fail because of this for now. */
11349 as_warn (_("Cannot express %s%d%s relocation"), type
, width
, suffix
);
11354 /* Here is where generate the appropriate reloc for pseudo relocation
11357 ia64_validate_fix (fixS
*fix
)
11359 switch (fix
->fx_r_type
)
11361 case BFD_RELOC_IA64_FPTR64I
:
11362 case BFD_RELOC_IA64_FPTR32MSB
:
11363 case BFD_RELOC_IA64_FPTR64LSB
:
11364 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11365 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11366 if (fix
->fx_offset
!= 0)
11367 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11368 _("No addend allowed in @fptr() relocation"));
11376 fix_insn (fixS
*fix
, const struct ia64_operand
*odesc
, valueT value
)
11378 bfd_vma insn
[3], t0
, t1
, control_bits
;
11383 slot
= fix
->fx_where
& 0x3;
11384 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11386 /* Bundles are always in little-endian byte order */
11387 t0
= bfd_getl64 (fixpos
);
11388 t1
= bfd_getl64 (fixpos
+ 8);
11389 control_bits
= t0
& 0x1f;
11390 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11391 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11392 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11395 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11397 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11398 insn
[2] |= (((value
& 0x7f) << 13)
11399 | (((value
>> 7) & 0x1ff) << 27)
11400 | (((value
>> 16) & 0x1f) << 22)
11401 | (((value
>> 21) & 0x1) << 21)
11402 | (((value
>> 63) & 0x1) << 36));
11404 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11406 if (value
& ~0x3fffffffffffffffULL
)
11407 err
= _("integer operand out of range");
11408 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11409 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11411 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11414 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11415 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11416 | (((value
>> 0) & 0xfffff) << 13));
11419 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11422 as_bad_where (fix
->fx_file
, fix
->fx_line
, "%s", err
);
11424 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11425 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11426 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11427 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11430 /* Attempt to simplify or even eliminate a fixup. The return value is
11431 ignored; perhaps it was once meaningful, but now it is historical.
11432 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11434 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11438 md_apply_fix (fixS
*fix
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
11441 valueT value
= *valP
;
11443 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11447 switch (fix
->fx_r_type
)
11449 case BFD_RELOC_IA64_PCREL21B
: break;
11450 case BFD_RELOC_IA64_PCREL21BI
: break;
11451 case BFD_RELOC_IA64_PCREL21F
: break;
11452 case BFD_RELOC_IA64_PCREL21M
: break;
11453 case BFD_RELOC_IA64_PCREL60B
: break;
11454 case BFD_RELOC_IA64_PCREL22
: break;
11455 case BFD_RELOC_IA64_PCREL64I
: break;
11456 case BFD_RELOC_IA64_PCREL32MSB
: break;
11457 case BFD_RELOC_IA64_PCREL32LSB
: break;
11458 case BFD_RELOC_IA64_PCREL64MSB
: break;
11459 case BFD_RELOC_IA64_PCREL64LSB
: break;
11461 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11468 switch ((unsigned) fix
->fx_r_type
)
11470 case BFD_RELOC_UNUSED
:
11471 /* This must be a TAG13 or TAG13b operand. There are no external
11472 relocs defined for them, so we must give an error. */
11473 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11474 _("%s must have a constant value"),
11475 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11479 case BFD_RELOC_IA64_TPREL14
:
11480 case BFD_RELOC_IA64_TPREL22
:
11481 case BFD_RELOC_IA64_TPREL64I
:
11482 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11483 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11484 case BFD_RELOC_IA64_DTPREL14
:
11485 case BFD_RELOC_IA64_DTPREL22
:
11486 case BFD_RELOC_IA64_DTPREL64I
:
11487 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11488 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11492 case DUMMY_RELOC_IA64_SLOTCOUNT
:
11493 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11494 _("cannot resolve @slotcount parameter"));
11503 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11506 if (fix
->fx_r_type
== DUMMY_RELOC_IA64_SLOTCOUNT
)
11508 /* For @slotcount, convert an addresses difference to a slots
11512 v
= (value
>> 4) * 3;
11513 switch (value
& 0x0f)
11527 as_bad (_("invalid @slotcount value"));
11533 if (fix
->tc_fix_data
.bigendian
)
11534 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11536 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11541 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11546 /* Generate the BFD reloc to be stuck in the object file from the
11547 fixup used internally in the assembler. */
11550 tc_gen_reloc (asection
*sec ATTRIBUTE_UNUSED
, fixS
*fixp
)
11554 reloc
= XNEW (arelent
);
11555 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
11556 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11557 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11558 reloc
->addend
= fixp
->fx_offset
;
11559 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11563 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11564 _("Cannot represent %s relocation in object file"),
11565 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11572 /* Turn a string in input_line_pointer into a floating point constant
11573 of type TYPE, and store the appropriate bytes in *LIT. The number
11574 of LITTLENUMS emitted is stored in *SIZE. An error message is
11575 returned, or NULL on OK. */
11577 #define MAX_LITTLENUMS 5
11580 md_atof (int type
, char *lit
, int *size
)
11582 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11612 return _("Unrecognized or unsupported floating point constant");
11614 t
= atof_ieee (input_line_pointer
, type
, words
);
11616 input_line_pointer
= t
;
11618 (*ia64_float_to_chars
) (lit
, words
, prec
);
11622 /* It is 10 byte floating point with 6 byte padding. */
11623 memset (&lit
[10], 0, 6);
11624 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11627 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11632 /* Handle ia64 specific semantics of the align directive. */
11635 ia64_md_do_align (int n ATTRIBUTE_UNUSED
,
11636 const char *fill ATTRIBUTE_UNUSED
,
11637 int len ATTRIBUTE_UNUSED
,
11638 int max ATTRIBUTE_UNUSED
)
11640 if (subseg_text_p (now_seg
))
11641 ia64_flush_insns ();
11644 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11645 of an rs_align_code fragment. */
11648 ia64_handle_align (fragS
*fragp
)
11652 const unsigned char *nop_type
;
11654 if (fragp
->fr_type
!= rs_align_code
)
11657 /* Check if this frag has to end with a stop bit. */
11658 nop_type
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11660 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11661 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11663 /* If no paddings are needed, we check if we need a stop bit. */
11664 if (!bytes
&& fragp
->tc_frag_data
)
11666 if (fragp
->fr_fix
< 16)
11668 /* FIXME: It won't work with
11670 alloc r32=ar.pfs,1,2,4,0
11674 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11675 _("Can't add stop bit to mark end of instruction group"));
11678 /* Bundles are always in little-endian byte order. Make sure
11679 the previous bundle has the stop bit. */
11683 /* Make sure we are on a 16-byte boundary, in case someone has been
11684 putting data into a text section. */
11687 int fix
= bytes
& 15;
11688 memset (p
, 0, fix
);
11691 fragp
->fr_fix
+= fix
;
11694 /* Instruction bundles are always little-endian. */
11695 memcpy (p
, nop_type
, 16);
11696 fragp
->fr_var
= 16;
11700 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11705 number_to_chars_bigendian (lit
, (long) (*words
++),
11706 sizeof (LITTLENUM_TYPE
));
11707 lit
+= sizeof (LITTLENUM_TYPE
);
11712 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11717 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11718 sizeof (LITTLENUM_TYPE
));
11719 lit
+= sizeof (LITTLENUM_TYPE
);
11724 ia64_elf_section_change_hook (void)
11726 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11727 && elf_linked_to_section (now_seg
) == NULL
)
11728 elf_linked_to_section (now_seg
) = text_section
;
11729 dot_byteorder (-1);
11732 /* Check if a label should be made global. */
11734 ia64_check_label (symbolS
*label
)
11736 if (*input_line_pointer
== ':')
11738 S_SET_EXTERNAL (label
);
11739 input_line_pointer
++;
11743 /* Used to remember where .alias and .secalias directives are seen. We
11744 will rename symbol and section names when we are about to output
11745 the relocatable file. */
11748 const char *file
; /* The file where the directive is seen. */
11749 unsigned int line
; /* The line number the directive is at. */
11750 const char *name
; /* The original name of the symbol. */
11753 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11754 .secalias. Otherwise, it is .alias. */
11756 dot_alias (int section
)
11758 char *name
, *alias
;
11762 const char *error_string
;
11765 struct hash_control
*ahash
, *nhash
;
11768 delim
= get_symbol_name (&name
);
11769 end_name
= input_line_pointer
;
11772 if (name
== end_name
)
11774 as_bad (_("expected symbol name"));
11775 ignore_rest_of_line ();
11779 SKIP_WHITESPACE_AFTER_NAME ();
11781 if (*input_line_pointer
!= ',')
11784 as_bad (_("expected comma after \"%s\""), name
);
11786 ignore_rest_of_line ();
11790 input_line_pointer
++;
11792 ia64_canonicalize_symbol_name (name
);
11794 /* We call demand_copy_C_string to check if alias string is valid.
11795 There should be a closing `"' and no `\0' in the string. */
11796 alias
= demand_copy_C_string (&len
);
11799 ignore_rest_of_line ();
11803 /* Make a copy of name string. */
11804 len
= strlen (name
) + 1;
11805 obstack_grow (¬es
, name
, len
);
11806 name
= obstack_finish (¬es
);
11811 ahash
= secalias_hash
;
11812 nhash
= secalias_name_hash
;
11817 ahash
= alias_hash
;
11818 nhash
= alias_name_hash
;
11821 /* Check if alias has been used before. */
11822 h
= (struct alias
*) hash_find (ahash
, alias
);
11825 if (strcmp (h
->name
, name
))
11826 as_bad (_("`%s' is already the alias of %s `%s'"),
11827 alias
, kind
, h
->name
);
11831 /* Check if name already has an alias. */
11832 a
= (const char *) hash_find (nhash
, name
);
11835 if (strcmp (a
, alias
))
11836 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11840 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11841 h
->file
= as_where (&h
->line
);
11844 error_string
= hash_jam (ahash
, alias
, (void *) h
);
11847 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11848 alias
, kind
, error_string
);
11852 error_string
= hash_jam (nhash
, name
, (void *) alias
);
11855 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11856 alias
, kind
, error_string
);
11858 obstack_free (¬es
, name
);
11859 obstack_free (¬es
, alias
);
11862 demand_empty_rest_of_line ();
11865 /* It renames the original symbol name to its alias. */
11867 do_alias (const char *alias
, void *value
)
11869 struct alias
*h
= (struct alias
*) value
;
11870 symbolS
*sym
= symbol_find (h
->name
);
11875 /* Uses .alias extensively to alias CRTL functions to same with
11876 decc$ prefix. Sometimes function gets optimized away and a
11877 warning results, which should be suppressed. */
11878 if (strncmp (alias
, "decc$", 5) != 0)
11880 as_warn_where (h
->file
, h
->line
,
11881 _("symbol `%s' aliased to `%s' is not used"),
11885 S_SET_NAME (sym
, (char *) alias
);
11888 /* Called from write_object_file. */
11890 ia64_adjust_symtab (void)
11892 hash_traverse (alias_hash
, do_alias
);
11895 /* It renames the original section name to its alias. */
11897 do_secalias (const char *alias
, void *value
)
11899 struct alias
*h
= (struct alias
*) value
;
11900 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11903 as_warn_where (h
->file
, h
->line
,
11904 _("section `%s' aliased to `%s' is not used"),
11910 /* Called from write_object_file. */
11912 ia64_frob_file (void)
11914 hash_traverse (secalias_hash
, do_secalias
);
11918 #define NT_VMS_MHD 1
11919 #define NT_VMS_LNM 2
11921 /* Integrity VMS 8.x identifies it's ELF modules with a standard ELF
11924 /* Manufacture a VMS-like time string. */
11926 get_vms_time (char *Now
)
11932 pnt
= ctime (&timeb
);
11938 sprintf (Now
, "%2s-%3s-%s %s", pnt
+ 8, pnt
+ 4, pnt
+ 20, pnt
+ 11);
11942 ia64_vms_note (void)
11945 asection
*seg
= now_seg
;
11946 subsegT subseg
= now_subseg
;
11947 asection
*secp
= NULL
;
11952 /* Create the .note section. */
11954 secp
= subseg_new (".note", 0);
11955 bfd_set_section_flags (stdoutput
,
11957 SEC_HAS_CONTENTS
| SEC_READONLY
);
11959 /* Module header note (MHD). */
11960 bname
= xstrdup (lbasename (out_file_name
));
11961 if ((p
= strrchr (bname
, '.')))
11964 /* VMS note header is 24 bytes long. */
11965 p
= frag_more (8 + 8 + 8);
11966 number_to_chars_littleendian (p
+ 0, 8, 8);
11967 number_to_chars_littleendian (p
+ 8, 40 + strlen (bname
), 8);
11968 number_to_chars_littleendian (p
+ 16, NT_VMS_MHD
, 8);
11971 strcpy (p
, "IPF/VMS");
11973 p
= frag_more (17 + 17 + strlen (bname
) + 1 + 5);
11975 strcpy (p
+ 17, "24-FEB-2005 15:00");
11978 p
+= strlen (bname
) + 1;
11980 strcpy (p
, "V1.0");
11982 frag_align (3, 0, 0);
11984 /* Language processor name note. */
11985 sprintf (buf
, "GNU assembler version %s (%s) using BFD version %s",
11986 VERSION
, TARGET_ALIAS
, BFD_VERSION_STRING
);
11988 p
= frag_more (8 + 8 + 8);
11989 number_to_chars_littleendian (p
+ 0, 8, 8);
11990 number_to_chars_littleendian (p
+ 8, strlen (buf
) + 1, 8);
11991 number_to_chars_littleendian (p
+ 16, NT_VMS_LNM
, 8);
11994 strcpy (p
, "IPF/VMS");
11996 p
= frag_more (strlen (buf
) + 1);
11999 frag_align (3, 0, 0);
12001 secp
= subseg_new (".vms_display_name_info", 0);
12002 bfd_set_section_flags (stdoutput
,
12004 SEC_HAS_CONTENTS
| SEC_READONLY
);
12006 /* This symbol should be passed on the command line and be variable
12007 according to language. */
12008 sym
= symbol_new ("__gnat_vms_display_name@gnat_demangler_rtl",
12009 absolute_section
, 0, &zero_address_frag
);
12010 symbol_table_insert (sym
);
12011 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
| BSF_DYNAMIC
;
12014 /* Format 3 of VMS demangler Spec. */
12015 number_to_chars_littleendian (p
, 3, 4);
12018 /* Place holder for symbol table index of above symbol. */
12019 number_to_chars_littleendian (p
, -1, 4);
12021 frag_align (3, 0, 0);
12023 /* We probably can't restore the current segment, for there likely
12024 isn't one yet... */
12026 subseg_set (seg
, subseg
);
12029 #endif /* TE_VMS */