1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
54 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
55 #define MIN(a,b) ((a) < (b) ? (a) : (b))
58 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
59 #define CURR_SLOT md.slot[md.curr_slot]
61 #define O_pseudo_fixup (O_max + 1)
65 /* IA-64 ABI section pseudo-ops. */
66 SPECIAL_SECTION_BSS
= 0,
68 SPECIAL_SECTION_SDATA
,
69 SPECIAL_SECTION_RODATA
,
70 SPECIAL_SECTION_COMMENT
,
71 SPECIAL_SECTION_UNWIND
,
72 SPECIAL_SECTION_UNWIND_INFO
,
73 /* HPUX specific section pseudo-ops. */
74 SPECIAL_SECTION_INIT_ARRAY
,
75 SPECIAL_SECTION_FINI_ARRAY
,
92 FUNC_LT_FPTR_RELATIVE
,
102 REG_FR
= (REG_GR
+ 128),
103 REG_AR
= (REG_FR
+ 128),
104 REG_CR
= (REG_AR
+ 128),
105 REG_P
= (REG_CR
+ 128),
106 REG_BR
= (REG_P
+ 64),
107 REG_IP
= (REG_BR
+ 8),
114 /* The following are pseudo-registers for use by gas only. */
126 /* The following pseudo-registers are used for unwind directives only: */
134 DYNREG_GR
= 0, /* dynamic general purpose register */
135 DYNREG_FR
, /* dynamic floating point register */
136 DYNREG_PR
, /* dynamic predicate register */
140 enum operand_match_result
143 OPERAND_OUT_OF_RANGE
,
147 /* On the ia64, we can't know the address of a text label until the
148 instructions are packed into a bundle. To handle this, we keep
149 track of the list of labels that appear in front of each
153 struct label_fix
*next
;
157 /* This is the endianness of the current section. */
158 extern int target_big_endian
;
160 /* This is the default endianness. */
161 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
163 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
165 static void ia64_float_to_chars_bigendian
166 PARAMS ((char *, LITTLENUM_TYPE
*, int));
167 static void ia64_float_to_chars_littleendian
168 PARAMS ((char *, LITTLENUM_TYPE
*, int));
169 static void (*ia64_float_to_chars
)
170 PARAMS ((char *, LITTLENUM_TYPE
*, int));
172 static struct hash_control
*alias_hash
;
173 static struct hash_control
*alias_name_hash
;
174 static struct hash_control
*secalias_hash
;
175 static struct hash_control
*secalias_name_hash
;
177 /* Characters which always start a comment. */
178 const char comment_chars
[] = "";
180 /* Characters which start a comment at the beginning of a line. */
181 const char line_comment_chars
[] = "#";
183 /* Characters which may be used to separate multiple commands on a
185 const char line_separator_chars
[] = ";";
187 /* Characters which are used to indicate an exponent in a floating
189 const char EXP_CHARS
[] = "eE";
191 /* Characters which mean that a number is a floating point constant,
193 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
195 /* ia64-specific option processing: */
197 const char *md_shortopts
= "m:N:x::";
199 struct option md_longopts
[] =
201 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
202 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
203 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
204 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
207 size_t md_longopts_size
= sizeof (md_longopts
);
211 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
212 struct hash_control
*reg_hash
; /* register name hash table */
213 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
214 struct hash_control
*const_hash
; /* constant hash table */
215 struct hash_control
*entry_hash
; /* code entry hint hash table */
217 symbolS
*regsym
[REG_NUM
];
219 /* If X_op is != O_absent, the registername for the instruction's
220 qualifying predicate. If NULL, p0 is assumed for instructions
221 that are predicatable. */
228 explicit_mode
: 1, /* which mode we're in */
229 default_explicit_mode
: 1, /* which mode is the default */
230 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
232 keep_pending_output
: 1;
234 /* Each bundle consists of up to three instructions. We keep
235 track of four most recent instructions so we can correctly set
236 the end_of_insn_group for the last instruction in a bundle. */
238 int num_slots_in_use
;
242 end_of_insn_group
: 1,
243 manual_bundling_on
: 1,
244 manual_bundling_off
: 1,
245 loc_directive_seen
: 1;
246 signed char user_template
; /* user-selected template, if any */
247 unsigned char qp_regno
; /* qualifying predicate */
248 /* This duplicates a good fraction of "struct fix" but we
249 can't use a "struct fix" instead since we can't call
250 fix_new_exp() until we know the address of the instruction. */
254 bfd_reloc_code_real_type code
;
255 enum ia64_opnd opnd
; /* type of operand in need of fix */
256 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
257 expressionS expr
; /* the value to be inserted */
259 fixup
[2]; /* at most two fixups per insn */
260 struct ia64_opcode
*idesc
;
261 struct label_fix
*label_fixups
;
262 struct label_fix
*tag_fixups
;
263 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
266 unsigned int src_line
;
267 struct dwarf2_line_info debug_line
;
275 struct dynreg
*next
; /* next dynamic register */
277 unsigned short base
; /* the base register number */
278 unsigned short num_regs
; /* # of registers in this set */
280 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
282 flagword flags
; /* ELF-header flags */
285 unsigned hint
:1; /* is this hint currently valid? */
286 bfd_vma offset
; /* mem.offset offset */
287 bfd_vma base
; /* mem.offset base */
290 int path
; /* number of alt. entry points seen */
291 const char **entry_labels
; /* labels of all alternate paths in
292 the current DV-checking block. */
293 int maxpaths
; /* size currently allocated for
295 /* Support for hardware errata workarounds. */
297 /* Record data about the last three insn groups. */
300 /* B-step workaround.
301 For each predicate register, this is set if the corresponding insn
302 group conditionally sets this register with one of the affected
305 /* B-step workaround.
306 For each general register, this is set if the corresponding insn
307 a) is conditional one one of the predicate registers for which
308 P_REG_SET is 1 in the corresponding entry of the previous group,
309 b) sets this general register with one of the affected
311 int g_reg_set_conditionally
[128];
315 int pointer_size
; /* size in bytes of a pointer */
316 int pointer_size_shift
; /* shift size of a pointer for alignment */
320 /* application registers: */
326 #define AR_BSPSTORE 18
341 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
342 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
343 {"ar.rsc", 16}, {"ar.bsp", 17},
344 {"ar.bspstore", 18}, {"ar.rnat", 19},
345 {"ar.fcr", 21}, {"ar.eflag", 24},
346 {"ar.csd", 25}, {"ar.ssd", 26},
347 {"ar.cflg", 27}, {"ar.fsr", 28},
348 {"ar.fir", 29}, {"ar.fdr", 30},
349 {"ar.ccv", 32}, {"ar.unat", 36},
350 {"ar.fpsr", 40}, {"ar.itc", 44},
351 {"ar.pfs", 64}, {"ar.lc", 65},
372 /* control registers: */
414 static const struct const_desc
421 /* PSR constant masks: */
424 {"psr.be", ((valueT
) 1) << 1},
425 {"psr.up", ((valueT
) 1) << 2},
426 {"psr.ac", ((valueT
) 1) << 3},
427 {"psr.mfl", ((valueT
) 1) << 4},
428 {"psr.mfh", ((valueT
) 1) << 5},
430 {"psr.ic", ((valueT
) 1) << 13},
431 {"psr.i", ((valueT
) 1) << 14},
432 {"psr.pk", ((valueT
) 1) << 15},
434 {"psr.dt", ((valueT
) 1) << 17},
435 {"psr.dfl", ((valueT
) 1) << 18},
436 {"psr.dfh", ((valueT
) 1) << 19},
437 {"psr.sp", ((valueT
) 1) << 20},
438 {"psr.pp", ((valueT
) 1) << 21},
439 {"psr.di", ((valueT
) 1) << 22},
440 {"psr.si", ((valueT
) 1) << 23},
441 {"psr.db", ((valueT
) 1) << 24},
442 {"psr.lp", ((valueT
) 1) << 25},
443 {"psr.tb", ((valueT
) 1) << 26},
444 {"psr.rt", ((valueT
) 1) << 27},
445 /* 28-31: reserved */
446 /* 32-33: cpl (current privilege level) */
447 {"psr.is", ((valueT
) 1) << 34},
448 {"psr.mc", ((valueT
) 1) << 35},
449 {"psr.it", ((valueT
) 1) << 36},
450 {"psr.id", ((valueT
) 1) << 37},
451 {"psr.da", ((valueT
) 1) << 38},
452 {"psr.dd", ((valueT
) 1) << 39},
453 {"psr.ss", ((valueT
) 1) << 40},
454 /* 41-42: ri (restart instruction) */
455 {"psr.ed", ((valueT
) 1) << 43},
456 {"psr.bn", ((valueT
) 1) << 44},
459 /* indirect register-sets/memory: */
468 { "CPUID", IND_CPUID
},
469 { "cpuid", IND_CPUID
},
481 /* Pseudo functions used to indicate relocation types (these functions
482 start with an at sign (@). */
504 /* reloc pseudo functions (these must come first!): */
505 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
506 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
507 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
508 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
509 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
510 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
511 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
512 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
513 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
514 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
515 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
516 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
517 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
518 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
519 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
520 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
521 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
523 /* mbtype4 constants: */
524 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
525 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
526 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
527 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
528 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
530 /* fclass constants: */
531 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
532 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
533 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
534 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
535 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
536 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
537 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
538 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
539 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
541 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
543 /* hint constants: */
544 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
546 /* unwind-related constants: */
547 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
548 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
549 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
550 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
551 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
552 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
553 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
555 /* unwind-related registers: */
556 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
559 /* 41-bit nop opcodes (one per unit): */
560 static const bfd_vma nop
[IA64_NUM_UNITS
] =
562 0x0000000000LL
, /* NIL => break 0 */
563 0x0008000000LL
, /* I-unit nop */
564 0x0008000000LL
, /* M-unit nop */
565 0x4000000000LL
, /* B-unit nop */
566 0x0008000000LL
, /* F-unit nop */
567 0x0008000000LL
, /* L-"unit" nop */
568 0x0008000000LL
, /* X-unit nop */
571 /* Can't be `const' as it's passed to input routines (which have the
572 habit of setting temporary sentinels. */
573 static char special_section_name
[][20] =
575 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
576 {".IA_64.unwind"}, {".IA_64.unwind_info"},
577 {".init_array"}, {".fini_array"}
580 /* The best template for a particular sequence of up to three
582 #define N IA64_NUM_TYPES
583 static unsigned char best_template
[N
][N
][N
];
586 /* Resource dependencies currently in effect */
588 int depind
; /* dependency index */
589 const struct ia64_dependency
*dependency
; /* actual dependency */
590 unsigned specific
:1, /* is this a specific bit/regno? */
591 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
592 int index
; /* specific regno/bit within dependency */
593 int note
; /* optional qualifying note (0 if none) */
597 int insn_srlz
; /* current insn serialization state */
598 int data_srlz
; /* current data serialization state */
599 int qp_regno
; /* qualifying predicate for this usage */
600 char *file
; /* what file marked this dependency */
601 unsigned int line
; /* what line marked this dependency */
602 struct mem_offset mem_offset
; /* optional memory offset hint */
603 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
604 int path
; /* corresponding code entry index */
606 static int regdepslen
= 0;
607 static int regdepstotlen
= 0;
608 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
609 static const char *dv_sem
[] = { "none", "implied", "impliedf",
610 "data", "instr", "specific", "stop", "other" };
611 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
613 /* Current state of PR mutexation */
614 static struct qpmutex
{
617 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
618 static int qp_mutexeslen
= 0;
619 static int qp_mutexestotlen
= 0;
620 static valueT qp_safe_across_calls
= 0;
622 /* Current state of PR implications */
623 static struct qp_imply
{
626 unsigned p2_branched
:1;
628 } *qp_implies
= NULL
;
629 static int qp_implieslen
= 0;
630 static int qp_impliestotlen
= 0;
632 /* Keep track of static GR values so that indirect register usage can
633 sometimes be tracked. */
638 } gr_values
[128] = {{ 1, 0, 0 }};
640 /* Remember the alignment frag. */
641 static fragS
*align_frag
;
643 /* These are the routines required to output the various types of
646 /* A slot_number is a frag address plus the slot index (0-2). We use the
647 frag address here so that if there is a section switch in the middle of
648 a function, then instructions emitted to a different section are not
649 counted. Since there may be more than one frag for a function, this
650 means we also need to keep track of which frag this address belongs to
651 so we can compute inter-frag distances. This also nicely solves the
652 problem with nops emitted for align directives, which can't easily be
653 counted, but can easily be derived from frag sizes. */
655 typedef struct unw_rec_list
{
657 unsigned long slot_number
;
659 unsigned long next_slot_number
;
660 fragS
*next_slot_frag
;
661 struct unw_rec_list
*next
;
664 #define SLOT_NUM_NOT_SET (unsigned)-1
666 /* Linked list of saved prologue counts. A very poor
667 implementation of a map from label numbers to prologue counts. */
668 typedef struct label_prologue_count
670 struct label_prologue_count
*next
;
671 unsigned long label_number
;
672 unsigned int prologue_count
;
673 } label_prologue_count
;
677 /* Maintain a list of unwind entries for the current function. */
681 /* Any unwind entires that should be attached to the current slot
682 that an insn is being constructed for. */
683 unw_rec_list
*current_entry
;
685 /* These are used to create the unwind table entry for this function. */
688 symbolS
*info
; /* pointer to unwind info */
689 symbolS
*personality_routine
;
691 subsegT saved_text_subseg
;
692 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
694 /* TRUE if processing unwind directives in a prologue region. */
697 unsigned int prologue_count
; /* number of .prologues seen so far */
698 /* Prologue counts at previous .label_state directives. */
699 struct label_prologue_count
* saved_prologue_counts
;
702 /* The input value is a negated offset from psp, and specifies an address
703 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
704 must add 16 and divide by 4 to get the encoded value. */
706 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
708 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
710 /* Forward declarations: */
711 static void set_section
PARAMS ((char *name
));
712 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
713 unsigned int, unsigned int));
714 static void dot_align (int);
715 static void dot_radix
PARAMS ((int));
716 static void dot_special_section
PARAMS ((int));
717 static void dot_proc
PARAMS ((int));
718 static void dot_fframe
PARAMS ((int));
719 static void dot_vframe
PARAMS ((int));
720 static void dot_vframesp
PARAMS ((int));
721 static void dot_vframepsp
PARAMS ((int));
722 static void dot_save
PARAMS ((int));
723 static void dot_restore
PARAMS ((int));
724 static void dot_restorereg
PARAMS ((int));
725 static void dot_restorereg_p
PARAMS ((int));
726 static void dot_handlerdata
PARAMS ((int));
727 static void dot_unwentry
PARAMS ((int));
728 static void dot_altrp
PARAMS ((int));
729 static void dot_savemem
PARAMS ((int));
730 static void dot_saveg
PARAMS ((int));
731 static void dot_savef
PARAMS ((int));
732 static void dot_saveb
PARAMS ((int));
733 static void dot_savegf
PARAMS ((int));
734 static void dot_spill
PARAMS ((int));
735 static void dot_spillreg
PARAMS ((int));
736 static void dot_spillmem
PARAMS ((int));
737 static void dot_spillreg_p
PARAMS ((int));
738 static void dot_spillmem_p
PARAMS ((int));
739 static void dot_label_state
PARAMS ((int));
740 static void dot_copy_state
PARAMS ((int));
741 static void dot_unwabi
PARAMS ((int));
742 static void dot_personality
PARAMS ((int));
743 static void dot_body
PARAMS ((int));
744 static void dot_prologue
PARAMS ((int));
745 static void dot_endp
PARAMS ((int));
746 static void dot_template
PARAMS ((int));
747 static void dot_regstk
PARAMS ((int));
748 static void dot_rot
PARAMS ((int));
749 static void dot_byteorder
PARAMS ((int));
750 static void dot_psr
PARAMS ((int));
751 static void dot_alias
PARAMS ((int));
752 static void dot_ln
PARAMS ((int));
753 static char *parse_section_name
PARAMS ((void));
754 static void dot_xdata
PARAMS ((int));
755 static void stmt_float_cons
PARAMS ((int));
756 static void stmt_cons_ua
PARAMS ((int));
757 static void dot_xfloat_cons
PARAMS ((int));
758 static void dot_xstringer
PARAMS ((int));
759 static void dot_xdata_ua
PARAMS ((int));
760 static void dot_xfloat_cons_ua
PARAMS ((int));
761 static void print_prmask
PARAMS ((valueT mask
));
762 static void dot_pred_rel
PARAMS ((int));
763 static void dot_reg_val
PARAMS ((int));
764 static void dot_serialize
PARAMS ((int));
765 static void dot_dv_mode
PARAMS ((int));
766 static void dot_entry
PARAMS ((int));
767 static void dot_mem_offset
PARAMS ((int));
768 static void add_unwind_entry
PARAMS((unw_rec_list
*ptr
));
769 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
770 static void declare_register_set
PARAMS ((const char *, int, int));
771 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
772 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
775 static int parse_operand
PARAMS ((expressionS
*e
));
776 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
777 static int errata_nop_necessary_p
PARAMS ((struct slot
*, enum ia64_unit
));
778 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
779 static void emit_one_bundle
PARAMS ((void));
780 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
781 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
782 bfd_reloc_code_real_type r_type
));
783 static void insn_group_break
PARAMS ((int, int, int));
784 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
785 struct rsrc
*, int depind
, int path
));
786 static void add_qp_mutex
PARAMS((valueT mask
));
787 static void add_qp_imply
PARAMS((int p1
, int p2
));
788 static void clear_qp_branch_flag
PARAMS((valueT mask
));
789 static void clear_qp_mutex
PARAMS((valueT mask
));
790 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
791 static int has_suffix_p
PARAMS((const char *, const char *));
792 static void clear_register_values
PARAMS ((void));
793 static void print_dependency
PARAMS ((const char *action
, int depind
));
794 static void instruction_serialization
PARAMS ((void));
795 static void data_serialization
PARAMS ((void));
796 static void remove_marked_resource
PARAMS ((struct rsrc
*));
797 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
798 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
799 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
800 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
801 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
802 struct ia64_opcode
*, int, struct rsrc
[], int, int));
803 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
804 static void check_dependencies
PARAMS((struct ia64_opcode
*));
805 static void mark_resources
PARAMS((struct ia64_opcode
*));
806 static void update_dependencies
PARAMS((struct ia64_opcode
*));
807 static void note_register_values
PARAMS((struct ia64_opcode
*));
808 static int qp_mutex
PARAMS ((int, int, int));
809 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
810 static void output_vbyte_mem
PARAMS ((int, char *, char *));
811 static void count_output
PARAMS ((int, char *, char *));
812 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
813 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
814 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
815 static void output_P1_format
PARAMS ((vbyte_func
, int));
816 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
817 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
818 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
819 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
820 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
821 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
822 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
823 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
824 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
825 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
826 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
827 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
828 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
829 static char format_ab_reg
PARAMS ((int, int));
830 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
832 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
833 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
835 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
836 static unw_rec_list
*output_endp
PARAMS ((void));
837 static unw_rec_list
*output_prologue
PARAMS ((void));
838 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
839 static unw_rec_list
*output_body
PARAMS ((void));
840 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
841 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
842 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
843 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
844 static unw_rec_list
*output_rp_when
PARAMS ((void));
845 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
846 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
847 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
848 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
849 static unw_rec_list
*output_pfs_when
PARAMS ((void));
850 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
851 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
852 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
853 static unw_rec_list
*output_preds_when
PARAMS ((void));
854 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
855 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
856 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
857 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
858 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
859 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
860 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
861 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
862 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
863 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
864 static unw_rec_list
*output_unat_when
PARAMS ((void));
865 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
866 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
867 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
868 static unw_rec_list
*output_lc_when
PARAMS ((void));
869 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
870 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
871 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
872 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
873 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
874 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
875 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
876 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
877 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
878 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
879 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
880 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
881 static unw_rec_list
*output_bsp_when
PARAMS ((void));
882 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
883 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
884 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
885 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
886 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
887 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
888 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
889 static unw_rec_list
*output_rnat_when
PARAMS ((void));
890 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
891 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
892 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
893 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
894 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
895 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
896 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
897 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int));
898 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int));
899 static unw_rec_list
*output_spill_psprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
901 static unw_rec_list
*output_spill_sprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
903 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
905 static unw_rec_list
*output_spill_reg_p
PARAMS ((unsigned int, unsigned int, unsigned int,
906 unsigned int, unsigned int));
907 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
908 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
909 static int calc_record_size
PARAMS ((unw_rec_list
*));
910 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
911 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
912 unsigned long, fragS
*,
914 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
915 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
916 static int convert_expr_to_ab_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
917 static int convert_expr_to_xy_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
918 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
919 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
920 static void free_saved_prologue_counts
PARAMS ((void));
922 /* Determine if application register REGNUM resides only in the integer
923 unit (as opposed to the memory unit). */
925 ar_is_only_in_integer_unit (int reg
)
928 return reg
>= 64 && reg
<= 111;
931 /* Determine if application register REGNUM resides only in the memory
932 unit (as opposed to the integer unit). */
934 ar_is_only_in_memory_unit (int reg
)
937 return reg
>= 0 && reg
<= 47;
940 /* Switch to section NAME and create section if necessary. It's
941 rather ugly that we have to manipulate input_line_pointer but I
942 don't see any other way to accomplish the same thing without
943 changing obj-elf.c (which may be the Right Thing, in the end). */
948 char *saved_input_line_pointer
;
950 saved_input_line_pointer
= input_line_pointer
;
951 input_line_pointer
= name
;
953 input_line_pointer
= saved_input_line_pointer
;
956 /* Map 's' to SHF_IA_64_SHORT. */
959 ia64_elf_section_letter (letter
, ptr_msg
)
964 return SHF_IA_64_SHORT
;
965 else if (letter
== 'o')
966 return SHF_LINK_ORDER
;
968 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
972 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
975 ia64_elf_section_flags (flags
, attr
, type
)
977 int attr
, type ATTRIBUTE_UNUSED
;
979 if (attr
& SHF_IA_64_SHORT
)
980 flags
|= SEC_SMALL_DATA
;
985 ia64_elf_section_type (str
, len
)
989 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
991 if (STREQ (ELF_STRING_ia64_unwind_info
))
994 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
997 if (STREQ (ELF_STRING_ia64_unwind
))
998 return SHT_IA_64_UNWIND
;
1000 if (STREQ (ELF_STRING_ia64_unwind_once
))
1001 return SHT_IA_64_UNWIND
;
1003 if (STREQ ("unwind"))
1004 return SHT_IA_64_UNWIND
;
1011 set_regstack (ins
, locs
, outs
, rots
)
1012 unsigned int ins
, locs
, outs
, rots
;
1014 /* Size of frame. */
1017 sof
= ins
+ locs
+ outs
;
1020 as_bad ("Size of frame exceeds maximum of 96 registers");
1025 as_warn ("Size of rotating registers exceeds frame size");
1028 md
.in
.base
= REG_GR
+ 32;
1029 md
.loc
.base
= md
.in
.base
+ ins
;
1030 md
.out
.base
= md
.loc
.base
+ locs
;
1032 md
.in
.num_regs
= ins
;
1033 md
.loc
.num_regs
= locs
;
1034 md
.out
.num_regs
= outs
;
1035 md
.rot
.num_regs
= rots
;
1042 struct label_fix
*lfix
;
1044 subsegT saved_subseg
;
1047 if (!md
.last_text_seg
)
1050 saved_seg
= now_seg
;
1051 saved_subseg
= now_subseg
;
1053 subseg_set (md
.last_text_seg
, 0);
1055 while (md
.num_slots_in_use
> 0)
1056 emit_one_bundle (); /* force out queued instructions */
1058 /* In case there are labels following the last instruction, resolve
1060 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1062 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1063 symbol_set_frag (lfix
->sym
, frag_now
);
1065 CURR_SLOT
.label_fixups
= 0;
1066 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1068 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1069 symbol_set_frag (lfix
->sym
, frag_now
);
1071 CURR_SLOT
.tag_fixups
= 0;
1073 /* In case there are unwind directives following the last instruction,
1074 resolve those now. We only handle prologue, body, and endp directives
1075 here. Give an error for others. */
1076 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1078 switch (ptr
->r
.type
)
1084 ptr
->slot_number
= (unsigned long) frag_more (0);
1085 ptr
->slot_frag
= frag_now
;
1088 /* Allow any record which doesn't have a "t" field (i.e.,
1089 doesn't relate to a particular instruction). */
1105 as_bad (_("Unwind directive not followed by an instruction."));
1109 unwind
.current_entry
= NULL
;
1111 subseg_set (saved_seg
, saved_subseg
);
1113 if (md
.qp
.X_op
== O_register
)
1114 as_bad ("qualifying predicate not followed by instruction");
1118 ia64_do_align (int nbytes
)
1120 char *saved_input_line_pointer
= input_line_pointer
;
1122 input_line_pointer
= "";
1123 s_align_bytes (nbytes
);
1124 input_line_pointer
= saved_input_line_pointer
;
1128 ia64_cons_align (nbytes
)
1133 char *saved_input_line_pointer
= input_line_pointer
;
1134 input_line_pointer
= "";
1135 s_align_bytes (nbytes
);
1136 input_line_pointer
= saved_input_line_pointer
;
1140 /* Output COUNT bytes to a memory location. */
1141 static unsigned char *vbyte_mem_ptr
= NULL
;
1144 output_vbyte_mem (count
, ptr
, comment
)
1147 char *comment ATTRIBUTE_UNUSED
;
1150 if (vbyte_mem_ptr
== NULL
)
1155 for (x
= 0; x
< count
; x
++)
1156 *(vbyte_mem_ptr
++) = ptr
[x
];
1159 /* Count the number of bytes required for records. */
1160 static int vbyte_count
= 0;
1162 count_output (count
, ptr
, comment
)
1164 char *ptr ATTRIBUTE_UNUSED
;
1165 char *comment ATTRIBUTE_UNUSED
;
1167 vbyte_count
+= count
;
1171 output_R1_format (f
, rtype
, rlen
)
1173 unw_record_type rtype
;
1180 output_R3_format (f
, rtype
, rlen
);
1186 else if (rtype
!= prologue
)
1187 as_bad ("record type is not valid");
1189 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1190 (*f
) (1, &byte
, NULL
);
1194 output_R2_format (f
, mask
, grsave
, rlen
)
1201 mask
= (mask
& 0x0f);
1202 grsave
= (grsave
& 0x7f);
1204 bytes
[0] = (UNW_R2
| (mask
>> 1));
1205 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1206 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1207 (*f
) (count
, bytes
, NULL
);
1211 output_R3_format (f
, rtype
, rlen
)
1213 unw_record_type rtype
;
1220 output_R1_format (f
, rtype
, rlen
);
1226 else if (rtype
!= prologue
)
1227 as_bad ("record type is not valid");
1228 bytes
[0] = (UNW_R3
| r
);
1229 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1230 (*f
) (count
+ 1, bytes
, NULL
);
1234 output_P1_format (f
, brmask
)
1239 byte
= UNW_P1
| (brmask
& 0x1f);
1240 (*f
) (1, &byte
, NULL
);
1244 output_P2_format (f
, brmask
, gr
)
1250 brmask
= (brmask
& 0x1f);
1251 bytes
[0] = UNW_P2
| (brmask
>> 1);
1252 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1253 (*f
) (2, bytes
, NULL
);
1257 output_P3_format (f
, rtype
, reg
)
1259 unw_record_type rtype
;
1304 as_bad ("Invalid record type for P3 format.");
1306 bytes
[0] = (UNW_P3
| (r
>> 1));
1307 bytes
[1] = (((r
& 1) << 7) | reg
);
1308 (*f
) (2, bytes
, NULL
);
1312 output_P4_format (f
, imask
, imask_size
)
1314 unsigned char *imask
;
1315 unsigned long imask_size
;
1318 (*f
) (imask_size
, imask
, NULL
);
1322 output_P5_format (f
, grmask
, frmask
)
1325 unsigned long frmask
;
1328 grmask
= (grmask
& 0x0f);
1331 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1332 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1333 bytes
[3] = (frmask
& 0x000000ff);
1334 (*f
) (4, bytes
, NULL
);
1338 output_P6_format (f
, rtype
, rmask
)
1340 unw_record_type rtype
;
1346 if (rtype
== gr_mem
)
1348 else if (rtype
!= fr_mem
)
1349 as_bad ("Invalid record type for format P6");
1350 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1351 (*f
) (1, &byte
, NULL
);
1355 output_P7_format (f
, rtype
, w1
, w2
)
1357 unw_record_type rtype
;
1364 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1369 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1419 bytes
[0] = (UNW_P7
| r
);
1420 (*f
) (count
, bytes
, NULL
);
1424 output_P8_format (f
, rtype
, t
)
1426 unw_record_type rtype
;
1465 case bspstore_psprel
:
1468 case bspstore_sprel
:
1480 case priunat_when_gr
:
1483 case priunat_psprel
:
1489 case priunat_when_mem
:
1496 count
+= output_leb128 (bytes
+ 2, t
, 0);
1497 (*f
) (count
, bytes
, NULL
);
1501 output_P9_format (f
, grmask
, gr
)
1508 bytes
[1] = (grmask
& 0x0f);
1509 bytes
[2] = (gr
& 0x7f);
1510 (*f
) (3, bytes
, NULL
);
1514 output_P10_format (f
, abi
, context
)
1521 bytes
[1] = (abi
& 0xff);
1522 bytes
[2] = (context
& 0xff);
1523 (*f
) (3, bytes
, NULL
);
1527 output_B1_format (f
, rtype
, label
)
1529 unw_record_type rtype
;
1530 unsigned long label
;
1536 output_B4_format (f
, rtype
, label
);
1539 if (rtype
== copy_state
)
1541 else if (rtype
!= label_state
)
1542 as_bad ("Invalid record type for format B1");
1544 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1545 (*f
) (1, &byte
, NULL
);
1549 output_B2_format (f
, ecount
, t
)
1551 unsigned long ecount
;
1558 output_B3_format (f
, ecount
, t
);
1561 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1562 count
+= output_leb128 (bytes
+ 1, t
, 0);
1563 (*f
) (count
, bytes
, NULL
);
1567 output_B3_format (f
, ecount
, t
)
1569 unsigned long ecount
;
1576 output_B2_format (f
, ecount
, t
);
1580 count
+= output_leb128 (bytes
+ 1, t
, 0);
1581 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1582 (*f
) (count
, bytes
, NULL
);
1586 output_B4_format (f
, rtype
, label
)
1588 unw_record_type rtype
;
1589 unsigned long label
;
1596 output_B1_format (f
, rtype
, label
);
1600 if (rtype
== copy_state
)
1602 else if (rtype
!= label_state
)
1603 as_bad ("Invalid record type for format B1");
1605 bytes
[0] = (UNW_B4
| (r
<< 3));
1606 count
+= output_leb128 (bytes
+ 1, label
, 0);
1607 (*f
) (count
, bytes
, NULL
);
1611 format_ab_reg (ab
, reg
)
1618 ret
= (ab
<< 5) | reg
;
1623 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1625 unw_record_type rtype
;
1635 if (rtype
== spill_sprel
)
1637 else if (rtype
!= spill_psprel
)
1638 as_bad ("Invalid record type for format X1");
1639 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1640 count
+= output_leb128 (bytes
+ 2, t
, 0);
1641 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1642 (*f
) (count
, bytes
, NULL
);
1646 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1655 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1656 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1657 count
+= output_leb128 (bytes
+ 3, t
, 0);
1658 (*f
) (count
, bytes
, NULL
);
1662 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1664 unw_record_type rtype
;
1675 if (rtype
== spill_sprel_p
)
1677 else if (rtype
!= spill_psprel_p
)
1678 as_bad ("Invalid record type for format X3");
1679 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1680 bytes
[2] = format_ab_reg (ab
, reg
);
1681 count
+= output_leb128 (bytes
+ 3, t
, 0);
1682 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1683 (*f
) (count
, bytes
, NULL
);
1687 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1697 bytes
[1] = (qp
& 0x3f);
1698 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1699 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1700 count
+= output_leb128 (bytes
+ 4, t
, 0);
1701 (*f
) (count
, bytes
, NULL
);
1704 /* This function allocates a record list structure, and initializes fields. */
1706 static unw_rec_list
*
1707 alloc_record (unw_record_type t
)
1710 ptr
= xmalloc (sizeof (*ptr
));
1712 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1714 ptr
->next_slot_number
= 0;
1715 ptr
->next_slot_frag
= 0;
1719 /* Dummy unwind record used for calculating the length of the last prologue or
1722 static unw_rec_list
*
1725 unw_rec_list
*ptr
= alloc_record (endp
);
1729 static unw_rec_list
*
1732 unw_rec_list
*ptr
= alloc_record (prologue
);
1733 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1737 static unw_rec_list
*
1738 output_prologue_gr (saved_mask
, reg
)
1739 unsigned int saved_mask
;
1742 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1743 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1744 ptr
->r
.record
.r
.grmask
= saved_mask
;
1745 ptr
->r
.record
.r
.grsave
= reg
;
1749 static unw_rec_list
*
1752 unw_rec_list
*ptr
= alloc_record (body
);
1756 static unw_rec_list
*
1757 output_mem_stack_f (size
)
1760 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1761 ptr
->r
.record
.p
.size
= size
;
1765 static unw_rec_list
*
1766 output_mem_stack_v ()
1768 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1772 static unw_rec_list
*
1776 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1777 ptr
->r
.record
.p
.gr
= gr
;
1781 static unw_rec_list
*
1782 output_psp_sprel (offset
)
1783 unsigned int offset
;
1785 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1786 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1790 static unw_rec_list
*
1793 unw_rec_list
*ptr
= alloc_record (rp_when
);
1797 static unw_rec_list
*
1801 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1802 ptr
->r
.record
.p
.gr
= gr
;
1806 static unw_rec_list
*
1810 unw_rec_list
*ptr
= alloc_record (rp_br
);
1811 ptr
->r
.record
.p
.br
= br
;
1815 static unw_rec_list
*
1816 output_rp_psprel (offset
)
1817 unsigned int offset
;
1819 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1820 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1824 static unw_rec_list
*
1825 output_rp_sprel (offset
)
1826 unsigned int offset
;
1828 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1829 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1833 static unw_rec_list
*
1836 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1840 static unw_rec_list
*
1844 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1845 ptr
->r
.record
.p
.gr
= gr
;
1849 static unw_rec_list
*
1850 output_pfs_psprel (offset
)
1851 unsigned int offset
;
1853 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1854 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1858 static unw_rec_list
*
1859 output_pfs_sprel (offset
)
1860 unsigned int offset
;
1862 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1863 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1867 static unw_rec_list
*
1868 output_preds_when ()
1870 unw_rec_list
*ptr
= alloc_record (preds_when
);
1874 static unw_rec_list
*
1875 output_preds_gr (gr
)
1878 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1879 ptr
->r
.record
.p
.gr
= gr
;
1883 static unw_rec_list
*
1884 output_preds_psprel (offset
)
1885 unsigned int offset
;
1887 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1888 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1892 static unw_rec_list
*
1893 output_preds_sprel (offset
)
1894 unsigned int offset
;
1896 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1897 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1901 static unw_rec_list
*
1902 output_fr_mem (mask
)
1905 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1906 ptr
->r
.record
.p
.rmask
= mask
;
1910 static unw_rec_list
*
1911 output_frgr_mem (gr_mask
, fr_mask
)
1912 unsigned int gr_mask
;
1913 unsigned int fr_mask
;
1915 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1916 ptr
->r
.record
.p
.grmask
= gr_mask
;
1917 ptr
->r
.record
.p
.frmask
= fr_mask
;
1921 static unw_rec_list
*
1922 output_gr_gr (mask
, reg
)
1926 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1927 ptr
->r
.record
.p
.grmask
= mask
;
1928 ptr
->r
.record
.p
.gr
= reg
;
1932 static unw_rec_list
*
1933 output_gr_mem (mask
)
1936 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1937 ptr
->r
.record
.p
.rmask
= mask
;
1941 static unw_rec_list
*
1942 output_br_mem (unsigned int mask
)
1944 unw_rec_list
*ptr
= alloc_record (br_mem
);
1945 ptr
->r
.record
.p
.brmask
= mask
;
1949 static unw_rec_list
*
1950 output_br_gr (save_mask
, reg
)
1951 unsigned int save_mask
;
1954 unw_rec_list
*ptr
= alloc_record (br_gr
);
1955 ptr
->r
.record
.p
.brmask
= save_mask
;
1956 ptr
->r
.record
.p
.gr
= reg
;
1960 static unw_rec_list
*
1961 output_spill_base (offset
)
1962 unsigned int offset
;
1964 unw_rec_list
*ptr
= alloc_record (spill_base
);
1965 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1969 static unw_rec_list
*
1972 unw_rec_list
*ptr
= alloc_record (unat_when
);
1976 static unw_rec_list
*
1980 unw_rec_list
*ptr
= alloc_record (unat_gr
);
1981 ptr
->r
.record
.p
.gr
= gr
;
1985 static unw_rec_list
*
1986 output_unat_psprel (offset
)
1987 unsigned int offset
;
1989 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
1990 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1994 static unw_rec_list
*
1995 output_unat_sprel (offset
)
1996 unsigned int offset
;
1998 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
1999 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2003 static unw_rec_list
*
2006 unw_rec_list
*ptr
= alloc_record (lc_when
);
2010 static unw_rec_list
*
2014 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2015 ptr
->r
.record
.p
.gr
= gr
;
2019 static unw_rec_list
*
2020 output_lc_psprel (offset
)
2021 unsigned int offset
;
2023 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2024 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2028 static unw_rec_list
*
2029 output_lc_sprel (offset
)
2030 unsigned int offset
;
2032 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2033 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2037 static unw_rec_list
*
2040 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2044 static unw_rec_list
*
2048 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2049 ptr
->r
.record
.p
.gr
= gr
;
2053 static unw_rec_list
*
2054 output_fpsr_psprel (offset
)
2055 unsigned int offset
;
2057 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2058 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2062 static unw_rec_list
*
2063 output_fpsr_sprel (offset
)
2064 unsigned int offset
;
2066 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2067 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2071 static unw_rec_list
*
2072 output_priunat_when_gr ()
2074 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2078 static unw_rec_list
*
2079 output_priunat_when_mem ()
2081 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2085 static unw_rec_list
*
2086 output_priunat_gr (gr
)
2089 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2090 ptr
->r
.record
.p
.gr
= gr
;
2094 static unw_rec_list
*
2095 output_priunat_psprel (offset
)
2096 unsigned int offset
;
2098 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2099 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2103 static unw_rec_list
*
2104 output_priunat_sprel (offset
)
2105 unsigned int offset
;
2107 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2108 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2112 static unw_rec_list
*
2115 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2119 static unw_rec_list
*
2123 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2124 ptr
->r
.record
.p
.gr
= gr
;
2128 static unw_rec_list
*
2129 output_bsp_psprel (offset
)
2130 unsigned int offset
;
2132 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2133 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2137 static unw_rec_list
*
2138 output_bsp_sprel (offset
)
2139 unsigned int offset
;
2141 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2142 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2146 static unw_rec_list
*
2147 output_bspstore_when ()
2149 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2153 static unw_rec_list
*
2154 output_bspstore_gr (gr
)
2157 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2158 ptr
->r
.record
.p
.gr
= gr
;
2162 static unw_rec_list
*
2163 output_bspstore_psprel (offset
)
2164 unsigned int offset
;
2166 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2167 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2171 static unw_rec_list
*
2172 output_bspstore_sprel (offset
)
2173 unsigned int offset
;
2175 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2176 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2180 static unw_rec_list
*
2183 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2187 static unw_rec_list
*
2191 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2192 ptr
->r
.record
.p
.gr
= gr
;
2196 static unw_rec_list
*
2197 output_rnat_psprel (offset
)
2198 unsigned int offset
;
2200 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2201 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2205 static unw_rec_list
*
2206 output_rnat_sprel (offset
)
2207 unsigned int offset
;
2209 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2210 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2214 static unw_rec_list
*
2215 output_unwabi (abi
, context
)
2217 unsigned long context
;
2219 unw_rec_list
*ptr
= alloc_record (unwabi
);
2220 ptr
->r
.record
.p
.abi
= abi
;
2221 ptr
->r
.record
.p
.context
= context
;
2225 static unw_rec_list
*
2226 output_epilogue (unsigned long ecount
)
2228 unw_rec_list
*ptr
= alloc_record (epilogue
);
2229 ptr
->r
.record
.b
.ecount
= ecount
;
2233 static unw_rec_list
*
2234 output_label_state (unsigned long label
)
2236 unw_rec_list
*ptr
= alloc_record (label_state
);
2237 ptr
->r
.record
.b
.label
= label
;
2241 static unw_rec_list
*
2242 output_copy_state (unsigned long label
)
2244 unw_rec_list
*ptr
= alloc_record (copy_state
);
2245 ptr
->r
.record
.b
.label
= label
;
2249 static unw_rec_list
*
2250 output_spill_psprel (ab
, reg
, offset
)
2253 unsigned int offset
;
2255 unw_rec_list
*ptr
= alloc_record (spill_psprel
);
2256 ptr
->r
.record
.x
.ab
= ab
;
2257 ptr
->r
.record
.x
.reg
= reg
;
2258 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2262 static unw_rec_list
*
2263 output_spill_sprel (ab
, reg
, offset
)
2266 unsigned int offset
;
2268 unw_rec_list
*ptr
= alloc_record (spill_sprel
);
2269 ptr
->r
.record
.x
.ab
= ab
;
2270 ptr
->r
.record
.x
.reg
= reg
;
2271 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2275 static unw_rec_list
*
2276 output_spill_psprel_p (ab
, reg
, offset
, predicate
)
2279 unsigned int offset
;
2280 unsigned int predicate
;
2282 unw_rec_list
*ptr
= alloc_record (spill_psprel_p
);
2283 ptr
->r
.record
.x
.ab
= ab
;
2284 ptr
->r
.record
.x
.reg
= reg
;
2285 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2286 ptr
->r
.record
.x
.qp
= predicate
;
2290 static unw_rec_list
*
2291 output_spill_sprel_p (ab
, reg
, offset
, predicate
)
2294 unsigned int offset
;
2295 unsigned int predicate
;
2297 unw_rec_list
*ptr
= alloc_record (spill_sprel_p
);
2298 ptr
->r
.record
.x
.ab
= ab
;
2299 ptr
->r
.record
.x
.reg
= reg
;
2300 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2301 ptr
->r
.record
.x
.qp
= predicate
;
2305 static unw_rec_list
*
2306 output_spill_reg (ab
, reg
, targ_reg
, xy
)
2309 unsigned int targ_reg
;
2312 unw_rec_list
*ptr
= alloc_record (spill_reg
);
2313 ptr
->r
.record
.x
.ab
= ab
;
2314 ptr
->r
.record
.x
.reg
= reg
;
2315 ptr
->r
.record
.x
.treg
= targ_reg
;
2316 ptr
->r
.record
.x
.xy
= xy
;
2320 static unw_rec_list
*
2321 output_spill_reg_p (ab
, reg
, targ_reg
, xy
, predicate
)
2324 unsigned int targ_reg
;
2326 unsigned int predicate
;
2328 unw_rec_list
*ptr
= alloc_record (spill_reg_p
);
2329 ptr
->r
.record
.x
.ab
= ab
;
2330 ptr
->r
.record
.x
.reg
= reg
;
2331 ptr
->r
.record
.x
.treg
= targ_reg
;
2332 ptr
->r
.record
.x
.xy
= xy
;
2333 ptr
->r
.record
.x
.qp
= predicate
;
2337 /* Given a unw_rec_list process the correct format with the
2338 specified function. */
2341 process_one_record (ptr
, f
)
2345 unsigned long fr_mask
, gr_mask
;
2347 switch (ptr
->r
.type
)
2349 /* This is a dummy record that takes up no space in the output. */
2357 /* These are taken care of by prologue/prologue_gr. */
2362 if (ptr
->r
.type
== prologue_gr
)
2363 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2364 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2366 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2368 /* Output descriptor(s) for union of register spills (if any). */
2369 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2370 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2373 if ((fr_mask
& ~0xfUL
) == 0)
2374 output_P6_format (f
, fr_mem
, fr_mask
);
2377 output_P5_format (f
, gr_mask
, fr_mask
);
2382 output_P6_format (f
, gr_mem
, gr_mask
);
2383 if (ptr
->r
.record
.r
.mask
.br_mem
)
2384 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2386 /* output imask descriptor if necessary: */
2387 if (ptr
->r
.record
.r
.mask
.i
)
2388 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2389 ptr
->r
.record
.r
.imask_size
);
2393 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2397 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2398 ptr
->r
.record
.p
.size
);
2411 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2414 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2417 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2425 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2434 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2444 case bspstore_sprel
:
2446 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2449 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2452 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2455 as_bad ("spill_mask record unimplemented.");
2457 case priunat_when_gr
:
2458 case priunat_when_mem
:
2462 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2464 case priunat_psprel
:
2466 case bspstore_psprel
:
2468 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2471 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2474 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2478 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2481 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2482 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2483 ptr
->r
.record
.x
.pspoff
);
2486 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2487 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2488 ptr
->r
.record
.x
.spoff
);
2491 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2492 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2493 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2495 case spill_psprel_p
:
2496 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2497 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2498 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2501 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2502 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2503 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2506 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2507 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2508 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2512 as_bad ("record_type_not_valid");
2517 /* Given a unw_rec_list list, process all the records with
2518 the specified function. */
2520 process_unw_records (list
, f
)
2525 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2526 process_one_record (ptr
, f
);
2529 /* Determine the size of a record list in bytes. */
2531 calc_record_size (list
)
2535 process_unw_records (list
, count_output
);
2539 /* Update IMASK bitmask to reflect the fact that one or more registers
2540 of type TYPE are saved starting at instruction with index T. If N
2541 bits are set in REGMASK, it is assumed that instructions T through
2542 T+N-1 save these registers.
2546 1: instruction saves next fp reg
2547 2: instruction saves next general reg
2548 3: instruction saves next branch reg */
2550 set_imask (region
, regmask
, t
, type
)
2551 unw_rec_list
*region
;
2552 unsigned long regmask
;
2556 unsigned char *imask
;
2557 unsigned long imask_size
;
2561 imask
= region
->r
.record
.r
.mask
.i
;
2562 imask_size
= region
->r
.record
.r
.imask_size
;
2565 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2566 imask
= xmalloc (imask_size
);
2567 memset (imask
, 0, imask_size
);
2569 region
->r
.record
.r
.imask_size
= imask_size
;
2570 region
->r
.record
.r
.mask
.i
= imask
;
2574 pos
= 2 * (3 - t
% 4);
2577 if (i
>= imask_size
)
2579 as_bad ("Ignoring attempt to spill beyond end of region");
2583 imask
[i
] |= (type
& 0x3) << pos
;
2585 regmask
&= (regmask
- 1);
2595 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2596 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2597 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2601 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2602 unsigned long slot_addr
;
2604 unsigned long first_addr
;
2608 unsigned long index
= 0;
2610 /* First time we are called, the initial address and frag are invalid. */
2611 if (first_addr
== 0)
2614 /* If the two addresses are in different frags, then we need to add in
2615 the remaining size of this frag, and then the entire size of intermediate
2617 while (slot_frag
!= first_frag
)
2619 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2623 /* We can get the final addresses only during and after
2625 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2626 index
+= 3 * ((first_frag
->fr_next
->fr_address
2627 - first_frag
->fr_address
2628 - first_frag
->fr_fix
) >> 4);
2631 /* We don't know what the final addresses will be. We try our
2632 best to estimate. */
2633 switch (first_frag
->fr_type
)
2639 as_fatal ("only constant space allocation is supported");
2645 /* Take alignment into account. Assume the worst case
2646 before relaxation. */
2647 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2651 if (first_frag
->fr_symbol
)
2653 as_fatal ("only constant offsets are supported");
2657 index
+= 3 * (first_frag
->fr_offset
>> 4);
2661 /* Add in the full size of the frag converted to instruction slots. */
2662 index
+= 3 * (first_frag
->fr_fix
>> 4);
2663 /* Subtract away the initial part before first_addr. */
2664 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2665 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2667 /* Move to the beginning of the next frag. */
2668 first_frag
= first_frag
->fr_next
;
2669 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2672 /* Add in the used part of the last frag. */
2673 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2674 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2678 /* Optimize unwind record directives. */
2680 static unw_rec_list
*
2681 optimize_unw_records (list
)
2687 /* If the only unwind record is ".prologue" or ".prologue" followed
2688 by ".body", then we can optimize the unwind directives away. */
2689 if (list
->r
.type
== prologue
2690 && (list
->next
->r
.type
== endp
2691 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2697 /* Given a complete record list, process any records which have
2698 unresolved fields, (ie length counts for a prologue). After
2699 this has been run, all necessary information should be available
2700 within each record to generate an image. */
2703 fixup_unw_records (list
, before_relax
)
2707 unw_rec_list
*ptr
, *region
= 0;
2708 unsigned long first_addr
= 0, rlen
= 0, t
;
2709 fragS
*first_frag
= 0;
2711 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2713 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2714 as_bad (" Insn slot not set in unwind record.");
2715 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2716 first_addr
, first_frag
, before_relax
);
2717 switch (ptr
->r
.type
)
2725 unsigned long last_addr
= 0;
2726 fragS
*last_frag
= NULL
;
2728 first_addr
= ptr
->slot_number
;
2729 first_frag
= ptr
->slot_frag
;
2730 /* Find either the next body/prologue start, or the end of
2731 the function, and determine the size of the region. */
2732 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2733 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2734 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2736 last_addr
= last
->slot_number
;
2737 last_frag
= last
->slot_frag
;
2740 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2742 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2743 if (ptr
->r
.type
== body
)
2744 /* End of region. */
2752 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2754 /* This happens when a memory-stack-less procedure uses a
2755 ".restore sp" directive at the end of a region to pop
2757 ptr
->r
.record
.b
.t
= 0;
2768 case priunat_when_gr
:
2769 case priunat_when_mem
:
2773 ptr
->r
.record
.p
.t
= t
;
2781 case spill_psprel_p
:
2782 ptr
->r
.record
.x
.t
= t
;
2788 as_bad ("frgr_mem record before region record!\n");
2791 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2792 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2793 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2794 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2799 as_bad ("fr_mem record before region record!\n");
2802 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2803 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2808 as_bad ("gr_mem record before region record!\n");
2811 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2812 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2817 as_bad ("br_mem record before region record!\n");
2820 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2821 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2827 as_bad ("gr_gr record before region record!\n");
2830 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2835 as_bad ("br_gr record before region record!\n");
2838 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2847 /* Estimate the size of a frag before relaxing. We only have one type of frag
2848 to handle here, which is the unwind info frag. */
2851 ia64_estimate_size_before_relax (fragS
*frag
,
2852 asection
*segtype ATTRIBUTE_UNUSED
)
2857 /* ??? This code is identical to the first part of ia64_convert_frag. */
2858 list
= (unw_rec_list
*) frag
->fr_opcode
;
2859 fixup_unw_records (list
, 0);
2861 len
= calc_record_size (list
);
2862 /* pad to pointer-size boundary. */
2863 pad
= len
% md
.pointer_size
;
2865 len
+= md
.pointer_size
- pad
;
2866 /* Add 8 for the header. */
2868 /* Add a pointer for the personality offset. */
2869 if (frag
->fr_offset
)
2870 size
+= md
.pointer_size
;
2872 /* fr_var carries the max_chars that we created the fragment with.
2873 We must, of course, have allocated enough memory earlier. */
2874 assert (frag
->fr_var
>= size
);
2876 return frag
->fr_fix
+ size
;
2879 /* This function converts a rs_machine_dependent variant frag into a
2880 normal fill frag with the unwind image from the the record list. */
2882 ia64_convert_frag (fragS
*frag
)
2888 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2889 list
= (unw_rec_list
*) frag
->fr_opcode
;
2890 fixup_unw_records (list
, 0);
2892 len
= calc_record_size (list
);
2893 /* pad to pointer-size boundary. */
2894 pad
= len
% md
.pointer_size
;
2896 len
+= md
.pointer_size
- pad
;
2897 /* Add 8 for the header. */
2899 /* Add a pointer for the personality offset. */
2900 if (frag
->fr_offset
)
2901 size
+= md
.pointer_size
;
2903 /* fr_var carries the max_chars that we created the fragment with.
2904 We must, of course, have allocated enough memory earlier. */
2905 assert (frag
->fr_var
>= size
);
2907 /* Initialize the header area. fr_offset is initialized with
2908 unwind.personality_routine. */
2909 if (frag
->fr_offset
)
2911 if (md
.flags
& EF_IA_64_ABI64
)
2912 flag_value
= (bfd_vma
) 3 << 32;
2914 /* 32-bit unwind info block. */
2915 flag_value
= (bfd_vma
) 0x1003 << 32;
2920 md_number_to_chars (frag
->fr_literal
,
2921 (((bfd_vma
) 1 << 48) /* Version. */
2922 | flag_value
/* U & E handler flags. */
2923 | (len
/ md
.pointer_size
)), /* Length. */
2926 /* Skip the header. */
2927 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
2928 process_unw_records (list
, output_vbyte_mem
);
2930 /* Fill the padding bytes with zeros. */
2932 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
2933 md
.pointer_size
- pad
);
2935 frag
->fr_fix
+= size
;
2936 frag
->fr_type
= rs_fill
;
2938 frag
->fr_offset
= 0;
2942 convert_expr_to_ab_reg (e
, ab
, regp
)
2949 if (e
->X_op
!= O_register
)
2952 reg
= e
->X_add_number
;
2953 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2956 *regp
= reg
- REG_GR
;
2958 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
2959 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
2962 *regp
= reg
- REG_FR
;
2964 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
2967 *regp
= reg
- REG_BR
;
2974 case REG_PR
: *regp
= 0; break;
2975 case REG_PSP
: *regp
= 1; break;
2976 case REG_PRIUNAT
: *regp
= 2; break;
2977 case REG_BR
+ 0: *regp
= 3; break;
2978 case REG_AR
+ AR_BSP
: *regp
= 4; break;
2979 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
2980 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
2981 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
2982 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
2983 case REG_AR
+ AR_PFS
: *regp
= 9; break;
2984 case REG_AR
+ AR_LC
: *regp
= 10; break;
2994 convert_expr_to_xy_reg (e
, xy
, regp
)
3001 if (e
->X_op
!= O_register
)
3004 reg
= e
->X_add_number
;
3006 if (/* reg >= REG_GR && */ reg
<= (REG_GR
+ 127))
3009 *regp
= reg
- REG_GR
;
3011 else if (reg
>= REG_FR
&& reg
<= (REG_FR
+ 127))
3014 *regp
= reg
- REG_FR
;
3016 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3019 *regp
= reg
- REG_BR
;
3029 /* The current frag is an alignment frag. */
3030 align_frag
= frag_now
;
3031 s_align_bytes (arg
);
3036 int dummy ATTRIBUTE_UNUSED
;
3041 radix
= *input_line_pointer
++;
3043 if (radix
!= 'C' && !is_end_of_line
[(unsigned char) radix
])
3045 as_bad ("Radix `%c' unsupported", *input_line_pointer
);
3046 ignore_rest_of_line ();
3051 /* Helper function for .loc directives. If the assembler is not generating
3052 line number info, then we need to remember which instructions have a .loc
3053 directive, and only call dwarf2_gen_line_info for those instructions. */
3058 CURR_SLOT
.loc_directive_seen
= 1;
3059 dwarf2_directive_loc (x
);
3062 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3064 dot_special_section (which
)
3067 set_section ((char *) special_section_name
[which
]);
3071 add_unwind_entry (ptr
)
3075 unwind
.tail
->next
= ptr
;
3080 /* The current entry can in fact be a chain of unwind entries. */
3081 if (unwind
.current_entry
== NULL
)
3082 unwind
.current_entry
= ptr
;
3087 int dummy ATTRIBUTE_UNUSED
;
3093 if (e
.X_op
!= O_constant
)
3094 as_bad ("Operand to .fframe must be a constant");
3096 add_unwind_entry (output_mem_stack_f (e
.X_add_number
));
3101 int dummy ATTRIBUTE_UNUSED
;
3107 reg
= e
.X_add_number
- REG_GR
;
3108 if (e
.X_op
== O_register
&& reg
< 128)
3110 add_unwind_entry (output_mem_stack_v ());
3111 if (! (unwind
.prologue_mask
& 2))
3112 add_unwind_entry (output_psp_gr (reg
));
3115 as_bad ("First operand to .vframe must be a general register");
3119 dot_vframesp (dummy
)
3120 int dummy ATTRIBUTE_UNUSED
;
3125 if (e
.X_op
== O_constant
)
3127 add_unwind_entry (output_mem_stack_v ());
3128 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3131 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3135 dot_vframepsp (dummy
)
3136 int dummy ATTRIBUTE_UNUSED
;
3141 if (e
.X_op
== O_constant
)
3143 add_unwind_entry (output_mem_stack_v ());
3144 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3147 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3152 int dummy ATTRIBUTE_UNUSED
;
3158 sep
= parse_operand (&e1
);
3160 as_bad ("No second operand to .save");
3161 sep
= parse_operand (&e2
);
3163 reg1
= e1
.X_add_number
;
3164 reg2
= e2
.X_add_number
- REG_GR
;
3166 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3167 if (e1
.X_op
== O_register
)
3169 if (e2
.X_op
== O_register
&& reg2
>= 0 && reg2
< 128)
3173 case REG_AR
+ AR_BSP
:
3174 add_unwind_entry (output_bsp_when ());
3175 add_unwind_entry (output_bsp_gr (reg2
));
3177 case REG_AR
+ AR_BSPSTORE
:
3178 add_unwind_entry (output_bspstore_when ());
3179 add_unwind_entry (output_bspstore_gr (reg2
));
3181 case REG_AR
+ AR_RNAT
:
3182 add_unwind_entry (output_rnat_when ());
3183 add_unwind_entry (output_rnat_gr (reg2
));
3185 case REG_AR
+ AR_UNAT
:
3186 add_unwind_entry (output_unat_when ());
3187 add_unwind_entry (output_unat_gr (reg2
));
3189 case REG_AR
+ AR_FPSR
:
3190 add_unwind_entry (output_fpsr_when ());
3191 add_unwind_entry (output_fpsr_gr (reg2
));
3193 case REG_AR
+ AR_PFS
:
3194 add_unwind_entry (output_pfs_when ());
3195 if (! (unwind
.prologue_mask
& 4))
3196 add_unwind_entry (output_pfs_gr (reg2
));
3198 case REG_AR
+ AR_LC
:
3199 add_unwind_entry (output_lc_when ());
3200 add_unwind_entry (output_lc_gr (reg2
));
3203 add_unwind_entry (output_rp_when ());
3204 if (! (unwind
.prologue_mask
& 8))
3205 add_unwind_entry (output_rp_gr (reg2
));
3208 add_unwind_entry (output_preds_when ());
3209 if (! (unwind
.prologue_mask
& 1))
3210 add_unwind_entry (output_preds_gr (reg2
));
3213 add_unwind_entry (output_priunat_when_gr ());
3214 add_unwind_entry (output_priunat_gr (reg2
));
3217 as_bad ("First operand not a valid register");
3221 as_bad (" Second operand not a valid register");
3224 as_bad ("First operand not a register");
3229 int dummy ATTRIBUTE_UNUSED
;
3232 unsigned long ecount
; /* # of _additional_ regions to pop */
3235 sep
= parse_operand (&e1
);
3236 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3238 as_bad ("First operand to .restore must be stack pointer (sp)");
3244 parse_operand (&e2
);
3245 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3247 as_bad ("Second operand to .restore must be a constant >= 0");
3250 ecount
= e2
.X_add_number
;
3253 ecount
= unwind
.prologue_count
- 1;
3255 if (ecount
>= unwind
.prologue_count
)
3257 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3258 ecount
+ 1, unwind
.prologue_count
);
3262 add_unwind_entry (output_epilogue (ecount
));
3264 if (ecount
< unwind
.prologue_count
)
3265 unwind
.prologue_count
-= ecount
+ 1;
3267 unwind
.prologue_count
= 0;
3271 dot_restorereg (dummy
)
3272 int dummy ATTRIBUTE_UNUSED
;
3274 unsigned int ab
, reg
;
3279 if (!convert_expr_to_ab_reg (&e
, &ab
, ®
))
3281 as_bad ("First operand to .restorereg must be a preserved register");
3284 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0));
3288 dot_restorereg_p (dummy
)
3289 int dummy ATTRIBUTE_UNUSED
;
3291 unsigned int qp
, ab
, reg
;
3295 sep
= parse_operand (&e1
);
3298 as_bad ("No second operand to .restorereg.p");
3302 parse_operand (&e2
);
3304 qp
= e1
.X_add_number
- REG_P
;
3305 if (e1
.X_op
!= O_register
|| qp
> 63)
3307 as_bad ("First operand to .restorereg.p must be a predicate");
3311 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3313 as_bad ("Second operand to .restorereg.p must be a preserved register");
3316 add_unwind_entry (output_spill_reg_p (ab
, reg
, 0, 0, qp
));
3319 static char *special_linkonce_name
[] =
3321 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3325 start_unwind_section (const segT text_seg
, int sec_index
, int linkonce_empty
)
3328 Use a slightly ugly scheme to derive the unwind section names from
3329 the text section name:
3331 text sect. unwind table sect.
3332 name: name: comments:
3333 ---------- ----------------- --------------------------------
3335 .text.foo .IA_64.unwind.text.foo
3336 .foo .IA_64.unwind.foo
3338 .gnu.linkonce.ia64unw.foo
3339 _info .IA_64.unwind_info gas issues error message (ditto)
3340 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3342 This mapping is done so that:
3344 (a) An object file with unwind info only in .text will use
3345 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3346 This follows the letter of the ABI and also ensures backwards
3347 compatibility with older toolchains.
3349 (b) An object file with unwind info in multiple text sections
3350 will use separate unwind sections for each text section.
3351 This allows us to properly set the "sh_info" and "sh_link"
3352 fields in SHT_IA_64_UNWIND as required by the ABI and also
3353 lets GNU ld support programs with multiple segments
3354 containing unwind info (as might be the case for certain
3355 embedded applications).
3357 (c) An error is issued if there would be a name clash.
3360 const char *text_name
, *sec_text_name
;
3362 const char *prefix
= special_section_name
[sec_index
];
3364 size_t prefix_len
, suffix_len
, sec_name_len
;
3366 sec_text_name
= segment_name (text_seg
);
3367 text_name
= sec_text_name
;
3368 if (strncmp (text_name
, "_info", 5) == 0)
3370 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3372 ignore_rest_of_line ();
3375 if (strcmp (text_name
, ".text") == 0)
3378 /* Build the unwind section name by appending the (possibly stripped)
3379 text section name to the unwind prefix. */
3381 if (strncmp (text_name
, ".gnu.linkonce.t.",
3382 sizeof (".gnu.linkonce.t.") - 1) == 0)
3384 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3385 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3387 else if (linkonce_empty
)
3390 prefix_len
= strlen (prefix
);
3391 suffix_len
= strlen (suffix
);
3392 sec_name_len
= prefix_len
+ suffix_len
;
3393 sec_name
= alloca (sec_name_len
+ 1);
3394 memcpy (sec_name
, prefix
, prefix_len
);
3395 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3396 sec_name
[sec_name_len
] = '\0';
3398 /* Handle COMDAT group. */
3399 if (suffix
== text_name
&& (text_seg
->flags
& SEC_LINK_ONCE
) != 0)
3402 size_t len
, group_name_len
;
3403 const char *group_name
= elf_group_name (text_seg
);
3405 if (group_name
== NULL
)
3407 as_bad ("Group section `%s' has no group signature",
3409 ignore_rest_of_line ();
3412 /* We have to construct a fake section directive. */
3413 group_name_len
= strlen (group_name
);
3415 + 16 /* ,"aG",@progbits, */
3416 + group_name_len
/* ,group_name */
3419 section
= alloca (len
+ 1);
3420 memcpy (section
, sec_name
, sec_name_len
);
3421 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3422 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3423 memcpy (section
+ len
- 7, ",comdat", 7);
3424 section
[len
] = '\0';
3425 set_section (section
);
3429 set_section (sec_name
);
3430 bfd_set_section_flags (stdoutput
, now_seg
,
3431 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3434 elf_linked_to_section (now_seg
) = text_seg
;
3438 generate_unwind_image (const segT text_seg
)
3443 /* Mark the end of the unwind info, so that we can compute the size of the
3444 last unwind region. */
3445 add_unwind_entry (output_endp ());
3447 /* Force out pending instructions, to make sure all unwind records have
3448 a valid slot_number field. */
3449 ia64_flush_insns ();
3451 /* Generate the unwind record. */
3452 list
= optimize_unw_records (unwind
.list
);
3453 fixup_unw_records (list
, 1);
3454 size
= calc_record_size (list
);
3456 if (size
> 0 || unwind
.force_unwind_entry
)
3458 unwind
.force_unwind_entry
= 0;
3459 /* pad to pointer-size boundary. */
3460 pad
= size
% md
.pointer_size
;
3462 size
+= md
.pointer_size
- pad
;
3463 /* Add 8 for the header. */
3465 /* Add a pointer for the personality offset. */
3466 if (unwind
.personality_routine
)
3467 size
+= md
.pointer_size
;
3470 /* If there are unwind records, switch sections, and output the info. */
3474 bfd_reloc_code_real_type reloc
;
3476 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
, 0);
3478 /* Make sure the section has 4 byte alignment for ILP32 and
3479 8 byte alignment for LP64. */
3480 frag_align (md
.pointer_size_shift
, 0, 0);
3481 record_alignment (now_seg
, md
.pointer_size_shift
);
3483 /* Set expression which points to start of unwind descriptor area. */
3484 unwind
.info
= expr_build_dot ();
3486 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3487 (offsetT
) (long) unwind
.personality_routine
,
3490 /* Add the personality address to the image. */
3491 if (unwind
.personality_routine
!= 0)
3493 exp
.X_op
= O_symbol
;
3494 exp
.X_add_symbol
= unwind
.personality_routine
;
3495 exp
.X_add_number
= 0;
3497 if (md
.flags
& EF_IA_64_BE
)
3499 if (md
.flags
& EF_IA_64_ABI64
)
3500 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3502 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3506 if (md
.flags
& EF_IA_64_ABI64
)
3507 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3509 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3512 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3513 md
.pointer_size
, &exp
, 0, reloc
);
3514 unwind
.personality_routine
= 0;
3518 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
, 1);
3520 free_saved_prologue_counts ();
3521 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3525 dot_handlerdata (dummy
)
3526 int dummy ATTRIBUTE_UNUSED
;
3528 unwind
.force_unwind_entry
= 1;
3530 /* Remember which segment we're in so we can switch back after .endp */
3531 unwind
.saved_text_seg
= now_seg
;
3532 unwind
.saved_text_subseg
= now_subseg
;
3534 /* Generate unwind info into unwind-info section and then leave that
3535 section as the currently active one so dataXX directives go into
3536 the language specific data area of the unwind info block. */
3537 generate_unwind_image (now_seg
);
3538 demand_empty_rest_of_line ();
3542 dot_unwentry (dummy
)
3543 int dummy ATTRIBUTE_UNUSED
;
3545 unwind
.force_unwind_entry
= 1;
3546 demand_empty_rest_of_line ();
3551 int dummy ATTRIBUTE_UNUSED
;
3557 reg
= e
.X_add_number
- REG_BR
;
3558 if (e
.X_op
== O_register
&& reg
< 8)
3559 add_unwind_entry (output_rp_br (reg
));
3561 as_bad ("First operand not a valid branch register");
3565 dot_savemem (psprel
)
3572 sep
= parse_operand (&e1
);
3574 as_bad ("No second operand to .save%ssp", psprel
? "p" : "");
3575 sep
= parse_operand (&e2
);
3577 reg1
= e1
.X_add_number
;
3578 val
= e2
.X_add_number
;
3580 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3581 if (e1
.X_op
== O_register
)
3583 if (e2
.X_op
== O_constant
)
3587 case REG_AR
+ AR_BSP
:
3588 add_unwind_entry (output_bsp_when ());
3589 add_unwind_entry ((psprel
3591 : output_bsp_sprel
) (val
));
3593 case REG_AR
+ AR_BSPSTORE
:
3594 add_unwind_entry (output_bspstore_when ());
3595 add_unwind_entry ((psprel
3596 ? output_bspstore_psprel
3597 : output_bspstore_sprel
) (val
));
3599 case REG_AR
+ AR_RNAT
:
3600 add_unwind_entry (output_rnat_when ());
3601 add_unwind_entry ((psprel
3602 ? output_rnat_psprel
3603 : output_rnat_sprel
) (val
));
3605 case REG_AR
+ AR_UNAT
:
3606 add_unwind_entry (output_unat_when ());
3607 add_unwind_entry ((psprel
3608 ? output_unat_psprel
3609 : output_unat_sprel
) (val
));
3611 case REG_AR
+ AR_FPSR
:
3612 add_unwind_entry (output_fpsr_when ());
3613 add_unwind_entry ((psprel
3614 ? output_fpsr_psprel
3615 : output_fpsr_sprel
) (val
));
3617 case REG_AR
+ AR_PFS
:
3618 add_unwind_entry (output_pfs_when ());
3619 add_unwind_entry ((psprel
3621 : output_pfs_sprel
) (val
));
3623 case REG_AR
+ AR_LC
:
3624 add_unwind_entry (output_lc_when ());
3625 add_unwind_entry ((psprel
3627 : output_lc_sprel
) (val
));
3630 add_unwind_entry (output_rp_when ());
3631 add_unwind_entry ((psprel
3633 : output_rp_sprel
) (val
));
3636 add_unwind_entry (output_preds_when ());
3637 add_unwind_entry ((psprel
3638 ? output_preds_psprel
3639 : output_preds_sprel
) (val
));
3642 add_unwind_entry (output_priunat_when_mem ());
3643 add_unwind_entry ((psprel
3644 ? output_priunat_psprel
3645 : output_priunat_sprel
) (val
));
3648 as_bad ("First operand not a valid register");
3652 as_bad (" Second operand not a valid constant");
3655 as_bad ("First operand not a register");
3660 int dummy ATTRIBUTE_UNUSED
;
3664 sep
= parse_operand (&e1
);
3666 parse_operand (&e2
);
3668 if (e1
.X_op
!= O_constant
)
3669 as_bad ("First operand to .save.g must be a constant.");
3672 int grmask
= e1
.X_add_number
;
3674 add_unwind_entry (output_gr_mem (grmask
));
3677 int reg
= e2
.X_add_number
- REG_GR
;
3678 if (e2
.X_op
== O_register
&& reg
>= 0 && reg
< 128)
3679 add_unwind_entry (output_gr_gr (grmask
, reg
));
3681 as_bad ("Second operand is an invalid register.");
3688 int dummy ATTRIBUTE_UNUSED
;
3692 sep
= parse_operand (&e1
);
3694 if (e1
.X_op
!= O_constant
)
3695 as_bad ("Operand to .save.f must be a constant.");
3697 add_unwind_entry (output_fr_mem (e1
.X_add_number
));
3702 int dummy ATTRIBUTE_UNUSED
;
3709 sep
= parse_operand (&e1
);
3710 if (e1
.X_op
!= O_constant
)
3712 as_bad ("First operand to .save.b must be a constant.");
3715 brmask
= e1
.X_add_number
;
3719 sep
= parse_operand (&e2
);
3720 reg
= e2
.X_add_number
- REG_GR
;
3721 if (e2
.X_op
!= O_register
|| reg
> 127)
3723 as_bad ("Second operand to .save.b must be a general register.");
3726 add_unwind_entry (output_br_gr (brmask
, e2
.X_add_number
));
3729 add_unwind_entry (output_br_mem (brmask
));
3731 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3732 demand_empty_rest_of_line ();
3737 int dummy ATTRIBUTE_UNUSED
;
3741 sep
= parse_operand (&e1
);
3743 parse_operand (&e2
);
3745 if (e1
.X_op
!= O_constant
|| sep
!= ',' || e2
.X_op
!= O_constant
)
3746 as_bad ("Both operands of .save.gf must be constants.");
3749 int grmask
= e1
.X_add_number
;
3750 int frmask
= e2
.X_add_number
;
3751 add_unwind_entry (output_frgr_mem (grmask
, frmask
));
3757 int dummy ATTRIBUTE_UNUSED
;
3762 sep
= parse_operand (&e
);
3763 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3764 demand_empty_rest_of_line ();
3766 if (e
.X_op
!= O_constant
)
3767 as_bad ("Operand to .spill must be a constant");
3769 add_unwind_entry (output_spill_base (e
.X_add_number
));
3773 dot_spillreg (dummy
)
3774 int dummy ATTRIBUTE_UNUSED
;
3776 int sep
, ab
, xy
, reg
, treg
;
3779 sep
= parse_operand (&e1
);
3782 as_bad ("No second operand to .spillreg");
3786 parse_operand (&e2
);
3788 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3790 as_bad ("First operand to .spillreg must be a preserved register");
3794 if (!convert_expr_to_xy_reg (&e2
, &xy
, &treg
))
3796 as_bad ("Second operand to .spillreg must be a register");
3800 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
));
3804 dot_spillmem (psprel
)
3810 sep
= parse_operand (&e1
);
3813 as_bad ("Second operand missing");
3817 parse_operand (&e2
);
3819 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3821 as_bad ("First operand to .spill%s must be a preserved register",
3822 psprel
? "psp" : "sp");
3826 if (e2
.X_op
!= O_constant
)
3828 as_bad ("Second operand to .spill%s must be a constant",
3829 psprel
? "psp" : "sp");
3834 add_unwind_entry (output_spill_psprel (ab
, reg
, e2
.X_add_number
));
3836 add_unwind_entry (output_spill_sprel (ab
, reg
, e2
.X_add_number
));
3840 dot_spillreg_p (dummy
)
3841 int dummy ATTRIBUTE_UNUSED
;
3843 int sep
, ab
, xy
, reg
, treg
;
3844 expressionS e1
, e2
, e3
;
3847 sep
= parse_operand (&e1
);
3850 as_bad ("No second and third operand to .spillreg.p");
3854 sep
= parse_operand (&e2
);
3857 as_bad ("No third operand to .spillreg.p");
3861 parse_operand (&e3
);
3863 qp
= e1
.X_add_number
- REG_P
;
3865 if (e1
.X_op
!= O_register
|| qp
> 63)
3867 as_bad ("First operand to .spillreg.p must be a predicate");
3871 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3873 as_bad ("Second operand to .spillreg.p must be a preserved register");
3877 if (!convert_expr_to_xy_reg (&e3
, &xy
, &treg
))
3879 as_bad ("Third operand to .spillreg.p must be a register");
3883 add_unwind_entry (output_spill_reg_p (ab
, reg
, treg
, xy
, qp
));
3887 dot_spillmem_p (psprel
)
3890 expressionS e1
, e2
, e3
;
3894 sep
= parse_operand (&e1
);
3897 as_bad ("Second operand missing");
3901 parse_operand (&e2
);
3904 as_bad ("Second operand missing");
3908 parse_operand (&e3
);
3910 qp
= e1
.X_add_number
- REG_P
;
3911 if (e1
.X_op
!= O_register
|| qp
> 63)
3913 as_bad ("First operand to .spill%s_p must be a predicate",
3914 psprel
? "psp" : "sp");
3918 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3920 as_bad ("Second operand to .spill%s_p must be a preserved register",
3921 psprel
? "psp" : "sp");
3925 if (e3
.X_op
!= O_constant
)
3927 as_bad ("Third operand to .spill%s_p must be a constant",
3928 psprel
? "psp" : "sp");
3933 add_unwind_entry (output_spill_psprel_p (ab
, reg
, e3
.X_add_number
, qp
));
3935 add_unwind_entry (output_spill_sprel_p (ab
, reg
, e3
.X_add_number
, qp
));
3939 get_saved_prologue_count (lbl
)
3942 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3944 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
3948 return lpc
->prologue_count
;
3950 as_bad ("Missing .label_state %ld", lbl
);
3955 save_prologue_count (lbl
, count
)
3959 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3961 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
3965 lpc
->prologue_count
= count
;
3968 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
3970 new_lpc
->next
= unwind
.saved_prologue_counts
;
3971 new_lpc
->label_number
= lbl
;
3972 new_lpc
->prologue_count
= count
;
3973 unwind
.saved_prologue_counts
= new_lpc
;
3978 free_saved_prologue_counts ()
3980 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3981 label_prologue_count
*next
;
3990 unwind
.saved_prologue_counts
= NULL
;
3994 dot_label_state (dummy
)
3995 int dummy ATTRIBUTE_UNUSED
;
4000 if (e
.X_op
!= O_constant
)
4002 as_bad ("Operand to .label_state must be a constant");
4005 add_unwind_entry (output_label_state (e
.X_add_number
));
4006 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4010 dot_copy_state (dummy
)
4011 int dummy ATTRIBUTE_UNUSED
;
4016 if (e
.X_op
!= O_constant
)
4018 as_bad ("Operand to .copy_state must be a constant");
4021 add_unwind_entry (output_copy_state (e
.X_add_number
));
4022 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4027 int dummy ATTRIBUTE_UNUSED
;
4032 sep
= parse_operand (&e1
);
4035 as_bad ("Second operand to .unwabi missing");
4038 sep
= parse_operand (&e2
);
4039 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4040 demand_empty_rest_of_line ();
4042 if (e1
.X_op
!= O_constant
)
4044 as_bad ("First operand to .unwabi must be a constant");
4048 if (e2
.X_op
!= O_constant
)
4050 as_bad ("Second operand to .unwabi must be a constant");
4054 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
));
4058 dot_personality (dummy
)
4059 int dummy ATTRIBUTE_UNUSED
;
4063 name
= input_line_pointer
;
4064 c
= get_symbol_end ();
4065 p
= input_line_pointer
;
4066 unwind
.personality_routine
= symbol_find_or_make (name
);
4067 unwind
.force_unwind_entry
= 1;
4070 demand_empty_rest_of_line ();
4075 int dummy ATTRIBUTE_UNUSED
;
4080 unwind
.proc_start
= expr_build_dot ();
4081 /* Parse names of main and alternate entry points and mark them as
4082 function symbols: */
4086 name
= input_line_pointer
;
4087 c
= get_symbol_end ();
4088 p
= input_line_pointer
;
4089 sym
= symbol_find_or_make (name
);
4090 if (unwind
.proc_start
== 0)
4092 unwind
.proc_start
= sym
;
4094 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4097 if (*input_line_pointer
!= ',')
4099 ++input_line_pointer
;
4101 demand_empty_rest_of_line ();
4104 unwind
.prologue_count
= 0;
4105 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4106 unwind
.personality_routine
= 0;
4111 int dummy ATTRIBUTE_UNUSED
;
4113 unwind
.prologue
= 0;
4114 unwind
.prologue_mask
= 0;
4116 add_unwind_entry (output_body ());
4117 demand_empty_rest_of_line ();
4121 dot_prologue (dummy
)
4122 int dummy ATTRIBUTE_UNUSED
;
4125 int mask
= 0, grsave
= 0;
4127 if (!is_it_end_of_statement ())
4130 sep
= parse_operand (&e1
);
4132 as_bad ("No second operand to .prologue");
4133 sep
= parse_operand (&e2
);
4134 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4135 demand_empty_rest_of_line ();
4137 if (e1
.X_op
== O_constant
)
4139 mask
= e1
.X_add_number
;
4141 if (e2
.X_op
== O_constant
)
4142 grsave
= e2
.X_add_number
;
4143 else if (e2
.X_op
== O_register
4144 && (grsave
= e2
.X_add_number
- REG_GR
) < 128)
4147 as_bad ("Second operand not a constant or general register");
4149 add_unwind_entry (output_prologue_gr (mask
, grsave
));
4152 as_bad ("First operand not a constant");
4155 add_unwind_entry (output_prologue ());
4157 unwind
.prologue
= 1;
4158 unwind
.prologue_mask
= mask
;
4159 ++unwind
.prologue_count
;
4164 int dummy ATTRIBUTE_UNUSED
;
4168 int bytes_per_address
;
4171 subsegT saved_subseg
;
4175 if (unwind
.saved_text_seg
)
4177 saved_seg
= unwind
.saved_text_seg
;
4178 saved_subseg
= unwind
.saved_text_subseg
;
4179 unwind
.saved_text_seg
= NULL
;
4183 saved_seg
= now_seg
;
4184 saved_subseg
= now_subseg
;
4187 insn_group_break (1, 0, 0);
4189 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4191 generate_unwind_image (saved_seg
);
4193 if (unwind
.info
|| unwind
.force_unwind_entry
)
4195 subseg_set (md
.last_text_seg
, 0);
4196 unwind
.proc_end
= expr_build_dot ();
4198 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
, 0);
4200 /* Make sure that section has 4 byte alignment for ILP32 and
4201 8 byte alignment for LP64. */
4202 record_alignment (now_seg
, md
.pointer_size_shift
);
4204 /* Need space for 3 pointers for procedure start, procedure end,
4206 ptr
= frag_more (3 * md
.pointer_size
);
4207 where
= frag_now_fix () - (3 * md
.pointer_size
);
4208 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4210 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4211 e
.X_op
= O_pseudo_fixup
;
4212 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4214 e
.X_add_symbol
= unwind
.proc_start
;
4215 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4217 e
.X_op
= O_pseudo_fixup
;
4218 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4220 e
.X_add_symbol
= unwind
.proc_end
;
4221 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4222 bytes_per_address
, &e
);
4226 e
.X_op
= O_pseudo_fixup
;
4227 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4229 e
.X_add_symbol
= unwind
.info
;
4230 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4231 bytes_per_address
, &e
);
4234 md_number_to_chars (ptr
+ (bytes_per_address
* 2), 0,
4239 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
, 1);
4241 subseg_set (saved_seg
, saved_subseg
);
4243 /* Parse names of main and alternate entry points and set symbol sizes. */
4247 name
= input_line_pointer
;
4248 c
= get_symbol_end ();
4249 p
= input_line_pointer
;
4250 sym
= symbol_find (name
);
4251 if (sym
&& unwind
.proc_start
4252 && (symbol_get_bfdsym (sym
)->flags
& BSF_FUNCTION
)
4253 && S_GET_SIZE (sym
) == 0 && symbol_get_obj (sym
)->size
== NULL
)
4255 fragS
*fr
= symbol_get_frag (unwind
.proc_start
);
4256 fragS
*frag
= symbol_get_frag (sym
);
4258 /* Check whether the function label is at or beyond last
4260 while (fr
&& fr
!= frag
)
4264 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4265 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4268 symbol_get_obj (sym
)->size
=
4269 (expressionS
*) xmalloc (sizeof (expressionS
));
4270 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4271 symbol_get_obj (sym
)->size
->X_add_symbol
4272 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4273 frag_now_fix (), frag_now
);
4274 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4275 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4281 if (*input_line_pointer
!= ',')
4283 ++input_line_pointer
;
4285 demand_empty_rest_of_line ();
4286 unwind
.proc_start
= unwind
.proc_end
= unwind
.info
= 0;
4290 dot_template (template)
4293 CURR_SLOT
.user_template
= template;
4298 int dummy ATTRIBUTE_UNUSED
;
4300 int ins
, locs
, outs
, rots
;
4302 if (is_it_end_of_statement ())
4303 ins
= locs
= outs
= rots
= 0;
4306 ins
= get_absolute_expression ();
4307 if (*input_line_pointer
++ != ',')
4309 locs
= get_absolute_expression ();
4310 if (*input_line_pointer
++ != ',')
4312 outs
= get_absolute_expression ();
4313 if (*input_line_pointer
++ != ',')
4315 rots
= get_absolute_expression ();
4317 set_regstack (ins
, locs
, outs
, rots
);
4321 as_bad ("Comma expected");
4322 ignore_rest_of_line ();
4329 unsigned num_regs
, num_alloced
= 0;
4330 struct dynreg
**drpp
, *dr
;
4331 int ch
, base_reg
= 0;
4337 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4338 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4339 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4343 /* First, remove existing names from hash table. */
4344 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4346 hash_delete (md
.dynreg_hash
, dr
->name
);
4350 drpp
= &md
.dynreg
[type
];
4353 start
= input_line_pointer
;
4354 ch
= get_symbol_end ();
4355 *input_line_pointer
= ch
;
4356 len
= (input_line_pointer
- start
);
4359 if (*input_line_pointer
!= '[')
4361 as_bad ("Expected '['");
4364 ++input_line_pointer
; /* skip '[' */
4366 num_regs
= get_absolute_expression ();
4368 if (*input_line_pointer
++ != ']')
4370 as_bad ("Expected ']'");
4375 num_alloced
+= num_regs
;
4379 if (num_alloced
> md
.rot
.num_regs
)
4381 as_bad ("Used more than the declared %d rotating registers",
4387 if (num_alloced
> 96)
4389 as_bad ("Used more than the available 96 rotating registers");
4394 if (num_alloced
> 48)
4396 as_bad ("Used more than the available 48 rotating registers");
4405 name
= obstack_alloc (¬es
, len
+ 1);
4406 memcpy (name
, start
, len
);
4411 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4412 memset (*drpp
, 0, sizeof (*dr
));
4417 dr
->num_regs
= num_regs
;
4418 dr
->base
= base_reg
;
4420 base_reg
+= num_regs
;
4422 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4424 as_bad ("Attempt to redefine register set `%s'", name
);
4428 if (*input_line_pointer
!= ',')
4430 ++input_line_pointer
; /* skip comma */
4433 demand_empty_rest_of_line ();
4437 ignore_rest_of_line ();
4441 dot_byteorder (byteorder
)
4444 segment_info_type
*seginfo
= seg_info (now_seg
);
4446 if (byteorder
== -1)
4448 if (seginfo
->tc_segment_info_data
.endian
== 0)
4449 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4450 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4453 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4455 if (target_big_endian
!= byteorder
)
4457 target_big_endian
= byteorder
;
4458 if (target_big_endian
)
4460 ia64_number_to_chars
= number_to_chars_bigendian
;
4461 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4465 ia64_number_to_chars
= number_to_chars_littleendian
;
4466 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4473 int dummy ATTRIBUTE_UNUSED
;
4480 option
= input_line_pointer
;
4481 ch
= get_symbol_end ();
4482 if (strcmp (option
, "lsb") == 0)
4483 md
.flags
&= ~EF_IA_64_BE
;
4484 else if (strcmp (option
, "msb") == 0)
4485 md
.flags
|= EF_IA_64_BE
;
4486 else if (strcmp (option
, "abi32") == 0)
4487 md
.flags
&= ~EF_IA_64_ABI64
;
4488 else if (strcmp (option
, "abi64") == 0)
4489 md
.flags
|= EF_IA_64_ABI64
;
4491 as_bad ("Unknown psr option `%s'", option
);
4492 *input_line_pointer
= ch
;
4495 if (*input_line_pointer
!= ',')
4498 ++input_line_pointer
;
4501 demand_empty_rest_of_line ();
4506 int dummy ATTRIBUTE_UNUSED
;
4508 new_logical_line (0, get_absolute_expression ());
4509 demand_empty_rest_of_line ();
4513 parse_section_name ()
4519 if (*input_line_pointer
!= '"')
4521 as_bad ("Missing section name");
4522 ignore_rest_of_line ();
4525 name
= demand_copy_C_string (&len
);
4528 ignore_rest_of_line ();
4532 if (*input_line_pointer
!= ',')
4534 as_bad ("Comma expected after section name");
4535 ignore_rest_of_line ();
4538 ++input_line_pointer
; /* skip comma */
4546 char *name
= parse_section_name ();
4550 md
.keep_pending_output
= 1;
4553 obj_elf_previous (0);
4554 md
.keep_pending_output
= 0;
4557 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4560 stmt_float_cons (kind
)
4581 ia64_do_align (alignment
);
4589 int saved_auto_align
= md
.auto_align
;
4593 md
.auto_align
= saved_auto_align
;
4597 dot_xfloat_cons (kind
)
4600 char *name
= parse_section_name ();
4604 md
.keep_pending_output
= 1;
4606 stmt_float_cons (kind
);
4607 obj_elf_previous (0);
4608 md
.keep_pending_output
= 0;
4612 dot_xstringer (zero
)
4615 char *name
= parse_section_name ();
4619 md
.keep_pending_output
= 1;
4622 obj_elf_previous (0);
4623 md
.keep_pending_output
= 0;
4630 int saved_auto_align
= md
.auto_align
;
4631 char *name
= parse_section_name ();
4635 md
.keep_pending_output
= 1;
4639 md
.auto_align
= saved_auto_align
;
4640 obj_elf_previous (0);
4641 md
.keep_pending_output
= 0;
4645 dot_xfloat_cons_ua (kind
)
4648 int saved_auto_align
= md
.auto_align
;
4649 char *name
= parse_section_name ();
4653 md
.keep_pending_output
= 1;
4656 stmt_float_cons (kind
);
4657 md
.auto_align
= saved_auto_align
;
4658 obj_elf_previous (0);
4659 md
.keep_pending_output
= 0;
4662 /* .reg.val <regname>,value */
4666 int dummy ATTRIBUTE_UNUSED
;
4671 if (reg
.X_op
!= O_register
)
4673 as_bad (_("Register name expected"));
4674 ignore_rest_of_line ();
4676 else if (*input_line_pointer
++ != ',')
4678 as_bad (_("Comma expected"));
4679 ignore_rest_of_line ();
4683 valueT value
= get_absolute_expression ();
4684 int regno
= reg
.X_add_number
;
4685 if (regno
< REG_GR
|| regno
> REG_GR
+ 128)
4686 as_warn (_("Register value annotation ignored"));
4689 gr_values
[regno
- REG_GR
].known
= 1;
4690 gr_values
[regno
- REG_GR
].value
= value
;
4691 gr_values
[regno
- REG_GR
].path
= md
.path
;
4694 demand_empty_rest_of_line ();
4699 .serialize.instruction
4702 dot_serialize (type
)
4705 insn_group_break (0, 0, 0);
4707 instruction_serialization ();
4709 data_serialization ();
4710 insn_group_break (0, 0, 0);
4711 demand_empty_rest_of_line ();
4714 /* select dv checking mode
4719 A stop is inserted when changing modes
4726 if (md
.manual_bundling
)
4727 as_warn (_("Directive invalid within a bundle"));
4729 if (type
== 'E' || type
== 'A')
4730 md
.mode_explicitly_set
= 0;
4732 md
.mode_explicitly_set
= 1;
4739 if (md
.explicit_mode
)
4740 insn_group_break (1, 0, 0);
4741 md
.explicit_mode
= 0;
4745 if (!md
.explicit_mode
)
4746 insn_group_break (1, 0, 0);
4747 md
.explicit_mode
= 1;
4751 if (md
.explicit_mode
!= md
.default_explicit_mode
)
4752 insn_group_break (1, 0, 0);
4753 md
.explicit_mode
= md
.default_explicit_mode
;
4754 md
.mode_explicitly_set
= 0;
4765 for (regno
= 0; regno
< 64; regno
++)
4767 if (mask
& ((valueT
) 1 << regno
))
4769 fprintf (stderr
, "%s p%d", comma
, regno
);
4776 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4777 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4778 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4779 .pred.safe_across_calls p1 [, p2 [,...]]
4788 int p1
= -1, p2
= -1;
4792 if (*input_line_pointer
!= '"')
4794 as_bad (_("Missing predicate relation type"));
4795 ignore_rest_of_line ();
4801 char *form
= demand_copy_C_string (&len
);
4802 if (strcmp (form
, "mutex") == 0)
4804 else if (strcmp (form
, "clear") == 0)
4806 else if (strcmp (form
, "imply") == 0)
4810 as_bad (_("Unrecognized predicate relation type"));
4811 ignore_rest_of_line ();
4815 if (*input_line_pointer
== ',')
4816 ++input_line_pointer
;
4826 if (TOUPPER (*input_line_pointer
) != 'P'
4827 || (regno
= atoi (++input_line_pointer
)) < 0
4830 as_bad (_("Predicate register expected"));
4831 ignore_rest_of_line ();
4834 while (ISDIGIT (*input_line_pointer
))
4835 ++input_line_pointer
;
4842 as_warn (_("Duplicate predicate register ignored"));
4845 /* See if it's a range. */
4846 if (*input_line_pointer
== '-')
4849 ++input_line_pointer
;
4851 if (TOUPPER (*input_line_pointer
) != 'P'
4852 || (regno
= atoi (++input_line_pointer
)) < 0
4855 as_bad (_("Predicate register expected"));
4856 ignore_rest_of_line ();
4859 while (ISDIGIT (*input_line_pointer
))
4860 ++input_line_pointer
;
4864 as_bad (_("Bad register range"));
4865 ignore_rest_of_line ();
4876 if (*input_line_pointer
!= ',')
4878 ++input_line_pointer
;
4887 clear_qp_mutex (mask
);
4888 clear_qp_implies (mask
, (valueT
) 0);
4891 if (count
!= 2 || p1
== -1 || p2
== -1)
4892 as_bad (_("Predicate source and target required"));
4893 else if (p1
== 0 || p2
== 0)
4894 as_bad (_("Use of p0 is not valid in this context"));
4896 add_qp_imply (p1
, p2
);
4901 as_bad (_("At least two PR arguments expected"));
4906 as_bad (_("Use of p0 is not valid in this context"));
4909 add_qp_mutex (mask
);
4912 /* note that we don't override any existing relations */
4915 as_bad (_("At least one PR argument expected"));
4920 fprintf (stderr
, "Safe across calls: ");
4921 print_prmask (mask
);
4922 fprintf (stderr
, "\n");
4924 qp_safe_across_calls
= mask
;
4927 demand_empty_rest_of_line ();
4930 /* .entry label [, label [, ...]]
4931 Hint to DV code that the given labels are to be considered entry points.
4932 Otherwise, only global labels are considered entry points. */
4936 int dummy ATTRIBUTE_UNUSED
;
4945 name
= input_line_pointer
;
4946 c
= get_symbol_end ();
4947 symbolP
= symbol_find_or_make (name
);
4949 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
4951 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
4954 *input_line_pointer
= c
;
4956 c
= *input_line_pointer
;
4959 input_line_pointer
++;
4961 if (*input_line_pointer
== '\n')
4967 demand_empty_rest_of_line ();
4970 /* .mem.offset offset, base
4971 "base" is used to distinguish between offsets from a different base. */
4974 dot_mem_offset (dummy
)
4975 int dummy ATTRIBUTE_UNUSED
;
4977 md
.mem_offset
.hint
= 1;
4978 md
.mem_offset
.offset
= get_absolute_expression ();
4979 if (*input_line_pointer
!= ',')
4981 as_bad (_("Comma expected"));
4982 ignore_rest_of_line ();
4985 ++input_line_pointer
;
4986 md
.mem_offset
.base
= get_absolute_expression ();
4987 demand_empty_rest_of_line ();
4990 /* ia64-specific pseudo-ops: */
4991 const pseudo_typeS md_pseudo_table
[] =
4993 { "radix", dot_radix
, 0 },
4994 { "lcomm", s_lcomm_bytes
, 1 },
4995 { "loc", dot_loc
, 0 },
4996 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
4997 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
4998 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
4999 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5000 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5001 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5002 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5003 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5004 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5005 { "proc", dot_proc
, 0 },
5006 { "body", dot_body
, 0 },
5007 { "prologue", dot_prologue
, 0 },
5008 { "endp", dot_endp
, 0 },
5010 { "fframe", dot_fframe
, 0 },
5011 { "vframe", dot_vframe
, 0 },
5012 { "vframesp", dot_vframesp
, 0 },
5013 { "vframepsp", dot_vframepsp
, 0 },
5014 { "save", dot_save
, 0 },
5015 { "restore", dot_restore
, 0 },
5016 { "restorereg", dot_restorereg
, 0 },
5017 { "restorereg.p", dot_restorereg_p
, 0 },
5018 { "handlerdata", dot_handlerdata
, 0 },
5019 { "unwentry", dot_unwentry
, 0 },
5020 { "altrp", dot_altrp
, 0 },
5021 { "savesp", dot_savemem
, 0 },
5022 { "savepsp", dot_savemem
, 1 },
5023 { "save.g", dot_saveg
, 0 },
5024 { "save.f", dot_savef
, 0 },
5025 { "save.b", dot_saveb
, 0 },
5026 { "save.gf", dot_savegf
, 0 },
5027 { "spill", dot_spill
, 0 },
5028 { "spillreg", dot_spillreg
, 0 },
5029 { "spillsp", dot_spillmem
, 0 },
5030 { "spillpsp", dot_spillmem
, 1 },
5031 { "spillreg.p", dot_spillreg_p
, 0 },
5032 { "spillsp.p", dot_spillmem_p
, 0 },
5033 { "spillpsp.p", dot_spillmem_p
, 1 },
5034 { "label_state", dot_label_state
, 0 },
5035 { "copy_state", dot_copy_state
, 0 },
5036 { "unwabi", dot_unwabi
, 0 },
5037 { "personality", dot_personality
, 0 },
5039 { "estate", dot_estate
, 0 },
5041 { "mii", dot_template
, 0x0 },
5042 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5043 { "mlx", dot_template
, 0x2 },
5044 { "mmi", dot_template
, 0x4 },
5045 { "mfi", dot_template
, 0x6 },
5046 { "mmf", dot_template
, 0x7 },
5047 { "mib", dot_template
, 0x8 },
5048 { "mbb", dot_template
, 0x9 },
5049 { "bbb", dot_template
, 0xb },
5050 { "mmb", dot_template
, 0xc },
5051 { "mfb", dot_template
, 0xe },
5053 { "lb", dot_scope
, 0 },
5054 { "le", dot_scope
, 1 },
5056 { "align", dot_align
, 0 },
5057 { "regstk", dot_regstk
, 0 },
5058 { "rotr", dot_rot
, DYNREG_GR
},
5059 { "rotf", dot_rot
, DYNREG_FR
},
5060 { "rotp", dot_rot
, DYNREG_PR
},
5061 { "lsb", dot_byteorder
, 0 },
5062 { "msb", dot_byteorder
, 1 },
5063 { "psr", dot_psr
, 0 },
5064 { "alias", dot_alias
, 0 },
5065 { "secalias", dot_alias
, 1 },
5066 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5068 { "xdata1", dot_xdata
, 1 },
5069 { "xdata2", dot_xdata
, 2 },
5070 { "xdata4", dot_xdata
, 4 },
5071 { "xdata8", dot_xdata
, 8 },
5072 { "xreal4", dot_xfloat_cons
, 'f' },
5073 { "xreal8", dot_xfloat_cons
, 'd' },
5074 { "xreal10", dot_xfloat_cons
, 'x' },
5075 { "xreal16", dot_xfloat_cons
, 'X' },
5076 { "xstring", dot_xstringer
, 0 },
5077 { "xstringz", dot_xstringer
, 1 },
5079 /* unaligned versions: */
5080 { "xdata2.ua", dot_xdata_ua
, 2 },
5081 { "xdata4.ua", dot_xdata_ua
, 4 },
5082 { "xdata8.ua", dot_xdata_ua
, 8 },
5083 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5084 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5085 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5086 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5088 /* annotations/DV checking support */
5089 { "entry", dot_entry
, 0 },
5090 { "mem.offset", dot_mem_offset
, 0 },
5091 { "pred.rel", dot_pred_rel
, 0 },
5092 { "pred.rel.clear", dot_pred_rel
, 'c' },
5093 { "pred.rel.imply", dot_pred_rel
, 'i' },
5094 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5095 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5096 { "reg.val", dot_reg_val
, 0 },
5097 { "serialize.data", dot_serialize
, 0 },
5098 { "serialize.instruction", dot_serialize
, 1 },
5099 { "auto", dot_dv_mode
, 'a' },
5100 { "explicit", dot_dv_mode
, 'e' },
5101 { "default", dot_dv_mode
, 'd' },
5103 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5104 IA-64 aligns data allocation pseudo-ops by default, so we have to
5105 tell it that these ones are supposed to be unaligned. Long term,
5106 should rewrite so that only IA-64 specific data allocation pseudo-ops
5107 are aligned by default. */
5108 {"2byte", stmt_cons_ua
, 2},
5109 {"4byte", stmt_cons_ua
, 4},
5110 {"8byte", stmt_cons_ua
, 8},
5115 static const struct pseudo_opcode
5118 void (*handler
) (int);
5123 /* these are more like pseudo-ops, but don't start with a dot */
5124 { "data1", cons
, 1 },
5125 { "data2", cons
, 2 },
5126 { "data4", cons
, 4 },
5127 { "data8", cons
, 8 },
5128 { "data16", cons
, 16 },
5129 { "real4", stmt_float_cons
, 'f' },
5130 { "real8", stmt_float_cons
, 'd' },
5131 { "real10", stmt_float_cons
, 'x' },
5132 { "real16", stmt_float_cons
, 'X' },
5133 { "string", stringer
, 0 },
5134 { "stringz", stringer
, 1 },
5136 /* unaligned versions: */
5137 { "data2.ua", stmt_cons_ua
, 2 },
5138 { "data4.ua", stmt_cons_ua
, 4 },
5139 { "data8.ua", stmt_cons_ua
, 8 },
5140 { "data16.ua", stmt_cons_ua
, 16 },
5141 { "real4.ua", float_cons
, 'f' },
5142 { "real8.ua", float_cons
, 'd' },
5143 { "real10.ua", float_cons
, 'x' },
5144 { "real16.ua", float_cons
, 'X' },
5147 /* Declare a register by creating a symbol for it and entering it in
5148 the symbol table. */
5151 declare_register (name
, regnum
)
5158 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
5160 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5162 as_fatal ("Inserting \"%s\" into register table failed: %s",
5169 declare_register_set (prefix
, num_regs
, base_regnum
)
5177 for (i
= 0; i
< num_regs
; ++i
)
5179 sprintf (name
, "%s%u", prefix
, i
);
5180 declare_register (name
, base_regnum
+ i
);
5185 operand_width (opnd
)
5186 enum ia64_opnd opnd
;
5188 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5189 unsigned int bits
= 0;
5193 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5194 bits
+= odesc
->field
[i
].bits
;
5199 static enum operand_match_result
5200 operand_match (idesc
, index
, e
)
5201 const struct ia64_opcode
*idesc
;
5205 enum ia64_opnd opnd
= idesc
->operands
[index
];
5206 int bits
, relocatable
= 0;
5207 struct insn_fix
*fix
;
5214 case IA64_OPND_AR_CCV
:
5215 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5216 return OPERAND_MATCH
;
5219 case IA64_OPND_AR_CSD
:
5220 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5221 return OPERAND_MATCH
;
5224 case IA64_OPND_AR_PFS
:
5225 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5226 return OPERAND_MATCH
;
5230 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5231 return OPERAND_MATCH
;
5235 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5236 return OPERAND_MATCH
;
5240 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5241 return OPERAND_MATCH
;
5244 case IA64_OPND_PR_ROT
:
5245 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5246 return OPERAND_MATCH
;
5250 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5251 return OPERAND_MATCH
;
5254 case IA64_OPND_PSR_L
:
5255 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5256 return OPERAND_MATCH
;
5259 case IA64_OPND_PSR_UM
:
5260 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5261 return OPERAND_MATCH
;
5265 if (e
->X_op
== O_constant
)
5267 if (e
->X_add_number
== 1)
5268 return OPERAND_MATCH
;
5270 return OPERAND_OUT_OF_RANGE
;
5275 if (e
->X_op
== O_constant
)
5277 if (e
->X_add_number
== 8)
5278 return OPERAND_MATCH
;
5280 return OPERAND_OUT_OF_RANGE
;
5285 if (e
->X_op
== O_constant
)
5287 if (e
->X_add_number
== 16)
5288 return OPERAND_MATCH
;
5290 return OPERAND_OUT_OF_RANGE
;
5294 /* register operands: */
5297 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5298 && e
->X_add_number
< REG_AR
+ 128)
5299 return OPERAND_MATCH
;
5304 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5305 && e
->X_add_number
< REG_BR
+ 8)
5306 return OPERAND_MATCH
;
5310 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5311 && e
->X_add_number
< REG_CR
+ 128)
5312 return OPERAND_MATCH
;
5319 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5320 && e
->X_add_number
< REG_FR
+ 128)
5321 return OPERAND_MATCH
;
5326 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5327 && e
->X_add_number
< REG_P
+ 64)
5328 return OPERAND_MATCH
;
5334 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5335 && e
->X_add_number
< REG_GR
+ 128)
5336 return OPERAND_MATCH
;
5339 case IA64_OPND_R3_2
:
5340 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5342 if (e
->X_add_number
< REG_GR
+ 4)
5343 return OPERAND_MATCH
;
5344 else if (e
->X_add_number
< REG_GR
+ 128)
5345 return OPERAND_OUT_OF_RANGE
;
5349 /* indirect operands: */
5350 case IA64_OPND_CPUID_R3
:
5351 case IA64_OPND_DBR_R3
:
5352 case IA64_OPND_DTR_R3
:
5353 case IA64_OPND_ITR_R3
:
5354 case IA64_OPND_IBR_R3
:
5355 case IA64_OPND_MSR_R3
:
5356 case IA64_OPND_PKR_R3
:
5357 case IA64_OPND_PMC_R3
:
5358 case IA64_OPND_PMD_R3
:
5359 case IA64_OPND_RR_R3
:
5360 if (e
->X_op
== O_index
&& e
->X_op_symbol
5361 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5362 == opnd
- IA64_OPND_CPUID_R3
))
5363 return OPERAND_MATCH
;
5367 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5368 return OPERAND_MATCH
;
5371 /* immediate operands: */
5372 case IA64_OPND_CNT2a
:
5373 case IA64_OPND_LEN4
:
5374 case IA64_OPND_LEN6
:
5375 bits
= operand_width (idesc
->operands
[index
]);
5376 if (e
->X_op
== O_constant
)
5378 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5379 return OPERAND_MATCH
;
5381 return OPERAND_OUT_OF_RANGE
;
5385 case IA64_OPND_CNT2b
:
5386 if (e
->X_op
== O_constant
)
5388 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5389 return OPERAND_MATCH
;
5391 return OPERAND_OUT_OF_RANGE
;
5395 case IA64_OPND_CNT2c
:
5396 val
= e
->X_add_number
;
5397 if (e
->X_op
== O_constant
)
5399 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5400 return OPERAND_MATCH
;
5402 return OPERAND_OUT_OF_RANGE
;
5407 /* SOR must be an integer multiple of 8 */
5408 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5409 return OPERAND_OUT_OF_RANGE
;
5412 if (e
->X_op
== O_constant
)
5414 if ((bfd_vma
) e
->X_add_number
<= 96)
5415 return OPERAND_MATCH
;
5417 return OPERAND_OUT_OF_RANGE
;
5421 case IA64_OPND_IMMU62
:
5422 if (e
->X_op
== O_constant
)
5424 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5425 return OPERAND_MATCH
;
5427 return OPERAND_OUT_OF_RANGE
;
5431 /* FIXME -- need 62-bit relocation type */
5432 as_bad (_("62-bit relocation not yet implemented"));
5436 case IA64_OPND_IMMU64
:
5437 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5438 || e
->X_op
== O_subtract
)
5440 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5441 fix
->code
= BFD_RELOC_IA64_IMM64
;
5442 if (e
->X_op
!= O_subtract
)
5444 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5445 if (e
->X_op
== O_pseudo_fixup
)
5449 fix
->opnd
= idesc
->operands
[index
];
5452 ++CURR_SLOT
.num_fixups
;
5453 return OPERAND_MATCH
;
5455 else if (e
->X_op
== O_constant
)
5456 return OPERAND_MATCH
;
5459 case IA64_OPND_CCNT5
:
5460 case IA64_OPND_CNT5
:
5461 case IA64_OPND_CNT6
:
5462 case IA64_OPND_CPOS6a
:
5463 case IA64_OPND_CPOS6b
:
5464 case IA64_OPND_CPOS6c
:
5465 case IA64_OPND_IMMU2
:
5466 case IA64_OPND_IMMU7a
:
5467 case IA64_OPND_IMMU7b
:
5468 case IA64_OPND_IMMU21
:
5469 case IA64_OPND_IMMU24
:
5470 case IA64_OPND_MBTYPE4
:
5471 case IA64_OPND_MHTYPE8
:
5472 case IA64_OPND_POS6
:
5473 bits
= operand_width (idesc
->operands
[index
]);
5474 if (e
->X_op
== O_constant
)
5476 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5477 return OPERAND_MATCH
;
5479 return OPERAND_OUT_OF_RANGE
;
5483 case IA64_OPND_IMMU9
:
5484 bits
= operand_width (idesc
->operands
[index
]);
5485 if (e
->X_op
== O_constant
)
5487 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5489 int lobits
= e
->X_add_number
& 0x3;
5490 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5491 e
->X_add_number
|= (bfd_vma
) 0x3;
5492 return OPERAND_MATCH
;
5495 return OPERAND_OUT_OF_RANGE
;
5499 case IA64_OPND_IMM44
:
5500 /* least 16 bits must be zero */
5501 if ((e
->X_add_number
& 0xffff) != 0)
5502 /* XXX technically, this is wrong: we should not be issuing warning
5503 messages until we're sure this instruction pattern is going to
5505 as_warn (_("lower 16 bits of mask ignored"));
5507 if (e
->X_op
== O_constant
)
5509 if (((e
->X_add_number
>= 0
5510 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5511 || (e
->X_add_number
< 0
5512 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5515 if (e
->X_add_number
>= 0
5516 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5518 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5520 return OPERAND_MATCH
;
5523 return OPERAND_OUT_OF_RANGE
;
5527 case IA64_OPND_IMM17
:
5528 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5529 if (e
->X_op
== O_constant
)
5531 if (((e
->X_add_number
>= 0
5532 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5533 || (e
->X_add_number
< 0
5534 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5537 if (e
->X_add_number
>= 0
5538 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5540 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5542 return OPERAND_MATCH
;
5545 return OPERAND_OUT_OF_RANGE
;
5549 case IA64_OPND_IMM14
:
5550 case IA64_OPND_IMM22
:
5552 case IA64_OPND_IMM1
:
5553 case IA64_OPND_IMM8
:
5554 case IA64_OPND_IMM8U4
:
5555 case IA64_OPND_IMM8M1
:
5556 case IA64_OPND_IMM8M1U4
:
5557 case IA64_OPND_IMM8M1U8
:
5558 case IA64_OPND_IMM9a
:
5559 case IA64_OPND_IMM9b
:
5560 bits
= operand_width (idesc
->operands
[index
]);
5561 if (relocatable
&& (e
->X_op
== O_symbol
5562 || e
->X_op
== O_subtract
5563 || e
->X_op
== O_pseudo_fixup
))
5565 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5567 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5568 fix
->code
= BFD_RELOC_IA64_IMM14
;
5570 fix
->code
= BFD_RELOC_IA64_IMM22
;
5572 if (e
->X_op
!= O_subtract
)
5574 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5575 if (e
->X_op
== O_pseudo_fixup
)
5579 fix
->opnd
= idesc
->operands
[index
];
5582 ++CURR_SLOT
.num_fixups
;
5583 return OPERAND_MATCH
;
5585 else if (e
->X_op
!= O_constant
5586 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5587 return OPERAND_MISMATCH
;
5589 if (opnd
== IA64_OPND_IMM8M1U4
)
5591 /* Zero is not valid for unsigned compares that take an adjusted
5592 constant immediate range. */
5593 if (e
->X_add_number
== 0)
5594 return OPERAND_OUT_OF_RANGE
;
5596 /* Sign-extend 32-bit unsigned numbers, so that the following range
5597 checks will work. */
5598 val
= e
->X_add_number
;
5599 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5600 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5601 val
= ((val
<< 32) >> 32);
5603 /* Check for 0x100000000. This is valid because
5604 0x100000000-1 is the same as ((uint32_t) -1). */
5605 if (val
== ((bfd_signed_vma
) 1 << 32))
5606 return OPERAND_MATCH
;
5610 else if (opnd
== IA64_OPND_IMM8M1U8
)
5612 /* Zero is not valid for unsigned compares that take an adjusted
5613 constant immediate range. */
5614 if (e
->X_add_number
== 0)
5615 return OPERAND_OUT_OF_RANGE
;
5617 /* Check for 0x10000000000000000. */
5618 if (e
->X_op
== O_big
)
5620 if (generic_bignum
[0] == 0
5621 && generic_bignum
[1] == 0
5622 && generic_bignum
[2] == 0
5623 && generic_bignum
[3] == 0
5624 && generic_bignum
[4] == 1)
5625 return OPERAND_MATCH
;
5627 return OPERAND_OUT_OF_RANGE
;
5630 val
= e
->X_add_number
- 1;
5632 else if (opnd
== IA64_OPND_IMM8M1
)
5633 val
= e
->X_add_number
- 1;
5634 else if (opnd
== IA64_OPND_IMM8U4
)
5636 /* Sign-extend 32-bit unsigned numbers, so that the following range
5637 checks will work. */
5638 val
= e
->X_add_number
;
5639 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5640 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5641 val
= ((val
<< 32) >> 32);
5644 val
= e
->X_add_number
;
5646 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5647 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5648 return OPERAND_MATCH
;
5650 return OPERAND_OUT_OF_RANGE
;
5652 case IA64_OPND_INC3
:
5653 /* +/- 1, 4, 8, 16 */
5654 val
= e
->X_add_number
;
5657 if (e
->X_op
== O_constant
)
5659 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5660 return OPERAND_MATCH
;
5662 return OPERAND_OUT_OF_RANGE
;
5666 case IA64_OPND_TGT25
:
5667 case IA64_OPND_TGT25b
:
5668 case IA64_OPND_TGT25c
:
5669 case IA64_OPND_TGT64
:
5670 if (e
->X_op
== O_symbol
)
5672 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5673 if (opnd
== IA64_OPND_TGT25
)
5674 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5675 else if (opnd
== IA64_OPND_TGT25b
)
5676 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5677 else if (opnd
== IA64_OPND_TGT25c
)
5678 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5679 else if (opnd
== IA64_OPND_TGT64
)
5680 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5684 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5685 fix
->opnd
= idesc
->operands
[index
];
5688 ++CURR_SLOT
.num_fixups
;
5689 return OPERAND_MATCH
;
5691 case IA64_OPND_TAG13
:
5692 case IA64_OPND_TAG13b
:
5696 return OPERAND_MATCH
;
5699 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5700 /* There are no external relocs for TAG13/TAG13b fields, so we
5701 create a dummy reloc. This will not live past md_apply_fix3. */
5702 fix
->code
= BFD_RELOC_UNUSED
;
5703 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5704 fix
->opnd
= idesc
->operands
[index
];
5707 ++CURR_SLOT
.num_fixups
;
5708 return OPERAND_MATCH
;
5715 case IA64_OPND_LDXMOV
:
5716 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5717 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5718 fix
->opnd
= idesc
->operands
[index
];
5721 ++CURR_SLOT
.num_fixups
;
5722 return OPERAND_MATCH
;
5727 return OPERAND_MISMATCH
;
5736 memset (e
, 0, sizeof (*e
));
5739 if (*input_line_pointer
!= '}')
5741 sep
= *input_line_pointer
++;
5745 if (!md
.manual_bundling
)
5746 as_warn ("Found '}' when manual bundling is off");
5748 CURR_SLOT
.manual_bundling_off
= 1;
5749 md
.manual_bundling
= 0;
5755 /* Returns the next entry in the opcode table that matches the one in
5756 IDESC, and frees the entry in IDESC. If no matching entry is
5757 found, NULL is returned instead. */
5759 static struct ia64_opcode
*
5760 get_next_opcode (struct ia64_opcode
*idesc
)
5762 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
5763 ia64_free_opcode (idesc
);
5767 /* Parse the operands for the opcode and find the opcode variant that
5768 matches the specified operands, or NULL if no match is possible. */
5770 static struct ia64_opcode
*
5771 parse_operands (idesc
)
5772 struct ia64_opcode
*idesc
;
5774 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
5775 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
5776 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
5777 enum operand_match_result result
;
5779 char *first_arg
= 0, *end
, *saved_input_pointer
;
5782 assert (strlen (idesc
->name
) <= 128);
5784 strcpy (mnemonic
, idesc
->name
);
5785 if (idesc
->operands
[2] == IA64_OPND_SOF
5786 || idesc
->operands
[1] == IA64_OPND_SOF
)
5788 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5789 can't parse the first operand until we have parsed the
5790 remaining operands of the "alloc" instruction. */
5792 first_arg
= input_line_pointer
;
5793 end
= strchr (input_line_pointer
, '=');
5796 as_bad ("Expected separator `='");
5799 input_line_pointer
= end
+ 1;
5804 for (; i
< NELEMS (CURR_SLOT
.opnd
); ++i
)
5806 sep
= parse_operand (CURR_SLOT
.opnd
+ i
);
5807 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
5812 if (sep
!= '=' && sep
!= ',')
5817 if (num_outputs
> 0)
5818 as_bad ("Duplicate equal sign (=) in instruction");
5820 num_outputs
= i
+ 1;
5825 as_bad ("Illegal operand separator `%c'", sep
);
5829 if (idesc
->operands
[2] == IA64_OPND_SOF
5830 || idesc
->operands
[1] == IA64_OPND_SOF
)
5832 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5833 know (strcmp (idesc
->name
, "alloc") == 0);
5834 i
= (CURR_SLOT
.opnd
[1].X_op
== O_register
5835 && CURR_SLOT
.opnd
[1].X_add_number
== REG_AR
+ AR_PFS
) ? 2 : 1;
5836 if (num_operands
== i
+ 3 /* first_arg not included in this count! */
5837 && CURR_SLOT
.opnd
[i
].X_op
== O_constant
5838 && CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
5839 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
5840 && CURR_SLOT
.opnd
[i
+ 3].X_op
== O_constant
)
5842 sof
= set_regstack (CURR_SLOT
.opnd
[i
].X_add_number
,
5843 CURR_SLOT
.opnd
[i
+ 1].X_add_number
,
5844 CURR_SLOT
.opnd
[i
+ 2].X_add_number
,
5845 CURR_SLOT
.opnd
[i
+ 3].X_add_number
);
5847 /* now we can parse the first arg: */
5848 saved_input_pointer
= input_line_pointer
;
5849 input_line_pointer
= first_arg
;
5850 sep
= parse_operand (CURR_SLOT
.opnd
+ 0);
5852 --num_outputs
; /* force error */
5853 input_line_pointer
= saved_input_pointer
;
5855 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
5856 CURR_SLOT
.opnd
[i
+ 1].X_add_number
5857 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
5858 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
5862 highest_unmatched_operand
= 0;
5863 curr_out_of_range_pos
= -1;
5865 expected_operand
= idesc
->operands
[0];
5866 for (; idesc
; idesc
= get_next_opcode (idesc
))
5868 if (num_outputs
!= idesc
->num_outputs
)
5869 continue; /* mismatch in # of outputs */
5871 CURR_SLOT
.num_fixups
= 0;
5873 /* Try to match all operands. If we see an out-of-range operand,
5874 then continue trying to match the rest of the operands, since if
5875 the rest match, then this idesc will give the best error message. */
5877 out_of_range_pos
= -1;
5878 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
5880 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
5881 if (result
!= OPERAND_MATCH
)
5883 if (result
!= OPERAND_OUT_OF_RANGE
)
5885 if (out_of_range_pos
< 0)
5886 /* remember position of the first out-of-range operand: */
5887 out_of_range_pos
= i
;
5891 /* If we did not match all operands, or if at least one operand was
5892 out-of-range, then this idesc does not match. Keep track of which
5893 idesc matched the most operands before failing. If we have two
5894 idescs that failed at the same position, and one had an out-of-range
5895 operand, then prefer the out-of-range operand. Thus if we have
5896 "add r0=0x1000000,r1" we get an error saying the constant is out
5897 of range instead of an error saying that the constant should have been
5900 if (i
!= num_operands
|| out_of_range_pos
>= 0)
5902 if (i
> highest_unmatched_operand
5903 || (i
== highest_unmatched_operand
5904 && out_of_range_pos
> curr_out_of_range_pos
))
5906 highest_unmatched_operand
= i
;
5907 if (out_of_range_pos
>= 0)
5909 expected_operand
= idesc
->operands
[out_of_range_pos
];
5910 error_pos
= out_of_range_pos
;
5914 expected_operand
= idesc
->operands
[i
];
5917 curr_out_of_range_pos
= out_of_range_pos
;
5922 if (num_operands
< NELEMS (idesc
->operands
)
5923 && idesc
->operands
[num_operands
])
5924 continue; /* mismatch in number of arguments */
5930 if (expected_operand
)
5931 as_bad ("Operand %u of `%s' should be %s",
5932 error_pos
+ 1, mnemonic
,
5933 elf64_ia64_operands
[expected_operand
].desc
);
5935 as_bad ("Operand mismatch");
5941 /* Keep track of state necessary to determine whether a NOP is necessary
5942 to avoid an erratum in A and B step Itanium chips, and return 1 if we
5943 detect a case where additional NOPs may be necessary. */
5945 errata_nop_necessary_p (slot
, insn_unit
)
5947 enum ia64_unit insn_unit
;
5950 struct group
*this_group
= md
.last_groups
+ md
.group_idx
;
5951 struct group
*prev_group
= md
.last_groups
+ (md
.group_idx
+ 2) % 3;
5952 struct ia64_opcode
*idesc
= slot
->idesc
;
5954 /* Test whether this could be the first insn in a problematic sequence. */
5955 if (insn_unit
== IA64_UNIT_F
)
5957 for (i
= 0; i
< idesc
->num_outputs
; i
++)
5958 if (idesc
->operands
[i
] == IA64_OPND_P1
5959 || idesc
->operands
[i
] == IA64_OPND_P2
)
5961 int regno
= slot
->opnd
[i
].X_add_number
- REG_P
;
5962 /* Ignore invalid operands; they generate errors elsewhere. */
5965 this_group
->p_reg_set
[regno
] = 1;
5969 /* Test whether this could be the second insn in a problematic sequence. */
5970 if (insn_unit
== IA64_UNIT_M
&& slot
->qp_regno
> 0
5971 && prev_group
->p_reg_set
[slot
->qp_regno
])
5973 for (i
= 0; i
< idesc
->num_outputs
; i
++)
5974 if (idesc
->operands
[i
] == IA64_OPND_R1
5975 || idesc
->operands
[i
] == IA64_OPND_R2
5976 || idesc
->operands
[i
] == IA64_OPND_R3
)
5978 int regno
= slot
->opnd
[i
].X_add_number
- REG_GR
;
5979 /* Ignore invalid operands; they generate errors elsewhere. */
5982 if (strncmp (idesc
->name
, "add", 3) != 0
5983 && strncmp (idesc
->name
, "sub", 3) != 0
5984 && strncmp (idesc
->name
, "shladd", 6) != 0
5985 && (idesc
->flags
& IA64_OPCODE_POSTINC
) == 0)
5986 this_group
->g_reg_set_conditionally
[regno
] = 1;
5990 /* Test whether this could be the third insn in a problematic sequence. */
5991 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; i
++)
5993 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
5994 idesc
->operands
[i
] == IA64_OPND_R3
5995 /* For mov indirect. */
5996 || idesc
->operands
[i
] == IA64_OPND_RR_R3
5997 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
5998 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
5999 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
6000 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
6001 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
6002 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
6003 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
6005 || idesc
->operands
[i
] == IA64_OPND_ITR_R3
6006 || idesc
->operands
[i
] == IA64_OPND_DTR_R3
6007 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
6008 || idesc
->operands
[i
] == IA64_OPND_MR3
)
6010 int regno
= slot
->opnd
[i
].X_add_number
- REG_GR
;
6011 /* Ignore invalid operands; they generate errors elsewhere. */
6014 if (idesc
->operands
[i
] == IA64_OPND_R3
)
6016 if (strcmp (idesc
->name
, "fc") != 0
6017 && strcmp (idesc
->name
, "tak") != 0
6018 && strcmp (idesc
->name
, "thash") != 0
6019 && strcmp (idesc
->name
, "tpa") != 0
6020 && strcmp (idesc
->name
, "ttag") != 0
6021 && strncmp (idesc
->name
, "ptr", 3) != 0
6022 && strncmp (idesc
->name
, "ptc", 3) != 0
6023 && strncmp (idesc
->name
, "probe", 5) != 0)
6026 if (prev_group
->g_reg_set_conditionally
[regno
])
6034 build_insn (slot
, insnp
)
6038 const struct ia64_operand
*odesc
, *o2desc
;
6039 struct ia64_opcode
*idesc
= slot
->idesc
;
6040 bfd_signed_vma insn
, val
;
6044 insn
= idesc
->opcode
| slot
->qp_regno
;
6046 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6048 if (slot
->opnd
[i
].X_op
== O_register
6049 || slot
->opnd
[i
].X_op
== O_constant
6050 || slot
->opnd
[i
].X_op
== O_index
)
6051 val
= slot
->opnd
[i
].X_add_number
;
6052 else if (slot
->opnd
[i
].X_op
== O_big
)
6054 /* This must be the value 0x10000000000000000. */
6055 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6061 switch (idesc
->operands
[i
])
6063 case IA64_OPND_IMMU64
:
6064 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6065 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6066 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6067 | (((val
>> 63) & 0x1) << 36));
6070 case IA64_OPND_IMMU62
:
6071 val
&= 0x3fffffffffffffffULL
;
6072 if (val
!= slot
->opnd
[i
].X_add_number
)
6073 as_warn (_("Value truncated to 62 bits"));
6074 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6075 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6078 case IA64_OPND_TGT64
:
6080 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6081 insn
|= ((((val
>> 59) & 0x1) << 36)
6082 | (((val
>> 0) & 0xfffff) << 13));
6113 case IA64_OPND_R3_2
:
6114 case IA64_OPND_CPUID_R3
:
6115 case IA64_OPND_DBR_R3
:
6116 case IA64_OPND_DTR_R3
:
6117 case IA64_OPND_ITR_R3
:
6118 case IA64_OPND_IBR_R3
:
6120 case IA64_OPND_MSR_R3
:
6121 case IA64_OPND_PKR_R3
:
6122 case IA64_OPND_PMC_R3
:
6123 case IA64_OPND_PMD_R3
:
6124 case IA64_OPND_RR_R3
:
6132 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6133 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6135 as_bad_where (slot
->src_file
, slot
->src_line
,
6136 "Bad operand value: %s", err
);
6137 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6139 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6140 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6142 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6143 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6145 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6146 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6147 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6149 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6150 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6160 int manual_bundling_off
= 0, manual_bundling
= 0;
6161 enum ia64_unit required_unit
, insn_unit
= 0;
6162 enum ia64_insn_type type
[3], insn_type
;
6163 unsigned int template, orig_template
;
6164 bfd_vma insn
[3] = { -1, -1, -1 };
6165 struct ia64_opcode
*idesc
;
6166 int end_of_insn_group
= 0, user_template
= -1;
6167 int n
, i
, j
, first
, curr
;
6168 unw_rec_list
*ptr
, *last_ptr
, *end_ptr
;
6169 bfd_vma t0
= 0, t1
= 0;
6170 struct label_fix
*lfix
;
6171 struct insn_fix
*ifix
;
6177 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6178 know (first
>= 0 & first
< NUM_SLOTS
);
6179 n
= MIN (3, md
.num_slots_in_use
);
6181 /* Determine template: user user_template if specified, best match
6184 if (md
.slot
[first
].user_template
>= 0)
6185 user_template
= template = md
.slot
[first
].user_template
;
6188 /* Auto select appropriate template. */
6189 memset (type
, 0, sizeof (type
));
6191 for (i
= 0; i
< n
; ++i
)
6193 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6195 type
[i
] = md
.slot
[curr
].idesc
->type
;
6196 curr
= (curr
+ 1) % NUM_SLOTS
;
6198 template = best_template
[type
[0]][type
[1]][type
[2]];
6201 /* initialize instructions with appropriate nops: */
6202 for (i
= 0; i
< 3; ++i
)
6203 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6207 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6208 from the start of the frag. */
6209 addr_mod
= frag_now_fix () & 15;
6210 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6211 as_bad (_("instruction address is not a multiple of 16"));
6212 frag_now
->insn_addr
= addr_mod
;
6213 frag_now
->has_code
= 1;
6215 /* now fill in slots with as many insns as possible: */
6217 idesc
= md
.slot
[curr
].idesc
;
6218 end_of_insn_group
= 0;
6219 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6221 /* If we have unwind records, we may need to update some now. */
6222 ptr
= md
.slot
[curr
].unwind_record
;
6225 /* Find the last prologue/body record in the list for the current
6226 insn, and set the slot number for all records up to that point.
6227 This needs to be done now, because prologue/body records refer to
6228 the current point, not the point after the instruction has been
6229 issued. This matters because there may have been nops emitted
6230 meanwhile. Any non-prologue non-body record followed by a
6231 prologue/body record must also refer to the current point. */
6233 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6234 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6235 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6236 || ptr
->r
.type
== body
)
6240 /* Make last_ptr point one after the last prologue/body
6242 last_ptr
= last_ptr
->next
;
6243 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6246 ptr
->slot_number
= (unsigned long) f
+ i
;
6247 ptr
->slot_frag
= frag_now
;
6249 /* Remove the initialized records, so that we won't accidentally
6250 update them again if we insert a nop and continue. */
6251 md
.slot
[curr
].unwind_record
= last_ptr
;
6255 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6256 if (md
.slot
[curr
].manual_bundling_on
)
6259 manual_bundling
= 1;
6261 break; /* Need to start a new bundle. */
6264 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6266 if (manual_bundling
&& !manual_bundling_off
)
6268 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6269 "`%s' must be last in bundle", idesc
->name
);
6271 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6275 if (idesc
->flags
& IA64_OPCODE_LAST
)
6278 unsigned int required_template
;
6280 /* If we need a stop bit after an M slot, our only choice is
6281 template 5 (M;;MI). If we need a stop bit after a B
6282 slot, our only choice is to place it at the end of the
6283 bundle, because the only available templates are MIB,
6284 MBB, BBB, MMB, and MFB. We don't handle anything other
6285 than M and B slots because these are the only kind of
6286 instructions that can have the IA64_OPCODE_LAST bit set. */
6287 required_template
= template;
6288 switch (idesc
->type
)
6292 required_template
= 5;
6300 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6301 "Internal error: don't know how to force %s to end"
6302 "of instruction group", idesc
->name
);
6307 && (i
> required_slot
6308 || (required_slot
== 2 && !manual_bundling_off
)
6309 || (user_template
>= 0
6310 /* Changing from MMI to M;MI is OK. */
6311 && (template ^ required_template
) > 1)))
6313 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6314 "`%s' must be last in instruction group",
6316 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6317 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6319 if (required_slot
< i
)
6320 /* Can't fit this instruction. */
6324 if (required_template
!= template)
6326 /* If we switch the template, we need to reset the NOPs
6327 after slot i. The slot-types of the instructions ahead
6328 of i never change, so we don't need to worry about
6329 changing NOPs in front of this slot. */
6330 for (j
= i
; j
< 3; ++j
)
6331 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6333 template = required_template
;
6335 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6337 if (manual_bundling
)
6339 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6340 "Label must be first in a bundle");
6341 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6343 /* This insn must go into the first slot of a bundle. */
6347 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6349 /* We need an instruction group boundary in the middle of a
6350 bundle. See if we can switch to an other template with
6351 an appropriate boundary. */
6353 orig_template
= template;
6354 if (i
== 1 && (user_template
== 4
6355 || (user_template
< 0
6356 && (ia64_templ_desc
[template].exec_unit
[0]
6360 end_of_insn_group
= 0;
6362 else if (i
== 2 && (user_template
== 0
6363 || (user_template
< 0
6364 && (ia64_templ_desc
[template].exec_unit
[1]
6366 /* This test makes sure we don't switch the template if
6367 the next instruction is one that needs to be first in
6368 an instruction group. Since all those instructions are
6369 in the M group, there is no way such an instruction can
6370 fit in this bundle even if we switch the template. The
6371 reason we have to check for this is that otherwise we
6372 may end up generating "MI;;I M.." which has the deadly
6373 effect that the second M instruction is no longer the
6374 first in the group! --davidm 99/12/16 */
6375 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6378 end_of_insn_group
= 0;
6381 && user_template
== 0
6382 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6383 /* Use the next slot. */
6385 else if (curr
!= first
)
6386 /* can't fit this insn */
6389 if (template != orig_template
)
6390 /* if we switch the template, we need to reset the NOPs
6391 after slot i. The slot-types of the instructions ahead
6392 of i never change, so we don't need to worry about
6393 changing NOPs in front of this slot. */
6394 for (j
= i
; j
< 3; ++j
)
6395 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6397 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6399 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6400 if (idesc
->type
== IA64_TYPE_DYN
)
6402 enum ia64_opnd opnd1
, opnd2
;
6404 if ((strcmp (idesc
->name
, "nop") == 0)
6405 || (strcmp (idesc
->name
, "hint") == 0)
6406 || (strcmp (idesc
->name
, "break") == 0))
6407 insn_unit
= required_unit
;
6408 else if (strcmp (idesc
->name
, "chk.s") == 0
6409 || strcmp (idesc
->name
, "mov") == 0)
6411 insn_unit
= IA64_UNIT_M
;
6412 if (required_unit
== IA64_UNIT_I
6413 || (required_unit
== IA64_UNIT_F
&& template == 6))
6414 insn_unit
= IA64_UNIT_I
;
6417 as_fatal ("emit_one_bundle: unexpected dynamic op");
6419 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbfxx"[insn_unit
]);
6420 opnd1
= idesc
->operands
[0];
6421 opnd2
= idesc
->operands
[1];
6422 ia64_free_opcode (idesc
);
6423 idesc
= ia64_find_opcode (mnemonic
);
6424 /* moves to/from ARs have collisions */
6425 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6427 while (idesc
!= NULL
6428 && (idesc
->operands
[0] != opnd1
6429 || idesc
->operands
[1] != opnd2
))
6430 idesc
= get_next_opcode (idesc
);
6434 /* no other resolved dynamic ops have collisions */
6435 know (!get_next_opcode (idesc
));
6437 md
.slot
[curr
].idesc
= idesc
;
6441 insn_type
= idesc
->type
;
6442 insn_unit
= IA64_UNIT_NIL
;
6446 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6447 insn_unit
= required_unit
;
6449 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6450 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6451 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6452 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6453 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6458 if (insn_unit
!= required_unit
)
6460 if (required_unit
== IA64_UNIT_L
6461 && insn_unit
== IA64_UNIT_I
6462 && !(idesc
->flags
& IA64_OPCODE_X_IN_MLX
))
6464 /* we got ourselves an MLX template but the current
6465 instruction isn't an X-unit, or an I-unit instruction
6466 that can go into the X slot of an MLX template. Duh. */
6467 if (md
.num_slots_in_use
>= NUM_SLOTS
)
6469 as_bad_where (md
.slot
[curr
].src_file
,
6470 md
.slot
[curr
].src_line
,
6471 "`%s' can't go in X slot of "
6472 "MLX template", idesc
->name
);
6473 /* drop this insn so we don't livelock: */
6474 --md
.num_slots_in_use
;
6478 continue; /* try next slot */
6481 if (debug_type
== DEBUG_DWARF2
|| md
.slot
[curr
].loc_directive_seen
)
6483 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6485 md
.slot
[curr
].loc_directive_seen
= 0;
6486 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6489 if (errata_nop_necessary_p (md
.slot
+ curr
, insn_unit
))
6490 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6492 build_insn (md
.slot
+ curr
, insn
+ i
);
6494 ptr
= md
.slot
[curr
].unwind_record
;
6497 /* Set slot numbers for all remaining unwind records belonging to the
6498 current insn. There can not be any prologue/body unwind records
6500 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6501 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6503 ptr
->slot_number
= (unsigned long) f
+ i
;
6504 ptr
->slot_frag
= frag_now
;
6506 md
.slot
[curr
].unwind_record
= NULL
;
6509 if (required_unit
== IA64_UNIT_L
)
6512 /* skip one slot for long/X-unit instructions */
6515 --md
.num_slots_in_use
;
6517 /* now is a good time to fix up the labels for this insn: */
6518 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6520 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6521 symbol_set_frag (lfix
->sym
, frag_now
);
6523 /* and fix up the tags also. */
6524 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6526 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6527 symbol_set_frag (lfix
->sym
, frag_now
);
6530 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6532 ifix
= md
.slot
[curr
].fixup
+ j
;
6533 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6534 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6535 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6536 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6537 fix
->fx_file
= md
.slot
[curr
].src_file
;
6538 fix
->fx_line
= md
.slot
[curr
].src_line
;
6541 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6543 if (end_of_insn_group
)
6545 md
.group_idx
= (md
.group_idx
+ 1) % 3;
6546 memset (md
.last_groups
+ md
.group_idx
, 0, sizeof md
.last_groups
[0]);
6550 ia64_free_opcode (md
.slot
[curr
].idesc
);
6551 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6552 md
.slot
[curr
].user_template
= -1;
6554 if (manual_bundling_off
)
6556 manual_bundling
= 0;
6559 curr
= (curr
+ 1) % NUM_SLOTS
;
6560 idesc
= md
.slot
[curr
].idesc
;
6562 if (manual_bundling
> 0)
6564 if (md
.num_slots_in_use
> 0)
6566 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6567 "`%s' does not fit into %s template",
6568 idesc
->name
, ia64_templ_desc
[template].name
);
6569 --md
.num_slots_in_use
;
6572 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6573 "Missing '}' at end of file");
6575 know (md
.num_slots_in_use
< NUM_SLOTS
);
6577 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6578 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6580 number_to_chars_littleendian (f
+ 0, t0
, 8);
6581 number_to_chars_littleendian (f
+ 8, t1
, 8);
6585 unwind
.list
->next_slot_number
= (unsigned long) f
+ 16;
6586 unwind
.list
->next_slot_frag
= frag_now
;
6591 md_parse_option (c
, arg
)
6598 /* Switches from the Intel assembler. */
6600 if (strcmp (arg
, "ilp64") == 0
6601 || strcmp (arg
, "lp64") == 0
6602 || strcmp (arg
, "p64") == 0)
6604 md
.flags
|= EF_IA_64_ABI64
;
6606 else if (strcmp (arg
, "ilp32") == 0)
6608 md
.flags
&= ~EF_IA_64_ABI64
;
6610 else if (strcmp (arg
, "le") == 0)
6612 md
.flags
&= ~EF_IA_64_BE
;
6613 default_big_endian
= 0;
6615 else if (strcmp (arg
, "be") == 0)
6617 md
.flags
|= EF_IA_64_BE
;
6618 default_big_endian
= 1;
6625 if (strcmp (arg
, "so") == 0)
6627 /* Suppress signon message. */
6629 else if (strcmp (arg
, "pi") == 0)
6631 /* Reject privileged instructions. FIXME */
6633 else if (strcmp (arg
, "us") == 0)
6635 /* Allow union of signed and unsigned range. FIXME */
6637 else if (strcmp (arg
, "close_fcalls") == 0)
6639 /* Do not resolve global function calls. */
6646 /* temp[="prefix"] Insert temporary labels into the object file
6647 symbol table prefixed by "prefix".
6648 Default prefix is ":temp:".
6653 /* indirect=<tgt> Assume unannotated indirect branches behavior
6654 according to <tgt> --
6655 exit: branch out from the current context (default)
6656 labels: all labels in context may be branch targets
6658 if (strncmp (arg
, "indirect=", 9) != 0)
6663 /* -X conflicts with an ignored option, use -x instead */
6665 if (!arg
|| strcmp (arg
, "explicit") == 0)
6667 /* set default mode to explicit */
6668 md
.default_explicit_mode
= 1;
6671 else if (strcmp (arg
, "auto") == 0)
6673 md
.default_explicit_mode
= 0;
6675 else if (strcmp (arg
, "debug") == 0)
6679 else if (strcmp (arg
, "debugx") == 0)
6681 md
.default_explicit_mode
= 1;
6686 as_bad (_("Unrecognized option '-x%s'"), arg
);
6691 /* nops Print nops statistics. */
6694 /* GNU specific switches for gcc. */
6695 case OPTION_MCONSTANT_GP
:
6696 md
.flags
|= EF_IA_64_CONS_GP
;
6699 case OPTION_MAUTO_PIC
:
6700 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
6711 md_show_usage (stream
)
6716 --mconstant-gp mark output file as using the constant-GP model\n\
6717 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6718 --mauto-pic mark output file as using the constant-GP model\n\
6719 without function descriptors (sets ELF header flag\n\
6720 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6721 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6722 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6723 -x | -xexplicit turn on dependency violation checking (default)\n\
6724 -xauto automagically remove dependency violations\n\
6725 -xdebug debug dependency violation checker\n"),
6730 ia64_after_parse_args ()
6732 if (debug_type
== DEBUG_STABS
)
6733 as_fatal (_("--gstabs is not supported for ia64"));
6736 /* Return true if TYPE fits in TEMPL at SLOT. */
6739 match (int templ
, int type
, int slot
)
6741 enum ia64_unit unit
;
6744 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
6747 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
6749 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
6751 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
6752 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
6753 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
6754 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
6755 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
6756 default: result
= 0; break;
6761 /* Add a bit of extra goodness if a nop of type F or B would fit
6762 in TEMPL at SLOT. */
6765 extra_goodness (int templ
, int slot
)
6767 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
6769 if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
6774 /* This function is called once, at assembler startup time. It sets
6775 up all the tables, etc. that the MD part of the assembler will need
6776 that can be determined before arguments are parsed. */
6780 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
6785 md
.explicit_mode
= md
.default_explicit_mode
;
6787 bfd_set_section_alignment (stdoutput
, text_section
, 4);
6789 /* Make sure function pointers get initialized. */
6790 target_big_endian
= -1;
6791 dot_byteorder (default_big_endian
);
6793 alias_hash
= hash_new ();
6794 alias_name_hash
= hash_new ();
6795 secalias_hash
= hash_new ();
6796 secalias_name_hash
= hash_new ();
6798 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
6799 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
6800 &zero_address_frag
);
6802 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
6803 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
6804 &zero_address_frag
);
6806 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
6807 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
6808 &zero_address_frag
);
6810 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
6811 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
6812 &zero_address_frag
);
6814 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
6815 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
6816 &zero_address_frag
);
6818 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
6819 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
6820 &zero_address_frag
);
6822 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
6823 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
6824 &zero_address_frag
);
6826 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
6827 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
6828 &zero_address_frag
);
6830 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
6831 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
6832 &zero_address_frag
);
6834 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
6835 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
6836 &zero_address_frag
);
6838 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
6839 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
6840 &zero_address_frag
);
6842 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
6843 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
6844 &zero_address_frag
);
6846 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
6847 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
6848 &zero_address_frag
);
6850 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
6851 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
6852 &zero_address_frag
);
6854 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
6855 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
6856 &zero_address_frag
);
6858 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
6859 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
6860 &zero_address_frag
);
6862 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
6863 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
6864 &zero_address_frag
);
6866 /* Compute the table of best templates. We compute goodness as a
6867 base 4 value, in which each match counts for 3, each F counts
6868 for 2, each B counts for 1. This should maximize the number of
6869 F and B nops in the chosen bundles, which is good because these
6870 pipelines are least likely to be overcommitted. */
6871 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
6872 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
6873 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
6876 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
6879 if (match (t
, i
, 0))
6881 if (match (t
, j
, 1))
6883 if (match (t
, k
, 2))
6884 goodness
= 3 + 3 + 3;
6886 goodness
= 3 + 3 + extra_goodness (t
, 2);
6888 else if (match (t
, j
, 2))
6889 goodness
= 3 + 3 + extra_goodness (t
, 1);
6893 goodness
+= extra_goodness (t
, 1);
6894 goodness
+= extra_goodness (t
, 2);
6897 else if (match (t
, i
, 1))
6899 if (match (t
, j
, 2))
6902 goodness
= 3 + extra_goodness (t
, 2);
6904 else if (match (t
, i
, 2))
6905 goodness
= 3 + extra_goodness (t
, 1);
6907 if (goodness
> best
)
6910 best_template
[i
][j
][k
] = t
;
6915 for (i
= 0; i
< NUM_SLOTS
; ++i
)
6916 md
.slot
[i
].user_template
= -1;
6918 md
.pseudo_hash
= hash_new ();
6919 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
6921 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
6922 (void *) (pseudo_opcode
+ i
));
6924 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6925 pseudo_opcode
[i
].name
, err
);
6928 md
.reg_hash
= hash_new ();
6929 md
.dynreg_hash
= hash_new ();
6930 md
.const_hash
= hash_new ();
6931 md
.entry_hash
= hash_new ();
6933 /* general registers: */
6936 for (i
= 0; i
< total
; ++i
)
6938 sprintf (name
, "r%d", i
- REG_GR
);
6939 md
.regsym
[i
] = declare_register (name
, i
);
6942 /* floating point registers: */
6944 for (; i
< total
; ++i
)
6946 sprintf (name
, "f%d", i
- REG_FR
);
6947 md
.regsym
[i
] = declare_register (name
, i
);
6950 /* application registers: */
6953 for (; i
< total
; ++i
)
6955 sprintf (name
, "ar%d", i
- REG_AR
);
6956 md
.regsym
[i
] = declare_register (name
, i
);
6959 /* control registers: */
6962 for (; i
< total
; ++i
)
6964 sprintf (name
, "cr%d", i
- REG_CR
);
6965 md
.regsym
[i
] = declare_register (name
, i
);
6968 /* predicate registers: */
6970 for (; i
< total
; ++i
)
6972 sprintf (name
, "p%d", i
- REG_P
);
6973 md
.regsym
[i
] = declare_register (name
, i
);
6976 /* branch registers: */
6978 for (; i
< total
; ++i
)
6980 sprintf (name
, "b%d", i
- REG_BR
);
6981 md
.regsym
[i
] = declare_register (name
, i
);
6984 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
6985 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
6986 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
6987 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
6988 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
6989 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
6990 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
6992 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
6994 regnum
= indirect_reg
[i
].regnum
;
6995 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
6998 /* define synonyms for application registers: */
6999 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
7000 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
7001 REG_AR
+ ar
[i
- REG_AR
].regnum
);
7003 /* define synonyms for control registers: */
7004 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
7005 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
7006 REG_CR
+ cr
[i
- REG_CR
].regnum
);
7008 declare_register ("gp", REG_GR
+ 1);
7009 declare_register ("sp", REG_GR
+ 12);
7010 declare_register ("rp", REG_BR
+ 0);
7012 /* pseudo-registers used to specify unwind info: */
7013 declare_register ("psp", REG_PSP
);
7015 declare_register_set ("ret", 4, REG_GR
+ 8);
7016 declare_register_set ("farg", 8, REG_FR
+ 8);
7017 declare_register_set ("fret", 8, REG_FR
+ 8);
7019 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7021 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7022 (PTR
) (const_bits
+ i
));
7024 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7028 /* Set the architecture and machine depending on defaults and command line
7030 if (md
.flags
& EF_IA_64_ABI64
)
7031 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7033 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7036 as_warn (_("Could not set architecture and machine"));
7038 /* Set the pointer size and pointer shift size depending on md.flags */
7040 if (md
.flags
& EF_IA_64_ABI64
)
7042 md
.pointer_size
= 8; /* pointers are 8 bytes */
7043 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7047 md
.pointer_size
= 4; /* pointers are 4 bytes */
7048 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7051 md
.mem_offset
.hint
= 0;
7054 md
.entry_labels
= NULL
;
7057 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
7058 because that is called after md_parse_option which is where we do the
7059 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
7060 default endianness. */
7063 ia64_init (argc
, argv
)
7064 int argc ATTRIBUTE_UNUSED
;
7065 char **argv ATTRIBUTE_UNUSED
;
7067 md
.flags
= MD_FLAGS_DEFAULT
;
7070 /* Return a string for the target object file format. */
7073 ia64_target_format ()
7075 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7077 if (md
.flags
& EF_IA_64_BE
)
7079 if (md
.flags
& EF_IA_64_ABI64
)
7080 #if defined(TE_AIX50)
7081 return "elf64-ia64-aix-big";
7082 #elif defined(TE_HPUX)
7083 return "elf64-ia64-hpux-big";
7085 return "elf64-ia64-big";
7088 #if defined(TE_AIX50)
7089 return "elf32-ia64-aix-big";
7090 #elif defined(TE_HPUX)
7091 return "elf32-ia64-hpux-big";
7093 return "elf32-ia64-big";
7098 if (md
.flags
& EF_IA_64_ABI64
)
7100 return "elf64-ia64-aix-little";
7102 return "elf64-ia64-little";
7106 return "elf32-ia64-aix-little";
7108 return "elf32-ia64-little";
7113 return "unknown-format";
7117 ia64_end_of_source ()
7119 /* terminate insn group upon reaching end of file: */
7120 insn_group_break (1, 0, 0);
7122 /* emits slots we haven't written yet: */
7123 ia64_flush_insns ();
7125 bfd_set_private_flags (stdoutput
, md
.flags
);
7127 md
.mem_offset
.hint
= 0;
7133 if (md
.qp
.X_op
== O_register
)
7134 as_bad ("qualifying predicate not followed by instruction");
7135 md
.qp
.X_op
= O_absent
;
7137 if (ignore_input ())
7140 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7142 if (md
.detect_dv
&& !md
.explicit_mode
)
7143 as_warn (_("Explicit stops are ignored in auto mode"));
7145 insn_group_break (1, 0, 0);
7149 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7151 static int defining_tag
= 0;
7154 ia64_unrecognized_line (ch
)
7160 expression (&md
.qp
);
7161 if (*input_line_pointer
++ != ')')
7163 as_bad ("Expected ')'");
7166 if (md
.qp
.X_op
!= O_register
)
7168 as_bad ("Qualifying predicate expected");
7171 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7173 as_bad ("Predicate register expected");
7179 if (md
.manual_bundling
)
7180 as_warn ("Found '{' when manual bundling is already turned on");
7182 CURR_SLOT
.manual_bundling_on
= 1;
7183 md
.manual_bundling
= 1;
7185 /* Bundling is only acceptable in explicit mode
7186 or when in default automatic mode. */
7187 if (md
.detect_dv
&& !md
.explicit_mode
)
7189 if (!md
.mode_explicitly_set
7190 && !md
.default_explicit_mode
)
7193 as_warn (_("Found '{' after explicit switch to automatic mode"));
7198 if (!md
.manual_bundling
)
7199 as_warn ("Found '}' when manual bundling is off");
7201 PREV_SLOT
.manual_bundling_off
= 1;
7202 md
.manual_bundling
= 0;
7204 /* switch back to automatic mode, if applicable */
7207 && !md
.mode_explicitly_set
7208 && !md
.default_explicit_mode
)
7211 /* Allow '{' to follow on the same line. We also allow ";;", but that
7212 happens automatically because ';' is an end of line marker. */
7214 if (input_line_pointer
[0] == '{')
7216 input_line_pointer
++;
7217 return ia64_unrecognized_line ('{');
7220 demand_empty_rest_of_line ();
7230 if (md
.qp
.X_op
== O_register
)
7232 as_bad ("Tag must come before qualifying predicate.");
7236 /* This implements just enough of read_a_source_file in read.c to
7237 recognize labels. */
7238 if (is_name_beginner (*input_line_pointer
))
7240 s
= input_line_pointer
;
7241 c
= get_symbol_end ();
7243 else if (LOCAL_LABELS_FB
7244 && ISDIGIT (*input_line_pointer
))
7247 while (ISDIGIT (*input_line_pointer
))
7248 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7249 fb_label_instance_inc (temp
);
7250 s
= fb_label_name (temp
, 0);
7251 c
= *input_line_pointer
;
7260 /* Put ':' back for error messages' sake. */
7261 *input_line_pointer
++ = ':';
7262 as_bad ("Expected ':'");
7269 /* Put ':' back for error messages' sake. */
7270 *input_line_pointer
++ = ':';
7271 if (*input_line_pointer
++ != ']')
7273 as_bad ("Expected ']'");
7278 as_bad ("Tag name expected");
7288 /* Not a valid line. */
7293 ia64_frob_label (sym
)
7296 struct label_fix
*fix
;
7298 /* Tags need special handling since they are not bundle breaks like
7302 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7304 fix
->next
= CURR_SLOT
.tag_fixups
;
7305 CURR_SLOT
.tag_fixups
= fix
;
7310 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7312 md
.last_text_seg
= now_seg
;
7313 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7315 fix
->next
= CURR_SLOT
.label_fixups
;
7316 CURR_SLOT
.label_fixups
= fix
;
7318 /* Keep track of how many code entry points we've seen. */
7319 if (md
.path
== md
.maxpaths
)
7322 md
.entry_labels
= (const char **)
7323 xrealloc ((void *) md
.entry_labels
,
7324 md
.maxpaths
* sizeof (char *));
7326 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7331 /* The HP-UX linker will give unresolved symbol errors for symbols
7332 that are declared but unused. This routine removes declared,
7333 unused symbols from an object. */
7335 ia64_frob_symbol (sym
)
7338 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7339 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7340 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7341 && ! S_IS_EXTERNAL (sym
)))
7348 ia64_flush_pending_output ()
7350 if (!md
.keep_pending_output
7351 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7353 /* ??? This causes many unnecessary stop bits to be emitted.
7354 Unfortunately, it isn't clear if it is safe to remove this. */
7355 insn_group_break (1, 0, 0);
7356 ia64_flush_insns ();
7360 /* Do ia64-specific expression optimization. All that's done here is
7361 to transform index expressions that are either due to the indexing
7362 of rotating registers or due to the indexing of indirect register
7365 ia64_optimize_expr (l
, op
, r
)
7374 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
7376 num_regs
= (l
->X_add_number
>> 16);
7377 if ((unsigned) r
->X_add_number
>= num_regs
)
7380 as_bad ("No current frame");
7382 as_bad ("Index out of range 0..%u", num_regs
- 1);
7383 r
->X_add_number
= 0;
7385 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7388 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
7390 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
7391 || l
->X_add_number
== IND_MEM
)
7393 as_bad ("Indirect register set name expected");
7394 l
->X_add_number
= IND_CPUID
;
7397 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
7398 l
->X_add_number
= r
->X_add_number
;
7406 ia64_parse_name (name
, e
)
7410 struct const_desc
*cdesc
;
7411 struct dynreg
*dr
= 0;
7412 unsigned int regnum
;
7416 /* first see if NAME is a known register name: */
7417 sym
= hash_find (md
.reg_hash
, name
);
7420 e
->X_op
= O_register
;
7421 e
->X_add_number
= S_GET_VALUE (sym
);
7425 cdesc
= hash_find (md
.const_hash
, name
);
7428 e
->X_op
= O_constant
;
7429 e
->X_add_number
= cdesc
->value
;
7433 /* check for inN, locN, or outN: */
7437 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7445 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
7453 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
7466 /* The name is inN, locN, or outN; parse the register number. */
7467 regnum
= strtoul (name
, &end
, 10);
7468 if (end
> name
&& *end
== '\0')
7470 if ((unsigned) regnum
>= dr
->num_regs
)
7473 as_bad ("No current frame");
7475 as_bad ("Register number out of range 0..%u",
7479 e
->X_op
= O_register
;
7480 e
->X_add_number
= dr
->base
+ regnum
;
7485 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
7487 /* We've got ourselves the name of a rotating register set.
7488 Store the base register number in the low 16 bits of
7489 X_add_number and the size of the register set in the top 16
7491 e
->X_op
= O_register
;
7492 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
7498 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7501 ia64_canonicalize_symbol_name (name
)
7504 size_t len
= strlen (name
);
7505 if (len
> 1 && name
[len
- 1] == '#')
7506 name
[len
- 1] = '\0';
7510 /* Return true if idesc is a conditional branch instruction. This excludes
7511 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7512 because they always read/write resources regardless of the value of the
7513 qualifying predicate. br.ia must always use p0, and hence is always
7514 taken. Thus this function returns true for branches which can fall
7515 through, and which use no resources if they do fall through. */
7518 is_conditional_branch (idesc
)
7519 struct ia64_opcode
*idesc
;
7521 /* br is a conditional branch. Everything that starts with br. except
7522 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7523 Everything that starts with brl is a conditional branch. */
7524 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
7525 && (idesc
->name
[2] == '\0'
7526 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
7527 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
7528 || idesc
->name
[2] == 'l'
7529 /* br.cond, br.call, br.clr */
7530 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
7531 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
7532 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
7535 /* Return whether the given opcode is a taken branch. If there's any doubt,
7539 is_taken_branch (idesc
)
7540 struct ia64_opcode
*idesc
;
7542 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
7543 || strncmp (idesc
->name
, "br.ia", 5) == 0);
7546 /* Return whether the given opcode is an interruption or rfi. If there's any
7547 doubt, returns zero. */
7550 is_interruption_or_rfi (idesc
)
7551 struct ia64_opcode
*idesc
;
7553 if (strcmp (idesc
->name
, "rfi") == 0)
7558 /* Returns the index of the given dependency in the opcode's list of chks, or
7559 -1 if there is no dependency. */
7562 depends_on (depind
, idesc
)
7564 struct ia64_opcode
*idesc
;
7567 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
7568 for (i
= 0; i
< dep
->nchks
; i
++)
7570 if (depind
== DEP (dep
->chks
[i
]))
7576 /* Determine a set of specific resources used for a particular resource
7577 class. Returns the number of specific resources identified For those
7578 cases which are not determinable statically, the resource returned is
7581 Meanings of value in 'NOTE':
7582 1) only read/write when the register number is explicitly encoded in the
7584 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7585 accesses CFM when qualifying predicate is in the rotating region.
7586 3) general register value is used to specify an indirect register; not
7587 determinable statically.
7588 4) only read the given resource when bits 7:0 of the indirect index
7589 register value does not match the register number of the resource; not
7590 determinable statically.
7591 5) all rules are implementation specific.
7592 6) only when both the index specified by the reader and the index specified
7593 by the writer have the same value in bits 63:61; not determinable
7595 7) only access the specified resource when the corresponding mask bit is
7597 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7598 only read when these insns reference FR2-31
7599 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7600 written when these insns write FR32-127
7601 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7603 11) The target predicates are written independently of PR[qp], but source
7604 registers are only read if PR[qp] is true. Since the state of PR[qp]
7605 cannot statically be determined, all source registers are marked used.
7606 12) This insn only reads the specified predicate register when that
7607 register is the PR[qp].
7608 13) This reference to ld-c only applies to teh GR whose value is loaded
7609 with data returned from memory, not the post-incremented address register.
7610 14) The RSE resource includes the implementation-specific RSE internal
7611 state resources. At least one (and possibly more) of these resources are
7612 read by each instruction listed in IC:rse-readers. At least one (and
7613 possibly more) of these resources are written by each insn listed in
7615 15+16) Represents reserved instructions, which the assembler does not
7618 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7619 this code; there are no dependency violations based on memory access.
7622 #define MAX_SPECS 256
7627 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
7628 const struct ia64_dependency
*dep
;
7629 struct ia64_opcode
*idesc
;
7630 int type
; /* is this a DV chk or a DV reg? */
7631 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
7632 int note
; /* resource note for this insn's usage */
7633 int path
; /* which execution path to examine */
7640 if (dep
->mode
== IA64_DV_WAW
7641 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
7642 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
7645 /* template for any resources we identify */
7646 tmpl
.dependency
= dep
;
7648 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
7649 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
7650 tmpl
.link_to_qp_branch
= 1;
7651 tmpl
.mem_offset
.hint
= 0;
7654 tmpl
.cmp_type
= CMP_NONE
;
7657 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7658 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7659 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7661 /* we don't need to track these */
7662 if (dep
->semantics
== IA64_DVS_NONE
)
7665 switch (dep
->specifier
)
7670 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7672 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7673 if (regno
>= 0 && regno
<= 7)
7675 specs
[count
] = tmpl
;
7676 specs
[count
++].index
= regno
;
7682 for (i
= 0; i
< 8; i
++)
7684 specs
[count
] = tmpl
;
7685 specs
[count
++].index
= i
;
7694 case IA64_RS_AR_UNAT
:
7695 /* This is a mov =AR or mov AR= instruction. */
7696 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7698 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7699 if (regno
== AR_UNAT
)
7701 specs
[count
++] = tmpl
;
7706 /* This is a spill/fill, or other instruction that modifies the
7709 /* Unless we can determine the specific bits used, mark the whole
7710 thing; bits 8:3 of the memory address indicate the bit used in
7711 UNAT. The .mem.offset hint may be used to eliminate a small
7712 subset of conflicts. */
7713 specs
[count
] = tmpl
;
7714 if (md
.mem_offset
.hint
)
7717 fprintf (stderr
, " Using hint for spill/fill\n");
7718 /* The index isn't actually used, just set it to something
7719 approximating the bit index. */
7720 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
7721 specs
[count
].mem_offset
.hint
= 1;
7722 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
7723 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
7727 specs
[count
++].specific
= 0;
7735 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7737 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7738 if ((regno
>= 8 && regno
<= 15)
7739 || (regno
>= 20 && regno
<= 23)
7740 || (regno
>= 31 && regno
<= 39)
7741 || (regno
>= 41 && regno
<= 47)
7742 || (regno
>= 67 && regno
<= 111))
7744 specs
[count
] = tmpl
;
7745 specs
[count
++].index
= regno
;
7758 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7760 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7761 if ((regno
>= 48 && regno
<= 63)
7762 || (regno
>= 112 && regno
<= 127))
7764 specs
[count
] = tmpl
;
7765 specs
[count
++].index
= regno
;
7771 for (i
= 48; i
< 64; i
++)
7773 specs
[count
] = tmpl
;
7774 specs
[count
++].index
= i
;
7776 for (i
= 112; i
< 128; i
++)
7778 specs
[count
] = tmpl
;
7779 specs
[count
++].index
= i
;
7797 for (i
= 0; i
< idesc
->num_outputs
; i
++)
7798 if (idesc
->operands
[i
] == IA64_OPND_B1
7799 || idesc
->operands
[i
] == IA64_OPND_B2
)
7801 specs
[count
] = tmpl
;
7802 specs
[count
++].index
=
7803 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7808 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
7809 if (idesc
->operands
[i
] == IA64_OPND_B1
7810 || idesc
->operands
[i
] == IA64_OPND_B2
)
7812 specs
[count
] = tmpl
;
7813 specs
[count
++].index
=
7814 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7820 case IA64_RS_CPUID
: /* four or more registers */
7823 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
7825 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7826 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7829 specs
[count
] = tmpl
;
7830 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7834 specs
[count
] = tmpl
;
7835 specs
[count
++].specific
= 0;
7845 case IA64_RS_DBR
: /* four or more registers */
7848 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
7850 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7851 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7854 specs
[count
] = tmpl
;
7855 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7859 specs
[count
] = tmpl
;
7860 specs
[count
++].specific
= 0;
7864 else if (note
== 0 && !rsrc_write
)
7866 specs
[count
] = tmpl
;
7867 specs
[count
++].specific
= 0;
7875 case IA64_RS_IBR
: /* four or more registers */
7878 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
7880 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7881 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7884 specs
[count
] = tmpl
;
7885 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7889 specs
[count
] = tmpl
;
7890 specs
[count
++].specific
= 0;
7903 /* These are implementation specific. Force all references to
7904 conflict with all other references. */
7905 specs
[count
] = tmpl
;
7906 specs
[count
++].specific
= 0;
7914 case IA64_RS_PKR
: /* 16 or more registers */
7915 if (note
== 3 || note
== 4)
7917 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
7919 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7920 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7925 specs
[count
] = tmpl
;
7926 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7929 for (i
= 0; i
< NELEMS (gr_values
); i
++)
7931 /* Uses all registers *except* the one in R3. */
7932 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
7934 specs
[count
] = tmpl
;
7935 specs
[count
++].index
= i
;
7941 specs
[count
] = tmpl
;
7942 specs
[count
++].specific
= 0;
7949 specs
[count
] = tmpl
;
7950 specs
[count
++].specific
= 0;
7954 case IA64_RS_PMC
: /* four or more registers */
7957 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
7958 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
7961 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
7963 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
7964 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7967 specs
[count
] = tmpl
;
7968 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7972 specs
[count
] = tmpl
;
7973 specs
[count
++].specific
= 0;
7983 case IA64_RS_PMD
: /* four or more registers */
7986 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
7988 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7989 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7992 specs
[count
] = tmpl
;
7993 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7997 specs
[count
] = tmpl
;
7998 specs
[count
++].specific
= 0;
8008 case IA64_RS_RR
: /* eight registers */
8011 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8013 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8014 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8017 specs
[count
] = tmpl
;
8018 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8022 specs
[count
] = tmpl
;
8023 specs
[count
++].specific
= 0;
8027 else if (note
== 0 && !rsrc_write
)
8029 specs
[count
] = tmpl
;
8030 specs
[count
++].specific
= 0;
8038 case IA64_RS_CR_IRR
:
8041 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8042 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8044 && idesc
->operands
[1] == IA64_OPND_CR3
8047 for (i
= 0; i
< 4; i
++)
8049 specs
[count
] = tmpl
;
8050 specs
[count
++].index
= CR_IRR0
+ i
;
8056 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8057 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8059 && regno
<= CR_IRR3
)
8061 specs
[count
] = tmpl
;
8062 specs
[count
++].index
= regno
;
8071 case IA64_RS_CR_LRR
:
8078 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8079 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8080 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8082 specs
[count
] = tmpl
;
8083 specs
[count
++].index
= regno
;
8091 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8093 specs
[count
] = tmpl
;
8094 specs
[count
++].index
=
8095 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8110 else if (rsrc_write
)
8112 if (dep
->specifier
== IA64_RS_FRb
8113 && idesc
->operands
[0] == IA64_OPND_F1
)
8115 specs
[count
] = tmpl
;
8116 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8121 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8123 if (idesc
->operands
[i
] == IA64_OPND_F2
8124 || idesc
->operands
[i
] == IA64_OPND_F3
8125 || idesc
->operands
[i
] == IA64_OPND_F4
)
8127 specs
[count
] = tmpl
;
8128 specs
[count
++].index
=
8129 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8138 /* This reference applies only to the GR whose value is loaded with
8139 data returned from memory. */
8140 specs
[count
] = tmpl
;
8141 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8147 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8148 if (idesc
->operands
[i
] == IA64_OPND_R1
8149 || idesc
->operands
[i
] == IA64_OPND_R2
8150 || idesc
->operands
[i
] == IA64_OPND_R3
)
8152 specs
[count
] = tmpl
;
8153 specs
[count
++].index
=
8154 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8156 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8157 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8158 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8160 specs
[count
] = tmpl
;
8161 specs
[count
++].index
=
8162 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8167 /* Look for anything that reads a GR. */
8168 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8170 if (idesc
->operands
[i
] == IA64_OPND_MR3
8171 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8172 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8173 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8174 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8175 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8176 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8177 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8178 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8179 || ((i
>= idesc
->num_outputs
)
8180 && (idesc
->operands
[i
] == IA64_OPND_R1
8181 || idesc
->operands
[i
] == IA64_OPND_R2
8182 || idesc
->operands
[i
] == IA64_OPND_R3
8183 /* addl source register. */
8184 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8186 specs
[count
] = tmpl
;
8187 specs
[count
++].index
=
8188 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8199 /* This is the same as IA64_RS_PRr, except that the register range is
8200 from 1 - 15, and there are no rotating register reads/writes here. */
8204 for (i
= 1; i
< 16; i
++)
8206 specs
[count
] = tmpl
;
8207 specs
[count
++].index
= i
;
8213 /* Mark only those registers indicated by the mask. */
8216 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8217 for (i
= 1; i
< 16; i
++)
8218 if (mask
& ((valueT
) 1 << i
))
8220 specs
[count
] = tmpl
;
8221 specs
[count
++].index
= i
;
8229 else if (note
== 11) /* note 11 implies note 1 as well */
8233 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8235 if (idesc
->operands
[i
] == IA64_OPND_P1
8236 || idesc
->operands
[i
] == IA64_OPND_P2
)
8238 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8239 if (regno
>= 1 && regno
< 16)
8241 specs
[count
] = tmpl
;
8242 specs
[count
++].index
= regno
;
8252 else if (note
== 12)
8254 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8256 specs
[count
] = tmpl
;
8257 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8264 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8265 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8266 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8267 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8269 if ((idesc
->operands
[0] == IA64_OPND_P1
8270 || idesc
->operands
[0] == IA64_OPND_P2
)
8271 && p1
>= 1 && p1
< 16)
8273 specs
[count
] = tmpl
;
8274 specs
[count
].cmp_type
=
8275 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8276 specs
[count
++].index
= p1
;
8278 if ((idesc
->operands
[1] == IA64_OPND_P1
8279 || idesc
->operands
[1] == IA64_OPND_P2
)
8280 && p2
>= 1 && p2
< 16)
8282 specs
[count
] = tmpl
;
8283 specs
[count
].cmp_type
=
8284 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8285 specs
[count
++].index
= p2
;
8290 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8292 specs
[count
] = tmpl
;
8293 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8295 if (idesc
->operands
[1] == IA64_OPND_PR
)
8297 for (i
= 1; i
< 16; i
++)
8299 specs
[count
] = tmpl
;
8300 specs
[count
++].index
= i
;
8311 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8312 simplified cases of this. */
8316 for (i
= 16; i
< 63; i
++)
8318 specs
[count
] = tmpl
;
8319 specs
[count
++].index
= i
;
8325 /* Mark only those registers indicated by the mask. */
8327 && idesc
->operands
[0] == IA64_OPND_PR
)
8329 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8330 if (mask
& ((valueT
) 1 << 16))
8331 for (i
= 16; i
< 63; i
++)
8333 specs
[count
] = tmpl
;
8334 specs
[count
++].index
= i
;
8338 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8340 for (i
= 16; i
< 63; i
++)
8342 specs
[count
] = tmpl
;
8343 specs
[count
++].index
= i
;
8351 else if (note
== 11) /* note 11 implies note 1 as well */
8355 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8357 if (idesc
->operands
[i
] == IA64_OPND_P1
8358 || idesc
->operands
[i
] == IA64_OPND_P2
)
8360 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8361 if (regno
>= 16 && regno
< 63)
8363 specs
[count
] = tmpl
;
8364 specs
[count
++].index
= regno
;
8374 else if (note
== 12)
8376 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8378 specs
[count
] = tmpl
;
8379 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8386 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8387 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8388 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8389 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8391 if ((idesc
->operands
[0] == IA64_OPND_P1
8392 || idesc
->operands
[0] == IA64_OPND_P2
)
8393 && p1
>= 16 && p1
< 63)
8395 specs
[count
] = tmpl
;
8396 specs
[count
].cmp_type
=
8397 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8398 specs
[count
++].index
= p1
;
8400 if ((idesc
->operands
[1] == IA64_OPND_P1
8401 || idesc
->operands
[1] == IA64_OPND_P2
)
8402 && p2
>= 16 && p2
< 63)
8404 specs
[count
] = tmpl
;
8405 specs
[count
].cmp_type
=
8406 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8407 specs
[count
++].index
= p2
;
8412 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8414 specs
[count
] = tmpl
;
8415 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8417 if (idesc
->operands
[1] == IA64_OPND_PR
)
8419 for (i
= 16; i
< 63; i
++)
8421 specs
[count
] = tmpl
;
8422 specs
[count
++].index
= i
;
8434 /* Verify that the instruction is using the PSR bit indicated in
8438 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
8440 if (dep
->regindex
< 6)
8442 specs
[count
++] = tmpl
;
8445 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
8447 if (dep
->regindex
< 32
8448 || dep
->regindex
== 35
8449 || dep
->regindex
== 36
8450 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
8452 specs
[count
++] = tmpl
;
8455 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
8457 if (dep
->regindex
< 32
8458 || dep
->regindex
== 35
8459 || dep
->regindex
== 36
8460 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
8462 specs
[count
++] = tmpl
;
8467 /* Several PSR bits have very specific dependencies. */
8468 switch (dep
->regindex
)
8471 specs
[count
++] = tmpl
;
8476 specs
[count
++] = tmpl
;
8480 /* Only certain CR accesses use PSR.ic */
8481 if (idesc
->operands
[0] == IA64_OPND_CR3
8482 || idesc
->operands
[1] == IA64_OPND_CR3
)
8485 ((idesc
->operands
[0] == IA64_OPND_CR3
)
8488 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
8503 specs
[count
++] = tmpl
;
8512 specs
[count
++] = tmpl
;
8516 /* Only some AR accesses use cpl */
8517 if (idesc
->operands
[0] == IA64_OPND_AR3
8518 || idesc
->operands
[1] == IA64_OPND_AR3
)
8521 ((idesc
->operands
[0] == IA64_OPND_AR3
)
8524 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
8531 && regno
<= AR_K7
))))
8533 specs
[count
++] = tmpl
;
8538 specs
[count
++] = tmpl
;
8548 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
8550 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
8556 if (mask
& ((valueT
) 1 << dep
->regindex
))
8558 specs
[count
++] = tmpl
;
8563 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
8564 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
8565 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8566 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8568 if (idesc
->operands
[i
] == IA64_OPND_F1
8569 || idesc
->operands
[i
] == IA64_OPND_F2
8570 || idesc
->operands
[i
] == IA64_OPND_F3
8571 || idesc
->operands
[i
] == IA64_OPND_F4
)
8573 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8574 if (reg
>= min
&& reg
<= max
)
8576 specs
[count
++] = tmpl
;
8583 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
8584 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
8585 /* mfh is read on writes to FR32-127; mfl is read on writes to
8587 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8589 if (idesc
->operands
[i
] == IA64_OPND_F1
)
8591 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8592 if (reg
>= min
&& reg
<= max
)
8594 specs
[count
++] = tmpl
;
8599 else if (note
== 10)
8601 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8603 if (idesc
->operands
[i
] == IA64_OPND_R1
8604 || idesc
->operands
[i
] == IA64_OPND_R2
8605 || idesc
->operands
[i
] == IA64_OPND_R3
)
8607 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8608 if (regno
>= 16 && regno
<= 31)
8610 specs
[count
++] = tmpl
;
8621 case IA64_RS_AR_FPSR
:
8622 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8624 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8625 if (regno
== AR_FPSR
)
8627 specs
[count
++] = tmpl
;
8632 specs
[count
++] = tmpl
;
8637 /* Handle all AR[REG] resources */
8638 if (note
== 0 || note
== 1)
8640 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8641 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
8642 && regno
== dep
->regindex
)
8644 specs
[count
++] = tmpl
;
8646 /* other AR[REG] resources may be affected by AR accesses */
8647 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
8650 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
8651 switch (dep
->regindex
)
8657 if (regno
== AR_BSPSTORE
)
8659 specs
[count
++] = tmpl
;
8663 (regno
== AR_BSPSTORE
8664 || regno
== AR_RNAT
))
8666 specs
[count
++] = tmpl
;
8671 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
8674 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
8675 switch (dep
->regindex
)
8680 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
8682 specs
[count
++] = tmpl
;
8689 specs
[count
++] = tmpl
;
8699 /* Handle all CR[REG] resources */
8700 if (note
== 0 || note
== 1)
8702 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8704 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8705 if (regno
== dep
->regindex
)
8707 specs
[count
++] = tmpl
;
8709 else if (!rsrc_write
)
8711 /* Reads from CR[IVR] affect other resources. */
8712 if (regno
== CR_IVR
)
8714 if ((dep
->regindex
>= CR_IRR0
8715 && dep
->regindex
<= CR_IRR3
)
8716 || dep
->regindex
== CR_TPR
)
8718 specs
[count
++] = tmpl
;
8725 specs
[count
++] = tmpl
;
8734 case IA64_RS_INSERVICE
:
8735 /* look for write of EOI (67) or read of IVR (65) */
8736 if ((idesc
->operands
[0] == IA64_OPND_CR3
8737 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
8738 || (idesc
->operands
[1] == IA64_OPND_CR3
8739 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
8741 specs
[count
++] = tmpl
;
8748 specs
[count
++] = tmpl
;
8759 specs
[count
++] = tmpl
;
8763 /* Check if any of the registers accessed are in the rotating region.
8764 mov to/from pr accesses CFM only when qp_regno is in the rotating
8766 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8768 if (idesc
->operands
[i
] == IA64_OPND_R1
8769 || idesc
->operands
[i
] == IA64_OPND_R2
8770 || idesc
->operands
[i
] == IA64_OPND_R3
)
8772 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8773 /* Assumes that md.rot.num_regs is always valid */
8774 if (md
.rot
.num_regs
> 0
8776 && num
< 31 + md
.rot
.num_regs
)
8778 specs
[count
] = tmpl
;
8779 specs
[count
++].specific
= 0;
8782 else if (idesc
->operands
[i
] == IA64_OPND_F1
8783 || idesc
->operands
[i
] == IA64_OPND_F2
8784 || idesc
->operands
[i
] == IA64_OPND_F3
8785 || idesc
->operands
[i
] == IA64_OPND_F4
)
8787 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8790 specs
[count
] = tmpl
;
8791 specs
[count
++].specific
= 0;
8794 else if (idesc
->operands
[i
] == IA64_OPND_P1
8795 || idesc
->operands
[i
] == IA64_OPND_P2
)
8797 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8800 specs
[count
] = tmpl
;
8801 specs
[count
++].specific
= 0;
8805 if (CURR_SLOT
.qp_regno
> 15)
8807 specs
[count
] = tmpl
;
8808 specs
[count
++].specific
= 0;
8813 /* This is the same as IA64_RS_PRr, except simplified to account for
8814 the fact that there is only one register. */
8818 specs
[count
++] = tmpl
;
8823 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
8824 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8825 if (mask
& ((valueT
) 1 << 63))
8826 specs
[count
++] = tmpl
;
8828 else if (note
== 11)
8830 if ((idesc
->operands
[0] == IA64_OPND_P1
8831 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
8832 || (idesc
->operands
[1] == IA64_OPND_P2
8833 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
8835 specs
[count
++] = tmpl
;
8838 else if (note
== 12)
8840 if (CURR_SLOT
.qp_regno
== 63)
8842 specs
[count
++] = tmpl
;
8849 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8850 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8851 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8852 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8855 && (idesc
->operands
[0] == IA64_OPND_P1
8856 || idesc
->operands
[0] == IA64_OPND_P2
))
8858 specs
[count
] = tmpl
;
8859 specs
[count
++].cmp_type
=
8860 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8863 && (idesc
->operands
[1] == IA64_OPND_P1
8864 || idesc
->operands
[1] == IA64_OPND_P2
))
8866 specs
[count
] = tmpl
;
8867 specs
[count
++].cmp_type
=
8868 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8873 if (CURR_SLOT
.qp_regno
== 63)
8875 specs
[count
++] = tmpl
;
8886 /* FIXME we can identify some individual RSE written resources, but RSE
8887 read resources have not yet been completely identified, so for now
8888 treat RSE as a single resource */
8889 if (strncmp (idesc
->name
, "mov", 3) == 0)
8893 if (idesc
->operands
[0] == IA64_OPND_AR3
8894 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
8896 specs
[count
] = tmpl
;
8897 specs
[count
++].index
= 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8902 if (idesc
->operands
[0] == IA64_OPND_AR3
)
8904 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
8905 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
8907 specs
[count
++] = tmpl
;
8910 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
8912 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
8913 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
8914 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
8916 specs
[count
++] = tmpl
;
8923 specs
[count
++] = tmpl
;
8928 /* FIXME -- do any of these need to be non-specific? */
8929 specs
[count
++] = tmpl
;
8933 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
8940 /* Clear branch flags on marked resources. This breaks the link between the
8941 QP of the marking instruction and a subsequent branch on the same QP. */
8944 clear_qp_branch_flag (mask
)
8948 for (i
= 0; i
< regdepslen
; i
++)
8950 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
8951 if ((bit
& mask
) != 0)
8953 regdeps
[i
].link_to_qp_branch
= 0;
8958 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
8959 any mutexes which contain one of the PRs and create new ones when
8963 update_qp_mutex (valueT mask
)
8969 while (i
< qp_mutexeslen
)
8971 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
8973 /* If it destroys and creates the same mutex, do nothing. */
8974 if (qp_mutexes
[i
].prmask
== mask
8975 && qp_mutexes
[i
].path
== md
.path
)
8986 fprintf (stderr
, " Clearing mutex relation");
8987 print_prmask (qp_mutexes
[i
].prmask
);
8988 fprintf (stderr
, "\n");
8991 /* Deal with the old mutex with more than 3+ PRs only if
8992 the new mutex on the same execution path with it.
8994 FIXME: The 3+ mutex support is incomplete.
8995 dot_pred_rel () may be a better place to fix it. */
8996 if (qp_mutexes
[i
].path
== md
.path
)
8998 /* If it is a proper subset of the mutex, create a
9001 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9004 qp_mutexes
[i
].prmask
&= ~mask
;
9005 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9007 /* Modify the mutex if there are more than one
9015 /* Remove the mutex. */
9016 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9024 add_qp_mutex (mask
);
9029 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9031 Any changes to a PR clears the mutex relations which include that PR. */
9034 clear_qp_mutex (mask
)
9040 while (i
< qp_mutexeslen
)
9042 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9046 fprintf (stderr
, " Clearing mutex relation");
9047 print_prmask (qp_mutexes
[i
].prmask
);
9048 fprintf (stderr
, "\n");
9050 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9057 /* Clear implies relations which contain PRs in the given masks.
9058 P1_MASK indicates the source of the implies relation, while P2_MASK
9059 indicates the implied PR. */
9062 clear_qp_implies (p1_mask
, p2_mask
)
9069 while (i
< qp_implieslen
)
9071 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9072 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9075 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9076 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9077 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9084 /* Add the PRs specified to the list of implied relations. */
9087 add_qp_imply (p1
, p2
)
9094 /* p0 is not meaningful here. */
9095 if (p1
== 0 || p2
== 0)
9101 /* If it exists already, ignore it. */
9102 for (i
= 0; i
< qp_implieslen
; i
++)
9104 if (qp_implies
[i
].p1
== p1
9105 && qp_implies
[i
].p2
== p2
9106 && qp_implies
[i
].path
== md
.path
9107 && !qp_implies
[i
].p2_branched
)
9111 if (qp_implieslen
== qp_impliestotlen
)
9113 qp_impliestotlen
+= 20;
9114 qp_implies
= (struct qp_imply
*)
9115 xrealloc ((void *) qp_implies
,
9116 qp_impliestotlen
* sizeof (struct qp_imply
));
9119 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9120 qp_implies
[qp_implieslen
].p1
= p1
;
9121 qp_implies
[qp_implieslen
].p2
= p2
;
9122 qp_implies
[qp_implieslen
].path
= md
.path
;
9123 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9125 /* Add in the implied transitive relations; for everything that p2 implies,
9126 make p1 imply that, too; for everything that implies p1, make it imply p2
9128 for (i
= 0; i
< qp_implieslen
; i
++)
9130 if (qp_implies
[i
].p1
== p2
)
9131 add_qp_imply (p1
, qp_implies
[i
].p2
);
9132 if (qp_implies
[i
].p2
== p1
)
9133 add_qp_imply (qp_implies
[i
].p1
, p2
);
9135 /* Add in mutex relations implied by this implies relation; for each mutex
9136 relation containing p2, duplicate it and replace p2 with p1. */
9137 bit
= (valueT
) 1 << p1
;
9138 mask
= (valueT
) 1 << p2
;
9139 for (i
= 0; i
< qp_mutexeslen
; i
++)
9141 if (qp_mutexes
[i
].prmask
& mask
)
9142 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9146 /* Add the PRs specified in the mask to the mutex list; this means that only
9147 one of the PRs can be true at any time. PR0 should never be included in
9157 if (qp_mutexeslen
== qp_mutexestotlen
)
9159 qp_mutexestotlen
+= 20;
9160 qp_mutexes
= (struct qpmutex
*)
9161 xrealloc ((void *) qp_mutexes
,
9162 qp_mutexestotlen
* sizeof (struct qpmutex
));
9166 fprintf (stderr
, " Registering mutex on");
9167 print_prmask (mask
);
9168 fprintf (stderr
, "\n");
9170 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9171 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9175 has_suffix_p (name
, suffix
)
9179 size_t namelen
= strlen (name
);
9180 size_t sufflen
= strlen (suffix
);
9182 if (namelen
<= sufflen
)
9184 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9188 clear_register_values ()
9192 fprintf (stderr
, " Clearing register values\n");
9193 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9194 gr_values
[i
].known
= 0;
9197 /* Keep track of register values/changes which affect DV tracking.
9199 optimization note: should add a flag to classes of insns where otherwise we
9200 have to examine a group of strings to identify them. */
9203 note_register_values (idesc
)
9204 struct ia64_opcode
*idesc
;
9206 valueT qp_changemask
= 0;
9209 /* Invalidate values for registers being written to. */
9210 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9212 if (idesc
->operands
[i
] == IA64_OPND_R1
9213 || idesc
->operands
[i
] == IA64_OPND_R2
9214 || idesc
->operands
[i
] == IA64_OPND_R3
)
9216 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9217 if (regno
> 0 && regno
< NELEMS (gr_values
))
9218 gr_values
[regno
].known
= 0;
9220 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9222 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9223 if (regno
> 0 && regno
< 4)
9224 gr_values
[regno
].known
= 0;
9226 else if (idesc
->operands
[i
] == IA64_OPND_P1
9227 || idesc
->operands
[i
] == IA64_OPND_P2
)
9229 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9230 qp_changemask
|= (valueT
) 1 << regno
;
9232 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9234 if (idesc
->operands
[2] & (valueT
) 0x10000)
9235 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9237 qp_changemask
= idesc
->operands
[2];
9240 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9242 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9243 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9245 qp_changemask
= idesc
->operands
[1];
9246 qp_changemask
&= ~(valueT
) 0xFFFF;
9251 /* Always clear qp branch flags on any PR change. */
9252 /* FIXME there may be exceptions for certain compares. */
9253 clear_qp_branch_flag (qp_changemask
);
9255 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9256 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9258 qp_changemask
|= ~(valueT
) 0xFFFF;
9259 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9261 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9262 gr_values
[i
].known
= 0;
9264 clear_qp_mutex (qp_changemask
);
9265 clear_qp_implies (qp_changemask
, qp_changemask
);
9267 /* After a call, all register values are undefined, except those marked
9269 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9270 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9272 /* FIXME keep GR values which are marked as "safe_across_calls" */
9273 clear_register_values ();
9274 clear_qp_mutex (~qp_safe_across_calls
);
9275 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9276 clear_qp_branch_flag (~qp_safe_across_calls
);
9278 else if (is_interruption_or_rfi (idesc
)
9279 || is_taken_branch (idesc
))
9281 clear_register_values ();
9282 clear_qp_mutex (~(valueT
) 0);
9283 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9285 /* Look for mutex and implies relations. */
9286 else if ((idesc
->operands
[0] == IA64_OPND_P1
9287 || idesc
->operands
[0] == IA64_OPND_P2
)
9288 && (idesc
->operands
[1] == IA64_OPND_P1
9289 || idesc
->operands
[1] == IA64_OPND_P2
))
9291 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9292 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9293 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9294 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9296 /* If both PRs are PR0, we can't really do anything. */
9297 if (p1
== 0 && p2
== 0)
9300 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9302 /* In general, clear mutexes and implies which include P1 or P2,
9303 with the following exceptions. */
9304 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9305 || has_suffix_p (idesc
->name
, ".and.orcm"))
9307 clear_qp_implies (p2mask
, p1mask
);
9309 else if (has_suffix_p (idesc
->name
, ".andcm")
9310 || has_suffix_p (idesc
->name
, ".and"))
9312 clear_qp_implies (0, p1mask
| p2mask
);
9314 else if (has_suffix_p (idesc
->name
, ".orcm")
9315 || has_suffix_p (idesc
->name
, ".or"))
9317 clear_qp_mutex (p1mask
| p2mask
);
9318 clear_qp_implies (p1mask
| p2mask
, 0);
9324 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9326 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9327 if (p1
== 0 || p2
== 0)
9328 clear_qp_mutex (p1mask
| p2mask
);
9330 added
= update_qp_mutex (p1mask
| p2mask
);
9332 if (CURR_SLOT
.qp_regno
== 0
9333 || has_suffix_p (idesc
->name
, ".unc"))
9335 if (added
== 0 && p1
&& p2
)
9336 add_qp_mutex (p1mask
| p2mask
);
9337 if (CURR_SLOT
.qp_regno
!= 0)
9340 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9342 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9347 /* Look for mov imm insns into GRs. */
9348 else if (idesc
->operands
[0] == IA64_OPND_R1
9349 && (idesc
->operands
[1] == IA64_OPND_IMM22
9350 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9351 && (strcmp (idesc
->name
, "mov") == 0
9352 || strcmp (idesc
->name
, "movl") == 0))
9354 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9355 if (regno
> 0 && regno
< NELEMS (gr_values
))
9357 gr_values
[regno
].known
= 1;
9358 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9359 gr_values
[regno
].path
= md
.path
;
9362 fprintf (stderr
, " Know gr%d = ", regno
);
9363 fprintf_vma (stderr
, gr_values
[regno
].value
);
9364 fputs ("\n", stderr
);
9370 clear_qp_mutex (qp_changemask
);
9371 clear_qp_implies (qp_changemask
, qp_changemask
);
9375 /* Return whether the given predicate registers are currently mutex. */
9378 qp_mutex (p1
, p2
, path
)
9388 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9389 for (i
= 0; i
< qp_mutexeslen
; i
++)
9391 if (qp_mutexes
[i
].path
>= path
9392 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9399 /* Return whether the given resource is in the given insn's list of chks
9400 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9404 resources_match (rs
, idesc
, note
, qp_regno
, path
)
9406 struct ia64_opcode
*idesc
;
9411 struct rsrc specs
[MAX_SPECS
];
9414 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9415 we don't need to check. One exception is note 11, which indicates that
9416 target predicates are written regardless of PR[qp]. */
9417 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
9421 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
9424 /* UNAT checking is a bit more specific than other resources */
9425 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
9426 && specs
[count
].mem_offset
.hint
9427 && rs
->mem_offset
.hint
)
9429 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
9431 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
9432 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
9439 /* Skip apparent PR write conflicts where both writes are an AND or both
9440 writes are an OR. */
9441 if (rs
->dependency
->specifier
== IA64_RS_PR
9442 || rs
->dependency
->specifier
== IA64_RS_PRr
9443 || rs
->dependency
->specifier
== IA64_RS_PR63
)
9445 if (specs
[count
].cmp_type
!= CMP_NONE
9446 && specs
[count
].cmp_type
== rs
->cmp_type
)
9449 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
9450 dv_mode
[rs
->dependency
->mode
],
9451 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9452 specs
[count
].index
: 63);
9457 " %s on parallel compare conflict %s vs %s on PR%d\n",
9458 dv_mode
[rs
->dependency
->mode
],
9459 dv_cmp_type
[rs
->cmp_type
],
9460 dv_cmp_type
[specs
[count
].cmp_type
],
9461 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9462 specs
[count
].index
: 63);
9466 /* If either resource is not specific, conservatively assume a conflict
9468 if (!specs
[count
].specific
|| !rs
->specific
)
9470 else if (specs
[count
].index
== rs
->index
)
9475 fprintf (stderr
, " No %s conflicts\n", rs
->dependency
->name
);
9481 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9482 insert a stop to create the break. Update all resource dependencies
9483 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9484 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9485 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9489 insn_group_break (insert_stop
, qp_regno
, save_current
)
9496 if (insert_stop
&& md
.num_slots_in_use
> 0)
9497 PREV_SLOT
.end_of_insn_group
= 1;
9501 fprintf (stderr
, " Insn group break%s",
9502 (insert_stop
? " (w/stop)" : ""));
9504 fprintf (stderr
, " effective for QP=%d", qp_regno
);
9505 fprintf (stderr
, "\n");
9509 while (i
< regdepslen
)
9511 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
9514 && regdeps
[i
].qp_regno
!= qp_regno
)
9521 && CURR_SLOT
.src_file
== regdeps
[i
].file
9522 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
9528 /* clear dependencies which are automatically cleared by a stop, or
9529 those that have reached the appropriate state of insn serialization */
9530 if (dep
->semantics
== IA64_DVS_IMPLIED
9531 || dep
->semantics
== IA64_DVS_IMPLIEDF
9532 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
9534 print_dependency ("Removing", i
);
9535 regdeps
[i
] = regdeps
[--regdepslen
];
9539 if (dep
->semantics
== IA64_DVS_DATA
9540 || dep
->semantics
== IA64_DVS_INSTR
9541 || dep
->semantics
== IA64_DVS_SPECIFIC
)
9543 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
9544 regdeps
[i
].insn_srlz
= STATE_STOP
;
9545 if (regdeps
[i
].data_srlz
== STATE_NONE
)
9546 regdeps
[i
].data_srlz
= STATE_STOP
;
9553 /* Add the given resource usage spec to the list of active dependencies. */
9556 mark_resource (idesc
, dep
, spec
, depind
, path
)
9557 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
9558 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
9563 if (regdepslen
== regdepstotlen
)
9565 regdepstotlen
+= 20;
9566 regdeps
= (struct rsrc
*)
9567 xrealloc ((void *) regdeps
,
9568 regdepstotlen
* sizeof (struct rsrc
));
9571 regdeps
[regdepslen
] = *spec
;
9572 regdeps
[regdepslen
].depind
= depind
;
9573 regdeps
[regdepslen
].path
= path
;
9574 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
9575 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
9577 print_dependency ("Adding", regdepslen
);
9583 print_dependency (action
, depind
)
9589 fprintf (stderr
, " %s %s '%s'",
9590 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
9591 (regdeps
[depind
].dependency
)->name
);
9592 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
!= 0)
9593 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
9594 if (regdeps
[depind
].mem_offset
.hint
)
9596 fputs (" ", stderr
);
9597 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
9598 fputs ("+", stderr
);
9599 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
9601 fprintf (stderr
, "\n");
9606 instruction_serialization ()
9610 fprintf (stderr
, " Instruction serialization\n");
9611 for (i
= 0; i
< regdepslen
; i
++)
9612 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
9613 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
9617 data_serialization ()
9621 fprintf (stderr
, " Data serialization\n");
9622 while (i
< regdepslen
)
9624 if (regdeps
[i
].data_srlz
== STATE_STOP
9625 /* Note: as of 991210, all "other" dependencies are cleared by a
9626 data serialization. This might change with new tables */
9627 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
9629 print_dependency ("Removing", i
);
9630 regdeps
[i
] = regdeps
[--regdepslen
];
9637 /* Insert stops and serializations as needed to avoid DVs. */
9640 remove_marked_resource (rs
)
9643 switch (rs
->dependency
->semantics
)
9645 case IA64_DVS_SPECIFIC
:
9647 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
9648 /* ...fall through... */
9649 case IA64_DVS_INSTR
:
9651 fprintf (stderr
, "Inserting instr serialization\n");
9652 if (rs
->insn_srlz
< STATE_STOP
)
9653 insn_group_break (1, 0, 0);
9654 if (rs
->insn_srlz
< STATE_SRLZ
)
9656 struct slot oldslot
= CURR_SLOT
;
9657 /* Manually jam a srlz.i insn into the stream */
9658 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
9659 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
9660 instruction_serialization ();
9661 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9662 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9664 CURR_SLOT
= oldslot
;
9666 insn_group_break (1, 0, 0);
9668 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
9669 "other" types of DV are eliminated
9670 by a data serialization */
9673 fprintf (stderr
, "Inserting data serialization\n");
9674 if (rs
->data_srlz
< STATE_STOP
)
9675 insn_group_break (1, 0, 0);
9677 struct slot oldslot
= CURR_SLOT
;
9678 /* Manually jam a srlz.d insn into the stream */
9679 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
9680 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
9681 data_serialization ();
9682 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9683 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9685 CURR_SLOT
= oldslot
;
9688 case IA64_DVS_IMPLIED
:
9689 case IA64_DVS_IMPLIEDF
:
9691 fprintf (stderr
, "Inserting stop\n");
9692 insn_group_break (1, 0, 0);
9699 /* Check the resources used by the given opcode against the current dependency
9702 The check is run once for each execution path encountered. In this case,
9703 a unique execution path is the sequence of instructions following a code
9704 entry point, e.g. the following has three execution paths, one starting
9705 at L0, one at L1, and one at L2.
9714 check_dependencies (idesc
)
9715 struct ia64_opcode
*idesc
;
9717 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
9721 /* Note that the number of marked resources may change within the
9722 loop if in auto mode. */
9724 while (i
< regdepslen
)
9726 struct rsrc
*rs
= ®deps
[i
];
9727 const struct ia64_dependency
*dep
= rs
->dependency
;
9732 if (dep
->semantics
== IA64_DVS_NONE
9733 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
9739 note
= NOTE (opdeps
->chks
[chkind
]);
9741 /* Check this resource against each execution path seen thus far. */
9742 for (path
= 0; path
<= md
.path
; path
++)
9746 /* If the dependency wasn't on the path being checked, ignore it. */
9747 if (rs
->path
< path
)
9750 /* If the QP for this insn implies a QP which has branched, don't
9751 bother checking. Ed. NOTE: I don't think this check is terribly
9752 useful; what's the point of generating code which will only be
9753 reached if its QP is zero?
9754 This code was specifically inserted to handle the following code,
9755 based on notes from Intel's DV checking code, where p1 implies p2.
9761 if (CURR_SLOT
.qp_regno
!= 0)
9765 for (implies
= 0; implies
< qp_implieslen
; implies
++)
9767 if (qp_implies
[implies
].path
>= path
9768 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
9769 && qp_implies
[implies
].p2_branched
)
9779 if ((matchtype
= resources_match (rs
, idesc
, note
,
9780 CURR_SLOT
.qp_regno
, path
)) != 0)
9783 char pathmsg
[256] = "";
9784 char indexmsg
[256] = "";
9785 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
9788 sprintf (pathmsg
, " when entry is at label '%s'",
9789 md
.entry_labels
[path
- 1]);
9790 if (rs
->specific
&& rs
->index
!= 0)
9791 sprintf (indexmsg
, ", specific resource number is %d",
9793 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9795 (certain
? "violates" : "may violate"),
9796 dv_mode
[dep
->mode
], dep
->name
,
9797 dv_sem
[dep
->semantics
],
9800 if (md
.explicit_mode
)
9802 as_warn ("%s", msg
);
9804 as_warn (_("Only the first path encountering the conflict "
9806 as_warn_where (rs
->file
, rs
->line
,
9807 _("This is the location of the "
9808 "conflicting usage"));
9809 /* Don't bother checking other paths, to avoid duplicating
9816 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
9818 remove_marked_resource (rs
);
9820 /* since the set of dependencies has changed, start over */
9821 /* FIXME -- since we're removing dvs as we go, we
9822 probably don't really need to start over... */
9835 /* Register new dependencies based on the given opcode. */
9838 mark_resources (idesc
)
9839 struct ia64_opcode
*idesc
;
9842 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
9843 int add_only_qp_reads
= 0;
9845 /* A conditional branch only uses its resources if it is taken; if it is
9846 taken, we stop following that path. The other branch types effectively
9847 *always* write their resources. If it's not taken, register only QP
9849 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
9851 add_only_qp_reads
= 1;
9855 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
9857 for (i
= 0; i
< opdeps
->nregs
; i
++)
9859 const struct ia64_dependency
*dep
;
9860 struct rsrc specs
[MAX_SPECS
];
9865 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
9866 note
= NOTE (opdeps
->regs
[i
]);
9868 if (add_only_qp_reads
9869 && !(dep
->mode
== IA64_DV_WAR
9870 && (dep
->specifier
== IA64_RS_PR
9871 || dep
->specifier
== IA64_RS_PRr
9872 || dep
->specifier
== IA64_RS_PR63
)))
9875 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
9878 if (md
.debug_dv
&& !count
)
9879 fprintf (stderr
, " No %s %s usage found (path %d)\n",
9880 dv_mode
[dep
->mode
], dep
->name
, md
.path
);
9885 mark_resource (idesc
, dep
, &specs
[count
],
9886 DEP (opdeps
->regs
[i
]), md
.path
);
9889 /* The execution path may affect register values, which may in turn
9890 affect which indirect-access resources are accessed. */
9891 switch (dep
->specifier
)
9903 for (path
= 0; path
< md
.path
; path
++)
9905 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
9907 mark_resource (idesc
, dep
, &specs
[count
],
9908 DEP (opdeps
->regs
[i
]), path
);
9915 /* Remove dependencies when they no longer apply. */
9918 update_dependencies (idesc
)
9919 struct ia64_opcode
*idesc
;
9923 if (strcmp (idesc
->name
, "srlz.i") == 0)
9925 instruction_serialization ();
9927 else if (strcmp (idesc
->name
, "srlz.d") == 0)
9929 data_serialization ();
9931 else if (is_interruption_or_rfi (idesc
)
9932 || is_taken_branch (idesc
))
9934 /* Although technically the taken branch doesn't clear dependencies
9935 which require a srlz.[id], we don't follow the branch; the next
9936 instruction is assumed to start with a clean slate. */
9940 else if (is_conditional_branch (idesc
)
9941 && CURR_SLOT
.qp_regno
!= 0)
9943 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
9945 for (i
= 0; i
< qp_implieslen
; i
++)
9947 /* If the conditional branch's predicate is implied by the predicate
9948 in an existing dependency, remove that dependency. */
9949 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
9952 /* Note that this implied predicate takes a branch so that if
9953 a later insn generates a DV but its predicate implies this
9954 one, we can avoid the false DV warning. */
9955 qp_implies
[i
].p2_branched
= 1;
9956 while (depind
< regdepslen
)
9958 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
9960 print_dependency ("Removing", depind
);
9961 regdeps
[depind
] = regdeps
[--regdepslen
];
9968 /* Any marked resources which have this same predicate should be
9969 cleared, provided that the QP hasn't been modified between the
9970 marking instruction and the branch. */
9973 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
9978 while (i
< regdepslen
)
9980 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
9981 && regdeps
[i
].link_to_qp_branch
9982 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
9983 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
9985 /* Treat like a taken branch */
9986 print_dependency ("Removing", i
);
9987 regdeps
[i
] = regdeps
[--regdepslen
];
9996 /* Examine the current instruction for dependency violations. */
10000 struct ia64_opcode
*idesc
;
10004 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10005 idesc
->name
, CURR_SLOT
.src_line
,
10006 idesc
->dependencies
->nchks
,
10007 idesc
->dependencies
->nregs
);
10010 /* Look through the list of currently marked resources; if the current
10011 instruction has the dependency in its chks list which uses that resource,
10012 check against the specific resources used. */
10013 check_dependencies (idesc
);
10015 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10016 then add them to the list of marked resources. */
10017 mark_resources (idesc
);
10019 /* There are several types of dependency semantics, and each has its own
10020 requirements for being cleared
10022 Instruction serialization (insns separated by interruption, rfi, or
10023 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10025 Data serialization (instruction serialization, or writer + srlz.d +
10026 reader, where writer and srlz.d are in separate groups) clears
10027 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10028 always be the case).
10030 Instruction group break (groups separated by stop, taken branch,
10031 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10033 update_dependencies (idesc
);
10035 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10036 warning. Keep track of as many as possible that are useful. */
10037 note_register_values (idesc
);
10039 /* We don't need or want this anymore. */
10040 md
.mem_offset
.hint
= 0;
10045 /* Translate one line of assembly. Pseudo ops and labels do not show
10051 char *saved_input_line_pointer
, *mnemonic
;
10052 const struct pseudo_opcode
*pdesc
;
10053 struct ia64_opcode
*idesc
;
10054 unsigned char qp_regno
;
10055 unsigned int flags
;
10058 saved_input_line_pointer
= input_line_pointer
;
10059 input_line_pointer
= str
;
10061 /* extract the opcode (mnemonic): */
10063 mnemonic
= input_line_pointer
;
10064 ch
= get_symbol_end ();
10065 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10068 *input_line_pointer
= ch
;
10069 (*pdesc
->handler
) (pdesc
->arg
);
10073 /* Find the instruction descriptor matching the arguments. */
10075 idesc
= ia64_find_opcode (mnemonic
);
10076 *input_line_pointer
= ch
;
10079 as_bad ("Unknown opcode `%s'", mnemonic
);
10083 idesc
= parse_operands (idesc
);
10087 /* Handle the dynamic ops we can handle now: */
10088 if (idesc
->type
== IA64_TYPE_DYN
)
10090 if (strcmp (idesc
->name
, "add") == 0)
10092 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10093 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10097 ia64_free_opcode (idesc
);
10098 idesc
= ia64_find_opcode (mnemonic
);
10100 know (!idesc
->next
);
10103 else if (strcmp (idesc
->name
, "mov") == 0)
10105 enum ia64_opnd opnd1
, opnd2
;
10108 opnd1
= idesc
->operands
[0];
10109 opnd2
= idesc
->operands
[1];
10110 if (opnd1
== IA64_OPND_AR3
)
10112 else if (opnd2
== IA64_OPND_AR3
)
10116 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10118 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10119 mnemonic
= "mov.i";
10120 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10121 mnemonic
= "mov.m";
10129 ia64_free_opcode (idesc
);
10130 idesc
= ia64_find_opcode (mnemonic
);
10131 while (idesc
!= NULL
10132 && (idesc
->operands
[0] != opnd1
10133 || idesc
->operands
[1] != opnd2
))
10134 idesc
= get_next_opcode (idesc
);
10138 else if (strcmp (idesc
->name
, "mov.i") == 0
10139 || strcmp (idesc
->name
, "mov.m") == 0)
10141 enum ia64_opnd opnd1
, opnd2
;
10144 opnd1
= idesc
->operands
[0];
10145 opnd2
= idesc
->operands
[1];
10146 if (opnd1
== IA64_OPND_AR3
)
10148 else if (opnd2
== IA64_OPND_AR3
)
10152 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10155 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10157 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10159 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10160 as_bad ("AR %d cannot be accessed by %c-unit",
10161 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10167 if (md
.qp
.X_op
== O_register
)
10169 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10170 md
.qp
.X_op
= O_absent
;
10173 flags
= idesc
->flags
;
10175 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10177 /* The alignment frag has to end with a stop bit only if the
10178 next instruction after the alignment directive has to be
10179 the first instruction in an instruction group. */
10182 while (align_frag
->fr_type
!= rs_align_code
)
10184 align_frag
= align_frag
->fr_next
;
10188 /* align_frag can be NULL if there are directives in
10190 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10191 align_frag
->tc_frag_data
= 1;
10194 insn_group_break (1, 0, 0);
10198 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10200 as_bad ("`%s' cannot be predicated", idesc
->name
);
10204 /* Build the instruction. */
10205 CURR_SLOT
.qp_regno
= qp_regno
;
10206 CURR_SLOT
.idesc
= idesc
;
10207 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10208 dwarf2_where (&CURR_SLOT
.debug_line
);
10210 /* Add unwind entry, if there is one. */
10211 if (unwind
.current_entry
)
10213 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10214 unwind
.current_entry
= NULL
;
10217 /* Check for dependency violations. */
10221 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10222 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10223 emit_one_bundle ();
10225 if ((flags
& IA64_OPCODE_LAST
) != 0)
10226 insn_group_break (1, 0, 0);
10228 md
.last_text_seg
= now_seg
;
10231 input_line_pointer
= saved_input_line_pointer
;
10234 /* Called when symbol NAME cannot be found in the symbol table.
10235 Should be used for dynamic valued symbols only. */
10238 md_undefined_symbol (name
)
10239 char *name ATTRIBUTE_UNUSED
;
10244 /* Called for any expression that can not be recognized. When the
10245 function is called, `input_line_pointer' will point to the start of
10252 enum pseudo_type pseudo_type
;
10257 switch (*input_line_pointer
)
10260 /* Find what relocation pseudo-function we're dealing with. */
10262 ch
= *++input_line_pointer
;
10263 for (i
= 0; i
< NELEMS (pseudo_func
); ++i
)
10264 if (pseudo_func
[i
].name
&& pseudo_func
[i
].name
[0] == ch
)
10266 len
= strlen (pseudo_func
[i
].name
);
10267 if (strncmp (pseudo_func
[i
].name
+ 1,
10268 input_line_pointer
+ 1, len
- 1) == 0
10269 && !is_part_of_name (input_line_pointer
[len
]))
10271 input_line_pointer
+= len
;
10272 pseudo_type
= pseudo_func
[i
].type
;
10276 switch (pseudo_type
)
10278 case PSEUDO_FUNC_RELOC
:
10279 SKIP_WHITESPACE ();
10280 if (*input_line_pointer
!= '(')
10282 as_bad ("Expected '('");
10286 ++input_line_pointer
;
10288 if (*input_line_pointer
++ != ')')
10290 as_bad ("Missing ')'");
10293 if (e
->X_op
!= O_symbol
)
10295 if (e
->X_op
!= O_pseudo_fixup
)
10297 as_bad ("Not a symbolic expression");
10300 if (i
!= FUNC_LT_RELATIVE
)
10302 as_bad ("Illegal combination of relocation functions");
10305 switch (S_GET_VALUE (e
->X_op_symbol
))
10307 case FUNC_FPTR_RELATIVE
:
10308 i
= FUNC_LT_FPTR_RELATIVE
; break;
10309 case FUNC_DTP_MODULE
:
10310 i
= FUNC_LT_DTP_MODULE
; break;
10311 case FUNC_DTP_RELATIVE
:
10312 i
= FUNC_LT_DTP_RELATIVE
; break;
10313 case FUNC_TP_RELATIVE
:
10314 i
= FUNC_LT_TP_RELATIVE
; break;
10316 as_bad ("Illegal combination of relocation functions");
10320 /* Make sure gas doesn't get rid of local symbols that are used
10322 e
->X_op
= O_pseudo_fixup
;
10323 e
->X_op_symbol
= pseudo_func
[i
].u
.sym
;
10326 case PSEUDO_FUNC_CONST
:
10327 e
->X_op
= O_constant
;
10328 e
->X_add_number
= pseudo_func
[i
].u
.ival
;
10331 case PSEUDO_FUNC_REG
:
10332 e
->X_op
= O_register
;
10333 e
->X_add_number
= pseudo_func
[i
].u
.ival
;
10337 name
= input_line_pointer
- 1;
10339 as_bad ("Unknown pseudo function `%s'", name
);
10345 ++input_line_pointer
;
10347 if (*input_line_pointer
!= ']')
10349 as_bad ("Closing bracket misssing");
10354 if (e
->X_op
!= O_register
)
10355 as_bad ("Register expected as index");
10357 ++input_line_pointer
;
10368 ignore_rest_of_line ();
10371 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10372 a section symbol plus some offset. For relocs involving @fptr(),
10373 directives we don't want such adjustments since we need to have the
10374 original symbol's name in the reloc. */
10376 ia64_fix_adjustable (fix
)
10379 /* Prevent all adjustments to global symbols */
10380 if (S_IS_EXTERN (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10383 switch (fix
->fx_r_type
)
10385 case BFD_RELOC_IA64_FPTR64I
:
10386 case BFD_RELOC_IA64_FPTR32MSB
:
10387 case BFD_RELOC_IA64_FPTR32LSB
:
10388 case BFD_RELOC_IA64_FPTR64MSB
:
10389 case BFD_RELOC_IA64_FPTR64LSB
:
10390 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10391 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10401 ia64_force_relocation (fix
)
10404 switch (fix
->fx_r_type
)
10406 case BFD_RELOC_IA64_FPTR64I
:
10407 case BFD_RELOC_IA64_FPTR32MSB
:
10408 case BFD_RELOC_IA64_FPTR32LSB
:
10409 case BFD_RELOC_IA64_FPTR64MSB
:
10410 case BFD_RELOC_IA64_FPTR64LSB
:
10412 case BFD_RELOC_IA64_LTOFF22
:
10413 case BFD_RELOC_IA64_LTOFF64I
:
10414 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10415 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10416 case BFD_RELOC_IA64_PLTOFF22
:
10417 case BFD_RELOC_IA64_PLTOFF64I
:
10418 case BFD_RELOC_IA64_PLTOFF64MSB
:
10419 case BFD_RELOC_IA64_PLTOFF64LSB
:
10421 case BFD_RELOC_IA64_LTOFF22X
:
10422 case BFD_RELOC_IA64_LDXMOV
:
10429 return generic_force_reloc (fix
);
10432 /* Decide from what point a pc-relative relocation is relative to,
10433 relative to the pc-relative fixup. Er, relatively speaking. */
10435 ia64_pcrel_from_section (fix
, sec
)
10439 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10441 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10448 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10450 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10454 expr
.X_op
= O_pseudo_fixup
;
10455 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10456 expr
.X_add_number
= 0;
10457 expr
.X_add_symbol
= symbol
;
10458 emit_expr (&expr
, size
);
10461 /* This is called whenever some data item (not an instruction) needs a
10462 fixup. We pick the right reloc code depending on the byteorder
10463 currently in effect. */
10465 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
10471 bfd_reloc_code_real_type code
;
10476 /* There are no reloc for 8 and 16 bit quantities, but we allow
10477 them here since they will work fine as long as the expression
10478 is fully defined at the end of the pass over the source file. */
10479 case 1: code
= BFD_RELOC_8
; break;
10480 case 2: code
= BFD_RELOC_16
; break;
10482 if (target_big_endian
)
10483 code
= BFD_RELOC_IA64_DIR32MSB
;
10485 code
= BFD_RELOC_IA64_DIR32LSB
;
10489 /* In 32-bit mode, data8 could mean function descriptors too. */
10490 if (exp
->X_op
== O_pseudo_fixup
10491 && exp
->X_op_symbol
10492 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
10493 && !(md
.flags
& EF_IA_64_ABI64
))
10495 if (target_big_endian
)
10496 code
= BFD_RELOC_IA64_IPLTMSB
;
10498 code
= BFD_RELOC_IA64_IPLTLSB
;
10499 exp
->X_op
= O_symbol
;
10504 if (target_big_endian
)
10505 code
= BFD_RELOC_IA64_DIR64MSB
;
10507 code
= BFD_RELOC_IA64_DIR64LSB
;
10512 if (exp
->X_op
== O_pseudo_fixup
10513 && exp
->X_op_symbol
10514 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
10516 if (target_big_endian
)
10517 code
= BFD_RELOC_IA64_IPLTMSB
;
10519 code
= BFD_RELOC_IA64_IPLTLSB
;
10520 exp
->X_op
= O_symbol
;
10526 as_bad ("Unsupported fixup size %d", nbytes
);
10527 ignore_rest_of_line ();
10531 if (exp
->X_op
== O_pseudo_fixup
)
10533 exp
->X_op
= O_symbol
;
10534 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
10535 /* ??? If code unchanged, unsupported. */
10538 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
10539 /* We need to store the byte order in effect in case we're going
10540 to fix an 8 or 16 bit relocation (for which there no real
10541 relocs available). See md_apply_fix3(). */
10542 fix
->tc_fix_data
.bigendian
= target_big_endian
;
10545 /* Return the actual relocation we wish to associate with the pseudo
10546 reloc described by SYM and R_TYPE. SYM should be one of the
10547 symbols in the pseudo_func array, or NULL. */
10549 static bfd_reloc_code_real_type
10550 ia64_gen_real_reloc_type (sym
, r_type
)
10551 struct symbol
*sym
;
10552 bfd_reloc_code_real_type r_type
;
10554 bfd_reloc_code_real_type
new = 0;
10561 switch (S_GET_VALUE (sym
))
10563 case FUNC_FPTR_RELATIVE
:
10566 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
10567 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
10568 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
10569 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
10570 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
10575 case FUNC_GP_RELATIVE
:
10578 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
10579 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
10580 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
10581 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
10582 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
10583 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
10588 case FUNC_LT_RELATIVE
:
10591 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
10592 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
10597 case FUNC_LT_RELATIVE_X
:
10600 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
10605 case FUNC_PC_RELATIVE
:
10608 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
10609 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
10610 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
10611 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
10612 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
10613 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
10618 case FUNC_PLT_RELATIVE
:
10621 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
10622 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
10623 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
10624 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
10629 case FUNC_SEC_RELATIVE
:
10632 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
10633 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
10634 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
10635 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
10640 case FUNC_SEG_RELATIVE
:
10643 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
10644 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
10645 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
10646 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
10651 case FUNC_LTV_RELATIVE
:
10654 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
10655 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
10656 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
10657 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
10662 case FUNC_LT_FPTR_RELATIVE
:
10665 case BFD_RELOC_IA64_IMM22
:
10666 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
10667 case BFD_RELOC_IA64_IMM64
:
10668 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
10674 case FUNC_TP_RELATIVE
:
10677 case BFD_RELOC_IA64_IMM14
:
10678 new = BFD_RELOC_IA64_TPREL14
; break;
10679 case BFD_RELOC_IA64_IMM22
:
10680 new = BFD_RELOC_IA64_TPREL22
; break;
10681 case BFD_RELOC_IA64_IMM64
:
10682 new = BFD_RELOC_IA64_TPREL64I
; break;
10688 case FUNC_LT_TP_RELATIVE
:
10691 case BFD_RELOC_IA64_IMM22
:
10692 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
10698 case FUNC_LT_DTP_MODULE
:
10701 case BFD_RELOC_IA64_IMM22
:
10702 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
10708 case FUNC_DTP_RELATIVE
:
10711 case BFD_RELOC_IA64_DIR64MSB
:
10712 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
10713 case BFD_RELOC_IA64_DIR64LSB
:
10714 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
10715 case BFD_RELOC_IA64_IMM14
:
10716 new = BFD_RELOC_IA64_DTPREL14
; break;
10717 case BFD_RELOC_IA64_IMM22
:
10718 new = BFD_RELOC_IA64_DTPREL22
; break;
10719 case BFD_RELOC_IA64_IMM64
:
10720 new = BFD_RELOC_IA64_DTPREL64I
; break;
10726 case FUNC_LT_DTP_RELATIVE
:
10729 case BFD_RELOC_IA64_IMM22
:
10730 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
10736 case FUNC_IPLT_RELOC
:
10743 /* Hmmmm. Should this ever occur? */
10750 /* Here is where generate the appropriate reloc for pseudo relocation
10753 ia64_validate_fix (fix
)
10756 switch (fix
->fx_r_type
)
10758 case BFD_RELOC_IA64_FPTR64I
:
10759 case BFD_RELOC_IA64_FPTR32MSB
:
10760 case BFD_RELOC_IA64_FPTR64LSB
:
10761 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10762 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10763 if (fix
->fx_offset
!= 0)
10764 as_bad_where (fix
->fx_file
, fix
->fx_line
,
10765 "No addend allowed in @fptr() relocation");
10773 fix_insn (fix
, odesc
, value
)
10775 const struct ia64_operand
*odesc
;
10778 bfd_vma insn
[3], t0
, t1
, control_bits
;
10783 slot
= fix
->fx_where
& 0x3;
10784 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
10786 /* Bundles are always in little-endian byte order */
10787 t0
= bfd_getl64 (fixpos
);
10788 t1
= bfd_getl64 (fixpos
+ 8);
10789 control_bits
= t0
& 0x1f;
10790 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
10791 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
10792 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
10795 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
10797 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
10798 insn
[2] |= (((value
& 0x7f) << 13)
10799 | (((value
>> 7) & 0x1ff) << 27)
10800 | (((value
>> 16) & 0x1f) << 22)
10801 | (((value
>> 21) & 0x1) << 21)
10802 | (((value
>> 63) & 0x1) << 36));
10804 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
10806 if (value
& ~0x3fffffffffffffffULL
)
10807 err
= "integer operand out of range";
10808 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
10809 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
10811 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
10814 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
10815 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
10816 | (((value
>> 0) & 0xfffff) << 13));
10819 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
10822 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
10824 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
10825 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
10826 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
10827 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
10830 /* Attempt to simplify or even eliminate a fixup. The return value is
10831 ignored; perhaps it was once meaningful, but now it is historical.
10832 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10834 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10838 md_apply_fix3 (fix
, valP
, seg
)
10841 segT seg ATTRIBUTE_UNUSED
;
10844 valueT value
= *valP
;
10846 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
10850 switch (fix
->fx_r_type
)
10852 case BFD_RELOC_IA64_DIR32MSB
:
10853 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32MSB
;
10856 case BFD_RELOC_IA64_DIR32LSB
:
10857 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32LSB
;
10860 case BFD_RELOC_IA64_DIR64MSB
:
10861 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64MSB
;
10864 case BFD_RELOC_IA64_DIR64LSB
:
10865 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64LSB
;
10874 switch (fix
->fx_r_type
)
10876 case BFD_RELOC_UNUSED
:
10877 /* This must be a TAG13 or TAG13b operand. There are no external
10878 relocs defined for them, so we must give an error. */
10879 as_bad_where (fix
->fx_file
, fix
->fx_line
,
10880 "%s must have a constant value",
10881 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
10885 case BFD_RELOC_IA64_TPREL14
:
10886 case BFD_RELOC_IA64_TPREL22
:
10887 case BFD_RELOC_IA64_TPREL64I
:
10888 case BFD_RELOC_IA64_LTOFF_TPREL22
:
10889 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
10890 case BFD_RELOC_IA64_DTPREL14
:
10891 case BFD_RELOC_IA64_DTPREL22
:
10892 case BFD_RELOC_IA64_DTPREL64I
:
10893 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
10894 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
10901 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
10903 if (fix
->tc_fix_data
.bigendian
)
10904 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
10906 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
10911 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
10916 /* Generate the BFD reloc to be stuck in the object file from the
10917 fixup used internally in the assembler. */
10920 tc_gen_reloc (sec
, fixp
)
10921 asection
*sec ATTRIBUTE_UNUSED
;
10926 reloc
= xmalloc (sizeof (*reloc
));
10927 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
10928 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
10929 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
10930 reloc
->addend
= fixp
->fx_offset
;
10931 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
10935 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
10936 "Cannot represent %s relocation in object file",
10937 bfd_get_reloc_code_name (fixp
->fx_r_type
));
10942 /* Turn a string in input_line_pointer into a floating point constant
10943 of type TYPE, and store the appropriate bytes in *LIT. The number
10944 of LITTLENUMS emitted is stored in *SIZE. An error message is
10945 returned, or NULL on OK. */
10947 #define MAX_LITTLENUMS 5
10950 md_atof (type
, lit
, size
)
10955 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
10985 return "Bad call to MD_ATOF()";
10987 t
= atof_ieee (input_line_pointer
, type
, words
);
10989 input_line_pointer
= t
;
10991 (*ia64_float_to_chars
) (lit
, words
, prec
);
10995 /* It is 10 byte floating point with 6 byte padding. */
10996 memset (&lit
[10], 0, 6);
10997 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11000 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11005 /* Handle ia64 specific semantics of the align directive. */
11008 ia64_md_do_align (n
, fill
, len
, max
)
11009 int n ATTRIBUTE_UNUSED
;
11010 const char *fill ATTRIBUTE_UNUSED
;
11011 int len ATTRIBUTE_UNUSED
;
11012 int max ATTRIBUTE_UNUSED
;
11014 if (subseg_text_p (now_seg
))
11015 ia64_flush_insns ();
11018 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11019 of an rs_align_code fragment. */
11022 ia64_handle_align (fragp
)
11025 /* Use mfi bundle of nops with no stop bits. */
11026 static const unsigned char le_nop
[]
11027 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11028 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11029 static const unsigned char le_nop_stop
[]
11030 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11031 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11035 const unsigned char *nop
;
11037 if (fragp
->fr_type
!= rs_align_code
)
11040 /* Check if this frag has to end with a stop bit. */
11041 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11043 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11044 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11046 /* If no paddings are needed, we check if we need a stop bit. */
11047 if (!bytes
&& fragp
->tc_frag_data
)
11049 if (fragp
->fr_fix
< 16)
11051 /* FIXME: It won't work with
11053 alloc r32=ar.pfs,1,2,4,0
11057 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11058 _("Can't add stop bit to mark end of instruction group"));
11061 /* Bundles are always in little-endian byte order. Make sure
11062 the previous bundle has the stop bit. */
11066 /* Make sure we are on a 16-byte boundary, in case someone has been
11067 putting data into a text section. */
11070 int fix
= bytes
& 15;
11071 memset (p
, 0, fix
);
11074 fragp
->fr_fix
+= fix
;
11077 /* Instruction bundles are always little-endian. */
11078 memcpy (p
, nop
, 16);
11079 fragp
->fr_var
= 16;
11083 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11088 number_to_chars_bigendian (lit
, (long) (*words
++),
11089 sizeof (LITTLENUM_TYPE
));
11090 lit
+= sizeof (LITTLENUM_TYPE
);
11095 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11100 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11101 sizeof (LITTLENUM_TYPE
));
11102 lit
+= sizeof (LITTLENUM_TYPE
);
11107 ia64_elf_section_change_hook (void)
11109 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11110 && elf_linked_to_section (now_seg
) == NULL
)
11111 elf_linked_to_section (now_seg
) = text_section
;
11112 dot_byteorder (-1);
11115 /* Check if a label should be made global. */
11117 ia64_check_label (symbolS
*label
)
11119 if (*input_line_pointer
== ':')
11121 S_SET_EXTERNAL (label
);
11122 input_line_pointer
++;
11126 /* Used to remember where .alias and .secalias directives are seen. We
11127 will rename symbol and section names when we are about to output
11128 the relocatable file. */
11131 char *file
; /* The file where the directive is seen. */
11132 unsigned int line
; /* The line number the directive is at. */
11133 const char *name
; /* The orignale name of the symbol. */
11136 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11137 .secalias. Otherwise, it is .alias. */
11139 dot_alias (int section
)
11141 char *name
, *alias
;
11145 const char *error_string
;
11148 struct hash_control
*ahash
, *nhash
;
11151 name
= input_line_pointer
;
11152 delim
= get_symbol_end ();
11153 end_name
= input_line_pointer
;
11156 if (name
== end_name
)
11158 as_bad (_("expected symbol name"));
11159 discard_rest_of_line ();
11163 SKIP_WHITESPACE ();
11165 if (*input_line_pointer
!= ',')
11168 as_bad (_("expected comma after \"%s\""), name
);
11170 ignore_rest_of_line ();
11174 input_line_pointer
++;
11177 /* We call demand_copy_C_string to check if alias string is valid.
11178 There should be a closing `"' and no `\0' in the string. */
11179 alias
= demand_copy_C_string (&len
);
11182 ignore_rest_of_line ();
11186 /* Make a copy of name string. */
11187 len
= strlen (name
) + 1;
11188 obstack_grow (¬es
, name
, len
);
11189 name
= obstack_finish (¬es
);
11194 ahash
= secalias_hash
;
11195 nhash
= secalias_name_hash
;
11200 ahash
= alias_hash
;
11201 nhash
= alias_name_hash
;
11204 /* Check if alias has been used before. */
11205 h
= (struct alias
*) hash_find (ahash
, alias
);
11208 if (strcmp (h
->name
, name
))
11209 as_bad (_("`%s' is already the alias of %s `%s'"),
11210 alias
, kind
, h
->name
);
11214 /* Check if name already has an alias. */
11215 a
= (const char *) hash_find (nhash
, name
);
11218 if (strcmp (a
, alias
))
11219 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11223 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11224 as_where (&h
->file
, &h
->line
);
11227 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11230 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11231 alias
, kind
, error_string
);
11235 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11238 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11239 alias
, kind
, error_string
);
11241 obstack_free (¬es
, name
);
11242 obstack_free (¬es
, alias
);
11245 demand_empty_rest_of_line ();
11248 /* It renames the original symbol name to its alias. */
11250 do_alias (const char *alias
, PTR value
)
11252 struct alias
*h
= (struct alias
*) value
;
11253 symbolS
*sym
= symbol_find (h
->name
);
11256 as_warn_where (h
->file
, h
->line
,
11257 _("symbol `%s' aliased to `%s' is not used"),
11260 S_SET_NAME (sym
, (char *) alias
);
11263 /* Called from write_object_file. */
11265 ia64_adjust_symtab (void)
11267 hash_traverse (alias_hash
, do_alias
);
11270 /* It renames the original section name to its alias. */
11272 do_secalias (const char *alias
, PTR value
)
11274 struct alias
*h
= (struct alias
*) value
;
11275 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11278 as_warn_where (h
->file
, h
->line
,
11279 _("section `%s' aliased to `%s' is not used"),
11285 /* Called from write_object_file. */
11287 ia64_frob_file (void)
11289 hash_traverse (secalias_hash
, do_secalias
);