1 /* tc-m68k.c -- Assemble for the m68k family
2 Copyright (C) 1987, 91, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
26 #include "opcode/m68k.h"
27 #include "m68k-parse.h"
29 /* This string holds the chars that always start a comment. If the
30 pre-processor is disabled, these aren't very useful. The macro
31 tc_comment_chars points to this. We use this, rather than the
32 usual comment_chars, so that the --bitwise-or option will work. */
33 #if (defined (OBJ_ELF) && ! defined (TE_PSOS) && ! defined (TE_LINUX)) || defined (TE_DELTA)
34 const char *m68k_comment_chars
= "|#";
36 const char *m68k_comment_chars
= "|";
39 /* This array holds the chars that only start a comment at the beginning of
40 a line. If the line seems to have the form '# 123 filename'
41 .line and .file directives will appear in the pre-processed output */
42 /* Note that input_file.c hand checks for '#' at the beginning of the
43 first line of the input file. This is because the compiler outputs
44 #NO_APP at the beginning of its output. */
45 /* Also note that comments like this one will always work. */
46 const char line_comment_chars
[] = "#";
48 const char line_separator_chars
[] = "";
50 /* Chars that can be used to separate mant from exp in floating point nums */
51 CONST
char EXP_CHARS
[] = "eE";
53 /* Chars that mean this number is a floating point constant, as
54 in "0f12.456" or "0d1.2345e12". */
56 CONST
char FLT_CHARS
[] = "rRsSfFdDxXeEpP";
58 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
59 changed in read.c . Ideally it shouldn't have to know about it at all,
60 but nothing is ideal around here. */
62 const int md_reloc_size
= 8; /* Size of relocation record */
64 /* Are we trying to generate PIC code? If so, absolute references
65 ought to be made into linkage table references or pc-relative
66 references. Not implemented. For ELF there are other means
67 to denote pic relocations. */
70 static int flag_short_refs
; /* -l option */
71 static int flag_long_jumps
; /* -S option */
73 #ifdef REGISTER_PREFIX_OPTIONAL
74 int flag_reg_prefix_optional
= REGISTER_PREFIX_OPTIONAL
;
76 int flag_reg_prefix_optional
;
79 /* Whether --register-prefix-optional was used on the command line. */
80 static int reg_prefix_optional_seen
;
82 /* The floating point coprocessor to use by default. */
83 static enum m68k_register m68k_float_copnum
= COP1
;
85 /* If this is non-zero, then references to number(%pc) will be taken
86 to refer to number, rather than to %pc + number. */
87 static int m68k_abspcadd
;
89 /* If this is non-zero, then the quick forms of the move, add, and sub
90 instructions are used when possible. */
91 static int m68k_quick
= 1;
93 /* If this is non-zero, then if the size is not specified for a base
94 or outer displacement, the assembler assumes that the size should
96 static int m68k_rel32
= 1;
98 /* Its an arbitrary name: This means I don't approve of it */
99 /* See flames below */
100 static struct obstack robyn
;
102 #define TAB(x,y) (((x)<<2)+(y))
103 #define TABTYPE(xy) ((xy) >> 2)
109 /* Case `g' except when BCC68000 is applicable. */
111 /* Coprocessor branches. */
113 /* Mode 7.2 -- program counter indirect with (16-bit) displacement,
114 supported on all cpus. Widens to 32-bit absolute. */
116 /* For inserting an extra jmp instruction with long offset on 68000,
117 for expanding conditional branches. (Not bsr or bra.) Since the
118 68000 doesn't support 32-bit displacements for conditional
119 branches, we fake it by reversing the condition and branching
120 around a jmp with an absolute long operand. */
122 /* For the DBcc "instructions". If the displacement requires 32 bits,
123 the branch-around-a-jump game is played here too. */
125 /* Not currently used? */
127 /* Mode AINDX (apc-relative) using PC, with variable target, might fit
133 const char *m_operands
;
134 unsigned long m_opcode
;
138 struct m68k_incant
*m_next
;
141 #define getone(x) ((((x)->m_opcode)>>16)&0xffff)
142 #define gettwo(x) (((x)->m_opcode)&0xffff)
144 static const enum m68k_register m68000_control_regs
[] = { 0 };
145 static const enum m68k_register m68010_control_regs
[] = {
149 static const enum m68k_register m68020_control_regs
[] = {
150 SFC
, DFC
, USP
, VBR
, CACR
, CAAR
, MSP
, ISP
,
153 static const enum m68k_register m68040_control_regs
[] = {
154 SFC
, DFC
, CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
,
155 USP
, VBR
, MSP
, ISP
, MMUSR
, URP
, SRP
,
158 static const enum m68k_register m68060_control_regs
[] = {
159 SFC
, DFC
, CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
, BUSCR
,
160 USP
, VBR
, URP
, SRP
, PCR
,
163 static const enum m68k_register mcf5200_control_regs
[] = {
164 CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
, VBR
, ROMBAR
,
165 RAMBAR0
, RAMBAR1
, MBAR
,
168 #define cpu32_control_regs m68010_control_regs
170 static const enum m68k_register
*control_regs
;
172 /* internal form of a 68020 instruction */
176 const char *args
; /* list of opcode info */
179 int numo
; /* Number of shorts in opcode */
182 struct m68k_op operands
[6];
184 int nexp
; /* number of exprs in use */
185 struct m68k_exp exprs
[4];
187 int nfrag
; /* Number of frags we have to produce */
190 int fragoff
; /* Where in the current opcode the frag ends */
197 int nrel
; /* Num of reloc strucs in use */
204 /* In a pc relative address the difference between the address
205 of the offset and the address that the offset is relative
206 to. This depends on the addressing mode. Basically this
207 is the value to put in the offset field to address the
208 first byte of the offset, without regarding the special
209 significance of some values (in the branch instruction, for
213 /* Whether this expression needs special pic relocation, and if
215 enum pic_relocation pic_reloc
;
218 reloc
[5]; /* Five is enough??? */
221 #define cpu_of_arch(x) ((x) & (m68000up|mcf5200))
222 #define float_of_arch(x) ((x) & mfloat)
223 #define mmu_of_arch(x) ((x) & mmmu)
225 static struct m68k_it the_ins
; /* the instruction being assembled */
227 #define op(ex) ((ex)->exp.X_op)
228 #define adds(ex) ((ex)->exp.X_add_symbol)
229 #define subs(ex) ((ex)->exp.X_op_symbol)
230 #define offs(ex) ((ex)->exp.X_add_number)
232 /* Macros for adding things to the m68k_it struct */
234 #define addword(w) the_ins.opcode[the_ins.numo++]=(w)
236 /* Like addword, but goes BEFORE general operands */
240 struct m68k_incant
*opcode
;
243 for(z
=the_ins
.numo
;z
>opcode
->m_codenum
;--z
)
244 the_ins
.opcode
[z
]=the_ins
.opcode
[z
-1];
245 for(z
=0;z
<the_ins
.nrel
;z
++)
246 the_ins
.reloc
[z
].n
+=2;
247 for (z
= 0; z
< the_ins
.nfrag
; z
++)
248 the_ins
.fragb
[z
].fragoff
++;
249 the_ins
.opcode
[opcode
->m_codenum
]=w
;
253 /* The numo+1 kludge is so we can hit the low order byte of the prev word.
256 add_fix (width
, exp
, pc_rel
, pc_fix
)
258 struct m68k_exp
*exp
;
262 the_ins
.reloc
[the_ins
.nrel
].n
= ((width
== 'B' || width
== '3')
266 : (the_ins
.numo
*2)));
267 the_ins
.reloc
[the_ins
.nrel
].exp
= exp
->exp
;
268 the_ins
.reloc
[the_ins
.nrel
].wid
= width
;
269 the_ins
.reloc
[the_ins
.nrel
].pcrel_fix
= pc_fix
;
271 the_ins
.reloc
[the_ins
.nrel
].pic_reloc
= exp
->pic_reloc
;
273 the_ins
.reloc
[the_ins
.nrel
++].pcrel
= pc_rel
;
276 /* Cause an extra frag to be generated here, inserting up to 10 bytes
277 (that value is chosen in the frag_var call in md_assemble). TYPE
278 is the subtype of the frag to be generated; its primary type is
279 rs_machine_dependent.
281 The TYPE parameter is also used by md_convert_frag_1 and
282 md_estimate_size_before_relax. The appropriate type of fixup will
283 be emitted by md_convert_frag_1.
285 ADD becomes the FR_SYMBOL field of the frag, and OFF the FR_OFFSET. */
287 add_frag(add
,off
,type
)
292 the_ins
.fragb
[the_ins
.nfrag
].fragoff
=the_ins
.numo
;
293 the_ins
.fragb
[the_ins
.nfrag
].fadd
=add
;
294 the_ins
.fragb
[the_ins
.nfrag
].foff
=off
;
295 the_ins
.fragb
[the_ins
.nfrag
++].fragty
=type
;
299 (op (ex) != O_constant && op (ex) != O_big)
301 static char *crack_operand
PARAMS ((char *str
, struct m68k_op
*opP
));
302 static int get_num
PARAMS ((struct m68k_exp
*exp
, int ok
));
303 static int reverse_16_bits
PARAMS ((int in
));
304 static int reverse_8_bits
PARAMS ((int in
));
305 static void install_gen_operand
PARAMS ((int mode
, int val
));
306 static void install_operand
PARAMS ((int mode
, int val
));
307 static void s_bss
PARAMS ((int));
308 static void s_data1
PARAMS ((int));
309 static void s_data2
PARAMS ((int));
310 static void s_even
PARAMS ((int));
311 static void s_proc
PARAMS ((int));
312 static void mri_chip
PARAMS ((void));
313 static void s_chip
PARAMS ((int));
314 static void s_fopt
PARAMS ((int));
315 static void s_opt
PARAMS ((int));
316 static void s_reg
PARAMS ((int));
317 static void s_restore
PARAMS ((int));
318 static void s_save
PARAMS ((int));
319 static void s_mri_if
PARAMS ((int));
320 static void s_mri_else
PARAMS ((int));
321 static void s_mri_endi
PARAMS ((int));
322 static void s_mri_break
PARAMS ((int));
323 static void s_mri_next
PARAMS ((int));
324 static void s_mri_for
PARAMS ((int));
325 static void s_mri_endf
PARAMS ((int));
326 static void s_mri_repeat
PARAMS ((int));
327 static void s_mri_until
PARAMS ((int));
328 static void s_mri_while
PARAMS ((int));
329 static void s_mri_endw
PARAMS ((int));
331 static int current_architecture
;
339 static const struct m68k_cpu archs
[] = {
340 { m68000
, "68000", 0 },
341 { m68010
, "68010", 0 },
342 { m68020
, "68020", 0 },
343 { m68030
, "68030", 0 },
344 { m68040
, "68040", 0 },
345 { m68060
, "68060", 0 },
346 { cpu32
, "cpu32", 0 },
347 { m68881
, "68881", 0 },
348 { m68851
, "68851", 0 },
349 { mcf5200
, "5200", 0 },
350 /* Aliases (effectively, so far as gas is concerned) for the above
352 { m68020
, "68k", 1 },
353 { m68000
, "68302", 1 },
354 { m68000
, "68008", 1 },
355 { m68000
, "68ec000", 1 },
356 { m68000
, "68hc000", 1 },
357 { m68000
, "68hc001", 1 },
358 { m68020
, "68ec020", 1 },
359 { m68030
, "68ec030", 1 },
360 { m68040
, "68ec040", 1 },
361 { m68060
, "68ec060", 1 },
362 { cpu32
, "68330", 1 },
363 { cpu32
, "68331", 1 },
364 { cpu32
, "68332", 1 },
365 { cpu32
, "68333", 1 },
366 { cpu32
, "68340", 1 },
367 { cpu32
, "68360", 1 },
368 { m68881
, "68882", 1 },
371 static const int n_archs
= sizeof (archs
) / sizeof (archs
[0]);
373 /* BCC68000 is for patching in an extra jmp instruction for long offsets
374 on the 68000. The 68000 doesn't support long branches with branchs */
376 /* This table desribes how you change sizes for the various types of variable
377 size expressions. This version only supports two kinds. */
379 /* Note that calls to frag_var need to specify the maximum expansion
380 needed; this is currently 10 bytes for DBCC. */
383 How far Forward this mode will reach:
384 How far Backward this mode will reach:
385 How many bytes this mode will add to the size of the frag
386 Which mode to go to if the offset won't fit in this one
388 relax_typeS md_relax_table
[] =
390 {1, 1, 0, 0}, /* First entries aren't used */
391 {1, 1, 0, 0}, /* For no good reason except */
392 {1, 1, 0, 0}, /* that the VAX doesn't either */
395 {(127), (-128), 0, TAB (ABRANCH
, SHORT
)},
396 {(32767), (-32768), 2, TAB (ABRANCH
, LONG
)},
400 {1, 1, 0, 0}, /* FBRANCH doesn't come BYTE */
401 {(32767), (-32768), 2, TAB (FBRANCH
, LONG
)},
405 {1, 1, 0, 0}, /* PCREL doesn't come BYTE */
406 {(32767), (-32768), 2, TAB (PCREL
, LONG
)},
410 {(127), (-128), 0, TAB (BCC68000
, SHORT
)},
411 {(32767), (-32768), 2, TAB (BCC68000
, LONG
)},
412 {0, 0, 6, 0}, /* jmp long space */
415 {1, 1, 0, 0}, /* DBCC doesn't come BYTE */
416 {(32767), (-32768), 2, TAB (DBCC
, LONG
)},
417 {0, 0, 10, 0}, /* bra/jmp long space */
420 {1, 1, 0, 0}, /* PCLEA doesn't come BYTE */
421 {32767, -32768, 2, TAB (PCLEA
, LONG
)},
425 /* For, e.g., jmp pcrel indexed. */
426 {125, -130, 0, TAB (PCINDEX
, SHORT
)},
427 {32765, -32770, 2, TAB (PCINDEX
, LONG
)},
432 /* These are the machine dependent pseudo-ops. These are included so
433 the assembler can work on the output from the SUN C compiler, which
437 /* This table describes all the machine specific pseudo-ops the assembler
438 has to support. The fields are:
439 pseudo-op name without dot
440 function to call to execute this pseudo-op
441 Integer arg to pass to the function
443 const pseudo_typeS md_pseudo_table
[] =
445 {"data1", s_data1
, 0},
446 {"data2", s_data2
, 0},
449 {"skip", s_space
, 0},
451 #if defined (TE_SUN3) || defined (OBJ_ELF)
452 {"align", s_align_bytes
, 0},
455 {"swbeg", s_ignore
, 0},
457 {"extend", float_cons
, 'x'},
458 {"ldouble", float_cons
, 'x'},
460 /* The following pseudo-ops are supported for MRI compatibility. */
462 {"comline", s_space
, 1},
464 {"mask2", s_ignore
, 0},
467 {"restore", s_restore
, 0},
471 {"if.b", s_mri_if
, 'b'},
472 {"if.w", s_mri_if
, 'w'},
473 {"if.l", s_mri_if
, 'l'},
474 {"else", s_mri_else
, 0},
475 {"else.s", s_mri_else
, 's'},
476 {"else.l", s_mri_else
, 'l'},
477 {"endi", s_mri_endi
, 0},
478 {"break", s_mri_break
, 0},
479 {"break.s", s_mri_break
, 's'},
480 {"break.l", s_mri_break
, 'l'},
481 {"next", s_mri_next
, 0},
482 {"next.s", s_mri_next
, 's'},
483 {"next.l", s_mri_next
, 'l'},
484 {"for", s_mri_for
, 0},
485 {"for.b", s_mri_for
, 'b'},
486 {"for.w", s_mri_for
, 'w'},
487 {"for.l", s_mri_for
, 'l'},
488 {"endf", s_mri_endf
, 0},
489 {"repeat", s_mri_repeat
, 0},
490 {"until", s_mri_until
, 0},
491 {"until.b", s_mri_until
, 'b'},
492 {"until.w", s_mri_until
, 'w'},
493 {"until.l", s_mri_until
, 'l'},
494 {"while", s_mri_while
, 0},
495 {"while.b", s_mri_while
, 'b'},
496 {"while.w", s_mri_while
, 'w'},
497 {"while.l", s_mri_while
, 'l'},
498 {"endw", s_mri_endw
, 0},
504 /* The mote pseudo ops are put into the opcode table, since they
505 don't start with a . they look like opcodes to gas.
507 extern void obj_coff_section ();
509 CONST pseudo_typeS mote_pseudo_table
[] =
522 {"xdef", s_globl
, 0},
524 {"align", s_align_bytes
, 0},
526 {"align", s_align_ptwo
, 0},
529 {"sect", obj_coff_section
, 0},
530 {"section", obj_coff_section
, 0},
535 #define issbyte(x) ((x)>=-128 && (x)<=127)
536 #define isubyte(x) ((x)>=0 && (x)<=255)
537 #define issword(x) ((x)>=-32768 && (x)<=32767)
538 #define isuword(x) ((x)>=0 && (x)<=65535)
540 #define isbyte(x) ((x)>= -255 && (x)<=255)
541 #define isword(x) ((x)>=-65536 && (x)<=65535)
542 #define islong(x) (1)
544 extern char *input_line_pointer
;
546 static char mklower_table
[256];
547 #define mklower(c) (mklower_table[(unsigned char)(c)])
548 static char notend_table
[256];
549 static char alt_notend_table
[256];
551 (! (notend_table[(unsigned char) *s] \
553 && alt_notend_table[(unsigned char) s[1]])))
555 #if defined (M68KCOFF) && !defined (BFD_ASSEMBLER)
557 #ifdef NO_PCREL_RELOCS
560 make_pcrel_absolute(fixP
, add_number
)
564 register unsigned char *opcode
= fixP
->fx_frag
->fr_opcode
;
566 /* rewrite the PC relative instructions to absolute address ones.
567 * these are rumoured to be faster, and the apollo linker refuses
568 * to deal with the PC relative relocations.
570 if (opcode
[0] == 0x60 && opcode
[1] == 0xff) /* BRA -> JMP */
575 else if (opcode
[0] == 0x61 && opcode
[1] == 0xff) /* BSR -> JSR */
581 as_fatal ("Unknown PC relative instruction");
586 #endif /* NO_PCREL_RELOCS */
589 tc_coff_fix2rtype (fixP
)
592 if (fixP
->fx_tcbit
&& fixP
->fx_size
== 4)
593 return R_RELLONG_NEG
;
594 #ifdef NO_PCREL_RELOCS
595 know (fixP
->fx_pcrel
== 0);
596 return (fixP
->fx_size
== 1 ? R_RELBYTE
597 : fixP
->fx_size
== 2 ? R_DIR16
600 return (fixP
->fx_pcrel
?
601 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
602 fixP
->fx_size
== 2 ? R_PCRWORD
:
604 (fixP
->fx_size
== 1 ? R_RELBYTE
:
605 fixP
->fx_size
== 2 ? R_RELWORD
:
614 /* Compute the relocation code for a fixup of SIZE bytes, using pc
615 relative relocation if PCREL is non-zero. PIC says whether a special
616 pic relocation was requested. */
618 static bfd_reloc_code_real_type get_reloc_code
619 PARAMS ((int, int, enum pic_relocation
));
621 static bfd_reloc_code_real_type
622 get_reloc_code (size
, pcrel
, pic
)
625 enum pic_relocation pic
;
633 return BFD_RELOC_8_GOT_PCREL
;
635 return BFD_RELOC_16_GOT_PCREL
;
637 return BFD_RELOC_32_GOT_PCREL
;
645 return BFD_RELOC_8_GOTOFF
;
647 return BFD_RELOC_16_GOTOFF
;
649 return BFD_RELOC_32_GOTOFF
;
657 return BFD_RELOC_8_PLT_PCREL
;
659 return BFD_RELOC_16_PLT_PCREL
;
661 return BFD_RELOC_32_PLT_PCREL
;
669 return BFD_RELOC_8_PLTOFF
;
671 return BFD_RELOC_16_PLTOFF
;
673 return BFD_RELOC_32_PLTOFF
;
683 return BFD_RELOC_8_PCREL
;
685 return BFD_RELOC_16_PCREL
;
687 return BFD_RELOC_32_PCREL
;
704 as_bad ("Can not do %d byte %s%srelocation", size
,
705 pcrel
? "pc-relative " : "",
706 pic
== pic_none
? "" : "pic ");
707 return BFD_RELOC_NONE
;
710 /* Here we decide which fixups can be adjusted to make them relative
711 to the beginning of the section instead of the symbol. Basically
712 we need to make sure that the dynamic relocations are done
713 correctly, so in some cases we force the original symbol to be
716 tc_m68k_fix_adjustable (fixP
)
719 /* Prevent all adjustments to global symbols. */
720 if (S_IS_EXTERNAL (fixP
->fx_addsy
))
723 /* adjust_reloc_syms doesn't know about the GOT */
724 switch (fixP
->fx_r_type
)
726 case BFD_RELOC_8_GOT_PCREL
:
727 case BFD_RELOC_16_GOT_PCREL
:
728 case BFD_RELOC_32_GOT_PCREL
:
729 case BFD_RELOC_8_GOTOFF
:
730 case BFD_RELOC_16_GOTOFF
:
731 case BFD_RELOC_32_GOTOFF
:
732 case BFD_RELOC_8_PLT_PCREL
:
733 case BFD_RELOC_16_PLT_PCREL
:
734 case BFD_RELOC_32_PLT_PCREL
:
735 case BFD_RELOC_8_PLTOFF
:
736 case BFD_RELOC_16_PLTOFF
:
737 case BFD_RELOC_32_PLTOFF
:
747 #define get_reloc_code(SIZE,PCREL,OTHER) NO_RELOC
754 tc_gen_reloc (section
, fixp
)
759 bfd_reloc_code_real_type code
;
764 if (fixp
->fx_r_type
!= BFD_RELOC_NONE
)
766 code
= fixp
->fx_r_type
;
768 /* Since DIFF_EXPR_OK is defined in tc-m68k.h, it is possible
769 that fixup_segment converted a non-PC relative reloc into a
770 PC relative reloc. In such a case, we need to convert the
777 code
= BFD_RELOC_8_PCREL
;
780 code
= BFD_RELOC_16_PCREL
;
783 code
= BFD_RELOC_32_PCREL
;
785 case BFD_RELOC_8_PCREL
:
786 case BFD_RELOC_16_PCREL
:
787 case BFD_RELOC_32_PCREL
:
788 case BFD_RELOC_8_GOT_PCREL
:
789 case BFD_RELOC_16_GOT_PCREL
:
790 case BFD_RELOC_32_GOT_PCREL
:
791 case BFD_RELOC_8_GOTOFF
:
792 case BFD_RELOC_16_GOTOFF
:
793 case BFD_RELOC_32_GOTOFF
:
794 case BFD_RELOC_8_PLT_PCREL
:
795 case BFD_RELOC_16_PLT_PCREL
:
796 case BFD_RELOC_32_PLT_PCREL
:
797 case BFD_RELOC_8_PLTOFF
:
798 case BFD_RELOC_16_PLTOFF
:
799 case BFD_RELOC_32_PLTOFF
:
802 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
803 "Cannot make %s relocation PC relative",
804 bfd_get_reloc_code_name (code
));
810 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
811 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
813 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
814 MAP (1, 0, BFD_RELOC_8
);
815 MAP (2, 0, BFD_RELOC_16
);
816 MAP (4, 0, BFD_RELOC_32
);
817 MAP (1, 1, BFD_RELOC_8_PCREL
);
818 MAP (2, 1, BFD_RELOC_16_PCREL
);
819 MAP (4, 1, BFD_RELOC_32_PCREL
);
827 reloc
= (arelent
*) bfd_alloc_by_size_t (stdoutput
, sizeof (arelent
));
829 reloc
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
830 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
833 reloc
->addend
= fixp
->fx_addnumber
;
838 reloc
->addend
= fixp
->fx_addnumber
;
840 reloc
->addend
= (section
->vma
841 + (fixp
->fx_pcrel_adjust
== 64
842 ? -1 : fixp
->fx_pcrel_adjust
)
844 + md_pcrel_from (fixp
));
847 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
848 assert (reloc
->howto
!= 0);
853 #endif /* BFD_ASSEMBLER */
855 /* Handle of the OPCODE hash table. NULL means any use before
856 m68k_ip_begin() will crash. */
857 static struct hash_control
*op_hash
;
859 /* Assemble an m68k instruction. */
866 register struct m68k_op
*opP
;
867 register struct m68k_incant
*opcode
;
868 register const char *s
;
869 register int tmpreg
= 0, baseo
= 0, outro
= 0, nextword
;
870 char *pdot
, *pdotmove
;
871 enum m68k_size siz1
, siz2
;
875 char *crack_operand ();
876 LITTLENUM_TYPE words
[6];
877 LITTLENUM_TYPE
*wordp
;
878 unsigned long ok_arch
= 0;
880 if (*instring
== ' ')
881 instring
++; /* skip leading whitespace */
883 /* Scan up to end of operation-code, which MUST end in end-of-string
884 or exactly 1 space. */
886 for (p
= instring
; *p
!= '\0'; p
++)
896 the_ins
.error
= "No operator";
900 /* p now points to the end of the opcode name, probably whitespace.
901 Make sure the name is null terminated by clobbering the
902 whitespace, look it up in the hash table, then fix it back.
903 Remove a dot, first, since the opcode tables have none. */
906 for (pdotmove
= pdot
; pdotmove
< p
; pdotmove
++)
907 *pdotmove
= pdotmove
[1];
913 opcode
= (struct m68k_incant
*) hash_find (op_hash
, instring
);
918 for (pdotmove
= p
; pdotmove
> pdot
; pdotmove
--)
919 *pdotmove
= pdotmove
[-1];
926 the_ins
.error
= "Unknown operator";
930 /* found a legitimate opcode, start matching operands */
934 if (opcode
->m_operands
== 0)
936 char *old
= input_line_pointer
;
938 input_line_pointer
= p
;
939 /* Ahh - it's a motorola style psuedo op */
940 mote_pseudo_table
[opcode
->m_opnum
].poc_handler
941 (mote_pseudo_table
[opcode
->m_opnum
].poc_val
);
942 input_line_pointer
= old
;
948 if (flag_mri
&& opcode
->m_opnum
== 0)
950 /* In MRI mode, random garbage is allowed after an instruction
951 which accepts no operands. */
952 the_ins
.args
= opcode
->m_operands
;
953 the_ins
.numargs
= opcode
->m_opnum
;
954 the_ins
.numo
= opcode
->m_codenum
;
955 the_ins
.opcode
[0] = getone (opcode
);
956 the_ins
.opcode
[1] = gettwo (opcode
);
960 for (opP
= &the_ins
.operands
[0]; *p
; opP
++)
962 p
= crack_operand (p
, opP
);
966 the_ins
.error
= opP
->error
;
971 opsfound
= opP
- &the_ins
.operands
[0];
973 /* This ugly hack is to support the floating pt opcodes in their
974 standard form. Essentially, we fake a first enty of type COP#1 */
975 if (opcode
->m_operands
[0] == 'I')
979 for (n
= opsfound
; n
> 0; --n
)
980 the_ins
.operands
[n
] = the_ins
.operands
[n
- 1];
982 memset ((char *) (&the_ins
.operands
[0]), '\0',
983 sizeof (the_ins
.operands
[0]));
984 the_ins
.operands
[0].mode
= CONTROL
;
985 the_ins
.operands
[0].reg
= m68k_float_copnum
;
989 /* We've got the operands. Find an opcode that'll accept them */
992 /* If we didn't get the right number of ops, or we have no
993 common model with this pattern then reject this pattern. */
995 ok_arch
|= opcode
->m_arch
;
996 if (opsfound
!= opcode
->m_opnum
997 || ((opcode
->m_arch
& current_architecture
) == 0))
1001 for (s
= opcode
->m_operands
, opP
= &the_ins
.operands
[0];
1005 /* Warning: this switch is huge! */
1006 /* I've tried to organize the cases into this order:
1007 non-alpha first, then alpha by letter. Lower-case
1008 goes directly before uppercase counterpart. */
1009 /* Code with multiple case ...: gets sorted by the lowest
1010 case ... it belongs to. I hope this makes sense. */
1050 if (opP
->mode
!= IMMED
)
1052 else if (s
[1] == 'b'
1053 && ! isvar (&opP
->disp
)
1054 && (opP
->disp
.exp
.X_op
!= O_constant
1055 || ! isbyte (opP
->disp
.exp
.X_add_number
)))
1057 else if (s
[1] == 'w'
1058 && ! isvar (&opP
->disp
)
1059 && (opP
->disp
.exp
.X_op
!= O_constant
1060 || ! isword (opP
->disp
.exp
.X_add_number
)))
1062 else if (s
[1] == 'W'
1063 && ! isvar (&opP
->disp
)
1064 && (opP
->disp
.exp
.X_op
!= O_constant
1065 || ! issword (opP
->disp
.exp
.X_add_number
)))
1071 if (opP
->mode
!= IMMED
)
1076 if (opP
->mode
== AREG
1077 || opP
->mode
== CONTROL
1078 || opP
->mode
== FPREG
1079 || opP
->mode
== IMMED
1080 || opP
->mode
== REGLST
1081 || (opP
->mode
!= ABSL
1083 || opP
->reg
== ZPC
)))
1088 if (opP
->mode
== CONTROL
1089 || opP
->mode
== FPREG
1090 || opP
->mode
== REGLST
1091 || opP
->mode
== IMMED
1092 || (opP
->mode
!= ABSL
1094 || opP
->reg
== ZPC
)))
1122 if (opP
->mode
== CONTROL
1123 || opP
->mode
== FPREG
1124 || opP
->mode
== REGLST
)
1129 if (opP
->mode
!= AINC
)
1134 if (opP
->mode
!= ADEC
)
1184 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1205 case '~': /* For now! (JF FOO is this right?) */
1227 if (opP
->mode
!= CONTROL
1228 || (opP
->reg
!= TT0
&& opP
->reg
!= TT1
))
1233 if (opP
->mode
!= AREG
)
1238 if (opP
->mode
!= AINDR
)
1243 if (opP
->mode
!= ABSL
1245 && strncmp (instring
, "jbsr", 4) == 0))
1250 if (opP
->mode
!= CONTROL
|| opP
->reg
!= CCR
)
1255 if (opP
->mode
!= DISP
1257 || opP
->reg
> ADDR7
)
1262 if (opP
->mode
!= DREG
)
1267 if (opP
->mode
!= FPREG
)
1272 if (opP
->mode
!= CONTROL
1279 if (opP
->mode
!= CONTROL
1281 || opP
->reg
> last_movec_reg
)
1285 const enum m68k_register
*rp
;
1286 for (rp
= control_regs
; *rp
; rp
++)
1287 if (*rp
== opP
->reg
)
1295 if (opP
->mode
!= IMMED
)
1301 if (opP
->mode
== DREG
1302 || opP
->mode
== AREG
1303 || opP
->mode
== FPREG
)
1312 opP
->mask
= 1 << (opP
->reg
- DATA0
);
1315 opP
->mask
= 1 << (opP
->reg
- ADDR0
+ 8);
1318 opP
->mask
= 1 << (opP
->reg
- FP0
+ 16);
1326 else if (opP
->mode
== CONTROL
)
1335 opP
->mask
= 1 << 24;
1338 opP
->mask
= 1 << 25;
1341 opP
->mask
= 1 << 26;
1350 else if (opP
->mode
== ABSL
1351 && opP
->disp
.size
== SIZE_UNSPEC
1352 && opP
->disp
.exp
.X_op
== O_constant
)
1354 /* This is what the MRI REG pseudo-op generates. */
1356 opP
->mask
= opP
->disp
.exp
.X_add_number
;
1358 else if (opP
->mode
!= REGLST
)
1360 else if (s
[1] == '8' && (opP
->mask
& 0x0ffffff) != 0)
1362 else if (s
[1] == '3' && (opP
->mask
& 0x7000000) != 0)
1367 if (opP
->mode
!= IMMED
)
1369 else if (opP
->disp
.exp
.X_op
!= O_constant
1370 || ! issbyte (opP
->disp
.exp
.X_add_number
))
1372 else if (! m68k_quick
1373 && instring
[3] != 'q'
1374 && instring
[4] != 'q')
1379 if (opP
->mode
!= DREG
1380 && opP
->mode
!= IMMED
1381 && opP
->mode
!= ABSL
)
1386 if (opP
->mode
!= IMMED
)
1388 else if (opP
->disp
.exp
.X_op
!= O_constant
1389 || opP
->disp
.exp
.X_add_number
< 1
1390 || opP
->disp
.exp
.X_add_number
> 8)
1392 else if (! m68k_quick
1393 && (strncmp (instring
, "add", 3) == 0
1394 || strncmp (instring
, "sub", 3) == 0)
1395 && instring
[3] != 'q')
1400 if (opP
->mode
!= DREG
&& opP
->mode
!= AREG
)
1405 if (opP
->mode
!= AINDR
1406 && (opP
->mode
!= BASE
1408 && opP
->reg
!= ZADDR0
)
1409 || opP
->disp
.exp
.X_op
!= O_absent
1410 || ((opP
->index
.reg
< DATA0
1411 || opP
->index
.reg
> DATA7
)
1412 && (opP
->index
.reg
< ADDR0
1413 || opP
->index
.reg
> ADDR7
))
1414 || opP
->index
.size
!= SIZE_UNSPEC
1415 || opP
->index
.scale
!= 1))
1420 if (opP
->mode
!= CONTROL
1421 || ! (opP
->reg
== FPI
1423 || opP
->reg
== FPC
))
1428 if (opP
->mode
!= CONTROL
|| opP
->reg
!= SR
)
1433 if (opP
->mode
!= IMMED
)
1435 else if (opP
->disp
.exp
.X_op
!= O_constant
1436 || opP
->disp
.exp
.X_add_number
< 0
1437 || opP
->disp
.exp
.X_add_number
> 7)
1442 if (opP
->mode
!= CONTROL
|| opP
->reg
!= USP
)
1446 /* JF these are out of order. We could put them
1447 in order if we were willing to put up with
1448 bunches of #ifdef m68851s in the code.
1450 Don't forget that you need these operands
1451 to use 68030 MMU instructions. */
1453 /* Memory addressing mode used by pflushr */
1455 if (opP
->mode
== CONTROL
1456 || opP
->mode
== FPREG
1457 || opP
->mode
== DREG
1458 || opP
->mode
== AREG
1459 || opP
->mode
== REGLST
)
1461 /* We should accept immediate operands, but they
1462 supposedly have to be quad word, and we don't
1463 handle that. I would like to see what a Motorola
1464 assembler does before doing something here. */
1465 if (opP
->mode
== IMMED
)
1470 if (opP
->mode
!= CONTROL
1471 || (opP
->reg
!= SFC
&& opP
->reg
!= DFC
))
1476 if (opP
->mode
!= CONTROL
|| opP
->reg
!= TC
)
1481 if (opP
->mode
!= CONTROL
|| opP
->reg
!= AC
)
1486 if (opP
->mode
!= CONTROL
1489 && opP
->reg
!= SCC
))
1494 if (opP
->mode
!= CONTROL
1500 if (opP
->mode
!= CONTROL
1503 && opP
->reg
!= CRP
))
1508 if (opP
->mode
!= CONTROL
1509 || (!(opP
->reg
>= BAD
&& opP
->reg
<= BAD
+ 7)
1510 && !(opP
->reg
>= BAC
&& opP
->reg
<= BAC
+ 7)))
1515 if (opP
->mode
!= CONTROL
|| opP
->reg
!= PSR
)
1520 if (opP
->mode
!= CONTROL
|| opP
->reg
!= PCSR
)
1525 if (opP
->mode
!= CONTROL
1532 } /* not a cache specifier. */
1536 if (opP
->mode
!= ABSL
)
1542 } /* switch on type of operand */
1546 } /* for each operand */
1547 } /* if immediately wrong */
1554 opcode
= opcode
->m_next
;
1559 && !(ok_arch
& current_architecture
))
1564 "invalid instruction for this architecture; needs ");
1565 cp
= buf
+ strlen (buf
);
1569 strcpy (cp
, "fpu (68040, 68060 or 68881/68882)");
1572 strcpy (cp
, "mmu (68030 or 68851)");
1575 strcpy (cp
, "68020 or higher");
1578 strcpy (cp
, "68000 or higher");
1581 strcpy (cp
, "68010 or higher");
1585 int got_one
= 0, idx
;
1586 for (idx
= 0; idx
< sizeof (archs
) / sizeof (archs
[0]);
1589 if ((archs
[idx
].arch
& ok_arch
)
1590 && ! archs
[idx
].alias
)
1594 strcpy (cp
, " or ");
1598 strcpy (cp
, archs
[idx
].name
);
1604 cp
= xmalloc (strlen (buf
) + 1);
1609 the_ins
.error
= "operands mismatch";
1611 } /* Fell off the end */
1616 /* now assemble it */
1618 the_ins
.args
= opcode
->m_operands
;
1619 the_ins
.numargs
= opcode
->m_opnum
;
1620 the_ins
.numo
= opcode
->m_codenum
;
1621 the_ins
.opcode
[0] = getone (opcode
);
1622 the_ins
.opcode
[1] = gettwo (opcode
);
1624 for (s
= the_ins
.args
, opP
= &the_ins
.operands
[0]; *s
; s
+= 2, opP
++)
1626 /* This switch is a doozy.
1627 Watch the first step; its a big one! */
1648 tmpreg
= 0x3c; /* 7.4 */
1649 if (strchr ("bwl", s
[1]))
1650 nextword
= get_num (&opP
->disp
, 80);
1652 nextword
= get_num (&opP
->disp
, 0);
1653 if (isvar (&opP
->disp
))
1654 add_fix (s
[1], &opP
->disp
, 0, 0);
1658 if (!isbyte (nextword
))
1659 opP
->error
= "operand out of range";
1664 if (!isword (nextword
))
1665 opP
->error
= "operand out of range";
1670 if (!issword (nextword
))
1671 opP
->error
= "operand out of range";
1676 addword (nextword
>> 16);
1703 /* We gotta put out some float */
1704 if (op (&opP
->disp
) != O_big
)
1709 /* Can other cases happen here? */
1710 if (op (&opP
->disp
) != O_constant
)
1713 val
= (valueT
) offs (&opP
->disp
);
1717 generic_bignum
[gencnt
] = (LITTLENUM_TYPE
) val
;
1718 val
>>= LITTLENUM_NUMBER_OF_BITS
;
1722 offs (&opP
->disp
) = gencnt
;
1724 if (offs (&opP
->disp
) > 0)
1726 if (offs (&opP
->disp
) > baseo
)
1728 as_warn ("Bignum too big for %c format; truncated",
1730 offs (&opP
->disp
) = baseo
;
1732 baseo
-= offs (&opP
->disp
);
1735 for (wordp
= generic_bignum
+ offs (&opP
->disp
) - 1;
1736 offs (&opP
->disp
)--;
1741 gen_to_words (words
, baseo
, (long) outro
);
1742 for (wordp
= words
; baseo
--; wordp
++)
1746 tmpreg
= opP
->reg
- DATA
; /* 0.dreg */
1749 tmpreg
= 0x08 + opP
->reg
- ADDR
; /* 1.areg */
1752 tmpreg
= 0x10 + opP
->reg
- ADDR
; /* 2.areg */
1755 tmpreg
= 0x20 + opP
->reg
- ADDR
; /* 4.areg */
1758 tmpreg
= 0x18 + opP
->reg
- ADDR
; /* 3.areg */
1762 nextword
= get_num (&opP
->disp
, 80);
1765 && ! isvar (&opP
->disp
)
1768 opP
->disp
.exp
.X_op
= O_symbol
;
1769 #ifndef BFD_ASSEMBLER
1770 opP
->disp
.exp
.X_add_symbol
= &abs_symbol
;
1772 opP
->disp
.exp
.X_add_symbol
=
1773 section_symbol (absolute_section
);
1777 /* Force into index mode. Hope this works */
1779 /* We do the first bit for 32-bit displacements, and the
1780 second bit for 16 bit ones. It is possible that we
1781 should make the default be WORD instead of LONG, but
1782 I think that'd break GCC, so we put up with a little
1783 inefficiency for the sake of working output. */
1785 if (!issword (nextword
)
1786 || (isvar (&opP
->disp
)
1787 && ((opP
->disp
.size
== SIZE_UNSPEC
1788 && flag_short_refs
== 0
1789 && cpu_of_arch (current_architecture
) >= m68020
)
1790 || opP
->disp
.size
== SIZE_LONG
)))
1792 if (cpu_of_arch (current_architecture
) < m68020
)
1794 "displacement too large for this architecture; needs 68020 or higher";
1796 tmpreg
= 0x3B; /* 7.3 */
1798 tmpreg
= 0x30 + opP
->reg
- ADDR
; /* 6.areg */
1799 if (isvar (&opP
->disp
))
1803 if (opP
->disp
.size
== SIZE_LONG
1805 /* If the displacement needs pic
1806 relocation it cannot be relaxed. */
1807 || opP
->disp
.pic_reloc
!= pic_none
1812 add_fix ('l', &opP
->disp
, 1, 2);
1816 add_frag (adds (&opP
->disp
),
1818 TAB (PCLEA
, SZ_UNDEF
));
1825 add_fix ('l', &opP
->disp
, 0, 0);
1830 addword (nextword
>> 16);
1835 tmpreg
= 0x3A; /* 7.2 */
1837 tmpreg
= 0x28 + opP
->reg
- ADDR
; /* 5.areg */
1839 if (isvar (&opP
->disp
))
1843 add_fix ('w', &opP
->disp
, 1, 0);
1846 add_fix ('w', &opP
->disp
, 0, 0);
1856 baseo
= get_num (&opP
->disp
, 80);
1857 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
1858 outro
= get_num (&opP
->odisp
, 80);
1859 /* Figure out the `addressing mode'.
1860 Also turn on the BASE_DISABLE bit, if needed. */
1861 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1863 tmpreg
= 0x3b; /* 7.3 */
1864 if (opP
->reg
== ZPC
)
1867 else if (opP
->reg
== 0)
1870 tmpreg
= 0x30; /* 6.garbage */
1872 else if (opP
->reg
>= ZADDR0
&& opP
->reg
<= ZADDR7
)
1875 tmpreg
= 0x30 + opP
->reg
- ZADDR0
;
1878 tmpreg
= 0x30 + opP
->reg
- ADDR
; /* 6.areg */
1880 siz1
= opP
->disp
.size
;
1881 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
1882 siz2
= opP
->odisp
.size
;
1886 /* Index register stuff */
1887 if (opP
->index
.reg
!= 0
1888 && opP
->index
.reg
>= DATA
1889 && opP
->index
.reg
<= ADDR7
)
1891 nextword
|= (opP
->index
.reg
- DATA
) << 12;
1893 if (opP
->index
.size
== SIZE_UNSPEC
1894 || opP
->index
.size
== SIZE_LONG
)
1897 if ((opP
->index
.scale
!= 1
1898 && cpu_of_arch (current_architecture
) < m68020
)
1899 || (opP
->index
.scale
== 8
1900 && current_architecture
== mcf5200
))
1903 "scale factor invalid on this architecture; needs cpu32 or 68020 or higher";
1906 switch (opP
->index
.scale
)
1923 GET US OUT OF HERE! */
1925 /* Must be INDEX, with an index register. Address
1926 register cannot be ZERO-PC, and either :b was
1927 forced, or we know it will fit. For a 68000 or
1928 68010, force this mode anyways, because the
1929 larger modes aren't supported. */
1930 if (opP
->mode
== BASE
1931 && ((opP
->reg
>= ADDR0
1932 && opP
->reg
<= ADDR7
)
1935 if (siz1
== SIZE_BYTE
1936 || cpu_of_arch (current_architecture
) < m68020
1937 || (siz1
== SIZE_UNSPEC
1938 && ! isvar (&opP
->disp
)
1939 && issbyte (baseo
)))
1941 nextword
+= baseo
& 0xff;
1943 if (isvar (&opP
->disp
))
1945 /* Do a byte relocation. If it doesn't
1946 fit (possible on m68000) let the
1947 fixup processing complain later. */
1949 add_fix ('B', &opP
->disp
, 1, 1);
1951 add_fix ('B', &opP
->disp
, 0, 0);
1953 else if (siz1
!= SIZE_BYTE
)
1955 if (siz1
!= SIZE_UNSPEC
)
1956 as_warn ("Forcing byte displacement");
1957 if (! issbyte (baseo
))
1958 opP
->error
= "byte displacement out of range";
1963 else if (siz1
== SIZE_UNSPEC
1965 && isvar (&opP
->disp
)
1966 && subs (&opP
->disp
) == NULL
1968 /* If the displacement needs pic
1969 relocation it cannot be relaxed. */
1970 && opP
->disp
.pic_reloc
== pic_none
1974 nextword
+= baseo
& 0xff;
1976 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
1977 TAB (PCINDEX
, SZ_UNDEF
));
1985 nextword
|= 0x40; /* No index reg */
1986 if (opP
->index
.reg
>= ZDATA0
1987 && opP
->index
.reg
<= ZDATA7
)
1988 nextword
|= (opP
->index
.reg
- ZDATA0
) << 12;
1989 else if (opP
->index
.reg
>= ZADDR0
1990 || opP
->index
.reg
<= ZADDR7
)
1991 nextword
|= (opP
->index
.reg
- ZADDR0
+ 8) << 12;
1994 /* It isn't simple. */
1996 if (cpu_of_arch (current_architecture
) < m68020
)
1998 "invalid operand mode for this architecture; needs 68020 or higher";
2001 /* If the guy specified a width, we assume that it is
2002 wide enough. Maybe it isn't. If so, we lose. */
2006 if (isvar (&opP
->disp
)
2008 : ! issword (baseo
))
2013 else if (! isvar (&opP
->disp
) && baseo
== 0)
2022 as_warn (":b not permitted; defaulting to :w");
2032 /* Figure out innner displacement stuff */
2033 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
2035 if (cpu_of_arch (current_architecture
) & cpu32
)
2036 opP
->error
= "invalid operand mode for this architecture; needs 68020 or higher";
2040 if (isvar (&opP
->odisp
)
2042 : ! issword (outro
))
2047 else if (! isvar (&opP
->odisp
) && outro
== 0)
2056 as_warn (":b not permitted; defaulting to :w");
2065 if (opP
->mode
== POST
2066 && (nextword
& 0x40) == 0)
2071 if (siz1
!= SIZE_UNSPEC
&& isvar (&opP
->disp
))
2073 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
2074 add_fix (siz1
== SIZE_LONG
? 'l' : 'w', &opP
->disp
, 1, 2);
2076 add_fix (siz1
== SIZE_LONG
? 'l' : 'w', &opP
->disp
, 0, 0);
2078 if (siz1
== SIZE_LONG
)
2079 addword (baseo
>> 16);
2080 if (siz1
!= SIZE_UNSPEC
)
2083 if (siz2
!= SIZE_UNSPEC
&& isvar (&opP
->odisp
))
2084 add_fix (siz2
== SIZE_LONG
? 'l' : 'w', &opP
->odisp
, 0, 0);
2085 if (siz2
== SIZE_LONG
)
2086 addword (outro
>> 16);
2087 if (siz2
!= SIZE_UNSPEC
)
2093 nextword
= get_num (&opP
->disp
, 80);
2094 switch (opP
->disp
.size
)
2099 if (!isvar (&opP
->disp
) && issword (offs (&opP
->disp
)))
2101 tmpreg
= 0x38; /* 7.0 */
2105 /* Don't generate pc relative code on 68010 and
2107 if (isvar (&opP
->disp
)
2108 && !subs (&opP
->disp
)
2109 && adds (&opP
->disp
)
2111 /* If the displacement needs pic relocation it
2112 cannot be relaxed. */
2113 && opP
->disp
.pic_reloc
== pic_none
2115 && S_GET_SEGMENT (adds (&opP
->disp
)) == now_seg
2116 && cpu_of_arch (current_architecture
) >= m68020
2118 && !strchr ("~%&$?", s
[0]))
2120 tmpreg
= 0x3A; /* 7.2 */
2121 add_frag (adds (&opP
->disp
),
2123 TAB (PCREL
, SZ_UNDEF
));
2126 /* Fall through into long */
2128 if (isvar (&opP
->disp
))
2129 add_fix ('l', &opP
->disp
, 0, 0);
2131 tmpreg
= 0x39;/* 7.1 mode */
2132 addword (nextword
>> 16);
2136 case SIZE_WORD
: /* Word */
2137 if (isvar (&opP
->disp
))
2138 add_fix ('w', &opP
->disp
, 0, 0);
2140 tmpreg
= 0x38;/* 7.0 mode */
2148 as_bad ("unknown/incorrect operand");
2151 install_gen_operand (s
[1], tmpreg
);
2157 { /* JF: I hate floating point! */
2172 tmpreg
= get_num (&opP
->disp
, tmpreg
);
2173 if (isvar (&opP
->disp
))
2174 add_fix (s
[1], &opP
->disp
, 0, 0);
2177 case 'b': /* Danger: These do no check for
2178 certain types of overflow.
2180 if (!isbyte (tmpreg
))
2181 opP
->error
= "out of range";
2182 insop (tmpreg
, opcode
);
2183 if (isvar (&opP
->disp
))
2184 the_ins
.reloc
[the_ins
.nrel
- 1].n
=
2185 (opcode
->m_codenum
) * 2 + 1;
2188 if (!isword (tmpreg
))
2189 opP
->error
= "out of range";
2190 insop (tmpreg
, opcode
);
2191 if (isvar (&opP
->disp
))
2192 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
2195 if (!issword (tmpreg
))
2196 opP
->error
= "out of range";
2197 insop (tmpreg
, opcode
);
2198 if (isvar (&opP
->disp
))
2199 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
2202 /* Because of the way insop works, we put these two out
2204 insop (tmpreg
, opcode
);
2205 insop (tmpreg
>> 16, opcode
);
2206 if (isvar (&opP
->disp
))
2207 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
2213 install_operand (s
[1], tmpreg
);
2224 install_operand (s
[1], opP
->reg
- ADDR
);
2228 tmpreg
= get_num (&opP
->disp
, 80);
2232 /* The pc_fix argument winds up in fx_pcrel_adjust,
2233 which is a char, and may therefore be unsigned. We
2234 want to pass -1, but we pass 64 instead, and convert
2235 back in md_pcrel_from. */
2236 add_fix ('B', &opP
->disp
, 1, 64);
2239 add_fix ('w', &opP
->disp
, 1, 0);
2244 if (cpu_of_arch (current_architecture
) < m68020
)
2245 as_warn ("Can't use long branches on 68000/68010");
2246 the_ins
.opcode
[the_ins
.numo
- 1] |= 0xff;
2247 add_fix ('l', &opP
->disp
, 1, 0);
2252 if (subs (&opP
->disp
)) /* We can't relax it */
2256 /* If the displacement needs pic relocation it cannot be
2258 if (opP
->disp
.pic_reloc
!= pic_none
)
2262 /* This could either be a symbol, or an absolute
2263 address. No matter, the frag hacking will finger it
2264 out. Not quite: it can't switch from BRANCH to
2265 BCC68000 for the case where opnd is absolute (it
2266 needs to use the 68000 hack since no conditional abs
2268 if (((cpu_of_arch (current_architecture
) < m68020
)
2269 || (0 == adds (&opP
->disp
)))
2270 && (the_ins
.opcode
[0] >= 0x6200)
2271 && (the_ins
.opcode
[0] <= 0x6f00))
2272 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2273 TAB (BCC68000
, SZ_UNDEF
));
2275 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2276 TAB (ABRANCH
, SZ_UNDEF
));
2279 if (isvar (&opP
->disp
))
2282 /* check for DBcc instruction */
2283 if ((the_ins
.opcode
[0] & 0xf0f8) == 0x50c8)
2285 /* size varies if patch */
2286 /* needed for long form */
2287 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2288 TAB (DBCC
, SZ_UNDEF
));
2292 add_fix ('w', &opP
->disp
, 1, 0);
2296 case 'C': /* Fixed size LONG coproc branches */
2297 add_fix ('l', &opP
->disp
, 1, 0);
2301 case 'c': /* Var size Coprocesssor branches */
2302 if (subs (&opP
->disp
))
2304 add_fix ('l', &opP
->disp
, 1, 0);
2305 add_frag ((symbolS
*) 0, (long) 0, TAB (FBRANCH
, LONG
));
2307 else if (adds (&opP
->disp
))
2308 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2309 TAB (FBRANCH
, SZ_UNDEF
));
2312 /* add_frag((symbolS *) 0, offs(&opP->disp),
2313 TAB(FBRANCH,SHORT)); */
2314 the_ins
.opcode
[the_ins
.numo
- 1] |= 0x40;
2315 add_fix ('l', &opP
->disp
, 1, 0);
2325 case 'C': /* Ignore it */
2328 case 'd': /* JF this is a kludge */
2329 install_operand ('s', opP
->reg
- ADDR
);
2330 tmpreg
= get_num (&opP
->disp
, 80);
2331 if (!issword (tmpreg
))
2333 as_warn ("Expression out of range, using 0");
2340 install_operand (s
[1], opP
->reg
- DATA
);
2344 install_operand (s
[1], opP
->reg
- FP0
);
2348 tmpreg
= opP
->reg
- COP0
;
2349 install_operand (s
[1], tmpreg
);
2352 case 'J': /* JF foo */
2425 install_operand (s
[1], tmpreg
);
2429 tmpreg
= get_num (&opP
->disp
, 55);
2430 install_operand (s
[1], tmpreg
& 0x7f);
2437 if (tmpreg
& 0x7FF0000)
2438 as_bad ("Floating point register in register list");
2439 insop (reverse_16_bits (tmpreg
), opcode
);
2443 if (tmpreg
& 0x700FFFF)
2444 as_bad ("Wrong register in floating-point reglist");
2445 install_operand (s
[1], reverse_8_bits (tmpreg
>> 16));
2453 if (tmpreg
& 0x7FF0000)
2454 as_bad ("Floating point register in register list");
2455 insop (tmpreg
, opcode
);
2457 else if (s
[1] == '8')
2459 if (tmpreg
& 0x0FFFFFF)
2460 as_bad ("incorrect register in reglist");
2461 install_operand (s
[1], tmpreg
>> 24);
2465 if (tmpreg
& 0x700FFFF)
2466 as_bad ("wrong register in floating-point reglist");
2468 install_operand (s
[1], tmpreg
>> 16);
2473 install_operand (s
[1], get_num (&opP
->disp
, 60));
2477 tmpreg
= ((opP
->mode
== DREG
)
2478 ? 0x20 + opP
->reg
- DATA
2479 : (get_num (&opP
->disp
, 40) & 0x1F));
2480 install_operand (s
[1], tmpreg
);
2484 tmpreg
= get_num (&opP
->disp
, 10);
2487 install_operand (s
[1], tmpreg
);
2491 /* This depends on the fact that ADDR registers are eight
2492 more than their corresponding DATA regs, so the result
2493 will have the ADDR_REG bit set */
2494 install_operand (s
[1], opP
->reg
- DATA
);
2498 if (opP
->mode
== AINDR
)
2499 install_operand (s
[1], opP
->reg
- DATA
);
2501 install_operand (s
[1], opP
->index
.reg
- DATA
);
2505 if (opP
->reg
== FPI
)
2507 else if (opP
->reg
== FPS
)
2509 else if (opP
->reg
== FPC
)
2513 install_operand (s
[1], tmpreg
);
2516 case 'S': /* Ignore it */
2520 install_operand (s
[1], get_num (&opP
->disp
, 30));
2523 case 'U': /* Ignore it */
2542 as_fatal ("failed sanity check");
2543 } /* switch on cache token */
2544 install_operand (s
[1], tmpreg
);
2547 /* JF: These are out of order, I fear. */
2560 install_operand (s
[1], tmpreg
);
2586 install_operand (s
[1], tmpreg
);
2590 if (opP
->reg
== VAL
)
2609 install_operand (s
[1], tmpreg
);
2623 tmpreg
= (4 << 10) | ((opP
->reg
- BAD
) << 2);
2634 tmpreg
= (5 << 10) | ((opP
->reg
- BAC
) << 2);
2640 install_operand (s
[1], tmpreg
);
2643 know (opP
->reg
== PSR
);
2646 know (opP
->reg
== PCSR
);
2661 install_operand (s
[1], tmpreg
);
2664 tmpreg
= get_num (&opP
->disp
, 20);
2665 install_operand (s
[1], tmpreg
);
2667 case '_': /* used only for move16 absolute 32-bit address */
2668 tmpreg
= get_num (&opP
->disp
, 80);
2669 addword (tmpreg
>> 16);
2670 addword (tmpreg
& 0xFFFF);
2677 /* By the time whe get here (FINALLY) the_ins contains the complete
2678 instruction, ready to be emitted. . . */
2682 reverse_16_bits (in
)
2688 static int mask
[16] =
2690 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080,
2691 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000, 0x8000
2693 for (n
= 0; n
< 16; n
++)
2696 out
|= mask
[15 - n
];
2699 } /* reverse_16_bits() */
2708 static int mask
[8] =
2710 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080,
2713 for (n
= 0; n
< 8; n
++)
2719 } /* reverse_8_bits() */
2721 /* Cause an extra frag to be generated here, inserting up to 10 bytes
2722 (that value is chosen in the frag_var call in md_assemble). TYPE
2723 is the subtype of the frag to be generated; its primary type is
2724 rs_machine_dependent.
2726 The TYPE parameter is also used by md_convert_frag_1 and
2727 md_estimate_size_before_relax. The appropriate type of fixup will
2728 be emitted by md_convert_frag_1.
2730 ADD becomes the FR_SYMBOL field of the frag, and OFF the FR_OFFSET. */
2732 install_operand (mode
, val
)
2739 the_ins
.opcode
[0] |= val
& 0xFF; /* JF FF is for M kludge */
2742 the_ins
.opcode
[0] |= val
<< 9;
2745 the_ins
.opcode
[1] |= val
<< 12;
2748 the_ins
.opcode
[1] |= val
<< 6;
2751 the_ins
.opcode
[1] |= val
;
2754 the_ins
.opcode
[2] |= val
<< 12;
2757 the_ins
.opcode
[2] |= val
<< 6;
2760 /* DANGER! This is a hack to force cas2l and cas2w cmds to be
2761 three words long! */
2763 the_ins
.opcode
[2] |= val
;
2766 the_ins
.opcode
[1] |= val
<< 7;
2769 the_ins
.opcode
[1] |= val
<< 10;
2773 the_ins
.opcode
[1] |= val
<< 5;
2778 the_ins
.opcode
[1] |= (val
<< 10) | (val
<< 7);
2781 the_ins
.opcode
[1] |= (val
<< 12) | val
;
2784 the_ins
.opcode
[0] |= val
= 0xff;
2787 the_ins
.opcode
[0] |= val
<< 9;
2790 the_ins
.opcode
[1] |= val
;
2793 the_ins
.opcode
[1] |= val
;
2794 the_ins
.numo
++; /* What a hack */
2797 the_ins
.opcode
[1] |= val
<< 4;
2805 the_ins
.opcode
[0] |= (val
<< 6);
2808 the_ins
.opcode
[1] = (val
>> 16);
2809 the_ins
.opcode
[2] = val
& 0xffff;
2813 as_fatal ("failed sanity check.");
2815 } /* install_operand() */
2818 install_gen_operand (mode
, val
)
2825 the_ins
.opcode
[0] |= val
;
2828 /* This is a kludge!!! */
2829 the_ins
.opcode
[0] |= (val
& 0x07) << 9 | (val
& 0x38) << 3;
2838 the_ins
.opcode
[0] |= val
;
2840 /* more stuff goes here */
2842 as_fatal ("failed sanity check.");
2844 } /* install_gen_operand() */
2847 * verify that we have some number of paren pairs, do m68k_ip_op(), and
2848 * then deal with the bitfield hack.
2852 crack_operand (str
, opP
)
2854 register struct m68k_op
*opP
;
2856 register int parens
;
2858 register char *beg_str
;
2866 for (parens
= 0; *str
&& (parens
> 0 || inquote
|| notend (str
)); str
++)
2872 else if (*str
== ')')
2876 opP
->error
= "Extra )";
2882 if (flag_mri
&& *str
== '\'')
2883 inquote
= ! inquote
;
2885 if (!*str
&& parens
)
2887 opP
->error
= "Missing )";
2892 if (m68k_ip_op (beg_str
, opP
) != 0)
2899 c
= *++str
; /* JF bitfield hack */
2904 as_bad ("Missing operand");
2909 /* This is the guts of the machine-dependent assembler. STR points to a
2910 machine dependent instruction. This function is supposed to emit
2911 the frags/bytes it assembles to.
2915 insert_reg (regname
, regnum
)
2922 #ifdef REGISTER_PREFIX
2923 if (!flag_reg_prefix_optional
)
2925 buf
[0] = REGISTER_PREFIX
;
2926 strcpy (buf
+ 1, regname
);
2931 symbol_table_insert (symbol_new (regname
, reg_section
, regnum
,
2932 &zero_address_frag
));
2934 for (i
= 0; regname
[i
]; i
++)
2935 buf
[i
] = islower (regname
[i
]) ? toupper (regname
[i
]) : regname
[i
];
2938 symbol_table_insert (symbol_new (buf
, reg_section
, regnum
,
2939 &zero_address_frag
));
2948 static const struct init_entry init_table
[] =
3003 /* control registers */
3004 { "sfc", SFC
}, /* Source Function Code */
3006 { "dfc", DFC
}, /* Destination Function Code */
3008 { "cacr", CACR
}, /* Cache Control Register */
3009 { "caar", CAAR
}, /* Cache Address Register */
3011 { "usp", USP
}, /* User Stack Pointer */
3012 { "vbr", VBR
}, /* Vector Base Register */
3013 { "msp", MSP
}, /* Master Stack Pointer */
3014 { "isp", ISP
}, /* Interrupt Stack Pointer */
3016 { "itt0", ITT0
}, /* Instruction Transparent Translation Reg 0 */
3017 { "itt1", ITT1
}, /* Instruction Transparent Translation Reg 1 */
3018 { "dtt0", DTT0
}, /* Data Transparent Translation Register 0 */
3019 { "dtt1", DTT1
}, /* Data Transparent Translation Register 1 */
3021 /* 68ec040 versions of same */
3022 { "iacr0", ITT0
}, /* Instruction Access Control Register 0 */
3023 { "iacr1", ITT1
}, /* Instruction Access Control Register 0 */
3024 { "dacr0", DTT0
}, /* Data Access Control Register 0 */
3025 { "dacr1", DTT1
}, /* Data Access Control Register 0 */
3027 /* mcf5200 versions of same. The ColdFire programmer's reference
3028 manual indicated that the order is 2,3,0,1, but Ken Rose
3029 <rose@netcom.com> says that 0,1,2,3 is the correct order. */
3030 { "acr0", ITT0
}, /* Access Control Unit 0 */
3031 { "acr1", ITT1
}, /* Access Control Unit 1 */
3032 { "acr2", DTT0
}, /* Access Control Unit 2 */
3033 { "acr3", DTT1
}, /* Access Control Unit 3 */
3035 { "tc", TC
}, /* MMU Translation Control Register */
3038 { "mmusr", MMUSR
}, /* MMU Status Register */
3039 { "srp", SRP
}, /* User Root Pointer */
3040 { "urp", URP
}, /* Supervisor Root Pointer */
3045 { "rombar", ROMBAR
}, /* ROM Base Address Register */
3046 { "rambar0", RAMBAR0
}, /* ROM Base Address Register */
3047 { "rambar1", RAMBAR1
}, /* ROM Base Address Register */
3048 { "mbar", MBAR
}, /* Module Base Address Register */
3049 /* end of control registers */
3083 /* 68ec030 versions of same */
3086 /* 68ec030 access control unit, identical to 030 MMU status reg */
3089 /* Suppressed data and address registers. */
3114 for (i
= 0; init_table
[i
].name
; i
++)
3115 insert_reg (init_table
[i
].name
, init_table
[i
].number
);
3118 static int no_68851
, no_68881
;
3121 /* a.out machine type. Default to 68020. */
3122 int m68k_aout_machtype
= 2;
3134 int shorts_this_frag
;
3137 /* In MRI mode, the instruction and operands are separated by a
3138 space. Anything following the operands is a comment. The label
3139 has already been removed. */
3147 for (s
= str
; *s
!= '\0'; s
++)
3149 if ((*s
== ' ' || *s
== '\t') && ! inquote
)
3167 inquote
= ! inquote
;
3172 memset ((char *) (&the_ins
), '\0', sizeof (the_ins
));
3177 for (n
= 0; n
< the_ins
.numargs
; n
++)
3178 if (the_ins
.operands
[n
].error
)
3180 er
= the_ins
.operands
[n
].error
;
3186 as_bad ("%s -- statement `%s' ignored", er
, str
);
3190 if (the_ins
.nfrag
== 0)
3192 /* No frag hacking involved; just put it out */
3193 toP
= frag_more (2 * the_ins
.numo
);
3194 fromP
= &the_ins
.opcode
[0];
3195 for (m
= the_ins
.numo
; m
; --m
)
3197 md_number_to_chars (toP
, (long) (*fromP
), 2);
3201 /* put out symbol-dependent info */
3202 for (m
= 0; m
< the_ins
.nrel
; m
++)
3204 switch (the_ins
.reloc
[m
].wid
)
3222 as_fatal ("Don't know how to figure width of %c in md_assemble()",
3223 the_ins
.reloc
[m
].wid
);
3226 fixP
= fix_new_exp (frag_now
,
3227 ((toP
- frag_now
->fr_literal
)
3228 - the_ins
.numo
* 2 + the_ins
.reloc
[m
].n
),
3230 &the_ins
.reloc
[m
].exp
,
3231 the_ins
.reloc
[m
].pcrel
,
3232 get_reloc_code (n
, the_ins
.reloc
[m
].pcrel
,
3233 the_ins
.reloc
[m
].pic_reloc
));
3234 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
3239 /* There's some frag hacking */
3240 for (n
= 0, fromP
= &the_ins
.opcode
[0]; n
< the_ins
.nfrag
; n
++)
3245 wid
= 2 * the_ins
.fragb
[n
].fragoff
;
3247 wid
= 2 * (the_ins
.numo
- the_ins
.fragb
[n
- 1].fragoff
);
3248 toP
= frag_more (wid
);
3250 shorts_this_frag
= 0;
3251 for (m
= wid
/ 2; m
; --m
)
3253 md_number_to_chars (toP
, (long) (*fromP
), 2);
3258 for (m
= 0; m
< the_ins
.nrel
; m
++)
3260 if ((the_ins
.reloc
[m
].n
) >= 2 * shorts_this_frag
)
3262 the_ins
.reloc
[m
].n
-= 2 * shorts_this_frag
;
3265 wid
= the_ins
.reloc
[m
].wid
;
3268 the_ins
.reloc
[m
].wid
= 0;
3269 wid
= (wid
== 'b') ? 1 : (wid
== 'w') ? 2 : (wid
== 'l') ? 4 : 4000;
3271 fixP
= fix_new_exp (frag_now
,
3272 ((toP
- frag_now
->fr_literal
)
3273 - the_ins
.numo
* 2 + the_ins
.reloc
[m
].n
),
3275 &the_ins
.reloc
[m
].exp
,
3276 the_ins
.reloc
[m
].pcrel
,
3277 get_reloc_code (wid
, the_ins
.reloc
[m
].pcrel
,
3278 the_ins
.reloc
[m
].pic_reloc
));
3279 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
3281 (void) frag_var (rs_machine_dependent
, 10, 0,
3282 (relax_substateT
) (the_ins
.fragb
[n
].fragty
),
3283 the_ins
.fragb
[n
].fadd
, the_ins
.fragb
[n
].foff
, to_beg_P
);
3285 n
= (the_ins
.numo
- the_ins
.fragb
[n
- 1].fragoff
);
3286 shorts_this_frag
= 0;
3289 toP
= frag_more (n
* sizeof (short));
3292 md_number_to_chars (toP
, (long) (*fromP
), 2);
3298 for (m
= 0; m
< the_ins
.nrel
; m
++)
3302 wid
= the_ins
.reloc
[m
].wid
;
3305 the_ins
.reloc
[m
].wid
= 0;
3306 wid
= (wid
== 'b') ? 1 : (wid
== 'w') ? 2 : (wid
== 'l') ? 4 : 4000;
3308 fixP
= fix_new_exp (frag_now
,
3309 ((the_ins
.reloc
[m
].n
+ toP
- frag_now
->fr_literal
)
3310 - shorts_this_frag
* 2),
3312 &the_ins
.reloc
[m
].exp
,
3313 the_ins
.reloc
[m
].pcrel
,
3314 get_reloc_code (wid
, the_ins
.reloc
[m
].pcrel
,
3315 the_ins
.reloc
[m
].pic_reloc
));
3316 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
3324 * md_begin -- set up hash tables with 68000 instructions.
3325 * similar to what the vax assembler does. ---phr
3327 /* RMS claims the thing to do is take the m68k-opcode.h table, and make
3328 a copy of it at runtime, adding in the information we want but isn't
3329 there. I think it'd be better to have an awk script hack the table
3330 at compile time. Or even just xstr the table and use it as-is. But
3331 my lord ghod hath spoken, so we do it this way. Excuse the ugly var
3334 register const struct m68k_opcode
*ins
;
3335 register struct m68k_incant
*hack
, *slak
;
3336 register const char *retval
= 0; /* empty string, or error msg text */
3337 register unsigned int i
;
3342 flag_reg_prefix_optional
= 1;
3347 op_hash
= hash_new ();
3349 obstack_begin (&robyn
, 4000);
3350 for (i
= 0; i
< m68k_numopcodes
; i
++)
3352 hack
= slak
= (struct m68k_incant
*) obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3355 ins
= &m68k_opcodes
[i
];
3356 /* We *could* ignore insns that don't match our arch here
3357 but just leaving them out of the hash. */
3358 slak
->m_operands
= ins
->args
;
3359 slak
->m_opnum
= strlen (slak
->m_operands
) / 2;
3360 slak
->m_arch
= ins
->arch
;
3361 slak
->m_opcode
= ins
->opcode
;
3362 /* This is kludgey */
3363 slak
->m_codenum
= ((ins
->match
) & 0xffffL
) ? 2 : 1;
3364 if (i
+ 1 != m68k_numopcodes
3365 && !strcmp (ins
->name
, m68k_opcodes
[i
+ 1].name
))
3367 slak
->m_next
= (struct m68k_incant
*) obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3372 slak
= slak
->m_next
;
3376 retval
= hash_insert (op_hash
, ins
->name
, (char *) hack
);
3378 as_fatal ("Internal Error: Can't hash %s: %s", ins
->name
, retval
);
3381 for (i
= 0; i
< m68k_numaliases
; i
++)
3383 const char *name
= m68k_opcode_aliases
[i
].primary
;
3384 const char *alias
= m68k_opcode_aliases
[i
].alias
;
3385 PTR val
= hash_find (op_hash
, name
);
3387 as_fatal ("Internal Error: Can't find %s in hash table", name
);
3388 retval
= hash_insert (op_hash
, alias
, val
);
3390 as_fatal ("Internal Error: Can't hash %s: %s", alias
, retval
);
3393 /* In MRI mode, all unsized branches are variable sized. Normally,
3394 they are word sized. */
3397 static struct m68k_opcode_alias mri_aliases
[] =
3417 for (i
= 0; i
< sizeof mri_aliases
/ sizeof mri_aliases
[0]; i
++)
3419 const char *name
= mri_aliases
[i
].primary
;
3420 const char *alias
= mri_aliases
[i
].alias
;
3421 PTR val
= hash_find (op_hash
, name
);
3423 as_fatal ("Internal Error: Can't find %s in hash table", name
);
3424 retval
= hash_jam (op_hash
, alias
, val
);
3426 as_fatal ("Internal Error: Can't hash %s: %s", alias
, retval
);
3430 for (i
= 0; i
< sizeof (mklower_table
); i
++)
3431 mklower_table
[i
] = (isupper (c
= (char) i
)) ? tolower (c
) : c
;
3433 for (i
= 0; i
< sizeof (notend_table
); i
++)
3435 notend_table
[i
] = 0;
3436 alt_notend_table
[i
] = 0;
3438 notend_table
[','] = 1;
3439 notend_table
['{'] = 1;
3440 notend_table
['}'] = 1;
3441 alt_notend_table
['a'] = 1;
3442 alt_notend_table
['A'] = 1;
3443 alt_notend_table
['d'] = 1;
3444 alt_notend_table
['D'] = 1;
3445 alt_notend_table
['#'] = 1;
3446 alt_notend_table
['&'] = 1;
3447 alt_notend_table
['f'] = 1;
3448 alt_notend_table
['F'] = 1;
3449 #ifdef REGISTER_PREFIX
3450 alt_notend_table
[REGISTER_PREFIX
] = 1;
3453 /* We need to put '(' in alt_notend_table to handle
3454 cas2 %d0:%d2,%d3:%d4,(%a0):(%a1)
3456 alt_notend_table
['('] = 1;
3458 /* We need to put '@' in alt_notend_table to handle
3459 cas2 %d0:%d2,%d3:%d4,@(%d0):@(%d1)
3461 alt_notend_table
['@'] = 1;
3463 /* We need to put digits in alt_notend_table to handle
3464 bfextu %d0{24:1},%d0
3466 alt_notend_table
['0'] = 1;
3467 alt_notend_table
['1'] = 1;
3468 alt_notend_table
['2'] = 1;
3469 alt_notend_table
['3'] = 1;
3470 alt_notend_table
['4'] = 1;
3471 alt_notend_table
['5'] = 1;
3472 alt_notend_table
['6'] = 1;
3473 alt_notend_table
['7'] = 1;
3474 alt_notend_table
['8'] = 1;
3475 alt_notend_table
['9'] = 1;
3477 #ifndef MIT_SYNTAX_ONLY
3478 /* Insert pseudo ops, these have to go into the opcode table since
3479 gas expects pseudo ops to start with a dot */
3482 while (mote_pseudo_table
[n
].poc_name
)
3484 hack
= (struct m68k_incant
*)
3485 obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3486 hash_insert (op_hash
,
3487 mote_pseudo_table
[n
].poc_name
, (char *) hack
);
3488 hack
->m_operands
= 0;
3498 record_alignment (text_section
, 2);
3499 record_alignment (data_section
, 2);
3500 record_alignment (bss_section
, 2);
3505 m68k_init_after_args ()
3507 if (cpu_of_arch (current_architecture
) == 0)
3510 const char *default_cpu
= TARGET_CPU
;
3512 if (*default_cpu
== 'm')
3514 for (i
= 0; i
< n_archs
; i
++)
3515 if (strcasecmp (default_cpu
, archs
[i
].name
) == 0)
3519 as_bad ("unrecognized default cpu `%s' ???", TARGET_CPU
);
3520 current_architecture
|= m68020
;
3523 current_architecture
|= archs
[i
].arch
;
3525 /* Permit m68881 specification with all cpus; those that can't work
3526 with a coprocessor could be doing emulation. */
3527 if (current_architecture
& m68851
)
3529 if (current_architecture
& m68040
)
3531 as_warn ("68040 and 68851 specified; mmu instructions may assemble incorrectly");
3534 /* What other incompatibilities could we check for? */
3536 /* Toss in some default assumptions about coprocessors. */
3538 && (cpu_of_arch (current_architecture
)
3539 /* Can CPU32 have a 68881 coprocessor?? */
3540 & (m68020
| m68030
| cpu32
)))
3542 current_architecture
|= m68881
;
3545 && (cpu_of_arch (current_architecture
) & m68020up
) != 0
3546 && (cpu_of_arch (current_architecture
) & m68040up
) == 0)
3548 current_architecture
|= m68851
;
3550 if (no_68881
&& (current_architecture
& m68881
))
3551 as_bad ("options for 68881 and no-68881 both given");
3552 if (no_68851
&& (current_architecture
& m68851
))
3553 as_bad ("options for 68851 and no-68851 both given");
3556 /* Work out the magic number. This isn't very general. */
3557 if (current_architecture
& m68000
)
3558 m68k_aout_machtype
= 0;
3559 else if (current_architecture
& m68010
)
3560 m68k_aout_machtype
= 1;
3561 else if (current_architecture
& m68020
)
3562 m68k_aout_machtype
= 2;
3564 m68k_aout_machtype
= 2;
3567 /* Note which set of "movec" control registers is available. */
3568 switch (cpu_of_arch (current_architecture
))
3571 control_regs
= m68000_control_regs
;
3574 control_regs
= m68010_control_regs
;
3578 control_regs
= m68020_control_regs
;
3581 control_regs
= m68040_control_regs
;
3584 control_regs
= m68060_control_regs
;
3587 control_regs
= cpu32_control_regs
;
3590 control_regs
= mcf5200_control_regs
;
3596 if (cpu_of_arch (current_architecture
) < m68020
)
3597 md_relax_table
[TAB (PCINDEX
, BYTE
)].rlx_more
= 0;
3600 /* This is called if we go in or out of MRI mode because of the .mri
3604 m68k_mri_mode_change (on
)
3609 if (! flag_reg_prefix_optional
)
3611 flag_reg_prefix_optional
= 1;
3612 #ifdef REGISTER_PREFIX
3621 if (! reg_prefix_optional_seen
)
3623 #ifdef REGISTER_PREFIX_OPTIONAL
3624 flag_reg_prefix_optional
= REGISTER_PREFIX_OPTIONAL
;
3626 flag_reg_prefix_optional
= 0;
3628 #ifdef REGISTER_PREFIX
3637 /* Equal to MAX_PRECISION in atof-ieee.c */
3638 #define MAX_LITTLENUMS 6
3640 /* Turn a string in input_line_pointer into a floating point constant
3641 of type type, and store the appropriate bytes in *litP. The number
3642 of LITTLENUMS emitted is stored in *sizeP . An error message is
3643 returned, or NULL on OK. */
3646 md_atof (type
, litP
, sizeP
)
3652 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
3653 LITTLENUM_TYPE
*wordP
;
3685 return "Bad call to MD_ATOF()";
3687 t
= atof_ieee (input_line_pointer
, type
, words
);
3689 input_line_pointer
= t
;
3691 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
3692 for (wordP
= words
; prec
--;)
3694 md_number_to_chars (litP
, (long) (*wordP
++), sizeof (LITTLENUM_TYPE
));
3695 litP
+= sizeof (LITTLENUM_TYPE
);
3701 md_number_to_chars (buf
, val
, n
)
3706 number_to_chars_bigendian (buf
, val
, n
);
3710 md_apply_fix_2 (fixP
, val
)
3714 addressT upper_limit
;
3715 offsetT lower_limit
;
3717 /* This is unnecessary but it convinces the native rs6000 compiler
3718 to generate the code we want. */
3719 char *buf
= fixP
->fx_frag
->fr_literal
;
3720 buf
+= fixP
->fx_where
;
3721 /* end ibm compiler workaround */
3723 if (val
& 0x80000000)
3724 val
|= ~(addressT
)0x7fffffff;
3731 memset (buf
, 0, fixP
->fx_size
);
3732 fixP
->fx_addnumber
= val
; /* Remember value for emit_reloc */
3737 switch (fixP
->fx_size
)
3739 /* The cast to offsetT below are necessary to make code correct for
3740 machines where ints are smaller than offsetT */
3744 lower_limit
= - (offsetT
) 0x80;
3747 *buf
++ = (val
>> 8);
3749 upper_limit
= 0x7fff;
3750 lower_limit
= - (offsetT
) 0x8000;
3753 *buf
++ = (val
>> 24);
3754 *buf
++ = (val
>> 16);
3755 *buf
++ = (val
>> 8);
3757 upper_limit
= 0x7fffffff;
3758 lower_limit
= - (offsetT
) 0x7fffffff - 1; /* avoid constant overflow */
3761 BAD_CASE (fixP
->fx_size
);
3764 /* Fix up a negative reloc. */
3765 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_subsy
!= NULL
)
3767 fixP
->fx_addsy
= fixP
->fx_subsy
;
3768 fixP
->fx_subsy
= NULL
;
3772 /* For non-pc-relative values, it's conceivable we might get something
3773 like "0xff" for a byte field. So extend the upper part of the range
3774 to accept such numbers. We arbitrarily disallow "-0xff" or "0xff+0xff",
3775 so that we can do any range checking at all. */
3776 if (!fixP
->fx_pcrel
)
3777 upper_limit
= upper_limit
* 2 + 1;
3779 if ((addressT
) val
> upper_limit
3780 && (val
> 0 || val
< lower_limit
))
3781 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, "value out of range");
3783 /* A one byte PC-relative reloc means a short branch. We can't use
3784 a short branch with a value of 0 or -1, because those indicate
3785 different opcodes (branches with longer offsets). */
3787 && fixP
->fx_size
== 1
3788 && (fixP
->fx_addsy
== NULL
3789 || S_IS_DEFINED (fixP
->fx_addsy
))
3790 && (val
== 0 || val
== -1))
3791 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, "invalid byte branch offset");
3794 #ifdef BFD_ASSEMBLER
3796 md_apply_fix (fixP
, valp
)
3800 md_apply_fix_2 (fixP
, (addressT
) *valp
);
3804 void md_apply_fix (fixP
, val
)
3808 md_apply_fix_2 (fixP
, (addressT
) val
);
3812 /* *fragP has been relaxed to its final size, and now needs to have
3813 the bytes inside it modified to conform to the new size There is UGLY
3817 md_convert_frag_1 (fragP
)
3818 register fragS
*fragP
;
3824 /* Address in object code of the displacement. */
3825 register int object_address
= fragP
->fr_fix
+ fragP
->fr_address
;
3827 /* Address in gas core of the place to store the displacement. */
3828 /* This convinces the native rs6000 compiler to generate the code we
3830 register char *buffer_address
= fragP
->fr_literal
;
3831 buffer_address
+= fragP
->fr_fix
;
3832 /* end ibm compiler workaround */
3834 /* The displacement of the address, from current location. */
3835 disp
= fragP
->fr_symbol
? S_GET_VALUE (fragP
->fr_symbol
) : 0;
3836 disp
= (disp
+ fragP
->fr_offset
) - object_address
;
3838 #ifdef BFD_ASSEMBLER
3839 disp
+= fragP
->fr_symbol
->sy_frag
->fr_address
;
3842 switch (fragP
->fr_subtype
)
3844 case TAB (BCC68000
, BYTE
):
3845 case TAB (ABRANCH
, BYTE
):
3846 know (issbyte (disp
));
3848 as_bad ("short branch with zero offset: use :w");
3849 fragP
->fr_opcode
[1] = disp
;
3852 case TAB (DBCC
, SHORT
):
3853 know (issword (disp
));
3856 case TAB (BCC68000
, SHORT
):
3857 case TAB (ABRANCH
, SHORT
):
3858 know (issword (disp
));
3859 fragP
->fr_opcode
[1] = 0x00;
3862 case TAB (ABRANCH
, LONG
):
3863 if (cpu_of_arch (current_architecture
) < m68020
)
3865 if (fragP
->fr_opcode
[0] == 0x61)
3868 fragP
->fr_opcode
[0] = 0x4E;
3869 fragP
->fr_opcode
[1] = (char) 0xB9; /* JBSR with ABSL LONG offset */
3883 else if (fragP
->fr_opcode
[0] == 0x60)
3885 fragP
->fr_opcode
[0] = 0x4E;
3886 fragP
->fr_opcode
[1] = (char) 0xF9; /* JMP with ABSL LONG offset */
3887 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3888 fragP
->fr_offset
, 0, NO_RELOC
);
3894 as_bad ("Long branch offset not supported.");
3899 fragP
->fr_opcode
[1] = (char) 0xff;
3903 case TAB (BCC68000
, LONG
):
3904 /* only Bcc 68000 instructions can come here */
3905 /* change bcc into b!cc/jmp absl long */
3906 fragP
->fr_opcode
[0] ^= 0x01; /* invert bcc */
3907 fragP
->fr_opcode
[1] = 0x6;/* branch offset = 6 */
3909 /* JF: these used to be fr_opcode[2,3], but they may be in a
3910 different frag, in which case refering to them is a no-no.
3911 Only fr_opcode[0,1] are guaranteed to work. */
3912 *buffer_address
++ = 0x4e; /* put in jmp long (0x4ef9) */
3913 *buffer_address
++ = (char) 0xf9;
3914 fragP
->fr_fix
+= 2; /* account for jmp instruction */
3915 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3916 fragP
->fr_offset
, 0, NO_RELOC
);
3920 case TAB (DBCC
, LONG
):
3921 /* only DBcc 68000 instructions can come here */
3922 /* change dbcc into dbcc/jmp absl long */
3923 /* JF: these used to be fr_opcode[2-7], but that's wrong */
3924 *buffer_address
++ = 0x00; /* branch offset = 4 */
3925 *buffer_address
++ = 0x04;
3926 *buffer_address
++ = 0x60; /* put in bra pc+6 */
3927 *buffer_address
++ = 0x06;
3928 *buffer_address
++ = 0x4e; /* put in jmp long (0x4ef9) */
3929 *buffer_address
++ = (char) 0xf9;
3931 fragP
->fr_fix
+= 6; /* account for bra/jmp instructions */
3932 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3933 fragP
->fr_offset
, 0, NO_RELOC
);
3937 case TAB (FBRANCH
, SHORT
):
3938 know ((fragP
->fr_opcode
[1] & 0x40) == 0);
3941 case TAB (FBRANCH
, LONG
):
3942 fragP
->fr_opcode
[1] |= 0x40; /* Turn on LONG bit */
3945 case TAB (PCREL
, SHORT
):
3948 case TAB (PCREL
, LONG
):
3949 /* The thing to do here is force it to ABSOLUTE LONG, since
3950 PCREL is really trying to shorten an ABSOLUTE address anyway */
3951 /* JF FOO This code has not been tested */
3952 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
3954 if ((fragP
->fr_opcode
[1] & 0x3F) != 0x3A)
3955 as_bad ("Internal error (long PC-relative operand) for insn 0x%04x at 0x%lx",
3956 (unsigned) fragP
->fr_opcode
[0],
3957 (unsigned long) fragP
->fr_address
);
3958 fragP
->fr_opcode
[1] &= ~0x3F;
3959 fragP
->fr_opcode
[1] |= 0x39; /* Mode 7.1 */
3963 case TAB (PCLEA
, SHORT
):
3964 fix_new (fragP
, (int) (fragP
->fr_fix
), 2, fragP
->fr_symbol
,
3965 fragP
->fr_offset
, 1, NO_RELOC
);
3966 fragP
->fr_opcode
[1] &= ~0x3F;
3967 fragP
->fr_opcode
[1] |= 0x3A; /* 072 - mode 7.2 */
3970 case TAB (PCLEA
, LONG
):
3971 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
) + 2, 4, fragP
->fr_symbol
,
3972 fragP
->fr_offset
, 1, NO_RELOC
);
3973 fixP
->fx_pcrel_adjust
= 2;
3974 /* Already set to mode 7.3; this indicates: PC indirect with
3975 suppressed index, 32-bit displacement. */
3976 *buffer_address
++ = 0x01;
3977 *buffer_address
++ = 0x70;
3982 case TAB (PCINDEX
, BYTE
):
3984 if (!issbyte (disp
))
3986 as_bad ("displacement doesn't fit in one byte");
3989 assert (fragP
->fr_fix
>= 2);
3990 buffer_address
[-2] &= ~1;
3991 buffer_address
[-1] = disp
;
3994 case TAB (PCINDEX
, SHORT
):
3996 assert (issword (disp
));
3997 assert (fragP
->fr_fix
>= 2);
3998 buffer_address
[-2] |= 0x1;
3999 buffer_address
[-1] = 0x20;
4000 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
), 2, fragP
->fr_symbol
,
4001 fragP
->fr_offset
, (fragP
->fr_opcode
[1] & 077) == 073,
4003 fixP
->fx_pcrel_adjust
= 2;
4006 case TAB (PCINDEX
, LONG
):
4008 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
), 4, fragP
->fr_symbol
,
4009 fragP
->fr_offset
, (fragP
->fr_opcode
[1] & 077) == 073,
4011 fixP
->fx_pcrel_adjust
= 2;
4012 assert (fragP
->fr_fix
>= 2);
4013 buffer_address
[-2] |= 0x1;
4014 buffer_address
[-1] = 0x30;
4021 md_number_to_chars (buffer_address
, (long) disp
, (int) ext
);
4022 fragP
->fr_fix
+= ext
;
4026 #ifndef BFD_ASSEMBLER
4029 md_convert_frag (headers
, sec
, fragP
)
4030 object_headers
*headers
;
4034 md_convert_frag_1 (fragP
);
4040 md_convert_frag (abfd
, sec
, fragP
)
4045 md_convert_frag_1 (fragP
);
4049 /* Force truly undefined symbols to their maximum size, and generally set up
4050 the frag list to be relaxed
4053 md_estimate_size_before_relax (fragP
, segment
)
4054 register fragS
*fragP
;
4058 register char *buffer_address
= fragP
->fr_fix
+ fragP
->fr_literal
;
4060 old_fix
= fragP
->fr_fix
;
4062 /* handle SZ_UNDEF first, it can be changed to BYTE or SHORT */
4063 switch (fragP
->fr_subtype
)
4066 case TAB (ABRANCH
, SZ_UNDEF
):
4068 if ((fragP
->fr_symbol
!= NULL
) /* Not absolute */
4069 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment
)
4071 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), BYTE
);
4074 else if ((fragP
->fr_symbol
== 0) || (cpu_of_arch (current_architecture
) < m68020
))
4076 /* On 68000, or for absolute value, switch to abs long */
4077 /* FIXME, we should check abs val, pick short or long */
4078 if (fragP
->fr_opcode
[0] == 0x61)
4080 fragP
->fr_opcode
[0] = 0x4E;
4081 fragP
->fr_opcode
[1] = (char) 0xB9; /* JBSR with ABSL LONG offset */
4082 fix_new (fragP
, fragP
->fr_fix
, 4,
4083 fragP
->fr_symbol
, fragP
->fr_offset
, 0, NO_RELOC
);
4087 else if (fragP
->fr_opcode
[0] == 0x60)
4089 fragP
->fr_opcode
[0] = 0x4E;
4090 fragP
->fr_opcode
[1] = (char) 0xF9; /* JMP with ABSL LONG offset */
4091 fix_new (fragP
, fragP
->fr_fix
, 4,
4092 fragP
->fr_symbol
, fragP
->fr_offset
, 0, NO_RELOC
);
4098 as_warn ("Long branch offset to extern symbol not supported.");
4102 { /* Symbol is still undefined. Make it simple */
4103 fix_new (fragP
, (int) (fragP
->fr_fix
), 4, fragP
->fr_symbol
,
4104 fragP
->fr_offset
, 1, NO_RELOC
);
4106 fragP
->fr_opcode
[1] = (char) 0xff;
4112 } /* case TAB(ABRANCH,SZ_UNDEF) */
4114 case TAB (FBRANCH
, SZ_UNDEF
):
4116 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
|| flag_short_refs
)
4118 fragP
->fr_subtype
= TAB (FBRANCH
, SHORT
);
4123 fix_new (fragP
, (int) fragP
->fr_fix
, 4, fragP
->fr_symbol
,
4124 fragP
->fr_offset
, 1, NO_RELOC
);
4126 fragP
->fr_opcode
[1] |= 0x40; /* Turn on LONG bit */
4130 } /* TAB(FBRANCH,SZ_UNDEF) */
4132 case TAB (PCREL
, SZ_UNDEF
):
4134 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4136 || cpu_of_arch (current_architecture
) < m68020
)
4138 fragP
->fr_subtype
= TAB (PCREL
, SHORT
);
4143 fragP
->fr_subtype
= TAB (PCREL
, LONG
);
4147 } /* TAB(PCREL,SZ_UNDEF) */
4149 case TAB (BCC68000
, SZ_UNDEF
):
4151 if ((fragP
->fr_symbol
!= NULL
)
4152 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment
)
4154 fragP
->fr_subtype
= TAB (BCC68000
, BYTE
);
4157 /* only Bcc 68000 instructions can come here */
4158 /* change bcc into b!cc/jmp absl long */
4159 fragP
->fr_opcode
[0] ^= 0x01; /* invert bcc */
4160 if (flag_short_refs
)
4162 fragP
->fr_opcode
[1] = 0x04; /* branch offset = 6 */
4163 /* JF: these were fr_opcode[2,3] */
4164 buffer_address
[0] = 0x4e; /* put in jmp long (0x4ef9) */
4165 buffer_address
[1] = (char) 0xf8;
4166 fragP
->fr_fix
+= 2; /* account for jmp instruction */
4167 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
,
4168 fragP
->fr_offset
, 0, NO_RELOC
);
4173 fragP
->fr_opcode
[1] = 0x06; /* branch offset = 6 */
4174 /* JF: these were fr_opcode[2,3] */
4175 buffer_address
[0] = 0x4e; /* put in jmp long (0x4ef9) */
4176 buffer_address
[1] = (char) 0xf9;
4177 fragP
->fr_fix
+= 2; /* account for jmp instruction */
4178 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
4179 fragP
->fr_offset
, 0, NO_RELOC
);
4184 } /* case TAB(BCC68000,SZ_UNDEF) */
4186 case TAB (DBCC
, SZ_UNDEF
):
4188 if (fragP
->fr_symbol
!= NULL
&& S_GET_SEGMENT (fragP
->fr_symbol
) == segment
)
4190 fragP
->fr_subtype
= TAB (DBCC
, SHORT
);
4194 /* only DBcc 68000 instructions can come here */
4195 /* change dbcc into dbcc/jmp absl long */
4196 /* JF: these used to be fr_opcode[2-4], which is wrong. */
4197 buffer_address
[0] = 0x00; /* branch offset = 4 */
4198 buffer_address
[1] = 0x04;
4199 buffer_address
[2] = 0x60; /* put in bra pc + ... */
4201 if (flag_short_refs
)
4203 /* JF: these were fr_opcode[5-7] */
4204 buffer_address
[3] = 0x04; /* plus 4 */
4205 buffer_address
[4] = 0x4e; /* Put in Jump Word */
4206 buffer_address
[5] = (char) 0xf8;
4207 fragP
->fr_fix
+= 6; /* account for bra/jmp instruction */
4208 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
,
4209 fragP
->fr_offset
, 0, NO_RELOC
);
4214 /* JF: these were fr_opcode[5-7] */
4215 buffer_address
[3] = 0x06; /* Plus 6 */
4216 buffer_address
[4] = 0x4e; /* put in jmp long (0x4ef9) */
4217 buffer_address
[5] = (char) 0xf9;
4218 fragP
->fr_fix
+= 6; /* account for bra/jmp instruction */
4219 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
4220 fragP
->fr_offset
, 0, NO_RELOC
);
4226 } /* case TAB(DBCC,SZ_UNDEF) */
4228 case TAB (PCLEA
, SZ_UNDEF
):
4230 if ((S_GET_SEGMENT (fragP
->fr_symbol
)) == segment
4232 || cpu_of_arch (current_architecture
) < m68020
)
4234 fragP
->fr_subtype
= TAB (PCLEA
, SHORT
);
4239 fragP
->fr_subtype
= TAB (PCLEA
, LONG
);
4243 } /* TAB(PCLEA,SZ_UNDEF) */
4245 case TAB (PCINDEX
, SZ_UNDEF
):
4246 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4247 || cpu_of_arch (current_architecture
) < m68020
)
4249 fragP
->fr_subtype
= TAB (PCINDEX
, BYTE
);
4253 fragP
->fr_subtype
= TAB (PCINDEX
, LONG
);
4262 /* now that SZ_UNDEF are taken care of, check others */
4263 switch (fragP
->fr_subtype
)
4265 case TAB (BCC68000
, BYTE
):
4266 case TAB (ABRANCH
, BYTE
):
4267 /* We can't do a short jump to the next instruction, so in that
4268 case we force word mode. At this point S_GET_VALUE should
4269 return the offset of the symbol within its frag. If the
4270 symbol is at the start of a frag, and it is the next frag
4271 with any data in it (usually this is just the next frag, but
4272 assembler listings may introduce empty frags), we must use
4274 if (fragP
->fr_symbol
&& S_GET_VALUE (fragP
->fr_symbol
) == 0)
4278 for (l
= fragP
->fr_next
;
4279 l
!= fragP
->fr_symbol
->sy_frag
;
4281 if (l
->fr_fix
+ l
->fr_var
!= 0)
4283 if (l
== fragP
->fr_symbol
->sy_frag
)
4285 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), SHORT
);
4293 return fragP
->fr_var
+ fragP
->fr_fix
- old_fix
;
4296 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
4297 /* the bit-field entries in the relocation_info struct plays hell
4298 with the byte-order problems of cross-assembly. So as a hack,
4299 I added this mach. dependent ri twiddler. Ugly, but it gets
4301 /* on m68k: first 4 bytes are normal unsigned long, next three bytes
4302 are symbolnum, most sig. byte first. Last byte is broken up with
4303 bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
4304 nibble as nuthin. (on Sun 3 at least) */
4305 /* Translate the internal relocation information into target-specific
4309 md_ri_to_chars (the_bytes
, ri
)
4311 struct reloc_info_generic
*ri
;
4314 md_number_to_chars (the_bytes
, ri
->r_address
, 4);
4315 /* now the fun stuff */
4316 the_bytes
[4] = (ri
->r_symbolnum
>> 16) & 0x0ff;
4317 the_bytes
[5] = (ri
->r_symbolnum
>> 8) & 0x0ff;
4318 the_bytes
[6] = ri
->r_symbolnum
& 0x0ff;
4319 the_bytes
[7] = (((ri
->r_pcrel
<< 7) & 0x80) | ((ri
->r_length
<< 5) & 0x60) |
4320 ((ri
->r_extern
<< 4) & 0x10));
4323 #endif /* comment */
4325 #ifndef BFD_ASSEMBLER
4327 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
4330 relax_addressT segment_address_in_file
;
4333 * In: length of relocation (or of address) in chars: 1, 2 or 4.
4334 * Out: GNU LD relocation length code: 0, 1, or 2.
4337 static CONST
unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
4340 know (fixP
->fx_addsy
!= NULL
);
4342 md_number_to_chars (where
,
4343 fixP
->fx_frag
->fr_address
+ fixP
->fx_where
- segment_address_in_file
,
4346 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
4347 ? S_GET_TYPE (fixP
->fx_addsy
)
4348 : fixP
->fx_addsy
->sy_number
);
4350 where
[4] = (r_symbolnum
>> 16) & 0x0ff;
4351 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
4352 where
[6] = r_symbolnum
& 0x0ff;
4353 where
[7] = (((fixP
->fx_pcrel
<< 7) & 0x80) | ((nbytes_r_length
[fixP
->fx_size
] << 5) & 0x60) |
4354 (((!S_IS_DEFINED (fixP
->fx_addsy
)) << 4) & 0x10));
4358 #endif /* OBJ_AOUT or OBJ_BOUT */
4360 #ifndef WORKING_DOT_WORD
4361 CONST
int md_short_jump_size
= 4;
4362 CONST
int md_long_jump_size
= 6;
4365 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
4367 addressT from_addr
, to_addr
;
4373 offset
= to_addr
- (from_addr
+ 2);
4375 md_number_to_chars (ptr
, (valueT
) 0x6000, 2);
4376 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 2);
4380 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
4382 addressT from_addr
, to_addr
;
4388 if (cpu_of_arch (current_architecture
) < m68020
)
4390 offset
= to_addr
- S_GET_VALUE (to_symbol
);
4391 md_number_to_chars (ptr
, (valueT
) 0x4EF9, 2);
4392 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 4);
4393 fix_new (frag
, (ptr
+ 2) - frag
->fr_literal
, 4, to_symbol
, (offsetT
) 0,
4398 offset
= to_addr
- (from_addr
+ 2);
4399 md_number_to_chars (ptr
, (valueT
) 0x60ff, 2);
4400 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 4);
4406 /* Different values of OK tell what its OK to return. Things that
4407 aren't OK are an error (what a shock, no?)
4410 10: Absolute 1:8 only
4411 20: Absolute 0:7 only
4412 30: absolute 0:15 only
4413 40: Absolute 0:31 only
4414 50: absolute 0:127 only
4415 55: absolute -64:63 only
4416 60: absolute -128:127 only
4417 70: absolute 0:4095 only
4424 struct m68k_exp
*exp
;
4427 if (exp
->exp
.X_op
== O_absent
)
4429 /* Do the same thing the VAX asm does */
4430 op (exp
) = O_constant
;
4436 as_warn ("expression out of range: defaulting to 1");
4440 else if (exp
->exp
.X_op
== O_constant
)
4445 if (offs (exp
) < 1 || offs (exp
) > 8)
4447 as_warn ("expression out of range: defaulting to 1");
4452 if (offs (exp
) < 0 || offs (exp
) > 7)
4456 if (offs (exp
) < 0 || offs (exp
) > 15)
4460 if (offs (exp
) < 0 || offs (exp
) > 32)
4464 if (offs (exp
) < 0 || offs (exp
) > 127)
4468 if (offs (exp
) < -64 || offs (exp
) > 63)
4472 if (offs (exp
) < -128 || offs (exp
) > 127)
4476 if (offs (exp
) < 0 || offs (exp
) > 4095)
4479 as_warn ("expression out of range: defaulting to 0");
4487 else if (exp
->exp
.X_op
== O_big
)
4489 if (offs (exp
) <= 0 /* flonum */
4490 && (ok
== 80 /* no bignums */
4491 || (ok
> 10 /* small-int ranges including 0 ok */
4492 /* If we have a flonum zero, a zero integer should
4493 do as well (e.g., in moveq). */
4494 && generic_floating_point_number
.exponent
== 0
4495 && generic_floating_point_number
.low
[0] == 0)))
4497 /* HACK! Turn it into a long */
4498 LITTLENUM_TYPE words
[6];
4500 gen_to_words (words
, 2, 8L); /* These numbers are magic! */
4501 op (exp
) = O_constant
;
4504 offs (exp
) = words
[1] | (words
[0] << 16);
4508 op (exp
) = O_constant
;
4511 offs (exp
) = (ok
== 10) ? 1 : 0;
4512 as_warn ("Can't deal with expression; defaulting to %ld",
4518 if (ok
>= 10 && ok
<= 70)
4520 op (exp
) = O_constant
;
4523 offs (exp
) = (ok
== 10) ? 1 : 0;
4524 as_warn ("Can't deal with expression; defaulting to %ld",
4529 if (exp
->size
!= SIZE_UNSPEC
)
4537 if (!isbyte (offs (exp
)))
4538 as_warn ("expression doesn't fit in BYTE");
4541 if (!isword (offs (exp
)))
4542 as_warn ("expression doesn't fit in WORD");
4550 /* These are the back-ends for the various machine dependent pseudo-ops. */
4551 void demand_empty_rest_of_line (); /* Hate those extra verbose names */
4557 subseg_set (data_section
, 1);
4558 demand_empty_rest_of_line ();
4565 subseg_set (data_section
, 2);
4566 demand_empty_rest_of_line ();
4573 /* We don't support putting frags in the BSS segment, we fake it
4574 by marking in_bss, then looking at s_skip for clues. */
4576 subseg_set (bss_section
, 0);
4577 demand_empty_rest_of_line ();
4585 register long temp_fill
;
4587 temp
= 1; /* JF should be 2? */
4588 temp_fill
= get_absolute_expression ();
4589 if (!need_pass_2
) /* Never make frag if expect extra pass. */
4590 frag_align (temp
, (int) temp_fill
);
4591 demand_empty_rest_of_line ();
4598 demand_empty_rest_of_line ();
4601 /* Pseudo-ops handled for MRI compatibility. */
4603 /* Handle an MRI style chip specification. */
4612 s
= input_line_pointer
;
4613 c
= get_symbol_end ();
4614 for (i
= 0; i
< n_archs
; i
++)
4615 if (strcasecmp (s
, archs
[i
].name
) == 0)
4619 as_bad ("%s: unrecognized processor name", s
);
4620 *input_line_pointer
= c
;
4621 ignore_rest_of_line ();
4624 *input_line_pointer
= c
;
4626 if (*input_line_pointer
== '/')
4627 current_architecture
= 0;
4629 current_architecture
&= m68881
| m68851
;
4630 current_architecture
|= archs
[i
].arch
;
4632 while (*input_line_pointer
== '/')
4634 ++input_line_pointer
;
4635 s
= input_line_pointer
;
4636 c
= get_symbol_end ();
4637 if (strcmp (s
, "68881") == 0)
4638 current_architecture
|= m68881
;
4639 else if (strcmp (s
, "68851") == 0)
4640 current_architecture
|= m68851
;
4641 *input_line_pointer
= c
;
4645 /* The MRI CHIP pseudo-op. */
4655 stop
= mri_comment_field (&stopc
);
4658 mri_comment_end (stop
, stopc
);
4659 demand_empty_rest_of_line ();
4662 /* The MRI FOPT pseudo-op. */
4670 if (strncasecmp (input_line_pointer
, "ID=", 3) == 0)
4674 input_line_pointer
+= 3;
4675 temp
= get_absolute_expression ();
4676 if (temp
< 0 || temp
> 7)
4677 as_bad ("bad coprocessor id");
4679 m68k_float_copnum
= COP0
+ temp
;
4683 as_bad ("unrecognized fopt option");
4684 ignore_rest_of_line ();
4688 demand_empty_rest_of_line ();
4691 /* The structure used to handle the MRI OPT pseudo-op. */
4695 /* The name of the option. */
4698 /* If this is not NULL, just call this function. The first argument
4699 is the ARG field of this structure, the second argument is
4700 whether the option was negated. */
4701 void (*pfn
) PARAMS ((int arg
, int on
));
4703 /* If this is not NULL, and the PFN field is NULL, set the variable
4704 this points to. Set it to the ARG field if the option was not
4705 negated, and the NOTARG field otherwise. */
4708 /* The value to pass to PFN or to assign to *PVAR. */
4711 /* The value to assign to *PVAR if the option is negated. If PFN is
4712 NULL, and PVAR is not NULL, and ARG and NOTARG are the same, then
4713 the option may not be negated. */
4717 /* The table used to handle the MRI OPT pseudo-op. */
4719 static void skip_to_comma
PARAMS ((int, int));
4720 static void opt_nest
PARAMS ((int, int));
4721 static void opt_chip
PARAMS ((int, int));
4722 static void opt_list
PARAMS ((int, int));
4723 static void opt_list_symbols
PARAMS ((int, int));
4725 static const struct opt_action opt_table
[] =
4727 { "abspcadd", 0, &m68k_abspcadd
, 1, 0 },
4729 /* We do relaxing, so there is little use for these options. */
4730 { "b", 0, 0, 0, 0 },
4731 { "brs", 0, 0, 0, 0 },
4732 { "brb", 0, 0, 0, 0 },
4733 { "brl", 0, 0, 0, 0 },
4734 { "brw", 0, 0, 0, 0 },
4736 { "c", 0, 0, 0, 0 },
4737 { "cex", 0, 0, 0, 0 },
4738 { "case", 0, &symbols_case_sensitive
, 1, 0 },
4739 { "cl", 0, 0, 0, 0 },
4740 { "cre", 0, 0, 0, 0 },
4741 { "d", 0, &flag_keep_locals
, 1, 0 },
4742 { "e", 0, 0, 0, 0 },
4743 { "f", 0, &flag_short_refs
, 1, 0 },
4744 { "frs", 0, &flag_short_refs
, 1, 0 },
4745 { "frl", 0, &flag_short_refs
, 0, 1 },
4746 { "g", 0, 0, 0, 0 },
4747 { "i", 0, 0, 0, 0 },
4748 { "m", 0, 0, 0, 0 },
4749 { "mex", 0, 0, 0, 0 },
4750 { "mc", 0, 0, 0, 0 },
4751 { "md", 0, 0, 0, 0 },
4752 { "nest", opt_nest
, 0, 0, 0 },
4753 { "next", skip_to_comma
, 0, 0, 0 },
4754 { "o", 0, 0, 0, 0 },
4755 { "old", 0, 0, 0, 0 },
4756 { "op", skip_to_comma
, 0, 0, 0 },
4757 { "pco", 0, 0, 0, 0 },
4758 { "p", opt_chip
, 0, 0, 0 },
4759 { "pcr", 0, 0, 0, 0 },
4760 { "pcs", 0, 0, 0, 0 },
4761 { "r", 0, 0, 0, 0 },
4762 { "quick", 0, &m68k_quick
, 1, 0 },
4763 { "rel32", 0, &m68k_rel32
, 1, 0 },
4764 { "s", opt_list
, 0, 0, 0 },
4765 { "t", opt_list_symbols
, 0, 0, 0 },
4766 { "w", 0, &flag_no_warnings
, 0, 1 },
4770 #define OPTCOUNT (sizeof opt_table / sizeof opt_table[0])
4772 /* The MRI OPT pseudo-op. */
4784 const struct opt_action
*o
;
4789 if (*input_line_pointer
== '-')
4791 ++input_line_pointer
;
4794 else if (strncasecmp (input_line_pointer
, "NO", 2) == 0)
4796 input_line_pointer
+= 2;
4800 s
= input_line_pointer
;
4801 c
= get_symbol_end ();
4803 for (i
= 0, o
= opt_table
; i
< OPTCOUNT
; i
++, o
++)
4805 if (strcasecmp (s
, o
->name
) == 0)
4809 /* Restore input_line_pointer now in case the option
4811 *input_line_pointer
= c
;
4812 (*o
->pfn
) (o
->arg
, t
);
4814 else if (o
->pvar
!= NULL
)
4816 if (! t
&& o
->arg
== o
->notarg
)
4817 as_bad ("option `%s' may not be negated", s
);
4818 *input_line_pointer
= c
;
4819 *o
->pvar
= t
? o
->arg
: o
->notarg
;
4822 *input_line_pointer
= c
;
4828 as_bad ("option `%s' not recognized", s
);
4829 *input_line_pointer
= c
;
4832 while (*input_line_pointer
++ == ',');
4834 /* Move back to terminating character. */
4835 --input_line_pointer
;
4836 demand_empty_rest_of_line ();
4839 /* Skip ahead to a comma. This is used for OPT options which we do
4840 not suppor tand which take arguments. */
4843 skip_to_comma (arg
, on
)
4847 while (*input_line_pointer
!= ','
4848 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
4849 ++input_line_pointer
;
4852 /* Handle the OPT NEST=depth option. */
4859 if (*input_line_pointer
!= '=')
4861 as_bad ("bad format of OPT NEST=depth");
4865 ++input_line_pointer
;
4866 max_macro_nest
= get_absolute_expression ();
4869 /* Handle the OPT P=chip option. */
4876 if (*input_line_pointer
!= '=')
4878 /* This is just OPT P, which we do not support. */
4882 ++input_line_pointer
;
4886 /* Handle the OPT S option. */
4896 /* Handle the OPT T option. */
4899 opt_list_symbols (arg
, on
)
4904 listing
|= LISTING_SYMBOLS
;
4906 listing
&=~ LISTING_SYMBOLS
;
4909 /* Handle the MRI REG pseudo-op. */
4922 if (line_label
== NULL
)
4924 as_bad ("missing label");
4925 ignore_rest_of_line ();
4930 stop
= mri_comment_field (&stopc
);
4934 s
= input_line_pointer
;
4935 while (isalnum ((unsigned char) *input_line_pointer
)
4936 #ifdef REGISTER_PREFIX
4937 || *input_line_pointer
== REGISTER_PREFIX
4939 || *input_line_pointer
== '/'
4940 || *input_line_pointer
== '-')
4941 ++input_line_pointer
;
4942 c
= *input_line_pointer
;
4943 *input_line_pointer
= '\0';
4945 if (m68k_ip_op (s
, &rop
) != 0)
4947 if (rop
.error
== NULL
)
4948 as_bad ("bad register list");
4950 as_bad ("bad register list: %s", rop
.error
);
4951 *input_line_pointer
= c
;
4952 ignore_rest_of_line ();
4956 *input_line_pointer
= c
;
4958 if (rop
.mode
== REGLST
)
4960 else if (rop
.mode
== DREG
)
4961 mask
= 1 << (rop
.reg
- DATA0
);
4962 else if (rop
.mode
== AREG
)
4963 mask
= 1 << (rop
.reg
- ADDR0
+ 8);
4964 else if (rop
.mode
== FPREG
)
4965 mask
= 1 << (rop
.reg
- FP0
+ 16);
4966 else if (rop
.mode
== CONTROL
4969 else if (rop
.mode
== CONTROL
4972 else if (rop
.mode
== CONTROL
4977 as_bad ("bad register list");
4978 ignore_rest_of_line ();
4982 S_SET_SEGMENT (line_label
, absolute_section
);
4983 S_SET_VALUE (line_label
, mask
);
4984 line_label
->sy_frag
= &zero_address_frag
;
4987 mri_comment_end (stop
, stopc
);
4989 demand_empty_rest_of_line ();
4992 /* This structure is used for the MRI SAVE and RESTORE pseudo-ops. */
4996 struct save_opts
*next
;
4998 int symbols_case_sensitive
;
5006 /* FIXME: We don't save OPT S. */
5009 /* This variable holds the stack of saved options. */
5011 static struct save_opts
*save_stack
;
5013 /* The MRI SAVE pseudo-op. */
5019 struct save_opts
*s
;
5021 s
= (struct save_opts
*) xmalloc (sizeof (struct save_opts
));
5022 s
->abspcadd
= m68k_abspcadd
;
5023 s
->symbols_case_sensitive
= symbols_case_sensitive
;
5024 s
->keep_locals
= flag_keep_locals
;
5025 s
->short_refs
= flag_short_refs
;
5026 s
->architecture
= current_architecture
;
5027 s
->quick
= m68k_quick
;
5028 s
->rel32
= m68k_rel32
;
5029 s
->listing
= listing
;
5030 s
->no_warnings
= flag_no_warnings
;
5032 s
->next
= save_stack
;
5035 demand_empty_rest_of_line ();
5038 /* The MRI RESTORE pseudo-op. */
5044 struct save_opts
*s
;
5046 if (save_stack
== NULL
)
5048 as_bad ("restore without save");
5049 ignore_rest_of_line ();
5054 save_stack
= s
->next
;
5056 m68k_abspcadd
= s
->abspcadd
;
5057 symbols_case_sensitive
= s
->symbols_case_sensitive
;
5058 flag_keep_locals
= s
->keep_locals
;
5059 flag_short_refs
= s
->short_refs
;
5060 current_architecture
= s
->architecture
;
5061 m68k_quick
= s
->quick
;
5062 m68k_rel32
= s
->rel32
;
5063 listing
= s
->listing
;
5064 flag_no_warnings
= s
->no_warnings
;
5068 demand_empty_rest_of_line ();
5071 /* Types of MRI structured control directives. */
5073 enum mri_control_type
5081 /* This structure is used to stack the MRI structured control
5084 struct mri_control_info
5086 /* The directive within which this one is enclosed. */
5087 struct mri_control_info
*outer
;
5089 /* The type of directive. */
5090 enum mri_control_type type
;
5092 /* Whether an ELSE has been in an IF. */
5095 /* The add or sub statement at the end of a FOR. */
5098 /* The label of the top of a FOR or REPEAT loop. */
5101 /* The label to jump to for the next iteration, or the else
5102 expression of a conditional. */
5105 /* The label to jump to to break out of the loop, or the label past
5106 the end of a conditional. */
5110 /* The stack of MRI structured control directives. */
5112 static struct mri_control_info
*mri_control_stack
;
5114 /* The current MRI structured control directive index number, used to
5115 generate label names. */
5117 static int mri_control_index
;
5119 /* Some function prototypes. */
5121 static char *mri_control_label
PARAMS ((void));
5122 static struct mri_control_info
*push_mri_control
5123 PARAMS ((enum mri_control_type
));
5124 static void pop_mri_control
PARAMS ((void));
5125 static int parse_mri_condition
PARAMS ((int *));
5126 static int parse_mri_control_operand
5127 PARAMS ((int *, char **, char **, char **, char **));
5128 static int swap_mri_condition
PARAMS ((int));
5129 static int reverse_mri_condition
PARAMS ((int));
5130 static void build_mri_control_operand
5131 PARAMS ((int, int, char *, char *, char *, char *, const char *,
5132 const char *, int));
5133 static void parse_mri_control_expression
5134 PARAMS ((char *, int, const char *, const char *, int));
5136 /* Generate a new MRI label structured control directive label name. */
5139 mri_control_label ()
5143 n
= (char *) xmalloc (20);
5144 sprintf (n
, "%smc%d", FAKE_LABEL_NAME
, mri_control_index
);
5145 ++mri_control_index
;
5149 /* Create a new MRI structured control directive. */
5151 static struct mri_control_info
*
5152 push_mri_control (type
)
5153 enum mri_control_type type
;
5155 struct mri_control_info
*n
;
5157 n
= (struct mri_control_info
*) xmalloc (sizeof (struct mri_control_info
));
5161 if (type
== mri_if
|| type
== mri_while
)
5164 n
->top
= mri_control_label ();
5165 n
->next
= mri_control_label ();
5166 n
->bottom
= mri_control_label ();
5168 n
->outer
= mri_control_stack
;
5169 mri_control_stack
= n
;
5174 /* Pop off the stack of MRI structured control directives. */
5179 struct mri_control_info
*n
;
5181 n
= mri_control_stack
;
5182 mri_control_stack
= n
->outer
;
5190 /* Recognize a condition code in an MRI structured control expression. */
5193 parse_mri_condition (pcc
)
5198 know (*input_line_pointer
== '<');
5200 ++input_line_pointer
;
5201 c1
= *input_line_pointer
++;
5202 c2
= *input_line_pointer
++;
5204 if (*input_line_pointer
!= '>')
5206 as_bad ("syntax error in structured control directive");
5210 ++input_line_pointer
;
5218 *pcc
= (c1
<< 8) | c2
;
5223 /* Parse a single operand in an MRI structured control expression. */
5226 parse_mri_control_operand (pcc
, leftstart
, leftstop
, rightstart
, rightstop
)
5243 if (*input_line_pointer
== '<')
5245 /* It's just a condition code. */
5246 return parse_mri_condition (pcc
);
5249 /* Look ahead for the condition code. */
5250 for (s
= input_line_pointer
; *s
!= '\0'; ++s
)
5252 if (*s
== '<' && s
[1] != '\0' && s
[2] != '\0' && s
[3] == '>')
5257 as_bad ("missing condition code in structured control directive");
5261 *leftstart
= input_line_pointer
;
5263 if (*leftstop
> *leftstart
5264 && ((*leftstop
)[-1] == ' ' || (*leftstop
)[-1] == '\t'))
5267 input_line_pointer
= s
;
5268 if (! parse_mri_condition (pcc
))
5271 /* Look ahead for AND or OR or end of line. */
5272 for (s
= input_line_pointer
; *s
!= '\0'; ++s
)
5274 if ((strncasecmp (s
, "AND", 3) == 0
5275 && (s
[3] == '.' || ! is_part_of_name (s
[3])))
5276 || (strncasecmp (s
, "OR", 2) == 0
5277 && (s
[2] == '.' || ! is_part_of_name (s
[2]))))
5281 *rightstart
= input_line_pointer
;
5283 if (*rightstop
> *rightstart
5284 && ((*rightstop
)[-1] == ' ' || (*rightstop
)[-1] == '\t'))
5287 input_line_pointer
= s
;
5292 #define MCC(b1, b2) (((b1) << 8) | (b2))
5294 /* Swap the sense of a condition. This changes the condition so that
5295 it generates the same result when the operands are swapped. */
5298 swap_mri_condition (cc
)
5303 case MCC ('h', 'i'): return MCC ('c', 's');
5304 case MCC ('l', 's'): return MCC ('c', 'c');
5305 case MCC ('c', 'c'): return MCC ('l', 's');
5306 case MCC ('c', 's'): return MCC ('h', 'i');
5307 case MCC ('p', 'l'): return MCC ('m', 'i');
5308 case MCC ('m', 'i'): return MCC ('p', 'l');
5309 case MCC ('g', 'e'): return MCC ('l', 'e');
5310 case MCC ('l', 't'): return MCC ('g', 't');
5311 case MCC ('g', 't'): return MCC ('l', 't');
5312 case MCC ('l', 'e'): return MCC ('g', 'e');
5317 /* Reverse the sense of a condition. */
5320 reverse_mri_condition (cc
)
5325 case MCC ('h', 'i'): return MCC ('l', 's');
5326 case MCC ('l', 's'): return MCC ('h', 'i');
5327 case MCC ('c', 'c'): return MCC ('c', 's');
5328 case MCC ('c', 's'): return MCC ('c', 'c');
5329 case MCC ('n', 'e'): return MCC ('e', 'q');
5330 case MCC ('e', 'q'): return MCC ('n', 'e');
5331 case MCC ('v', 'c'): return MCC ('v', 's');
5332 case MCC ('v', 's'): return MCC ('v', 'c');
5333 case MCC ('p', 'l'): return MCC ('m', 'i');
5334 case MCC ('m', 'i'): return MCC ('p', 'l');
5335 case MCC ('g', 'e'): return MCC ('l', 't');
5336 case MCC ('l', 't'): return MCC ('g', 'e');
5337 case MCC ('g', 't'): return MCC ('l', 'e');
5338 case MCC ('l', 'e'): return MCC ('g', 't');
5343 /* Build an MRI structured control expression. This generates test
5344 and branch instructions. It goes to TRUELAB if the condition is
5345 true, and to FALSELAB if the condition is false. Exactly one of
5346 TRUELAB and FALSELAB will be NULL, meaning to fall through. QUAL
5347 is the size qualifier for the expression. EXTENT is the size to
5348 use for the branch. */
5351 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5352 rightstop
, truelab
, falselab
, extent
)
5359 const char *truelab
;
5360 const char *falselab
;
5366 if (leftstart
!= NULL
)
5368 struct m68k_op leftop
, rightop
;
5371 /* Swap the compare operands, if necessary, to produce a legal
5372 m68k compare instruction. Comparing a register operand with
5373 a non-register operand requires the register to be on the
5374 right (cmp, cmpa). Comparing an immediate value with
5375 anything requires the immediate value to be on the left
5380 (void) m68k_ip_op (leftstart
, &leftop
);
5385 (void) m68k_ip_op (rightstart
, &rightop
);
5388 if (rightop
.mode
== IMMED
5389 || ((leftop
.mode
== DREG
|| leftop
.mode
== AREG
)
5390 && (rightop
.mode
!= DREG
&& rightop
.mode
!= AREG
)))
5394 cc
= swap_mri_condition (cc
);
5396 leftstart
= rightstart
;
5399 leftstop
= rightstop
;
5404 if (truelab
== NULL
)
5406 cc
= reverse_mri_condition (cc
);
5410 if (leftstart
!= NULL
)
5412 buf
= (char *) xmalloc (20
5413 + (leftstop
- leftstart
)
5414 + (rightstop
- rightstart
));
5422 memcpy (s
, leftstart
, leftstop
- leftstart
);
5423 s
+= leftstop
- leftstart
;
5425 memcpy (s
, rightstart
, rightstop
- rightstart
);
5426 s
+= rightstop
- rightstart
;
5432 buf
= (char *) xmalloc (20 + strlen (truelab
));
5440 strcpy (s
, truelab
);
5445 /* Parse an MRI structured control expression. This generates test
5446 and branch instructions. STOP is where the expression ends. It
5447 goes to TRUELAB if the condition is true, and to FALSELAB if the
5448 condition is false. Exactly one of TRUELAB and FALSELAB will be
5449 NULL, meaning to fall through. QUAL is the size qualifier for the
5450 expression. EXTENT is the size to use for the branch. */
5453 parse_mri_control_expression (stop
, qual
, truelab
, falselab
, extent
)
5456 const char *truelab
;
5457 const char *falselab
;
5470 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
5471 &rightstart
, &rightstop
))
5477 if (strncasecmp (input_line_pointer
, "AND", 3) == 0)
5481 if (falselab
!= NULL
)
5484 flab
= mri_control_label ();
5486 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5487 rightstop
, (const char *) NULL
, flab
, extent
);
5489 input_line_pointer
+= 3;
5490 if (*input_line_pointer
!= '.'
5491 || input_line_pointer
[1] == '\0')
5495 qual
= input_line_pointer
[1];
5496 input_line_pointer
+= 2;
5499 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
5500 &rightstart
, &rightstop
))
5506 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5507 rightstop
, truelab
, falselab
, extent
);
5509 if (falselab
== NULL
)
5512 else if (strncasecmp (input_line_pointer
, "OR", 2) == 0)
5516 if (truelab
!= NULL
)
5519 tlab
= mri_control_label ();
5521 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5522 rightstop
, tlab
, (const char *) NULL
, extent
);
5524 input_line_pointer
+= 2;
5525 if (*input_line_pointer
!= '.'
5526 || input_line_pointer
[1] == '\0')
5530 qual
= input_line_pointer
[1];
5531 input_line_pointer
+= 2;
5534 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
5535 &rightstart
, &rightstop
))
5541 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5542 rightstop
, truelab
, falselab
, extent
);
5544 if (truelab
== NULL
)
5549 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5550 rightstop
, truelab
, falselab
, extent
);
5554 if (input_line_pointer
!= stop
)
5555 as_bad ("syntax error in structured control directive");
5558 /* Handle the MRI IF pseudo-op. This may be a structured control
5559 directive, or it may be a regular assembler conditional, depending
5568 struct mri_control_info
*n
;
5570 /* A structured control directive must end with THEN with an
5571 optional qualifier. */
5572 s
= input_line_pointer
;
5573 while (! is_end_of_line
[(unsigned char) *s
]
5574 && (! flag_mri
|| *s
!= '*'))
5577 while (s
> input_line_pointer
&& (*s
== ' ' || *s
== '\t'))
5580 if (s
- input_line_pointer
> 1
5584 if (s
- input_line_pointer
< 3
5585 || strncasecmp (s
- 3, "THEN", 4) != 0)
5589 as_bad ("missing then");
5590 ignore_rest_of_line ();
5594 /* It's a conditional. */
5599 /* Since this might be a conditional if, this pseudo-op will be
5600 called even if we are supported to be ignoring input. Double
5601 check now. Clobber *input_line_pointer so that ignore_input
5602 thinks that this is not a special pseudo-op. */
5603 c
= *input_line_pointer
;
5604 *input_line_pointer
= 0;
5605 if (ignore_input ())
5607 *input_line_pointer
= c
;
5608 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5609 ++input_line_pointer
;
5610 demand_empty_rest_of_line ();
5613 *input_line_pointer
= c
;
5615 n
= push_mri_control (mri_if
);
5617 parse_mri_control_expression (s
- 3, qual
, (const char *) NULL
,
5618 n
->next
, s
[1] == '.' ? s
[2] : '\0');
5621 input_line_pointer
= s
+ 3;
5623 input_line_pointer
= s
+ 1;
5627 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5628 ++input_line_pointer
;
5631 demand_empty_rest_of_line ();
5634 /* Handle the MRI else pseudo-op. If we are currently doing an MRI
5635 structured IF, associate the ELSE with the IF. Otherwise, assume
5636 it is a conditional else. */
5647 && (mri_control_stack
== NULL
5648 || mri_control_stack
->type
!= mri_if
5649 || mri_control_stack
->else_seen
))
5655 c
= *input_line_pointer
;
5656 *input_line_pointer
= 0;
5657 if (ignore_input ())
5659 *input_line_pointer
= c
;
5660 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5661 ++input_line_pointer
;
5662 demand_empty_rest_of_line ();
5665 *input_line_pointer
= c
;
5667 if (mri_control_stack
== NULL
5668 || mri_control_stack
->type
!= mri_if
5669 || mri_control_stack
->else_seen
)
5671 as_bad ("else without matching if");
5672 ignore_rest_of_line ();
5676 mri_control_stack
->else_seen
= 1;
5678 buf
= (char *) xmalloc (20 + strlen (mri_control_stack
->bottom
));
5681 sprintf (buf
, "bra%s %s", q
, mri_control_stack
->bottom
);
5685 colon (mri_control_stack
->next
);
5689 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5690 ++input_line_pointer
;
5693 demand_empty_rest_of_line ();
5696 /* Handle the MRI ENDI pseudo-op. */
5702 if (mri_control_stack
== NULL
5703 || mri_control_stack
->type
!= mri_if
)
5705 as_bad ("endi without matching if");
5706 ignore_rest_of_line ();
5710 /* ignore_input will not return true for ENDI, so we don't need to
5711 worry about checking it again here. */
5713 if (! mri_control_stack
->else_seen
)
5714 colon (mri_control_stack
->next
);
5715 colon (mri_control_stack
->bottom
);
5721 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5722 ++input_line_pointer
;
5725 demand_empty_rest_of_line ();
5728 /* Handle the MRI BREAK pseudo-op. */
5731 s_mri_break (extent
)
5734 struct mri_control_info
*n
;
5738 n
= mri_control_stack
;
5740 && n
->type
!= mri_for
5741 && n
->type
!= mri_repeat
5742 && n
->type
!= mri_while
)
5746 as_bad ("break outside of structured loop");
5747 ignore_rest_of_line ();
5751 buf
= (char *) xmalloc (20 + strlen (n
->bottom
));
5754 sprintf (buf
, "bra%s %s", ex
, n
->bottom
);
5760 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5761 ++input_line_pointer
;
5764 demand_empty_rest_of_line ();
5767 /* Handle the MRI NEXT pseudo-op. */
5773 struct mri_control_info
*n
;
5777 n
= mri_control_stack
;
5779 && n
->type
!= mri_for
5780 && n
->type
!= mri_repeat
5781 && n
->type
!= mri_while
)
5785 as_bad ("next outside of structured loop");
5786 ignore_rest_of_line ();
5790 buf
= (char *) xmalloc (20 + strlen (n
->next
));
5793 sprintf (buf
, "bra%s %s", ex
, n
->next
);
5799 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5800 ++input_line_pointer
;
5803 demand_empty_rest_of_line ();
5806 /* Handle the MRI FOR pseudo-op. */
5812 const char *varstart
, *varstop
;
5813 const char *initstart
, *initstop
;
5814 const char *endstart
, *endstop
;
5815 const char *bystart
, *bystop
;
5819 struct mri_control_info
*n
;
5825 FOR.q var = init { TO | DOWNTO } end [ BY by ] DO.e
5829 varstart
= input_line_pointer
;
5831 /* Look for the '='. */
5832 while (! is_end_of_line
[(unsigned char) *input_line_pointer
]
5833 && *input_line_pointer
!= '=')
5834 ++input_line_pointer
;
5835 if (*input_line_pointer
!= '=')
5837 as_bad ("missing =");
5838 ignore_rest_of_line ();
5842 varstop
= input_line_pointer
;
5843 if (varstop
> varstart
5844 && (varstop
[-1] == ' ' || varstop
[-1] == '\t'))
5847 ++input_line_pointer
;
5849 initstart
= input_line_pointer
;
5851 /* Look for TO or DOWNTO. */
5854 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5856 if (strncasecmp (input_line_pointer
, "TO", 2) == 0
5857 && ! is_part_of_name (input_line_pointer
[2]))
5859 initstop
= input_line_pointer
;
5860 input_line_pointer
+= 2;
5863 if (strncasecmp (input_line_pointer
, "DOWNTO", 6) == 0
5864 && ! is_part_of_name (input_line_pointer
[6]))
5866 initstop
= input_line_pointer
;
5868 input_line_pointer
+= 6;
5871 ++input_line_pointer
;
5873 if (initstop
== NULL
)
5875 as_bad ("missing to or downto");
5876 ignore_rest_of_line ();
5879 if (initstop
> initstart
5880 && (initstop
[-1] == ' ' || initstop
[-1] == '\t'))
5884 endstart
= input_line_pointer
;
5886 /* Look for BY or DO. */
5889 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5891 if (strncasecmp (input_line_pointer
, "BY", 2) == 0
5892 && ! is_part_of_name (input_line_pointer
[2]))
5894 endstop
= input_line_pointer
;
5896 input_line_pointer
+= 2;
5899 if (strncasecmp (input_line_pointer
, "DO", 2) == 0
5900 && (input_line_pointer
[2] == '.'
5901 || ! is_part_of_name (input_line_pointer
[2])))
5903 endstop
= input_line_pointer
;
5904 input_line_pointer
+= 2;
5907 ++input_line_pointer
;
5909 if (endstop
== NULL
)
5911 as_bad ("missing do");
5912 ignore_rest_of_line ();
5915 if (endstop
> endstart
5916 && (endstop
[-1] == ' ' || endstop
[-1] == '\t'))
5922 bystop
= bystart
+ 2;
5927 bystart
= input_line_pointer
;
5931 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5933 if (strncasecmp (input_line_pointer
, "DO", 2) == 0
5934 && (input_line_pointer
[2] == '.'
5935 || ! is_part_of_name (input_line_pointer
[2])))
5937 bystop
= input_line_pointer
;
5938 input_line_pointer
+= 2;
5941 ++input_line_pointer
;
5945 as_bad ("missing do");
5946 ignore_rest_of_line ();
5949 if (bystop
> bystart
5950 && (bystop
[-1] == ' ' || bystop
[-1] == '\t'))
5954 if (*input_line_pointer
!= '.')
5958 extent
= input_line_pointer
[1];
5959 input_line_pointer
+= 2;
5962 /* We have fully parsed the FOR operands. Now build the loop. */
5964 n
= push_mri_control (mri_for
);
5966 buf
= (char *) xmalloc (50 + (input_line_pointer
- varstart
));
5977 memcpy (s
, initstart
, initstop
- initstart
);
5978 s
+= initstop
- initstart
;
5980 memcpy (s
, varstart
, varstop
- varstart
);
5981 s
+= varstop
- varstart
;
5995 memcpy (s
, endstart
, endstop
- endstart
);
5996 s
+= endstop
- endstart
;
5998 memcpy (s
, varstart
, varstop
- varstart
);
5999 s
+= varstop
- varstart
;
6007 sprintf (buf
, "blt%s %s", ex
, n
->bottom
);
6009 sprintf (buf
, "bgt%s %s", ex
, n
->bottom
);
6012 /* Put together the add or sub instruction used by ENDF. */
6022 memcpy (s
, bystart
, bystop
- bystart
);
6023 s
+= bystop
- bystart
;
6025 memcpy (s
, varstart
, varstop
- varstart
);
6026 s
+= varstop
- varstart
;
6032 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6033 ++input_line_pointer
;
6036 demand_empty_rest_of_line ();
6039 /* Handle the MRI ENDF pseudo-op. */
6045 if (mri_control_stack
== NULL
6046 || mri_control_stack
->type
!= mri_for
)
6048 as_bad ("endf without for");
6049 ignore_rest_of_line ();
6053 colon (mri_control_stack
->next
);
6055 md_assemble (mri_control_stack
->incr
);
6057 sprintf (mri_control_stack
->incr
, "bra %s", mri_control_stack
->top
);
6058 md_assemble (mri_control_stack
->incr
);
6060 free (mri_control_stack
->incr
);
6062 colon (mri_control_stack
->bottom
);
6068 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6069 ++input_line_pointer
;
6072 demand_empty_rest_of_line ();
6075 /* Handle the MRI REPEAT pseudo-op. */
6078 s_mri_repeat (ignore
)
6081 struct mri_control_info
*n
;
6083 n
= push_mri_control (mri_repeat
);
6087 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6088 ++input_line_pointer
;
6090 demand_empty_rest_of_line ();
6093 /* Handle the MRI UNTIL pseudo-op. */
6101 if (mri_control_stack
== NULL
6102 || mri_control_stack
->type
!= mri_repeat
)
6104 as_bad ("until without repeat");
6105 ignore_rest_of_line ();
6109 colon (mri_control_stack
->next
);
6111 for (s
= input_line_pointer
; ! is_end_of_line
[(unsigned char) *s
]; s
++)
6114 parse_mri_control_expression (s
, qual
, (const char *) NULL
,
6115 mri_control_stack
->top
, '\0');
6117 colon (mri_control_stack
->bottom
);
6119 input_line_pointer
= s
;
6125 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6126 ++input_line_pointer
;
6129 demand_empty_rest_of_line ();
6132 /* Handle the MRI WHILE pseudo-op. */
6140 struct mri_control_info
*n
;
6142 s
= input_line_pointer
;
6143 while (! is_end_of_line
[(unsigned char) *s
]
6144 && (! flag_mri
|| *s
!= '*'))
6147 while (*s
== ' ' || *s
== '\t')
6149 if (s
- input_line_pointer
> 1
6152 if (s
- input_line_pointer
< 2
6153 || strncasecmp (s
- 1, "DO", 2) != 0)
6155 as_bad ("missing do");
6156 ignore_rest_of_line ();
6160 n
= push_mri_control (mri_while
);
6164 parse_mri_control_expression (s
- 1, qual
, (const char *) NULL
, n
->bottom
,
6165 s
[1] == '.' ? s
[2] : '\0');
6167 input_line_pointer
= s
+ 1;
6168 if (*input_line_pointer
== '.')
6169 input_line_pointer
+= 2;
6173 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6174 ++input_line_pointer
;
6177 demand_empty_rest_of_line ();
6180 /* Handle the MRI ENDW pseudo-op. */
6188 if (mri_control_stack
== NULL
6189 || mri_control_stack
->type
!= mri_while
)
6191 as_bad ("endw without while");
6192 ignore_rest_of_line ();
6196 buf
= (char *) xmalloc (20 + strlen (mri_control_stack
->next
));
6197 sprintf (buf
, "bra %s", mri_control_stack
->next
);
6201 colon (mri_control_stack
->bottom
);
6207 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6208 ++input_line_pointer
;
6211 demand_empty_rest_of_line ();
6216 * Invocation line includes a switch not recognized by the base assembler.
6217 * See if it's a processor-specific option. These are:
6219 * -[A]m[c]68000, -[A]m[c]68008, -[A]m[c]68010, -[A]m[c]68020, -[A]m[c]68030, -[A]m[c]68040
6220 * -[A]m[c]68881, -[A]m[c]68882, -[A]m[c]68851
6221 * Select the architecture. Instructions or features not
6222 * supported by the selected architecture cause fatal
6223 * errors. More than one may be specified. The default is
6224 * -m68020 -m68851 -m68881. Note that -m68008 is a synonym
6225 * for -m68000, and -m68882 is a synonym for -m68881.
6226 * -[A]m[c]no-68851, -[A]m[c]no-68881
6227 * Don't accept 688?1 instructions. (The "c" is kind of silly,
6228 * so don't use or document it, but that's the way the parsing
6231 * -pic Indicates PIC.
6232 * -k Indicates PIC. (Sun 3 only.)
6235 * Permit `|' to be used in expressions.
6240 CONST
char *md_shortopts
= "lSA:m:kQ:V";
6242 CONST
char *md_shortopts
= "lSA:m:k";
6245 struct option md_longopts
[] = {
6246 #define OPTION_PIC (OPTION_MD_BASE)
6247 {"pic", no_argument
, NULL
, OPTION_PIC
},
6248 #define OPTION_REGISTER_PREFIX_OPTIONAL (OPTION_MD_BASE + 1)
6249 {"register-prefix-optional", no_argument
, NULL
,
6250 OPTION_REGISTER_PREFIX_OPTIONAL
},
6251 #define OPTION_BITWISE_OR (OPTION_MD_BASE + 2)
6252 {"bitwise-or", no_argument
, NULL
, OPTION_BITWISE_OR
},
6253 {NULL
, no_argument
, NULL
, 0}
6255 size_t md_longopts_size
= sizeof(md_longopts
);
6258 md_parse_option (c
, arg
)
6264 case 'l': /* -l means keep external to 2 bit offset
6265 rather than 16 bit one */
6266 flag_short_refs
= 1;
6269 case 'S': /* -S means that jbsr's always turn into
6271 flag_long_jumps
= 1;
6277 /* intentional fall-through */
6280 if (arg
[0] == 'n' && arg
[1] == 'o' && arg
[2] == '-')
6284 const char *oarg
= arg
;
6290 if (arg
[0] == 'c' && arg
[1] == '6')
6293 for (i
= 0; i
< n_archs
; i
++)
6294 if (!strcmp (arg
, archs
[i
].name
))
6299 as_bad ("unrecognized option `%s'", oarg
);
6302 arch
= archs
[i
].arch
;
6305 else if (arch
== m68851
)
6314 if (arg
[0] == 'c' && arg
[1] == '6')
6317 for (i
= 0; i
< n_archs
; i
++)
6318 if (!strcmp (arg
, archs
[i
].name
))
6320 unsigned long arch
= archs
[i
].arch
;
6321 if (cpu_of_arch (arch
))
6322 /* It's a cpu spec. */
6324 current_architecture
&= ~m68000up
;
6325 current_architecture
|= arch
;
6327 else if (arch
== m68881
)
6329 current_architecture
|= m68881
;
6332 else if (arch
== m68851
)
6334 current_architecture
|= m68851
;
6344 as_bad ("unrecognized architecture specification `%s'", arg
);
6353 break; /* -pic, Position Independent Code */
6355 case OPTION_REGISTER_PREFIX_OPTIONAL
:
6356 flag_reg_prefix_optional
= 1;
6357 reg_prefix_optional_seen
= 1;
6360 /* -V: SVR4 argument to print version ID. */
6362 print_version_id ();
6365 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
6366 should be emitted or not. FIXME: Not implemented. */
6370 case OPTION_BITWISE_OR
:
6375 n
= (char *) xmalloc (strlen (m68k_comment_chars
) + 1);
6377 for (s
= m68k_comment_chars
; *s
!= '\0'; s
++)
6381 m68k_comment_chars
= n
;
6393 md_show_usage (stream
)
6398 -l use 1 word for refs to undefined symbols [default 2]\n\
6399 -m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060\n\
6400 | -m68302 | -m68331 | -m68332 | -m68333 | -m68340 | -m68360\n\
6401 | -mcpu32 | -m5200\n\
6402 specify variant of 680X0 architecture [default 68020]\n\
6403 -m68881 | -m68882 | -mno-68881 | -mno-68882\n\
6404 target has/lacks floating-point coprocessor\n\
6405 [default yes for 68020, 68030, and cpu32]\n");
6407 -m68851 | -mno-68851\n\
6408 target has/lacks memory-management unit coprocessor\n\
6409 [default yes for 68020 and up]\n\
6410 -pic, -k generate position independent code\n\
6411 -S turn jbsr into jsr\n\
6412 --register-prefix-optional\n\
6413 recognize register names without prefix character\n\
6414 --bitwise-or do not treat `|' as a comment character\n");
6419 /* TEST2: Test md_assemble() */
6420 /* Warning, this routine probably doesn't work anymore */
6424 struct m68k_it the_ins
;
6432 if (!gets (buf
) || !*buf
)
6434 if (buf
[0] == '|' || buf
[1] == '.')
6436 for (cp
= buf
; *cp
; cp
++)
6441 memset (&the_ins
, '\0', sizeof (the_ins
));
6442 m68k_ip (&the_ins
, buf
);
6445 printf ("Error %s in %s\n", the_ins
.error
, buf
);
6449 printf ("Opcode(%d.%s): ", the_ins
.numo
, the_ins
.args
);
6450 for (n
= 0; n
< the_ins
.numo
; n
++)
6451 printf (" 0x%x", the_ins
.opcode
[n
] & 0xffff);
6453 print_the_insn (&the_ins
.opcode
[0], stdout
);
6454 (void) putchar ('\n');
6456 for (n
= 0; n
< strlen (the_ins
.args
) / 2; n
++)
6458 if (the_ins
.operands
[n
].error
)
6460 printf ("op%d Error %s in %s\n", n
, the_ins
.operands
[n
].error
, buf
);
6463 printf ("mode %d, reg %d, ", the_ins
.operands
[n
].mode
, the_ins
.operands
[n
].reg
);
6464 if (the_ins
.operands
[n
].b_const
)
6465 printf ("Constant: '%.*s', ", 1 + the_ins
.operands
[n
].e_const
- the_ins
.operands
[n
].b_const
, the_ins
.operands
[n
].b_const
);
6466 printf ("ireg %d, isiz %d, imul %d, ", the_ins
.operands
[n
].ireg
, the_ins
.operands
[n
].isiz
, the_ins
.operands
[n
].imul
);
6467 if (the_ins
.operands
[n
].b_iadd
)
6468 printf ("Iadd: '%.*s',", 1 + the_ins
.operands
[n
].e_iadd
- the_ins
.operands
[n
].b_iadd
, the_ins
.operands
[n
].b_iadd
);
6469 (void) putchar ('\n');
6481 while (*str
&& *str
!= ' ')
6483 if (str
[-1] == ':' || str
[1] == '=')
6490 /* Possible states for relaxation:
6492 0 0 branch offset byte (bra, etc)
6496 1 0 indexed offsets byte a0@(32,d4:w:1) etc
6500 2 0 two-offset index word-word a0@(32,d4)@(45) etc
6507 /* We have no need to default values of symbols. */
6511 md_undefined_symbol (name
)
6517 /* Round up a section size to the appropriate boundary. */
6519 md_section_align (segment
, size
)
6523 return size
; /* Byte alignment is fine */
6526 /* Exactly what point is a PC-relative offset relative TO?
6527 On the 68k, it is relative to the address of the first extension
6528 word. The difference between the addresses of the offset and the
6529 first extension word is stored in fx_pcrel_adjust. */
6531 md_pcrel_from (fixP
)
6536 /* Because fx_pcrel_adjust is a char, and may be unsigned, we store
6538 adjust
= fixP
->fx_pcrel_adjust
;
6541 return fixP
->fx_where
+ fixP
->fx_frag
->fr_address
- adjust
;
6544 #ifndef BFD_ASSEMBLER
6547 tc_coff_symbol_emit_hook (ignore
)
6553 tc_coff_sizemachdep (frag
)
6556 switch (frag
->fr_subtype
& 0x3)
6571 /* end of tc-m68k.c */