1 /* tc-m68k.c -- Assemble for the m68k family
2 Copyright 1987, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 Free Software Foundation, Inc.
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
28 #include "opcode/m68k.h"
29 #include "m68k-parse.h"
35 /* This string holds the chars that always start a comment. If the
36 pre-processor is disabled, these aren't very useful. The macro
37 tc_comment_chars points to this. We use this, rather than the
38 usual comment_chars, so that the --bitwise-or option will work. */
39 #if defined (TE_SVR4) || defined (TE_DELTA)
40 const char *m68k_comment_chars
= "|#";
42 const char *m68k_comment_chars
= "|";
45 /* This array holds the chars that only start a comment at the beginning of
46 a line. If the line seems to have the form '# 123 filename'
47 .line and .file directives will appear in the pre-processed output */
48 /* Note that input_file.c hand checks for '#' at the beginning of the
49 first line of the input file. This is because the compiler outputs
50 #NO_APP at the beginning of its output. */
51 /* Also note that comments like this one will always work. */
52 const char line_comment_chars
[] = "#*";
54 const char line_separator_chars
[] = ";";
56 /* Chars that can be used to separate mant from exp in floating point nums */
57 CONST
char EXP_CHARS
[] = "eE";
59 /* Chars that mean this number is a floating point constant, as
60 in "0f12.456" or "0d1.2345e12". */
62 CONST
char FLT_CHARS
[] = "rRsSfFdDxXeEpP";
64 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
65 changed in read.c . Ideally it shouldn't have to know about it at all,
66 but nothing is ideal around here. */
68 const int md_reloc_size
= 8; /* Size of relocation record */
70 /* Are we trying to generate PIC code? If so, absolute references
71 ought to be made into linkage table references or pc-relative
72 references. Not implemented. For ELF there are other means
73 to denote pic relocations. */
76 static int flag_short_refs
; /* -l option */
77 static int flag_long_jumps
; /* -S option */
78 static int flag_keep_pcrel
; /* --pcrel option. */
80 #ifdef REGISTER_PREFIX_OPTIONAL
81 int flag_reg_prefix_optional
= REGISTER_PREFIX_OPTIONAL
;
83 int flag_reg_prefix_optional
;
86 /* Whether --register-prefix-optional was used on the command line. */
87 static int reg_prefix_optional_seen
;
89 /* The floating point coprocessor to use by default. */
90 static enum m68k_register m68k_float_copnum
= COP1
;
92 /* If this is non-zero, then references to number(%pc) will be taken
93 to refer to number, rather than to %pc + number. */
94 static int m68k_abspcadd
;
96 /* If this is non-zero, then the quick forms of the move, add, and sub
97 instructions are used when possible. */
98 static int m68k_quick
= 1;
100 /* If this is non-zero, then if the size is not specified for a base
101 or outer displacement, the assembler assumes that the size should
103 static int m68k_rel32
= 1;
105 /* This is non-zero if m68k_rel32 was set from the command line. */
106 static int m68k_rel32_from_cmdline
;
108 /* The default width to use for an index register when using a base
110 static enum m68k_size m68k_index_width_default
= SIZE_LONG
;
112 /* We want to warn if any text labels are misaligned. In order to get
113 the right line number, we need to record the line number for each
118 struct label_line
*next
;
125 /* The list of labels. */
127 static struct label_line
*labels
;
129 /* The current label. */
131 static struct label_line
*current_label
;
133 /* Its an arbitrary name: This means I don't approve of it */
134 /* See flames below */
135 static struct obstack robyn
;
139 const char *m_operands
;
140 unsigned long m_opcode
;
144 struct m68k_incant
*m_next
;
147 #define getone(x) ((((x)->m_opcode)>>16)&0xffff)
148 #define gettwo(x) (((x)->m_opcode)&0xffff)
150 static const enum m68k_register m68000_control_regs
[] = { 0 };
151 static const enum m68k_register m68010_control_regs
[] = {
155 static const enum m68k_register m68020_control_regs
[] = {
156 SFC
, DFC
, USP
, VBR
, CACR
, CAAR
, MSP
, ISP
,
159 static const enum m68k_register m68040_control_regs
[] = {
160 SFC
, DFC
, CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
,
161 USP
, VBR
, MSP
, ISP
, MMUSR
, URP
, SRP
,
164 static const enum m68k_register m68060_control_regs
[] = {
165 SFC
, DFC
, CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
, BUSCR
,
166 USP
, VBR
, URP
, SRP
, PCR
,
169 static const enum m68k_register mcf_control_regs
[] = {
170 CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
, VBR
, ROMBAR
,
171 RAMBAR0
, RAMBAR1
, MBAR
,
174 #define cpu32_control_regs m68010_control_regs
176 static const enum m68k_register
*control_regs
;
178 /* internal form of a 68020 instruction */
182 const char *args
; /* list of opcode info */
185 int numo
; /* Number of shorts in opcode */
188 struct m68k_op operands
[6];
190 int nexp
; /* number of exprs in use */
191 struct m68k_exp exprs
[4];
193 int nfrag
; /* Number of frags we have to produce */
196 int fragoff
; /* Where in the current opcode the frag ends */
203 int nrel
; /* Num of reloc strucs in use */
210 /* In a pc relative address the difference between the address
211 of the offset and the address that the offset is relative
212 to. This depends on the addressing mode. Basically this
213 is the value to put in the offset field to address the
214 first byte of the offset, without regarding the special
215 significance of some values (in the branch instruction, for
219 /* Whether this expression needs special pic relocation, and if
221 enum pic_relocation pic_reloc
;
224 reloc
[5]; /* Five is enough??? */
227 #define cpu_of_arch(x) ((x) & (m68000up|mcf))
228 #define float_of_arch(x) ((x) & mfloat)
229 #define mmu_of_arch(x) ((x) & mmmu)
230 #define arch_coldfire_p(x) (((x) & mcf) != 0)
232 /* Macros for determining if cpu supports a specific addressing mode */
233 #define HAVE_LONG_BRANCH(x) ((x) & (m68020|m68030|m68040|m68060|cpu32|mcf5407))
235 static struct m68k_it the_ins
; /* the instruction being assembled */
237 #define op(ex) ((ex)->exp.X_op)
238 #define adds(ex) ((ex)->exp.X_add_symbol)
239 #define subs(ex) ((ex)->exp.X_op_symbol)
240 #define offs(ex) ((ex)->exp.X_add_number)
242 /* Macros for adding things to the m68k_it struct */
244 #define addword(w) the_ins.opcode[the_ins.numo++]=(w)
246 /* Static functions. */
248 static void insop
PARAMS ((int, const struct m68k_incant
*));
249 static void add_fix
PARAMS ((int, struct m68k_exp
*, int, int));
250 static void add_frag
PARAMS ((symbolS
*, offsetT
, int));
252 /* Like addword, but goes BEFORE general operands */
256 const struct m68k_incant
*opcode
;
259 for(z
=the_ins
.numo
;z
>opcode
->m_codenum
;--z
)
260 the_ins
.opcode
[z
]=the_ins
.opcode
[z
-1];
261 for(z
=0;z
<the_ins
.nrel
;z
++)
262 the_ins
.reloc
[z
].n
+=2;
263 for (z
= 0; z
< the_ins
.nfrag
; z
++)
264 the_ins
.fragb
[z
].fragoff
++;
265 the_ins
.opcode
[opcode
->m_codenum
]=w
;
269 /* The numo+1 kludge is so we can hit the low order byte of the prev word.
272 add_fix (width
, exp
, pc_rel
, pc_fix
)
274 struct m68k_exp
*exp
;
278 the_ins
.reloc
[the_ins
.nrel
].n
= ((width
== 'B' || width
== '3')
282 : (the_ins
.numo
*2)));
283 the_ins
.reloc
[the_ins
.nrel
].exp
= exp
->exp
;
284 the_ins
.reloc
[the_ins
.nrel
].wid
= width
;
285 the_ins
.reloc
[the_ins
.nrel
].pcrel_fix
= pc_fix
;
287 the_ins
.reloc
[the_ins
.nrel
].pic_reloc
= exp
->pic_reloc
;
289 the_ins
.reloc
[the_ins
.nrel
++].pcrel
= pc_rel
;
292 /* Cause an extra frag to be generated here, inserting up to 10 bytes
293 (that value is chosen in the frag_var call in md_assemble). TYPE
294 is the subtype of the frag to be generated; its primary type is
295 rs_machine_dependent.
297 The TYPE parameter is also used by md_convert_frag_1 and
298 md_estimate_size_before_relax. The appropriate type of fixup will
299 be emitted by md_convert_frag_1.
301 ADD becomes the FR_SYMBOL field of the frag, and OFF the FR_OFFSET. */
303 add_frag (add
, off
, type
)
308 the_ins
.fragb
[the_ins
.nfrag
].fragoff
=the_ins
.numo
;
309 the_ins
.fragb
[the_ins
.nfrag
].fadd
=add
;
310 the_ins
.fragb
[the_ins
.nfrag
].foff
=off
;
311 the_ins
.fragb
[the_ins
.nfrag
++].fragty
=type
;
315 (op (ex) != O_constant && op (ex) != O_big)
317 static char *crack_operand
PARAMS ((char *str
, struct m68k_op
*opP
));
318 static int get_num
PARAMS ((struct m68k_exp
*exp
, int ok
));
319 static void m68k_ip
PARAMS ((char *));
320 static void insert_reg
PARAMS ((const char *, int));
321 static void select_control_regs
PARAMS ((void));
322 static void init_regtable
PARAMS ((void));
323 static int reverse_16_bits
PARAMS ((int in
));
324 static int reverse_8_bits
PARAMS ((int in
));
325 static void install_gen_operand
PARAMS ((int mode
, int val
));
326 static void install_operand
PARAMS ((int mode
, int val
));
327 static void s_bss
PARAMS ((int));
328 static void s_data1
PARAMS ((int));
329 static void s_data2
PARAMS ((int));
330 static void s_even
PARAMS ((int));
331 static void s_proc
PARAMS ((int));
332 static void mri_chip
PARAMS ((void));
333 static void s_chip
PARAMS ((int));
334 static void s_fopt
PARAMS ((int));
335 static void s_opt
PARAMS ((int));
336 static void s_reg
PARAMS ((int));
337 static void s_restore
PARAMS ((int));
338 static void s_save
PARAMS ((int));
339 static void s_mri_if
PARAMS ((int));
340 static void s_mri_else
PARAMS ((int));
341 static void s_mri_endi
PARAMS ((int));
342 static void s_mri_break
PARAMS ((int));
343 static void s_mri_next
PARAMS ((int));
344 static void s_mri_for
PARAMS ((int));
345 static void s_mri_endf
PARAMS ((int));
346 static void s_mri_repeat
PARAMS ((int));
347 static void s_mri_until
PARAMS ((int));
348 static void s_mri_while
PARAMS ((int));
349 static void s_mri_endw
PARAMS ((int));
350 static void md_apply_fix_2
PARAMS ((fixS
*, offsetT
));
351 static void md_convert_frag_1
PARAMS ((fragS
*));
353 static int current_architecture
;
362 static const struct m68k_cpu archs
[] =
364 { m68000
, "68000", 0 },
365 { m68010
, "68010", 0 },
366 { m68020
, "68020", 0 },
367 { m68030
, "68030", 0 },
368 { m68040
, "68040", 0 },
369 { m68060
, "68060", 0 },
370 { cpu32
, "cpu32", 0 },
371 { m68881
, "68881", 0 },
372 { m68851
, "68851", 0 },
373 { mcf5200
, "5200", 0 },
374 { mcf5206e
, "5206e", 0 },
375 { mcf5307
, "5307", 0},
376 { mcf5407
, "5407", 0},
377 /* Aliases (effectively, so far as gas is concerned) for the above
379 { m68020
, "68k", 1 },
380 { m68000
, "68008", 1 },
381 { m68000
, "68302", 1 },
382 { m68000
, "68306", 1 },
383 { m68000
, "68307", 1 },
384 { m68000
, "68322", 1 },
385 { m68000
, "68356", 1 },
386 { m68000
, "68ec000", 1 },
387 { m68000
, "68hc000", 1 },
388 { m68000
, "68hc001", 1 },
389 { m68020
, "68ec020", 1 },
390 { m68030
, "68ec030", 1 },
391 { m68040
, "68ec040", 1 },
392 { m68060
, "68ec060", 1 },
393 { cpu32
, "68330", 1 },
394 { cpu32
, "68331", 1 },
395 { cpu32
, "68332", 1 },
396 { cpu32
, "68333", 1 },
397 { cpu32
, "68334", 1 },
398 { cpu32
, "68336", 1 },
399 { cpu32
, "68340", 1 },
400 { cpu32
, "68341", 1 },
401 { cpu32
, "68349", 1 },
402 { cpu32
, "68360", 1 },
403 { m68881
, "68882", 1 },
404 { mcf5200
, "5202", 1 },
405 { mcf5200
, "5204", 1 },
406 { mcf5200
, "5206", 1 },
409 static const int n_archs
= sizeof (archs
) / sizeof (archs
[0]);
411 /* This is the assembler relaxation table for m68k. m68k is a rich CISC
412 architecture and we have a lot of relaxation modes. */
414 /* Macros used in the relaxation code. */
415 #define TAB(x,y) (((x) << 2) + (y))
416 #define TABTYPE(x) ((x) >> 2)
418 /* Relaxation states. */
424 /* Here are all the relaxation modes we support. First we can relax ordinary
425 branches. On 68020 and higher and on CPU32 all branch instructions take
426 three forms, so on these CPUs all branches always remain as such. When we
427 have to expand to the LONG form on a 68000, though, we substitute an
428 absolute jump instead. This is a direct replacement for unconditional
429 branches and a branch over a jump for conditional branches. However, if the
430 user requires PIC and disables this with --pcrel, we can only relax between
431 BYTE and SHORT forms, punting if that isn't enough. This gives us four
432 different relaxation modes for branches: */
434 #define BRANCHBWL 1 /* branch byte, word, or long */
435 #define BRABSJUNC 2 /* absolute jump for LONG, unconditional */
436 #define BRABSJCOND 3 /* absolute jump for LONG, conditional */
437 #define BRANCHBW 4 /* branch byte or word */
439 /* We also relax coprocessor branches and DBcc's. All CPUs that support
440 coprocessor branches support them in word and long forms, so we have only
441 one relaxation mode for them. DBcc's are word only on all CPUs. We can
442 relax them to the LONG form with a branch-around sequence. This sequence
443 can use a long branch (if available) or an absolute jump (if acceptable).
444 This gives us two relaxation modes. If long branches are not available and
445 absolute jumps are not acceptable, we don't relax DBcc's. */
447 #define FBRANCH 5 /* coprocessor branch */
448 #define DBCCLBR 6 /* DBcc relaxable with a long branch */
449 #define DBCCABSJ 7 /* DBcc relaxable with an absolute jump */
451 /* That's all for instruction relaxation. However, we also relax PC-relative
452 operands. Specifically, we have three operand relaxation modes. On the
453 68000 PC-relative operands can only be 16-bit, but on 68020 and higher and
454 on CPU32 they may be 16-bit or 32-bit. For the latter we relax between the
455 two. Also PC+displacement+index operands in their simple form (with a non-
456 suppressed index without memory indirection) are supported on all CPUs, but
457 on the 68000 the displacement can be 8-bit only, whereas on 68020 and higher
458 and on CPU32 we relax it to SHORT and LONG forms as well using the extended
459 form of the PC+displacement+index operand. Finally, some absolute operands
460 can be relaxed down to 16-bit PC-relative. */
462 #define PCREL1632 8 /* 16-bit or 32-bit PC-relative */
463 #define PCINDEX 9 /* PC+displacement+index */
464 #define ABSTOPCREL 10 /* absolute relax down to 16-bit PC-relative */
466 /* Note that calls to frag_var need to specify the maximum expansion
467 needed; this is currently 10 bytes for DBCC. */
470 How far Forward this mode will reach:
471 How far Backward this mode will reach:
472 How many bytes this mode will add to the size of the frag
473 Which mode to go to if the offset won't fit in this one
475 relax_typeS md_relax_table
[] =
477 {1, 1, 0, 0}, /* First entries aren't used */
478 {1, 1, 0, 0}, /* For no good reason except */
479 {1, 1, 0, 0}, /* that the VAX doesn't either */
482 {(127), (-128), 0, TAB (BRANCHBWL
, SHORT
)},
483 {(32767), (-32768), 2, TAB (BRANCHBWL
, LONG
)},
487 {(127), (-128), 0, TAB (BRABSJUNC
, SHORT
)},
488 {(32767), (-32768), 2, TAB (BRABSJUNC
, LONG
)},
492 {(127), (-128), 0, TAB (BRABSJCOND
, SHORT
)},
493 {(32767), (-32768), 2, TAB (BRABSJCOND
, LONG
)},
497 {(127), (-128), 0, TAB (BRANCHBW
, SHORT
)},
502 {1, 1, 0, 0}, /* FBRANCH doesn't come BYTE */
503 {(32767), (-32768), 2, TAB (FBRANCH
, LONG
)},
507 {1, 1, 0, 0}, /* DBCC doesn't come BYTE */
508 {(32767), (-32768), 2, TAB (DBCCLBR
, LONG
)},
512 {1, 1, 0, 0}, /* DBCC doesn't come BYTE */
513 {(32767), (-32768), 2, TAB (DBCCABSJ
, LONG
)},
517 {1, 1, 0, 0}, /* PCREL1632 doesn't come BYTE */
518 {32767, -32768, 2, TAB (PCREL1632
, LONG
)},
522 {125, -130, 0, TAB (PCINDEX
, SHORT
)},
523 {32765, -32770, 2, TAB (PCINDEX
, LONG
)},
527 {1, 1, 0, 0}, /* ABSTOPCREL doesn't come BYTE */
528 {(32767), (-32768), 2, TAB (ABSTOPCREL
, LONG
)},
533 /* These are the machine dependent pseudo-ops. These are included so
534 the assembler can work on the output from the SUN C compiler, which
538 /* This table describes all the machine specific pseudo-ops the assembler
539 has to support. The fields are:
540 pseudo-op name without dot
541 function to call to execute this pseudo-op
542 Integer arg to pass to the function
544 const pseudo_typeS md_pseudo_table
[] =
546 {"data1", s_data1
, 0},
547 {"data2", s_data2
, 0},
550 {"skip", s_space
, 0},
552 #if defined (TE_SUN3) || defined (OBJ_ELF)
553 {"align", s_align_bytes
, 0},
556 {"swbeg", s_ignore
, 0},
558 {"extend", float_cons
, 'x'},
559 {"ldouble", float_cons
, 'x'},
561 /* The following pseudo-ops are supported for MRI compatibility. */
563 {"comline", s_space
, 1},
565 {"mask2", s_ignore
, 0},
568 {"restore", s_restore
, 0},
572 {"if.b", s_mri_if
, 'b'},
573 {"if.w", s_mri_if
, 'w'},
574 {"if.l", s_mri_if
, 'l'},
575 {"else", s_mri_else
, 0},
576 {"else.s", s_mri_else
, 's'},
577 {"else.l", s_mri_else
, 'l'},
578 {"endi", s_mri_endi
, 0},
579 {"break", s_mri_break
, 0},
580 {"break.s", s_mri_break
, 's'},
581 {"break.l", s_mri_break
, 'l'},
582 {"next", s_mri_next
, 0},
583 {"next.s", s_mri_next
, 's'},
584 {"next.l", s_mri_next
, 'l'},
585 {"for", s_mri_for
, 0},
586 {"for.b", s_mri_for
, 'b'},
587 {"for.w", s_mri_for
, 'w'},
588 {"for.l", s_mri_for
, 'l'},
589 {"endf", s_mri_endf
, 0},
590 {"repeat", s_mri_repeat
, 0},
591 {"until", s_mri_until
, 0},
592 {"until.b", s_mri_until
, 'b'},
593 {"until.w", s_mri_until
, 'w'},
594 {"until.l", s_mri_until
, 'l'},
595 {"while", s_mri_while
, 0},
596 {"while.b", s_mri_while
, 'b'},
597 {"while.w", s_mri_while
, 'w'},
598 {"while.l", s_mri_while
, 'l'},
599 {"endw", s_mri_endw
, 0},
604 /* The mote pseudo ops are put into the opcode table, since they
605 don't start with a . they look like opcodes to gas.
609 extern void obj_coff_section
PARAMS ((int));
612 CONST pseudo_typeS mote_pseudo_table
[] =
625 {"xdef", s_globl
, 0},
627 {"align", s_align_bytes
, 0},
629 {"align", s_align_ptwo
, 0},
632 {"sect", obj_coff_section
, 0},
633 {"section", obj_coff_section
, 0},
638 #define issbyte(x) ((x)>=-128 && (x)<=127)
639 #define isubyte(x) ((x)>=0 && (x)<=255)
640 #define issword(x) ((x)>=-32768 && (x)<=32767)
641 #define isuword(x) ((x)>=0 && (x)<=65535)
643 #define isbyte(x) ((x)>= -255 && (x)<=255)
644 #define isword(x) ((x)>=-65536 && (x)<=65535)
645 #define islong(x) (1)
647 extern char *input_line_pointer
;
649 static char mklower_table
[256];
650 #define mklower(c) (mklower_table[(unsigned char) (c)])
651 static char notend_table
[256];
652 static char alt_notend_table
[256];
654 (! (notend_table[(unsigned char) *s] \
656 && alt_notend_table[(unsigned char) s[1]])))
658 #if defined (M68KCOFF) && !defined (BFD_ASSEMBLER)
660 #ifdef NO_PCREL_RELOCS
663 make_pcrel_absolute(fixP
, add_number
)
667 register unsigned char *opcode
= fixP
->fx_frag
->fr_opcode
;
669 /* rewrite the PC relative instructions to absolute address ones.
670 * these are rumoured to be faster, and the apollo linker refuses
671 * to deal with the PC relative relocations.
673 if (opcode
[0] == 0x60 && opcode
[1] == 0xff) /* BRA -> JMP */
678 else if (opcode
[0] == 0x61 && opcode
[1] == 0xff) /* BSR -> JSR */
684 as_fatal (_("Unknown PC relative instruction"));
689 #endif /* NO_PCREL_RELOCS */
692 tc_coff_fix2rtype (fixP
)
695 if (fixP
->fx_tcbit
&& fixP
->fx_size
== 4)
696 return R_RELLONG_NEG
;
697 #ifdef NO_PCREL_RELOCS
698 know (fixP
->fx_pcrel
== 0);
699 return (fixP
->fx_size
== 1 ? R_RELBYTE
700 : fixP
->fx_size
== 2 ? R_DIR16
703 return (fixP
->fx_pcrel
?
704 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
705 fixP
->fx_size
== 2 ? R_PCRWORD
:
707 (fixP
->fx_size
== 1 ? R_RELBYTE
:
708 fixP
->fx_size
== 2 ? R_RELWORD
:
717 /* Return zero if the reference to SYMBOL from within the same segment may
720 /* On an ELF system, we can't relax an externally visible symbol,
721 because it may be overridden by a shared library. However, if
722 TARGET_OS is "elf", then we presume that we are assembling for an
723 embedded system, in which case we don't have to worry about shared
724 libraries, and we can relax any external sym. */
726 #define relaxable_symbol(symbol) \
727 (!((S_IS_EXTERNAL (symbol) && strcmp (TARGET_OS, "elf") != 0) \
728 || S_IS_WEAK (symbol)))
730 /* Compute the relocation code for a fixup of SIZE bytes, using pc
731 relative relocation if PCREL is non-zero. PIC says whether a special
732 pic relocation was requested. */
734 static bfd_reloc_code_real_type get_reloc_code
735 PARAMS ((int, int, enum pic_relocation
));
737 static bfd_reloc_code_real_type
738 get_reloc_code (size
, pcrel
, pic
)
741 enum pic_relocation pic
;
749 return BFD_RELOC_8_GOT_PCREL
;
751 return BFD_RELOC_16_GOT_PCREL
;
753 return BFD_RELOC_32_GOT_PCREL
;
761 return BFD_RELOC_8_GOTOFF
;
763 return BFD_RELOC_16_GOTOFF
;
765 return BFD_RELOC_32_GOTOFF
;
773 return BFD_RELOC_8_PLT_PCREL
;
775 return BFD_RELOC_16_PLT_PCREL
;
777 return BFD_RELOC_32_PLT_PCREL
;
785 return BFD_RELOC_8_PLTOFF
;
787 return BFD_RELOC_16_PLTOFF
;
789 return BFD_RELOC_32_PLTOFF
;
799 return BFD_RELOC_8_PCREL
;
801 return BFD_RELOC_16_PCREL
;
803 return BFD_RELOC_32_PCREL
;
823 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
825 as_bad (_("Can not do %d byte pc-relative pic relocation"), size
);
830 as_bad (_("Can not do %d byte relocation"), size
);
832 as_bad (_("Can not do %d byte pic relocation"), size
);
835 return BFD_RELOC_NONE
;
838 /* Here we decide which fixups can be adjusted to make them relative
839 to the beginning of the section instead of the symbol. Basically
840 we need to make sure that the dynamic relocations are done
841 correctly, so in some cases we force the original symbol to be
844 tc_m68k_fix_adjustable (fixP
)
847 /* Prevent all adjustments to global symbols. */
848 if (! relaxable_symbol (fixP
->fx_addsy
))
851 /* adjust_reloc_syms doesn't know about the GOT */
852 switch (fixP
->fx_r_type
)
854 case BFD_RELOC_8_GOT_PCREL
:
855 case BFD_RELOC_16_GOT_PCREL
:
856 case BFD_RELOC_32_GOT_PCREL
:
857 case BFD_RELOC_8_GOTOFF
:
858 case BFD_RELOC_16_GOTOFF
:
859 case BFD_RELOC_32_GOTOFF
:
860 case BFD_RELOC_8_PLT_PCREL
:
861 case BFD_RELOC_16_PLT_PCREL
:
862 case BFD_RELOC_32_PLT_PCREL
:
863 case BFD_RELOC_8_PLTOFF
:
864 case BFD_RELOC_16_PLTOFF
:
865 case BFD_RELOC_32_PLTOFF
:
868 case BFD_RELOC_VTABLE_INHERIT
:
869 case BFD_RELOC_VTABLE_ENTRY
:
879 #define get_reloc_code(SIZE,PCREL,OTHER) NO_RELOC
881 #define relaxable_symbol(symbol) 1
888 tc_gen_reloc (section
, fixp
)
893 bfd_reloc_code_real_type code
;
895 /* If the tcbit is set, then this was a fixup of a negative value
896 that was never resolved. We do not have a reloc to handle this,
897 so just return. We assume that other code will have detected this
898 situation and produced a helpful error message, so we just tell the
899 user that the reloc cannot be produced. */
903 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
904 _("Unable to produce reloc against symbol '%s'"),
905 S_GET_NAME (fixp
->fx_addsy
));
909 if (fixp
->fx_r_type
!= BFD_RELOC_NONE
)
911 code
= fixp
->fx_r_type
;
913 /* Since DIFF_EXPR_OK is defined in tc-m68k.h, it is possible
914 that fixup_segment converted a non-PC relative reloc into a
915 PC relative reloc. In such a case, we need to convert the
922 code
= BFD_RELOC_8_PCREL
;
925 code
= BFD_RELOC_16_PCREL
;
928 code
= BFD_RELOC_32_PCREL
;
930 case BFD_RELOC_8_PCREL
:
931 case BFD_RELOC_16_PCREL
:
932 case BFD_RELOC_32_PCREL
:
933 case BFD_RELOC_8_GOT_PCREL
:
934 case BFD_RELOC_16_GOT_PCREL
:
935 case BFD_RELOC_32_GOT_PCREL
:
936 case BFD_RELOC_8_GOTOFF
:
937 case BFD_RELOC_16_GOTOFF
:
938 case BFD_RELOC_32_GOTOFF
:
939 case BFD_RELOC_8_PLT_PCREL
:
940 case BFD_RELOC_16_PLT_PCREL
:
941 case BFD_RELOC_32_PLT_PCREL
:
942 case BFD_RELOC_8_PLTOFF
:
943 case BFD_RELOC_16_PLTOFF
:
944 case BFD_RELOC_32_PLTOFF
:
947 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
948 _("Cannot make %s relocation PC relative"),
949 bfd_get_reloc_code_name (code
));
955 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
956 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
958 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
959 MAP (1, 0, BFD_RELOC_8
);
960 MAP (2, 0, BFD_RELOC_16
);
961 MAP (4, 0, BFD_RELOC_32
);
962 MAP (1, 1, BFD_RELOC_8_PCREL
);
963 MAP (2, 1, BFD_RELOC_16_PCREL
);
964 MAP (4, 1, BFD_RELOC_32_PCREL
);
972 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
973 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
974 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
975 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
978 reloc
->addend
= fixp
->fx_addnumber
;
983 reloc
->addend
= fixp
->fx_addnumber
;
985 reloc
->addend
= (section
->vma
986 /* Explicit sign extension in case char is
988 + ((fixp
->fx_pcrel_adjust
& 0xff) ^ 0x80) - 0x80
990 + md_pcrel_from (fixp
));
993 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
994 assert (reloc
->howto
!= 0);
999 #endif /* BFD_ASSEMBLER */
1001 /* Handle of the OPCODE hash table. NULL means any use before
1002 m68k_ip_begin() will crash. */
1003 static struct hash_control
*op_hash
;
1005 /* Assemble an m68k instruction. */
1012 register struct m68k_op
*opP
;
1013 register const struct m68k_incant
*opcode
;
1014 register const char *s
;
1015 register int tmpreg
= 0, baseo
= 0, outro
= 0, nextword
;
1016 char *pdot
, *pdotmove
;
1017 enum m68k_size siz1
, siz2
;
1021 LITTLENUM_TYPE words
[6];
1022 LITTLENUM_TYPE
*wordp
;
1023 unsigned long ok_arch
= 0;
1025 if (*instring
== ' ')
1026 instring
++; /* skip leading whitespace */
1028 /* Scan up to end of operation-code, which MUST end in end-of-string
1029 or exactly 1 space. */
1031 for (p
= instring
; *p
!= '\0'; p
++)
1041 the_ins
.error
= _("No operator");
1045 /* p now points to the end of the opcode name, probably whitespace.
1046 Make sure the name is null terminated by clobbering the
1047 whitespace, look it up in the hash table, then fix it back.
1048 Remove a dot, first, since the opcode tables have none. */
1051 for (pdotmove
= pdot
; pdotmove
< p
; pdotmove
++)
1052 *pdotmove
= pdotmove
[1];
1058 opcode
= (const struct m68k_incant
*) hash_find (op_hash
, instring
);
1063 for (pdotmove
= p
; pdotmove
> pdot
; pdotmove
--)
1064 *pdotmove
= pdotmove
[-1];
1071 the_ins
.error
= _("Unknown operator");
1075 /* found a legitimate opcode, start matching operands */
1079 if (opcode
->m_operands
== 0)
1081 char *old
= input_line_pointer
;
1083 input_line_pointer
= p
;
1084 /* Ahh - it's a motorola style psuedo op */
1085 mote_pseudo_table
[opcode
->m_opnum
].poc_handler
1086 (mote_pseudo_table
[opcode
->m_opnum
].poc_val
);
1087 input_line_pointer
= old
;
1093 if (flag_mri
&& opcode
->m_opnum
== 0)
1095 /* In MRI mode, random garbage is allowed after an instruction
1096 which accepts no operands. */
1097 the_ins
.args
= opcode
->m_operands
;
1098 the_ins
.numargs
= opcode
->m_opnum
;
1099 the_ins
.numo
= opcode
->m_codenum
;
1100 the_ins
.opcode
[0] = getone (opcode
);
1101 the_ins
.opcode
[1] = gettwo (opcode
);
1105 for (opP
= &the_ins
.operands
[0]; *p
; opP
++)
1107 p
= crack_operand (p
, opP
);
1111 the_ins
.error
= opP
->error
;
1116 opsfound
= opP
- &the_ins
.operands
[0];
1118 /* This ugly hack is to support the floating pt opcodes in their
1119 standard form. Essentially, we fake a first enty of type COP#1 */
1120 if (opcode
->m_operands
[0] == 'I')
1124 for (n
= opsfound
; n
> 0; --n
)
1125 the_ins
.operands
[n
] = the_ins
.operands
[n
- 1];
1127 memset ((char *) (&the_ins
.operands
[0]), '\0',
1128 sizeof (the_ins
.operands
[0]));
1129 the_ins
.operands
[0].mode
= CONTROL
;
1130 the_ins
.operands
[0].reg
= m68k_float_copnum
;
1134 /* We've got the operands. Find an opcode that'll accept them */
1137 /* If we didn't get the right number of ops, or we have no
1138 common model with this pattern then reject this pattern. */
1140 ok_arch
|= opcode
->m_arch
;
1141 if (opsfound
!= opcode
->m_opnum
1142 || ((opcode
->m_arch
& current_architecture
) == 0))
1146 for (s
= opcode
->m_operands
, opP
= &the_ins
.operands
[0];
1150 /* Warning: this switch is huge! */
1151 /* I've tried to organize the cases into this order:
1152 non-alpha first, then alpha by letter. Lower-case
1153 goes directly before uppercase counterpart. */
1154 /* Code with multiple case ...: gets sorted by the lowest
1155 case ... it belongs to. I hope this makes sense. */
1261 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1278 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1297 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1307 if (opP
->mode
!= IMMED
)
1309 else if (s
[1] == 'b'
1310 && ! isvar (&opP
->disp
)
1311 && (opP
->disp
.exp
.X_op
!= O_constant
1312 || ! isbyte (opP
->disp
.exp
.X_add_number
)))
1314 else if (s
[1] == 'B'
1315 && ! isvar (&opP
->disp
)
1316 && (opP
->disp
.exp
.X_op
!= O_constant
1317 || ! issbyte (opP
->disp
.exp
.X_add_number
)))
1319 else if (s
[1] == 'w'
1320 && ! isvar (&opP
->disp
)
1321 && (opP
->disp
.exp
.X_op
!= O_constant
1322 || ! isword (opP
->disp
.exp
.X_add_number
)))
1324 else if (s
[1] == 'W'
1325 && ! isvar (&opP
->disp
)
1326 && (opP
->disp
.exp
.X_op
!= O_constant
1327 || ! issword (opP
->disp
.exp
.X_add_number
)))
1333 if (opP
->mode
!= IMMED
)
1338 if (opP
->mode
== AREG
1339 || opP
->mode
== CONTROL
1340 || opP
->mode
== FPREG
1341 || opP
->mode
== IMMED
1342 || opP
->mode
== REGLST
1343 || (opP
->mode
!= ABSL
1345 || opP
->reg
== ZPC
)))
1350 if (opP
->mode
== CONTROL
1351 || opP
->mode
== FPREG
1352 || opP
->mode
== REGLST
1353 || opP
->mode
== IMMED
1354 || (opP
->mode
!= ABSL
1356 || opP
->reg
== ZPC
)))
1384 if (opP
->mode
== CONTROL
1385 || opP
->mode
== FPREG
1386 || opP
->mode
== REGLST
)
1391 if (opP
->mode
!= AINC
)
1396 if (opP
->mode
!= ADEC
)
1446 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1467 case '~': /* For now! (JF FOO is this right?) */
1489 if (opP
->mode
!= CONTROL
1490 || (opP
->reg
!= TT0
&& opP
->reg
!= TT1
))
1495 if (opP
->mode
!= AREG
)
1500 if (opP
->mode
!= AINDR
)
1505 if (opP
->mode
!= ABSL
1507 && strncmp (instring
, "jbsr", 4) == 0))
1512 if (opP
->mode
!= CONTROL
|| opP
->reg
!= CCR
)
1517 if (opP
->mode
!= DISP
1519 || opP
->reg
> ADDR7
)
1524 if (opP
->mode
!= DREG
)
1529 if (opP
->reg
!= ACC
)
1534 if (opP
->mode
!= FPREG
)
1539 if (opP
->reg
!= MACSR
)
1544 if (opP
->reg
!= MASK
)
1549 if (opP
->mode
!= CONTROL
1556 if (opP
->mode
!= CONTROL
1558 || opP
->reg
> last_movec_reg
)
1562 const enum m68k_register
*rp
;
1563 for (rp
= control_regs
; *rp
; rp
++)
1564 if (*rp
== opP
->reg
)
1572 if (opP
->mode
!= IMMED
)
1578 if (opP
->mode
== DREG
1579 || opP
->mode
== AREG
1580 || opP
->mode
== FPREG
)
1589 opP
->mask
= 1 << (opP
->reg
- DATA0
);
1592 opP
->mask
= 1 << (opP
->reg
- ADDR0
+ 8);
1595 opP
->mask
= 1 << (opP
->reg
- FP0
+ 16);
1603 else if (opP
->mode
== CONTROL
)
1612 opP
->mask
= 1 << 24;
1615 opP
->mask
= 1 << 25;
1618 opP
->mask
= 1 << 26;
1627 else if (opP
->mode
!= REGLST
)
1629 else if (s
[1] == '8' && (opP
->mask
& 0x0ffffff) != 0)
1631 else if (s
[1] == '3' && (opP
->mask
& 0x7000000) != 0)
1636 if (opP
->mode
!= IMMED
)
1638 else if (opP
->disp
.exp
.X_op
!= O_constant
1639 || ! issbyte (opP
->disp
.exp
.X_add_number
))
1641 else if (! m68k_quick
1642 && instring
[3] != 'q'
1643 && instring
[4] != 'q')
1648 if (opP
->mode
!= DREG
1649 && opP
->mode
!= IMMED
1650 && opP
->mode
!= ABSL
)
1655 if (opP
->mode
!= IMMED
)
1657 else if (opP
->disp
.exp
.X_op
!= O_constant
1658 || opP
->disp
.exp
.X_add_number
< 1
1659 || opP
->disp
.exp
.X_add_number
> 8)
1661 else if (! m68k_quick
1662 && (strncmp (instring
, "add", 3) == 0
1663 || strncmp (instring
, "sub", 3) == 0)
1664 && instring
[3] != 'q')
1669 if (opP
->mode
!= DREG
&& opP
->mode
!= AREG
)
1674 if (opP
->mode
!= AINDR
1675 && (opP
->mode
!= BASE
1677 && opP
->reg
!= ZADDR0
)
1678 || opP
->disp
.exp
.X_op
!= O_absent
1679 || ((opP
->index
.reg
< DATA0
1680 || opP
->index
.reg
> DATA7
)
1681 && (opP
->index
.reg
< ADDR0
1682 || opP
->index
.reg
> ADDR7
))
1683 || opP
->index
.size
!= SIZE_UNSPEC
1684 || opP
->index
.scale
!= 1))
1689 if (opP
->mode
!= CONTROL
1690 || ! (opP
->reg
== FPI
1692 || opP
->reg
== FPC
))
1697 if (opP
->mode
!= CONTROL
|| opP
->reg
!= SR
)
1702 if (opP
->mode
!= IMMED
)
1704 else if (opP
->disp
.exp
.X_op
!= O_constant
1705 || opP
->disp
.exp
.X_add_number
< 0
1706 || opP
->disp
.exp
.X_add_number
> 7)
1711 if (opP
->mode
!= CONTROL
|| opP
->reg
!= USP
)
1715 /* JF these are out of order. We could put them
1716 in order if we were willing to put up with
1717 bunches of #ifdef m68851s in the code.
1719 Don't forget that you need these operands
1720 to use 68030 MMU instructions. */
1722 /* Memory addressing mode used by pflushr */
1724 if (opP
->mode
== CONTROL
1725 || opP
->mode
== FPREG
1726 || opP
->mode
== DREG
1727 || opP
->mode
== AREG
1728 || opP
->mode
== REGLST
)
1730 /* We should accept immediate operands, but they
1731 supposedly have to be quad word, and we don't
1732 handle that. I would like to see what a Motorola
1733 assembler does before doing something here. */
1734 if (opP
->mode
== IMMED
)
1739 if (opP
->mode
!= CONTROL
1740 || (opP
->reg
!= SFC
&& opP
->reg
!= DFC
))
1745 if (opP
->mode
!= CONTROL
|| opP
->reg
!= TC
)
1750 if (opP
->mode
!= CONTROL
|| opP
->reg
!= AC
)
1755 if (opP
->mode
!= CONTROL
1758 && opP
->reg
!= SCC
))
1763 if (opP
->mode
!= CONTROL
1769 if (opP
->mode
!= CONTROL
1772 && opP
->reg
!= CRP
))
1777 if (opP
->mode
!= CONTROL
1778 || (!(opP
->reg
>= BAD
&& opP
->reg
<= BAD
+ 7)
1779 && !(opP
->reg
>= BAC
&& opP
->reg
<= BAC
+ 7)))
1784 if (opP
->mode
!= CONTROL
|| opP
->reg
!= PSR
)
1789 if (opP
->mode
!= CONTROL
|| opP
->reg
!= PCSR
)
1794 if (opP
->mode
!= CONTROL
1801 } /* not a cache specifier. */
1805 if (opP
->mode
!= ABSL
)
1810 if (opP
->reg
< DATA0L
|| opP
->reg
> ADDR7U
)
1812 /* FIXME: kludge instead of fixing parser:
1813 upper/lower registers are *not* CONTROL
1814 registers, but ordinary ones. */
1815 if ((opP
->reg
>= DATA0L
&& opP
->reg
<= DATA7L
)
1816 || (opP
->reg
>= DATA0U
&& opP
->reg
<= DATA7U
))
1824 } /* switch on type of operand */
1828 } /* for each operand */
1829 } /* if immediately wrong */
1836 opcode
= opcode
->m_next
;
1841 && !(ok_arch
& current_architecture
))
1846 _("invalid instruction for this architecture; needs "));
1847 cp
= buf
+ strlen (buf
);
1851 strcpy (cp
, _("fpu (68040, 68060 or 68881/68882)"));
1854 strcpy (cp
, _("mmu (68030 or 68851)"));
1857 strcpy (cp
, _("68020 or higher"));
1860 strcpy (cp
, _("68000 or higher"));
1863 strcpy (cp
, _("68010 or higher"));
1867 int got_one
= 0, idx
;
1869 idx
< (int) (sizeof (archs
) / sizeof (archs
[0]));
1872 if ((archs
[idx
].arch
& ok_arch
)
1873 && ! archs
[idx
].alias
)
1877 strcpy (cp
, " or ");
1881 strcpy (cp
, archs
[idx
].name
);
1887 cp
= xmalloc (strlen (buf
) + 1);
1892 the_ins
.error
= _("operands mismatch");
1894 } /* Fell off the end */
1899 /* now assemble it */
1901 the_ins
.args
= opcode
->m_operands
;
1902 the_ins
.numargs
= opcode
->m_opnum
;
1903 the_ins
.numo
= opcode
->m_codenum
;
1904 the_ins
.opcode
[0] = getone (opcode
);
1905 the_ins
.opcode
[1] = gettwo (opcode
);
1907 for (s
= the_ins
.args
, opP
= &the_ins
.operands
[0]; *s
; s
+= 2, opP
++)
1909 /* This switch is a doozy.
1910 Watch the first step; its a big one! */
1938 tmpreg
= 0x3c; /* 7.4 */
1939 if (strchr ("bwl", s
[1]))
1940 nextword
= get_num (&opP
->disp
, 80);
1942 nextword
= get_num (&opP
->disp
, 0);
1943 if (isvar (&opP
->disp
))
1944 add_fix (s
[1], &opP
->disp
, 0, 0);
1948 if (!isbyte (nextword
))
1949 opP
->error
= _("operand out of range");
1954 if (!isword (nextword
))
1955 opP
->error
= _("operand out of range");
1960 if (!issword (nextword
))
1961 opP
->error
= _("operand out of range");
1966 addword (nextword
>> 16);
1993 /* We gotta put out some float */
1994 if (op (&opP
->disp
) != O_big
)
1999 /* Can other cases happen here? */
2000 if (op (&opP
->disp
) != O_constant
)
2003 val
= (valueT
) offs (&opP
->disp
);
2007 generic_bignum
[gencnt
] = (LITTLENUM_TYPE
) val
;
2008 val
>>= LITTLENUM_NUMBER_OF_BITS
;
2012 offs (&opP
->disp
) = gencnt
;
2014 if (offs (&opP
->disp
) > 0)
2016 if (offs (&opP
->disp
) > baseo
)
2018 as_warn (_("Bignum too big for %c format; truncated"),
2020 offs (&opP
->disp
) = baseo
;
2022 baseo
-= offs (&opP
->disp
);
2025 for (wordp
= generic_bignum
+ offs (&opP
->disp
) - 1;
2026 offs (&opP
->disp
)--;
2031 gen_to_words (words
, baseo
, (long) outro
);
2032 for (wordp
= words
; baseo
--; wordp
++)
2036 tmpreg
= opP
->reg
- DATA
; /* 0.dreg */
2039 tmpreg
= 0x08 + opP
->reg
- ADDR
; /* 1.areg */
2042 tmpreg
= 0x10 + opP
->reg
- ADDR
; /* 2.areg */
2045 tmpreg
= 0x20 + opP
->reg
- ADDR
; /* 4.areg */
2048 tmpreg
= 0x18 + opP
->reg
- ADDR
; /* 3.areg */
2052 nextword
= get_num (&opP
->disp
, 80);
2055 && ! isvar (&opP
->disp
)
2058 opP
->disp
.exp
.X_op
= O_symbol
;
2059 #ifndef BFD_ASSEMBLER
2060 opP
->disp
.exp
.X_add_symbol
= &abs_symbol
;
2062 opP
->disp
.exp
.X_add_symbol
=
2063 section_symbol (absolute_section
);
2067 /* Force into index mode. Hope this works */
2069 /* We do the first bit for 32-bit displacements, and the
2070 second bit for 16 bit ones. It is possible that we
2071 should make the default be WORD instead of LONG, but
2072 I think that'd break GCC, so we put up with a little
2073 inefficiency for the sake of working output. */
2075 if (!issword (nextword
)
2076 || (isvar (&opP
->disp
)
2077 && ((opP
->disp
.size
== SIZE_UNSPEC
2078 && flag_short_refs
== 0
2079 && cpu_of_arch (current_architecture
) >= m68020
2080 && ! arch_coldfire_p (current_architecture
))
2081 || opP
->disp
.size
== SIZE_LONG
)))
2083 if (cpu_of_arch (current_architecture
) < m68020
2084 || arch_coldfire_p (current_architecture
))
2086 _("displacement too large for this architecture; needs 68020 or higher");
2088 tmpreg
= 0x3B; /* 7.3 */
2090 tmpreg
= 0x30 + opP
->reg
- ADDR
; /* 6.areg */
2091 if (isvar (&opP
->disp
))
2095 if (opP
->disp
.size
== SIZE_LONG
2097 /* If the displacement needs pic
2098 relocation it cannot be relaxed. */
2099 || opP
->disp
.pic_reloc
!= pic_none
2104 add_fix ('l', &opP
->disp
, 1, 2);
2108 add_frag (adds (&opP
->disp
),
2110 TAB (PCREL1632
, SZ_UNDEF
));
2117 add_fix ('l', &opP
->disp
, 0, 0);
2122 addword (nextword
>> 16);
2127 tmpreg
= 0x3A; /* 7.2 */
2129 tmpreg
= 0x28 + opP
->reg
- ADDR
; /* 5.areg */
2131 if (isvar (&opP
->disp
))
2135 add_fix ('w', &opP
->disp
, 1, 0);
2138 add_fix ('w', &opP
->disp
, 0, 0);
2148 baseo
= get_num (&opP
->disp
, 80);
2149 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
2150 outro
= get_num (&opP
->odisp
, 80);
2151 /* Figure out the `addressing mode'.
2152 Also turn on the BASE_DISABLE bit, if needed. */
2153 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
2155 tmpreg
= 0x3b; /* 7.3 */
2156 if (opP
->reg
== ZPC
)
2159 else if (opP
->reg
== 0)
2162 tmpreg
= 0x30; /* 6.garbage */
2164 else if (opP
->reg
>= ZADDR0
&& opP
->reg
<= ZADDR7
)
2167 tmpreg
= 0x30 + opP
->reg
- ZADDR0
;
2170 tmpreg
= 0x30 + opP
->reg
- ADDR
; /* 6.areg */
2172 siz1
= opP
->disp
.size
;
2173 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
2174 siz2
= opP
->odisp
.size
;
2178 /* Index register stuff */
2179 if (opP
->index
.reg
!= 0
2180 && opP
->index
.reg
>= DATA
2181 && opP
->index
.reg
<= ADDR7
)
2183 nextword
|= (opP
->index
.reg
- DATA
) << 12;
2185 if (opP
->index
.size
== SIZE_LONG
2186 || (opP
->index
.size
== SIZE_UNSPEC
2187 && m68k_index_width_default
== SIZE_LONG
))
2190 if ((opP
->index
.scale
!= 1
2191 && cpu_of_arch (current_architecture
) < m68020
)
2192 || (opP
->index
.scale
== 8
2193 && arch_coldfire_p (current_architecture
)))
2196 _("scale factor invalid on this architecture; needs cpu32 or 68020 or higher");
2199 if (arch_coldfire_p (current_architecture
)
2200 && opP
->index
.size
== SIZE_WORD
)
2201 opP
->error
= _("invalid index size for coldfire");
2203 switch (opP
->index
.scale
)
2220 GET US OUT OF HERE! */
2222 /* Must be INDEX, with an index register. Address
2223 register cannot be ZERO-PC, and either :b was
2224 forced, or we know it will fit. For a 68000 or
2225 68010, force this mode anyways, because the
2226 larger modes aren't supported. */
2227 if (opP
->mode
== BASE
2228 && ((opP
->reg
>= ADDR0
2229 && opP
->reg
<= ADDR7
)
2232 if (siz1
== SIZE_BYTE
2233 || cpu_of_arch (current_architecture
) < m68020
2234 || arch_coldfire_p (current_architecture
)
2235 || (siz1
== SIZE_UNSPEC
2236 && ! isvar (&opP
->disp
)
2237 && issbyte (baseo
)))
2239 nextword
+= baseo
& 0xff;
2241 if (isvar (&opP
->disp
))
2243 /* Do a byte relocation. If it doesn't
2244 fit (possible on m68000) let the
2245 fixup processing complain later. */
2247 add_fix ('B', &opP
->disp
, 1, 1);
2249 add_fix ('B', &opP
->disp
, 0, 0);
2251 else if (siz1
!= SIZE_BYTE
)
2253 if (siz1
!= SIZE_UNSPEC
)
2254 as_warn (_("Forcing byte displacement"));
2255 if (! issbyte (baseo
))
2256 opP
->error
= _("byte displacement out of range");
2261 else if (siz1
== SIZE_UNSPEC
2263 && isvar (&opP
->disp
)
2264 && subs (&opP
->disp
) == NULL
2266 /* If the displacement needs pic
2267 relocation it cannot be relaxed. */
2268 && opP
->disp
.pic_reloc
== pic_none
2272 /* The code in md_convert_frag_1 needs to be
2273 able to adjust nextword. Call frag_grow
2274 to ensure that we have enough space in
2275 the frag obstack to make all the bytes
2278 nextword
+= baseo
& 0xff;
2280 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2281 TAB (PCINDEX
, SZ_UNDEF
));
2289 nextword
|= 0x40; /* No index reg */
2290 if (opP
->index
.reg
>= ZDATA0
2291 && opP
->index
.reg
<= ZDATA7
)
2292 nextword
|= (opP
->index
.reg
- ZDATA0
) << 12;
2293 else if (opP
->index
.reg
>= ZADDR0
2294 || opP
->index
.reg
<= ZADDR7
)
2295 nextword
|= (opP
->index
.reg
- ZADDR0
+ 8) << 12;
2298 /* It isn't simple. */
2300 if (cpu_of_arch (current_architecture
) < m68020
2301 || arch_coldfire_p (current_architecture
))
2303 _("invalid operand mode for this architecture; needs 68020 or higher");
2306 /* If the guy specified a width, we assume that it is
2307 wide enough. Maybe it isn't. If so, we lose. */
2311 if (isvar (&opP
->disp
)
2313 : ! issword (baseo
))
2318 else if (! isvar (&opP
->disp
) && baseo
== 0)
2327 as_warn (_(":b not permitted; defaulting to :w"));
2337 /* Figure out innner displacement stuff */
2338 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
2340 if (cpu_of_arch (current_architecture
) & cpu32
)
2341 opP
->error
= _("invalid operand mode for this architecture; needs 68020 or higher");
2345 if (isvar (&opP
->odisp
)
2347 : ! issword (outro
))
2352 else if (! isvar (&opP
->odisp
) && outro
== 0)
2361 as_warn (_(":b not permitted; defaulting to :w"));
2370 if (opP
->mode
== POST
2371 && (nextword
& 0x40) == 0)
2376 if (siz1
!= SIZE_UNSPEC
&& isvar (&opP
->disp
))
2378 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
2379 add_fix (siz1
== SIZE_LONG
? 'l' : 'w', &opP
->disp
, 1, 2);
2381 add_fix (siz1
== SIZE_LONG
? 'l' : 'w', &opP
->disp
, 0, 0);
2383 if (siz1
== SIZE_LONG
)
2384 addword (baseo
>> 16);
2385 if (siz1
!= SIZE_UNSPEC
)
2388 if (siz2
!= SIZE_UNSPEC
&& isvar (&opP
->odisp
))
2389 add_fix (siz2
== SIZE_LONG
? 'l' : 'w', &opP
->odisp
, 0, 0);
2390 if (siz2
== SIZE_LONG
)
2391 addword (outro
>> 16);
2392 if (siz2
!= SIZE_UNSPEC
)
2398 nextword
= get_num (&opP
->disp
, 80);
2399 switch (opP
->disp
.size
)
2404 if (!isvar (&opP
->disp
) && issword (offs (&opP
->disp
)))
2406 tmpreg
= 0x38; /* 7.0 */
2410 if (isvar (&opP
->disp
)
2411 && !subs (&opP
->disp
)
2412 && adds (&opP
->disp
)
2414 /* If the displacement needs pic relocation it
2415 cannot be relaxed. */
2416 && opP
->disp
.pic_reloc
== pic_none
2419 && !strchr ("~%&$?", s
[0]))
2421 tmpreg
= 0x3A; /* 7.2 */
2422 add_frag (adds (&opP
->disp
),
2424 TAB (ABSTOPCREL
, SZ_UNDEF
));
2427 /* Fall through into long */
2429 if (isvar (&opP
->disp
))
2430 add_fix ('l', &opP
->disp
, 0, 0);
2432 tmpreg
= 0x39;/* 7.1 mode */
2433 addword (nextword
>> 16);
2438 as_bad (_("unsupported byte value; use a different suffix"));
2440 case SIZE_WORD
: /* Word */
2441 if (isvar (&opP
->disp
))
2442 add_fix ('w', &opP
->disp
, 0, 0);
2444 tmpreg
= 0x38;/* 7.0 mode */
2452 as_bad (_("unknown/incorrect operand"));
2455 install_gen_operand (s
[1], tmpreg
);
2461 { /* JF: I hate floating point! */
2476 tmpreg
= get_num (&opP
->disp
, tmpreg
);
2477 if (isvar (&opP
->disp
))
2478 add_fix (s
[1], &opP
->disp
, 0, 0);
2481 case 'b': /* Danger: These do no check for
2482 certain types of overflow.
2484 if (!isbyte (tmpreg
))
2485 opP
->error
= _("out of range");
2486 insop (tmpreg
, opcode
);
2487 if (isvar (&opP
->disp
))
2488 the_ins
.reloc
[the_ins
.nrel
- 1].n
=
2489 (opcode
->m_codenum
) * 2 + 1;
2492 if (!issbyte (tmpreg
))
2493 opP
->error
= _("out of range");
2494 the_ins
.opcode
[the_ins
.numo
- 1] |= tmpreg
& 0xff;
2495 if (isvar (&opP
->disp
))
2496 the_ins
.reloc
[the_ins
.nrel
- 1].n
= opcode
->m_codenum
* 2 - 1;
2499 if (!isword (tmpreg
))
2500 opP
->error
= _("out of range");
2501 insop (tmpreg
, opcode
);
2502 if (isvar (&opP
->disp
))
2503 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
2506 if (!issword (tmpreg
))
2507 opP
->error
= _("out of range");
2508 insop (tmpreg
, opcode
);
2509 if (isvar (&opP
->disp
))
2510 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
2513 /* Because of the way insop works, we put these two out
2515 insop (tmpreg
, opcode
);
2516 insop (tmpreg
>> 16, opcode
);
2517 if (isvar (&opP
->disp
))
2518 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
2525 install_operand (s
[1], tmpreg
);
2536 install_operand (s
[1], opP
->reg
- ADDR
);
2540 tmpreg
= get_num (&opP
->disp
, 80);
2544 add_fix ('B', &opP
->disp
, 1, -1);
2547 add_fix ('w', &opP
->disp
, 1, 0);
2552 if (! HAVE_LONG_BRANCH (current_architecture
))
2553 as_warn (_("Can't use long branches on 68000/68010/5200"));
2554 the_ins
.opcode
[0] |= 0xff;
2555 add_fix ('l', &opP
->disp
, 1, 0);
2560 if (subs (&opP
->disp
)) /* We can't relax it */
2564 /* If the displacement needs pic relocation it cannot be
2566 if (opP
->disp
.pic_reloc
!= pic_none
)
2569 /* This could either be a symbol, or an absolute
2570 address. If it's an absolute address, turn it into
2571 an absolute jump right here and keep it out of the
2573 if (adds (&opP
->disp
) == 0)
2575 if (the_ins
.opcode
[0] == 0x6000) /* jbra */
2576 the_ins
.opcode
[0] = 0x4EF1;
2577 else if (the_ins
.opcode
[0] == 0x6100) /* jbsr */
2578 the_ins
.opcode
[0] = 0x4EB1;
2581 the_ins
.opcode
[0] ^= 0x0100;
2582 the_ins
.opcode
[0] |= 0x0006;
2585 add_fix ('l', &opP
->disp
, 0, 0);
2591 /* Now we know it's going into the relaxer. Now figure
2592 out which mode. We try in this order of preference:
2593 long branch, absolute jump, byte/word branches only. */
2594 if (HAVE_LONG_BRANCH (current_architecture
))
2595 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2596 TAB (BRANCHBWL
, SZ_UNDEF
));
2597 else if (! flag_keep_pcrel
)
2599 if ((the_ins
.opcode
[0] == 0x6000)
2600 || (the_ins
.opcode
[0] == 0x6100))
2601 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2602 TAB (BRABSJUNC
, SZ_UNDEF
));
2604 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2605 TAB (BRABSJCOND
, SZ_UNDEF
));
2608 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2609 TAB (BRANCHBW
, SZ_UNDEF
));
2612 if (isvar (&opP
->disp
))
2614 /* Check for DBcc instructions. We can relax them,
2615 but only if we have long branches and/or absolute
2617 if (((the_ins
.opcode
[0] & 0xf0f8) == 0x50c8)
2618 && (HAVE_LONG_BRANCH (current_architecture
)
2619 || (! flag_keep_pcrel
)))
2621 if (HAVE_LONG_BRANCH (current_architecture
))
2622 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2623 TAB (DBCCLBR
, SZ_UNDEF
));
2625 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2626 TAB (DBCCABSJ
, SZ_UNDEF
));
2629 add_fix ('w', &opP
->disp
, 1, 0);
2633 case 'C': /* Fixed size LONG coproc branches */
2634 add_fix ('l', &opP
->disp
, 1, 0);
2638 case 'c': /* Var size Coprocesssor branches */
2639 if (subs (&opP
->disp
) || (adds (&opP
->disp
) == 0))
2641 the_ins
.opcode
[the_ins
.numo
- 1] |= 0x40;
2642 add_fix ('l', &opP
->disp
, 1, 0);
2647 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2648 TAB (FBRANCH
, SZ_UNDEF
));
2655 case 'C': /* Ignore it */
2658 case 'd': /* JF this is a kludge */
2659 install_operand ('s', opP
->reg
- ADDR
);
2660 tmpreg
= get_num (&opP
->disp
, 80);
2661 if (!issword (tmpreg
))
2663 as_warn (_("Expression out of range, using 0"));
2670 install_operand (s
[1], opP
->reg
- DATA
);
2673 case 'E': /* Ignore it */
2677 install_operand (s
[1], opP
->reg
- FP0
);
2680 case 'G': /* Ignore it */
2685 tmpreg
= opP
->reg
- COP0
;
2686 install_operand (s
[1], tmpreg
);
2689 case 'J': /* JF foo */
2762 install_operand (s
[1], tmpreg
);
2766 tmpreg
= get_num (&opP
->disp
, 55);
2767 install_operand (s
[1], tmpreg
& 0x7f);
2774 if (tmpreg
& 0x7FF0000)
2775 as_bad (_("Floating point register in register list"));
2776 insop (reverse_16_bits (tmpreg
), opcode
);
2780 if (tmpreg
& 0x700FFFF)
2781 as_bad (_("Wrong register in floating-point reglist"));
2782 install_operand (s
[1], reverse_8_bits (tmpreg
>> 16));
2790 if (tmpreg
& 0x7FF0000)
2791 as_bad (_("Floating point register in register list"));
2792 insop (tmpreg
, opcode
);
2794 else if (s
[1] == '8')
2796 if (tmpreg
& 0x0FFFFFF)
2797 as_bad (_("incorrect register in reglist"));
2798 install_operand (s
[1], tmpreg
>> 24);
2802 if (tmpreg
& 0x700FFFF)
2803 as_bad (_("wrong register in floating-point reglist"));
2805 install_operand (s
[1], tmpreg
>> 16);
2810 install_operand (s
[1], get_num (&opP
->disp
, 60));
2814 tmpreg
= ((opP
->mode
== DREG
)
2815 ? 0x20 + (int) (opP
->reg
- DATA
)
2816 : (get_num (&opP
->disp
, 40) & 0x1F));
2817 install_operand (s
[1], tmpreg
);
2821 tmpreg
= get_num (&opP
->disp
, 10);
2824 install_operand (s
[1], tmpreg
);
2828 /* This depends on the fact that ADDR registers are eight
2829 more than their corresponding DATA regs, so the result
2830 will have the ADDR_REG bit set */
2831 install_operand (s
[1], opP
->reg
- DATA
);
2835 if (opP
->mode
== AINDR
)
2836 install_operand (s
[1], opP
->reg
- DATA
);
2838 install_operand (s
[1], opP
->index
.reg
- DATA
);
2842 if (opP
->reg
== FPI
)
2844 else if (opP
->reg
== FPS
)
2846 else if (opP
->reg
== FPC
)
2850 install_operand (s
[1], tmpreg
);
2853 case 'S': /* Ignore it */
2857 install_operand (s
[1], get_num (&opP
->disp
, 30));
2860 case 'U': /* Ignore it */
2879 as_fatal (_("failed sanity check"));
2880 } /* switch on cache token */
2881 install_operand (s
[1], tmpreg
);
2884 /* JF: These are out of order, I fear. */
2897 install_operand (s
[1], tmpreg
);
2923 install_operand (s
[1], tmpreg
);
2927 if (opP
->reg
== VAL
)
2946 install_operand (s
[1], tmpreg
);
2960 tmpreg
= (4 << 10) | ((opP
->reg
- BAD
) << 2);
2971 tmpreg
= (5 << 10) | ((opP
->reg
- BAC
) << 2);
2977 install_operand (s
[1], tmpreg
);
2980 know (opP
->reg
== PSR
);
2983 know (opP
->reg
== PCSR
);
2998 install_operand (s
[1], tmpreg
);
3001 tmpreg
= get_num (&opP
->disp
, 20);
3002 install_operand (s
[1], tmpreg
);
3004 case '_': /* used only for move16 absolute 32-bit address */
3005 if (isvar (&opP
->disp
))
3006 add_fix ('l', &opP
->disp
, 0, 0);
3007 tmpreg
= get_num (&opP
->disp
, 80);
3008 addword (tmpreg
>> 16);
3009 addword (tmpreg
& 0xFFFF);
3012 install_operand (s
[1], opP
->reg
- DATA0L
);
3013 opP
->reg
-= (DATA0L
);
3014 opP
->reg
&= 0x0F; /* remove upper/lower bit */
3021 /* By the time whe get here (FINALLY) the_ins contains the complete
3022 instruction, ready to be emitted. . . */
3026 reverse_16_bits (in
)
3032 static int mask
[16] =
3034 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080,
3035 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000, 0x8000
3037 for (n
= 0; n
< 16; n
++)
3040 out
|= mask
[15 - n
];
3043 } /* reverse_16_bits() */
3052 static int mask
[8] =
3054 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080,
3057 for (n
= 0; n
< 8; n
++)
3063 } /* reverse_8_bits() */
3065 /* Cause an extra frag to be generated here, inserting up to 10 bytes
3066 (that value is chosen in the frag_var call in md_assemble). TYPE
3067 is the subtype of the frag to be generated; its primary type is
3068 rs_machine_dependent.
3070 The TYPE parameter is also used by md_convert_frag_1 and
3071 md_estimate_size_before_relax. The appropriate type of fixup will
3072 be emitted by md_convert_frag_1.
3074 ADD becomes the FR_SYMBOL field of the frag, and OFF the FR_OFFSET. */
3076 install_operand (mode
, val
)
3083 the_ins
.opcode
[0] |= val
& 0xFF; /* JF FF is for M kludge */
3086 the_ins
.opcode
[0] |= val
<< 9;
3089 the_ins
.opcode
[1] |= val
<< 12;
3092 the_ins
.opcode
[1] |= val
<< 6;
3095 the_ins
.opcode
[1] |= val
;
3098 the_ins
.opcode
[2] |= val
<< 12;
3101 the_ins
.opcode
[2] |= val
<< 6;
3104 /* DANGER! This is a hack to force cas2l and cas2w cmds to be
3105 three words long! */
3107 the_ins
.opcode
[2] |= val
;
3110 the_ins
.opcode
[1] |= val
<< 7;
3113 the_ins
.opcode
[1] |= val
<< 10;
3117 the_ins
.opcode
[1] |= val
<< 5;
3122 the_ins
.opcode
[1] |= (val
<< 10) | (val
<< 7);
3125 the_ins
.opcode
[1] |= (val
<< 12) | val
;
3128 the_ins
.opcode
[0] |= val
= 0xff;
3131 the_ins
.opcode
[0] |= val
<< 9;
3134 the_ins
.opcode
[1] |= val
;
3137 the_ins
.opcode
[1] |= val
;
3138 the_ins
.numo
++; /* What a hack */
3141 the_ins
.opcode
[1] |= val
<< 4;
3149 the_ins
.opcode
[0] |= (val
<< 6);
3152 the_ins
.opcode
[1] = (val
>> 16);
3153 the_ins
.opcode
[2] = val
& 0xffff;
3156 the_ins
.opcode
[0] |= ((val
& 0x8) << (6 - 3));
3157 the_ins
.opcode
[0] |= ((val
& 0x7) << 9);
3158 the_ins
.opcode
[1] |= ((val
& 0x10) << (7 - 4));
3161 the_ins
.opcode
[0] |= ((val
& 0x8) << (6 - 3));
3162 the_ins
.opcode
[0] |= ((val
& 0x7) << 9);
3165 the_ins
.opcode
[1] |= val
<< 12;
3166 the_ins
.opcode
[1] |= ((val
& 0x10) << (7 - 4));
3169 the_ins
.opcode
[0] |= (val
& 0xF);
3170 the_ins
.opcode
[1] |= ((val
& 0x10) << (6 - 4));
3173 the_ins
.opcode
[1] |= (val
& 0xF);
3174 the_ins
.opcode
[1] |= ((val
& 0x10) << (6 - 4));
3177 the_ins
.opcode
[1] |= ((val
!= 1) << 10);
3181 as_fatal (_("failed sanity check."));
3183 } /* install_operand() */
3186 install_gen_operand (mode
, val
)
3193 the_ins
.opcode
[0] |= val
;
3196 /* This is a kludge!!! */
3197 the_ins
.opcode
[0] |= (val
& 0x07) << 9 | (val
& 0x38) << 3;
3206 the_ins
.opcode
[0] |= val
;
3208 /* more stuff goes here */
3210 as_fatal (_("failed sanity check."));
3212 } /* install_gen_operand() */
3215 * verify that we have some number of paren pairs, do m68k_ip_op(), and
3216 * then deal with the bitfield hack.
3220 crack_operand (str
, opP
)
3222 register struct m68k_op
*opP
;
3224 register int parens
;
3226 register char *beg_str
;
3234 for (parens
= 0; *str
&& (parens
> 0 || inquote
|| notend (str
)); str
++)
3240 else if (*str
== ')')
3244 opP
->error
= _("Extra )");
3250 if (flag_mri
&& *str
== '\'')
3251 inquote
= ! inquote
;
3253 if (!*str
&& parens
)
3255 opP
->error
= _("Missing )");
3260 if (m68k_ip_op (beg_str
, opP
) != 0)
3267 c
= *++str
; /* JF bitfield hack */
3272 as_bad (_("Missing operand"));
3275 /* Detect MRI REG symbols and convert them to REGLSTs. */
3276 if (opP
->mode
== CONTROL
&& (int)opP
->reg
< 0)
3279 opP
->mask
= ~(int)opP
->reg
;
3286 /* This is the guts of the machine-dependent assembler. STR points to a
3287 machine dependent instruction. This function is supposed to emit
3288 the frags/bytes it assembles to.
3292 insert_reg (regname
, regnum
)
3293 const char *regname
;
3299 #ifdef REGISTER_PREFIX
3300 if (!flag_reg_prefix_optional
)
3302 buf
[0] = REGISTER_PREFIX
;
3303 strcpy (buf
+ 1, regname
);
3308 symbol_table_insert (symbol_new (regname
, reg_section
, regnum
,
3309 &zero_address_frag
));
3311 for (i
= 0; regname
[i
]; i
++)
3312 buf
[i
] = islower (regname
[i
]) ? toupper (regname
[i
]) : regname
[i
];
3315 symbol_table_insert (symbol_new (buf
, reg_section
, regnum
,
3316 &zero_address_frag
));
3325 static const struct init_entry init_table
[] =
3384 /* control registers */
3385 { "sfc", SFC
}, /* Source Function Code */
3387 { "dfc", DFC
}, /* Destination Function Code */
3389 { "cacr", CACR
}, /* Cache Control Register */
3390 { "caar", CAAR
}, /* Cache Address Register */
3392 { "usp", USP
}, /* User Stack Pointer */
3393 { "vbr", VBR
}, /* Vector Base Register */
3394 { "msp", MSP
}, /* Master Stack Pointer */
3395 { "isp", ISP
}, /* Interrupt Stack Pointer */
3397 { "itt0", ITT0
}, /* Instruction Transparent Translation Reg 0 */
3398 { "itt1", ITT1
}, /* Instruction Transparent Translation Reg 1 */
3399 { "dtt0", DTT0
}, /* Data Transparent Translation Register 0 */
3400 { "dtt1", DTT1
}, /* Data Transparent Translation Register 1 */
3402 /* 68ec040 versions of same */
3403 { "iacr0", ITT0
}, /* Instruction Access Control Register 0 */
3404 { "iacr1", ITT1
}, /* Instruction Access Control Register 0 */
3405 { "dacr0", DTT0
}, /* Data Access Control Register 0 */
3406 { "dacr1", DTT1
}, /* Data Access Control Register 0 */
3408 /* mcf5200 versions of same. The ColdFire programmer's reference
3409 manual indicated that the order is 2,3,0,1, but Ken Rose
3410 <rose@netcom.com> says that 0,1,2,3 is the correct order. */
3411 { "acr0", ITT0
}, /* Access Control Unit 0 */
3412 { "acr1", ITT1
}, /* Access Control Unit 1 */
3413 { "acr2", DTT0
}, /* Access Control Unit 2 */
3414 { "acr3", DTT1
}, /* Access Control Unit 3 */
3416 { "tc", TC
}, /* MMU Translation Control Register */
3419 { "mmusr", MMUSR
}, /* MMU Status Register */
3420 { "srp", SRP
}, /* User Root Pointer */
3421 { "urp", URP
}, /* Supervisor Root Pointer */
3426 { "rombar", ROMBAR
}, /* ROM Base Address Register */
3427 { "rambar0", RAMBAR0
}, /* ROM Base Address Register */
3428 { "rambar1", RAMBAR1
}, /* ROM Base Address Register */
3429 { "mbar", MBAR
}, /* Module Base Address Register */
3430 /* end of control registers */
3464 /* 68ec030 versions of same */
3467 /* 68ec030 access control unit, identical to 030 MMU status reg */
3470 /* Suppressed data and address registers. */
3488 /* Upper and lower data and address registers, used by macw and msacw. */
3532 for (i
= 0; init_table
[i
].name
; i
++)
3533 insert_reg (init_table
[i
].name
, init_table
[i
].number
);
3536 static int no_68851
, no_68881
;
3539 /* a.out machine type. Default to 68020. */
3540 int m68k_aout_machtype
= 2;
3552 int shorts_this_frag
;
3555 /* In MRI mode, the instruction and operands are separated by a
3556 space. Anything following the operands is a comment. The label
3557 has already been removed. */
3565 for (s
= str
; *s
!= '\0'; s
++)
3567 if ((*s
== ' ' || *s
== '\t') && ! inquote
)
3585 inquote
= ! inquote
;
3590 memset ((char *) (&the_ins
), '\0', sizeof (the_ins
));
3595 for (n
= 0; n
< the_ins
.numargs
; n
++)
3596 if (the_ins
.operands
[n
].error
)
3598 er
= the_ins
.operands
[n
].error
;
3604 as_bad (_("%s -- statement `%s' ignored"), er
, str
);
3608 /* If there is a current label, record that it marks an instruction. */
3609 if (current_label
!= NULL
)
3611 current_label
->text
= 1;
3612 current_label
= NULL
;
3615 if (the_ins
.nfrag
== 0)
3617 /* No frag hacking involved; just put it out */
3618 toP
= frag_more (2 * the_ins
.numo
);
3619 fromP
= &the_ins
.opcode
[0];
3620 for (m
= the_ins
.numo
; m
; --m
)
3622 md_number_to_chars (toP
, (long) (*fromP
), 2);
3626 /* put out symbol-dependent info */
3627 for (m
= 0; m
< the_ins
.nrel
; m
++)
3629 switch (the_ins
.reloc
[m
].wid
)
3648 as_fatal (_("Don't know how to figure width of %c in md_assemble()"),
3649 the_ins
.reloc
[m
].wid
);
3652 fixP
= fix_new_exp (frag_now
,
3653 ((toP
- frag_now
->fr_literal
)
3654 - the_ins
.numo
* 2 + the_ins
.reloc
[m
].n
),
3656 &the_ins
.reloc
[m
].exp
,
3657 the_ins
.reloc
[m
].pcrel
,
3658 get_reloc_code (n
, the_ins
.reloc
[m
].pcrel
,
3659 the_ins
.reloc
[m
].pic_reloc
));
3660 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
3661 if (the_ins
.reloc
[m
].wid
== 'B')
3662 fixP
->fx_signed
= 1;
3667 /* There's some frag hacking */
3669 /* Calculate the max frag size. */
3672 wid
= 2 * the_ins
.fragb
[0].fragoff
;
3673 for (n
= 1; n
< the_ins
.nfrag
; n
++)
3674 wid
+= 2 * (the_ins
.numo
- the_ins
.fragb
[n
- 1].fragoff
);
3675 /* frag_var part. */
3677 /* Make sure the whole insn fits in one chunk, in particular that
3678 the var part is attached, as we access one byte before the
3679 variable frag for byte branches. */
3683 for (n
= 0, fromP
= &the_ins
.opcode
[0]; n
< the_ins
.nfrag
; n
++)
3688 wid
= 2 * the_ins
.fragb
[n
].fragoff
;
3690 wid
= 2 * (the_ins
.numo
- the_ins
.fragb
[n
- 1].fragoff
);
3691 toP
= frag_more (wid
);
3693 shorts_this_frag
= 0;
3694 for (m
= wid
/ 2; m
; --m
)
3696 md_number_to_chars (toP
, (long) (*fromP
), 2);
3701 for (m
= 0; m
< the_ins
.nrel
; m
++)
3703 if ((the_ins
.reloc
[m
].n
) >= 2 * shorts_this_frag
)
3705 the_ins
.reloc
[m
].n
-= 2 * shorts_this_frag
;
3708 wid
= the_ins
.reloc
[m
].wid
;
3711 the_ins
.reloc
[m
].wid
= 0;
3712 wid
= (wid
== 'b') ? 1 : (wid
== 'w') ? 2 : (wid
== 'l') ? 4 : 4000;
3714 fixP
= fix_new_exp (frag_now
,
3715 ((toP
- frag_now
->fr_literal
)
3716 - the_ins
.numo
* 2 + the_ins
.reloc
[m
].n
),
3718 &the_ins
.reloc
[m
].exp
,
3719 the_ins
.reloc
[m
].pcrel
,
3720 get_reloc_code (wid
, the_ins
.reloc
[m
].pcrel
,
3721 the_ins
.reloc
[m
].pic_reloc
));
3722 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
3724 (void) frag_var (rs_machine_dependent
, 10, 0,
3725 (relax_substateT
) (the_ins
.fragb
[n
].fragty
),
3726 the_ins
.fragb
[n
].fadd
, the_ins
.fragb
[n
].foff
, to_beg_P
);
3728 n
= (the_ins
.numo
- the_ins
.fragb
[n
- 1].fragoff
);
3729 shorts_this_frag
= 0;
3732 toP
= frag_more (n
* sizeof (short));
3735 md_number_to_chars (toP
, (long) (*fromP
), 2);
3741 for (m
= 0; m
< the_ins
.nrel
; m
++)
3745 wid
= the_ins
.reloc
[m
].wid
;
3748 the_ins
.reloc
[m
].wid
= 0;
3749 wid
= (wid
== 'b') ? 1 : (wid
== 'w') ? 2 : (wid
== 'l') ? 4 : 4000;
3751 fixP
= fix_new_exp (frag_now
,
3752 ((the_ins
.reloc
[m
].n
+ toP
- frag_now
->fr_literal
)
3753 - shorts_this_frag
* 2),
3755 &the_ins
.reloc
[m
].exp
,
3756 the_ins
.reloc
[m
].pcrel
,
3757 get_reloc_code (wid
, the_ins
.reloc
[m
].pcrel
,
3758 the_ins
.reloc
[m
].pic_reloc
));
3759 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
3767 * md_begin -- set up hash tables with 68000 instructions.
3768 * similar to what the vax assembler does. ---phr
3770 /* RMS claims the thing to do is take the m68k-opcode.h table, and make
3771 a copy of it at runtime, adding in the information we want but isn't
3772 there. I think it'd be better to have an awk script hack the table
3773 at compile time. Or even just xstr the table and use it as-is. But
3774 my lord ghod hath spoken, so we do it this way. Excuse the ugly var
3777 register const struct m68k_opcode
*ins
;
3778 register struct m68k_incant
*hack
, *slak
;
3779 register const char *retval
= 0; /* empty string, or error msg text */
3785 flag_reg_prefix_optional
= 1;
3787 if (! m68k_rel32_from_cmdline
)
3791 op_hash
= hash_new ();
3793 obstack_begin (&robyn
, 4000);
3794 for (i
= 0; i
< m68k_numopcodes
; i
++)
3796 hack
= slak
= (struct m68k_incant
*) obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3799 ins
= &m68k_opcodes
[i
];
3800 /* We *could* ignore insns that don't match our arch here
3801 but just leaving them out of the hash. */
3802 slak
->m_operands
= ins
->args
;
3803 slak
->m_opnum
= strlen (slak
->m_operands
) / 2;
3804 slak
->m_arch
= ins
->arch
;
3805 slak
->m_opcode
= ins
->opcode
;
3806 /* This is kludgey */
3807 slak
->m_codenum
= ((ins
->match
) & 0xffffL
) ? 2 : 1;
3808 if (i
+ 1 != m68k_numopcodes
3809 && !strcmp (ins
->name
, m68k_opcodes
[i
+ 1].name
))
3811 slak
->m_next
= (struct m68k_incant
*) obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3816 slak
= slak
->m_next
;
3820 retval
= hash_insert (op_hash
, ins
->name
, (char *) hack
);
3822 as_fatal (_("Internal Error: Can't hash %s: %s"), ins
->name
, retval
);
3825 for (i
= 0; i
< m68k_numaliases
; i
++)
3827 const char *name
= m68k_opcode_aliases
[i
].primary
;
3828 const char *alias
= m68k_opcode_aliases
[i
].alias
;
3829 PTR val
= hash_find (op_hash
, name
);
3831 as_fatal (_("Internal Error: Can't find %s in hash table"), name
);
3832 retval
= hash_insert (op_hash
, alias
, val
);
3834 as_fatal (_("Internal Error: Can't hash %s: %s"), alias
, retval
);
3837 /* In MRI mode, all unsized branches are variable sized. Normally,
3838 they are word sized. */
3841 static struct m68k_opcode_alias mri_aliases
[] =
3862 i
< (int) (sizeof mri_aliases
/ sizeof mri_aliases
[0]);
3865 const char *name
= mri_aliases
[i
].primary
;
3866 const char *alias
= mri_aliases
[i
].alias
;
3867 PTR val
= hash_find (op_hash
, name
);
3869 as_fatal (_("Internal Error: Can't find %s in hash table"), name
);
3870 retval
= hash_jam (op_hash
, alias
, val
);
3872 as_fatal (_("Internal Error: Can't hash %s: %s"), alias
, retval
);
3876 for (i
= 0; i
< (int) sizeof (mklower_table
); i
++)
3877 mklower_table
[i
] = (isupper (c
= (char) i
)) ? tolower (c
) : c
;
3879 for (i
= 0; i
< (int) sizeof (notend_table
); i
++)
3881 notend_table
[i
] = 0;
3882 alt_notend_table
[i
] = 0;
3884 notend_table
[','] = 1;
3885 notend_table
['{'] = 1;
3886 notend_table
['}'] = 1;
3887 alt_notend_table
['a'] = 1;
3888 alt_notend_table
['A'] = 1;
3889 alt_notend_table
['d'] = 1;
3890 alt_notend_table
['D'] = 1;
3891 alt_notend_table
['#'] = 1;
3892 alt_notend_table
['&'] = 1;
3893 alt_notend_table
['f'] = 1;
3894 alt_notend_table
['F'] = 1;
3895 #ifdef REGISTER_PREFIX
3896 alt_notend_table
[REGISTER_PREFIX
] = 1;
3899 /* We need to put '(' in alt_notend_table to handle
3900 cas2 %d0:%d2,%d3:%d4,(%a0):(%a1)
3902 alt_notend_table
['('] = 1;
3904 /* We need to put '@' in alt_notend_table to handle
3905 cas2 %d0:%d2,%d3:%d4,@(%d0):@(%d1)
3907 alt_notend_table
['@'] = 1;
3909 /* We need to put digits in alt_notend_table to handle
3910 bfextu %d0{24:1},%d0
3912 alt_notend_table
['0'] = 1;
3913 alt_notend_table
['1'] = 1;
3914 alt_notend_table
['2'] = 1;
3915 alt_notend_table
['3'] = 1;
3916 alt_notend_table
['4'] = 1;
3917 alt_notend_table
['5'] = 1;
3918 alt_notend_table
['6'] = 1;
3919 alt_notend_table
['7'] = 1;
3920 alt_notend_table
['8'] = 1;
3921 alt_notend_table
['9'] = 1;
3923 #ifndef MIT_SYNTAX_ONLY
3924 /* Insert pseudo ops, these have to go into the opcode table since
3925 gas expects pseudo ops to start with a dot */
3928 while (mote_pseudo_table
[n
].poc_name
)
3930 hack
= (struct m68k_incant
*)
3931 obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3932 hash_insert (op_hash
,
3933 mote_pseudo_table
[n
].poc_name
, (char *) hack
);
3934 hack
->m_operands
= 0;
3944 record_alignment (text_section
, 2);
3945 record_alignment (data_section
, 2);
3946 record_alignment (bss_section
, 2);
3951 select_control_regs ()
3953 /* Note which set of "movec" control registers is available. */
3954 switch (cpu_of_arch (current_architecture
))
3957 control_regs
= m68000_control_regs
;
3960 control_regs
= m68010_control_regs
;
3964 control_regs
= m68020_control_regs
;
3967 control_regs
= m68040_control_regs
;
3970 control_regs
= m68060_control_regs
;
3973 control_regs
= cpu32_control_regs
;
3979 control_regs
= mcf_control_regs
;
3987 m68k_init_after_args ()
3989 if (cpu_of_arch (current_architecture
) == 0)
3992 const char *default_cpu
= TARGET_CPU
;
3994 if (*default_cpu
== 'm')
3996 for (i
= 0; i
< n_archs
; i
++)
3997 if (strcasecmp (default_cpu
, archs
[i
].name
) == 0)
4001 as_bad (_("unrecognized default cpu `%s' ???"), TARGET_CPU
);
4002 current_architecture
|= m68020
;
4005 current_architecture
|= archs
[i
].arch
;
4007 /* Permit m68881 specification with all cpus; those that can't work
4008 with a coprocessor could be doing emulation. */
4009 if (current_architecture
& m68851
)
4011 if (current_architecture
& m68040
)
4013 as_warn (_("68040 and 68851 specified; mmu instructions may assemble incorrectly"));
4016 /* What other incompatibilities could we check for? */
4018 /* Toss in some default assumptions about coprocessors. */
4020 && (cpu_of_arch (current_architecture
)
4021 /* Can CPU32 have a 68881 coprocessor?? */
4022 & (m68020
| m68030
| cpu32
)))
4024 current_architecture
|= m68881
;
4027 && (cpu_of_arch (current_architecture
) & m68020up
) != 0
4028 && (cpu_of_arch (current_architecture
) & m68040up
) == 0)
4030 current_architecture
|= m68851
;
4032 if (no_68881
&& (current_architecture
& m68881
))
4033 as_bad (_("options for 68881 and no-68881 both given"));
4034 if (no_68851
&& (current_architecture
& m68851
))
4035 as_bad (_("options for 68851 and no-68851 both given"));
4038 /* Work out the magic number. This isn't very general. */
4039 if (current_architecture
& m68000
)
4040 m68k_aout_machtype
= 0;
4041 else if (current_architecture
& m68010
)
4042 m68k_aout_machtype
= 1;
4043 else if (current_architecture
& m68020
)
4044 m68k_aout_machtype
= 2;
4046 m68k_aout_machtype
= 2;
4049 /* Note which set of "movec" control registers is available. */
4050 select_control_regs ();
4052 if (cpu_of_arch (current_architecture
) < m68020
4053 || arch_coldfire_p (current_architecture
))
4054 md_relax_table
[TAB (PCINDEX
, BYTE
)].rlx_more
= 0;
4057 /* This is called when a label is defined. */
4060 m68k_frob_label (sym
)
4063 struct label_line
*n
;
4065 n
= (struct label_line
*) xmalloc (sizeof *n
);
4068 as_where (&n
->file
, &n
->line
);
4074 /* This is called when a value that is not an instruction is emitted. */
4077 m68k_flush_pending_output ()
4079 current_label
= NULL
;
4082 /* This is called at the end of the assembly, when the final value of
4083 the label is known. We warn if this is a text symbol aligned at an
4087 m68k_frob_symbol (sym
)
4090 if (S_GET_SEGMENT (sym
) == reg_section
4091 && (int) S_GET_VALUE (sym
) < 0)
4093 S_SET_SEGMENT (sym
, absolute_section
);
4094 S_SET_VALUE (sym
, ~(int)S_GET_VALUE (sym
));
4096 else if ((S_GET_VALUE (sym
) & 1) != 0)
4098 struct label_line
*l
;
4100 for (l
= labels
; l
!= NULL
; l
= l
->next
)
4102 if (l
->label
== sym
)
4105 as_warn_where (l
->file
, l
->line
,
4106 _("text label `%s' aligned to odd boundary"),
4114 /* This is called if we go in or out of MRI mode because of the .mri
4118 m68k_mri_mode_change (on
)
4123 if (! flag_reg_prefix_optional
)
4125 flag_reg_prefix_optional
= 1;
4126 #ifdef REGISTER_PREFIX
4131 if (! m68k_rel32_from_cmdline
)
4136 if (! reg_prefix_optional_seen
)
4138 #ifdef REGISTER_PREFIX_OPTIONAL
4139 flag_reg_prefix_optional
= REGISTER_PREFIX_OPTIONAL
;
4141 flag_reg_prefix_optional
= 0;
4143 #ifdef REGISTER_PREFIX
4148 if (! m68k_rel32_from_cmdline
)
4153 /* Equal to MAX_PRECISION in atof-ieee.c */
4154 #define MAX_LITTLENUMS 6
4156 /* Turn a string in input_line_pointer into a floating point constant
4157 of type TYPE, and store the appropriate bytes in *LITP. The number
4158 of LITTLENUMS emitted is stored in *SIZEP. An error message is
4159 returned, or NULL on OK. */
4162 md_atof (type
, litP
, sizeP
)
4168 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
4169 LITTLENUM_TYPE
*wordP
;
4200 return _("Bad call to MD_ATOF()");
4202 t
= atof_ieee (input_line_pointer
, type
, words
);
4204 input_line_pointer
= t
;
4206 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
4207 for (wordP
= words
; prec
--;)
4209 md_number_to_chars (litP
, (long) (*wordP
++), sizeof (LITTLENUM_TYPE
));
4210 litP
+= sizeof (LITTLENUM_TYPE
);
4216 md_number_to_chars (buf
, val
, n
)
4221 number_to_chars_bigendian (buf
, val
, n
);
4225 md_apply_fix_2 (fixP
, val
)
4229 addressT upper_limit
;
4230 offsetT lower_limit
;
4232 /* This is unnecessary but it convinces the native rs6000 compiler
4233 to generate the code we want. */
4234 char *buf
= fixP
->fx_frag
->fr_literal
;
4235 buf
+= fixP
->fx_where
;
4236 /* end ibm compiler workaround */
4238 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
4243 memset (buf
, 0, fixP
->fx_size
);
4244 fixP
->fx_addnumber
= val
; /* Remember value for emit_reloc */
4246 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
4247 && !S_IS_DEFINED (fixP
->fx_addsy
)
4248 && !S_IS_WEAK (fixP
->fx_addsy
))
4249 S_SET_WEAK (fixP
->fx_addsy
);
4254 #ifdef BFD_ASSEMBLER
4255 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
4256 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
4260 switch (fixP
->fx_size
)
4262 /* The cast to offsetT below are necessary to make code correct for
4263 machines where ints are smaller than offsetT */
4267 lower_limit
= - (offsetT
) 0x80;
4270 *buf
++ = (val
>> 8);
4272 upper_limit
= 0x7fff;
4273 lower_limit
= - (offsetT
) 0x8000;
4276 *buf
++ = (val
>> 24);
4277 *buf
++ = (val
>> 16);
4278 *buf
++ = (val
>> 8);
4280 upper_limit
= 0x7fffffff;
4281 lower_limit
= - (offsetT
) 0x7fffffff - 1; /* avoid constant overflow */
4284 BAD_CASE (fixP
->fx_size
);
4287 /* Fix up a negative reloc. */
4288 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_subsy
!= NULL
)
4290 fixP
->fx_addsy
= fixP
->fx_subsy
;
4291 fixP
->fx_subsy
= NULL
;
4295 /* For non-pc-relative values, it's conceivable we might get something
4296 like "0xff" for a byte field. So extend the upper part of the range
4297 to accept such numbers. We arbitrarily disallow "-0xff" or "0xff+0xff",
4298 so that we can do any range checking at all. */
4299 if (! fixP
->fx_pcrel
&& ! fixP
->fx_signed
)
4300 upper_limit
= upper_limit
* 2 + 1;
4302 if ((addressT
) val
> upper_limit
4303 && (val
> 0 || val
< lower_limit
))
4304 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("value out of range"));
4306 /* A one byte PC-relative reloc means a short branch. We can't use
4307 a short branch with a value of 0 or -1, because those indicate
4308 different opcodes (branches with longer offsets). fixup_segment
4309 in write.c may have clobbered fx_pcrel, so we need to examine the
4312 #ifdef BFD_ASSEMBLER
4313 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
4316 && fixP
->fx_size
== 1
4317 && (fixP
->fx_addsy
== NULL
4318 || S_IS_DEFINED (fixP
->fx_addsy
))
4319 && (val
== 0 || val
== -1))
4320 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("invalid byte branch offset"));
4323 #ifdef BFD_ASSEMBLER
4325 md_apply_fix (fixP
, valp
)
4329 md_apply_fix_2 (fixP
, (addressT
) *valp
);
4333 void md_apply_fix (fixP
, val
)
4337 md_apply_fix_2 (fixP
, (addressT
) val
);
4341 /* *fragP has been relaxed to its final size, and now needs to have
4342 the bytes inside it modified to conform to the new size There is UGLY
4346 md_convert_frag_1 (fragP
)
4347 register fragS
*fragP
;
4352 /* Address in object code of the displacement. */
4353 register int object_address
= fragP
->fr_fix
+ fragP
->fr_address
;
4355 /* Address in gas core of the place to store the displacement. */
4356 /* This convinces the native rs6000 compiler to generate the code we
4358 register char *buffer_address
= fragP
->fr_literal
;
4359 buffer_address
+= fragP
->fr_fix
;
4360 /* end ibm compiler workaround */
4362 /* The displacement of the address, from current location. */
4363 disp
= fragP
->fr_symbol
? S_GET_VALUE (fragP
->fr_symbol
) : 0;
4364 disp
= (disp
+ fragP
->fr_offset
) - object_address
;
4366 #ifdef BFD_ASSEMBLER
4367 disp
+= symbol_get_frag (fragP
->fr_symbol
)->fr_address
;
4370 switch (fragP
->fr_subtype
)
4372 case TAB (BRANCHBWL
, BYTE
):
4373 case TAB (BRABSJUNC
, BYTE
):
4374 case TAB (BRABSJCOND
, BYTE
):
4375 case TAB (BRANCHBW
, BYTE
):
4376 know (issbyte (disp
));
4378 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
4379 _("short branch with zero offset: use :w"));
4380 fixP
= fix_new (fragP
, fragP
->fr_fix
- 1, 1, fragP
->fr_symbol
,
4381 fragP
->fr_offset
, 1, RELAX_RELOC_PC8
);
4382 fixP
->fx_pcrel_adjust
= -1;
4384 case TAB (BRANCHBWL
, SHORT
):
4385 case TAB (BRABSJUNC
, SHORT
):
4386 case TAB (BRABSJCOND
, SHORT
):
4387 case TAB (BRANCHBW
, SHORT
):
4388 fragP
->fr_opcode
[1] = 0x00;
4389 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
4390 1, RELAX_RELOC_PC16
);
4393 case TAB (BRANCHBWL
, LONG
):
4394 fragP
->fr_opcode
[1] = (char) 0xFF;
4395 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
4396 1, RELAX_RELOC_PC32
);
4399 case TAB (BRABSJUNC
, LONG
):
4400 if (fragP
->fr_opcode
[0] == 0x61) /* jbsr */
4402 fragP
->fr_opcode
[0] = 0x4E;
4403 fragP
->fr_opcode
[1] = (char) 0xB9; /* JSR with ABSL LONG operand */
4404 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
4405 0, RELAX_RELOC_ABS32
);
4408 else if (fragP
->fr_opcode
[0] == 0x60) /* jbra */
4410 fragP
->fr_opcode
[0] = 0x4E;
4411 fragP
->fr_opcode
[1] = (char) 0xF9; /* JMP with ABSL LONG operand */
4412 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
4413 0, RELAX_RELOC_ABS32
);
4418 /* This cannot happen, because jbsr and jbra are the only two
4419 unconditional branches. */
4423 case TAB (BRABSJCOND
, LONG
):
4424 /* Only Bcc 68000 instructions can come here. */
4425 /* Change bcc into b!cc/jmp absl long. */
4427 fragP
->fr_opcode
[0] ^= 0x01; /* invert bcc */
4428 fragP
->fr_opcode
[1] = 0x6;/* branch offset = 6 */
4430 /* JF: these used to be fr_opcode[2,3], but they may be in a
4431 different frag, in which case refering to them is a no-no.
4432 Only fr_opcode[0,1] are guaranteed to work. */
4433 *buffer_address
++ = 0x4e; /* put in jmp long (0x4ef9) */
4434 *buffer_address
++ = (char) 0xf9;
4435 fragP
->fr_fix
+= 2; /* account for jmp instruction */
4436 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
4437 fragP
->fr_offset
, 0, RELAX_RELOC_ABS32
);
4440 case TAB (FBRANCH
, SHORT
):
4441 know ((fragP
->fr_opcode
[1] & 0x40) == 0);
4442 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
4443 1, RELAX_RELOC_PC16
);
4446 case TAB (FBRANCH
, LONG
):
4447 fragP
->fr_opcode
[1] |= 0x40; /* Turn on LONG bit */
4448 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
4449 1, RELAX_RELOC_PC32
);
4452 case TAB (DBCCLBR
, SHORT
):
4453 case TAB (DBCCABSJ
, SHORT
):
4454 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
4455 1, RELAX_RELOC_PC16
);
4458 case TAB (DBCCLBR
, LONG
):
4459 /* only DBcc instructions can come here */
4460 /* Change dbcc into dbcc/bral. */
4462 /* JF: these used to be fr_opcode[2-7], but that's wrong */
4463 *buffer_address
++ = 0x00; /* branch offset = 4 */
4464 *buffer_address
++ = 0x04;
4465 *buffer_address
++ = 0x60; /* put in bra pc+6 */
4466 *buffer_address
++ = 0x06;
4467 *buffer_address
++ = 0x60; /* Put in bral (0x60ff). */
4468 *buffer_address
++ = (char) 0xff;
4470 fragP
->fr_fix
+= 6; /* account for bra/jmp instructions */
4471 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
, 1,
4475 case TAB (DBCCABSJ
, LONG
):
4476 /* only DBcc instructions can come here */
4477 /* Change dbcc into dbcc/jmp. */
4479 /* JF: these used to be fr_opcode[2-7], but that's wrong */
4480 *buffer_address
++ = 0x00; /* branch offset = 4 */
4481 *buffer_address
++ = 0x04;
4482 *buffer_address
++ = 0x60; /* put in bra pc+6 */
4483 *buffer_address
++ = 0x06;
4484 *buffer_address
++ = 0x4e; /* Put in jmp long (0x4ef9). */
4485 *buffer_address
++ = (char) 0xf9;
4487 fragP
->fr_fix
+= 6; /* account for bra/jmp instructions */
4488 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
, 0,
4492 case TAB (PCREL1632
, SHORT
):
4493 fragP
->fr_opcode
[1] &= ~0x3F;
4494 fragP
->fr_opcode
[1] |= 0x3A; /* 072 - mode 7.2 */
4495 fix_new (fragP
, (int) (fragP
->fr_fix
), 2, fragP
->fr_symbol
,
4496 fragP
->fr_offset
, 1, RELAX_RELOC_PC16
);
4499 case TAB (PCREL1632
, LONG
):
4500 /* Already set to mode 7.3; this indicates: PC indirect with
4501 suppressed index, 32-bit displacement. */
4502 *buffer_address
++ = 0x01;
4503 *buffer_address
++ = 0x70;
4505 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
), 4, fragP
->fr_symbol
,
4506 fragP
->fr_offset
, 1, RELAX_RELOC_PC32
);
4507 fixP
->fx_pcrel_adjust
= 2;
4510 case TAB (PCINDEX
, BYTE
):
4511 assert (fragP
->fr_fix
>= 2);
4512 buffer_address
[-2] &= ~1;
4513 fixP
= fix_new (fragP
, fragP
->fr_fix
- 1, 1, fragP
->fr_symbol
,
4514 fragP
->fr_offset
, 1, RELAX_RELOC_PC8
);
4515 fixP
->fx_pcrel_adjust
= 1;
4517 case TAB (PCINDEX
, SHORT
):
4518 assert (fragP
->fr_fix
>= 2);
4519 buffer_address
[-2] |= 0x1;
4520 buffer_address
[-1] = 0x20;
4521 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
), 2, fragP
->fr_symbol
,
4522 fragP
->fr_offset
, 1, RELAX_RELOC_PC16
);
4523 fixP
->fx_pcrel_adjust
= 2;
4526 case TAB (PCINDEX
, LONG
):
4527 assert (fragP
->fr_fix
>= 2);
4528 buffer_address
[-2] |= 0x1;
4529 buffer_address
[-1] = 0x30;
4530 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
), 4, fragP
->fr_symbol
,
4531 fragP
->fr_offset
, 1, RELAX_RELOC_PC32
);
4532 fixP
->fx_pcrel_adjust
= 2;
4535 case TAB (ABSTOPCREL
, SHORT
):
4536 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
4537 1, RELAX_RELOC_PC16
);
4540 case TAB (ABSTOPCREL
, LONG
):
4541 /* The thing to do here is force it to ABSOLUTE LONG, since
4542 ABSTOPCREL is really trying to shorten an ABSOLUTE address anyway */
4543 if ((fragP
->fr_opcode
[1] & 0x3F) != 0x3A)
4545 fragP
->fr_opcode
[1] &= ~0x3F;
4546 fragP
->fr_opcode
[1] |= 0x39; /* Mode 7.1 */
4547 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
4548 0, RELAX_RELOC_ABS32
);
4554 #ifndef BFD_ASSEMBLER
4557 md_convert_frag (headers
, sec
, fragP
)
4558 object_headers
*headers ATTRIBUTE_UNUSED
;
4559 segT sec ATTRIBUTE_UNUSED
;
4562 md_convert_frag_1 (fragP
);
4568 md_convert_frag (abfd
, sec
, fragP
)
4569 bfd
*abfd ATTRIBUTE_UNUSED
;
4570 segT sec ATTRIBUTE_UNUSED
;
4573 md_convert_frag_1 (fragP
);
4577 /* Force truly undefined symbols to their maximum size, and generally set up
4578 the frag list to be relaxed
4581 md_estimate_size_before_relax (fragP
, segment
)
4582 register fragS
*fragP
;
4587 old_fix
= fragP
->fr_fix
;
4589 /* Handle SZ_UNDEF first, it can be changed to BYTE or SHORT. */
4590 switch (fragP
->fr_subtype
)
4592 case TAB (BRANCHBWL
, SZ_UNDEF
):
4593 case TAB (BRABSJUNC
, SZ_UNDEF
):
4594 case TAB (BRABSJCOND
, SZ_UNDEF
):
4596 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4597 && relaxable_symbol (fragP
->fr_symbol
))
4599 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), BYTE
);
4601 else if (flag_short_refs
)
4603 /* Symbol is undefined and we want short ref. */
4604 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), SHORT
);
4608 /* Symbol is still undefined. Make it LONG. */
4609 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), LONG
);
4614 case TAB (BRANCHBW
, SZ_UNDEF
):
4616 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4617 && relaxable_symbol (fragP
->fr_symbol
))
4619 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), BYTE
);
4623 /* Symbol is undefined and we don't have long branches. */
4624 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), SHORT
);
4629 case TAB (FBRANCH
, SZ_UNDEF
):
4630 case TAB (DBCCLBR
, SZ_UNDEF
):
4631 case TAB (DBCCABSJ
, SZ_UNDEF
):
4632 case TAB (PCREL1632
, SZ_UNDEF
):
4634 if ((S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4635 && relaxable_symbol (fragP
->fr_symbol
))
4638 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), SHORT
);
4642 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), LONG
);
4647 case TAB (PCINDEX
, SZ_UNDEF
):
4648 if ((S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4649 && relaxable_symbol (fragP
->fr_symbol
)))
4651 fragP
->fr_subtype
= TAB (PCINDEX
, BYTE
);
4655 fragP
->fr_subtype
= TAB (PCINDEX
, LONG
);
4659 case TAB (ABSTOPCREL
, SZ_UNDEF
):
4661 if ((S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4662 && relaxable_symbol (fragP
->fr_symbol
)))
4664 fragP
->fr_subtype
= TAB (ABSTOPCREL
, SHORT
);
4668 fragP
->fr_subtype
= TAB (ABSTOPCREL
, LONG
);
4677 /* Now that SZ_UNDEF are taken care of, check others. */
4678 switch (fragP
->fr_subtype
)
4680 case TAB (BRANCHBWL
, BYTE
):
4681 case TAB (BRABSJUNC
, BYTE
):
4682 case TAB (BRABSJCOND
, BYTE
):
4683 case TAB (BRANCHBW
, BYTE
):
4684 /* We can't do a short jump to the next instruction, so in that
4685 case we force word mode. At this point S_GET_VALUE should
4686 return the offset of the symbol within its frag. If the
4687 symbol is at the start of a frag, and it is the next frag
4688 with any data in it (usually this is just the next frag, but
4689 assembler listings may introduce empty frags), we must use
4691 if (fragP
->fr_symbol
&& S_GET_VALUE (fragP
->fr_symbol
) == 0)
4696 stop
= symbol_get_frag (fragP
->fr_symbol
);
4698 for (l
= fragP
->fr_next
; l
!= stop
; l
= l
->fr_next
)
4700 /* Catch empty alignment frags whoes fr_offset field
4701 is an alignment requirement of 2 bytes. The check
4702 below will misinterpret this as evidence that real
4703 code exists between the symbol and the instruction
4704 and so will not convert the short jump into a word
4708 && (l
->fr_type
== rs_align
|| l
->fr_type
== rs_align_code
))
4711 if (l
->fr_fix
+ l
->fr_var
!= 0)
4715 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), SHORT
);
4721 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
4722 return fragP
->fr_var
+ fragP
->fr_fix
- old_fix
;
4725 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
4726 /* the bit-field entries in the relocation_info struct plays hell
4727 with the byte-order problems of cross-assembly. So as a hack,
4728 I added this mach. dependent ri twiddler. Ugly, but it gets
4730 /* on m68k: first 4 bytes are normal unsigned long, next three bytes
4731 are symbolnum, most sig. byte first. Last byte is broken up with
4732 bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
4733 nibble as nuthin. (on Sun 3 at least) */
4734 /* Translate the internal relocation information into target-specific
4738 md_ri_to_chars (the_bytes
, ri
)
4740 struct reloc_info_generic
*ri
;
4743 md_number_to_chars (the_bytes
, ri
->r_address
, 4);
4744 /* now the fun stuff */
4745 the_bytes
[4] = (ri
->r_symbolnum
>> 16) & 0x0ff;
4746 the_bytes
[5] = (ri
->r_symbolnum
>> 8) & 0x0ff;
4747 the_bytes
[6] = ri
->r_symbolnum
& 0x0ff;
4748 the_bytes
[7] = (((ri
->r_pcrel
<< 7) & 0x80) | ((ri
->r_length
<< 5) & 0x60) |
4749 ((ri
->r_extern
<< 4) & 0x10));
4752 #endif /* comment */
4754 #ifndef BFD_ASSEMBLER
4756 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
4759 relax_addressT segment_address_in_file
;
4762 * In: length of relocation (or of address) in chars: 1, 2 or 4.
4763 * Out: GNU LD relocation length code: 0, 1, or 2.
4766 static CONST
unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
4769 know (fixP
->fx_addsy
!= NULL
);
4771 md_number_to_chars (where
,
4772 fixP
->fx_frag
->fr_address
+ fixP
->fx_where
- segment_address_in_file
,
4775 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
4776 ? S_GET_TYPE (fixP
->fx_addsy
)
4777 : fixP
->fx_addsy
->sy_number
);
4779 where
[4] = (r_symbolnum
>> 16) & 0x0ff;
4780 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
4781 where
[6] = r_symbolnum
& 0x0ff;
4782 where
[7] = (((fixP
->fx_pcrel
<< 7) & 0x80) | ((nbytes_r_length
[fixP
->fx_size
] << 5) & 0x60) |
4783 (((!S_IS_DEFINED (fixP
->fx_addsy
)) << 4) & 0x10));
4787 #endif /* OBJ_AOUT or OBJ_BOUT */
4789 #ifndef WORKING_DOT_WORD
4790 CONST
int md_short_jump_size
= 4;
4791 CONST
int md_long_jump_size
= 6;
4794 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
4796 addressT from_addr
, to_addr
;
4797 fragS
*frag ATTRIBUTE_UNUSED
;
4798 symbolS
*to_symbol ATTRIBUTE_UNUSED
;
4802 offset
= to_addr
- (from_addr
+ 2);
4804 md_number_to_chars (ptr
, (valueT
) 0x6000, 2);
4805 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 2);
4809 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
4811 addressT from_addr
, to_addr
;
4817 if (!HAVE_LONG_BRANCH(current_architecture
))
4819 offset
= to_addr
- S_GET_VALUE (to_symbol
);
4820 md_number_to_chars (ptr
, (valueT
) 0x4EF9, 2);
4821 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 4);
4822 fix_new (frag
, (ptr
+ 2) - frag
->fr_literal
, 4, to_symbol
, (offsetT
) 0,
4827 offset
= to_addr
- (from_addr
+ 2);
4828 md_number_to_chars (ptr
, (valueT
) 0x60ff, 2);
4829 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 4);
4835 /* Different values of OK tell what its OK to return. Things that
4836 aren't OK are an error (what a shock, no?)
4839 10: Absolute 1:8 only
4840 20: Absolute 0:7 only
4841 30: absolute 0:15 only
4842 40: Absolute 0:31 only
4843 50: absolute 0:127 only
4844 55: absolute -64:63 only
4845 60: absolute -128:127 only
4846 70: absolute 0:4095 only
4853 struct m68k_exp
*exp
;
4856 if (exp
->exp
.X_op
== O_absent
)
4858 /* Do the same thing the VAX asm does */
4859 op (exp
) = O_constant
;
4865 as_warn (_("expression out of range: defaulting to 1"));
4869 else if (exp
->exp
.X_op
== O_constant
)
4874 if (offs (exp
) < 1 || offs (exp
) > 8)
4876 as_warn (_("expression out of range: defaulting to 1"));
4881 if (offs (exp
) < 0 || offs (exp
) > 7)
4885 if (offs (exp
) < 0 || offs (exp
) > 15)
4889 if (offs (exp
) < 0 || offs (exp
) > 32)
4893 if (offs (exp
) < 0 || offs (exp
) > 127)
4897 if (offs (exp
) < -64 || offs (exp
) > 63)
4901 if (offs (exp
) < -128 || offs (exp
) > 127)
4905 if (offs (exp
) < 0 || offs (exp
) > 4095)
4908 as_warn (_("expression out of range: defaulting to 0"));
4916 else if (exp
->exp
.X_op
== O_big
)
4918 if (offs (exp
) <= 0 /* flonum */
4919 && (ok
== 80 /* no bignums */
4920 || (ok
> 10 /* small-int ranges including 0 ok */
4921 /* If we have a flonum zero, a zero integer should
4922 do as well (e.g., in moveq). */
4923 && generic_floating_point_number
.exponent
== 0
4924 && generic_floating_point_number
.low
[0] == 0)))
4926 /* HACK! Turn it into a long */
4927 LITTLENUM_TYPE words
[6];
4929 gen_to_words (words
, 2, 8L); /* These numbers are magic! */
4930 op (exp
) = O_constant
;
4933 offs (exp
) = words
[1] | (words
[0] << 16);
4937 op (exp
) = O_constant
;
4940 offs (exp
) = (ok
== 10) ? 1 : 0;
4941 as_warn (_("Can't deal with expression; defaulting to %ld"),
4947 if (ok
>= 10 && ok
<= 70)
4949 op (exp
) = O_constant
;
4952 offs (exp
) = (ok
== 10) ? 1 : 0;
4953 as_warn (_("Can't deal with expression; defaulting to %ld"),
4958 if (exp
->size
!= SIZE_UNSPEC
)
4966 if (!isbyte (offs (exp
)))
4967 as_warn (_("expression doesn't fit in BYTE"));
4970 if (!isword (offs (exp
)))
4971 as_warn (_("expression doesn't fit in WORD"));
4979 /* These are the back-ends for the various machine dependent pseudo-ops. */
4983 int ignore ATTRIBUTE_UNUSED
;
4985 subseg_set (data_section
, 1);
4986 demand_empty_rest_of_line ();
4991 int ignore ATTRIBUTE_UNUSED
;
4993 subseg_set (data_section
, 2);
4994 demand_empty_rest_of_line ();
4999 int ignore ATTRIBUTE_UNUSED
;
5001 /* We don't support putting frags in the BSS segment, we fake it
5002 by marking in_bss, then looking at s_skip for clues. */
5004 subseg_set (bss_section
, 0);
5005 demand_empty_rest_of_line ();
5010 int ignore ATTRIBUTE_UNUSED
;
5013 register long temp_fill
;
5015 temp
= 1; /* JF should be 2? */
5016 temp_fill
= get_absolute_expression ();
5017 if (!need_pass_2
) /* Never make frag if expect extra pass. */
5018 frag_align (temp
, (int) temp_fill
, 0);
5019 demand_empty_rest_of_line ();
5020 record_alignment (now_seg
, temp
);
5025 int ignore ATTRIBUTE_UNUSED
;
5027 demand_empty_rest_of_line ();
5030 /* Pseudo-ops handled for MRI compatibility. */
5032 /* This function returns non-zero if the argument is a conditional
5033 pseudo-op. This is called when checking whether a pending
5034 alignment is needed. */
5037 m68k_conditional_pseudoop (pop
)
5040 return (pop
->poc_handler
== s_mri_if
5041 || pop
->poc_handler
== s_mri_else
);
5044 /* Handle an MRI style chip specification. */
5053 s
= input_line_pointer
;
5054 /* We can't use get_symbol_end since the processor names are not proper
5056 while (is_part_of_name (c
= *input_line_pointer
++))
5058 *--input_line_pointer
= 0;
5059 for (i
= 0; i
< n_archs
; i
++)
5060 if (strcasecmp (s
, archs
[i
].name
) == 0)
5064 as_bad (_("%s: unrecognized processor name"), s
);
5065 *input_line_pointer
= c
;
5066 ignore_rest_of_line ();
5069 *input_line_pointer
= c
;
5071 if (*input_line_pointer
== '/')
5072 current_architecture
= 0;
5074 current_architecture
&= m68881
| m68851
;
5075 current_architecture
|= archs
[i
].arch
;
5077 while (*input_line_pointer
== '/')
5079 ++input_line_pointer
;
5080 s
= input_line_pointer
;
5081 /* We can't use get_symbol_end since the processor names are not
5083 while (is_part_of_name (c
= *input_line_pointer
++))
5085 *--input_line_pointer
= 0;
5086 if (strcmp (s
, "68881") == 0)
5087 current_architecture
|= m68881
;
5088 else if (strcmp (s
, "68851") == 0)
5089 current_architecture
|= m68851
;
5090 *input_line_pointer
= c
;
5093 /* Update info about available control registers. */
5094 select_control_regs ();
5097 /* The MRI CHIP pseudo-op. */
5101 int ignore ATTRIBUTE_UNUSED
;
5107 stop
= mri_comment_field (&stopc
);
5110 mri_comment_end (stop
, stopc
);
5111 demand_empty_rest_of_line ();
5114 /* The MRI FOPT pseudo-op. */
5118 int ignore ATTRIBUTE_UNUSED
;
5122 if (strncasecmp (input_line_pointer
, "ID=", 3) == 0)
5126 input_line_pointer
+= 3;
5127 temp
= get_absolute_expression ();
5128 if (temp
< 0 || temp
> 7)
5129 as_bad (_("bad coprocessor id"));
5131 m68k_float_copnum
= COP0
+ temp
;
5135 as_bad (_("unrecognized fopt option"));
5136 ignore_rest_of_line ();
5140 demand_empty_rest_of_line ();
5143 /* The structure used to handle the MRI OPT pseudo-op. */
5147 /* The name of the option. */
5150 /* If this is not NULL, just call this function. The first argument
5151 is the ARG field of this structure, the second argument is
5152 whether the option was negated. */
5153 void (*pfn
) PARAMS ((int arg
, int on
));
5155 /* If this is not NULL, and the PFN field is NULL, set the variable
5156 this points to. Set it to the ARG field if the option was not
5157 negated, and the NOTARG field otherwise. */
5160 /* The value to pass to PFN or to assign to *PVAR. */
5163 /* The value to assign to *PVAR if the option is negated. If PFN is
5164 NULL, and PVAR is not NULL, and ARG and NOTARG are the same, then
5165 the option may not be negated. */
5169 /* The table used to handle the MRI OPT pseudo-op. */
5171 static void skip_to_comma
PARAMS ((int, int));
5172 static void opt_nest
PARAMS ((int, int));
5173 static void opt_chip
PARAMS ((int, int));
5174 static void opt_list
PARAMS ((int, int));
5175 static void opt_list_symbols
PARAMS ((int, int));
5177 static const struct opt_action opt_table
[] =
5179 { "abspcadd", 0, &m68k_abspcadd
, 1, 0 },
5181 /* We do relaxing, so there is little use for these options. */
5182 { "b", 0, 0, 0, 0 },
5183 { "brs", 0, 0, 0, 0 },
5184 { "brb", 0, 0, 0, 0 },
5185 { "brl", 0, 0, 0, 0 },
5186 { "brw", 0, 0, 0, 0 },
5188 { "c", 0, 0, 0, 0 },
5189 { "cex", 0, 0, 0, 0 },
5190 { "case", 0, &symbols_case_sensitive
, 1, 0 },
5191 { "cl", 0, 0, 0, 0 },
5192 { "cre", 0, 0, 0, 0 },
5193 { "d", 0, &flag_keep_locals
, 1, 0 },
5194 { "e", 0, 0, 0, 0 },
5195 { "f", 0, &flag_short_refs
, 1, 0 },
5196 { "frs", 0, &flag_short_refs
, 1, 0 },
5197 { "frl", 0, &flag_short_refs
, 0, 1 },
5198 { "g", 0, 0, 0, 0 },
5199 { "i", 0, 0, 0, 0 },
5200 { "m", 0, 0, 0, 0 },
5201 { "mex", 0, 0, 0, 0 },
5202 { "mc", 0, 0, 0, 0 },
5203 { "md", 0, 0, 0, 0 },
5204 { "nest", opt_nest
, 0, 0, 0 },
5205 { "next", skip_to_comma
, 0, 0, 0 },
5206 { "o", 0, 0, 0, 0 },
5207 { "old", 0, 0, 0, 0 },
5208 { "op", skip_to_comma
, 0, 0, 0 },
5209 { "pco", 0, 0, 0, 0 },
5210 { "p", opt_chip
, 0, 0, 0 },
5211 { "pcr", 0, 0, 0, 0 },
5212 { "pcs", 0, 0, 0, 0 },
5213 { "r", 0, 0, 0, 0 },
5214 { "quick", 0, &m68k_quick
, 1, 0 },
5215 { "rel32", 0, &m68k_rel32
, 1, 0 },
5216 { "s", opt_list
, 0, 0, 0 },
5217 { "t", opt_list_symbols
, 0, 0, 0 },
5218 { "w", 0, &flag_no_warnings
, 0, 1 },
5222 #define OPTCOUNT ((int) (sizeof opt_table / sizeof opt_table[0]))
5224 /* The MRI OPT pseudo-op. */
5228 int ignore ATTRIBUTE_UNUSED
;
5236 const struct opt_action
*o
;
5241 if (*input_line_pointer
== '-')
5243 ++input_line_pointer
;
5246 else if (strncasecmp (input_line_pointer
, "NO", 2) == 0)
5248 input_line_pointer
+= 2;
5252 s
= input_line_pointer
;
5253 c
= get_symbol_end ();
5255 for (i
= 0, o
= opt_table
; i
< OPTCOUNT
; i
++, o
++)
5257 if (strcasecmp (s
, o
->name
) == 0)
5261 /* Restore input_line_pointer now in case the option
5263 *input_line_pointer
= c
;
5264 (*o
->pfn
) (o
->arg
, t
);
5266 else if (o
->pvar
!= NULL
)
5268 if (! t
&& o
->arg
== o
->notarg
)
5269 as_bad (_("option `%s' may not be negated"), s
);
5270 *input_line_pointer
= c
;
5271 *o
->pvar
= t
? o
->arg
: o
->notarg
;
5274 *input_line_pointer
= c
;
5280 as_bad (_("option `%s' not recognized"), s
);
5281 *input_line_pointer
= c
;
5284 while (*input_line_pointer
++ == ',');
5286 /* Move back to terminating character. */
5287 --input_line_pointer
;
5288 demand_empty_rest_of_line ();
5291 /* Skip ahead to a comma. This is used for OPT options which we do
5292 not suppor tand which take arguments. */
5295 skip_to_comma (arg
, on
)
5296 int arg ATTRIBUTE_UNUSED
;
5297 int on ATTRIBUTE_UNUSED
;
5299 while (*input_line_pointer
!= ','
5300 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
5301 ++input_line_pointer
;
5304 /* Handle the OPT NEST=depth option. */
5308 int arg ATTRIBUTE_UNUSED
;
5309 int on ATTRIBUTE_UNUSED
;
5311 if (*input_line_pointer
!= '=')
5313 as_bad (_("bad format of OPT NEST=depth"));
5317 ++input_line_pointer
;
5318 max_macro_nest
= get_absolute_expression ();
5321 /* Handle the OPT P=chip option. */
5325 int arg ATTRIBUTE_UNUSED
;
5326 int on ATTRIBUTE_UNUSED
;
5328 if (*input_line_pointer
!= '=')
5330 /* This is just OPT P, which we do not support. */
5334 ++input_line_pointer
;
5338 /* Handle the OPT S option. */
5342 int arg ATTRIBUTE_UNUSED
;
5348 /* Handle the OPT T option. */
5351 opt_list_symbols (arg
, on
)
5352 int arg ATTRIBUTE_UNUSED
;
5356 listing
|= LISTING_SYMBOLS
;
5358 listing
&=~ LISTING_SYMBOLS
;
5361 /* Handle the MRI REG pseudo-op. */
5365 int ignore ATTRIBUTE_UNUSED
;
5374 if (line_label
== NULL
)
5376 as_bad (_("missing label"));
5377 ignore_rest_of_line ();
5382 stop
= mri_comment_field (&stopc
);
5386 s
= input_line_pointer
;
5387 while (isalnum ((unsigned char) *input_line_pointer
)
5388 #ifdef REGISTER_PREFIX
5389 || *input_line_pointer
== REGISTER_PREFIX
5391 || *input_line_pointer
== '/'
5392 || *input_line_pointer
== '-')
5393 ++input_line_pointer
;
5394 c
= *input_line_pointer
;
5395 *input_line_pointer
= '\0';
5397 if (m68k_ip_op (s
, &rop
) != 0)
5399 if (rop
.error
== NULL
)
5400 as_bad (_("bad register list"));
5402 as_bad (_("bad register list: %s"), rop
.error
);
5403 *input_line_pointer
= c
;
5404 ignore_rest_of_line ();
5408 *input_line_pointer
= c
;
5410 if (rop
.mode
== REGLST
)
5412 else if (rop
.mode
== DREG
)
5413 mask
= 1 << (rop
.reg
- DATA0
);
5414 else if (rop
.mode
== AREG
)
5415 mask
= 1 << (rop
.reg
- ADDR0
+ 8);
5416 else if (rop
.mode
== FPREG
)
5417 mask
= 1 << (rop
.reg
- FP0
+ 16);
5418 else if (rop
.mode
== CONTROL
5421 else if (rop
.mode
== CONTROL
5424 else if (rop
.mode
== CONTROL
5429 as_bad (_("bad register list"));
5430 ignore_rest_of_line ();
5434 S_SET_SEGMENT (line_label
, reg_section
);
5435 S_SET_VALUE (line_label
, ~mask
);
5436 symbol_set_frag (line_label
, &zero_address_frag
);
5439 mri_comment_end (stop
, stopc
);
5441 demand_empty_rest_of_line ();
5444 /* This structure is used for the MRI SAVE and RESTORE pseudo-ops. */
5448 struct save_opts
*next
;
5450 int symbols_case_sensitive
;
5458 /* FIXME: We don't save OPT S. */
5461 /* This variable holds the stack of saved options. */
5463 static struct save_opts
*save_stack
;
5465 /* The MRI SAVE pseudo-op. */
5469 int ignore ATTRIBUTE_UNUSED
;
5471 struct save_opts
*s
;
5473 s
= (struct save_opts
*) xmalloc (sizeof (struct save_opts
));
5474 s
->abspcadd
= m68k_abspcadd
;
5475 s
->symbols_case_sensitive
= symbols_case_sensitive
;
5476 s
->keep_locals
= flag_keep_locals
;
5477 s
->short_refs
= flag_short_refs
;
5478 s
->architecture
= current_architecture
;
5479 s
->quick
= m68k_quick
;
5480 s
->rel32
= m68k_rel32
;
5481 s
->listing
= listing
;
5482 s
->no_warnings
= flag_no_warnings
;
5484 s
->next
= save_stack
;
5487 demand_empty_rest_of_line ();
5490 /* The MRI RESTORE pseudo-op. */
5494 int ignore ATTRIBUTE_UNUSED
;
5496 struct save_opts
*s
;
5498 if (save_stack
== NULL
)
5500 as_bad (_("restore without save"));
5501 ignore_rest_of_line ();
5506 save_stack
= s
->next
;
5508 m68k_abspcadd
= s
->abspcadd
;
5509 symbols_case_sensitive
= s
->symbols_case_sensitive
;
5510 flag_keep_locals
= s
->keep_locals
;
5511 flag_short_refs
= s
->short_refs
;
5512 current_architecture
= s
->architecture
;
5513 m68k_quick
= s
->quick
;
5514 m68k_rel32
= s
->rel32
;
5515 listing
= s
->listing
;
5516 flag_no_warnings
= s
->no_warnings
;
5520 demand_empty_rest_of_line ();
5523 /* Types of MRI structured control directives. */
5525 enum mri_control_type
5533 /* This structure is used to stack the MRI structured control
5536 struct mri_control_info
5538 /* The directive within which this one is enclosed. */
5539 struct mri_control_info
*outer
;
5541 /* The type of directive. */
5542 enum mri_control_type type
;
5544 /* Whether an ELSE has been in an IF. */
5547 /* The add or sub statement at the end of a FOR. */
5550 /* The label of the top of a FOR or REPEAT loop. */
5553 /* The label to jump to for the next iteration, or the else
5554 expression of a conditional. */
5557 /* The label to jump to to break out of the loop, or the label past
5558 the end of a conditional. */
5562 /* The stack of MRI structured control directives. */
5564 static struct mri_control_info
*mri_control_stack
;
5566 /* The current MRI structured control directive index number, used to
5567 generate label names. */
5569 static int mri_control_index
;
5571 /* Some function prototypes. */
5573 static void mri_assemble
PARAMS ((char *));
5574 static char *mri_control_label
PARAMS ((void));
5575 static struct mri_control_info
*push_mri_control
5576 PARAMS ((enum mri_control_type
));
5577 static void pop_mri_control
PARAMS ((void));
5578 static int parse_mri_condition
PARAMS ((int *));
5579 static int parse_mri_control_operand
5580 PARAMS ((int *, char **, char **, char **, char **));
5581 static int swap_mri_condition
PARAMS ((int));
5582 static int reverse_mri_condition
PARAMS ((int));
5583 static void build_mri_control_operand
5584 PARAMS ((int, int, char *, char *, char *, char *, const char *,
5585 const char *, int));
5586 static void parse_mri_control_expression
5587 PARAMS ((char *, int, const char *, const char *, int));
5589 /* Assemble an instruction for an MRI structured control directive. */
5597 /* md_assemble expects the opcode to be in lower case. */
5598 for (s
= str
; *s
!= ' ' && *s
!= '\0'; s
++)
5600 if (isupper ((unsigned char) *s
))
5601 *s
= tolower ((unsigned char) *s
);
5607 /* Generate a new MRI label structured control directive label name. */
5610 mri_control_label ()
5614 n
= (char *) xmalloc (20);
5615 sprintf (n
, "%smc%d", FAKE_LABEL_NAME
, mri_control_index
);
5616 ++mri_control_index
;
5620 /* Create a new MRI structured control directive. */
5622 static struct mri_control_info
*
5623 push_mri_control (type
)
5624 enum mri_control_type type
;
5626 struct mri_control_info
*n
;
5628 n
= (struct mri_control_info
*) xmalloc (sizeof (struct mri_control_info
));
5632 if (type
== mri_if
|| type
== mri_while
)
5635 n
->top
= mri_control_label ();
5636 n
->next
= mri_control_label ();
5637 n
->bottom
= mri_control_label ();
5639 n
->outer
= mri_control_stack
;
5640 mri_control_stack
= n
;
5645 /* Pop off the stack of MRI structured control directives. */
5650 struct mri_control_info
*n
;
5652 n
= mri_control_stack
;
5653 mri_control_stack
= n
->outer
;
5661 /* Recognize a condition code in an MRI structured control expression. */
5664 parse_mri_condition (pcc
)
5669 know (*input_line_pointer
== '<');
5671 ++input_line_pointer
;
5672 c1
= *input_line_pointer
++;
5673 c2
= *input_line_pointer
++;
5675 if (*input_line_pointer
!= '>')
5677 as_bad (_("syntax error in structured control directive"));
5681 ++input_line_pointer
;
5689 *pcc
= (c1
<< 8) | c2
;
5694 /* Parse a single operand in an MRI structured control expression. */
5697 parse_mri_control_operand (pcc
, leftstart
, leftstop
, rightstart
, rightstop
)
5714 if (*input_line_pointer
== '<')
5716 /* It's just a condition code. */
5717 return parse_mri_condition (pcc
);
5720 /* Look ahead for the condition code. */
5721 for (s
= input_line_pointer
; *s
!= '\0'; ++s
)
5723 if (*s
== '<' && s
[1] != '\0' && s
[2] != '\0' && s
[3] == '>')
5728 as_bad (_("missing condition code in structured control directive"));
5732 *leftstart
= input_line_pointer
;
5734 if (*leftstop
> *leftstart
5735 && ((*leftstop
)[-1] == ' ' || (*leftstop
)[-1] == '\t'))
5738 input_line_pointer
= s
;
5739 if (! parse_mri_condition (pcc
))
5742 /* Look ahead for AND or OR or end of line. */
5743 for (s
= input_line_pointer
; *s
!= '\0'; ++s
)
5745 /* We must make sure we don't misinterpret AND/OR at the end of labels!
5746 if d0 <eq> #FOOAND and d1 <ne> #BAROR then
5748 if ( ( s
== input_line_pointer
5751 && ( ( strncasecmp (s
, "AND", 3) == 0
5752 && (s
[3] == '.' || ! is_part_of_name (s
[3])))
5753 || ( strncasecmp (s
, "OR", 2) == 0
5754 && (s
[2] == '.' || ! is_part_of_name (s
[2])))))
5758 *rightstart
= input_line_pointer
;
5760 if (*rightstop
> *rightstart
5761 && ((*rightstop
)[-1] == ' ' || (*rightstop
)[-1] == '\t'))
5764 input_line_pointer
= s
;
5769 #define MCC(b1, b2) (((b1) << 8) | (b2))
5771 /* Swap the sense of a condition. This changes the condition so that
5772 it generates the same result when the operands are swapped. */
5775 swap_mri_condition (cc
)
5780 case MCC ('h', 'i'): return MCC ('c', 's');
5781 case MCC ('l', 's'): return MCC ('c', 'c');
5782 /* <HS> is an alias for <CC> */
5783 case MCC ('h', 's'):
5784 case MCC ('c', 'c'): return MCC ('l', 's');
5785 /* <LO> is an alias for <CS> */
5786 case MCC ('l', 'o'):
5787 case MCC ('c', 's'): return MCC ('h', 'i');
5788 case MCC ('p', 'l'): return MCC ('m', 'i');
5789 case MCC ('m', 'i'): return MCC ('p', 'l');
5790 case MCC ('g', 'e'): return MCC ('l', 'e');
5791 case MCC ('l', 't'): return MCC ('g', 't');
5792 case MCC ('g', 't'): return MCC ('l', 't');
5793 case MCC ('l', 'e'): return MCC ('g', 'e');
5794 /* issue a warning for conditions we can not swap */
5795 case MCC ('n', 'e'): return MCC ('n', 'e'); // no problem here
5796 case MCC ('e', 'q'): return MCC ('e', 'q'); // also no problem
5797 case MCC ('v', 'c'):
5798 case MCC ('v', 's'):
5800 as_warn (_("Condition <%c%c> in structured control directive can not be encoded correctly"),
5801 (char) (cc
>> 8), (char) (cc
));
5807 /* Reverse the sense of a condition. */
5810 reverse_mri_condition (cc
)
5815 case MCC ('h', 'i'): return MCC ('l', 's');
5816 case MCC ('l', 's'): return MCC ('h', 'i');
5817 /* <HS> is an alias for <CC> */
5818 case MCC ('h', 's'): return MCC ('l', 'o');
5819 case MCC ('c', 'c'): return MCC ('c', 's');
5820 /* <LO> is an alias for <CS> */
5821 case MCC ('l', 'o'): return MCC ('h', 's');
5822 case MCC ('c', 's'): return MCC ('c', 'c');
5823 case MCC ('n', 'e'): return MCC ('e', 'q');
5824 case MCC ('e', 'q'): return MCC ('n', 'e');
5825 case MCC ('v', 'c'): return MCC ('v', 's');
5826 case MCC ('v', 's'): return MCC ('v', 'c');
5827 case MCC ('p', 'l'): return MCC ('m', 'i');
5828 case MCC ('m', 'i'): return MCC ('p', 'l');
5829 case MCC ('g', 'e'): return MCC ('l', 't');
5830 case MCC ('l', 't'): return MCC ('g', 'e');
5831 case MCC ('g', 't'): return MCC ('l', 'e');
5832 case MCC ('l', 'e'): return MCC ('g', 't');
5837 /* Build an MRI structured control expression. This generates test
5838 and branch instructions. It goes to TRUELAB if the condition is
5839 true, and to FALSELAB if the condition is false. Exactly one of
5840 TRUELAB and FALSELAB will be NULL, meaning to fall through. QUAL
5841 is the size qualifier for the expression. EXTENT is the size to
5842 use for the branch. */
5845 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5846 rightstop
, truelab
, falselab
, extent
)
5853 const char *truelab
;
5854 const char *falselab
;
5860 if (leftstart
!= NULL
)
5862 struct m68k_op leftop
, rightop
;
5865 /* Swap the compare operands, if necessary, to produce a legal
5866 m68k compare instruction. Comparing a register operand with
5867 a non-register operand requires the register to be on the
5868 right (cmp, cmpa). Comparing an immediate value with
5869 anything requires the immediate value to be on the left
5874 (void) m68k_ip_op (leftstart
, &leftop
);
5879 (void) m68k_ip_op (rightstart
, &rightop
);
5882 if (rightop
.mode
== IMMED
5883 || ((leftop
.mode
== DREG
|| leftop
.mode
== AREG
)
5884 && (rightop
.mode
!= DREG
&& rightop
.mode
!= AREG
)))
5888 /* Correct conditional handling:
5889 if #1 <lt> d0 then ;means if (1 < d0)
5895 cmp #1,d0 if we do *not* swap the operands
5896 bgt true we need the swapped condition!
5903 leftstart
= rightstart
;
5906 leftstop
= rightstop
;
5909 cc
= swap_mri_condition (cc
);
5913 if (truelab
== NULL
)
5915 cc
= reverse_mri_condition (cc
);
5919 if (leftstart
!= NULL
)
5921 buf
= (char *) xmalloc (20
5922 + (leftstop
- leftstart
)
5923 + (rightstop
- rightstart
));
5929 *s
++ = tolower(qual
);
5931 memcpy (s
, leftstart
, leftstop
- leftstart
);
5932 s
+= leftstop
- leftstart
;
5934 memcpy (s
, rightstart
, rightstop
- rightstart
);
5935 s
+= rightstop
- rightstart
;
5941 buf
= (char *) xmalloc (20 + strlen (truelab
));
5947 *s
++ = tolower(extent
);
5949 strcpy (s
, truelab
);
5954 /* Parse an MRI structured control expression. This generates test
5955 and branch instructions. STOP is where the expression ends. It
5956 goes to TRUELAB if the condition is true, and to FALSELAB if the
5957 condition is false. Exactly one of TRUELAB and FALSELAB will be
5958 NULL, meaning to fall through. QUAL is the size qualifier for the
5959 expression. EXTENT is the size to use for the branch. */
5962 parse_mri_control_expression (stop
, qual
, truelab
, falselab
, extent
)
5965 const char *truelab
;
5966 const char *falselab
;
5979 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
5980 &rightstart
, &rightstop
))
5986 if (strncasecmp (input_line_pointer
, "AND", 3) == 0)
5990 if (falselab
!= NULL
)
5993 flab
= mri_control_label ();
5995 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5996 rightstop
, (const char *) NULL
, flab
, extent
);
5998 input_line_pointer
+= 3;
5999 if (*input_line_pointer
!= '.'
6000 || input_line_pointer
[1] == '\0')
6004 qual
= input_line_pointer
[1];
6005 input_line_pointer
+= 2;
6008 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
6009 &rightstart
, &rightstop
))
6015 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
6016 rightstop
, truelab
, falselab
, extent
);
6018 if (falselab
== NULL
)
6021 else if (strncasecmp (input_line_pointer
, "OR", 2) == 0)
6025 if (truelab
!= NULL
)
6028 tlab
= mri_control_label ();
6030 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
6031 rightstop
, tlab
, (const char *) NULL
, extent
);
6033 input_line_pointer
+= 2;
6034 if (*input_line_pointer
!= '.'
6035 || input_line_pointer
[1] == '\0')
6039 qual
= input_line_pointer
[1];
6040 input_line_pointer
+= 2;
6043 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
6044 &rightstart
, &rightstop
))
6050 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
6051 rightstop
, truelab
, falselab
, extent
);
6053 if (truelab
== NULL
)
6058 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
6059 rightstop
, truelab
, falselab
, extent
);
6063 if (input_line_pointer
!= stop
)
6064 as_bad (_("syntax error in structured control directive"));
6067 /* Handle the MRI IF pseudo-op. This may be a structured control
6068 directive, or it may be a regular assembler conditional, depending
6077 struct mri_control_info
*n
;
6079 /* A structured control directive must end with THEN with an
6080 optional qualifier. */
6081 s
= input_line_pointer
;
6082 /* We only accept '*' as introduction of comments if preceded by white space
6083 or at first column of a line (I think this can't actually happen here?)
6084 This is important when assembling:
6085 if d0 <ne> 12(a0,d0*2) then
6086 if d0 <ne> #CONST*20 then */
6087 while ( ! ( is_end_of_line
[(unsigned char) *s
]
6090 && ( s
== input_line_pointer
6092 || *(s
-1) == '\t'))))
6095 while (s
> input_line_pointer
&& (*s
== ' ' || *s
== '\t'))
6098 if (s
- input_line_pointer
> 1
6102 if (s
- input_line_pointer
< 3
6103 || strncasecmp (s
- 3, "THEN", 4) != 0)
6107 as_bad (_("missing then"));
6108 ignore_rest_of_line ();
6112 /* It's a conditional. */
6117 /* Since this might be a conditional if, this pseudo-op will be
6118 called even if we are supported to be ignoring input. Double
6119 check now. Clobber *input_line_pointer so that ignore_input
6120 thinks that this is not a special pseudo-op. */
6121 c
= *input_line_pointer
;
6122 *input_line_pointer
= 0;
6123 if (ignore_input ())
6125 *input_line_pointer
= c
;
6126 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6127 ++input_line_pointer
;
6128 demand_empty_rest_of_line ();
6131 *input_line_pointer
= c
;
6133 n
= push_mri_control (mri_if
);
6135 parse_mri_control_expression (s
- 3, qual
, (const char *) NULL
,
6136 n
->next
, s
[1] == '.' ? s
[2] : '\0');
6139 input_line_pointer
= s
+ 3;
6141 input_line_pointer
= s
+ 1;
6145 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6146 ++input_line_pointer
;
6149 demand_empty_rest_of_line ();
6152 /* Handle the MRI else pseudo-op. If we are currently doing an MRI
6153 structured IF, associate the ELSE with the IF. Otherwise, assume
6154 it is a conditional else. */
6165 && (mri_control_stack
== NULL
6166 || mri_control_stack
->type
!= mri_if
6167 || mri_control_stack
->else_seen
))
6173 c
= *input_line_pointer
;
6174 *input_line_pointer
= 0;
6175 if (ignore_input ())
6177 *input_line_pointer
= c
;
6178 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6179 ++input_line_pointer
;
6180 demand_empty_rest_of_line ();
6183 *input_line_pointer
= c
;
6185 if (mri_control_stack
== NULL
6186 || mri_control_stack
->type
!= mri_if
6187 || mri_control_stack
->else_seen
)
6189 as_bad (_("else without matching if"));
6190 ignore_rest_of_line ();
6194 mri_control_stack
->else_seen
= 1;
6196 buf
= (char *) xmalloc (20 + strlen (mri_control_stack
->bottom
));
6197 q
[0] = tolower(qual
);
6199 sprintf (buf
, "bra%s %s", q
, mri_control_stack
->bottom
);
6203 colon (mri_control_stack
->next
);
6207 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6208 ++input_line_pointer
;
6211 demand_empty_rest_of_line ();
6214 /* Handle the MRI ENDI pseudo-op. */
6218 int ignore ATTRIBUTE_UNUSED
;
6220 if (mri_control_stack
== NULL
6221 || mri_control_stack
->type
!= mri_if
)
6223 as_bad (_("endi without matching if"));
6224 ignore_rest_of_line ();
6228 /* ignore_input will not return true for ENDI, so we don't need to
6229 worry about checking it again here. */
6231 if (! mri_control_stack
->else_seen
)
6232 colon (mri_control_stack
->next
);
6233 colon (mri_control_stack
->bottom
);
6239 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6240 ++input_line_pointer
;
6243 demand_empty_rest_of_line ();
6246 /* Handle the MRI BREAK pseudo-op. */
6249 s_mri_break (extent
)
6252 struct mri_control_info
*n
;
6256 n
= mri_control_stack
;
6258 && n
->type
!= mri_for
6259 && n
->type
!= mri_repeat
6260 && n
->type
!= mri_while
)
6264 as_bad (_("break outside of structured loop"));
6265 ignore_rest_of_line ();
6269 buf
= (char *) xmalloc (20 + strlen (n
->bottom
));
6270 ex
[0] = tolower(extent
);
6272 sprintf (buf
, "bra%s %s", ex
, n
->bottom
);
6278 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6279 ++input_line_pointer
;
6282 demand_empty_rest_of_line ();
6285 /* Handle the MRI NEXT pseudo-op. */
6291 struct mri_control_info
*n
;
6295 n
= mri_control_stack
;
6297 && n
->type
!= mri_for
6298 && n
->type
!= mri_repeat
6299 && n
->type
!= mri_while
)
6303 as_bad (_("next outside of structured loop"));
6304 ignore_rest_of_line ();
6308 buf
= (char *) xmalloc (20 + strlen (n
->next
));
6309 ex
[0] = tolower(extent
);
6311 sprintf (buf
, "bra%s %s", ex
, n
->next
);
6317 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6318 ++input_line_pointer
;
6321 demand_empty_rest_of_line ();
6324 /* Handle the MRI FOR pseudo-op. */
6330 const char *varstart
, *varstop
;
6331 const char *initstart
, *initstop
;
6332 const char *endstart
, *endstop
;
6333 const char *bystart
, *bystop
;
6337 struct mri_control_info
*n
;
6343 FOR.q var = init { TO | DOWNTO } end [ BY by ] DO.e
6347 varstart
= input_line_pointer
;
6349 /* Look for the '='. */
6350 while (! is_end_of_line
[(unsigned char) *input_line_pointer
]
6351 && *input_line_pointer
!= '=')
6352 ++input_line_pointer
;
6353 if (*input_line_pointer
!= '=')
6355 as_bad (_("missing ="));
6356 ignore_rest_of_line ();
6360 varstop
= input_line_pointer
;
6361 if (varstop
> varstart
6362 && (varstop
[-1] == ' ' || varstop
[-1] == '\t'))
6365 ++input_line_pointer
;
6367 initstart
= input_line_pointer
;
6369 /* Look for TO or DOWNTO. */
6372 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6374 if (strncasecmp (input_line_pointer
, "TO", 2) == 0
6375 && ! is_part_of_name (input_line_pointer
[2]))
6377 initstop
= input_line_pointer
;
6378 input_line_pointer
+= 2;
6381 if (strncasecmp (input_line_pointer
, "DOWNTO", 6) == 0
6382 && ! is_part_of_name (input_line_pointer
[6]))
6384 initstop
= input_line_pointer
;
6386 input_line_pointer
+= 6;
6389 ++input_line_pointer
;
6391 if (initstop
== NULL
)
6393 as_bad (_("missing to or downto"));
6394 ignore_rest_of_line ();
6397 if (initstop
> initstart
6398 && (initstop
[-1] == ' ' || initstop
[-1] == '\t'))
6402 endstart
= input_line_pointer
;
6404 /* Look for BY or DO. */
6407 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6409 if (strncasecmp (input_line_pointer
, "BY", 2) == 0
6410 && ! is_part_of_name (input_line_pointer
[2]))
6412 endstop
= input_line_pointer
;
6414 input_line_pointer
+= 2;
6417 if (strncasecmp (input_line_pointer
, "DO", 2) == 0
6418 && (input_line_pointer
[2] == '.'
6419 || ! is_part_of_name (input_line_pointer
[2])))
6421 endstop
= input_line_pointer
;
6422 input_line_pointer
+= 2;
6425 ++input_line_pointer
;
6427 if (endstop
== NULL
)
6429 as_bad (_("missing do"));
6430 ignore_rest_of_line ();
6433 if (endstop
> endstart
6434 && (endstop
[-1] == ' ' || endstop
[-1] == '\t'))
6440 bystop
= bystart
+ 2;
6445 bystart
= input_line_pointer
;
6449 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6451 if (strncasecmp (input_line_pointer
, "DO", 2) == 0
6452 && (input_line_pointer
[2] == '.'
6453 || ! is_part_of_name (input_line_pointer
[2])))
6455 bystop
= input_line_pointer
;
6456 input_line_pointer
+= 2;
6459 ++input_line_pointer
;
6463 as_bad (_("missing do"));
6464 ignore_rest_of_line ();
6467 if (bystop
> bystart
6468 && (bystop
[-1] == ' ' || bystop
[-1] == '\t'))
6472 if (*input_line_pointer
!= '.')
6476 extent
= input_line_pointer
[1];
6477 input_line_pointer
+= 2;
6480 /* We have fully parsed the FOR operands. Now build the loop. */
6482 n
= push_mri_control (mri_for
);
6484 buf
= (char *) xmalloc (50 + (input_line_pointer
- varstart
));
6493 *s
++ = tolower(qual
);
6495 memcpy (s
, initstart
, initstop
- initstart
);
6496 s
+= initstop
- initstart
;
6498 memcpy (s
, varstart
, varstop
- varstart
);
6499 s
+= varstop
- varstart
;
6511 *s
++ = tolower(qual
);
6513 memcpy (s
, endstart
, endstop
- endstart
);
6514 s
+= endstop
- endstart
;
6516 memcpy (s
, varstart
, varstop
- varstart
);
6517 s
+= varstop
- varstart
;
6522 ex
[0] = tolower(extent
);
6525 sprintf (buf
, "blt%s %s", ex
, n
->bottom
);
6527 sprintf (buf
, "bgt%s %s", ex
, n
->bottom
);
6530 /* Put together the add or sub instruction used by ENDF. */
6538 *s
++ = tolower(qual
);
6540 memcpy (s
, bystart
, bystop
- bystart
);
6541 s
+= bystop
- bystart
;
6543 memcpy (s
, varstart
, varstop
- varstart
);
6544 s
+= varstop
- varstart
;
6550 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6551 ++input_line_pointer
;
6554 demand_empty_rest_of_line ();
6557 /* Handle the MRI ENDF pseudo-op. */
6561 int ignore ATTRIBUTE_UNUSED
;
6563 if (mri_control_stack
== NULL
6564 || mri_control_stack
->type
!= mri_for
)
6566 as_bad (_("endf without for"));
6567 ignore_rest_of_line ();
6571 colon (mri_control_stack
->next
);
6573 mri_assemble (mri_control_stack
->incr
);
6575 sprintf (mri_control_stack
->incr
, "bra %s", mri_control_stack
->top
);
6576 mri_assemble (mri_control_stack
->incr
);
6578 free (mri_control_stack
->incr
);
6580 colon (mri_control_stack
->bottom
);
6586 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6587 ++input_line_pointer
;
6590 demand_empty_rest_of_line ();
6593 /* Handle the MRI REPEAT pseudo-op. */
6596 s_mri_repeat (ignore
)
6597 int ignore ATTRIBUTE_UNUSED
;
6599 struct mri_control_info
*n
;
6601 n
= push_mri_control (mri_repeat
);
6605 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6606 ++input_line_pointer
;
6608 demand_empty_rest_of_line ();
6611 /* Handle the MRI UNTIL pseudo-op. */
6619 if (mri_control_stack
== NULL
6620 || mri_control_stack
->type
!= mri_repeat
)
6622 as_bad (_("until without repeat"));
6623 ignore_rest_of_line ();
6627 colon (mri_control_stack
->next
);
6629 for (s
= input_line_pointer
; ! is_end_of_line
[(unsigned char) *s
]; s
++)
6632 parse_mri_control_expression (s
, qual
, (const char *) NULL
,
6633 mri_control_stack
->top
, '\0');
6635 colon (mri_control_stack
->bottom
);
6637 input_line_pointer
= s
;
6643 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6644 ++input_line_pointer
;
6647 demand_empty_rest_of_line ();
6650 /* Handle the MRI WHILE pseudo-op. */
6658 struct mri_control_info
*n
;
6660 s
= input_line_pointer
;
6661 /* We only accept '*' as introduction of comments if preceded by white space
6662 or at first column of a line (I think this can't actually happen here?)
6663 This is important when assembling:
6664 while d0 <ne> 12(a0,d0*2) do
6665 while d0 <ne> #CONST*20 do */
6666 while ( ! ( is_end_of_line
[(unsigned char) *s
]
6669 && ( s
== input_line_pointer
6671 || *(s
-1) == '\t'))))
6674 while (*s
== ' ' || *s
== '\t')
6676 if (s
- input_line_pointer
> 1
6679 if (s
- input_line_pointer
< 2
6680 || strncasecmp (s
- 1, "DO", 2) != 0)
6682 as_bad (_("missing do"));
6683 ignore_rest_of_line ();
6687 n
= push_mri_control (mri_while
);
6691 parse_mri_control_expression (s
- 1, qual
, (const char *) NULL
, n
->bottom
,
6692 s
[1] == '.' ? s
[2] : '\0');
6694 input_line_pointer
= s
+ 1;
6695 if (*input_line_pointer
== '.')
6696 input_line_pointer
+= 2;
6700 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6701 ++input_line_pointer
;
6704 demand_empty_rest_of_line ();
6707 /* Handle the MRI ENDW pseudo-op. */
6711 int ignore ATTRIBUTE_UNUSED
;
6715 if (mri_control_stack
== NULL
6716 || mri_control_stack
->type
!= mri_while
)
6718 as_bad (_("endw without while"));
6719 ignore_rest_of_line ();
6723 buf
= (char *) xmalloc (20 + strlen (mri_control_stack
->next
));
6724 sprintf (buf
, "bra %s", mri_control_stack
->next
);
6728 colon (mri_control_stack
->bottom
);
6734 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6735 ++input_line_pointer
;
6738 demand_empty_rest_of_line ();
6743 * Invocation line includes a switch not recognized by the base assembler.
6744 * See if it's a processor-specific option. These are:
6746 * -[A]m[c]68000, -[A]m[c]68008, -[A]m[c]68010, -[A]m[c]68020, -[A]m[c]68030, -[A]m[c]68040
6747 * -[A]m[c]68881, -[A]m[c]68882, -[A]m[c]68851
6748 * Select the architecture. Instructions or features not
6749 * supported by the selected architecture cause fatal
6750 * errors. More than one may be specified. The default is
6751 * -m68020 -m68851 -m68881. Note that -m68008 is a synonym
6752 * for -m68000, and -m68882 is a synonym for -m68881.
6753 * -[A]m[c]no-68851, -[A]m[c]no-68881
6754 * Don't accept 688?1 instructions. (The "c" is kind of silly,
6755 * so don't use or document it, but that's the way the parsing
6758 * -pic Indicates PIC.
6759 * -k Indicates PIC. (Sun 3 only.)
6760 * --pcrel Never turn PC-relative branches into absolute jumps.
6763 * Permit `|' to be used in expressions.
6768 CONST
char *md_shortopts
= "lSA:m:kQ:V";
6770 CONST
char *md_shortopts
= "lSA:m:k";
6773 struct option md_longopts
[] = {
6774 #define OPTION_PIC (OPTION_MD_BASE)
6775 {"pic", no_argument
, NULL
, OPTION_PIC
},
6776 #define OPTION_REGISTER_PREFIX_OPTIONAL (OPTION_MD_BASE + 1)
6777 {"register-prefix-optional", no_argument
, NULL
,
6778 OPTION_REGISTER_PREFIX_OPTIONAL
},
6779 #define OPTION_BITWISE_OR (OPTION_MD_BASE + 2)
6780 {"bitwise-or", no_argument
, NULL
, OPTION_BITWISE_OR
},
6781 #define OPTION_BASE_SIZE_DEFAULT_16 (OPTION_MD_BASE + 3)
6782 {"base-size-default-16", no_argument
, NULL
, OPTION_BASE_SIZE_DEFAULT_16
},
6783 #define OPTION_BASE_SIZE_DEFAULT_32 (OPTION_MD_BASE + 4)
6784 {"base-size-default-32", no_argument
, NULL
, OPTION_BASE_SIZE_DEFAULT_32
},
6785 #define OPTION_DISP_SIZE_DEFAULT_16 (OPTION_MD_BASE + 5)
6786 {"disp-size-default-16", no_argument
, NULL
, OPTION_DISP_SIZE_DEFAULT_16
},
6787 #define OPTION_DISP_SIZE_DEFAULT_32 (OPTION_MD_BASE + 6)
6788 {"disp-size-default-32", no_argument
, NULL
, OPTION_DISP_SIZE_DEFAULT_32
},
6789 #define OPTION_PCREL (OPTION_MD_BASE + 7)
6790 {"pcrel", no_argument
, NULL
, OPTION_PCREL
},
6791 {NULL
, no_argument
, NULL
, 0}
6793 size_t md_longopts_size
= sizeof (md_longopts
);
6796 md_parse_option (c
, arg
)
6802 case 'l': /* -l means keep external to 2 bit offset
6803 rather than 16 bit one */
6804 flag_short_refs
= 1;
6807 case 'S': /* -S means that jbsr's always turn into
6809 flag_long_jumps
= 1;
6812 case OPTION_PCREL
: /* --pcrel means never turn PC-relative
6813 branches into absolute jumps. */
6814 flag_keep_pcrel
= 1;
6820 /* intentional fall-through */
6823 if (arg
[0] == 'n' && arg
[1] == 'o' && arg
[2] == '-')
6827 const char *oarg
= arg
;
6833 if (arg
[0] == 'c' && arg
[1] == '6')
6836 for (i
= 0; i
< n_archs
; i
++)
6837 if (!strcmp (arg
, archs
[i
].name
))
6842 as_bad (_("unrecognized option `%s'"), oarg
);
6845 arch
= archs
[i
].arch
;
6848 else if (arch
== m68851
)
6857 if (arg
[0] == 'c' && arg
[1] == '6')
6860 for (i
= 0; i
< n_archs
; i
++)
6861 if (!strcmp (arg
, archs
[i
].name
))
6863 unsigned long arch
= archs
[i
].arch
;
6864 if (cpu_of_arch (arch
))
6865 /* It's a cpu spec. */
6867 current_architecture
&= ~m68000up
;
6868 current_architecture
|= arch
;
6870 else if (arch
== m68881
)
6872 current_architecture
|= m68881
;
6875 else if (arch
== m68851
)
6877 current_architecture
|= m68851
;
6887 as_bad (_("unrecognized architecture specification `%s'"), arg
);
6896 break; /* -pic, Position Independent Code */
6898 case OPTION_REGISTER_PREFIX_OPTIONAL
:
6899 flag_reg_prefix_optional
= 1;
6900 reg_prefix_optional_seen
= 1;
6903 /* -V: SVR4 argument to print version ID. */
6905 print_version_id ();
6908 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
6909 should be emitted or not. FIXME: Not implemented. */
6913 case OPTION_BITWISE_OR
:
6918 n
= (char *) xmalloc (strlen (m68k_comment_chars
) + 1);
6920 for (s
= m68k_comment_chars
; *s
!= '\0'; s
++)
6924 m68k_comment_chars
= n
;
6928 case OPTION_BASE_SIZE_DEFAULT_16
:
6929 m68k_index_width_default
= SIZE_WORD
;
6932 case OPTION_BASE_SIZE_DEFAULT_32
:
6933 m68k_index_width_default
= SIZE_LONG
;
6936 case OPTION_DISP_SIZE_DEFAULT_16
:
6938 m68k_rel32_from_cmdline
= 1;
6941 case OPTION_DISP_SIZE_DEFAULT_32
:
6943 m68k_rel32_from_cmdline
= 1;
6954 md_show_usage (stream
)
6957 fprintf (stream
, _("\
6959 -l use 1 word for refs to undefined symbols [default 2]\n\
6960 -m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060 |\n\
6961 -m68302 | -m68331 | -m68332 | -m68333 | -m68340 | -m68360 | -mcpu32 |\n\
6962 -m5200 | -m5202 | -m5204 | -m5206 | -m5206e | -m5307 | -m5407\n\
6963 specify variant of 680X0 architecture [default 68020]\n\
6964 -m68881 | -m68882 | -mno-68881 | -mno-68882\n\
6965 target has/lacks floating-point coprocessor\n\
6966 [default yes for 68020, 68030, and cpu32]\n"));
6967 fprintf (stream
, _("\
6968 -m68851 | -mno-68851\n\
6969 target has/lacks memory-management unit coprocessor\n\
6970 [default yes for 68020 and up]\n\
6971 -pic, -k generate position independent code\n\
6972 -S turn jbsr into jsr\n\
6973 --pcrel never turn PC-relative branches into absolute jumps\n\
6974 --register-prefix-optional\n\
6975 recognize register names without prefix character\n\
6976 --bitwise-or do not treat `|' as a comment character\n"));
6977 fprintf (stream
, _("\
6978 --base-size-default-16 base reg without size is 16 bits\n\
6979 --base-size-default-32 base reg without size is 32 bits (default)\n\
6980 --disp-size-default-16 displacement with unknown size is 16 bits\n\
6981 --disp-size-default-32 displacement with unknown size is 32 bits (default)\n"));
6986 /* TEST2: Test md_assemble() */
6987 /* Warning, this routine probably doesn't work anymore */
6991 struct m68k_it the_ins
;
6999 if (!gets (buf
) || !*buf
)
7001 if (buf
[0] == '|' || buf
[1] == '.')
7003 for (cp
= buf
; *cp
; cp
++)
7008 memset (&the_ins
, '\0', sizeof (the_ins
));
7009 m68k_ip (&the_ins
, buf
);
7012 printf (_("Error %s in %s\n"), the_ins
.error
, buf
);
7016 printf (_("Opcode(%d.%s): "), the_ins
.numo
, the_ins
.args
);
7017 for (n
= 0; n
< the_ins
.numo
; n
++)
7018 printf (" 0x%x", the_ins
.opcode
[n
] & 0xffff);
7020 print_the_insn (&the_ins
.opcode
[0], stdout
);
7021 (void) putchar ('\n');
7023 for (n
= 0; n
< strlen (the_ins
.args
) / 2; n
++)
7025 if (the_ins
.operands
[n
].error
)
7027 printf ("op%d Error %s in %s\n", n
, the_ins
.operands
[n
].error
, buf
);
7030 printf ("mode %d, reg %d, ", the_ins
.operands
[n
].mode
, the_ins
.operands
[n
].reg
);
7031 if (the_ins
.operands
[n
].b_const
)
7032 printf ("Constant: '%.*s', ", 1 + the_ins
.operands
[n
].e_const
- the_ins
.operands
[n
].b_const
, the_ins
.operands
[n
].b_const
);
7033 printf ("ireg %d, isiz %d, imul %d, ", the_ins
.operands
[n
].ireg
, the_ins
.operands
[n
].isiz
, the_ins
.operands
[n
].imul
);
7034 if (the_ins
.operands
[n
].b_iadd
)
7035 printf ("Iadd: '%.*s',", 1 + the_ins
.operands
[n
].e_iadd
- the_ins
.operands
[n
].b_iadd
, the_ins
.operands
[n
].b_iadd
);
7036 (void) putchar ('\n');
7048 while (*str
&& *str
!= ' ')
7050 if (str
[-1] == ':' || str
[1] == '=')
7057 /* Possible states for relaxation:
7059 0 0 branch offset byte (bra, etc)
7063 1 0 indexed offsets byte a0@(32,d4:w:1) etc
7067 2 0 two-offset index word-word a0@(32,d4)@(45) etc
7074 /* We have no need to default values of symbols. */
7077 md_undefined_symbol (name
)
7078 char *name ATTRIBUTE_UNUSED
;
7083 /* Round up a section size to the appropriate boundary. */
7085 md_section_align (segment
, size
)
7086 segT segment ATTRIBUTE_UNUSED
;
7090 #ifdef BFD_ASSEMBLER
7091 /* For a.out, force the section size to be aligned. If we don't do
7092 this, BFD will align it for us, but it will not write out the
7093 final bytes of the section. This may be a bug in BFD, but it is
7094 easier to fix it here since that is how the other a.out targets
7098 align
= bfd_get_section_alignment (stdoutput
, segment
);
7099 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
7106 /* Exactly what point is a PC-relative offset relative TO?
7107 On the 68k, it is relative to the address of the first extension
7108 word. The difference between the addresses of the offset and the
7109 first extension word is stored in fx_pcrel_adjust. */
7111 md_pcrel_from (fixP
)
7116 /* Because fx_pcrel_adjust is a char, and may be unsigned, we explicitly
7117 sign extend the value here. */
7118 adjust
= ((fixP
->fx_pcrel_adjust
& 0xff) ^ 0x80) - 0x80;
7121 return fixP
->fx_where
+ fixP
->fx_frag
->fr_address
- adjust
;
7124 #ifndef BFD_ASSEMBLER
7128 tc_coff_symbol_emit_hook (ignore
)
7129 symbolS
*ignore ATTRIBUTE_UNUSED
;
7134 tc_coff_sizemachdep (frag
)
7137 switch (frag
->fr_subtype
& 0x3)
7154 void m68k_elf_final_processing()
7156 /* Set file-specific flags if this is a cpu32 processor */
7157 if (cpu_of_arch (current_architecture
) & cpu32
)
7158 elf_elfheader (stdoutput
)->e_flags
|= EF_CPU32
;