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* tc-m68k.c: ".align N" means align to N-byte boundary *only*
[deliverable/binutils-gdb.git] / gas / config / tc-m68k.c
1 /* tc-m68k.c All the m68020 specific stuff in one convenient, huge,
2 slow to compile, easy to find file.
3
4 Copyright (C) 1987, 1991, 1992 Free Software Foundation, Inc.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21
22 #include <ctype.h>
23 #define NO_RELOC 0
24 #include "as.h"
25
26 #include "obstack.h"
27
28 /* note that this file includes real declarations and thus can only be included by one source file per executable. */
29 #include "opcode/m68k.h"
30 #ifdef TE_SUN
31 /* This variable contains the value to write out at the beginning of
32 the a.out file. The 2<<16 means that this is a 68020 file instead
33 of an old-style 68000 file */
34
35 long omagic = 2<<16|OMAGIC; /* Magic byte for header file */
36 #else
37 long omagic = OMAGIC;
38 #endif
39
40 /* This array holds the chars that always start a comment. If the
41 pre-processor is disabled, these aren't very useful */
42 const char comment_chars[] = "|";
43
44 /* This array holds the chars that only start a comment at the beginning of
45 a line. If the line seems to have the form '# 123 filename'
46 .line and .file directives will appear in the pre-processed output */
47 /* Note that input_file.c hand checks for '#' at the beginning of the
48 first line of the input file. This is because the compiler outputs
49 #NO_APP at the beginning of its output. */
50 /* Also note that comments like this one will always work. */
51 const char line_comment_chars[] = "#";
52
53 /* Chars that can be used to separate mant from exp in floating point nums */
54 const char EXP_CHARS[] = "eE";
55
56 /* Chars that mean this number is a floating point constant */
57 /* As in 0f12.456 */
58 /* or 0d1.2345e12 */
59
60 const char FLT_CHARS[] = "rRsSfFdDxXeEpP";
61
62 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
63 changed in read.c . Ideally it shouldn't have to know about it at all,
64 but nothing is ideal around here.
65 */
66
67 int md_reloc_size = 8; /* Size of relocation record */
68
69 /* Its an arbitrary name: This means I don't approve of it */
70 /* See flames below */
71 static struct obstack robyn;
72
73 #define TAB(x,y) (((x)<<2)+(y))
74 #define TABTYPE(xy) ((xy) >> 2)
75 #define BYTE 0
76 #define SHORT 1
77 #define LONG 2
78 #define SZ_UNDEF 3
79
80 #define BRANCH 1
81 #define FBRANCH 2
82 #define PCREL 3
83 #define BCC68000 4
84 #define DBCC 5
85 #define PCLEA 6
86
87 /* Operands we can parse: (And associated modes)
88
89 numb: 8 bit num
90 numw: 16 bit num
91 numl: 32 bit num
92 dreg: data reg 0-7
93 reg: address or data register
94 areg: address register
95 apc: address register, PC, ZPC or empty string
96 num: 16 or 32 bit num
97 num2: like num
98 sz: w or l if omitted, l assumed
99 scale: 1 2 4 or 8 if omitted, 1 assumed
100
101 7.4 IMMED #num --> NUM
102 0.? DREG dreg --> dreg
103 1.? AREG areg --> areg
104 2.? AINDR areg@ --> *(areg)
105 3.? AINC areg@+ --> *(areg++)
106 4.? ADEC areg@- --> *(--areg)
107 5.? AOFF apc@(numw) --> *(apc+numw) -- empty string and ZPC not allowed here
108 6.? AINDX apc@(num,reg:sz:scale) --> *(apc+num+reg*scale)
109 6.? AINDX apc@(reg:sz:scale) --> same, with num=0
110 6.? APODX apc@(num)@(num2,reg:sz:scale) --> *(*(apc+num)+num2+reg*scale)
111 6.? APODX apc@(num)@(reg:sz:scale) --> same, with num2=0
112 6.? AMIND apc@(num)@(num2) --> *(*(apc+num)+num2) (previous mode without an index reg)
113 6.? APRDX apc@(num,reg:sz:scale)@(num2) --> *(*(apc+num+reg*scale)+num2)
114 6.? APRDX apc@(reg:sz:scale)@(num2) --> same, with num=0
115 7.0 ABSL num:sz --> *(num)
116 num --> *(num) (sz L assumed)
117 *** MSCR otherreg --> Magic
118 With -l option
119 5.? AOFF apc@(num) --> *(apc+num) -- empty string and ZPC not allowed here still
120
121 examples:
122 #foo #0x35 #12
123 d2
124 a4
125 a3@
126 a5@+
127 a6@-
128 a2@(12) pc@(14)
129 a1@(5,d2:w:1) @(45,d6:l:4)
130 pc@(a2) @(d4)
131 etc . . .
132
133
134 #name@(numw) -->turn into PC rel mode
135 apc@(num8,reg:sz:scale) --> *(apc+num8+reg*scale)
136
137 */
138
139 enum operand_type {
140 IMMED = 1,
141 DREG,
142 AREG,
143 AINDR,
144 ADEC,
145 AINC,
146 AOFF,
147 AINDX,
148 APODX,
149 AMIND,
150 APRDX,
151 ABSL,
152 MSCR,
153 REGLST,
154 };
155
156
157 struct m68k_exp {
158 char *e_beg;
159 char *e_end;
160 expressionS e_exp;
161 short e_siz; /* 0== default 1==short/byte 2==word 3==long */
162 };
163
164 /* DATA and ADDR have to be contiguous, so that reg-DATA gives 0-7==data reg,
165 8-15==addr reg for operands that take both types */
166
167 enum _register {
168 DATA = 1, /* 1- 8 == data registers 0-7 */
169 DATA0 = DATA,
170 DATA1,
171 DATA2,
172 DATA3,
173 DATA4,
174 DATA5,
175 DATA6,
176 DATA7,
177
178 ADDR,
179 ADDR0 = ADDR,
180 ADDR1,
181 ADDR2,
182 ADDR3,
183 ADDR4,
184 ADDR5,
185 ADDR6,
186 ADDR7,
187
188 /* Note that COPNUM==processor #1 -- COPNUM+7==#8, which stores as 000 */
189 /* I think. . . */
190
191 SP = ADDR7,
192
193 FPREG, /* Eight FP registers */
194 FP0 = FPREG,
195 FP1,
196 FP2,
197 FP3,
198 FP4,
199 FP5,
200 FP6,
201 FP7,
202 COPNUM = (FPREG+8), /* Co-processor #1-#8 */
203 COP0 = COPNUM,
204 COP1,
205 COP2,
206 COP3,
207 COP4,
208 COP5,
209 COP6,
210 COP7,
211 PC, /* Program counter */
212 ZPC, /* Hack for Program space, but 0 addressing */
213 SR, /* Status Reg */
214 CCR, /* Condition code Reg */
215
216 /* These have to be in order for the movec instruction to work. */
217 USP, /* User Stack Pointer */
218 ISP, /* Interrupt stack pointer */
219 SFC,
220 DFC,
221 CACR,
222 VBR,
223 CAAR,
224 MSP,
225 ITT0,
226 ITT1,
227 DTT0,
228 DTT1,
229 MMUSR,
230 TC,
231 SRP,
232 URP,
233 /* end of movec ordering constraints */
234
235 FPI,
236 FPS,
237 FPC,
238
239 DRP,
240 CRP,
241 CAL,
242 VAL,
243 SCC,
244 AC,
245 BAD,
246 BAD0 = BAD,
247 BAD1,
248 BAD2,
249 BAD3,
250 BAD4,
251 BAD5,
252 BAD6,
253 BAD7,
254 BAC,
255 BAC0 = BAC,
256 BAC1,
257 BAC2,
258 BAC3,
259 BAC4,
260 BAC5,
261 BAC6,
262 BAC7,
263 PSR,
264 PCSR,
265
266 IC, /* instruction cache token */
267 DC, /* data cache token */
268 NC, /* no cache token */
269 BC, /* both caches token */
270
271 };
272
273 /* Internal form of an operand. */
274 struct m68k_op {
275 char *error; /* Couldn't parse it */
276 enum operand_type mode; /* What mode this instruction is in. */
277 enum _register reg; /* Base register */
278 struct m68k_exp *con1;
279 int ireg; /* Index register */
280 int isiz; /* 0==unspec 1==byte(?) 2==short 3==long */
281 int imul; /* Multipy ireg by this (1,2,4,or 8) */
282 struct m68k_exp *con2;
283 };
284
285 /* internal form of a 68020 instruction */
286 struct m68k_it {
287 char *error;
288 char *args; /* list of opcode info */
289 int numargs;
290
291 int numo; /* Number of shorts in opcode */
292 short opcode[11];
293
294 struct m68k_op operands[6];
295
296 int nexp; /* number of exprs in use */
297 struct m68k_exp exprs[4];
298
299 int nfrag; /* Number of frags we have to produce */
300 struct {
301 int fragoff; /* Where in the current opcode[] the frag ends */
302 symbolS *fadd;
303 long foff;
304 int fragty;
305 } fragb[4];
306
307 int nrel; /* Num of reloc strucs in use */
308 struct {
309 int n;
310 symbolS *add,
311 *sub;
312 long off;
313 char wid;
314 char pcrel;
315 } reloc[5]; /* Five is enough??? */
316 };
317
318 #define cpu_of_arch(x) ((x) & m68000up)
319 #define float_of_arch(x) ((x) & mfloat)
320 #define mmu_of_arch(x) ((x) & mmmu)
321
322 static struct m68k_it the_ins; /* the instruction being assembled */
323
324 /* Macros for adding things to the m68k_it struct */
325
326 #define addword(w) the_ins.opcode[the_ins.numo++]=(w)
327
328 /* Like addword, but goes BEFORE general operands */
329 #define insop(w) {int z;\
330 for(z=the_ins.numo;z>opcode->m_codenum;--z)\
331 the_ins.opcode[z]=the_ins.opcode[z-1];\
332 for(z=0;z<the_ins.nrel;z++)\
333 the_ins.reloc[z].n+=2;\
334 the_ins.opcode[opcode->m_codenum]=w;\
335 the_ins.numo++;\
336 }
337
338
339 #define add_exp(beg,end) (\
340 the_ins.exprs[the_ins.nexp].e_beg=beg,\
341 the_ins.exprs[the_ins.nexp].e_end=end,\
342 &the_ins.exprs[the_ins.nexp++]\
343 )
344
345
346 /* The numo+1 kludge is so we can hit the low order byte of the prev word. Blecch*/
347 #define add_fix(width,exp,pc_rel) {\
348 the_ins.reloc[the_ins.nrel].n= ((width)=='B') ? (the_ins.numo*2-1) : \
349 (((width)=='b') ? ((the_ins.numo-1)*2) : (the_ins.numo*2));\
350 the_ins.reloc[the_ins.nrel].add=adds((exp));\
351 the_ins.reloc[the_ins.nrel].sub=subs((exp));\
352 the_ins.reloc[the_ins.nrel].off=offs((exp));\
353 the_ins.reloc[the_ins.nrel].wid=width;\
354 the_ins.reloc[the_ins.nrel++].pcrel=pc_rel;\
355 }
356
357 #define add_frag(add,off,type) {\
358 the_ins.fragb[the_ins.nfrag].fragoff=the_ins.numo;\
359 the_ins.fragb[the_ins.nfrag].fadd=add;\
360 the_ins.fragb[the_ins.nfrag].foff=off;\
361 the_ins.fragb[the_ins.nfrag++].fragty=type;\
362 }
363
364 #define isvar(exp) ((exp) && (adds(exp) || subs(exp)))
365
366 #define seg(exp) ((exp)->e_exp.X_seg)
367 #define adds(exp) ((exp)->e_exp.X_add_symbol)
368 #define subs(exp) ((exp)->e_exp.X_subtract_symbol)
369 #define offs(exp) ((exp)->e_exp.X_add_number)
370
371
372 struct m68k_incant {
373 char *m_operands;
374 unsigned long m_opcode;
375 short m_opnum;
376 short m_codenum;
377 enum m68k_architecture m_arch;
378 struct m68k_incant *m_next;
379 };
380
381 #define getone(x) ((((x)->m_opcode)>>16)&0xffff)
382 #define gettwo(x) (((x)->m_opcode)&0xffff)
383
384
385 #if __STDC__ == 1
386
387 static char *crack_operand(char *str, struct m68k_op *opP);
388 static int get_num(struct m68k_exp *exp, int ok);
389 static int get_regs(int i, char *str, struct m68k_op *opP);
390 static int reverse_16_bits(int in);
391 static int reverse_8_bits(int in);
392 static int try_index(char **s, struct m68k_op *opP);
393 static void install_gen_operand(int mode, int val);
394 static void install_operand(int mode, int val);
395 void s_bss(void);
396 static void s_data1(void);
397 static void s_data2(void);
398 static void s_even(void);
399 static void s_proc(void);
400
401 #else /* not __STDC__ */
402
403 static char *crack_operand();
404 static int get_num();
405 static int get_regs();
406 static int reverse_16_bits();
407 static int reverse_8_bits();
408 static int try_index();
409 static void install_gen_operand();
410 static void install_operand();
411 void s_bss();
412 void s_align_bytes();
413 static void s_data1();
414 static void s_data2();
415 static void s_even();
416 static void s_proc();
417
418 #endif /* not __STDC__ */
419
420 static enum m68k_architecture current_architecture = 0;
421
422 /* BCC68000 is for patching in an extra jmp instruction for long offsets
423 on the 68000. The 68000 doesn't support long branches with branchs */
424
425 /* This table desribes how you change sizes for the various types of variable
426 size expressions. This version only supports two kinds. */
427
428 /* Note that calls to frag_var need to specify the maximum expansion needed */
429 /* This is currently 10 bytes for DBCC */
430
431 /* The fields are:
432 How far Forward this mode will reach:
433 How far Backward this mode will reach:
434 How many bytes this mode will add to the size of the frag
435 Which mode to go to if the offset won't fit in this one
436 */
437 const relax_typeS
438 md_relax_table[] = {
439 { 1, 1, 0, 0 }, /* First entries aren't used */
440 { 1, 1, 0, 0 }, /* For no good reason except */
441 { 1, 1, 0, 0 }, /* that the VAX doesn't either */
442 { 1, 1, 0, 0 },
443
444 { (127), (-128), 0, TAB(BRANCH,SHORT)},
445 { (32767), (-32768), 2, TAB(BRANCH,LONG) },
446 { 0, 0, 4, 0 },
447 { 1, 1, 0, 0 },
448
449 { 1, 1, 0, 0 }, /* FBRANCH doesn't come BYTE */
450 { (32767), (-32768), 2, TAB(FBRANCH,LONG)},
451 { 0, 0, 4, 0 },
452 { 1, 1, 0, 0 },
453
454 { 1, 1, 0, 0 }, /* PCREL doesn't come BYTE */
455 { (32767), (-32768), 2, TAB(PCREL,LONG)},
456 { 0, 0, 4, 0 },
457 { 1, 1, 0, 0 },
458
459 { (127), (-128), 0, TAB(BCC68000,SHORT)},
460 { (32767), (-32768), 2, TAB(BCC68000,LONG) },
461 { 0, 0, 6, 0 }, /* jmp long space */
462 { 1, 1, 0, 0 },
463
464 { 1, 1, 0, 0 }, /* DBCC doesn't come BYTE */
465 { (32767), (-32768), 2, TAB(DBCC,LONG) },
466 { 0, 0, 10, 0 }, /* bra/jmp long space */
467 { 1, 1, 0, 0 },
468
469 { 1, 1, 0, 0 }, /* PCLEA doesn't come BYTE */
470 { 32767, -32768, 2, TAB(PCLEA,LONG) },
471 { 0, 0, 6, 0 },
472 { 1, 1, 0, 0 },
473
474 };
475
476 /* These are the machine dependent pseudo-ops. These are included so
477 the assembler can work on the output from the SUN C compiler, which
478 generates these.
479 */
480
481 /* This table describes all the machine specific pseudo-ops the assembler
482 has to support. The fields are:
483 pseudo-op name without dot
484 function to call to execute this pseudo-op
485 Integer arg to pass to the function
486 */
487 const pseudo_typeS md_pseudo_table[] = {
488 { "data1", s_data1, 0 },
489 { "data2", s_data2, 0 },
490 { "bss", s_bss, 0 },
491 { "even", s_even, 0 },
492 { "skip", s_space, 0 },
493 { "proc", s_proc, 0 },
494 #ifdef TE_SUN3
495 { "align", s_align_bytes, 0 },
496 #endif
497 { 0, 0, 0 }
498 };
499
500
501 /* #define isbyte(x) ((x)>=-128 && (x)<=127) */
502 /* #define isword(x) ((x)>=-32768 && (x)<=32767) */
503
504 #define issbyte(x) ((x)>=-128 && (x)<=127)
505 #define isubyte(x) ((x)>=0 && (x)<=255)
506 #define issword(x) ((x)>=-32768 && (x)<=32767)
507 #define isuword(x) ((x)>=0 && (x)<=65535)
508
509 #define isbyte(x) ((x)>=-128 && (x)<=255)
510 #define isword(x) ((x)>=-32768 && (x)<=65535)
511 #define islong(x) (1)
512
513 extern char *input_line_pointer;
514
515 enum {
516 FAIL = 0,
517 OK = 1,
518 };
519
520 /* JF these tables here are for speed at the expense of size */
521 /* You can replace them with the #if 0 versions if you really
522 need space and don't mind it running a bit slower */
523
524 static char mklower_table[256];
525 #define mklower(c) (mklower_table[(unsigned char)(c)])
526 static char notend_table[256];
527 static char alt_notend_table[256];
528 #define notend(s) ( !(notend_table[(unsigned char)(*s)] || (*s==':' &&\
529 alt_notend_table[(unsigned char)(s[1])])))
530
531 #if 0
532 #define mklower(c) (isupper(c) ? tolower(c) : c)
533 #endif
534
535
536 /* JF modified this to handle cases where the first part of a symbol name
537 looks like a register */
538
539 /*
540 * m68k_reg_parse() := if it looks like a register, return it's token &
541 * advance the pointer.
542 */
543
544 enum _register m68k_reg_parse(ccp)
545 register char **ccp;
546 {
547 char *start = *ccp;
548
549 if (isalpha(*start) && is_name_beginner(*start))
550 {
551 char c;
552 char *p = start;
553 symbolS *symbolP;
554
555 while (is_part_of_name(c = *p++))
556 ;
557 * -- p = 0;
558 symbolP = symbol_find(start);
559 *p = c;
560
561 if (symbolP && S_GET_SEGMENT(symbolP) == SEG_REGISTER)
562 {
563 *ccp = p;
564 return S_GET_VALUE(symbolP);
565 }
566 }
567 return FAIL;
568
569
570 }
571
572 #define SKIP_WHITE() { str++; if(*str==' ') str++;}
573
574 /*
575 * m68k_ip_op := '#' + <anything>
576 * | <register> + range_sep + get_regs
577 * ;
578 *
579 * range_sep := '/' | '-' ;
580 *
581 * SKIP_WHITE := <empty> | ' ' ;
582 *
583 */
584
585 int
586 m68k_ip_op(str,opP)
587 char *str;
588 register struct m68k_op *opP;
589 {
590 char *strend;
591 long i;
592 char *parse_index();
593 int needp;
594 if (*str==' ') {
595 str++;
596 } /* Find the beginning of the string */
597
598 if(!*str) {
599 opP->error="Missing operand";
600 return FAIL;
601 } /* Out of gas */
602
603 for(strend = str; *strend; strend++) ;;
604
605 --strend;
606
607 if(*str=='#') {
608 str++;
609 opP->con1=add_exp(str,strend);
610 opP->mode=IMMED;
611 return OK;
612 } /* Guess what: A constant. Shar and enjoy */
613
614 i = m68k_reg_parse(&str);
615
616 /* is a register, is exactly a register, and is followed by '@' */
617
618 if((i==FAIL || *str!='\0') && *str!='@') {
619 char *stmp;
620
621 if(i!=FAIL && (*str=='/' || *str=='-')) {
622 opP->mode=REGLST;
623 return(get_regs(i,str,opP));
624 }
625 if ((stmp=strchr(str,'@')) != '\0') {
626 opP->con1=add_exp(str,stmp-1);
627 if(stmp==strend) {
628 opP->mode=AINDX;
629 return(OK);
630 }
631
632 if ((current_architecture & m68020up) == 0) {
633 return(FAIL);
634 } /* if target is not a '20 or better */
635
636 stmp++;
637 if(*stmp++!='(' || *strend--!=')') {
638 opP->error="Malformed operand";
639 return(FAIL);
640 }
641 i=try_index(&stmp,opP);
642 opP->con2=add_exp(stmp,strend);
643
644 if (i == FAIL) {
645 opP->mode=AMIND;
646 } else {
647 opP->mode=APODX;
648 }
649 return(OK);
650 } /* if there's an '@' */
651 opP->mode = ABSL;
652 opP->con1 = add_exp(str,strend);
653 return(OK);
654 } /* not a register, not exactly a register, or no '@' */
655
656 opP->reg=i;
657
658 if (*str=='\0') {
659 if(i>=DATA+0 && i<=DATA+7)
660 opP->mode=DREG;
661 else if(i>=ADDR+0 && i<=ADDR+7)
662 opP->mode=AREG;
663 else
664 opP->mode=MSCR;
665 return OK;
666 }
667
668 if((i<ADDR+0 || i>ADDR+7) && i!=PC && i!=ZPC && i!=FAIL) { /* Can't indirect off non address regs */
669 opP->error="Invalid indirect register";
670 return FAIL;
671 }
672 know(*str == '@');
673
674 str++;
675 switch(*str) {
676 case '\0':
677 opP->mode=AINDR;
678 return OK;
679 case '-':
680 opP->mode=ADEC;
681 return OK;
682 case '+':
683 opP->mode=AINC;
684 return OK;
685 case '(':
686 str++;
687 break;
688 default:
689 opP->error="Junk after indirect";
690 return FAIL;
691 }
692 /* Some kind of indexing involved. Lets find out how bad it is */
693 i=try_index(&str,opP);
694 /* Didn't start with an index reg, maybe its offset or offset,reg */
695 if(i==FAIL) {
696 char *beg_str;
697
698 beg_str=str;
699 for(i=1;i;) {
700 switch(*str++) {
701 case '\0':
702 opP->error="Missing )";
703 return FAIL;
704 case ',': i=0; break;
705 case '(': i++; break;
706 case ')': --i; break;
707 }
708 }
709 /* if(str[-3]==':') {
710 int siz;
711
712 switch(str[-2]) {
713 case 'b':
714 case 'B':
715 siz=1;
716 break;
717 case 'w':
718 case 'W':
719 siz=2;
720 break;
721 case 'l':
722 case 'L':
723 siz=3;
724 break;
725 default:
726 opP->error="Specified size isn't :w or :l";
727 return FAIL;
728 }
729 opP->con1=add_exp(beg_str,str-4);
730 opP->con1->e_siz=siz;
731 } else */
732 opP->con1=add_exp(beg_str,str-2);
733 /* Should be offset,reg */
734 if(str[-1]==',') {
735 i=try_index(&str,opP);
736 if(i==FAIL) {
737 opP->error="Malformed index reg";
738 return FAIL;
739 }
740 }
741 }
742 /* We've now got offset) offset,reg) or reg) */
743
744 if (*str == '\0') {
745 /* Th-the-thats all folks */
746 if (opP->reg == FAIL) opP->mode = AINDX; /* Other form of indirect */
747 else if(opP->ireg == FAIL) opP->mode = AOFF;
748 else opP->mode = AINDX;
749 return(OK);
750 }
751 /* Next thing had better be another @ */
752 if (*str == '@') {
753 if (str[1] == '(') {
754 needp = 1;
755 str+=2;
756 }
757 else {
758 needp = 0;
759 str++;
760 }
761 }
762
763 if ((current_architecture & m68020up) == 0) {
764 return(FAIL);
765 } /* if target is not a '20 or better */
766
767
768 if(opP->ireg != FAIL) {
769 opP->mode = APRDX;
770
771 i = try_index(&str, opP);
772 if (i != FAIL) {
773 opP->error = "Two index registers! not allowed!";
774 return(FAIL);
775 }
776 } else {
777 i = try_index(&str, opP);
778 }
779
780 if (i == FAIL) {
781 char *beg_str;
782
783 beg_str = str;
784
785 for (i = 1; i; ) {
786 switch(*str++) {
787 case '\0':
788 if (needp)
789 opP->error="Missing )";
790 return(FAIL);
791 break;
792 case ',': i=0; break;
793 case '(': i++; break;
794 case ')': --i; break;
795 }
796 }
797
798 opP->con2=add_exp(beg_str,str-2);
799
800 if (str[-1] == ',') {
801 if (opP->ireg != FAIL) {
802 opP->error = "Can't have two index regs";
803 return(FAIL);
804 }
805
806 i = try_index(&str, opP);
807
808 if (i == FAIL) {
809 opP->error = "malformed index reg";
810 return(FAIL);
811 }
812
813 opP->mode = APODX;
814 } else if (opP->ireg != FAIL) {
815 opP->mode = APRDX;
816 } else {
817 opP->mode = AMIND;
818 }
819 } else {
820 opP->mode = APODX;
821 }
822
823 if(*str!='\0') {
824 opP->error="Junk after indirect";
825 return FAIL;
826 }
827 return(OK);
828 } /* m68k_ip_op() */
829
830 /*
831 *
832 * try_index := data_or_address_register + ')' + SKIP_W
833 * | data_or_address_register + ':' + SKIP_W + size_spec + SKIP_W + multiplier + ')' + SKIP_W
834 *
835 * multiplier := <empty>
836 * | ':' + multiplier_number
837 * ;
838 *
839 * multiplier_number := '1' | '2' | '4' | '8' ;
840 *
841 * size_spec := 'l' | 'L' | 'w' | 'W' ;
842 *
843 * SKIP_W := <empty> | ' ' ;
844 *
845 */
846
847 static int try_index(s,opP)
848 char **s;
849 struct m68k_op *opP;
850 {
851 register int i;
852 char *ss;
853 #define SKIP_W() { ss++; if (*ss==' ') ss++;}
854
855 ss= *s;
856 /* SKIP_W(); */
857 i=m68k_reg_parse(&ss);
858 if(!(i>=DATA+0 && i<=ADDR+7)) { /* if i is not DATA or ADDR reg */
859 *s=ss;
860 return FAIL;
861 }
862 opP->ireg=i;
863 /* SKIP_W(); */
864 if(*ss==')') {
865 opP->isiz=0;
866 opP->imul=1;
867 SKIP_W();
868 *s=ss;
869 return OK;
870 }
871 if(*ss!=':') {
872 opP->error="Missing : in index register";
873 *s=ss;
874 return FAIL;
875 }
876 SKIP_W();
877 switch(*ss) {
878 case 'w':
879 case 'W':
880 opP->isiz=2;
881 break;
882 case 'l':
883 case 'L':
884 opP->isiz=3;
885 break;
886 default:
887 opP->error="Index register size spec not :w or :l";
888 *s=ss;
889 return FAIL;
890 }
891 SKIP_W();
892 if(*ss==':') {
893 SKIP_W();
894 switch(*ss) {
895 case '1':
896 case '2':
897 case '4':
898 case '8':
899 if (cpu_of_arch(current_architecture) < m68020) {
900 opP->error="no index scaling in pre-68020's";
901 *s=ss;
902 return FAIL;
903 }
904 opP->imul= *ss-'0';
905 break;
906 default:
907 opP->error="index multiplier not 1, 2, 4 or 8";
908 *s=ss;
909 return FAIL;
910 }
911 SKIP_W();
912 } else opP->imul=1;
913 if(*ss!=')') {
914 opP->error="Missing )";
915 *s=ss;
916 return FAIL;
917 }
918 SKIP_W();
919 *s=ss;
920 return OK;
921 } /* try_index() */
922
923 #ifdef TEST1 /* TEST1 tests m68k_ip_op(), which parses operands */
924 main()
925 {
926 char buf[128];
927 struct m68k_op thark;
928
929 for(;;) {
930 if(!gets(buf))
931 break;
932 memset(&thark, '\0', sizeof(thark));
933 if(!m68k_ip_op(buf,&thark)) printf("FAIL:");
934 if(thark.error)
935 printf("op1 error %s in %s\n",thark.error,buf);
936 printf("mode %d, reg %d, ",thark.mode,thark.reg);
937 if(thark.b_const)
938 printf("Constant: '%.*s',",1+thark.e_const-thark.b_const,thark.b_const);
939 printf("ireg %d, isiz %d, imul %d ",thark.ireg,thark.isiz,thark.imul);
940 if(thark.b_iadd)
941 printf("Iadd: '%.*s'",1+thark.e_iadd-thark.b_iadd,thark.b_iadd);
942 printf("\n");
943 }
944 exit(0);
945 }
946
947 #endif
948
949
950 static struct hash_control* op_hash = NULL; /* handle of the OPCODE hash table
951 NULL means any use before m68k_ip_begin()
952 will crash */
953
954 \f
955 /*
956 * m 6 8 k _ i p ( )
957 *
958 * This converts a string into a 68k instruction.
959 * The string must be a bare single instruction in sun format
960 * with RMS-style 68020 indirects
961 * (example: )
962 *
963 * It provides some error messages: at most one fatal error message (which
964 * stops the scan) and at most one warning message for each operand.
965 * The 68k instruction is returned in exploded form, since we have no
966 * knowledge of how you parse (or evaluate) your expressions.
967 * We do however strip off and decode addressing modes and operation
968 * mnemonic.
969 *
970 * This function's value is a string. If it is not "" then an internal
971 * logic error was found: read this code to assign meaning to the string.
972 * No argument string should generate such an error string:
973 * it means a bug in our code, not in the user's text.
974 *
975 * You MUST have called m68k_ip_begin() once and m86_ip_end() never before using
976 * this function.
977 */
978
979 /* JF this function no longer returns a useful value. Sorry */
980 void m68k_ip (instring)
981 char *instring;
982 {
983 register char *p;
984 register struct m68k_op *opP;
985 register struct m68k_incant *opcode;
986 register char *s;
987 register int tmpreg = 0, baseo = 0, outro = 0, nextword;
988 int siz1, siz2;
989 char c;
990 int losing;
991 int opsfound;
992 char *crack_operand();
993 LITTLENUM_TYPE words[6];
994 LITTLENUM_TYPE *wordp;
995
996 if (*instring == ' ')
997 instring++; /* skip leading whitespace */
998
999 /* Scan up to end of operation-code, which MUST end in end-of-string
1000 or exactly 1 space. */
1001 for (p = instring; *p != '\0'; p++)
1002 if (*p == ' ')
1003 break;
1004
1005
1006 if (p == instring) {
1007 the_ins.error = "No operator";
1008 the_ins.opcode[0] = NULL;
1009 /* the_ins.numo=1; */
1010 return;
1011 }
1012
1013 /* p now points to the end of the opcode name, probably whitespace.
1014 make sure the name is null terminated by clobbering the whitespace,
1015 look it up in the hash table, then fix it back. */
1016 c = *p;
1017 *p = '\0';
1018 opcode = (struct m68k_incant *)hash_find (op_hash, instring);
1019 *p = c;
1020
1021 if (opcode == NULL) {
1022 the_ins.error = "Unknown operator";
1023 the_ins.opcode[0] = NULL;
1024 /* the_ins.numo=1; */
1025 return;
1026 }
1027
1028 /* found a legitimate opcode, start matching operands */
1029 while (*p == ' ') ++p;
1030
1031 for(opP = &the_ins.operands[0]; *p; opP++) {
1032
1033 p = crack_operand(p, opP);
1034
1035 if (opP->error) {
1036 the_ins.error=opP->error;
1037 return;
1038 }
1039 }
1040
1041 opsfound = opP - &the_ins.operands[0];
1042
1043 /* This ugly hack is to support the floating pt opcodes in their standard form */
1044 /* Essentially, we fake a first enty of type COP#1 */
1045 if (opcode->m_operands[0]=='I') {
1046 int n;
1047
1048 for(n=opsfound;n>0;--n)
1049 the_ins.operands[n]=the_ins.operands[n-1];
1050
1051 /* memcpy((char *)(&the_ins.operands[1]), (char *)(&the_ins.operands[0]), opsfound*sizeof(the_ins.operands[0])); */
1052 memset((char *)(&the_ins.operands[0]), '\0', sizeof(the_ins.operands[0]));
1053 the_ins.operands[0].mode=MSCR;
1054 the_ins.operands[0].reg=COPNUM; /* COP #1 */
1055 opsfound++;
1056 }
1057
1058 /* We've got the operands. Find an opcode that'll accept them */
1059 for (losing = 0; ; ) {
1060 /* if we didn't get the right number of ops,
1061 or we have no common model with this pattern
1062 then reject this pattern. */
1063
1064 if (opsfound != opcode->m_opnum
1065 || ((opcode->m_arch & current_architecture) == 0)) {
1066
1067 ++losing;
1068
1069 } else {
1070 for (s=opcode->m_operands, opP = &the_ins.operands[0]; *s && !losing; s += 2, opP++) {
1071 /* Warning: this switch is huge! */
1072 /* I've tried to organize the cases into this order:
1073 non-alpha first, then alpha by letter. lower-case goes directly
1074 before uppercase counterpart. */
1075 /* Code with multiple case ...: gets sorted by the lowest case ...
1076 it belongs to. I hope this makes sense. */
1077 switch(*s) {
1078 case '!':
1079 if (opP->mode == MSCR || opP->mode == IMMED
1080 || opP->mode == DREG || opP->mode == AREG
1081 || opP->mode == AINC || opP->mode == ADEC
1082 || opP->mode == REGLST)
1083 losing++;
1084 break;
1085
1086 case '#':
1087 if(opP->mode!=IMMED)
1088 losing++;
1089 else {
1090 long t;
1091
1092 t=get_num(opP->con1,80);
1093 if(s[1]=='b' && !isbyte(t))
1094 losing++;
1095 else if(s[1]=='w' && !isword(t))
1096 losing++;
1097 }
1098 break;
1099
1100 case '^':
1101 case 'T':
1102 if(opP->mode!=IMMED)
1103 losing++;
1104 break;
1105
1106 case '$':
1107 if(opP->mode==MSCR || opP->mode==AREG ||
1108 opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC || opP->mode==REGLST)
1109 losing++;
1110 break;
1111
1112 case '%':
1113 if(opP->mode==MSCR || opP->reg==PC ||
1114 opP->reg==ZPC || opP->mode==REGLST)
1115 losing++;
1116 break;
1117
1118
1119 case '&':
1120 if(opP->mode==MSCR || opP->mode==DREG ||
1121 opP->mode==AREG || opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC ||
1122 opP->mode==AINC || opP->mode==ADEC || opP->mode==REGLST)
1123 losing++;
1124 break;
1125
1126 case '*':
1127 if(opP->mode==MSCR || opP->mode==REGLST)
1128 losing++;
1129 break;
1130
1131 case '+':
1132 if(opP->mode!=AINC)
1133 losing++;
1134 break;
1135
1136 case '-':
1137 if(opP->mode!=ADEC)
1138 losing++;
1139 break;
1140
1141 case '/':
1142 if(opP->mode==MSCR || opP->mode==AREG ||
1143 opP->mode==AINC || opP->mode==ADEC || opP->mode==IMMED || opP->mode==REGLST)
1144 losing++;
1145 break;
1146
1147 case ';':
1148 if(opP->mode==MSCR || opP->mode==AREG || opP->mode==REGLST)
1149 losing++;
1150 break;
1151
1152 case '?':
1153 if(opP->mode==MSCR || opP->mode==AREG ||
1154 opP->mode==AINC || opP->mode==ADEC || opP->mode==IMMED || opP->reg==PC ||
1155 opP->reg==ZPC || opP->mode==REGLST)
1156 losing++;
1157 break;
1158
1159 case '@':
1160 if(opP->mode==MSCR || opP->mode==AREG ||
1161 opP->mode==IMMED || opP->mode==REGLST)
1162 losing++;
1163 break;
1164
1165 case '~': /* For now! (JF FOO is this right?) */
1166 if(opP->mode==MSCR || opP->mode==DREG ||
1167 opP->mode==AREG || opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC || opP->mode==REGLST)
1168 losing++;
1169 break;
1170
1171 case 'A':
1172 if(opP->mode!=AREG)
1173 losing++;
1174 break;
1175 case 'a':
1176 if (opP->mode != AINDR) {
1177 ++losing;
1178 } /* if not address register indirect */
1179 break;
1180 case 'B': /* FOO */
1181 if(opP->mode!=ABSL || (flagseen['S'] && instring[0] == 'j'
1182 && instring[1] == 'b'
1183 && instring[2] == 's'
1184 && instring[3] == 'r'))
1185 losing++;
1186 break;
1187
1188 case 'C':
1189 if(opP->mode!=MSCR || opP->reg!=CCR)
1190 losing++;
1191 break;
1192
1193 case 'd': /* FOO This mode is a KLUDGE!! */
1194 if(opP->mode!=AOFF && (opP->mode!=ABSL ||
1195 opP->con1->e_beg[0]!='(' || opP->con1->e_end[0]!=')'))
1196 losing++;
1197 break;
1198
1199 case 'D':
1200 if(opP->mode!=DREG)
1201 losing++;
1202 break;
1203
1204 case 'F':
1205 if(opP->mode!=MSCR || opP->reg<(FPREG+0) || opP->reg>(FPREG+7))
1206 losing++;
1207 break;
1208
1209 case 'I':
1210 if(opP->mode!=MSCR || opP->reg<COPNUM ||
1211 opP->reg>=COPNUM+7)
1212 losing++;
1213 break;
1214
1215 case 'J':
1216 if (opP->mode != MSCR
1217 || opP->reg < USP
1218 || opP->reg > URP
1219 || cpu_of_arch(current_architecture) < m68010 /* before 68010 had none */
1220 || (cpu_of_arch(current_architecture) < m68020
1221 && opP->reg != SFC
1222 && opP->reg != DFC
1223 && opP->reg != USP
1224 && opP->reg != VBR) /* 68010's had only these */
1225 || (cpu_of_arch(current_architecture) < m68040
1226 && opP->reg != SFC
1227 && opP->reg != DFC
1228 && opP->reg != USP
1229 && opP->reg != VBR
1230 && opP->reg != CACR
1231 && opP->reg != CAAR
1232 && opP->reg != MSP
1233 && opP->reg != ISP) /* 680[23]0's have only these */
1234 || (cpu_of_arch(current_architecture) == m68040 /* 68040 has all but this */
1235 && opP->reg == CAAR)) {
1236 losing++;
1237 } /* doesn't cut it */
1238 break;
1239
1240 case 'k':
1241 if(opP->mode!=IMMED)
1242 losing++;
1243 break;
1244
1245 case 'l':
1246 case 'L':
1247 if(opP->mode==DREG || opP->mode==AREG || opP->mode==FPREG) {
1248 if(s[1]=='8')
1249 losing++;
1250 else {
1251 opP->mode=REGLST;
1252 opP->reg=1<<(opP->reg-DATA);
1253 }
1254 } else if(opP->mode!=REGLST) {
1255 losing++;
1256 } else if(s[1]=='8' && opP->reg&0x0FFffFF)
1257 losing++;
1258 else if(s[1]=='3' && opP->reg&0x7000000)
1259 losing++;
1260 break;
1261
1262 case 'M':
1263 if(opP->mode!=IMMED)
1264 losing++;
1265 else {
1266 long t;
1267
1268 t=get_num(opP->con1,80);
1269 if(!issbyte(t) || isvar(opP->con1))
1270 losing++;
1271 }
1272 break;
1273
1274 case 'O':
1275 if(opP->mode!=DREG && opP->mode!=IMMED)
1276 losing++;
1277 break;
1278
1279 case 'Q':
1280 if(opP->mode!=IMMED)
1281 losing++;
1282 else {
1283 long t;
1284
1285 t=get_num(opP->con1,80);
1286 if(t<1 || t>8 || isvar(opP->con1))
1287 losing++;
1288 }
1289 break;
1290
1291 case 'R':
1292 if(opP->mode!=DREG && opP->mode!=AREG)
1293 losing++;
1294 break;
1295
1296 case 's':
1297 if(opP->mode!=MSCR || !(opP->reg==FPI || opP->reg==FPS || opP->reg==FPC))
1298 losing++;
1299 break;
1300
1301 case 'S':
1302 if(opP->mode!=MSCR || opP->reg!=SR)
1303 losing++;
1304 break;
1305
1306 case 'U':
1307 if(opP->mode!=MSCR || opP->reg!=USP)
1308 losing++;
1309 break;
1310
1311 /* JF these are out of order. We could put them
1312 in order if we were willing to put up with
1313 bunches of #ifdef m68851s in the code */
1314 #ifndef NO_68851
1315 /* Memory addressing mode used by pflushr */
1316 case '|':
1317 if(opP->mode==MSCR || opP->mode==DREG ||
1318 opP->mode==AREG || opP->mode==REGLST)
1319 losing++;
1320 break;
1321
1322 case 'f':
1323 if (opP->mode != MSCR || (opP->reg != SFC && opP->reg != DFC))
1324 losing++;
1325 break;
1326
1327 case 'P':
1328 if (opP->mode != MSCR || (opP->reg != TC && opP->reg != CAL &&
1329 opP->reg != VAL && opP->reg != SCC && opP->reg != AC))
1330 losing++;
1331 break;
1332
1333 case 'V':
1334 if (opP->reg != VAL)
1335 losing++;
1336 break;
1337
1338 case 'W':
1339 if (opP->mode != MSCR || (opP->reg != DRP && opP->reg != SRP &&
1340 opP->reg != CRP))
1341 losing++;
1342 break;
1343
1344 case 'X':
1345 if (opP->mode != MSCR ||
1346 (!(opP->reg >= BAD && opP->reg <= BAD+7) &&
1347 !(opP->reg >= BAC && opP->reg <= BAC+7)))
1348 losing++;
1349 break;
1350
1351 case 'Y':
1352 if (opP->reg != PSR)
1353 losing++;
1354 break;
1355
1356 case 'Z':
1357 if (opP->reg != PCSR)
1358 losing++;
1359 break;
1360 #endif
1361 case 'c':
1362 if (opP->reg != NC
1363 && opP->reg != IC
1364 && opP->reg != DC
1365 && opP->reg != BC) {
1366 losing++;
1367 } /* not a cache specifier. */
1368 break;
1369
1370 case '_':
1371 if (opP->mode != ABSL) {
1372 ++losing;
1373 } /* not absolute */
1374 break;
1375
1376 default:
1377 as_fatal("Internal error: Operand mode %c unknown in line %s of file \"%s\"",
1378 *s, __LINE__, __FILE__);
1379 } /* switch on type of operand */
1380
1381 if (losing) break;
1382 } /* for each operand */
1383 } /* if immediately wrong */
1384
1385 if (!losing) {
1386 break;
1387 } /* got it. */
1388
1389 opcode = opcode->m_next;
1390
1391 if (!opcode) {
1392 the_ins.error = "instruction/operands mismatch or invalid\n instruction for this architecture";
1393 return;
1394 } /* Fell off the end */
1395
1396 losing = 0;
1397 }
1398
1399 /* now assemble it */
1400
1401 the_ins.args=opcode->m_operands;
1402 the_ins.numargs=opcode->m_opnum;
1403 the_ins.numo=opcode->m_codenum;
1404 the_ins.opcode[0]=getone(opcode);
1405 the_ins.opcode[1]=gettwo(opcode);
1406
1407 for (s = the_ins.args, opP = &the_ins.operands[0]; *s; s += 2, opP++) {
1408 /* This switch is a doozy.
1409 Watch the first step; its a big one! */
1410 switch(s[0]) {
1411
1412 case '*':
1413 case '~':
1414 case '%':
1415 case ';':
1416 case '@':
1417 case '!':
1418 case '&':
1419 case '$':
1420 case '?':
1421 case '/':
1422 #ifndef NO_68851
1423 case '|':
1424 #endif
1425 switch(opP->mode) {
1426 case IMMED:
1427 tmpreg=0x3c; /* 7.4 */
1428 if (strchr("bwl",s[1])) nextword=get_num(opP->con1,80);
1429 else nextword=nextword=get_num(opP->con1,0);
1430 if(isvar(opP->con1))
1431 add_fix(s[1],opP->con1,0);
1432 switch(s[1]) {
1433 case 'b':
1434 if(!isbyte(nextword))
1435 opP->error="operand out of range";
1436 addword(nextword);
1437 baseo=0;
1438 break;
1439 case 'w':
1440 if(!isword(nextword))
1441 opP->error="operand out of range";
1442 addword(nextword);
1443 baseo=0;
1444 break;
1445 case 'l':
1446 addword(nextword>>16);
1447 addword(nextword);
1448 baseo=0;
1449 break;
1450
1451 case 'f':
1452 baseo=2;
1453 outro=8;
1454 break;
1455 case 'F':
1456 baseo=4;
1457 outro=11;
1458 break;
1459 case 'x':
1460 baseo=6;
1461 outro=15;
1462 break;
1463 case 'p':
1464 baseo=6;
1465 outro= -1;
1466 break;
1467 default:
1468 as_fatal("Internal error: Can't decode %c%c in line %s of file \"%s\"",
1469 *s, s[1], __LINE__, __FILE__);
1470 }
1471 if(!baseo)
1472 break;
1473
1474 /* We gotta put out some float */
1475 if(seg(opP->con1)!=SEG_BIG) {
1476 int_to_gen(nextword);
1477 gen_to_words(words,baseo,(long int)outro);
1478 for(wordp=words;baseo--;wordp++)
1479 addword(*wordp);
1480 break;
1481 } /* Its BIG */
1482 if(offs(opP->con1)>0) {
1483 as_warn("Bignum assumed to be binary bit-pattern");
1484 if(offs(opP->con1)>baseo) {
1485 as_warn("Bignum too big for %c format; truncated",s[1]);
1486 offs(opP->con1)=baseo;
1487 }
1488 baseo-=offs(opP->con1);
1489 for(wordp=generic_bignum+offs(opP->con1)-1;offs(opP->con1)--;--wordp)
1490 addword(*wordp);
1491 while(baseo--)
1492 addword(0);
1493 break;
1494 }
1495 gen_to_words(words,baseo,(long)outro);
1496 for (wordp=words;baseo--;wordp++)
1497 addword(*wordp);
1498 break;
1499 case DREG:
1500 tmpreg=opP->reg-DATA; /* 0.dreg */
1501 break;
1502 case AREG:
1503 tmpreg=0x08+opP->reg-ADDR; /* 1.areg */
1504 break;
1505 case AINDR:
1506 tmpreg=0x10+opP->reg-ADDR; /* 2.areg */
1507 break;
1508 case ADEC:
1509 tmpreg=0x20+opP->reg-ADDR; /* 4.areg */
1510 break;
1511 case AINC:
1512 tmpreg=0x18+opP->reg-ADDR; /* 3.areg */
1513 break;
1514 case AOFF:
1515
1516 nextword=get_num(opP->con1,80);
1517 /* Force into index mode. Hope this works */
1518
1519 /* We do the first bit for 32-bit displacements,
1520 and the second bit for 16 bit ones. It is
1521 possible that we should make the default be
1522 WORD instead of LONG, but I think that'd
1523 break GCC, so we put up with a little
1524 inefficiency for the sake of working output.
1525 */
1526
1527 if( !issword(nextword)
1528 || ( isvar(opP->con1)
1529 && ( ( opP->con1->e_siz==0
1530 && flagseen['l']==0)
1531 || opP->con1->e_siz==3))) {
1532
1533 if(opP->reg==PC)
1534 tmpreg=0x3B; /* 7.3 */
1535 else
1536 tmpreg=0x30+opP->reg-ADDR; /* 6.areg */
1537 if(isvar(opP->con1)) {
1538 if(opP->reg==PC) {
1539 add_frag(adds(opP->con1),
1540 offs(opP->con1),
1541 TAB(PCLEA,SZ_UNDEF));
1542 break;
1543 } else {
1544 addword(0x0170);
1545 add_fix('l',opP->con1,1);
1546 }
1547 } else
1548 addword(0x0170);
1549 addword(nextword>>16);
1550 } else {
1551 if(opP->reg==PC)
1552 tmpreg=0x3A; /* 7.2 */
1553 else
1554 tmpreg=0x28+opP->reg-ADDR; /* 5.areg */
1555
1556 if(isvar(opP->con1)) {
1557 if(opP->reg==PC) {
1558 add_fix('w',opP->con1,1);
1559 } else
1560 add_fix('w',opP->con1,0);
1561 }
1562 }
1563 addword(nextword);
1564 break;
1565
1566 case APODX:
1567 case AMIND:
1568 case APRDX:
1569 know(current_architecture & m68020up);
1570 /* intentional fall-through */
1571 case AINDX:
1572 nextword=0;
1573 baseo=get_num(opP->con1,80);
1574 outro=get_num(opP->con2,80);
1575 /* Figure out the 'addressing mode' */
1576 /* Also turn on the BASE_DISABLE bit, if needed */
1577 if(opP->reg==PC || opP->reg==ZPC) {
1578 tmpreg=0x3b; /* 7.3 */
1579 if(opP->reg==ZPC)
1580 nextword|=0x80;
1581 } else if(opP->reg==FAIL) {
1582 nextword|=0x80;
1583 tmpreg=0x30; /* 6.garbage */
1584 } else tmpreg=0x30+opP->reg-ADDR; /* 6.areg */
1585
1586 siz1= (opP->con1) ? opP->con1->e_siz : 0;
1587 siz2= (opP->con2) ? opP->con2->e_siz : 0;
1588
1589 /* Index register stuff */
1590 if(opP->ireg>=DATA+0 && opP->ireg<=ADDR+7) {
1591 nextword|=(opP->ireg-DATA)<<12;
1592
1593 if(opP->isiz==0 || opP->isiz==3)
1594 nextword|=0x800;
1595 switch(opP->imul) {
1596 case 1: break;
1597 case 2: nextword|=0x200; break;
1598 case 4: nextword|=0x400; break;
1599 case 8: nextword|=0x600; break;
1600 default: as_fatal("failed sanity check.");
1601 }
1602 /* IF its simple,
1603 GET US OUT OF HERE! */
1604
1605 /* Must be INDEX, with an index
1606 register. Address register
1607 cannot be ZERO-PC, and either
1608 :b was forced, or we know
1609 it will fit */
1610 if( opP->mode==AINDX
1611 && opP->reg!=FAIL
1612 && opP->reg!=ZPC
1613 && ( siz1==1
1614 || ( issbyte(baseo)
1615 && !isvar(opP->con1)))) {
1616 nextword +=baseo&0xff;
1617 addword(nextword);
1618 if(isvar(opP->con1))
1619 add_fix('B',opP->con1,0);
1620 break;
1621 }
1622 } else
1623 nextword|=0x40; /* No index reg */
1624
1625 /* It aint simple */
1626 nextword|=0x100;
1627 /* If the guy specified a width, we assume that
1628 it is wide enough. Maybe it isn't. If so, we lose
1629 */
1630 switch(siz1) {
1631 case 0:
1632 if(isvar(opP->con1) || !issword(baseo)) {
1633 siz1=3;
1634 nextword|=0x30;
1635 } else if(baseo==0)
1636 nextword|=0x10;
1637 else {
1638 nextword|=0x20;
1639 siz1=2;
1640 }
1641 break;
1642 case 1:
1643 as_warn("Byte dispacement won't work. Defaulting to :w");
1644 case 2:
1645 nextword|=0x20;
1646 break;
1647 case 3:
1648 nextword|=0x30;
1649 break;
1650 }
1651
1652 /* Figure out innner displacement stuff */
1653 if(opP->mode!=AINDX) {
1654 switch(siz2) {
1655 case 0:
1656 if(isvar(opP->con2) || !issword(outro)) {
1657 siz2=3;
1658 nextword|=0x3;
1659 } else if(outro==0)
1660 nextword|=0x1;
1661 else {
1662 nextword|=0x2;
1663 siz2=2;
1664 }
1665 break;
1666 case 1:
1667 as_warn("Byte dispacement won't work. Defaulting to :w");
1668 case 2:
1669 nextword|=0x2;
1670 break;
1671 case 3:
1672 nextword|=0x3;
1673 break;
1674 }
1675 if(opP->mode==APODX) nextword|=0x04;
1676 else if(opP->mode==AMIND) nextword|=0x40;
1677 }
1678 addword(nextword);
1679
1680 if(isvar(opP->con1)) {
1681 if(opP->reg==PC || opP->reg==ZPC) {
1682 add_fix(siz1==3 ? 'l' : 'w',opP->con1,1);
1683 opP->con1->e_exp.X_add_number+=6;
1684 } else
1685 add_fix(siz1==3 ? 'l' : 'w',opP->con1,0);
1686 }
1687 if(siz1==3)
1688 addword(baseo>>16);
1689 if(siz1)
1690 addword(baseo);
1691
1692 if(isvar(opP->con2)) {
1693 if(opP->reg==PC || opP->reg==ZPC) {
1694 add_fix(siz2==3 ? 'l' : 'w',opP->con2,1);
1695 opP->con1->e_exp.X_add_number+=6;
1696 } else
1697 add_fix(siz2==3 ? 'l' : 'w',opP->con2,0);
1698 }
1699 if(siz2==3)
1700 addword(outro>>16);
1701 if(siz2)
1702 addword(outro);
1703
1704 break;
1705
1706 case ABSL:
1707 nextword=get_num(opP->con1,80);
1708 switch(opP->con1->e_siz) {
1709 default:
1710 as_warn("Unknown size for absolute reference");
1711 case 0:
1712 if(!isvar(opP->con1) && issword(offs(opP->con1))) {
1713 tmpreg=0x38; /* 7.0 */
1714 addword(nextword);
1715 break;
1716 }
1717 /* Don't generate pc relative code
1718 on 68010 and 68000 */
1719 if(isvar(opP->con1)
1720 && !subs(opP->con1)
1721 && seg(opP->con1) == SEG_TEXT
1722 && now_seg == SEG_TEXT
1723 && cpu_of_arch(current_architecture) >= m68020
1724 && !flagseen['S']
1725 && !strchr("~%&$?", s[0])) {
1726 tmpreg=0x3A; /* 7.2 */
1727 add_frag(adds(opP->con1),
1728 offs(opP->con1),
1729 TAB(PCREL,SZ_UNDEF));
1730 break;
1731 }
1732 case 3: /* Fall through into long */
1733 if(isvar(opP->con1))
1734 add_fix('l',opP->con1,0);
1735
1736 tmpreg=0x39; /* 7.1 mode */
1737 addword(nextword>>16);
1738 addword(nextword);
1739 break;
1740
1741 case 2: /* Word */
1742 if(isvar(opP->con1))
1743 add_fix('w',opP->con1,0);
1744
1745 tmpreg=0x38; /* 7.0 mode */
1746 addword(nextword);
1747 break;
1748 }
1749 break;
1750 case MSCR:
1751 default:
1752 as_bad("unknown/incorrect operand");
1753 /* abort(); */
1754 }
1755 install_gen_operand(s[1],tmpreg);
1756 break;
1757
1758 case '#':
1759 case '^':
1760 switch(s[1]) { /* JF: I hate floating point! */
1761 case 'j':
1762 tmpreg=70;
1763 break;
1764 case '8':
1765 tmpreg=20;
1766 break;
1767 case 'C':
1768 tmpreg=50;
1769 break;
1770 case '3':
1771 default:
1772 tmpreg=80;
1773 break;
1774 }
1775 tmpreg=get_num(opP->con1,tmpreg);
1776 if(isvar(opP->con1))
1777 add_fix(s[1],opP->con1,0);
1778 switch(s[1]) {
1779 case 'b': /* Danger: These do no check for
1780 certain types of overflow.
1781 user beware! */
1782 if(!isbyte(tmpreg))
1783 opP->error="out of range";
1784 insop(tmpreg);
1785 if(isvar(opP->con1))
1786 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
1787 break;
1788 case 'w':
1789 if(!isword(tmpreg))
1790 opP->error="out of range";
1791 insop(tmpreg);
1792 if(isvar(opP->con1))
1793 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
1794 break;
1795 case 'l':
1796 insop(tmpreg); /* Because of the way insop works, we put these two out backwards */
1797 insop(tmpreg>>16);
1798 if(isvar(opP->con1))
1799 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
1800 break;
1801 case '3':
1802 tmpreg&=0xFF;
1803 case '8':
1804 case 'C':
1805 install_operand(s[1],tmpreg);
1806 break;
1807 default:
1808 as_fatal("Internal error: Unknown mode #%c in line %s of file \"%s\"", s[1], __LINE__, __FILE__);
1809 }
1810 break;
1811
1812 case '+':
1813 case '-':
1814 case 'A':
1815 case 'a':
1816 install_operand(s[1],opP->reg-ADDR);
1817 break;
1818
1819 case 'B':
1820 tmpreg=get_num(opP->con1,80);
1821 switch(s[1]) {
1822 case 'B':
1823 /* Needs no offsetting */
1824 add_fix('B',opP->con1,1);
1825 break;
1826 case 'W':
1827 /* Offset the displacement to be relative to byte disp location */
1828 opP->con1->e_exp.X_add_number+=2;
1829 add_fix('w',opP->con1,1);
1830 addword(0);
1831 break;
1832 case 'L':
1833 long_branch:
1834 if (cpu_of_arch(current_architecture) < m68020) /* 68000 or 010 */
1835 as_warn("Can't use long branches on 68000/68010");
1836 the_ins.opcode[the_ins.numo-1]|=0xff;
1837 /* Offset the displacement to be relative to byte disp location */
1838 opP->con1->e_exp.X_add_number+=4;
1839 add_fix('l',opP->con1,1);
1840 addword(0);
1841 addword(0);
1842 break;
1843 case 'g':
1844 if(subs(opP->con1)) /* We can't relax it */
1845 goto long_branch;
1846
1847 /* This could either be a symbol, or an
1848 absolute address. No matter, the
1849 frag hacking will finger it out.
1850 Not quite: it can't switch from
1851 BRANCH to BCC68000 for the case
1852 where opnd is absolute (it needs
1853 to use the 68000 hack since no
1854 conditional abs jumps). */
1855 if (((cpu_of_arch(current_architecture) < m68020) || (0==adds(opP->con1)))
1856 && (the_ins.opcode[0] >= 0x6200)
1857 && (the_ins.opcode[0] <= 0x6f00)) {
1858 add_frag(adds(opP->con1),offs(opP->con1),TAB(BCC68000,SZ_UNDEF));
1859 } else {
1860 add_frag(adds(opP->con1),offs(opP->con1),TAB(BRANCH,SZ_UNDEF));
1861 }
1862 break;
1863 case 'w':
1864 if(isvar(opP->con1)) {
1865 /* check for DBcc instruction */
1866 if ((the_ins.opcode[0] & 0xf0f8) ==0x50c8) {
1867 /* size varies if patch */
1868 /* needed for long form */
1869 add_frag(adds(opP->con1),offs(opP->con1),TAB(DBCC,SZ_UNDEF));
1870 break;
1871 }
1872
1873 /* Don't ask! */
1874 opP->con1->e_exp.X_add_number+=2;
1875 add_fix('w',opP->con1,1);
1876 }
1877 addword(0);
1878 break;
1879 case 'C': /* Fixed size LONG coproc branches */
1880 the_ins.opcode[the_ins.numo-1]|=0x40;
1881 /* Offset the displacement to be relative to byte disp location */
1882 /* Coproc branches don't have a byte disp option, but they are
1883 compatible with the ordinary branches, which do... */
1884 opP->con1->e_exp.X_add_number+=4;
1885 add_fix('l',opP->con1,1);
1886 addword(0);
1887 addword(0);
1888 break;
1889 case 'c': /* Var size Coprocesssor branches */
1890 if(subs(opP->con1)) {
1891 add_fix('l',opP->con1,1);
1892 add_frag((symbolS *)0,(long)0,TAB(FBRANCH,LONG));
1893 } else if(adds(opP->con1)) {
1894 add_frag(adds(opP->con1),offs(opP->con1),TAB(FBRANCH,SZ_UNDEF));
1895 } else {
1896 /* add_frag((symbolS *)0,offs(opP->con1),TAB(FBRANCH,SHORT)); */
1897 the_ins.opcode[the_ins.numo-1]|=0x40;
1898 add_fix('l',opP->con1,1);
1899 addword(0);
1900 addword(4);
1901 }
1902 break;
1903 default:
1904 as_fatal("Internal error: operand type B%c unknown in line %s of file \"%s\"",
1905 s[1], __LINE__, __FILE__);
1906 }
1907 break;
1908
1909 case 'C': /* Ignore it */
1910 break;
1911
1912 case 'd': /* JF this is a kludge */
1913 if(opP->mode==AOFF) {
1914 install_operand('s',opP->reg-ADDR);
1915 } else {
1916 char *tmpP;
1917
1918 tmpP=opP->con1->e_end-2;
1919 opP->con1->e_beg++;
1920 opP->con1->e_end-=4; /* point to the , */
1921 baseo=m68k_reg_parse(&tmpP);
1922 if(baseo<ADDR+0 || baseo>ADDR+7) {
1923 as_bad("Unknown address reg, using A0");
1924 baseo=0;
1925 } else baseo-=ADDR;
1926 install_operand('s',baseo);
1927 }
1928 tmpreg=get_num(opP->con1,80);
1929 if(!issword(tmpreg)) {
1930 as_warn("Expression out of range, using 0");
1931 tmpreg=0;
1932 }
1933 addword(tmpreg);
1934 break;
1935
1936 case 'D':
1937 install_operand(s[1],opP->reg-DATA);
1938 break;
1939
1940 case 'F':
1941 install_operand(s[1],opP->reg-FPREG);
1942 break;
1943
1944 case 'I':
1945 tmpreg=1+opP->reg-COPNUM;
1946 if(tmpreg==8)
1947 tmpreg=0;
1948 install_operand(s[1],tmpreg);
1949 break;
1950
1951 case 'J': /* JF foo */
1952 switch(opP->reg) {
1953 case SFC: tmpreg=0x000; break;
1954 case DFC: tmpreg=0x001; break;
1955 case CACR: tmpreg=0x002; break;
1956 case TC: tmpreg=0x003; break;
1957 case ITT0: tmpreg=0x004; break;
1958 case ITT1: tmpreg=0x005; break;
1959 case DTT0: tmpreg=0x006; break;
1960 case DTT1: tmpreg=0x007; break;
1961
1962 case USP: tmpreg=0x800; break;
1963 case VBR: tmpreg=0x801; break;
1964 case CAAR: tmpreg=0x802; break;
1965 case MSP: tmpreg=0x803; break;
1966 case ISP: tmpreg=0x804; break;
1967 case MMUSR: tmpreg=0x805; break;
1968 case URP: tmpreg=0x806; break;
1969 case SRP: tmpreg=0x807; break;
1970 default:
1971 as_fatal("failed sanity check.");
1972 }
1973 install_operand(s[1],tmpreg);
1974 break;
1975
1976 case 'k':
1977 tmpreg=get_num(opP->con1,55);
1978 install_operand(s[1],tmpreg&0x7f);
1979 break;
1980
1981 case 'l':
1982 tmpreg=opP->reg;
1983 if(s[1]=='w') {
1984 if(tmpreg&0x7FF0000)
1985 as_bad("Floating point register in register list");
1986 insop(reverse_16_bits(tmpreg));
1987 } else {
1988 if(tmpreg&0x700FFFF)
1989 as_bad("Wrong register in floating-point reglist");
1990 install_operand(s[1],reverse_8_bits(tmpreg>>16));
1991 }
1992 break;
1993
1994 case 'L':
1995 tmpreg=opP->reg;
1996 if(s[1]=='w') {
1997 if(tmpreg&0x7FF0000)
1998 as_bad("Floating point register in register list");
1999 insop(tmpreg);
2000 } else if(s[1]=='8') {
2001 if(tmpreg&0x0FFFFFF)
2002 as_bad("incorrect register in reglist");
2003 install_operand(s[1],tmpreg>>24);
2004 } else {
2005 if(tmpreg&0x700FFFF)
2006 as_bad("wrong register in floating-point reglist");
2007 else
2008 install_operand(s[1],tmpreg>>16);
2009 }
2010 break;
2011
2012 case 'M':
2013 install_operand(s[1],get_num(opP->con1,60));
2014 break;
2015
2016 case 'O':
2017 tmpreg= (opP->mode==DREG)
2018 ? 0x20+opP->reg-DATA
2019 : (get_num(opP->con1,40)&0x1F);
2020 install_operand(s[1],tmpreg);
2021 break;
2022
2023 case 'Q':
2024 tmpreg=get_num(opP->con1,10);
2025 if(tmpreg==8)
2026 tmpreg=0;
2027 install_operand(s[1],tmpreg);
2028 break;
2029
2030 case 'R':
2031 /* This depends on the fact that ADDR registers are
2032 eight more than their corresponding DATA regs, so
2033 the result will have the ADDR_REG bit set */
2034 install_operand(s[1],opP->reg-DATA);
2035 break;
2036
2037 case 's':
2038 if(opP->reg==FPI) tmpreg=0x1;
2039 else if(opP->reg==FPS) tmpreg=0x2;
2040 else if(opP->reg==FPC) tmpreg=0x4;
2041 else as_fatal("failed sanity check.");
2042 install_operand(s[1],tmpreg);
2043 break;
2044
2045 case 'S': /* Ignore it */
2046 break;
2047
2048 case 'T':
2049 install_operand(s[1],get_num(opP->con1,30));
2050 break;
2051
2052 case 'U': /* Ignore it */
2053 break;
2054
2055 case 'c':
2056 switch (opP->reg) {
2057 case NC: tmpreg = 0; break;
2058 case DC: tmpreg = 1; break;
2059 case IC: tmpreg = 2; break;
2060 case BC: tmpreg = 3; break;
2061 default:
2062 as_fatal("failed sanity check");
2063 } /* switch on cache token */
2064 install_operand(s[1], tmpreg);
2065 break;
2066 #ifndef NO_68851
2067 /* JF: These are out of order, I fear. */
2068 case 'f':
2069 switch (opP->reg) {
2070 case SFC:
2071 tmpreg=0;
2072 break;
2073 case DFC:
2074 tmpreg=1;
2075 break;
2076 default:
2077 as_fatal("failed sanity check.");
2078 }
2079 install_operand(s[1],tmpreg);
2080 break;
2081
2082 case 'P':
2083 switch(opP->reg) {
2084 case TC:
2085 tmpreg=0;
2086 break;
2087 case CAL:
2088 tmpreg=4;
2089 break;
2090 case VAL:
2091 tmpreg=5;
2092 break;
2093 case SCC:
2094 tmpreg=6;
2095 break;
2096 case AC:
2097 tmpreg=7;
2098 break;
2099 default:
2100 as_fatal("failed sanity check.");
2101 }
2102 install_operand(s[1],tmpreg);
2103 break;
2104
2105 case 'V':
2106 if (opP->reg == VAL)
2107 break;
2108 as_fatal("failed sanity check.");
2109
2110 case 'W':
2111 switch(opP->reg) {
2112
2113 case DRP:
2114 tmpreg=1;
2115 break;
2116 case SRP:
2117 tmpreg=2;
2118 break;
2119 case CRP:
2120 tmpreg=3;
2121 break;
2122 default:
2123 as_fatal("failed sanity check.");
2124 }
2125 install_operand(s[1],tmpreg);
2126 break;
2127
2128 case 'X':
2129 switch (opP->reg) {
2130 case BAD: case BAD+1: case BAD+2: case BAD+3:
2131 case BAD+4: case BAD+5: case BAD+6: case BAD+7:
2132 tmpreg = (4 << 10) | ((opP->reg - BAD) << 2);
2133 break;
2134
2135 case BAC: case BAC+1: case BAC+2: case BAC+3:
2136 case BAC+4: case BAC+5: case BAC+6: case BAC+7:
2137 tmpreg = (5 << 10) | ((opP->reg - BAC) << 2);
2138 break;
2139
2140 default:
2141 as_fatal("failed sanity check.");
2142 }
2143 install_operand(s[1], tmpreg);
2144 break;
2145 case 'Y':
2146 know(opP->reg == PSR);
2147 break;
2148 case 'Z':
2149 know(opP->reg == PCSR);
2150 break;
2151 #endif /* m68851 */
2152 case '_':
2153 tmpreg=get_num(opP->con1,80);
2154 install_operand(s[1], tmpreg);
2155 break;
2156 default:
2157 as_fatal("Internal error: Operand type %c unknown in line %s of file \"%s\"", s[0], __LINE__, __FILE__);
2158 }
2159 }
2160 /* By the time whe get here (FINALLY) the_ins contains the complete
2161 instruction, ready to be emitted. . . */
2162 } /* m68k_ip() */
2163
2164 /*
2165 * get_regs := '/' + ?
2166 * | '-' + <register>
2167 * | '-' + <register> + ?
2168 * | <empty>
2169 * ;
2170 *
2171
2172 * The idea here must be to scan in a set of registers but I don't
2173 * understand it. Looks awfully sloppy to me but I don't have any doc on
2174 * this format so...
2175
2176 *
2177 *
2178 */
2179
2180 static int get_regs(i,str,opP)
2181 int i;
2182 struct m68k_op *opP;
2183 char *str;
2184 {
2185 /* 26, 25, 24, 23-16, 15-8, 0-7 */
2186 /* Low order 24 bits encoded fpc,fps,fpi,fp7-fp0,a7-a0,d7-d0 */
2187 unsigned long cur_regs = 0;
2188 int reg1,
2189 reg2;
2190
2191 #define ADD_REG(x) { if(x==FPI) cur_regs|=(1<<24);\
2192 else if(x==FPS) cur_regs|=(1<<25);\
2193 else if(x==FPC) cur_regs|=(1<<26);\
2194 else cur_regs|=(1<<(x-1)); }
2195
2196 reg1=i;
2197 for(;;) {
2198 if(*str=='/') {
2199 ADD_REG(reg1);
2200 str++;
2201 } else if(*str=='-') {
2202 str++;
2203 reg2=m68k_reg_parse(&str);
2204 if(reg2<DATA || reg2>=FPREG+8 || reg1==FPI || reg1==FPS || reg1==FPC) {
2205 opP->error="unknown register in register list";
2206 return FAIL;
2207 }
2208 while(reg1<=reg2) {
2209 ADD_REG(reg1);
2210 reg1++;
2211 }
2212 if(*str=='\0')
2213 break;
2214 } else if(*str=='\0') {
2215 ADD_REG(reg1);
2216 break;
2217 } else {
2218 opP->error="unknow character in register list";
2219 return FAIL;
2220 }
2221 /* DJA -- Bug Fix. Did't handle d1-d2/a1 until the following instruction was added */
2222 if (*str=='/')
2223 str ++;
2224 reg1=m68k_reg_parse(&str);
2225 if((reg1<DATA || reg1>=FPREG+8) && !(reg1==FPI || reg1==FPS || reg1==FPC)) {
2226 opP->error="unknown register in register list";
2227 return FAIL;
2228 }
2229 }
2230 opP->reg=cur_regs;
2231 return OK;
2232 } /* get_regs() */
2233
2234 static int reverse_16_bits(in)
2235 int in;
2236 {
2237 int out=0;
2238 int n;
2239
2240 static int mask[16] = {
2241 0x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
2242 0x0100,0x0200,0x0400,0x0800,0x1000,0x2000,0x4000,0x8000
2243 };
2244 for(n=0;n<16;n++) {
2245 if(in&mask[n])
2246 out|=mask[15-n];
2247 }
2248 return out;
2249 } /* reverse_16_bits() */
2250
2251 static int reverse_8_bits(in)
2252 int in;
2253 {
2254 int out=0;
2255 int n;
2256
2257 static int mask[8] = {
2258 0x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
2259 };
2260
2261 for(n=0;n<8;n++) {
2262 if(in&mask[n])
2263 out|=mask[7-n];
2264 }
2265 return out;
2266 } /* reverse_8_bits() */
2267
2268 static void install_operand(mode,val)
2269 int mode;
2270 int val;
2271 {
2272 switch(mode) {
2273 case 's':
2274 the_ins.opcode[0]|=val & 0xFF; /* JF FF is for M kludge */
2275 break;
2276 case 'd':
2277 the_ins.opcode[0]|=val<<9;
2278 break;
2279 case '1':
2280 the_ins.opcode[1]|=val<<12;
2281 break;
2282 case '2':
2283 the_ins.opcode[1]|=val<<6;
2284 break;
2285 case '3':
2286 the_ins.opcode[1]|=val;
2287 break;
2288 case '4':
2289 the_ins.opcode[2]|=val<<12;
2290 break;
2291 case '5':
2292 the_ins.opcode[2]|=val<<6;
2293 break;
2294 case '6':
2295 /* DANGER! This is a hack to force cas2l and cas2w cmds
2296 to be three words long! */
2297 the_ins.numo++;
2298 the_ins.opcode[2]|=val;
2299 break;
2300 case '7':
2301 the_ins.opcode[1]|=val<<7;
2302 break;
2303 case '8':
2304 the_ins.opcode[1]|=val<<10;
2305 break;
2306 #ifndef NO_68851
2307 case '9':
2308 the_ins.opcode[1]|=val<<5;
2309 break;
2310 #endif
2311
2312 case 't':
2313 the_ins.opcode[1]|=(val<<10)|(val<<7);
2314 break;
2315 case 'D':
2316 the_ins.opcode[1]|=(val<<12)|val;
2317 break;
2318 case 'g':
2319 the_ins.opcode[0]|=val=0xff;
2320 break;
2321 case 'i':
2322 the_ins.opcode[0]|=val<<9;
2323 break;
2324 case 'C':
2325 the_ins.opcode[1]|=val;
2326 break;
2327 case 'j':
2328 the_ins.opcode[1]|=val;
2329 the_ins.numo++; /* What a hack */
2330 break;
2331 case 'k':
2332 the_ins.opcode[1]|=val<<4;
2333 break;
2334 case 'b':
2335 case 'w':
2336 case 'l':
2337 break;
2338 case 'e':
2339 the_ins.opcode[0] |= (val << 6);
2340 break;
2341 case 'L':
2342 the_ins.opcode[1] = (val >> 16);
2343 the_ins.opcode[2] = val & 0xffff;
2344 break;
2345 case 'c':
2346 default:
2347 as_fatal("failed sanity check.");
2348 }
2349 } /* install_operand() */
2350
2351 static void install_gen_operand(mode,val)
2352 int mode;
2353 int val;
2354 {
2355 switch(mode) {
2356 case 's':
2357 the_ins.opcode[0]|=val;
2358 break;
2359 case 'd':
2360 /* This is a kludge!!! */
2361 the_ins.opcode[0]|=(val&0x07)<<9|(val&0x38)<<3;
2362 break;
2363 case 'b':
2364 case 'w':
2365 case 'l':
2366 case 'f':
2367 case 'F':
2368 case 'x':
2369 case 'p':
2370 the_ins.opcode[0]|=val;
2371 break;
2372 /* more stuff goes here */
2373 default:
2374 as_fatal("failed sanity check.");
2375 }
2376 } /* install_gen_operand() */
2377
2378 /*
2379 * verify that we have some number of paren pairs, do m68k_ip_op(), and
2380 * then deal with the bitfield hack.
2381 */
2382
2383 static char *crack_operand(str,opP)
2384 register char *str;
2385 register struct m68k_op *opP;
2386 {
2387 register int parens;
2388 register int c;
2389 register char *beg_str;
2390
2391 if(!str) {
2392 return str;
2393 }
2394 beg_str=str;
2395 for(parens=0;*str && (parens>0 || notend(str));str++) {
2396 if(*str=='(') parens++;
2397 else if(*str==')') {
2398 if(!parens) { /* ERROR */
2399 opP->error="Extra )";
2400 return str;
2401 }
2402 --parens;
2403 }
2404 }
2405 if(!*str && parens) { /* ERROR */
2406 opP->error="Missing )";
2407 return str;
2408 }
2409 c= *str;
2410 *str='\0';
2411 if(m68k_ip_op(beg_str,opP)==FAIL) {
2412 *str=c;
2413 return str;
2414 }
2415 *str=c;
2416 if(c=='}')
2417 c= *++str; /* JF bitfield hack */
2418 if(c) {
2419 c= *++str;
2420 if(!c)
2421 as_bad("Missing operand");
2422 }
2423 return str;
2424 }
2425
2426 /* See the comment up above where the #define notend(... is */
2427 #if 0
2428 notend(s)
2429 char *s;
2430 {
2431 if(*s==',') return 0;
2432 if(*s=='{' || *s=='}')
2433 return 0;
2434 if(*s!=':') return 1;
2435 /* This kludge here is for the division cmd, which is a kludge */
2436 if(index("aAdD#",s[1])) return 0;
2437 return 1;
2438 }
2439 #endif
2440
2441 /* This is the guts of the machine-dependent assembler. STR points to a
2442 machine dependent instruction. This function is supposed to emit
2443 the frags/bytes it assembles to.
2444 */
2445
2446 void
2447 insert_reg(regname, regnum)
2448 char *regname;
2449 int regnum;
2450 {
2451 char buf[100];
2452 int i;
2453 symbol_table_insert(symbol_new(regname, SEG_REGISTER, regnum, &zero_address_frag));
2454
2455 for (i = 0; regname[i]; i++)
2456 buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i];
2457 buf[i] = '\0';
2458
2459 symbol_table_insert(symbol_new(buf, SEG_REGISTER, regnum, &zero_address_frag));
2460 }
2461
2462 static struct {
2463 char *name;
2464 int number;
2465 } init_table[] =
2466 {
2467 "d0", DATA0,
2468 "d1", DATA1,
2469 "d2", DATA2,
2470 "d3", DATA3,
2471 "d4", DATA4,
2472 "d5", DATA5,
2473 "d6", DATA6,
2474 "d7", DATA7,
2475 "a0", ADDR0,
2476 "a1", ADDR1,
2477 "a2", ADDR2,
2478 "a3", ADDR3,
2479 "a4", ADDR4,
2480 "a5", ADDR5,
2481 "a6", ADDR6,
2482 "fp", ADDR6,
2483 "a7", ADDR7,
2484 "sp", ADDR7,
2485 "fp0", FP0,
2486 "fp1", FP1,
2487 "fp2", FP2,
2488 "fp3", FP3,
2489 "fp4", FP4,
2490 "fp5", FP5,
2491 "fp6", FP6,
2492 "fp7", FP7,
2493 "fpi", FPI,
2494 "fpiar", FPI,
2495 "fpc", FPI,
2496 "fps", FPS,
2497 "fpsr", FPS,
2498 "fpc", FPC,
2499 "fpcr", FPC,
2500
2501 "cop0", COP0,
2502 "cop1", COP1,
2503 "cop2", COP2,
2504 "cop3", COP3,
2505 "cop4", COP4,
2506 "cop5", COP5,
2507 "cop6", COP6,
2508 "cop7", COP7,
2509 "pc", PC,
2510 "zpc", ZPC,
2511 "sr", SR,
2512
2513 "ccr", CCR,
2514 "cc", CCR,
2515
2516 "usp", USP,
2517 "isp", ISP,
2518 "sfc", SFC,
2519 "dfc", DFC,
2520 "cacr", CACR,
2521 "caar", CAAR,
2522
2523 "vbr", VBR,
2524
2525 "msp", MSP,
2526 "itt0", ITT0,
2527 "itt1", ITT1,
2528 "dtt0", DTT0,
2529 "dtt1", DTT1,
2530 "mmusr", MMUSR,
2531 "tc", TC,
2532 "srp", SRP,
2533 "urp", URP,
2534
2535 #ifndef NO_68851
2536 "ac", AC,
2537 "bc", BC,
2538 "cal", CAL,
2539 "crp", CRP,
2540 "drp", DRP,
2541 "pcsr", PCSR,
2542 "psr", PSR,
2543 "scc", SCC,
2544 "val", VAL,
2545 "bad0", BAD0,
2546 "bad1", BAD1,
2547 "bad2", BAD2,
2548 "bad3", BAD3,
2549 "bad4", BAD4,
2550 "bad5", BAD5,
2551 "bad6", BAD6,
2552 "bad7", BAD7,
2553 "bac0", BAC0,
2554 "bac1", BAC1,
2555 "bac2", BAC2,
2556 "bac3", BAC3,
2557 "bac4", BAC4,
2558 "bac5", BAC5,
2559 "bac6", BAC6,
2560 "bac7", BAC7,
2561 #endif
2562
2563 "ic", IC,
2564 "dc", DC,
2565 "nc", NC,
2566
2567 0,
2568
2569 };
2570
2571
2572 void
2573 init_regtable()
2574 {
2575 int i;
2576 for (i = 0; init_table[i].name; i++)
2577 {
2578 insert_reg(init_table[i].name, init_table[i].number);
2579 }
2580 }
2581
2582
2583 void
2584 md_assemble(str)
2585 char *str;
2586 {
2587 char *er;
2588 short *fromP;
2589 char *toP = NULL;
2590 int m,n = 0;
2591 char *to_beg_P;
2592 int shorts_this_frag;
2593
2594
2595 if (current_architecture == 0)
2596 current_architecture = (m68020
2597 #ifndef NO_68881
2598 | m68881
2599 #endif
2600 #ifndef NO_68851
2601 | m68851
2602 #endif
2603 );
2604 /* If only float and mmu were specified, default cpu. */
2605 else if (cpu_of_arch (current_architecture) == 0)
2606 current_architecture |= m68020;
2607
2608 memset((char *)(&the_ins), '\0', sizeof(the_ins)); /* JF for paranoia sake */
2609 m68k_ip(str);
2610 er=the_ins.error;
2611 if(!er) {
2612 for(n=the_ins.numargs;n;--n)
2613 if(the_ins.operands[n].error) {
2614 er=the_ins.operands[n].error;
2615 break;
2616 }
2617 }
2618 if(er) {
2619 as_bad("%s -- statement `%s' ignored",er,str);
2620 return;
2621 }
2622
2623 if(the_ins.nfrag==0) { /* No frag hacking involved; just put it out */
2624 toP=frag_more(2*the_ins.numo);
2625 fromP= &the_ins.opcode[0];
2626 for(m=the_ins.numo;m;--m) {
2627 md_number_to_chars(toP,(long)(*fromP),2);
2628 toP+=2;
2629 fromP++;
2630 }
2631 /* put out symbol-dependent info */
2632 for(m=0;m<the_ins.nrel;m++) {
2633 switch(the_ins.reloc[m].wid) {
2634 case 'B':
2635 n=1;
2636 break;
2637 case 'b':
2638 n=1;
2639 break;
2640 case '3':
2641 n=2;
2642 break;
2643 case 'w':
2644 n=2;
2645 break;
2646 case 'l':
2647 n=4;
2648 break;
2649 default:
2650 as_fatal("Don't know how to figure width of %c in md_assemble()",the_ins.reloc[m].wid);
2651 }
2652
2653 fix_new(frag_now,
2654 (toP-frag_now->fr_literal)-the_ins.numo*2+the_ins.reloc[m].n,
2655 n,
2656 the_ins.reloc[m].add,
2657 the_ins.reloc[m].sub,
2658 the_ins.reloc[m].off,
2659 the_ins.reloc[m].pcrel,
2660 NO_RELOC);
2661 }
2662 return;
2663 }
2664
2665 /* There's some frag hacking */
2666 for(n=0,fromP= &the_ins.opcode[0];n<the_ins.nfrag;n++) {
2667 int wid;
2668
2669 if(n==0) wid=2*the_ins.fragb[n].fragoff;
2670 else wid=2*(the_ins.numo-the_ins.fragb[n-1].fragoff);
2671 toP=frag_more(wid);
2672 to_beg_P=toP;
2673 shorts_this_frag=0;
2674 for(m=wid/2;m;--m) {
2675 md_number_to_chars(toP,(long)(*fromP),2);
2676 toP+=2;
2677 fromP++;
2678 shorts_this_frag++;
2679 }
2680 for(m=0;m<the_ins.nrel;m++) {
2681 if((the_ins.reloc[m].n)>= 2*shorts_this_frag /* 2*the_ins.fragb[n].fragoff */) {
2682 the_ins.reloc[m].n-= 2*shorts_this_frag /* 2*the_ins.fragb[n].fragoff */;
2683 break;
2684 }
2685 wid=the_ins.reloc[m].wid;
2686 if(wid==0)
2687 continue;
2688 the_ins.reloc[m].wid=0;
2689 wid = (wid=='b') ? 1 : (wid=='w') ? 2 : (wid=='l') ? 4 : 4000;
2690
2691 fix_new(frag_now,
2692 (toP-frag_now->fr_literal)-the_ins.numo*2+the_ins.reloc[m].n,
2693 wid,
2694 the_ins.reloc[m].add,
2695 the_ins.reloc[m].sub,
2696 the_ins.reloc[m].off,
2697 the_ins.reloc[m].pcrel,
2698 NO_RELOC);
2699 }
2700 /* know(the_ins.fragb[n].fadd); */
2701 (void)frag_var(rs_machine_dependent,10,0,(relax_substateT)(the_ins.fragb[n].fragty),
2702 the_ins.fragb[n].fadd,the_ins.fragb[n].foff,to_beg_P);
2703 }
2704 n=(the_ins.numo-the_ins.fragb[n-1].fragoff);
2705 shorts_this_frag=0;
2706 if(n) {
2707 toP=frag_more(n*sizeof(short));
2708 while(n--) {
2709 md_number_to_chars(toP,(long)(*fromP),2);
2710 toP+=2;
2711 fromP++;
2712 shorts_this_frag++;
2713 }
2714 }
2715 for(m=0;m<the_ins.nrel;m++) {
2716 int wid;
2717
2718 wid=the_ins.reloc[m].wid;
2719 if(wid==0)
2720 continue;
2721 the_ins.reloc[m].wid=0;
2722 wid = (wid=='b') ? 1 : (wid=='w') ? 2 : (wid=='l') ? 4 : 4000;
2723
2724 fix_new(frag_now,
2725 (the_ins.reloc[m].n + toP-frag_now->fr_literal)-/* the_ins.numo */ shorts_this_frag*2,
2726 wid,
2727 the_ins.reloc[m].add,
2728 the_ins.reloc[m].sub,
2729 the_ins.reloc[m].off,
2730 the_ins.reloc[m].pcrel,
2731 NO_RELOC);
2732 }
2733 }
2734
2735
2736
2737
2738
2739 void
2740 md_begin()
2741 {
2742 /*
2743 * md_begin -- set up hash tables with 68000 instructions.
2744 * similar to what the vax assembler does. ---phr
2745 */
2746 /* RMS claims the thing to do is take the m68k-opcode.h table, and make
2747 a copy of it at runtime, adding in the information we want but isn't
2748 there. I think it'd be better to have an awk script hack the table
2749 at compile time. Or even just xstr the table and use it as-is. But
2750 my lord ghod hath spoken, so we do it this way. Excuse the ugly var
2751 names. */
2752
2753 register const struct m68k_opcode *ins;
2754 register struct m68k_incant *hack,
2755 *slak;
2756 register char *retval = 0; /* empty string, or error msg text */
2757 register unsigned int i;
2758 register char c;
2759
2760 if ((op_hash = hash_new()) == NULL)
2761 as_fatal("Virtual memory exhausted");
2762
2763 obstack_begin(&robyn,4000);
2764 for (ins = m68k_opcodes; ins < endop; ins++) {
2765 hack=slak=(struct m68k_incant *)obstack_alloc(&robyn,sizeof(struct m68k_incant));
2766 do {
2767 /* we *could* ignore insns that don't match our
2768 arch here but just leaving them out of the
2769 hash. */
2770 slak->m_operands=ins->args;
2771 slak->m_opnum=strlen(slak->m_operands)/2;
2772 slak->m_arch = ins->arch;
2773 slak->m_opcode=ins->opcode;
2774 /* This is kludgey */
2775 slak->m_codenum=((ins->match)&0xffffL) ? 2 : 1;
2776 if((ins+1)!=endop && !strcmp(ins->name,(ins+1)->name)) {
2777 slak->m_next=(struct m68k_incant *) obstack_alloc(&robyn,sizeof(struct m68k_incant));
2778 ins++;
2779 } else
2780 slak->m_next=0;
2781 slak=slak->m_next;
2782 } while(slak);
2783
2784 retval = hash_insert (op_hash, ins->name,(char *)hack);
2785 /* Didn't his mommy tell him about null pointers? */
2786 if(retval && *retval)
2787 as_fatal("Internal Error: Can't hash %s: %s",ins->name,retval);
2788 }
2789
2790 for (i = 0; i < sizeof(mklower_table) ; i++)
2791 mklower_table[i] = (isupper(c = (char) i)) ? tolower(c) : c;
2792
2793 for (i = 0 ; i < sizeof(notend_table) ; i++) {
2794 notend_table[i] = 0;
2795 alt_notend_table[i] = 0;
2796 }
2797 notend_table[','] = 1;
2798 notend_table['{'] = 1;
2799 notend_table['}'] = 1;
2800 alt_notend_table['a'] = 1;
2801 alt_notend_table['A'] = 1;
2802 alt_notend_table['d'] = 1;
2803 alt_notend_table['D'] = 1;
2804 alt_notend_table['#'] = 1;
2805 alt_notend_table['f'] = 1;
2806 alt_notend_table['F'] = 1;
2807 #ifdef REGISTER_PREFIX
2808 alt_notend_table[REGISTER_PREFIX] = 1;
2809 #endif
2810
2811 init_regtable();
2812 }
2813
2814 #if 0
2815 #define notend(s) ((*s == ',' || *s == '}' || *s == '{' \
2816 || (*s == ':' && strchr("aAdD#", s[1]))) \
2817 ? 0 : 1)
2818 #endif
2819
2820 /* This funciton is called once, before the assembler exits. It is
2821 supposed to do any final cleanup for this part of the assembler.
2822 */
2823 void
2824 md_end()
2825 {
2826 }
2827
2828 /* Equal to MAX_PRECISION in atof-ieee.c */
2829 #define MAX_LITTLENUMS 6
2830
2831 /* Turn a string in input_line_pointer into a floating point constant of type
2832 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
2833 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
2834 */
2835 char *
2836 md_atof(type,litP,sizeP)
2837 char type;
2838 char *litP;
2839 int *sizeP;
2840 {
2841 int prec;
2842 LITTLENUM_TYPE words[MAX_LITTLENUMS];
2843 LITTLENUM_TYPE *wordP;
2844 char *t;
2845 char *atof_ieee();
2846
2847 switch(type) {
2848 case 'f':
2849 case 'F':
2850 case 's':
2851 case 'S':
2852 prec = 2;
2853 break;
2854
2855 case 'd':
2856 case 'D':
2857 case 'r':
2858 case 'R':
2859 prec = 4;
2860 break;
2861
2862 case 'x':
2863 case 'X':
2864 prec = 6;
2865 break;
2866
2867 case 'p':
2868 case 'P':
2869 prec = 6;
2870 break;
2871
2872 default:
2873 *sizeP=0;
2874 return "Bad call to MD_ATOF()";
2875 }
2876 t=atof_ieee(input_line_pointer,type,words);
2877 if(t)
2878 input_line_pointer=t;
2879
2880 *sizeP=prec * sizeof(LITTLENUM_TYPE);
2881 for(wordP=words;prec--;) {
2882 md_number_to_chars(litP,(long)(*wordP++),sizeof(LITTLENUM_TYPE));
2883 litP+=sizeof(LITTLENUM_TYPE);
2884 }
2885 return ""; /* Someone should teach Dean about null pointers */
2886 }
2887
2888 /* Turn an integer of n bytes (in val) into a stream of bytes appropriate
2889 for use in the a.out file, and stores them in the array pointed to by buf.
2890 This knows about the endian-ness of the target machine and does
2891 THE RIGHT THING, whatever it is. Possible values for n are 1 (byte)
2892 2 (short) and 4 (long) Floating numbers are put out as a series of
2893 LITTLENUMS (shorts, here at least)
2894 */
2895 void
2896 md_number_to_chars(buf,val,n)
2897 char *buf;
2898 long val;
2899 int n;
2900 {
2901 switch(n) {
2902 case 1:
2903 *buf++=val;
2904 break;
2905 case 2:
2906 *buf++=(val>>8);
2907 *buf++=val;
2908 break;
2909 case 4:
2910 *buf++=(val>>24);
2911 *buf++=(val>>16);
2912 *buf++=(val>>8);
2913 *buf++=val;
2914 break;
2915 default:
2916 as_fatal("failed sanity check.");
2917 }
2918 }
2919
2920 void
2921 md_apply_fix(fixP, val)
2922 fixS *fixP;
2923 long val;
2924 {
2925 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
2926
2927 switch(fixP->fx_size) {
2928 case 1:
2929 *buf++=val;
2930 break;
2931 case 2:
2932 *buf++=(val>>8);
2933 *buf++=val;
2934 break;
2935 case 4:
2936 *buf++=(val>>24);
2937 *buf++=(val>>16);
2938 *buf++=(val>>8);
2939 *buf++=val;
2940 break;
2941 default:
2942 BAD_CASE (fixP->fx_size);
2943 }
2944 }
2945
2946
2947 /* *fragP has been relaxed to its final size, and now needs to have
2948 the bytes inside it modified to conform to the new size There is UGLY
2949 MAGIC here. ..
2950 */
2951 void
2952 md_convert_frag(headers, fragP)
2953 object_headers *headers;
2954 register fragS *fragP;
2955 {
2956 long disp;
2957 long ext = 0;
2958
2959 /* Address in object code of the displacement. */
2960 register int object_address = fragP -> fr_fix + fragP -> fr_address;
2961
2962 #ifdef IBM_COMPILER_SUX
2963 /* This is wrong but it convinces the native rs6000 compiler to
2964 generate the code we want. */
2965 register char *buffer_address = fragP -> fr_literal;
2966 buffer_address += fragP -> fr_fix;
2967 #else /* IBM_COMPILER_SUX */
2968 /* Address in gas core of the place to store the displacement. */
2969 register char *buffer_address = fragP->fr_fix + fragP->fr_literal;
2970 #endif /* IBM_COMPILER_SUX */
2971
2972 /* No longer true: know(fragP->fr_symbol); */
2973
2974 /* The displacement of the address, from current location. */
2975 disp = fragP->fr_symbol ? S_GET_VALUE(fragP->fr_symbol) : 0;
2976 disp = (disp + fragP->fr_offset) - object_address;
2977
2978 switch(fragP->fr_subtype) {
2979 case TAB(BCC68000,BYTE):
2980 case TAB(BRANCH,BYTE):
2981 know(issbyte(disp));
2982 if(disp==0)
2983 as_bad("short branch with zero offset: use :w");
2984 fragP->fr_opcode[1]=disp;
2985 ext=0;
2986 break;
2987 case TAB(DBCC,SHORT):
2988 know(issword(disp));
2989 ext=2;
2990 break;
2991 case TAB(BCC68000,SHORT):
2992 case TAB(BRANCH,SHORT):
2993 know(issword(disp));
2994 fragP->fr_opcode[1]=0x00;
2995 ext=2;
2996 break;
2997 case TAB(BRANCH,LONG):
2998 if (cpu_of_arch(current_architecture) < m68020) {
2999 if (fragP->fr_opcode[0]==0x61) {
3000 fragP->fr_opcode[0]= 0x4E;
3001 fragP->fr_opcode[1]= 0xB9; /* JBSR with ABSL LONG offset */
3002 subseg_change(SEG_TEXT, 0);
3003
3004 fix_new(fragP,
3005 fragP->fr_fix,
3006 4,
3007 fragP->fr_symbol,
3008 0,
3009 fragP->fr_offset,
3010 0,
3011 NO_RELOC);
3012
3013 fragP->fr_fix+=4;
3014 ext=0;
3015 } else if (fragP->fr_opcode[0]==0x60) {
3016 fragP->fr_opcode[0]= 0x4E;
3017 fragP->fr_opcode[1]= 0xF9; /* JMP with ABSL LONG offset */
3018 subseg_change(SEG_TEXT, 0);
3019 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, fragP->fr_offset,0,
3020 NO_RELOC);
3021 fragP->fr_fix+=4;
3022 ext=0;
3023 } else {
3024 as_bad("Long branch offset not supported.");
3025 }
3026 } else {
3027 fragP->fr_opcode[1]=0xff;
3028 ext=4;
3029 }
3030 break;
3031 case TAB(BCC68000,LONG):
3032 /* only Bcc 68000 instructions can come here */
3033 /* change bcc into b!cc/jmp absl long */
3034 fragP->fr_opcode[0] ^= 0x01; /* invert bcc */
3035 fragP->fr_opcode[1] = 0x6; /* branch offset = 6 */
3036
3037 /* JF: these used to be fr_opcode[2,3], but they may be in a
3038 different frag, in which case refering to them is a no-no.
3039 Only fr_opcode[0,1] are guaranteed to work. */
3040 *buffer_address++ = 0x4e; /* put in jmp long (0x4ef9) */
3041 *buffer_address++ = 0xf9;
3042 fragP->fr_fix += 2; /* account for jmp instruction */
3043 subseg_change(SEG_TEXT,0);
3044 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3045 fragP->fr_offset,0,
3046 NO_RELOC);
3047 fragP->fr_fix += 4;
3048 ext=0;
3049 break;
3050 case TAB(DBCC,LONG):
3051 /* only DBcc 68000 instructions can come here */
3052 /* change dbcc into dbcc/jmp absl long */
3053 /* JF: these used to be fr_opcode[2-7], but that's wrong */
3054 *buffer_address++ = 0x00; /* branch offset = 4 */
3055 *buffer_address++ = 0x04;
3056 *buffer_address++ = 0x60; /* put in bra pc+6 */
3057 *buffer_address++ = 0x06;
3058 *buffer_address++ = 0x4e; /* put in jmp long (0x4ef9) */
3059 *buffer_address++ = 0xf9;
3060
3061 fragP->fr_fix += 6; /* account for bra/jmp instructions */
3062 subseg_change(SEG_TEXT,0);
3063 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3064 fragP->fr_offset,0,
3065 NO_RELOC);
3066 fragP->fr_fix += 4;
3067 ext=0;
3068 break;
3069 case TAB(FBRANCH,SHORT):
3070 know((fragP->fr_opcode[1]&0x40)==0);
3071 ext=2;
3072 break;
3073 case TAB(FBRANCH,LONG):
3074 fragP->fr_opcode[1]|=0x40; /* Turn on LONG bit */
3075 ext=4;
3076 break;
3077 case TAB(PCREL,SHORT):
3078 ext=2;
3079 break;
3080 case TAB(PCREL,LONG):
3081 /* The thing to do here is force it to ABSOLUTE LONG, since
3082 PCREL is really trying to shorten an ABSOLUTE address anyway */
3083 /* JF FOO This code has not been tested */
3084 subseg_change(SEG_TEXT,0);
3085 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
3086 if((fragP->fr_opcode[1] & 0x3F) != 0x3A)
3087 as_bad("Internal error (long PC-relative operand) for insn 0x%04lx at 0x%lx",
3088 fragP->fr_opcode[0],fragP->fr_address);
3089 fragP->fr_opcode[1]&= ~0x3F;
3090 fragP->fr_opcode[1]|=0x39; /* Mode 7.1 */
3091 fragP->fr_fix+=4;
3092 /* md_number_to_chars(buffer_address,
3093 (long)(fragP->fr_symbol->sy_value + fragP->fr_offset),
3094 4); */
3095 ext=0;
3096 break;
3097 case TAB(PCLEA,SHORT):
3098 subseg_change(SEG_TEXT,0);
3099 fix_new(fragP,(int)(fragP->fr_fix),2,fragP->fr_symbol,(symbolS *)0,fragP->fr_offset,1,
3100 NO_RELOC);
3101 fragP->fr_opcode[1] &= ~0x3F;
3102 fragP->fr_opcode[1] |= 0x3A;
3103 ext=2;
3104 break;
3105 case TAB(PCLEA,LONG):
3106 subseg_change(SEG_TEXT,0);
3107 fix_new(fragP,(int)(fragP->fr_fix)+2,4,fragP->fr_symbol,(symbolS *)0,fragP->fr_offset+2,1,
3108 NO_RELOC);
3109 *buffer_address++ = 0x01;
3110 *buffer_address++ = 0x70;
3111 fragP->fr_fix+=2;
3112 /* buffer_address+=2; */
3113 ext=4;
3114 break;
3115
3116 } /* switch on subtype */
3117
3118 if (ext) {
3119 md_number_to_chars(buffer_address, (long) disp, (int) ext);
3120 fragP->fr_fix += ext;
3121 /* H_SET_TEXT_SIZE(headers, H_GET_TEXT_SIZE(headers) + ext); */
3122 } /* if extending */
3123
3124 return;
3125 } /* md_convert_frag() */
3126
3127 /* Force truly undefined symbols to their maximum size, and generally set up
3128 the frag list to be relaxed
3129 */
3130 int md_estimate_size_before_relax(fragP, segment)
3131 register fragS *fragP;
3132 segT segment;
3133 {
3134 int old_fix;
3135 register char *buffer_address = fragP->fr_fix + fragP->fr_literal;
3136
3137 old_fix = fragP->fr_fix;
3138
3139 /* handle SZ_UNDEF first, it can be changed to BYTE or SHORT */
3140 switch (fragP->fr_subtype) {
3141
3142 case TAB(BRANCH,SZ_UNDEF): {
3143 if((fragP->fr_symbol != NULL) /* Not absolute */
3144 && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
3145 fragP->fr_subtype=TAB(TABTYPE(fragP->fr_subtype),BYTE);
3146 break;
3147 } else if((fragP->fr_symbol == 0) || (cpu_of_arch(current_architecture) < m68020)) {
3148 /* On 68000, or for absolute value, switch to abs long */
3149 /* FIXME, we should check abs val, pick short or long */
3150 if(fragP->fr_opcode[0]==0x61) {
3151 fragP->fr_opcode[0]= 0x4E;
3152 fragP->fr_opcode[1]= 0xB9; /* JBSR with ABSL LONG offset */
3153 subseg_change(SEG_TEXT, 0);
3154 fix_new(fragP, fragP->fr_fix, 4,
3155 fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
3156 fragP->fr_fix+=4;
3157 frag_wane(fragP);
3158 } else if(fragP->fr_opcode[0]==0x60) {
3159 fragP->fr_opcode[0]= 0x4E;
3160 fragP->fr_opcode[1]= 0xF9; /* JMP with ABSL LONG offset */
3161 subseg_change(SEG_TEXT, 0);
3162 fix_new(fragP, fragP->fr_fix, 4,
3163 fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
3164 fragP->fr_fix+=4;
3165 frag_wane(fragP);
3166 } else {
3167 as_warn("Long branch offset to extern symbol not supported.");
3168 }
3169 } else { /* Symbol is still undefined. Make it simple */
3170 fix_new(fragP, (int)(fragP->fr_fix), 4, fragP->fr_symbol,
3171 (symbolS *)0, fragP->fr_offset+4, 1, NO_RELOC);
3172 fragP->fr_fix+=4;
3173 fragP->fr_opcode[1]=0xff;
3174 frag_wane(fragP);
3175 break;
3176 }
3177
3178 break;
3179 } /* case TAB(BRANCH,SZ_UNDEF) */
3180
3181 case TAB(FBRANCH,SZ_UNDEF): {
3182 if(S_GET_SEGMENT(fragP->fr_symbol) == segment || flagseen['l']) {
3183 fragP->fr_subtype = TAB(FBRANCH,SHORT);
3184 fragP->fr_var += 2;
3185 } else {
3186 fragP->fr_subtype = TAB(FBRANCH,LONG);
3187 fragP->fr_var += 4;
3188 }
3189 break;
3190 } /* TAB(FBRANCH,SZ_UNDEF) */
3191
3192 case TAB(PCREL,SZ_UNDEF): {
3193 if(S_GET_SEGMENT(fragP->fr_symbol) == segment || flagseen['l']) {
3194 fragP->fr_subtype = TAB(PCREL,SHORT);
3195 fragP->fr_var += 2;
3196 } else {
3197 fragP->fr_subtype = TAB(PCREL,LONG);
3198 fragP->fr_var += 4;
3199 }
3200 break;
3201 } /* TAB(PCREL,SZ_UNDEF) */
3202
3203 case TAB(BCC68000,SZ_UNDEF): {
3204 if((fragP->fr_symbol != NULL)
3205 && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
3206 fragP->fr_subtype=TAB(BCC68000,BYTE);
3207 break;
3208 }
3209 /* only Bcc 68000 instructions can come here */
3210 /* change bcc into b!cc/jmp absl long */
3211 fragP->fr_opcode[0] ^= 0x01; /* invert bcc */
3212 if(flagseen['l']) {
3213 fragP->fr_opcode[1] = 0x04; /* branch offset = 6 */
3214 /* JF: these were fr_opcode[2,3] */
3215 buffer_address[0] = 0x4e; /* put in jmp long (0x4ef9) */
3216 buffer_address[1] = 0xf8;
3217 fragP->fr_fix += 2; /* account for jmp instruction */
3218 subseg_change(SEG_TEXT,0);
3219 fix_new(fragP, fragP->fr_fix, 2, fragP->fr_symbol, 0,
3220 fragP->fr_offset, 0, NO_RELOC);
3221 fragP->fr_fix += 2;
3222 } else {
3223 fragP->fr_opcode[1] = 0x06; /* branch offset = 6 */
3224 /* JF: these were fr_opcode[2,3] */
3225 buffer_address[0] = 0x4e; /* put in jmp long (0x4ef9) */
3226 buffer_address[1] = 0xf9;
3227 fragP->fr_fix += 2; /* account for jmp instruction */
3228 subseg_change(SEG_TEXT,0);
3229 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3230 fragP->fr_offset, 0, NO_RELOC);
3231 fragP->fr_fix += 4;
3232 }
3233 frag_wane(fragP);
3234 break;
3235 } /* case TAB(BCC68000,SZ_UNDEF) */
3236
3237 case TAB(DBCC,SZ_UNDEF): {
3238 if (fragP->fr_symbol != NULL && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
3239 fragP->fr_subtype=TAB(DBCC,SHORT);
3240 fragP->fr_var+=2;
3241 break;
3242 }
3243 /* only DBcc 68000 instructions can come here */
3244 /* change dbcc into dbcc/jmp absl long */
3245 /* JF: these used to be fr_opcode[2-4], which is wrong. */
3246 buffer_address[0] = 0x00; /* branch offset = 4 */
3247 buffer_address[1] = 0x04;
3248 buffer_address[2] = 0x60; /* put in bra pc + ... */
3249
3250 if(flagseen['l']) {
3251 /* JF: these were fr_opcode[5-7] */
3252 buffer_address[3] = 0x04; /* plus 4 */
3253 buffer_address[4] = 0x4e;/* Put in Jump Word */
3254 buffer_address[5] = 0xf8;
3255 fragP->fr_fix += 6; /* account for bra/jmp instruction */
3256 subseg_change(SEG_TEXT,0);
3257 fix_new(fragP, fragP->fr_fix, 2, fragP->fr_symbol, 0,
3258
3259
3260 fragP->fr_offset, 0, NO_RELOC);
3261 fragP->fr_fix += 2;
3262 } else {
3263 /* JF: these were fr_opcode[5-7] */
3264 buffer_address[3] = 0x06; /* Plus 6 */
3265 buffer_address[4] = 0x4e; /* put in jmp long (0x4ef9) */
3266 buffer_address[5] = 0xf9;
3267 fragP->fr_fix += 6; /* account for bra/jmp instruction */
3268 subseg_change(SEG_TEXT,0);
3269 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3270 fragP->fr_offset, 0, NO_RELOC);
3271 fragP->fr_fix += 4;
3272 }
3273
3274 frag_wane(fragP);
3275 break;
3276 } /* case TAB(DBCC,SZ_UNDEF) */
3277
3278 case TAB(PCLEA,SZ_UNDEF): {
3279 if ((S_GET_SEGMENT(fragP->fr_symbol))==segment || flagseen['l']) {
3280 fragP->fr_subtype=TAB(PCLEA,SHORT);
3281 fragP->fr_var+=2;
3282 } else {
3283 fragP->fr_subtype=TAB(PCLEA,LONG);
3284 fragP->fr_var+=6;
3285 }
3286 break;
3287 } /* TAB(PCLEA,SZ_UNDEF) */
3288
3289 default:
3290 break;
3291
3292 } /* switch on subtype looking for SZ_UNDEF's. */
3293
3294 /* now that SZ_UNDEF are taken care of, check others */
3295 switch (fragP->fr_subtype) {
3296 case TAB(BCC68000,BYTE):
3297 case TAB(BRANCH,BYTE):
3298 /* We can't do a short jump to the next instruction,
3299 so we force word mode. */
3300 if (fragP->fr_symbol && S_GET_VALUE(fragP->fr_symbol)==0 &&
3301 fragP->fr_symbol->sy_frag==fragP->fr_next) {
3302 fragP->fr_subtype=TAB(TABTYPE(fragP->fr_subtype),SHORT);
3303 fragP->fr_var+=2;
3304 }
3305 break;
3306 default:
3307 break;
3308 }
3309 return fragP->fr_var + fragP->fr_fix - old_fix;
3310 }
3311
3312 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
3313 /* the bit-field entries in the relocation_info struct plays hell
3314 with the byte-order problems of cross-assembly. So as a hack,
3315 I added this mach. dependent ri twiddler. Ugly, but it gets
3316 you there. -KWK */
3317 /* on m68k: first 4 bytes are normal unsigned long, next three bytes
3318 are symbolnum, most sig. byte first. Last byte is broken up with
3319 bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
3320 nibble as nuthin. (on Sun 3 at least) */
3321 /* Translate the internal relocation information into target-specific
3322 format. */
3323 #ifdef comment
3324 void
3325 md_ri_to_chars(the_bytes, ri)
3326 char *the_bytes;
3327 struct reloc_info_generic *ri;
3328 {
3329 /* this is easy */
3330 md_number_to_chars(the_bytes, ri->r_address, 4);
3331 /* now the fun stuff */
3332 the_bytes[4] = (ri->r_symbolnum >> 16) & 0x0ff;
3333 the_bytes[5] = (ri->r_symbolnum >> 8) & 0x0ff;
3334 the_bytes[6] = ri->r_symbolnum & 0x0ff;
3335 the_bytes[7] = (((ri->r_pcrel << 7) & 0x80) | ((ri->r_length << 5) & 0x60) |
3336 ((ri->r_extern << 4) & 0x10));
3337 }
3338 #endif /* comment */
3339
3340 void tc_aout_fix_to_chars(where, fixP, segment_address_in_file)
3341 char *where;
3342 fixS *fixP;
3343 relax_addressT segment_address_in_file;
3344 {
3345 /*
3346 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3347 * Out: GNU LD relocation length code: 0, 1, or 2.
3348 */
3349
3350 static unsigned char nbytes_r_length [] = { 42, 0, 1, 42, 2 };
3351 long r_symbolnum;
3352
3353 know(fixP->fx_addsy != NULL);
3354
3355 md_number_to_chars(where,
3356 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
3357 4);
3358
3359 r_symbolnum = (S_IS_DEFINED(fixP->fx_addsy)
3360 ? S_GET_TYPE(fixP->fx_addsy)
3361 : fixP->fx_addsy->sy_number);
3362
3363 where[4] = (r_symbolnum >> 16) & 0x0ff;
3364 where[5] = (r_symbolnum >> 8) & 0x0ff;
3365 where[6] = r_symbolnum & 0x0ff;
3366 where[7] = (((fixP->fx_pcrel << 7) & 0x80) | ((nbytes_r_length[fixP->fx_size] << 5) & 0x60) |
3367 (((!S_IS_DEFINED(fixP->fx_addsy)) << 4) & 0x10));
3368
3369 return;
3370 } /* tc_aout_fix_to_chars() */
3371
3372 #endif /* OBJ_AOUT or OBJ_BOUT */
3373
3374 #ifndef WORKING_DOT_WORD
3375 const int md_short_jump_size = 4;
3376 const int md_long_jump_size = 6;
3377
3378 void
3379 md_create_short_jump(ptr,from_addr,to_addr,frag,to_symbol)
3380 char *ptr;
3381 long from_addr,
3382 to_addr;
3383 fragS *frag;
3384 symbolS *to_symbol;
3385 {
3386 long offset;
3387
3388 offset = to_addr - (from_addr+2);
3389
3390 md_number_to_chars(ptr ,(long)0x6000,2);
3391 md_number_to_chars(ptr+2,(long)offset,2);
3392 }
3393
3394 void
3395 md_create_long_jump(ptr,from_addr,to_addr,frag,to_symbol)
3396 char *ptr;
3397 long from_addr,
3398 to_addr;
3399 fragS *frag;
3400 symbolS *to_symbol;
3401 {
3402 long offset;
3403
3404 if (cpu_of_arch(current_architecture) < m68020) {
3405 offset=to_addr-S_GET_VALUE(to_symbol);
3406 md_number_to_chars(ptr ,(long)0x4EF9,2);
3407 md_number_to_chars(ptr+2,(long)offset,4);
3408 fix_new(frag,(ptr+2)-frag->fr_literal,4,to_symbol,(symbolS *)0,(long)0,0,
3409 NO_RELOC);
3410 } else {
3411 offset=to_addr - (from_addr+2);
3412 md_number_to_chars(ptr ,(long)0x60ff,2);
3413 md_number_to_chars(ptr+2,(long)offset,4);
3414 }
3415 }
3416
3417 #endif
3418 /* Different values of OK tell what its OK to return. Things that aren't OK are an error (what a shock, no?)
3419
3420 0: Everything is OK
3421 10: Absolute 1:8 only
3422 20: Absolute 0:7 only
3423 30: absolute 0:15 only
3424 40: Absolute 0:31 only
3425 50: absolute 0:127 only
3426 55: absolute -64:63 only
3427 60: absolute -128:127 only
3428 70: absolute 0:4095 only
3429 80: No bignums
3430
3431 */
3432
3433 static int get_num(exp,ok)
3434 struct m68k_exp *exp;
3435 int ok;
3436 {
3437 #ifdef TEST2
3438 long l = 0;
3439
3440 if(!exp->e_beg)
3441 return 0;
3442 if(*exp->e_beg=='0') {
3443 if(exp->e_beg[1]=='x')
3444 sscanf(exp->e_beg+2,"%x",&l);
3445 else
3446 sscanf(exp->e_beg+1,"%O",&l);
3447 return l;
3448 }
3449 return atol(exp->e_beg);
3450 #else
3451 char *save_in;
3452 char c_save;
3453
3454 if(!exp) {
3455 /* Can't do anything */
3456 return 0;
3457 }
3458 if(!exp->e_beg || !exp->e_end) {
3459 seg(exp)=SEG_ABSOLUTE;
3460 adds(exp)=0;
3461 subs(exp)=0;
3462 offs(exp)= (ok==10) ? 1 : 0;
3463 as_warn("Null expression defaults to %ld",offs(exp));
3464 return 0;
3465 }
3466
3467 exp->e_siz=0;
3468 if(/* ok!=80 && */exp->e_end[-1]==':' && (exp->e_end-exp->e_beg)>=2) {
3469 switch(exp->e_end[0]) {
3470 case 's':
3471 case 'S':
3472 case 'b':
3473 case 'B':
3474 exp->e_siz=1;
3475 break;
3476 case 'w':
3477 case 'W':
3478 exp->e_siz=2;
3479 break;
3480 case 'l':
3481 case 'L':
3482 exp->e_siz=3;
3483 break;
3484 default:
3485 as_bad("Unknown size for expression \"%c\"",exp->e_end[0]);
3486 }
3487 exp->e_end-=2;
3488 }
3489 c_save=exp->e_end[1];
3490 exp->e_end[1]='\0';
3491 save_in=input_line_pointer;
3492 input_line_pointer=exp->e_beg;
3493 switch(expression(&(exp->e_exp))) {
3494 case SEG_PASS1:
3495 seg(exp)=SEG_ABSOLUTE;
3496 adds(exp)=0;
3497 subs(exp)=0;
3498 offs(exp)= (ok==10) ? 1 : 0;
3499 as_warn("Unknown expression: '%s' defaulting to %d",exp->e_beg,offs(exp));
3500 break;
3501
3502 case SEG_ABSENT:
3503 /* Do the same thing the VAX asm does */
3504 seg(exp)=SEG_ABSOLUTE;
3505 adds(exp)=0;
3506 subs(exp)=0;
3507 offs(exp)=0;
3508 if(ok==10) {
3509 as_warn("expression out of range: defaulting to 1");
3510 offs(exp)=1;
3511 }
3512 break;
3513 case SEG_ABSOLUTE:
3514 switch(ok) {
3515 case 10:
3516 if(offs(exp)<1 || offs(exp)>8) {
3517 as_warn("expression out of range: defaulting to 1");
3518 offs(exp)=1;
3519 }
3520 break;
3521 case 20:
3522 if(offs(exp)<0 || offs(exp)>7)
3523 goto outrange;
3524 break;
3525 case 30:
3526 if(offs(exp)<0 || offs(exp)>15)
3527 goto outrange;
3528 break;
3529 case 40:
3530 if(offs(exp)<0 || offs(exp)>32)
3531 goto outrange;
3532 break;
3533 case 50:
3534 if(offs(exp)<0 || offs(exp)>127)
3535 goto outrange;
3536 break;
3537 case 55:
3538 if(offs(exp)<-64 || offs(exp)>63)
3539 goto outrange;
3540 break;
3541 case 60:
3542 if(offs(exp)<-128 || offs(exp)>127)
3543 goto outrange;
3544 break;
3545 case 70:
3546 if(offs(exp)<0 || offs(exp)>4095) {
3547 outrange:
3548 as_warn("expression out of range: defaulting to 0");
3549 offs(exp)=0;
3550 }
3551 break;
3552 default:
3553 break;
3554 }
3555 break;
3556 case SEG_TEXT:
3557 case SEG_DATA:
3558 case SEG_BSS:
3559 case SEG_UNKNOWN:
3560 case SEG_DIFFERENCE:
3561 if(ok>=10 && ok<=70) {
3562 seg(exp)=SEG_ABSOLUTE;
3563 adds(exp)=0;
3564 subs(exp)=0;
3565 offs(exp)= (ok==10) ? 1 : 0;
3566 as_warn("Can't deal with expression \"%s\": defaulting to %ld",exp->e_beg,offs(exp));
3567 }
3568 break;
3569 case SEG_BIG:
3570 if(ok==80 && offs(exp)<0) { /* HACK! Turn it into a long */
3571 LITTLENUM_TYPE words[6];
3572
3573 gen_to_words(words,2,8L);/* These numbers are magic! */
3574 seg(exp)=SEG_ABSOLUTE;
3575 adds(exp)=0;
3576 subs(exp)=0;
3577 offs(exp)=words[1]|(words[0]<<16);
3578 } else if(ok!=0) {
3579 seg(exp)=SEG_ABSOLUTE;
3580 adds(exp)=0;
3581 subs(exp)=0;
3582 offs(exp)= (ok==10) ? 1 : 0;
3583 as_warn("Can't deal with expression \"%s\": defaulting to %ld",exp->e_beg,offs(exp));
3584 }
3585 break;
3586 default:
3587 as_fatal("failed sanity check.");
3588 }
3589 if(input_line_pointer!=exp->e_end+1)
3590 as_bad("Ignoring junk after expression");
3591 exp->e_end[1]=c_save;
3592 input_line_pointer=save_in;
3593 if(exp->e_siz) {
3594 switch(exp->e_siz) {
3595 case 1:
3596 if(!isbyte(offs(exp)))
3597 as_warn("expression doesn't fit in BYTE");
3598 break;
3599 case 2:
3600 if(!isword(offs(exp)))
3601 as_warn("expression doesn't fit in WORD");
3602 break;
3603 }
3604 }
3605 return offs(exp);
3606 #endif
3607 } /* get_num() */
3608
3609 /* These are the back-ends for the various machine dependent pseudo-ops. */
3610 void demand_empty_rest_of_line(); /* Hate those extra verbose names */
3611
3612 static void s_data1() {
3613 subseg_new(SEG_DATA,1);
3614 demand_empty_rest_of_line();
3615 } /* s_data1() */
3616
3617 static void s_data2() {
3618 subseg_new(SEG_DATA,2);
3619 demand_empty_rest_of_line();
3620 } /* s_data2() */
3621
3622 static void s_bss()
3623 {
3624 /* We don't support putting frags in the BSS segment, we fake it
3625 by marking in_bss, then looking at s_skip for clues */
3626
3627 subseg_new(SEG_BSS, 0);
3628 demand_empty_rest_of_line();
3629 } /* s_bss() */
3630
3631 static void s_even() {
3632 register int temp;
3633 register long temp_fill;
3634
3635 temp = 1; /* JF should be 2? */
3636 temp_fill = get_absolute_expression ();
3637 if ( ! need_pass_2 ) /* Never make frag if expect extra pass. */
3638 frag_align (temp, (int)temp_fill);
3639 demand_empty_rest_of_line();
3640 } /* s_even() */
3641
3642 static void s_proc() {
3643 demand_empty_rest_of_line();
3644 } /* s_proc() */
3645
3646 /* s_space is defined in read.c .skip is simply an alias to it. */
3647
3648 /*
3649 * md_parse_option
3650 * Invocation line includes a switch not recognized by the base assembler.
3651 * See if it's a processor-specific option. These are:
3652 *
3653 * -[A]m[c]68000, -[A]m[c]68008, -[A]m[c]68010, -[A]m[c]68020, -[A]m[c]68030, -[A]m[c]68040
3654 * -[A]m[c]68881, -[A]m[c]68882, -[A]m[c]68851
3655 * Select the architecture. Instructions or features not
3656 * supported by the selected architecture cause fatal
3657 * errors. More than one may be specified. The default is
3658 * -m68020 -m68851 -m68881. Note that -m68008 is a synonym
3659 * for -m68000, and -m68882 is a synonym for -m68881.
3660 *
3661 * MAYBE_FLOAT_TOO is defined below so that specifying a processor type
3662 * (e.g. m68020) also requests that float instructions be included. This
3663 * is the default setup, mostly to avoid hassling users. A better
3664 * rearrangement of this structure would be to add an option to DENY
3665 * floating point opcodes, for people who want to really know there's none
3666 * of that funny floaty stuff going on. FIXME-later.
3667 */
3668 #ifndef MAYBE_FLOAT_TOO
3669 #define MAYBE_FLOAT_TOO m68881
3670 #endif
3671
3672 int md_parse_option(argP,cntP,vecP)
3673 char **argP;
3674 int *cntP;
3675 char ***vecP;
3676 {
3677 switch(**argP) {
3678 case 'l': /* -l means keep external to 2 bit offset
3679 rather than 16 bit one */
3680 break;
3681
3682 case 'S': /* -S means that jbsr's always turn into jsr's. */
3683 break;
3684
3685 case 'A':
3686 (*argP)++;
3687 /* intentional fall-through */
3688 case 'm':
3689 (*argP)++;
3690
3691 if (**argP=='c') {
3692 (*argP)++;
3693 } /* allow an optional "c" */
3694
3695 if (!strcmp(*argP, "68000")
3696 || !strcmp(*argP, "68008")) {
3697 current_architecture |= m68000;
3698 } else if (!strcmp(*argP, "68010")) {
3699 #ifdef TE_SUN
3700 omagic= 1<<16|OMAGIC;
3701 #endif
3702 current_architecture |= m68010;
3703
3704 } else if (!strcmp(*argP, "68020")) {
3705 current_architecture |= m68020 | MAYBE_FLOAT_TOO;
3706
3707 } else if (!strcmp(*argP, "68030")) {
3708 current_architecture |= m68030 | MAYBE_FLOAT_TOO;
3709
3710 } else if (!strcmp(*argP, "68040")) {
3711 current_architecture |= m68040 | MAYBE_FLOAT_TOO;
3712
3713 #ifndef NO_68881
3714 } else if (!strcmp(*argP, "68881")) {
3715 current_architecture |= m68881;
3716
3717 } else if (!strcmp(*argP, "68882")) {
3718 current_architecture |= m68882;
3719
3720 #endif /* NO_68881 */
3721 #ifndef NO_68851
3722 } else if (!strcmp(*argP,"68851")) {
3723 current_architecture |= m68851;
3724
3725 #endif /* NO_68851 */
3726 } else {
3727 as_warn("Unknown architecture, \"%s\". option ignored", *argP);
3728 } /* switch on architecture */
3729
3730 while(**argP) (*argP)++;
3731
3732 break;
3733
3734 case 'p':
3735 if (!strcmp(*argP,"pic")) {
3736 (*argP) += 3;
3737 break; /* -pic, Position Independent Code */
3738 } else {
3739 return(0);
3740 } /* pic or not */
3741
3742 default:
3743 return 0;
3744 }
3745 return 1;
3746 }
3747
3748
3749 #ifdef TEST2
3750
3751 /* TEST2: Test md_assemble() */
3752 /* Warning, this routine probably doesn't work anymore */
3753
3754 main()
3755 {
3756 struct m68k_it the_ins;
3757 char buf[120];
3758 char *cp;
3759 int n;
3760
3761 m68k_ip_begin();
3762 for(;;) {
3763 if(!gets(buf) || !*buf)
3764 break;
3765 if(buf[0]=='|' || buf[1]=='.')
3766 continue;
3767 for(cp=buf;*cp;cp++)
3768 if(*cp=='\t')
3769 *cp=' ';
3770 if(is_label(buf))
3771 continue;
3772 memset(&the_ins, '\0', sizeof(the_ins));
3773 m68k_ip(&the_ins,buf);
3774 if(the_ins.error) {
3775 printf("Error %s in %s\n",the_ins.error,buf);
3776 } else {
3777 printf("Opcode(%d.%s): ",the_ins.numo,the_ins.args);
3778 for(n=0;n<the_ins.numo;n++)
3779 printf(" 0x%x",the_ins.opcode[n]&0xffff);
3780 printf(" ");
3781 print_the_insn(&the_ins.opcode[0],stdout);
3782 (void)putchar('\n');
3783 }
3784 for(n=0;n<strlen(the_ins.args)/2;n++) {
3785 if(the_ins.operands[n].error) {
3786 printf("op%d Error %s in %s\n",n,the_ins.operands[n].error,buf);
3787 continue;
3788 }
3789 printf("mode %d, reg %d, ",the_ins.operands[n].mode,the_ins.operands[n].reg);
3790 if(the_ins.operands[n].b_const)
3791 printf("Constant: '%.*s', ",1+the_ins.operands[n].e_const-the_ins.operands[n].b_const,the_ins.operands[n].b_const);
3792 printf("ireg %d, isiz %d, imul %d, ",the_ins.operands[n].ireg,the_ins.operands[n].isiz,the_ins.operands[n].imul);
3793 if(the_ins.operands[n].b_iadd)
3794 printf("Iadd: '%.*s',",1+the_ins.operands[n].e_iadd-the_ins.operands[n].b_iadd,the_ins.operands[n].b_iadd);
3795 (void)putchar('\n');
3796 }
3797 }
3798 m68k_ip_end();
3799 return 0;
3800 }
3801
3802 is_label(str)
3803 char *str;
3804 {
3805 while(*str==' ')
3806 str++;
3807 while(*str && *str!=' ')
3808 str++;
3809 if(str[-1]==':' || str[1]=='=')
3810 return 1;
3811 return 0;
3812 }
3813
3814 #endif
3815
3816 /* Possible states for relaxation:
3817
3818 0 0 branch offset byte (bra, etc)
3819 0 1 word
3820 0 2 long
3821
3822 1 0 indexed offsets byte a0@(32,d4:w:1) etc
3823 1 1 word
3824 1 2 long
3825
3826 2 0 two-offset index word-word a0@(32,d4)@(45) etc
3827 2 1 word-long
3828 2 2 long-word
3829 2 3 long-long
3830
3831 */
3832
3833
3834
3835 #ifdef DONTDEF
3836 abort()
3837 {
3838 printf("ABORT!\n");
3839 exit(12);
3840 }
3841
3842 print_frags()
3843 {
3844 fragS *fragP;
3845 extern fragS *text_frag_root;
3846
3847 for(fragP=text_frag_root;fragP;fragP=fragP->fr_next) {
3848 printf("addr %lu next 0x%x fix %ld var %ld symbol 0x%x offset %ld\n",
3849 fragP->fr_address,fragP->fr_next,fragP->fr_fix,fragP->fr_var,fragP->fr_symbol,fragP->fr_offset);
3850 printf("opcode 0x%x type %d subtype %d\n\n",fragP->fr_opcode,fragP->fr_type,fragP->fr_subtype);
3851 }
3852 fflush(stdout);
3853 return 0;
3854 }
3855 #endif
3856
3857 #ifdef DONTDEF
3858 /*VARARGS1*/
3859 panic(format,args)
3860 char *format;
3861 {
3862 fputs("Internal error:",stderr);
3863 _doprnt(format,&args,stderr);
3864 (void)putc('\n',stderr);
3865 as_where();
3866 abort();
3867 }
3868 #endif
3869
3870 /* We have no need to default values of symbols. */
3871
3872 /* ARGSUSED */
3873 symbolS *
3874 md_undefined_symbol (name)
3875 char *name;
3876 {
3877 return 0;
3878 }
3879
3880 /* Parse an operand that is machine-specific.
3881 We just return without modifying the expression if we have nothing
3882 to do. */
3883
3884 /* ARGSUSED */
3885 void
3886 md_operand (expressionP)
3887 expressionS *expressionP;
3888 {
3889 }
3890
3891 /* Round up a section size to the appropriate boundary. */
3892 long
3893 md_section_align (segment, size)
3894 segT segment;
3895 long size;
3896 {
3897 return size; /* Byte alignment is fine */
3898 }
3899
3900 /* Exactly what point is a PC-relative offset relative TO?
3901 On the 68k, they're relative to the address of the offset, plus
3902 its size. (??? Is this right? FIXME-SOON!) */
3903 long
3904 md_pcrel_from (fixP)
3905 fixS *fixP;
3906 {
3907 return(fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address);
3908 }
3909
3910 /*
3911 * Local Variables:
3912 * comment-column: 0
3913 * fill-column: 131
3914 * End:
3915 */
3916
3917 /* end of tc-m68k.c */
GDB Binutils - Deliverables
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