1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
3 2006, 2007 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
23 #include "safe-ctype.h"
25 #include "opcode/mn10300.h"
26 #include "dwarf2dbg.h"
27 #include "libiberty.h"
29 /* Structure to hold information about predefined registers. */
36 /* Generic assembler global variables which must be defined by all
39 /* Characters which always start a comment. */
40 const char comment_chars
[] = "#";
42 /* Characters which start a comment at the beginning of a line. */
43 const char line_comment_chars
[] = ";#";
45 /* Characters which may be used to separate multiple commands on a
47 const char line_separator_chars
[] = ";";
49 /* Characters which are used to indicate an exponent in a floating
51 const char EXP_CHARS
[] = "eE";
53 /* Characters which mean that a number is a floating point constant,
55 const char FLT_CHARS
[] = "dD";
57 const relax_typeS md_relax_table
[] =
59 /* The plus values for the bCC and fBCC instructions in the table below
60 are because the branch instruction is translated into a jump
61 instruction that is now +2 or +3 bytes further on in memory, and the
62 correct size of jump instruction must be selected. */
65 {0x7fff + 2, -0x8000 + 2, 5, 2},
66 {0x7fffffff, -0x80000000, 7, 0},
68 /* bCC relaxing (uncommon cases for 3byte length instructions) */
70 {0x7fff + 3, -0x8000 + 3, 6, 5},
71 {0x7fffffff, -0x80000000, 8, 0},
74 {0x7fff, -0x8000, 5, 7},
75 {0x7fffffff, -0x80000000, 7, 0},
78 {0x7fff, -0x8000, 4, 9},
79 {0x7fffffff, -0x80000000, 6, 0},
83 {0x7fff, -0x8000, 3, 12},
84 {0x7fffffff, -0x80000000, 5, 0},
88 {0x7fff + 3, -0x8000 + 3, 6, 15},
89 {0x7fffffff, -0x80000000, 8, 0},
93 /* Set linkrelax here to avoid fixups in most sections. */
96 static int current_machine
;
99 #define MAX_INSN_FIXUPS 5
105 bfd_reloc_code_real_type reloc
;
107 struct mn10300_fixup fixups
[MAX_INSN_FIXUPS
];
110 /* We must store the value of each register operand so that we can
111 verify that certain registers do not match. */
112 int mn10300_reg_operands
[MN10300_MAX_OPERANDS
];
114 const char *md_shortopts
= "";
116 struct option md_longopts
[] =
118 {NULL
, no_argument
, NULL
, 0}
121 size_t md_longopts_size
= sizeof (md_longopts
);
123 #define HAVE_AM33_2 (current_machine == AM33_2)
124 #define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2)
125 #define HAVE_AM30 (current_machine == AM30)
127 /* Opcode hash table. */
128 static struct hash_control
*mn10300_hash
;
130 /* This table is sorted. Suitable for searching by a binary search. */
131 static const struct reg_name data_registers
[] =
139 static const struct reg_name address_registers
[] =
147 static const struct reg_name r_registers
[] =
191 static const struct reg_name xr_registers
[] =
216 static const struct reg_name float_registers
[] =
252 static const struct reg_name double_registers
[] =
272 /* We abuse the `value' field, that would be otherwise unused, to
273 encode the architecture on which (access to) the register was
274 introduced. FIXME: we should probably warn when we encounter a
275 register name when assembling for an architecture that doesn't
276 support it, before parsing it as a symbol name. */
277 static const struct reg_name other_registers
[] =
286 #define OTHER_REG_NAME_CNT ARRAY_SIZE (other_registers)
288 /* Perform a binary search of the given register table REGS to see
289 if NAME is a valid regiter name. Returns the register number from
290 the array on success, or -1 on failure. */
293 reg_name_search (const struct reg_name
*regs
,
306 middle
= (low
+ high
) / 2;
307 cmp
= strcasecmp (name
, regs
[middle
].name
);
313 return regs
[middle
].value
;
320 /* Looks at the current position in the input line to see if it is
321 the name of a register in TABLE. If it is, then the name is
322 converted into an expression returned in EXPRESSIONP (with X_op
323 set to O_register and X_add_number set to the register number), the
324 input pointer is left pointing at the first non-blank character after
325 the name and the function returns TRUE. Otherwise the input pointer
326 is left alone and the function returns FALSE. */
329 get_register_name (expressionS
* expressionP
,
330 const struct reg_name
* table
,
338 /* Find the spelling of the operand. */
339 start
= name
= input_line_pointer
;
341 c
= get_symbol_end ();
342 reg_number
= reg_name_search (table
, table_length
, name
);
344 /* Put back the delimiting char. */
345 *input_line_pointer
= c
;
347 /* Look to see if it's in the register table. */
350 expressionP
->X_op
= O_register
;
351 expressionP
->X_add_number
= reg_number
;
353 /* Make the rest nice. */
354 expressionP
->X_add_symbol
= NULL
;
355 expressionP
->X_op_symbol
= NULL
;
360 /* Reset the line as if we had not done anything. */
361 input_line_pointer
= start
;
366 r_register_name (expressionS
*expressionP
)
368 return get_register_name (expressionP
, r_registers
, ARRAY_SIZE (r_registers
));
373 xr_register_name (expressionS
*expressionP
)
375 return get_register_name (expressionP
, xr_registers
, ARRAY_SIZE (xr_registers
));
379 data_register_name (expressionS
*expressionP
)
381 return get_register_name (expressionP
, data_registers
, ARRAY_SIZE (data_registers
));
385 address_register_name (expressionS
*expressionP
)
387 return get_register_name (expressionP
, address_registers
, ARRAY_SIZE (address_registers
));
391 float_register_name (expressionS
*expressionP
)
393 return get_register_name (expressionP
, float_registers
, ARRAY_SIZE (float_registers
));
397 double_register_name (expressionS
*expressionP
)
399 return get_register_name (expressionP
, double_registers
, ARRAY_SIZE (double_registers
));
403 other_register_name (expressionS
*expressionP
)
410 /* Find the spelling of the operand. */
411 start
= name
= input_line_pointer
;
413 c
= get_symbol_end ();
414 reg_number
= reg_name_search (other_registers
, ARRAY_SIZE (other_registers
), name
);
416 /* Put back the delimiting char. */
417 *input_line_pointer
= c
;
419 /* Look to see if it's in the register table. */
421 || (reg_number
== AM33
&& HAVE_AM33
))
423 expressionP
->X_op
= O_register
;
424 expressionP
->X_add_number
= 0;
426 /* Make the rest nice. */
427 expressionP
->X_add_symbol
= NULL
;
428 expressionP
->X_op_symbol
= NULL
;
433 /* Reset the line as if we had not done anything. */
434 input_line_pointer
= start
;
439 md_show_usage (FILE *stream
)
441 fprintf (stream
, _("MN10300 assembler options:\n\
446 md_parse_option (int c ATTRIBUTE_UNUSED
, char *arg ATTRIBUTE_UNUSED
)
452 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
458 md_atof (int type
, char *litp
, int *sizep
)
460 return ieee_md_atof (type
, litp
, sizep
, FALSE
);
464 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
468 static unsigned long label_count
= 0;
471 subseg_change (sec
, 0);
472 if (fragP
->fr_subtype
== 0)
474 fix_new (fragP
, fragP
->fr_fix
+ 1, 1, fragP
->fr_symbol
,
475 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
479 else if (fragP
->fr_subtype
== 1)
481 /* Reverse the condition of the first branch. */
482 int offset
= fragP
->fr_fix
;
483 int opcode
= fragP
->fr_literal
[offset
] & 0xff;
520 fragP
->fr_literal
[offset
] = opcode
;
522 /* Create a fixup for the reversed conditional branch. */
523 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
524 fix_new (fragP
, fragP
->fr_fix
+ 1, 1,
525 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
526 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
528 /* Now create the unconditional branch + fixup to the
530 fragP
->fr_literal
[offset
+ 2] = 0xcc;
531 fix_new (fragP
, fragP
->fr_fix
+ 3, 2, fragP
->fr_symbol
,
532 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
536 else if (fragP
->fr_subtype
== 2)
538 /* Reverse the condition of the first branch. */
539 int offset
= fragP
->fr_fix
;
540 int opcode
= fragP
->fr_literal
[offset
] & 0xff;
577 fragP
->fr_literal
[offset
] = opcode
;
579 /* Create a fixup for the reversed conditional branch. */
580 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
581 fix_new (fragP
, fragP
->fr_fix
+ 1, 1,
582 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
583 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
585 /* Now create the unconditional branch + fixup to the
587 fragP
->fr_literal
[offset
+ 2] = 0xdc;
588 fix_new (fragP
, fragP
->fr_fix
+ 3, 4, fragP
->fr_symbol
,
589 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
593 else if (fragP
->fr_subtype
== 3)
595 fix_new (fragP
, fragP
->fr_fix
+ 2, 1, fragP
->fr_symbol
,
596 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
600 else if (fragP
->fr_subtype
== 4)
602 /* Reverse the condition of the first branch. */
603 int offset
= fragP
->fr_fix
;
604 int opcode
= fragP
->fr_literal
[offset
+ 1] & 0xff;
623 fragP
->fr_literal
[offset
+ 1] = opcode
;
625 /* Create a fixup for the reversed conditional branch. */
626 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
627 fix_new (fragP
, fragP
->fr_fix
+ 2, 1,
628 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
629 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
631 /* Now create the unconditional branch + fixup to the
633 fragP
->fr_literal
[offset
+ 3] = 0xcc;
634 fix_new (fragP
, fragP
->fr_fix
+ 4, 2, fragP
->fr_symbol
,
635 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
639 else if (fragP
->fr_subtype
== 5)
641 /* Reverse the condition of the first branch. */
642 int offset
= fragP
->fr_fix
;
643 int opcode
= fragP
->fr_literal
[offset
+ 1] & 0xff;
659 fragP
->fr_literal
[offset
+ 1] = opcode
;
661 /* Create a fixup for the reversed conditional branch. */
662 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
663 fix_new (fragP
, fragP
->fr_fix
+ 2, 1,
664 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
665 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
667 /* Now create the unconditional branch + fixup to the
669 fragP
->fr_literal
[offset
+ 3] = 0xdc;
670 fix_new (fragP
, fragP
->fr_fix
+ 4, 4, fragP
->fr_symbol
,
671 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
675 else if (fragP
->fr_subtype
== 6)
677 int offset
= fragP
->fr_fix
;
678 fragP
->fr_literal
[offset
] = 0xcd;
679 fix_new (fragP
, fragP
->fr_fix
+ 1, 2, fragP
->fr_symbol
,
680 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
684 else if (fragP
->fr_subtype
== 7)
686 int offset
= fragP
->fr_fix
;
687 fragP
->fr_literal
[offset
] = 0xdd;
688 fragP
->fr_literal
[offset
+ 5] = fragP
->fr_literal
[offset
+ 3];
689 fragP
->fr_literal
[offset
+ 6] = fragP
->fr_literal
[offset
+ 4];
691 fix_new (fragP
, fragP
->fr_fix
+ 1, 4, fragP
->fr_symbol
,
692 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
696 else if (fragP
->fr_subtype
== 8)
698 int offset
= fragP
->fr_fix
;
699 fragP
->fr_literal
[offset
] = 0xfa;
700 fragP
->fr_literal
[offset
+ 1] = 0xff;
701 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
702 fragP
->fr_offset
+ 2, 1, BFD_RELOC_16_PCREL
);
706 else if (fragP
->fr_subtype
== 9)
708 int offset
= fragP
->fr_fix
;
709 fragP
->fr_literal
[offset
] = 0xfc;
710 fragP
->fr_literal
[offset
+ 1] = 0xff;
712 fix_new (fragP
, fragP
->fr_fix
+ 2, 4, fragP
->fr_symbol
,
713 fragP
->fr_offset
+ 2, 1, BFD_RELOC_32_PCREL
);
717 else if (fragP
->fr_subtype
== 10)
719 fragP
->fr_literal
[fragP
->fr_fix
] = 0xca;
720 fix_new (fragP
, fragP
->fr_fix
+ 1, 1, fragP
->fr_symbol
,
721 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
725 else if (fragP
->fr_subtype
== 11)
727 int offset
= fragP
->fr_fix
;
728 fragP
->fr_literal
[offset
] = 0xcc;
730 fix_new (fragP
, fragP
->fr_fix
+ 1, 2, fragP
->fr_symbol
,
731 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
735 else if (fragP
->fr_subtype
== 12)
737 int offset
= fragP
->fr_fix
;
738 fragP
->fr_literal
[offset
] = 0xdc;
740 fix_new (fragP
, fragP
->fr_fix
+ 1, 4, fragP
->fr_symbol
,
741 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
745 else if (fragP
->fr_subtype
== 13)
747 fix_new (fragP
, fragP
->fr_fix
+ 2, 1, fragP
->fr_symbol
,
748 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
752 else if (fragP
->fr_subtype
== 14)
754 /* Reverse the condition of the first branch. */
755 int offset
= fragP
->fr_fix
;
756 int opcode
= fragP
->fr_literal
[offset
+ 1] & 0xff;
805 fragP
->fr_literal
[offset
+ 1] = opcode
;
807 /* Create a fixup for the reversed conditional branch. */
808 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
809 fix_new (fragP
, fragP
->fr_fix
+ 2, 1,
810 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
811 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
813 /* Now create the unconditional branch + fixup to the
815 fragP
->fr_literal
[offset
+ 3] = 0xcc;
816 fix_new (fragP
, fragP
->fr_fix
+ 4, 2, fragP
->fr_symbol
,
817 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
821 else if (fragP
->fr_subtype
== 15)
823 /* Reverse the condition of the first branch. */
824 int offset
= fragP
->fr_fix
;
825 int opcode
= fragP
->fr_literal
[offset
+ 1] & 0xff;
874 fragP
->fr_literal
[offset
+ 1] = opcode
;
876 /* Create a fixup for the reversed conditional branch. */
877 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
878 fix_new (fragP
, fragP
->fr_fix
+ 2, 1,
879 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
880 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
882 /* Now create the unconditional branch + fixup to the
884 fragP
->fr_literal
[offset
+ 3] = 0xdc;
885 fix_new (fragP
, fragP
->fr_fix
+ 4, 4, fragP
->fr_symbol
,
886 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
895 md_section_align (asection
*seg
, valueT addr
)
897 int align
= bfd_get_section_alignment (stdoutput
, seg
);
899 return ((addr
+ (1 << align
) - 1) & (-1 << align
));
905 char *prev_name
= "";
906 const struct mn10300_opcode
*op
;
908 mn10300_hash
= hash_new ();
910 /* Insert unique names into hash table. The MN10300 instruction set
911 has many identical opcode names that have different opcodes based
912 on the operands. This hash table then provides a quick index to
913 the first opcode with a particular name in the opcode table. */
915 op
= mn10300_opcodes
;
918 if (strcmp (prev_name
, op
->name
))
920 prev_name
= (char *) op
->name
;
921 hash_insert (mn10300_hash
, op
->name
, (char *) op
);
926 /* Set the default machine type. */
928 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_mn10300
, AM33_2
))
929 as_warn (_("could not set architecture and machine"));
931 current_machine
= AM33_2
;
933 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_mn10300
, MN103
))
934 as_warn (_("could not set architecture and machine"));
936 current_machine
= MN103
;
940 static symbolS
*GOT_symbol
;
943 mn10300_PIC_related_p (symbolS
*sym
)
950 if (sym
== GOT_symbol
)
953 exp
= symbol_get_value_expression (sym
);
955 return (exp
->X_op
== O_PIC_reloc
956 || mn10300_PIC_related_p (exp
->X_add_symbol
)
957 || mn10300_PIC_related_p (exp
->X_op_symbol
));
961 mn10300_check_fixup (struct mn10300_fixup
*fixup
)
963 expressionS
*exp
= &fixup
->exp
;
969 case O_subtract
: /* If we're sufficiently unlucky that the label
970 and the expression that references it happen
971 to end up in different frags, the subtract
972 won't be simplified within expression(). */
973 /* The PIC-related operand must be the first operand of a sum. */
974 if (exp
!= &fixup
->exp
|| mn10300_PIC_related_p (exp
->X_op_symbol
))
977 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
978 fixup
->reloc
= BFD_RELOC_32_GOT_PCREL
;
980 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
984 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
985 fixup
->reloc
= BFD_RELOC_32_GOT_PCREL
;
989 fixup
->reloc
= exp
->X_md
;
990 exp
->X_op
= O_symbol
;
991 if (fixup
->reloc
== BFD_RELOC_32_PLT_PCREL
992 && fixup
->opindex
>= 0
993 && (mn10300_operands
[fixup
->opindex
].flags
994 & MN10300_OPERAND_RELAX
))
999 return (mn10300_PIC_related_p (exp
->X_add_symbol
)
1000 || mn10300_PIC_related_p (exp
->X_op_symbol
));
1007 mn10300_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
)
1009 struct mn10300_fixup fixup
;
1013 fixup
.reloc
= BFD_RELOC_UNUSED
;
1015 mn10300_check_fixup (&fixup
);
1017 if (fixup
.reloc
== BFD_RELOC_MN10300_GOT32
)
1021 fixup
.reloc
= BFD_RELOC_MN10300_GOT16
;
1025 fixup
.reloc
= BFD_RELOC_MN10300_GOT24
;
1034 else if (fixup
.reloc
== BFD_RELOC_UNUSED
)
1038 fixup
.reloc
= BFD_RELOC_8
;
1042 fixup
.reloc
= BFD_RELOC_16
;
1046 fixup
.reloc
= BFD_RELOC_24
;
1050 fixup
.reloc
= BFD_RELOC_32
;
1059 as_bad (_("unsupported BFD relocation size %u"), size
);
1060 fixup
.reloc
= BFD_RELOC_UNUSED
;
1063 fix_new_exp (frag
, off
, size
, &fixup
.exp
, 0, fixup
.reloc
);
1067 check_operand (const struct mn10300_operand
*operand
,
1070 /* No need to check 32bit operands for a bit. Note that
1071 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1072 if (operand
->bits
!= 32
1073 && (operand
->flags
& MN10300_OPERAND_SPLIT
) == 0)
1079 bits
= operand
->bits
;
1080 if (operand
->flags
& MN10300_OPERAND_24BIT
)
1083 if ((operand
->flags
& MN10300_OPERAND_SIGNED
) != 0)
1085 max
= (1 << (bits
- 1)) - 1;
1086 min
= - (1 << (bits
- 1));
1090 max
= (1 << bits
) - 1;
1096 if (test
< (offsetT
) min
|| test
> (offsetT
) max
)
1102 /* Insert an operand value into an instruction. */
1105 mn10300_insert_operand (unsigned long *insnp
,
1106 unsigned long *extensionp
,
1107 const struct mn10300_operand
*operand
,
1113 /* No need to check 32bit operands for a bit. Note that
1114 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1115 if (operand
->bits
!= 32
1116 && (operand
->flags
& MN10300_OPERAND_SPLIT
) == 0)
1122 bits
= operand
->bits
;
1123 if (operand
->flags
& MN10300_OPERAND_24BIT
)
1126 if ((operand
->flags
& MN10300_OPERAND_SIGNED
) != 0)
1128 max
= (1 << (bits
- 1)) - 1;
1129 min
= - (1 << (bits
- 1));
1133 max
= (1 << bits
) - 1;
1139 if (test
< (offsetT
) min
|| test
> (offsetT
) max
)
1140 as_warn_value_out_of_range (_("operand"), test
, (offsetT
) min
, (offsetT
) max
, file
, line
);
1143 if ((operand
->flags
& MN10300_OPERAND_SPLIT
) != 0)
1145 *insnp
|= (val
>> (32 - operand
->bits
)) & ((1 << operand
->bits
) - 1);
1146 *extensionp
|= ((val
& ((1 << (32 - operand
->bits
)) - 1))
1149 else if ((operand
->flags
& MN10300_OPERAND_24BIT
) != 0)
1151 *insnp
|= (val
>> (24 - operand
->bits
)) & ((1 << operand
->bits
) - 1);
1152 *extensionp
|= ((val
& ((1 << (24 - operand
->bits
)) - 1))
1155 else if ((operand
->flags
& (MN10300_OPERAND_FSREG
| MN10300_OPERAND_FDREG
)))
1157 /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an
1158 explanation of these variables. Note that FMT-implied shifts
1159 are not taken into account for FP registers. */
1160 unsigned long mask_low
, mask_high
;
1161 int shl_low
, shr_high
, shl_high
;
1163 switch (operand
->bits
)
1166 /* Handle regular FP registers. */
1167 if (operand
->shift
>= 0)
1169 /* This is an `m' register. */
1170 shl_low
= operand
->shift
;
1171 shl_high
= 8 + (8 & shl_low
) + (shl_low
& 4) / 4;
1175 /* This is an `n' register. */
1176 shl_low
= -operand
->shift
;
1177 shl_high
= shl_low
/ 4;
1186 /* Handle accumulators. */
1187 shl_low
= -operand
->shift
;
1197 *insnp
|= ((((val
& mask_high
) >> shr_high
) << shl_high
)
1198 | ((val
& mask_low
) << shl_low
));
1200 else if ((operand
->flags
& MN10300_OPERAND_EXTENDED
) == 0)
1202 *insnp
|= (((long) val
& ((1 << operand
->bits
) - 1))
1203 << (operand
->shift
+ shift
));
1205 if ((operand
->flags
& MN10300_OPERAND_REPEATED
) != 0)
1206 *insnp
|= (((long) val
& ((1 << operand
->bits
) - 1))
1207 << (operand
->shift
+ shift
+ operand
->bits
));
1211 *extensionp
|= (((long) val
& ((1 << operand
->bits
) - 1))
1212 << (operand
->shift
+ shift
));
1214 if ((operand
->flags
& MN10300_OPERAND_REPEATED
) != 0)
1215 *extensionp
|= (((long) val
& ((1 << operand
->bits
) - 1))
1216 << (operand
->shift
+ shift
+ operand
->bits
));
1221 md_assemble (char *str
)
1224 struct mn10300_opcode
*opcode
;
1225 struct mn10300_opcode
*next_opcode
;
1226 const unsigned char *opindex_ptr
;
1227 int next_opindex
, relaxable
;
1228 unsigned long insn
, extension
, size
= 0;
1233 /* Get the opcode. */
1234 for (s
= str
; *s
!= '\0' && !ISSPACE (*s
); s
++)
1239 /* Find the first opcode with the proper name. */
1240 opcode
= (struct mn10300_opcode
*) hash_find (mn10300_hash
, str
);
1243 as_bad (_("Unrecognized opcode: `%s'"), str
);
1248 while (ISSPACE (*str
))
1251 input_line_pointer
= str
;
1258 int extra_shift
= 0;
1260 errmsg
= _("Invalid opcode/operands");
1262 /* Reset the array of register operands. */
1263 memset (mn10300_reg_operands
, -1, sizeof (mn10300_reg_operands
));
1269 insn
= opcode
->opcode
;
1272 /* If the instruction is not available on the current machine
1273 then it can not possibly match. */
1275 && !(opcode
->machine
== AM33_2
&& HAVE_AM33_2
)
1276 && !(opcode
->machine
== AM33
&& HAVE_AM33
)
1277 && !(opcode
->machine
== AM30
&& HAVE_AM30
))
1280 for (op_idx
= 1, opindex_ptr
= opcode
->operands
;
1282 opindex_ptr
++, op_idx
++)
1284 const struct mn10300_operand
*operand
;
1287 if (next_opindex
== 0)
1289 operand
= &mn10300_operands
[*opindex_ptr
];
1293 operand
= &mn10300_operands
[next_opindex
];
1297 while (*str
== ' ' || *str
== ',')
1300 if (operand
->flags
& MN10300_OPERAND_RELAX
)
1303 /* Gather the operand. */
1304 hold
= input_line_pointer
;
1305 input_line_pointer
= str
;
1307 if (operand
->flags
& MN10300_OPERAND_PAREN
)
1309 if (*input_line_pointer
!= ')' && *input_line_pointer
!= '(')
1311 input_line_pointer
= hold
;
1315 input_line_pointer
++;
1318 /* See if we can match the operands. */
1319 else if (operand
->flags
& MN10300_OPERAND_DREG
)
1321 if (!data_register_name (&ex
))
1323 input_line_pointer
= hold
;
1328 else if (operand
->flags
& MN10300_OPERAND_AREG
)
1330 if (!address_register_name (&ex
))
1332 input_line_pointer
= hold
;
1337 else if (operand
->flags
& MN10300_OPERAND_SP
)
1339 char *start
= input_line_pointer
;
1340 char c
= get_symbol_end ();
1342 if (strcasecmp (start
, "sp") != 0)
1344 *input_line_pointer
= c
;
1345 input_line_pointer
= hold
;
1349 *input_line_pointer
= c
;
1352 else if (operand
->flags
& MN10300_OPERAND_RREG
)
1354 if (!r_register_name (&ex
))
1356 input_line_pointer
= hold
;
1361 else if (operand
->flags
& MN10300_OPERAND_XRREG
)
1363 if (!xr_register_name (&ex
))
1365 input_line_pointer
= hold
;
1370 else if (operand
->flags
& MN10300_OPERAND_FSREG
)
1372 if (!float_register_name (&ex
))
1374 input_line_pointer
= hold
;
1379 else if (operand
->flags
& MN10300_OPERAND_FDREG
)
1381 if (!double_register_name (&ex
))
1383 input_line_pointer
= hold
;
1388 else if (operand
->flags
& MN10300_OPERAND_FPCR
)
1390 char *start
= input_line_pointer
;
1391 char c
= get_symbol_end ();
1393 if (strcasecmp (start
, "fpcr") != 0)
1395 *input_line_pointer
= c
;
1396 input_line_pointer
= hold
;
1400 *input_line_pointer
= c
;
1403 else if (operand
->flags
& MN10300_OPERAND_USP
)
1405 char *start
= input_line_pointer
;
1406 char c
= get_symbol_end ();
1408 if (strcasecmp (start
, "usp") != 0)
1410 *input_line_pointer
= c
;
1411 input_line_pointer
= hold
;
1415 *input_line_pointer
= c
;
1418 else if (operand
->flags
& MN10300_OPERAND_SSP
)
1420 char *start
= input_line_pointer
;
1421 char c
= get_symbol_end ();
1423 if (strcasecmp (start
, "ssp") != 0)
1425 *input_line_pointer
= c
;
1426 input_line_pointer
= hold
;
1430 *input_line_pointer
= c
;
1433 else if (operand
->flags
& MN10300_OPERAND_MSP
)
1435 char *start
= input_line_pointer
;
1436 char c
= get_symbol_end ();
1438 if (strcasecmp (start
, "msp") != 0)
1440 *input_line_pointer
= c
;
1441 input_line_pointer
= hold
;
1445 *input_line_pointer
= c
;
1448 else if (operand
->flags
& MN10300_OPERAND_PC
)
1450 char *start
= input_line_pointer
;
1451 char c
= get_symbol_end ();
1453 if (strcasecmp (start
, "pc") != 0)
1455 *input_line_pointer
= c
;
1456 input_line_pointer
= hold
;
1460 *input_line_pointer
= c
;
1463 else if (operand
->flags
& MN10300_OPERAND_EPSW
)
1465 char *start
= input_line_pointer
;
1466 char c
= get_symbol_end ();
1468 if (strcasecmp (start
, "epsw") != 0)
1470 *input_line_pointer
= c
;
1471 input_line_pointer
= hold
;
1475 *input_line_pointer
= c
;
1478 else if (operand
->flags
& MN10300_OPERAND_PLUS
)
1480 if (*input_line_pointer
!= '+')
1482 input_line_pointer
= hold
;
1486 input_line_pointer
++;
1489 else if (operand
->flags
& MN10300_OPERAND_PSW
)
1491 char *start
= input_line_pointer
;
1492 char c
= get_symbol_end ();
1494 if (strcasecmp (start
, "psw") != 0)
1496 *input_line_pointer
= c
;
1497 input_line_pointer
= hold
;
1501 *input_line_pointer
= c
;
1504 else if (operand
->flags
& MN10300_OPERAND_MDR
)
1506 char *start
= input_line_pointer
;
1507 char c
= get_symbol_end ();
1509 if (strcasecmp (start
, "mdr") != 0)
1511 *input_line_pointer
= c
;
1512 input_line_pointer
= hold
;
1516 *input_line_pointer
= c
;
1519 else if (operand
->flags
& MN10300_OPERAND_REG_LIST
)
1521 unsigned int value
= 0;
1522 if (*input_line_pointer
!= '[')
1524 input_line_pointer
= hold
;
1530 input_line_pointer
++;
1532 /* We used to reject a null register list here; however,
1533 we accept it now so the compiler can emit "call"
1534 instructions for all calls to named functions.
1536 The linker can then fill in the appropriate bits for the
1537 register list and stack size or change the instruction
1538 into a "calls" if using "call" is not profitable. */
1539 while (*input_line_pointer
!= ']')
1544 if (*input_line_pointer
== ',')
1545 input_line_pointer
++;
1547 start
= input_line_pointer
;
1548 c
= get_symbol_end ();
1550 if (strcasecmp (start
, "d2") == 0)
1553 *input_line_pointer
= c
;
1555 else if (strcasecmp (start
, "d3") == 0)
1558 *input_line_pointer
= c
;
1560 else if (strcasecmp (start
, "a2") == 0)
1563 *input_line_pointer
= c
;
1565 else if (strcasecmp (start
, "a3") == 0)
1568 *input_line_pointer
= c
;
1570 else if (strcasecmp (start
, "other") == 0)
1573 *input_line_pointer
= c
;
1576 && strcasecmp (start
, "exreg0") == 0)
1579 *input_line_pointer
= c
;
1582 && strcasecmp (start
, "exreg1") == 0)
1585 *input_line_pointer
= c
;
1588 && strcasecmp (start
, "exother") == 0)
1591 *input_line_pointer
= c
;
1594 && strcasecmp (start
, "all") == 0)
1597 *input_line_pointer
= c
;
1601 input_line_pointer
= hold
;
1606 input_line_pointer
++;
1607 mn10300_insert_operand (& insn
, & extension
, operand
,
1612 else if (data_register_name (&ex
))
1614 input_line_pointer
= hold
;
1618 else if (address_register_name (&ex
))
1620 input_line_pointer
= hold
;
1624 else if (other_register_name (&ex
))
1626 input_line_pointer
= hold
;
1630 else if (HAVE_AM33
&& r_register_name (&ex
))
1632 input_line_pointer
= hold
;
1636 else if (HAVE_AM33
&& xr_register_name (&ex
))
1638 input_line_pointer
= hold
;
1642 else if (HAVE_AM33_2
&& float_register_name (&ex
))
1644 input_line_pointer
= hold
;
1648 else if (HAVE_AM33_2
&& double_register_name (&ex
))
1650 input_line_pointer
= hold
;
1654 else if (*str
== ')' || *str
== '(')
1656 input_line_pointer
= hold
;
1668 errmsg
= _("illegal operand");
1671 errmsg
= _("missing operand");
1677 mask
= MN10300_OPERAND_DREG
| MN10300_OPERAND_AREG
;
1679 mask
|= MN10300_OPERAND_RREG
| MN10300_OPERAND_XRREG
;
1681 mask
|= MN10300_OPERAND_FSREG
| MN10300_OPERAND_FDREG
;
1682 if ((operand
->flags
& mask
) == 0)
1684 input_line_pointer
= hold
;
1689 if (opcode
->format
== FMT_D1
|| opcode
->format
== FMT_S1
)
1691 else if (opcode
->format
== FMT_D2
1692 || opcode
->format
== FMT_D4
1693 || opcode
->format
== FMT_S2
1694 || opcode
->format
== FMT_S4
1695 || opcode
->format
== FMT_S6
1696 || opcode
->format
== FMT_D5
)
1698 else if (opcode
->format
== FMT_D7
)
1700 else if (opcode
->format
== FMT_D8
|| opcode
->format
== FMT_D9
)
1705 mn10300_insert_operand (& insn
, & extension
, operand
,
1706 ex
.X_add_number
, NULL
,
1709 /* And note the register number in the register array. */
1710 mn10300_reg_operands
[op_idx
- 1] = ex
.X_add_number
;
1715 /* If this operand can be promoted, and it doesn't
1716 fit into the allocated bitfield for this insn,
1717 then promote it (ie this opcode does not match). */
1719 & (MN10300_OPERAND_PROMOTE
| MN10300_OPERAND_RELAX
)
1720 && !check_operand (operand
, ex
.X_add_number
))
1722 input_line_pointer
= hold
;
1727 mn10300_insert_operand (& insn
, & extension
, operand
,
1728 ex
.X_add_number
, NULL
, 0, 0);
1732 /* If this operand can be promoted, then this opcode didn't
1733 match since we can't know if it needed promotion! */
1734 if (operand
->flags
& MN10300_OPERAND_PROMOTE
)
1736 input_line_pointer
= hold
;
1741 /* We need to generate a fixup for this expression. */
1742 if (fc
>= MAX_INSN_FIXUPS
)
1743 as_fatal (_("too many fixups"));
1744 fixups
[fc
].exp
= ex
;
1745 fixups
[fc
].opindex
= *opindex_ptr
;
1746 fixups
[fc
].reloc
= BFD_RELOC_UNUSED
;
1747 if (mn10300_check_fixup (& fixups
[fc
]))
1754 str
= input_line_pointer
;
1755 input_line_pointer
= hold
;
1757 while (*str
== ' ' || *str
== ',')
1761 /* Make sure we used all the operands! */
1765 /* If this instruction has registers that must not match, verify
1766 that they do indeed not match. */
1767 if (opcode
->no_match_operands
)
1771 /* Look at each operand to see if it's marked. */
1772 for (i
= 0; i
< MN10300_MAX_OPERANDS
; i
++)
1774 if ((1 << i
) & opcode
->no_match_operands
)
1778 /* operand I is marked. Check that it does not match any
1779 operands > I which are marked. */
1780 for (j
= i
+ 1; j
< MN10300_MAX_OPERANDS
; j
++)
1782 if (((1 << j
) & opcode
->no_match_operands
)
1783 && mn10300_reg_operands
[i
] == mn10300_reg_operands
[j
])
1785 errmsg
= _("Invalid register specification.");
1797 next_opcode
= opcode
+ 1;
1798 if (!strcmp (next_opcode
->name
, opcode
->name
))
1800 opcode
= next_opcode
;
1804 as_bad ("%s", errmsg
);
1810 while (ISSPACE (*str
))
1814 as_bad (_("junk at end of line: `%s'"), str
);
1816 input_line_pointer
= str
;
1818 /* Determine the size of the instruction. */
1819 if (opcode
->format
== FMT_S0
)
1822 if (opcode
->format
== FMT_S1
|| opcode
->format
== FMT_D0
)
1825 if (opcode
->format
== FMT_S2
|| opcode
->format
== FMT_D1
)
1828 if (opcode
->format
== FMT_D6
)
1831 if (opcode
->format
== FMT_D7
|| opcode
->format
== FMT_D10
)
1834 if (opcode
->format
== FMT_D8
)
1837 if (opcode
->format
== FMT_D9
)
1840 if (opcode
->format
== FMT_S4
)
1843 if (opcode
->format
== FMT_S6
|| opcode
->format
== FMT_D5
)
1846 if (opcode
->format
== FMT_D2
)
1849 if (opcode
->format
== FMT_D3
)
1852 if (opcode
->format
== FMT_D4
)
1855 if (relaxable
&& fc
> 0)
1857 /* On a 64-bit host the size of an 'int' is not the same
1858 as the size of a pointer, so we need a union to convert
1859 the opindex field of the fr_cgen structure into a char *
1860 so that it can be stored in the frag. We do not have
1861 to worry about loosing accuracy as we are not going to
1862 be even close to the 32bit limit of the int. */
1871 /* We want to anchor the line info to the previous frag (if
1872 there isn't one, create it), so that, when the insn is
1873 resized, we still get the right address for the beginning of
1876 dwarf2_emit_insn (0);
1881 /* Handle bra specially. Basically treat it like jmp so
1882 that we automatically handle 8, 16 and 32 bit offsets
1883 correctly as well as jumps to an undefined address.
1885 It is also important to not treat it like other bCC
1886 instructions since the long forms of bra is different
1887 from other bCC instructions. */
1888 if (opcode
->opcode
== 0xca00)
1900 else if (size
== 3 && opcode
->opcode
== 0xcc0000)
1902 else if (size
== 3 && (opcode
->opcode
& 0xfff000) == 0xf8d000)
1904 /* bCC (uncommon cases) */
1908 opindex_converter
.opindex
= fixups
[0].opindex
;
1909 f
= frag_var (rs_machine_dependent
, 8, 8 - size
, type
,
1910 fixups
[0].exp
.X_add_symbol
,
1911 fixups
[0].exp
.X_add_number
,
1912 opindex_converter
.ptr
);
1914 /* This is pretty hokey. We basically just care about the
1915 opcode, so we have to write out the first word big endian.
1917 The exception is "call", which has two operands that we
1920 The first operand (the register list) happens to be in the
1921 first instruction word, and will be in the right place if
1922 we output the first word in big endian mode.
1924 The second operand (stack size) is in the extension word,
1925 and we want it to appear as the first character in the extension
1926 word (as it appears in memory). Luckily, writing the extension
1927 word in big endian format will do what we want. */
1928 number_to_chars_bigendian (f
, insn
, size
> 4 ? 4 : size
);
1931 number_to_chars_bigendian (f
+ 4, extension
, 4);
1932 number_to_chars_bigendian (f
+ 8, 0, size
- 8);
1935 number_to_chars_bigendian (f
+ 4, extension
, size
- 4);
1939 /* Allocate space for the instruction. */
1940 f
= frag_more (size
);
1942 /* Fill in bytes for the instruction. Note that opcode fields
1943 are written big-endian, 16 & 32bit immediates are written
1944 little endian. Egad. */
1945 if (opcode
->format
== FMT_S0
1946 || opcode
->format
== FMT_S1
1947 || opcode
->format
== FMT_D0
1948 || opcode
->format
== FMT_D6
1949 || opcode
->format
== FMT_D7
1950 || opcode
->format
== FMT_D10
1951 || opcode
->format
== FMT_D1
)
1953 number_to_chars_bigendian (f
, insn
, size
);
1955 else if (opcode
->format
== FMT_S2
1956 && opcode
->opcode
!= 0xdf0000
1957 && opcode
->opcode
!= 0xde0000)
1959 /* A format S2 instruction that is _not_ "ret" and "retf". */
1960 number_to_chars_bigendian (f
, (insn
>> 16) & 0xff, 1);
1961 number_to_chars_littleendian (f
+ 1, insn
& 0xffff, 2);
1963 else if (opcode
->format
== FMT_S2
)
1965 /* This must be a ret or retf, which is written entirely in
1966 big-endian format. */
1967 number_to_chars_bigendian (f
, insn
, 3);
1969 else if (opcode
->format
== FMT_S4
1970 && opcode
->opcode
!= 0xdc000000)
1972 /* This must be a format S4 "call" instruction. What a pain. */
1973 unsigned long temp
= (insn
>> 8) & 0xffff;
1974 number_to_chars_bigendian (f
, (insn
>> 24) & 0xff, 1);
1975 number_to_chars_littleendian (f
+ 1, temp
, 2);
1976 number_to_chars_bigendian (f
+ 3, insn
& 0xff, 1);
1977 number_to_chars_bigendian (f
+ 4, extension
& 0xff, 1);
1979 else if (opcode
->format
== FMT_S4
)
1981 /* This must be a format S4 "jmp" instruction. */
1982 unsigned long temp
= ((insn
& 0xffffff) << 8) | (extension
& 0xff);
1983 number_to_chars_bigendian (f
, (insn
>> 24) & 0xff, 1);
1984 number_to_chars_littleendian (f
+ 1, temp
, 4);
1986 else if (opcode
->format
== FMT_S6
)
1988 unsigned long temp
= ((insn
& 0xffffff) << 8)
1989 | ((extension
>> 16) & 0xff);
1990 number_to_chars_bigendian (f
, (insn
>> 24) & 0xff, 1);
1991 number_to_chars_littleendian (f
+ 1, temp
, 4);
1992 number_to_chars_bigendian (f
+ 5, (extension
>> 8) & 0xff, 1);
1993 number_to_chars_bigendian (f
+ 6, extension
& 0xff, 1);
1995 else if (opcode
->format
== FMT_D2
1996 && opcode
->opcode
!= 0xfaf80000
1997 && opcode
->opcode
!= 0xfaf00000
1998 && opcode
->opcode
!= 0xfaf40000)
2000 /* A format D2 instruction where the 16bit immediate is
2001 really a single 16bit value, not two 8bit values. */
2002 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
2003 number_to_chars_littleendian (f
+ 2, insn
& 0xffff, 2);
2005 else if (opcode
->format
== FMT_D2
)
2007 /* A format D2 instruction where the 16bit immediate
2008 is really two 8bit immediates. */
2009 number_to_chars_bigendian (f
, insn
, 4);
2011 else if (opcode
->format
== FMT_D3
)
2013 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
2014 number_to_chars_littleendian (f
+ 2, insn
& 0xffff, 2);
2015 number_to_chars_bigendian (f
+ 4, extension
& 0xff, 1);
2017 else if (opcode
->format
== FMT_D4
)
2019 unsigned long temp
= ((insn
& 0xffff) << 16) | (extension
& 0xffff);
2021 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
2022 number_to_chars_littleendian (f
+ 2, temp
, 4);
2024 else if (opcode
->format
== FMT_D5
)
2026 unsigned long temp
= (((insn
& 0xffff) << 16)
2027 | ((extension
>> 8) & 0xffff));
2029 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
2030 number_to_chars_littleendian (f
+ 2, temp
, 4);
2031 number_to_chars_bigendian (f
+ 6, extension
& 0xff, 1);
2033 else if (opcode
->format
== FMT_D8
)
2035 unsigned long temp
= ((insn
& 0xff) << 16) | (extension
& 0xffff);
2037 number_to_chars_bigendian (f
, (insn
>> 8) & 0xffffff, 3);
2038 number_to_chars_bigendian (f
+ 3, (temp
& 0xff), 1);
2039 number_to_chars_littleendian (f
+ 4, temp
>> 8, 2);
2041 else if (opcode
->format
== FMT_D9
)
2043 unsigned long temp
= ((insn
& 0xff) << 24) | (extension
& 0xffffff);
2045 number_to_chars_bigendian (f
, (insn
>> 8) & 0xffffff, 3);
2046 number_to_chars_littleendian (f
+ 3, temp
, 4);
2049 /* Create any fixups. */
2050 for (i
= 0; i
< fc
; i
++)
2052 const struct mn10300_operand
*operand
;
2054 operand
= &mn10300_operands
[fixups
[i
].opindex
];
2055 if (fixups
[i
].reloc
!= BFD_RELOC_UNUSED
2056 && fixups
[i
].reloc
!= BFD_RELOC_32_GOT_PCREL
2057 && fixups
[i
].reloc
!= BFD_RELOC_32_GOTOFF
2058 && fixups
[i
].reloc
!= BFD_RELOC_32_PLT_PCREL
2059 && fixups
[i
].reloc
!= BFD_RELOC_MN10300_GOT32
)
2061 reloc_howto_type
*reloc_howto
;
2066 reloc_howto
= bfd_reloc_type_lookup (stdoutput
,
2072 size
= bfd_get_reloc_size (reloc_howto
);
2074 if (size
< 1 || size
> 4)
2078 fixP
= fix_new_exp (frag_now
, f
- frag_now
->fr_literal
+ offset
,
2079 size
, &fixups
[i
].exp
,
2080 reloc_howto
->pc_relative
,
2085 int reloc
, pcrel
, reloc_size
, offset
;
2088 reloc
= BFD_RELOC_NONE
;
2089 if (fixups
[i
].reloc
!= BFD_RELOC_UNUSED
)
2090 reloc
= fixups
[i
].reloc
;
2091 /* How big is the reloc? Remember SPLIT relocs are
2092 implicitly 32bits. */
2093 if ((operand
->flags
& MN10300_OPERAND_SPLIT
) != 0)
2095 else if ((operand
->flags
& MN10300_OPERAND_24BIT
) != 0)
2098 reloc_size
= operand
->bits
;
2100 /* Is the reloc pc-relative? */
2101 pcrel
= (operand
->flags
& MN10300_OPERAND_PCREL
) != 0;
2102 if (reloc
!= BFD_RELOC_NONE
)
2103 pcrel
= bfd_reloc_type_lookup (stdoutput
, reloc
)->pc_relative
;
2105 offset
= size
- (reloc_size
+ operand
->shift
) / 8;
2107 /* Choose a proper BFD relocation type. */
2108 if (reloc
!= BFD_RELOC_NONE
)
2112 if (reloc_size
== 32)
2113 reloc
= BFD_RELOC_32_PCREL
;
2114 else if (reloc_size
== 16)
2115 reloc
= BFD_RELOC_16_PCREL
;
2116 else if (reloc_size
== 8)
2117 reloc
= BFD_RELOC_8_PCREL
;
2123 if (reloc_size
== 32)
2124 reloc
= BFD_RELOC_32
;
2125 else if (reloc_size
== 16)
2126 reloc
= BFD_RELOC_16
;
2127 else if (reloc_size
== 8)
2128 reloc
= BFD_RELOC_8
;
2133 fixP
= fix_new_exp (frag_now
, f
- frag_now
->fr_literal
+ offset
,
2134 reloc_size
/ 8, &fixups
[i
].exp
, pcrel
,
2135 ((bfd_reloc_code_real_type
) reloc
));
2138 fixP
->fx_offset
+= offset
;
2142 dwarf2_emit_insn (size
);
2145 /* Label this frag as one that contains instructions. */
2146 frag_now
->tc_frag_data
= TRUE
;
2149 /* If while processing a fixup, a reloc really needs to be created
2150 then it is done here. */
2153 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
2155 static arelent
* no_relocs
= NULL
;
2156 static arelent
* relocs
[MAX_RELOC_EXPANSION
+ 1];
2159 reloc
= xmalloc (sizeof (arelent
));
2161 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
2162 if (reloc
->howto
== NULL
)
2164 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2165 _("reloc %d not supported by object file format"),
2166 (int) fixp
->fx_r_type
);
2171 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2176 && S_GET_SEGMENT (fixp
->fx_subsy
) == absolute_section
)
2178 fixp
->fx_offset
-= S_GET_VALUE (fixp
->fx_subsy
);
2179 fixp
->fx_subsy
= NULL
;
2182 if (fixp
->fx_addsy
&& fixp
->fx_subsy
)
2184 reloc
->sym_ptr_ptr
= NULL
;
2186 /* If we have a difference between two (non-absolute) symbols we must
2187 generate two relocs (one for each symbol) and allow the linker to
2188 resolve them - relaxation may change the distances between symbols,
2189 even local symbols defined in the same segment. */
2190 if (S_GET_SEGMENT (fixp
->fx_subsy
) == seg
)
2192 arelent
* reloc2
= xmalloc (sizeof * reloc
);
2197 reloc2
->address
= reloc
->address
;
2198 reloc2
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_MN10300_SYM_DIFF
);
2199 reloc2
->addend
= - S_GET_VALUE (fixp
->fx_subsy
);
2200 reloc2
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
2201 *reloc2
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
2203 reloc
->addend
= fixp
->fx_offset
;
2204 if (S_GET_SEGMENT (fixp
->fx_addsy
) == absolute_section
)
2205 reloc
->addend
+= S_GET_VALUE (fixp
->fx_addsy
);
2207 reloc
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
2208 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
2215 if ((S_GET_SEGMENT (fixp
->fx_addsy
) != S_GET_SEGMENT (fixp
->fx_subsy
))
2216 || S_GET_SEGMENT (fixp
->fx_addsy
) == undefined_section
)
2218 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2219 "Difference of symbols in different sections is not supported");
2223 char *fixpos
= fixp
->fx_where
+ fixp
->fx_frag
->fr_literal
;
2225 reloc
->addend
= (S_GET_VALUE (fixp
->fx_addsy
)
2226 - S_GET_VALUE (fixp
->fx_subsy
) + fixp
->fx_offset
);
2228 switch (fixp
->fx_r_type
)
2231 md_number_to_chars (fixpos
, reloc
->addend
, 1);
2235 md_number_to_chars (fixpos
, reloc
->addend
, 2);
2239 md_number_to_chars (fixpos
, reloc
->addend
, 3);
2243 md_number_to_chars (fixpos
, reloc
->addend
, 4);
2248 = (asymbol
**) bfd_abs_section_ptr
->symbol_ptr_ptr
;
2253 if (reloc
->sym_ptr_ptr
)
2254 free (reloc
->sym_ptr_ptr
);
2260 reloc
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
2261 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
2262 reloc
->addend
= fixp
->fx_offset
;
2268 md_estimate_size_before_relax (fragS
*fragp
, asection
*seg
)
2270 if (fragp
->fr_subtype
== 6
2271 && (!S_IS_DEFINED (fragp
->fr_symbol
)
2272 || seg
!= S_GET_SEGMENT (fragp
->fr_symbol
)))
2273 fragp
->fr_subtype
= 7;
2274 else if (fragp
->fr_subtype
== 8
2275 && (!S_IS_DEFINED (fragp
->fr_symbol
)
2276 || seg
!= S_GET_SEGMENT (fragp
->fr_symbol
)))
2277 fragp
->fr_subtype
= 9;
2278 else if (fragp
->fr_subtype
== 10
2279 && (!S_IS_DEFINED (fragp
->fr_symbol
)
2280 || seg
!= S_GET_SEGMENT (fragp
->fr_symbol
)))
2281 fragp
->fr_subtype
= 12;
2283 if (fragp
->fr_subtype
== 13)
2285 if (fragp
->fr_subtype
>= sizeof (md_relax_table
) / sizeof (md_relax_table
[0]))
2288 return md_relax_table
[fragp
->fr_subtype
].rlx_length
;
2292 md_pcrel_from (fixS
*fixp
)
2294 if (fixp
->fx_addsy
!= NULL
&& !S_IS_DEFINED (fixp
->fx_addsy
))
2296 /* The symbol is undefined. Let the linker figure it out. */
2299 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2303 md_apply_fix (fixS
* fixP
, valueT
* valP
, segT seg
)
2305 char * fixpos
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2307 int value
= (int) * valP
;
2309 assert (fixP
->fx_r_type
< BFD_RELOC_UNUSED
);
2311 /* This should never happen. */
2312 if (seg
->flags
& SEC_ALLOC
)
2315 /* The value we are passed in *valuep includes the symbol values.
2316 If we are doing this relocation the code in write.c is going to
2317 call bfd_install_relocation, which is also going to use the symbol
2318 value. That means that if the reloc is fully resolved we want to
2319 use *valuep since bfd_install_relocation is not being used.
2321 However, if the reloc is not fully resolved we do not want to use
2322 *valuep, and must use fx_offset instead. However, if the reloc
2323 is PC relative, we do want to use *valuep since it includes the
2324 result of md_pcrel_from. */
2325 if (fixP
->fx_addsy
!= NULL
&& ! fixP
->fx_pcrel
)
2326 value
= fixP
->fx_offset
;
2328 /* If the fix is relative to a symbol which is not defined, or not
2329 in the same segment as the fix, we cannot resolve it here. */
2330 if (fixP
->fx_addsy
!= NULL
2331 && (! S_IS_DEFINED (fixP
->fx_addsy
)
2332 || (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)))
2338 switch (fixP
->fx_r_type
)
2341 case BFD_RELOC_8_PCREL
:
2346 case BFD_RELOC_16_PCREL
:
2351 case BFD_RELOC_32_PCREL
:
2355 case BFD_RELOC_VTABLE_INHERIT
:
2356 case BFD_RELOC_VTABLE_ENTRY
:
2360 case BFD_RELOC_NONE
:
2362 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
2363 _("Bad relocation fixup type (%d)"), fixP
->fx_r_type
);
2366 md_number_to_chars (fixpos
, value
, size
);
2368 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
2369 if (fixP
->fx_addsy
== NULL
)
2373 /* Return zero if the fixup in fixp should be left alone and not
2377 mn10300_fix_adjustable (struct fix
*fixp
)
2381 if (TC_FORCE_RELOCATION_LOCAL (fixp
))
2384 /* Non-relative relocs can (and must) be adjusted if they do
2385 not meet the criteria below, or the generic criteria. */
2386 else if (TC_FORCE_RELOCATION (fixp
))
2389 /* Do not adjust relocations involving symbols in code sections,
2390 because it breaks linker relaxations. This could be fixed in the
2391 linker, but this fix is simpler, and it pretty much only affects
2392 object size a little bit. */
2393 if (S_GET_SEGMENT (fixp
->fx_addsy
)->flags
& SEC_CODE
)
2396 /* Likewise, do not adjust symbols that won't be merged, or debug
2397 symbols, because they too break relaxation. We do want to adjust
2398 other mergable symbols, like .rodata, because code relaxations
2399 need section-relative symbols to properly relax them. */
2400 if (! (S_GET_SEGMENT (fixp
->fx_addsy
)->flags
& SEC_MERGE
))
2403 if (strncmp (S_GET_SEGMENT (fixp
->fx_addsy
)->name
, ".debug", 6) == 0)
2410 set_arch_mach (int mach
)
2412 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_mn10300
, mach
))
2413 as_warn (_("could not set architecture and machine"));
2415 current_machine
= mach
;
2418 static inline char *
2419 mn10300_end_of_match (char *cont
, char *what
)
2421 int len
= strlen (what
);
2423 if (strncmp (cont
, what
, strlen (what
)) == 0
2424 && ! is_part_of_name (cont
[len
]))
2431 mn10300_parse_name (char const *name
,
2433 enum expr_mode mode
,
2436 char *next
= input_line_pointer
;
2441 exprP
->X_op_symbol
= NULL
;
2443 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
2446 GOT_symbol
= symbol_find_or_make (name
);
2448 exprP
->X_add_symbol
= GOT_symbol
;
2450 /* If we have an absolute symbol or a reg,
2451 then we know its value now. */
2452 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
2453 if (mode
!= expr_defer
&& segment
== absolute_section
)
2455 exprP
->X_op
= O_constant
;
2456 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
2457 exprP
->X_add_symbol
= NULL
;
2459 else if (mode
!= expr_defer
&& segment
== reg_section
)
2461 exprP
->X_op
= O_register
;
2462 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
2463 exprP
->X_add_symbol
= NULL
;
2467 exprP
->X_op
= O_symbol
;
2468 exprP
->X_add_number
= 0;
2474 exprP
->X_add_symbol
= symbol_find_or_make (name
);
2476 if (*nextcharP
!= '@')
2478 else if ((next_end
= mn10300_end_of_match (next
+ 1, "GOTOFF")))
2479 reloc_type
= BFD_RELOC_32_GOTOFF
;
2480 else if ((next_end
= mn10300_end_of_match (next
+ 1, "GOT")))
2481 reloc_type
= BFD_RELOC_MN10300_GOT32
;
2482 else if ((next_end
= mn10300_end_of_match (next
+ 1, "PLT")))
2483 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
2487 *input_line_pointer
= *nextcharP
;
2488 input_line_pointer
= next_end
;
2489 *nextcharP
= *input_line_pointer
;
2490 *input_line_pointer
= '\0';
2492 exprP
->X_op
= O_PIC_reloc
;
2493 exprP
->X_add_number
= 0;
2494 exprP
->X_md
= reloc_type
;
2499 /* The target specific pseudo-ops which we support. */
2500 const pseudo_typeS md_pseudo_table
[] =
2502 { "am30", set_arch_mach
, AM30
},
2503 { "am33", set_arch_mach
, AM33
},
2504 { "am33_2", set_arch_mach
, AM33_2
},
2505 { "mn10300", set_arch_mach
, MN103
},
2509 /* Returns FALSE if there is some mn10300 specific reason why the
2510 subtraction of two same-section symbols cannot be computed by
2514 mn10300_allow_local_subtract (expressionS
* left
, expressionS
* right
, segT section
)
2521 /* If we are not performing linker relaxation then we have nothing
2526 /* If the symbols are not in a code section then they are OK. */
2527 if ((section
->flags
& SEC_CODE
) == 0)
2530 /* Otherwise we have to scan the fragments between the two symbols.
2531 If any instructions are found then we have to assume that linker
2532 relaxation may change their size and so we must delay resolving
2533 the subtraction until the final link. */
2534 left_frag
= symbol_get_frag (left
->X_add_symbol
);
2535 right_frag
= symbol_get_frag (right
->X_add_symbol
);
2537 if (left_frag
== right_frag
)
2538 return ! left_frag
->tc_frag_data
;
2541 for (frag
= left_frag
; frag
!= NULL
; frag
= frag
->fr_next
)
2543 if (frag
->tc_frag_data
)
2545 if (frag
== right_frag
)
2550 for (frag
= right_frag
; frag
!= NULL
; frag
= frag
->fr_next
)
2552 if (frag
->tc_frag_data
)
2554 if (frag
== left_frag
)
2559 /* The two symbols are on disjoint fragment chains
2560 - we cannot possibly compute their difference. */