Unable to build x86 hosted debugger for ARM Linux, due to missing target
[deliverable/binutils-gdb.git] / gas / config / tc-mn10300.c
1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 #include <stdio.h>
22 #include <ctype.h>
23 #include "as.h"
24 #include "subsegs.h"
25 #include "opcode/mn10300.h"
26 \f
27 /* Structure to hold information about predefined registers. */
28 struct reg_name
29 {
30 const char *name;
31 int value;
32 };
33
34 /* Generic assembler global variables which must be defined by all targets. */
35
36 /* Characters which always start a comment. */
37 const char comment_chars[] = "#";
38
39 /* Characters which start a comment at the beginning of a line. */
40 const char line_comment_chars[] = ";#";
41
42 /* Characters which may be used to separate multiple commands on a
43 single line. */
44 const char line_separator_chars[] = ";";
45
46 /* Characters which are used to indicate an exponent in a floating
47 point number. */
48 const char EXP_CHARS[] = "eE";
49
50 /* Characters which mean that a number is a floating point constant,
51 as in 0d1.0. */
52 const char FLT_CHARS[] = "dD";
53 \f
54
55 const relax_typeS md_relax_table[] = {
56 /* bCC relaxing */
57 {0x7f, -0x80, 2, 1},
58 {0x7fff, -0x8000, 5, 2},
59 {0x7fffffff, -0x80000000, 7, 0},
60
61 /* bCC relaxing (uncommon cases) */
62 {0x7f, -0x80, 3, 4},
63 {0x7fff, -0x8000, 6, 5},
64 {0x7fffffff, -0x80000000, 8, 0},
65
66 /* call relaxing */
67 {0x7fff, -0x8000, 5, 7},
68 {0x7fffffff, -0x80000000, 7, 0},
69
70 /* calls relaxing */
71 {0x7fff, -0x8000, 4, 9},
72 {0x7fffffff, -0x80000000, 6, 0},
73
74 /* jmp relaxing */
75 {0x7f, -0x80, 2, 11},
76 {0x7fff, -0x8000, 3, 12},
77 {0x7fffffff, -0x80000000, 5, 0},
78
79 };
80
81 /* local functions */
82 static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *,
83 const struct mn10300_operand *,
84 offsetT, char *, unsigned,
85 unsigned));
86 static unsigned long check_operand PARAMS ((unsigned long,
87 const struct mn10300_operand *,
88 offsetT));
89 static int reg_name_search PARAMS ((const struct reg_name *, int, const char *));
90 static boolean data_register_name PARAMS ((expressionS *expressionP));
91 static boolean address_register_name PARAMS ((expressionS *expressionP));
92 static boolean other_register_name PARAMS ((expressionS *expressionP));
93 static void set_arch_mach PARAMS ((int));
94
95 static int current_machine;
96
97 /* fixups */
98 #define MAX_INSN_FIXUPS (5)
99 struct mn10300_fixup
100 {
101 expressionS exp;
102 int opindex;
103 bfd_reloc_code_real_type reloc;
104 };
105 struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
106 static int fc;
107
108 /* We must store the value of each register operand so that we can
109 verify that certain registers do not match. */
110 int mn10300_reg_operands[MN10300_MAX_OPERANDS];
111 \f
112 const char *md_shortopts = "";
113 struct option md_longopts[] = {
114 {NULL, no_argument, NULL, 0}
115 };
116 size_t md_longopts_size = sizeof(md_longopts);
117
118 /* The target specific pseudo-ops which we support. */
119 const pseudo_typeS md_pseudo_table[] =
120 {
121 { "am30", set_arch_mach, AM30 },
122 { "am33", set_arch_mach, AM33 },
123 { "mn10300", set_arch_mach, MN103 },
124 {NULL, 0, 0}
125 };
126
127 #define HAVE_AM33 (current_machine == AM33)
128
129 /* Opcode hash table. */
130 static struct hash_control *mn10300_hash;
131
132 /* This table is sorted. Suitable for searching by a binary search. */
133 static const struct reg_name data_registers[] =
134 {
135 { "d0", 0 },
136 { "d1", 1 },
137 { "d2", 2 },
138 { "d3", 3 },
139 };
140 #define DATA_REG_NAME_CNT (sizeof(data_registers) / sizeof(struct reg_name))
141
142 static const struct reg_name address_registers[] =
143 {
144 { "a0", 0 },
145 { "a1", 1 },
146 { "a2", 2 },
147 { "a3", 3 },
148 };
149 #define ADDRESS_REG_NAME_CNT (sizeof(address_registers) / sizeof(struct reg_name))
150
151 static const struct reg_name r_registers[] =
152 {
153 { "a0", 8 },
154 { "a1", 9 },
155 { "a2", 10 },
156 { "a3", 11 },
157 { "d0", 12 },
158 { "d1", 13 },
159 { "d2", 14 },
160 { "d3", 15 },
161 { "e0", 0 },
162 { "e1", 1 },
163 { "e10", 10 },
164 { "e11", 11 },
165 { "e12", 12 },
166 { "e13", 13 },
167 { "e14", 14 },
168 { "e15", 15 },
169 { "e2", 2 },
170 { "e3", 3 },
171 { "e4", 4 },
172 { "e5", 5 },
173 { "e6", 6 },
174 { "e7", 7 },
175 { "e8", 8 },
176 { "e9", 9 },
177 { "r0", 0 },
178 { "r1", 1 },
179 { "r10", 10 },
180 { "r11", 11 },
181 { "r12", 12 },
182 { "r13", 13 },
183 { "r14", 14 },
184 { "r15", 15 },
185 { "r2", 2 },
186 { "r3", 3 },
187 { "r4", 4 },
188 { "r5", 5 },
189 { "r6", 6 },
190 { "r7", 7 },
191 { "r8", 8 },
192 { "r9", 9 },
193 };
194 #define R_REG_NAME_CNT (sizeof(r_registers) / sizeof(struct reg_name))
195
196 static const struct reg_name xr_registers[] =
197 {
198 { "mcrh", 2 },
199 { "mcrl", 3 },
200 { "mcvf", 4 },
201 { "mdrq", 1 },
202 { "sp", 0 },
203 { "xr0", 0 },
204 { "xr1", 1 },
205 { "xr10", 10 },
206 { "xr11", 11 },
207 { "xr12", 12 },
208 { "xr13", 13 },
209 { "xr14", 14 },
210 { "xr15", 15 },
211 { "xr2", 2 },
212 { "xr3", 3 },
213 { "xr4", 4 },
214 { "xr5", 5 },
215 { "xr6", 6 },
216 { "xr7", 7 },
217 { "xr8", 8 },
218 { "xr9", 9 },
219 };
220 #define XR_REG_NAME_CNT (sizeof(xr_registers) / sizeof(struct reg_name))
221
222
223 static const struct reg_name other_registers[] =
224 {
225 { "mdr", 0 },
226 { "psw", 0 },
227 { "sp", 0 },
228 };
229 #define OTHER_REG_NAME_CNT (sizeof(other_registers) / sizeof(struct reg_name))
230
231 /* reg_name_search does a binary search of the given register table
232 to see if "name" is a valid regiter name. Returns the register
233 number from the array on success, or -1 on failure. */
234
235 static int
236 reg_name_search (regs, regcount, name)
237 const struct reg_name *regs;
238 int regcount;
239 const char *name;
240 {
241 int middle, low, high;
242 int cmp;
243
244 low = 0;
245 high = regcount - 1;
246
247 do
248 {
249 middle = (low + high) / 2;
250 cmp = strcasecmp (name, regs[middle].name);
251 if (cmp < 0)
252 high = middle - 1;
253 else if (cmp > 0)
254 low = middle + 1;
255 else
256 return regs[middle].value;
257 }
258 while (low <= high);
259 return -1;
260 }
261
262
263 /* Summary of register_name().
264 *
265 * in: Input_line_pointer points to 1st char of operand.
266 *
267 * out: A expressionS.
268 * The operand may have been a register: in this case, X_op == O_register,
269 * X_add_number is set to the register number, and truth is returned.
270 * Input_line_pointer->(next non-blank) char after operand, or is in
271 * its original state.
272 */
273 static boolean
274 r_register_name (expressionP)
275 expressionS *expressionP;
276 {
277 int reg_number;
278 char *name;
279 char *start;
280 char c;
281
282 /* Find the spelling of the operand */
283 start = name = input_line_pointer;
284
285 c = get_symbol_end ();
286 reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name);
287
288 /* look to see if it's in the register table */
289 if (reg_number >= 0)
290 {
291 expressionP->X_op = O_register;
292 expressionP->X_add_number = reg_number;
293
294 /* make the rest nice */
295 expressionP->X_add_symbol = NULL;
296 expressionP->X_op_symbol = NULL;
297 *input_line_pointer = c; /* put back the delimiting char */
298 return true;
299 }
300 else
301 {
302 /* reset the line as if we had not done anything */
303 *input_line_pointer = c; /* put back the delimiting char */
304 input_line_pointer = start; /* reset input_line pointer */
305 return false;
306 }
307 }
308
309 /* Summary of register_name().
310 *
311 * in: Input_line_pointer points to 1st char of operand.
312 *
313 * out: A expressionS.
314 * The operand may have been a register: in this case, X_op == O_register,
315 * X_add_number is set to the register number, and truth is returned.
316 * Input_line_pointer->(next non-blank) char after operand, or is in
317 * its original state.
318 */
319 static boolean
320 xr_register_name (expressionP)
321 expressionS *expressionP;
322 {
323 int reg_number;
324 char *name;
325 char *start;
326 char c;
327
328 /* Find the spelling of the operand */
329 start = name = input_line_pointer;
330
331 c = get_symbol_end ();
332 reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name);
333
334 /* look to see if it's in the register table */
335 if (reg_number >= 0)
336 {
337 expressionP->X_op = O_register;
338 expressionP->X_add_number = reg_number;
339
340 /* make the rest nice */
341 expressionP->X_add_symbol = NULL;
342 expressionP->X_op_symbol = NULL;
343 *input_line_pointer = c; /* put back the delimiting char */
344 return true;
345 }
346 else
347 {
348 /* reset the line as if we had not done anything */
349 *input_line_pointer = c; /* put back the delimiting char */
350 input_line_pointer = start; /* reset input_line pointer */
351 return false;
352 }
353 }
354
355 /* Summary of register_name().
356 *
357 * in: Input_line_pointer points to 1st char of operand.
358 *
359 * out: A expressionS.
360 * The operand may have been a register: in this case, X_op == O_register,
361 * X_add_number is set to the register number, and truth is returned.
362 * Input_line_pointer->(next non-blank) char after operand, or is in
363 * its original state.
364 */
365 static boolean
366 data_register_name (expressionP)
367 expressionS *expressionP;
368 {
369 int reg_number;
370 char *name;
371 char *start;
372 char c;
373
374 /* Find the spelling of the operand */
375 start = name = input_line_pointer;
376
377 c = get_symbol_end ();
378 reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name);
379
380 /* look to see if it's in the register table */
381 if (reg_number >= 0)
382 {
383 expressionP->X_op = O_register;
384 expressionP->X_add_number = reg_number;
385
386 /* make the rest nice */
387 expressionP->X_add_symbol = NULL;
388 expressionP->X_op_symbol = NULL;
389 *input_line_pointer = c; /* put back the delimiting char */
390 return true;
391 }
392 else
393 {
394 /* reset the line as if we had not done anything */
395 *input_line_pointer = c; /* put back the delimiting char */
396 input_line_pointer = start; /* reset input_line pointer */
397 return false;
398 }
399 }
400
401 /* Summary of register_name().
402 *
403 * in: Input_line_pointer points to 1st char of operand.
404 *
405 * out: A expressionS.
406 * The operand may have been a register: in this case, X_op == O_register,
407 * X_add_number is set to the register number, and truth is returned.
408 * Input_line_pointer->(next non-blank) char after operand, or is in
409 * its original state.
410 */
411 static boolean
412 address_register_name (expressionP)
413 expressionS *expressionP;
414 {
415 int reg_number;
416 char *name;
417 char *start;
418 char c;
419
420 /* Find the spelling of the operand */
421 start = name = input_line_pointer;
422
423 c = get_symbol_end ();
424 reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name);
425
426 /* look to see if it's in the register table */
427 if (reg_number >= 0)
428 {
429 expressionP->X_op = O_register;
430 expressionP->X_add_number = reg_number;
431
432 /* make the rest nice */
433 expressionP->X_add_symbol = NULL;
434 expressionP->X_op_symbol = NULL;
435 *input_line_pointer = c; /* put back the delimiting char */
436 return true;
437 }
438 else
439 {
440 /* reset the line as if we had not done anything */
441 *input_line_pointer = c; /* put back the delimiting char */
442 input_line_pointer = start; /* reset input_line pointer */
443 return false;
444 }
445 }
446
447 /* Summary of register_name().
448 *
449 * in: Input_line_pointer points to 1st char of operand.
450 *
451 * out: A expressionS.
452 * The operand may have been a register: in this case, X_op == O_register,
453 * X_add_number is set to the register number, and truth is returned.
454 * Input_line_pointer->(next non-blank) char after operand, or is in
455 * its original state.
456 */
457 static boolean
458 other_register_name (expressionP)
459 expressionS *expressionP;
460 {
461 int reg_number;
462 char *name;
463 char *start;
464 char c;
465
466 /* Find the spelling of the operand */
467 start = name = input_line_pointer;
468
469 c = get_symbol_end ();
470 reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name);
471
472 /* look to see if it's in the register table */
473 if (reg_number >= 0)
474 {
475 expressionP->X_op = O_register;
476 expressionP->X_add_number = reg_number;
477
478 /* make the rest nice */
479 expressionP->X_add_symbol = NULL;
480 expressionP->X_op_symbol = NULL;
481 *input_line_pointer = c; /* put back the delimiting char */
482 return true;
483 }
484 else
485 {
486 /* reset the line as if we had not done anything */
487 *input_line_pointer = c; /* put back the delimiting char */
488 input_line_pointer = start; /* reset input_line pointer */
489 return false;
490 }
491 }
492
493 void
494 md_show_usage (stream)
495 FILE *stream;
496 {
497 fprintf(stream, _("MN10300 options:\n\
498 none yet\n"));
499 }
500
501 int
502 md_parse_option (c, arg)
503 int c;
504 char *arg;
505 {
506 return 0;
507 }
508
509 symbolS *
510 md_undefined_symbol (name)
511 char *name;
512 {
513 return 0;
514 }
515
516 char *
517 md_atof (type, litp, sizep)
518 int type;
519 char *litp;
520 int *sizep;
521 {
522 int prec;
523 LITTLENUM_TYPE words[4];
524 char *t;
525 int i;
526
527 switch (type)
528 {
529 case 'f':
530 prec = 2;
531 break;
532
533 case 'd':
534 prec = 4;
535 break;
536
537 default:
538 *sizep = 0;
539 return "bad call to md_atof";
540 }
541
542 t = atof_ieee (input_line_pointer, type, words);
543 if (t)
544 input_line_pointer = t;
545
546 *sizep = prec * 2;
547
548 for (i = prec - 1; i >= 0; i--)
549 {
550 md_number_to_chars (litp, (valueT) words[i], 2);
551 litp += 2;
552 }
553
554 return NULL;
555 }
556
557
558 void
559 md_convert_frag (abfd, sec, fragP)
560 bfd *abfd;
561 asection *sec;
562 fragS *fragP;
563 {
564 static unsigned long label_count = 0;
565 char buf[40];
566
567 subseg_change (sec, 0);
568 if (fragP->fr_subtype == 0)
569 {
570 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
571 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
572 fragP->fr_var = 0;
573 fragP->fr_fix += 2;
574 }
575 else if (fragP->fr_subtype == 1)
576 {
577 /* Reverse the condition of the first branch. */
578 int offset = fragP->fr_fix;
579 int opcode = fragP->fr_literal[offset] & 0xff;
580
581 switch (opcode)
582 {
583 case 0xc8:
584 opcode = 0xc9;
585 break;
586 case 0xc9:
587 opcode = 0xc8;
588 break;
589 case 0xc0:
590 opcode = 0xc2;
591 break;
592 case 0xc2:
593 opcode = 0xc0;
594 break;
595 case 0xc3:
596 opcode = 0xc1;
597 break;
598 case 0xc1:
599 opcode = 0xc3;
600 break;
601 case 0xc4:
602 opcode = 0xc6;
603 break;
604 case 0xc6:
605 opcode = 0xc4;
606 break;
607 case 0xc7:
608 opcode = 0xc5;
609 break;
610 case 0xc5:
611 opcode = 0xc7;
612 break;
613 default:
614 abort ();
615 }
616 fragP->fr_literal[offset] = opcode;
617
618 /* Create a fixup for the reversed conditional branch. */
619 sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++);
620 fix_new (fragP, fragP->fr_fix + 1, 1,
621 symbol_new (buf, sec, 0, fragP->fr_next),
622 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
623
624 /* Now create the unconditional branch + fixup to the
625 final target. */
626 fragP->fr_literal[offset + 2] = 0xcc;
627 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
628 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
629 fragP->fr_var = 0;
630 fragP->fr_fix += 5;
631 }
632 else if (fragP->fr_subtype == 2)
633 {
634 /* Reverse the condition of the first branch. */
635 int offset = fragP->fr_fix;
636 int opcode = fragP->fr_literal[offset] & 0xff;
637
638 switch (opcode)
639 {
640 case 0xc8:
641 opcode = 0xc9;
642 break;
643 case 0xc9:
644 opcode = 0xc8;
645 break;
646 case 0xc0:
647 opcode = 0xc2;
648 break;
649 case 0xc2:
650 opcode = 0xc0;
651 break;
652 case 0xc3:
653 opcode = 0xc1;
654 break;
655 case 0xc1:
656 opcode = 0xc3;
657 break;
658 case 0xc4:
659 opcode = 0xc6;
660 break;
661 case 0xc6:
662 opcode = 0xc4;
663 break;
664 case 0xc7:
665 opcode = 0xc5;
666 break;
667 case 0xc5:
668 opcode = 0xc7;
669 break;
670 default:
671 abort ();
672 }
673 fragP->fr_literal[offset] = opcode;
674
675 /* Create a fixup for the reversed conditional branch. */
676 sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++);
677 fix_new (fragP, fragP->fr_fix + 1, 1,
678 symbol_new (buf, sec, 0, fragP->fr_next),
679 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
680
681 /* Now create the unconditional branch + fixup to the
682 final target. */
683 fragP->fr_literal[offset + 2] = 0xdc;
684 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
685 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
686 fragP->fr_var = 0;
687 fragP->fr_fix += 7;
688 }
689 else if (fragP->fr_subtype == 3)
690 {
691 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
692 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
693 fragP->fr_var = 0;
694 fragP->fr_fix += 3;
695 }
696 else if (fragP->fr_subtype == 4)
697 {
698 /* Reverse the condition of the first branch. */
699 int offset = fragP->fr_fix;
700 int opcode = fragP->fr_literal[offset + 1] & 0xff;
701
702 switch (opcode)
703 {
704 case 0xe8:
705 opcode = 0xe9;
706 break;
707 case 0xe9:
708 opcode = 0xe8;
709 break;
710 case 0xea:
711 opcode = 0xeb;
712 break;
713 case 0xeb:
714 opcode = 0xea;
715 break;
716 default:
717 abort ();
718 }
719 fragP->fr_literal[offset + 1] = opcode;
720
721 /* Create a fixup for the reversed conditional branch. */
722 sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++);
723 fix_new (fragP, fragP->fr_fix + 2, 1,
724 symbol_new (buf, sec, 0, fragP->fr_next),
725 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
726
727 /* Now create the unconditional branch + fixup to the
728 final target. */
729 fragP->fr_literal[offset + 3] = 0xcc;
730 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
731 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
732 fragP->fr_var = 0;
733 fragP->fr_fix += 6;
734 }
735 else if (fragP->fr_subtype == 5)
736 {
737 /* Reverse the condition of the first branch. */
738 int offset = fragP->fr_fix;
739 int opcode = fragP->fr_literal[offset + 1] & 0xff;
740
741 switch (opcode)
742 {
743 case 0xe8:
744 opcode = 0xe9;
745 break;
746 case 0xea:
747 opcode = 0xeb;
748 break;
749 case 0xeb:
750 opcode = 0xea;
751 break;
752 default:
753 abort ();
754 }
755 fragP->fr_literal[offset + 1] = opcode;
756
757 /* Create a fixup for the reversed conditional branch. */
758 sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++);
759 fix_new (fragP, fragP->fr_fix + 2, 1,
760 symbol_new (buf, sec, 0, fragP->fr_next),
761 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
762
763 /* Now create the unconditional branch + fixup to the
764 final target. */
765 fragP->fr_literal[offset + 3] = 0xdc;
766 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
767 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
768 fragP->fr_var = 0;
769 fragP->fr_fix += 8;
770 }
771 else if (fragP->fr_subtype == 6)
772 {
773 int offset = fragP->fr_fix;
774 fragP->fr_literal[offset] = 0xcd;
775 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
776 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
777 fragP->fr_var = 0;
778 fragP->fr_fix += 5;
779 }
780 else if (fragP->fr_subtype == 7)
781 {
782 int offset = fragP->fr_fix;
783 fragP->fr_literal[offset] = 0xdd;
784 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
785 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
786
787 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
788 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
789 fragP->fr_var = 0;
790 fragP->fr_fix += 7;
791 }
792 else if (fragP->fr_subtype == 8)
793 {
794 int offset = fragP->fr_fix;
795 fragP->fr_literal[offset] = 0xfa;
796 fragP->fr_literal[offset + 1] = 0xff;
797 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
798 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
799 fragP->fr_var = 0;
800 fragP->fr_fix += 4;
801 }
802 else if (fragP->fr_subtype == 9)
803 {
804 int offset = fragP->fr_fix;
805 fragP->fr_literal[offset] = 0xfc;
806 fragP->fr_literal[offset + 1] = 0xff;
807
808 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
809 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
810 fragP->fr_var = 0;
811 fragP->fr_fix += 6;
812 }
813 else if (fragP->fr_subtype == 10)
814 {
815 fragP->fr_literal[fragP->fr_fix] = 0xca;
816 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
817 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
818 fragP->fr_var = 0;
819 fragP->fr_fix += 2;
820 }
821 else if (fragP->fr_subtype == 11)
822 {
823 int offset = fragP->fr_fix;
824 fragP->fr_literal[offset] = 0xcc;
825
826 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
827 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
828 fragP->fr_var = 0;
829 fragP->fr_fix += 3;
830 }
831 else if (fragP->fr_subtype == 12)
832 {
833 int offset = fragP->fr_fix;
834 fragP->fr_literal[offset] = 0xdc;
835
836 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
837 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
838 fragP->fr_var = 0;
839 fragP->fr_fix += 5;
840 }
841 else
842 abort ();
843 }
844
845 valueT
846 md_section_align (seg, addr)
847 asection *seg;
848 valueT addr;
849 {
850 int align = bfd_get_section_alignment (stdoutput, seg);
851 return ((addr + (1 << align) - 1) & (-1 << align));
852 }
853
854 void
855 md_begin ()
856 {
857 char *prev_name = "";
858 register const struct mn10300_opcode *op;
859
860 mn10300_hash = hash_new();
861
862 /* Insert unique names into hash table. The MN10300 instruction set
863 has many identical opcode names that have different opcodes based
864 on the operands. This hash table then provides a quick index to
865 the first opcode with a particular name in the opcode table. */
866
867 op = mn10300_opcodes;
868 while (op->name)
869 {
870 if (strcmp (prev_name, op->name))
871 {
872 prev_name = (char *) op->name;
873 hash_insert (mn10300_hash, op->name, (char *) op);
874 }
875 op++;
876 }
877
878 /* This is both a simplification (we don't have to write md_apply_fix)
879 and support for future optimizations (branch shortening and similar
880 stuff in the linker). */
881 linkrelax = 1;
882
883 /* Set the default machine type. */
884 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
885 as_warn (_("could not set architecture and machine"));
886
887 current_machine = MN103;
888 }
889
890 void
891 md_assemble (str)
892 char *str;
893 {
894 char *s;
895 struct mn10300_opcode *opcode;
896 struct mn10300_opcode *next_opcode;
897 const unsigned char *opindex_ptr;
898 int next_opindex, relaxable;
899 unsigned long insn, extension, size = 0;
900 char *f;
901 int i;
902 int match;
903
904 /* Get the opcode. */
905 for (s = str; *s != '\0' && ! isspace (*s); s++)
906 ;
907 if (*s != '\0')
908 *s++ = '\0';
909
910 /* find the first opcode with the proper name */
911 opcode = (struct mn10300_opcode *)hash_find (mn10300_hash, str);
912 if (opcode == NULL)
913 {
914 as_bad (_("Unrecognized opcode: `%s'"), str);
915 return;
916 }
917
918 str = s;
919 while (isspace (*str))
920 ++str;
921
922 input_line_pointer = str;
923
924 for(;;)
925 {
926 const char *errmsg;
927 int op_idx;
928 char *hold;
929 int extra_shift = 0;
930
931
932 errmsg = _("Invalid opcode/operands");
933
934 /* Reset the array of register operands. */
935 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
936
937 relaxable = 0;
938 fc = 0;
939 match = 0;
940 next_opindex = 0;
941 insn = opcode->opcode;
942 extension = 0;
943
944 /* If the instruction is not available on the current machine
945 then it can not possibly match. */
946 if (opcode->machine
947 && !(opcode->machine == AM33 && HAVE_AM33))
948 goto error;
949
950 for (op_idx = 1, opindex_ptr = opcode->operands;
951 *opindex_ptr != 0;
952 opindex_ptr++, op_idx++)
953 {
954 const struct mn10300_operand *operand;
955 expressionS ex;
956
957 if (next_opindex == 0)
958 {
959 operand = &mn10300_operands[*opindex_ptr];
960 }
961 else
962 {
963 operand = &mn10300_operands[next_opindex];
964 next_opindex = 0;
965 }
966
967 while (*str == ' ' || *str == ',')
968 ++str;
969
970 if (operand->flags & MN10300_OPERAND_RELAX)
971 relaxable = 1;
972
973 /* Gather the operand. */
974 hold = input_line_pointer;
975 input_line_pointer = str;
976
977 if (operand->flags & MN10300_OPERAND_PAREN)
978 {
979 if (*input_line_pointer != ')' && *input_line_pointer != '(')
980 {
981 input_line_pointer = hold;
982 str = hold;
983 goto error;
984 }
985 input_line_pointer++;
986 goto keep_going;
987 }
988 /* See if we can match the operands. */
989 else if (operand->flags & MN10300_OPERAND_DREG)
990 {
991 if (!data_register_name (&ex))
992 {
993 input_line_pointer = hold;
994 str = hold;
995 goto error;
996 }
997 }
998 else if (operand->flags & MN10300_OPERAND_AREG)
999 {
1000 if (!address_register_name (&ex))
1001 {
1002 input_line_pointer = hold;
1003 str = hold;
1004 goto error;
1005 }
1006 }
1007 else if (operand->flags & MN10300_OPERAND_SP)
1008 {
1009 char *start = input_line_pointer;
1010 char c = get_symbol_end ();
1011
1012 if (strcasecmp (start, "sp") != 0)
1013 {
1014 *input_line_pointer = c;
1015 input_line_pointer = hold;
1016 str = hold;
1017 goto error;
1018 }
1019 *input_line_pointer = c;
1020 goto keep_going;
1021 }
1022 else if (operand->flags & MN10300_OPERAND_RREG)
1023 {
1024 if (!r_register_name (&ex))
1025 {
1026 input_line_pointer = hold;
1027 str = hold;
1028 goto error;
1029 }
1030 }
1031 else if (operand->flags & MN10300_OPERAND_XRREG)
1032 {
1033 if (!xr_register_name (&ex))
1034 {
1035 input_line_pointer = hold;
1036 str = hold;
1037 goto error;
1038 }
1039 }
1040 else if (operand->flags & MN10300_OPERAND_USP)
1041 {
1042 char *start = input_line_pointer;
1043 char c = get_symbol_end ();
1044
1045 if (strcasecmp (start, "usp") != 0)
1046 {
1047 *input_line_pointer = c;
1048 input_line_pointer = hold;
1049 str = hold;
1050 goto error;
1051 }
1052 *input_line_pointer = c;
1053 goto keep_going;
1054 }
1055 else if (operand->flags & MN10300_OPERAND_SSP)
1056 {
1057 char *start = input_line_pointer;
1058 char c = get_symbol_end ();
1059
1060 if (strcasecmp (start, "ssp") != 0)
1061 {
1062 *input_line_pointer = c;
1063 input_line_pointer = hold;
1064 str = hold;
1065 goto error;
1066 }
1067 *input_line_pointer = c;
1068 goto keep_going;
1069 }
1070 else if (operand->flags & MN10300_OPERAND_MSP)
1071 {
1072 char *start = input_line_pointer;
1073 char c = get_symbol_end ();
1074
1075 if (strcasecmp (start, "msp") != 0)
1076 {
1077 *input_line_pointer = c;
1078 input_line_pointer = hold;
1079 str = hold;
1080 goto error;
1081 }
1082 *input_line_pointer = c;
1083 goto keep_going;
1084 }
1085 else if (operand->flags & MN10300_OPERAND_PC)
1086 {
1087 char *start = input_line_pointer;
1088 char c = get_symbol_end ();
1089
1090 if (strcasecmp (start, "pc") != 0)
1091 {
1092 *input_line_pointer = c;
1093 input_line_pointer = hold;
1094 str = hold;
1095 goto error;
1096 }
1097 *input_line_pointer = c;
1098 goto keep_going;
1099 }
1100 else if (operand->flags & MN10300_OPERAND_EPSW)
1101 {
1102 char *start = input_line_pointer;
1103 char c = get_symbol_end ();
1104
1105 if (strcasecmp (start, "epsw") != 0)
1106 {
1107 *input_line_pointer = c;
1108 input_line_pointer = hold;
1109 str = hold;
1110 goto error;
1111 }
1112 *input_line_pointer = c;
1113 goto keep_going;
1114 }
1115 else if (operand->flags & MN10300_OPERAND_PLUS)
1116 {
1117 if (*input_line_pointer != '+')
1118 {
1119 input_line_pointer = hold;
1120 str = hold;
1121 goto error;
1122 }
1123 input_line_pointer++;
1124 goto keep_going;
1125 }
1126 else if (operand->flags & MN10300_OPERAND_PSW)
1127 {
1128 char *start = input_line_pointer;
1129 char c = get_symbol_end ();
1130
1131 if (strcasecmp (start, "psw") != 0)
1132 {
1133 *input_line_pointer = c;
1134 input_line_pointer = hold;
1135 str = hold;
1136 goto error;
1137 }
1138 *input_line_pointer = c;
1139 goto keep_going;
1140 }
1141 else if (operand->flags & MN10300_OPERAND_MDR)
1142 {
1143 char *start = input_line_pointer;
1144 char c = get_symbol_end ();
1145
1146 if (strcasecmp (start, "mdr") != 0)
1147 {
1148 *input_line_pointer = c;
1149 input_line_pointer = hold;
1150 str = hold;
1151 goto error;
1152 }
1153 *input_line_pointer = c;
1154 goto keep_going;
1155 }
1156 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1157 {
1158 unsigned int value = 0;
1159 if (*input_line_pointer != '[')
1160 {
1161 input_line_pointer = hold;
1162 str = hold;
1163 goto error;
1164 }
1165
1166 /* Eat the '['. */
1167 input_line_pointer++;
1168
1169 /* We used to reject a null register list here; however,
1170 we accept it now so the compiler can emit "call" instructions
1171 for all calls to named functions.
1172
1173 The linker can then fill in the appropriate bits for the
1174 register list and stack size or change the instruction
1175 into a "calls" if using "call" is not profitable. */
1176 while (*input_line_pointer != ']')
1177 {
1178 char *start;
1179 char c;
1180
1181 if (*input_line_pointer == ',')
1182 input_line_pointer++;
1183
1184 start = input_line_pointer;
1185 c = get_symbol_end ();
1186
1187 if (strcasecmp (start, "d2") == 0)
1188 {
1189 value |= 0x80;
1190 *input_line_pointer = c;
1191 }
1192 else if (strcasecmp (start, "d3") == 0)
1193 {
1194 value |= 0x40;
1195 *input_line_pointer = c;
1196 }
1197 else if (strcasecmp (start, "a2") == 0)
1198 {
1199 value |= 0x20;
1200 *input_line_pointer = c;
1201 }
1202 else if (strcasecmp (start, "a3") == 0)
1203 {
1204 value |= 0x10;
1205 *input_line_pointer = c;
1206 }
1207 else if (strcasecmp (start, "other") == 0)
1208 {
1209 value |= 0x08;
1210 *input_line_pointer = c;
1211 }
1212 else if (HAVE_AM33
1213 && strcasecmp (start, "exreg0") == 0)
1214 {
1215 value |= 0x04;
1216 *input_line_pointer = c;
1217 }
1218 else if (HAVE_AM33
1219 && strcasecmp (start, "exreg1") == 0)
1220 {
1221 value |= 0x02;
1222 *input_line_pointer = c;
1223 }
1224 else if (HAVE_AM33
1225 && strcasecmp (start, "exother") == 0)
1226 {
1227 value |= 0x01;
1228 *input_line_pointer = c;
1229 }
1230 else if (HAVE_AM33
1231 && strcasecmp (start, "all") == 0)
1232 {
1233 value |= 0xff;
1234 *input_line_pointer = c;
1235 }
1236 else
1237 {
1238 input_line_pointer = hold;
1239 str = hold;
1240 goto error;
1241 }
1242 }
1243 input_line_pointer++;
1244 mn10300_insert_operand (&insn, &extension, operand,
1245 value, (char *) NULL, 0, 0);
1246 goto keep_going;
1247
1248 }
1249 else if (data_register_name (&ex))
1250 {
1251 input_line_pointer = hold;
1252 str = hold;
1253 goto error;
1254 }
1255 else if (address_register_name (&ex))
1256 {
1257 input_line_pointer = hold;
1258 str = hold;
1259 goto error;
1260 }
1261 else if (other_register_name (&ex))
1262 {
1263 input_line_pointer = hold;
1264 str = hold;
1265 goto error;
1266 }
1267 else if (HAVE_AM33 && r_register_name (&ex))
1268 {
1269 input_line_pointer = hold;
1270 str = hold;
1271 goto error;
1272 }
1273 else if (HAVE_AM33 && xr_register_name (&ex))
1274 {
1275 input_line_pointer = hold;
1276 str = hold;
1277 goto error;
1278 }
1279 else if (*str == ')' || *str == '(')
1280 {
1281 input_line_pointer = hold;
1282 str = hold;
1283 goto error;
1284 }
1285 else
1286 {
1287 expression (&ex);
1288 }
1289
1290 switch (ex.X_op)
1291 {
1292 case O_illegal:
1293 errmsg = _("illegal operand");
1294 goto error;
1295 case O_absent:
1296 errmsg = _("missing operand");
1297 goto error;
1298 case O_register:
1299 {
1300 int mask;
1301
1302 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
1303 if (HAVE_AM33)
1304 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
1305 if ((operand->flags & mask) == 0)
1306 {
1307 input_line_pointer = hold;
1308 str = hold;
1309 goto error;
1310 }
1311
1312 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1313 extra_shift = 8;
1314 else if (opcode->format == FMT_D2
1315 || opcode->format == FMT_D4
1316 || opcode->format == FMT_S2
1317 || opcode->format == FMT_S4
1318 || opcode->format == FMT_S6
1319 || opcode->format == FMT_D5)
1320 extra_shift = 16;
1321 else if (opcode->format == FMT_D7)
1322 extra_shift = 8;
1323 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1324 extra_shift = 8;
1325 else
1326 extra_shift = 0;
1327
1328 mn10300_insert_operand (&insn, &extension, operand,
1329 ex.X_add_number, (char *) NULL,
1330 0, extra_shift);
1331
1332
1333 /* And note the register number in the register array. */
1334 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1335 break;
1336 }
1337
1338 case O_constant:
1339 /* If this operand can be promoted, and it doesn't
1340 fit into the allocated bitfield for this insn,
1341 then promote it (ie this opcode does not match). */
1342 if (operand->flags
1343 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
1344 && ! check_operand (insn, operand, ex.X_add_number))
1345 {
1346 input_line_pointer = hold;
1347 str = hold;
1348 goto error;
1349 }
1350
1351 mn10300_insert_operand (&insn, &extension, operand,
1352 ex.X_add_number, (char *) NULL,
1353 0, 0);
1354 break;
1355
1356 default:
1357 /* If this operand can be promoted, then this opcode didn't
1358 match since we can't know if it needed promotion! */
1359 if (operand->flags & MN10300_OPERAND_PROMOTE)
1360 {
1361 input_line_pointer = hold;
1362 str = hold;
1363 goto error;
1364 }
1365
1366 /* We need to generate a fixup for this expression. */
1367 if (fc >= MAX_INSN_FIXUPS)
1368 as_fatal (_("too many fixups"));
1369 fixups[fc].exp = ex;
1370 fixups[fc].opindex = *opindex_ptr;
1371 fixups[fc].reloc = BFD_RELOC_UNUSED;
1372 ++fc;
1373 break;
1374 }
1375
1376 keep_going:
1377 str = input_line_pointer;
1378 input_line_pointer = hold;
1379
1380 while (*str == ' ' || *str == ',')
1381 ++str;
1382
1383 }
1384
1385 /* Make sure we used all the operands! */
1386 if (*str != ',')
1387 match = 1;
1388
1389 /* If this instruction has registers that must not match, verify
1390 that they do indeed not match. */
1391 if (opcode->no_match_operands)
1392 {
1393 int i;
1394
1395 /* Look at each operand to see if it's marked. */
1396 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1397 {
1398 if ((1 << i) & opcode->no_match_operands)
1399 {
1400 int j;
1401
1402 /* operand I is marked. Check that it does not match any
1403 operands > I which are marked. */
1404 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1405 {
1406 if (((1 << j) & opcode->no_match_operands)
1407 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1408 {
1409 errmsg = _("Invalid register specification.");
1410 match = 0;
1411 goto error;
1412 }
1413 }
1414 }
1415 }
1416 }
1417
1418 error:
1419 if (match == 0)
1420 {
1421 next_opcode = opcode + 1;
1422 if (!strcmp(next_opcode->name, opcode->name))
1423 {
1424 opcode = next_opcode;
1425 continue;
1426 }
1427
1428 as_bad ("%s", errmsg);
1429 return;
1430 }
1431 break;
1432 }
1433
1434 while (isspace (*str))
1435 ++str;
1436
1437 if (*str != '\0')
1438 as_bad (_("junk at end of line: `%s'"), str);
1439
1440 input_line_pointer = str;
1441
1442 /* Determine the size of the instruction. */
1443 if (opcode->format == FMT_S0)
1444 size = 1;
1445
1446 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1447 size = 2;
1448
1449 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1450 size = 3;
1451
1452 if (opcode->format == FMT_D6)
1453 size = 3;
1454
1455 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1456 size = 4;
1457
1458 if (opcode->format == FMT_D8)
1459 size = 6;
1460
1461 if (opcode->format == FMT_D9)
1462 size = 7;
1463
1464 if (opcode->format == FMT_S4)
1465 size = 5;
1466
1467 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1468 size = 7;
1469
1470 if (opcode->format == FMT_D2)
1471 size = 4;
1472
1473 if (opcode->format == FMT_D4)
1474 size = 6;
1475
1476 if (relaxable && fc > 0)
1477 {
1478 int type;
1479
1480 /* bCC */
1481 if (size == 2)
1482 {
1483 /* Handle bra specially. Basically treat it like jmp so
1484 that we automatically handle 8, 16 and 32 bit offsets
1485 correctly as well as jumps to an undefined address.
1486
1487 It is also important to not treat it like other bCC
1488 instructions since the long forms of bra is different
1489 from other bCC instructions. */
1490 if (opcode->opcode == 0xca00)
1491 type = 10;
1492 else
1493 type = 0;
1494 }
1495 /* call */
1496 else if (size == 5)
1497 type = 6;
1498 /* calls */
1499 else if (size == 4)
1500 type = 8;
1501 /* jmp */
1502 else if (size == 3 && opcode->opcode == 0xcc0000)
1503 type = 10;
1504 /* bCC (uncommon cases) */
1505 else
1506 type = 3;
1507
1508 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1509 fixups[0].exp.X_add_symbol,
1510 fixups[0].exp.X_add_number,
1511 (char *)fixups[0].opindex);
1512
1513 /* This is pretty hokey. We basically just care about the
1514 opcode, so we have to write out the first word big endian.
1515
1516 The exception is "call", which has two operands that we
1517 care about.
1518
1519 The first operand (the register list) happens to be in the
1520 first instruction word, and will be in the right place if
1521 we output the first word in big endian mode.
1522
1523 The second operand (stack size) is in the extension word,
1524 and we want it to appear as the first character in the extension
1525 word (as it appears in memory). Luckily, writing the extension
1526 word in big endian format will do what we want. */
1527 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1528 if (size > 8)
1529 {
1530 number_to_chars_bigendian (f + 4, extension, 4);
1531 number_to_chars_bigendian (f + 8, 0, size - 8);
1532 }
1533 else if (size > 4)
1534 number_to_chars_bigendian (f + 4, extension, size - 4);
1535 }
1536 else
1537 {
1538 /* Allocate space for the instruction. */
1539 f = frag_more (size);
1540
1541 /* Fill in bytes for the instruction. Note that opcode fields
1542 are written big-endian, 16 & 32bit immediates are written
1543 little endian. Egad. */
1544 if (opcode->format == FMT_S0
1545 || opcode->format == FMT_S1
1546 || opcode->format == FMT_D0
1547 || opcode->format == FMT_D6
1548 || opcode->format == FMT_D7
1549 || opcode->format == FMT_D10
1550 || opcode->format == FMT_D1)
1551 {
1552 number_to_chars_bigendian (f, insn, size);
1553 }
1554 else if (opcode->format == FMT_S2
1555 && opcode->opcode != 0xdf0000
1556 && opcode->opcode != 0xde0000)
1557 {
1558 /* A format S2 instruction that is _not_ "ret" and "retf". */
1559 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1560 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1561 }
1562 else if (opcode->format == FMT_S2)
1563 {
1564 /* This must be a ret or retf, which is written entirely in
1565 big-endian format. */
1566 number_to_chars_bigendian (f, insn, 3);
1567 }
1568 else if (opcode->format == FMT_S4
1569 && opcode->opcode != 0xdc000000)
1570 {
1571 /* This must be a format S4 "call" instruction. What a pain. */
1572 unsigned long temp = (insn >> 8) & 0xffff;
1573 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1574 number_to_chars_littleendian (f + 1, temp, 2);
1575 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1576 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1577 }
1578 else if (opcode->format == FMT_S4)
1579 {
1580 /* This must be a format S4 "jmp" instruction. */
1581 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1582 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1583 number_to_chars_littleendian (f + 1, temp, 4);
1584 }
1585 else if (opcode->format == FMT_S6)
1586 {
1587 unsigned long temp = ((insn & 0xffffff) << 8)
1588 | ((extension >> 16) & 0xff);
1589 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1590 number_to_chars_littleendian (f + 1, temp, 4);
1591 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
1592 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1593 }
1594 else if (opcode->format == FMT_D2
1595 && opcode->opcode != 0xfaf80000
1596 && opcode->opcode != 0xfaf00000
1597 && opcode->opcode != 0xfaf40000)
1598 {
1599 /* A format D2 instruction where the 16bit immediate is
1600 really a single 16bit value, not two 8bit values. */
1601 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1602 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
1603 }
1604 else if (opcode->format == FMT_D2)
1605 {
1606 /* A format D2 instruction where the 16bit immediate
1607 is really two 8bit immediates. */
1608 number_to_chars_bigendian (f, insn, 4);
1609 }
1610 else if (opcode->format == FMT_D4)
1611 {
1612 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
1613 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1614 number_to_chars_littleendian (f + 2, temp, 4);
1615 }
1616 else if (opcode->format == FMT_D5)
1617 {
1618 unsigned long temp = ((insn & 0xffff) << 16)
1619 | ((extension >> 8) & 0xffff);
1620 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1621 number_to_chars_littleendian (f + 2, temp, 4);
1622 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1623 }
1624 else if (opcode->format == FMT_D8)
1625 {
1626 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
1627 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1628 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
1629 number_to_chars_littleendian (f + 4, temp >> 8, 2);
1630 }
1631 else if (opcode->format == FMT_D9)
1632 {
1633 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
1634 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1635 number_to_chars_littleendian (f + 3, temp, 4);
1636 }
1637
1638 /* Create any fixups. */
1639 for (i = 0; i < fc; i++)
1640 {
1641 const struct mn10300_operand *operand;
1642
1643 operand = &mn10300_operands[fixups[i].opindex];
1644 if (fixups[i].reloc != BFD_RELOC_UNUSED)
1645 {
1646 reloc_howto_type *reloc_howto;
1647 int size;
1648 int offset;
1649 fixS *fixP;
1650
1651 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
1652
1653 if (!reloc_howto)
1654 abort();
1655
1656 size = bfd_get_reloc_size (reloc_howto);
1657
1658 if (size < 1 || size > 4)
1659 abort();
1660
1661 offset = 4 - size;
1662 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1663 size, &fixups[i].exp,
1664 reloc_howto->pc_relative,
1665 fixups[i].reloc);
1666 }
1667 else
1668 {
1669 int reloc, pcrel, reloc_size, offset;
1670 fixS *fixP;
1671
1672 reloc = BFD_RELOC_NONE;
1673 /* How big is the reloc? Remember SPLIT relocs are
1674 implicitly 32bits. */
1675 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1676 reloc_size = 32;
1677 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1678 reloc_size = 24;
1679 else
1680 reloc_size = operand->bits;
1681
1682 /* Is the reloc pc-relative? */
1683 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
1684
1685 /* Gross. This disgusting hack is to make sure we
1686 get the right offset for the 16/32 bit reloc in
1687 "call" instructions. Basically they're a pain
1688 because the reloc isn't at the end of the instruction. */
1689 if ((size == 5 || size == 7)
1690 && (((insn >> 24) & 0xff) == 0xcd
1691 || ((insn >> 24) & 0xff) == 0xdd))
1692 size -= 2;
1693
1694 /* Similarly for certain bit instructions which don't
1695 hav their 32bit reloc at the tail of the instruction. */
1696 if (size == 7
1697 && (((insn >> 16) & 0xffff) == 0xfe00
1698 || ((insn >> 16) & 0xffff) == 0xfe01
1699 || ((insn >> 16) & 0xffff) == 0xfe02))
1700 size -= 1;
1701
1702 offset = size - reloc_size / 8;
1703
1704 /* Choose a proper BFD relocation type. */
1705 if (pcrel)
1706 {
1707 if (reloc_size == 32)
1708 reloc = BFD_RELOC_32_PCREL;
1709 else if (reloc_size == 16)
1710 reloc = BFD_RELOC_16_PCREL;
1711 else if (reloc_size == 8)
1712 reloc = BFD_RELOC_8_PCREL;
1713 else
1714 abort ();
1715 }
1716 else
1717 {
1718 if (reloc_size == 32)
1719 reloc = BFD_RELOC_32;
1720 else if (reloc_size == 16)
1721 reloc = BFD_RELOC_16;
1722 else if (reloc_size == 8)
1723 reloc = BFD_RELOC_8;
1724 else
1725 abort ();
1726 }
1727
1728 /* Convert the size of the reloc into what fix_new_exp wants. */
1729 reloc_size = reloc_size / 8;
1730 if (reloc_size == 8)
1731 reloc_size = 0;
1732 else if (reloc_size == 16)
1733 reloc_size = 1;
1734 else if (reloc_size == 32)
1735 reloc_size = 2;
1736
1737 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1738 reloc_size, &fixups[i].exp, pcrel,
1739 ((bfd_reloc_code_real_type) reloc));
1740
1741 if (pcrel)
1742 fixP->fx_offset += offset;
1743 }
1744 }
1745 }
1746 }
1747
1748
1749 /* if while processing a fixup, a reloc really needs to be created */
1750 /* then it is done here */
1751
1752 arelent *
1753 tc_gen_reloc (seg, fixp)
1754 asection *seg;
1755 fixS *fixp;
1756 {
1757 arelent *reloc;
1758 reloc = (arelent *) xmalloc (sizeof (arelent));
1759
1760 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1761 if (reloc->howto == (reloc_howto_type *) NULL)
1762 {
1763 as_bad_where (fixp->fx_file, fixp->fx_line,
1764 _("reloc %d not supported by object file format"),
1765 (int)fixp->fx_r_type);
1766 return NULL;
1767 }
1768 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1769
1770 if (fixp->fx_addsy && fixp->fx_subsy)
1771 {
1772
1773 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1774 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1775 {
1776 as_bad_where (fixp->fx_file, fixp->fx_line,
1777 "Difference of symbols in different sections is not supported");
1778 return NULL;
1779 }
1780
1781 reloc->sym_ptr_ptr = &bfd_abs_symbol;
1782 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
1783 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
1784 }
1785 else
1786 {
1787 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof( asymbol *));
1788 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1789 reloc->addend = fixp->fx_offset;
1790 }
1791 return reloc;
1792 }
1793
1794 int
1795 md_estimate_size_before_relax (fragp, seg)
1796 fragS *fragp;
1797 asection *seg;
1798 {
1799 if (fragp->fr_subtype == 0)
1800 return 2;
1801 if (fragp->fr_subtype == 3)
1802 return 3;
1803 if (fragp->fr_subtype == 6)
1804 {
1805 if (!S_IS_DEFINED (fragp->fr_symbol)
1806 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1807 {
1808 fragp->fr_subtype = 7;
1809 return 7;
1810 }
1811 else
1812 return 5;
1813 }
1814 if (fragp->fr_subtype == 8)
1815 {
1816 if (!S_IS_DEFINED (fragp->fr_symbol)
1817 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1818 {
1819 fragp->fr_subtype = 9;
1820 return 6;
1821 }
1822 else
1823 return 4;
1824 }
1825 if (fragp->fr_subtype == 10)
1826 {
1827 if (!S_IS_DEFINED (fragp->fr_symbol)
1828 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1829 {
1830 fragp->fr_subtype = 12;
1831 return 5;
1832 }
1833 else
1834 return 2;
1835 }
1836 }
1837
1838 long
1839 md_pcrel_from (fixp)
1840 fixS *fixp;
1841 {
1842 return fixp->fx_frag->fr_address;
1843 #if 0
1844 if (fixp->fx_addsy != (symbolS *) NULL && ! S_IS_DEFINED (fixp->fx_addsy))
1845 {
1846 /* The symbol is undefined. Let the linker figure it out. */
1847 return 0;
1848 }
1849 return fixp->fx_frag->fr_address + fixp->fx_where;
1850 #endif
1851 }
1852
1853 int
1854 md_apply_fix3 (fixp, valuep, seg)
1855 fixS *fixp;
1856 valueT *valuep;
1857 segT seg;
1858 {
1859 /* We shouldn't ever get here because linkrelax is nonzero. */
1860 abort ();
1861 fixp->fx_done = 1;
1862 return 0;
1863 }
1864
1865 /* Insert an operand value into an instruction. */
1866
1867 static void
1868 mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift)
1869 unsigned long *insnp;
1870 unsigned long *extensionp;
1871 const struct mn10300_operand *operand;
1872 offsetT val;
1873 char *file;
1874 unsigned int line;
1875 unsigned int shift;
1876 {
1877 /* No need to check 32bit operands for a bit. Note that
1878 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1879 if (operand->bits != 32
1880 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1881 {
1882 long min, max;
1883 offsetT test;
1884 int bits;
1885
1886 bits = operand->bits;
1887 if (operand->flags & MN10300_OPERAND_24BIT)
1888 bits = 24;
1889
1890 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1891 {
1892 max = (1 << (bits - 1)) - 1;
1893 min = - (1 << (bits - 1));
1894 }
1895 else
1896 {
1897 max = (1 << bits) - 1;
1898 min = 0;
1899 }
1900
1901 test = val;
1902
1903
1904 if (test < (offsetT) min || test > (offsetT) max)
1905 {
1906 const char *err =
1907 _("operand out of range (%s not between %ld and %ld)");
1908 char buf[100];
1909
1910 sprint_value (buf, test);
1911 if (file == (char *) NULL)
1912 as_warn (err, buf, min, max);
1913 else
1914 as_warn_where (file, line, err, buf, min, max);
1915 }
1916 }
1917
1918 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1919 {
1920 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
1921 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
1922 << operand->shift);
1923 }
1924 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1925 {
1926 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
1927 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
1928 << operand->shift);
1929 }
1930 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
1931 {
1932 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1933 << (operand->shift + shift));
1934
1935 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1936 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1937 << (operand->shift + shift + operand->bits));
1938 }
1939 else
1940 {
1941 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1942 << (operand->shift + shift));
1943
1944 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1945 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1946 << (operand->shift + shift + operand->bits));
1947 }
1948 }
1949
1950 static unsigned long
1951 check_operand (insn, operand, val)
1952 unsigned long insn;
1953 const struct mn10300_operand *operand;
1954 offsetT val;
1955 {
1956 /* No need to check 32bit operands for a bit. Note that
1957 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1958 if (operand->bits != 32
1959 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1960 {
1961 long min, max;
1962 offsetT test;
1963 int bits;
1964
1965 bits = operand->bits;
1966 if (operand->flags & MN10300_OPERAND_24BIT)
1967 bits = 24;
1968
1969 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1970 {
1971 max = (1 << (bits - 1)) - 1;
1972 min = - (1 << (bits - 1));
1973 }
1974 else
1975 {
1976 max = (1 << bits) - 1;
1977 min = 0;
1978 }
1979
1980 test = val;
1981
1982
1983 if (test < (offsetT) min || test > (offsetT) max)
1984 return 0;
1985 else
1986 return 1;
1987 }
1988 return 1;
1989 }
1990
1991 static void
1992 set_arch_mach (mach)
1993 int mach;
1994 {
1995 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
1996 as_warn (_("could not set architecture and machine"));
1997
1998 current_machine = mach;
1999 }
This page took 0.077784 seconds and 4 git commands to generate.