Fix formatting.
[deliverable/binutils-gdb.git] / gas / config / tc-mn10300.c
1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 #include <stdio.h>
22 #include <ctype.h>
23 #include "as.h"
24 #include "subsegs.h"
25 #include "opcode/mn10300.h"
26 #include "dwarf2dbg.h"
27 \f
28 /* Structure to hold information about predefined registers. */
29 struct reg_name
30 {
31 const char *name;
32 int value;
33 };
34
35 struct dwarf2_line_info debug_line;
36
37 /* Generic assembler global variables which must be defined by all
38 targets. */
39
40 /* Characters which always start a comment. */
41 const char comment_chars[] = "#";
42
43 /* Characters which start a comment at the beginning of a line. */
44 const char line_comment_chars[] = ";#";
45
46 /* Characters which may be used to separate multiple commands on a
47 single line. */
48 const char line_separator_chars[] = ";";
49
50 /* Characters which are used to indicate an exponent in a floating
51 point number. */
52 const char EXP_CHARS[] = "eE";
53
54 /* Characters which mean that a number is a floating point constant,
55 as in 0d1.0. */
56 const char FLT_CHARS[] = "dD";
57 \f
58 const relax_typeS md_relax_table[] = {
59 /* bCC relaxing */
60 {0x7f, -0x80, 2, 1},
61 {0x7fff, -0x8000, 5, 2},
62 {0x7fffffff, -0x80000000, 7, 0},
63
64 /* bCC relaxing (uncommon cases) */
65 {0x7f, -0x80, 3, 4},
66 {0x7fff, -0x8000, 6, 5},
67 {0x7fffffff, -0x80000000, 8, 0},
68
69 /* call relaxing */
70 {0x7fff, -0x8000, 5, 7},
71 {0x7fffffff, -0x80000000, 7, 0},
72
73 /* calls relaxing */
74 {0x7fff, -0x8000, 4, 9},
75 {0x7fffffff, -0x80000000, 6, 0},
76
77 /* jmp relaxing */
78 {0x7f, -0x80, 2, 11},
79 {0x7fff, -0x8000, 3, 12},
80 {0x7fffffff, -0x80000000, 5, 0},
81
82 };
83
84 /* Local functions. */
85 static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *,
86 const struct mn10300_operand *,
87 offsetT, char *, unsigned,
88 unsigned));
89 static unsigned long check_operand PARAMS ((unsigned long,
90 const struct mn10300_operand *,
91 offsetT));
92 static int reg_name_search PARAMS ((const struct reg_name *, int, const char *));
93 static boolean data_register_name PARAMS ((expressionS *expressionP));
94 static boolean address_register_name PARAMS ((expressionS *expressionP));
95 static boolean other_register_name PARAMS ((expressionS *expressionP));
96 static void set_arch_mach PARAMS ((int));
97
98 static int current_machine;
99
100 /* Fixups. */
101 #define MAX_INSN_FIXUPS (5)
102 struct mn10300_fixup
103 {
104 expressionS exp;
105 int opindex;
106 bfd_reloc_code_real_type reloc;
107 };
108 struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
109 static int fc;
110
111 /* We must store the value of each register operand so that we can
112 verify that certain registers do not match. */
113 int mn10300_reg_operands[MN10300_MAX_OPERANDS];
114 \f
115 const char *md_shortopts = "";
116 struct option md_longopts[] = {
117 {NULL, no_argument, NULL, 0}
118 };
119 size_t md_longopts_size = sizeof (md_longopts);
120
121 /* The target specific pseudo-ops which we support. */
122 const pseudo_typeS md_pseudo_table[] =
123 {
124 { "file", dwarf2_directive_file },
125 { "loc", dwarf2_directive_loc },
126 { "am30", set_arch_mach, AM30 },
127 { "am33", set_arch_mach, AM33 },
128 { "mn10300", set_arch_mach, MN103 },
129 {NULL, 0, 0}
130 };
131
132 #define HAVE_AM33 (current_machine == AM33)
133 #define HAVE_AM30 (current_machine == AM30)
134
135 /* Opcode hash table. */
136 static struct hash_control *mn10300_hash;
137
138 /* This table is sorted. Suitable for searching by a binary search. */
139 static const struct reg_name data_registers[] =
140 {
141 { "d0", 0 },
142 { "d1", 1 },
143 { "d2", 2 },
144 { "d3", 3 },
145 };
146 #define DATA_REG_NAME_CNT \
147 (sizeof (data_registers) / sizeof (struct reg_name))
148
149 static const struct reg_name address_registers[] =
150 {
151 { "a0", 0 },
152 { "a1", 1 },
153 { "a2", 2 },
154 { "a3", 3 },
155 };
156
157 #define ADDRESS_REG_NAME_CNT \
158 (sizeof (address_registers) / sizeof (struct reg_name))
159
160 static const struct reg_name r_registers[] =
161 {
162 { "a0", 8 },
163 { "a1", 9 },
164 { "a2", 10 },
165 { "a3", 11 },
166 { "d0", 12 },
167 { "d1", 13 },
168 { "d2", 14 },
169 { "d3", 15 },
170 { "e0", 0 },
171 { "e1", 1 },
172 { "e10", 10 },
173 { "e11", 11 },
174 { "e12", 12 },
175 { "e13", 13 },
176 { "e14", 14 },
177 { "e15", 15 },
178 { "e2", 2 },
179 { "e3", 3 },
180 { "e4", 4 },
181 { "e5", 5 },
182 { "e6", 6 },
183 { "e7", 7 },
184 { "e8", 8 },
185 { "e9", 9 },
186 { "r0", 0 },
187 { "r1", 1 },
188 { "r10", 10 },
189 { "r11", 11 },
190 { "r12", 12 },
191 { "r13", 13 },
192 { "r14", 14 },
193 { "r15", 15 },
194 { "r2", 2 },
195 { "r3", 3 },
196 { "r4", 4 },
197 { "r5", 5 },
198 { "r6", 6 },
199 { "r7", 7 },
200 { "r8", 8 },
201 { "r9", 9 },
202 };
203
204 #define R_REG_NAME_CNT \
205 (sizeof (r_registers) / sizeof (struct reg_name))
206
207 static const struct reg_name xr_registers[] =
208 {
209 { "mcrh", 2 },
210 { "mcrl", 3 },
211 { "mcvf", 4 },
212 { "mdrq", 1 },
213 { "sp", 0 },
214 { "xr0", 0 },
215 { "xr1", 1 },
216 { "xr10", 10 },
217 { "xr11", 11 },
218 { "xr12", 12 },
219 { "xr13", 13 },
220 { "xr14", 14 },
221 { "xr15", 15 },
222 { "xr2", 2 },
223 { "xr3", 3 },
224 { "xr4", 4 },
225 { "xr5", 5 },
226 { "xr6", 6 },
227 { "xr7", 7 },
228 { "xr8", 8 },
229 { "xr9", 9 },
230 };
231
232 #define XR_REG_NAME_CNT \
233 (sizeof (xr_registers) / sizeof (struct reg_name))
234
235 static const struct reg_name other_registers[] =
236 {
237 { "mdr", 0 },
238 { "psw", 0 },
239 { "sp", 0 },
240 };
241
242 #define OTHER_REG_NAME_CNT \
243 (sizeof (other_registers) / sizeof (struct reg_name))
244
245 /* reg_name_search does a binary search of the given register table
246 to see if "name" is a valid regiter name. Returns the register
247 number from the array on success, or -1 on failure. */
248
249 static int
250 reg_name_search (regs, regcount, name)
251 const struct reg_name *regs;
252 int regcount;
253 const char *name;
254 {
255 int middle, low, high;
256 int cmp;
257
258 low = 0;
259 high = regcount - 1;
260
261 do
262 {
263 middle = (low + high) / 2;
264 cmp = strcasecmp (name, regs[middle].name);
265 if (cmp < 0)
266 high = middle - 1;
267 else if (cmp > 0)
268 low = middle + 1;
269 else
270 return regs[middle].value;
271 }
272 while (low <= high);
273 return -1;
274 }
275
276 /* Summary of register_name().
277 *
278 * in: Input_line_pointer points to 1st char of operand.
279 *
280 * out: A expressionS.
281 * The operand may have been a register: in this case, X_op == O_register,
282 * X_add_number is set to the register number, and truth is returned.
283 * Input_line_pointer->(next non-blank) char after operand, or is in
284 * its original state.
285 */
286
287 static boolean
288 r_register_name (expressionP)
289 expressionS *expressionP;
290 {
291 int reg_number;
292 char *name;
293 char *start;
294 char c;
295
296 /* Find the spelling of the operand. */
297 start = name = input_line_pointer;
298
299 c = get_symbol_end ();
300 reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name);
301
302 /* Look to see if it's in the register table. */
303 if (reg_number >= 0)
304 {
305 expressionP->X_op = O_register;
306 expressionP->X_add_number = reg_number;
307
308 /* Make the rest nice. */
309 expressionP->X_add_symbol = NULL;
310 expressionP->X_op_symbol = NULL;
311
312 /* Put back the delimiting char. */
313 *input_line_pointer = c;
314 return true;
315 }
316 else
317 {
318 /* Reset the line as if we had not done anything. */
319 /* Put back the delimiting char. */
320 *input_line_pointer = c;
321
322 /* Reset input_line pointer. */
323 input_line_pointer = start;
324 return false;
325 }
326 }
327
328 /* Summary of register_name().
329 *
330 * in: Input_line_pointer points to 1st char of operand.
331 *
332 * out: A expressionS.
333 * The operand may have been a register: in this case, X_op == O_register,
334 * X_add_number is set to the register number, and truth is returned.
335 * Input_line_pointer->(next non-blank) char after operand, or is in
336 * its original state.
337 */
338
339 static boolean
340 xr_register_name (expressionP)
341 expressionS *expressionP;
342 {
343 int reg_number;
344 char *name;
345 char *start;
346 char c;
347
348 /* Find the spelling of the operand. */
349 start = name = input_line_pointer;
350
351 c = get_symbol_end ();
352 reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name);
353
354 /* Look to see if it's in the register table. */
355 if (reg_number >= 0)
356 {
357 expressionP->X_op = O_register;
358 expressionP->X_add_number = reg_number;
359
360 /* Make the rest nice. */
361 expressionP->X_add_symbol = NULL;
362 expressionP->X_op_symbol = NULL;
363
364 /* Put back the delimiting char. */
365 *input_line_pointer = c;
366 return true;
367 }
368 else
369 {
370 /* Reset the line as if we had not done anything. */
371 /* Put back the delimiting char. */
372 *input_line_pointer = c;
373
374 /* Reset input_line pointer. */
375 input_line_pointer = start;
376 return false;
377 }
378 }
379
380 /* Summary of register_name().
381 *
382 * in: Input_line_pointer points to 1st char of operand.
383 *
384 * out: A expressionS.
385 * The operand may have been a register: in this case, X_op == O_register,
386 * X_add_number is set to the register number, and truth is returned.
387 * Input_line_pointer->(next non-blank) char after operand, or is in
388 * its original state.
389 */
390
391 static boolean
392 data_register_name (expressionP)
393 expressionS *expressionP;
394 {
395 int reg_number;
396 char *name;
397 char *start;
398 char c;
399
400 /* Find the spelling of the operand. */
401 start = name = input_line_pointer;
402
403 c = get_symbol_end ();
404 reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name);
405
406 /* Look to see if it's in the register table. */
407 if (reg_number >= 0)
408 {
409 expressionP->X_op = O_register;
410 expressionP->X_add_number = reg_number;
411
412 /* Make the rest nice. */
413 expressionP->X_add_symbol = NULL;
414 expressionP->X_op_symbol = NULL;
415
416 /* Put back the delimiting char. */
417 *input_line_pointer = c;
418 return true;
419 }
420 else
421 {
422 /* Reset the line as if we had not done anything. */
423 /* Put back the delimiting char. */
424 *input_line_pointer = c;
425
426 /* Reset input_line pointer. */
427 input_line_pointer = start;
428 return false;
429 }
430 }
431
432 /* Summary of register_name().
433 *
434 * in: Input_line_pointer points to 1st char of operand.
435 *
436 * out: A expressionS.
437 * The operand may have been a register: in this case, X_op == O_register,
438 * X_add_number is set to the register number, and truth is returned.
439 * Input_line_pointer->(next non-blank) char after operand, or is in
440 * its original state.
441 */
442
443 static boolean
444 address_register_name (expressionP)
445 expressionS *expressionP;
446 {
447 int reg_number;
448 char *name;
449 char *start;
450 char c;
451
452 /* Find the spelling of the operand. */
453 start = name = input_line_pointer;
454
455 c = get_symbol_end ();
456 reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name);
457
458 /* Look to see if it's in the register table. */
459 if (reg_number >= 0)
460 {
461 expressionP->X_op = O_register;
462 expressionP->X_add_number = reg_number;
463
464 /* Make the rest nice. */
465 expressionP->X_add_symbol = NULL;
466 expressionP->X_op_symbol = NULL;
467
468 /* Put back the delimiting char. */
469 *input_line_pointer = c;
470 return true;
471 }
472 else
473 {
474 /* Reset the line as if we had not done anything. */
475 /* Put back the delimiting char. */
476 *input_line_pointer = c;
477
478 /* Reset input_line pointer. */
479 input_line_pointer = start;
480
481 return false;
482 }
483 }
484
485 /* Summary of register_name().
486 *
487 * in: Input_line_pointer points to 1st char of operand.
488 *
489 * out: A expressionS.
490 * The operand may have been a register: in this case, X_op == O_register,
491 * X_add_number is set to the register number, and truth is returned.
492 * Input_line_pointer->(next non-blank) char after operand, or is in
493 * its original state.
494 */
495
496 static boolean
497 other_register_name (expressionP)
498 expressionS *expressionP;
499 {
500 int reg_number;
501 char *name;
502 char *start;
503 char c;
504
505 /* Find the spelling of the operand. */
506 start = name = input_line_pointer;
507
508 c = get_symbol_end ();
509 reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name);
510
511 /* Look to see if it's in the register table. */
512 if (reg_number >= 0)
513 {
514 expressionP->X_op = O_register;
515 expressionP->X_add_number = reg_number;
516
517 /* Make the rest nice. */
518 expressionP->X_add_symbol = NULL;
519 expressionP->X_op_symbol = NULL;
520
521 /* Put back the delimiting char. */
522 *input_line_pointer = c;
523 return true;
524 }
525 else
526 {
527 /* Reset the line as if we had not done anything. */
528 /* Put back the delimiting char. */
529 *input_line_pointer = c;
530
531 /* Reset input_line pointer. */
532 input_line_pointer = start;
533 return false;
534 }
535 }
536
537 void
538 md_show_usage (stream)
539 FILE *stream;
540 {
541 fprintf (stream, _("MN10300 options:\n\
542 none yet\n"));
543 }
544
545 int
546 md_parse_option (c, arg)
547 int c;
548 char *arg;
549 {
550 return 0;
551 }
552
553 symbolS *
554 md_undefined_symbol (name)
555 char *name;
556 {
557 return 0;
558 }
559
560 char *
561 md_atof (type, litp, sizep)
562 int type;
563 char *litp;
564 int *sizep;
565 {
566 int prec;
567 LITTLENUM_TYPE words[4];
568 char *t;
569 int i;
570
571 switch (type)
572 {
573 case 'f':
574 prec = 2;
575 break;
576
577 case 'd':
578 prec = 4;
579 break;
580
581 default:
582 *sizep = 0;
583 return "bad call to md_atof";
584 }
585
586 t = atof_ieee (input_line_pointer, type, words);
587 if (t)
588 input_line_pointer = t;
589
590 *sizep = prec * 2;
591
592 for (i = prec - 1; i >= 0; i--)
593 {
594 md_number_to_chars (litp, (valueT) words[i], 2);
595 litp += 2;
596 }
597
598 return NULL;
599 }
600
601 void
602 md_convert_frag (abfd, sec, fragP)
603 bfd *abfd;
604 asection *sec;
605 fragS *fragP;
606 {
607 static unsigned long label_count = 0;
608 char buf[40];
609
610 subseg_change (sec, 0);
611 if (fragP->fr_subtype == 0)
612 {
613 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
614 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
615 fragP->fr_var = 0;
616 fragP->fr_fix += 2;
617 }
618 else if (fragP->fr_subtype == 1)
619 {
620 /* Reverse the condition of the first branch. */
621 int offset = fragP->fr_fix;
622 int opcode = fragP->fr_literal[offset] & 0xff;
623
624 switch (opcode)
625 {
626 case 0xc8:
627 opcode = 0xc9;
628 break;
629 case 0xc9:
630 opcode = 0xc8;
631 break;
632 case 0xc0:
633 opcode = 0xc2;
634 break;
635 case 0xc2:
636 opcode = 0xc0;
637 break;
638 case 0xc3:
639 opcode = 0xc1;
640 break;
641 case 0xc1:
642 opcode = 0xc3;
643 break;
644 case 0xc4:
645 opcode = 0xc6;
646 break;
647 case 0xc6:
648 opcode = 0xc4;
649 break;
650 case 0xc7:
651 opcode = 0xc5;
652 break;
653 case 0xc5:
654 opcode = 0xc7;
655 break;
656 default:
657 abort ();
658 }
659 fragP->fr_literal[offset] = opcode;
660
661 /* Create a fixup for the reversed conditional branch. */
662 sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++);
663 fix_new (fragP, fragP->fr_fix + 1, 1,
664 symbol_new (buf, sec, 0, fragP->fr_next),
665 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
666
667 /* Now create the unconditional branch + fixup to the
668 final target. */
669 fragP->fr_literal[offset + 2] = 0xcc;
670 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
671 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
672 fragP->fr_var = 0;
673 fragP->fr_fix += 5;
674 }
675 else if (fragP->fr_subtype == 2)
676 {
677 /* Reverse the condition of the first branch. */
678 int offset = fragP->fr_fix;
679 int opcode = fragP->fr_literal[offset] & 0xff;
680
681 switch (opcode)
682 {
683 case 0xc8:
684 opcode = 0xc9;
685 break;
686 case 0xc9:
687 opcode = 0xc8;
688 break;
689 case 0xc0:
690 opcode = 0xc2;
691 break;
692 case 0xc2:
693 opcode = 0xc0;
694 break;
695 case 0xc3:
696 opcode = 0xc1;
697 break;
698 case 0xc1:
699 opcode = 0xc3;
700 break;
701 case 0xc4:
702 opcode = 0xc6;
703 break;
704 case 0xc6:
705 opcode = 0xc4;
706 break;
707 case 0xc7:
708 opcode = 0xc5;
709 break;
710 case 0xc5:
711 opcode = 0xc7;
712 break;
713 default:
714 abort ();
715 }
716 fragP->fr_literal[offset] = opcode;
717
718 /* Create a fixup for the reversed conditional branch. */
719 sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++);
720 fix_new (fragP, fragP->fr_fix + 1, 1,
721 symbol_new (buf, sec, 0, fragP->fr_next),
722 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
723
724 /* Now create the unconditional branch + fixup to the
725 final target. */
726 fragP->fr_literal[offset + 2] = 0xdc;
727 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
728 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
729 fragP->fr_var = 0;
730 fragP->fr_fix += 7;
731 }
732 else if (fragP->fr_subtype == 3)
733 {
734 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
735 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
736 fragP->fr_var = 0;
737 fragP->fr_fix += 3;
738 }
739 else if (fragP->fr_subtype == 4)
740 {
741 /* Reverse the condition of the first branch. */
742 int offset = fragP->fr_fix;
743 int opcode = fragP->fr_literal[offset + 1] & 0xff;
744
745 switch (opcode)
746 {
747 case 0xe8:
748 opcode = 0xe9;
749 break;
750 case 0xe9:
751 opcode = 0xe8;
752 break;
753 case 0xea:
754 opcode = 0xeb;
755 break;
756 case 0xeb:
757 opcode = 0xea;
758 break;
759 default:
760 abort ();
761 }
762 fragP->fr_literal[offset + 1] = opcode;
763
764 /* Create a fixup for the reversed conditional branch. */
765 sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++);
766 fix_new (fragP, fragP->fr_fix + 2, 1,
767 symbol_new (buf, sec, 0, fragP->fr_next),
768 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
769
770 /* Now create the unconditional branch + fixup to the
771 final target. */
772 fragP->fr_literal[offset + 3] = 0xcc;
773 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
774 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
775 fragP->fr_var = 0;
776 fragP->fr_fix += 6;
777 }
778 else if (fragP->fr_subtype == 5)
779 {
780 /* Reverse the condition of the first branch. */
781 int offset = fragP->fr_fix;
782 int opcode = fragP->fr_literal[offset + 1] & 0xff;
783
784 switch (opcode)
785 {
786 case 0xe8:
787 opcode = 0xe9;
788 break;
789 case 0xea:
790 opcode = 0xeb;
791 break;
792 case 0xeb:
793 opcode = 0xea;
794 break;
795 default:
796 abort ();
797 }
798 fragP->fr_literal[offset + 1] = opcode;
799
800 /* Create a fixup for the reversed conditional branch. */
801 sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++);
802 fix_new (fragP, fragP->fr_fix + 2, 1,
803 symbol_new (buf, sec, 0, fragP->fr_next),
804 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
805
806 /* Now create the unconditional branch + fixup to the
807 final target. */
808 fragP->fr_literal[offset + 3] = 0xdc;
809 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
810 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
811 fragP->fr_var = 0;
812 fragP->fr_fix += 8;
813 }
814 else if (fragP->fr_subtype == 6)
815 {
816 int offset = fragP->fr_fix;
817 fragP->fr_literal[offset] = 0xcd;
818 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
819 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
820 fragP->fr_var = 0;
821 fragP->fr_fix += 5;
822 }
823 else if (fragP->fr_subtype == 7)
824 {
825 int offset = fragP->fr_fix;
826 fragP->fr_literal[offset] = 0xdd;
827 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
828 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
829
830 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
831 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
832 fragP->fr_var = 0;
833 fragP->fr_fix += 7;
834 }
835 else if (fragP->fr_subtype == 8)
836 {
837 int offset = fragP->fr_fix;
838 fragP->fr_literal[offset] = 0xfa;
839 fragP->fr_literal[offset + 1] = 0xff;
840 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
841 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
842 fragP->fr_var = 0;
843 fragP->fr_fix += 4;
844 }
845 else if (fragP->fr_subtype == 9)
846 {
847 int offset = fragP->fr_fix;
848 fragP->fr_literal[offset] = 0xfc;
849 fragP->fr_literal[offset + 1] = 0xff;
850
851 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
852 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
853 fragP->fr_var = 0;
854 fragP->fr_fix += 6;
855 }
856 else if (fragP->fr_subtype == 10)
857 {
858 fragP->fr_literal[fragP->fr_fix] = 0xca;
859 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
860 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
861 fragP->fr_var = 0;
862 fragP->fr_fix += 2;
863 }
864 else if (fragP->fr_subtype == 11)
865 {
866 int offset = fragP->fr_fix;
867 fragP->fr_literal[offset] = 0xcc;
868
869 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
870 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
871 fragP->fr_var = 0;
872 fragP->fr_fix += 3;
873 }
874 else if (fragP->fr_subtype == 12)
875 {
876 int offset = fragP->fr_fix;
877 fragP->fr_literal[offset] = 0xdc;
878
879 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
880 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
881 fragP->fr_var = 0;
882 fragP->fr_fix += 5;
883 }
884 else
885 abort ();
886 }
887
888 valueT
889 md_section_align (seg, addr)
890 asection *seg;
891 valueT addr;
892 {
893 int align = bfd_get_section_alignment (stdoutput, seg);
894 return ((addr + (1 << align) - 1) & (-1 << align));
895 }
896
897 void
898 md_begin ()
899 {
900 char *prev_name = "";
901 register const struct mn10300_opcode *op;
902
903 mn10300_hash = hash_new ();
904
905 /* Insert unique names into hash table. The MN10300 instruction set
906 has many identical opcode names that have different opcodes based
907 on the operands. This hash table then provides a quick index to
908 the first opcode with a particular name in the opcode table. */
909
910 op = mn10300_opcodes;
911 while (op->name)
912 {
913 if (strcmp (prev_name, op->name))
914 {
915 prev_name = (char *) op->name;
916 hash_insert (mn10300_hash, op->name, (char *) op);
917 }
918 op++;
919 }
920
921 /* This is both a simplification (we don't have to write md_apply_fix)
922 and support for future optimizations (branch shortening and similar
923 stuff in the linker). */
924 linkrelax = 1;
925
926 /* Set the default machine type. */
927 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
928 as_warn (_("could not set architecture and machine"));
929
930 current_machine = MN103;
931 }
932
933 void
934 md_assemble (str)
935 char *str;
936 {
937 char *s;
938 struct mn10300_opcode *opcode;
939 struct mn10300_opcode *next_opcode;
940 const unsigned char *opindex_ptr;
941 int next_opindex, relaxable;
942 unsigned long insn, extension, size = 0, real_size;
943 char *f;
944 int i;
945 int match;
946
947 /* Get the opcode. */
948 for (s = str; *s != '\0' && !isspace (*s); s++)
949 ;
950 if (*s != '\0')
951 *s++ = '\0';
952
953 /* Find the first opcode with the proper name. */
954 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
955 if (opcode == NULL)
956 {
957 as_bad (_("Unrecognized opcode: `%s'"), str);
958 return;
959 }
960
961 str = s;
962 while (isspace (*str))
963 ++str;
964
965 input_line_pointer = str;
966
967 for (;;)
968 {
969 const char *errmsg;
970 int op_idx;
971 char *hold;
972 int extra_shift = 0;
973
974 errmsg = _("Invalid opcode/operands");
975
976 /* Reset the array of register operands. */
977 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
978
979 relaxable = 0;
980 fc = 0;
981 match = 0;
982 next_opindex = 0;
983 insn = opcode->opcode;
984 extension = 0;
985
986 /* If the instruction is not available on the current machine
987 then it can not possibly match. */
988 if (opcode->machine
989 && !(opcode->machine == AM33 && HAVE_AM33)
990 && !(opcode->machine == AM30 && HAVE_AM30))
991 goto error;
992
993 for (op_idx = 1, opindex_ptr = opcode->operands;
994 *opindex_ptr != 0;
995 opindex_ptr++, op_idx++)
996 {
997 const struct mn10300_operand *operand;
998 expressionS ex;
999
1000 if (next_opindex == 0)
1001 {
1002 operand = &mn10300_operands[*opindex_ptr];
1003 }
1004 else
1005 {
1006 operand = &mn10300_operands[next_opindex];
1007 next_opindex = 0;
1008 }
1009
1010 while (*str == ' ' || *str == ',')
1011 ++str;
1012
1013 if (operand->flags & MN10300_OPERAND_RELAX)
1014 relaxable = 1;
1015
1016 /* Gather the operand. */
1017 hold = input_line_pointer;
1018 input_line_pointer = str;
1019
1020 if (operand->flags & MN10300_OPERAND_PAREN)
1021 {
1022 if (*input_line_pointer != ')' && *input_line_pointer != '(')
1023 {
1024 input_line_pointer = hold;
1025 str = hold;
1026 goto error;
1027 }
1028 input_line_pointer++;
1029 goto keep_going;
1030 }
1031 /* See if we can match the operands. */
1032 else if (operand->flags & MN10300_OPERAND_DREG)
1033 {
1034 if (!data_register_name (&ex))
1035 {
1036 input_line_pointer = hold;
1037 str = hold;
1038 goto error;
1039 }
1040 }
1041 else if (operand->flags & MN10300_OPERAND_AREG)
1042 {
1043 if (!address_register_name (&ex))
1044 {
1045 input_line_pointer = hold;
1046 str = hold;
1047 goto error;
1048 }
1049 }
1050 else if (operand->flags & MN10300_OPERAND_SP)
1051 {
1052 char *start = input_line_pointer;
1053 char c = get_symbol_end ();
1054
1055 if (strcasecmp (start, "sp") != 0)
1056 {
1057 *input_line_pointer = c;
1058 input_line_pointer = hold;
1059 str = hold;
1060 goto error;
1061 }
1062 *input_line_pointer = c;
1063 goto keep_going;
1064 }
1065 else if (operand->flags & MN10300_OPERAND_RREG)
1066 {
1067 if (!r_register_name (&ex))
1068 {
1069 input_line_pointer = hold;
1070 str = hold;
1071 goto error;
1072 }
1073 }
1074 else if (operand->flags & MN10300_OPERAND_XRREG)
1075 {
1076 if (!xr_register_name (&ex))
1077 {
1078 input_line_pointer = hold;
1079 str = hold;
1080 goto error;
1081 }
1082 }
1083 else if (operand->flags & MN10300_OPERAND_USP)
1084 {
1085 char *start = input_line_pointer;
1086 char c = get_symbol_end ();
1087
1088 if (strcasecmp (start, "usp") != 0)
1089 {
1090 *input_line_pointer = c;
1091 input_line_pointer = hold;
1092 str = hold;
1093 goto error;
1094 }
1095 *input_line_pointer = c;
1096 goto keep_going;
1097 }
1098 else if (operand->flags & MN10300_OPERAND_SSP)
1099 {
1100 char *start = input_line_pointer;
1101 char c = get_symbol_end ();
1102
1103 if (strcasecmp (start, "ssp") != 0)
1104 {
1105 *input_line_pointer = c;
1106 input_line_pointer = hold;
1107 str = hold;
1108 goto error;
1109 }
1110 *input_line_pointer = c;
1111 goto keep_going;
1112 }
1113 else if (operand->flags & MN10300_OPERAND_MSP)
1114 {
1115 char *start = input_line_pointer;
1116 char c = get_symbol_end ();
1117
1118 if (strcasecmp (start, "msp") != 0)
1119 {
1120 *input_line_pointer = c;
1121 input_line_pointer = hold;
1122 str = hold;
1123 goto error;
1124 }
1125 *input_line_pointer = c;
1126 goto keep_going;
1127 }
1128 else if (operand->flags & MN10300_OPERAND_PC)
1129 {
1130 char *start = input_line_pointer;
1131 char c = get_symbol_end ();
1132
1133 if (strcasecmp (start, "pc") != 0)
1134 {
1135 *input_line_pointer = c;
1136 input_line_pointer = hold;
1137 str = hold;
1138 goto error;
1139 }
1140 *input_line_pointer = c;
1141 goto keep_going;
1142 }
1143 else if (operand->flags & MN10300_OPERAND_EPSW)
1144 {
1145 char *start = input_line_pointer;
1146 char c = get_symbol_end ();
1147
1148 if (strcasecmp (start, "epsw") != 0)
1149 {
1150 *input_line_pointer = c;
1151 input_line_pointer = hold;
1152 str = hold;
1153 goto error;
1154 }
1155 *input_line_pointer = c;
1156 goto keep_going;
1157 }
1158 else if (operand->flags & MN10300_OPERAND_PLUS)
1159 {
1160 if (*input_line_pointer != '+')
1161 {
1162 input_line_pointer = hold;
1163 str = hold;
1164 goto error;
1165 }
1166 input_line_pointer++;
1167 goto keep_going;
1168 }
1169 else if (operand->flags & MN10300_OPERAND_PSW)
1170 {
1171 char *start = input_line_pointer;
1172 char c = get_symbol_end ();
1173
1174 if (strcasecmp (start, "psw") != 0)
1175 {
1176 *input_line_pointer = c;
1177 input_line_pointer = hold;
1178 str = hold;
1179 goto error;
1180 }
1181 *input_line_pointer = c;
1182 goto keep_going;
1183 }
1184 else if (operand->flags & MN10300_OPERAND_MDR)
1185 {
1186 char *start = input_line_pointer;
1187 char c = get_symbol_end ();
1188
1189 if (strcasecmp (start, "mdr") != 0)
1190 {
1191 *input_line_pointer = c;
1192 input_line_pointer = hold;
1193 str = hold;
1194 goto error;
1195 }
1196 *input_line_pointer = c;
1197 goto keep_going;
1198 }
1199 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1200 {
1201 unsigned int value = 0;
1202 if (*input_line_pointer != '[')
1203 {
1204 input_line_pointer = hold;
1205 str = hold;
1206 goto error;
1207 }
1208
1209 /* Eat the '['. */
1210 input_line_pointer++;
1211
1212 /* We used to reject a null register list here; however,
1213 we accept it now so the compiler can emit "call"
1214 instructions for all calls to named functions.
1215
1216 The linker can then fill in the appropriate bits for the
1217 register list and stack size or change the instruction
1218 into a "calls" if using "call" is not profitable. */
1219 while (*input_line_pointer != ']')
1220 {
1221 char *start;
1222 char c;
1223
1224 if (*input_line_pointer == ',')
1225 input_line_pointer++;
1226
1227 start = input_line_pointer;
1228 c = get_symbol_end ();
1229
1230 if (strcasecmp (start, "d2") == 0)
1231 {
1232 value |= 0x80;
1233 *input_line_pointer = c;
1234 }
1235 else if (strcasecmp (start, "d3") == 0)
1236 {
1237 value |= 0x40;
1238 *input_line_pointer = c;
1239 }
1240 else if (strcasecmp (start, "a2") == 0)
1241 {
1242 value |= 0x20;
1243 *input_line_pointer = c;
1244 }
1245 else if (strcasecmp (start, "a3") == 0)
1246 {
1247 value |= 0x10;
1248 *input_line_pointer = c;
1249 }
1250 else if (strcasecmp (start, "other") == 0)
1251 {
1252 value |= 0x08;
1253 *input_line_pointer = c;
1254 }
1255 else if (HAVE_AM33
1256 && strcasecmp (start, "exreg0") == 0)
1257 {
1258 value |= 0x04;
1259 *input_line_pointer = c;
1260 }
1261 else if (HAVE_AM33
1262 && strcasecmp (start, "exreg1") == 0)
1263 {
1264 value |= 0x02;
1265 *input_line_pointer = c;
1266 }
1267 else if (HAVE_AM33
1268 && strcasecmp (start, "exother") == 0)
1269 {
1270 value |= 0x01;
1271 *input_line_pointer = c;
1272 }
1273 else if (HAVE_AM33
1274 && strcasecmp (start, "all") == 0)
1275 {
1276 value |= 0xff;
1277 *input_line_pointer = c;
1278 }
1279 else
1280 {
1281 input_line_pointer = hold;
1282 str = hold;
1283 goto error;
1284 }
1285 }
1286 input_line_pointer++;
1287 mn10300_insert_operand (&insn, &extension, operand,
1288 value, (char *) NULL, 0, 0);
1289 goto keep_going;
1290
1291 }
1292 else if (data_register_name (&ex))
1293 {
1294 input_line_pointer = hold;
1295 str = hold;
1296 goto error;
1297 }
1298 else if (address_register_name (&ex))
1299 {
1300 input_line_pointer = hold;
1301 str = hold;
1302 goto error;
1303 }
1304 else if (other_register_name (&ex))
1305 {
1306 input_line_pointer = hold;
1307 str = hold;
1308 goto error;
1309 }
1310 else if (HAVE_AM33 && r_register_name (&ex))
1311 {
1312 input_line_pointer = hold;
1313 str = hold;
1314 goto error;
1315 }
1316 else if (HAVE_AM33 && xr_register_name (&ex))
1317 {
1318 input_line_pointer = hold;
1319 str = hold;
1320 goto error;
1321 }
1322 else if (*str == ')' || *str == '(')
1323 {
1324 input_line_pointer = hold;
1325 str = hold;
1326 goto error;
1327 }
1328 else
1329 {
1330 expression (&ex);
1331 }
1332
1333 switch (ex.X_op)
1334 {
1335 case O_illegal:
1336 errmsg = _("illegal operand");
1337 goto error;
1338 case O_absent:
1339 errmsg = _("missing operand");
1340 goto error;
1341 case O_register:
1342 {
1343 int mask;
1344
1345 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
1346 if (HAVE_AM33)
1347 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
1348 if ((operand->flags & mask) == 0)
1349 {
1350 input_line_pointer = hold;
1351 str = hold;
1352 goto error;
1353 }
1354
1355 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1356 extra_shift = 8;
1357 else if (opcode->format == FMT_D2
1358 || opcode->format == FMT_D4
1359 || opcode->format == FMT_S2
1360 || opcode->format == FMT_S4
1361 || opcode->format == FMT_S6
1362 || opcode->format == FMT_D5)
1363 extra_shift = 16;
1364 else if (opcode->format == FMT_D7)
1365 extra_shift = 8;
1366 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1367 extra_shift = 8;
1368 else
1369 extra_shift = 0;
1370
1371 mn10300_insert_operand (&insn, &extension, operand,
1372 ex.X_add_number, (char *) NULL,
1373 0, extra_shift);
1374
1375 /* And note the register number in the register array. */
1376 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1377 break;
1378 }
1379
1380 case O_constant:
1381 /* If this operand can be promoted, and it doesn't
1382 fit into the allocated bitfield for this insn,
1383 then promote it (ie this opcode does not match). */
1384 if (operand->flags
1385 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
1386 && !check_operand (insn, operand, ex.X_add_number))
1387 {
1388 input_line_pointer = hold;
1389 str = hold;
1390 goto error;
1391 }
1392
1393 mn10300_insert_operand (&insn, &extension, operand,
1394 ex.X_add_number, (char *) NULL,
1395 0, 0);
1396 break;
1397
1398 default:
1399 /* If this operand can be promoted, then this opcode didn't
1400 match since we can't know if it needed promotion! */
1401 if (operand->flags & MN10300_OPERAND_PROMOTE)
1402 {
1403 input_line_pointer = hold;
1404 str = hold;
1405 goto error;
1406 }
1407
1408 /* We need to generate a fixup for this expression. */
1409 if (fc >= MAX_INSN_FIXUPS)
1410 as_fatal (_("too many fixups"));
1411 fixups[fc].exp = ex;
1412 fixups[fc].opindex = *opindex_ptr;
1413 fixups[fc].reloc = BFD_RELOC_UNUSED;
1414 ++fc;
1415 break;
1416 }
1417
1418 keep_going:
1419 str = input_line_pointer;
1420 input_line_pointer = hold;
1421
1422 while (*str == ' ' || *str == ',')
1423 ++str;
1424
1425 }
1426
1427 /* Make sure we used all the operands! */
1428 if (*str != ',')
1429 match = 1;
1430
1431 /* If this instruction has registers that must not match, verify
1432 that they do indeed not match. */
1433 if (opcode->no_match_operands)
1434 {
1435 int i;
1436
1437 /* Look at each operand to see if it's marked. */
1438 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1439 {
1440 if ((1 << i) & opcode->no_match_operands)
1441 {
1442 int j;
1443
1444 /* operand I is marked. Check that it does not match any
1445 operands > I which are marked. */
1446 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1447 {
1448 if (((1 << j) & opcode->no_match_operands)
1449 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1450 {
1451 errmsg = _("Invalid register specification.");
1452 match = 0;
1453 goto error;
1454 }
1455 }
1456 }
1457 }
1458 }
1459
1460 error:
1461 if (match == 0)
1462 {
1463 next_opcode = opcode + 1;
1464 if (!strcmp (next_opcode->name, opcode->name))
1465 {
1466 opcode = next_opcode;
1467 continue;
1468 }
1469
1470 as_bad ("%s", errmsg);
1471 return;
1472 }
1473 break;
1474 }
1475
1476 while (isspace (*str))
1477 ++str;
1478
1479 if (*str != '\0')
1480 as_bad (_("junk at end of line: `%s'"), str);
1481
1482 input_line_pointer = str;
1483
1484 /* Determine the size of the instruction. */
1485 if (opcode->format == FMT_S0)
1486 size = 1;
1487
1488 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1489 size = 2;
1490
1491 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1492 size = 3;
1493
1494 if (opcode->format == FMT_D6)
1495 size = 3;
1496
1497 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1498 size = 4;
1499
1500 if (opcode->format == FMT_D8)
1501 size = 6;
1502
1503 if (opcode->format == FMT_D9)
1504 size = 7;
1505
1506 if (opcode->format == FMT_S4)
1507 size = 5;
1508
1509 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1510 size = 7;
1511
1512 if (opcode->format == FMT_D2)
1513 size = 4;
1514
1515 if (opcode->format == FMT_D4)
1516 size = 6;
1517
1518 real_size = size;
1519
1520 if (relaxable && fc > 0)
1521 {
1522 int type;
1523
1524 /* bCC */
1525 if (size == 2)
1526 {
1527 /* Handle bra specially. Basically treat it like jmp so
1528 that we automatically handle 8, 16 and 32 bit offsets
1529 correctly as well as jumps to an undefined address.
1530
1531 It is also important to not treat it like other bCC
1532 instructions since the long forms of bra is different
1533 from other bCC instructions. */
1534 if (opcode->opcode == 0xca00)
1535 type = 10;
1536 else
1537 type = 0;
1538 }
1539 /* call */
1540 else if (size == 5)
1541 type = 6;
1542 /* calls */
1543 else if (size == 4)
1544 type = 8;
1545 /* jmp */
1546 else if (size == 3 && opcode->opcode == 0xcc0000)
1547 type = 10;
1548 /* bCC (uncommon cases) */
1549 else
1550 type = 3;
1551
1552 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1553 fixups[0].exp.X_add_symbol,
1554 fixups[0].exp.X_add_number,
1555 (char *)fixups[0].opindex);
1556
1557 /* This is pretty hokey. We basically just care about the
1558 opcode, so we have to write out the first word big endian.
1559
1560 The exception is "call", which has two operands that we
1561 care about.
1562
1563 The first operand (the register list) happens to be in the
1564 first instruction word, and will be in the right place if
1565 we output the first word in big endian mode.
1566
1567 The second operand (stack size) is in the extension word,
1568 and we want it to appear as the first character in the extension
1569 word (as it appears in memory). Luckily, writing the extension
1570 word in big endian format will do what we want. */
1571 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1572 if (size > 8)
1573 {
1574 number_to_chars_bigendian (f + 4, extension, 4);
1575 number_to_chars_bigendian (f + 8, 0, size - 8);
1576 }
1577 else if (size > 4)
1578 number_to_chars_bigendian (f + 4, extension, size - 4);
1579 }
1580 else
1581 {
1582 /* Allocate space for the instruction. */
1583 f = frag_more (size);
1584
1585 /* Fill in bytes for the instruction. Note that opcode fields
1586 are written big-endian, 16 & 32bit immediates are written
1587 little endian. Egad. */
1588 if (opcode->format == FMT_S0
1589 || opcode->format == FMT_S1
1590 || opcode->format == FMT_D0
1591 || opcode->format == FMT_D6
1592 || opcode->format == FMT_D7
1593 || opcode->format == FMT_D10
1594 || opcode->format == FMT_D1)
1595 {
1596 number_to_chars_bigendian (f, insn, size);
1597 }
1598 else if (opcode->format == FMT_S2
1599 && opcode->opcode != 0xdf0000
1600 && opcode->opcode != 0xde0000)
1601 {
1602 /* A format S2 instruction that is _not_ "ret" and "retf". */
1603 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1604 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1605 }
1606 else if (opcode->format == FMT_S2)
1607 {
1608 /* This must be a ret or retf, which is written entirely in
1609 big-endian format. */
1610 number_to_chars_bigendian (f, insn, 3);
1611 }
1612 else if (opcode->format == FMT_S4
1613 && opcode->opcode != 0xdc000000)
1614 {
1615 /* This must be a format S4 "call" instruction. What a pain. */
1616 unsigned long temp = (insn >> 8) & 0xffff;
1617 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1618 number_to_chars_littleendian (f + 1, temp, 2);
1619 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1620 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1621 }
1622 else if (opcode->format == FMT_S4)
1623 {
1624 /* This must be a format S4 "jmp" instruction. */
1625 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1626 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1627 number_to_chars_littleendian (f + 1, temp, 4);
1628 }
1629 else if (opcode->format == FMT_S6)
1630 {
1631 unsigned long temp = ((insn & 0xffffff) << 8)
1632 | ((extension >> 16) & 0xff);
1633 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1634 number_to_chars_littleendian (f + 1, temp, 4);
1635 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
1636 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1637 }
1638 else if (opcode->format == FMT_D2
1639 && opcode->opcode != 0xfaf80000
1640 && opcode->opcode != 0xfaf00000
1641 && opcode->opcode != 0xfaf40000)
1642 {
1643 /* A format D2 instruction where the 16bit immediate is
1644 really a single 16bit value, not two 8bit values. */
1645 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1646 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
1647 }
1648 else if (opcode->format == FMT_D2)
1649 {
1650 /* A format D2 instruction where the 16bit immediate
1651 is really two 8bit immediates. */
1652 number_to_chars_bigendian (f, insn, 4);
1653 }
1654 else if (opcode->format == FMT_D4)
1655 {
1656 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
1657
1658 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1659 number_to_chars_littleendian (f + 2, temp, 4);
1660 }
1661 else if (opcode->format == FMT_D5)
1662 {
1663 unsigned long temp = (((insn & 0xffff) << 16)
1664 | ((extension >> 8) & 0xffff));
1665
1666 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1667 number_to_chars_littleendian (f + 2, temp, 4);
1668 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1669 }
1670 else if (opcode->format == FMT_D8)
1671 {
1672 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
1673
1674 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1675 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
1676 number_to_chars_littleendian (f + 4, temp >> 8, 2);
1677 }
1678 else if (opcode->format == FMT_D9)
1679 {
1680 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
1681
1682 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1683 number_to_chars_littleendian (f + 3, temp, 4);
1684 }
1685
1686 /* Create any fixups. */
1687 for (i = 0; i < fc; i++)
1688 {
1689 const struct mn10300_operand *operand;
1690
1691 operand = &mn10300_operands[fixups[i].opindex];
1692 if (fixups[i].reloc != BFD_RELOC_UNUSED)
1693 {
1694 reloc_howto_type *reloc_howto;
1695 int size;
1696 int offset;
1697 fixS *fixP;
1698
1699 reloc_howto = bfd_reloc_type_lookup (stdoutput,
1700 fixups[i].reloc);
1701
1702 if (!reloc_howto)
1703 abort ();
1704
1705 size = bfd_get_reloc_size (reloc_howto);
1706
1707 if (size < 1 || size > 4)
1708 abort ();
1709
1710 offset = 4 - size;
1711 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1712 size, &fixups[i].exp,
1713 reloc_howto->pc_relative,
1714 fixups[i].reloc);
1715 }
1716 else
1717 {
1718 int reloc, pcrel, reloc_size, offset;
1719 fixS *fixP;
1720
1721 reloc = BFD_RELOC_NONE;
1722 /* How big is the reloc? Remember SPLIT relocs are
1723 implicitly 32bits. */
1724 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1725 reloc_size = 32;
1726 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1727 reloc_size = 24;
1728 else
1729 reloc_size = operand->bits;
1730
1731 /* Is the reloc pc-relative? */
1732 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
1733
1734 /* Gross. This disgusting hack is to make sure we
1735 get the right offset for the 16/32 bit reloc in
1736 "call" instructions. Basically they're a pain
1737 because the reloc isn't at the end of the instruction. */
1738 if ((size == 5 || size == 7)
1739 && (((insn >> 24) & 0xff) == 0xcd
1740 || ((insn >> 24) & 0xff) == 0xdd))
1741 size -= 2;
1742
1743 /* Similarly for certain bit instructions which don't
1744 hav their 32bit reloc at the tail of the instruction. */
1745 if (size == 7
1746 && (((insn >> 16) & 0xffff) == 0xfe00
1747 || ((insn >> 16) & 0xffff) == 0xfe01
1748 || ((insn >> 16) & 0xffff) == 0xfe02))
1749 size -= 1;
1750
1751 offset = size - reloc_size / 8;
1752
1753 /* Choose a proper BFD relocation type. */
1754 if (pcrel)
1755 {
1756 if (reloc_size == 32)
1757 reloc = BFD_RELOC_32_PCREL;
1758 else if (reloc_size == 16)
1759 reloc = BFD_RELOC_16_PCREL;
1760 else if (reloc_size == 8)
1761 reloc = BFD_RELOC_8_PCREL;
1762 else
1763 abort ();
1764 }
1765 else
1766 {
1767 if (reloc_size == 32)
1768 reloc = BFD_RELOC_32;
1769 else if (reloc_size == 16)
1770 reloc = BFD_RELOC_16;
1771 else if (reloc_size == 8)
1772 reloc = BFD_RELOC_8;
1773 else
1774 abort ();
1775 }
1776
1777 /* Convert the size of the reloc into what fix_new_exp wants. */
1778 reloc_size = reloc_size / 8;
1779 if (reloc_size == 8)
1780 reloc_size = 0;
1781 else if (reloc_size == 16)
1782 reloc_size = 1;
1783 else if (reloc_size == 32)
1784 reloc_size = 2;
1785
1786 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1787 reloc_size, &fixups[i].exp, pcrel,
1788 ((bfd_reloc_code_real_type) reloc));
1789
1790 if (pcrel)
1791 fixP->fx_offset += offset;
1792 }
1793 }
1794 }
1795
1796 if (debug_type == DEBUG_DWARF2)
1797 {
1798 bfd_vma addr;
1799
1800 /* First update the notion of the current source line. */
1801 dwarf2_where (&debug_line);
1802
1803 /* We want the offset of the start of this instruction within the
1804 the current frag. */
1805 addr = frag_now->fr_address + frag_now_fix () - real_size;
1806
1807 /* And record the information. */
1808 dwarf2_gen_line_info (addr, &debug_line);
1809 }
1810 }
1811
1812 /* If while processing a fixup, a reloc really needs to be created
1813 then it is done here. */
1814
1815 arelent *
1816 tc_gen_reloc (seg, fixp)
1817 asection *seg;
1818 fixS *fixp;
1819 {
1820 arelent *reloc;
1821 reloc = (arelent *) xmalloc (sizeof (arelent));
1822
1823 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1824 if (reloc->howto == (reloc_howto_type *) NULL)
1825 {
1826 as_bad_where (fixp->fx_file, fixp->fx_line,
1827 _("reloc %d not supported by object file format"),
1828 (int) fixp->fx_r_type);
1829 return NULL;
1830 }
1831 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1832
1833 if (fixp->fx_addsy && fixp->fx_subsy)
1834 {
1835
1836 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1837 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1838 {
1839 as_bad_where (fixp->fx_file, fixp->fx_line,
1840 "Difference of symbols in different sections is not supported");
1841 return NULL;
1842 }
1843
1844 reloc->sym_ptr_ptr = &bfd_abs_symbol;
1845 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
1846 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
1847 }
1848 else
1849 {
1850 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1851 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1852 reloc->addend = fixp->fx_offset;
1853 }
1854 return reloc;
1855 }
1856
1857 int
1858 md_estimate_size_before_relax (fragp, seg)
1859 fragS *fragp;
1860 asection *seg;
1861 {
1862 if (fragp->fr_subtype == 0)
1863 return 2;
1864 if (fragp->fr_subtype == 3)
1865 return 3;
1866 if (fragp->fr_subtype == 6)
1867 {
1868 if (!S_IS_DEFINED (fragp->fr_symbol)
1869 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1870 {
1871 fragp->fr_subtype = 7;
1872 return 7;
1873 }
1874 else
1875 return 5;
1876 }
1877 if (fragp->fr_subtype == 8)
1878 {
1879 if (!S_IS_DEFINED (fragp->fr_symbol)
1880 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1881 {
1882 fragp->fr_subtype = 9;
1883 return 6;
1884 }
1885 else
1886 return 4;
1887 }
1888 if (fragp->fr_subtype == 10)
1889 {
1890 if (!S_IS_DEFINED (fragp->fr_symbol)
1891 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1892 {
1893 fragp->fr_subtype = 12;
1894 return 5;
1895 }
1896 else
1897 return 2;
1898 }
1899 }
1900
1901 long
1902 md_pcrel_from (fixp)
1903 fixS *fixp;
1904 {
1905 return fixp->fx_frag->fr_address;
1906 #if 0
1907 if (fixp->fx_addsy != (symbolS *) NULL && !S_IS_DEFINED (fixp->fx_addsy))
1908 {
1909 /* The symbol is undefined. Let the linker figure it out. */
1910 return 0;
1911 }
1912 return fixp->fx_frag->fr_address + fixp->fx_where;
1913 #endif
1914 }
1915
1916 int
1917 md_apply_fix3 (fixp, valuep, seg)
1918 fixS *fixp;
1919 valueT *valuep;
1920 segT seg;
1921 {
1922 /* We shouldn't ever get here because linkrelax is nonzero. */
1923 abort ();
1924 fixp->fx_done = 1;
1925 return 0;
1926 }
1927
1928 /* Insert an operand value into an instruction. */
1929
1930 static void
1931 mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift)
1932 unsigned long *insnp;
1933 unsigned long *extensionp;
1934 const struct mn10300_operand *operand;
1935 offsetT val;
1936 char *file;
1937 unsigned int line;
1938 unsigned int shift;
1939 {
1940 /* No need to check 32bit operands for a bit. Note that
1941 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1942 if (operand->bits != 32
1943 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1944 {
1945 long min, max;
1946 offsetT test;
1947 int bits;
1948
1949 bits = operand->bits;
1950 if (operand->flags & MN10300_OPERAND_24BIT)
1951 bits = 24;
1952
1953 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1954 {
1955 max = (1 << (bits - 1)) - 1;
1956 min = - (1 << (bits - 1));
1957 }
1958 else
1959 {
1960 max = (1 << bits) - 1;
1961 min = 0;
1962 }
1963
1964 test = val;
1965
1966 if (test < (offsetT) min || test > (offsetT) max)
1967 {
1968 const char *err =
1969 _("operand out of range (%s not between %ld and %ld)");
1970 char buf[100];
1971
1972 sprint_value (buf, test);
1973 if (file == (char *) NULL)
1974 as_warn (err, buf, min, max);
1975 else
1976 as_warn_where (file, line, err, buf, min, max);
1977 }
1978 }
1979
1980 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1981 {
1982 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
1983 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
1984 << operand->shift);
1985 }
1986 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1987 {
1988 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
1989 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
1990 << operand->shift);
1991 }
1992 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
1993 {
1994 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1995 << (operand->shift + shift));
1996
1997 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1998 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1999 << (operand->shift + shift + operand->bits));
2000 }
2001 else
2002 {
2003 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2004 << (operand->shift + shift));
2005
2006 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2007 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2008 << (operand->shift + shift + operand->bits));
2009 }
2010 }
2011
2012 static unsigned long
2013 check_operand (insn, operand, val)
2014 unsigned long insn;
2015 const struct mn10300_operand *operand;
2016 offsetT val;
2017 {
2018 /* No need to check 32bit operands for a bit. Note that
2019 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2020 if (operand->bits != 32
2021 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2022 {
2023 long min, max;
2024 offsetT test;
2025 int bits;
2026
2027 bits = operand->bits;
2028 if (operand->flags & MN10300_OPERAND_24BIT)
2029 bits = 24;
2030
2031 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2032 {
2033 max = (1 << (bits - 1)) - 1;
2034 min = - (1 << (bits - 1));
2035 }
2036 else
2037 {
2038 max = (1 << bits) - 1;
2039 min = 0;
2040 }
2041
2042 test = val;
2043
2044 if (test < (offsetT) min || test > (offsetT) max)
2045 return 0;
2046 else
2047 return 1;
2048 }
2049 return 1;
2050 }
2051
2052 static void
2053 set_arch_mach (mach)
2054 int mach;
2055 {
2056 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2057 as_warn (_("could not set architecture and machine"));
2058
2059 current_machine = mach;
2060 }
2061
2062 void
2063 mn10300_finalize ()
2064 {
2065 if (debug_type == DEBUG_DWARF2)
2066 dwarf2_finish ();
2067 }
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