Allow symbol and label names to be enclosed in double quotes.
[deliverable/binutils-gdb.git] / gas / config / tc-mn10300.c
1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright (C) 1996-2015 Free Software Foundation, Inc.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19 Boston, MA 02110-1301, USA. */
20
21 #include "as.h"
22 #include "safe-ctype.h"
23 #include "subsegs.h"
24 #include "opcode/mn10300.h"
25 #include "dwarf2dbg.h"
26 #include "libiberty.h"
27 \f
28 /* Structure to hold information about predefined registers. */
29 struct reg_name
30 {
31 const char *name;
32 int value;
33 };
34
35 /* Generic assembler global variables which must be defined by all
36 targets. */
37
38 /* Characters which always start a comment. */
39 const char comment_chars[] = "#";
40
41 /* Characters which start a comment at the beginning of a line. */
42 const char line_comment_chars[] = ";#";
43
44 /* Characters which may be used to separate multiple commands on a
45 single line. */
46 const char line_separator_chars[] = ";";
47
48 /* Characters which are used to indicate an exponent in a floating
49 point number. */
50 const char EXP_CHARS[] = "eE";
51
52 /* Characters which mean that a number is a floating point constant,
53 as in 0d1.0. */
54 const char FLT_CHARS[] = "dD";
55 \f
56 const relax_typeS md_relax_table[] =
57 {
58 /* The plus values for the bCC and fBCC instructions in the table below
59 are because the branch instruction is translated into a jump
60 instruction that is now +2 or +3 bytes further on in memory, and the
61 correct size of jump instruction must be selected. */
62 /* bCC relaxing. */
63 {0x7f, -0x80, 2, 1},
64 {0x7fff + 2, -0x8000 + 2, 5, 2},
65 {0x7fffffff, -0x80000000, 7, 0},
66
67 /* bCC relaxing (uncommon cases for 3byte length instructions) */
68 {0x7f, -0x80, 3, 4},
69 {0x7fff + 3, -0x8000 + 3, 6, 5},
70 {0x7fffffff, -0x80000000, 8, 0},
71
72 /* call relaxing. */
73 {0x7fff, -0x8000, 5, 7},
74 {0x7fffffff, -0x80000000, 7, 0},
75
76 /* calls relaxing. */
77 {0x7fff, -0x8000, 4, 9},
78 {0x7fffffff, -0x80000000, 6, 0},
79
80 /* jmp relaxing. */
81 {0x7f, -0x80, 2, 11},
82 {0x7fff, -0x8000, 3, 12},
83 {0x7fffffff, -0x80000000, 5, 0},
84
85 /* fbCC relaxing. */
86 {0x7f, -0x80, 3, 14},
87 {0x7fff + 3, -0x8000 + 3, 6, 15},
88 {0x7fffffff, -0x80000000, 8, 0},
89
90 };
91
92 /* Set linkrelax here to avoid fixups in most sections. */
93 int linkrelax = 1;
94
95 static int current_machine;
96
97 /* Fixups. */
98 #define MAX_INSN_FIXUPS 5
99
100 struct mn10300_fixup
101 {
102 expressionS exp;
103 int opindex;
104 bfd_reloc_code_real_type reloc;
105 };
106 struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
107 static int fc;
108
109 /* We must store the value of each register operand so that we can
110 verify that certain registers do not match. */
111 int mn10300_reg_operands[MN10300_MAX_OPERANDS];
112 \f
113 const char *md_shortopts = "";
114
115 struct option md_longopts[] =
116 {
117 {NULL, no_argument, NULL, 0}
118 };
119
120 size_t md_longopts_size = sizeof (md_longopts);
121
122 #define HAVE_AM33_2 (current_machine == AM33_2)
123 #define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2)
124 #define HAVE_AM30 (current_machine == AM30)
125
126 /* Opcode hash table. */
127 static struct hash_control *mn10300_hash;
128
129 /* This table is sorted. Suitable for searching by a binary search. */
130 static const struct reg_name data_registers[] =
131 {
132 { "d0", 0 },
133 { "d1", 1 },
134 { "d2", 2 },
135 { "d3", 3 },
136 };
137
138 static const struct reg_name address_registers[] =
139 {
140 { "a0", 0 },
141 { "a1", 1 },
142 { "a2", 2 },
143 { "a3", 3 },
144 };
145
146 static const struct reg_name r_registers[] =
147 {
148 { "a0", 8 },
149 { "a1", 9 },
150 { "a2", 10 },
151 { "a3", 11 },
152 { "d0", 12 },
153 { "d1", 13 },
154 { "d2", 14 },
155 { "d3", 15 },
156 { "e0", 0 },
157 { "e1", 1 },
158 { "e10", 10 },
159 { "e11", 11 },
160 { "e12", 12 },
161 { "e13", 13 },
162 { "e14", 14 },
163 { "e15", 15 },
164 { "e2", 2 },
165 { "e3", 3 },
166 { "e4", 4 },
167 { "e5", 5 },
168 { "e6", 6 },
169 { "e7", 7 },
170 { "e8", 8 },
171 { "e9", 9 },
172 { "r0", 0 },
173 { "r1", 1 },
174 { "r10", 10 },
175 { "r11", 11 },
176 { "r12", 12 },
177 { "r13", 13 },
178 { "r14", 14 },
179 { "r15", 15 },
180 { "r2", 2 },
181 { "r3", 3 },
182 { "r4", 4 },
183 { "r5", 5 },
184 { "r6", 6 },
185 { "r7", 7 },
186 { "r8", 8 },
187 { "r9", 9 },
188 };
189
190 static const struct reg_name xr_registers[] =
191 {
192 { "mcrh", 2 },
193 { "mcrl", 3 },
194 { "mcvf", 4 },
195 { "mdrq", 1 },
196 { "sp", 0 },
197 { "xr0", 0 },
198 { "xr1", 1 },
199 { "xr10", 10 },
200 { "xr11", 11 },
201 { "xr12", 12 },
202 { "xr13", 13 },
203 { "xr14", 14 },
204 { "xr15", 15 },
205 { "xr2", 2 },
206 { "xr3", 3 },
207 { "xr4", 4 },
208 { "xr5", 5 },
209 { "xr6", 6 },
210 { "xr7", 7 },
211 { "xr8", 8 },
212 { "xr9", 9 },
213 };
214
215 static const struct reg_name float_registers[] =
216 {
217 { "fs0", 0 },
218 { "fs1", 1 },
219 { "fs10", 10 },
220 { "fs11", 11 },
221 { "fs12", 12 },
222 { "fs13", 13 },
223 { "fs14", 14 },
224 { "fs15", 15 },
225 { "fs16", 16 },
226 { "fs17", 17 },
227 { "fs18", 18 },
228 { "fs19", 19 },
229 { "fs2", 2 },
230 { "fs20", 20 },
231 { "fs21", 21 },
232 { "fs22", 22 },
233 { "fs23", 23 },
234 { "fs24", 24 },
235 { "fs25", 25 },
236 { "fs26", 26 },
237 { "fs27", 27 },
238 { "fs28", 28 },
239 { "fs29", 29 },
240 { "fs3", 3 },
241 { "fs30", 30 },
242 { "fs31", 31 },
243 { "fs4", 4 },
244 { "fs5", 5 },
245 { "fs6", 6 },
246 { "fs7", 7 },
247 { "fs8", 8 },
248 { "fs9", 9 },
249 };
250
251 static const struct reg_name double_registers[] =
252 {
253 { "fd0", 0 },
254 { "fd10", 10 },
255 { "fd12", 12 },
256 { "fd14", 14 },
257 { "fd16", 16 },
258 { "fd18", 18 },
259 { "fd2", 2 },
260 { "fd20", 20 },
261 { "fd22", 22 },
262 { "fd24", 24 },
263 { "fd26", 26 },
264 { "fd28", 28 },
265 { "fd30", 30 },
266 { "fd4", 4 },
267 { "fd6", 6 },
268 { "fd8", 8 },
269 };
270
271 /* We abuse the `value' field, that would be otherwise unused, to
272 encode the architecture on which (access to) the register was
273 introduced. FIXME: we should probably warn when we encounter a
274 register name when assembling for an architecture that doesn't
275 support it, before parsing it as a symbol name. */
276 static const struct reg_name other_registers[] =
277 {
278 { "epsw", AM33 },
279 { "mdr", 0 },
280 { "pc", AM33 },
281 { "psw", 0 },
282 { "sp", 0 },
283 { "ssp", 0 },
284 { "usp", 0 },
285 };
286
287 #define OTHER_REG_NAME_CNT ARRAY_SIZE (other_registers)
288
289 /* Perform a binary search of the given register table REGS to see
290 if NAME is a valid regiter name. Returns the register number from
291 the array on success, or -1 on failure. */
292
293 static int
294 reg_name_search (const struct reg_name *regs,
295 int regcount,
296 const char *name)
297 {
298 int low, high;
299
300 low = 0;
301 high = regcount - 1;
302
303 do
304 {
305 int cmp, middle;
306
307 middle = (low + high) / 2;
308 cmp = strcasecmp (name, regs[middle].name);
309 if (cmp < 0)
310 high = middle - 1;
311 else if (cmp > 0)
312 low = middle + 1;
313 else
314 return regs[middle].value;
315 }
316 while (low <= high);
317
318 return -1;
319 }
320
321 /* Looks at the current position in the input line to see if it is
322 the name of a register in TABLE. If it is, then the name is
323 converted into an expression returned in EXPRESSIONP (with X_op
324 set to O_register and X_add_number set to the register number), the
325 input pointer is left pointing at the first non-blank character after
326 the name and the function returns TRUE. Otherwise the input pointer
327 is left alone and the function returns FALSE. */
328
329 static bfd_boolean
330 get_register_name (expressionS * expressionP,
331 const struct reg_name * table,
332 size_t table_length)
333 {
334 int reg_number;
335 char *name;
336 char *start;
337 char c;
338
339 /* Find the spelling of the operand. */
340 start = input_line_pointer;
341
342 c = get_symbol_name (&name);
343 reg_number = reg_name_search (table, table_length, name);
344
345 /* Put back the delimiting char. */
346 (void) restore_line_pointer (c);
347
348 /* Look to see if it's in the register table. */
349 if (reg_number >= 0)
350 {
351 expressionP->X_op = O_register;
352 expressionP->X_add_number = reg_number;
353
354 /* Make the rest nice. */
355 expressionP->X_add_symbol = NULL;
356 expressionP->X_op_symbol = NULL;
357
358 return TRUE;
359 }
360
361 /* Reset the line as if we had not done anything. */
362 input_line_pointer = start;
363 return FALSE;
364 }
365
366 static bfd_boolean
367 r_register_name (expressionS *expressionP)
368 {
369 return get_register_name (expressionP, r_registers, ARRAY_SIZE (r_registers));
370 }
371
372
373 static bfd_boolean
374 xr_register_name (expressionS *expressionP)
375 {
376 return get_register_name (expressionP, xr_registers, ARRAY_SIZE (xr_registers));
377 }
378
379 static bfd_boolean
380 data_register_name (expressionS *expressionP)
381 {
382 return get_register_name (expressionP, data_registers, ARRAY_SIZE (data_registers));
383 }
384
385 static bfd_boolean
386 address_register_name (expressionS *expressionP)
387 {
388 return get_register_name (expressionP, address_registers, ARRAY_SIZE (address_registers));
389 }
390
391 static bfd_boolean
392 float_register_name (expressionS *expressionP)
393 {
394 return get_register_name (expressionP, float_registers, ARRAY_SIZE (float_registers));
395 }
396
397 static bfd_boolean
398 double_register_name (expressionS *expressionP)
399 {
400 return get_register_name (expressionP, double_registers, ARRAY_SIZE (double_registers));
401 }
402
403 static bfd_boolean
404 other_register_name (expressionS *expressionP)
405 {
406 int reg_number;
407 char *name;
408 char *start;
409 char c;
410
411 /* Find the spelling of the operand. */
412 start = input_line_pointer;
413
414 c = get_symbol_name (&name);
415 reg_number = reg_name_search (other_registers, ARRAY_SIZE (other_registers), name);
416
417 /* Put back the delimiting char. */
418 (void) restore_line_pointer (c);
419
420 /* Look to see if it's in the register table. */
421 if (reg_number == 0
422 || (reg_number == AM33 && HAVE_AM33))
423 {
424 expressionP->X_op = O_register;
425 expressionP->X_add_number = 0;
426
427 /* Make the rest nice. */
428 expressionP->X_add_symbol = NULL;
429 expressionP->X_op_symbol = NULL;
430
431 return TRUE;
432 }
433
434 /* Reset the line as if we had not done anything. */
435 input_line_pointer = start;
436 return FALSE;
437 }
438
439 void
440 md_show_usage (FILE *stream)
441 {
442 fprintf (stream, _("MN10300 assembler options:\n\
443 none yet\n"));
444 }
445
446 int
447 md_parse_option (int c ATTRIBUTE_UNUSED, char *arg ATTRIBUTE_UNUSED)
448 {
449 return 0;
450 }
451
452 symbolS *
453 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
454 {
455 return 0;
456 }
457
458 char *
459 md_atof (int type, char *litp, int *sizep)
460 {
461 return ieee_md_atof (type, litp, sizep, FALSE);
462 }
463
464 void
465 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
466 asection *sec,
467 fragS *fragP)
468 {
469 static unsigned long label_count = 0;
470 char buf[40];
471
472 subseg_change (sec, 0);
473 if (fragP->fr_subtype == 0)
474 {
475 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
476 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
477 fragP->fr_var = 0;
478 fragP->fr_fix += 2;
479 }
480 else if (fragP->fr_subtype == 1)
481 {
482 /* Reverse the condition of the first branch. */
483 int offset = fragP->fr_fix;
484 int opcode = fragP->fr_literal[offset] & 0xff;
485
486 switch (opcode)
487 {
488 case 0xc8:
489 opcode = 0xc9;
490 break;
491 case 0xc9:
492 opcode = 0xc8;
493 break;
494 case 0xc0:
495 opcode = 0xc2;
496 break;
497 case 0xc2:
498 opcode = 0xc0;
499 break;
500 case 0xc3:
501 opcode = 0xc1;
502 break;
503 case 0xc1:
504 opcode = 0xc3;
505 break;
506 case 0xc4:
507 opcode = 0xc6;
508 break;
509 case 0xc6:
510 opcode = 0xc4;
511 break;
512 case 0xc7:
513 opcode = 0xc5;
514 break;
515 case 0xc5:
516 opcode = 0xc7;
517 break;
518 default:
519 abort ();
520 }
521 fragP->fr_literal[offset] = opcode;
522
523 /* Create a fixup for the reversed conditional branch. */
524 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
525 fix_new (fragP, fragP->fr_fix + 1, 1,
526 symbol_new (buf, sec, 0, fragP->fr_next),
527 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
528
529 /* Now create the unconditional branch + fixup to the
530 final target. */
531 fragP->fr_literal[offset + 2] = 0xcc;
532 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
533 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
534 fragP->fr_var = 0;
535 fragP->fr_fix += 5;
536 }
537 else if (fragP->fr_subtype == 2)
538 {
539 /* Reverse the condition of the first branch. */
540 int offset = fragP->fr_fix;
541 int opcode = fragP->fr_literal[offset] & 0xff;
542
543 switch (opcode)
544 {
545 case 0xc8:
546 opcode = 0xc9;
547 break;
548 case 0xc9:
549 opcode = 0xc8;
550 break;
551 case 0xc0:
552 opcode = 0xc2;
553 break;
554 case 0xc2:
555 opcode = 0xc0;
556 break;
557 case 0xc3:
558 opcode = 0xc1;
559 break;
560 case 0xc1:
561 opcode = 0xc3;
562 break;
563 case 0xc4:
564 opcode = 0xc6;
565 break;
566 case 0xc6:
567 opcode = 0xc4;
568 break;
569 case 0xc7:
570 opcode = 0xc5;
571 break;
572 case 0xc5:
573 opcode = 0xc7;
574 break;
575 default:
576 abort ();
577 }
578 fragP->fr_literal[offset] = opcode;
579
580 /* Create a fixup for the reversed conditional branch. */
581 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
582 fix_new (fragP, fragP->fr_fix + 1, 1,
583 symbol_new (buf, sec, 0, fragP->fr_next),
584 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
585
586 /* Now create the unconditional branch + fixup to the
587 final target. */
588 fragP->fr_literal[offset + 2] = 0xdc;
589 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
590 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
591 fragP->fr_var = 0;
592 fragP->fr_fix += 7;
593 }
594 else if (fragP->fr_subtype == 3)
595 {
596 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
597 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
598 fragP->fr_var = 0;
599 fragP->fr_fix += 3;
600 }
601 else if (fragP->fr_subtype == 4)
602 {
603 /* Reverse the condition of the first branch. */
604 int offset = fragP->fr_fix;
605 int opcode = fragP->fr_literal[offset + 1] & 0xff;
606
607 switch (opcode)
608 {
609 case 0xe8:
610 opcode = 0xe9;
611 break;
612 case 0xe9:
613 opcode = 0xe8;
614 break;
615 case 0xea:
616 opcode = 0xeb;
617 break;
618 case 0xeb:
619 opcode = 0xea;
620 break;
621 default:
622 abort ();
623 }
624 fragP->fr_literal[offset + 1] = opcode;
625
626 /* Create a fixup for the reversed conditional branch. */
627 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
628 fix_new (fragP, fragP->fr_fix + 2, 1,
629 symbol_new (buf, sec, 0, fragP->fr_next),
630 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
631
632 /* Now create the unconditional branch + fixup to the
633 final target. */
634 fragP->fr_literal[offset + 3] = 0xcc;
635 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
636 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
637 fragP->fr_var = 0;
638 fragP->fr_fix += 6;
639 }
640 else if (fragP->fr_subtype == 5)
641 {
642 /* Reverse the condition of the first branch. */
643 int offset = fragP->fr_fix;
644 int opcode = fragP->fr_literal[offset + 1] & 0xff;
645
646 switch (opcode)
647 {
648 case 0xe8:
649 opcode = 0xe9;
650 break;
651 case 0xea:
652 opcode = 0xeb;
653 break;
654 case 0xeb:
655 opcode = 0xea;
656 break;
657 default:
658 abort ();
659 }
660 fragP->fr_literal[offset + 1] = opcode;
661
662 /* Create a fixup for the reversed conditional branch. */
663 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
664 fix_new (fragP, fragP->fr_fix + 2, 1,
665 symbol_new (buf, sec, 0, fragP->fr_next),
666 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
667
668 /* Now create the unconditional branch + fixup to the
669 final target. */
670 fragP->fr_literal[offset + 3] = 0xdc;
671 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
672 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
673 fragP->fr_var = 0;
674 fragP->fr_fix += 8;
675 }
676 else if (fragP->fr_subtype == 6)
677 {
678 int offset = fragP->fr_fix;
679
680 fragP->fr_literal[offset] = 0xcd;
681 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
682 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
683 fragP->fr_var = 0;
684 fragP->fr_fix += 5;
685 }
686 else if (fragP->fr_subtype == 7)
687 {
688 int offset = fragP->fr_fix;
689
690 fragP->fr_literal[offset] = 0xdd;
691 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
692 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
693 fragP->fr_literal[offset + 3] = 0;
694 fragP->fr_literal[offset + 4] = 0;
695
696 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
697 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
698 fragP->fr_var = 0;
699 fragP->fr_fix += 7;
700 }
701 else if (fragP->fr_subtype == 8)
702 {
703 int offset = fragP->fr_fix;
704
705 fragP->fr_literal[offset] = 0xfa;
706 fragP->fr_literal[offset + 1] = 0xff;
707 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
708 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
709 fragP->fr_var = 0;
710 fragP->fr_fix += 4;
711 }
712 else if (fragP->fr_subtype == 9)
713 {
714 int offset = fragP->fr_fix;
715
716 fragP->fr_literal[offset] = 0xfc;
717 fragP->fr_literal[offset + 1] = 0xff;
718
719 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
720 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
721 fragP->fr_var = 0;
722 fragP->fr_fix += 6;
723 }
724 else if (fragP->fr_subtype == 10)
725 {
726 fragP->fr_literal[fragP->fr_fix] = 0xca;
727 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
728 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
729 fragP->fr_var = 0;
730 fragP->fr_fix += 2;
731 }
732 else if (fragP->fr_subtype == 11)
733 {
734 int offset = fragP->fr_fix;
735
736 fragP->fr_literal[offset] = 0xcc;
737
738 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
739 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
740 fragP->fr_var = 0;
741 fragP->fr_fix += 3;
742 }
743 else if (fragP->fr_subtype == 12)
744 {
745 int offset = fragP->fr_fix;
746
747 fragP->fr_literal[offset] = 0xdc;
748
749 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
750 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
751 fragP->fr_var = 0;
752 fragP->fr_fix += 5;
753 }
754 else if (fragP->fr_subtype == 13)
755 {
756 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
757 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
758 fragP->fr_var = 0;
759 fragP->fr_fix += 3;
760 }
761 else if (fragP->fr_subtype == 14)
762 {
763 /* Reverse the condition of the first branch. */
764 int offset = fragP->fr_fix;
765 int opcode = fragP->fr_literal[offset + 1] & 0xff;
766
767 switch (opcode)
768 {
769 case 0xd0:
770 opcode = 0xd1;
771 break;
772 case 0xd1:
773 opcode = 0xd0;
774 break;
775 case 0xd2:
776 opcode = 0xdc;
777 break;
778 case 0xd3:
779 opcode = 0xdb;
780 break;
781 case 0xd4:
782 opcode = 0xda;
783 break;
784 case 0xd5:
785 opcode = 0xd9;
786 break;
787 case 0xd6:
788 opcode = 0xd8;
789 break;
790 case 0xd7:
791 opcode = 0xdd;
792 break;
793 case 0xd8:
794 opcode = 0xd6;
795 break;
796 case 0xd9:
797 opcode = 0xd5;
798 break;
799 case 0xda:
800 opcode = 0xd4;
801 break;
802 case 0xdb:
803 opcode = 0xd3;
804 break;
805 case 0xdc:
806 opcode = 0xd2;
807 break;
808 case 0xdd:
809 opcode = 0xd7;
810 break;
811 default:
812 abort ();
813 }
814 fragP->fr_literal[offset + 1] = opcode;
815
816 /* Create a fixup for the reversed conditional branch. */
817 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
818 fix_new (fragP, fragP->fr_fix + 2, 1,
819 symbol_new (buf, sec, 0, fragP->fr_next),
820 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
821
822 /* Now create the unconditional branch + fixup to the
823 final target. */
824 fragP->fr_literal[offset + 3] = 0xcc;
825 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
826 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
827 fragP->fr_var = 0;
828 fragP->fr_fix += 6;
829 }
830 else if (fragP->fr_subtype == 15)
831 {
832 /* Reverse the condition of the first branch. */
833 int offset = fragP->fr_fix;
834 int opcode = fragP->fr_literal[offset + 1] & 0xff;
835
836 switch (opcode)
837 {
838 case 0xd0:
839 opcode = 0xd1;
840 break;
841 case 0xd1:
842 opcode = 0xd0;
843 break;
844 case 0xd2:
845 opcode = 0xdc;
846 break;
847 case 0xd3:
848 opcode = 0xdb;
849 break;
850 case 0xd4:
851 opcode = 0xda;
852 break;
853 case 0xd5:
854 opcode = 0xd9;
855 break;
856 case 0xd6:
857 opcode = 0xd8;
858 break;
859 case 0xd7:
860 opcode = 0xdd;
861 break;
862 case 0xd8:
863 opcode = 0xd6;
864 break;
865 case 0xd9:
866 opcode = 0xd5;
867 break;
868 case 0xda:
869 opcode = 0xd4;
870 break;
871 case 0xdb:
872 opcode = 0xd3;
873 break;
874 case 0xdc:
875 opcode = 0xd2;
876 break;
877 case 0xdd:
878 opcode = 0xd7;
879 break;
880 default:
881 abort ();
882 }
883 fragP->fr_literal[offset + 1] = opcode;
884
885 /* Create a fixup for the reversed conditional branch. */
886 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
887 fix_new (fragP, fragP->fr_fix + 2, 1,
888 symbol_new (buf, sec, 0, fragP->fr_next),
889 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
890
891 /* Now create the unconditional branch + fixup to the
892 final target. */
893 fragP->fr_literal[offset + 3] = 0xdc;
894 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
895 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
896 fragP->fr_var = 0;
897 fragP->fr_fix += 8;
898 }
899 else
900 abort ();
901 }
902
903 valueT
904 md_section_align (asection *seg, valueT addr)
905 {
906 int align = bfd_get_section_alignment (stdoutput, seg);
907
908 return ((addr + (1 << align) - 1) & (-1 << align));
909 }
910
911 void
912 md_begin (void)
913 {
914 char *prev_name = "";
915 const struct mn10300_opcode *op;
916
917 mn10300_hash = hash_new ();
918
919 /* Insert unique names into hash table. The MN10300 instruction set
920 has many identical opcode names that have different opcodes based
921 on the operands. This hash table then provides a quick index to
922 the first opcode with a particular name in the opcode table. */
923
924 op = mn10300_opcodes;
925 while (op->name)
926 {
927 if (strcmp (prev_name, op->name))
928 {
929 prev_name = (char *) op->name;
930 hash_insert (mn10300_hash, op->name, (char *) op);
931 }
932 op++;
933 }
934
935 /* Set the default machine type. */
936 #ifdef TE_LINUX
937 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, AM33_2))
938 as_warn (_("could not set architecture and machine"));
939
940 current_machine = AM33_2;
941 #else
942 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
943 as_warn (_("could not set architecture and machine"));
944
945 current_machine = MN103;
946 #endif
947 }
948
949 static symbolS *GOT_symbol;
950
951 static inline int
952 mn10300_PIC_related_p (symbolS *sym)
953 {
954 expressionS *exp;
955
956 if (! sym)
957 return 0;
958
959 if (sym == GOT_symbol)
960 return 1;
961
962 exp = symbol_get_value_expression (sym);
963
964 return (exp->X_op == O_PIC_reloc
965 || mn10300_PIC_related_p (exp->X_add_symbol)
966 || mn10300_PIC_related_p (exp->X_op_symbol));
967 }
968
969 static inline int
970 mn10300_check_fixup (struct mn10300_fixup *fixup)
971 {
972 expressionS *exp = &fixup->exp;
973
974 repeat:
975 switch (exp->X_op)
976 {
977 case O_add:
978 case O_subtract: /* If we're sufficiently unlucky that the label
979 and the expression that references it happen
980 to end up in different frags, the subtract
981 won't be simplified within expression(). */
982 /* The PIC-related operand must be the first operand of a sum. */
983 if (exp != &fixup->exp || mn10300_PIC_related_p (exp->X_op_symbol))
984 return 1;
985
986 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
987 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
988
989 exp = symbol_get_value_expression (exp->X_add_symbol);
990 goto repeat;
991
992 case O_symbol:
993 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
994 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
995 break;
996
997 case O_PIC_reloc:
998 fixup->reloc = exp->X_md;
999 exp->X_op = O_symbol;
1000 if (fixup->reloc == BFD_RELOC_32_PLT_PCREL
1001 && fixup->opindex >= 0
1002 && (mn10300_operands[fixup->opindex].flags
1003 & MN10300_OPERAND_RELAX))
1004 return 1;
1005 break;
1006
1007 default:
1008 return (mn10300_PIC_related_p (exp->X_add_symbol)
1009 || mn10300_PIC_related_p (exp->X_op_symbol));
1010 }
1011
1012 return 0;
1013 }
1014
1015 void
1016 mn10300_cons_fix_new (fragS *frag, int off, int size, expressionS *exp,
1017 bfd_reloc_code_real_type r ATTRIBUTE_UNUSED)
1018 {
1019 struct mn10300_fixup fixup;
1020
1021 fixup.opindex = -1;
1022 fixup.exp = *exp;
1023 fixup.reloc = BFD_RELOC_UNUSED;
1024
1025 mn10300_check_fixup (&fixup);
1026
1027 if (fixup.reloc == BFD_RELOC_MN10300_GOT32)
1028 switch (size)
1029 {
1030 case 2:
1031 fixup.reloc = BFD_RELOC_MN10300_GOT16;
1032 break;
1033
1034 case 3:
1035 fixup.reloc = BFD_RELOC_MN10300_GOT24;
1036 break;
1037
1038 case 4:
1039 break;
1040
1041 default:
1042 goto error;
1043 }
1044 else if (fixup.reloc == BFD_RELOC_UNUSED)
1045 switch (size)
1046 {
1047 case 1:
1048 fixup.reloc = BFD_RELOC_8;
1049 break;
1050
1051 case 2:
1052 fixup.reloc = BFD_RELOC_16;
1053 break;
1054
1055 case 3:
1056 fixup.reloc = BFD_RELOC_24;
1057 break;
1058
1059 case 4:
1060 fixup.reloc = BFD_RELOC_32;
1061 break;
1062
1063 default:
1064 goto error;
1065 }
1066 else if (size != 4)
1067 {
1068 error:
1069 as_bad (_("unsupported BFD relocation size %u"), size);
1070 fixup.reloc = BFD_RELOC_UNUSED;
1071 }
1072
1073 fix_new_exp (frag, off, size, &fixup.exp, 0, fixup.reloc);
1074 }
1075
1076 static bfd_boolean
1077 check_operand (const struct mn10300_operand *operand,
1078 offsetT val)
1079 {
1080 /* No need to check 32bit operands for a bit. Note that
1081 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1082 if (operand->bits != 32
1083 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1084 {
1085 long min, max;
1086 offsetT test;
1087 int bits;
1088
1089 bits = operand->bits;
1090 if (operand->flags & MN10300_OPERAND_24BIT)
1091 bits = 24;
1092
1093 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1094 {
1095 max = (1 << (bits - 1)) - 1;
1096 min = - (1 << (bits - 1));
1097 }
1098 else
1099 {
1100 max = (1 << bits) - 1;
1101 min = 0;
1102 }
1103
1104 test = val;
1105
1106 if (test < (offsetT) min || test > (offsetT) max)
1107 return FALSE;
1108 }
1109 return TRUE;
1110 }
1111
1112 /* Insert an operand value into an instruction. */
1113
1114 static void
1115 mn10300_insert_operand (unsigned long *insnp,
1116 unsigned long *extensionp,
1117 const struct mn10300_operand *operand,
1118 offsetT val,
1119 char *file,
1120 unsigned int line,
1121 unsigned int shift)
1122 {
1123 /* No need to check 32bit operands for a bit. Note that
1124 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1125 if (operand->bits != 32
1126 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1127 {
1128 long min, max;
1129 offsetT test;
1130 int bits;
1131
1132 bits = operand->bits;
1133 if (operand->flags & MN10300_OPERAND_24BIT)
1134 bits = 24;
1135
1136 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1137 {
1138 max = (1 << (bits - 1)) - 1;
1139 min = - (1 << (bits - 1));
1140 }
1141 else
1142 {
1143 max = (1 << bits) - 1;
1144 min = 0;
1145 }
1146
1147 test = val;
1148
1149 if (test < (offsetT) min || test > (offsetT) max)
1150 as_warn_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
1151 }
1152
1153 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1154 {
1155 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
1156 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
1157 << operand->shift);
1158 }
1159 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1160 {
1161 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
1162 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
1163 << operand->shift);
1164 }
1165 else if ((operand->flags & (MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG)))
1166 {
1167 /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an
1168 explanation of these variables. Note that FMT-implied shifts
1169 are not taken into account for FP registers. */
1170 unsigned long mask_low, mask_high;
1171 int shl_low, shr_high, shl_high;
1172
1173 switch (operand->bits)
1174 {
1175 case 5:
1176 /* Handle regular FP registers. */
1177 if (operand->shift >= 0)
1178 {
1179 /* This is an `m' register. */
1180 shl_low = operand->shift;
1181 shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4;
1182 }
1183 else
1184 {
1185 /* This is an `n' register. */
1186 shl_low = -operand->shift;
1187 shl_high = shl_low / 4;
1188 }
1189
1190 mask_low = 0x0f;
1191 mask_high = 0x10;
1192 shr_high = 4;
1193 break;
1194
1195 case 3:
1196 /* Handle accumulators. */
1197 shl_low = -operand->shift;
1198 shl_high = 0;
1199 mask_low = 0x03;
1200 mask_high = 0x04;
1201 shr_high = 2;
1202 break;
1203
1204 default:
1205 abort ();
1206 }
1207 *insnp |= ((((val & mask_high) >> shr_high) << shl_high)
1208 | ((val & mask_low) << shl_low));
1209 }
1210 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
1211 {
1212 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1213 << (operand->shift + shift));
1214
1215 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1216 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1217 << (operand->shift + shift + operand->bits));
1218 }
1219 else
1220 {
1221 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1222 << (operand->shift + shift));
1223
1224 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1225 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1226 << (operand->shift + shift + operand->bits));
1227 }
1228 }
1229
1230 void
1231 md_assemble (char *str)
1232 {
1233 char *s;
1234 struct mn10300_opcode *opcode;
1235 struct mn10300_opcode *next_opcode;
1236 const unsigned char *opindex_ptr;
1237 int next_opindex, relaxable;
1238 unsigned long insn, extension, size = 0;
1239 char *f;
1240 int i;
1241 int match;
1242
1243 /* Get the opcode. */
1244 for (s = str; *s != '\0' && !ISSPACE (*s); s++)
1245 ;
1246 if (*s != '\0')
1247 *s++ = '\0';
1248
1249 /* Find the first opcode with the proper name. */
1250 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
1251 if (opcode == NULL)
1252 {
1253 as_bad (_("Unrecognized opcode: `%s'"), str);
1254 return;
1255 }
1256
1257 str = s;
1258 while (ISSPACE (*str))
1259 ++str;
1260
1261 input_line_pointer = str;
1262
1263 for (;;)
1264 {
1265 const char *errmsg;
1266 int op_idx;
1267 char *hold;
1268 int extra_shift = 0;
1269
1270 errmsg = _("Invalid opcode/operands");
1271
1272 /* Reset the array of register operands. */
1273 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
1274
1275 relaxable = 0;
1276 fc = 0;
1277 match = 0;
1278 next_opindex = 0;
1279 insn = opcode->opcode;
1280 extension = 0;
1281
1282 /* If the instruction is not available on the current machine
1283 then it can not possibly match. */
1284 if (opcode->machine
1285 && !(opcode->machine == AM33_2 && HAVE_AM33_2)
1286 && !(opcode->machine == AM33 && HAVE_AM33)
1287 && !(opcode->machine == AM30 && HAVE_AM30))
1288 goto error;
1289
1290 for (op_idx = 1, opindex_ptr = opcode->operands;
1291 *opindex_ptr != 0;
1292 opindex_ptr++, op_idx++)
1293 {
1294 const struct mn10300_operand *operand;
1295 expressionS ex;
1296
1297 if (next_opindex == 0)
1298 {
1299 operand = &mn10300_operands[*opindex_ptr];
1300 }
1301 else
1302 {
1303 operand = &mn10300_operands[next_opindex];
1304 next_opindex = 0;
1305 }
1306
1307 while (*str == ' ' || *str == ',')
1308 ++str;
1309
1310 if (operand->flags & MN10300_OPERAND_RELAX)
1311 relaxable = 1;
1312
1313 /* Gather the operand. */
1314 hold = input_line_pointer;
1315 input_line_pointer = str;
1316
1317 if (operand->flags & MN10300_OPERAND_PAREN)
1318 {
1319 if (*input_line_pointer != ')' && *input_line_pointer != '(')
1320 {
1321 input_line_pointer = hold;
1322 str = hold;
1323 goto error;
1324 }
1325 input_line_pointer++;
1326 goto keep_going;
1327 }
1328 /* See if we can match the operands. */
1329 else if (operand->flags & MN10300_OPERAND_DREG)
1330 {
1331 if (!data_register_name (&ex))
1332 {
1333 input_line_pointer = hold;
1334 str = hold;
1335 goto error;
1336 }
1337 }
1338 else if (operand->flags & MN10300_OPERAND_AREG)
1339 {
1340 if (!address_register_name (&ex))
1341 {
1342 input_line_pointer = hold;
1343 str = hold;
1344 goto error;
1345 }
1346 }
1347 else if (operand->flags & MN10300_OPERAND_SP)
1348 {
1349 char *start;
1350 char c = get_symbol_name (&start);
1351
1352 if (strcasecmp (start, "sp") != 0)
1353 {
1354 (void) restore_line_pointer (c);
1355 input_line_pointer = hold;
1356 str = hold;
1357 goto error;
1358 }
1359 (void) restore_line_pointer (c);
1360 goto keep_going;
1361 }
1362 else if (operand->flags & MN10300_OPERAND_RREG)
1363 {
1364 if (!r_register_name (&ex))
1365 {
1366 input_line_pointer = hold;
1367 str = hold;
1368 goto error;
1369 }
1370 }
1371 else if (operand->flags & MN10300_OPERAND_XRREG)
1372 {
1373 if (!xr_register_name (&ex))
1374 {
1375 input_line_pointer = hold;
1376 str = hold;
1377 goto error;
1378 }
1379 }
1380 else if (operand->flags & MN10300_OPERAND_FSREG)
1381 {
1382 if (!float_register_name (&ex))
1383 {
1384 input_line_pointer = hold;
1385 str = hold;
1386 goto error;
1387 }
1388 }
1389 else if (operand->flags & MN10300_OPERAND_FDREG)
1390 {
1391 if (!double_register_name (&ex))
1392 {
1393 input_line_pointer = hold;
1394 str = hold;
1395 goto error;
1396 }
1397 }
1398 else if (operand->flags & MN10300_OPERAND_FPCR)
1399 {
1400 char *start;
1401 char c = get_symbol_name (&start);
1402
1403 if (strcasecmp (start, "fpcr") != 0)
1404 {
1405 (void) restore_line_pointer (c);
1406 input_line_pointer = hold;
1407 str = hold;
1408 goto error;
1409 }
1410 (void) restore_line_pointer (c);
1411 goto keep_going;
1412 }
1413 else if (operand->flags & MN10300_OPERAND_USP)
1414 {
1415 char *start;
1416 char c = get_symbol_name (&start);
1417
1418 if (strcasecmp (start, "usp") != 0)
1419 {
1420 (void) restore_line_pointer (c);
1421 *input_line_pointer = c;
1422 input_line_pointer = hold;
1423 str = hold;
1424 goto error;
1425 }
1426 (void) restore_line_pointer (c);
1427 *input_line_pointer = c;
1428 goto keep_going;
1429 }
1430 else if (operand->flags & MN10300_OPERAND_SSP)
1431 {
1432 char *start;
1433 char c = get_symbol_name (&start);
1434
1435 if (strcasecmp (start, "ssp") != 0)
1436 {
1437 (void) restore_line_pointer (c);
1438 input_line_pointer = hold;
1439 str = hold;
1440 goto error;
1441 }
1442 (void) restore_line_pointer (c);
1443 goto keep_going;
1444 }
1445 else if (operand->flags & MN10300_OPERAND_MSP)
1446 {
1447 char *start;
1448 char c = get_symbol_name (&start);
1449
1450 if (strcasecmp (start, "msp") != 0)
1451 {
1452 (void) restore_line_pointer (c);
1453 input_line_pointer = hold;
1454 str = hold;
1455 goto error;
1456 }
1457 (void) restore_line_pointer (c);
1458 goto keep_going;
1459 }
1460 else if (operand->flags & MN10300_OPERAND_PC)
1461 {
1462 char *start;
1463 char c = get_symbol_name (&start);
1464
1465 if (strcasecmp (start, "pc") != 0)
1466 {
1467 (void) restore_line_pointer (c);
1468 input_line_pointer = hold;
1469 str = hold;
1470 goto error;
1471 }
1472 (void) restore_line_pointer (c);
1473 goto keep_going;
1474 }
1475 else if (operand->flags & MN10300_OPERAND_EPSW)
1476 {
1477 char *start;
1478 char c = get_symbol_name (&start);
1479
1480 if (strcasecmp (start, "epsw") != 0)
1481 {
1482 (void) restore_line_pointer (c);
1483 input_line_pointer = hold;
1484 str = hold;
1485 goto error;
1486 }
1487 (void) restore_line_pointer (c);
1488 goto keep_going;
1489 }
1490 else if (operand->flags & MN10300_OPERAND_PLUS)
1491 {
1492 if (*input_line_pointer != '+')
1493 {
1494 input_line_pointer = hold;
1495 str = hold;
1496 goto error;
1497 }
1498 input_line_pointer++;
1499 goto keep_going;
1500 }
1501 else if (operand->flags & MN10300_OPERAND_PSW)
1502 {
1503 char *start;
1504 char c = get_symbol_name (&start);
1505
1506 if (strcasecmp (start, "psw") != 0)
1507 {
1508 (void) restore_line_pointer (c);
1509 input_line_pointer = hold;
1510 str = hold;
1511 goto error;
1512 }
1513 (void) restore_line_pointer (c);
1514 goto keep_going;
1515 }
1516 else if (operand->flags & MN10300_OPERAND_MDR)
1517 {
1518 char *start;
1519 char c = get_symbol_name (&start);
1520
1521 if (strcasecmp (start, "mdr") != 0)
1522 {
1523 (void) restore_line_pointer (c);
1524 input_line_pointer = hold;
1525 str = hold;
1526 goto error;
1527 }
1528 (void) restore_line_pointer (c);
1529 goto keep_going;
1530 }
1531 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1532 {
1533 unsigned int value = 0;
1534 if (*input_line_pointer != '[')
1535 {
1536 input_line_pointer = hold;
1537 str = hold;
1538 goto error;
1539 }
1540
1541 /* Eat the '['. */
1542 input_line_pointer++;
1543
1544 /* We used to reject a null register list here; however,
1545 we accept it now so the compiler can emit "call"
1546 instructions for all calls to named functions.
1547
1548 The linker can then fill in the appropriate bits for the
1549 register list and stack size or change the instruction
1550 into a "calls" if using "call" is not profitable. */
1551 while (*input_line_pointer != ']')
1552 {
1553 char *start;
1554 char c;
1555
1556 if (*input_line_pointer == ',')
1557 input_line_pointer++;
1558
1559 c = get_symbol_name (&start);
1560
1561 if (strcasecmp (start, "d2") == 0)
1562 {
1563 value |= 0x80;
1564 (void) restore_line_pointer (c);
1565 }
1566 else if (strcasecmp (start, "d3") == 0)
1567 {
1568 value |= 0x40;
1569 (void) restore_line_pointer (c);
1570 }
1571 else if (strcasecmp (start, "a2") == 0)
1572 {
1573 value |= 0x20;
1574 (void) restore_line_pointer (c);
1575 }
1576 else if (strcasecmp (start, "a3") == 0)
1577 {
1578 value |= 0x10;
1579 (void) restore_line_pointer (c);
1580 }
1581 else if (strcasecmp (start, "other") == 0)
1582 {
1583 value |= 0x08;
1584 (void) restore_line_pointer (c);
1585 }
1586 else if (HAVE_AM33
1587 && strcasecmp (start, "exreg0") == 0)
1588 {
1589 value |= 0x04;
1590 (void) restore_line_pointer (c);
1591 }
1592 else if (HAVE_AM33
1593 && strcasecmp (start, "exreg1") == 0)
1594 {
1595 value |= 0x02;
1596 (void) restore_line_pointer (c);
1597 }
1598 else if (HAVE_AM33
1599 && strcasecmp (start, "exother") == 0)
1600 {
1601 value |= 0x01;
1602 (void) restore_line_pointer (c);
1603 }
1604 else if (HAVE_AM33
1605 && strcasecmp (start, "all") == 0)
1606 {
1607 value |= 0xff;
1608 (void) restore_line_pointer (c);
1609 }
1610 else
1611 {
1612 input_line_pointer = hold;
1613 str = hold;
1614 goto error;
1615 }
1616 }
1617 input_line_pointer++;
1618 mn10300_insert_operand (& insn, & extension, operand,
1619 value, NULL, 0, 0);
1620 goto keep_going;
1621
1622 }
1623 else if (data_register_name (&ex))
1624 {
1625 input_line_pointer = hold;
1626 str = hold;
1627 goto error;
1628 }
1629 else if (address_register_name (&ex))
1630 {
1631 input_line_pointer = hold;
1632 str = hold;
1633 goto error;
1634 }
1635 else if (other_register_name (&ex))
1636 {
1637 input_line_pointer = hold;
1638 str = hold;
1639 goto error;
1640 }
1641 else if (HAVE_AM33 && r_register_name (&ex))
1642 {
1643 input_line_pointer = hold;
1644 str = hold;
1645 goto error;
1646 }
1647 else if (HAVE_AM33 && xr_register_name (&ex))
1648 {
1649 input_line_pointer = hold;
1650 str = hold;
1651 goto error;
1652 }
1653 else if (HAVE_AM33_2 && float_register_name (&ex))
1654 {
1655 input_line_pointer = hold;
1656 str = hold;
1657 goto error;
1658 }
1659 else if (HAVE_AM33_2 && double_register_name (&ex))
1660 {
1661 input_line_pointer = hold;
1662 str = hold;
1663 goto error;
1664 }
1665 else if (*str == ')' || *str == '(')
1666 {
1667 input_line_pointer = hold;
1668 str = hold;
1669 goto error;
1670 }
1671 else
1672 {
1673 expression (&ex);
1674 }
1675
1676 switch (ex.X_op)
1677 {
1678 case O_illegal:
1679 errmsg = _("illegal operand");
1680 goto error;
1681 case O_absent:
1682 errmsg = _("missing operand");
1683 goto error;
1684 case O_register:
1685 {
1686 int mask;
1687
1688 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
1689 if (HAVE_AM33)
1690 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
1691 if (HAVE_AM33_2)
1692 mask |= MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG;
1693 if ((operand->flags & mask) == 0)
1694 {
1695 input_line_pointer = hold;
1696 str = hold;
1697 goto error;
1698 }
1699
1700 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1701 extra_shift = 8;
1702 else if (opcode->format == FMT_D2
1703 || opcode->format == FMT_D4
1704 || opcode->format == FMT_S2
1705 || opcode->format == FMT_S4
1706 || opcode->format == FMT_S6
1707 || opcode->format == FMT_D5)
1708 extra_shift = 16;
1709 else if (opcode->format == FMT_D7)
1710 extra_shift = 8;
1711 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1712 extra_shift = 8;
1713 else
1714 extra_shift = 0;
1715
1716 mn10300_insert_operand (& insn, & extension, operand,
1717 ex.X_add_number, NULL,
1718 0, extra_shift);
1719
1720 /* And note the register number in the register array. */
1721 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1722 break;
1723 }
1724
1725 case O_constant:
1726 /* If this operand can be promoted, and it doesn't
1727 fit into the allocated bitfield for this insn,
1728 then promote it (ie this opcode does not match). */
1729 if (operand->flags
1730 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
1731 && !check_operand (operand, ex.X_add_number))
1732 {
1733 input_line_pointer = hold;
1734 str = hold;
1735 goto error;
1736 }
1737
1738 mn10300_insert_operand (& insn, & extension, operand,
1739 ex.X_add_number, NULL, 0, 0);
1740 break;
1741
1742 default:
1743 /* If this operand can be promoted, then this opcode didn't
1744 match since we can't know if it needed promotion! */
1745 if (operand->flags & MN10300_OPERAND_PROMOTE)
1746 {
1747 input_line_pointer = hold;
1748 str = hold;
1749 goto error;
1750 }
1751
1752 /* We need to generate a fixup for this expression. */
1753 if (fc >= MAX_INSN_FIXUPS)
1754 as_fatal (_("too many fixups"));
1755 fixups[fc].exp = ex;
1756 fixups[fc].opindex = *opindex_ptr;
1757 fixups[fc].reloc = BFD_RELOC_UNUSED;
1758 if (mn10300_check_fixup (& fixups[fc]))
1759 goto error;
1760 ++fc;
1761 break;
1762 }
1763
1764 keep_going:
1765 str = input_line_pointer;
1766 input_line_pointer = hold;
1767
1768 while (*str == ' ' || *str == ',')
1769 ++str;
1770 }
1771
1772 /* Make sure we used all the operands! */
1773 if (*str != ',')
1774 match = 1;
1775
1776 /* If this instruction has registers that must not match, verify
1777 that they do indeed not match. */
1778 if (opcode->no_match_operands)
1779 {
1780 /* Look at each operand to see if it's marked. */
1781 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1782 {
1783 if ((1 << i) & opcode->no_match_operands)
1784 {
1785 int j;
1786
1787 /* operand I is marked. Check that it does not match any
1788 operands > I which are marked. */
1789 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1790 {
1791 if (((1 << j) & opcode->no_match_operands)
1792 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1793 {
1794 errmsg = _("Invalid register specification.");
1795 match = 0;
1796 goto error;
1797 }
1798 }
1799 }
1800 }
1801 }
1802
1803 error:
1804 if (match == 0)
1805 {
1806 next_opcode = opcode + 1;
1807 if (!strcmp (next_opcode->name, opcode->name))
1808 {
1809 opcode = next_opcode;
1810 continue;
1811 }
1812
1813 as_bad ("%s", errmsg);
1814 return;
1815 }
1816 break;
1817 }
1818
1819 while (ISSPACE (*str))
1820 ++str;
1821
1822 if (*str != '\0')
1823 as_bad (_("junk at end of line: `%s'"), str);
1824
1825 input_line_pointer = str;
1826
1827 /* Determine the size of the instruction. */
1828 if (opcode->format == FMT_S0)
1829 size = 1;
1830
1831 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1832 size = 2;
1833
1834 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1835 size = 3;
1836
1837 if (opcode->format == FMT_D6)
1838 size = 3;
1839
1840 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1841 size = 4;
1842
1843 if (opcode->format == FMT_D8)
1844 size = 6;
1845
1846 if (opcode->format == FMT_D9)
1847 size = 7;
1848
1849 if (opcode->format == FMT_S4)
1850 size = 5;
1851
1852 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1853 size = 7;
1854
1855 if (opcode->format == FMT_D2)
1856 size = 4;
1857
1858 if (opcode->format == FMT_D3)
1859 size = 5;
1860
1861 if (opcode->format == FMT_D4)
1862 size = 6;
1863
1864 if (relaxable && fc > 0)
1865 {
1866 /* On a 64-bit host the size of an 'int' is not the same
1867 as the size of a pointer, so we need a union to convert
1868 the opindex field of the fr_cgen structure into a char *
1869 so that it can be stored in the frag. We do not have
1870 to worry about loosing accuracy as we are not going to
1871 be even close to the 32bit limit of the int. */
1872 union
1873 {
1874 int opindex;
1875 char * ptr;
1876 }
1877 opindex_converter;
1878 int type;
1879
1880 /* We want to anchor the line info to the previous frag (if
1881 there isn't one, create it), so that, when the insn is
1882 resized, we still get the right address for the beginning of
1883 the region. */
1884 f = frag_more (0);
1885 dwarf2_emit_insn (0);
1886
1887 /* bCC */
1888 if (size == 2)
1889 {
1890 /* Handle bra specially. Basically treat it like jmp so
1891 that we automatically handle 8, 16 and 32 bit offsets
1892 correctly as well as jumps to an undefined address.
1893
1894 It is also important to not treat it like other bCC
1895 instructions since the long forms of bra is different
1896 from other bCC instructions. */
1897 if (opcode->opcode == 0xca00)
1898 type = 10;
1899 else
1900 type = 0;
1901 }
1902 /* call */
1903 else if (size == 5)
1904 type = 6;
1905 /* calls */
1906 else if (size == 4)
1907 type = 8;
1908 /* jmp */
1909 else if (size == 3 && opcode->opcode == 0xcc0000)
1910 type = 10;
1911 else if (size == 3 && (opcode->opcode & 0xfff000) == 0xf8d000)
1912 type = 13;
1913 /* bCC (uncommon cases) */
1914 else
1915 type = 3;
1916
1917 opindex_converter.opindex = fixups[0].opindex;
1918 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1919 fixups[0].exp.X_add_symbol,
1920 fixups[0].exp.X_add_number,
1921 opindex_converter.ptr);
1922
1923 /* This is pretty hokey. We basically just care about the
1924 opcode, so we have to write out the first word big endian.
1925
1926 The exception is "call", which has two operands that we
1927 care about.
1928
1929 The first operand (the register list) happens to be in the
1930 first instruction word, and will be in the right place if
1931 we output the first word in big endian mode.
1932
1933 The second operand (stack size) is in the extension word,
1934 and we want it to appear as the first character in the extension
1935 word (as it appears in memory). Luckily, writing the extension
1936 word in big endian format will do what we want. */
1937 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1938 if (size > 8)
1939 {
1940 number_to_chars_bigendian (f + 4, extension, 4);
1941 number_to_chars_bigendian (f + 8, 0, size - 8);
1942 }
1943 else if (size > 4)
1944 number_to_chars_bigendian (f + 4, extension, size - 4);
1945 }
1946 else
1947 {
1948 /* Allocate space for the instruction. */
1949 f = frag_more (size);
1950
1951 /* Fill in bytes for the instruction. Note that opcode fields
1952 are written big-endian, 16 & 32bit immediates are written
1953 little endian. Egad. */
1954 if (opcode->format == FMT_S0
1955 || opcode->format == FMT_S1
1956 || opcode->format == FMT_D0
1957 || opcode->format == FMT_D6
1958 || opcode->format == FMT_D7
1959 || opcode->format == FMT_D10
1960 || opcode->format == FMT_D1)
1961 {
1962 number_to_chars_bigendian (f, insn, size);
1963 }
1964 else if (opcode->format == FMT_S2
1965 && opcode->opcode != 0xdf0000
1966 && opcode->opcode != 0xde0000)
1967 {
1968 /* A format S2 instruction that is _not_ "ret" and "retf". */
1969 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1970 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1971 }
1972 else if (opcode->format == FMT_S2)
1973 {
1974 /* This must be a ret or retf, which is written entirely in
1975 big-endian format. */
1976 number_to_chars_bigendian (f, insn, 3);
1977 }
1978 else if (opcode->format == FMT_S4
1979 && opcode->opcode != 0xdc000000)
1980 {
1981 /* This must be a format S4 "call" instruction. What a pain. */
1982 unsigned long temp = (insn >> 8) & 0xffff;
1983 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1984 number_to_chars_littleendian (f + 1, temp, 2);
1985 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1986 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1987 }
1988 else if (opcode->format == FMT_S4)
1989 {
1990 /* This must be a format S4 "jmp" instruction. */
1991 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1992 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1993 number_to_chars_littleendian (f + 1, temp, 4);
1994 }
1995 else if (opcode->format == FMT_S6)
1996 {
1997 unsigned long temp = ((insn & 0xffffff) << 8)
1998 | ((extension >> 16) & 0xff);
1999 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
2000 number_to_chars_littleendian (f + 1, temp, 4);
2001 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
2002 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2003 }
2004 else if (opcode->format == FMT_D2
2005 && opcode->opcode != 0xfaf80000
2006 && opcode->opcode != 0xfaf00000
2007 && opcode->opcode != 0xfaf40000)
2008 {
2009 /* A format D2 instruction where the 16bit immediate is
2010 really a single 16bit value, not two 8bit values. */
2011 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2012 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2013 }
2014 else if (opcode->format == FMT_D2)
2015 {
2016 /* A format D2 instruction where the 16bit immediate
2017 is really two 8bit immediates. */
2018 number_to_chars_bigendian (f, insn, 4);
2019 }
2020 else if (opcode->format == FMT_D3)
2021 {
2022 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2023 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2024 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
2025 }
2026 else if (opcode->format == FMT_D4)
2027 {
2028 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
2029
2030 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2031 number_to_chars_littleendian (f + 2, temp, 4);
2032 }
2033 else if (opcode->format == FMT_D5)
2034 {
2035 unsigned long temp = (((insn & 0xffff) << 16)
2036 | ((extension >> 8) & 0xffff));
2037
2038 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2039 number_to_chars_littleendian (f + 2, temp, 4);
2040 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2041 }
2042 else if (opcode->format == FMT_D8)
2043 {
2044 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
2045
2046 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2047 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
2048 number_to_chars_littleendian (f + 4, temp >> 8, 2);
2049 }
2050 else if (opcode->format == FMT_D9)
2051 {
2052 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
2053
2054 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2055 number_to_chars_littleendian (f + 3, temp, 4);
2056 }
2057
2058 /* Create any fixups. */
2059 for (i = 0; i < fc; i++)
2060 {
2061 const struct mn10300_operand *operand;
2062 int reloc_size;
2063
2064 operand = &mn10300_operands[fixups[i].opindex];
2065 if (fixups[i].reloc != BFD_RELOC_UNUSED
2066 && fixups[i].reloc != BFD_RELOC_32_GOT_PCREL
2067 && fixups[i].reloc != BFD_RELOC_32_GOTOFF
2068 && fixups[i].reloc != BFD_RELOC_32_PLT_PCREL
2069 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_GD
2070 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LD
2071 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LDO
2072 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_GOTIE
2073 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_IE
2074 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LE
2075 && fixups[i].reloc != BFD_RELOC_MN10300_GOT32)
2076 {
2077 reloc_howto_type *reloc_howto;
2078 int offset;
2079
2080 reloc_howto = bfd_reloc_type_lookup (stdoutput,
2081 fixups[i].reloc);
2082
2083 if (!reloc_howto)
2084 abort ();
2085
2086 reloc_size = bfd_get_reloc_size (reloc_howto);
2087
2088 if (reloc_size < 1 || reloc_size > 4)
2089 abort ();
2090
2091 offset = 4 - size;
2092 fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2093 reloc_size, &fixups[i].exp,
2094 reloc_howto->pc_relative,
2095 fixups[i].reloc);
2096 }
2097 else
2098 {
2099 int reloc, pcrel, offset;
2100 fixS *fixP;
2101
2102 reloc = BFD_RELOC_NONE;
2103 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2104 reloc = fixups[i].reloc;
2105 /* How big is the reloc? Remember SPLIT relocs are
2106 implicitly 32bits. */
2107 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2108 reloc_size = 32;
2109 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2110 reloc_size = 24;
2111 else
2112 reloc_size = operand->bits;
2113
2114 /* Is the reloc pc-relative? */
2115 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
2116 if (reloc != BFD_RELOC_NONE)
2117 pcrel = bfd_reloc_type_lookup (stdoutput, reloc)->pc_relative;
2118
2119 offset = size - (reloc_size + operand->shift) / 8;
2120
2121 /* Choose a proper BFD relocation type. */
2122 if (reloc != BFD_RELOC_NONE)
2123 ;
2124 else if (pcrel)
2125 {
2126 if (reloc_size == 32)
2127 reloc = BFD_RELOC_32_PCREL;
2128 else if (reloc_size == 16)
2129 reloc = BFD_RELOC_16_PCREL;
2130 else if (reloc_size == 8)
2131 reloc = BFD_RELOC_8_PCREL;
2132 else
2133 abort ();
2134 }
2135 else
2136 {
2137 if (reloc_size == 32)
2138 reloc = BFD_RELOC_32;
2139 else if (reloc_size == 16)
2140 reloc = BFD_RELOC_16;
2141 else if (reloc_size == 8)
2142 reloc = BFD_RELOC_8;
2143 else
2144 abort ();
2145 }
2146
2147 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2148 reloc_size / 8, &fixups[i].exp, pcrel,
2149 ((bfd_reloc_code_real_type) reloc));
2150
2151 if (pcrel)
2152 fixP->fx_offset += offset;
2153 }
2154 }
2155
2156 dwarf2_emit_insn (size);
2157 }
2158
2159 /* Label this frag as one that contains instructions. */
2160 frag_now->tc_frag_data = TRUE;
2161 }
2162
2163 /* If while processing a fixup, a reloc really needs to be created
2164 then it is done here. */
2165
2166 arelent **
2167 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
2168 {
2169 static arelent * no_relocs = NULL;
2170 static arelent * relocs[MAX_RELOC_EXPANSION + 1];
2171 arelent *reloc;
2172
2173 reloc = xmalloc (sizeof (arelent));
2174
2175 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2176 if (reloc->howto == NULL)
2177 {
2178 as_bad_where (fixp->fx_file, fixp->fx_line,
2179 _("reloc %d not supported by object file format"),
2180 (int) fixp->fx_r_type);
2181 free (reloc);
2182 return & no_relocs;
2183 }
2184
2185 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2186 relocs[0] = reloc;
2187 relocs[1] = NULL;
2188
2189 if (fixp->fx_subsy
2190 && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2191 {
2192 fixp->fx_offset -= S_GET_VALUE (fixp->fx_subsy);
2193 fixp->fx_subsy = NULL;
2194 }
2195
2196 if (fixp->fx_addsy && fixp->fx_subsy)
2197 {
2198 asection *asec, *ssec;
2199
2200 asec = S_GET_SEGMENT (fixp->fx_addsy);
2201 ssec = S_GET_SEGMENT (fixp->fx_subsy);
2202
2203 /* If we have a difference between two (non-absolute) symbols we must
2204 generate two relocs (one for each symbol) and allow the linker to
2205 resolve them - relaxation may change the distances between symbols,
2206 even local symbols defined in the same section. */
2207 if (ssec != absolute_section || asec != absolute_section)
2208 {
2209 arelent * reloc2 = xmalloc (sizeof * reloc);
2210
2211 relocs[0] = reloc2;
2212 relocs[1] = reloc;
2213
2214 reloc2->address = reloc->address;
2215 reloc2->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_MN10300_SYM_DIFF);
2216 reloc2->addend = - S_GET_VALUE (fixp->fx_subsy);
2217 reloc2->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
2218 *reloc2->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
2219
2220 reloc->addend = fixp->fx_offset;
2221 if (asec == absolute_section)
2222 {
2223 reloc->addend += S_GET_VALUE (fixp->fx_addsy);
2224 reloc->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
2225 }
2226 else
2227 {
2228 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
2229 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2230 }
2231
2232 fixp->fx_pcrel = 0;
2233 fixp->fx_done = 1;
2234 return relocs;
2235 }
2236 else
2237 {
2238 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
2239
2240 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
2241 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
2242
2243 switch (fixp->fx_r_type)
2244 {
2245 case BFD_RELOC_8:
2246 md_number_to_chars (fixpos, reloc->addend, 1);
2247 break;
2248
2249 case BFD_RELOC_16:
2250 md_number_to_chars (fixpos, reloc->addend, 2);
2251 break;
2252
2253 case BFD_RELOC_24:
2254 md_number_to_chars (fixpos, reloc->addend, 3);
2255 break;
2256
2257 case BFD_RELOC_32:
2258 md_number_to_chars (fixpos, reloc->addend, 4);
2259 break;
2260
2261 default:
2262 reloc->sym_ptr_ptr
2263 = (asymbol **) bfd_abs_section_ptr->symbol_ptr_ptr;
2264 return relocs;
2265 }
2266
2267 free (reloc);
2268 return & no_relocs;
2269 }
2270 }
2271 else
2272 {
2273 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
2274 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2275 reloc->addend = fixp->fx_offset;
2276 }
2277 return relocs;
2278 }
2279
2280 /* Returns true iff the symbol attached to the frag is at a known location
2281 in the given section, (and hence the relocation to it can be relaxed by
2282 the assembler). */
2283 static inline bfd_boolean
2284 has_known_symbol_location (fragS * fragp, asection * sec)
2285 {
2286 symbolS * sym = fragp->fr_symbol;
2287
2288 return sym != NULL
2289 && S_IS_DEFINED (sym)
2290 && ! S_IS_WEAK (sym)
2291 && S_GET_SEGMENT (sym) == sec;
2292 }
2293
2294 int
2295 md_estimate_size_before_relax (fragS *fragp, asection *seg)
2296 {
2297 if (fragp->fr_subtype == 6
2298 && ! has_known_symbol_location (fragp, seg))
2299 fragp->fr_subtype = 7;
2300 else if (fragp->fr_subtype == 8
2301 && ! has_known_symbol_location (fragp, seg))
2302 fragp->fr_subtype = 9;
2303 else if (fragp->fr_subtype == 10
2304 && ! has_known_symbol_location (fragp, seg))
2305 fragp->fr_subtype = 12;
2306
2307 if (fragp->fr_subtype == 13)
2308 return 3;
2309
2310 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2311 abort ();
2312
2313 return md_relax_table[fragp->fr_subtype].rlx_length;
2314 }
2315
2316 long
2317 md_pcrel_from (fixS *fixp)
2318 {
2319 if (fixp->fx_addsy != (symbolS *) NULL
2320 && (!S_IS_DEFINED (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)))
2321 /* The symbol is undefined or weak. Let the linker figure it out. */
2322 return 0;
2323
2324 return fixp->fx_frag->fr_address + fixp->fx_where;
2325 }
2326
2327 void
2328 md_apply_fix (fixS * fixP, valueT * valP, segT seg)
2329 {
2330 char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal;
2331 int size = 0;
2332 int value = (int) * valP;
2333
2334 gas_assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
2335
2336 /* This should never happen. */
2337 if (seg->flags & SEC_ALLOC)
2338 abort ();
2339
2340 /* The value we are passed in *valuep includes the symbol values.
2341 If we are doing this relocation the code in write.c is going to
2342 call bfd_install_relocation, which is also going to use the symbol
2343 value. That means that if the reloc is fully resolved we want to
2344 use *valuep since bfd_install_relocation is not being used.
2345
2346 However, if the reloc is not fully resolved we do not want to use
2347 *valuep, and must use fx_offset instead. However, if the reloc
2348 is PC relative, we do want to use *valuep since it includes the
2349 result of md_pcrel_from. */
2350 if (fixP->fx_addsy != NULL && ! fixP->fx_pcrel)
2351 value = fixP->fx_offset;
2352
2353 /* If the fix is relative to a symbol which is not defined, or not
2354 in the same segment as the fix, we cannot resolve it here. */
2355 if (fixP->fx_addsy != NULL
2356 && (! S_IS_DEFINED (fixP->fx_addsy)
2357 || (S_GET_SEGMENT (fixP->fx_addsy) != seg)))
2358 {
2359 fixP->fx_done = 0;
2360 return;
2361 }
2362
2363 switch (fixP->fx_r_type)
2364 {
2365 case BFD_RELOC_8:
2366 case BFD_RELOC_8_PCREL:
2367 size = 1;
2368 break;
2369
2370 case BFD_RELOC_16:
2371 case BFD_RELOC_16_PCREL:
2372 size = 2;
2373 break;
2374
2375 case BFD_RELOC_32:
2376 case BFD_RELOC_32_PCREL:
2377 size = 4;
2378 break;
2379
2380 case BFD_RELOC_VTABLE_INHERIT:
2381 case BFD_RELOC_VTABLE_ENTRY:
2382 fixP->fx_done = 0;
2383 return;
2384
2385 case BFD_RELOC_MN10300_ALIGN:
2386 fixP->fx_done = 1;
2387 return;
2388
2389 case BFD_RELOC_NONE:
2390 default:
2391 as_bad_where (fixP->fx_file, fixP->fx_line,
2392 _("Bad relocation fixup type (%d)"), fixP->fx_r_type);
2393 }
2394
2395 md_number_to_chars (fixpos, value, size);
2396
2397 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
2398 if (fixP->fx_addsy == NULL)
2399 fixP->fx_done = 1;
2400 }
2401
2402 /* Return zero if the fixup in fixp should be left alone and not
2403 adjusted. */
2404
2405 bfd_boolean
2406 mn10300_fix_adjustable (struct fix *fixp)
2407 {
2408 if (fixp->fx_pcrel)
2409 {
2410 if (TC_FORCE_RELOCATION_LOCAL (fixp))
2411 return FALSE;
2412 }
2413 /* Non-relative relocs can (and must) be adjusted if they do
2414 not meet the criteria below, or the generic criteria. */
2415 else if (TC_FORCE_RELOCATION (fixp))
2416 return FALSE;
2417
2418 /* Do not adjust relocations involving symbols in code sections,
2419 because it breaks linker relaxations. This could be fixed in the
2420 linker, but this fix is simpler, and it pretty much only affects
2421 object size a little bit. */
2422 if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE)
2423 return FALSE;
2424
2425 /* Likewise, do not adjust symbols that won't be merged, or debug
2426 symbols, because they too break relaxation. We do want to adjust
2427 other mergable symbols, like .rodata, because code relaxations
2428 need section-relative symbols to properly relax them. */
2429 if (! (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE))
2430 return FALSE;
2431
2432 if (strncmp (S_GET_SEGMENT (fixp->fx_addsy)->name, ".debug", 6) == 0)
2433 return FALSE;
2434
2435 return TRUE;
2436 }
2437
2438 static void
2439 set_arch_mach (int mach)
2440 {
2441 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2442 as_warn (_("could not set architecture and machine"));
2443
2444 current_machine = mach;
2445 }
2446
2447 static inline char *
2448 mn10300_end_of_match (char *cont, char *what)
2449 {
2450 int len = strlen (what);
2451
2452 if (strncmp (cont, what, strlen (what)) == 0
2453 && ! is_part_of_name (cont[len]))
2454 return cont + len;
2455
2456 return NULL;
2457 }
2458
2459 int
2460 mn10300_parse_name (char const *name,
2461 expressionS *exprP,
2462 enum expr_mode mode,
2463 char *nextcharP)
2464 {
2465 char *next = input_line_pointer;
2466 char *next_end;
2467 int reloc_type;
2468 segT segment;
2469
2470 exprP->X_op_symbol = NULL;
2471
2472 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
2473 {
2474 if (! GOT_symbol)
2475 GOT_symbol = symbol_find_or_make (name);
2476
2477 exprP->X_add_symbol = GOT_symbol;
2478 no_suffix:
2479 /* If we have an absolute symbol or a reg,
2480 then we know its value now. */
2481 segment = S_GET_SEGMENT (exprP->X_add_symbol);
2482 if (mode != expr_defer && segment == absolute_section)
2483 {
2484 exprP->X_op = O_constant;
2485 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2486 exprP->X_add_symbol = NULL;
2487 }
2488 else if (mode != expr_defer && segment == reg_section)
2489 {
2490 exprP->X_op = O_register;
2491 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2492 exprP->X_add_symbol = NULL;
2493 }
2494 else
2495 {
2496 exprP->X_op = O_symbol;
2497 exprP->X_add_number = 0;
2498 }
2499
2500 return 1;
2501 }
2502
2503 exprP->X_add_symbol = symbol_find_or_make (name);
2504
2505 if (*nextcharP != '@')
2506 goto no_suffix;
2507 else if ((next_end = mn10300_end_of_match (next + 1, "GOTOFF")))
2508 reloc_type = BFD_RELOC_32_GOTOFF;
2509 else if ((next_end = mn10300_end_of_match (next + 1, "GOT")))
2510 reloc_type = BFD_RELOC_MN10300_GOT32;
2511 else if ((next_end = mn10300_end_of_match (next + 1, "PLT")))
2512 reloc_type = BFD_RELOC_32_PLT_PCREL;
2513 else if ((next_end = mn10300_end_of_match (next + 1, "tlsgd")))
2514 reloc_type = BFD_RELOC_MN10300_TLS_GD;
2515 else if ((next_end = mn10300_end_of_match (next + 1, "tlsldm")))
2516 reloc_type = BFD_RELOC_MN10300_TLS_LD;
2517 else if ((next_end = mn10300_end_of_match (next + 1, "dtpoff")))
2518 reloc_type = BFD_RELOC_MN10300_TLS_LDO;
2519 else if ((next_end = mn10300_end_of_match (next + 1, "gotntpoff")))
2520 reloc_type = BFD_RELOC_MN10300_TLS_GOTIE;
2521 else if ((next_end = mn10300_end_of_match (next + 1, "indntpoff")))
2522 reloc_type = BFD_RELOC_MN10300_TLS_IE;
2523 else if ((next_end = mn10300_end_of_match (next + 1, "tpoff")))
2524 reloc_type = BFD_RELOC_MN10300_TLS_LE;
2525 else
2526 goto no_suffix;
2527
2528 *input_line_pointer = *nextcharP;
2529 input_line_pointer = next_end;
2530 *nextcharP = *input_line_pointer;
2531 *input_line_pointer = '\0';
2532
2533 exprP->X_op = O_PIC_reloc;
2534 exprP->X_add_number = 0;
2535 exprP->X_md = reloc_type;
2536
2537 return 1;
2538 }
2539
2540 /* The target specific pseudo-ops which we support. */
2541 const pseudo_typeS md_pseudo_table[] =
2542 {
2543 { "am30", set_arch_mach, AM30 },
2544 { "am33", set_arch_mach, AM33 },
2545 { "am33_2", set_arch_mach, AM33_2 },
2546 { "mn10300", set_arch_mach, MN103 },
2547 {NULL, 0, 0}
2548 };
2549
2550 /* Returns FALSE if there is some mn10300 specific reason why the
2551 subtraction of two same-section symbols cannot be computed by
2552 the assembler. */
2553
2554 bfd_boolean
2555 mn10300_allow_local_subtract (expressionS * left, expressionS * right, segT section)
2556 {
2557 bfd_boolean result;
2558 fragS * left_frag;
2559 fragS * right_frag;
2560 fragS * frag;
2561
2562 /* If we are not performing linker relaxation then we have nothing
2563 to worry about. */
2564 if (linkrelax == 0)
2565 return TRUE;
2566
2567 /* If the symbols are not in a code section then they are OK. */
2568 if ((section->flags & SEC_CODE) == 0)
2569 return TRUE;
2570
2571 /* Otherwise we have to scan the fragments between the two symbols.
2572 If any instructions are found then we have to assume that linker
2573 relaxation may change their size and so we must delay resolving
2574 the subtraction until the final link. */
2575 left_frag = symbol_get_frag (left->X_add_symbol);
2576 right_frag = symbol_get_frag (right->X_add_symbol);
2577
2578 if (left_frag == right_frag)
2579 return ! left_frag->tc_frag_data;
2580
2581 result = TRUE;
2582 for (frag = left_frag; frag != NULL; frag = frag->fr_next)
2583 {
2584 if (frag->tc_frag_data)
2585 result = FALSE;
2586 if (frag == right_frag)
2587 break;
2588 }
2589
2590 if (frag == NULL)
2591 for (frag = right_frag; frag != NULL; frag = frag->fr_next)
2592 {
2593 if (frag->tc_frag_data)
2594 result = FALSE;
2595 if (frag == left_frag)
2596 break;
2597 }
2598
2599 if (frag == NULL)
2600 /* The two symbols are on disjoint fragment chains
2601 - we cannot possibly compute their difference. */
2602 return FALSE;
2603
2604 return result;
2605 }
2606
2607 /* When relaxing, we need to output a reloc for any .align directive
2608 that requests alignment to a two byte boundary or larger. */
2609
2610 void
2611 mn10300_handle_align (fragS *frag)
2612 {
2613 if (linkrelax
2614 && (frag->fr_type == rs_align
2615 || frag->fr_type == rs_align_code)
2616 && frag->fr_address + frag->fr_fix > 0
2617 && frag->fr_offset > 1
2618 && now_seg != bss_section
2619 /* Do not create relocs for the merging sections - such
2620 relocs will prevent the contents from being merged. */
2621 && (bfd_get_section_flags (now_seg->owner, now_seg) & SEC_MERGE) == 0)
2622 /* Create a new fixup to record the alignment request. The symbol is
2623 irrelevent but must be present so we use the absolute section symbol.
2624 The offset from the symbol is used to record the power-of-two alignment
2625 value. The size is set to 0 because the frag may already be aligned,
2626 thus causing cvt_frag_to_fill to reduce the size of the frag to zero. */
2627 fix_new (frag, frag->fr_fix, 0, & abs_symbol, frag->fr_offset, FALSE,
2628 BFD_RELOC_MN10300_ALIGN);
2629 }
2630
2631 bfd_boolean
2632 mn10300_force_relocation (struct fix * fixp)
2633 {
2634 if (linkrelax
2635 && (fixp->fx_pcrel
2636 || fixp->fx_r_type == BFD_RELOC_MN10300_ALIGN))
2637 return TRUE;
2638
2639 return generic_force_reloc (fixp);
2640 }
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