1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright (C) 1996-2015 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19 Boston, MA 02110-1301, USA. */
22 #include "safe-ctype.h"
24 #include "opcode/mn10300.h"
25 #include "dwarf2dbg.h"
26 #include "libiberty.h"
28 /* Structure to hold information about predefined registers. */
35 /* Generic assembler global variables which must be defined by all
38 /* Characters which always start a comment. */
39 const char comment_chars
[] = "#";
41 /* Characters which start a comment at the beginning of a line. */
42 const char line_comment_chars
[] = ";#";
44 /* Characters which may be used to separate multiple commands on a
46 const char line_separator_chars
[] = ";";
48 /* Characters which are used to indicate an exponent in a floating
50 const char EXP_CHARS
[] = "eE";
52 /* Characters which mean that a number is a floating point constant,
54 const char FLT_CHARS
[] = "dD";
56 const relax_typeS md_relax_table
[] =
58 /* The plus values for the bCC and fBCC instructions in the table below
59 are because the branch instruction is translated into a jump
60 instruction that is now +2 or +3 bytes further on in memory, and the
61 correct size of jump instruction must be selected. */
64 {0x7fff + 2, -0x8000 + 2, 5, 2},
65 {0x7fffffff, -0x80000000, 7, 0},
67 /* bCC relaxing (uncommon cases for 3byte length instructions) */
69 {0x7fff + 3, -0x8000 + 3, 6, 5},
70 {0x7fffffff, -0x80000000, 8, 0},
73 {0x7fff, -0x8000, 5, 7},
74 {0x7fffffff, -0x80000000, 7, 0},
77 {0x7fff, -0x8000, 4, 9},
78 {0x7fffffff, -0x80000000, 6, 0},
82 {0x7fff, -0x8000, 3, 12},
83 {0x7fffffff, -0x80000000, 5, 0},
87 {0x7fff + 3, -0x8000 + 3, 6, 15},
88 {0x7fffffff, -0x80000000, 8, 0},
92 /* Set linkrelax here to avoid fixups in most sections. */
95 static int current_machine
;
98 #define MAX_INSN_FIXUPS 5
104 bfd_reloc_code_real_type reloc
;
106 struct mn10300_fixup fixups
[MAX_INSN_FIXUPS
];
109 /* We must store the value of each register operand so that we can
110 verify that certain registers do not match. */
111 int mn10300_reg_operands
[MN10300_MAX_OPERANDS
];
113 const char *md_shortopts
= "";
115 struct option md_longopts
[] =
117 {NULL
, no_argument
, NULL
, 0}
120 size_t md_longopts_size
= sizeof (md_longopts
);
122 #define HAVE_AM33_2 (current_machine == AM33_2)
123 #define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2)
124 #define HAVE_AM30 (current_machine == AM30)
126 /* Opcode hash table. */
127 static struct hash_control
*mn10300_hash
;
129 /* This table is sorted. Suitable for searching by a binary search. */
130 static const struct reg_name data_registers
[] =
138 static const struct reg_name address_registers
[] =
146 static const struct reg_name r_registers
[] =
190 static const struct reg_name xr_registers
[] =
215 static const struct reg_name float_registers
[] =
251 static const struct reg_name double_registers
[] =
271 /* We abuse the `value' field, that would be otherwise unused, to
272 encode the architecture on which (access to) the register was
273 introduced. FIXME: we should probably warn when we encounter a
274 register name when assembling for an architecture that doesn't
275 support it, before parsing it as a symbol name. */
276 static const struct reg_name other_registers
[] =
287 #define OTHER_REG_NAME_CNT ARRAY_SIZE (other_registers)
289 /* Perform a binary search of the given register table REGS to see
290 if NAME is a valid regiter name. Returns the register number from
291 the array on success, or -1 on failure. */
294 reg_name_search (const struct reg_name
*regs
,
307 middle
= (low
+ high
) / 2;
308 cmp
= strcasecmp (name
, regs
[middle
].name
);
314 return regs
[middle
].value
;
321 /* Looks at the current position in the input line to see if it is
322 the name of a register in TABLE. If it is, then the name is
323 converted into an expression returned in EXPRESSIONP (with X_op
324 set to O_register and X_add_number set to the register number), the
325 input pointer is left pointing at the first non-blank character after
326 the name and the function returns TRUE. Otherwise the input pointer
327 is left alone and the function returns FALSE. */
330 get_register_name (expressionS
* expressionP
,
331 const struct reg_name
* table
,
339 /* Find the spelling of the operand. */
340 start
= input_line_pointer
;
342 c
= get_symbol_name (&name
);
343 reg_number
= reg_name_search (table
, table_length
, name
);
345 /* Put back the delimiting char. */
346 (void) restore_line_pointer (c
);
348 /* Look to see if it's in the register table. */
351 expressionP
->X_op
= O_register
;
352 expressionP
->X_add_number
= reg_number
;
354 /* Make the rest nice. */
355 expressionP
->X_add_symbol
= NULL
;
356 expressionP
->X_op_symbol
= NULL
;
361 /* Reset the line as if we had not done anything. */
362 input_line_pointer
= start
;
367 r_register_name (expressionS
*expressionP
)
369 return get_register_name (expressionP
, r_registers
, ARRAY_SIZE (r_registers
));
374 xr_register_name (expressionS
*expressionP
)
376 return get_register_name (expressionP
, xr_registers
, ARRAY_SIZE (xr_registers
));
380 data_register_name (expressionS
*expressionP
)
382 return get_register_name (expressionP
, data_registers
, ARRAY_SIZE (data_registers
));
386 address_register_name (expressionS
*expressionP
)
388 return get_register_name (expressionP
, address_registers
, ARRAY_SIZE (address_registers
));
392 float_register_name (expressionS
*expressionP
)
394 return get_register_name (expressionP
, float_registers
, ARRAY_SIZE (float_registers
));
398 double_register_name (expressionS
*expressionP
)
400 return get_register_name (expressionP
, double_registers
, ARRAY_SIZE (double_registers
));
404 other_register_name (expressionS
*expressionP
)
411 /* Find the spelling of the operand. */
412 start
= input_line_pointer
;
414 c
= get_symbol_name (&name
);
415 reg_number
= reg_name_search (other_registers
, ARRAY_SIZE (other_registers
), name
);
417 /* Put back the delimiting char. */
418 (void) restore_line_pointer (c
);
420 /* Look to see if it's in the register table. */
422 || (reg_number
== AM33
&& HAVE_AM33
))
424 expressionP
->X_op
= O_register
;
425 expressionP
->X_add_number
= 0;
427 /* Make the rest nice. */
428 expressionP
->X_add_symbol
= NULL
;
429 expressionP
->X_op_symbol
= NULL
;
434 /* Reset the line as if we had not done anything. */
435 input_line_pointer
= start
;
440 md_show_usage (FILE *stream
)
442 fprintf (stream
, _("MN10300 assembler options:\n\
447 md_parse_option (int c ATTRIBUTE_UNUSED
, char *arg ATTRIBUTE_UNUSED
)
453 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
459 md_atof (int type
, char *litp
, int *sizep
)
461 return ieee_md_atof (type
, litp
, sizep
, FALSE
);
465 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
469 static unsigned long label_count
= 0;
472 subseg_change (sec
, 0);
473 if (fragP
->fr_subtype
== 0)
475 fix_new (fragP
, fragP
->fr_fix
+ 1, 1, fragP
->fr_symbol
,
476 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
480 else if (fragP
->fr_subtype
== 1)
482 /* Reverse the condition of the first branch. */
483 int offset
= fragP
->fr_fix
;
484 int opcode
= fragP
->fr_literal
[offset
] & 0xff;
521 fragP
->fr_literal
[offset
] = opcode
;
523 /* Create a fixup for the reversed conditional branch. */
524 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
525 fix_new (fragP
, fragP
->fr_fix
+ 1, 1,
526 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
527 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
529 /* Now create the unconditional branch + fixup to the
531 fragP
->fr_literal
[offset
+ 2] = 0xcc;
532 fix_new (fragP
, fragP
->fr_fix
+ 3, 2, fragP
->fr_symbol
,
533 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
537 else if (fragP
->fr_subtype
== 2)
539 /* Reverse the condition of the first branch. */
540 int offset
= fragP
->fr_fix
;
541 int opcode
= fragP
->fr_literal
[offset
] & 0xff;
578 fragP
->fr_literal
[offset
] = opcode
;
580 /* Create a fixup for the reversed conditional branch. */
581 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
582 fix_new (fragP
, fragP
->fr_fix
+ 1, 1,
583 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
584 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
586 /* Now create the unconditional branch + fixup to the
588 fragP
->fr_literal
[offset
+ 2] = 0xdc;
589 fix_new (fragP
, fragP
->fr_fix
+ 3, 4, fragP
->fr_symbol
,
590 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
594 else if (fragP
->fr_subtype
== 3)
596 fix_new (fragP
, fragP
->fr_fix
+ 2, 1, fragP
->fr_symbol
,
597 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
601 else if (fragP
->fr_subtype
== 4)
603 /* Reverse the condition of the first branch. */
604 int offset
= fragP
->fr_fix
;
605 int opcode
= fragP
->fr_literal
[offset
+ 1] & 0xff;
624 fragP
->fr_literal
[offset
+ 1] = opcode
;
626 /* Create a fixup for the reversed conditional branch. */
627 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
628 fix_new (fragP
, fragP
->fr_fix
+ 2, 1,
629 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
630 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
632 /* Now create the unconditional branch + fixup to the
634 fragP
->fr_literal
[offset
+ 3] = 0xcc;
635 fix_new (fragP
, fragP
->fr_fix
+ 4, 2, fragP
->fr_symbol
,
636 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
640 else if (fragP
->fr_subtype
== 5)
642 /* Reverse the condition of the first branch. */
643 int offset
= fragP
->fr_fix
;
644 int opcode
= fragP
->fr_literal
[offset
+ 1] & 0xff;
660 fragP
->fr_literal
[offset
+ 1] = opcode
;
662 /* Create a fixup for the reversed conditional branch. */
663 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
664 fix_new (fragP
, fragP
->fr_fix
+ 2, 1,
665 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
666 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
668 /* Now create the unconditional branch + fixup to the
670 fragP
->fr_literal
[offset
+ 3] = 0xdc;
671 fix_new (fragP
, fragP
->fr_fix
+ 4, 4, fragP
->fr_symbol
,
672 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
676 else if (fragP
->fr_subtype
== 6)
678 int offset
= fragP
->fr_fix
;
680 fragP
->fr_literal
[offset
] = 0xcd;
681 fix_new (fragP
, fragP
->fr_fix
+ 1, 2, fragP
->fr_symbol
,
682 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
686 else if (fragP
->fr_subtype
== 7)
688 int offset
= fragP
->fr_fix
;
690 fragP
->fr_literal
[offset
] = 0xdd;
691 fragP
->fr_literal
[offset
+ 5] = fragP
->fr_literal
[offset
+ 3];
692 fragP
->fr_literal
[offset
+ 6] = fragP
->fr_literal
[offset
+ 4];
693 fragP
->fr_literal
[offset
+ 3] = 0;
694 fragP
->fr_literal
[offset
+ 4] = 0;
696 fix_new (fragP
, fragP
->fr_fix
+ 1, 4, fragP
->fr_symbol
,
697 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
701 else if (fragP
->fr_subtype
== 8)
703 int offset
= fragP
->fr_fix
;
705 fragP
->fr_literal
[offset
] = 0xfa;
706 fragP
->fr_literal
[offset
+ 1] = 0xff;
707 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
708 fragP
->fr_offset
+ 2, 1, BFD_RELOC_16_PCREL
);
712 else if (fragP
->fr_subtype
== 9)
714 int offset
= fragP
->fr_fix
;
716 fragP
->fr_literal
[offset
] = 0xfc;
717 fragP
->fr_literal
[offset
+ 1] = 0xff;
719 fix_new (fragP
, fragP
->fr_fix
+ 2, 4, fragP
->fr_symbol
,
720 fragP
->fr_offset
+ 2, 1, BFD_RELOC_32_PCREL
);
724 else if (fragP
->fr_subtype
== 10)
726 fragP
->fr_literal
[fragP
->fr_fix
] = 0xca;
727 fix_new (fragP
, fragP
->fr_fix
+ 1, 1, fragP
->fr_symbol
,
728 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
732 else if (fragP
->fr_subtype
== 11)
734 int offset
= fragP
->fr_fix
;
736 fragP
->fr_literal
[offset
] = 0xcc;
738 fix_new (fragP
, fragP
->fr_fix
+ 1, 2, fragP
->fr_symbol
,
739 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
743 else if (fragP
->fr_subtype
== 12)
745 int offset
= fragP
->fr_fix
;
747 fragP
->fr_literal
[offset
] = 0xdc;
749 fix_new (fragP
, fragP
->fr_fix
+ 1, 4, fragP
->fr_symbol
,
750 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
754 else if (fragP
->fr_subtype
== 13)
756 fix_new (fragP
, fragP
->fr_fix
+ 2, 1, fragP
->fr_symbol
,
757 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
761 else if (fragP
->fr_subtype
== 14)
763 /* Reverse the condition of the first branch. */
764 int offset
= fragP
->fr_fix
;
765 int opcode
= fragP
->fr_literal
[offset
+ 1] & 0xff;
814 fragP
->fr_literal
[offset
+ 1] = opcode
;
816 /* Create a fixup for the reversed conditional branch. */
817 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
818 fix_new (fragP
, fragP
->fr_fix
+ 2, 1,
819 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
820 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
822 /* Now create the unconditional branch + fixup to the
824 fragP
->fr_literal
[offset
+ 3] = 0xcc;
825 fix_new (fragP
, fragP
->fr_fix
+ 4, 2, fragP
->fr_symbol
,
826 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
830 else if (fragP
->fr_subtype
== 15)
832 /* Reverse the condition of the first branch. */
833 int offset
= fragP
->fr_fix
;
834 int opcode
= fragP
->fr_literal
[offset
+ 1] & 0xff;
883 fragP
->fr_literal
[offset
+ 1] = opcode
;
885 /* Create a fixup for the reversed conditional branch. */
886 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
887 fix_new (fragP
, fragP
->fr_fix
+ 2, 1,
888 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
889 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
891 /* Now create the unconditional branch + fixup to the
893 fragP
->fr_literal
[offset
+ 3] = 0xdc;
894 fix_new (fragP
, fragP
->fr_fix
+ 4, 4, fragP
->fr_symbol
,
895 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
904 md_section_align (asection
*seg
, valueT addr
)
906 int align
= bfd_get_section_alignment (stdoutput
, seg
);
908 return ((addr
+ (1 << align
) - 1) & (-1 << align
));
914 char *prev_name
= "";
915 const struct mn10300_opcode
*op
;
917 mn10300_hash
= hash_new ();
919 /* Insert unique names into hash table. The MN10300 instruction set
920 has many identical opcode names that have different opcodes based
921 on the operands. This hash table then provides a quick index to
922 the first opcode with a particular name in the opcode table. */
924 op
= mn10300_opcodes
;
927 if (strcmp (prev_name
, op
->name
))
929 prev_name
= (char *) op
->name
;
930 hash_insert (mn10300_hash
, op
->name
, (char *) op
);
935 /* Set the default machine type. */
937 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_mn10300
, AM33_2
))
938 as_warn (_("could not set architecture and machine"));
940 current_machine
= AM33_2
;
942 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_mn10300
, MN103
))
943 as_warn (_("could not set architecture and machine"));
945 current_machine
= MN103
;
949 static symbolS
*GOT_symbol
;
952 mn10300_PIC_related_p (symbolS
*sym
)
959 if (sym
== GOT_symbol
)
962 exp
= symbol_get_value_expression (sym
);
964 return (exp
->X_op
== O_PIC_reloc
965 || mn10300_PIC_related_p (exp
->X_add_symbol
)
966 || mn10300_PIC_related_p (exp
->X_op_symbol
));
970 mn10300_check_fixup (struct mn10300_fixup
*fixup
)
972 expressionS
*exp
= &fixup
->exp
;
978 case O_subtract
: /* If we're sufficiently unlucky that the label
979 and the expression that references it happen
980 to end up in different frags, the subtract
981 won't be simplified within expression(). */
982 /* The PIC-related operand must be the first operand of a sum. */
983 if (exp
!= &fixup
->exp
|| mn10300_PIC_related_p (exp
->X_op_symbol
))
986 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
987 fixup
->reloc
= BFD_RELOC_32_GOT_PCREL
;
989 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
993 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
994 fixup
->reloc
= BFD_RELOC_32_GOT_PCREL
;
998 fixup
->reloc
= exp
->X_md
;
999 exp
->X_op
= O_symbol
;
1000 if (fixup
->reloc
== BFD_RELOC_32_PLT_PCREL
1001 && fixup
->opindex
>= 0
1002 && (mn10300_operands
[fixup
->opindex
].flags
1003 & MN10300_OPERAND_RELAX
))
1008 return (mn10300_PIC_related_p (exp
->X_add_symbol
)
1009 || mn10300_PIC_related_p (exp
->X_op_symbol
));
1016 mn10300_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
,
1017 bfd_reloc_code_real_type r ATTRIBUTE_UNUSED
)
1019 struct mn10300_fixup fixup
;
1023 fixup
.reloc
= BFD_RELOC_UNUSED
;
1025 mn10300_check_fixup (&fixup
);
1027 if (fixup
.reloc
== BFD_RELOC_MN10300_GOT32
)
1031 fixup
.reloc
= BFD_RELOC_MN10300_GOT16
;
1035 fixup
.reloc
= BFD_RELOC_MN10300_GOT24
;
1044 else if (fixup
.reloc
== BFD_RELOC_UNUSED
)
1048 fixup
.reloc
= BFD_RELOC_8
;
1052 fixup
.reloc
= BFD_RELOC_16
;
1056 fixup
.reloc
= BFD_RELOC_24
;
1060 fixup
.reloc
= BFD_RELOC_32
;
1069 as_bad (_("unsupported BFD relocation size %u"), size
);
1070 fixup
.reloc
= BFD_RELOC_UNUSED
;
1073 fix_new_exp (frag
, off
, size
, &fixup
.exp
, 0, fixup
.reloc
);
1077 check_operand (const struct mn10300_operand
*operand
,
1080 /* No need to check 32bit operands for a bit. Note that
1081 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1082 if (operand
->bits
!= 32
1083 && (operand
->flags
& MN10300_OPERAND_SPLIT
) == 0)
1089 bits
= operand
->bits
;
1090 if (operand
->flags
& MN10300_OPERAND_24BIT
)
1093 if ((operand
->flags
& MN10300_OPERAND_SIGNED
) != 0)
1095 max
= (1 << (bits
- 1)) - 1;
1096 min
= - (1 << (bits
- 1));
1100 max
= (1 << bits
) - 1;
1106 if (test
< (offsetT
) min
|| test
> (offsetT
) max
)
1112 /* Insert an operand value into an instruction. */
1115 mn10300_insert_operand (unsigned long *insnp
,
1116 unsigned long *extensionp
,
1117 const struct mn10300_operand
*operand
,
1123 /* No need to check 32bit operands for a bit. Note that
1124 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1125 if (operand
->bits
!= 32
1126 && (operand
->flags
& MN10300_OPERAND_SPLIT
) == 0)
1132 bits
= operand
->bits
;
1133 if (operand
->flags
& MN10300_OPERAND_24BIT
)
1136 if ((operand
->flags
& MN10300_OPERAND_SIGNED
) != 0)
1138 max
= (1 << (bits
- 1)) - 1;
1139 min
= - (1 << (bits
- 1));
1143 max
= (1 << bits
) - 1;
1149 if (test
< (offsetT
) min
|| test
> (offsetT
) max
)
1150 as_warn_value_out_of_range (_("operand"), test
, (offsetT
) min
, (offsetT
) max
, file
, line
);
1153 if ((operand
->flags
& MN10300_OPERAND_SPLIT
) != 0)
1155 *insnp
|= (val
>> (32 - operand
->bits
)) & ((1 << operand
->bits
) - 1);
1156 *extensionp
|= ((val
& ((1 << (32 - operand
->bits
)) - 1))
1159 else if ((operand
->flags
& MN10300_OPERAND_24BIT
) != 0)
1161 *insnp
|= (val
>> (24 - operand
->bits
)) & ((1 << operand
->bits
) - 1);
1162 *extensionp
|= ((val
& ((1 << (24 - operand
->bits
)) - 1))
1165 else if ((operand
->flags
& (MN10300_OPERAND_FSREG
| MN10300_OPERAND_FDREG
)))
1167 /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an
1168 explanation of these variables. Note that FMT-implied shifts
1169 are not taken into account for FP registers. */
1170 unsigned long mask_low
, mask_high
;
1171 int shl_low
, shr_high
, shl_high
;
1173 switch (operand
->bits
)
1176 /* Handle regular FP registers. */
1177 if (operand
->shift
>= 0)
1179 /* This is an `m' register. */
1180 shl_low
= operand
->shift
;
1181 shl_high
= 8 + (8 & shl_low
) + (shl_low
& 4) / 4;
1185 /* This is an `n' register. */
1186 shl_low
= -operand
->shift
;
1187 shl_high
= shl_low
/ 4;
1196 /* Handle accumulators. */
1197 shl_low
= -operand
->shift
;
1207 *insnp
|= ((((val
& mask_high
) >> shr_high
) << shl_high
)
1208 | ((val
& mask_low
) << shl_low
));
1210 else if ((operand
->flags
& MN10300_OPERAND_EXTENDED
) == 0)
1212 *insnp
|= (((long) val
& ((1 << operand
->bits
) - 1))
1213 << (operand
->shift
+ shift
));
1215 if ((operand
->flags
& MN10300_OPERAND_REPEATED
) != 0)
1216 *insnp
|= (((long) val
& ((1 << operand
->bits
) - 1))
1217 << (operand
->shift
+ shift
+ operand
->bits
));
1221 *extensionp
|= (((long) val
& ((1 << operand
->bits
) - 1))
1222 << (operand
->shift
+ shift
));
1224 if ((operand
->flags
& MN10300_OPERAND_REPEATED
) != 0)
1225 *extensionp
|= (((long) val
& ((1 << operand
->bits
) - 1))
1226 << (operand
->shift
+ shift
+ operand
->bits
));
1231 md_assemble (char *str
)
1234 struct mn10300_opcode
*opcode
;
1235 struct mn10300_opcode
*next_opcode
;
1236 const unsigned char *opindex_ptr
;
1237 int next_opindex
, relaxable
;
1238 unsigned long insn
, extension
, size
= 0;
1243 /* Get the opcode. */
1244 for (s
= str
; *s
!= '\0' && !ISSPACE (*s
); s
++)
1249 /* Find the first opcode with the proper name. */
1250 opcode
= (struct mn10300_opcode
*) hash_find (mn10300_hash
, str
);
1253 as_bad (_("Unrecognized opcode: `%s'"), str
);
1258 while (ISSPACE (*str
))
1261 input_line_pointer
= str
;
1268 int extra_shift
= 0;
1270 errmsg
= _("Invalid opcode/operands");
1272 /* Reset the array of register operands. */
1273 memset (mn10300_reg_operands
, -1, sizeof (mn10300_reg_operands
));
1279 insn
= opcode
->opcode
;
1282 /* If the instruction is not available on the current machine
1283 then it can not possibly match. */
1285 && !(opcode
->machine
== AM33_2
&& HAVE_AM33_2
)
1286 && !(opcode
->machine
== AM33
&& HAVE_AM33
)
1287 && !(opcode
->machine
== AM30
&& HAVE_AM30
))
1290 for (op_idx
= 1, opindex_ptr
= opcode
->operands
;
1292 opindex_ptr
++, op_idx
++)
1294 const struct mn10300_operand
*operand
;
1297 if (next_opindex
== 0)
1299 operand
= &mn10300_operands
[*opindex_ptr
];
1303 operand
= &mn10300_operands
[next_opindex
];
1307 while (*str
== ' ' || *str
== ',')
1310 if (operand
->flags
& MN10300_OPERAND_RELAX
)
1313 /* Gather the operand. */
1314 hold
= input_line_pointer
;
1315 input_line_pointer
= str
;
1317 if (operand
->flags
& MN10300_OPERAND_PAREN
)
1319 if (*input_line_pointer
!= ')' && *input_line_pointer
!= '(')
1321 input_line_pointer
= hold
;
1325 input_line_pointer
++;
1328 /* See if we can match the operands. */
1329 else if (operand
->flags
& MN10300_OPERAND_DREG
)
1331 if (!data_register_name (&ex
))
1333 input_line_pointer
= hold
;
1338 else if (operand
->flags
& MN10300_OPERAND_AREG
)
1340 if (!address_register_name (&ex
))
1342 input_line_pointer
= hold
;
1347 else if (operand
->flags
& MN10300_OPERAND_SP
)
1350 char c
= get_symbol_name (&start
);
1352 if (strcasecmp (start
, "sp") != 0)
1354 (void) restore_line_pointer (c
);
1355 input_line_pointer
= hold
;
1359 (void) restore_line_pointer (c
);
1362 else if (operand
->flags
& MN10300_OPERAND_RREG
)
1364 if (!r_register_name (&ex
))
1366 input_line_pointer
= hold
;
1371 else if (operand
->flags
& MN10300_OPERAND_XRREG
)
1373 if (!xr_register_name (&ex
))
1375 input_line_pointer
= hold
;
1380 else if (operand
->flags
& MN10300_OPERAND_FSREG
)
1382 if (!float_register_name (&ex
))
1384 input_line_pointer
= hold
;
1389 else if (operand
->flags
& MN10300_OPERAND_FDREG
)
1391 if (!double_register_name (&ex
))
1393 input_line_pointer
= hold
;
1398 else if (operand
->flags
& MN10300_OPERAND_FPCR
)
1401 char c
= get_symbol_name (&start
);
1403 if (strcasecmp (start
, "fpcr") != 0)
1405 (void) restore_line_pointer (c
);
1406 input_line_pointer
= hold
;
1410 (void) restore_line_pointer (c
);
1413 else if (operand
->flags
& MN10300_OPERAND_USP
)
1416 char c
= get_symbol_name (&start
);
1418 if (strcasecmp (start
, "usp") != 0)
1420 (void) restore_line_pointer (c
);
1421 *input_line_pointer
= c
;
1422 input_line_pointer
= hold
;
1426 (void) restore_line_pointer (c
);
1427 *input_line_pointer
= c
;
1430 else if (operand
->flags
& MN10300_OPERAND_SSP
)
1433 char c
= get_symbol_name (&start
);
1435 if (strcasecmp (start
, "ssp") != 0)
1437 (void) restore_line_pointer (c
);
1438 input_line_pointer
= hold
;
1442 (void) restore_line_pointer (c
);
1445 else if (operand
->flags
& MN10300_OPERAND_MSP
)
1448 char c
= get_symbol_name (&start
);
1450 if (strcasecmp (start
, "msp") != 0)
1452 (void) restore_line_pointer (c
);
1453 input_line_pointer
= hold
;
1457 (void) restore_line_pointer (c
);
1460 else if (operand
->flags
& MN10300_OPERAND_PC
)
1463 char c
= get_symbol_name (&start
);
1465 if (strcasecmp (start
, "pc") != 0)
1467 (void) restore_line_pointer (c
);
1468 input_line_pointer
= hold
;
1472 (void) restore_line_pointer (c
);
1475 else if (operand
->flags
& MN10300_OPERAND_EPSW
)
1478 char c
= get_symbol_name (&start
);
1480 if (strcasecmp (start
, "epsw") != 0)
1482 (void) restore_line_pointer (c
);
1483 input_line_pointer
= hold
;
1487 (void) restore_line_pointer (c
);
1490 else if (operand
->flags
& MN10300_OPERAND_PLUS
)
1492 if (*input_line_pointer
!= '+')
1494 input_line_pointer
= hold
;
1498 input_line_pointer
++;
1501 else if (operand
->flags
& MN10300_OPERAND_PSW
)
1504 char c
= get_symbol_name (&start
);
1506 if (strcasecmp (start
, "psw") != 0)
1508 (void) restore_line_pointer (c
);
1509 input_line_pointer
= hold
;
1513 (void) restore_line_pointer (c
);
1516 else if (operand
->flags
& MN10300_OPERAND_MDR
)
1519 char c
= get_symbol_name (&start
);
1521 if (strcasecmp (start
, "mdr") != 0)
1523 (void) restore_line_pointer (c
);
1524 input_line_pointer
= hold
;
1528 (void) restore_line_pointer (c
);
1531 else if (operand
->flags
& MN10300_OPERAND_REG_LIST
)
1533 unsigned int value
= 0;
1534 if (*input_line_pointer
!= '[')
1536 input_line_pointer
= hold
;
1542 input_line_pointer
++;
1544 /* We used to reject a null register list here; however,
1545 we accept it now so the compiler can emit "call"
1546 instructions for all calls to named functions.
1548 The linker can then fill in the appropriate bits for the
1549 register list and stack size or change the instruction
1550 into a "calls" if using "call" is not profitable. */
1551 while (*input_line_pointer
!= ']')
1556 if (*input_line_pointer
== ',')
1557 input_line_pointer
++;
1559 c
= get_symbol_name (&start
);
1561 if (strcasecmp (start
, "d2") == 0)
1564 (void) restore_line_pointer (c
);
1566 else if (strcasecmp (start
, "d3") == 0)
1569 (void) restore_line_pointer (c
);
1571 else if (strcasecmp (start
, "a2") == 0)
1574 (void) restore_line_pointer (c
);
1576 else if (strcasecmp (start
, "a3") == 0)
1579 (void) restore_line_pointer (c
);
1581 else if (strcasecmp (start
, "other") == 0)
1584 (void) restore_line_pointer (c
);
1587 && strcasecmp (start
, "exreg0") == 0)
1590 (void) restore_line_pointer (c
);
1593 && strcasecmp (start
, "exreg1") == 0)
1596 (void) restore_line_pointer (c
);
1599 && strcasecmp (start
, "exother") == 0)
1602 (void) restore_line_pointer (c
);
1605 && strcasecmp (start
, "all") == 0)
1608 (void) restore_line_pointer (c
);
1612 input_line_pointer
= hold
;
1617 input_line_pointer
++;
1618 mn10300_insert_operand (& insn
, & extension
, operand
,
1623 else if (data_register_name (&ex
))
1625 input_line_pointer
= hold
;
1629 else if (address_register_name (&ex
))
1631 input_line_pointer
= hold
;
1635 else if (other_register_name (&ex
))
1637 input_line_pointer
= hold
;
1641 else if (HAVE_AM33
&& r_register_name (&ex
))
1643 input_line_pointer
= hold
;
1647 else if (HAVE_AM33
&& xr_register_name (&ex
))
1649 input_line_pointer
= hold
;
1653 else if (HAVE_AM33_2
&& float_register_name (&ex
))
1655 input_line_pointer
= hold
;
1659 else if (HAVE_AM33_2
&& double_register_name (&ex
))
1661 input_line_pointer
= hold
;
1665 else if (*str
== ')' || *str
== '(')
1667 input_line_pointer
= hold
;
1679 errmsg
= _("illegal operand");
1682 errmsg
= _("missing operand");
1688 mask
= MN10300_OPERAND_DREG
| MN10300_OPERAND_AREG
;
1690 mask
|= MN10300_OPERAND_RREG
| MN10300_OPERAND_XRREG
;
1692 mask
|= MN10300_OPERAND_FSREG
| MN10300_OPERAND_FDREG
;
1693 if ((operand
->flags
& mask
) == 0)
1695 input_line_pointer
= hold
;
1700 if (opcode
->format
== FMT_D1
|| opcode
->format
== FMT_S1
)
1702 else if (opcode
->format
== FMT_D2
1703 || opcode
->format
== FMT_D4
1704 || opcode
->format
== FMT_S2
1705 || opcode
->format
== FMT_S4
1706 || opcode
->format
== FMT_S6
1707 || opcode
->format
== FMT_D5
)
1709 else if (opcode
->format
== FMT_D7
)
1711 else if (opcode
->format
== FMT_D8
|| opcode
->format
== FMT_D9
)
1716 mn10300_insert_operand (& insn
, & extension
, operand
,
1717 ex
.X_add_number
, NULL
,
1720 /* And note the register number in the register array. */
1721 mn10300_reg_operands
[op_idx
- 1] = ex
.X_add_number
;
1726 /* If this operand can be promoted, and it doesn't
1727 fit into the allocated bitfield for this insn,
1728 then promote it (ie this opcode does not match). */
1730 & (MN10300_OPERAND_PROMOTE
| MN10300_OPERAND_RELAX
)
1731 && !check_operand (operand
, ex
.X_add_number
))
1733 input_line_pointer
= hold
;
1738 mn10300_insert_operand (& insn
, & extension
, operand
,
1739 ex
.X_add_number
, NULL
, 0, 0);
1743 /* If this operand can be promoted, then this opcode didn't
1744 match since we can't know if it needed promotion! */
1745 if (operand
->flags
& MN10300_OPERAND_PROMOTE
)
1747 input_line_pointer
= hold
;
1752 /* We need to generate a fixup for this expression. */
1753 if (fc
>= MAX_INSN_FIXUPS
)
1754 as_fatal (_("too many fixups"));
1755 fixups
[fc
].exp
= ex
;
1756 fixups
[fc
].opindex
= *opindex_ptr
;
1757 fixups
[fc
].reloc
= BFD_RELOC_UNUSED
;
1758 if (mn10300_check_fixup (& fixups
[fc
]))
1765 str
= input_line_pointer
;
1766 input_line_pointer
= hold
;
1768 while (*str
== ' ' || *str
== ',')
1772 /* Make sure we used all the operands! */
1776 /* If this instruction has registers that must not match, verify
1777 that they do indeed not match. */
1778 if (opcode
->no_match_operands
)
1780 /* Look at each operand to see if it's marked. */
1781 for (i
= 0; i
< MN10300_MAX_OPERANDS
; i
++)
1783 if ((1 << i
) & opcode
->no_match_operands
)
1787 /* operand I is marked. Check that it does not match any
1788 operands > I which are marked. */
1789 for (j
= i
+ 1; j
< MN10300_MAX_OPERANDS
; j
++)
1791 if (((1 << j
) & opcode
->no_match_operands
)
1792 && mn10300_reg_operands
[i
] == mn10300_reg_operands
[j
])
1794 errmsg
= _("Invalid register specification.");
1806 next_opcode
= opcode
+ 1;
1807 if (!strcmp (next_opcode
->name
, opcode
->name
))
1809 opcode
= next_opcode
;
1813 as_bad ("%s", errmsg
);
1819 while (ISSPACE (*str
))
1823 as_bad (_("junk at end of line: `%s'"), str
);
1825 input_line_pointer
= str
;
1827 /* Determine the size of the instruction. */
1828 if (opcode
->format
== FMT_S0
)
1831 if (opcode
->format
== FMT_S1
|| opcode
->format
== FMT_D0
)
1834 if (opcode
->format
== FMT_S2
|| opcode
->format
== FMT_D1
)
1837 if (opcode
->format
== FMT_D6
)
1840 if (opcode
->format
== FMT_D7
|| opcode
->format
== FMT_D10
)
1843 if (opcode
->format
== FMT_D8
)
1846 if (opcode
->format
== FMT_D9
)
1849 if (opcode
->format
== FMT_S4
)
1852 if (opcode
->format
== FMT_S6
|| opcode
->format
== FMT_D5
)
1855 if (opcode
->format
== FMT_D2
)
1858 if (opcode
->format
== FMT_D3
)
1861 if (opcode
->format
== FMT_D4
)
1864 if (relaxable
&& fc
> 0)
1866 /* On a 64-bit host the size of an 'int' is not the same
1867 as the size of a pointer, so we need a union to convert
1868 the opindex field of the fr_cgen structure into a char *
1869 so that it can be stored in the frag. We do not have
1870 to worry about loosing accuracy as we are not going to
1871 be even close to the 32bit limit of the int. */
1880 /* We want to anchor the line info to the previous frag (if
1881 there isn't one, create it), so that, when the insn is
1882 resized, we still get the right address for the beginning of
1885 dwarf2_emit_insn (0);
1890 /* Handle bra specially. Basically treat it like jmp so
1891 that we automatically handle 8, 16 and 32 bit offsets
1892 correctly as well as jumps to an undefined address.
1894 It is also important to not treat it like other bCC
1895 instructions since the long forms of bra is different
1896 from other bCC instructions. */
1897 if (opcode
->opcode
== 0xca00)
1909 else if (size
== 3 && opcode
->opcode
== 0xcc0000)
1911 else if (size
== 3 && (opcode
->opcode
& 0xfff000) == 0xf8d000)
1913 /* bCC (uncommon cases) */
1917 opindex_converter
.opindex
= fixups
[0].opindex
;
1918 f
= frag_var (rs_machine_dependent
, 8, 8 - size
, type
,
1919 fixups
[0].exp
.X_add_symbol
,
1920 fixups
[0].exp
.X_add_number
,
1921 opindex_converter
.ptr
);
1923 /* This is pretty hokey. We basically just care about the
1924 opcode, so we have to write out the first word big endian.
1926 The exception is "call", which has two operands that we
1929 The first operand (the register list) happens to be in the
1930 first instruction word, and will be in the right place if
1931 we output the first word in big endian mode.
1933 The second operand (stack size) is in the extension word,
1934 and we want it to appear as the first character in the extension
1935 word (as it appears in memory). Luckily, writing the extension
1936 word in big endian format will do what we want. */
1937 number_to_chars_bigendian (f
, insn
, size
> 4 ? 4 : size
);
1940 number_to_chars_bigendian (f
+ 4, extension
, 4);
1941 number_to_chars_bigendian (f
+ 8, 0, size
- 8);
1944 number_to_chars_bigendian (f
+ 4, extension
, size
- 4);
1948 /* Allocate space for the instruction. */
1949 f
= frag_more (size
);
1951 /* Fill in bytes for the instruction. Note that opcode fields
1952 are written big-endian, 16 & 32bit immediates are written
1953 little endian. Egad. */
1954 if (opcode
->format
== FMT_S0
1955 || opcode
->format
== FMT_S1
1956 || opcode
->format
== FMT_D0
1957 || opcode
->format
== FMT_D6
1958 || opcode
->format
== FMT_D7
1959 || opcode
->format
== FMT_D10
1960 || opcode
->format
== FMT_D1
)
1962 number_to_chars_bigendian (f
, insn
, size
);
1964 else if (opcode
->format
== FMT_S2
1965 && opcode
->opcode
!= 0xdf0000
1966 && opcode
->opcode
!= 0xde0000)
1968 /* A format S2 instruction that is _not_ "ret" and "retf". */
1969 number_to_chars_bigendian (f
, (insn
>> 16) & 0xff, 1);
1970 number_to_chars_littleendian (f
+ 1, insn
& 0xffff, 2);
1972 else if (opcode
->format
== FMT_S2
)
1974 /* This must be a ret or retf, which is written entirely in
1975 big-endian format. */
1976 number_to_chars_bigendian (f
, insn
, 3);
1978 else if (opcode
->format
== FMT_S4
1979 && opcode
->opcode
!= 0xdc000000)
1981 /* This must be a format S4 "call" instruction. What a pain. */
1982 unsigned long temp
= (insn
>> 8) & 0xffff;
1983 number_to_chars_bigendian (f
, (insn
>> 24) & 0xff, 1);
1984 number_to_chars_littleendian (f
+ 1, temp
, 2);
1985 number_to_chars_bigendian (f
+ 3, insn
& 0xff, 1);
1986 number_to_chars_bigendian (f
+ 4, extension
& 0xff, 1);
1988 else if (opcode
->format
== FMT_S4
)
1990 /* This must be a format S4 "jmp" instruction. */
1991 unsigned long temp
= ((insn
& 0xffffff) << 8) | (extension
& 0xff);
1992 number_to_chars_bigendian (f
, (insn
>> 24) & 0xff, 1);
1993 number_to_chars_littleendian (f
+ 1, temp
, 4);
1995 else if (opcode
->format
== FMT_S6
)
1997 unsigned long temp
= ((insn
& 0xffffff) << 8)
1998 | ((extension
>> 16) & 0xff);
1999 number_to_chars_bigendian (f
, (insn
>> 24) & 0xff, 1);
2000 number_to_chars_littleendian (f
+ 1, temp
, 4);
2001 number_to_chars_bigendian (f
+ 5, (extension
>> 8) & 0xff, 1);
2002 number_to_chars_bigendian (f
+ 6, extension
& 0xff, 1);
2004 else if (opcode
->format
== FMT_D2
2005 && opcode
->opcode
!= 0xfaf80000
2006 && opcode
->opcode
!= 0xfaf00000
2007 && opcode
->opcode
!= 0xfaf40000)
2009 /* A format D2 instruction where the 16bit immediate is
2010 really a single 16bit value, not two 8bit values. */
2011 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
2012 number_to_chars_littleendian (f
+ 2, insn
& 0xffff, 2);
2014 else if (opcode
->format
== FMT_D2
)
2016 /* A format D2 instruction where the 16bit immediate
2017 is really two 8bit immediates. */
2018 number_to_chars_bigendian (f
, insn
, 4);
2020 else if (opcode
->format
== FMT_D3
)
2022 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
2023 number_to_chars_littleendian (f
+ 2, insn
& 0xffff, 2);
2024 number_to_chars_bigendian (f
+ 4, extension
& 0xff, 1);
2026 else if (opcode
->format
== FMT_D4
)
2028 unsigned long temp
= ((insn
& 0xffff) << 16) | (extension
& 0xffff);
2030 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
2031 number_to_chars_littleendian (f
+ 2, temp
, 4);
2033 else if (opcode
->format
== FMT_D5
)
2035 unsigned long temp
= (((insn
& 0xffff) << 16)
2036 | ((extension
>> 8) & 0xffff));
2038 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
2039 number_to_chars_littleendian (f
+ 2, temp
, 4);
2040 number_to_chars_bigendian (f
+ 6, extension
& 0xff, 1);
2042 else if (opcode
->format
== FMT_D8
)
2044 unsigned long temp
= ((insn
& 0xff) << 16) | (extension
& 0xffff);
2046 number_to_chars_bigendian (f
, (insn
>> 8) & 0xffffff, 3);
2047 number_to_chars_bigendian (f
+ 3, (temp
& 0xff), 1);
2048 number_to_chars_littleendian (f
+ 4, temp
>> 8, 2);
2050 else if (opcode
->format
== FMT_D9
)
2052 unsigned long temp
= ((insn
& 0xff) << 24) | (extension
& 0xffffff);
2054 number_to_chars_bigendian (f
, (insn
>> 8) & 0xffffff, 3);
2055 number_to_chars_littleendian (f
+ 3, temp
, 4);
2058 /* Create any fixups. */
2059 for (i
= 0; i
< fc
; i
++)
2061 const struct mn10300_operand
*operand
;
2064 operand
= &mn10300_operands
[fixups
[i
].opindex
];
2065 if (fixups
[i
].reloc
!= BFD_RELOC_UNUSED
2066 && fixups
[i
].reloc
!= BFD_RELOC_32_GOT_PCREL
2067 && fixups
[i
].reloc
!= BFD_RELOC_32_GOTOFF
2068 && fixups
[i
].reloc
!= BFD_RELOC_32_PLT_PCREL
2069 && fixups
[i
].reloc
!= BFD_RELOC_MN10300_TLS_GD
2070 && fixups
[i
].reloc
!= BFD_RELOC_MN10300_TLS_LD
2071 && fixups
[i
].reloc
!= BFD_RELOC_MN10300_TLS_LDO
2072 && fixups
[i
].reloc
!= BFD_RELOC_MN10300_TLS_GOTIE
2073 && fixups
[i
].reloc
!= BFD_RELOC_MN10300_TLS_IE
2074 && fixups
[i
].reloc
!= BFD_RELOC_MN10300_TLS_LE
2075 && fixups
[i
].reloc
!= BFD_RELOC_MN10300_GOT32
)
2077 reloc_howto_type
*reloc_howto
;
2080 reloc_howto
= bfd_reloc_type_lookup (stdoutput
,
2086 reloc_size
= bfd_get_reloc_size (reloc_howto
);
2088 if (reloc_size
< 1 || reloc_size
> 4)
2092 fix_new_exp (frag_now
, f
- frag_now
->fr_literal
+ offset
,
2093 reloc_size
, &fixups
[i
].exp
,
2094 reloc_howto
->pc_relative
,
2099 int reloc
, pcrel
, offset
;
2102 reloc
= BFD_RELOC_NONE
;
2103 if (fixups
[i
].reloc
!= BFD_RELOC_UNUSED
)
2104 reloc
= fixups
[i
].reloc
;
2105 /* How big is the reloc? Remember SPLIT relocs are
2106 implicitly 32bits. */
2107 if ((operand
->flags
& MN10300_OPERAND_SPLIT
) != 0)
2109 else if ((operand
->flags
& MN10300_OPERAND_24BIT
) != 0)
2112 reloc_size
= operand
->bits
;
2114 /* Is the reloc pc-relative? */
2115 pcrel
= (operand
->flags
& MN10300_OPERAND_PCREL
) != 0;
2116 if (reloc
!= BFD_RELOC_NONE
)
2117 pcrel
= bfd_reloc_type_lookup (stdoutput
, reloc
)->pc_relative
;
2119 offset
= size
- (reloc_size
+ operand
->shift
) / 8;
2121 /* Choose a proper BFD relocation type. */
2122 if (reloc
!= BFD_RELOC_NONE
)
2126 if (reloc_size
== 32)
2127 reloc
= BFD_RELOC_32_PCREL
;
2128 else if (reloc_size
== 16)
2129 reloc
= BFD_RELOC_16_PCREL
;
2130 else if (reloc_size
== 8)
2131 reloc
= BFD_RELOC_8_PCREL
;
2137 if (reloc_size
== 32)
2138 reloc
= BFD_RELOC_32
;
2139 else if (reloc_size
== 16)
2140 reloc
= BFD_RELOC_16
;
2141 else if (reloc_size
== 8)
2142 reloc
= BFD_RELOC_8
;
2147 fixP
= fix_new_exp (frag_now
, f
- frag_now
->fr_literal
+ offset
,
2148 reloc_size
/ 8, &fixups
[i
].exp
, pcrel
,
2149 ((bfd_reloc_code_real_type
) reloc
));
2152 fixP
->fx_offset
+= offset
;
2156 dwarf2_emit_insn (size
);
2159 /* Label this frag as one that contains instructions. */
2160 frag_now
->tc_frag_data
= TRUE
;
2163 /* If while processing a fixup, a reloc really needs to be created
2164 then it is done here. */
2167 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
2169 static arelent
* no_relocs
= NULL
;
2170 static arelent
* relocs
[MAX_RELOC_EXPANSION
+ 1];
2173 reloc
= xmalloc (sizeof (arelent
));
2175 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
2176 if (reloc
->howto
== NULL
)
2178 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2179 _("reloc %d not supported by object file format"),
2180 (int) fixp
->fx_r_type
);
2185 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2190 && S_GET_SEGMENT (fixp
->fx_subsy
) == absolute_section
)
2192 fixp
->fx_offset
-= S_GET_VALUE (fixp
->fx_subsy
);
2193 fixp
->fx_subsy
= NULL
;
2196 if (fixp
->fx_addsy
&& fixp
->fx_subsy
)
2198 asection
*asec
, *ssec
;
2200 asec
= S_GET_SEGMENT (fixp
->fx_addsy
);
2201 ssec
= S_GET_SEGMENT (fixp
->fx_subsy
);
2203 /* If we have a difference between two (non-absolute) symbols we must
2204 generate two relocs (one for each symbol) and allow the linker to
2205 resolve them - relaxation may change the distances between symbols,
2206 even local symbols defined in the same section. */
2207 if (ssec
!= absolute_section
|| asec
!= absolute_section
)
2209 arelent
* reloc2
= xmalloc (sizeof * reloc
);
2214 reloc2
->address
= reloc
->address
;
2215 reloc2
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_MN10300_SYM_DIFF
);
2216 reloc2
->addend
= - S_GET_VALUE (fixp
->fx_subsy
);
2217 reloc2
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
2218 *reloc2
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
2220 reloc
->addend
= fixp
->fx_offset
;
2221 if (asec
== absolute_section
)
2223 reloc
->addend
+= S_GET_VALUE (fixp
->fx_addsy
);
2224 reloc
->sym_ptr_ptr
= bfd_abs_section_ptr
->symbol_ptr_ptr
;
2228 reloc
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
2229 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
2238 char *fixpos
= fixp
->fx_where
+ fixp
->fx_frag
->fr_literal
;
2240 reloc
->addend
= (S_GET_VALUE (fixp
->fx_addsy
)
2241 - S_GET_VALUE (fixp
->fx_subsy
) + fixp
->fx_offset
);
2243 switch (fixp
->fx_r_type
)
2246 md_number_to_chars (fixpos
, reloc
->addend
, 1);
2250 md_number_to_chars (fixpos
, reloc
->addend
, 2);
2254 md_number_to_chars (fixpos
, reloc
->addend
, 3);
2258 md_number_to_chars (fixpos
, reloc
->addend
, 4);
2263 = (asymbol
**) bfd_abs_section_ptr
->symbol_ptr_ptr
;
2273 reloc
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
2274 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
2275 reloc
->addend
= fixp
->fx_offset
;
2280 /* Returns true iff the symbol attached to the frag is at a known location
2281 in the given section, (and hence the relocation to it can be relaxed by
2283 static inline bfd_boolean
2284 has_known_symbol_location (fragS
* fragp
, asection
* sec
)
2286 symbolS
* sym
= fragp
->fr_symbol
;
2289 && S_IS_DEFINED (sym
)
2290 && ! S_IS_WEAK (sym
)
2291 && S_GET_SEGMENT (sym
) == sec
;
2295 md_estimate_size_before_relax (fragS
*fragp
, asection
*seg
)
2297 if (fragp
->fr_subtype
== 6
2298 && ! has_known_symbol_location (fragp
, seg
))
2299 fragp
->fr_subtype
= 7;
2300 else if (fragp
->fr_subtype
== 8
2301 && ! has_known_symbol_location (fragp
, seg
))
2302 fragp
->fr_subtype
= 9;
2303 else if (fragp
->fr_subtype
== 10
2304 && ! has_known_symbol_location (fragp
, seg
))
2305 fragp
->fr_subtype
= 12;
2307 if (fragp
->fr_subtype
== 13)
2310 if (fragp
->fr_subtype
>= sizeof (md_relax_table
) / sizeof (md_relax_table
[0]))
2313 return md_relax_table
[fragp
->fr_subtype
].rlx_length
;
2317 md_pcrel_from (fixS
*fixp
)
2319 if (fixp
->fx_addsy
!= (symbolS
*) NULL
2320 && (!S_IS_DEFINED (fixp
->fx_addsy
) || S_IS_WEAK (fixp
->fx_addsy
)))
2321 /* The symbol is undefined or weak. Let the linker figure it out. */
2324 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2328 md_apply_fix (fixS
* fixP
, valueT
* valP
, segT seg
)
2330 char * fixpos
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2332 int value
= (int) * valP
;
2334 gas_assert (fixP
->fx_r_type
< BFD_RELOC_UNUSED
);
2336 /* This should never happen. */
2337 if (seg
->flags
& SEC_ALLOC
)
2340 /* The value we are passed in *valuep includes the symbol values.
2341 If we are doing this relocation the code in write.c is going to
2342 call bfd_install_relocation, which is also going to use the symbol
2343 value. That means that if the reloc is fully resolved we want to
2344 use *valuep since bfd_install_relocation is not being used.
2346 However, if the reloc is not fully resolved we do not want to use
2347 *valuep, and must use fx_offset instead. However, if the reloc
2348 is PC relative, we do want to use *valuep since it includes the
2349 result of md_pcrel_from. */
2350 if (fixP
->fx_addsy
!= NULL
&& ! fixP
->fx_pcrel
)
2351 value
= fixP
->fx_offset
;
2353 /* If the fix is relative to a symbol which is not defined, or not
2354 in the same segment as the fix, we cannot resolve it here. */
2355 if (fixP
->fx_addsy
!= NULL
2356 && (! S_IS_DEFINED (fixP
->fx_addsy
)
2357 || (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)))
2363 switch (fixP
->fx_r_type
)
2366 case BFD_RELOC_8_PCREL
:
2371 case BFD_RELOC_16_PCREL
:
2376 case BFD_RELOC_32_PCREL
:
2380 case BFD_RELOC_VTABLE_INHERIT
:
2381 case BFD_RELOC_VTABLE_ENTRY
:
2385 case BFD_RELOC_MN10300_ALIGN
:
2389 case BFD_RELOC_NONE
:
2391 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
2392 _("Bad relocation fixup type (%d)"), fixP
->fx_r_type
);
2395 md_number_to_chars (fixpos
, value
, size
);
2397 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
2398 if (fixP
->fx_addsy
== NULL
)
2402 /* Return zero if the fixup in fixp should be left alone and not
2406 mn10300_fix_adjustable (struct fix
*fixp
)
2410 if (TC_FORCE_RELOCATION_LOCAL (fixp
))
2413 /* Non-relative relocs can (and must) be adjusted if they do
2414 not meet the criteria below, or the generic criteria. */
2415 else if (TC_FORCE_RELOCATION (fixp
))
2418 /* Do not adjust relocations involving symbols in code sections,
2419 because it breaks linker relaxations. This could be fixed in the
2420 linker, but this fix is simpler, and it pretty much only affects
2421 object size a little bit. */
2422 if (S_GET_SEGMENT (fixp
->fx_addsy
)->flags
& SEC_CODE
)
2425 /* Likewise, do not adjust symbols that won't be merged, or debug
2426 symbols, because they too break relaxation. We do want to adjust
2427 other mergable symbols, like .rodata, because code relaxations
2428 need section-relative symbols to properly relax them. */
2429 if (! (S_GET_SEGMENT (fixp
->fx_addsy
)->flags
& SEC_MERGE
))
2432 if (strncmp (S_GET_SEGMENT (fixp
->fx_addsy
)->name
, ".debug", 6) == 0)
2439 set_arch_mach (int mach
)
2441 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_mn10300
, mach
))
2442 as_warn (_("could not set architecture and machine"));
2444 current_machine
= mach
;
2447 static inline char *
2448 mn10300_end_of_match (char *cont
, char *what
)
2450 int len
= strlen (what
);
2452 if (strncmp (cont
, what
, strlen (what
)) == 0
2453 && ! is_part_of_name (cont
[len
]))
2460 mn10300_parse_name (char const *name
,
2462 enum expr_mode mode
,
2465 char *next
= input_line_pointer
;
2470 exprP
->X_op_symbol
= NULL
;
2472 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
2475 GOT_symbol
= symbol_find_or_make (name
);
2477 exprP
->X_add_symbol
= GOT_symbol
;
2479 /* If we have an absolute symbol or a reg,
2480 then we know its value now. */
2481 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
2482 if (mode
!= expr_defer
&& segment
== absolute_section
)
2484 exprP
->X_op
= O_constant
;
2485 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
2486 exprP
->X_add_symbol
= NULL
;
2488 else if (mode
!= expr_defer
&& segment
== reg_section
)
2490 exprP
->X_op
= O_register
;
2491 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
2492 exprP
->X_add_symbol
= NULL
;
2496 exprP
->X_op
= O_symbol
;
2497 exprP
->X_add_number
= 0;
2503 exprP
->X_add_symbol
= symbol_find_or_make (name
);
2505 if (*nextcharP
!= '@')
2507 else if ((next_end
= mn10300_end_of_match (next
+ 1, "GOTOFF")))
2508 reloc_type
= BFD_RELOC_32_GOTOFF
;
2509 else if ((next_end
= mn10300_end_of_match (next
+ 1, "GOT")))
2510 reloc_type
= BFD_RELOC_MN10300_GOT32
;
2511 else if ((next_end
= mn10300_end_of_match (next
+ 1, "PLT")))
2512 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
2513 else if ((next_end
= mn10300_end_of_match (next
+ 1, "tlsgd")))
2514 reloc_type
= BFD_RELOC_MN10300_TLS_GD
;
2515 else if ((next_end
= mn10300_end_of_match (next
+ 1, "tlsldm")))
2516 reloc_type
= BFD_RELOC_MN10300_TLS_LD
;
2517 else if ((next_end
= mn10300_end_of_match (next
+ 1, "dtpoff")))
2518 reloc_type
= BFD_RELOC_MN10300_TLS_LDO
;
2519 else if ((next_end
= mn10300_end_of_match (next
+ 1, "gotntpoff")))
2520 reloc_type
= BFD_RELOC_MN10300_TLS_GOTIE
;
2521 else if ((next_end
= mn10300_end_of_match (next
+ 1, "indntpoff")))
2522 reloc_type
= BFD_RELOC_MN10300_TLS_IE
;
2523 else if ((next_end
= mn10300_end_of_match (next
+ 1, "tpoff")))
2524 reloc_type
= BFD_RELOC_MN10300_TLS_LE
;
2528 *input_line_pointer
= *nextcharP
;
2529 input_line_pointer
= next_end
;
2530 *nextcharP
= *input_line_pointer
;
2531 *input_line_pointer
= '\0';
2533 exprP
->X_op
= O_PIC_reloc
;
2534 exprP
->X_add_number
= 0;
2535 exprP
->X_md
= reloc_type
;
2540 /* The target specific pseudo-ops which we support. */
2541 const pseudo_typeS md_pseudo_table
[] =
2543 { "am30", set_arch_mach
, AM30
},
2544 { "am33", set_arch_mach
, AM33
},
2545 { "am33_2", set_arch_mach
, AM33_2
},
2546 { "mn10300", set_arch_mach
, MN103
},
2550 /* Returns FALSE if there is some mn10300 specific reason why the
2551 subtraction of two same-section symbols cannot be computed by
2555 mn10300_allow_local_subtract (expressionS
* left
, expressionS
* right
, segT section
)
2562 /* If we are not performing linker relaxation then we have nothing
2567 /* If the symbols are not in a code section then they are OK. */
2568 if ((section
->flags
& SEC_CODE
) == 0)
2571 /* Otherwise we have to scan the fragments between the two symbols.
2572 If any instructions are found then we have to assume that linker
2573 relaxation may change their size and so we must delay resolving
2574 the subtraction until the final link. */
2575 left_frag
= symbol_get_frag (left
->X_add_symbol
);
2576 right_frag
= symbol_get_frag (right
->X_add_symbol
);
2578 if (left_frag
== right_frag
)
2579 return ! left_frag
->tc_frag_data
;
2582 for (frag
= left_frag
; frag
!= NULL
; frag
= frag
->fr_next
)
2584 if (frag
->tc_frag_data
)
2586 if (frag
== right_frag
)
2591 for (frag
= right_frag
; frag
!= NULL
; frag
= frag
->fr_next
)
2593 if (frag
->tc_frag_data
)
2595 if (frag
== left_frag
)
2600 /* The two symbols are on disjoint fragment chains
2601 - we cannot possibly compute their difference. */
2607 /* When relaxing, we need to output a reloc for any .align directive
2608 that requests alignment to a two byte boundary or larger. */
2611 mn10300_handle_align (fragS
*frag
)
2614 && (frag
->fr_type
== rs_align
2615 || frag
->fr_type
== rs_align_code
)
2616 && frag
->fr_address
+ frag
->fr_fix
> 0
2617 && frag
->fr_offset
> 1
2618 && now_seg
!= bss_section
2619 /* Do not create relocs for the merging sections - such
2620 relocs will prevent the contents from being merged. */
2621 && (bfd_get_section_flags (now_seg
->owner
, now_seg
) & SEC_MERGE
) == 0)
2622 /* Create a new fixup to record the alignment request. The symbol is
2623 irrelevent but must be present so we use the absolute section symbol.
2624 The offset from the symbol is used to record the power-of-two alignment
2625 value. The size is set to 0 because the frag may already be aligned,
2626 thus causing cvt_frag_to_fill to reduce the size of the frag to zero. */
2627 fix_new (frag
, frag
->fr_fix
, 0, & abs_symbol
, frag
->fr_offset
, FALSE
,
2628 BFD_RELOC_MN10300_ALIGN
);
2632 mn10300_force_relocation (struct fix
* fixp
)
2636 || fixp
->fx_r_type
== BFD_RELOC_MN10300_ALIGN
))
2639 return generic_force_reloc (fixp
);