1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2017 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian
;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian
= 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p
= TARGET_REG_NAMES_P
;
96 static void ppc_macro (char *, const struct powerpc_macro
*);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS
*, offsetT
);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
153 /* Generic assembler global variables which must be defined by all
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars
[] = "#!";
162 static const char ppc_eabi_comment_chars
[] = "#";
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
167 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
170 const char comment_chars
[] = "#";
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars
[] = "#";
176 /* Characters which may be used to separate multiple commands on a
178 const char line_separator_chars
[] = ";";
180 /* Characters which are used to indicate an exponent in a floating
182 const char EXP_CHARS
[] = "eE";
184 /* Characters which mean that a number is a floating point constant,
186 const char FLT_CHARS
[] = "dD";
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars
[] = "%[";
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment
;
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length
;
198 /* More than this number of nops in an alignment op gets a branch
200 unsigned long nop_limit
= 4;
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu
= 0;
205 ppc_cpu_t sticky
= 0;
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion
= 0;
211 /* Flags set on encountering toc relocs. */
213 has_large_toc_reloc
= 1,
214 has_small_toc_reloc
= 2
218 /* Warn on emitting data to code sections. */
220 unsigned long last_insn
;
224 /* The target specific pseudo-ops which we support. */
226 const pseudo_typeS md_pseudo_table
[] =
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte
, 0 },
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm
, 0 },
237 { "lcomm", ppc_comm
, 1 },
241 { "bi", ppc_biei
, 0 },
243 { "csect", ppc_csect
, 0 },
244 { "dwsect", ppc_dwsect
, 0 },
245 { "data", ppc_section
, 'd' },
249 { "ei", ppc_biei
, 1 },
251 { "extern", ppc_extern
, 0 },
252 { "function", ppc_function
, 0 },
253 { "lglobl", ppc_lglobl
, 0 },
254 { "ref", ppc_ref
, 0 },
255 { "rename", ppc_rename
, 0 },
256 { "section", ppc_named_section
, 0 },
257 { "stabx", ppc_stabx
, 0 },
258 { "text", ppc_section
, 't' },
259 { "toc", ppc_toc
, 0 },
260 { "long", ppc_xcoff_cons
, 2 },
261 { "llong", ppc_xcoff_cons
, 3 },
262 { "word", ppc_xcoff_cons
, 1 },
263 { "short", ppc_xcoff_cons
, 1 },
264 { "vbyte", ppc_vbyte
, 0 },
268 { "llong", cons
, 8 },
269 { "rdata", ppc_elf_rdata
, 0 },
270 { "rodata", ppc_elf_rdata
, 0 },
271 { "lcomm", ppc_elf_lcomm
, 0 },
272 { "localentry", ppc_elf_localentry
, 0 },
273 { "abiversion", ppc_elf_abiversion
, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous
, 0 },
280 { "pdata", ppc_pdata
, 0 },
281 { "ydata", ppc_ydata
, 0 },
282 { "reldata", ppc_reldata
, 0 },
283 { "rdata", ppc_rdata
, 0 },
284 { "ualong", ppc_ualong
, 0 },
285 { "znop", ppc_znop
, 0 },
286 { "comm", ppc_pe_comm
, 0 },
287 { "lcomm", ppc_pe_comm
, 1 },
288 { "section", ppc_pe_section
, 0 },
289 { "function", ppc_pe_function
,0 },
290 { "tocd", ppc_pe_tocd
, 0 },
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
295 { "machine", ppc_machine
, 0 },
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
306 /* Structure to hold information about predefined registers. */
310 unsigned short value
;
311 unsigned short flags
;
314 /* List of registers that are pre-defined:
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
339 dsisr has the value 18
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
345 The table is sorted. Suitable for searching by a binary search. */
347 static const struct pd_reg pre_defined_registers
[] =
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG
},
351 { "cr.1", 1, PPC_OPERAND_CR_REG
},
352 { "cr.2", 2, PPC_OPERAND_CR_REG
},
353 { "cr.3", 3, PPC_OPERAND_CR_REG
},
354 { "cr.4", 4, PPC_OPERAND_CR_REG
},
355 { "cr.5", 5, PPC_OPERAND_CR_REG
},
356 { "cr.6", 6, PPC_OPERAND_CR_REG
},
357 { "cr.7", 7, PPC_OPERAND_CR_REG
},
359 { "cr0", 0, PPC_OPERAND_CR_REG
},
360 { "cr1", 1, PPC_OPERAND_CR_REG
},
361 { "cr2", 2, PPC_OPERAND_CR_REG
},
362 { "cr3", 3, PPC_OPERAND_CR_REG
},
363 { "cr4", 4, PPC_OPERAND_CR_REG
},
364 { "cr5", 5, PPC_OPERAND_CR_REG
},
365 { "cr6", 6, PPC_OPERAND_CR_REG
},
366 { "cr7", 7, PPC_OPERAND_CR_REG
},
368 { "ctr", 9, PPC_OPERAND_SPR
},
369 { "dar", 19, PPC_OPERAND_SPR
},
370 { "dec", 22, PPC_OPERAND_SPR
},
371 { "dsisr", 18, PPC_OPERAND_SPR
},
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR
},
375 { "f.1", 1, PPC_OPERAND_FPR
},
376 { "f.10", 10, PPC_OPERAND_FPR
},
377 { "f.11", 11, PPC_OPERAND_FPR
},
378 { "f.12", 12, PPC_OPERAND_FPR
},
379 { "f.13", 13, PPC_OPERAND_FPR
},
380 { "f.14", 14, PPC_OPERAND_FPR
},
381 { "f.15", 15, PPC_OPERAND_FPR
},
382 { "f.16", 16, PPC_OPERAND_FPR
},
383 { "f.17", 17, PPC_OPERAND_FPR
},
384 { "f.18", 18, PPC_OPERAND_FPR
},
385 { "f.19", 19, PPC_OPERAND_FPR
},
386 { "f.2", 2, PPC_OPERAND_FPR
},
387 { "f.20", 20, PPC_OPERAND_FPR
},
388 { "f.21", 21, PPC_OPERAND_FPR
},
389 { "f.22", 22, PPC_OPERAND_FPR
},
390 { "f.23", 23, PPC_OPERAND_FPR
},
391 { "f.24", 24, PPC_OPERAND_FPR
},
392 { "f.25", 25, PPC_OPERAND_FPR
},
393 { "f.26", 26, PPC_OPERAND_FPR
},
394 { "f.27", 27, PPC_OPERAND_FPR
},
395 { "f.28", 28, PPC_OPERAND_FPR
},
396 { "f.29", 29, PPC_OPERAND_FPR
},
397 { "f.3", 3, PPC_OPERAND_FPR
},
398 { "f.30", 30, PPC_OPERAND_FPR
},
399 { "f.31", 31, PPC_OPERAND_FPR
},
400 { "f.32", 32, PPC_OPERAND_VSR
},
401 { "f.33", 33, PPC_OPERAND_VSR
},
402 { "f.34", 34, PPC_OPERAND_VSR
},
403 { "f.35", 35, PPC_OPERAND_VSR
},
404 { "f.36", 36, PPC_OPERAND_VSR
},
405 { "f.37", 37, PPC_OPERAND_VSR
},
406 { "f.38", 38, PPC_OPERAND_VSR
},
407 { "f.39", 39, PPC_OPERAND_VSR
},
408 { "f.4", 4, PPC_OPERAND_FPR
},
409 { "f.40", 40, PPC_OPERAND_VSR
},
410 { "f.41", 41, PPC_OPERAND_VSR
},
411 { "f.42", 42, PPC_OPERAND_VSR
},
412 { "f.43", 43, PPC_OPERAND_VSR
},
413 { "f.44", 44, PPC_OPERAND_VSR
},
414 { "f.45", 45, PPC_OPERAND_VSR
},
415 { "f.46", 46, PPC_OPERAND_VSR
},
416 { "f.47", 47, PPC_OPERAND_VSR
},
417 { "f.48", 48, PPC_OPERAND_VSR
},
418 { "f.49", 49, PPC_OPERAND_VSR
},
419 { "f.5", 5, PPC_OPERAND_FPR
},
420 { "f.50", 50, PPC_OPERAND_VSR
},
421 { "f.51", 51, PPC_OPERAND_VSR
},
422 { "f.52", 52, PPC_OPERAND_VSR
},
423 { "f.53", 53, PPC_OPERAND_VSR
},
424 { "f.54", 54, PPC_OPERAND_VSR
},
425 { "f.55", 55, PPC_OPERAND_VSR
},
426 { "f.56", 56, PPC_OPERAND_VSR
},
427 { "f.57", 57, PPC_OPERAND_VSR
},
428 { "f.58", 58, PPC_OPERAND_VSR
},
429 { "f.59", 59, PPC_OPERAND_VSR
},
430 { "f.6", 6, PPC_OPERAND_FPR
},
431 { "f.60", 60, PPC_OPERAND_VSR
},
432 { "f.61", 61, PPC_OPERAND_VSR
},
433 { "f.62", 62, PPC_OPERAND_VSR
},
434 { "f.63", 63, PPC_OPERAND_VSR
},
435 { "f.7", 7, PPC_OPERAND_FPR
},
436 { "f.8", 8, PPC_OPERAND_FPR
},
437 { "f.9", 9, PPC_OPERAND_FPR
},
439 { "f0", 0, PPC_OPERAND_FPR
},
440 { "f1", 1, PPC_OPERAND_FPR
},
441 { "f10", 10, PPC_OPERAND_FPR
},
442 { "f11", 11, PPC_OPERAND_FPR
},
443 { "f12", 12, PPC_OPERAND_FPR
},
444 { "f13", 13, PPC_OPERAND_FPR
},
445 { "f14", 14, PPC_OPERAND_FPR
},
446 { "f15", 15, PPC_OPERAND_FPR
},
447 { "f16", 16, PPC_OPERAND_FPR
},
448 { "f17", 17, PPC_OPERAND_FPR
},
449 { "f18", 18, PPC_OPERAND_FPR
},
450 { "f19", 19, PPC_OPERAND_FPR
},
451 { "f2", 2, PPC_OPERAND_FPR
},
452 { "f20", 20, PPC_OPERAND_FPR
},
453 { "f21", 21, PPC_OPERAND_FPR
},
454 { "f22", 22, PPC_OPERAND_FPR
},
455 { "f23", 23, PPC_OPERAND_FPR
},
456 { "f24", 24, PPC_OPERAND_FPR
},
457 { "f25", 25, PPC_OPERAND_FPR
},
458 { "f26", 26, PPC_OPERAND_FPR
},
459 { "f27", 27, PPC_OPERAND_FPR
},
460 { "f28", 28, PPC_OPERAND_FPR
},
461 { "f29", 29, PPC_OPERAND_FPR
},
462 { "f3", 3, PPC_OPERAND_FPR
},
463 { "f30", 30, PPC_OPERAND_FPR
},
464 { "f31", 31, PPC_OPERAND_FPR
},
465 { "f32", 32, PPC_OPERAND_VSR
},
466 { "f33", 33, PPC_OPERAND_VSR
},
467 { "f34", 34, PPC_OPERAND_VSR
},
468 { "f35", 35, PPC_OPERAND_VSR
},
469 { "f36", 36, PPC_OPERAND_VSR
},
470 { "f37", 37, PPC_OPERAND_VSR
},
471 { "f38", 38, PPC_OPERAND_VSR
},
472 { "f39", 39, PPC_OPERAND_VSR
},
473 { "f4", 4, PPC_OPERAND_FPR
},
474 { "f40", 40, PPC_OPERAND_VSR
},
475 { "f41", 41, PPC_OPERAND_VSR
},
476 { "f42", 42, PPC_OPERAND_VSR
},
477 { "f43", 43, PPC_OPERAND_VSR
},
478 { "f44", 44, PPC_OPERAND_VSR
},
479 { "f45", 45, PPC_OPERAND_VSR
},
480 { "f46", 46, PPC_OPERAND_VSR
},
481 { "f47", 47, PPC_OPERAND_VSR
},
482 { "f48", 48, PPC_OPERAND_VSR
},
483 { "f49", 49, PPC_OPERAND_VSR
},
484 { "f5", 5, PPC_OPERAND_FPR
},
485 { "f50", 50, PPC_OPERAND_VSR
},
486 { "f51", 51, PPC_OPERAND_VSR
},
487 { "f52", 52, PPC_OPERAND_VSR
},
488 { "f53", 53, PPC_OPERAND_VSR
},
489 { "f54", 54, PPC_OPERAND_VSR
},
490 { "f55", 55, PPC_OPERAND_VSR
},
491 { "f56", 56, PPC_OPERAND_VSR
},
492 { "f57", 57, PPC_OPERAND_VSR
},
493 { "f58", 58, PPC_OPERAND_VSR
},
494 { "f59", 59, PPC_OPERAND_VSR
},
495 { "f6", 6, PPC_OPERAND_FPR
},
496 { "f60", 60, PPC_OPERAND_VSR
},
497 { "f61", 61, PPC_OPERAND_VSR
},
498 { "f62", 62, PPC_OPERAND_VSR
},
499 { "f63", 63, PPC_OPERAND_VSR
},
500 { "f7", 7, PPC_OPERAND_FPR
},
501 { "f8", 8, PPC_OPERAND_FPR
},
502 { "f9", 9, PPC_OPERAND_FPR
},
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR
},
506 { "gqr.1", 1, PPC_OPERAND_GQR
},
507 { "gqr.2", 2, PPC_OPERAND_GQR
},
508 { "gqr.3", 3, PPC_OPERAND_GQR
},
509 { "gqr.4", 4, PPC_OPERAND_GQR
},
510 { "gqr.5", 5, PPC_OPERAND_GQR
},
511 { "gqr.6", 6, PPC_OPERAND_GQR
},
512 { "gqr.7", 7, PPC_OPERAND_GQR
},
513 { "gqr0", 0, PPC_OPERAND_GQR
},
514 { "gqr1", 1, PPC_OPERAND_GQR
},
515 { "gqr2", 2, PPC_OPERAND_GQR
},
516 { "gqr3", 3, PPC_OPERAND_GQR
},
517 { "gqr4", 4, PPC_OPERAND_GQR
},
518 { "gqr5", 5, PPC_OPERAND_GQR
},
519 { "gqr6", 6, PPC_OPERAND_GQR
},
520 { "gqr7", 7, PPC_OPERAND_GQR
},
522 { "lr", 8, PPC_OPERAND_SPR
},
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR
},
526 { "r.1", 1, PPC_OPERAND_GPR
},
527 { "r.10", 10, PPC_OPERAND_GPR
},
528 { "r.11", 11, PPC_OPERAND_GPR
},
529 { "r.12", 12, PPC_OPERAND_GPR
},
530 { "r.13", 13, PPC_OPERAND_GPR
},
531 { "r.14", 14, PPC_OPERAND_GPR
},
532 { "r.15", 15, PPC_OPERAND_GPR
},
533 { "r.16", 16, PPC_OPERAND_GPR
},
534 { "r.17", 17, PPC_OPERAND_GPR
},
535 { "r.18", 18, PPC_OPERAND_GPR
},
536 { "r.19", 19, PPC_OPERAND_GPR
},
537 { "r.2", 2, PPC_OPERAND_GPR
},
538 { "r.20", 20, PPC_OPERAND_GPR
},
539 { "r.21", 21, PPC_OPERAND_GPR
},
540 { "r.22", 22, PPC_OPERAND_GPR
},
541 { "r.23", 23, PPC_OPERAND_GPR
},
542 { "r.24", 24, PPC_OPERAND_GPR
},
543 { "r.25", 25, PPC_OPERAND_GPR
},
544 { "r.26", 26, PPC_OPERAND_GPR
},
545 { "r.27", 27, PPC_OPERAND_GPR
},
546 { "r.28", 28, PPC_OPERAND_GPR
},
547 { "r.29", 29, PPC_OPERAND_GPR
},
548 { "r.3", 3, PPC_OPERAND_GPR
},
549 { "r.30", 30, PPC_OPERAND_GPR
},
550 { "r.31", 31, PPC_OPERAND_GPR
},
551 { "r.4", 4, PPC_OPERAND_GPR
},
552 { "r.5", 5, PPC_OPERAND_GPR
},
553 { "r.6", 6, PPC_OPERAND_GPR
},
554 { "r.7", 7, PPC_OPERAND_GPR
},
555 { "r.8", 8, PPC_OPERAND_GPR
},
556 { "r.9", 9, PPC_OPERAND_GPR
},
558 { "r.sp", 1, PPC_OPERAND_GPR
},
560 { "r.toc", 2, PPC_OPERAND_GPR
},
562 { "r0", 0, PPC_OPERAND_GPR
},
563 { "r1", 1, PPC_OPERAND_GPR
},
564 { "r10", 10, PPC_OPERAND_GPR
},
565 { "r11", 11, PPC_OPERAND_GPR
},
566 { "r12", 12, PPC_OPERAND_GPR
},
567 { "r13", 13, PPC_OPERAND_GPR
},
568 { "r14", 14, PPC_OPERAND_GPR
},
569 { "r15", 15, PPC_OPERAND_GPR
},
570 { "r16", 16, PPC_OPERAND_GPR
},
571 { "r17", 17, PPC_OPERAND_GPR
},
572 { "r18", 18, PPC_OPERAND_GPR
},
573 { "r19", 19, PPC_OPERAND_GPR
},
574 { "r2", 2, PPC_OPERAND_GPR
},
575 { "r20", 20, PPC_OPERAND_GPR
},
576 { "r21", 21, PPC_OPERAND_GPR
},
577 { "r22", 22, PPC_OPERAND_GPR
},
578 { "r23", 23, PPC_OPERAND_GPR
},
579 { "r24", 24, PPC_OPERAND_GPR
},
580 { "r25", 25, PPC_OPERAND_GPR
},
581 { "r26", 26, PPC_OPERAND_GPR
},
582 { "r27", 27, PPC_OPERAND_GPR
},
583 { "r28", 28, PPC_OPERAND_GPR
},
584 { "r29", 29, PPC_OPERAND_GPR
},
585 { "r3", 3, PPC_OPERAND_GPR
},
586 { "r30", 30, PPC_OPERAND_GPR
},
587 { "r31", 31, PPC_OPERAND_GPR
},
588 { "r4", 4, PPC_OPERAND_GPR
},
589 { "r5", 5, PPC_OPERAND_GPR
},
590 { "r6", 6, PPC_OPERAND_GPR
},
591 { "r7", 7, PPC_OPERAND_GPR
},
592 { "r8", 8, PPC_OPERAND_GPR
},
593 { "r9", 9, PPC_OPERAND_GPR
},
595 { "rtoc", 2, PPC_OPERAND_GPR
},
597 { "sdr1", 25, PPC_OPERAND_SPR
},
599 { "sp", 1, PPC_OPERAND_GPR
},
601 { "srr0", 26, PPC_OPERAND_SPR
},
602 { "srr1", 27, PPC_OPERAND_SPR
},
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR
},
606 { "v.1", 1, PPC_OPERAND_VR
},
607 { "v.10", 10, PPC_OPERAND_VR
},
608 { "v.11", 11, PPC_OPERAND_VR
},
609 { "v.12", 12, PPC_OPERAND_VR
},
610 { "v.13", 13, PPC_OPERAND_VR
},
611 { "v.14", 14, PPC_OPERAND_VR
},
612 { "v.15", 15, PPC_OPERAND_VR
},
613 { "v.16", 16, PPC_OPERAND_VR
},
614 { "v.17", 17, PPC_OPERAND_VR
},
615 { "v.18", 18, PPC_OPERAND_VR
},
616 { "v.19", 19, PPC_OPERAND_VR
},
617 { "v.2", 2, PPC_OPERAND_VR
},
618 { "v.20", 20, PPC_OPERAND_VR
},
619 { "v.21", 21, PPC_OPERAND_VR
},
620 { "v.22", 22, PPC_OPERAND_VR
},
621 { "v.23", 23, PPC_OPERAND_VR
},
622 { "v.24", 24, PPC_OPERAND_VR
},
623 { "v.25", 25, PPC_OPERAND_VR
},
624 { "v.26", 26, PPC_OPERAND_VR
},
625 { "v.27", 27, PPC_OPERAND_VR
},
626 { "v.28", 28, PPC_OPERAND_VR
},
627 { "v.29", 29, PPC_OPERAND_VR
},
628 { "v.3", 3, PPC_OPERAND_VR
},
629 { "v.30", 30, PPC_OPERAND_VR
},
630 { "v.31", 31, PPC_OPERAND_VR
},
631 { "v.4", 4, PPC_OPERAND_VR
},
632 { "v.5", 5, PPC_OPERAND_VR
},
633 { "v.6", 6, PPC_OPERAND_VR
},
634 { "v.7", 7, PPC_OPERAND_VR
},
635 { "v.8", 8, PPC_OPERAND_VR
},
636 { "v.9", 9, PPC_OPERAND_VR
},
638 { "v0", 0, PPC_OPERAND_VR
},
639 { "v1", 1, PPC_OPERAND_VR
},
640 { "v10", 10, PPC_OPERAND_VR
},
641 { "v11", 11, PPC_OPERAND_VR
},
642 { "v12", 12, PPC_OPERAND_VR
},
643 { "v13", 13, PPC_OPERAND_VR
},
644 { "v14", 14, PPC_OPERAND_VR
},
645 { "v15", 15, PPC_OPERAND_VR
},
646 { "v16", 16, PPC_OPERAND_VR
},
647 { "v17", 17, PPC_OPERAND_VR
},
648 { "v18", 18, PPC_OPERAND_VR
},
649 { "v19", 19, PPC_OPERAND_VR
},
650 { "v2", 2, PPC_OPERAND_VR
},
651 { "v20", 20, PPC_OPERAND_VR
},
652 { "v21", 21, PPC_OPERAND_VR
},
653 { "v22", 22, PPC_OPERAND_VR
},
654 { "v23", 23, PPC_OPERAND_VR
},
655 { "v24", 24, PPC_OPERAND_VR
},
656 { "v25", 25, PPC_OPERAND_VR
},
657 { "v26", 26, PPC_OPERAND_VR
},
658 { "v27", 27, PPC_OPERAND_VR
},
659 { "v28", 28, PPC_OPERAND_VR
},
660 { "v29", 29, PPC_OPERAND_VR
},
661 { "v3", 3, PPC_OPERAND_VR
},
662 { "v30", 30, PPC_OPERAND_VR
},
663 { "v31", 31, PPC_OPERAND_VR
},
664 { "v4", 4, PPC_OPERAND_VR
},
665 { "v5", 5, PPC_OPERAND_VR
},
666 { "v6", 6, PPC_OPERAND_VR
},
667 { "v7", 7, PPC_OPERAND_VR
},
668 { "v8", 8, PPC_OPERAND_VR
},
669 { "v9", 9, PPC_OPERAND_VR
},
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR
},
673 { "vs.1", 1, PPC_OPERAND_VSR
},
674 { "vs.10", 10, PPC_OPERAND_VSR
},
675 { "vs.11", 11, PPC_OPERAND_VSR
},
676 { "vs.12", 12, PPC_OPERAND_VSR
},
677 { "vs.13", 13, PPC_OPERAND_VSR
},
678 { "vs.14", 14, PPC_OPERAND_VSR
},
679 { "vs.15", 15, PPC_OPERAND_VSR
},
680 { "vs.16", 16, PPC_OPERAND_VSR
},
681 { "vs.17", 17, PPC_OPERAND_VSR
},
682 { "vs.18", 18, PPC_OPERAND_VSR
},
683 { "vs.19", 19, PPC_OPERAND_VSR
},
684 { "vs.2", 2, PPC_OPERAND_VSR
},
685 { "vs.20", 20, PPC_OPERAND_VSR
},
686 { "vs.21", 21, PPC_OPERAND_VSR
},
687 { "vs.22", 22, PPC_OPERAND_VSR
},
688 { "vs.23", 23, PPC_OPERAND_VSR
},
689 { "vs.24", 24, PPC_OPERAND_VSR
},
690 { "vs.25", 25, PPC_OPERAND_VSR
},
691 { "vs.26", 26, PPC_OPERAND_VSR
},
692 { "vs.27", 27, PPC_OPERAND_VSR
},
693 { "vs.28", 28, PPC_OPERAND_VSR
},
694 { "vs.29", 29, PPC_OPERAND_VSR
},
695 { "vs.3", 3, PPC_OPERAND_VSR
},
696 { "vs.30", 30, PPC_OPERAND_VSR
},
697 { "vs.31", 31, PPC_OPERAND_VSR
},
698 { "vs.32", 32, PPC_OPERAND_VSR
},
699 { "vs.33", 33, PPC_OPERAND_VSR
},
700 { "vs.34", 34, PPC_OPERAND_VSR
},
701 { "vs.35", 35, PPC_OPERAND_VSR
},
702 { "vs.36", 36, PPC_OPERAND_VSR
},
703 { "vs.37", 37, PPC_OPERAND_VSR
},
704 { "vs.38", 38, PPC_OPERAND_VSR
},
705 { "vs.39", 39, PPC_OPERAND_VSR
},
706 { "vs.4", 4, PPC_OPERAND_VSR
},
707 { "vs.40", 40, PPC_OPERAND_VSR
},
708 { "vs.41", 41, PPC_OPERAND_VSR
},
709 { "vs.42", 42, PPC_OPERAND_VSR
},
710 { "vs.43", 43, PPC_OPERAND_VSR
},
711 { "vs.44", 44, PPC_OPERAND_VSR
},
712 { "vs.45", 45, PPC_OPERAND_VSR
},
713 { "vs.46", 46, PPC_OPERAND_VSR
},
714 { "vs.47", 47, PPC_OPERAND_VSR
},
715 { "vs.48", 48, PPC_OPERAND_VSR
},
716 { "vs.49", 49, PPC_OPERAND_VSR
},
717 { "vs.5", 5, PPC_OPERAND_VSR
},
718 { "vs.50", 50, PPC_OPERAND_VSR
},
719 { "vs.51", 51, PPC_OPERAND_VSR
},
720 { "vs.52", 52, PPC_OPERAND_VSR
},
721 { "vs.53", 53, PPC_OPERAND_VSR
},
722 { "vs.54", 54, PPC_OPERAND_VSR
},
723 { "vs.55", 55, PPC_OPERAND_VSR
},
724 { "vs.56", 56, PPC_OPERAND_VSR
},
725 { "vs.57", 57, PPC_OPERAND_VSR
},
726 { "vs.58", 58, PPC_OPERAND_VSR
},
727 { "vs.59", 59, PPC_OPERAND_VSR
},
728 { "vs.6", 6, PPC_OPERAND_VSR
},
729 { "vs.60", 60, PPC_OPERAND_VSR
},
730 { "vs.61", 61, PPC_OPERAND_VSR
},
731 { "vs.62", 62, PPC_OPERAND_VSR
},
732 { "vs.63", 63, PPC_OPERAND_VSR
},
733 { "vs.7", 7, PPC_OPERAND_VSR
},
734 { "vs.8", 8, PPC_OPERAND_VSR
},
735 { "vs.9", 9, PPC_OPERAND_VSR
},
737 { "vs0", 0, PPC_OPERAND_VSR
},
738 { "vs1", 1, PPC_OPERAND_VSR
},
739 { "vs10", 10, PPC_OPERAND_VSR
},
740 { "vs11", 11, PPC_OPERAND_VSR
},
741 { "vs12", 12, PPC_OPERAND_VSR
},
742 { "vs13", 13, PPC_OPERAND_VSR
},
743 { "vs14", 14, PPC_OPERAND_VSR
},
744 { "vs15", 15, PPC_OPERAND_VSR
},
745 { "vs16", 16, PPC_OPERAND_VSR
},
746 { "vs17", 17, PPC_OPERAND_VSR
},
747 { "vs18", 18, PPC_OPERAND_VSR
},
748 { "vs19", 19, PPC_OPERAND_VSR
},
749 { "vs2", 2, PPC_OPERAND_VSR
},
750 { "vs20", 20, PPC_OPERAND_VSR
},
751 { "vs21", 21, PPC_OPERAND_VSR
},
752 { "vs22", 22, PPC_OPERAND_VSR
},
753 { "vs23", 23, PPC_OPERAND_VSR
},
754 { "vs24", 24, PPC_OPERAND_VSR
},
755 { "vs25", 25, PPC_OPERAND_VSR
},
756 { "vs26", 26, PPC_OPERAND_VSR
},
757 { "vs27", 27, PPC_OPERAND_VSR
},
758 { "vs28", 28, PPC_OPERAND_VSR
},
759 { "vs29", 29, PPC_OPERAND_VSR
},
760 { "vs3", 3, PPC_OPERAND_VSR
},
761 { "vs30", 30, PPC_OPERAND_VSR
},
762 { "vs31", 31, PPC_OPERAND_VSR
},
763 { "vs32", 32, PPC_OPERAND_VSR
},
764 { "vs33", 33, PPC_OPERAND_VSR
},
765 { "vs34", 34, PPC_OPERAND_VSR
},
766 { "vs35", 35, PPC_OPERAND_VSR
},
767 { "vs36", 36, PPC_OPERAND_VSR
},
768 { "vs37", 37, PPC_OPERAND_VSR
},
769 { "vs38", 38, PPC_OPERAND_VSR
},
770 { "vs39", 39, PPC_OPERAND_VSR
},
771 { "vs4", 4, PPC_OPERAND_VSR
},
772 { "vs40", 40, PPC_OPERAND_VSR
},
773 { "vs41", 41, PPC_OPERAND_VSR
},
774 { "vs42", 42, PPC_OPERAND_VSR
},
775 { "vs43", 43, PPC_OPERAND_VSR
},
776 { "vs44", 44, PPC_OPERAND_VSR
},
777 { "vs45", 45, PPC_OPERAND_VSR
},
778 { "vs46", 46, PPC_OPERAND_VSR
},
779 { "vs47", 47, PPC_OPERAND_VSR
},
780 { "vs48", 48, PPC_OPERAND_VSR
},
781 { "vs49", 49, PPC_OPERAND_VSR
},
782 { "vs5", 5, PPC_OPERAND_VSR
},
783 { "vs50", 50, PPC_OPERAND_VSR
},
784 { "vs51", 51, PPC_OPERAND_VSR
},
785 { "vs52", 52, PPC_OPERAND_VSR
},
786 { "vs53", 53, PPC_OPERAND_VSR
},
787 { "vs54", 54, PPC_OPERAND_VSR
},
788 { "vs55", 55, PPC_OPERAND_VSR
},
789 { "vs56", 56, PPC_OPERAND_VSR
},
790 { "vs57", 57, PPC_OPERAND_VSR
},
791 { "vs58", 58, PPC_OPERAND_VSR
},
792 { "vs59", 59, PPC_OPERAND_VSR
},
793 { "vs6", 6, PPC_OPERAND_VSR
},
794 { "vs60", 60, PPC_OPERAND_VSR
},
795 { "vs61", 61, PPC_OPERAND_VSR
},
796 { "vs62", 62, PPC_OPERAND_VSR
},
797 { "vs63", 63, PPC_OPERAND_VSR
},
798 { "vs7", 7, PPC_OPERAND_VSR
},
799 { "vs8", 8, PPC_OPERAND_VSR
},
800 { "vs9", 9, PPC_OPERAND_VSR
},
802 { "xer", 1, PPC_OPERAND_SPR
}
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
810 static const struct pd_reg
*
811 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
813 int middle
, low
, high
;
821 middle
= (low
+ high
) / 2;
822 cmp
= strcasecmp (name
, regs
[middle
].name
);
828 return ®s
[middle
];
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS
*expressionP
)
850 const struct pd_reg
*reg
;
855 /* Find the spelling of the operand. */
856 start
= name
= input_line_pointer
;
857 if (name
[0] == '%' && ISALPHA (name
[1]))
858 name
= ++input_line_pointer
;
860 else if (!reg_names_p
|| !ISALPHA (name
[0]))
863 c
= get_symbol_name (&name
);
864 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
866 /* Put back the delimiting char. */
867 *input_line_pointer
= c
;
869 /* Look to see if it's in the register table. */
872 expressionP
->X_op
= O_register
;
873 expressionP
->X_add_number
= reg
->value
;
874 expressionP
->X_md
= reg
->flags
;
876 /* Make the rest nice. */
877 expressionP
->X_add_symbol
= NULL
;
878 expressionP
->X_op_symbol
= NULL
;
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer
= start
;
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand
;
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names
[] =
897 { "cr0", 0, PPC_OPERAND_CR_REG
},
898 { "cr1", 1, PPC_OPERAND_CR_REG
},
899 { "cr2", 2, PPC_OPERAND_CR_REG
},
900 { "cr3", 3, PPC_OPERAND_CR_REG
},
901 { "cr4", 4, PPC_OPERAND_CR_REG
},
902 { "cr5", 5, PPC_OPERAND_CR_REG
},
903 { "cr6", 6, PPC_OPERAND_CR_REG
},
904 { "cr7", 7, PPC_OPERAND_CR_REG
},
905 { "eq", 2, PPC_OPERAND_CR_BIT
},
906 { "gt", 1, PPC_OPERAND_CR_BIT
},
907 { "lt", 0, PPC_OPERAND_CR_BIT
},
908 { "so", 3, PPC_OPERAND_CR_BIT
},
909 { "un", 3, PPC_OPERAND_CR_BIT
}
912 /* Parsing function. This returns non-zero if it recognized an
916 ppc_parse_name (const char *name
, expressionS
*exp
)
918 const struct pd_reg
*reg
;
925 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
930 exp
->X_op
= O_register
;
931 exp
->X_add_number
= reg
->value
;
932 exp
->X_md
= reg
->flags
;
937 /* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
941 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
943 /* Accept 4*cr<n> and cr<n>*4. */
945 && ((right
->X_op
== O_register
946 && right
->X_md
== PPC_OPERAND_CR_REG
947 && left
->X_op
== O_constant
948 && left
->X_add_number
== 4)
949 || (left
->X_op
== O_register
950 && left
->X_md
== PPC_OPERAND_CR_REG
951 && right
->X_op
== O_constant
952 && right
->X_add_number
== 4)))
954 left
->X_op
= O_register
;
955 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
956 left
->X_add_number
*= right
->X_add_number
;
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right
->X_op
== O_register
962 && left
->X_op
== O_register
964 && ((right
->X_md
== PPC_OPERAND_CR_BIT
965 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
966 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
967 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
969 left
->X_md
= PPC_OPERAND_CR_BIT
;
970 right
->X_op
= O_constant
;
974 /* Accept reg +/- constant. */
975 if (left
->X_op
== O_register
976 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
977 as_warn (_("invalid register expression"));
979 /* Accept constant + reg. */
980 if (right
->X_op
== O_register
)
982 if (op
== O_add
&& left
->X_op
== O_constant
)
983 left
->X_md
= right
->X_md
;
985 as_warn (_("invalid register expression"));
991 /* Local variables. */
993 /* Whether to target xcoff64/elf64. */
994 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
996 /* Opcode hash table. */
997 static struct hash_control
*ppc_hash
;
999 /* Macro hash table. */
1000 static struct hash_control
*ppc_macro_hash
;
1003 /* What type of shared library support to use. */
1004 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
1006 /* Flags to set in the elf header. */
1007 static flagword ppc_flags
= 0;
1009 /* Whether this is Solaris or not. */
1010 #ifdef TARGET_SOLARIS_COMMENT
1011 #define SOLARIS_P TRUE
1013 #define SOLARIS_P FALSE
1016 static bfd_boolean msolaris
= SOLARIS_P
;
1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1027 /* Next subsegment to allocate within the .text segment. */
1028 static subsegT ppc_text_subsegment
= 2;
1030 /* Linked list of csects in the text section. */
1031 static symbolS
*ppc_text_csects
;
1033 /* Next subsegment to allocate within the .data segment. */
1034 static subsegT ppc_data_subsegment
= 2;
1036 /* Linked list of csects in the data section. */
1037 static symbolS
*ppc_data_csects
;
1039 /* The current csect. */
1040 static symbolS
*ppc_current_csect
;
1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047 static symbolS
*ppc_toc_csect
;
1049 /* The first frag in the TOC subsegment. */
1050 static fragS
*ppc_toc_frag
;
1052 /* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054 static fragS
*ppc_after_toc_frag
;
1056 /* The current static block. */
1057 static symbolS
*ppc_current_block
;
1059 /* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062 static asection
*ppc_coff_debug_section
;
1064 /* Structure to set the length field of the dwarf sections. */
1065 struct dw_subsection
{
1066 /* Subsections are simply linked. */
1067 struct dw_subsection
*link
;
1069 /* The subsection number. */
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp
;
1076 static struct dw_section
{
1077 /* Corresponding section. */
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection
*list_subseg
;
1083 /* The anonymous subsection. */
1084 struct dw_subsection
*anon_subseg
;
1085 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1086 #endif /* OBJ_XCOFF */
1090 /* Various sections that we need for PE coff support. */
1091 static segT ydata_section
;
1092 static segT pdata_section
;
1093 static segT reldata_section
;
1094 static segT rdata_section
;
1095 static segT tocdata_section
;
1097 /* The current section and the previous section. See ppc_previous. */
1098 static segT ppc_previous_section
;
1099 static segT ppc_current_section
;
1104 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105 unsigned long *ppc_apuinfo_list
;
1106 unsigned int ppc_apuinfo_num
;
1107 unsigned int ppc_apuinfo_num_alloc
;
1108 #endif /* OBJ_ELF */
1111 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1113 const char *const md_shortopts
= "um:";
1115 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1116 const struct option md_longopts
[] = {
1117 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1118 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1119 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1120 {NULL
, no_argument
, NULL
, 0}
1122 const size_t md_longopts_size
= sizeof (md_longopts
);
1125 md_parse_option (int c
, const char *arg
)
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg
, "e") == 0)
1142 target_big_endian
= 0;
1143 set_target_endian
= 1;
1144 if (ppc_cpu
& PPC_OPCODE_VLE
)
1145 as_bad (_("the use of -mvle requires big endian."));
1153 if (strcmp (arg
, "e") == 0)
1155 target_big_endian
= 1;
1156 set_target_endian
= 1;
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1168 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1178 if (strcmp (arg
, "64") == 0)
1182 if (ppc_cpu
& PPC_OPCODE_VLE
)
1183 as_bad (_("the use of -mvle requires -a32."));
1185 as_fatal (_("%s unsupported"), "-a64");
1188 else if (strcmp (arg
, "32") == 0)
1195 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1199 if (strcmp (arg
, "vle") == 0)
1201 if (set_target_endian
&& target_big_endian
== 0)
1202 as_bad (_("the use of -mvle requires big endian."));
1204 as_bad (_("the use of -mvle requires -a32."));
1208 else if (strcmp (arg
, "regnames") == 0)
1211 else if (strcmp (arg
, "no-regnames") == 0)
1212 reg_names_p
= FALSE
;
1215 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1216 that require relocation. */
1217 else if (strcmp (arg
, "relocatable") == 0)
1219 shlib
= SHLIB_MRELOCATABLE
;
1220 ppc_flags
|= EF_PPC_RELOCATABLE
;
1223 else if (strcmp (arg
, "relocatable-lib") == 0)
1225 shlib
= SHLIB_MRELOCATABLE
;
1226 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1229 /* -memb, set embedded bit. */
1230 else if (strcmp (arg
, "emb") == 0)
1231 ppc_flags
|= EF_PPC_EMB
;
1233 /* -mlittle/-mbig set the endianness. */
1234 else if (strcmp (arg
, "little") == 0
1235 || strcmp (arg
, "little-endian") == 0)
1237 target_big_endian
= 0;
1238 set_target_endian
= 1;
1239 if (ppc_cpu
& PPC_OPCODE_VLE
)
1240 as_bad (_("the use of -mvle requires big endian."));
1243 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1245 target_big_endian
= 1;
1246 set_target_endian
= 1;
1249 else if (strcmp (arg
, "solaris") == 0)
1252 ppc_comment_chars
= ppc_solaris_comment_chars
;
1255 else if (strcmp (arg
, "no-solaris") == 0)
1258 ppc_comment_chars
= ppc_eabi_comment_chars
;
1263 as_bad (_("invalid switch -m%s"), arg
);
1269 /* -V: SVR4 argument to print version ID. */
1271 print_version_id ();
1274 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1275 should be emitted or not. FIXME: Not implemented. */
1279 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1280 rather than .stabs.excl, which is ignored by the linker.
1281 FIXME: Not implemented. */
1292 nop_limit
= strtoul (optarg
, &end
, 0);
1294 as_bad (_("--nops needs a numeric argument"));
1309 md_show_usage (FILE *stream
)
1311 fprintf (stream
, _("\
1313 -a32 generate ELF32/XCOFF32\n\
1314 -a64 generate ELF64/XCOFF64\n\
1316 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1317 -mpwr generate code for POWER (RIOS1)\n\
1318 -m601 generate code for PowerPC 601\n\
1319 -mppc, -mppc32, -m603, -m604\n\
1320 generate code for PowerPC 603/604\n\
1321 -m403 generate code for PowerPC 403\n\
1322 -m405 generate code for PowerPC 405\n\
1323 -m440 generate code for PowerPC 440\n\
1324 -m464 generate code for PowerPC 464\n\
1325 -m476 generate code for PowerPC 476\n\
1326 -m7400, -m7410, -m7450, -m7455\n\
1327 generate code for PowerPC 7400/7410/7450/7455\n\
1328 -m750cl generate code for PowerPC 750cl\n\
1329 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1330 fprintf (stream
, _("\
1331 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1332 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1333 -mbooke generate code for 32-bit PowerPC BookE\n\
1334 -ma2 generate code for A2 architecture\n\
1335 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1336 -mpower5, -mpwr5, -mpwr5x\n\
1337 generate code for Power5 architecture\n\
1338 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1339 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1340 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1341 -mpower9, -mpwr9 generate code for Power9 architecture\n\
1342 -mcell generate code for Cell Broadband Engine architecture\n\
1343 -mcom generate code for Power/PowerPC common instructions\n\
1344 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1345 fprintf (stream
, _("\
1346 -maltivec generate code for AltiVec\n\
1347 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1348 -mhtm generate code for Hardware Transactional Memory\n\
1349 -me300 generate code for PowerPC e300 family\n\
1350 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1351 -me500mc, generate code for Freescale e500mc core complex\n\
1352 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1353 -me5500, generate code for Freescale e5500 core complex\n\
1354 -me6500, generate code for Freescale e6500 core complex\n\
1355 -mspe generate code for Motorola SPE instructions\n\
1356 -mvle generate code for Freescale VLE instructions\n\
1357 -mtitan generate code for AppliedMicro Titan core complex\n\
1358 -mregnames Allow symbolic names for registers\n\
1359 -mno-regnames Do not allow symbolic names for registers\n"));
1361 fprintf (stream
, _("\
1362 -mrelocatable support for GCC's -mrelocatble option\n\
1363 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1364 -memb set PPC_EMB bit in ELF flags\n\
1365 -mlittle, -mlittle-endian, -le\n\
1366 generate code for a little endian machine\n\
1367 -mbig, -mbig-endian, -be\n\
1368 generate code for a big endian machine\n\
1369 -msolaris generate code for Solaris\n\
1370 -mno-solaris do not generate code for Solaris\n\
1371 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1372 -V print assembler version number\n\
1373 -Qy, -Qn ignored\n"));
1375 fprintf (stream
, _("\
1376 -nops=count when aligning, more than COUNT nops uses a branch\n\
1377 -ppc476-workaround warn if emitting data to code sections\n"));
1380 /* Set ppc_cpu if it is not already set. */
1385 const char *default_os
= TARGET_OS
;
1386 const char *default_cpu
= TARGET_CPU
;
1388 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1391 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1392 else if (strncmp (default_os
, "aix", 3) == 0
1393 && default_os
[3] >= '4' && default_os
[3] <= '9')
1394 ppc_cpu
|= PPC_OPCODE_COMMON
;
1395 else if (strncmp (default_os
, "aix3", 4) == 0)
1396 ppc_cpu
|= PPC_OPCODE_POWER
;
1397 else if (strcmp (default_cpu
, "rs6000") == 0)
1398 ppc_cpu
|= PPC_OPCODE_POWER
;
1399 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1400 ppc_cpu
|= PPC_OPCODE_PPC
;
1402 as_fatal (_("unknown default cpu = %s, os = %s"),
1403 default_cpu
, default_os
);
1407 /* Figure out the BFD architecture to use. This function and ppc_mach
1408 are called well before md_begin, when the output file is opened. */
1410 enum bfd_architecture
1413 const char *default_cpu
= TARGET_CPU
;
1416 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1417 return bfd_arch_powerpc
;
1418 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1419 return bfd_arch_powerpc
;
1420 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1421 return bfd_arch_rs6000
;
1422 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1424 if (strcmp (default_cpu
, "rs6000") == 0)
1425 return bfd_arch_rs6000
;
1426 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1427 return bfd_arch_powerpc
;
1430 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1431 return bfd_arch_unknown
;
1438 return bfd_mach_ppc64
;
1439 else if (ppc_arch () == bfd_arch_rs6000
)
1440 return bfd_mach_rs6k
;
1441 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1442 return bfd_mach_ppc_titan
;
1443 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1444 return bfd_mach_ppc_vle
;
1446 return bfd_mach_ppc
;
1450 ppc_target_format (void)
1454 return target_big_endian
? "pe-powerpc" : "pe-powerpcle";
1456 return "xcoff-powermac";
1459 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1461 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1467 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1468 # elif defined (TE_VXWORKS)
1469 return "elf32-powerpc-vxworks";
1471 return (target_big_endian
1472 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1473 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1478 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1479 Return TRUE if there's a problem, otherwise FALSE. */
1482 insn_validate (const struct powerpc_opcode
*op
)
1484 const unsigned char *o
;
1485 unsigned long omask
= op
->mask
;
1487 /* The mask had better not trim off opcode bits. */
1488 if ((op
->opcode
& omask
) != op
->opcode
)
1490 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1494 /* The operands must not overlap the opcode or each other. */
1495 for (o
= op
->operands
; *o
; ++o
)
1497 if (*o
>= num_powerpc_operands
)
1499 as_bad (_("operand index error for %s"), op
->name
);
1504 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1505 if (operand
->shift
!= (int) PPC_OPSHIFT_INV
)
1509 if (operand
->shift
>= 0)
1510 mask
= operand
->bitm
<< operand
->shift
;
1512 mask
= operand
->bitm
>> -operand
->shift
;
1515 as_bad (_("operand %d overlap in %s"),
1516 (int) (o
- op
->operands
), op
->name
);
1526 /* Insert opcodes and macros into hash tables. Called at startup and
1527 for .machine pseudo. */
1530 ppc_setup_opcodes (void)
1532 const struct powerpc_opcode
*op
;
1533 const struct powerpc_opcode
*op_end
;
1534 const struct powerpc_macro
*macro
;
1535 const struct powerpc_macro
*macro_end
;
1536 bfd_boolean bad_insn
= FALSE
;
1538 if (ppc_hash
!= NULL
)
1539 hash_die (ppc_hash
);
1540 if (ppc_macro_hash
!= NULL
)
1541 hash_die (ppc_macro_hash
);
1543 /* Insert the opcodes into a hash table. */
1544 ppc_hash
= hash_new ();
1546 if (ENABLE_CHECKING
)
1550 /* An index into powerpc_operands is stored in struct fix
1551 fx_pcrel_adjust which is 8 bits wide. */
1552 gas_assert (num_powerpc_operands
< 256);
1554 /* Check operand masks. Code here and in the disassembler assumes
1555 all the 1's in the mask are contiguous. */
1556 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1558 unsigned long mask
= powerpc_operands
[i
].bitm
;
1559 unsigned long right_bit
;
1562 right_bit
= mask
& -mask
;
1564 right_bit
= mask
& -mask
;
1565 if (mask
!= right_bit
)
1567 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1570 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1571 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1572 sizeof (powerpc_operands
[0])) == 0)
1574 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1581 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1582 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1584 if (ENABLE_CHECKING
)
1586 if (op
!= powerpc_opcodes
)
1588 int old_opcode
= PPC_OP (op
[-1].opcode
);
1589 int new_opcode
= PPC_OP (op
[0].opcode
);
1591 #ifdef PRINT_OPCODE_TABLE
1592 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1593 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1594 (unsigned int) new_opcode
, (unsigned int) op
->opcode
,
1595 (unsigned int) op
->mask
, (unsigned long long) op
->flags
);
1598 /* The major opcodes had better be sorted. Code in the
1599 disassembler assumes the insns are sorted according to
1601 if (new_opcode
< old_opcode
)
1603 as_bad (_("major opcode is not sorted for %s"),
1608 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1610 as_bad (_("%s is enabled by vle flag"), op
->name
);
1613 if (PPC_OP (op
->opcode
) != 4
1614 && PPC_OP (op
->opcode
) != 31
1615 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1617 as_bad (_("%s not disabled by vle flag"), op
->name
);
1620 bad_insn
|= insn_validate (op
);
1623 if ((ppc_cpu
& op
->flags
) != 0
1624 && !(ppc_cpu
& op
->deprecated
))
1628 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1631 as_bad (_("duplicate instruction %s"),
1638 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1639 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1640 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1642 op_end
= vle_opcodes
+ vle_num_opcodes
;
1643 for (op
= vle_opcodes
; op
< op_end
; op
++)
1645 if (ENABLE_CHECKING
)
1647 if (op
!= vle_opcodes
)
1649 unsigned old_seg
, new_seg
;
1651 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1652 old_seg
= VLE_OP_TO_SEG (old_seg
);
1653 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1654 new_seg
= VLE_OP_TO_SEG (new_seg
);
1656 #ifdef PRINT_OPCODE_TABLE
1657 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1658 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1659 (unsigned int) new_seg
, (unsigned int) op
->opcode
,
1660 (unsigned int) op
->mask
, (unsigned long long) op
->flags
);
1662 /* The major opcodes had better be sorted. Code in the
1663 disassembler assumes the insns are sorted according to
1665 if (new_seg
< old_seg
)
1667 as_bad (_("major opcode is not sorted for %s"),
1673 bad_insn
|= insn_validate (op
);
1676 if ((ppc_cpu
& op
->flags
) != 0
1677 && !(ppc_cpu
& op
->deprecated
))
1681 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1684 as_bad (_("duplicate instruction %s"),
1691 /* Insert the macros into a hash table. */
1692 ppc_macro_hash
= hash_new ();
1694 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1695 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1697 if ((macro
->flags
& ppc_cpu
) != 0 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1701 retval
= hash_insert (ppc_macro_hash
, macro
->name
, (void *) macro
);
1702 if (retval
!= (const char *) NULL
)
1704 as_bad (_("duplicate macro %s"), macro
->name
);
1714 /* This function is called when the assembler starts up. It is called
1715 after the options have been parsed and the output file has been
1723 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1724 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1727 /* Set the ELF flags if desired. */
1728 if (ppc_flags
&& !msolaris
)
1729 bfd_set_private_flags (stdoutput
, ppc_flags
);
1732 ppc_setup_opcodes ();
1734 /* Tell the main code what the endianness is if it is not overridden
1736 if (!set_target_endian
)
1738 set_target_endian
= 1;
1739 target_big_endian
= PPC_BIG_ENDIAN
;
1743 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1745 /* Create dummy symbols to serve as initial csects. This forces the
1746 text csects to precede the data csects. These symbols will not
1748 ppc_text_csects
= symbol_make ("dummy\001");
1749 symbol_get_tc (ppc_text_csects
)->within
= ppc_text_csects
;
1750 ppc_data_csects
= symbol_make ("dummy\001");
1751 symbol_get_tc (ppc_data_csects
)->within
= ppc_data_csects
;
1756 ppc_current_section
= text_section
;
1757 ppc_previous_section
= 0;
1766 if (ppc_apuinfo_list
== NULL
)
1769 /* Ok, so write the section info out. We have this layout:
1773 0 8 length of "APUinfo\0"
1774 4 (n*4) number of APU's (4 bytes each)
1777 20 APU#1 first APU's info
1778 24 APU#2 second APU's info
1783 asection
*seg
= now_seg
;
1784 subsegT subseg
= now_subseg
;
1785 asection
*apuinfo_secp
= (asection
*) NULL
;
1788 /* Create the .PPC.EMB.apuinfo section. */
1789 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1790 bfd_set_section_flags (stdoutput
,
1792 SEC_HAS_CONTENTS
| SEC_READONLY
);
1795 md_number_to_chars (p
, (valueT
) 8, 4);
1798 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1801 md_number_to_chars (p
, (valueT
) 2, 4);
1804 strcpy (p
, APUINFO_LABEL
);
1806 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1809 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1812 frag_align (2, 0, 0);
1814 /* We probably can't restore the current segment, for there likely
1817 subseg_set (seg
, subseg
);
1822 /* Insert an operand value into an instruction. */
1824 static unsigned long
1825 ppc_insert_operand (unsigned long insn
,
1826 const struct powerpc_operand
*operand
,
1832 long min
, max
, right
;
1834 max
= operand
->bitm
;
1838 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
1840 /* Extend the allowed range for addis to [-32768, 65535].
1841 Similarly for cmpli and some VLE high part insns. For 64-bit
1842 it would be good to disable this for signed fields since the
1843 value is sign extended into the high 32 bits of the register.
1844 If the value is, say, an address, then we might care about
1845 the high bits. However, gcc as of 2014-06 uses unsigned
1846 values when loading the high part of 64-bit constants using
1848 min
= ~(max
>> 1) & -right
;
1850 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
1852 max
= (max
>> 1) & -right
;
1853 min
= ~max
& -right
;
1856 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1859 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1868 /* Some people write constants with the sign extension done by
1869 hand but only up to 32 bits. This shouldn't really be valid,
1870 but, to permit this code to assemble on a 64-bit host, we
1871 sign extend the 32-bit value to 64 bits if so doing makes the
1874 && (offsetT
) (val
- 0x80000000 - 0x80000000) >= min
1875 && (offsetT
) (val
- 0x80000000 - 0x80000000) <= max
1876 && ((val
- 0x80000000 - 0x80000000) & (right
- 1)) == 0)
1877 val
= val
- 0x80000000 - 0x80000000;
1879 /* Similarly, people write expressions like ~(1<<15), and expect
1880 this to be OK for a 32-bit unsigned value. */
1882 && (offsetT
) (val
+ 0x80000000 + 0x80000000) >= min
1883 && (offsetT
) (val
+ 0x80000000 + 0x80000000) <= max
1884 && ((val
+ 0x80000000 + 0x80000000) & (right
- 1)) == 0)
1885 val
= val
+ 0x80000000 + 0x80000000;
1889 || (val
& (right
- 1)) != 0)
1890 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
1893 if (operand
->insert
)
1898 insn
= (*operand
->insert
) (insn
, (long) val
, cpu
, &errmsg
);
1899 if (errmsg
!= (const char *) NULL
)
1900 as_bad_where (file
, line
, "%s", errmsg
);
1902 else if (operand
->shift
>= 0)
1903 insn
|= ((long) val
& operand
->bitm
) << operand
->shift
;
1905 insn
|= ((long) val
& operand
->bitm
) >> -operand
->shift
;
1912 /* Parse @got, etc. and return the desired relocation. */
1913 static bfd_reloc_code_real_type
1914 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
1918 unsigned int length
: 8;
1919 unsigned int valid32
: 1;
1920 unsigned int valid64
: 1;
1929 const struct map_bfd
*ptr
;
1931 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1932 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1933 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1935 static const struct map_bfd mapping
[] = {
1936 MAP ("l", BFD_RELOC_LO16
),
1937 MAP ("h", BFD_RELOC_HI16
),
1938 MAP ("ha", BFD_RELOC_HI16_S
),
1939 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
1940 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
1941 MAP ("got", BFD_RELOC_16_GOTOFF
),
1942 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
1943 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
1944 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
1945 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
1946 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
1947 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
1948 MAP ("copy", BFD_RELOC_PPC_COPY
),
1949 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
1950 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
1951 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
1952 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
1953 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
1954 MAP ("tls", BFD_RELOC_PPC_TLS
),
1955 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
1956 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
1957 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
1958 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
1959 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
1960 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
1961 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
1962 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
1963 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
1964 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
1965 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
1966 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
1967 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
1968 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
1969 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
1970 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
1971 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
1972 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
1973 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
1974 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
1975 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
1976 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
1977 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
1978 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
1979 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
1980 MAP32 ("fixup", BFD_RELOC_CTOR
),
1981 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
1982 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
1983 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
1984 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
1985 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
1986 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
1987 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
1988 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
1989 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
1990 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
1991 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
1992 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
1993 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
1994 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
1995 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
1996 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
1997 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
1998 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
1999 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2000 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2001 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2002 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2003 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2004 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2005 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2006 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2007 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2008 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2009 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2010 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2011 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2012 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2013 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2014 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2015 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2016 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2017 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2018 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2019 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2020 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2021 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2022 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2023 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2024 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2025 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2026 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2027 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2028 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2029 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2030 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2031 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2032 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2036 return BFD_RELOC_NONE
;
2038 for (ch
= *str
, str2
= ident
;
2039 (str2
< ident
+ sizeof (ident
) - 1
2040 && (ISALNUM (ch
) || ch
== '@'));
2043 *str2
++ = TOLOWER (ch
);
2050 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2051 if (ch
== ptr
->string
[0]
2052 && len
== ptr
->length
2053 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2054 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2056 int reloc
= ptr
->reloc
;
2058 if (!ppc_obj64
&& exp_p
->X_add_number
!= 0)
2062 case BFD_RELOC_16_GOTOFF
:
2063 case BFD_RELOC_LO16_GOTOFF
:
2064 case BFD_RELOC_HI16_GOTOFF
:
2065 case BFD_RELOC_HI16_S_GOTOFF
:
2066 as_warn (_("identifier+constant@got means "
2067 "identifier@got+constant"));
2070 case BFD_RELOC_PPC_GOT_TLSGD16
:
2071 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2072 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2073 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2074 case BFD_RELOC_PPC_GOT_TLSLD16
:
2075 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2076 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2077 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2078 case BFD_RELOC_PPC_GOT_DTPREL16
:
2079 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2080 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2081 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2082 case BFD_RELOC_PPC_GOT_TPREL16
:
2083 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2084 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2085 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2086 as_bad (_("symbol+offset not supported for got tls"));
2091 /* Now check for identifier@suffix+constant. */
2092 if (*str
== '-' || *str
== '+')
2094 char *orig_line
= input_line_pointer
;
2095 expressionS new_exp
;
2097 input_line_pointer
= str
;
2098 expression (&new_exp
);
2099 if (new_exp
.X_op
== O_constant
)
2101 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2102 str
= input_line_pointer
;
2105 if (&input_line_pointer
!= str_p
)
2106 input_line_pointer
= orig_line
;
2110 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2111 && exp_p
->X_op
== O_symbol
2112 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2114 /* Change the symbol so that the dummy .TOC. symbol can be
2115 omitted from the object file. */
2116 exp_p
->X_add_symbol
= &abs_symbol
;
2119 return (bfd_reloc_code_real_type
) reloc
;
2122 return BFD_RELOC_NONE
;
2125 /* Support @got, etc. on constants emitted via .short, .int etc. */
2127 bfd_reloc_code_real_type
2128 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2131 if (nbytes
>= 2 && *input_line_pointer
== '@')
2132 return ppc_elf_suffix (&input_line_pointer
, exp
);
2133 return BFD_RELOC_NONE
;
2136 /* Warn when emitting data to code sections, unless we are emitting
2137 a relocation that ld --ppc476-workaround uses to recognise data
2138 *and* there was an unconditional branch prior to the data. */
2141 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2142 unsigned int nbytes
, fixS
*fix
)
2145 && (now_seg
->flags
& SEC_CODE
) != 0
2148 || !(fix
->fx_r_type
== BFD_RELOC_32
2149 || fix
->fx_r_type
== BFD_RELOC_CTOR
2150 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2151 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2152 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2153 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2154 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2155 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2156 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2157 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2159 /* Flag that we've warned. */
2163 as_warn (_("data in executable section"));
2167 /* Solaris pseduo op to change to the .rodata section. */
2169 ppc_elf_rdata (int xxx
)
2171 char *save_line
= input_line_pointer
;
2172 static char section
[] = ".rodata\n";
2174 /* Just pretend this is .section .rodata */
2175 input_line_pointer
= section
;
2176 obj_elf_section (xxx
);
2178 input_line_pointer
= save_line
;
2181 /* Pseudo op to make file scope bss items. */
2183 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2196 c
= get_symbol_name (&name
);
2198 /* Just after name is now '\0'. */
2199 p
= input_line_pointer
;
2201 SKIP_WHITESPACE_AFTER_NAME ();
2202 if (*input_line_pointer
!= ',')
2204 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2205 ignore_rest_of_line ();
2209 input_line_pointer
++; /* skip ',' */
2210 if ((size
= get_absolute_expression ()) < 0)
2212 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2213 ignore_rest_of_line ();
2217 /* The third argument to .lcomm is the alignment. */
2218 if (*input_line_pointer
!= ',')
2222 ++input_line_pointer
;
2223 align
= get_absolute_expression ();
2226 as_warn (_("ignoring bad alignment"));
2232 symbolP
= symbol_find_or_make (name
);
2235 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2237 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2238 S_GET_NAME (symbolP
));
2239 ignore_rest_of_line ();
2243 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2245 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2246 S_GET_NAME (symbolP
),
2247 (long) S_GET_VALUE (symbolP
),
2250 ignore_rest_of_line ();
2256 old_subsec
= now_subseg
;
2259 /* Convert to a power of 2 alignment. */
2260 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2263 as_bad (_("common alignment not a power of 2"));
2264 ignore_rest_of_line ();
2271 record_alignment (bss_section
, align2
);
2272 subseg_set (bss_section
, 1);
2274 frag_align (align2
, 0, 0);
2275 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2276 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2277 symbol_set_frag (symbolP
, frag_now
);
2278 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2281 S_SET_SIZE (symbolP
, size
);
2282 S_SET_SEGMENT (symbolP
, bss_section
);
2283 subseg_set (old_sec
, old_subsec
);
2284 demand_empty_rest_of_line ();
2287 /* Pseudo op to set symbol local entry point. */
2289 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2292 char c
= get_symbol_name (&name
);
2297 elf_symbol_type
*elfsym
;
2299 p
= input_line_pointer
;
2301 SKIP_WHITESPACE_AFTER_NAME ();
2302 if (*input_line_pointer
!= ',')
2305 as_bad (_("expected comma after name `%s' in .localentry directive"),
2308 ignore_rest_of_line ();
2311 input_line_pointer
++;
2313 if (exp
.X_op
== O_absent
)
2315 as_bad (_("missing expression in .localentry directive"));
2316 exp
.X_op
= O_constant
;
2317 exp
.X_add_number
= 0;
2320 sym
= symbol_find_or_make (name
);
2323 if (resolve_expression (&exp
)
2324 && exp
.X_op
== O_constant
)
2326 unsigned char encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2328 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2329 as_bad (_(".localentry expression for `%s' "
2330 "is not a valid power of 2"), S_GET_NAME (sym
));
2333 bfdsym
= symbol_get_bfdsym (sym
);
2334 elfsym
= elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
2335 gas_assert (elfsym
);
2336 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2337 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2338 if (ppc_abiversion
== 0)
2343 as_bad (_(".localentry expression for `%s' "
2344 "does not evaluate to a constant"), S_GET_NAME (sym
));
2346 demand_empty_rest_of_line ();
2349 /* Pseudo op to set ABI version. */
2351 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2356 if (exp
.X_op
== O_absent
)
2358 as_bad (_("missing expression in .abiversion directive"));
2359 exp
.X_op
= O_constant
;
2360 exp
.X_add_number
= 0;
2363 if (resolve_expression (&exp
)
2364 && exp
.X_op
== O_constant
)
2365 ppc_abiversion
= exp
.X_add_number
;
2367 as_bad (_(".abiversion expression does not evaluate to a constant"));
2368 demand_empty_rest_of_line ();
2371 /* Parse a .gnu_attribute directive. */
2373 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2375 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2377 /* Check validity of defined powerpc tags. */
2378 if (tag
== Tag_GNU_Power_ABI_FP
2379 || tag
== Tag_GNU_Power_ABI_Vector
2380 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2384 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2386 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2387 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2388 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2389 as_warn (_("unknown .gnu_attribute value"));
2393 /* Set ABI version in output file. */
2397 if (ppc_obj64
&& ppc_abiversion
!= 0)
2399 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2400 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2404 /* Validate any relocations emitted for -mrelocatable, possibly adding
2405 fixups for word relocations in writable segments, so we can adjust
2408 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2410 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2419 case SHLIB_MRELOCATABLE
:
2420 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2421 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2422 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2423 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2424 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2425 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2426 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2427 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2428 && (seg
->flags
& SEC_LOAD
) != 0
2429 && strcmp (segment_name (seg
), ".got2") != 0
2430 && strcmp (segment_name (seg
), ".dtors") != 0
2431 && strcmp (segment_name (seg
), ".ctors") != 0
2432 && strcmp (segment_name (seg
), ".fixup") != 0
2433 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2434 && strcmp (segment_name (seg
), ".eh_frame") != 0
2435 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2437 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2438 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2440 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2441 _("relocation cannot be done when using -mrelocatable"));
2448 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2449 function descriptor sym if the corresponding code sym is used. */
2452 ppc_frob_file_before_adjust (void)
2460 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2466 name
= S_GET_NAME (symp
);
2470 if (! S_IS_WEAK (symp
)
2471 || S_IS_DEFINED (symp
))
2474 dotname
= concat (".", name
, (char *) NULL
);
2475 dotsym
= symbol_find_noref (dotname
, 1);
2477 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2478 || symbol_used_in_reloc_p (dotsym
)))
2479 symbol_mark_used (symp
);
2483 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2485 && toc_reloc_types
!= has_large_toc_reloc
2486 && bfd_section_size (stdoutput
, toc
) > 0x10000)
2487 as_warn (_("TOC section size exceeds 64k"));
2490 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2491 emitted. Other uses of .TOC. will cause the symbol to be marked
2492 with BSF_KEEP in md_apply_fix. */
2495 ppc_elf_adjust_symtab (void)
2500 symp
= symbol_find (".TOC.");
2503 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2504 if ((bsym
->flags
& BSF_KEEP
) == 0)
2505 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2509 #endif /* OBJ_ELF */
2514 * Summary of parse_toc_entry.
2516 * in: Input_line_pointer points to the '[' in one of:
2518 * [toc] [tocv] [toc32] [toc64]
2520 * Anything else is an error of one kind or another.
2523 * return value: success or failure
2524 * toc_kind: kind of toc reference
2525 * input_line_pointer:
2526 * success: first char after the ']'
2527 * failure: unchanged
2531 * [toc] - rv == success, toc_kind = default_toc
2532 * [tocv] - rv == success, toc_kind = data_in_toc
2533 * [toc32] - rv == success, toc_kind = must_be_32
2534 * [toc64] - rv == success, toc_kind = must_be_64
2538 enum toc_size_qualifier
2540 default_toc
, /* The toc cell constructed should be the system default size */
2541 data_in_toc
, /* This is a direct reference to a toc cell */
2542 must_be_32
, /* The toc cell constructed must be 32 bits wide */
2543 must_be_64
/* The toc cell constructed must be 64 bits wide */
2547 parse_toc_entry (enum toc_size_qualifier
*toc_kind
)
2552 enum toc_size_qualifier t
;
2554 /* Save the input_line_pointer. */
2555 start
= input_line_pointer
;
2557 /* Skip over the '[' , and whitespace. */
2558 ++input_line_pointer
;
2561 /* Find the spelling of the operand. */
2562 c
= get_symbol_name (&toc_spec
);
2564 if (strcmp (toc_spec
, "toc") == 0)
2568 else if (strcmp (toc_spec
, "tocv") == 0)
2572 else if (strcmp (toc_spec
, "toc32") == 0)
2576 else if (strcmp (toc_spec
, "toc64") == 0)
2582 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec
);
2583 *input_line_pointer
= c
;
2584 input_line_pointer
= start
;
2588 /* Now find the ']'. */
2589 *input_line_pointer
= c
;
2591 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2592 c
= *input_line_pointer
++; /* input_line_pointer->past char in c. */
2596 as_bad (_("syntax error: expected `]', found `%c'"), c
);
2597 input_line_pointer
= start
;
2606 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2607 /* See whether a symbol is in the TOC section. */
2610 ppc_is_toc_sym (symbolS
*sym
)
2613 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2614 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2617 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2619 return strcmp (sname
, ".toc") == 0;
2621 return strcmp (sname
, ".got") == 0;
2624 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2628 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2630 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2634 /* Check we don't already exist. */
2635 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2636 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2639 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2641 if (ppc_apuinfo_num_alloc
== 0)
2643 ppc_apuinfo_num_alloc
= 4;
2644 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2648 ppc_apuinfo_num_alloc
+= 4;
2649 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2650 ppc_apuinfo_num_alloc
);
2653 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2659 /* We need to keep a list of fixups. We can't simply generate them as
2660 we go, because that would require us to first create the frag, and
2661 that would screw up references to ``.''. */
2667 bfd_reloc_code_real_type reloc
;
2670 #define MAX_INSN_FIXUPS (5)
2672 /* This routine is called for each instruction to be assembled. */
2675 md_assemble (char *str
)
2678 const struct powerpc_opcode
*opcode
;
2680 const unsigned char *opindex_ptr
;
2684 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
2689 unsigned int insn_length
;
2691 /* Get the opcode. */
2692 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
2697 /* Look up the opcode in the hash table. */
2698 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, str
);
2699 if (opcode
== (const struct powerpc_opcode
*) NULL
)
2701 const struct powerpc_macro
*macro
;
2703 macro
= (const struct powerpc_macro
*) hash_find (ppc_macro_hash
, str
);
2704 if (macro
== (const struct powerpc_macro
*) NULL
)
2705 as_bad (_("unrecognized opcode: `%s'"), str
);
2707 ppc_macro (s
, macro
);
2712 insn
= opcode
->opcode
;
2715 while (ISSPACE (*str
))
2718 /* PowerPC operands are just expressions. The only real issue is
2719 that a few operand types are optional. All cases which might use
2720 an optional operand separate the operands only with commas (in some
2721 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2722 have optional operands). Most instructions with optional operands
2723 have only one. Those that have more than one optional operand can
2724 take either all their operands or none. So, before we start seriously
2725 parsing the operands, we check to see if we have optional operands,
2726 and if we do, we count the number of commas to see which operands
2727 have been omitted. */
2729 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
2731 const struct powerpc_operand
*operand
;
2733 operand
= &powerpc_operands
[*opindex_ptr
];
2734 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
2735 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
2737 unsigned int opcount
;
2738 unsigned int num_operands_expected
;
2740 /* There is an optional operand. Count the number of
2741 commas in the input line. */
2748 while ((s
= strchr (s
, ',')) != (char *) NULL
)
2755 /* Compute the number of expected operands.
2756 Do not count fake operands. */
2757 for (num_operands_expected
= 0, i
= 0; opcode
->operands
[i
]; i
++)
2758 if ((powerpc_operands
[opcode
->operands
[i
]].flags
& PPC_OPERAND_FAKE
) == 0)
2759 ++ num_operands_expected
;
2761 /* If there are fewer operands in the line then are called
2762 for by the instruction, we want to skip the optional
2764 if (opcount
< num_operands_expected
)
2771 /* Gather the operands. */
2775 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
2777 const struct powerpc_operand
*operand
;
2783 if (next_opindex
== 0)
2784 operand
= &powerpc_operands
[*opindex_ptr
];
2787 operand
= &powerpc_operands
[next_opindex
];
2792 /* If this is a fake operand, then we do not expect anything
2794 if ((operand
->flags
& PPC_OPERAND_FAKE
) != 0)
2796 insn
= (*operand
->insert
) (insn
, 0L, ppc_cpu
, &errmsg
);
2797 if (errmsg
!= (const char *) NULL
)
2798 as_bad ("%s", errmsg
);
2802 /* If this is an optional operand, and we are skipping it, just
2804 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
2805 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
)
2808 long val
= ppc_optional_operand_value (operand
);
2809 if (operand
->insert
)
2811 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
2812 if (errmsg
!= (const char *) NULL
)
2813 as_bad ("%s", errmsg
);
2815 else if (operand
->shift
>= 0)
2816 insn
|= ((long) val
& operand
->bitm
) << operand
->shift
;
2818 insn
|= ((long) val
& operand
->bitm
) >> -operand
->shift
;
2820 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
2821 next_opindex
= *opindex_ptr
+ 1;
2825 /* Gather the operand. */
2826 hold
= input_line_pointer
;
2827 input_line_pointer
= str
;
2830 if (*input_line_pointer
== '[')
2832 /* We are expecting something like the second argument here:
2834 * lwz r4,[toc].GS.0.static_int(rtoc)
2835 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2836 * The argument following the `]' must be a symbol name, and the
2837 * register must be the toc register: 'rtoc' or '2'
2839 * The effect is to 0 as the displacement field
2840 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2841 * the appropriate variation) reloc against it based on the symbol.
2842 * The linker will build the toc, and insert the resolved toc offset.
2845 * o The size of the toc entry is currently assumed to be
2846 * 32 bits. This should not be assumed to be a hard coded
2848 * o In an effort to cope with a change from 32 to 64 bits,
2849 * there are also toc entries that are specified to be
2850 * either 32 or 64 bits:
2851 * lwz r4,[toc32].GS.0.static_int(rtoc)
2852 * lwz r4,[toc64].GS.0.static_int(rtoc)
2853 * These demand toc entries of the specified size, and the
2854 * instruction probably requires it.
2858 enum toc_size_qualifier toc_kind
;
2859 bfd_reloc_code_real_type toc_reloc
;
2861 /* Go parse off the [tocXX] part. */
2862 valid_toc
= parse_toc_entry (&toc_kind
);
2866 ignore_rest_of_line ();
2870 /* Now get the symbol following the ']'. */
2876 /* In this case, we may not have seen the symbol yet,
2877 since it is allowed to appear on a .extern or .globl
2878 or just be a label in the .data section. */
2879 toc_reloc
= BFD_RELOC_PPC_TOC16
;
2882 /* 1. The symbol must be defined and either in the toc
2883 section, or a global.
2884 2. The reloc generated must have the TOCDEFN flag set
2885 in upper bit mess of the reloc type.
2886 FIXME: It's a little confusing what the tocv
2887 qualifier can be used for. At the very least, I've
2888 seen three uses, only one of which I'm sure I can
2890 if (ex
.X_op
== O_symbol
)
2892 gas_assert (ex
.X_add_symbol
!= NULL
);
2893 if (symbol_get_bfdsym (ex
.X_add_symbol
)->section
2896 as_bad (_("[tocv] symbol is not a toc symbol"));
2900 toc_reloc
= BFD_RELOC_PPC_TOC16
;
2903 /* FIXME: these next two specifically specify 32/64 bit
2904 toc entries. We don't support them today. Is this
2905 the right way to say that? */
2906 toc_reloc
= BFD_RELOC_NONE
;
2907 as_bad (_("unimplemented toc32 expression modifier"));
2910 /* FIXME: see above. */
2911 toc_reloc
= BFD_RELOC_NONE
;
2912 as_bad (_("unimplemented toc64 expression modifier"));
2916 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2922 /* We need to generate a fixup for this expression. */
2923 if (fc
>= MAX_INSN_FIXUPS
)
2924 as_fatal (_("too many fixups"));
2926 fixups
[fc
].reloc
= toc_reloc
;
2927 fixups
[fc
].exp
= ex
;
2928 fixups
[fc
].opindex
= *opindex_ptr
;
2931 /* Ok. We've set up the fixup for the instruction. Now make it
2932 look like the constant 0 was found here. */
2934 ex
.X_op
= O_constant
;
2935 ex
.X_add_number
= 0;
2936 ex
.X_add_symbol
= NULL
;
2937 ex
.X_op_symbol
= NULL
;
2944 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
2945 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
2946 || !register_name (&ex
))
2948 char save_lex
= lex_type
['%'];
2950 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
2951 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
2954 lex_type
['%'] |= LEX_BEGIN_NAME
;
2958 lex_type
['%'] = save_lex
;
2962 str
= input_line_pointer
;
2963 input_line_pointer
= hold
;
2965 if (ex
.X_op
== O_illegal
)
2966 as_bad (_("illegal operand"));
2967 else if (ex
.X_op
== O_absent
)
2968 as_bad (_("missing operand"));
2969 else if (ex
.X_op
== O_register
)
2973 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
2974 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
2975 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
)) != 0
2976 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
2977 && ex
.X_add_number
!= 0
2978 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
2979 as_warn (_("invalid register expression"));
2980 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
& 0xff,
2981 ppc_cpu
, (char *) NULL
, 0);
2983 else if (ex
.X_op
== O_constant
)
2986 /* Allow @HA, @L, @H on constants. */
2987 bfd_reloc_code_real_type reloc
;
2988 char *orig_str
= str
;
2990 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
2997 case BFD_RELOC_LO16
:
2998 ex
.X_add_number
&= 0xffff;
2999 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3000 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3003 case BFD_RELOC_HI16
:
3004 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3006 /* PowerPC64 @h is tested for overflow. */
3007 ex
.X_add_number
= (addressT
) ex
.X_add_number
>> 16;
3008 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3010 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3012 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3018 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3019 ex
.X_add_number
= PPC_HI (ex
.X_add_number
);
3020 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3021 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3024 case BFD_RELOC_HI16_S
:
3025 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3027 /* PowerPC64 @ha is tested for overflow. */
3029 = ((addressT
) ex
.X_add_number
+ 0x8000) >> 16;
3030 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3032 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3034 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3040 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3041 ex
.X_add_number
= PPC_HA (ex
.X_add_number
);
3042 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3043 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3046 case BFD_RELOC_PPC64_HIGHER
:
3047 ex
.X_add_number
= PPC_HIGHER (ex
.X_add_number
);
3048 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3049 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3052 case BFD_RELOC_PPC64_HIGHER_S
:
3053 ex
.X_add_number
= PPC_HIGHERA (ex
.X_add_number
);
3054 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3055 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3058 case BFD_RELOC_PPC64_HIGHEST
:
3059 ex
.X_add_number
= PPC_HIGHEST (ex
.X_add_number
);
3060 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3061 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3064 case BFD_RELOC_PPC64_HIGHEST_S
:
3065 ex
.X_add_number
= PPC_HIGHESTA (ex
.X_add_number
);
3066 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3067 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3070 #endif /* OBJ_ELF */
3071 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3072 ppc_cpu
, (char *) NULL
, 0);
3076 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3078 if (ex
.X_op
== O_symbol
&& str
[0] == '(')
3080 const char *sym_name
= S_GET_NAME (ex
.X_add_symbol
);
3081 if (sym_name
[0] == '.')
3084 if (strcasecmp (sym_name
, "__tls_get_addr") == 0)
3086 expressionS tls_exp
;
3088 hold
= input_line_pointer
;
3089 input_line_pointer
= str
+ 1;
3090 expression (&tls_exp
);
3091 if (tls_exp
.X_op
== O_symbol
)
3093 reloc
= BFD_RELOC_NONE
;
3094 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3096 reloc
= BFD_RELOC_PPC_TLSGD
;
3097 input_line_pointer
+= 7;
3099 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3101 reloc
= BFD_RELOC_PPC_TLSLD
;
3102 input_line_pointer
+= 7;
3104 if (reloc
!= BFD_RELOC_NONE
)
3107 str
= input_line_pointer
;
3109 if (fc
>= MAX_INSN_FIXUPS
)
3110 as_fatal (_("too many fixups"));
3111 fixups
[fc
].exp
= tls_exp
;
3112 fixups
[fc
].opindex
= *opindex_ptr
;
3113 fixups
[fc
].reloc
= reloc
;
3117 input_line_pointer
= hold
;
3121 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3123 /* Some TLS tweaks. */
3129 case BFD_RELOC_PPC_TLS
:
3130 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3131 as_bad (_("@tls may not be used with \"%s\" operands"),
3133 else if (operand
->shift
!= 11)
3134 as_bad (_("@tls may only be used in last operand"));
3136 insn
= ppc_insert_operand (insn
, operand
,
3138 ppc_cpu
, (char *) NULL
, 0);
3141 /* We'll only use the 32 (or 64) bit form of these relocations
3142 in constants. Instructions get the 16 bit form. */
3143 case BFD_RELOC_PPC_DTPREL
:
3144 reloc
= BFD_RELOC_PPC_DTPREL16
;
3146 case BFD_RELOC_PPC_TPREL
:
3147 reloc
= BFD_RELOC_PPC_TPREL16
;
3152 if (opcode
->opcode
== (19 << 26) + (2 << 1)
3153 && reloc
== BFD_RELOC_HI16_S
)
3154 reloc
= BFD_RELOC_PPC_16DX_HA
;
3156 /* If VLE-mode convert LO/HI/HA relocations. */
3157 if (opcode
->flags
& PPC_OPCODE_VLE
)
3159 int tmp_insn
= insn
& opcode
->mask
;
3161 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3162 || tmp_insn
== E_AND2I_DOT_INSN
3163 || tmp_insn
== E_OR2IS_INSN
3164 || tmp_insn
== E_LIS_INSN
3165 || tmp_insn
== E_AND2IS_DOT_INSN
);
3168 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3169 || tmp_insn
== E_ADD2IS_INSN
3170 || tmp_insn
== E_CMP16I_INSN
3171 || tmp_insn
== E_MULL2I_INSN
3172 || tmp_insn
== E_CMPL16I_INSN
3173 || tmp_insn
== E_CMPH16I_INSN
3174 || tmp_insn
== E_CMPHL16I_INSN
);
3181 case BFD_RELOC_PPC_EMB_SDA21
:
3182 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3185 case BFD_RELOC_LO16
:
3187 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3188 else if (use_a_reloc
)
3189 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3192 case BFD_RELOC_HI16
:
3194 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3195 else if (use_a_reloc
)
3196 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3199 case BFD_RELOC_HI16_S
:
3201 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3202 else if (use_a_reloc
)
3203 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3206 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3208 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3211 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3213 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3216 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3218 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3223 #endif /* OBJ_ELF */
3225 if (reloc
!= BFD_RELOC_NONE
)
3227 /* Determine a BFD reloc value based on the operand information.
3228 We are only prepared to turn a few of the operands into
3230 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3231 | PPC_OPERAND_ABSOLUTE
)) != 0
3232 && operand
->bitm
== 0x3fffffc
3233 && operand
->shift
== 0)
3234 reloc
= BFD_RELOC_PPC_B26
;
3235 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3236 | PPC_OPERAND_ABSOLUTE
)) != 0
3237 && operand
->bitm
== 0xfffc
3238 && operand
->shift
== 0)
3239 reloc
= BFD_RELOC_PPC_B16
;
3240 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3241 && operand
->bitm
== 0x1fe
3242 && operand
->shift
== -1)
3243 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3244 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3245 && operand
->bitm
== 0xfffe
3246 && operand
->shift
== 0)
3247 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3248 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3249 && operand
->bitm
== 0x1fffffe
3250 && operand
->shift
== 0)
3251 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3252 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3253 && (operand
->bitm
& 0xfff0) == 0xfff0
3254 && operand
->shift
== 0)
3256 reloc
= BFD_RELOC_16
;
3257 #if defined OBJ_XCOFF || defined OBJ_ELF
3258 /* Note: the symbol may be not yet defined. */
3259 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3260 && ppc_is_toc_sym (ex
.X_add_symbol
))
3262 reloc
= BFD_RELOC_PPC_TOC16
;
3264 as_warn (_("assuming %s on symbol"),
3265 ppc_obj64
? "@toc" : "@xgot");
3271 /* For the absolute forms of branches, convert the PC
3272 relative form back into the absolute. */
3273 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3277 case BFD_RELOC_PPC_B26
:
3278 reloc
= BFD_RELOC_PPC_BA26
;
3280 case BFD_RELOC_PPC_B16
:
3281 reloc
= BFD_RELOC_PPC_BA16
;
3284 case BFD_RELOC_PPC_B16_BRTAKEN
:
3285 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3287 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3288 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3299 case BFD_RELOC_PPC_TOC16
:
3300 toc_reloc_types
|= has_small_toc_reloc
;
3302 case BFD_RELOC_PPC64_TOC16_LO
:
3303 case BFD_RELOC_PPC64_TOC16_HI
:
3304 case BFD_RELOC_PPC64_TOC16_HA
:
3305 toc_reloc_types
|= has_large_toc_reloc
;
3312 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3317 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3319 case BFD_RELOC_LO16
:
3320 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3322 case BFD_RELOC_16_GOTOFF
:
3323 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3325 case BFD_RELOC_LO16_GOTOFF
:
3326 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3328 case BFD_RELOC_LO16_PLTOFF
:
3329 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3331 case BFD_RELOC_16_BASEREL
:
3332 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3334 case BFD_RELOC_LO16_BASEREL
:
3335 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3337 case BFD_RELOC_PPC_TOC16
:
3338 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3340 case BFD_RELOC_PPC64_TOC16_LO
:
3341 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3343 case BFD_RELOC_PPC64_PLTGOT16
:
3344 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3346 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3347 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3349 case BFD_RELOC_PPC_DTPREL16
:
3350 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3352 case BFD_RELOC_PPC_DTPREL16_LO
:
3353 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3355 case BFD_RELOC_PPC_TPREL16
:
3356 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3358 case BFD_RELOC_PPC_TPREL16_LO
:
3359 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3361 case BFD_RELOC_PPC_GOT_DTPREL16
:
3362 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3363 case BFD_RELOC_PPC_GOT_TPREL16
:
3364 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3367 as_bad (_("unsupported relocation for DS offset field"));
3373 /* We need to generate a fixup for this expression. */
3374 if (fc
>= MAX_INSN_FIXUPS
)
3375 as_fatal (_("too many fixups"));
3376 fixups
[fc
].exp
= ex
;
3377 fixups
[fc
].opindex
= *opindex_ptr
;
3378 fixups
[fc
].reloc
= reloc
;
3386 /* If expecting more operands, then we want to see "),". */
3387 if (*str
== endc
&& opindex_ptr
[1] != 0)
3391 while (ISSPACE (*str
));
3395 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
3403 /* The call to expression should have advanced str past any
3406 && (endc
!= ',' || *str
!= '\0'))
3409 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
3411 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
3419 while (ISSPACE (*str
))
3423 as_bad (_("junk at end of line: `%s'"), str
);
3426 /* Do we need/want an APUinfo section? */
3427 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
3430 /* These are all version "1". */
3431 if (opcode
->flags
& PPC_OPCODE_SPE
)
3432 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
3433 if (opcode
->flags
& PPC_OPCODE_ISEL
)
3434 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
3435 if (opcode
->flags
& PPC_OPCODE_EFS
)
3436 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
3437 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
3438 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
3439 if (opcode
->flags
& PPC_OPCODE_PMR
)
3440 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
3441 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
3442 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
3443 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
3444 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
3445 /* Only set the VLE flag if the instruction has been pulled via
3446 the VLE instruction set. This way the flag is guaranteed to
3447 be set for VLE-only instructions or for VLE-only processors,
3448 however it'll remain clear for dual-mode instructions on
3449 dual-mode and, more importantly, standard-mode processors. */
3450 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
3452 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
3453 if (elf_section_data (now_seg
) != NULL
)
3454 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
3459 /* Write out the instruction. */
3460 /* Differentiate between two and four byte insns. */
3461 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
3463 if (PPC_OP_SE_VLE (insn
))
3467 addr_mod
= frag_now_fix () & 1;
3472 addr_mod
= frag_now_fix () & 3;
3474 /* All instructions can start on a 2 byte boundary for VLE. */
3475 f
= frag_more (insn_length
);
3476 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
3478 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
3479 as_bad (_("instruction address is not a multiple of 2"));
3481 as_bad (_("instruction address is not a multiple of 4"));
3483 frag_now
->insn_addr
= addr_mod
;
3484 frag_now
->has_code
= 1;
3485 md_number_to_chars (f
, insn
, insn_length
);
3488 last_subseg
= now_subseg
;
3491 dwarf2_emit_insn (insn_length
);
3494 /* Create any fixups. */
3495 for (i
= 0; i
< fc
; i
++)
3498 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
3500 reloc_howto_type
*reloc_howto
;
3504 reloc_howto
= bfd_reloc_type_lookup (stdoutput
, fixups
[i
].reloc
);
3508 size
= bfd_get_reloc_size (reloc_howto
);
3509 offset
= target_big_endian
? (insn_length
- size
) : 0;
3511 fixP
= fix_new_exp (frag_now
,
3512 f
- frag_now
->fr_literal
+ offset
,
3515 reloc_howto
->pc_relative
,
3520 const struct powerpc_operand
*operand
;
3522 operand
= &powerpc_operands
[fixups
[i
].opindex
];
3523 fixP
= fix_new_exp (frag_now
,
3524 f
- frag_now
->fr_literal
,
3527 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
3530 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
3534 /* Handle a macro. Gather all the operands, transform them as
3535 described by the macro, and call md_assemble recursively. All the
3536 operands are separated by commas; we don't accept parentheses
3537 around operands here. */
3540 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
3551 /* Gather the users operands into the operands array. */
3556 if (count
>= sizeof operands
/ sizeof operands
[0])
3558 operands
[count
++] = s
;
3559 s
= strchr (s
, ',');
3560 if (s
== (char *) NULL
)
3565 if (count
!= macro
->operands
)
3567 as_bad (_("wrong number of operands"));
3571 /* Work out how large the string must be (the size is unbounded
3572 because it includes user input). */
3574 format
= macro
->format
;
3575 while (*format
!= '\0')
3584 arg
= strtol (format
+ 1, &send
, 10);
3585 know (send
!= format
&& arg
< count
);
3586 len
+= strlen (operands
[arg
]);
3591 /* Put the string together. */
3592 complete
= s
= XNEWVEC (char, len
+ 1);
3593 format
= macro
->format
;
3594 while (*format
!= '\0')
3600 arg
= strtol (format
+ 1, &send
, 10);
3601 strcpy (s
, operands
[arg
]);
3608 /* Assemble the constructed instruction. */
3609 md_assemble (complete
);
3614 /* For ELF, add support for SHT_ORDERED. */
3617 ppc_section_type (char *str
, size_t len
)
3619 if (len
== 7 && strncmp (str
, "ordered", 7) == 0)
3626 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
3628 if (type
== SHT_ORDERED
)
3629 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
3633 #endif /* OBJ_ELF */
3636 /* Pseudo-op handling. */
3638 /* The .byte pseudo-op. This is similar to the normal .byte
3639 pseudo-op, but it can also take a single ASCII string. */
3642 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
3646 if (*input_line_pointer
!= '\"')
3652 /* Gather characters. A real double quote is doubled. Unusual
3653 characters are not permitted. */
3654 ++input_line_pointer
;
3659 c
= *input_line_pointer
++;
3663 if (*input_line_pointer
!= '\"')
3665 ++input_line_pointer
;
3668 FRAG_APPEND_1_CHAR (c
);
3672 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
3673 as_warn (_("data in executable section"));
3674 demand_empty_rest_of_line ();
3679 /* XCOFF specific pseudo-op handling. */
3681 /* This is set if we are creating a .stabx symbol, since we don't want
3682 to handle symbol suffixes for such symbols. */
3683 static bfd_boolean ppc_stab_symbol
;
3685 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3686 symbols in the .bss segment as though they were local common
3687 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3688 aligns .comm and .lcomm to 4 bytes. */
3691 ppc_comm (int lcomm
)
3693 asection
*current_seg
= now_seg
;
3694 subsegT current_subseg
= now_subseg
;
3700 symbolS
*lcomm_sym
= NULL
;
3704 endc
= get_symbol_name (&name
);
3705 end_name
= input_line_pointer
;
3706 (void) restore_line_pointer (endc
);
3708 if (*input_line_pointer
!= ',')
3710 as_bad (_("missing size"));
3711 ignore_rest_of_line ();
3714 ++input_line_pointer
;
3716 size
= get_absolute_expression ();
3719 as_bad (_("negative size"));
3720 ignore_rest_of_line ();
3726 /* The third argument to .comm is the alignment. */
3727 if (*input_line_pointer
!= ',')
3731 ++input_line_pointer
;
3732 align
= get_absolute_expression ();
3735 as_warn (_("ignoring bad alignment"));
3745 /* The third argument to .lcomm appears to be the real local
3746 common symbol to create. References to the symbol named in
3747 the first argument are turned into references to the third
3749 if (*input_line_pointer
!= ',')
3751 as_bad (_("missing real symbol name"));
3752 ignore_rest_of_line ();
3755 ++input_line_pointer
;
3757 lcomm_endc
= get_symbol_name (&lcomm_name
);
3759 lcomm_sym
= symbol_find_or_make (lcomm_name
);
3761 (void) restore_line_pointer (lcomm_endc
);
3763 /* The fourth argument to .lcomm is the alignment. */
3764 if (*input_line_pointer
!= ',')
3773 ++input_line_pointer
;
3774 align
= get_absolute_expression ();
3777 as_warn (_("ignoring bad alignment"));
3784 sym
= symbol_find_or_make (name
);
3787 if (S_IS_DEFINED (sym
)
3788 || S_GET_VALUE (sym
) != 0)
3790 as_bad (_("attempt to redefine symbol"));
3791 ignore_rest_of_line ();
3795 record_alignment (bss_section
, align
);
3798 || ! S_IS_DEFINED (lcomm_sym
))
3807 S_SET_EXTERNAL (sym
);
3811 symbol_get_tc (lcomm_sym
)->output
= 1;
3812 def_sym
= lcomm_sym
;
3816 subseg_set (bss_section
, 1);
3817 frag_align (align
, 0, 0);
3819 symbol_set_frag (def_sym
, frag_now
);
3820 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
3821 def_size
, (char *) NULL
);
3823 S_SET_SEGMENT (def_sym
, bss_section
);
3824 symbol_get_tc (def_sym
)->align
= align
;
3828 /* Align the size of lcomm_sym. */
3829 symbol_get_frag (lcomm_sym
)->fr_offset
=
3830 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
3831 &~ ((1 << align
) - 1));
3832 if (align
> symbol_get_tc (lcomm_sym
)->align
)
3833 symbol_get_tc (lcomm_sym
)->align
= align
;
3838 /* Make sym an offset from lcomm_sym. */
3839 S_SET_SEGMENT (sym
, bss_section
);
3840 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
3841 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
3842 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
3845 subseg_set (current_seg
, current_subseg
);
3847 demand_empty_rest_of_line ();
3850 /* The .csect pseudo-op. This switches us into a different
3851 subsegment. The first argument is a symbol whose value is the
3852 start of the .csect. In COFF, csect symbols get special aux
3853 entries defined by the x_csect field of union internal_auxent. The
3854 optional second argument is the alignment (the default is 2). */
3857 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
3864 endc
= get_symbol_name (&name
);
3866 sym
= symbol_find_or_make (name
);
3868 (void) restore_line_pointer (endc
);
3870 if (S_GET_NAME (sym
)[0] == '\0')
3872 /* An unnamed csect is assumed to be [PR]. */
3873 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
3877 if (*input_line_pointer
== ',')
3879 ++input_line_pointer
;
3880 align
= get_absolute_expression ();
3883 ppc_change_csect (sym
, align
);
3885 demand_empty_rest_of_line ();
3888 /* Change to a different csect. */
3891 ppc_change_csect (symbolS
*sym
, offsetT align
)
3893 if (S_IS_DEFINED (sym
))
3894 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
3904 /* This is a new csect. We need to look at the symbol class to
3905 figure out whether it should go in the text section or the
3909 switch (symbol_get_tc (sym
)->symbol_class
)
3919 S_SET_SEGMENT (sym
, text_section
);
3920 symbol_get_tc (sym
)->subseg
= ppc_text_subsegment
;
3921 ++ppc_text_subsegment
;
3922 list_ptr
= &ppc_text_csects
;
3932 if (ppc_toc_csect
!= NULL
3933 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
3934 == ppc_data_subsegment
))
3936 S_SET_SEGMENT (sym
, data_section
);
3937 symbol_get_tc (sym
)->subseg
= ppc_data_subsegment
;
3938 ++ppc_data_subsegment
;
3939 list_ptr
= &ppc_data_csects
;
3945 /* We set the obstack chunk size to a small value before
3946 changing subsegments, so that we don't use a lot of memory
3947 space for what may be a small section. */
3948 hold_chunksize
= chunksize
;
3951 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
3952 symbol_get_tc (sym
)->subseg
);
3954 chunksize
= hold_chunksize
;
3957 ppc_after_toc_frag
= frag_now
;
3959 record_alignment (sec
, align
);
3961 frag_align_code (align
, 0);
3963 frag_align (align
, 0, 0);
3965 symbol_set_frag (sym
, frag_now
);
3966 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
3968 symbol_get_tc (sym
)->align
= align
;
3969 symbol_get_tc (sym
)->output
= 1;
3970 symbol_get_tc (sym
)->within
= sym
;
3972 for (list
= *list_ptr
;
3973 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
3974 list
= symbol_get_tc (list
)->next
)
3976 symbol_get_tc (list
)->next
= sym
;
3978 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
3979 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
3983 ppc_current_csect
= sym
;
3987 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
3991 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
3993 sec
= subseg_new (dw
->name
, subseg
);
3994 oldflags
= bfd_get_section_flags (stdoutput
, sec
);
3995 if (oldflags
== SEC_NO_FLAGS
)
3997 /* Just created section. */
3998 gas_assert (dw_sections
[idx
].sect
== NULL
);
4000 bfd_set_section_flags (stdoutput
, sec
, SEC_DEBUGGING
);
4001 bfd_set_section_alignment (stdoutput
, sec
, 0);
4002 dw_sections
[idx
].sect
= sec
;
4005 /* Not anymore in a csect. */
4006 ppc_current_csect
= NULL
;
4009 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4010 .dwsect flag [, opt-label ]
4014 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4018 const struct xcoff_dwsect_name
*dw
;
4019 struct dw_subsection
*subseg
;
4020 struct dw_section
*dws
;
4024 flag
= get_absolute_expression ();
4026 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4027 if (xcoff_dwsect_names
[i
].flag
== flag
)
4029 dw
= &xcoff_dwsect_names
[i
];
4033 /* Parse opt-label. */
4034 if (*input_line_pointer
== ',')
4039 ++input_line_pointer
;
4041 c
= get_symbol_name (&label
);
4042 opt_label
= symbol_find_or_make (label
);
4043 (void) restore_line_pointer (c
);
4048 demand_empty_rest_of_line ();
4050 /* Return now in case of unknown subsection. */
4053 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4058 /* Find the subsection. */
4059 dws
= &dw_sections
[i
];
4061 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4063 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4064 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4066 as_bad (_("label %s was not defined in this dwarf section"),
4067 S_GET_NAME (opt_label
));
4068 subseg
= dws
->anon_subseg
;
4072 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4077 /* Switch to the subsection. */
4078 ppc_change_debug_section (i
, subseg
->subseg
);
4082 /* Create a new dw subsection. */
4083 subseg
= XNEW (struct dw_subsection
);
4085 if (opt_label
== NULL
)
4087 /* The anonymous one. */
4089 subseg
->link
= NULL
;
4090 dws
->anon_subseg
= subseg
;
4095 if (dws
->list_subseg
!= NULL
)
4096 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4100 subseg
->link
= dws
->list_subseg
;
4101 dws
->list_subseg
= subseg
;
4102 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4105 ppc_change_debug_section (i
, subseg
->subseg
);
4109 /* Add the length field. */
4110 expressionS
*exp
= &subseg
->end_exp
;
4113 if (opt_label
!= NULL
)
4114 symbol_set_value_now (opt_label
);
4116 /* Add the length field. Note that according to the AIX assembler
4117 manual, the size of the length field is 4 for powerpc32 but
4118 12 for powerpc64. */
4121 /* Write the 64bit marker. */
4122 md_number_to_chars (frag_more (4), -1, 4);
4125 exp
->X_op
= O_subtract
;
4126 exp
->X_op_symbol
= symbol_temp_new_now ();
4127 exp
->X_add_symbol
= symbol_temp_make ();
4129 sz
= ppc_obj64
? 8 : 4;
4130 exp
->X_add_number
= -sz
;
4131 emit_expr (exp
, sz
);
4136 /* This function handles the .text and .data pseudo-ops. These
4137 pseudo-ops aren't really used by XCOFF; we implement them for the
4138 convenience of people who aren't used to XCOFF. */
4141 ppc_section (int type
)
4148 else if (type
== 'd')
4153 sym
= symbol_find_or_make (name
);
4155 ppc_change_csect (sym
, 2);
4157 demand_empty_rest_of_line ();
4160 /* This function handles the .section pseudo-op. This is mostly to
4161 give an error, since XCOFF only supports .text, .data and .bss, but
4162 we do permit the user to name the text or data section. */
4165 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4168 const char *real_name
;
4172 c
= get_symbol_name (&user_name
);
4174 if (strcmp (user_name
, ".text") == 0)
4175 real_name
= ".text[PR]";
4176 else if (strcmp (user_name
, ".data") == 0)
4177 real_name
= ".data[RW]";
4180 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4181 (void) restore_line_pointer (c
);
4182 ignore_rest_of_line ();
4186 (void) restore_line_pointer (c
);
4188 sym
= symbol_find_or_make (real_name
);
4190 ppc_change_csect (sym
, 2);
4192 demand_empty_rest_of_line ();
4195 /* The .extern pseudo-op. We create an undefined symbol. */
4198 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4203 endc
= get_symbol_name (&name
);
4205 (void) symbol_find_or_make (name
);
4207 (void) restore_line_pointer (endc
);
4209 demand_empty_rest_of_line ();
4212 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4215 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4221 endc
= get_symbol_name (&name
);
4223 sym
= symbol_find_or_make (name
);
4225 (void) restore_line_pointer (endc
);
4227 symbol_get_tc (sym
)->output
= 1;
4229 demand_empty_rest_of_line ();
4232 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4233 relocations at the beginning of the current csect.
4235 (In principle, there's no reason why the relocations _have_ to be at
4236 the beginning. Anywhere in the csect would do. However, inserting
4237 at the beginning is what the native assembler does, and it helps to
4238 deal with cases where the .ref statements follow the section contents.)
4240 ??? .refs don't work for empty .csects. However, the native assembler
4241 doesn't report an error in this case, and neither yet do we. */
4244 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
4249 if (ppc_current_csect
== NULL
)
4251 as_bad (_(".ref outside .csect"));
4252 ignore_rest_of_line ();
4258 c
= get_symbol_name (&name
);
4260 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
4261 symbol_find_or_make (name
), 0, FALSE
, BFD_RELOC_NONE
);
4263 *input_line_pointer
= c
;
4264 SKIP_WHITESPACE_AFTER_NAME ();
4265 c
= *input_line_pointer
;
4268 input_line_pointer
++;
4270 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
4272 as_bad (_("missing symbol name"));
4273 ignore_rest_of_line ();
4280 demand_empty_rest_of_line ();
4283 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4284 although I don't know why it bothers. */
4287 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
4294 endc
= get_symbol_name (&name
);
4296 sym
= symbol_find_or_make (name
);
4298 (void) restore_line_pointer (endc
);
4300 if (*input_line_pointer
!= ',')
4302 as_bad (_("missing rename string"));
4303 ignore_rest_of_line ();
4306 ++input_line_pointer
;
4308 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
4310 demand_empty_rest_of_line ();
4313 /* The .stabx pseudo-op. This is similar to a normal .stabs
4314 pseudo-op, but slightly different. A sample is
4315 .stabx "main:F-1",.main,142,0
4316 The first argument is the symbol name to create. The second is the
4317 value, and the third is the storage class. The fourth seems to be
4318 always zero, and I am assuming it is the type. */
4321 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
4328 name
= demand_copy_C_string (&len
);
4330 if (*input_line_pointer
!= ',')
4332 as_bad (_("missing value"));
4335 ++input_line_pointer
;
4337 ppc_stab_symbol
= TRUE
;
4338 sym
= symbol_make (name
);
4339 ppc_stab_symbol
= FALSE
;
4341 symbol_get_tc (sym
)->real_name
= name
;
4343 (void) expression (&exp
);
4350 as_bad (_("illegal .stabx expression; zero assumed"));
4351 exp
.X_add_number
= 0;
4354 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
4355 symbol_set_frag (sym
, &zero_address_frag
);
4359 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
4360 symbol_set_value_expression (sym
, &exp
);
4364 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
4365 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
4370 /* The value is some complex expression. This will probably
4371 fail at some later point, but this is probably the right
4372 thing to do here. */
4373 symbol_set_value_expression (sym
, &exp
);
4377 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4378 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4380 if (*input_line_pointer
!= ',')
4382 as_bad (_("missing class"));
4385 ++input_line_pointer
;
4387 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
4389 if (*input_line_pointer
!= ',')
4391 as_bad (_("missing type"));
4394 ++input_line_pointer
;
4396 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
4398 symbol_get_tc (sym
)->output
= 1;
4400 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
4405 .stabx "z",arrays_,133,0
4408 .comm arrays_,13768,3
4410 resolve_symbol_value will copy the exp's "within" into sym's when the
4411 offset is 0. Since this seems to be corner case problem,
4412 only do the correction for storage class C_STSYM. A better solution
4413 would be to have the tc field updated in ppc_symbol_new_hook. */
4415 if (exp
.X_op
== O_symbol
)
4417 if (ppc_current_block
== NULL
)
4418 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4420 symbol_get_tc (sym
)->within
= ppc_current_block
;
4421 symbol_get_tc (exp
.X_add_symbol
)->within
= ppc_current_block
;
4425 if (exp
.X_op
!= O_symbol
4426 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
4427 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
4428 ppc_frob_label (sym
);
4431 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4432 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
4433 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
4434 symbol_get_tc (ppc_current_csect
)->within
= sym
;
4437 demand_empty_rest_of_line ();
4440 /* The .function pseudo-op. This takes several arguments. The first
4441 argument seems to be the external name of the symbol. The second
4442 argument seems to be the label for the start of the function. gcc
4443 uses the same name for both. I have no idea what the third and
4444 fourth arguments are meant to be. The optional fifth argument is
4445 an expression for the size of the function. In COFF this symbol
4446 gets an aux entry like that used for a csect. */
4449 ppc_function (int ignore ATTRIBUTE_UNUSED
)
4457 endc
= get_symbol_name (&name
);
4459 /* Ignore any [PR] suffix. */
4460 name
= ppc_canonicalize_symbol_name (name
);
4461 s
= strchr (name
, '[');
4462 if (s
!= (char *) NULL
4463 && strcmp (s
+ 1, "PR]") == 0)
4466 ext_sym
= symbol_find_or_make (name
);
4468 (void) restore_line_pointer (endc
);
4470 if (*input_line_pointer
!= ',')
4472 as_bad (_("missing symbol name"));
4473 ignore_rest_of_line ();
4476 ++input_line_pointer
;
4478 endc
= get_symbol_name (&name
);
4480 lab_sym
= symbol_find_or_make (name
);
4482 (void) restore_line_pointer (endc
);
4484 if (ext_sym
!= lab_sym
)
4488 exp
.X_op
= O_symbol
;
4489 exp
.X_add_symbol
= lab_sym
;
4490 exp
.X_op_symbol
= NULL
;
4491 exp
.X_add_number
= 0;
4493 symbol_set_value_expression (ext_sym
, &exp
);
4496 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
4497 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
4498 symbol_get_tc (ext_sym
)->output
= 1;
4500 if (*input_line_pointer
== ',')
4504 /* Ignore the third argument. */
4505 ++input_line_pointer
;
4507 if (*input_line_pointer
== ',')
4509 /* Ignore the fourth argument. */
4510 ++input_line_pointer
;
4512 if (*input_line_pointer
== ',')
4514 /* The fifth argument is the function size. */
4515 ++input_line_pointer
;
4516 symbol_get_tc (ext_sym
)->u
.size
= symbol_new
4517 ("L0\001", absolute_section
,(valueT
) 0, &zero_address_frag
);
4518 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
4523 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
4524 SF_SET_FUNCTION (ext_sym
);
4525 SF_SET_PROCESS (ext_sym
);
4526 coff_add_linesym (ext_sym
);
4528 demand_empty_rest_of_line ();
4531 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4532 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4533 with the correct line number */
4535 static symbolS
*saved_bi_sym
= 0;
4538 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
4542 sym
= symbol_make (".bf");
4543 S_SET_SEGMENT (sym
, text_section
);
4544 symbol_set_frag (sym
, frag_now
);
4545 S_SET_VALUE (sym
, frag_now_fix ());
4546 S_SET_STORAGE_CLASS (sym
, C_FCN
);
4548 coff_line_base
= get_absolute_expression ();
4550 S_SET_NUMBER_AUXILIARY (sym
, 1);
4551 SA_SET_SYM_LNNO (sym
, coff_line_base
);
4553 /* Line number for bi. */
4556 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
4561 symbol_get_tc (sym
)->output
= 1;
4563 ppc_frob_label (sym
);
4565 demand_empty_rest_of_line ();
4568 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4569 ".ef", except that the line number is absolute, not relative to the
4570 most recent ".bf" symbol. */
4573 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
4577 sym
= symbol_make (".ef");
4578 S_SET_SEGMENT (sym
, text_section
);
4579 symbol_set_frag (sym
, frag_now
);
4580 S_SET_VALUE (sym
, frag_now_fix ());
4581 S_SET_STORAGE_CLASS (sym
, C_FCN
);
4582 S_SET_NUMBER_AUXILIARY (sym
, 1);
4583 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4584 symbol_get_tc (sym
)->output
= 1;
4586 ppc_frob_label (sym
);
4588 demand_empty_rest_of_line ();
4591 /* The .bi and .ei pseudo-ops. These take a string argument and
4592 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4593 the symbol list. The value of .bi will be know when the next .bf
4599 static symbolS
*last_biei
;
4606 name
= demand_copy_C_string (&len
);
4608 /* The value of these symbols is actually file offset. Here we set
4609 the value to the index into the line number entries. In
4610 ppc_frob_symbols we set the fix_line field, which will cause BFD
4611 to do the right thing. */
4613 sym
= symbol_make (name
);
4614 /* obj-coff.c currently only handles line numbers correctly in the
4616 S_SET_SEGMENT (sym
, text_section
);
4617 S_SET_VALUE (sym
, coff_n_line_nos
);
4618 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4620 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
4621 symbol_get_tc (sym
)->output
= 1;
4629 for (look
= last_biei
? last_biei
: symbol_rootP
;
4630 (look
!= (symbolS
*) NULL
4631 && (S_GET_STORAGE_CLASS (look
) == C_FILE
4632 || S_GET_STORAGE_CLASS (look
) == C_BINCL
4633 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
4634 look
= symbol_next (look
))
4636 if (look
!= (symbolS
*) NULL
)
4638 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4639 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
4643 demand_empty_rest_of_line ();
4646 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4647 There is one argument, which is a csect symbol. The value of the
4648 .bs symbol is the index of this csect symbol. */
4651 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
4658 if (ppc_current_block
!= NULL
)
4659 as_bad (_("nested .bs blocks"));
4661 endc
= get_symbol_name (&name
);
4663 csect
= symbol_find_or_make (name
);
4665 (void) restore_line_pointer (endc
);
4667 sym
= symbol_make (".bs");
4668 S_SET_SEGMENT (sym
, now_seg
);
4669 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
4670 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4671 symbol_get_tc (sym
)->output
= 1;
4673 symbol_get_tc (sym
)->within
= csect
;
4675 ppc_frob_label (sym
);
4677 ppc_current_block
= sym
;
4679 demand_empty_rest_of_line ();
4682 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4685 ppc_es (int ignore ATTRIBUTE_UNUSED
)
4689 if (ppc_current_block
== NULL
)
4690 as_bad (_(".es without preceding .bs"));
4692 sym
= symbol_make (".es");
4693 S_SET_SEGMENT (sym
, now_seg
);
4694 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
4695 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4696 symbol_get_tc (sym
)->output
= 1;
4698 ppc_frob_label (sym
);
4700 ppc_current_block
= NULL
;
4702 demand_empty_rest_of_line ();
4705 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4709 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
4713 sym
= symbol_make (".bb");
4714 S_SET_SEGMENT (sym
, text_section
);
4715 symbol_set_frag (sym
, frag_now
);
4716 S_SET_VALUE (sym
, frag_now_fix ());
4717 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
4719 S_SET_NUMBER_AUXILIARY (sym
, 1);
4720 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4722 symbol_get_tc (sym
)->output
= 1;
4724 SF_SET_PROCESS (sym
);
4726 ppc_frob_label (sym
);
4728 demand_empty_rest_of_line ();
4731 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4735 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
4739 sym
= symbol_make (".eb");
4740 S_SET_SEGMENT (sym
, text_section
);
4741 symbol_set_frag (sym
, frag_now
);
4742 S_SET_VALUE (sym
, frag_now_fix ());
4743 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
4744 S_SET_NUMBER_AUXILIARY (sym
, 1);
4745 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4746 symbol_get_tc (sym
)->output
= 1;
4748 SF_SET_PROCESS (sym
);
4750 ppc_frob_label (sym
);
4752 demand_empty_rest_of_line ();
4755 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4759 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
4765 name
= demand_copy_C_string (&len
);
4766 sym
= symbol_make (name
);
4767 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4768 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4769 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
4770 S_SET_VALUE (sym
, 0);
4771 symbol_get_tc (sym
)->output
= 1;
4773 ppc_frob_label (sym
);
4775 demand_empty_rest_of_line ();
4778 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4781 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
4785 sym
= symbol_make (".ec");
4786 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4787 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4788 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
4789 S_SET_VALUE (sym
, 0);
4790 symbol_get_tc (sym
)->output
= 1;
4792 ppc_frob_label (sym
);
4794 demand_empty_rest_of_line ();
4797 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4800 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
4802 if (ppc_toc_csect
!= (symbolS
*) NULL
)
4803 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
4810 subseg
= ppc_data_subsegment
;
4811 ++ppc_data_subsegment
;
4813 subseg_new (segment_name (data_section
), subseg
);
4814 ppc_toc_frag
= frag_now
;
4816 sym
= symbol_find_or_make ("TOC[TC0]");
4817 symbol_set_frag (sym
, frag_now
);
4818 S_SET_SEGMENT (sym
, data_section
);
4819 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4820 symbol_get_tc (sym
)->subseg
= subseg
;
4821 symbol_get_tc (sym
)->output
= 1;
4822 symbol_get_tc (sym
)->within
= sym
;
4824 ppc_toc_csect
= sym
;
4826 for (list
= ppc_data_csects
;
4827 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4828 list
= symbol_get_tc (list
)->next
)
4830 symbol_get_tc (list
)->next
= sym
;
4832 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4833 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4837 ppc_current_csect
= ppc_toc_csect
;
4839 demand_empty_rest_of_line ();
4842 /* The AIX assembler automatically aligns the operands of a .long or
4843 .short pseudo-op, and we want to be compatible. */
4846 ppc_xcoff_cons (int log_size
)
4848 frag_align (log_size
, 0, 0);
4849 record_alignment (now_seg
, log_size
);
4850 cons (1 << log_size
);
4854 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
4859 (void) expression (&exp
);
4861 if (exp
.X_op
!= O_constant
)
4863 as_bad (_("non-constant byte count"));
4867 byte_count
= exp
.X_add_number
;
4869 if (*input_line_pointer
!= ',')
4871 as_bad (_("missing value"));
4875 ++input_line_pointer
;
4880 ppc_xcoff_end (void)
4884 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4886 struct dw_section
*dws
= &dw_sections
[i
];
4887 struct dw_subsection
*dwss
;
4889 if (dws
->anon_subseg
)
4891 dwss
= dws
->anon_subseg
;
4892 dwss
->link
= dws
->list_subseg
;
4895 dwss
= dws
->list_subseg
;
4897 for (; dwss
!= NULL
; dwss
= dwss
->link
)
4898 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
4900 subseg_set (dws
->sect
, dwss
->subseg
);
4901 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
4906 #endif /* OBJ_XCOFF */
4907 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4909 /* The .tc pseudo-op. This is used when generating either XCOFF or
4910 ELF. This takes two or more arguments.
4912 When generating XCOFF output, the first argument is the name to
4913 give to this location in the toc; this will be a symbol with class
4914 TC. The rest of the arguments are N-byte values to actually put at
4915 this location in the TOC; often there is just one more argument, a
4916 relocatable symbol reference. The size of the value to store
4917 depends on target word size. A 32-bit target uses 4-byte values, a
4918 64-bit target uses 8-byte values.
4920 When not generating XCOFF output, the arguments are the same, but
4921 the first argument is simply ignored. */
4924 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
4928 /* Define the TOC symbol name. */
4934 if (ppc_toc_csect
== (symbolS
*) NULL
4935 || ppc_toc_csect
!= ppc_current_csect
)
4937 as_bad (_(".tc not in .toc section"));
4938 ignore_rest_of_line ();
4942 endc
= get_symbol_name (&name
);
4944 sym
= symbol_find_or_make (name
);
4946 (void) restore_line_pointer (endc
);
4948 if (S_IS_DEFINED (sym
))
4952 label
= symbol_get_tc (ppc_current_csect
)->within
;
4953 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
4955 as_bad (_(".tc with no label"));
4956 ignore_rest_of_line ();
4960 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
4961 symbol_set_frag (label
, symbol_get_frag (sym
));
4962 S_SET_VALUE (label
, S_GET_VALUE (sym
));
4964 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
4965 ++input_line_pointer
;
4970 S_SET_SEGMENT (sym
, now_seg
);
4971 symbol_set_frag (sym
, frag_now
);
4972 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4973 symbol_get_tc (sym
)->symbol_class
= XMC_TC
;
4974 symbol_get_tc (sym
)->output
= 1;
4976 ppc_frob_label (sym
);
4979 #endif /* OBJ_XCOFF */
4983 /* Skip the TOC symbol name. */
4984 while (is_part_of_name (*input_line_pointer
)
4985 || *input_line_pointer
== ' '
4986 || *input_line_pointer
== '['
4987 || *input_line_pointer
== ']'
4988 || *input_line_pointer
== '{'
4989 || *input_line_pointer
== '}')
4990 ++input_line_pointer
;
4992 /* Align to a four/eight byte boundary. */
4993 align
= ppc_obj64
? 3 : 2;
4994 frag_align (align
, 0, 0);
4995 record_alignment (now_seg
, align
);
4996 #endif /* OBJ_ELF */
4998 if (*input_line_pointer
!= ',')
4999 demand_empty_rest_of_line ();
5002 ++input_line_pointer
;
5003 cons (ppc_obj64
? 8 : 4);
5007 /* Pseudo-op .machine. */
5010 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5014 #define MAX_HISTORY 100
5015 static ppc_cpu_t
*cpu_history
;
5016 static int curr_hist
;
5020 c
= get_symbol_name (&cpu_string
);
5021 cpu_string
= xstrdup (cpu_string
);
5022 (void) restore_line_pointer (c
);
5024 if (cpu_string
!= NULL
)
5026 ppc_cpu_t old_cpu
= ppc_cpu
;
5030 for (p
= cpu_string
; *p
!= 0; p
++)
5033 if (strcmp (cpu_string
, "push") == 0)
5035 if (cpu_history
== NULL
)
5036 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5038 if (curr_hist
>= MAX_HISTORY
)
5039 as_bad (_(".machine stack overflow"));
5041 cpu_history
[curr_hist
++] = ppc_cpu
;
5043 else if (strcmp (cpu_string
, "pop") == 0)
5046 as_bad (_(".machine stack underflow"));
5048 ppc_cpu
= cpu_history
[--curr_hist
];
5050 else if ((new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, cpu_string
)) != 0)
5053 as_bad (_("invalid machine `%s'"), cpu_string
);
5055 if (ppc_cpu
!= old_cpu
)
5056 ppc_setup_opcodes ();
5059 demand_empty_rest_of_line ();
5061 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5065 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5067 /* Set the current section. */
5069 ppc_set_current_section (segT
new)
5071 ppc_previous_section
= ppc_current_section
;
5072 ppc_current_section
= new;
5075 /* pseudo-op: .previous
5076 behaviour: toggles the current section with the previous section.
5078 warnings: "No previous section" */
5081 ppc_previous (int ignore ATTRIBUTE_UNUSED
)
5083 if (ppc_previous_section
== NULL
)
5085 as_warn (_("no previous section to return to, ignored."));
5089 subseg_set (ppc_previous_section
, 0);
5091 ppc_set_current_section (ppc_previous_section
);
5094 /* pseudo-op: .pdata
5095 behaviour: predefined read only data section
5099 initial: .section .pdata "adr3"
5100 a - don't know -- maybe a misprint
5101 d - initialized data
5103 3 - double word aligned (that would be 4 byte boundary)
5106 Tag index tables (also known as the function table) for exception
5107 handling, debugging, etc. */
5110 ppc_pdata (int ignore ATTRIBUTE_UNUSED
)
5112 if (pdata_section
== 0)
5114 pdata_section
= subseg_new (".pdata", 0);
5116 bfd_set_section_flags (stdoutput
, pdata_section
,
5117 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5118 | SEC_READONLY
| SEC_DATA
));
5120 bfd_set_section_alignment (stdoutput
, pdata_section
, 2);
5124 pdata_section
= subseg_new (".pdata", 0);
5126 ppc_set_current_section (pdata_section
);
5129 /* pseudo-op: .ydata
5130 behaviour: predefined read only data section
5134 initial: .section .ydata "drw3"
5135 a - don't know -- maybe a misprint
5136 d - initialized data
5138 3 - double word aligned (that would be 4 byte boundary)
5140 Tag tables (also known as the scope table) for exception handling,
5144 ppc_ydata (int ignore ATTRIBUTE_UNUSED
)
5146 if (ydata_section
== 0)
5148 ydata_section
= subseg_new (".ydata", 0);
5149 bfd_set_section_flags (stdoutput
, ydata_section
,
5150 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5151 | SEC_READONLY
| SEC_DATA
));
5153 bfd_set_section_alignment (stdoutput
, ydata_section
, 3);
5157 ydata_section
= subseg_new (".ydata", 0);
5159 ppc_set_current_section (ydata_section
);
5162 /* pseudo-op: .reldata
5163 behaviour: predefined read write data section
5164 double word aligned (4-byte)
5165 FIXME: relocation is applied to it
5166 FIXME: what's the difference between this and .data?
5169 initial: .section .reldata "drw3"
5170 d - initialized data
5173 3 - double word aligned (that would be 8 byte boundary)
5176 Like .data, but intended to hold data subject to relocation, such as
5177 function descriptors, etc. */
5180 ppc_reldata (int ignore ATTRIBUTE_UNUSED
)
5182 if (reldata_section
== 0)
5184 reldata_section
= subseg_new (".reldata", 0);
5186 bfd_set_section_flags (stdoutput
, reldata_section
,
5187 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5190 bfd_set_section_alignment (stdoutput
, reldata_section
, 2);
5194 reldata_section
= subseg_new (".reldata", 0);
5196 ppc_set_current_section (reldata_section
);
5199 /* pseudo-op: .rdata
5200 behaviour: predefined read only data section
5204 initial: .section .rdata "dr3"
5205 d - initialized data
5207 3 - double word aligned (that would be 4 byte boundary) */
5210 ppc_rdata (int ignore ATTRIBUTE_UNUSED
)
5212 if (rdata_section
== 0)
5214 rdata_section
= subseg_new (".rdata", 0);
5215 bfd_set_section_flags (stdoutput
, rdata_section
,
5216 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5217 | SEC_READONLY
| SEC_DATA
));
5219 bfd_set_section_alignment (stdoutput
, rdata_section
, 2);
5223 rdata_section
= subseg_new (".rdata", 0);
5225 ppc_set_current_section (rdata_section
);
5228 /* pseudo-op: .ualong
5229 behaviour: much like .int, with the exception that no alignment is
5231 FIXME: test the alignment statement
5236 ppc_ualong (int ignore ATTRIBUTE_UNUSED
)
5242 /* pseudo-op: .znop <symbol name>
5243 behaviour: Issue a nop instruction
5244 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5245 the supplied symbol name.
5247 warnings: Missing symbol name */
5250 ppc_znop (int ignore ATTRIBUTE_UNUSED
)
5253 const struct powerpc_opcode
*opcode
;
5260 /* Strip out the symbol name. */
5261 c
= get_symbol_name (&symbol_name
);
5263 name
= xstrdup (symbol_name
);
5265 sym
= symbol_find_or_make (name
);
5267 *input_line_pointer
= c
;
5269 SKIP_WHITESPACE_AFTER_NAME ();
5271 /* Look up the opcode in the hash table. */
5272 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, "nop");
5274 /* Stick in the nop. */
5275 insn
= opcode
->opcode
;
5277 /* Write out the instruction. */
5279 md_number_to_chars (f
, insn
, 4);
5281 f
- frag_now
->fr_literal
,
5286 BFD_RELOC_16_GOT_PCREL
);
5296 ppc_pe_comm (int lcomm
)
5305 c
= get_symbol_name (&name
);
5307 /* just after name is now '\0'. */
5308 p
= input_line_pointer
;
5310 SKIP_WHITESPACE_AFTER_NAME ();
5311 if (*input_line_pointer
!= ',')
5313 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5314 ignore_rest_of_line ();
5318 input_line_pointer
++; /* skip ',' */
5319 if ((temp
= get_absolute_expression ()) < 0)
5321 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
5322 ignore_rest_of_line ();
5328 /* The third argument to .comm is the alignment. */
5329 if (*input_line_pointer
!= ',')
5333 ++input_line_pointer
;
5334 align
= get_absolute_expression ();
5337 as_warn (_("ignoring bad alignment"));
5344 symbolP
= symbol_find_or_make (name
);
5347 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
5349 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5350 S_GET_NAME (symbolP
));
5351 ignore_rest_of_line ();
5355 if (S_GET_VALUE (symbolP
))
5357 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
5358 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5359 S_GET_NAME (symbolP
),
5360 (long) S_GET_VALUE (symbolP
),
5365 S_SET_VALUE (symbolP
, (valueT
) temp
);
5366 S_SET_EXTERNAL (symbolP
);
5367 S_SET_SEGMENT (symbolP
, bfd_com_section_ptr
);
5370 demand_empty_rest_of_line ();
5374 * implement the .section pseudo op:
5375 * .section name {, "flags"}
5377 * | +--- optional flags: 'b' for bss
5379 * +-- section name 'l' for lib
5383 * 'd' (apparently m88k for data)
5385 * But if the argument is not a quoted string, treat it as a
5386 * subsegment number.
5388 * FIXME: this is a copy of the section processing from obj-coff.c, with
5389 * additions/changes for the moto-pas assembler support. There are three
5392 * FIXME: I just noticed this. This doesn't work at all really. It it
5393 * setting bits that bfd probably neither understands or uses. The
5394 * correct approach (?) will have to incorporate extra fields attached
5395 * to the section to hold the system specific stuff. (krk)
5398 * 'a' - unknown - referred to in documentation, but no definition supplied
5399 * 'c' - section has code
5400 * 'd' - section has initialized data
5401 * 'u' - section has uninitialized data
5402 * 'i' - section contains directives (info)
5403 * 'n' - section can be discarded
5404 * 'R' - remove section at link time
5406 * Section Protection:
5407 * 'r' - section is readable
5408 * 'w' - section is writable
5409 * 'x' - section is executable
5410 * 's' - section is sharable
5412 * Section Alignment:
5413 * '0' - align to byte boundary
5414 * '1' - align to halfword boundary
5415 * '2' - align to word boundary
5416 * '3' - align to doubleword boundary
5417 * '4' - align to quadword boundary
5418 * '5' - align to 32 byte boundary
5419 * '6' - align to 64 byte boundary
5424 ppc_pe_section (int ignore ATTRIBUTE_UNUSED
)
5426 /* Strip out the section name. */
5435 c
= get_symbol_name (§ion_name
);
5437 name
= xstrdup (section_name
);
5439 *input_line_pointer
= c
;
5441 SKIP_WHITESPACE_AFTER_NAME ();
5444 flags
= SEC_NO_FLAGS
;
5446 if (strcmp (name
, ".idata$2") == 0)
5450 else if (strcmp (name
, ".idata$3") == 0)
5454 else if (strcmp (name
, ".idata$4") == 0)
5458 else if (strcmp (name
, ".idata$5") == 0)
5462 else if (strcmp (name
, ".idata$6") == 0)
5467 /* Default alignment to 16 byte boundary. */
5470 if (*input_line_pointer
== ',')
5472 ++input_line_pointer
;
5474 if (*input_line_pointer
!= '"')
5475 exp
= get_absolute_expression ();
5478 ++input_line_pointer
;
5479 while (*input_line_pointer
!= '"'
5480 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
5482 switch (*input_line_pointer
)
5484 /* Section Contents */
5485 case 'a': /* unknown */
5486 as_bad (_("unsupported section attribute -- 'a'"));
5488 case 'c': /* code section */
5491 case 'd': /* section has initialized data */
5494 case 'u': /* section has uninitialized data */
5495 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5499 case 'i': /* section contains directives (info) */
5500 /* FIXME: This is IMAGE_SCN_LNK_INFO
5502 flags
|= SEC_HAS_CONTENTS
;
5504 case 'n': /* section can be discarded */
5507 case 'R': /* Remove section at link time */
5508 flags
|= SEC_NEVER_LOAD
;
5510 #if IFLICT_BRAIN_DAMAGE
5511 /* Section Protection */
5512 case 'r': /* section is readable */
5513 flags
|= IMAGE_SCN_MEM_READ
;
5515 case 'w': /* section is writable */
5516 flags
|= IMAGE_SCN_MEM_WRITE
;
5518 case 'x': /* section is executable */
5519 flags
|= IMAGE_SCN_MEM_EXECUTE
;
5521 case 's': /* section is sharable */
5522 flags
|= IMAGE_SCN_MEM_SHARED
;
5525 /* Section Alignment */
5526 case '0': /* align to byte boundary */
5527 flags
|= IMAGE_SCN_ALIGN_1BYTES
;
5530 case '1': /* align to halfword boundary */
5531 flags
|= IMAGE_SCN_ALIGN_2BYTES
;
5534 case '2': /* align to word boundary */
5535 flags
|= IMAGE_SCN_ALIGN_4BYTES
;
5538 case '3': /* align to doubleword boundary */
5539 flags
|= IMAGE_SCN_ALIGN_8BYTES
;
5542 case '4': /* align to quadword boundary */
5543 flags
|= IMAGE_SCN_ALIGN_16BYTES
;
5546 case '5': /* align to 32 byte boundary */
5547 flags
|= IMAGE_SCN_ALIGN_32BYTES
;
5550 case '6': /* align to 64 byte boundary */
5551 flags
|= IMAGE_SCN_ALIGN_64BYTES
;
5556 as_bad (_("unknown section attribute '%c'"),
5557 *input_line_pointer
);
5560 ++input_line_pointer
;
5562 if (*input_line_pointer
== '"')
5563 ++input_line_pointer
;
5567 sec
= subseg_new (name
, (subsegT
) exp
);
5569 ppc_set_current_section (sec
);
5571 if (flags
!= SEC_NO_FLAGS
)
5573 if (! bfd_set_section_flags (stdoutput
, sec
, flags
))
5574 as_bad (_("error setting flags for \"%s\": %s"),
5575 bfd_section_name (stdoutput
, sec
),
5576 bfd_errmsg (bfd_get_error ()));
5579 bfd_set_section_alignment (stdoutput
, sec
, align
);
5583 ppc_pe_function (int ignore ATTRIBUTE_UNUSED
)
5589 endc
= get_symbol_name (&name
);
5591 ext_sym
= symbol_find_or_make (name
);
5593 (void) restore_line_pointer (endc
);
5595 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5596 SF_SET_FUNCTION (ext_sym
);
5597 SF_SET_PROCESS (ext_sym
);
5598 coff_add_linesym (ext_sym
);
5600 demand_empty_rest_of_line ();
5604 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED
)
5606 if (tocdata_section
== 0)
5608 tocdata_section
= subseg_new (".tocd", 0);
5609 /* FIXME: section flags won't work. */
5610 bfd_set_section_flags (stdoutput
, tocdata_section
,
5611 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5612 | SEC_READONLY
| SEC_DATA
));
5614 bfd_set_section_alignment (stdoutput
, tocdata_section
, 2);
5618 rdata_section
= subseg_new (".tocd", 0);
5621 ppc_set_current_section (tocdata_section
);
5623 demand_empty_rest_of_line ();
5626 /* Don't adjust TOC relocs to use the section symbol. */
5629 ppc_pe_fix_adjustable (fixS
*fix
)
5631 return fix
->fx_r_type
!= BFD_RELOC_PPC_TOC16
;
5638 /* XCOFF specific symbol and file handling. */
5640 /* Canonicalize the symbol name. We use the to force the suffix, if
5641 any, to use square brackets, and to be in upper case. */
5644 ppc_canonicalize_symbol_name (char *name
)
5648 if (ppc_stab_symbol
)
5651 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
5665 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
5668 if (*s
== '\0' || s
[1] != '\0')
5669 as_bad (_("bad symbol suffix"));
5677 /* Set the class of a symbol based on the suffix, if any. This is
5678 called whenever a new symbol is created. */
5681 ppc_symbol_new_hook (symbolS
*sym
)
5683 struct ppc_tc_sy
*tc
;
5686 tc
= symbol_get_tc (sym
);
5689 tc
->symbol_class
= -1;
5690 tc
->real_name
= NULL
;
5697 if (ppc_stab_symbol
)
5700 s
= strchr (S_GET_NAME (sym
), '[');
5701 if (s
== (const char *) NULL
)
5703 /* There is no suffix. */
5712 if (strcmp (s
, "BS]") == 0)
5713 tc
->symbol_class
= XMC_BS
;
5716 if (strcmp (s
, "DB]") == 0)
5717 tc
->symbol_class
= XMC_DB
;
5718 else if (strcmp (s
, "DS]") == 0)
5719 tc
->symbol_class
= XMC_DS
;
5722 if (strcmp (s
, "GL]") == 0)
5723 tc
->symbol_class
= XMC_GL
;
5726 if (strcmp (s
, "PR]") == 0)
5727 tc
->symbol_class
= XMC_PR
;
5730 if (strcmp (s
, "RO]") == 0)
5731 tc
->symbol_class
= XMC_RO
;
5732 else if (strcmp (s
, "RW]") == 0)
5733 tc
->symbol_class
= XMC_RW
;
5736 if (strcmp (s
, "SV]") == 0)
5737 tc
->symbol_class
= XMC_SV
;
5740 if (strcmp (s
, "TC]") == 0)
5741 tc
->symbol_class
= XMC_TC
;
5742 else if (strcmp (s
, "TI]") == 0)
5743 tc
->symbol_class
= XMC_TI
;
5744 else if (strcmp (s
, "TB]") == 0)
5745 tc
->symbol_class
= XMC_TB
;
5746 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
5747 tc
->symbol_class
= XMC_TC0
;
5750 if (strcmp (s
, "UA]") == 0)
5751 tc
->symbol_class
= XMC_UA
;
5752 else if (strcmp (s
, "UC]") == 0)
5753 tc
->symbol_class
= XMC_UC
;
5756 if (strcmp (s
, "XO]") == 0)
5757 tc
->symbol_class
= XMC_XO
;
5761 if (tc
->symbol_class
== -1)
5762 as_bad (_("unrecognized symbol suffix"));
5765 /* Set the class of a label based on where it is defined. This
5766 handles symbols without suffixes. Also, move the symbol so that it
5767 follows the csect symbol. */
5770 ppc_frob_label (symbolS
*sym
)
5772 if (ppc_current_csect
!= (symbolS
*) NULL
)
5774 if (symbol_get_tc (sym
)->symbol_class
== -1)
5775 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
5777 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5778 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
5779 &symbol_rootP
, &symbol_lastP
);
5780 symbol_get_tc (ppc_current_csect
)->within
= sym
;
5781 symbol_get_tc (sym
)->within
= ppc_current_csect
;
5785 dwarf2_emit_label (sym
);
5789 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5790 seen. It tells ppc_adjust_symtab whether it needs to look through
5793 static bfd_boolean ppc_saw_abs
;
5795 /* Change the name of a symbol just before writing it out. Set the
5796 real name if the .rename pseudo-op was used. Otherwise, remove any
5797 class suffix. Return 1 if the symbol should not be included in the
5801 ppc_frob_symbol (symbolS
*sym
)
5803 static symbolS
*ppc_last_function
;
5804 static symbolS
*set_end
;
5806 /* Discard symbols that should not be included in the output symbol
5808 if (! symbol_used_in_reloc_p (sym
)
5809 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
5810 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
5811 && ! symbol_get_tc (sym
)->output
5812 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
5815 /* This one will disappear anyway. Don't make a csect sym for it. */
5816 if (sym
== abs_section_sym
)
5819 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
5820 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
5826 name
= S_GET_NAME (sym
);
5827 s
= strchr (name
, '[');
5828 if (s
!= (char *) NULL
)
5834 snew
= xstrndup (name
, len
);
5836 S_SET_NAME (sym
, snew
);
5840 if (set_end
!= (symbolS
*) NULL
)
5842 SA_SET_SYM_ENDNDX (set_end
, sym
);
5846 if (SF_GET_FUNCTION (sym
))
5848 if (ppc_last_function
!= (symbolS
*) NULL
)
5849 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5850 ppc_last_function
= sym
;
5851 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
5853 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
5854 SA_SET_SYM_FSIZE (sym
,
5855 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
5858 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
5859 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
5861 if (ppc_last_function
== (symbolS
*) NULL
)
5862 as_bad (_(".ef with no preceding .function"));
5865 set_end
= ppc_last_function
;
5866 ppc_last_function
= NULL
;
5868 /* We don't have a C_EFCN symbol, but we need to force the
5869 COFF backend to believe that it has seen one. */
5870 coff_last_function
= NULL
;
5874 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
5875 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
5876 && S_GET_STORAGE_CLASS (sym
) != C_FILE
5877 && S_GET_STORAGE_CLASS (sym
) != C_FCN
5878 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
5879 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
5880 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
5881 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
5882 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
5883 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
5884 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
5886 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
5887 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
5888 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
5891 union internal_auxent
*a
;
5893 /* Create a csect aux. */
5894 i
= S_GET_NUMBER_AUXILIARY (sym
);
5895 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
5896 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
5897 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
5899 /* This is the TOC table. */
5900 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
5901 a
->x_csect
.x_scnlen
.l
= 0;
5902 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
5904 else if (symbol_get_tc (sym
)->subseg
!= 0)
5906 /* This is a csect symbol. x_scnlen is the size of the
5908 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
5909 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
5910 S_GET_SEGMENT (sym
))
5911 - S_GET_VALUE (sym
));
5914 resolve_symbol_value (symbol_get_tc (sym
)->next
);
5915 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
5916 - S_GET_VALUE (sym
));
5918 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
5920 else if (S_GET_SEGMENT (sym
) == bss_section
)
5922 /* This is a common symbol. */
5923 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
5924 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
5925 if (S_IS_EXTERNAL (sym
))
5926 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
5928 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
5930 else if (S_GET_SEGMENT (sym
) == absolute_section
)
5932 /* This is an absolute symbol. The csect will be created by
5933 ppc_adjust_symtab. */
5935 a
->x_csect
.x_smtyp
= XTY_LD
;
5936 if (symbol_get_tc (sym
)->symbol_class
== -1)
5937 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
5939 else if (! S_IS_DEFINED (sym
))
5941 /* This is an external symbol. */
5942 a
->x_csect
.x_scnlen
.l
= 0;
5943 a
->x_csect
.x_smtyp
= XTY_ER
;
5945 else if (symbol_get_tc (sym
)->symbol_class
== XMC_TC
)
5949 /* This is a TOC definition. x_scnlen is the size of the
5951 next
= symbol_next (sym
);
5952 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
5953 next
= symbol_next (next
);
5954 if (next
== (symbolS
*) NULL
5955 || symbol_get_tc (next
)->symbol_class
!= XMC_TC
)
5957 if (ppc_after_toc_frag
== (fragS
*) NULL
)
5958 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
5960 - S_GET_VALUE (sym
));
5962 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
5963 - S_GET_VALUE (sym
));
5967 resolve_symbol_value (next
);
5968 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
5969 - S_GET_VALUE (sym
));
5971 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
5977 /* This is a normal symbol definition. x_scnlen is the
5978 symbol index of the containing csect. */
5979 if (S_GET_SEGMENT (sym
) == text_section
)
5980 csect
= ppc_text_csects
;
5981 else if (S_GET_SEGMENT (sym
) == data_section
)
5982 csect
= ppc_data_csects
;
5986 /* Skip the initial dummy symbol. */
5987 csect
= symbol_get_tc (csect
)->next
;
5989 if (csect
== (symbolS
*) NULL
)
5991 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
5992 a
->x_csect
.x_scnlen
.l
= 0;
5996 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
5998 resolve_symbol_value (symbol_get_tc (csect
)->next
);
5999 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6000 > S_GET_VALUE (sym
))
6002 csect
= symbol_get_tc (csect
)->next
;
6005 a
->x_csect
.x_scnlen
.p
=
6006 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6007 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6010 a
->x_csect
.x_smtyp
= XTY_LD
;
6013 a
->x_csect
.x_parmhash
= 0;
6014 a
->x_csect
.x_snhash
= 0;
6015 if (symbol_get_tc (sym
)->symbol_class
== -1)
6016 a
->x_csect
.x_smclas
= XMC_PR
;
6018 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6019 a
->x_csect
.x_stab
= 0;
6020 a
->x_csect
.x_snstab
= 0;
6022 /* Don't let the COFF backend resort these symbols. */
6023 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6025 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6027 /* We want the value to be the symbol index of the referenced
6028 csect symbol. BFD will do that for us if we set the right
6030 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6031 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6033 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6034 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6036 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6041 block
= symbol_get_tc (sym
)->within
;
6044 /* The value is the offset from the enclosing csect. */
6047 csect
= symbol_get_tc (block
)->within
;
6048 resolve_symbol_value (csect
);
6049 base
= S_GET_VALUE (csect
);
6054 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6056 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6057 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6059 /* We want the value to be a file offset into the line numbers.
6060 BFD will do that for us if we set the right flags. We have
6061 already set the value correctly. */
6062 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6068 /* Adjust the symbol table. This creates csect symbols for all
6069 absolute symbols. */
6072 ppc_adjust_symtab (void)
6079 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6083 union internal_auxent
*a
;
6085 if (S_GET_SEGMENT (sym
) != absolute_section
)
6088 csect
= symbol_create (".abs[XO]", absolute_section
,
6089 S_GET_VALUE (sym
), &zero_address_frag
);
6090 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6091 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6092 i
= S_GET_NUMBER_AUXILIARY (csect
);
6093 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6094 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6095 a
->x_csect
.x_scnlen
.l
= 0;
6096 a
->x_csect
.x_smtyp
= XTY_SD
;
6097 a
->x_csect
.x_parmhash
= 0;
6098 a
->x_csect
.x_snhash
= 0;
6099 a
->x_csect
.x_smclas
= XMC_XO
;
6100 a
->x_csect
.x_stab
= 0;
6101 a
->x_csect
.x_snstab
= 0;
6103 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6105 i
= S_GET_NUMBER_AUXILIARY (sym
);
6106 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6107 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6108 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6111 ppc_saw_abs
= FALSE
;
6114 /* Set the VMA for a section. This is called on all the sections in
6118 ppc_frob_section (asection
*sec
)
6120 static bfd_vma vma
= 0;
6122 /* Dwarf sections start at 0. */
6123 if (bfd_get_section_flags (NULL
, sec
) & SEC_DEBUGGING
)
6126 vma
= md_section_align (sec
, vma
);
6127 bfd_set_section_vma (stdoutput
, sec
, vma
);
6128 vma
+= bfd_section_size (stdoutput
, sec
);
6131 #endif /* OBJ_XCOFF */
6134 md_atof (int type
, char *litp
, int *sizep
)
6136 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6139 /* Write a value out to the object file, using the appropriate
6143 md_number_to_chars (char *buf
, valueT val
, int n
)
6145 if (target_big_endian
)
6146 number_to_chars_bigendian (buf
, val
, n
);
6148 number_to_chars_littleendian (buf
, val
, n
);
6151 /* Align a section (I don't know why this is machine dependent). */
6154 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6159 int align
= bfd_get_section_alignment (stdoutput
, seg
);
6161 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6165 /* We don't have any form of relaxing. */
6168 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6169 asection
*seg ATTRIBUTE_UNUSED
)
6175 /* Convert a machine dependent frag. We never generate these. */
6178 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6179 asection
*sec ATTRIBUTE_UNUSED
,
6180 fragS
*fragp ATTRIBUTE_UNUSED
)
6185 /* We have no need to default values of symbols. */
6188 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6193 /* Functions concerning relocs. */
6195 /* The location from which a PC relative jump should be calculated,
6196 given a PC relative reloc. */
6199 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6201 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6206 /* This is called to see whether a fixup should be adjusted to use a
6207 section symbol. We take the opportunity to change a fixup against
6208 a symbol in the TOC subsegment into a reloc against the
6209 corresponding .tc symbol. */
6212 ppc_fix_adjustable (fixS
*fix
)
6214 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6215 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6216 TC_SYMFIELD_TYPE
*tc
;
6218 if (symseg
== absolute_section
)
6221 /* Always adjust symbols in debugging sections. */
6222 if (bfd_get_section_flags (stdoutput
, symseg
) & SEC_DEBUGGING
)
6225 if (ppc_toc_csect
!= (symbolS
*) NULL
6226 && fix
->fx_addsy
!= ppc_toc_csect
6227 && symseg
== data_section
6228 && val
>= ppc_toc_frag
->fr_address
6229 && (ppc_after_toc_frag
== (fragS
*) NULL
6230 || val
< ppc_after_toc_frag
->fr_address
))
6234 for (sy
= symbol_next (ppc_toc_csect
);
6235 sy
!= (symbolS
*) NULL
;
6236 sy
= symbol_next (sy
))
6238 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6240 if (sy_tc
->symbol_class
== XMC_TC0
)
6242 if (sy_tc
->symbol_class
!= XMC_TC
)
6244 if (val
== resolve_symbol_value (sy
))
6247 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6252 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6253 _("symbol in .toc does not match any .tc"));
6256 /* Possibly adjust the reloc to be against the csect. */
6257 tc
= symbol_get_tc (fix
->fx_addsy
);
6259 && tc
->symbol_class
!= XMC_TC0
6260 && tc
->symbol_class
!= XMC_TC
6261 && symseg
!= bss_section
6262 /* Don't adjust if this is a reloc in the toc section. */
6263 && (symseg
!= data_section
6264 || ppc_toc_csect
== NULL
6265 || val
< ppc_toc_frag
->fr_address
6266 || (ppc_after_toc_frag
!= NULL
6267 && val
>= ppc_after_toc_frag
->fr_address
)))
6269 symbolS
*csect
= tc
->within
;
6271 /* If the symbol was not declared by a label (eg: a section symbol),
6272 use the section instead of the csect. This doesn't happen in
6273 normal AIX assembly code. */
6275 csect
= seg_info (symseg
)->sym
;
6277 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6278 fix
->fx_addsy
= csect
;
6283 /* Adjust a reloc against a .lcomm symbol to be against the base
6285 if (symseg
== bss_section
6286 && ! S_IS_EXTERNAL (fix
->fx_addsy
))
6288 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6290 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6297 /* A reloc from one csect to another must be kept. The assembler
6298 will, of course, keep relocs between sections, and it will keep
6299 absolute relocs, but we need to force it to keep PC relative relocs
6300 between two csects in the same section. */
6303 ppc_force_relocation (fixS
*fix
)
6305 /* At this point fix->fx_addsy should already have been converted to
6306 a csect symbol. If the csect does not include the fragment, then
6307 we need to force the relocation. */
6309 && fix
->fx_addsy
!= NULL
6310 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6311 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6312 > fix
->fx_frag
->fr_address
)
6313 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6314 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6315 <= fix
->fx_frag
->fr_address
))))
6318 return generic_force_reloc (fix
);
6322 ppc_new_dot_label (symbolS
*sym
)
6324 /* Anchor this label to the current csect for relocations. */
6325 symbol_get_tc (sym
)->within
= ppc_current_csect
;
6328 #endif /* OBJ_XCOFF */
6331 /* If this function returns non-zero, it guarantees that a relocation
6332 will be emitted for a fixup. */
6335 ppc_force_relocation (fixS
*fix
)
6337 /* Branch prediction relocations must force a relocation, as must
6338 the vtable description relocs. */
6339 switch (fix
->fx_r_type
)
6341 case BFD_RELOC_PPC_B16_BRTAKEN
:
6342 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6343 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6344 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6345 case BFD_RELOC_24_PLT_PCREL
:
6346 case BFD_RELOC_PPC64_TOC
:
6348 case BFD_RELOC_PPC_B26
:
6349 case BFD_RELOC_PPC_BA26
:
6350 case BFD_RELOC_PPC_B16
:
6351 case BFD_RELOC_PPC_BA16
:
6352 /* All branch fixups targeting a localentry symbol must
6353 force a relocation. */
6356 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6357 elf_symbol_type
*elfsym
6358 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6359 gas_assert (elfsym
);
6360 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6368 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6369 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
)
6372 return generic_force_reloc (fix
);
6376 ppc_fix_adjustable (fixS
*fix
)
6378 switch (fix
->fx_r_type
)
6380 /* All branch fixups targeting a localentry symbol must
6381 continue using the symbol. */
6382 case BFD_RELOC_PPC_B26
:
6383 case BFD_RELOC_PPC_BA26
:
6384 case BFD_RELOC_PPC_B16
:
6385 case BFD_RELOC_PPC_BA16
:
6386 case BFD_RELOC_PPC_B16_BRTAKEN
:
6387 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6388 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6389 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6392 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6393 elf_symbol_type
*elfsym
6394 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6395 gas_assert (elfsym
);
6396 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6404 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
6405 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
6406 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
6407 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
6408 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
6409 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
6410 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
6411 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
6412 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
6413 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6414 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
));
6419 ppc_frag_check (struct frag
*fragP
)
6421 if (!fragP
->has_code
)
6424 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
6426 if (((fragP
->fr_address
+ fragP
->insn_addr
) & 1) != 0)
6427 as_bad (_("instruction address is not a multiple of 2"));
6431 if (((fragP
->fr_address
+ fragP
->insn_addr
) & 3) != 0)
6432 as_bad (_("instruction address is not a multiple of 4"));
6436 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6437 rs_align_code frag. */
6440 ppc_handle_align (struct frag
*fragP
)
6442 valueT count
= (fragP
->fr_next
->fr_address
6443 - (fragP
->fr_address
+ fragP
->fr_fix
));
6445 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && count
!= 0 && (count
& 1) == 0)
6447 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6450 md_number_to_chars (dest
, 0x4400, 2);
6452 else if (count
!= 0 && (count
& 3) == 0)
6454 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6458 if (count
> 4 * nop_limit
&& count
< 0x2000000)
6462 /* Make a branch, then follow with nops. Insert another
6463 frag to handle the nops. */
6464 md_number_to_chars (dest
, 0x48000000 + count
, 4);
6469 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6470 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
6471 fragP
->fr_next
= rest
;
6473 rest
->fr_address
+= rest
->fr_fix
+ 4;
6475 /* If we leave the next frag as rs_align_code we'll come here
6476 again, resulting in a bunch of branches rather than a
6477 branch followed by nops. */
6478 rest
->fr_type
= rs_align
;
6479 dest
= rest
->fr_literal
;
6482 md_number_to_chars (dest
, 0x60000000, 4);
6484 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0
6485 || (ppc_cpu
& PPC_OPCODE_POWER7
) != 0
6486 || (ppc_cpu
& PPC_OPCODE_POWER8
) != 0
6487 || (ppc_cpu
& PPC_OPCODE_POWER9
) != 0)
6489 /* For power6, power7, power8 and power9, we want the last nop to be
6490 a group terminating one. Do this by inserting an rs_fill frag
6491 immediately after this one, with its address set to the last nop
6492 location. This will automatically reduce the number of nops in
6493 the current frag by one. */
6496 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6498 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
6499 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
6500 group_nop
->fr_fix
= 0;
6501 group_nop
->fr_offset
= 1;
6502 group_nop
->fr_type
= rs_fill
;
6503 fragP
->fr_next
= group_nop
;
6504 dest
= group_nop
->fr_literal
;
6507 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0
6508 || (ppc_cpu
& PPC_OPCODE_POWER8
) != 0
6509 || (ppc_cpu
& PPC_OPCODE_POWER9
) != 0)
6511 if (ppc_cpu
& PPC_OPCODE_E500MC
)
6512 /* e500mc group terminating nop: "ori 0,0,0". */
6513 md_number_to_chars (dest
, 0x60000000, 4);
6515 /* power7/power8/power9 group terminating nop: "ori 2,2,0". */
6516 md_number_to_chars (dest
, 0x60420000, 4);
6519 /* power6 group terminating nop: "ori 1,1,0". */
6520 md_number_to_chars (dest
, 0x60210000, 4);
6525 /* Apply a fixup to the object code. This is called for all the
6526 fixups we generated by the calls to fix_new_exp, above. */
6529 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
6531 valueT value
= * valP
;
6533 const struct powerpc_operand
*operand
;
6536 if (fixP
->fx_addsy
!= NULL
)
6538 /* Hack around bfd_install_relocation brain damage. */
6540 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
6542 if (fixP
->fx_addsy
== abs_section_sym
)
6548 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6549 the symbol values. If we are doing this relocation the code in
6550 write.c is going to call bfd_install_relocation, which is also
6551 going to use the symbol value. That means that if the reloc is
6552 fully resolved we want to use *valP since bfd_install_relocation is
6554 However, if the reloc is not fully resolved we do not want to
6555 use *valP, and must use fx_offset instead. If the relocation
6556 is PC-relative, we then need to re-apply md_pcrel_from_section
6557 to this new relocation value. */
6558 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
6563 value
= fixP
->fx_offset
;
6565 value
-= md_pcrel_from_section (fixP
, seg
);
6569 /* We are only able to convert some relocs to pc-relative. */
6572 switch (fixP
->fx_r_type
)
6574 case BFD_RELOC_LO16
:
6575 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
6578 case BFD_RELOC_HI16
:
6579 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
6582 case BFD_RELOC_HI16_S
:
6583 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
6587 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
6591 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
6595 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
6598 case BFD_RELOC_PPC_16DX_HA
:
6599 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6606 else if (!fixP
->fx_done
6607 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
6609 /* addpcis is relative to next insn address. */
6611 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6616 if (fixP
->fx_pcrel_adjust
!= 0)
6618 /* This is a fixup on an instruction. */
6619 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
6621 operand
= &powerpc_operands
[opindex
];
6623 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6624 does not generate a reloc. It uses the offset of `sym' within its
6625 csect. Other usages, such as `.long sym', generate relocs. This
6626 is the documented behaviour of non-TOC symbols. */
6627 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
6628 && (operand
->bitm
& 0xfff0) == 0xfff0
6629 && operand
->shift
== 0
6630 && (operand
->insert
== NULL
|| ppc_obj64
)
6631 && fixP
->fx_addsy
!= NULL
6632 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
6633 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
6634 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC0
6635 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
6637 value
= fixP
->fx_offset
;
6641 /* During parsing of instructions, a TOC16 reloc is generated for
6642 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6643 in the toc. But at parse time, SYM may be not yet defined, so
6644 check again here. */
6645 if (fixP
->fx_r_type
== BFD_RELOC_16
6646 && fixP
->fx_addsy
!= NULL
6647 && ppc_is_toc_sym (fixP
->fx_addsy
))
6648 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
6652 /* Calculate value to be stored in field. */
6654 switch (fixP
->fx_r_type
)
6657 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
6658 case BFD_RELOC_PPC_VLE_LO16A
:
6659 case BFD_RELOC_PPC_VLE_LO16D
:
6661 case BFD_RELOC_LO16
:
6662 case BFD_RELOC_LO16_PCREL
:
6663 fieldval
= value
& 0xffff;
6665 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6666 fieldval
= SEX16 (fieldval
);
6667 fixP
->fx_no_overflow
= 1;
6670 case BFD_RELOC_HI16
:
6671 case BFD_RELOC_HI16_PCREL
:
6673 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6675 fieldval
= value
>> 16;
6676 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6678 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6679 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
6685 case BFD_RELOC_PPC_VLE_HI16A
:
6686 case BFD_RELOC_PPC_VLE_HI16D
:
6687 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6689 fieldval
= PPC_HI (value
);
6690 goto sign_extend_16
;
6692 case BFD_RELOC_HI16_S
:
6693 case BFD_RELOC_HI16_S_PCREL
:
6694 case BFD_RELOC_PPC_16DX_HA
:
6695 case BFD_RELOC_PPC_REL16DX_HA
:
6697 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6699 fieldval
= (value
+ 0x8000) >> 16;
6700 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6702 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6703 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
6709 case BFD_RELOC_PPC_VLE_HA16A
:
6710 case BFD_RELOC_PPC_VLE_HA16D
:
6711 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6713 fieldval
= PPC_HA (value
);
6714 goto sign_extend_16
;
6717 case BFD_RELOC_PPC64_HIGHER
:
6718 fieldval
= PPC_HIGHER (value
);
6719 goto sign_extend_16
;
6721 case BFD_RELOC_PPC64_HIGHER_S
:
6722 fieldval
= PPC_HIGHERA (value
);
6723 goto sign_extend_16
;
6725 case BFD_RELOC_PPC64_HIGHEST
:
6726 fieldval
= PPC_HIGHEST (value
);
6727 goto sign_extend_16
;
6729 case BFD_RELOC_PPC64_HIGHEST_S
:
6730 fieldval
= PPC_HIGHESTA (value
);
6731 goto sign_extend_16
;
6738 if (operand
!= NULL
)
6740 /* Handle relocs in an insn. */
6741 switch (fixP
->fx_r_type
)
6744 /* The following relocs can't be calculated by the assembler.
6745 Leave the field zero. */
6746 case BFD_RELOC_PPC_TPREL16
:
6747 case BFD_RELOC_PPC_TPREL16_LO
:
6748 case BFD_RELOC_PPC_TPREL16_HI
:
6749 case BFD_RELOC_PPC_TPREL16_HA
:
6750 case BFD_RELOC_PPC_DTPREL16
:
6751 case BFD_RELOC_PPC_DTPREL16_LO
:
6752 case BFD_RELOC_PPC_DTPREL16_HI
:
6753 case BFD_RELOC_PPC_DTPREL16_HA
:
6754 case BFD_RELOC_PPC_GOT_TLSGD16
:
6755 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
6756 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
6757 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
6758 case BFD_RELOC_PPC_GOT_TLSLD16
:
6759 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
6760 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
6761 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
6762 case BFD_RELOC_PPC_GOT_TPREL16
:
6763 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
6764 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
6765 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
6766 case BFD_RELOC_PPC_GOT_DTPREL16
:
6767 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
6768 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
6769 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
6770 case BFD_RELOC_PPC64_TPREL16_DS
:
6771 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
6772 case BFD_RELOC_PPC64_TPREL16_HIGH
:
6773 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
6774 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
6775 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
6776 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
6777 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
6778 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
6779 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
6780 case BFD_RELOC_PPC64_DTPREL16_DS
:
6781 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
6782 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
6783 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
6784 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
6785 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
6786 gas_assert (fixP
->fx_addsy
!= NULL
);
6787 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
6791 /* These also should leave the field zero for the same
6792 reason. Note that older versions of gas wrote values
6793 here. If we want to go back to the old behaviour, then
6794 all _LO and _LO_DS cases will need to be treated like
6795 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6796 case BFD_RELOC_16_GOTOFF
:
6797 case BFD_RELOC_LO16_GOTOFF
:
6798 case BFD_RELOC_HI16_GOTOFF
:
6799 case BFD_RELOC_HI16_S_GOTOFF
:
6800 case BFD_RELOC_LO16_PLTOFF
:
6801 case BFD_RELOC_HI16_PLTOFF
:
6802 case BFD_RELOC_HI16_S_PLTOFF
:
6803 case BFD_RELOC_GPREL16
:
6804 case BFD_RELOC_16_BASEREL
:
6805 case BFD_RELOC_LO16_BASEREL
:
6806 case BFD_RELOC_HI16_BASEREL
:
6807 case BFD_RELOC_HI16_S_BASEREL
:
6808 case BFD_RELOC_PPC_TOC16
:
6809 case BFD_RELOC_PPC64_TOC16_LO
:
6810 case BFD_RELOC_PPC64_TOC16_HI
:
6811 case BFD_RELOC_PPC64_TOC16_HA
:
6812 case BFD_RELOC_PPC64_PLTGOT16
:
6813 case BFD_RELOC_PPC64_PLTGOT16_LO
:
6814 case BFD_RELOC_PPC64_PLTGOT16_HI
:
6815 case BFD_RELOC_PPC64_PLTGOT16_HA
:
6816 case BFD_RELOC_PPC64_GOT16_DS
:
6817 case BFD_RELOC_PPC64_GOT16_LO_DS
:
6818 case BFD_RELOC_PPC64_PLT16_LO_DS
:
6819 case BFD_RELOC_PPC64_SECTOFF_DS
:
6820 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
6821 case BFD_RELOC_PPC64_TOC16_DS
:
6822 case BFD_RELOC_PPC64_TOC16_LO_DS
:
6823 case BFD_RELOC_PPC64_PLTGOT16_DS
:
6824 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
6825 case BFD_RELOC_PPC_EMB_NADDR16
:
6826 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
6827 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
6828 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
6829 case BFD_RELOC_PPC_EMB_SDAI16
:
6830 case BFD_RELOC_PPC_EMB_SDA2I16
:
6831 case BFD_RELOC_PPC_EMB_SDA2REL
:
6832 case BFD_RELOC_PPC_EMB_SDA21
:
6833 case BFD_RELOC_PPC_EMB_MRKREF
:
6834 case BFD_RELOC_PPC_EMB_RELSEC16
:
6835 case BFD_RELOC_PPC_EMB_RELST_LO
:
6836 case BFD_RELOC_PPC_EMB_RELST_HI
:
6837 case BFD_RELOC_PPC_EMB_RELST_HA
:
6838 case BFD_RELOC_PPC_EMB_BIT_FLD
:
6839 case BFD_RELOC_PPC_EMB_RELSDA
:
6840 case BFD_RELOC_PPC_VLE_SDA21
:
6841 case BFD_RELOC_PPC_VLE_SDA21_LO
:
6842 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
6843 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
6844 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
6845 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
6846 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
6847 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
6848 gas_assert (fixP
->fx_addsy
!= NULL
);
6851 case BFD_RELOC_PPC_TLS
:
6852 case BFD_RELOC_PPC_TLSGD
:
6853 case BFD_RELOC_PPC_TLSLD
:
6859 case BFD_RELOC_PPC_B16
:
6860 /* Adjust the offset to the instruction boundary. */
6865 case BFD_RELOC_VTABLE_INHERIT
:
6866 case BFD_RELOC_VTABLE_ENTRY
:
6867 case BFD_RELOC_PPC_DTPMOD
:
6868 case BFD_RELOC_PPC_TPREL
:
6869 case BFD_RELOC_PPC_DTPREL
:
6870 case BFD_RELOC_PPC_COPY
:
6871 case BFD_RELOC_PPC_GLOB_DAT
:
6872 case BFD_RELOC_32_PLT_PCREL
:
6873 case BFD_RELOC_PPC_EMB_NADDR32
:
6874 case BFD_RELOC_PPC64_TOC
:
6875 case BFD_RELOC_CTOR
:
6877 case BFD_RELOC_32_PCREL
:
6880 case BFD_RELOC_64_PCREL
:
6881 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
6882 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
6883 _("%s unsupported as instruction fixup"),
6884 bfd_get_reloc_code_name (fixP
->fx_r_type
));
6893 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6894 contents can stay at zero. */
6895 #define APPLY_RELOC fixP->fx_done
6897 #define APPLY_RELOC 1
6899 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
6902 unsigned char *where
;
6904 /* Fetch the instruction, insert the fully resolved operand
6905 value, and stuff the instruction back again. */
6906 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
6907 if (target_big_endian
)
6909 if (fixP
->fx_size
== 4)
6910 insn
= bfd_getb32 (where
);
6912 insn
= bfd_getb16 (where
);
6916 if (fixP
->fx_size
== 4)
6917 insn
= bfd_getl32 (where
);
6919 insn
= bfd_getl16 (where
);
6921 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
6922 fixP
->tc_fix_data
.ppc_cpu
,
6923 fixP
->fx_file
, fixP
->fx_line
);
6924 if (target_big_endian
)
6926 if (fixP
->fx_size
== 4)
6927 bfd_putb32 (insn
, where
);
6929 bfd_putb16 (insn
, where
);
6933 if (fixP
->fx_size
== 4)
6934 bfd_putl32 (insn
, where
);
6936 bfd_putl16 (insn
, where
);
6941 /* Nothing else to do here. */
6944 gas_assert (fixP
->fx_addsy
!= NULL
);
6945 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
6950 /* Use expr_symbol_where to see if this is an expression
6952 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
6953 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
6954 _("unresolved expression that must be resolved"));
6956 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
6957 _("unsupported relocation against %s"),
6958 S_GET_NAME (fixP
->fx_addsy
));
6965 /* Handle relocs in data. */
6966 switch (fixP
->fx_r_type
)
6968 case BFD_RELOC_VTABLE_INHERIT
:
6970 && !S_IS_DEFINED (fixP
->fx_addsy
)
6971 && !S_IS_WEAK (fixP
->fx_addsy
))
6972 S_SET_WEAK (fixP
->fx_addsy
);
6975 case BFD_RELOC_VTABLE_ENTRY
:
6980 /* These can appear with @l etc. in data. */
6981 case BFD_RELOC_LO16
:
6982 case BFD_RELOC_LO16_PCREL
:
6983 case BFD_RELOC_HI16
:
6984 case BFD_RELOC_HI16_PCREL
:
6985 case BFD_RELOC_HI16_S
:
6986 case BFD_RELOC_HI16_S_PCREL
:
6987 case BFD_RELOC_PPC64_HIGHER
:
6988 case BFD_RELOC_PPC64_HIGHER_S
:
6989 case BFD_RELOC_PPC64_HIGHEST
:
6990 case BFD_RELOC_PPC64_HIGHEST_S
:
6991 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6992 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6993 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
6996 case BFD_RELOC_PPC_DTPMOD
:
6997 case BFD_RELOC_PPC_TPREL
:
6998 case BFD_RELOC_PPC_DTPREL
:
6999 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7002 /* Just punt all of these to the linker. */
7003 case BFD_RELOC_PPC_B16_BRTAKEN
:
7004 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7005 case BFD_RELOC_16_GOTOFF
:
7006 case BFD_RELOC_LO16_GOTOFF
:
7007 case BFD_RELOC_HI16_GOTOFF
:
7008 case BFD_RELOC_HI16_S_GOTOFF
:
7009 case BFD_RELOC_LO16_PLTOFF
:
7010 case BFD_RELOC_HI16_PLTOFF
:
7011 case BFD_RELOC_HI16_S_PLTOFF
:
7012 case BFD_RELOC_PPC_COPY
:
7013 case BFD_RELOC_PPC_GLOB_DAT
:
7014 case BFD_RELOC_16_BASEREL
:
7015 case BFD_RELOC_LO16_BASEREL
:
7016 case BFD_RELOC_HI16_BASEREL
:
7017 case BFD_RELOC_HI16_S_BASEREL
:
7018 case BFD_RELOC_PPC_TLS
:
7019 case BFD_RELOC_PPC_DTPREL16_LO
:
7020 case BFD_RELOC_PPC_DTPREL16_HI
:
7021 case BFD_RELOC_PPC_DTPREL16_HA
:
7022 case BFD_RELOC_PPC_TPREL16_LO
:
7023 case BFD_RELOC_PPC_TPREL16_HI
:
7024 case BFD_RELOC_PPC_TPREL16_HA
:
7025 case BFD_RELOC_PPC_GOT_TLSGD16
:
7026 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7027 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7028 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7029 case BFD_RELOC_PPC_GOT_TLSLD16
:
7030 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7031 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7032 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7033 case BFD_RELOC_PPC_GOT_DTPREL16
:
7034 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7035 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7036 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7037 case BFD_RELOC_PPC_GOT_TPREL16
:
7038 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7039 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7040 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7041 case BFD_RELOC_24_PLT_PCREL
:
7042 case BFD_RELOC_PPC_LOCAL24PC
:
7043 case BFD_RELOC_32_PLT_PCREL
:
7044 case BFD_RELOC_GPREL16
:
7045 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7046 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7047 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7048 case BFD_RELOC_PPC_EMB_NADDR32
:
7049 case BFD_RELOC_PPC_EMB_NADDR16
:
7050 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7051 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7052 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7053 case BFD_RELOC_PPC_EMB_SDAI16
:
7054 case BFD_RELOC_PPC_EMB_SDA2REL
:
7055 case BFD_RELOC_PPC_EMB_SDA2I16
:
7056 case BFD_RELOC_PPC_EMB_SDA21
:
7057 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7058 case BFD_RELOC_PPC_EMB_MRKREF
:
7059 case BFD_RELOC_PPC_EMB_RELSEC16
:
7060 case BFD_RELOC_PPC_EMB_RELST_LO
:
7061 case BFD_RELOC_PPC_EMB_RELST_HI
:
7062 case BFD_RELOC_PPC_EMB_RELST_HA
:
7063 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7064 case BFD_RELOC_PPC_EMB_RELSDA
:
7065 case BFD_RELOC_PPC64_TOC
:
7066 case BFD_RELOC_PPC_TOC16
:
7067 case BFD_RELOC_PPC64_TOC16_LO
:
7068 case BFD_RELOC_PPC64_TOC16_HI
:
7069 case BFD_RELOC_PPC64_TOC16_HA
:
7070 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7071 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7072 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7073 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7074 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7075 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7076 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7077 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7078 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7079 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7080 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7081 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7087 case BFD_RELOC_NONE
:
7089 case BFD_RELOC_CTOR
:
7091 case BFD_RELOC_32_PCREL
:
7094 case BFD_RELOC_64_PCREL
:
7096 case BFD_RELOC_16_PCREL
:
7102 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7107 if (fixP
->fx_size
&& APPLY_RELOC
)
7108 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7109 fieldval
, fixP
->fx_size
);
7111 && (seg
->flags
& SEC_CODE
) != 0
7112 && fixP
->fx_size
== 4
7115 && (fixP
->fx_r_type
== BFD_RELOC_32
7116 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7117 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7118 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7119 _("data in executable section"));
7123 ppc_elf_validate_fix (fixP
, seg
);
7124 fixP
->fx_addnumber
= value
;
7126 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7127 from the section contents. If we are going to be emitting a reloc
7128 then the section contents are immaterial, so don't warn if they
7129 happen to overflow. Leave such warnings to ld. */
7132 fixP
->fx_no_overflow
= 1;
7134 /* Arrange to emit .TOC. as a normal symbol if used in anything
7135 but .TOC.@tocbase. */
7137 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7138 && fixP
->fx_addsy
!= NULL
7139 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7140 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7143 if (fixP
->fx_r_type
!= BFD_RELOC_PPC_TOC16
)
7144 fixP
->fx_addnumber
= 0;
7148 fixP
->fx_addnumber
= 0;
7150 /* We want to use the offset within the toc, not the actual VMA
7152 fixP
->fx_addnumber
=
7153 - bfd_get_section_vma (stdoutput
, S_GET_SEGMENT (fixP
->fx_addsy
))
7154 - S_GET_VALUE (ppc_toc_csect
);
7155 /* Set *valP to avoid errors. */
7162 /* Generate a reloc for a fixup. */
7165 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7169 reloc
= XNEW (arelent
);
7171 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7172 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7173 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7174 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7175 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7177 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7178 _("reloc %d not supported by object file format"),
7179 (int) fixp
->fx_r_type
);
7182 reloc
->addend
= fixp
->fx_addnumber
;
7188 ppc_cfi_frame_initial_instructions (void)
7190 cfi_add_CFA_def_cfa (1, 0);
7194 tc_ppc_regname_to_dw2regnum (char *regname
)
7196 unsigned int regnum
= -1;
7200 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7202 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7203 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7204 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7205 { "spe_acc", 111 }, { "spefscr", 112 }
7208 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7209 if (strcmp (regnames
[i
].name
, regname
) == 0)
7210 return regnames
[i
].dw2regnum
;
7212 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7214 p
= regname
+ 1 + (regname
[1] == '.');
7215 regnum
= strtoul (p
, &q
, 10);
7216 if (p
== q
|| *q
|| regnum
>= 32)
7218 if (regname
[0] == 'f')
7220 else if (regname
[0] == 'v')
7223 else if (regname
[0] == 'c' && regname
[1] == 'r')
7225 p
= regname
+ 2 + (regname
[2] == '.');
7226 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7228 regnum
= p
[0] - '0' + 68;