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[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
4 Free Software Foundation, Inc.
5 Written by Ian Lance Taylor, Cygnus Support.
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
22 02110-1301, USA. */
23
24 #include "as.h"
25 #include "safe-ctype.h"
26 #include "subsegs.h"
27 #include "dw2gencfi.h"
28 #include "opcode/ppc.h"
29
30 #ifdef OBJ_ELF
31 #include "elf/ppc.h"
32 #include "elf/ppc64.h"
33 #include "dwarf2dbg.h"
34 #endif
35
36 #ifdef TE_PE
37 #include "coff/pe.h"
38 #endif
39
40 #ifdef OBJ_XCOFF
41 #include "coff/xcoff.h"
42 #include "libxcoff.h"
43 #endif
44
45 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
46
47 /* Tell the main code what the endianness is. */
48 extern int target_big_endian;
49
50 /* Whether or not, we've set target_big_endian. */
51 static int set_target_endian = 0;
52
53 /* Whether to use user friendly register names. */
54 #ifndef TARGET_REG_NAMES_P
55 #ifdef TE_PE
56 #define TARGET_REG_NAMES_P TRUE
57 #else
58 #define TARGET_REG_NAMES_P FALSE
59 #endif
60 #endif
61
62 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 HIGHESTA. */
64
65 /* #lo(value) denotes the least significant 16 bits of the indicated. */
66 #define PPC_LO(v) ((v) & 0xffff)
67
68 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
69 #define PPC_HI(v) (((v) >> 16) & 0xffff)
70
71 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
72 the indicated value, compensating for #lo() being treated as a
73 signed number. */
74 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
75
76 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
77 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
78
79 /* #highera(value) denotes bits 32 through 47 of the indicated value,
80 compensating for #lo() being treated as a signed number. */
81 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
82
83 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
84 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
85
86 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
87 compensating for #lo being treated as a signed number. */
88 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
89
90 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
91
92 /* For the time being on ppc64, don't report overflow on @h and @ha
93 applied to constants. */
94 #define REPORT_OVERFLOW_HI 0
95
96 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
97
98 static void ppc_macro (char *, const struct powerpc_macro *);
99 static void ppc_byte (int);
100
101 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
102 static void ppc_tc (int);
103 static void ppc_machine (int);
104 #endif
105
106 #ifdef OBJ_XCOFF
107 static void ppc_comm (int);
108 static void ppc_bb (int);
109 static void ppc_bc (int);
110 static void ppc_bf (int);
111 static void ppc_biei (int);
112 static void ppc_bs (int);
113 static void ppc_eb (int);
114 static void ppc_ec (int);
115 static void ppc_ef (int);
116 static void ppc_es (int);
117 static void ppc_csect (int);
118 static void ppc_dwsect (int);
119 static void ppc_change_csect (symbolS *, offsetT);
120 static void ppc_function (int);
121 static void ppc_extern (int);
122 static void ppc_lglobl (int);
123 static void ppc_ref (int);
124 static void ppc_section (int);
125 static void ppc_named_section (int);
126 static void ppc_stabx (int);
127 static void ppc_rename (int);
128 static void ppc_toc (int);
129 static void ppc_xcoff_cons (int);
130 static void ppc_vbyte (int);
131 #endif
132
133 #ifdef OBJ_ELF
134 static void ppc_elf_cons (int);
135 static void ppc_elf_rdata (int);
136 static void ppc_elf_lcomm (int);
137 static void ppc_elf_localentry (int);
138 static void ppc_elf_abiversion (int);
139 #endif
140
141 #ifdef TE_PE
142 static void ppc_previous (int);
143 static void ppc_pdata (int);
144 static void ppc_ydata (int);
145 static void ppc_reldata (int);
146 static void ppc_rdata (int);
147 static void ppc_ualong (int);
148 static void ppc_znop (int);
149 static void ppc_pe_comm (int);
150 static void ppc_pe_section (int);
151 static void ppc_pe_function (int);
152 static void ppc_pe_tocd (int);
153 #endif
154 \f
155 /* Generic assembler global variables which must be defined by all
156 targets. */
157
158 #ifdef OBJ_ELF
159 /* This string holds the chars that always start a comment. If the
160 pre-processor is disabled, these aren't very useful. The macro
161 tc_comment_chars points to this. We use this, rather than the
162 usual comment_chars, so that we can switch for Solaris conventions. */
163 static const char ppc_solaris_comment_chars[] = "#!";
164 static const char ppc_eabi_comment_chars[] = "#";
165
166 #ifdef TARGET_SOLARIS_COMMENT
167 const char *ppc_comment_chars = ppc_solaris_comment_chars;
168 #else
169 const char *ppc_comment_chars = ppc_eabi_comment_chars;
170 #endif
171 #else
172 const char comment_chars[] = "#";
173 #endif
174
175 /* Characters which start a comment at the beginning of a line. */
176 const char line_comment_chars[] = "#";
177
178 /* Characters which may be used to separate multiple commands on a
179 single line. */
180 const char line_separator_chars[] = ";";
181
182 /* Characters which are used to indicate an exponent in a floating
183 point number. */
184 const char EXP_CHARS[] = "eE";
185
186 /* Characters which mean that a number is a floating point constant,
187 as in 0d1.0. */
188 const char FLT_CHARS[] = "dD";
189
190 /* Anything that can start an operand needs to be mentioned here,
191 to stop the input scrubber eating whitespace. */
192 const char ppc_symbol_chars[] = "%[";
193
194 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
195 int ppc_cie_data_alignment;
196
197 /* The dwarf2 minimum instruction length. */
198 int ppc_dwarf2_line_min_insn_length;
199
200 /* More than this number of nops in an alignment op gets a branch
201 instead. */
202 unsigned long nop_limit = 4;
203
204 /* The type of processor we are assembling for. This is one or more
205 of the PPC_OPCODE flags defined in opcode/ppc.h. */
206 ppc_cpu_t ppc_cpu = 0;
207 ppc_cpu_t sticky = 0;
208
209 /* Value for ELF e_flags EF_PPC64_ABI. */
210 unsigned int ppc_abiversion = 0;
211
212 /* Flags set on encountering toc relocs. */
213 enum {
214 has_large_toc_reloc = 1,
215 has_small_toc_reloc = 2
216 } toc_reloc_types;
217 \f
218 /* The target specific pseudo-ops which we support. */
219
220 const pseudo_typeS md_pseudo_table[] =
221 {
222 /* Pseudo-ops which must be overridden. */
223 { "byte", ppc_byte, 0 },
224
225 #ifdef OBJ_XCOFF
226 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
227 legitimately belong in the obj-*.c file. However, XCOFF is based
228 on COFF, and is only implemented for the RS/6000. We just use
229 obj-coff.c, and add what we need here. */
230 { "comm", ppc_comm, 0 },
231 { "lcomm", ppc_comm, 1 },
232 { "bb", ppc_bb, 0 },
233 { "bc", ppc_bc, 0 },
234 { "bf", ppc_bf, 0 },
235 { "bi", ppc_biei, 0 },
236 { "bs", ppc_bs, 0 },
237 { "csect", ppc_csect, 0 },
238 { "dwsect", ppc_dwsect, 0 },
239 { "data", ppc_section, 'd' },
240 { "eb", ppc_eb, 0 },
241 { "ec", ppc_ec, 0 },
242 { "ef", ppc_ef, 0 },
243 { "ei", ppc_biei, 1 },
244 { "es", ppc_es, 0 },
245 { "extern", ppc_extern, 0 },
246 { "function", ppc_function, 0 },
247 { "lglobl", ppc_lglobl, 0 },
248 { "ref", ppc_ref, 0 },
249 { "rename", ppc_rename, 0 },
250 { "section", ppc_named_section, 0 },
251 { "stabx", ppc_stabx, 0 },
252 { "text", ppc_section, 't' },
253 { "toc", ppc_toc, 0 },
254 { "long", ppc_xcoff_cons, 2 },
255 { "llong", ppc_xcoff_cons, 3 },
256 { "word", ppc_xcoff_cons, 1 },
257 { "short", ppc_xcoff_cons, 1 },
258 { "vbyte", ppc_vbyte, 0 },
259 #endif
260
261 #ifdef OBJ_ELF
262 { "llong", ppc_elf_cons, 8 },
263 { "quad", ppc_elf_cons, 8 },
264 { "long", ppc_elf_cons, 4 },
265 { "word", ppc_elf_cons, 2 },
266 { "short", ppc_elf_cons, 2 },
267 { "rdata", ppc_elf_rdata, 0 },
268 { "rodata", ppc_elf_rdata, 0 },
269 { "lcomm", ppc_elf_lcomm, 0 },
270 { "localentry", ppc_elf_localentry, 0 },
271 { "abiversion", ppc_elf_abiversion, 0 },
272 #endif
273
274 #ifdef TE_PE
275 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
276 { "previous", ppc_previous, 0 },
277 { "pdata", ppc_pdata, 0 },
278 { "ydata", ppc_ydata, 0 },
279 { "reldata", ppc_reldata, 0 },
280 { "rdata", ppc_rdata, 0 },
281 { "ualong", ppc_ualong, 0 },
282 { "znop", ppc_znop, 0 },
283 { "comm", ppc_pe_comm, 0 },
284 { "lcomm", ppc_pe_comm, 1 },
285 { "section", ppc_pe_section, 0 },
286 { "function", ppc_pe_function,0 },
287 { "tocd", ppc_pe_tocd, 0 },
288 #endif
289
290 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
291 { "tc", ppc_tc, 0 },
292 { "machine", ppc_machine, 0 },
293 #endif
294
295 { NULL, NULL, 0 }
296 };
297
298 \f
299 /* Predefined register names if -mregnames (or default for Windows NT).
300 In general, there are lots of them, in an attempt to be compatible
301 with a number of other Windows NT assemblers. */
302
303 /* Structure to hold information about predefined registers. */
304 struct pd_reg
305 {
306 char *name;
307 int value;
308 };
309
310 /* List of registers that are pre-defined:
311
312 Each general register has predefined names of the form:
313 1. r<reg_num> which has the value <reg_num>.
314 2. r.<reg_num> which has the value <reg_num>.
315
316 Each floating point register has predefined names of the form:
317 1. f<reg_num> which has the value <reg_num>.
318 2. f.<reg_num> which has the value <reg_num>.
319
320 Each vector unit register has predefined names of the form:
321 1. v<reg_num> which has the value <reg_num>.
322 2. v.<reg_num> which has the value <reg_num>.
323
324 Each condition register has predefined names of the form:
325 1. cr<reg_num> which has the value <reg_num>.
326 2. cr.<reg_num> which has the value <reg_num>.
327
328 There are individual registers as well:
329 sp or r.sp has the value 1
330 rtoc or r.toc has the value 2
331 fpscr has the value 0
332 xer has the value 1
333 lr has the value 8
334 ctr has the value 9
335 pmr has the value 0
336 dar has the value 19
337 dsisr has the value 18
338 dec has the value 22
339 sdr1 has the value 25
340 srr0 has the value 26
341 srr1 has the value 27
342
343 The table is sorted. Suitable for searching by a binary search. */
344
345 static const struct pd_reg pre_defined_registers[] =
346 {
347 { "cr.0", 0 }, /* Condition Registers */
348 { "cr.1", 1 },
349 { "cr.2", 2 },
350 { "cr.3", 3 },
351 { "cr.4", 4 },
352 { "cr.5", 5 },
353 { "cr.6", 6 },
354 { "cr.7", 7 },
355
356 { "cr0", 0 },
357 { "cr1", 1 },
358 { "cr2", 2 },
359 { "cr3", 3 },
360 { "cr4", 4 },
361 { "cr5", 5 },
362 { "cr6", 6 },
363 { "cr7", 7 },
364
365 { "ctr", 9 },
366
367 { "dar", 19 }, /* Data Access Register */
368 { "dec", 22 }, /* Decrementer */
369 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
370
371 { "f.0", 0 }, /* Floating point registers */
372 { "f.1", 1 },
373 { "f.10", 10 },
374 { "f.11", 11 },
375 { "f.12", 12 },
376 { "f.13", 13 },
377 { "f.14", 14 },
378 { "f.15", 15 },
379 { "f.16", 16 },
380 { "f.17", 17 },
381 { "f.18", 18 },
382 { "f.19", 19 },
383 { "f.2", 2 },
384 { "f.20", 20 },
385 { "f.21", 21 },
386 { "f.22", 22 },
387 { "f.23", 23 },
388 { "f.24", 24 },
389 { "f.25", 25 },
390 { "f.26", 26 },
391 { "f.27", 27 },
392 { "f.28", 28 },
393 { "f.29", 29 },
394 { "f.3", 3 },
395 { "f.30", 30 },
396 { "f.31", 31 },
397
398 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
399 { "f.33", 33 },
400 { "f.34", 34 },
401 { "f.35", 35 },
402 { "f.36", 36 },
403 { "f.37", 37 },
404 { "f.38", 38 },
405 { "f.39", 39 },
406 { "f.4", 4 },
407 { "f.40", 40 },
408 { "f.41", 41 },
409 { "f.42", 42 },
410 { "f.43", 43 },
411 { "f.44", 44 },
412 { "f.45", 45 },
413 { "f.46", 46 },
414 { "f.47", 47 },
415 { "f.48", 48 },
416 { "f.49", 49 },
417 { "f.5", 5 },
418 { "f.50", 50 },
419 { "f.51", 51 },
420 { "f.52", 52 },
421 { "f.53", 53 },
422 { "f.54", 54 },
423 { "f.55", 55 },
424 { "f.56", 56 },
425 { "f.57", 57 },
426 { "f.58", 58 },
427 { "f.59", 59 },
428 { "f.6", 6 },
429 { "f.60", 60 },
430 { "f.61", 61 },
431 { "f.62", 62 },
432 { "f.63", 63 },
433 { "f.7", 7 },
434 { "f.8", 8 },
435 { "f.9", 9 },
436
437 { "f0", 0 },
438 { "f1", 1 },
439 { "f10", 10 },
440 { "f11", 11 },
441 { "f12", 12 },
442 { "f13", 13 },
443 { "f14", 14 },
444 { "f15", 15 },
445 { "f16", 16 },
446 { "f17", 17 },
447 { "f18", 18 },
448 { "f19", 19 },
449 { "f2", 2 },
450 { "f20", 20 },
451 { "f21", 21 },
452 { "f22", 22 },
453 { "f23", 23 },
454 { "f24", 24 },
455 { "f25", 25 },
456 { "f26", 26 },
457 { "f27", 27 },
458 { "f28", 28 },
459 { "f29", 29 },
460 { "f3", 3 },
461 { "f30", 30 },
462 { "f31", 31 },
463
464 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
465 { "f33", 33 },
466 { "f34", 34 },
467 { "f35", 35 },
468 { "f36", 36 },
469 { "f37", 37 },
470 { "f38", 38 },
471 { "f39", 39 },
472 { "f4", 4 },
473 { "f40", 40 },
474 { "f41", 41 },
475 { "f42", 42 },
476 { "f43", 43 },
477 { "f44", 44 },
478 { "f45", 45 },
479 { "f46", 46 },
480 { "f47", 47 },
481 { "f48", 48 },
482 { "f49", 49 },
483 { "f5", 5 },
484 { "f50", 50 },
485 { "f51", 51 },
486 { "f52", 52 },
487 { "f53", 53 },
488 { "f54", 54 },
489 { "f55", 55 },
490 { "f56", 56 },
491 { "f57", 57 },
492 { "f58", 58 },
493 { "f59", 59 },
494 { "f6", 6 },
495 { "f60", 60 },
496 { "f61", 61 },
497 { "f62", 62 },
498 { "f63", 63 },
499 { "f7", 7 },
500 { "f8", 8 },
501 { "f9", 9 },
502
503 { "fpscr", 0 },
504
505 /* Quantization registers used with pair single instructions. */
506 { "gqr.0", 0 },
507 { "gqr.1", 1 },
508 { "gqr.2", 2 },
509 { "gqr.3", 3 },
510 { "gqr.4", 4 },
511 { "gqr.5", 5 },
512 { "gqr.6", 6 },
513 { "gqr.7", 7 },
514 { "gqr0", 0 },
515 { "gqr1", 1 },
516 { "gqr2", 2 },
517 { "gqr3", 3 },
518 { "gqr4", 4 },
519 { "gqr5", 5 },
520 { "gqr6", 6 },
521 { "gqr7", 7 },
522
523 { "lr", 8 }, /* Link Register */
524
525 { "pmr", 0 },
526
527 { "r.0", 0 }, /* General Purpose Registers */
528 { "r.1", 1 },
529 { "r.10", 10 },
530 { "r.11", 11 },
531 { "r.12", 12 },
532 { "r.13", 13 },
533 { "r.14", 14 },
534 { "r.15", 15 },
535 { "r.16", 16 },
536 { "r.17", 17 },
537 { "r.18", 18 },
538 { "r.19", 19 },
539 { "r.2", 2 },
540 { "r.20", 20 },
541 { "r.21", 21 },
542 { "r.22", 22 },
543 { "r.23", 23 },
544 { "r.24", 24 },
545 { "r.25", 25 },
546 { "r.26", 26 },
547 { "r.27", 27 },
548 { "r.28", 28 },
549 { "r.29", 29 },
550 { "r.3", 3 },
551 { "r.30", 30 },
552 { "r.31", 31 },
553 { "r.4", 4 },
554 { "r.5", 5 },
555 { "r.6", 6 },
556 { "r.7", 7 },
557 { "r.8", 8 },
558 { "r.9", 9 },
559
560 { "r.sp", 1 }, /* Stack Pointer */
561
562 { "r.toc", 2 }, /* Pointer to the table of contents */
563
564 { "r0", 0 }, /* More general purpose registers */
565 { "r1", 1 },
566 { "r10", 10 },
567 { "r11", 11 },
568 { "r12", 12 },
569 { "r13", 13 },
570 { "r14", 14 },
571 { "r15", 15 },
572 { "r16", 16 },
573 { "r17", 17 },
574 { "r18", 18 },
575 { "r19", 19 },
576 { "r2", 2 },
577 { "r20", 20 },
578 { "r21", 21 },
579 { "r22", 22 },
580 { "r23", 23 },
581 { "r24", 24 },
582 { "r25", 25 },
583 { "r26", 26 },
584 { "r27", 27 },
585 { "r28", 28 },
586 { "r29", 29 },
587 { "r3", 3 },
588 { "r30", 30 },
589 { "r31", 31 },
590 { "r4", 4 },
591 { "r5", 5 },
592 { "r6", 6 },
593 { "r7", 7 },
594 { "r8", 8 },
595 { "r9", 9 },
596
597 { "rtoc", 2 }, /* Table of contents */
598
599 { "sdr1", 25 }, /* Storage Description Register 1 */
600
601 { "sp", 1 },
602
603 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
604 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
605
606 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
607 { "v.1", 1 },
608 { "v.10", 10 },
609 { "v.11", 11 },
610 { "v.12", 12 },
611 { "v.13", 13 },
612 { "v.14", 14 },
613 { "v.15", 15 },
614 { "v.16", 16 },
615 { "v.17", 17 },
616 { "v.18", 18 },
617 { "v.19", 19 },
618 { "v.2", 2 },
619 { "v.20", 20 },
620 { "v.21", 21 },
621 { "v.22", 22 },
622 { "v.23", 23 },
623 { "v.24", 24 },
624 { "v.25", 25 },
625 { "v.26", 26 },
626 { "v.27", 27 },
627 { "v.28", 28 },
628 { "v.29", 29 },
629 { "v.3", 3 },
630 { "v.30", 30 },
631 { "v.31", 31 },
632 { "v.4", 4 },
633 { "v.5", 5 },
634 { "v.6", 6 },
635 { "v.7", 7 },
636 { "v.8", 8 },
637 { "v.9", 9 },
638
639 { "v0", 0 },
640 { "v1", 1 },
641 { "v10", 10 },
642 { "v11", 11 },
643 { "v12", 12 },
644 { "v13", 13 },
645 { "v14", 14 },
646 { "v15", 15 },
647 { "v16", 16 },
648 { "v17", 17 },
649 { "v18", 18 },
650 { "v19", 19 },
651 { "v2", 2 },
652 { "v20", 20 },
653 { "v21", 21 },
654 { "v22", 22 },
655 { "v23", 23 },
656 { "v24", 24 },
657 { "v25", 25 },
658 { "v26", 26 },
659 { "v27", 27 },
660 { "v28", 28 },
661 { "v29", 29 },
662 { "v3", 3 },
663 { "v30", 30 },
664 { "v31", 31 },
665 { "v4", 4 },
666 { "v5", 5 },
667 { "v6", 6 },
668 { "v7", 7 },
669 { "v8", 8 },
670 { "v9", 9 },
671
672 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
673 { "vs.1", 1 },
674 { "vs.10", 10 },
675 { "vs.11", 11 },
676 { "vs.12", 12 },
677 { "vs.13", 13 },
678 { "vs.14", 14 },
679 { "vs.15", 15 },
680 { "vs.16", 16 },
681 { "vs.17", 17 },
682 { "vs.18", 18 },
683 { "vs.19", 19 },
684 { "vs.2", 2 },
685 { "vs.20", 20 },
686 { "vs.21", 21 },
687 { "vs.22", 22 },
688 { "vs.23", 23 },
689 { "vs.24", 24 },
690 { "vs.25", 25 },
691 { "vs.26", 26 },
692 { "vs.27", 27 },
693 { "vs.28", 28 },
694 { "vs.29", 29 },
695 { "vs.3", 3 },
696 { "vs.30", 30 },
697 { "vs.31", 31 },
698 { "vs.32", 32 },
699 { "vs.33", 33 },
700 { "vs.34", 34 },
701 { "vs.35", 35 },
702 { "vs.36", 36 },
703 { "vs.37", 37 },
704 { "vs.38", 38 },
705 { "vs.39", 39 },
706 { "vs.4", 4 },
707 { "vs.40", 40 },
708 { "vs.41", 41 },
709 { "vs.42", 42 },
710 { "vs.43", 43 },
711 { "vs.44", 44 },
712 { "vs.45", 45 },
713 { "vs.46", 46 },
714 { "vs.47", 47 },
715 { "vs.48", 48 },
716 { "vs.49", 49 },
717 { "vs.5", 5 },
718 { "vs.50", 50 },
719 { "vs.51", 51 },
720 { "vs.52", 52 },
721 { "vs.53", 53 },
722 { "vs.54", 54 },
723 { "vs.55", 55 },
724 { "vs.56", 56 },
725 { "vs.57", 57 },
726 { "vs.58", 58 },
727 { "vs.59", 59 },
728 { "vs.6", 6 },
729 { "vs.60", 60 },
730 { "vs.61", 61 },
731 { "vs.62", 62 },
732 { "vs.63", 63 },
733 { "vs.7", 7 },
734 { "vs.8", 8 },
735 { "vs.9", 9 },
736
737 { "vs0", 0 },
738 { "vs1", 1 },
739 { "vs10", 10 },
740 { "vs11", 11 },
741 { "vs12", 12 },
742 { "vs13", 13 },
743 { "vs14", 14 },
744 { "vs15", 15 },
745 { "vs16", 16 },
746 { "vs17", 17 },
747 { "vs18", 18 },
748 { "vs19", 19 },
749 { "vs2", 2 },
750 { "vs20", 20 },
751 { "vs21", 21 },
752 { "vs22", 22 },
753 { "vs23", 23 },
754 { "vs24", 24 },
755 { "vs25", 25 },
756 { "vs26", 26 },
757 { "vs27", 27 },
758 { "vs28", 28 },
759 { "vs29", 29 },
760 { "vs3", 3 },
761 { "vs30", 30 },
762 { "vs31", 31 },
763 { "vs32", 32 },
764 { "vs33", 33 },
765 { "vs34", 34 },
766 { "vs35", 35 },
767 { "vs36", 36 },
768 { "vs37", 37 },
769 { "vs38", 38 },
770 { "vs39", 39 },
771 { "vs4", 4 },
772 { "vs40", 40 },
773 { "vs41", 41 },
774 { "vs42", 42 },
775 { "vs43", 43 },
776 { "vs44", 44 },
777 { "vs45", 45 },
778 { "vs46", 46 },
779 { "vs47", 47 },
780 { "vs48", 48 },
781 { "vs49", 49 },
782 { "vs5", 5 },
783 { "vs50", 50 },
784 { "vs51", 51 },
785 { "vs52", 52 },
786 { "vs53", 53 },
787 { "vs54", 54 },
788 { "vs55", 55 },
789 { "vs56", 56 },
790 { "vs57", 57 },
791 { "vs58", 58 },
792 { "vs59", 59 },
793 { "vs6", 6 },
794 { "vs60", 60 },
795 { "vs61", 61 },
796 { "vs62", 62 },
797 { "vs63", 63 },
798 { "vs7", 7 },
799 { "vs8", 8 },
800 { "vs9", 9 },
801
802 { "xer", 1 },
803
804 };
805
806 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807
808 /* Given NAME, find the register number associated with that name, return
809 the integer value associated with the given name or -1 on failure. */
810
811 static int
812 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
813 {
814 int middle, low, high;
815 int cmp;
816
817 low = 0;
818 high = regcount - 1;
819
820 do
821 {
822 middle = (low + high) / 2;
823 cmp = strcasecmp (name, regs[middle].name);
824 if (cmp < 0)
825 high = middle - 1;
826 else if (cmp > 0)
827 low = middle + 1;
828 else
829 return regs[middle].value;
830 }
831 while (low <= high);
832
833 return -1;
834 }
835
836 /*
837 * Summary of register_name.
838 *
839 * in: Input_line_pointer points to 1st char of operand.
840 *
841 * out: A expressionS.
842 * The operand may have been a register: in this case, X_op == O_register,
843 * X_add_number is set to the register number, and truth is returned.
844 * Input_line_pointer->(next non-blank) char after operand, or is in its
845 * original state.
846 */
847
848 static bfd_boolean
849 register_name (expressionS *expressionP)
850 {
851 int reg_number;
852 char *name;
853 char *start;
854 char c;
855
856 /* Find the spelling of the operand. */
857 start = name = input_line_pointer;
858 if (name[0] == '%' && ISALPHA (name[1]))
859 name = ++input_line_pointer;
860
861 else if (!reg_names_p || !ISALPHA (name[0]))
862 return FALSE;
863
864 c = get_symbol_end ();
865 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
866
867 /* Put back the delimiting char. */
868 *input_line_pointer = c;
869
870 /* Look to see if it's in the register table. */
871 if (reg_number >= 0)
872 {
873 expressionP->X_op = O_register;
874 expressionP->X_add_number = reg_number;
875
876 /* Make the rest nice. */
877 expressionP->X_add_symbol = NULL;
878 expressionP->X_op_symbol = NULL;
879 return TRUE;
880 }
881
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer = start;
884 return FALSE;
885 }
886 \f
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
890
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand;
893
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names[] =
896 {
897 { "cr0", 0 },
898 { "cr1", 1 },
899 { "cr2", 2 },
900 { "cr3", 3 },
901 { "cr4", 4 },
902 { "cr5", 5 },
903 { "cr6", 6 },
904 { "cr7", 7 },
905 { "eq", 2 },
906 { "gt", 1 },
907 { "lt", 0 },
908 { "so", 3 },
909 { "un", 3 }
910 };
911
912 /* Parsing function. This returns non-zero if it recognized an
913 expression. */
914
915 int
916 ppc_parse_name (const char *name, expressionS *exp)
917 {
918 int val;
919
920 if (! cr_operand)
921 return 0;
922
923 if (*name == '%')
924 ++name;
925 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
926 name);
927 if (val < 0)
928 return 0;
929
930 exp->X_op = O_constant;
931 exp->X_add_number = val;
932
933 return 1;
934 }
935 \f
936 /* Local variables. */
937
938 /* Whether to target xcoff64/elf64. */
939 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
940
941 /* Opcode hash table. */
942 static struct hash_control *ppc_hash;
943
944 /* Macro hash table. */
945 static struct hash_control *ppc_macro_hash;
946
947 #ifdef OBJ_ELF
948 /* What type of shared library support to use. */
949 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
950
951 /* Flags to set in the elf header. */
952 static flagword ppc_flags = 0;
953
954 /* Whether this is Solaris or not. */
955 #ifdef TARGET_SOLARIS_COMMENT
956 #define SOLARIS_P TRUE
957 #else
958 #define SOLARIS_P FALSE
959 #endif
960
961 static bfd_boolean msolaris = SOLARIS_P;
962 #endif
963
964 #ifdef OBJ_XCOFF
965
966 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
967 using a bunch of different sections. These assembler sections,
968 however, are all encompassed within the .text or .data sections of
969 the final output file. We handle this by using different
970 subsegments within these main segments. */
971
972 /* Next subsegment to allocate within the .text segment. */
973 static subsegT ppc_text_subsegment = 2;
974
975 /* Linked list of csects in the text section. */
976 static symbolS *ppc_text_csects;
977
978 /* Next subsegment to allocate within the .data segment. */
979 static subsegT ppc_data_subsegment = 2;
980
981 /* Linked list of csects in the data section. */
982 static symbolS *ppc_data_csects;
983
984 /* The current csect. */
985 static symbolS *ppc_current_csect;
986
987 /* The RS/6000 assembler uses a TOC which holds addresses of functions
988 and variables. Symbols are put in the TOC with the .tc pseudo-op.
989 A special relocation is used when accessing TOC entries. We handle
990 the TOC as a subsegment within the .data segment. We set it up if
991 we see a .toc pseudo-op, and save the csect symbol here. */
992 static symbolS *ppc_toc_csect;
993
994 /* The first frag in the TOC subsegment. */
995 static fragS *ppc_toc_frag;
996
997 /* The first frag in the first subsegment after the TOC in the .data
998 segment. NULL if there are no subsegments after the TOC. */
999 static fragS *ppc_after_toc_frag;
1000
1001 /* The current static block. */
1002 static symbolS *ppc_current_block;
1003
1004 /* The COFF debugging section; set by md_begin. This is not the
1005 .debug section, but is instead the secret BFD section which will
1006 cause BFD to set the section number of a symbol to N_DEBUG. */
1007 static asection *ppc_coff_debug_section;
1008
1009 /* Structure to set the length field of the dwarf sections. */
1010 struct dw_subsection {
1011 /* Subsections are simply linked. */
1012 struct dw_subsection *link;
1013
1014 /* The subsection number. */
1015 subsegT subseg;
1016
1017 /* Expression to compute the length of the section. */
1018 expressionS end_exp;
1019 };
1020
1021 static struct dw_section {
1022 /* Corresponding section. */
1023 segT sect;
1024
1025 /* Simply linked list of subsections with a label. */
1026 struct dw_subsection *list_subseg;
1027
1028 /* The anonymous subsection. */
1029 struct dw_subsection *anon_subseg;
1030 } dw_sections[XCOFF_DWSECT_NBR_NAMES];
1031 #endif /* OBJ_XCOFF */
1032
1033 #ifdef TE_PE
1034
1035 /* Various sections that we need for PE coff support. */
1036 static segT ydata_section;
1037 static segT pdata_section;
1038 static segT reldata_section;
1039 static segT rdata_section;
1040 static segT tocdata_section;
1041
1042 /* The current section and the previous section. See ppc_previous. */
1043 static segT ppc_previous_section;
1044 static segT ppc_current_section;
1045
1046 #endif /* TE_PE */
1047
1048 #ifdef OBJ_ELF
1049 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1050 #define PPC_APUINFO_ISEL 0x40
1051 #define PPC_APUINFO_PMR 0x41
1052 #define PPC_APUINFO_RFMCI 0x42
1053 #define PPC_APUINFO_CACHELCK 0x43
1054 #define PPC_APUINFO_SPE 0x100
1055 #define PPC_APUINFO_EFS 0x101
1056 #define PPC_APUINFO_BRLOCK 0x102
1057 #define PPC_APUINFO_VLE 0x104
1058
1059 /*
1060 * We keep a list of APUinfo
1061 */
1062 unsigned long *ppc_apuinfo_list;
1063 unsigned int ppc_apuinfo_num;
1064 unsigned int ppc_apuinfo_num_alloc;
1065 #endif /* OBJ_ELF */
1066 \f
1067 #ifdef OBJ_ELF
1068 const char *const md_shortopts = "b:l:usm:K:VQ:";
1069 #else
1070 const char *const md_shortopts = "um:";
1071 #endif
1072 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1073 const struct option md_longopts[] = {
1074 {"nops", required_argument, NULL, OPTION_NOPS},
1075 {NULL, no_argument, NULL, 0}
1076 };
1077 const size_t md_longopts_size = sizeof (md_longopts);
1078
1079 int
1080 md_parse_option (int c, char *arg)
1081 {
1082 ppc_cpu_t new_cpu;
1083
1084 switch (c)
1085 {
1086 case 'u':
1087 /* -u means that any undefined symbols should be treated as
1088 external, which is the default for gas anyhow. */
1089 break;
1090
1091 #ifdef OBJ_ELF
1092 case 'l':
1093 /* Solaris as takes -le (presumably for little endian). For completeness
1094 sake, recognize -be also. */
1095 if (strcmp (arg, "e") == 0)
1096 {
1097 target_big_endian = 0;
1098 set_target_endian = 1;
1099 if (ppc_cpu & PPC_OPCODE_VLE)
1100 as_bad (_("the use of -mvle requires big endian."));
1101 }
1102 else
1103 return 0;
1104
1105 break;
1106
1107 case 'b':
1108 if (strcmp (arg, "e") == 0)
1109 {
1110 target_big_endian = 1;
1111 set_target_endian = 1;
1112 }
1113 else
1114 return 0;
1115
1116 break;
1117
1118 case 'K':
1119 /* Recognize -K PIC. */
1120 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1121 {
1122 shlib = SHLIB_PIC;
1123 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1124 }
1125 else
1126 return 0;
1127
1128 break;
1129 #endif
1130
1131 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1132 case 'a':
1133 if (strcmp (arg, "64") == 0)
1134 {
1135 #ifdef BFD64
1136 ppc_obj64 = 1;
1137 if (ppc_cpu & PPC_OPCODE_VLE)
1138 as_bad (_("the use of -mvle requires -a32."));
1139 #else
1140 as_fatal (_("%s unsupported"), "-a64");
1141 #endif
1142 }
1143 else if (strcmp (arg, "32") == 0)
1144 ppc_obj64 = 0;
1145 else
1146 return 0;
1147 break;
1148
1149 case 'm':
1150 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
1151 if (new_cpu != 0)
1152 {
1153 ppc_cpu = new_cpu;
1154 if (strcmp (arg, "vle") == 0)
1155 {
1156 if (set_target_endian && target_big_endian == 0)
1157 as_bad (_("the use of -mvle requires big endian."));
1158 if (ppc_obj64)
1159 as_bad (_("the use of -mvle requires -a32."));
1160 }
1161 }
1162
1163 else if (strcmp (arg, "regnames") == 0)
1164 reg_names_p = TRUE;
1165
1166 else if (strcmp (arg, "no-regnames") == 0)
1167 reg_names_p = FALSE;
1168
1169 #ifdef OBJ_ELF
1170 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1171 that require relocation. */
1172 else if (strcmp (arg, "relocatable") == 0)
1173 {
1174 shlib = SHLIB_MRELOCATABLE;
1175 ppc_flags |= EF_PPC_RELOCATABLE;
1176 }
1177
1178 else if (strcmp (arg, "relocatable-lib") == 0)
1179 {
1180 shlib = SHLIB_MRELOCATABLE;
1181 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1182 }
1183
1184 /* -memb, set embedded bit. */
1185 else if (strcmp (arg, "emb") == 0)
1186 ppc_flags |= EF_PPC_EMB;
1187
1188 /* -mlittle/-mbig set the endianness. */
1189 else if (strcmp (arg, "little") == 0
1190 || strcmp (arg, "little-endian") == 0)
1191 {
1192 target_big_endian = 0;
1193 set_target_endian = 1;
1194 if (ppc_cpu & PPC_OPCODE_VLE)
1195 as_bad (_("the use of -mvle requires big endian."));
1196 }
1197
1198 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1199 {
1200 target_big_endian = 1;
1201 set_target_endian = 1;
1202 }
1203
1204 else if (strcmp (arg, "solaris") == 0)
1205 {
1206 msolaris = TRUE;
1207 ppc_comment_chars = ppc_solaris_comment_chars;
1208 }
1209
1210 else if (strcmp (arg, "no-solaris") == 0)
1211 {
1212 msolaris = FALSE;
1213 ppc_comment_chars = ppc_eabi_comment_chars;
1214 }
1215 #endif
1216 else
1217 {
1218 as_bad (_("invalid switch -m%s"), arg);
1219 return 0;
1220 }
1221 break;
1222
1223 #ifdef OBJ_ELF
1224 /* -V: SVR4 argument to print version ID. */
1225 case 'V':
1226 print_version_id ();
1227 break;
1228
1229 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1230 should be emitted or not. FIXME: Not implemented. */
1231 case 'Q':
1232 break;
1233
1234 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1235 rather than .stabs.excl, which is ignored by the linker.
1236 FIXME: Not implemented. */
1237 case 's':
1238 if (arg)
1239 return 0;
1240
1241 break;
1242 #endif
1243
1244 case OPTION_NOPS:
1245 {
1246 char *end;
1247 nop_limit = strtoul (optarg, &end, 0);
1248 if (*end)
1249 as_bad (_("--nops needs a numeric argument"));
1250 }
1251 break;
1252
1253 default:
1254 return 0;
1255 }
1256
1257 return 1;
1258 }
1259
1260 void
1261 md_show_usage (FILE *stream)
1262 {
1263 fprintf (stream, _("\
1264 PowerPC options:\n\
1265 -a32 generate ELF32/XCOFF32\n\
1266 -a64 generate ELF64/XCOFF64\n\
1267 -u ignored\n\
1268 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1269 -mpwr generate code for POWER (RIOS1)\n\
1270 -m601 generate code for PowerPC 601\n\
1271 -mppc, -mppc32, -m603, -m604\n\
1272 generate code for PowerPC 603/604\n\
1273 -m403 generate code for PowerPC 403\n\
1274 -m405 generate code for PowerPC 405\n\
1275 -m440 generate code for PowerPC 440\n\
1276 -m464 generate code for PowerPC 464\n\
1277 -m476 generate code for PowerPC 476\n\
1278 -m7400, -m7410, -m7450, -m7455\n\
1279 generate code for PowerPC 7400/7410/7450/7455\n\
1280 -m750cl generate code for PowerPC 750cl\n"));
1281 fprintf (stream, _("\
1282 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1283 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1284 -mbooke generate code for 32-bit PowerPC BookE\n\
1285 -ma2 generate code for A2 architecture\n\
1286 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1287 -mpower5, -mpwr5, -mpwr5x\n\
1288 generate code for Power5 architecture\n\
1289 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1290 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1291 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1292 -mcell generate code for Cell Broadband Engine architecture\n\
1293 -mcom generate code Power/PowerPC common instructions\n\
1294 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1295 fprintf (stream, _("\
1296 -maltivec generate code for AltiVec\n\
1297 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1298 -mhtm generate code for Hardware Transactional Memory\n\
1299 -me300 generate code for PowerPC e300 family\n\
1300 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1301 -me500mc, generate code for Freescale e500mc core complex\n\
1302 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1303 -me5500, generate code for Freescale e5500 core complex\n\
1304 -me6500, generate code for Freescale e6500 core complex\n\
1305 -mspe generate code for Motorola SPE instructions\n\
1306 -mvle generate code for Freescale VLE instructions\n\
1307 -mtitan generate code for AppliedMicro Titan core complex\n\
1308 -mregnames Allow symbolic names for registers\n\
1309 -mno-regnames Do not allow symbolic names for registers\n"));
1310 #ifdef OBJ_ELF
1311 fprintf (stream, _("\
1312 -mrelocatable support for GCC's -mrelocatble option\n\
1313 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1314 -memb set PPC_EMB bit in ELF flags\n\
1315 -mlittle, -mlittle-endian, -le\n\
1316 generate code for a little endian machine\n\
1317 -mbig, -mbig-endian, -be\n\
1318 generate code for a big endian machine\n\
1319 -msolaris generate code for Solaris\n\
1320 -mno-solaris do not generate code for Solaris\n\
1321 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1322 -V print assembler version number\n\
1323 -Qy, -Qn ignored\n"));
1324 #endif
1325 fprintf (stream, _("\
1326 -nops=count when aligning, more than COUNT nops uses a branch\n"));
1327 }
1328 \f
1329 /* Set ppc_cpu if it is not already set. */
1330
1331 static void
1332 ppc_set_cpu (void)
1333 {
1334 const char *default_os = TARGET_OS;
1335 const char *default_cpu = TARGET_CPU;
1336
1337 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
1338 {
1339 if (ppc_obj64)
1340 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
1341 else if (strncmp (default_os, "aix", 3) == 0
1342 && default_os[3] >= '4' && default_os[3] <= '9')
1343 ppc_cpu |= PPC_OPCODE_COMMON;
1344 else if (strncmp (default_os, "aix3", 4) == 0)
1345 ppc_cpu |= PPC_OPCODE_POWER;
1346 else if (strcmp (default_cpu, "rs6000") == 0)
1347 ppc_cpu |= PPC_OPCODE_POWER;
1348 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1349 ppc_cpu |= PPC_OPCODE_PPC;
1350 else
1351 as_fatal (_("unknown default cpu = %s, os = %s"),
1352 default_cpu, default_os);
1353 }
1354 }
1355
1356 /* Figure out the BFD architecture to use. This function and ppc_mach
1357 are called well before md_begin, when the output file is opened. */
1358
1359 enum bfd_architecture
1360 ppc_arch (void)
1361 {
1362 const char *default_cpu = TARGET_CPU;
1363 ppc_set_cpu ();
1364
1365 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1366 return bfd_arch_powerpc;
1367 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1368 return bfd_arch_powerpc;
1369 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1370 return bfd_arch_rs6000;
1371 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1372 {
1373 if (strcmp (default_cpu, "rs6000") == 0)
1374 return bfd_arch_rs6000;
1375 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1376 return bfd_arch_powerpc;
1377 }
1378
1379 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1380 return bfd_arch_unknown;
1381 }
1382
1383 unsigned long
1384 ppc_mach (void)
1385 {
1386 if (ppc_obj64)
1387 return bfd_mach_ppc64;
1388 else if (ppc_arch () == bfd_arch_rs6000)
1389 return bfd_mach_rs6k;
1390 else if (ppc_cpu & PPC_OPCODE_TITAN)
1391 return bfd_mach_ppc_titan;
1392 else if (ppc_cpu & PPC_OPCODE_VLE)
1393 return bfd_mach_ppc_vle;
1394 else
1395 return bfd_mach_ppc;
1396 }
1397
1398 extern char*
1399 ppc_target_format (void)
1400 {
1401 #ifdef OBJ_COFF
1402 #ifdef TE_PE
1403 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1404 #elif TE_POWERMAC
1405 return "xcoff-powermac";
1406 #else
1407 # ifdef TE_AIX5
1408 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1409 # else
1410 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1411 # endif
1412 #endif
1413 #endif
1414 #ifdef OBJ_ELF
1415 # ifdef TE_FreeBSD
1416 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1417 # elif defined (TE_VXWORKS)
1418 return "elf32-powerpc-vxworks";
1419 # else
1420 return (target_big_endian
1421 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1422 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1423 # endif
1424 #endif
1425 }
1426
1427 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1428 Return TRUE if there's a problem, otherwise FALSE. */
1429
1430 static bfd_boolean
1431 insn_validate (const struct powerpc_opcode *op)
1432 {
1433 const unsigned char *o;
1434 unsigned long omask = op->mask;
1435
1436 /* The mask had better not trim off opcode bits. */
1437 if ((op->opcode & omask) != op->opcode)
1438 {
1439 as_bad (_("mask trims opcode bits for %s"), op->name);
1440 return TRUE;
1441 }
1442
1443 /* The operands must not overlap the opcode or each other. */
1444 for (o = op->operands; *o; ++o)
1445 {
1446 if (*o >= num_powerpc_operands)
1447 {
1448 as_bad (_("operand index error for %s"), op->name);
1449 return TRUE;
1450 }
1451 else
1452 {
1453 const struct powerpc_operand *operand = &powerpc_operands[*o];
1454 if (operand->shift != PPC_OPSHIFT_INV)
1455 {
1456 unsigned long mask;
1457
1458 if (operand->shift >= 0)
1459 mask = operand->bitm << operand->shift;
1460 else
1461 mask = operand->bitm >> -operand->shift;
1462 if (omask & mask)
1463 {
1464 as_bad (_("operand %d overlap in %s"),
1465 (int) (o - op->operands), op->name);
1466 return TRUE;
1467 }
1468 omask |= mask;
1469 }
1470 }
1471 }
1472 return FALSE;
1473 }
1474
1475 /* Insert opcodes and macros into hash tables. Called at startup and
1476 for .machine pseudo. */
1477
1478 static void
1479 ppc_setup_opcodes (void)
1480 {
1481 const struct powerpc_opcode *op;
1482 const struct powerpc_opcode *op_end;
1483 const struct powerpc_macro *macro;
1484 const struct powerpc_macro *macro_end;
1485 bfd_boolean bad_insn = FALSE;
1486
1487 if (ppc_hash != NULL)
1488 hash_die (ppc_hash);
1489 if (ppc_macro_hash != NULL)
1490 hash_die (ppc_macro_hash);
1491
1492 /* Insert the opcodes into a hash table. */
1493 ppc_hash = hash_new ();
1494
1495 if (ENABLE_CHECKING)
1496 {
1497 unsigned int i;
1498
1499 /* An index into powerpc_operands is stored in struct fix
1500 fx_pcrel_adjust which is 8 bits wide. */
1501 gas_assert (num_powerpc_operands < 256);
1502
1503 /* Check operand masks. Code here and in the disassembler assumes
1504 all the 1's in the mask are contiguous. */
1505 for (i = 0; i < num_powerpc_operands; ++i)
1506 {
1507 unsigned long mask = powerpc_operands[i].bitm;
1508 unsigned long right_bit;
1509 unsigned int j;
1510
1511 right_bit = mask & -mask;
1512 mask += right_bit;
1513 right_bit = mask & -mask;
1514 if (mask != right_bit)
1515 {
1516 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1517 bad_insn = TRUE;
1518 }
1519 for (j = i + 1; j < num_powerpc_operands; ++j)
1520 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1521 sizeof (powerpc_operands[0])) == 0)
1522 {
1523 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1524 j, i);
1525 bad_insn = TRUE;
1526 }
1527 }
1528 }
1529
1530 op_end = powerpc_opcodes + powerpc_num_opcodes;
1531 for (op = powerpc_opcodes; op < op_end; op++)
1532 {
1533 if (ENABLE_CHECKING)
1534 {
1535 if (op != powerpc_opcodes)
1536 {
1537 int old_opcode = PPC_OP (op[-1].opcode);
1538 int new_opcode = PPC_OP (op[0].opcode);
1539
1540 #ifdef PRINT_OPCODE_TABLE
1541 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1542 op->name, (unsigned int) (op - powerpc_opcodes),
1543 (unsigned int) new_opcode, (unsigned int) op->opcode,
1544 (unsigned int) op->mask, (unsigned long long) op->flags);
1545 #endif
1546
1547 /* The major opcodes had better be sorted. Code in the
1548 disassembler assumes the insns are sorted according to
1549 major opcode. */
1550 if (new_opcode < old_opcode)
1551 {
1552 as_bad (_("major opcode is not sorted for %s"),
1553 op->name);
1554 bad_insn = TRUE;
1555 }
1556 }
1557 bad_insn |= insn_validate (op);
1558 }
1559
1560 if ((ppc_cpu & op->flags) != 0
1561 && !(ppc_cpu & op->deprecated))
1562 {
1563 const char *retval;
1564
1565 retval = hash_insert (ppc_hash, op->name, (void *) op);
1566 if (retval != NULL)
1567 {
1568 as_bad (_("duplicate instruction %s"),
1569 op->name);
1570 bad_insn = TRUE;
1571 }
1572 }
1573 }
1574
1575 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1576 for (op = powerpc_opcodes; op < op_end; op++)
1577 hash_insert (ppc_hash, op->name, (void *) op);
1578
1579 op_end = vle_opcodes + vle_num_opcodes;
1580 for (op = vle_opcodes; op < op_end; op++)
1581 {
1582 if (ENABLE_CHECKING)
1583 {
1584 if (op != vle_opcodes)
1585 {
1586 unsigned old_seg, new_seg;
1587
1588 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1589 old_seg = VLE_OP_TO_SEG (old_seg);
1590 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1591 new_seg = VLE_OP_TO_SEG (new_seg);
1592
1593 #ifdef PRINT_OPCODE_TABLE
1594 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1595 op->name, (unsigned int) (op - powerpc_opcodes),
1596 (unsigned int) new_seg, (unsigned int) op->opcode,
1597 (unsigned int) op->mask, (unsigned long long) op->flags);
1598 #endif
1599 /* The major opcodes had better be sorted. Code in the
1600 disassembler assumes the insns are sorted according to
1601 major opcode. */
1602 if (new_seg < old_seg)
1603 {
1604 as_bad (_("major opcode is not sorted for %s"),
1605 op->name);
1606 bad_insn = TRUE;
1607 }
1608 }
1609
1610 bad_insn |= insn_validate (op);
1611 }
1612
1613 if ((ppc_cpu & op->flags) != 0
1614 && !(ppc_cpu & op->deprecated))
1615 {
1616 const char *retval;
1617
1618 retval = hash_insert (ppc_hash, op->name, (void *) op);
1619 if (retval != NULL)
1620 {
1621 as_bad (_("duplicate instruction %s"),
1622 op->name);
1623 bad_insn = TRUE;
1624 }
1625 }
1626 }
1627
1628 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1629 for (op = vle_opcodes; op < op_end; op++)
1630 hash_insert (ppc_hash, op->name, (void *) op);
1631
1632 /* Insert the macros into a hash table. */
1633 ppc_macro_hash = hash_new ();
1634
1635 macro_end = powerpc_macros + powerpc_num_macros;
1636 for (macro = powerpc_macros; macro < macro_end; macro++)
1637 {
1638 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
1639 {
1640 const char *retval;
1641
1642 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1643 if (retval != (const char *) NULL)
1644 {
1645 as_bad (_("duplicate macro %s"), macro->name);
1646 bad_insn = TRUE;
1647 }
1648 }
1649 }
1650
1651 if (bad_insn)
1652 abort ();
1653 }
1654
1655 /* This function is called when the assembler starts up. It is called
1656 after the options have been parsed and the output file has been
1657 opened. */
1658
1659 void
1660 md_begin (void)
1661 {
1662 ppc_set_cpu ();
1663
1664 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1665 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
1666
1667 #ifdef OBJ_ELF
1668 /* Set the ELF flags if desired. */
1669 if (ppc_flags && !msolaris)
1670 bfd_set_private_flags (stdoutput, ppc_flags);
1671 #endif
1672
1673 ppc_setup_opcodes ();
1674
1675 /* Tell the main code what the endianness is if it is not overridden
1676 by the user. */
1677 if (!set_target_endian)
1678 {
1679 set_target_endian = 1;
1680 target_big_endian = PPC_BIG_ENDIAN;
1681 }
1682
1683 #ifdef OBJ_XCOFF
1684 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1685
1686 /* Create dummy symbols to serve as initial csects. This forces the
1687 text csects to precede the data csects. These symbols will not
1688 be output. */
1689 ppc_text_csects = symbol_make ("dummy\001");
1690 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1691 ppc_data_csects = symbol_make ("dummy\001");
1692 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1693 #endif
1694
1695 #ifdef TE_PE
1696
1697 ppc_current_section = text_section;
1698 ppc_previous_section = 0;
1699
1700 #endif
1701 }
1702
1703 void
1704 ppc_cleanup (void)
1705 {
1706 #ifdef OBJ_ELF
1707 if (ppc_apuinfo_list == NULL)
1708 return;
1709
1710 /* Ok, so write the section info out. We have this layout:
1711
1712 byte data what
1713 ---- ---- ----
1714 0 8 length of "APUinfo\0"
1715 4 (n*4) number of APU's (4 bytes each)
1716 8 2 note type 2
1717 12 "APUinfo\0" name
1718 20 APU#1 first APU's info
1719 24 APU#2 second APU's info
1720 ... ...
1721 */
1722 {
1723 char *p;
1724 asection *seg = now_seg;
1725 subsegT subseg = now_subseg;
1726 asection *apuinfo_secp = (asection *) NULL;
1727 unsigned int i;
1728
1729 /* Create the .PPC.EMB.apuinfo section. */
1730 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1731 bfd_set_section_flags (stdoutput,
1732 apuinfo_secp,
1733 SEC_HAS_CONTENTS | SEC_READONLY);
1734
1735 p = frag_more (4);
1736 md_number_to_chars (p, (valueT) 8, 4);
1737
1738 p = frag_more (4);
1739 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1740
1741 p = frag_more (4);
1742 md_number_to_chars (p, (valueT) 2, 4);
1743
1744 p = frag_more (8);
1745 strcpy (p, "APUinfo");
1746
1747 for (i = 0; i < ppc_apuinfo_num; i++)
1748 {
1749 p = frag_more (4);
1750 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1751 }
1752
1753 frag_align (2, 0, 0);
1754
1755 /* We probably can't restore the current segment, for there likely
1756 isn't one yet... */
1757 if (seg && subseg)
1758 subseg_set (seg, subseg);
1759 }
1760 #endif
1761 }
1762
1763 /* Insert an operand value into an instruction. */
1764
1765 static unsigned long
1766 ppc_insert_operand (unsigned long insn,
1767 const struct powerpc_operand *operand,
1768 offsetT val,
1769 ppc_cpu_t cpu,
1770 char *file,
1771 unsigned int line)
1772 {
1773 long min, max, right;
1774
1775 max = operand->bitm;
1776 right = max & -max;
1777 min = 0;
1778
1779 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1780 {
1781 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
1782 max = (max >> 1) & -right;
1783 min = ~max & -right;
1784 }
1785
1786 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1787 max++;
1788
1789 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1790 {
1791 long tmp = min;
1792 min = -max;
1793 max = -tmp;
1794 }
1795
1796 if (min <= max)
1797 {
1798 /* Some people write constants with the sign extension done by
1799 hand but only up to 32 bits. This shouldn't really be valid,
1800 but, to permit this code to assemble on a 64-bit host, we
1801 sign extend the 32-bit value to 64 bits if so doing makes the
1802 value valid. */
1803 if (val > max
1804 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1805 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1806 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1807 val = val - 0x80000000 - 0x80000000;
1808
1809 /* Similarly, people write expressions like ~(1<<15), and expect
1810 this to be OK for a 32-bit unsigned value. */
1811 else if (val < min
1812 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1813 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1814 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1815 val = val + 0x80000000 + 0x80000000;
1816
1817 else if (val < min
1818 || val > max
1819 || (val & (right - 1)) != 0)
1820 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1821 }
1822
1823 if (operand->insert)
1824 {
1825 const char *errmsg;
1826
1827 errmsg = NULL;
1828 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
1829 if (errmsg != (const char *) NULL)
1830 as_bad_where (file, line, "%s", errmsg);
1831 }
1832 else if (operand->shift >= 0)
1833 insn |= ((long) val & operand->bitm) << operand->shift;
1834 else
1835 insn |= ((long) val & operand->bitm) >> -operand->shift;
1836
1837 return insn;
1838 }
1839
1840 \f
1841 #ifdef OBJ_ELF
1842 /* Parse @got, etc. and return the desired relocation. */
1843 static bfd_reloc_code_real_type
1844 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1845 {
1846 struct map_bfd {
1847 char *string;
1848 unsigned int length : 8;
1849 unsigned int valid32 : 1;
1850 unsigned int valid64 : 1;
1851 unsigned int reloc;
1852 };
1853
1854 char ident[20];
1855 char *str = *str_p;
1856 char *str2;
1857 int ch;
1858 int len;
1859 const struct map_bfd *ptr;
1860
1861 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1862 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1863 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1864
1865 static const struct map_bfd mapping[] = {
1866 MAP ("l", BFD_RELOC_LO16),
1867 MAP ("h", BFD_RELOC_HI16),
1868 MAP ("ha", BFD_RELOC_HI16_S),
1869 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1870 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1871 MAP ("got", BFD_RELOC_16_GOTOFF),
1872 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1873 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1874 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1875 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1876 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1877 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1878 MAP ("copy", BFD_RELOC_PPC_COPY),
1879 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1880 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1881 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1882 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1883 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1884 MAP ("tls", BFD_RELOC_PPC_TLS),
1885 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1886 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1887 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1888 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1889 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1890 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1891 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1892 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1893 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1894 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1895 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1896 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1897 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1898 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1899 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1900 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1901 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1902 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1903 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1904 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1905 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1906 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1907 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1908 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1909 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1910 MAP32 ("fixup", BFD_RELOC_CTOR),
1911 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1912 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1913 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1914 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1915 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1916 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1917 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1918 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1919 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
1920 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1921 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1922 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1923 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1924 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1925 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1926 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1927 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1928 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1929 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
1930 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1931 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1932 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1933 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1934 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1935 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1936 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1937 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1938 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
1939 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
1940 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1941 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1942 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1943 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1944 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1945 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1946 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1947 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1948 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1949 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
1950 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
1951 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1952 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1953 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1954 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1955 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
1956 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
1957 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1958 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1959 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1960 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1961 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
1962 };
1963
1964 if (*str++ != '@')
1965 return BFD_RELOC_UNUSED;
1966
1967 for (ch = *str, str2 = ident;
1968 (str2 < ident + sizeof (ident) - 1
1969 && (ISALNUM (ch) || ch == '@'));
1970 ch = *++str)
1971 {
1972 *str2++ = TOLOWER (ch);
1973 }
1974
1975 *str2 = '\0';
1976 len = str2 - ident;
1977
1978 ch = ident[0];
1979 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1980 if (ch == ptr->string[0]
1981 && len == ptr->length
1982 && memcmp (ident, ptr->string, ptr->length) == 0
1983 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
1984 {
1985 int reloc = ptr->reloc;
1986
1987 if (!ppc_obj64 && exp_p->X_add_number != 0)
1988 {
1989 switch (reloc)
1990 {
1991 case BFD_RELOC_16_GOTOFF:
1992 case BFD_RELOC_LO16_GOTOFF:
1993 case BFD_RELOC_HI16_GOTOFF:
1994 case BFD_RELOC_HI16_S_GOTOFF:
1995 as_warn (_("identifier+constant@got means "
1996 "identifier@got+constant"));
1997 break;
1998
1999 case BFD_RELOC_PPC_GOT_TLSGD16:
2000 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2001 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2002 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2003 case BFD_RELOC_PPC_GOT_TLSLD16:
2004 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2005 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2006 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2007 case BFD_RELOC_PPC_GOT_DTPREL16:
2008 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2009 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2010 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2011 case BFD_RELOC_PPC_GOT_TPREL16:
2012 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2013 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2014 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2015 as_bad (_("symbol+offset not supported for got tls"));
2016 break;
2017 }
2018 }
2019
2020 /* Now check for identifier@suffix+constant. */
2021 if (*str == '-' || *str == '+')
2022 {
2023 char *orig_line = input_line_pointer;
2024 expressionS new_exp;
2025
2026 input_line_pointer = str;
2027 expression (&new_exp);
2028 if (new_exp.X_op == O_constant)
2029 {
2030 exp_p->X_add_number += new_exp.X_add_number;
2031 str = input_line_pointer;
2032 }
2033
2034 if (&input_line_pointer != str_p)
2035 input_line_pointer = orig_line;
2036 }
2037 *str_p = str;
2038
2039 if (reloc == (int) BFD_RELOC_PPC64_TOC
2040 && exp_p->X_op == O_symbol
2041 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
2042 {
2043 /* Change the symbol so that the dummy .TOC. symbol can be
2044 omitted from the object file. */
2045 exp_p->X_add_symbol = &abs_symbol;
2046 }
2047
2048 return (bfd_reloc_code_real_type) reloc;
2049 }
2050
2051 return BFD_RELOC_UNUSED;
2052 }
2053
2054 /* Like normal .long/.short/.word, except support @got, etc.
2055 Clobbers input_line_pointer, checks end-of-line. */
2056 static void
2057 ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
2058 {
2059 expressionS exp;
2060 bfd_reloc_code_real_type reloc;
2061
2062 if (is_it_end_of_statement ())
2063 {
2064 demand_empty_rest_of_line ();
2065 return;
2066 }
2067
2068 do
2069 {
2070 expression (&exp);
2071 if (*input_line_pointer == '@'
2072 && (reloc = ppc_elf_suffix (&input_line_pointer,
2073 &exp)) != BFD_RELOC_UNUSED)
2074 {
2075 reloc_howto_type *reloc_howto;
2076 int size;
2077
2078 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
2079 size = bfd_get_reloc_size (reloc_howto);
2080
2081 if (size > nbytes)
2082 {
2083 as_bad (_("%s relocations do not fit in %d bytes\n"),
2084 reloc_howto->name, nbytes);
2085 }
2086 else
2087 {
2088 char *p;
2089 int offset;
2090
2091 p = frag_more (nbytes);
2092 memset (p, 0, nbytes);
2093 offset = 0;
2094 if (target_big_endian)
2095 offset = nbytes - size;
2096 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
2097 &exp, 0, reloc);
2098 }
2099 }
2100 else
2101 emit_expr (&exp, (unsigned int) nbytes);
2102 }
2103 while (*input_line_pointer++ == ',');
2104
2105 /* Put terminator back into stream. */
2106 input_line_pointer--;
2107 demand_empty_rest_of_line ();
2108 }
2109
2110 /* Solaris pseduo op to change to the .rodata section. */
2111 static void
2112 ppc_elf_rdata (int xxx)
2113 {
2114 char *save_line = input_line_pointer;
2115 static char section[] = ".rodata\n";
2116
2117 /* Just pretend this is .section .rodata */
2118 input_line_pointer = section;
2119 obj_elf_section (xxx);
2120
2121 input_line_pointer = save_line;
2122 }
2123
2124 /* Pseudo op to make file scope bss items. */
2125 static void
2126 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
2127 {
2128 char *name;
2129 char c;
2130 char *p;
2131 offsetT size;
2132 symbolS *symbolP;
2133 offsetT align;
2134 segT old_sec;
2135 int old_subsec;
2136 char *pfrag;
2137 int align2;
2138
2139 name = input_line_pointer;
2140 c = get_symbol_end ();
2141
2142 /* just after name is now '\0'. */
2143 p = input_line_pointer;
2144 *p = c;
2145 SKIP_WHITESPACE ();
2146 if (*input_line_pointer != ',')
2147 {
2148 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2149 ignore_rest_of_line ();
2150 return;
2151 }
2152
2153 input_line_pointer++; /* skip ',' */
2154 if ((size = get_absolute_expression ()) < 0)
2155 {
2156 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2157 ignore_rest_of_line ();
2158 return;
2159 }
2160
2161 /* The third argument to .lcomm is the alignment. */
2162 if (*input_line_pointer != ',')
2163 align = 8;
2164 else
2165 {
2166 ++input_line_pointer;
2167 align = get_absolute_expression ();
2168 if (align <= 0)
2169 {
2170 as_warn (_("ignoring bad alignment"));
2171 align = 8;
2172 }
2173 }
2174
2175 *p = 0;
2176 symbolP = symbol_find_or_make (name);
2177 *p = c;
2178
2179 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2180 {
2181 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2182 S_GET_NAME (symbolP));
2183 ignore_rest_of_line ();
2184 return;
2185 }
2186
2187 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2188 {
2189 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2190 S_GET_NAME (symbolP),
2191 (long) S_GET_VALUE (symbolP),
2192 (long) size);
2193
2194 ignore_rest_of_line ();
2195 return;
2196 }
2197
2198 /* Allocate_bss. */
2199 old_sec = now_seg;
2200 old_subsec = now_subseg;
2201 if (align)
2202 {
2203 /* Convert to a power of 2 alignment. */
2204 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2205 if (align != 1)
2206 {
2207 as_bad (_("common alignment not a power of 2"));
2208 ignore_rest_of_line ();
2209 return;
2210 }
2211 }
2212 else
2213 align2 = 0;
2214
2215 record_alignment (bss_section, align2);
2216 subseg_set (bss_section, 1);
2217 if (align2)
2218 frag_align (align2, 0, 0);
2219 if (S_GET_SEGMENT (symbolP) == bss_section)
2220 symbol_get_frag (symbolP)->fr_symbol = 0;
2221 symbol_set_frag (symbolP, frag_now);
2222 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2223 (char *) 0);
2224 *pfrag = 0;
2225 S_SET_SIZE (symbolP, size);
2226 S_SET_SEGMENT (symbolP, bss_section);
2227 subseg_set (old_sec, old_subsec);
2228 demand_empty_rest_of_line ();
2229 }
2230
2231 /* Pseudo op to set symbol local entry point. */
2232 static void
2233 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2234 {
2235 char *name = input_line_pointer;
2236 char c = get_symbol_end ();
2237 char *p;
2238 expressionS exp;
2239 symbolS *sym;
2240 asymbol *bfdsym;
2241 elf_symbol_type *elfsym;
2242
2243 p = input_line_pointer;
2244 *p = c;
2245 SKIP_WHITESPACE ();
2246 if (*input_line_pointer != ',')
2247 {
2248 *p = 0;
2249 as_bad (_("expected comma after name `%s' in .localentry directive"),
2250 name);
2251 *p = c;
2252 ignore_rest_of_line ();
2253 return;
2254 }
2255 input_line_pointer++;
2256 expression (&exp);
2257 if (exp.X_op == O_absent)
2258 {
2259 as_bad (_("missing expression in .localentry directive"));
2260 exp.X_op = O_constant;
2261 exp.X_add_number = 0;
2262 }
2263 *p = 0;
2264 sym = symbol_find_or_make (name);
2265 *p = c;
2266
2267 if (resolve_expression (&exp)
2268 && exp.X_op == O_constant)
2269 {
2270 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2271
2272 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
2273 as_bad (_(".localentry expression for `%s' "
2274 "is not a valid power of 2"), S_GET_NAME (sym));
2275 else
2276 {
2277 bfdsym = symbol_get_bfdsym (sym);
2278 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2279 gas_assert (elfsym);
2280 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2281 elfsym->internal_elf_sym.st_other |= encoded;
2282 if (ppc_abiversion == 0)
2283 ppc_abiversion = 2;
2284 }
2285 }
2286 else
2287 as_bad (_(".localentry expression for `%s' "
2288 "does not evaluate to a constant"), S_GET_NAME (sym));
2289
2290 demand_empty_rest_of_line ();
2291 }
2292
2293 /* Pseudo op to set ABI version. */
2294 static void
2295 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2296 {
2297 expressionS exp;
2298
2299 expression (&exp);
2300 if (exp.X_op == O_absent)
2301 {
2302 as_bad (_("missing expression in .abiversion directive"));
2303 exp.X_op = O_constant;
2304 exp.X_add_number = 0;
2305 }
2306
2307 if (resolve_expression (&exp)
2308 && exp.X_op == O_constant)
2309 ppc_abiversion = exp.X_add_number;
2310 else
2311 as_bad (_(".abiversion expression does not evaluate to a constant"));
2312 demand_empty_rest_of_line ();
2313 }
2314
2315 /* Set ABI version in output file. */
2316 void
2317 ppc_elf_end (void)
2318 {
2319 if (ppc_obj64 && ppc_abiversion != 0)
2320 {
2321 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2322 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2323 }
2324 }
2325
2326 /* Validate any relocations emitted for -mrelocatable, possibly adding
2327 fixups for word relocations in writable segments, so we can adjust
2328 them at runtime. */
2329 static void
2330 ppc_elf_validate_fix (fixS *fixp, segT seg)
2331 {
2332 if (fixp->fx_done || fixp->fx_pcrel)
2333 return;
2334
2335 switch (shlib)
2336 {
2337 case SHLIB_NONE:
2338 case SHLIB_PIC:
2339 return;
2340
2341 case SHLIB_MRELOCATABLE:
2342 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2343 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2344 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2345 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2346 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2347 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2348 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2349 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2350 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2351 && (seg->flags & SEC_LOAD) != 0
2352 && strcmp (segment_name (seg), ".got2") != 0
2353 && strcmp (segment_name (seg), ".dtors") != 0
2354 && strcmp (segment_name (seg), ".ctors") != 0
2355 && strcmp (segment_name (seg), ".fixup") != 0
2356 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2357 && strcmp (segment_name (seg), ".eh_frame") != 0
2358 && strcmp (segment_name (seg), ".ex_shared") != 0)
2359 {
2360 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2361 || fixp->fx_r_type != BFD_RELOC_CTOR)
2362 {
2363 as_bad_where (fixp->fx_file, fixp->fx_line,
2364 _("relocation cannot be done when using -mrelocatable"));
2365 }
2366 }
2367 return;
2368 }
2369 }
2370
2371 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2372 function descriptor sym if the corresponding code sym is used. */
2373
2374 void
2375 ppc_frob_file_before_adjust (void)
2376 {
2377 symbolS *symp;
2378 asection *toc;
2379
2380 if (!ppc_obj64)
2381 return;
2382
2383 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2384 {
2385 const char *name;
2386 char *dotname;
2387 symbolS *dotsym;
2388 size_t len;
2389
2390 name = S_GET_NAME (symp);
2391 if (name[0] == '.')
2392 continue;
2393
2394 if (! S_IS_WEAK (symp)
2395 || S_IS_DEFINED (symp))
2396 continue;
2397
2398 len = strlen (name) + 1;
2399 dotname = xmalloc (len + 1);
2400 dotname[0] = '.';
2401 memcpy (dotname + 1, name, len);
2402 dotsym = symbol_find_noref (dotname, 1);
2403 free (dotname);
2404 if (dotsym != NULL && (symbol_used_p (dotsym)
2405 || symbol_used_in_reloc_p (dotsym)))
2406 symbol_mark_used (symp);
2407
2408 }
2409
2410 toc = bfd_get_section_by_name (stdoutput, ".toc");
2411 if (toc != NULL
2412 && toc_reloc_types != has_large_toc_reloc
2413 && bfd_section_size (stdoutput, toc) > 0x10000)
2414 as_warn (_("TOC section size exceeds 64k"));
2415 }
2416
2417 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2418 emitted. Other uses of .TOC. will cause the symbol to be marked
2419 with BSF_KEEP in md_apply_fix. */
2420
2421 void
2422 ppc_elf_adjust_symtab (void)
2423 {
2424 if (ppc_obj64)
2425 {
2426 symbolS *symp;
2427 symp = symbol_find (".TOC.");
2428 if (symp != NULL)
2429 {
2430 asymbol *bsym = symbol_get_bfdsym (symp);
2431 if ((bsym->flags & BSF_KEEP) == 0)
2432 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2433 }
2434 }
2435 }
2436 #endif /* OBJ_ELF */
2437 \f
2438 #ifdef TE_PE
2439
2440 /*
2441 * Summary of parse_toc_entry.
2442 *
2443 * in: Input_line_pointer points to the '[' in one of:
2444 *
2445 * [toc] [tocv] [toc32] [toc64]
2446 *
2447 * Anything else is an error of one kind or another.
2448 *
2449 * out:
2450 * return value: success or failure
2451 * toc_kind: kind of toc reference
2452 * input_line_pointer:
2453 * success: first char after the ']'
2454 * failure: unchanged
2455 *
2456 * settings:
2457 *
2458 * [toc] - rv == success, toc_kind = default_toc
2459 * [tocv] - rv == success, toc_kind = data_in_toc
2460 * [toc32] - rv == success, toc_kind = must_be_32
2461 * [toc64] - rv == success, toc_kind = must_be_64
2462 *
2463 */
2464
2465 enum toc_size_qualifier
2466 {
2467 default_toc, /* The toc cell constructed should be the system default size */
2468 data_in_toc, /* This is a direct reference to a toc cell */
2469 must_be_32, /* The toc cell constructed must be 32 bits wide */
2470 must_be_64 /* The toc cell constructed must be 64 bits wide */
2471 };
2472
2473 static int
2474 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2475 {
2476 char *start;
2477 char *toc_spec;
2478 char c;
2479 enum toc_size_qualifier t;
2480
2481 /* Save the input_line_pointer. */
2482 start = input_line_pointer;
2483
2484 /* Skip over the '[' , and whitespace. */
2485 ++input_line_pointer;
2486 SKIP_WHITESPACE ();
2487
2488 /* Find the spelling of the operand. */
2489 toc_spec = input_line_pointer;
2490 c = get_symbol_end ();
2491
2492 if (strcmp (toc_spec, "toc") == 0)
2493 {
2494 t = default_toc;
2495 }
2496 else if (strcmp (toc_spec, "tocv") == 0)
2497 {
2498 t = data_in_toc;
2499 }
2500 else if (strcmp (toc_spec, "toc32") == 0)
2501 {
2502 t = must_be_32;
2503 }
2504 else if (strcmp (toc_spec, "toc64") == 0)
2505 {
2506 t = must_be_64;
2507 }
2508 else
2509 {
2510 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2511 *input_line_pointer = c;
2512 input_line_pointer = start;
2513 return 0;
2514 }
2515
2516 /* Now find the ']'. */
2517 *input_line_pointer = c;
2518
2519 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2520 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2521
2522 if (c != ']')
2523 {
2524 as_bad (_("syntax error: expected `]', found `%c'"), c);
2525 input_line_pointer = start;
2526 return 0;
2527 }
2528
2529 *toc_kind = t;
2530 return 1;
2531 }
2532 #endif
2533
2534 #ifdef OBJ_XCOFF
2535 /* See whether a symbol is in the TOC section. */
2536
2537 static int
2538 ppc_is_toc_sym (symbolS *sym)
2539 {
2540 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2541 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
2542 }
2543 #endif
2544 \f
2545
2546 #ifdef OBJ_ELF
2547 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2548 static void
2549 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2550 {
2551 unsigned int i;
2552
2553 /* Check we don't already exist. */
2554 for (i = 0; i < ppc_apuinfo_num; i++)
2555 if (ppc_apuinfo_list[i] == APUID (apu, version))
2556 return;
2557
2558 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2559 {
2560 if (ppc_apuinfo_num_alloc == 0)
2561 {
2562 ppc_apuinfo_num_alloc = 4;
2563 ppc_apuinfo_list = (unsigned long *)
2564 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2565 }
2566 else
2567 {
2568 ppc_apuinfo_num_alloc += 4;
2569 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2570 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2571 }
2572 }
2573 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2574 }
2575 #undef APUID
2576 #endif
2577 \f
2578
2579 /* We need to keep a list of fixups. We can't simply generate them as
2580 we go, because that would require us to first create the frag, and
2581 that would screw up references to ``.''. */
2582
2583 struct ppc_fixup
2584 {
2585 expressionS exp;
2586 int opindex;
2587 bfd_reloc_code_real_type reloc;
2588 };
2589
2590 #define MAX_INSN_FIXUPS (5)
2591
2592 /* Form I16L. */
2593 #define E_OR2I_INSN 0x7000C000
2594 #define E_AND2I_DOT_INSN 0x7000C800
2595 #define E_OR2IS_INSN 0x7000D000
2596 #define E_LIS_INSN 0x7000E000
2597 #define E_AND2IS_DOT_INSN 0x7000E800
2598
2599 /* Form I16A. */
2600 #define E_ADD2I_DOT_INSN 0x70008800
2601 #define E_ADD2IS_INSN 0x70009000
2602 #define E_CMP16I_INSN 0x70009800
2603 #define E_MULL2I_INSN 0x7000A000
2604 #define E_CMPL16I_INSN 0x7000A800
2605 #define E_CMPH16I_INSN 0x7000B000
2606 #define E_CMPHL16I_INSN 0x7000B800
2607
2608 /* This routine is called for each instruction to be assembled. */
2609
2610 void
2611 md_assemble (char *str)
2612 {
2613 char *s;
2614 const struct powerpc_opcode *opcode;
2615 unsigned long insn;
2616 const unsigned char *opindex_ptr;
2617 int skip_optional;
2618 int need_paren;
2619 int next_opindex;
2620 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2621 int fc;
2622 char *f;
2623 int addr_mod;
2624 int i;
2625 unsigned int insn_length;
2626
2627 /* Get the opcode. */
2628 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2629 ;
2630 if (*s != '\0')
2631 *s++ = '\0';
2632
2633 /* Look up the opcode in the hash table. */
2634 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2635 if (opcode == (const struct powerpc_opcode *) NULL)
2636 {
2637 const struct powerpc_macro *macro;
2638
2639 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2640 if (macro == (const struct powerpc_macro *) NULL)
2641 as_bad (_("unrecognized opcode: `%s'"), str);
2642 else
2643 ppc_macro (s, macro);
2644
2645 return;
2646 }
2647
2648 insn = opcode->opcode;
2649
2650 str = s;
2651 while (ISSPACE (*str))
2652 ++str;
2653
2654 /* PowerPC operands are just expressions. The only real issue is
2655 that a few operand types are optional. All cases which might use
2656 an optional operand separate the operands only with commas (in some
2657 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2658 have optional operands). Most instructions with optional operands
2659 have only one. Those that have more than one optional operand can
2660 take either all their operands or none. So, before we start seriously
2661 parsing the operands, we check to see if we have optional operands,
2662 and if we do, we count the number of commas to see which operands
2663 have been omitted. */
2664 skip_optional = 0;
2665 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2666 {
2667 const struct powerpc_operand *operand;
2668
2669 operand = &powerpc_operands[*opindex_ptr];
2670 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2671 {
2672 unsigned int opcount;
2673 unsigned int num_operands_expected;
2674
2675 /* There is an optional operand. Count the number of
2676 commas in the input line. */
2677 if (*str == '\0')
2678 opcount = 0;
2679 else
2680 {
2681 opcount = 1;
2682 s = str;
2683 while ((s = strchr (s, ',')) != (char *) NULL)
2684 {
2685 ++opcount;
2686 ++s;
2687 }
2688 }
2689
2690 /* Compute the number of expected operands.
2691 Do not count fake operands. */
2692 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2693 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2694 ++ num_operands_expected;
2695
2696 /* If there are fewer operands in the line then are called
2697 for by the instruction, we want to skip the optional
2698 operands. */
2699 if (opcount < num_operands_expected)
2700 skip_optional = 1;
2701
2702 break;
2703 }
2704 }
2705
2706 /* Gather the operands. */
2707 need_paren = 0;
2708 next_opindex = 0;
2709 fc = 0;
2710 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2711 {
2712 const struct powerpc_operand *operand;
2713 const char *errmsg;
2714 char *hold;
2715 expressionS ex;
2716 char endc;
2717
2718 if (next_opindex == 0)
2719 operand = &powerpc_operands[*opindex_ptr];
2720 else
2721 {
2722 operand = &powerpc_operands[next_opindex];
2723 next_opindex = 0;
2724 }
2725 errmsg = NULL;
2726
2727 /* If this is a fake operand, then we do not expect anything
2728 from the input. */
2729 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2730 {
2731 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2732 if (errmsg != (const char *) NULL)
2733 as_bad ("%s", errmsg);
2734 continue;
2735 }
2736
2737 /* If this is an optional operand, and we are skipping it, just
2738 insert a zero. */
2739 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2740 && skip_optional)
2741 {
2742 if (operand->insert)
2743 {
2744 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2745 if (errmsg != (const char *) NULL)
2746 as_bad ("%s", errmsg);
2747 }
2748 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2749 next_opindex = *opindex_ptr + 1;
2750 continue;
2751 }
2752
2753 /* Gather the operand. */
2754 hold = input_line_pointer;
2755 input_line_pointer = str;
2756
2757 #ifdef TE_PE
2758 if (*input_line_pointer == '[')
2759 {
2760 /* We are expecting something like the second argument here:
2761 *
2762 * lwz r4,[toc].GS.0.static_int(rtoc)
2763 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2764 * The argument following the `]' must be a symbol name, and the
2765 * register must be the toc register: 'rtoc' or '2'
2766 *
2767 * The effect is to 0 as the displacement field
2768 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2769 * the appropriate variation) reloc against it based on the symbol.
2770 * The linker will build the toc, and insert the resolved toc offset.
2771 *
2772 * Note:
2773 * o The size of the toc entry is currently assumed to be
2774 * 32 bits. This should not be assumed to be a hard coded
2775 * number.
2776 * o In an effort to cope with a change from 32 to 64 bits,
2777 * there are also toc entries that are specified to be
2778 * either 32 or 64 bits:
2779 * lwz r4,[toc32].GS.0.static_int(rtoc)
2780 * lwz r4,[toc64].GS.0.static_int(rtoc)
2781 * These demand toc entries of the specified size, and the
2782 * instruction probably requires it.
2783 */
2784
2785 int valid_toc;
2786 enum toc_size_qualifier toc_kind;
2787 bfd_reloc_code_real_type toc_reloc;
2788
2789 /* Go parse off the [tocXX] part. */
2790 valid_toc = parse_toc_entry (&toc_kind);
2791
2792 if (!valid_toc)
2793 {
2794 ignore_rest_of_line ();
2795 break;
2796 }
2797
2798 /* Now get the symbol following the ']'. */
2799 expression (&ex);
2800
2801 switch (toc_kind)
2802 {
2803 case default_toc:
2804 /* In this case, we may not have seen the symbol yet,
2805 since it is allowed to appear on a .extern or .globl
2806 or just be a label in the .data section. */
2807 toc_reloc = BFD_RELOC_PPC_TOC16;
2808 break;
2809 case data_in_toc:
2810 /* 1. The symbol must be defined and either in the toc
2811 section, or a global.
2812 2. The reloc generated must have the TOCDEFN flag set
2813 in upper bit mess of the reloc type.
2814 FIXME: It's a little confusing what the tocv
2815 qualifier can be used for. At the very least, I've
2816 seen three uses, only one of which I'm sure I can
2817 explain. */
2818 if (ex.X_op == O_symbol)
2819 {
2820 gas_assert (ex.X_add_symbol != NULL);
2821 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2822 != tocdata_section)
2823 {
2824 as_bad (_("[tocv] symbol is not a toc symbol"));
2825 }
2826 }
2827
2828 toc_reloc = BFD_RELOC_PPC_TOC16;
2829 break;
2830 case must_be_32:
2831 /* FIXME: these next two specifically specify 32/64 bit
2832 toc entries. We don't support them today. Is this
2833 the right way to say that? */
2834 toc_reloc = BFD_RELOC_UNUSED;
2835 as_bad (_("unimplemented toc32 expression modifier"));
2836 break;
2837 case must_be_64:
2838 /* FIXME: see above. */
2839 toc_reloc = BFD_RELOC_UNUSED;
2840 as_bad (_("unimplemented toc64 expression modifier"));
2841 break;
2842 default:
2843 fprintf (stderr,
2844 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2845 toc_kind);
2846 abort ();
2847 break;
2848 }
2849
2850 /* We need to generate a fixup for this expression. */
2851 if (fc >= MAX_INSN_FIXUPS)
2852 as_fatal (_("too many fixups"));
2853
2854 fixups[fc].reloc = toc_reloc;
2855 fixups[fc].exp = ex;
2856 fixups[fc].opindex = *opindex_ptr;
2857 ++fc;
2858
2859 /* Ok. We've set up the fixup for the instruction. Now make it
2860 look like the constant 0 was found here. */
2861 ex.X_unsigned = 1;
2862 ex.X_op = O_constant;
2863 ex.X_add_number = 0;
2864 ex.X_add_symbol = NULL;
2865 ex.X_op_symbol = NULL;
2866 }
2867
2868 else
2869 #endif /* TE_PE */
2870 {
2871 if ((reg_names_p
2872 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2873 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2874 || !register_name (&ex))
2875 {
2876 char save_lex = lex_type['%'];
2877
2878 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2879 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
2880 {
2881 cr_operand = TRUE;
2882 lex_type['%'] |= LEX_BEGIN_NAME;
2883 }
2884 expression (&ex);
2885 cr_operand = FALSE;
2886 lex_type['%'] = save_lex;
2887 }
2888 }
2889
2890 str = input_line_pointer;
2891 input_line_pointer = hold;
2892
2893 if (ex.X_op == O_illegal)
2894 as_bad (_("illegal operand"));
2895 else if (ex.X_op == O_absent)
2896 as_bad (_("missing operand"));
2897 else if (ex.X_op == O_register)
2898 {
2899 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2900 ppc_cpu, (char *) NULL, 0);
2901 }
2902 else if (ex.X_op == O_constant)
2903 {
2904 #ifdef OBJ_ELF
2905 /* Allow @HA, @L, @H on constants. */
2906 bfd_reloc_code_real_type reloc;
2907 char *orig_str = str;
2908
2909 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2910 switch (reloc)
2911 {
2912 default:
2913 str = orig_str;
2914 break;
2915
2916 case BFD_RELOC_LO16:
2917 ex.X_add_number &= 0xffff;
2918 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2919 ex.X_add_number = SEX16 (ex.X_add_number);
2920 break;
2921
2922 case BFD_RELOC_HI16:
2923 if (REPORT_OVERFLOW_HI && ppc_obj64)
2924 {
2925 /* PowerPC64 @h is tested for overflow. */
2926 ex.X_add_number = (addressT) ex.X_add_number >> 16;
2927 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2928 {
2929 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2930 ex.X_add_number
2931 = ((addressT) ex.X_add_number ^ sign) - sign;
2932 }
2933 break;
2934 }
2935 /* Fall thru */
2936
2937 case BFD_RELOC_PPC64_ADDR16_HIGH:
2938 ex.X_add_number = PPC_HI (ex.X_add_number);
2939 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2940 ex.X_add_number = SEX16 (ex.X_add_number);
2941 break;
2942
2943 case BFD_RELOC_HI16_S:
2944 if (REPORT_OVERFLOW_HI && ppc_obj64)
2945 {
2946 /* PowerPC64 @ha is tested for overflow. */
2947 ex.X_add_number
2948 = ((addressT) ex.X_add_number + 0x8000) >> 16;
2949 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2950 {
2951 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2952 ex.X_add_number
2953 = ((addressT) ex.X_add_number ^ sign) - sign;
2954 }
2955 break;
2956 }
2957 /* Fall thru */
2958
2959 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2960 ex.X_add_number = PPC_HA (ex.X_add_number);
2961 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2962 ex.X_add_number = SEX16 (ex.X_add_number);
2963 break;
2964
2965 case BFD_RELOC_PPC64_HIGHER:
2966 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2967 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2968 ex.X_add_number = SEX16 (ex.X_add_number);
2969 break;
2970
2971 case BFD_RELOC_PPC64_HIGHER_S:
2972 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2973 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2974 ex.X_add_number = SEX16 (ex.X_add_number);
2975 break;
2976
2977 case BFD_RELOC_PPC64_HIGHEST:
2978 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2979 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2980 ex.X_add_number = SEX16 (ex.X_add_number);
2981 break;
2982
2983 case BFD_RELOC_PPC64_HIGHEST_S:
2984 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2985 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2986 ex.X_add_number = SEX16 (ex.X_add_number);
2987 break;
2988 }
2989 #endif /* OBJ_ELF */
2990 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2991 ppc_cpu, (char *) NULL, 0);
2992 }
2993 else
2994 {
2995 bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
2996 #ifdef OBJ_ELF
2997 if (ex.X_op == O_symbol && str[0] == '(')
2998 {
2999 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3000 if (sym_name[0] == '.')
3001 ++sym_name;
3002
3003 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
3004 {
3005 expressionS tls_exp;
3006
3007 hold = input_line_pointer;
3008 input_line_pointer = str + 1;
3009 expression (&tls_exp);
3010 if (tls_exp.X_op == O_symbol)
3011 {
3012 reloc = BFD_RELOC_UNUSED;
3013 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3014 {
3015 reloc = BFD_RELOC_PPC_TLSGD;
3016 input_line_pointer += 7;
3017 }
3018 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3019 {
3020 reloc = BFD_RELOC_PPC_TLSLD;
3021 input_line_pointer += 7;
3022 }
3023 if (reloc != BFD_RELOC_UNUSED)
3024 {
3025 SKIP_WHITESPACE ();
3026 str = input_line_pointer;
3027
3028 if (fc >= MAX_INSN_FIXUPS)
3029 as_fatal (_("too many fixups"));
3030 fixups[fc].exp = tls_exp;
3031 fixups[fc].opindex = *opindex_ptr;
3032 fixups[fc].reloc = reloc;
3033 ++fc;
3034 }
3035 }
3036 input_line_pointer = hold;
3037 }
3038 }
3039
3040 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
3041 {
3042 /* Some TLS tweaks. */
3043 switch (reloc)
3044 {
3045 default:
3046 break;
3047
3048 case BFD_RELOC_PPC_TLS:
3049 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3050 as_bad (_("@tls may not be used with \"%s\" operands"),
3051 opcode->name);
3052 else if (operand->shift != 11)
3053 as_bad (_("@tls may only be used in last operand"));
3054 else
3055 insn = ppc_insert_operand (insn, operand,
3056 ppc_obj64 ? 13 : 2,
3057 ppc_cpu, (char *) NULL, 0);
3058 break;
3059
3060 /* We'll only use the 32 (or 64) bit form of these relocations
3061 in constants. Instructions get the 16 bit form. */
3062 case BFD_RELOC_PPC_DTPREL:
3063 reloc = BFD_RELOC_PPC_DTPREL16;
3064 break;
3065 case BFD_RELOC_PPC_TPREL:
3066 reloc = BFD_RELOC_PPC_TPREL16;
3067 break;
3068 }
3069
3070 /* If VLE-mode convert LO/HI/HA relocations. */
3071 if (opcode->flags & PPC_OPCODE_VLE)
3072 {
3073 int tmp_insn = insn & opcode->mask;
3074
3075 int use_d_reloc = (tmp_insn == E_OR2I_INSN
3076 || tmp_insn == E_AND2I_DOT_INSN
3077 || tmp_insn == E_OR2IS_INSN
3078 || tmp_insn == E_LIS_INSN
3079 || tmp_insn == E_AND2IS_DOT_INSN);
3080
3081
3082 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3083 || tmp_insn == E_ADD2IS_INSN
3084 || tmp_insn == E_CMP16I_INSN
3085 || tmp_insn == E_MULL2I_INSN
3086 || tmp_insn == E_CMPL16I_INSN
3087 || tmp_insn == E_CMPH16I_INSN
3088 || tmp_insn == E_CMPHL16I_INSN);
3089
3090 switch (reloc)
3091 {
3092 default:
3093 break;
3094
3095 case BFD_RELOC_PPC_EMB_SDA21:
3096 reloc = BFD_RELOC_PPC_VLE_SDA21;
3097 break;
3098
3099 case BFD_RELOC_LO16:
3100 if (use_d_reloc)
3101 reloc = BFD_RELOC_PPC_VLE_LO16D;
3102 else if (use_a_reloc)
3103 reloc = BFD_RELOC_PPC_VLE_LO16A;
3104 break;
3105
3106 case BFD_RELOC_HI16:
3107 if (use_d_reloc)
3108 reloc = BFD_RELOC_PPC_VLE_HI16D;
3109 else if (use_a_reloc)
3110 reloc = BFD_RELOC_PPC_VLE_HI16A;
3111 break;
3112
3113 case BFD_RELOC_HI16_S:
3114 if (use_d_reloc)
3115 reloc = BFD_RELOC_PPC_VLE_HA16D;
3116 else if (use_a_reloc)
3117 reloc = BFD_RELOC_PPC_VLE_HA16A;
3118 break;
3119
3120 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3121 if (use_d_reloc)
3122 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3123 break;
3124
3125 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3126 if (use_d_reloc)
3127 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3128 break;
3129
3130 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3131 if (use_d_reloc)
3132 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3133 break;
3134 }
3135 }
3136
3137 /* For the absolute forms of branches, convert the PC
3138 relative form back into the absolute. */
3139 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3140 {
3141 switch (reloc)
3142 {
3143 case BFD_RELOC_PPC_B26:
3144 reloc = BFD_RELOC_PPC_BA26;
3145 break;
3146 case BFD_RELOC_PPC_B16:
3147 reloc = BFD_RELOC_PPC_BA16;
3148 break;
3149 case BFD_RELOC_PPC_B16_BRTAKEN:
3150 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3151 break;
3152 case BFD_RELOC_PPC_B16_BRNTAKEN:
3153 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3154 break;
3155 default:
3156 break;
3157 }
3158 }
3159
3160 switch (reloc)
3161 {
3162 case BFD_RELOC_PPC_TOC16:
3163 toc_reloc_types |= has_small_toc_reloc;
3164 break;
3165 case BFD_RELOC_PPC64_TOC16_LO:
3166 case BFD_RELOC_PPC64_TOC16_HI:
3167 case BFD_RELOC_PPC64_TOC16_HA:
3168 toc_reloc_types |= has_large_toc_reloc;
3169 break;
3170 default:
3171 break;
3172 }
3173
3174 if ((operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3175 {
3176 switch (reloc)
3177 {
3178 case BFD_RELOC_16:
3179 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3180 break;
3181 case BFD_RELOC_LO16:
3182 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3183 break;
3184 case BFD_RELOC_16_GOTOFF:
3185 reloc = BFD_RELOC_PPC64_GOT16_DS;
3186 break;
3187 case BFD_RELOC_LO16_GOTOFF:
3188 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3189 break;
3190 case BFD_RELOC_LO16_PLTOFF:
3191 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3192 break;
3193 case BFD_RELOC_16_BASEREL:
3194 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3195 break;
3196 case BFD_RELOC_LO16_BASEREL:
3197 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3198 break;
3199 case BFD_RELOC_PPC_TOC16:
3200 reloc = BFD_RELOC_PPC64_TOC16_DS;
3201 break;
3202 case BFD_RELOC_PPC64_TOC16_LO:
3203 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3204 break;
3205 case BFD_RELOC_PPC64_PLTGOT16:
3206 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3207 break;
3208 case BFD_RELOC_PPC64_PLTGOT16_LO:
3209 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3210 break;
3211 case BFD_RELOC_PPC_DTPREL16:
3212 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3213 break;
3214 case BFD_RELOC_PPC_DTPREL16_LO:
3215 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3216 break;
3217 case BFD_RELOC_PPC_TPREL16:
3218 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3219 break;
3220 case BFD_RELOC_PPC_TPREL16_LO:
3221 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3222 break;
3223 case BFD_RELOC_PPC_GOT_DTPREL16:
3224 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3225 case BFD_RELOC_PPC_GOT_TPREL16:
3226 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3227 break;
3228 default:
3229 as_bad (_("unsupported relocation for DS offset field"));
3230 break;
3231 }
3232 }
3233 }
3234 #endif /* OBJ_ELF */
3235
3236 if (reloc != BFD_RELOC_UNUSED)
3237 ;
3238 /* Determine a BFD reloc value based on the operand information.
3239 We are only prepared to turn a few of the operands into
3240 relocs. */
3241 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3242 && operand->bitm == 0x3fffffc
3243 && operand->shift == 0)
3244 reloc = BFD_RELOC_PPC_B26;
3245 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3246 && operand->bitm == 0xfffc
3247 && operand->shift == 0)
3248 reloc = BFD_RELOC_PPC_B16;
3249 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3250 && operand->bitm == 0x1fe
3251 && operand->shift == -1)
3252 reloc = BFD_RELOC_PPC_VLE_REL8;
3253 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3254 && operand->bitm == 0xfffe
3255 && operand->shift == 0)
3256 reloc = BFD_RELOC_PPC_VLE_REL15;
3257 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3258 && operand->bitm == 0x1fffffe
3259 && operand->shift == 0)
3260 reloc = BFD_RELOC_PPC_VLE_REL24;
3261 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3262 && operand->bitm == 0x3fffffc
3263 && operand->shift == 0)
3264 reloc = BFD_RELOC_PPC_BA26;
3265 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3266 && operand->bitm == 0xfffc
3267 && operand->shift == 0)
3268 reloc = BFD_RELOC_PPC_BA16;
3269 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
3270 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
3271 && (operand->bitm & 0xfff0) == 0xfff0
3272 && operand->shift == 0)
3273 {
3274 reloc = BFD_RELOC_16;
3275 #ifdef OBJ_ELF
3276 if (ppc_obj64
3277 && (operand->flags & PPC_OPERAND_DS) != 0)
3278 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3279 #endif
3280 #ifdef OBJ_XCOFF
3281 /* Note: the symbol may be not yet defined. */
3282 if (ppc_is_toc_sym (ex.X_add_symbol))
3283 reloc = BFD_RELOC_PPC_TOC16;
3284 #endif
3285 }
3286 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
3287
3288 /* We need to generate a fixup for this expression. */
3289 if (fc >= MAX_INSN_FIXUPS)
3290 as_fatal (_("too many fixups"));
3291 fixups[fc].exp = ex;
3292 fixups[fc].opindex = *opindex_ptr;
3293 fixups[fc].reloc = reloc;
3294 ++fc;
3295 }
3296
3297 if (need_paren)
3298 {
3299 endc = ')';
3300 need_paren = 0;
3301 /* If expecting more operands, then we want to see "),". */
3302 if (*str == endc && opindex_ptr[1] != 0)
3303 {
3304 do
3305 ++str;
3306 while (ISSPACE (*str));
3307 endc = ',';
3308 }
3309 }
3310 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3311 {
3312 endc = '(';
3313 need_paren = 1;
3314 }
3315 else
3316 endc = ',';
3317
3318 /* The call to expression should have advanced str past any
3319 whitespace. */
3320 if (*str != endc
3321 && (endc != ',' || *str != '\0'))
3322 {
3323 if (*str == '\0')
3324 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3325 else
3326 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
3327 break;
3328 }
3329
3330 if (*str != '\0')
3331 ++str;
3332 }
3333
3334 while (ISSPACE (*str))
3335 ++str;
3336
3337 if (*str != '\0')
3338 as_bad (_("junk at end of line: `%s'"), str);
3339
3340 #ifdef OBJ_ELF
3341 /* Do we need/want an APUinfo section? */
3342 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3343 && !ppc_obj64)
3344 {
3345 /* These are all version "1". */
3346 if (opcode->flags & PPC_OPCODE_SPE)
3347 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
3348 if (opcode->flags & PPC_OPCODE_ISEL)
3349 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
3350 if (opcode->flags & PPC_OPCODE_EFS)
3351 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
3352 if (opcode->flags & PPC_OPCODE_BRLOCK)
3353 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
3354 if (opcode->flags & PPC_OPCODE_PMR)
3355 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
3356 if (opcode->flags & PPC_OPCODE_CACHELCK)
3357 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
3358 if (opcode->flags & PPC_OPCODE_RFMCI)
3359 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
3360 if (opcode->flags & PPC_OPCODE_VLE)
3361 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
3362 }
3363 #endif
3364
3365 /* Write out the instruction. */
3366 /* Differentiate between two and four byte insns. */
3367 if (ppc_mach () == bfd_mach_ppc_vle)
3368 {
3369 if (PPC_OP_SE_VLE (insn))
3370 insn_length = 2;
3371 else
3372 insn_length = 4;
3373 addr_mod = frag_now_fix () & 1;
3374 }
3375 else
3376 {
3377 insn_length = 4;
3378 addr_mod = frag_now_fix () & 3;
3379 }
3380 /* All instructions can start on a 2 byte boundary for VLE. */
3381 f = frag_more (insn_length);
3382 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
3383 {
3384 if (ppc_mach() == bfd_mach_ppc_vle)
3385 as_bad (_("instruction address is not a multiple of 2"));
3386 else
3387 as_bad (_("instruction address is not a multiple of 4"));
3388 }
3389 frag_now->insn_addr = addr_mod;
3390 frag_now->has_code = 1;
3391 md_number_to_chars (f, insn, insn_length);
3392
3393 #ifdef OBJ_ELF
3394 dwarf2_emit_insn (insn_length);
3395 #endif
3396
3397 /* Create any fixups. */
3398 for (i = 0; i < fc; i++)
3399 {
3400 fixS *fixP;
3401 if (fixups[i].reloc != BFD_RELOC_UNUSED)
3402 {
3403 reloc_howto_type *reloc_howto;
3404 int size;
3405 int offset;
3406
3407 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
3408 if (!reloc_howto)
3409 abort ();
3410
3411 size = bfd_get_reloc_size (reloc_howto);
3412 offset = target_big_endian ? (insn_length - size) : 0;
3413
3414 if (size < 1 || size > 4)
3415 abort ();
3416
3417 fixP = fix_new_exp (frag_now,
3418 f - frag_now->fr_literal + offset,
3419 size,
3420 &fixups[i].exp,
3421 reloc_howto->pc_relative,
3422 fixups[i].reloc);
3423 }
3424 else
3425 {
3426 const struct powerpc_operand *operand;
3427
3428 operand = &powerpc_operands[fixups[i].opindex];
3429 fixP = fix_new_exp (frag_now,
3430 f - frag_now->fr_literal,
3431 insn_length,
3432 &fixups[i].exp,
3433 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3434 BFD_RELOC_UNUSED);
3435 }
3436 fixP->fx_pcrel_adjust = fixups[i].opindex;
3437 }
3438 }
3439
3440 /* Handle a macro. Gather all the operands, transform them as
3441 described by the macro, and call md_assemble recursively. All the
3442 operands are separated by commas; we don't accept parentheses
3443 around operands here. */
3444
3445 static void
3446 ppc_macro (char *str, const struct powerpc_macro *macro)
3447 {
3448 char *operands[10];
3449 unsigned int count;
3450 char *s;
3451 unsigned int len;
3452 const char *format;
3453 unsigned int arg;
3454 char *send;
3455 char *complete;
3456
3457 /* Gather the users operands into the operands array. */
3458 count = 0;
3459 s = str;
3460 while (1)
3461 {
3462 if (count >= sizeof operands / sizeof operands[0])
3463 break;
3464 operands[count++] = s;
3465 s = strchr (s, ',');
3466 if (s == (char *) NULL)
3467 break;
3468 *s++ = '\0';
3469 }
3470
3471 if (count != macro->operands)
3472 {
3473 as_bad (_("wrong number of operands"));
3474 return;
3475 }
3476
3477 /* Work out how large the string must be (the size is unbounded
3478 because it includes user input). */
3479 len = 0;
3480 format = macro->format;
3481 while (*format != '\0')
3482 {
3483 if (*format != '%')
3484 {
3485 ++len;
3486 ++format;
3487 }
3488 else
3489 {
3490 arg = strtol (format + 1, &send, 10);
3491 know (send != format && arg < count);
3492 len += strlen (operands[arg]);
3493 format = send;
3494 }
3495 }
3496
3497 /* Put the string together. */
3498 complete = s = (char *) alloca (len + 1);
3499 format = macro->format;
3500 while (*format != '\0')
3501 {
3502 if (*format != '%')
3503 *s++ = *format++;
3504 else
3505 {
3506 arg = strtol (format + 1, &send, 10);
3507 strcpy (s, operands[arg]);
3508 s += strlen (s);
3509 format = send;
3510 }
3511 }
3512 *s = '\0';
3513
3514 /* Assemble the constructed instruction. */
3515 md_assemble (complete);
3516 }
3517 \f
3518 #ifdef OBJ_ELF
3519 /* For ELF, add support for SHT_ORDERED. */
3520
3521 int
3522 ppc_section_type (char *str, size_t len)
3523 {
3524 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3525 return SHT_ORDERED;
3526
3527 return -1;
3528 }
3529
3530 int
3531 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
3532 {
3533 if (type == SHT_ORDERED)
3534 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3535
3536 return flags;
3537 }
3538 #endif /* OBJ_ELF */
3539
3540 \f
3541 /* Pseudo-op handling. */
3542
3543 /* The .byte pseudo-op. This is similar to the normal .byte
3544 pseudo-op, but it can also take a single ASCII string. */
3545
3546 static void
3547 ppc_byte (int ignore ATTRIBUTE_UNUSED)
3548 {
3549 if (*input_line_pointer != '\"')
3550 {
3551 cons (1);
3552 return;
3553 }
3554
3555 /* Gather characters. A real double quote is doubled. Unusual
3556 characters are not permitted. */
3557 ++input_line_pointer;
3558 while (1)
3559 {
3560 char c;
3561
3562 c = *input_line_pointer++;
3563
3564 if (c == '\"')
3565 {
3566 if (*input_line_pointer != '\"')
3567 break;
3568 ++input_line_pointer;
3569 }
3570
3571 FRAG_APPEND_1_CHAR (c);
3572 }
3573
3574 demand_empty_rest_of_line ();
3575 }
3576 \f
3577 #ifdef OBJ_XCOFF
3578
3579 /* XCOFF specific pseudo-op handling. */
3580
3581 /* This is set if we are creating a .stabx symbol, since we don't want
3582 to handle symbol suffixes for such symbols. */
3583 static bfd_boolean ppc_stab_symbol;
3584
3585 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3586 symbols in the .bss segment as though they were local common
3587 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3588 aligns .comm and .lcomm to 4 bytes. */
3589
3590 static void
3591 ppc_comm (int lcomm)
3592 {
3593 asection *current_seg = now_seg;
3594 subsegT current_subseg = now_subseg;
3595 char *name;
3596 char endc;
3597 char *end_name;
3598 offsetT size;
3599 offsetT align;
3600 symbolS *lcomm_sym = NULL;
3601 symbolS *sym;
3602 char *pfrag;
3603
3604 name = input_line_pointer;
3605 endc = get_symbol_end ();
3606 end_name = input_line_pointer;
3607 *end_name = endc;
3608
3609 if (*input_line_pointer != ',')
3610 {
3611 as_bad (_("missing size"));
3612 ignore_rest_of_line ();
3613 return;
3614 }
3615 ++input_line_pointer;
3616
3617 size = get_absolute_expression ();
3618 if (size < 0)
3619 {
3620 as_bad (_("negative size"));
3621 ignore_rest_of_line ();
3622 return;
3623 }
3624
3625 if (! lcomm)
3626 {
3627 /* The third argument to .comm is the alignment. */
3628 if (*input_line_pointer != ',')
3629 align = 2;
3630 else
3631 {
3632 ++input_line_pointer;
3633 align = get_absolute_expression ();
3634 if (align <= 0)
3635 {
3636 as_warn (_("ignoring bad alignment"));
3637 align = 2;
3638 }
3639 }
3640 }
3641 else
3642 {
3643 char *lcomm_name;
3644 char lcomm_endc;
3645
3646 /* The third argument to .lcomm appears to be the real local
3647 common symbol to create. References to the symbol named in
3648 the first argument are turned into references to the third
3649 argument. */
3650 if (*input_line_pointer != ',')
3651 {
3652 as_bad (_("missing real symbol name"));
3653 ignore_rest_of_line ();
3654 return;
3655 }
3656 ++input_line_pointer;
3657
3658 lcomm_name = input_line_pointer;
3659 lcomm_endc = get_symbol_end ();
3660
3661 lcomm_sym = symbol_find_or_make (lcomm_name);
3662
3663 *input_line_pointer = lcomm_endc;
3664
3665 /* The fourth argument to .lcomm is the alignment. */
3666 if (*input_line_pointer != ',')
3667 {
3668 if (size <= 4)
3669 align = 2;
3670 else
3671 align = 3;
3672 }
3673 else
3674 {
3675 ++input_line_pointer;
3676 align = get_absolute_expression ();
3677 if (align <= 0)
3678 {
3679 as_warn (_("ignoring bad alignment"));
3680 align = 2;
3681 }
3682 }
3683 }
3684
3685 *end_name = '\0';
3686 sym = symbol_find_or_make (name);
3687 *end_name = endc;
3688
3689 if (S_IS_DEFINED (sym)
3690 || S_GET_VALUE (sym) != 0)
3691 {
3692 as_bad (_("attempt to redefine symbol"));
3693 ignore_rest_of_line ();
3694 return;
3695 }
3696
3697 record_alignment (bss_section, align);
3698
3699 if (! lcomm
3700 || ! S_IS_DEFINED (lcomm_sym))
3701 {
3702 symbolS *def_sym;
3703 offsetT def_size;
3704
3705 if (! lcomm)
3706 {
3707 def_sym = sym;
3708 def_size = size;
3709 S_SET_EXTERNAL (sym);
3710 }
3711 else
3712 {
3713 symbol_get_tc (lcomm_sym)->output = 1;
3714 def_sym = lcomm_sym;
3715 def_size = 0;
3716 }
3717
3718 subseg_set (bss_section, 1);
3719 frag_align (align, 0, 0);
3720
3721 symbol_set_frag (def_sym, frag_now);
3722 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3723 def_size, (char *) NULL);
3724 *pfrag = 0;
3725 S_SET_SEGMENT (def_sym, bss_section);
3726 symbol_get_tc (def_sym)->align = align;
3727 }
3728 else if (lcomm)
3729 {
3730 /* Align the size of lcomm_sym. */
3731 symbol_get_frag (lcomm_sym)->fr_offset =
3732 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3733 &~ ((1 << align) - 1));
3734 if (align > symbol_get_tc (lcomm_sym)->align)
3735 symbol_get_tc (lcomm_sym)->align = align;
3736 }
3737
3738 if (lcomm)
3739 {
3740 /* Make sym an offset from lcomm_sym. */
3741 S_SET_SEGMENT (sym, bss_section);
3742 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3743 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3744 symbol_get_frag (lcomm_sym)->fr_offset += size;
3745 }
3746
3747 subseg_set (current_seg, current_subseg);
3748
3749 demand_empty_rest_of_line ();
3750 }
3751
3752 /* The .csect pseudo-op. This switches us into a different
3753 subsegment. The first argument is a symbol whose value is the
3754 start of the .csect. In COFF, csect symbols get special aux
3755 entries defined by the x_csect field of union internal_auxent. The
3756 optional second argument is the alignment (the default is 2). */
3757
3758 static void
3759 ppc_csect (int ignore ATTRIBUTE_UNUSED)
3760 {
3761 char *name;
3762 char endc;
3763 symbolS *sym;
3764 offsetT align;
3765
3766 name = input_line_pointer;
3767 endc = get_symbol_end ();
3768
3769 sym = symbol_find_or_make (name);
3770
3771 *input_line_pointer = endc;
3772
3773 if (S_GET_NAME (sym)[0] == '\0')
3774 {
3775 /* An unnamed csect is assumed to be [PR]. */
3776 symbol_get_tc (sym)->symbol_class = XMC_PR;
3777 }
3778
3779 align = 2;
3780 if (*input_line_pointer == ',')
3781 {
3782 ++input_line_pointer;
3783 align = get_absolute_expression ();
3784 }
3785
3786 ppc_change_csect (sym, align);
3787
3788 demand_empty_rest_of_line ();
3789 }
3790
3791 /* Change to a different csect. */
3792
3793 static void
3794 ppc_change_csect (symbolS *sym, offsetT align)
3795 {
3796 if (S_IS_DEFINED (sym))
3797 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3798 else
3799 {
3800 symbolS **list_ptr;
3801 int after_toc;
3802 int hold_chunksize;
3803 symbolS *list;
3804 int is_code;
3805 segT sec;
3806
3807 /* This is a new csect. We need to look at the symbol class to
3808 figure out whether it should go in the text section or the
3809 data section. */
3810 after_toc = 0;
3811 is_code = 0;
3812 switch (symbol_get_tc (sym)->symbol_class)
3813 {
3814 case XMC_PR:
3815 case XMC_RO:
3816 case XMC_DB:
3817 case XMC_GL:
3818 case XMC_XO:
3819 case XMC_SV:
3820 case XMC_TI:
3821 case XMC_TB:
3822 S_SET_SEGMENT (sym, text_section);
3823 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3824 ++ppc_text_subsegment;
3825 list_ptr = &ppc_text_csects;
3826 is_code = 1;
3827 break;
3828 case XMC_RW:
3829 case XMC_TC0:
3830 case XMC_TC:
3831 case XMC_DS:
3832 case XMC_UA:
3833 case XMC_BS:
3834 case XMC_UC:
3835 if (ppc_toc_csect != NULL
3836 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3837 == ppc_data_subsegment))
3838 after_toc = 1;
3839 S_SET_SEGMENT (sym, data_section);
3840 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
3841 ++ppc_data_subsegment;
3842 list_ptr = &ppc_data_csects;
3843 break;
3844 default:
3845 abort ();
3846 }
3847
3848 /* We set the obstack chunk size to a small value before
3849 changing subsegments, so that we don't use a lot of memory
3850 space for what may be a small section. */
3851 hold_chunksize = chunksize;
3852 chunksize = 64;
3853
3854 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3855 symbol_get_tc (sym)->subseg);
3856
3857 chunksize = hold_chunksize;
3858
3859 if (after_toc)
3860 ppc_after_toc_frag = frag_now;
3861
3862 record_alignment (sec, align);
3863 if (is_code)
3864 frag_align_code (align, 0);
3865 else
3866 frag_align (align, 0, 0);
3867
3868 symbol_set_frag (sym, frag_now);
3869 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3870
3871 symbol_get_tc (sym)->align = align;
3872 symbol_get_tc (sym)->output = 1;
3873 symbol_get_tc (sym)->within = sym;
3874
3875 for (list = *list_ptr;
3876 symbol_get_tc (list)->next != (symbolS *) NULL;
3877 list = symbol_get_tc (list)->next)
3878 ;
3879 symbol_get_tc (list)->next = sym;
3880
3881 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3882 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3883 &symbol_lastP);
3884 }
3885
3886 ppc_current_csect = sym;
3887 }
3888
3889 static void
3890 ppc_change_debug_section (unsigned int idx, subsegT subseg)
3891 {
3892 segT sec;
3893 flagword oldflags;
3894 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3895
3896 sec = subseg_new (dw->name, subseg);
3897 oldflags = bfd_get_section_flags (stdoutput, sec);
3898 if (oldflags == SEC_NO_FLAGS)
3899 {
3900 /* Just created section. */
3901 gas_assert (dw_sections[idx].sect == NULL);
3902
3903 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3904 bfd_set_section_alignment (stdoutput, sec, 0);
3905 dw_sections[idx].sect = sec;
3906 }
3907
3908 /* Not anymore in a csect. */
3909 ppc_current_csect = NULL;
3910 }
3911
3912 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3913 .dwsect flag [, opt-label ]
3914 */
3915
3916 static void
3917 ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3918 {
3919 offsetT flag;
3920 symbolS *opt_label;
3921 const struct xcoff_dwsect_name *dw;
3922 struct dw_subsection *subseg;
3923 struct dw_section *dws;
3924 int i;
3925
3926 /* Find section. */
3927 flag = get_absolute_expression ();
3928 dw = NULL;
3929 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3930 if (xcoff_dwsect_names[i].flag == flag)
3931 {
3932 dw = &xcoff_dwsect_names[i];
3933 break;
3934 }
3935
3936 /* Parse opt-label. */
3937 if (*input_line_pointer == ',')
3938 {
3939 const char *label;
3940 char c;
3941
3942 ++input_line_pointer;
3943
3944 label = input_line_pointer;
3945 c = get_symbol_end ();
3946 opt_label = symbol_find_or_make (label);
3947 *input_line_pointer = c;
3948 }
3949 else
3950 opt_label = NULL;
3951
3952 demand_empty_rest_of_line ();
3953
3954 /* Return now in case of unknown subsection. */
3955 if (dw == NULL)
3956 {
3957 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
3958 (unsigned)flag);
3959 return;
3960 }
3961
3962 /* Find the subsection. */
3963 dws = &dw_sections[i];
3964 subseg = NULL;
3965 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3966 {
3967 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3968 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3969 {
3970 as_bad (_("label %s was not defined in this dwarf section"),
3971 S_GET_NAME (opt_label));
3972 subseg = dws->anon_subseg;
3973 opt_label = NULL;
3974 }
3975 else
3976 subseg = symbol_get_tc (opt_label)->u.dw;
3977 }
3978
3979 if (subseg != NULL)
3980 {
3981 /* Switch to the subsection. */
3982 ppc_change_debug_section (i, subseg->subseg);
3983 }
3984 else
3985 {
3986 /* Create a new dw subsection. */
3987 subseg = (struct dw_subsection *)
3988 xmalloc (sizeof (struct dw_subsection));
3989
3990 if (opt_label == NULL)
3991 {
3992 /* The anonymous one. */
3993 subseg->subseg = 0;
3994 subseg->link = NULL;
3995 dws->anon_subseg = subseg;
3996 }
3997 else
3998 {
3999 /* A named one. */
4000 if (dws->list_subseg != NULL)
4001 subseg->subseg = dws->list_subseg->subseg + 1;
4002 else
4003 subseg->subseg = 1;
4004
4005 subseg->link = dws->list_subseg;
4006 dws->list_subseg = subseg;
4007 symbol_get_tc (opt_label)->u.dw = subseg;
4008 }
4009
4010 ppc_change_debug_section (i, subseg->subseg);
4011
4012 if (dw->def_size)
4013 {
4014 /* Add the length field. */
4015 expressionS *exp = &subseg->end_exp;
4016 int sz;
4017
4018 if (opt_label != NULL)
4019 symbol_set_value_now (opt_label);
4020
4021 /* Add the length field. Note that according to the AIX assembler
4022 manual, the size of the length field is 4 for powerpc32 but
4023 12 for powerpc64. */
4024 if (ppc_obj64)
4025 {
4026 /* Write the 64bit marker. */
4027 md_number_to_chars (frag_more (4), -1, 4);
4028 }
4029
4030 exp->X_op = O_subtract;
4031 exp->X_op_symbol = symbol_temp_new_now ();
4032 exp->X_add_symbol = symbol_temp_make ();
4033
4034 sz = ppc_obj64 ? 8 : 4;
4035 exp->X_add_number = -sz;
4036 emit_expr (exp, sz);
4037 }
4038 }
4039 }
4040
4041 /* This function handles the .text and .data pseudo-ops. These
4042 pseudo-ops aren't really used by XCOFF; we implement them for the
4043 convenience of people who aren't used to XCOFF. */
4044
4045 static void
4046 ppc_section (int type)
4047 {
4048 const char *name;
4049 symbolS *sym;
4050
4051 if (type == 't')
4052 name = ".text[PR]";
4053 else if (type == 'd')
4054 name = ".data[RW]";
4055 else
4056 abort ();
4057
4058 sym = symbol_find_or_make (name);
4059
4060 ppc_change_csect (sym, 2);
4061
4062 demand_empty_rest_of_line ();
4063 }
4064
4065 /* This function handles the .section pseudo-op. This is mostly to
4066 give an error, since XCOFF only supports .text, .data and .bss, but
4067 we do permit the user to name the text or data section. */
4068
4069 static void
4070 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
4071 {
4072 char *user_name;
4073 const char *real_name;
4074 char c;
4075 symbolS *sym;
4076
4077 user_name = input_line_pointer;
4078 c = get_symbol_end ();
4079
4080 if (strcmp (user_name, ".text") == 0)
4081 real_name = ".text[PR]";
4082 else if (strcmp (user_name, ".data") == 0)
4083 real_name = ".data[RW]";
4084 else
4085 {
4086 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4087 *input_line_pointer = c;
4088 ignore_rest_of_line ();
4089 return;
4090 }
4091
4092 *input_line_pointer = c;
4093
4094 sym = symbol_find_or_make (real_name);
4095
4096 ppc_change_csect (sym, 2);
4097
4098 demand_empty_rest_of_line ();
4099 }
4100
4101 /* The .extern pseudo-op. We create an undefined symbol. */
4102
4103 static void
4104 ppc_extern (int ignore ATTRIBUTE_UNUSED)
4105 {
4106 char *name;
4107 char endc;
4108
4109 name = input_line_pointer;
4110 endc = get_symbol_end ();
4111
4112 (void) symbol_find_or_make (name);
4113
4114 *input_line_pointer = endc;
4115
4116 demand_empty_rest_of_line ();
4117 }
4118
4119 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4120
4121 static void
4122 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
4123 {
4124 char *name;
4125 char endc;
4126 symbolS *sym;
4127
4128 name = input_line_pointer;
4129 endc = get_symbol_end ();
4130
4131 sym = symbol_find_or_make (name);
4132
4133 *input_line_pointer = endc;
4134
4135 symbol_get_tc (sym)->output = 1;
4136
4137 demand_empty_rest_of_line ();
4138 }
4139
4140 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4141 relocations at the beginning of the current csect.
4142
4143 (In principle, there's no reason why the relocations _have_ to be at
4144 the beginning. Anywhere in the csect would do. However, inserting
4145 at the beginning is what the native assmebler does, and it helps to
4146 deal with cases where the .ref statements follow the section contents.)
4147
4148 ??? .refs don't work for empty .csects. However, the native assembler
4149 doesn't report an error in this case, and neither yet do we. */
4150
4151 static void
4152 ppc_ref (int ignore ATTRIBUTE_UNUSED)
4153 {
4154 char *name;
4155 char c;
4156
4157 if (ppc_current_csect == NULL)
4158 {
4159 as_bad (_(".ref outside .csect"));
4160 ignore_rest_of_line ();
4161 return;
4162 }
4163
4164 do
4165 {
4166 name = input_line_pointer;
4167 c = get_symbol_end ();
4168
4169 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4170 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4171
4172 *input_line_pointer = c;
4173 SKIP_WHITESPACE ();
4174 c = *input_line_pointer;
4175 if (c == ',')
4176 {
4177 input_line_pointer++;
4178 SKIP_WHITESPACE ();
4179 if (is_end_of_line[(unsigned char) *input_line_pointer])
4180 {
4181 as_bad (_("missing symbol name"));
4182 ignore_rest_of_line ();
4183 return;
4184 }
4185 }
4186 }
4187 while (c == ',');
4188
4189 demand_empty_rest_of_line ();
4190 }
4191
4192 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4193 although I don't know why it bothers. */
4194
4195 static void
4196 ppc_rename (int ignore ATTRIBUTE_UNUSED)
4197 {
4198 char *name;
4199 char endc;
4200 symbolS *sym;
4201 int len;
4202
4203 name = input_line_pointer;
4204 endc = get_symbol_end ();
4205
4206 sym = symbol_find_or_make (name);
4207
4208 *input_line_pointer = endc;
4209
4210 if (*input_line_pointer != ',')
4211 {
4212 as_bad (_("missing rename string"));
4213 ignore_rest_of_line ();
4214 return;
4215 }
4216 ++input_line_pointer;
4217
4218 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
4219
4220 demand_empty_rest_of_line ();
4221 }
4222
4223 /* The .stabx pseudo-op. This is similar to a normal .stabs
4224 pseudo-op, but slightly different. A sample is
4225 .stabx "main:F-1",.main,142,0
4226 The first argument is the symbol name to create. The second is the
4227 value, and the third is the storage class. The fourth seems to be
4228 always zero, and I am assuming it is the type. */
4229
4230 static void
4231 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
4232 {
4233 char *name;
4234 int len;
4235 symbolS *sym;
4236 expressionS exp;
4237
4238 name = demand_copy_C_string (&len);
4239
4240 if (*input_line_pointer != ',')
4241 {
4242 as_bad (_("missing value"));
4243 return;
4244 }
4245 ++input_line_pointer;
4246
4247 ppc_stab_symbol = TRUE;
4248 sym = symbol_make (name);
4249 ppc_stab_symbol = FALSE;
4250
4251 symbol_get_tc (sym)->real_name = name;
4252
4253 (void) expression (&exp);
4254
4255 switch (exp.X_op)
4256 {
4257 case O_illegal:
4258 case O_absent:
4259 case O_big:
4260 as_bad (_("illegal .stabx expression; zero assumed"));
4261 exp.X_add_number = 0;
4262 /* Fall through. */
4263 case O_constant:
4264 S_SET_VALUE (sym, (valueT) exp.X_add_number);
4265 symbol_set_frag (sym, &zero_address_frag);
4266 break;
4267
4268 case O_symbol:
4269 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
4270 symbol_set_value_expression (sym, &exp);
4271 else
4272 {
4273 S_SET_VALUE (sym,
4274 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
4275 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
4276 }
4277 break;
4278
4279 default:
4280 /* The value is some complex expression. This will probably
4281 fail at some later point, but this is probably the right
4282 thing to do here. */
4283 symbol_set_value_expression (sym, &exp);
4284 break;
4285 }
4286
4287 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4288 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4289
4290 if (*input_line_pointer != ',')
4291 {
4292 as_bad (_("missing class"));
4293 return;
4294 }
4295 ++input_line_pointer;
4296
4297 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4298
4299 if (*input_line_pointer != ',')
4300 {
4301 as_bad (_("missing type"));
4302 return;
4303 }
4304 ++input_line_pointer;
4305
4306 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4307
4308 symbol_get_tc (sym)->output = 1;
4309
4310 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4311 {
4312 /* In this case :
4313
4314 .bs name
4315 .stabx "z",arrays_,133,0
4316 .es
4317
4318 .comm arrays_,13768,3
4319
4320 resolve_symbol_value will copy the exp's "within" into sym's when the
4321 offset is 0. Since this seems to be corner case problem,
4322 only do the correction for storage class C_STSYM. A better solution
4323 would be to have the tc field updated in ppc_symbol_new_hook. */
4324
4325 if (exp.X_op == O_symbol)
4326 {
4327 if (ppc_current_block == NULL)
4328 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4329
4330 symbol_get_tc (sym)->within = ppc_current_block;
4331 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4332 }
4333 }
4334
4335 if (exp.X_op != O_symbol
4336 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4337 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4338 ppc_frob_label (sym);
4339 else
4340 {
4341 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4342 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
4343 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4344 symbol_get_tc (ppc_current_csect)->within = sym;
4345 }
4346
4347 demand_empty_rest_of_line ();
4348 }
4349
4350 /* The .function pseudo-op. This takes several arguments. The first
4351 argument seems to be the external name of the symbol. The second
4352 argument seems to be the label for the start of the function. gcc
4353 uses the same name for both. I have no idea what the third and
4354 fourth arguments are meant to be. The optional fifth argument is
4355 an expression for the size of the function. In COFF this symbol
4356 gets an aux entry like that used for a csect. */
4357
4358 static void
4359 ppc_function (int ignore ATTRIBUTE_UNUSED)
4360 {
4361 char *name;
4362 char endc;
4363 char *s;
4364 symbolS *ext_sym;
4365 symbolS *lab_sym;
4366
4367 name = input_line_pointer;
4368 endc = get_symbol_end ();
4369
4370 /* Ignore any [PR] suffix. */
4371 name = ppc_canonicalize_symbol_name (name);
4372 s = strchr (name, '[');
4373 if (s != (char *) NULL
4374 && strcmp (s + 1, "PR]") == 0)
4375 *s = '\0';
4376
4377 ext_sym = symbol_find_or_make (name);
4378
4379 *input_line_pointer = endc;
4380
4381 if (*input_line_pointer != ',')
4382 {
4383 as_bad (_("missing symbol name"));
4384 ignore_rest_of_line ();
4385 return;
4386 }
4387 ++input_line_pointer;
4388
4389 name = input_line_pointer;
4390 endc = get_symbol_end ();
4391
4392 lab_sym = symbol_find_or_make (name);
4393
4394 *input_line_pointer = endc;
4395
4396 if (ext_sym != lab_sym)
4397 {
4398 expressionS exp;
4399
4400 exp.X_op = O_symbol;
4401 exp.X_add_symbol = lab_sym;
4402 exp.X_op_symbol = NULL;
4403 exp.X_add_number = 0;
4404 exp.X_unsigned = 0;
4405 symbol_set_value_expression (ext_sym, &exp);
4406 }
4407
4408 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4409 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
4410 symbol_get_tc (ext_sym)->output = 1;
4411
4412 if (*input_line_pointer == ',')
4413 {
4414 expressionS exp;
4415
4416 /* Ignore the third argument. */
4417 ++input_line_pointer;
4418 expression (& exp);
4419 if (*input_line_pointer == ',')
4420 {
4421 /* Ignore the fourth argument. */
4422 ++input_line_pointer;
4423 expression (& exp);
4424 if (*input_line_pointer == ',')
4425 {
4426 /* The fifth argument is the function size. */
4427 ++input_line_pointer;
4428 symbol_get_tc (ext_sym)->u.size = symbol_new
4429 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4430 pseudo_set (symbol_get_tc (ext_sym)->u.size);
4431 }
4432 }
4433 }
4434
4435 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4436 SF_SET_FUNCTION (ext_sym);
4437 SF_SET_PROCESS (ext_sym);
4438 coff_add_linesym (ext_sym);
4439
4440 demand_empty_rest_of_line ();
4441 }
4442
4443 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4444 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4445 with the correct line number */
4446
4447 static symbolS *saved_bi_sym = 0;
4448
4449 static void
4450 ppc_bf (int ignore ATTRIBUTE_UNUSED)
4451 {
4452 symbolS *sym;
4453
4454 sym = symbol_make (".bf");
4455 S_SET_SEGMENT (sym, text_section);
4456 symbol_set_frag (sym, frag_now);
4457 S_SET_VALUE (sym, frag_now_fix ());
4458 S_SET_STORAGE_CLASS (sym, C_FCN);
4459
4460 coff_line_base = get_absolute_expression ();
4461
4462 S_SET_NUMBER_AUXILIARY (sym, 1);
4463 SA_SET_SYM_LNNO (sym, coff_line_base);
4464
4465 /* Line number for bi. */
4466 if (saved_bi_sym)
4467 {
4468 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4469 saved_bi_sym = 0;
4470 }
4471
4472
4473 symbol_get_tc (sym)->output = 1;
4474
4475 ppc_frob_label (sym);
4476
4477 demand_empty_rest_of_line ();
4478 }
4479
4480 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4481 ".ef", except that the line number is absolute, not relative to the
4482 most recent ".bf" symbol. */
4483
4484 static void
4485 ppc_ef (int ignore ATTRIBUTE_UNUSED)
4486 {
4487 symbolS *sym;
4488
4489 sym = symbol_make (".ef");
4490 S_SET_SEGMENT (sym, text_section);
4491 symbol_set_frag (sym, frag_now);
4492 S_SET_VALUE (sym, frag_now_fix ());
4493 S_SET_STORAGE_CLASS (sym, C_FCN);
4494 S_SET_NUMBER_AUXILIARY (sym, 1);
4495 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4496 symbol_get_tc (sym)->output = 1;
4497
4498 ppc_frob_label (sym);
4499
4500 demand_empty_rest_of_line ();
4501 }
4502
4503 /* The .bi and .ei pseudo-ops. These take a string argument and
4504 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4505 the symbol list. The value of .bi will be know when the next .bf
4506 is encountered. */
4507
4508 static void
4509 ppc_biei (int ei)
4510 {
4511 static symbolS *last_biei;
4512
4513 char *name;
4514 int len;
4515 symbolS *sym;
4516 symbolS *look;
4517
4518 name = demand_copy_C_string (&len);
4519
4520 /* The value of these symbols is actually file offset. Here we set
4521 the value to the index into the line number entries. In
4522 ppc_frob_symbols we set the fix_line field, which will cause BFD
4523 to do the right thing. */
4524
4525 sym = symbol_make (name);
4526 /* obj-coff.c currently only handles line numbers correctly in the
4527 .text section. */
4528 S_SET_SEGMENT (sym, text_section);
4529 S_SET_VALUE (sym, coff_n_line_nos);
4530 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4531
4532 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
4533 symbol_get_tc (sym)->output = 1;
4534
4535 /* Save bi. */
4536 if (ei)
4537 saved_bi_sym = 0;
4538 else
4539 saved_bi_sym = sym;
4540
4541 for (look = last_biei ? last_biei : symbol_rootP;
4542 (look != (symbolS *) NULL
4543 && (S_GET_STORAGE_CLASS (look) == C_FILE
4544 || S_GET_STORAGE_CLASS (look) == C_BINCL
4545 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4546 look = symbol_next (look))
4547 ;
4548 if (look != (symbolS *) NULL)
4549 {
4550 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4551 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4552 last_biei = sym;
4553 }
4554
4555 demand_empty_rest_of_line ();
4556 }
4557
4558 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4559 There is one argument, which is a csect symbol. The value of the
4560 .bs symbol is the index of this csect symbol. */
4561
4562 static void
4563 ppc_bs (int ignore ATTRIBUTE_UNUSED)
4564 {
4565 char *name;
4566 char endc;
4567 symbolS *csect;
4568 symbolS *sym;
4569
4570 if (ppc_current_block != NULL)
4571 as_bad (_("nested .bs blocks"));
4572
4573 name = input_line_pointer;
4574 endc = get_symbol_end ();
4575
4576 csect = symbol_find_or_make (name);
4577
4578 *input_line_pointer = endc;
4579
4580 sym = symbol_make (".bs");
4581 S_SET_SEGMENT (sym, now_seg);
4582 S_SET_STORAGE_CLASS (sym, C_BSTAT);
4583 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4584 symbol_get_tc (sym)->output = 1;
4585
4586 symbol_get_tc (sym)->within = csect;
4587
4588 ppc_frob_label (sym);
4589
4590 ppc_current_block = sym;
4591
4592 demand_empty_rest_of_line ();
4593 }
4594
4595 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4596
4597 static void
4598 ppc_es (int ignore ATTRIBUTE_UNUSED)
4599 {
4600 symbolS *sym;
4601
4602 if (ppc_current_block == NULL)
4603 as_bad (_(".es without preceding .bs"));
4604
4605 sym = symbol_make (".es");
4606 S_SET_SEGMENT (sym, now_seg);
4607 S_SET_STORAGE_CLASS (sym, C_ESTAT);
4608 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4609 symbol_get_tc (sym)->output = 1;
4610
4611 ppc_frob_label (sym);
4612
4613 ppc_current_block = NULL;
4614
4615 demand_empty_rest_of_line ();
4616 }
4617
4618 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4619 line number. */
4620
4621 static void
4622 ppc_bb (int ignore ATTRIBUTE_UNUSED)
4623 {
4624 symbolS *sym;
4625
4626 sym = symbol_make (".bb");
4627 S_SET_SEGMENT (sym, text_section);
4628 symbol_set_frag (sym, frag_now);
4629 S_SET_VALUE (sym, frag_now_fix ());
4630 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4631
4632 S_SET_NUMBER_AUXILIARY (sym, 1);
4633 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4634
4635 symbol_get_tc (sym)->output = 1;
4636
4637 SF_SET_PROCESS (sym);
4638
4639 ppc_frob_label (sym);
4640
4641 demand_empty_rest_of_line ();
4642 }
4643
4644 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4645 line number. */
4646
4647 static void
4648 ppc_eb (int ignore ATTRIBUTE_UNUSED)
4649 {
4650 symbolS *sym;
4651
4652 sym = symbol_make (".eb");
4653 S_SET_SEGMENT (sym, text_section);
4654 symbol_set_frag (sym, frag_now);
4655 S_SET_VALUE (sym, frag_now_fix ());
4656 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4657 S_SET_NUMBER_AUXILIARY (sym, 1);
4658 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4659 symbol_get_tc (sym)->output = 1;
4660
4661 SF_SET_PROCESS (sym);
4662
4663 ppc_frob_label (sym);
4664
4665 demand_empty_rest_of_line ();
4666 }
4667
4668 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4669 specified name. */
4670
4671 static void
4672 ppc_bc (int ignore ATTRIBUTE_UNUSED)
4673 {
4674 char *name;
4675 int len;
4676 symbolS *sym;
4677
4678 name = demand_copy_C_string (&len);
4679 sym = symbol_make (name);
4680 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4681 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4682 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4683 S_SET_VALUE (sym, 0);
4684 symbol_get_tc (sym)->output = 1;
4685
4686 ppc_frob_label (sym);
4687
4688 demand_empty_rest_of_line ();
4689 }
4690
4691 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4692
4693 static void
4694 ppc_ec (int ignore ATTRIBUTE_UNUSED)
4695 {
4696 symbolS *sym;
4697
4698 sym = symbol_make (".ec");
4699 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4700 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4701 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4702 S_SET_VALUE (sym, 0);
4703 symbol_get_tc (sym)->output = 1;
4704
4705 ppc_frob_label (sym);
4706
4707 demand_empty_rest_of_line ();
4708 }
4709
4710 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4711
4712 static void
4713 ppc_toc (int ignore ATTRIBUTE_UNUSED)
4714 {
4715 if (ppc_toc_csect != (symbolS *) NULL)
4716 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
4717 else
4718 {
4719 subsegT subseg;
4720 symbolS *sym;
4721 symbolS *list;
4722
4723 subseg = ppc_data_subsegment;
4724 ++ppc_data_subsegment;
4725
4726 subseg_new (segment_name (data_section), subseg);
4727 ppc_toc_frag = frag_now;
4728
4729 sym = symbol_find_or_make ("TOC[TC0]");
4730 symbol_set_frag (sym, frag_now);
4731 S_SET_SEGMENT (sym, data_section);
4732 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4733 symbol_get_tc (sym)->subseg = subseg;
4734 symbol_get_tc (sym)->output = 1;
4735 symbol_get_tc (sym)->within = sym;
4736
4737 ppc_toc_csect = sym;
4738
4739 for (list = ppc_data_csects;
4740 symbol_get_tc (list)->next != (symbolS *) NULL;
4741 list = symbol_get_tc (list)->next)
4742 ;
4743 symbol_get_tc (list)->next = sym;
4744
4745 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4746 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4747 &symbol_lastP);
4748 }
4749
4750 ppc_current_csect = ppc_toc_csect;
4751
4752 demand_empty_rest_of_line ();
4753 }
4754
4755 /* The AIX assembler automatically aligns the operands of a .long or
4756 .short pseudo-op, and we want to be compatible. */
4757
4758 static void
4759 ppc_xcoff_cons (int log_size)
4760 {
4761 frag_align (log_size, 0, 0);
4762 record_alignment (now_seg, log_size);
4763 cons (1 << log_size);
4764 }
4765
4766 static void
4767 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4768 {
4769 expressionS exp;
4770 int byte_count;
4771
4772 (void) expression (&exp);
4773
4774 if (exp.X_op != O_constant)
4775 {
4776 as_bad (_("non-constant byte count"));
4777 return;
4778 }
4779
4780 byte_count = exp.X_add_number;
4781
4782 if (*input_line_pointer != ',')
4783 {
4784 as_bad (_("missing value"));
4785 return;
4786 }
4787
4788 ++input_line_pointer;
4789 cons (byte_count);
4790 }
4791
4792 void
4793 ppc_xcoff_end (void)
4794 {
4795 int i;
4796
4797 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4798 {
4799 struct dw_section *dws = &dw_sections[i];
4800 struct dw_subsection *dwss;
4801
4802 if (dws->anon_subseg)
4803 {
4804 dwss = dws->anon_subseg;
4805 dwss->link = dws->list_subseg;
4806 }
4807 else
4808 dwss = dws->list_subseg;
4809
4810 for (; dwss != NULL; dwss = dwss->link)
4811 if (dwss->end_exp.X_add_symbol != NULL)
4812 {
4813 subseg_set (dws->sect, dwss->subseg);
4814 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4815 }
4816 }
4817 }
4818
4819 #endif /* OBJ_XCOFF */
4820 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4821 \f
4822 /* The .tc pseudo-op. This is used when generating either XCOFF or
4823 ELF. This takes two or more arguments.
4824
4825 When generating XCOFF output, the first argument is the name to
4826 give to this location in the toc; this will be a symbol with class
4827 TC. The rest of the arguments are N-byte values to actually put at
4828 this location in the TOC; often there is just one more argument, a
4829 relocatable symbol reference. The size of the value to store
4830 depends on target word size. A 32-bit target uses 4-byte values, a
4831 64-bit target uses 8-byte values.
4832
4833 When not generating XCOFF output, the arguments are the same, but
4834 the first argument is simply ignored. */
4835
4836 static void
4837 ppc_tc (int ignore ATTRIBUTE_UNUSED)
4838 {
4839 #ifdef OBJ_XCOFF
4840
4841 /* Define the TOC symbol name. */
4842 {
4843 char *name;
4844 char endc;
4845 symbolS *sym;
4846
4847 if (ppc_toc_csect == (symbolS *) NULL
4848 || ppc_toc_csect != ppc_current_csect)
4849 {
4850 as_bad (_(".tc not in .toc section"));
4851 ignore_rest_of_line ();
4852 return;
4853 }
4854
4855 name = input_line_pointer;
4856 endc = get_symbol_end ();
4857
4858 sym = symbol_find_or_make (name);
4859
4860 *input_line_pointer = endc;
4861
4862 if (S_IS_DEFINED (sym))
4863 {
4864 symbolS *label;
4865
4866 label = symbol_get_tc (ppc_current_csect)->within;
4867 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
4868 {
4869 as_bad (_(".tc with no label"));
4870 ignore_rest_of_line ();
4871 return;
4872 }
4873
4874 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
4875 symbol_set_frag (label, symbol_get_frag (sym));
4876 S_SET_VALUE (label, S_GET_VALUE (sym));
4877
4878 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4879 ++input_line_pointer;
4880
4881 return;
4882 }
4883
4884 S_SET_SEGMENT (sym, now_seg);
4885 symbol_set_frag (sym, frag_now);
4886 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4887 symbol_get_tc (sym)->symbol_class = XMC_TC;
4888 symbol_get_tc (sym)->output = 1;
4889
4890 ppc_frob_label (sym);
4891 }
4892
4893 #endif /* OBJ_XCOFF */
4894 #ifdef OBJ_ELF
4895 int align;
4896
4897 /* Skip the TOC symbol name. */
4898 while (is_part_of_name (*input_line_pointer)
4899 || *input_line_pointer == ' '
4900 || *input_line_pointer == '['
4901 || *input_line_pointer == ']'
4902 || *input_line_pointer == '{'
4903 || *input_line_pointer == '}')
4904 ++input_line_pointer;
4905
4906 /* Align to a four/eight byte boundary. */
4907 align = ppc_obj64 ? 3 : 2;
4908 frag_align (align, 0, 0);
4909 record_alignment (now_seg, align);
4910 #endif /* OBJ_ELF */
4911
4912 if (*input_line_pointer != ',')
4913 demand_empty_rest_of_line ();
4914 else
4915 {
4916 ++input_line_pointer;
4917 cons (ppc_obj64 ? 8 : 4);
4918 }
4919 }
4920
4921 /* Pseudo-op .machine. */
4922
4923 static void
4924 ppc_machine (int ignore ATTRIBUTE_UNUSED)
4925 {
4926 char *cpu_string;
4927 #define MAX_HISTORY 100
4928 static ppc_cpu_t *cpu_history;
4929 static int curr_hist;
4930
4931 SKIP_WHITESPACE ();
4932
4933 if (*input_line_pointer == '"')
4934 {
4935 int len;
4936 cpu_string = demand_copy_C_string (&len);
4937 }
4938 else
4939 {
4940 char c;
4941 cpu_string = input_line_pointer;
4942 c = get_symbol_end ();
4943 cpu_string = xstrdup (cpu_string);
4944 *input_line_pointer = c;
4945 }
4946
4947 if (cpu_string != NULL)
4948 {
4949 ppc_cpu_t old_cpu = ppc_cpu;
4950 ppc_cpu_t new_cpu;
4951 char *p;
4952
4953 for (p = cpu_string; *p != 0; p++)
4954 *p = TOLOWER (*p);
4955
4956 if (strcmp (cpu_string, "push") == 0)
4957 {
4958 if (cpu_history == NULL)
4959 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4960
4961 if (curr_hist >= MAX_HISTORY)
4962 as_bad (_(".machine stack overflow"));
4963 else
4964 cpu_history[curr_hist++] = ppc_cpu;
4965 }
4966 else if (strcmp (cpu_string, "pop") == 0)
4967 {
4968 if (curr_hist <= 0)
4969 as_bad (_(".machine stack underflow"));
4970 else
4971 ppc_cpu = cpu_history[--curr_hist];
4972 }
4973 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
4974 ppc_cpu = new_cpu;
4975 else
4976 as_bad (_("invalid machine `%s'"), cpu_string);
4977
4978 if (ppc_cpu != old_cpu)
4979 ppc_setup_opcodes ();
4980 }
4981
4982 demand_empty_rest_of_line ();
4983 }
4984 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
4985 \f
4986 #ifdef TE_PE
4987
4988 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
4989
4990 /* Set the current section. */
4991 static void
4992 ppc_set_current_section (segT new)
4993 {
4994 ppc_previous_section = ppc_current_section;
4995 ppc_current_section = new;
4996 }
4997
4998 /* pseudo-op: .previous
4999 behaviour: toggles the current section with the previous section.
5000 errors: None
5001 warnings: "No previous section" */
5002
5003 static void
5004 ppc_previous (int ignore ATTRIBUTE_UNUSED)
5005 {
5006 if (ppc_previous_section == NULL)
5007 {
5008 as_warn (_("no previous section to return to, ignored."));
5009 return;
5010 }
5011
5012 subseg_set (ppc_previous_section, 0);
5013
5014 ppc_set_current_section (ppc_previous_section);
5015 }
5016
5017 /* pseudo-op: .pdata
5018 behaviour: predefined read only data section
5019 double word aligned
5020 errors: None
5021 warnings: None
5022 initial: .section .pdata "adr3"
5023 a - don't know -- maybe a misprint
5024 d - initialized data
5025 r - readable
5026 3 - double word aligned (that would be 4 byte boundary)
5027
5028 commentary:
5029 Tag index tables (also known as the function table) for exception
5030 handling, debugging, etc. */
5031
5032 static void
5033 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
5034 {
5035 if (pdata_section == 0)
5036 {
5037 pdata_section = subseg_new (".pdata", 0);
5038
5039 bfd_set_section_flags (stdoutput, pdata_section,
5040 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5041 | SEC_READONLY | SEC_DATA ));
5042
5043 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5044 }
5045 else
5046 {
5047 pdata_section = subseg_new (".pdata", 0);
5048 }
5049 ppc_set_current_section (pdata_section);
5050 }
5051
5052 /* pseudo-op: .ydata
5053 behaviour: predefined read only data section
5054 double word aligned
5055 errors: None
5056 warnings: None
5057 initial: .section .ydata "drw3"
5058 a - don't know -- maybe a misprint
5059 d - initialized data
5060 r - readable
5061 3 - double word aligned (that would be 4 byte boundary)
5062 commentary:
5063 Tag tables (also known as the scope table) for exception handling,
5064 debugging, etc. */
5065
5066 static void
5067 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
5068 {
5069 if (ydata_section == 0)
5070 {
5071 ydata_section = subseg_new (".ydata", 0);
5072 bfd_set_section_flags (stdoutput, ydata_section,
5073 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5074 | SEC_READONLY | SEC_DATA ));
5075
5076 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5077 }
5078 else
5079 {
5080 ydata_section = subseg_new (".ydata", 0);
5081 }
5082 ppc_set_current_section (ydata_section);
5083 }
5084
5085 /* pseudo-op: .reldata
5086 behaviour: predefined read write data section
5087 double word aligned (4-byte)
5088 FIXME: relocation is applied to it
5089 FIXME: what's the difference between this and .data?
5090 errors: None
5091 warnings: None
5092 initial: .section .reldata "drw3"
5093 d - initialized data
5094 r - readable
5095 w - writeable
5096 3 - double word aligned (that would be 8 byte boundary)
5097
5098 commentary:
5099 Like .data, but intended to hold data subject to relocation, such as
5100 function descriptors, etc. */
5101
5102 static void
5103 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
5104 {
5105 if (reldata_section == 0)
5106 {
5107 reldata_section = subseg_new (".reldata", 0);
5108
5109 bfd_set_section_flags (stdoutput, reldata_section,
5110 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5111 | SEC_DATA));
5112
5113 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5114 }
5115 else
5116 {
5117 reldata_section = subseg_new (".reldata", 0);
5118 }
5119 ppc_set_current_section (reldata_section);
5120 }
5121
5122 /* pseudo-op: .rdata
5123 behaviour: predefined read only data section
5124 double word aligned
5125 errors: None
5126 warnings: None
5127 initial: .section .rdata "dr3"
5128 d - initialized data
5129 r - readable
5130 3 - double word aligned (that would be 4 byte boundary) */
5131
5132 static void
5133 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
5134 {
5135 if (rdata_section == 0)
5136 {
5137 rdata_section = subseg_new (".rdata", 0);
5138 bfd_set_section_flags (stdoutput, rdata_section,
5139 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5140 | SEC_READONLY | SEC_DATA ));
5141
5142 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5143 }
5144 else
5145 {
5146 rdata_section = subseg_new (".rdata", 0);
5147 }
5148 ppc_set_current_section (rdata_section);
5149 }
5150
5151 /* pseudo-op: .ualong
5152 behaviour: much like .int, with the exception that no alignment is
5153 performed.
5154 FIXME: test the alignment statement
5155 errors: None
5156 warnings: None */
5157
5158 static void
5159 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
5160 {
5161 /* Try for long. */
5162 cons (4);
5163 }
5164
5165 /* pseudo-op: .znop <symbol name>
5166 behaviour: Issue a nop instruction
5167 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5168 the supplied symbol name.
5169 errors: None
5170 warnings: Missing symbol name */
5171
5172 static void
5173 ppc_znop (int ignore ATTRIBUTE_UNUSED)
5174 {
5175 unsigned long insn;
5176 const struct powerpc_opcode *opcode;
5177 char *f;
5178 symbolS *sym;
5179 char *symbol_name;
5180 char c;
5181 char *name;
5182
5183 /* Strip out the symbol name. */
5184 symbol_name = input_line_pointer;
5185 c = get_symbol_end ();
5186
5187 name = xmalloc (input_line_pointer - symbol_name + 1);
5188 strcpy (name, symbol_name);
5189
5190 sym = symbol_find_or_make (name);
5191
5192 *input_line_pointer = c;
5193
5194 SKIP_WHITESPACE ();
5195
5196 /* Look up the opcode in the hash table. */
5197 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5198
5199 /* Stick in the nop. */
5200 insn = opcode->opcode;
5201
5202 /* Write out the instruction. */
5203 f = frag_more (4);
5204 md_number_to_chars (f, insn, 4);
5205 fix_new (frag_now,
5206 f - frag_now->fr_literal,
5207 4,
5208 sym,
5209 0,
5210 0,
5211 BFD_RELOC_16_GOT_PCREL);
5212
5213 }
5214
5215 /* pseudo-op:
5216 behaviour:
5217 errors:
5218 warnings: */
5219
5220 static void
5221 ppc_pe_comm (int lcomm)
5222 {
5223 char *name;
5224 char c;
5225 char *p;
5226 offsetT temp;
5227 symbolS *symbolP;
5228 offsetT align;
5229
5230 name = input_line_pointer;
5231 c = get_symbol_end ();
5232
5233 /* just after name is now '\0'. */
5234 p = input_line_pointer;
5235 *p = c;
5236 SKIP_WHITESPACE ();
5237 if (*input_line_pointer != ',')
5238 {
5239 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5240 ignore_rest_of_line ();
5241 return;
5242 }
5243
5244 input_line_pointer++; /* skip ',' */
5245 if ((temp = get_absolute_expression ()) < 0)
5246 {
5247 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5248 ignore_rest_of_line ();
5249 return;
5250 }
5251
5252 if (! lcomm)
5253 {
5254 /* The third argument to .comm is the alignment. */
5255 if (*input_line_pointer != ',')
5256 align = 3;
5257 else
5258 {
5259 ++input_line_pointer;
5260 align = get_absolute_expression ();
5261 if (align <= 0)
5262 {
5263 as_warn (_("ignoring bad alignment"));
5264 align = 3;
5265 }
5266 }
5267 }
5268
5269 *p = 0;
5270 symbolP = symbol_find_or_make (name);
5271
5272 *p = c;
5273 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5274 {
5275 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5276 S_GET_NAME (symbolP));
5277 ignore_rest_of_line ();
5278 return;
5279 }
5280
5281 if (S_GET_VALUE (symbolP))
5282 {
5283 if (S_GET_VALUE (symbolP) != (valueT) temp)
5284 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5285 S_GET_NAME (symbolP),
5286 (long) S_GET_VALUE (symbolP),
5287 (long) temp);
5288 }
5289 else
5290 {
5291 S_SET_VALUE (symbolP, (valueT) temp);
5292 S_SET_EXTERNAL (symbolP);
5293 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
5294 }
5295
5296 demand_empty_rest_of_line ();
5297 }
5298
5299 /*
5300 * implement the .section pseudo op:
5301 * .section name {, "flags"}
5302 * ^ ^
5303 * | +--- optional flags: 'b' for bss
5304 * | 'i' for info
5305 * +-- section name 'l' for lib
5306 * 'n' for noload
5307 * 'o' for over
5308 * 'w' for data
5309 * 'd' (apparently m88k for data)
5310 * 'x' for text
5311 * But if the argument is not a quoted string, treat it as a
5312 * subsegment number.
5313 *
5314 * FIXME: this is a copy of the section processing from obj-coff.c, with
5315 * additions/changes for the moto-pas assembler support. There are three
5316 * categories:
5317 *
5318 * FIXME: I just noticed this. This doesn't work at all really. It it
5319 * setting bits that bfd probably neither understands or uses. The
5320 * correct approach (?) will have to incorporate extra fields attached
5321 * to the section to hold the system specific stuff. (krk)
5322 *
5323 * Section Contents:
5324 * 'a' - unknown - referred to in documentation, but no definition supplied
5325 * 'c' - section has code
5326 * 'd' - section has initialized data
5327 * 'u' - section has uninitialized data
5328 * 'i' - section contains directives (info)
5329 * 'n' - section can be discarded
5330 * 'R' - remove section at link time
5331 *
5332 * Section Protection:
5333 * 'r' - section is readable
5334 * 'w' - section is writeable
5335 * 'x' - section is executable
5336 * 's' - section is sharable
5337 *
5338 * Section Alignment:
5339 * '0' - align to byte boundary
5340 * '1' - align to halfword undary
5341 * '2' - align to word boundary
5342 * '3' - align to doubleword boundary
5343 * '4' - align to quadword boundary
5344 * '5' - align to 32 byte boundary
5345 * '6' - align to 64 byte boundary
5346 *
5347 */
5348
5349 void
5350 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
5351 {
5352 /* Strip out the section name. */
5353 char *section_name;
5354 char c;
5355 char *name;
5356 unsigned int exp;
5357 flagword flags;
5358 segT sec;
5359 int align;
5360
5361 section_name = input_line_pointer;
5362 c = get_symbol_end ();
5363
5364 name = xmalloc (input_line_pointer - section_name + 1);
5365 strcpy (name, section_name);
5366
5367 *input_line_pointer = c;
5368
5369 SKIP_WHITESPACE ();
5370
5371 exp = 0;
5372 flags = SEC_NO_FLAGS;
5373
5374 if (strcmp (name, ".idata$2") == 0)
5375 {
5376 align = 0;
5377 }
5378 else if (strcmp (name, ".idata$3") == 0)
5379 {
5380 align = 0;
5381 }
5382 else if (strcmp (name, ".idata$4") == 0)
5383 {
5384 align = 2;
5385 }
5386 else if (strcmp (name, ".idata$5") == 0)
5387 {
5388 align = 2;
5389 }
5390 else if (strcmp (name, ".idata$6") == 0)
5391 {
5392 align = 1;
5393 }
5394 else
5395 /* Default alignment to 16 byte boundary. */
5396 align = 4;
5397
5398 if (*input_line_pointer == ',')
5399 {
5400 ++input_line_pointer;
5401 SKIP_WHITESPACE ();
5402 if (*input_line_pointer != '"')
5403 exp = get_absolute_expression ();
5404 else
5405 {
5406 ++input_line_pointer;
5407 while (*input_line_pointer != '"'
5408 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5409 {
5410 switch (*input_line_pointer)
5411 {
5412 /* Section Contents */
5413 case 'a': /* unknown */
5414 as_bad (_("unsupported section attribute -- 'a'"));
5415 break;
5416 case 'c': /* code section */
5417 flags |= SEC_CODE;
5418 break;
5419 case 'd': /* section has initialized data */
5420 flags |= SEC_DATA;
5421 break;
5422 case 'u': /* section has uninitialized data */
5423 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5424 in winnt.h */
5425 flags |= SEC_ROM;
5426 break;
5427 case 'i': /* section contains directives (info) */
5428 /* FIXME: This is IMAGE_SCN_LNK_INFO
5429 in winnt.h */
5430 flags |= SEC_HAS_CONTENTS;
5431 break;
5432 case 'n': /* section can be discarded */
5433 flags &=~ SEC_LOAD;
5434 break;
5435 case 'R': /* Remove section at link time */
5436 flags |= SEC_NEVER_LOAD;
5437 break;
5438 #if IFLICT_BRAIN_DAMAGE
5439 /* Section Protection */
5440 case 'r': /* section is readable */
5441 flags |= IMAGE_SCN_MEM_READ;
5442 break;
5443 case 'w': /* section is writeable */
5444 flags |= IMAGE_SCN_MEM_WRITE;
5445 break;
5446 case 'x': /* section is executable */
5447 flags |= IMAGE_SCN_MEM_EXECUTE;
5448 break;
5449 case 's': /* section is sharable */
5450 flags |= IMAGE_SCN_MEM_SHARED;
5451 break;
5452
5453 /* Section Alignment */
5454 case '0': /* align to byte boundary */
5455 flags |= IMAGE_SCN_ALIGN_1BYTES;
5456 align = 0;
5457 break;
5458 case '1': /* align to halfword boundary */
5459 flags |= IMAGE_SCN_ALIGN_2BYTES;
5460 align = 1;
5461 break;
5462 case '2': /* align to word boundary */
5463 flags |= IMAGE_SCN_ALIGN_4BYTES;
5464 align = 2;
5465 break;
5466 case '3': /* align to doubleword boundary */
5467 flags |= IMAGE_SCN_ALIGN_8BYTES;
5468 align = 3;
5469 break;
5470 case '4': /* align to quadword boundary */
5471 flags |= IMAGE_SCN_ALIGN_16BYTES;
5472 align = 4;
5473 break;
5474 case '5': /* align to 32 byte boundary */
5475 flags |= IMAGE_SCN_ALIGN_32BYTES;
5476 align = 5;
5477 break;
5478 case '6': /* align to 64 byte boundary */
5479 flags |= IMAGE_SCN_ALIGN_64BYTES;
5480 align = 6;
5481 break;
5482 #endif
5483 default:
5484 as_bad (_("unknown section attribute '%c'"),
5485 *input_line_pointer);
5486 break;
5487 }
5488 ++input_line_pointer;
5489 }
5490 if (*input_line_pointer == '"')
5491 ++input_line_pointer;
5492 }
5493 }
5494
5495 sec = subseg_new (name, (subsegT) exp);
5496
5497 ppc_set_current_section (sec);
5498
5499 if (flags != SEC_NO_FLAGS)
5500 {
5501 if (! bfd_set_section_flags (stdoutput, sec, flags))
5502 as_bad (_("error setting flags for \"%s\": %s"),
5503 bfd_section_name (stdoutput, sec),
5504 bfd_errmsg (bfd_get_error ()));
5505 }
5506
5507 bfd_set_section_alignment (stdoutput, sec, align);
5508 }
5509
5510 static void
5511 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
5512 {
5513 char *name;
5514 char endc;
5515 symbolS *ext_sym;
5516
5517 name = input_line_pointer;
5518 endc = get_symbol_end ();
5519
5520 ext_sym = symbol_find_or_make (name);
5521
5522 *input_line_pointer = endc;
5523
5524 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5525 SF_SET_FUNCTION (ext_sym);
5526 SF_SET_PROCESS (ext_sym);
5527 coff_add_linesym (ext_sym);
5528
5529 demand_empty_rest_of_line ();
5530 }
5531
5532 static void
5533 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
5534 {
5535 if (tocdata_section == 0)
5536 {
5537 tocdata_section = subseg_new (".tocd", 0);
5538 /* FIXME: section flags won't work. */
5539 bfd_set_section_flags (stdoutput, tocdata_section,
5540 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5541 | SEC_READONLY | SEC_DATA));
5542
5543 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5544 }
5545 else
5546 {
5547 rdata_section = subseg_new (".tocd", 0);
5548 }
5549
5550 ppc_set_current_section (tocdata_section);
5551
5552 demand_empty_rest_of_line ();
5553 }
5554
5555 /* Don't adjust TOC relocs to use the section symbol. */
5556
5557 int
5558 ppc_pe_fix_adjustable (fixS *fix)
5559 {
5560 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5561 }
5562
5563 #endif
5564 \f
5565 #ifdef OBJ_XCOFF
5566
5567 /* XCOFF specific symbol and file handling. */
5568
5569 /* Canonicalize the symbol name. We use the to force the suffix, if
5570 any, to use square brackets, and to be in upper case. */
5571
5572 char *
5573 ppc_canonicalize_symbol_name (char *name)
5574 {
5575 char *s;
5576
5577 if (ppc_stab_symbol)
5578 return name;
5579
5580 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5581 ;
5582 if (*s != '\0')
5583 {
5584 char brac;
5585
5586 if (*s == '[')
5587 brac = ']';
5588 else
5589 {
5590 *s = '[';
5591 brac = '}';
5592 }
5593
5594 for (s++; *s != '\0' && *s != brac; s++)
5595 *s = TOUPPER (*s);
5596
5597 if (*s == '\0' || s[1] != '\0')
5598 as_bad (_("bad symbol suffix"));
5599
5600 *s = ']';
5601 }
5602
5603 return name;
5604 }
5605
5606 /* Set the class of a symbol based on the suffix, if any. This is
5607 called whenever a new symbol is created. */
5608
5609 void
5610 ppc_symbol_new_hook (symbolS *sym)
5611 {
5612 struct ppc_tc_sy *tc;
5613 const char *s;
5614
5615 tc = symbol_get_tc (sym);
5616 tc->next = NULL;
5617 tc->output = 0;
5618 tc->symbol_class = -1;
5619 tc->real_name = NULL;
5620 tc->subseg = 0;
5621 tc->align = 0;
5622 tc->u.size = NULL;
5623 tc->u.dw = NULL;
5624 tc->within = NULL;
5625
5626 if (ppc_stab_symbol)
5627 return;
5628
5629 s = strchr (S_GET_NAME (sym), '[');
5630 if (s == (const char *) NULL)
5631 {
5632 /* There is no suffix. */
5633 return;
5634 }
5635
5636 ++s;
5637
5638 switch (s[0])
5639 {
5640 case 'B':
5641 if (strcmp (s, "BS]") == 0)
5642 tc->symbol_class = XMC_BS;
5643 break;
5644 case 'D':
5645 if (strcmp (s, "DB]") == 0)
5646 tc->symbol_class = XMC_DB;
5647 else if (strcmp (s, "DS]") == 0)
5648 tc->symbol_class = XMC_DS;
5649 break;
5650 case 'G':
5651 if (strcmp (s, "GL]") == 0)
5652 tc->symbol_class = XMC_GL;
5653 break;
5654 case 'P':
5655 if (strcmp (s, "PR]") == 0)
5656 tc->symbol_class = XMC_PR;
5657 break;
5658 case 'R':
5659 if (strcmp (s, "RO]") == 0)
5660 tc->symbol_class = XMC_RO;
5661 else if (strcmp (s, "RW]") == 0)
5662 tc->symbol_class = XMC_RW;
5663 break;
5664 case 'S':
5665 if (strcmp (s, "SV]") == 0)
5666 tc->symbol_class = XMC_SV;
5667 break;
5668 case 'T':
5669 if (strcmp (s, "TC]") == 0)
5670 tc->symbol_class = XMC_TC;
5671 else if (strcmp (s, "TI]") == 0)
5672 tc->symbol_class = XMC_TI;
5673 else if (strcmp (s, "TB]") == 0)
5674 tc->symbol_class = XMC_TB;
5675 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
5676 tc->symbol_class = XMC_TC0;
5677 break;
5678 case 'U':
5679 if (strcmp (s, "UA]") == 0)
5680 tc->symbol_class = XMC_UA;
5681 else if (strcmp (s, "UC]") == 0)
5682 tc->symbol_class = XMC_UC;
5683 break;
5684 case 'X':
5685 if (strcmp (s, "XO]") == 0)
5686 tc->symbol_class = XMC_XO;
5687 break;
5688 }
5689
5690 if (tc->symbol_class == -1)
5691 as_bad (_("unrecognized symbol suffix"));
5692 }
5693
5694 /* Set the class of a label based on where it is defined. This
5695 handles symbols without suffixes. Also, move the symbol so that it
5696 follows the csect symbol. */
5697
5698 void
5699 ppc_frob_label (symbolS *sym)
5700 {
5701 if (ppc_current_csect != (symbolS *) NULL)
5702 {
5703 if (symbol_get_tc (sym)->symbol_class == -1)
5704 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
5705
5706 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
5707 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5708 &symbol_rootP, &symbol_lastP);
5709 symbol_get_tc (ppc_current_csect)->within = sym;
5710 symbol_get_tc (sym)->within = ppc_current_csect;
5711 }
5712
5713 #ifdef OBJ_ELF
5714 dwarf2_emit_label (sym);
5715 #endif
5716 }
5717
5718 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5719 seen. It tells ppc_adjust_symtab whether it needs to look through
5720 the symbols. */
5721
5722 static bfd_boolean ppc_saw_abs;
5723
5724 /* Change the name of a symbol just before writing it out. Set the
5725 real name if the .rename pseudo-op was used. Otherwise, remove any
5726 class suffix. Return 1 if the symbol should not be included in the
5727 symbol table. */
5728
5729 int
5730 ppc_frob_symbol (symbolS *sym)
5731 {
5732 static symbolS *ppc_last_function;
5733 static symbolS *set_end;
5734
5735 /* Discard symbols that should not be included in the output symbol
5736 table. */
5737 if (! symbol_used_in_reloc_p (sym)
5738 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
5739 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5740 && ! symbol_get_tc (sym)->output
5741 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5742 return 1;
5743
5744 /* This one will disappear anyway. Don't make a csect sym for it. */
5745 if (sym == abs_section_sym)
5746 return 1;
5747
5748 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5749 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
5750 else
5751 {
5752 const char *name;
5753 const char *s;
5754
5755 name = S_GET_NAME (sym);
5756 s = strchr (name, '[');
5757 if (s != (char *) NULL)
5758 {
5759 unsigned int len;
5760 char *snew;
5761
5762 len = s - name;
5763 snew = xmalloc (len + 1);
5764 memcpy (snew, name, len);
5765 snew[len] = '\0';
5766
5767 S_SET_NAME (sym, snew);
5768 }
5769 }
5770
5771 if (set_end != (symbolS *) NULL)
5772 {
5773 SA_SET_SYM_ENDNDX (set_end, sym);
5774 set_end = NULL;
5775 }
5776
5777 if (SF_GET_FUNCTION (sym))
5778 {
5779 if (ppc_last_function != (symbolS *) NULL)
5780 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5781 ppc_last_function = sym;
5782 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
5783 {
5784 resolve_symbol_value (symbol_get_tc (sym)->u.size);
5785 SA_SET_SYM_FSIZE (sym,
5786 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
5787 }
5788 }
5789 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5790 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5791 {
5792 if (ppc_last_function == (symbolS *) NULL)
5793 as_bad (_(".ef with no preceding .function"));
5794 else
5795 {
5796 set_end = ppc_last_function;
5797 ppc_last_function = NULL;
5798
5799 /* We don't have a C_EFCN symbol, but we need to force the
5800 COFF backend to believe that it has seen one. */
5801 coff_last_function = NULL;
5802 }
5803 }
5804
5805 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5806 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5807 && S_GET_STORAGE_CLASS (sym) != C_FILE
5808 && S_GET_STORAGE_CLASS (sym) != C_FCN
5809 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5810 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5811 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5812 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5813 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5814 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5815 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5816
5817 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5818 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
5819 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5820 {
5821 int i;
5822 union internal_auxent *a;
5823
5824 /* Create a csect aux. */
5825 i = S_GET_NUMBER_AUXILIARY (sym);
5826 S_SET_NUMBER_AUXILIARY (sym, i + 1);
5827 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5828 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
5829 {
5830 /* This is the TOC table. */
5831 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5832 a->x_csect.x_scnlen.l = 0;
5833 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5834 }
5835 else if (symbol_get_tc (sym)->subseg != 0)
5836 {
5837 /* This is a csect symbol. x_scnlen is the size of the
5838 csect. */
5839 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5840 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5841 S_GET_SEGMENT (sym))
5842 - S_GET_VALUE (sym));
5843 else
5844 {
5845 resolve_symbol_value (symbol_get_tc (sym)->next);
5846 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5847 - S_GET_VALUE (sym));
5848 }
5849 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5850 }
5851 else if (S_GET_SEGMENT (sym) == bss_section)
5852 {
5853 /* This is a common symbol. */
5854 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5855 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
5856 if (S_IS_EXTERNAL (sym))
5857 symbol_get_tc (sym)->symbol_class = XMC_RW;
5858 else
5859 symbol_get_tc (sym)->symbol_class = XMC_BS;
5860 }
5861 else if (S_GET_SEGMENT (sym) == absolute_section)
5862 {
5863 /* This is an absolute symbol. The csect will be created by
5864 ppc_adjust_symtab. */
5865 ppc_saw_abs = TRUE;
5866 a->x_csect.x_smtyp = XTY_LD;
5867 if (symbol_get_tc (sym)->symbol_class == -1)
5868 symbol_get_tc (sym)->symbol_class = XMC_XO;
5869 }
5870 else if (! S_IS_DEFINED (sym))
5871 {
5872 /* This is an external symbol. */
5873 a->x_csect.x_scnlen.l = 0;
5874 a->x_csect.x_smtyp = XTY_ER;
5875 }
5876 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
5877 {
5878 symbolS *next;
5879
5880 /* This is a TOC definition. x_scnlen is the size of the
5881 TOC entry. */
5882 next = symbol_next (sym);
5883 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
5884 next = symbol_next (next);
5885 if (next == (symbolS *) NULL
5886 || symbol_get_tc (next)->symbol_class != XMC_TC)
5887 {
5888 if (ppc_after_toc_frag == (fragS *) NULL)
5889 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5890 data_section)
5891 - S_GET_VALUE (sym));
5892 else
5893 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5894 - S_GET_VALUE (sym));
5895 }
5896 else
5897 {
5898 resolve_symbol_value (next);
5899 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5900 - S_GET_VALUE (sym));
5901 }
5902 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5903 }
5904 else
5905 {
5906 symbolS *csect;
5907
5908 /* This is a normal symbol definition. x_scnlen is the
5909 symbol index of the containing csect. */
5910 if (S_GET_SEGMENT (sym) == text_section)
5911 csect = ppc_text_csects;
5912 else if (S_GET_SEGMENT (sym) == data_section)
5913 csect = ppc_data_csects;
5914 else
5915 abort ();
5916
5917 /* Skip the initial dummy symbol. */
5918 csect = symbol_get_tc (csect)->next;
5919
5920 if (csect == (symbolS *) NULL)
5921 {
5922 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5923 a->x_csect.x_scnlen.l = 0;
5924 }
5925 else
5926 {
5927 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
5928 {
5929 resolve_symbol_value (symbol_get_tc (csect)->next);
5930 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5931 > S_GET_VALUE (sym))
5932 break;
5933 csect = symbol_get_tc (csect)->next;
5934 }
5935
5936 a->x_csect.x_scnlen.p =
5937 coffsymbol (symbol_get_bfdsym (csect))->native;
5938 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5939 1;
5940 }
5941 a->x_csect.x_smtyp = XTY_LD;
5942 }
5943
5944 a->x_csect.x_parmhash = 0;
5945 a->x_csect.x_snhash = 0;
5946 if (symbol_get_tc (sym)->symbol_class == -1)
5947 a->x_csect.x_smclas = XMC_PR;
5948 else
5949 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
5950 a->x_csect.x_stab = 0;
5951 a->x_csect.x_snstab = 0;
5952
5953 /* Don't let the COFF backend resort these symbols. */
5954 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
5955 }
5956 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5957 {
5958 /* We want the value to be the symbol index of the referenced
5959 csect symbol. BFD will do that for us if we set the right
5960 flags. */
5961 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5962 combined_entry_type *c = coffsymbol (bsym)->native;
5963
5964 S_SET_VALUE (sym, (valueT) (size_t) c);
5965 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
5966 }
5967 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5968 {
5969 symbolS *block;
5970 valueT base;
5971
5972 block = symbol_get_tc (sym)->within;
5973 if (block)
5974 {
5975 /* The value is the offset from the enclosing csect. */
5976 symbolS *csect;
5977
5978 csect = symbol_get_tc (block)->within;
5979 resolve_symbol_value (csect);
5980 base = S_GET_VALUE (csect);
5981 }
5982 else
5983 base = 0;
5984
5985 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
5986 }
5987 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5988 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5989 {
5990 /* We want the value to be a file offset into the line numbers.
5991 BFD will do that for us if we set the right flags. We have
5992 already set the value correctly. */
5993 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
5994 }
5995
5996 return 0;
5997 }
5998
5999 /* Adjust the symbol table. This creates csect symbols for all
6000 absolute symbols. */
6001
6002 void
6003 ppc_adjust_symtab (void)
6004 {
6005 symbolS *sym;
6006
6007 if (! ppc_saw_abs)
6008 return;
6009
6010 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6011 {
6012 symbolS *csect;
6013 int i;
6014 union internal_auxent *a;
6015
6016 if (S_GET_SEGMENT (sym) != absolute_section)
6017 continue;
6018
6019 csect = symbol_create (".abs[XO]", absolute_section,
6020 S_GET_VALUE (sym), &zero_address_frag);
6021 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
6022 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6023 i = S_GET_NUMBER_AUXILIARY (csect);
6024 S_SET_NUMBER_AUXILIARY (csect, i + 1);
6025 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
6026 a->x_csect.x_scnlen.l = 0;
6027 a->x_csect.x_smtyp = XTY_SD;
6028 a->x_csect.x_parmhash = 0;
6029 a->x_csect.x_snhash = 0;
6030 a->x_csect.x_smclas = XMC_XO;
6031 a->x_csect.x_stab = 0;
6032 a->x_csect.x_snstab = 0;
6033
6034 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6035
6036 i = S_GET_NUMBER_AUXILIARY (sym);
6037 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6038 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6039 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
6040 }
6041
6042 ppc_saw_abs = FALSE;
6043 }
6044
6045 /* Set the VMA for a section. This is called on all the sections in
6046 turn. */
6047
6048 void
6049 ppc_frob_section (asection *sec)
6050 {
6051 static bfd_vma vma = 0;
6052
6053 /* Dwarf sections start at 0. */
6054 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6055 return;
6056
6057 vma = md_section_align (sec, vma);
6058 bfd_set_section_vma (stdoutput, sec, vma);
6059 vma += bfd_section_size (stdoutput, sec);
6060 }
6061
6062 #endif /* OBJ_XCOFF */
6063 \f
6064 char *
6065 md_atof (int type, char *litp, int *sizep)
6066 {
6067 return ieee_md_atof (type, litp, sizep, target_big_endian);
6068 }
6069
6070 /* Write a value out to the object file, using the appropriate
6071 endianness. */
6072
6073 void
6074 md_number_to_chars (char *buf, valueT val, int n)
6075 {
6076 if (target_big_endian)
6077 number_to_chars_bigendian (buf, val, n);
6078 else
6079 number_to_chars_littleendian (buf, val, n);
6080 }
6081
6082 /* Align a section (I don't know why this is machine dependent). */
6083
6084 valueT
6085 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
6086 {
6087 #ifdef OBJ_ELF
6088 return addr;
6089 #else
6090 int align = bfd_get_section_alignment (stdoutput, seg);
6091
6092 return ((addr + (1 << align) - 1) & (-1 << align));
6093 #endif
6094 }
6095
6096 /* We don't have any form of relaxing. */
6097
6098 int
6099 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6100 asection *seg ATTRIBUTE_UNUSED)
6101 {
6102 abort ();
6103 return 0;
6104 }
6105
6106 /* Convert a machine dependent frag. We never generate these. */
6107
6108 void
6109 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6110 asection *sec ATTRIBUTE_UNUSED,
6111 fragS *fragp ATTRIBUTE_UNUSED)
6112 {
6113 abort ();
6114 }
6115
6116 /* We have no need to default values of symbols. */
6117
6118 symbolS *
6119 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
6120 {
6121 return 0;
6122 }
6123 \f
6124 /* Functions concerning relocs. */
6125
6126 /* The location from which a PC relative jump should be calculated,
6127 given a PC relative reloc. */
6128
6129 long
6130 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
6131 {
6132 return fixp->fx_frag->fr_address + fixp->fx_where;
6133 }
6134
6135 #ifdef OBJ_XCOFF
6136
6137 /* This is called to see whether a fixup should be adjusted to use a
6138 section symbol. We take the opportunity to change a fixup against
6139 a symbol in the TOC subsegment into a reloc against the
6140 corresponding .tc symbol. */
6141
6142 int
6143 ppc_fix_adjustable (fixS *fix)
6144 {
6145 valueT val = resolve_symbol_value (fix->fx_addsy);
6146 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6147 TC_SYMFIELD_TYPE *tc;
6148
6149 if (symseg == absolute_section)
6150 return 0;
6151
6152 /* Always adjust symbols in debugging sections. */
6153 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6154 return 1;
6155
6156 if (ppc_toc_csect != (symbolS *) NULL
6157 && fix->fx_addsy != ppc_toc_csect
6158 && symseg == data_section
6159 && val >= ppc_toc_frag->fr_address
6160 && (ppc_after_toc_frag == (fragS *) NULL
6161 || val < ppc_after_toc_frag->fr_address))
6162 {
6163 symbolS *sy;
6164
6165 for (sy = symbol_next (ppc_toc_csect);
6166 sy != (symbolS *) NULL;
6167 sy = symbol_next (sy))
6168 {
6169 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6170
6171 if (sy_tc->symbol_class == XMC_TC0)
6172 continue;
6173 if (sy_tc->symbol_class != XMC_TC)
6174 break;
6175 if (val == resolve_symbol_value (sy))
6176 {
6177 fix->fx_addsy = sy;
6178 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6179 return 0;
6180 }
6181 }
6182
6183 as_bad_where (fix->fx_file, fix->fx_line,
6184 _("symbol in .toc does not match any .tc"));
6185 }
6186
6187 /* Possibly adjust the reloc to be against the csect. */
6188 tc = symbol_get_tc (fix->fx_addsy);
6189 if (tc->subseg == 0
6190 && tc->symbol_class != XMC_TC0
6191 && tc->symbol_class != XMC_TC
6192 && symseg != bss_section
6193 /* Don't adjust if this is a reloc in the toc section. */
6194 && (symseg != data_section
6195 || ppc_toc_csect == NULL
6196 || val < ppc_toc_frag->fr_address
6197 || (ppc_after_toc_frag != NULL
6198 && val >= ppc_after_toc_frag->fr_address)))
6199 {
6200 symbolS *csect = tc->within;
6201
6202 /* If the symbol was not declared by a label (eg: a section symbol),
6203 use the section instead of the csect. This doesn't happen in
6204 normal AIX assembly code. */
6205 if (csect == NULL)
6206 csect = seg_info (symseg)->sym;
6207
6208 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6209 fix->fx_addsy = csect;
6210
6211 return 0;
6212 }
6213
6214 /* Adjust a reloc against a .lcomm symbol to be against the base
6215 .lcomm. */
6216 if (symseg == bss_section
6217 && ! S_IS_EXTERNAL (fix->fx_addsy))
6218 {
6219 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6220
6221 fix->fx_offset += val - resolve_symbol_value (sy);
6222 fix->fx_addsy = sy;
6223 }
6224
6225 return 0;
6226 }
6227
6228 /* A reloc from one csect to another must be kept. The assembler
6229 will, of course, keep relocs between sections, and it will keep
6230 absolute relocs, but we need to force it to keep PC relative relocs
6231 between two csects in the same section. */
6232
6233 int
6234 ppc_force_relocation (fixS *fix)
6235 {
6236 /* At this point fix->fx_addsy should already have been converted to
6237 a csect symbol. If the csect does not include the fragment, then
6238 we need to force the relocation. */
6239 if (fix->fx_pcrel
6240 && fix->fx_addsy != NULL
6241 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6242 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6243 > fix->fx_frag->fr_address)
6244 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6245 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
6246 <= fix->fx_frag->fr_address))))
6247 return 1;
6248
6249 return generic_force_reloc (fix);
6250 }
6251
6252 void
6253 ppc_new_dot_label (symbolS *sym)
6254 {
6255 /* Anchor this label to the current csect for relocations. */
6256 symbol_get_tc (sym)->within = ppc_current_csect;
6257 }
6258
6259 #endif /* OBJ_XCOFF */
6260
6261 #ifdef OBJ_ELF
6262 /* If this function returns non-zero, it guarantees that a relocation
6263 will be emitted for a fixup. */
6264
6265 int
6266 ppc_force_relocation (fixS *fix)
6267 {
6268 /* Branch prediction relocations must force a relocation, as must
6269 the vtable description relocs. */
6270 switch (fix->fx_r_type)
6271 {
6272 case BFD_RELOC_PPC_B16_BRTAKEN:
6273 case BFD_RELOC_PPC_B16_BRNTAKEN:
6274 case BFD_RELOC_PPC_BA16_BRTAKEN:
6275 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6276 case BFD_RELOC_24_PLT_PCREL:
6277 case BFD_RELOC_PPC64_TOC:
6278 return 1;
6279 case BFD_RELOC_PPC_B26:
6280 case BFD_RELOC_PPC_BA26:
6281 case BFD_RELOC_PPC_B16:
6282 case BFD_RELOC_PPC_BA16:
6283 /* All branch fixups targeting a localentry symbol must
6284 force a relocation. */
6285 if (fix->fx_addsy)
6286 {
6287 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6288 elf_symbol_type *elfsym
6289 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6290 gas_assert (elfsym);
6291 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6292 return 1;
6293 }
6294 break;
6295 default:
6296 break;
6297 }
6298
6299 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6300 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6301 return 1;
6302
6303 return generic_force_reloc (fix);
6304 }
6305
6306 int
6307 ppc_fix_adjustable (fixS *fix)
6308 {
6309 switch (fix->fx_r_type)
6310 {
6311 /* All branch fixups targeting a localentry symbol must
6312 continue using the symbol. */
6313 case BFD_RELOC_PPC_B26:
6314 case BFD_RELOC_PPC_BA26:
6315 case BFD_RELOC_PPC_B16:
6316 case BFD_RELOC_PPC_BA16:
6317 case BFD_RELOC_PPC_B16_BRTAKEN:
6318 case BFD_RELOC_PPC_B16_BRNTAKEN:
6319 case BFD_RELOC_PPC_BA16_BRTAKEN:
6320 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6321 if (fix->fx_addsy)
6322 {
6323 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6324 elf_symbol_type *elfsym
6325 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6326 gas_assert (elfsym);
6327 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6328 return 0;
6329 }
6330 break;
6331 default:
6332 break;
6333 }
6334
6335 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6336 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6337 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6338 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
6339 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6340 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
6341 && fix->fx_r_type != BFD_RELOC_GPREL16
6342 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6343 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
6344 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
6345 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
6346 }
6347 #endif
6348
6349 void
6350 ppc_frag_check (struct frag *fragP)
6351 {
6352 if (!fragP->has_code)
6353 return;
6354
6355 if (ppc_mach() == bfd_mach_ppc_vle)
6356 {
6357 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6358 as_bad (_("instruction address is not a multiple of 2"));
6359 }
6360 else
6361 {
6362 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6363 as_bad (_("instruction address is not a multiple of 4"));
6364 }
6365 }
6366
6367 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6368 rs_align_code frag. */
6369
6370 void
6371 ppc_handle_align (struct frag *fragP)
6372 {
6373 valueT count = (fragP->fr_next->fr_address
6374 - (fragP->fr_address + fragP->fr_fix));
6375
6376 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6377 {
6378 char *dest = fragP->fr_literal + fragP->fr_fix;
6379
6380 fragP->fr_var = 2;
6381 md_number_to_chars (dest, 0x4400, 2);
6382 }
6383 else if (count != 0 && (count & 3) == 0)
6384 {
6385 char *dest = fragP->fr_literal + fragP->fr_fix;
6386
6387 fragP->fr_var = 4;
6388
6389 if (count > 4 * nop_limit && count < 0x2000000)
6390 {
6391 struct frag *rest;
6392
6393 /* Make a branch, then follow with nops. Insert another
6394 frag to handle the nops. */
6395 md_number_to_chars (dest, 0x48000000 + count, 4);
6396 count -= 4;
6397 if (count == 0)
6398 return;
6399
6400 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6401 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6402 fragP->fr_next = rest;
6403 fragP = rest;
6404 rest->fr_address += rest->fr_fix + 4;
6405 rest->fr_fix = 0;
6406 /* If we leave the next frag as rs_align_code we'll come here
6407 again, resulting in a bunch of branches rather than a
6408 branch followed by nops. */
6409 rest->fr_type = rs_align;
6410 dest = rest->fr_literal;
6411 }
6412
6413 md_number_to_chars (dest, 0x60000000, 4);
6414
6415 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
6416 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6417 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
6418 {
6419 /* For power6, power7 and power8, we want the last nop to be a group
6420 terminating one. Do this by inserting an rs_fill frag immediately
6421 after this one, with its address set to the last nop location.
6422 This will automatically reduce the number of nops in the current
6423 frag by one. */
6424 if (count > 4)
6425 {
6426 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6427
6428 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6429 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6430 group_nop->fr_fix = 0;
6431 group_nop->fr_offset = 1;
6432 group_nop->fr_type = rs_fill;
6433 fragP->fr_next = group_nop;
6434 dest = group_nop->fr_literal;
6435 }
6436
6437 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6438 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
6439 {
6440 if (ppc_cpu & PPC_OPCODE_E500MC)
6441 /* e500mc group terminating nop: "ori 0,0,0". */
6442 md_number_to_chars (dest, 0x60000000, 4);
6443 else
6444 /* power7/power8 group terminating nop: "ori 2,2,0". */
6445 md_number_to_chars (dest, 0x60420000, 4);
6446 }
6447 else
6448 /* power6 group terminating nop: "ori 1,1,0". */
6449 md_number_to_chars (dest, 0x60210000, 4);
6450 }
6451 }
6452 }
6453
6454 /* Apply a fixup to the object code. This is called for all the
6455 fixups we generated by the calls to fix_new_exp, above. */
6456
6457 void
6458 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
6459 {
6460 valueT value = * valP;
6461 offsetT fieldval;
6462 const struct powerpc_operand *operand;
6463
6464 #ifdef OBJ_ELF
6465 if (fixP->fx_addsy != NULL)
6466 {
6467 /* Hack around bfd_install_relocation brain damage. */
6468 if (fixP->fx_pcrel)
6469 value += fixP->fx_frag->fr_address + fixP->fx_where;
6470 }
6471 else
6472 fixP->fx_done = 1;
6473 #else
6474 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6475 the symbol values. If we are doing this relocation the code in
6476 write.c is going to call bfd_install_relocation, which is also
6477 going to use the symbol value. That means that if the reloc is
6478 fully resolved we want to use *valP since bfd_install_relocation is
6479 not being used.
6480 However, if the reloc is not fully resolved we do not want to
6481 use *valP, and must use fx_offset instead. If the relocation
6482 is PC-relative, we then need to re-apply md_pcrel_from_section
6483 to this new relocation value. */
6484 if (fixP->fx_addsy == (symbolS *) NULL)
6485 fixP->fx_done = 1;
6486
6487 else
6488 {
6489 value = fixP->fx_offset;
6490 if (fixP->fx_pcrel)
6491 value -= md_pcrel_from_section (fixP, seg);
6492 }
6493 #endif
6494
6495 if (fixP->fx_subsy != (symbolS *) NULL)
6496 {
6497 /* We can't actually support subtracting a symbol. */
6498 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
6499 }
6500
6501 operand = NULL;
6502 if (fixP->fx_pcrel_adjust != 0)
6503 {
6504 /* This is a fixup on an instruction. */
6505 int opindex = fixP->fx_pcrel_adjust & 0xff;
6506
6507 operand = &powerpc_operands[opindex];
6508 #ifdef OBJ_XCOFF
6509 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6510 does not generate a reloc. It uses the offset of `sym' within its
6511 csect. Other usages, such as `.long sym', generate relocs. This
6512 is the documented behaviour of non-TOC symbols. */
6513 if ((operand->flags & PPC_OPERAND_PARENS) != 0
6514 && (operand->bitm & 0xfff0) == 0xfff0
6515 && operand->shift == 0
6516 && (operand->insert == NULL || ppc_obj64)
6517 && fixP->fx_addsy != NULL
6518 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
6519 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6520 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
6521 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
6522 {
6523 value = fixP->fx_offset;
6524 fixP->fx_done = 1;
6525 }
6526
6527 /* During parsing of instructions, a TOC16 reloc is generated for
6528 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6529 in the toc. But at parse time, SYM may be not yet defined, so
6530 check again here. */
6531 if (fixP->fx_r_type == BFD_RELOC_16
6532 && fixP->fx_addsy != NULL
6533 && ppc_is_toc_sym (fixP->fx_addsy))
6534 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
6535 #endif
6536 }
6537
6538 /* Calculate value to be stored in field. */
6539 fieldval = value;
6540 switch (fixP->fx_r_type)
6541 {
6542 #ifdef OBJ_ELF
6543 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6544 case BFD_RELOC_PPC_VLE_LO16A:
6545 case BFD_RELOC_PPC_VLE_LO16D:
6546 #endif
6547 case BFD_RELOC_LO16:
6548 case BFD_RELOC_LO16_PCREL:
6549 fieldval = value & 0xffff;
6550 sign_extend_16:
6551 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6552 fieldval = SEX16 (fieldval);
6553 fixP->fx_no_overflow = 1;
6554 break;
6555
6556 case BFD_RELOC_HI16:
6557 case BFD_RELOC_HI16_PCREL:
6558 #ifdef OBJ_ELF
6559 if (REPORT_OVERFLOW_HI && ppc_obj64)
6560 {
6561 fieldval = value >> 16;
6562 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6563 {
6564 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6565 fieldval = ((valueT) fieldval ^ sign) - sign;
6566 }
6567 break;
6568 }
6569 /* Fall thru */
6570
6571 case BFD_RELOC_PPC_VLE_HI16A:
6572 case BFD_RELOC_PPC_VLE_HI16D:
6573 case BFD_RELOC_PPC64_ADDR16_HIGH:
6574 #endif
6575 fieldval = PPC_HI (value);
6576 goto sign_extend_16;
6577
6578 case BFD_RELOC_HI16_S:
6579 case BFD_RELOC_HI16_S_PCREL:
6580 #ifdef OBJ_ELF
6581 if (REPORT_OVERFLOW_HI && ppc_obj64)
6582 {
6583 fieldval = (value + 0x8000) >> 16;
6584 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6585 {
6586 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6587 fieldval = ((valueT) fieldval ^ sign) - sign;
6588 }
6589 break;
6590 }
6591 /* Fall thru */
6592
6593 case BFD_RELOC_PPC_VLE_HA16A:
6594 case BFD_RELOC_PPC_VLE_HA16D:
6595 case BFD_RELOC_PPC64_ADDR16_HIGHA:
6596 #endif
6597 fieldval = PPC_HA (value);
6598 goto sign_extend_16;
6599
6600 #ifdef OBJ_ELF
6601 case BFD_RELOC_PPC64_HIGHER:
6602 fieldval = PPC_HIGHER (value);
6603 goto sign_extend_16;
6604
6605 case BFD_RELOC_PPC64_HIGHER_S:
6606 fieldval = PPC_HIGHERA (value);
6607 goto sign_extend_16;
6608
6609 case BFD_RELOC_PPC64_HIGHEST:
6610 fieldval = PPC_HIGHEST (value);
6611 goto sign_extend_16;
6612
6613 case BFD_RELOC_PPC64_HIGHEST_S:
6614 fieldval = PPC_HIGHESTA (value);
6615 goto sign_extend_16;
6616 #endif
6617
6618 default:
6619 break;
6620 }
6621
6622 if (operand != NULL)
6623 {
6624 /* Handle relocs in an insn. */
6625 char *where;
6626 unsigned long insn;
6627
6628 switch (fixP->fx_r_type)
6629 {
6630 #ifdef OBJ_ELF
6631 /* The following relocs can't be calculated by the assembler.
6632 Leave the field zero. */
6633 case BFD_RELOC_PPC_TPREL16:
6634 case BFD_RELOC_PPC_TPREL16_LO:
6635 case BFD_RELOC_PPC_TPREL16_HI:
6636 case BFD_RELOC_PPC_TPREL16_HA:
6637 case BFD_RELOC_PPC_DTPREL16:
6638 case BFD_RELOC_PPC_DTPREL16_LO:
6639 case BFD_RELOC_PPC_DTPREL16_HI:
6640 case BFD_RELOC_PPC_DTPREL16_HA:
6641 case BFD_RELOC_PPC_GOT_TLSGD16:
6642 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6643 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6644 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6645 case BFD_RELOC_PPC_GOT_TLSLD16:
6646 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6647 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6648 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6649 case BFD_RELOC_PPC_GOT_TPREL16:
6650 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6651 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6652 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6653 case BFD_RELOC_PPC_GOT_DTPREL16:
6654 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6655 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6656 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6657 case BFD_RELOC_PPC64_TPREL16_DS:
6658 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6659 case BFD_RELOC_PPC64_TPREL16_HIGH:
6660 case BFD_RELOC_PPC64_TPREL16_HIGHA:
6661 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6662 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6663 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6664 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6665 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6666 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
6667 case BFD_RELOC_PPC64_DTPREL16_DS:
6668 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6669 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6670 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6671 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6672 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6673 gas_assert (fixP->fx_addsy != NULL);
6674 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6675 fieldval = 0;
6676 break;
6677
6678 /* These also should leave the field zero for the same
6679 reason. Note that older versions of gas wrote values
6680 here. If we want to go back to the old behaviour, then
6681 all _LO and _LO_DS cases will need to be treated like
6682 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6683 case BFD_RELOC_16_GOTOFF:
6684 case BFD_RELOC_LO16_GOTOFF:
6685 case BFD_RELOC_HI16_GOTOFF:
6686 case BFD_RELOC_HI16_S_GOTOFF:
6687 case BFD_RELOC_LO16_PLTOFF:
6688 case BFD_RELOC_HI16_PLTOFF:
6689 case BFD_RELOC_HI16_S_PLTOFF:
6690 case BFD_RELOC_GPREL16:
6691 case BFD_RELOC_16_BASEREL:
6692 case BFD_RELOC_LO16_BASEREL:
6693 case BFD_RELOC_HI16_BASEREL:
6694 case BFD_RELOC_HI16_S_BASEREL:
6695 case BFD_RELOC_PPC_TOC16:
6696 case BFD_RELOC_PPC64_TOC16_LO:
6697 case BFD_RELOC_PPC64_TOC16_HI:
6698 case BFD_RELOC_PPC64_TOC16_HA:
6699 case BFD_RELOC_PPC64_PLTGOT16:
6700 case BFD_RELOC_PPC64_PLTGOT16_LO:
6701 case BFD_RELOC_PPC64_PLTGOT16_HI:
6702 case BFD_RELOC_PPC64_PLTGOT16_HA:
6703 case BFD_RELOC_PPC64_GOT16_DS:
6704 case BFD_RELOC_PPC64_GOT16_LO_DS:
6705 case BFD_RELOC_PPC64_PLT16_LO_DS:
6706 case BFD_RELOC_PPC64_SECTOFF_DS:
6707 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6708 case BFD_RELOC_PPC64_TOC16_DS:
6709 case BFD_RELOC_PPC64_TOC16_LO_DS:
6710 case BFD_RELOC_PPC64_PLTGOT16_DS:
6711 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6712 case BFD_RELOC_PPC_EMB_NADDR16:
6713 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6714 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6715 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6716 case BFD_RELOC_PPC_EMB_SDAI16:
6717 case BFD_RELOC_PPC_EMB_SDA2I16:
6718 case BFD_RELOC_PPC_EMB_SDA2REL:
6719 case BFD_RELOC_PPC_EMB_SDA21:
6720 case BFD_RELOC_PPC_EMB_MRKREF:
6721 case BFD_RELOC_PPC_EMB_RELSEC16:
6722 case BFD_RELOC_PPC_EMB_RELST_LO:
6723 case BFD_RELOC_PPC_EMB_RELST_HI:
6724 case BFD_RELOC_PPC_EMB_RELST_HA:
6725 case BFD_RELOC_PPC_EMB_BIT_FLD:
6726 case BFD_RELOC_PPC_EMB_RELSDA:
6727 case BFD_RELOC_PPC_VLE_SDA21:
6728 case BFD_RELOC_PPC_VLE_SDA21_LO:
6729 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6730 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6731 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6732 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6733 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6734 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6735 gas_assert (fixP->fx_addsy != NULL);
6736 /* Fall thru */
6737
6738 case BFD_RELOC_PPC_TLS:
6739 case BFD_RELOC_PPC_TLSGD:
6740 case BFD_RELOC_PPC_TLSLD:
6741 fieldval = 0;
6742 break;
6743 #endif
6744
6745 #ifdef OBJ_XCOFF
6746 case BFD_RELOC_PPC_B16:
6747 /* Adjust the offset to the instruction boundary. */
6748 fieldval += 2;
6749 break;
6750 #endif
6751
6752 default:
6753 break;
6754 }
6755
6756 #ifdef OBJ_ELF
6757 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6758 contents can stay at zero. */
6759 #define APPLY_RELOC fixP->fx_done
6760 #else
6761 #define APPLY_RELOC 1
6762 #endif
6763 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6764 {
6765 /* Fetch the instruction, insert the fully resolved operand
6766 value, and stuff the instruction back again. */
6767 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6768 if (target_big_endian)
6769 {
6770 if (fixP->fx_size == 4)
6771 insn = bfd_getb32 ((unsigned char *) where);
6772 else
6773 insn = bfd_getb16 ((unsigned char *) where);
6774 }
6775 else
6776 {
6777 if (fixP->fx_size == 4)
6778 insn = bfd_getl32 ((unsigned char *) where);
6779 else
6780 insn = bfd_getl16 ((unsigned char *) where);
6781 }
6782 insn = ppc_insert_operand (insn, operand, fieldval,
6783 fixP->tc_fix_data.ppc_cpu,
6784 fixP->fx_file, fixP->fx_line);
6785 if (target_big_endian)
6786 {
6787 if (fixP->fx_size == 4)
6788 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6789 else
6790 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6791 }
6792 else
6793 {
6794 if (fixP->fx_size == 4)
6795 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6796 else
6797 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6798 }
6799 }
6800
6801 if (fixP->fx_done)
6802 /* Nothing else to do here. */
6803 return;
6804
6805 gas_assert (fixP->fx_addsy != NULL);
6806 if (fixP->fx_r_type == BFD_RELOC_UNUSED)
6807 {
6808 char *sfile;
6809 unsigned int sline;
6810
6811 /* Use expr_symbol_where to see if this is an expression
6812 symbol. */
6813 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6814 as_bad_where (fixP->fx_file, fixP->fx_line,
6815 _("unresolved expression that must be resolved"));
6816 else
6817 as_bad_where (fixP->fx_file, fixP->fx_line,
6818 _("unsupported relocation against %s"),
6819 S_GET_NAME (fixP->fx_addsy));
6820 fixP->fx_done = 1;
6821 return;
6822 }
6823 }
6824 else
6825 {
6826 /* Handle relocs in data. */
6827 switch (fixP->fx_r_type)
6828 {
6829 case BFD_RELOC_VTABLE_INHERIT:
6830 if (fixP->fx_addsy
6831 && !S_IS_DEFINED (fixP->fx_addsy)
6832 && !S_IS_WEAK (fixP->fx_addsy))
6833 S_SET_WEAK (fixP->fx_addsy);
6834 /* Fall thru */
6835
6836 case BFD_RELOC_VTABLE_ENTRY:
6837 fixP->fx_done = 0;
6838 break;
6839
6840 #ifdef OBJ_ELF
6841 /* These can appear with @l etc. in data. */
6842 case BFD_RELOC_LO16:
6843 case BFD_RELOC_LO16_PCREL:
6844 case BFD_RELOC_HI16:
6845 case BFD_RELOC_HI16_PCREL:
6846 case BFD_RELOC_HI16_S:
6847 case BFD_RELOC_HI16_S_PCREL:
6848 case BFD_RELOC_PPC64_HIGHER:
6849 case BFD_RELOC_PPC64_HIGHER_S:
6850 case BFD_RELOC_PPC64_HIGHEST:
6851 case BFD_RELOC_PPC64_HIGHEST_S:
6852 case BFD_RELOC_PPC64_ADDR16_HIGH:
6853 case BFD_RELOC_PPC64_ADDR16_HIGHA:
6854 break;
6855
6856 case BFD_RELOC_PPC_DTPMOD:
6857 case BFD_RELOC_PPC_TPREL:
6858 case BFD_RELOC_PPC_DTPREL:
6859 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6860 break;
6861
6862 /* Just punt all of these to the linker. */
6863 case BFD_RELOC_PPC_B16_BRTAKEN:
6864 case BFD_RELOC_PPC_B16_BRNTAKEN:
6865 case BFD_RELOC_16_GOTOFF:
6866 case BFD_RELOC_LO16_GOTOFF:
6867 case BFD_RELOC_HI16_GOTOFF:
6868 case BFD_RELOC_HI16_S_GOTOFF:
6869 case BFD_RELOC_LO16_PLTOFF:
6870 case BFD_RELOC_HI16_PLTOFF:
6871 case BFD_RELOC_HI16_S_PLTOFF:
6872 case BFD_RELOC_PPC_COPY:
6873 case BFD_RELOC_PPC_GLOB_DAT:
6874 case BFD_RELOC_16_BASEREL:
6875 case BFD_RELOC_LO16_BASEREL:
6876 case BFD_RELOC_HI16_BASEREL:
6877 case BFD_RELOC_HI16_S_BASEREL:
6878 case BFD_RELOC_PPC_TLS:
6879 case BFD_RELOC_PPC_DTPREL16_LO:
6880 case BFD_RELOC_PPC_DTPREL16_HI:
6881 case BFD_RELOC_PPC_DTPREL16_HA:
6882 case BFD_RELOC_PPC_TPREL16_LO:
6883 case BFD_RELOC_PPC_TPREL16_HI:
6884 case BFD_RELOC_PPC_TPREL16_HA:
6885 case BFD_RELOC_PPC_GOT_TLSGD16:
6886 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6887 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6888 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6889 case BFD_RELOC_PPC_GOT_TLSLD16:
6890 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6891 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6892 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6893 case BFD_RELOC_PPC_GOT_DTPREL16:
6894 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6895 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6896 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6897 case BFD_RELOC_PPC_GOT_TPREL16:
6898 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6899 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6900 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6901 case BFD_RELOC_24_PLT_PCREL:
6902 case BFD_RELOC_PPC_LOCAL24PC:
6903 case BFD_RELOC_32_PLT_PCREL:
6904 case BFD_RELOC_GPREL16:
6905 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6906 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6907 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6908 case BFD_RELOC_PPC_EMB_NADDR32:
6909 case BFD_RELOC_PPC_EMB_NADDR16:
6910 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6911 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6912 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6913 case BFD_RELOC_PPC_EMB_SDAI16:
6914 case BFD_RELOC_PPC_EMB_SDA2REL:
6915 case BFD_RELOC_PPC_EMB_SDA2I16:
6916 case BFD_RELOC_PPC_EMB_SDA21:
6917 case BFD_RELOC_PPC_VLE_SDA21_LO:
6918 case BFD_RELOC_PPC_EMB_MRKREF:
6919 case BFD_RELOC_PPC_EMB_RELSEC16:
6920 case BFD_RELOC_PPC_EMB_RELST_LO:
6921 case BFD_RELOC_PPC_EMB_RELST_HI:
6922 case BFD_RELOC_PPC_EMB_RELST_HA:
6923 case BFD_RELOC_PPC_EMB_BIT_FLD:
6924 case BFD_RELOC_PPC_EMB_RELSDA:
6925 case BFD_RELOC_PPC64_TOC:
6926 case BFD_RELOC_PPC_TOC16:
6927 case BFD_RELOC_PPC64_TOC16_LO:
6928 case BFD_RELOC_PPC64_TOC16_HI:
6929 case BFD_RELOC_PPC64_TOC16_HA:
6930 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6931 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
6932 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6933 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6934 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6935 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6936 case BFD_RELOC_PPC64_TPREL16_HIGH:
6937 case BFD_RELOC_PPC64_TPREL16_HIGHA:
6938 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6939 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6940 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6941 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6942 fixP->fx_done = 0;
6943 break;
6944 #endif
6945
6946 #ifdef OBJ_XCOFF
6947 case BFD_RELOC_NONE:
6948 #endif
6949 case BFD_RELOC_CTOR:
6950 case BFD_RELOC_32:
6951 case BFD_RELOC_32_PCREL:
6952 case BFD_RELOC_RVA:
6953 case BFD_RELOC_64:
6954 case BFD_RELOC_64_PCREL:
6955 case BFD_RELOC_16:
6956 case BFD_RELOC_16_PCREL:
6957 case BFD_RELOC_8:
6958 break;
6959
6960 default:
6961 fprintf (stderr,
6962 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
6963 fflush (stderr);
6964 abort ();
6965 }
6966
6967 if (fixP->fx_size && APPLY_RELOC)
6968 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6969 fieldval, fixP->fx_size);
6970 }
6971
6972 /* We are only able to convert some relocs to pc-relative. */
6973 if (!fixP->fx_done && fixP->fx_pcrel)
6974 {
6975 switch (fixP->fx_r_type)
6976 {
6977 case BFD_RELOC_LO16:
6978 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6979 break;
6980
6981 case BFD_RELOC_HI16:
6982 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6983 break;
6984
6985 case BFD_RELOC_HI16_S:
6986 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6987 break;
6988
6989 case BFD_RELOC_64:
6990 fixP->fx_r_type = BFD_RELOC_64_PCREL;
6991 break;
6992
6993 case BFD_RELOC_32:
6994 fixP->fx_r_type = BFD_RELOC_32_PCREL;
6995 break;
6996
6997 case BFD_RELOC_16:
6998 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6999 break;
7000
7001 /* Some of course are already pc-relative. */
7002 case BFD_RELOC_LO16_PCREL:
7003 case BFD_RELOC_HI16_PCREL:
7004 case BFD_RELOC_HI16_S_PCREL:
7005 case BFD_RELOC_64_PCREL:
7006 case BFD_RELOC_32_PCREL:
7007 case BFD_RELOC_16_PCREL:
7008 case BFD_RELOC_PPC_B16:
7009 case BFD_RELOC_PPC_B16_BRTAKEN:
7010 case BFD_RELOC_PPC_B16_BRNTAKEN:
7011 case BFD_RELOC_PPC_B26:
7012 case BFD_RELOC_PPC_LOCAL24PC:
7013 case BFD_RELOC_24_PLT_PCREL:
7014 case BFD_RELOC_32_PLT_PCREL:
7015 case BFD_RELOC_64_PLT_PCREL:
7016 case BFD_RELOC_PPC_VLE_REL8:
7017 case BFD_RELOC_PPC_VLE_REL15:
7018 case BFD_RELOC_PPC_VLE_REL24:
7019 break;
7020
7021 default:
7022 if (fixP->fx_addsy)
7023 {
7024 char *sfile;
7025 unsigned int sline;
7026
7027 /* Use expr_symbol_where to see if this is an
7028 expression symbol. */
7029 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7030 as_bad_where (fixP->fx_file, fixP->fx_line,
7031 _("unresolved expression that must"
7032 " be resolved"));
7033 else
7034 as_bad_where (fixP->fx_file, fixP->fx_line,
7035 _("cannot emit PC relative %s relocation"
7036 " against %s"),
7037 bfd_get_reloc_code_name (fixP->fx_r_type),
7038 S_GET_NAME (fixP->fx_addsy));
7039 }
7040 else
7041 as_bad_where (fixP->fx_file, fixP->fx_line,
7042 _("unable to resolve expression"));
7043 fixP->fx_done = 1;
7044 break;
7045 }
7046 }
7047
7048 #ifdef OBJ_ELF
7049 ppc_elf_validate_fix (fixP, seg);
7050 fixP->fx_addnumber = value;
7051
7052 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7053 from the section contents. If we are going to be emitting a reloc
7054 then the section contents are immaterial, so don't warn if they
7055 happen to overflow. Leave such warnings to ld. */
7056 if (!fixP->fx_done)
7057 {
7058 fixP->fx_no_overflow = 1;
7059
7060 /* Arrange to emit .TOC. as a normal symbol if used in anything
7061 but .TOC.@tocbase. */
7062 if (ppc_obj64
7063 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7064 && fixP->fx_addsy != NULL
7065 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7066 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7067 }
7068 #else
7069 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7070 fixP->fx_addnumber = 0;
7071 else
7072 {
7073 #ifdef TE_PE
7074 fixP->fx_addnumber = 0;
7075 #else
7076 /* We want to use the offset within the toc, not the actual VMA
7077 of the symbol. */
7078 fixP->fx_addnumber =
7079 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7080 - S_GET_VALUE (ppc_toc_csect);
7081 /* Set *valP to avoid errors. */
7082 *valP = value;
7083 #endif
7084 }
7085 #endif
7086 }
7087
7088 /* Generate a reloc for a fixup. */
7089
7090 arelent *
7091 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
7092 {
7093 arelent *reloc;
7094
7095 reloc = (arelent *) xmalloc (sizeof (arelent));
7096
7097 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
7098 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
7099 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7100 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7101 if (reloc->howto == (reloc_howto_type *) NULL)
7102 {
7103 as_bad_where (fixp->fx_file, fixp->fx_line,
7104 _("reloc %d not supported by object file format"),
7105 (int) fixp->fx_r_type);
7106 return NULL;
7107 }
7108 reloc->addend = fixp->fx_addnumber;
7109
7110 return reloc;
7111 }
7112
7113 void
7114 ppc_cfi_frame_initial_instructions (void)
7115 {
7116 cfi_add_CFA_def_cfa (1, 0);
7117 }
7118
7119 int
7120 tc_ppc_regname_to_dw2regnum (char *regname)
7121 {
7122 unsigned int regnum = -1;
7123 unsigned int i;
7124 const char *p;
7125 char *q;
7126 static struct { char *name; int dw2regnum; } regnames[] =
7127 {
7128 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7129 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7130 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7131 { "spe_acc", 111 }, { "spefscr", 112 }
7132 };
7133
7134 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7135 if (strcmp (regnames[i].name, regname) == 0)
7136 return regnames[i].dw2regnum;
7137
7138 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7139 {
7140 p = regname + 1 + (regname[1] == '.');
7141 regnum = strtoul (p, &q, 10);
7142 if (p == q || *q || regnum >= 32)
7143 return -1;
7144 if (regname[0] == 'f')
7145 regnum += 32;
7146 else if (regname[0] == 'v')
7147 regnum += 77;
7148 }
7149 else if (regname[0] == 'c' && regname[1] == 'r')
7150 {
7151 p = regname + 2 + (regname[2] == '.');
7152 if (p[0] < '0' || p[0] > '7' || p[1])
7153 return -1;
7154 regnum = p[0] - '0' + 68;
7155 }
7156 return regnum;
7157 }
GDB Binutils - Deliverables
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