76a9e8ec4d39deee30bc186f0db1597045148a68
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
22
23 #include "as.h"
24 #include "safe-ctype.h"
25 #include "subsegs.h"
26 #include "dw2gencfi.h"
27 #include "opcode/ppc.h"
28
29 #ifdef OBJ_ELF
30 #include "elf/ppc.h"
31 #include "dwarf2dbg.h"
32 #endif
33
34 #ifdef TE_PE
35 #include "coff/pe.h"
36 #endif
37
38 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40 /* Tell the main code what the endianness is. */
41 extern int target_big_endian;
42
43 /* Whether or not, we've set target_big_endian. */
44 static int set_target_endian = 0;
45
46 /* Whether to use user friendly register names. */
47 #ifndef TARGET_REG_NAMES_P
48 #ifdef TE_PE
49 #define TARGET_REG_NAMES_P TRUE
50 #else
51 #define TARGET_REG_NAMES_P FALSE
52 #endif
53 #endif
54
55 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58 /* #lo(value) denotes the least significant 16 bits of the indicated. */
59 #define PPC_LO(v) ((v) & 0xffff)
60
61 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
62 #define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
67 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
68
69 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
70 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
71
72 /* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
74 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
75
76 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
77 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
78
79 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
80 compensating for #lo being treated as a signed number. */
81 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
82
83 #define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
85 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
86
87 static void ppc_macro (char *, const struct powerpc_macro *);
88 static void ppc_byte (int);
89
90 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
91 static void ppc_tc (int);
92 static void ppc_machine (int);
93 #endif
94
95 #ifdef OBJ_XCOFF
96 static void ppc_comm (int);
97 static void ppc_bb (int);
98 static void ppc_bc (int);
99 static void ppc_bf (int);
100 static void ppc_biei (int);
101 static void ppc_bs (int);
102 static void ppc_eb (int);
103 static void ppc_ec (int);
104 static void ppc_ef (int);
105 static void ppc_es (int);
106 static void ppc_csect (int);
107 static void ppc_change_csect (symbolS *, offsetT);
108 static void ppc_function (int);
109 static void ppc_extern (int);
110 static void ppc_lglobl (int);
111 static void ppc_section (int);
112 static void ppc_named_section (int);
113 static void ppc_stabx (int);
114 static void ppc_rename (int);
115 static void ppc_toc (int);
116 static void ppc_xcoff_cons (int);
117 static void ppc_vbyte (int);
118 #endif
119
120 #ifdef OBJ_ELF
121 static void ppc_elf_cons (int);
122 static void ppc_elf_rdata (int);
123 static void ppc_elf_lcomm (int);
124 #endif
125
126 #ifdef TE_PE
127 static void ppc_previous (int);
128 static void ppc_pdata (int);
129 static void ppc_ydata (int);
130 static void ppc_reldata (int);
131 static void ppc_rdata (int);
132 static void ppc_ualong (int);
133 static void ppc_znop (int);
134 static void ppc_pe_comm (int);
135 static void ppc_pe_section (int);
136 static void ppc_pe_function (int);
137 static void ppc_pe_tocd (int);
138 #endif
139 \f
140 /* Generic assembler global variables which must be defined by all
141 targets. */
142
143 #ifdef OBJ_ELF
144 /* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148 static const char ppc_solaris_comment_chars[] = "#!";
149 static const char ppc_eabi_comment_chars[] = "#";
150
151 #ifdef TARGET_SOLARIS_COMMENT
152 const char *ppc_comment_chars = ppc_solaris_comment_chars;
153 #else
154 const char *ppc_comment_chars = ppc_eabi_comment_chars;
155 #endif
156 #else
157 const char comment_chars[] = "#";
158 #endif
159
160 /* Characters which start a comment at the beginning of a line. */
161 const char line_comment_chars[] = "#";
162
163 /* Characters which may be used to separate multiple commands on a
164 single line. */
165 const char line_separator_chars[] = ";";
166
167 /* Characters which are used to indicate an exponent in a floating
168 point number. */
169 const char EXP_CHARS[] = "eE";
170
171 /* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173 const char FLT_CHARS[] = "dD";
174
175 /* Anything that can start an operand needs to be mentioned here,
176 to stop the input scrubber eating whitespace. */
177 const char ppc_symbol_chars[] = "%[";
178
179 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180 int ppc_cie_data_alignment;
181
182 /* The type of processor we are assembling for. This is one or more
183 of the PPC_OPCODE flags defined in opcode/ppc.h. */
184 ppc_cpu_t ppc_cpu = 0;
185 \f
186 /* The target specific pseudo-ops which we support. */
187
188 const pseudo_typeS md_pseudo_table[] =
189 {
190 /* Pseudo-ops which must be overridden. */
191 { "byte", ppc_byte, 0 },
192
193 #ifdef OBJ_XCOFF
194 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
195 legitimately belong in the obj-*.c file. However, XCOFF is based
196 on COFF, and is only implemented for the RS/6000. We just use
197 obj-coff.c, and add what we need here. */
198 { "comm", ppc_comm, 0 },
199 { "lcomm", ppc_comm, 1 },
200 { "bb", ppc_bb, 0 },
201 { "bc", ppc_bc, 0 },
202 { "bf", ppc_bf, 0 },
203 { "bi", ppc_biei, 0 },
204 { "bs", ppc_bs, 0 },
205 { "csect", ppc_csect, 0 },
206 { "data", ppc_section, 'd' },
207 { "eb", ppc_eb, 0 },
208 { "ec", ppc_ec, 0 },
209 { "ef", ppc_ef, 0 },
210 { "ei", ppc_biei, 1 },
211 { "es", ppc_es, 0 },
212 { "extern", ppc_extern, 0 },
213 { "function", ppc_function, 0 },
214 { "lglobl", ppc_lglobl, 0 },
215 { "rename", ppc_rename, 0 },
216 { "section", ppc_named_section, 0 },
217 { "stabx", ppc_stabx, 0 },
218 { "text", ppc_section, 't' },
219 { "toc", ppc_toc, 0 },
220 { "long", ppc_xcoff_cons, 2 },
221 { "llong", ppc_xcoff_cons, 3 },
222 { "word", ppc_xcoff_cons, 1 },
223 { "short", ppc_xcoff_cons, 1 },
224 { "vbyte", ppc_vbyte, 0 },
225 #endif
226
227 #ifdef OBJ_ELF
228 { "llong", ppc_elf_cons, 8 },
229 { "quad", ppc_elf_cons, 8 },
230 { "long", ppc_elf_cons, 4 },
231 { "word", ppc_elf_cons, 2 },
232 { "short", ppc_elf_cons, 2 },
233 { "rdata", ppc_elf_rdata, 0 },
234 { "rodata", ppc_elf_rdata, 0 },
235 { "lcomm", ppc_elf_lcomm, 0 },
236 #endif
237
238 #ifdef TE_PE
239 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
240 { "previous", ppc_previous, 0 },
241 { "pdata", ppc_pdata, 0 },
242 { "ydata", ppc_ydata, 0 },
243 { "reldata", ppc_reldata, 0 },
244 { "rdata", ppc_rdata, 0 },
245 { "ualong", ppc_ualong, 0 },
246 { "znop", ppc_znop, 0 },
247 { "comm", ppc_pe_comm, 0 },
248 { "lcomm", ppc_pe_comm, 1 },
249 { "section", ppc_pe_section, 0 },
250 { "function", ppc_pe_function,0 },
251 { "tocd", ppc_pe_tocd, 0 },
252 #endif
253
254 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
255 { "tc", ppc_tc, 0 },
256 { "machine", ppc_machine, 0 },
257 #endif
258
259 { NULL, NULL, 0 }
260 };
261
262 \f
263 /* Predefined register names if -mregnames (or default for Windows NT).
264 In general, there are lots of them, in an attempt to be compatible
265 with a number of other Windows NT assemblers. */
266
267 /* Structure to hold information about predefined registers. */
268 struct pd_reg
269 {
270 char *name;
271 int value;
272 };
273
274 /* List of registers that are pre-defined:
275
276 Each general register has predefined names of the form:
277 1. r<reg_num> which has the value <reg_num>.
278 2. r.<reg_num> which has the value <reg_num>.
279
280 Each floating point register has predefined names of the form:
281 1. f<reg_num> which has the value <reg_num>.
282 2. f.<reg_num> which has the value <reg_num>.
283
284 Each vector unit register has predefined names of the form:
285 1. v<reg_num> which has the value <reg_num>.
286 2. v.<reg_num> which has the value <reg_num>.
287
288 Each condition register has predefined names of the form:
289 1. cr<reg_num> which has the value <reg_num>.
290 2. cr.<reg_num> which has the value <reg_num>.
291
292 There are individual registers as well:
293 sp or r.sp has the value 1
294 rtoc or r.toc has the value 2
295 fpscr has the value 0
296 xer has the value 1
297 lr has the value 8
298 ctr has the value 9
299 pmr has the value 0
300 dar has the value 19
301 dsisr has the value 18
302 dec has the value 22
303 sdr1 has the value 25
304 srr0 has the value 26
305 srr1 has the value 27
306
307 The table is sorted. Suitable for searching by a binary search. */
308
309 static const struct pd_reg pre_defined_registers[] =
310 {
311 { "cr.0", 0 }, /* Condition Registers */
312 { "cr.1", 1 },
313 { "cr.2", 2 },
314 { "cr.3", 3 },
315 { "cr.4", 4 },
316 { "cr.5", 5 },
317 { "cr.6", 6 },
318 { "cr.7", 7 },
319
320 { "cr0", 0 },
321 { "cr1", 1 },
322 { "cr2", 2 },
323 { "cr3", 3 },
324 { "cr4", 4 },
325 { "cr5", 5 },
326 { "cr6", 6 },
327 { "cr7", 7 },
328
329 { "ctr", 9 },
330
331 { "dar", 19 }, /* Data Access Register */
332 { "dec", 22 }, /* Decrementer */
333 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
334
335 { "f.0", 0 }, /* Floating point registers */
336 { "f.1", 1 },
337 { "f.10", 10 },
338 { "f.11", 11 },
339 { "f.12", 12 },
340 { "f.13", 13 },
341 { "f.14", 14 },
342 { "f.15", 15 },
343 { "f.16", 16 },
344 { "f.17", 17 },
345 { "f.18", 18 },
346 { "f.19", 19 },
347 { "f.2", 2 },
348 { "f.20", 20 },
349 { "f.21", 21 },
350 { "f.22", 22 },
351 { "f.23", 23 },
352 { "f.24", 24 },
353 { "f.25", 25 },
354 { "f.26", 26 },
355 { "f.27", 27 },
356 { "f.28", 28 },
357 { "f.29", 29 },
358 { "f.3", 3 },
359 { "f.30", 30 },
360 { "f.31", 31 },
361 { "f.4", 4 },
362 { "f.5", 5 },
363 { "f.6", 6 },
364 { "f.7", 7 },
365 { "f.8", 8 },
366 { "f.9", 9 },
367
368 { "f0", 0 },
369 { "f1", 1 },
370 { "f10", 10 },
371 { "f11", 11 },
372 { "f12", 12 },
373 { "f13", 13 },
374 { "f14", 14 },
375 { "f15", 15 },
376 { "f16", 16 },
377 { "f17", 17 },
378 { "f18", 18 },
379 { "f19", 19 },
380 { "f2", 2 },
381 { "f20", 20 },
382 { "f21", 21 },
383 { "f22", 22 },
384 { "f23", 23 },
385 { "f24", 24 },
386 { "f25", 25 },
387 { "f26", 26 },
388 { "f27", 27 },
389 { "f28", 28 },
390 { "f29", 29 },
391 { "f3", 3 },
392 { "f30", 30 },
393 { "f31", 31 },
394 { "f4", 4 },
395 { "f5", 5 },
396 { "f6", 6 },
397 { "f7", 7 },
398 { "f8", 8 },
399 { "f9", 9 },
400
401 { "fpscr", 0 },
402
403 /* Quantization registers used with pair single instructions. */
404 { "gqr.0", 0 },
405 { "gqr.1", 1 },
406 { "gqr.2", 2 },
407 { "gqr.3", 3 },
408 { "gqr.4", 4 },
409 { "gqr.5", 5 },
410 { "gqr.6", 6 },
411 { "gqr.7", 7 },
412 { "gqr0", 0 },
413 { "gqr1", 1 },
414 { "gqr2", 2 },
415 { "gqr3", 3 },
416 { "gqr4", 4 },
417 { "gqr5", 5 },
418 { "gqr6", 6 },
419 { "gqr7", 7 },
420
421 { "lr", 8 }, /* Link Register */
422
423 { "pmr", 0 },
424
425 { "r.0", 0 }, /* General Purpose Registers */
426 { "r.1", 1 },
427 { "r.10", 10 },
428 { "r.11", 11 },
429 { "r.12", 12 },
430 { "r.13", 13 },
431 { "r.14", 14 },
432 { "r.15", 15 },
433 { "r.16", 16 },
434 { "r.17", 17 },
435 { "r.18", 18 },
436 { "r.19", 19 },
437 { "r.2", 2 },
438 { "r.20", 20 },
439 { "r.21", 21 },
440 { "r.22", 22 },
441 { "r.23", 23 },
442 { "r.24", 24 },
443 { "r.25", 25 },
444 { "r.26", 26 },
445 { "r.27", 27 },
446 { "r.28", 28 },
447 { "r.29", 29 },
448 { "r.3", 3 },
449 { "r.30", 30 },
450 { "r.31", 31 },
451 { "r.4", 4 },
452 { "r.5", 5 },
453 { "r.6", 6 },
454 { "r.7", 7 },
455 { "r.8", 8 },
456 { "r.9", 9 },
457
458 { "r.sp", 1 }, /* Stack Pointer */
459
460 { "r.toc", 2 }, /* Pointer to the table of contents */
461
462 { "r0", 0 }, /* More general purpose registers */
463 { "r1", 1 },
464 { "r10", 10 },
465 { "r11", 11 },
466 { "r12", 12 },
467 { "r13", 13 },
468 { "r14", 14 },
469 { "r15", 15 },
470 { "r16", 16 },
471 { "r17", 17 },
472 { "r18", 18 },
473 { "r19", 19 },
474 { "r2", 2 },
475 { "r20", 20 },
476 { "r21", 21 },
477 { "r22", 22 },
478 { "r23", 23 },
479 { "r24", 24 },
480 { "r25", 25 },
481 { "r26", 26 },
482 { "r27", 27 },
483 { "r28", 28 },
484 { "r29", 29 },
485 { "r3", 3 },
486 { "r30", 30 },
487 { "r31", 31 },
488 { "r4", 4 },
489 { "r5", 5 },
490 { "r6", 6 },
491 { "r7", 7 },
492 { "r8", 8 },
493 { "r9", 9 },
494
495 { "rtoc", 2 }, /* Table of contents */
496
497 { "sdr1", 25 }, /* Storage Description Register 1 */
498
499 { "sp", 1 },
500
501 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
502 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
503
504 { "v.0", 0 }, /* Vector registers */
505 { "v.1", 1 },
506 { "v.10", 10 },
507 { "v.11", 11 },
508 { "v.12", 12 },
509 { "v.13", 13 },
510 { "v.14", 14 },
511 { "v.15", 15 },
512 { "v.16", 16 },
513 { "v.17", 17 },
514 { "v.18", 18 },
515 { "v.19", 19 },
516 { "v.2", 2 },
517 { "v.20", 20 },
518 { "v.21", 21 },
519 { "v.22", 22 },
520 { "v.23", 23 },
521 { "v.24", 24 },
522 { "v.25", 25 },
523 { "v.26", 26 },
524 { "v.27", 27 },
525 { "v.28", 28 },
526 { "v.29", 29 },
527 { "v.3", 3 },
528 { "v.30", 30 },
529 { "v.31", 31 },
530 { "v.4", 4 },
531 { "v.5", 5 },
532 { "v.6", 6 },
533 { "v.7", 7 },
534 { "v.8", 8 },
535 { "v.9", 9 },
536
537 { "v0", 0 },
538 { "v1", 1 },
539 { "v10", 10 },
540 { "v11", 11 },
541 { "v12", 12 },
542 { "v13", 13 },
543 { "v14", 14 },
544 { "v15", 15 },
545 { "v16", 16 },
546 { "v17", 17 },
547 { "v18", 18 },
548 { "v19", 19 },
549 { "v2", 2 },
550 { "v20", 20 },
551 { "v21", 21 },
552 { "v22", 22 },
553 { "v23", 23 },
554 { "v24", 24 },
555 { "v25", 25 },
556 { "v26", 26 },
557 { "v27", 27 },
558 { "v28", 28 },
559 { "v29", 29 },
560 { "v3", 3 },
561 { "v30", 30 },
562 { "v31", 31 },
563 { "v4", 4 },
564 { "v5", 5 },
565 { "v6", 6 },
566 { "v7", 7 },
567 { "v8", 8 },
568 { "v9", 9 },
569
570 { "xer", 1 },
571
572 };
573
574 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
575
576 /* Given NAME, find the register number associated with that name, return
577 the integer value associated with the given name or -1 on failure. */
578
579 static int
580 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
581 {
582 int middle, low, high;
583 int cmp;
584
585 low = 0;
586 high = regcount - 1;
587
588 do
589 {
590 middle = (low + high) / 2;
591 cmp = strcasecmp (name, regs[middle].name);
592 if (cmp < 0)
593 high = middle - 1;
594 else if (cmp > 0)
595 low = middle + 1;
596 else
597 return regs[middle].value;
598 }
599 while (low <= high);
600
601 return -1;
602 }
603
604 /*
605 * Summary of register_name.
606 *
607 * in: Input_line_pointer points to 1st char of operand.
608 *
609 * out: A expressionS.
610 * The operand may have been a register: in this case, X_op == O_register,
611 * X_add_number is set to the register number, and truth is returned.
612 * Input_line_pointer->(next non-blank) char after operand, or is in its
613 * original state.
614 */
615
616 static bfd_boolean
617 register_name (expressionS *expressionP)
618 {
619 int reg_number;
620 char *name;
621 char *start;
622 char c;
623
624 /* Find the spelling of the operand. */
625 start = name = input_line_pointer;
626 if (name[0] == '%' && ISALPHA (name[1]))
627 name = ++input_line_pointer;
628
629 else if (!reg_names_p || !ISALPHA (name[0]))
630 return FALSE;
631
632 c = get_symbol_end ();
633 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
634
635 /* Put back the delimiting char. */
636 *input_line_pointer = c;
637
638 /* Look to see if it's in the register table. */
639 if (reg_number >= 0)
640 {
641 expressionP->X_op = O_register;
642 expressionP->X_add_number = reg_number;
643
644 /* Make the rest nice. */
645 expressionP->X_add_symbol = NULL;
646 expressionP->X_op_symbol = NULL;
647 return TRUE;
648 }
649
650 /* Reset the line as if we had not done anything. */
651 input_line_pointer = start;
652 return FALSE;
653 }
654 \f
655 /* This function is called for each symbol seen in an expression. It
656 handles the special parsing which PowerPC assemblers are supposed
657 to use for condition codes. */
658
659 /* Whether to do the special parsing. */
660 static bfd_boolean cr_operand;
661
662 /* Names to recognize in a condition code. This table is sorted. */
663 static const struct pd_reg cr_names[] =
664 {
665 { "cr0", 0 },
666 { "cr1", 1 },
667 { "cr2", 2 },
668 { "cr3", 3 },
669 { "cr4", 4 },
670 { "cr5", 5 },
671 { "cr6", 6 },
672 { "cr7", 7 },
673 { "eq", 2 },
674 { "gt", 1 },
675 { "lt", 0 },
676 { "so", 3 },
677 { "un", 3 }
678 };
679
680 /* Parsing function. This returns non-zero if it recognized an
681 expression. */
682
683 int
684 ppc_parse_name (const char *name, expressionS *expr)
685 {
686 int val;
687
688 if (! cr_operand)
689 return 0;
690
691 if (*name == '%')
692 ++name;
693 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
694 name);
695 if (val < 0)
696 return 0;
697
698 expr->X_op = O_constant;
699 expr->X_add_number = val;
700
701 return 1;
702 }
703 \f
704 /* Local variables. */
705
706 /* Whether to target xcoff64/elf64. */
707 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
708
709 /* Opcode hash table. */
710 static struct hash_control *ppc_hash;
711
712 /* Macro hash table. */
713 static struct hash_control *ppc_macro_hash;
714
715 #ifdef OBJ_ELF
716 /* What type of shared library support to use. */
717 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
718
719 /* Flags to set in the elf header. */
720 static flagword ppc_flags = 0;
721
722 /* Whether this is Solaris or not. */
723 #ifdef TARGET_SOLARIS_COMMENT
724 #define SOLARIS_P TRUE
725 #else
726 #define SOLARIS_P FALSE
727 #endif
728
729 static bfd_boolean msolaris = SOLARIS_P;
730 #endif
731
732 #ifdef OBJ_XCOFF
733
734 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740 /* Next subsegment to allocate within the .text segment. */
741 static subsegT ppc_text_subsegment = 2;
742
743 /* Linked list of csects in the text section. */
744 static symbolS *ppc_text_csects;
745
746 /* Next subsegment to allocate within the .data segment. */
747 static subsegT ppc_data_subsegment = 2;
748
749 /* Linked list of csects in the data section. */
750 static symbolS *ppc_data_csects;
751
752 /* The current csect. */
753 static symbolS *ppc_current_csect;
754
755 /* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760 static symbolS *ppc_toc_csect;
761
762 /* The first frag in the TOC subsegment. */
763 static fragS *ppc_toc_frag;
764
765 /* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767 static fragS *ppc_after_toc_frag;
768
769 /* The current static block. */
770 static symbolS *ppc_current_block;
771
772 /* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775 static asection *ppc_coff_debug_section;
776
777 #endif /* OBJ_XCOFF */
778
779 #ifdef TE_PE
780
781 /* Various sections that we need for PE coff support. */
782 static segT ydata_section;
783 static segT pdata_section;
784 static segT reldata_section;
785 static segT rdata_section;
786 static segT tocdata_section;
787
788 /* The current section and the previous section. See ppc_previous. */
789 static segT ppc_previous_section;
790 static segT ppc_current_section;
791
792 #endif /* TE_PE */
793
794 #ifdef OBJ_ELF
795 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
796 #define PPC_APUINFO_ISEL 0x40
797 #define PPC_APUINFO_PMR 0x41
798 #define PPC_APUINFO_RFMCI 0x42
799 #define PPC_APUINFO_CACHELCK 0x43
800 #define PPC_APUINFO_SPE 0x100
801 #define PPC_APUINFO_EFS 0x101
802 #define PPC_APUINFO_BRLOCK 0x102
803
804 /*
805 * We keep a list of APUinfo
806 */
807 unsigned long *ppc_apuinfo_list;
808 unsigned int ppc_apuinfo_num;
809 unsigned int ppc_apuinfo_num_alloc;
810 #endif /* OBJ_ELF */
811 \f
812 #ifdef OBJ_ELF
813 const char *const md_shortopts = "b:l:usm:K:VQ:";
814 #else
815 const char *const md_shortopts = "um:";
816 #endif
817 const struct option md_longopts[] = {
818 {NULL, no_argument, NULL, 0}
819 };
820 const size_t md_longopts_size = sizeof (md_longopts);
821
822
823 /* Handle -m options that set cpu type, and .machine arg. */
824
825 static int
826 parse_cpu (const char *arg)
827 {
828 ppc_cpu_t retain_flags =
829 ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX | PPC_OPCODE_SPE);
830
831 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
832 (RIOS2). */
833 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
834 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
835 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
836 else if (strcmp (arg, "pwr") == 0)
837 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
838 /* -m601 means to assemble for the PowerPC 601, which includes
839 instructions that are holdovers from the Power. */
840 else if (strcmp (arg, "601") == 0)
841 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
842 | PPC_OPCODE_601 | PPC_OPCODE_32);
843 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
844 PowerPC 603/604. */
845 else if (strcmp (arg, "ppc") == 0
846 || strcmp (arg, "ppc32") == 0
847 || strcmp (arg, "603") == 0
848 || strcmp (arg, "604") == 0)
849 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
850 /* Do all PPC750s have paired single ops? */
851 else if (strcmp (arg, "750cl") == 0)
852 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS;
853 else if (strcmp (arg, "403") == 0)
854 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
855 | PPC_OPCODE_403 | PPC_OPCODE_32);
856 else if (strcmp (arg, "405") == 0)
857 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
858 | PPC_OPCODE_403 | PPC_OPCODE_405 | PPC_OPCODE_32);
859 else if (strcmp (arg, "440") == 0
860 || strcmp (arg, "464") == 0)
861 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
862 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
863 else if (strcmp (arg, "7400") == 0
864 || strcmp (arg, "7410") == 0
865 || strcmp (arg, "7450") == 0
866 || strcmp (arg, "7455") == 0)
867 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
868 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
869 else if (strcmp (arg, "e300") == 0)
870 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
871 | PPC_OPCODE_E300);
872 else if (strcmp (arg, "altivec") == 0)
873 {
874 if (ppc_cpu == 0)
875 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC;
876
877 retain_flags |= PPC_OPCODE_ALTIVEC;
878 }
879 else if (strcmp (arg, "vsx") == 0)
880 {
881 if (ppc_cpu == 0)
882 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC;
883
884 retain_flags |= PPC_OPCODE_VSX;
885 }
886 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
887 {
888 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
889 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
890 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
891 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
892 }
893 else if (strcmp (arg, "e500mc") == 0)
894 {
895 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
896 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
897 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
898 }
899 else if (strcmp (arg, "spe") == 0)
900 {
901 if (ppc_cpu == 0)
902 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_EFS;
903
904 retain_flags |= PPC_OPCODE_SPE;
905 }
906 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
907 620. */
908 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
909 {
910 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
911 }
912 else if (strcmp (arg, "ppc64bridge") == 0)
913 {
914 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
915 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
916 }
917 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
918 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
919 {
920 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
921 }
922 /* -mbooke64 means enable 64-bit BookE support. */
923 else if (strcmp (arg, "booke64") == 0)
924 {
925 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
926 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
927 }
928 else if (strcmp (arg, "power4") == 0)
929 {
930 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
931 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
932 }
933 else if (strcmp (arg, "power5") == 0)
934 {
935 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
936 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
937 | PPC_OPCODE_POWER5);
938 }
939 else if (strcmp (arg, "power6") == 0)
940 {
941 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
942 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
943 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
944 | PPC_OPCODE_ALTIVEC);
945 }
946 else if (strcmp (arg, "power7") == 0)
947 {
948 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
949 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
950 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
951 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX);
952 }
953 else if (strcmp (arg, "cell") == 0)
954 {
955 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
956 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
957 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC);
958 }
959 /* -mcom means assemble for the common intersection between Power
960 and PowerPC. At present, we just allow the union, rather
961 than the intersection. */
962 else if (strcmp (arg, "com") == 0)
963 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
964 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
965 else if (strcmp (arg, "any") == 0)
966 ppc_cpu |= PPC_OPCODE_ANY;
967 else
968 return 0;
969
970 /* Make sure the the Altivec, VSX and SPE bits are not lost. */
971 ppc_cpu |= retain_flags;
972 return 1;
973 }
974
975 int
976 md_parse_option (int c, char *arg)
977 {
978 switch (c)
979 {
980 case 'u':
981 /* -u means that any undefined symbols should be treated as
982 external, which is the default for gas anyhow. */
983 break;
984
985 #ifdef OBJ_ELF
986 case 'l':
987 /* Solaris as takes -le (presumably for little endian). For completeness
988 sake, recognize -be also. */
989 if (strcmp (arg, "e") == 0)
990 {
991 target_big_endian = 0;
992 set_target_endian = 1;
993 }
994 else
995 return 0;
996
997 break;
998
999 case 'b':
1000 if (strcmp (arg, "e") == 0)
1001 {
1002 target_big_endian = 1;
1003 set_target_endian = 1;
1004 }
1005 else
1006 return 0;
1007
1008 break;
1009
1010 case 'K':
1011 /* Recognize -K PIC. */
1012 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1013 {
1014 shlib = SHLIB_PIC;
1015 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1016 }
1017 else
1018 return 0;
1019
1020 break;
1021 #endif
1022
1023 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1024 case 'a':
1025 if (strcmp (arg, "64") == 0)
1026 {
1027 #ifdef BFD64
1028 ppc_obj64 = 1;
1029 #else
1030 as_fatal (_("%s unsupported"), "-a64");
1031 #endif
1032 }
1033 else if (strcmp (arg, "32") == 0)
1034 ppc_obj64 = 0;
1035 else
1036 return 0;
1037 break;
1038
1039 case 'm':
1040 if (parse_cpu (arg))
1041 ;
1042
1043 else if (strcmp (arg, "regnames") == 0)
1044 reg_names_p = TRUE;
1045
1046 else if (strcmp (arg, "no-regnames") == 0)
1047 reg_names_p = FALSE;
1048
1049 #ifdef OBJ_ELF
1050 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1051 that require relocation. */
1052 else if (strcmp (arg, "relocatable") == 0)
1053 {
1054 shlib = SHLIB_MRELOCATABLE;
1055 ppc_flags |= EF_PPC_RELOCATABLE;
1056 }
1057
1058 else if (strcmp (arg, "relocatable-lib") == 0)
1059 {
1060 shlib = SHLIB_MRELOCATABLE;
1061 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1062 }
1063
1064 /* -memb, set embedded bit. */
1065 else if (strcmp (arg, "emb") == 0)
1066 ppc_flags |= EF_PPC_EMB;
1067
1068 /* -mlittle/-mbig set the endianess. */
1069 else if (strcmp (arg, "little") == 0
1070 || strcmp (arg, "little-endian") == 0)
1071 {
1072 target_big_endian = 0;
1073 set_target_endian = 1;
1074 }
1075
1076 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1077 {
1078 target_big_endian = 1;
1079 set_target_endian = 1;
1080 }
1081
1082 else if (strcmp (arg, "solaris") == 0)
1083 {
1084 msolaris = TRUE;
1085 ppc_comment_chars = ppc_solaris_comment_chars;
1086 }
1087
1088 else if (strcmp (arg, "no-solaris") == 0)
1089 {
1090 msolaris = FALSE;
1091 ppc_comment_chars = ppc_eabi_comment_chars;
1092 }
1093 #endif
1094 else
1095 {
1096 as_bad (_("invalid switch -m%s"), arg);
1097 return 0;
1098 }
1099 break;
1100
1101 #ifdef OBJ_ELF
1102 /* -V: SVR4 argument to print version ID. */
1103 case 'V':
1104 print_version_id ();
1105 break;
1106
1107 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1108 should be emitted or not. FIXME: Not implemented. */
1109 case 'Q':
1110 break;
1111
1112 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1113 rather than .stabs.excl, which is ignored by the linker.
1114 FIXME: Not implemented. */
1115 case 's':
1116 if (arg)
1117 return 0;
1118
1119 break;
1120 #endif
1121
1122 default:
1123 return 0;
1124 }
1125
1126 return 1;
1127 }
1128
1129 void
1130 md_show_usage (FILE *stream)
1131 {
1132 fprintf (stream, _("\
1133 PowerPC options:\n\
1134 -a32 generate ELF32/XCOFF32\n\
1135 -a64 generate ELF64/XCOFF64\n\
1136 -u ignored\n\
1137 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1138 -mpwr generate code for POWER (RIOS1)\n\
1139 -m601 generate code for PowerPC 601\n\
1140 -mppc, -mppc32, -m603, -m604\n\
1141 generate code for PowerPC 603/604\n\
1142 -m403 generate code for PowerPC 403\n\
1143 -m405 generate code for PowerPC 405\n\
1144 -m440 generate code for PowerPC 440\n\
1145 -m464 generate code for PowerPC 464\n\
1146 -m7400, -m7410, -m7450, -m7455\n\
1147 generate code for PowerPC 7400/7410/7450/7455\n\
1148 -m750cl generate code for PowerPC 750cl\n"));
1149 fprintf (stream, _("\
1150 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1151 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1152 -mbooke64 generate code for 64-bit PowerPC BookE\n\
1153 -mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
1154 -mpower4 generate code for Power4 architecture\n\
1155 -mpower5 generate code for Power5 architecture\n\
1156 -mpower6 generate code for Power6 architecture\n\
1157 -mpower7 generate code for Power7 architecture\n\
1158 -mcell generate code for Cell Broadband Engine architecture\n\
1159 -mcom generate code Power/PowerPC common instructions\n\
1160 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1161 fprintf (stream, _("\
1162 -maltivec generate code for AltiVec\n\
1163 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1164 -me300 generate code for PowerPC e300 family\n\
1165 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1166 -me500mc, generate code for Freescale e500mc core complex\n\
1167 -mspe generate code for Motorola SPE instructions\n\
1168 -mregnames Allow symbolic names for registers\n\
1169 -mno-regnames Do not allow symbolic names for registers\n"));
1170 #ifdef OBJ_ELF
1171 fprintf (stream, _("\
1172 -mrelocatable support for GCC's -mrelocatble option\n\
1173 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1174 -memb set PPC_EMB bit in ELF flags\n\
1175 -mlittle, -mlittle-endian, -l, -le\n\
1176 generate code for a little endian machine\n\
1177 -mbig, -mbig-endian, -b, -be\n\
1178 generate code for a big endian machine\n\
1179 -msolaris generate code for Solaris\n\
1180 -mno-solaris do not generate code for Solaris\n\
1181 -V print assembler version number\n\
1182 -Qy, -Qn ignored\n"));
1183 #endif
1184 }
1185 \f
1186 /* Set ppc_cpu if it is not already set. */
1187
1188 static void
1189 ppc_set_cpu (void)
1190 {
1191 const char *default_os = TARGET_OS;
1192 const char *default_cpu = TARGET_CPU;
1193
1194 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
1195 {
1196 if (ppc_obj64)
1197 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
1198 else if (strncmp (default_os, "aix", 3) == 0
1199 && default_os[3] >= '4' && default_os[3] <= '9')
1200 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
1201 else if (strncmp (default_os, "aix3", 4) == 0)
1202 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
1203 else if (strcmp (default_cpu, "rs6000") == 0)
1204 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
1205 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1206 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
1207 else
1208 as_fatal (_("Unknown default cpu = %s, os = %s"),
1209 default_cpu, default_os);
1210 }
1211 }
1212
1213 /* Figure out the BFD architecture to use. This function and ppc_mach
1214 are called well before md_begin, when the output file is opened. */
1215
1216 enum bfd_architecture
1217 ppc_arch (void)
1218 {
1219 const char *default_cpu = TARGET_CPU;
1220 ppc_set_cpu ();
1221
1222 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1223 return bfd_arch_powerpc;
1224 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1225 return bfd_arch_rs6000;
1226 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1227 {
1228 if (strcmp (default_cpu, "rs6000") == 0)
1229 return bfd_arch_rs6000;
1230 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1231 return bfd_arch_powerpc;
1232 }
1233
1234 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1235 return bfd_arch_unknown;
1236 }
1237
1238 unsigned long
1239 ppc_mach (void)
1240 {
1241 if (ppc_obj64)
1242 return bfd_mach_ppc64;
1243 else if (ppc_arch () == bfd_arch_rs6000)
1244 return bfd_mach_rs6k;
1245 else
1246 return bfd_mach_ppc;
1247 }
1248
1249 extern char*
1250 ppc_target_format (void)
1251 {
1252 #ifdef OBJ_COFF
1253 #ifdef TE_PE
1254 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1255 #elif TE_POWERMAC
1256 return "xcoff-powermac";
1257 #else
1258 # ifdef TE_AIX5
1259 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1260 # else
1261 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1262 # endif
1263 #endif
1264 #endif
1265 #ifdef OBJ_ELF
1266 # ifdef TE_VXWORKS
1267 return "elf32-powerpc-vxworks";
1268 # else
1269 return (target_big_endian
1270 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1271 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1272 # endif
1273 #endif
1274 }
1275
1276 /* Insert opcodes and macros into hash tables. Called at startup and
1277 for .cpu pseudo. */
1278
1279 static void
1280 ppc_setup_opcodes (void)
1281 {
1282 const struct powerpc_opcode *op;
1283 const struct powerpc_opcode *op_end;
1284 const struct powerpc_macro *macro;
1285 const struct powerpc_macro *macro_end;
1286 bfd_boolean bad_insn = FALSE;
1287
1288 if (ppc_hash != NULL)
1289 hash_die (ppc_hash);
1290 if (ppc_macro_hash != NULL)
1291 hash_die (ppc_macro_hash);
1292
1293 /* Insert the opcodes into a hash table. */
1294 ppc_hash = hash_new ();
1295
1296 if (ENABLE_CHECKING)
1297 {
1298 unsigned int i;
1299
1300 /* Check operand masks. Code here and in the disassembler assumes
1301 all the 1's in the mask are contiguous. */
1302 for (i = 0; i < num_powerpc_operands; ++i)
1303 {
1304 unsigned long mask = powerpc_operands[i].bitm;
1305 unsigned long right_bit;
1306 unsigned int j;
1307
1308 right_bit = mask & -mask;
1309 mask += right_bit;
1310 right_bit = mask & -mask;
1311 if (mask != right_bit)
1312 {
1313 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1314 bad_insn = TRUE;
1315 }
1316 for (j = i + 1; j < num_powerpc_operands; ++j)
1317 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1318 sizeof (powerpc_operands[0])) == 0)
1319 {
1320 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1321 j, i);
1322 bad_insn = TRUE;
1323 }
1324 }
1325 }
1326
1327 op_end = powerpc_opcodes + powerpc_num_opcodes;
1328 for (op = powerpc_opcodes; op < op_end; op++)
1329 {
1330 if (ENABLE_CHECKING)
1331 {
1332 const unsigned char *o;
1333 unsigned long omask = op->mask;
1334
1335 if (op != powerpc_opcodes)
1336 {
1337 /* The major opcodes had better be sorted. Code in the
1338 disassembler assumes the insns are sorted according to
1339 major opcode. */
1340 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1341 {
1342 as_bad (_("major opcode is not sorted for %s"),
1343 op->name);
1344 bad_insn = TRUE;
1345 }
1346
1347 /* Warn if the table isn't more strictly ordered.
1348 Unfortunately it doesn't seem possible to order the
1349 table on much more than the major opcode, which makes
1350 it difficult to implement a binary search in the
1351 disassembler. The problem is that we have multiple
1352 ways to disassemble instructions, and we usually want
1353 to choose a more specific form (with more bits set in
1354 the opcode) than a more general form. eg. all of the
1355 following are equivalent:
1356 bne label # opcode = 0x40820000, mask = 0xff830003
1357 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1358 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1359
1360 There are also cases where the table needs to be out
1361 of order to disassemble the correct instruction for
1362 processor variants. eg. "lhae" booke64 insn must be
1363 found before "ld" ppc64 insn. */
1364 else if (0)
1365 {
1366 unsigned long t1 = op[0].opcode;
1367 unsigned long t2 = op[-1].opcode;
1368
1369 if (((t1 ^ t2) & 0xfc0007ff) == 0
1370 && (t1 & 0xfc0006df) == 0x7c000286)
1371 {
1372 /* spr field is split. */
1373 t1 = ((t1 & ~0x1ff800)
1374 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1375 t2 = ((t2 & ~0x1ff800)
1376 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1377 }
1378 if (t1 < t2)
1379 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1380 op[0].name, op[0].opcode, op[0].mask,
1381 op[-1].name, op[-1].opcode, op[-1].mask);
1382 }
1383 }
1384
1385 /* The mask had better not trim off opcode bits. */
1386 if ((op->opcode & omask) != op->opcode)
1387 {
1388 as_bad (_("mask trims opcode bits for %s"),
1389 op->name);
1390 bad_insn = TRUE;
1391 }
1392
1393 /* The operands must not overlap the opcode or each other. */
1394 for (o = op->operands; *o; ++o)
1395 if (*o >= num_powerpc_operands)
1396 {
1397 as_bad (_("operand index error for %s"),
1398 op->name);
1399 bad_insn = TRUE;
1400 }
1401 else
1402 {
1403 const struct powerpc_operand *operand = &powerpc_operands[*o];
1404 if (operand->shift >= 0)
1405 {
1406 unsigned long mask = operand->bitm << operand->shift;
1407 if (omask & mask)
1408 {
1409 as_bad (_("operand %d overlap in %s"),
1410 (int) (o - op->operands), op->name);
1411 bad_insn = TRUE;
1412 }
1413 omask |= mask;
1414 }
1415 }
1416 }
1417
1418 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
1419 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
1420 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1421 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
1422 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
1423 /* Certain instructions (eg: extsw) do not exist in the
1424 32-bit BookE instruction set, but they do exist in the
1425 64-bit BookE instruction set, and other PPC instruction
1426 sets. Check to see if the opcode has the BOOKE64 flag set.
1427 If it does make sure that the target CPU is not the BookE32. */
1428 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1429 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1430 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
1431 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1432 || ((op->flags & PPC_OPCODE_POWER4)
1433 == (ppc_cpu & PPC_OPCODE_POWER4)))
1434 && ((op->flags & PPC_OPCODE_POWER5) == 0
1435 || ((op->flags & PPC_OPCODE_POWER5)
1436 == (ppc_cpu & PPC_OPCODE_POWER5)))
1437 && ((op->flags & PPC_OPCODE_POWER6) == 0
1438 || ((op->flags & PPC_OPCODE_POWER6)
1439 == (ppc_cpu & PPC_OPCODE_POWER6))))
1440 {
1441 const char *retval;
1442
1443 retval = hash_insert (ppc_hash, op->name, (void *) op);
1444 if (retval != NULL)
1445 {
1446 /* Ignore Power duplicates for -m601. */
1447 if ((ppc_cpu & PPC_OPCODE_601) != 0
1448 && (op->flags & PPC_OPCODE_POWER) != 0)
1449 continue;
1450
1451 as_bad (_("duplicate instruction %s"),
1452 op->name);
1453 bad_insn = TRUE;
1454 }
1455 }
1456 }
1457
1458 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1459 for (op = powerpc_opcodes; op < op_end; op++)
1460 hash_insert (ppc_hash, op->name, (void *) op);
1461
1462 /* Insert the macros into a hash table. */
1463 ppc_macro_hash = hash_new ();
1464
1465 macro_end = powerpc_macros + powerpc_num_macros;
1466 for (macro = powerpc_macros; macro < macro_end; macro++)
1467 {
1468 if ((macro->flags & ppc_cpu) != 0)
1469 {
1470 const char *retval;
1471
1472 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1473 if (retval != (const char *) NULL)
1474 {
1475 as_bad (_("duplicate macro %s"), macro->name);
1476 bad_insn = TRUE;
1477 }
1478 }
1479 }
1480
1481 if (bad_insn)
1482 abort ();
1483 }
1484
1485 /* This function is called when the assembler starts up. It is called
1486 after the options have been parsed and the output file has been
1487 opened. */
1488
1489 void
1490 md_begin (void)
1491 {
1492 ppc_set_cpu ();
1493
1494 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1495
1496 #ifdef OBJ_ELF
1497 /* Set the ELF flags if desired. */
1498 if (ppc_flags && !msolaris)
1499 bfd_set_private_flags (stdoutput, ppc_flags);
1500 #endif
1501
1502 ppc_setup_opcodes ();
1503
1504 /* Tell the main code what the endianness is if it is not overridden
1505 by the user. */
1506 if (!set_target_endian)
1507 {
1508 set_target_endian = 1;
1509 target_big_endian = PPC_BIG_ENDIAN;
1510 }
1511
1512 #ifdef OBJ_XCOFF
1513 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1514
1515 /* Create dummy symbols to serve as initial csects. This forces the
1516 text csects to precede the data csects. These symbols will not
1517 be output. */
1518 ppc_text_csects = symbol_make ("dummy\001");
1519 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1520 ppc_data_csects = symbol_make ("dummy\001");
1521 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1522 #endif
1523
1524 #ifdef TE_PE
1525
1526 ppc_current_section = text_section;
1527 ppc_previous_section = 0;
1528
1529 #endif
1530 }
1531
1532 void
1533 ppc_cleanup (void)
1534 {
1535 #ifdef OBJ_ELF
1536 if (ppc_apuinfo_list == NULL)
1537 return;
1538
1539 /* Ok, so write the section info out. We have this layout:
1540
1541 byte data what
1542 ---- ---- ----
1543 0 8 length of "APUinfo\0"
1544 4 (n*4) number of APU's (4 bytes each)
1545 8 2 note type 2
1546 12 "APUinfo\0" name
1547 20 APU#1 first APU's info
1548 24 APU#2 second APU's info
1549 ... ...
1550 */
1551 {
1552 char *p;
1553 asection *seg = now_seg;
1554 subsegT subseg = now_subseg;
1555 asection *apuinfo_secp = (asection *) NULL;
1556 unsigned int i;
1557
1558 /* Create the .PPC.EMB.apuinfo section. */
1559 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1560 bfd_set_section_flags (stdoutput,
1561 apuinfo_secp,
1562 SEC_HAS_CONTENTS | SEC_READONLY);
1563
1564 p = frag_more (4);
1565 md_number_to_chars (p, (valueT) 8, 4);
1566
1567 p = frag_more (4);
1568 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1569
1570 p = frag_more (4);
1571 md_number_to_chars (p, (valueT) 2, 4);
1572
1573 p = frag_more (8);
1574 strcpy (p, "APUinfo");
1575
1576 for (i = 0; i < ppc_apuinfo_num; i++)
1577 {
1578 p = frag_more (4);
1579 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1580 }
1581
1582 frag_align (2, 0, 0);
1583
1584 /* We probably can't restore the current segment, for there likely
1585 isn't one yet... */
1586 if (seg && subseg)
1587 subseg_set (seg, subseg);
1588 }
1589 #endif
1590 }
1591
1592 /* Insert an operand value into an instruction. */
1593
1594 static unsigned long
1595 ppc_insert_operand (unsigned long insn,
1596 const struct powerpc_operand *operand,
1597 offsetT val,
1598 ppc_cpu_t ppc_cpu,
1599 char *file,
1600 unsigned int line)
1601 {
1602 long min, max, right;
1603
1604 max = operand->bitm;
1605 right = max & -max;
1606 min = 0;
1607
1608 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1609 {
1610 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
1611 max = (max >> 1) & -right;
1612 min = ~max & -right;
1613 }
1614
1615 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1616 max++;
1617
1618 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1619 {
1620 long tmp = min;
1621 min = -max;
1622 max = -tmp;
1623 }
1624
1625 if (min <= max)
1626 {
1627 /* Some people write constants with the sign extension done by
1628 hand but only up to 32 bits. This shouldn't really be valid,
1629 but, to permit this code to assemble on a 64-bit host, we
1630 sign extend the 32-bit value to 64 bits if so doing makes the
1631 value valid. */
1632 if (val > max
1633 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1634 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1635 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1636 val = val - 0x80000000 - 0x80000000;
1637
1638 /* Similarly, people write expressions like ~(1<<15), and expect
1639 this to be OK for a 32-bit unsigned value. */
1640 else if (val < min
1641 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1642 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1643 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1644 val = val + 0x80000000 + 0x80000000;
1645
1646 else if (val < min
1647 || val > max
1648 || (val & (right - 1)) != 0)
1649 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1650 }
1651
1652 if (operand->insert)
1653 {
1654 const char *errmsg;
1655
1656 errmsg = NULL;
1657 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
1658 if (errmsg != (const char *) NULL)
1659 as_bad_where (file, line, errmsg);
1660 }
1661 else
1662 insn |= ((long) val & operand->bitm) << operand->shift;
1663
1664 return insn;
1665 }
1666
1667 \f
1668 #ifdef OBJ_ELF
1669 /* Parse @got, etc. and return the desired relocation. */
1670 static bfd_reloc_code_real_type
1671 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1672 {
1673 struct map_bfd {
1674 char *string;
1675 unsigned int length : 8;
1676 unsigned int valid32 : 1;
1677 unsigned int valid64 : 1;
1678 unsigned int reloc;
1679 };
1680
1681 char ident[20];
1682 char *str = *str_p;
1683 char *str2;
1684 int ch;
1685 int len;
1686 const struct map_bfd *ptr;
1687
1688 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1689 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1690 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1691
1692 static const struct map_bfd mapping[] = {
1693 MAP ("l", BFD_RELOC_LO16),
1694 MAP ("h", BFD_RELOC_HI16),
1695 MAP ("ha", BFD_RELOC_HI16_S),
1696 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1697 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1698 MAP ("got", BFD_RELOC_16_GOTOFF),
1699 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1700 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1701 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1702 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1703 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1704 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1705 MAP ("copy", BFD_RELOC_PPC_COPY),
1706 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1707 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1708 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1709 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1710 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1711 MAP ("tls", BFD_RELOC_PPC_TLS),
1712 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1713 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1714 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1715 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1716 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1717 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1718 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1719 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1720 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1721 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1722 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1723 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1724 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1725 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1726 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1727 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1728 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1729 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1730 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1731 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1732 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1733 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1734 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1735 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1736 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1737 MAP32 ("fixup", BFD_RELOC_CTOR),
1738 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1739 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1740 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1741 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1742 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1743 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1744 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1745 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1746 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1747 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1748 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1749 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1750 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1751 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1752 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1753 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1754 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1755 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1756 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1757 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1758 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1759 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1760 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1761 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1762 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1763 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1764 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1765 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1766 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1767 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1768 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1769 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1770 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1771 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1772 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1773 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1774 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1775 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1776 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1777 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1778 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
1779 };
1780
1781 if (*str++ != '@')
1782 return BFD_RELOC_UNUSED;
1783
1784 for (ch = *str, str2 = ident;
1785 (str2 < ident + sizeof (ident) - 1
1786 && (ISALNUM (ch) || ch == '@'));
1787 ch = *++str)
1788 {
1789 *str2++ = TOLOWER (ch);
1790 }
1791
1792 *str2 = '\0';
1793 len = str2 - ident;
1794
1795 ch = ident[0];
1796 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1797 if (ch == ptr->string[0]
1798 && len == ptr->length
1799 && memcmp (ident, ptr->string, ptr->length) == 0
1800 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
1801 {
1802 int reloc = ptr->reloc;
1803
1804 if (!ppc_obj64)
1805 if (exp_p->X_add_number != 0
1806 && (reloc == (int) BFD_RELOC_16_GOTOFF
1807 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1808 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1809 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1810 as_warn (_("identifier+constant@got means identifier@got+constant"));
1811
1812 /* Now check for identifier@suffix+constant. */
1813 if (*str == '-' || *str == '+')
1814 {
1815 char *orig_line = input_line_pointer;
1816 expressionS new_exp;
1817
1818 input_line_pointer = str;
1819 expression (&new_exp);
1820 if (new_exp.X_op == O_constant)
1821 {
1822 exp_p->X_add_number += new_exp.X_add_number;
1823 str = input_line_pointer;
1824 }
1825
1826 if (&input_line_pointer != str_p)
1827 input_line_pointer = orig_line;
1828 }
1829 *str_p = str;
1830
1831 if (reloc == (int) BFD_RELOC_PPC64_TOC
1832 && exp_p->X_op == O_symbol
1833 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
1834 {
1835 /* Change the symbol so that the dummy .TOC. symbol can be
1836 omitted from the object file. */
1837 exp_p->X_add_symbol = &abs_symbol;
1838 }
1839
1840 return (bfd_reloc_code_real_type) reloc;
1841 }
1842
1843 return BFD_RELOC_UNUSED;
1844 }
1845
1846 /* Like normal .long/.short/.word, except support @got, etc.
1847 Clobbers input_line_pointer, checks end-of-line. */
1848 static void
1849 ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
1850 {
1851 expressionS exp;
1852 bfd_reloc_code_real_type reloc;
1853
1854 if (is_it_end_of_statement ())
1855 {
1856 demand_empty_rest_of_line ();
1857 return;
1858 }
1859
1860 do
1861 {
1862 expression (&exp);
1863 if (exp.X_op == O_symbol
1864 && *input_line_pointer == '@'
1865 && (reloc = ppc_elf_suffix (&input_line_pointer,
1866 &exp)) != BFD_RELOC_UNUSED)
1867 {
1868 reloc_howto_type *reloc_howto;
1869 int size;
1870
1871 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1872 size = bfd_get_reloc_size (reloc_howto);
1873
1874 if (size > nbytes)
1875 {
1876 as_bad (_("%s relocations do not fit in %d bytes\n"),
1877 reloc_howto->name, nbytes);
1878 }
1879 else
1880 {
1881 char *p;
1882 int offset;
1883
1884 p = frag_more (nbytes);
1885 offset = 0;
1886 if (target_big_endian)
1887 offset = nbytes - size;
1888 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1889 &exp, 0, reloc);
1890 }
1891 }
1892 else
1893 emit_expr (&exp, (unsigned int) nbytes);
1894 }
1895 while (*input_line_pointer++ == ',');
1896
1897 /* Put terminator back into stream. */
1898 input_line_pointer--;
1899 demand_empty_rest_of_line ();
1900 }
1901
1902 /* Solaris pseduo op to change to the .rodata section. */
1903 static void
1904 ppc_elf_rdata (int xxx)
1905 {
1906 char *save_line = input_line_pointer;
1907 static char section[] = ".rodata\n";
1908
1909 /* Just pretend this is .section .rodata */
1910 input_line_pointer = section;
1911 obj_elf_section (xxx);
1912
1913 input_line_pointer = save_line;
1914 }
1915
1916 /* Pseudo op to make file scope bss items. */
1917 static void
1918 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
1919 {
1920 char *name;
1921 char c;
1922 char *p;
1923 offsetT size;
1924 symbolS *symbolP;
1925 offsetT align;
1926 segT old_sec;
1927 int old_subsec;
1928 char *pfrag;
1929 int align2;
1930
1931 name = input_line_pointer;
1932 c = get_symbol_end ();
1933
1934 /* just after name is now '\0'. */
1935 p = input_line_pointer;
1936 *p = c;
1937 SKIP_WHITESPACE ();
1938 if (*input_line_pointer != ',')
1939 {
1940 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1941 ignore_rest_of_line ();
1942 return;
1943 }
1944
1945 input_line_pointer++; /* skip ',' */
1946 if ((size = get_absolute_expression ()) < 0)
1947 {
1948 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1949 ignore_rest_of_line ();
1950 return;
1951 }
1952
1953 /* The third argument to .lcomm is the alignment. */
1954 if (*input_line_pointer != ',')
1955 align = 8;
1956 else
1957 {
1958 ++input_line_pointer;
1959 align = get_absolute_expression ();
1960 if (align <= 0)
1961 {
1962 as_warn (_("ignoring bad alignment"));
1963 align = 8;
1964 }
1965 }
1966
1967 *p = 0;
1968 symbolP = symbol_find_or_make (name);
1969 *p = c;
1970
1971 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1972 {
1973 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1974 S_GET_NAME (symbolP));
1975 ignore_rest_of_line ();
1976 return;
1977 }
1978
1979 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1980 {
1981 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1982 S_GET_NAME (symbolP),
1983 (long) S_GET_VALUE (symbolP),
1984 (long) size);
1985
1986 ignore_rest_of_line ();
1987 return;
1988 }
1989
1990 /* Allocate_bss. */
1991 old_sec = now_seg;
1992 old_subsec = now_subseg;
1993 if (align)
1994 {
1995 /* Convert to a power of 2 alignment. */
1996 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1997 if (align != 1)
1998 {
1999 as_bad (_("Common alignment not a power of 2"));
2000 ignore_rest_of_line ();
2001 return;
2002 }
2003 }
2004 else
2005 align2 = 0;
2006
2007 record_alignment (bss_section, align2);
2008 subseg_set (bss_section, 0);
2009 if (align2)
2010 frag_align (align2, 0, 0);
2011 if (S_GET_SEGMENT (symbolP) == bss_section)
2012 symbol_get_frag (symbolP)->fr_symbol = 0;
2013 symbol_set_frag (symbolP, frag_now);
2014 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2015 (char *) 0);
2016 *pfrag = 0;
2017 S_SET_SIZE (symbolP, size);
2018 S_SET_SEGMENT (symbolP, bss_section);
2019 subseg_set (old_sec, old_subsec);
2020 demand_empty_rest_of_line ();
2021 }
2022
2023 /* Validate any relocations emitted for -mrelocatable, possibly adding
2024 fixups for word relocations in writable segments, so we can adjust
2025 them at runtime. */
2026 static void
2027 ppc_elf_validate_fix (fixS *fixp, segT seg)
2028 {
2029 if (fixp->fx_done || fixp->fx_pcrel)
2030 return;
2031
2032 switch (shlib)
2033 {
2034 case SHLIB_NONE:
2035 case SHLIB_PIC:
2036 return;
2037
2038 case SHLIB_MRELOCATABLE:
2039 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2040 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2041 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2042 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2043 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2044 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2045 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2046 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2047 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2048 && (seg->flags & SEC_LOAD) != 0
2049 && strcmp (segment_name (seg), ".got2") != 0
2050 && strcmp (segment_name (seg), ".dtors") != 0
2051 && strcmp (segment_name (seg), ".ctors") != 0
2052 && strcmp (segment_name (seg), ".fixup") != 0
2053 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2054 && strcmp (segment_name (seg), ".eh_frame") != 0
2055 && strcmp (segment_name (seg), ".ex_shared") != 0)
2056 {
2057 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2058 || fixp->fx_r_type != BFD_RELOC_CTOR)
2059 {
2060 as_bad_where (fixp->fx_file, fixp->fx_line,
2061 _("Relocation cannot be done when using -mrelocatable"));
2062 }
2063 }
2064 return;
2065 }
2066 }
2067
2068 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2069 function descriptor sym if the corresponding code sym is used. */
2070
2071 void
2072 ppc_frob_file_before_adjust (void)
2073 {
2074 symbolS *symp;
2075 asection *toc;
2076
2077 if (!ppc_obj64)
2078 return;
2079
2080 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2081 {
2082 const char *name;
2083 char *dotname;
2084 symbolS *dotsym;
2085 size_t len;
2086
2087 name = S_GET_NAME (symp);
2088 if (name[0] == '.')
2089 continue;
2090
2091 if (! S_IS_WEAK (symp)
2092 || S_IS_DEFINED (symp))
2093 continue;
2094
2095 len = strlen (name) + 1;
2096 dotname = xmalloc (len + 1);
2097 dotname[0] = '.';
2098 memcpy (dotname + 1, name, len);
2099 dotsym = symbol_find_noref (dotname, 1);
2100 free (dotname);
2101 if (dotsym != NULL && (symbol_used_p (dotsym)
2102 || symbol_used_in_reloc_p (dotsym)))
2103 symbol_mark_used (symp);
2104
2105 }
2106
2107 toc = bfd_get_section_by_name (stdoutput, ".toc");
2108 if (toc != NULL
2109 && bfd_section_size (stdoutput, toc) > 0x10000)
2110 as_warn (_("TOC section size exceeds 64k"));
2111
2112 /* Don't emit .TOC. symbol. */
2113 symp = symbol_find (".TOC.");
2114 if (symp != NULL)
2115 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2116 }
2117 #endif /* OBJ_ELF */
2118 \f
2119 #ifdef TE_PE
2120
2121 /*
2122 * Summary of parse_toc_entry.
2123 *
2124 * in: Input_line_pointer points to the '[' in one of:
2125 *
2126 * [toc] [tocv] [toc32] [toc64]
2127 *
2128 * Anything else is an error of one kind or another.
2129 *
2130 * out:
2131 * return value: success or failure
2132 * toc_kind: kind of toc reference
2133 * input_line_pointer:
2134 * success: first char after the ']'
2135 * failure: unchanged
2136 *
2137 * settings:
2138 *
2139 * [toc] - rv == success, toc_kind = default_toc
2140 * [tocv] - rv == success, toc_kind = data_in_toc
2141 * [toc32] - rv == success, toc_kind = must_be_32
2142 * [toc64] - rv == success, toc_kind = must_be_64
2143 *
2144 */
2145
2146 enum toc_size_qualifier
2147 {
2148 default_toc, /* The toc cell constructed should be the system default size */
2149 data_in_toc, /* This is a direct reference to a toc cell */
2150 must_be_32, /* The toc cell constructed must be 32 bits wide */
2151 must_be_64 /* The toc cell constructed must be 64 bits wide */
2152 };
2153
2154 static int
2155 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2156 {
2157 char *start;
2158 char *toc_spec;
2159 char c;
2160 enum toc_size_qualifier t;
2161
2162 /* Save the input_line_pointer. */
2163 start = input_line_pointer;
2164
2165 /* Skip over the '[' , and whitespace. */
2166 ++input_line_pointer;
2167 SKIP_WHITESPACE ();
2168
2169 /* Find the spelling of the operand. */
2170 toc_spec = input_line_pointer;
2171 c = get_symbol_end ();
2172
2173 if (strcmp (toc_spec, "toc") == 0)
2174 {
2175 t = default_toc;
2176 }
2177 else if (strcmp (toc_spec, "tocv") == 0)
2178 {
2179 t = data_in_toc;
2180 }
2181 else if (strcmp (toc_spec, "toc32") == 0)
2182 {
2183 t = must_be_32;
2184 }
2185 else if (strcmp (toc_spec, "toc64") == 0)
2186 {
2187 t = must_be_64;
2188 }
2189 else
2190 {
2191 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2192 *input_line_pointer = c;
2193 input_line_pointer = start;
2194 return 0;
2195 }
2196
2197 /* Now find the ']'. */
2198 *input_line_pointer = c;
2199
2200 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2201 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2202
2203 if (c != ']')
2204 {
2205 as_bad (_("syntax error: expected `]', found `%c'"), c);
2206 input_line_pointer = start;
2207 return 0;
2208 }
2209
2210 *toc_kind = t;
2211 return 1;
2212 }
2213 #endif
2214 \f
2215
2216 #ifdef OBJ_ELF
2217 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2218 static void
2219 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2220 {
2221 unsigned int i;
2222
2223 /* Check we don't already exist. */
2224 for (i = 0; i < ppc_apuinfo_num; i++)
2225 if (ppc_apuinfo_list[i] == APUID (apu, version))
2226 return;
2227
2228 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2229 {
2230 if (ppc_apuinfo_num_alloc == 0)
2231 {
2232 ppc_apuinfo_num_alloc = 4;
2233 ppc_apuinfo_list = (unsigned long *)
2234 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2235 }
2236 else
2237 {
2238 ppc_apuinfo_num_alloc += 4;
2239 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2240 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2241 }
2242 }
2243 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2244 }
2245 #undef APUID
2246 #endif
2247 \f
2248
2249 /* We need to keep a list of fixups. We can't simply generate them as
2250 we go, because that would require us to first create the frag, and
2251 that would screw up references to ``.''. */
2252
2253 struct ppc_fixup
2254 {
2255 expressionS exp;
2256 int opindex;
2257 bfd_reloc_code_real_type reloc;
2258 };
2259
2260 #define MAX_INSN_FIXUPS (5)
2261
2262 /* This routine is called for each instruction to be assembled. */
2263
2264 void
2265 md_assemble (char *str)
2266 {
2267 char *s;
2268 const struct powerpc_opcode *opcode;
2269 unsigned long insn;
2270 const unsigned char *opindex_ptr;
2271 int skip_optional;
2272 int need_paren;
2273 int next_opindex;
2274 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2275 int fc;
2276 char *f;
2277 int addr_mod;
2278 int i;
2279 #ifdef OBJ_ELF
2280 bfd_reloc_code_real_type reloc;
2281 #endif
2282
2283 /* Get the opcode. */
2284 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2285 ;
2286 if (*s != '\0')
2287 *s++ = '\0';
2288
2289 /* Look up the opcode in the hash table. */
2290 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2291 if (opcode == (const struct powerpc_opcode *) NULL)
2292 {
2293 const struct powerpc_macro *macro;
2294
2295 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2296 if (macro == (const struct powerpc_macro *) NULL)
2297 as_bad (_("Unrecognized opcode: `%s'"), str);
2298 else
2299 ppc_macro (s, macro);
2300
2301 return;
2302 }
2303
2304 insn = opcode->opcode;
2305
2306 str = s;
2307 while (ISSPACE (*str))
2308 ++str;
2309
2310 /* PowerPC operands are just expressions. The only real issue is
2311 that a few operand types are optional. All cases which might use
2312 an optional operand separate the operands only with commas (in some
2313 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2314 have optional operands). Most instructions with optional operands
2315 have only one. Those that have more than one optional operand can
2316 take either all their operands or none. So, before we start seriously
2317 parsing the operands, we check to see if we have optional operands,
2318 and if we do, we count the number of commas to see which operands
2319 have been omitted. */
2320 skip_optional = 0;
2321 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2322 {
2323 const struct powerpc_operand *operand;
2324
2325 operand = &powerpc_operands[*opindex_ptr];
2326 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2327 {
2328 unsigned int opcount;
2329 unsigned int num_operands_expected;
2330 unsigned int i;
2331
2332 /* There is an optional operand. Count the number of
2333 commas in the input line. */
2334 if (*str == '\0')
2335 opcount = 0;
2336 else
2337 {
2338 opcount = 1;
2339 s = str;
2340 while ((s = strchr (s, ',')) != (char *) NULL)
2341 {
2342 ++opcount;
2343 ++s;
2344 }
2345 }
2346
2347 /* Compute the number of expected operands.
2348 Do not count fake operands. */
2349 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2350 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2351 ++ num_operands_expected;
2352
2353 /* If there are fewer operands in the line then are called
2354 for by the instruction, we want to skip the optional
2355 operands. */
2356 if (opcount < num_operands_expected)
2357 skip_optional = 1;
2358
2359 break;
2360 }
2361 }
2362
2363 /* Gather the operands. */
2364 need_paren = 0;
2365 next_opindex = 0;
2366 fc = 0;
2367 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2368 {
2369 const struct powerpc_operand *operand;
2370 const char *errmsg;
2371 char *hold;
2372 expressionS ex;
2373 char endc;
2374
2375 if (next_opindex == 0)
2376 operand = &powerpc_operands[*opindex_ptr];
2377 else
2378 {
2379 operand = &powerpc_operands[next_opindex];
2380 next_opindex = 0;
2381 }
2382 errmsg = NULL;
2383
2384 /* If this is a fake operand, then we do not expect anything
2385 from the input. */
2386 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2387 {
2388 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2389 if (errmsg != (const char *) NULL)
2390 as_bad (errmsg);
2391 continue;
2392 }
2393
2394 /* If this is an optional operand, and we are skipping it, just
2395 insert a zero. */
2396 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2397 && skip_optional)
2398 {
2399 if (operand->insert)
2400 {
2401 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2402 if (errmsg != (const char *) NULL)
2403 as_bad (errmsg);
2404 }
2405 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2406 next_opindex = *opindex_ptr + 1;
2407 continue;
2408 }
2409
2410 /* Gather the operand. */
2411 hold = input_line_pointer;
2412 input_line_pointer = str;
2413
2414 #ifdef TE_PE
2415 if (*input_line_pointer == '[')
2416 {
2417 /* We are expecting something like the second argument here:
2418 *
2419 * lwz r4,[toc].GS.0.static_int(rtoc)
2420 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2421 * The argument following the `]' must be a symbol name, and the
2422 * register must be the toc register: 'rtoc' or '2'
2423 *
2424 * The effect is to 0 as the displacement field
2425 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2426 * the appropriate variation) reloc against it based on the symbol.
2427 * The linker will build the toc, and insert the resolved toc offset.
2428 *
2429 * Note:
2430 * o The size of the toc entry is currently assumed to be
2431 * 32 bits. This should not be assumed to be a hard coded
2432 * number.
2433 * o In an effort to cope with a change from 32 to 64 bits,
2434 * there are also toc entries that are specified to be
2435 * either 32 or 64 bits:
2436 * lwz r4,[toc32].GS.0.static_int(rtoc)
2437 * lwz r4,[toc64].GS.0.static_int(rtoc)
2438 * These demand toc entries of the specified size, and the
2439 * instruction probably requires it.
2440 */
2441
2442 int valid_toc;
2443 enum toc_size_qualifier toc_kind;
2444 bfd_reloc_code_real_type toc_reloc;
2445
2446 /* Go parse off the [tocXX] part. */
2447 valid_toc = parse_toc_entry (&toc_kind);
2448
2449 if (!valid_toc)
2450 {
2451 /* Note: message has already been issued.
2452 FIXME: what sort of recovery should we do?
2453 demand_rest_of_line (); return; ? */
2454 }
2455
2456 /* Now get the symbol following the ']'. */
2457 expression (&ex);
2458
2459 switch (toc_kind)
2460 {
2461 case default_toc:
2462 /* In this case, we may not have seen the symbol yet,
2463 since it is allowed to appear on a .extern or .globl
2464 or just be a label in the .data section. */
2465 toc_reloc = BFD_RELOC_PPC_TOC16;
2466 break;
2467 case data_in_toc:
2468 /* 1. The symbol must be defined and either in the toc
2469 section, or a global.
2470 2. The reloc generated must have the TOCDEFN flag set
2471 in upper bit mess of the reloc type.
2472 FIXME: It's a little confusing what the tocv
2473 qualifier can be used for. At the very least, I've
2474 seen three uses, only one of which I'm sure I can
2475 explain. */
2476 if (ex.X_op == O_symbol)
2477 {
2478 assert (ex.X_add_symbol != NULL);
2479 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2480 != tocdata_section)
2481 {
2482 as_bad (_("[tocv] symbol is not a toc symbol"));
2483 }
2484 }
2485
2486 toc_reloc = BFD_RELOC_PPC_TOC16;
2487 break;
2488 case must_be_32:
2489 /* FIXME: these next two specifically specify 32/64 bit
2490 toc entries. We don't support them today. Is this
2491 the right way to say that? */
2492 toc_reloc = BFD_RELOC_UNUSED;
2493 as_bad (_("Unimplemented toc32 expression modifier"));
2494 break;
2495 case must_be_64:
2496 /* FIXME: see above. */
2497 toc_reloc = BFD_RELOC_UNUSED;
2498 as_bad (_("Unimplemented toc64 expression modifier"));
2499 break;
2500 default:
2501 fprintf (stderr,
2502 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2503 toc_kind);
2504 abort ();
2505 break;
2506 }
2507
2508 /* We need to generate a fixup for this expression. */
2509 if (fc >= MAX_INSN_FIXUPS)
2510 as_fatal (_("too many fixups"));
2511
2512 fixups[fc].reloc = toc_reloc;
2513 fixups[fc].exp = ex;
2514 fixups[fc].opindex = *opindex_ptr;
2515 ++fc;
2516
2517 /* Ok. We've set up the fixup for the instruction. Now make it
2518 look like the constant 0 was found here. */
2519 ex.X_unsigned = 1;
2520 ex.X_op = O_constant;
2521 ex.X_add_number = 0;
2522 ex.X_add_symbol = NULL;
2523 ex.X_op_symbol = NULL;
2524 }
2525
2526 else
2527 #endif /* TE_PE */
2528 {
2529 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2530 || !register_name (&ex))
2531 {
2532 char save_lex = lex_type['%'];
2533
2534 if ((operand->flags & PPC_OPERAND_CR) != 0)
2535 {
2536 cr_operand = TRUE;
2537 lex_type['%'] |= LEX_BEGIN_NAME;
2538 }
2539 expression (&ex);
2540 cr_operand = FALSE;
2541 lex_type['%'] = save_lex;
2542 }
2543 }
2544
2545 str = input_line_pointer;
2546 input_line_pointer = hold;
2547
2548 if (ex.X_op == O_illegal)
2549 as_bad (_("illegal operand"));
2550 else if (ex.X_op == O_absent)
2551 as_bad (_("missing operand"));
2552 else if (ex.X_op == O_register)
2553 {
2554 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2555 ppc_cpu, (char *) NULL, 0);
2556 }
2557 else if (ex.X_op == O_constant)
2558 {
2559 #ifdef OBJ_ELF
2560 /* Allow @HA, @L, @H on constants. */
2561 char *orig_str = str;
2562
2563 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2564 switch (reloc)
2565 {
2566 default:
2567 str = orig_str;
2568 break;
2569
2570 case BFD_RELOC_LO16:
2571 /* X_unsigned is the default, so if the user has done
2572 something which cleared it, we always produce a
2573 signed value. */
2574 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2575 ex.X_add_number &= 0xffff;
2576 else
2577 ex.X_add_number = SEX16 (ex.X_add_number);
2578 break;
2579
2580 case BFD_RELOC_HI16:
2581 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2582 ex.X_add_number = PPC_HI (ex.X_add_number);
2583 else
2584 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
2585 break;
2586
2587 case BFD_RELOC_HI16_S:
2588 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2589 ex.X_add_number = PPC_HA (ex.X_add_number);
2590 else
2591 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2592 break;
2593
2594 case BFD_RELOC_PPC64_HIGHER:
2595 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2596 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2597 else
2598 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2599 break;
2600
2601 case BFD_RELOC_PPC64_HIGHER_S:
2602 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2603 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2604 else
2605 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
2606 break;
2607
2608 case BFD_RELOC_PPC64_HIGHEST:
2609 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2610 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2611 else
2612 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2613 break;
2614
2615 case BFD_RELOC_PPC64_HIGHEST_S:
2616 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2617 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2618 else
2619 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2620 break;
2621 }
2622 #endif /* OBJ_ELF */
2623 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2624 ppc_cpu, (char *) NULL, 0);
2625 }
2626 #ifdef OBJ_ELF
2627 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2628 {
2629 /* Some TLS tweaks. */
2630 switch (reloc)
2631 {
2632 default:
2633 break;
2634 case BFD_RELOC_PPC_TLS:
2635 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2636 ppc_cpu, (char *) NULL, 0);
2637 break;
2638 /* We'll only use the 32 (or 64) bit form of these relocations
2639 in constants. Instructions get the 16 bit form. */
2640 case BFD_RELOC_PPC_DTPREL:
2641 reloc = BFD_RELOC_PPC_DTPREL16;
2642 break;
2643 case BFD_RELOC_PPC_TPREL:
2644 reloc = BFD_RELOC_PPC_TPREL16;
2645 break;
2646 }
2647
2648 /* For the absolute forms of branches, convert the PC
2649 relative form back into the absolute. */
2650 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2651 {
2652 switch (reloc)
2653 {
2654 case BFD_RELOC_PPC_B26:
2655 reloc = BFD_RELOC_PPC_BA26;
2656 break;
2657 case BFD_RELOC_PPC_B16:
2658 reloc = BFD_RELOC_PPC_BA16;
2659 break;
2660 case BFD_RELOC_PPC_B16_BRTAKEN:
2661 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2662 break;
2663 case BFD_RELOC_PPC_B16_BRNTAKEN:
2664 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2665 break;
2666 default:
2667 break;
2668 }
2669 }
2670
2671 if (ppc_obj64
2672 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2673 {
2674 switch (reloc)
2675 {
2676 case BFD_RELOC_16:
2677 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2678 break;
2679 case BFD_RELOC_LO16:
2680 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2681 break;
2682 case BFD_RELOC_16_GOTOFF:
2683 reloc = BFD_RELOC_PPC64_GOT16_DS;
2684 break;
2685 case BFD_RELOC_LO16_GOTOFF:
2686 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2687 break;
2688 case BFD_RELOC_LO16_PLTOFF:
2689 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2690 break;
2691 case BFD_RELOC_16_BASEREL:
2692 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2693 break;
2694 case BFD_RELOC_LO16_BASEREL:
2695 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2696 break;
2697 case BFD_RELOC_PPC_TOC16:
2698 reloc = BFD_RELOC_PPC64_TOC16_DS;
2699 break;
2700 case BFD_RELOC_PPC64_TOC16_LO:
2701 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2702 break;
2703 case BFD_RELOC_PPC64_PLTGOT16:
2704 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2705 break;
2706 case BFD_RELOC_PPC64_PLTGOT16_LO:
2707 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2708 break;
2709 case BFD_RELOC_PPC_DTPREL16:
2710 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2711 break;
2712 case BFD_RELOC_PPC_DTPREL16_LO:
2713 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2714 break;
2715 case BFD_RELOC_PPC_TPREL16:
2716 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2717 break;
2718 case BFD_RELOC_PPC_TPREL16_LO:
2719 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2720 break;
2721 case BFD_RELOC_PPC_GOT_DTPREL16:
2722 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2723 case BFD_RELOC_PPC_GOT_TPREL16:
2724 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2725 break;
2726 default:
2727 as_bad (_("unsupported relocation for DS offset field"));
2728 break;
2729 }
2730 }
2731
2732 /* We need to generate a fixup for this expression. */
2733 if (fc >= MAX_INSN_FIXUPS)
2734 as_fatal (_("too many fixups"));
2735 fixups[fc].exp = ex;
2736 fixups[fc].opindex = 0;
2737 fixups[fc].reloc = reloc;
2738 ++fc;
2739 }
2740 #endif /* OBJ_ELF */
2741
2742 else
2743 {
2744 /* We need to generate a fixup for this expression. */
2745 if (fc >= MAX_INSN_FIXUPS)
2746 as_fatal (_("too many fixups"));
2747 fixups[fc].exp = ex;
2748 fixups[fc].opindex = *opindex_ptr;
2749 fixups[fc].reloc = BFD_RELOC_UNUSED;
2750 ++fc;
2751 }
2752
2753 if (need_paren)
2754 {
2755 endc = ')';
2756 need_paren = 0;
2757 /* If expecting more operands, then we want to see "),". */
2758 if (*str == endc && opindex_ptr[1] != 0)
2759 {
2760 do
2761 ++str;
2762 while (ISSPACE (*str));
2763 endc = ',';
2764 }
2765 }
2766 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2767 {
2768 endc = '(';
2769 need_paren = 1;
2770 }
2771 else
2772 endc = ',';
2773
2774 /* The call to expression should have advanced str past any
2775 whitespace. */
2776 if (*str != endc
2777 && (endc != ',' || *str != '\0'))
2778 {
2779 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2780 break;
2781 }
2782
2783 if (*str != '\0')
2784 ++str;
2785 }
2786
2787 while (ISSPACE (*str))
2788 ++str;
2789
2790 if (*str != '\0')
2791 as_bad (_("junk at end of line: `%s'"), str);
2792
2793 #ifdef OBJ_ELF
2794 /* Do we need/want a APUinfo section? */
2795 if (ppc_cpu & (PPC_OPCODE_SPE
2796 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2797 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2798 | PPC_OPCODE_RFMCI))
2799 {
2800 /* These are all version "1". */
2801 if (opcode->flags & PPC_OPCODE_SPE)
2802 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
2803 if (opcode->flags & PPC_OPCODE_ISEL)
2804 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
2805 if (opcode->flags & PPC_OPCODE_EFS)
2806 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
2807 if (opcode->flags & PPC_OPCODE_BRLOCK)
2808 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
2809 if (opcode->flags & PPC_OPCODE_PMR)
2810 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
2811 if (opcode->flags & PPC_OPCODE_CACHELCK)
2812 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
2813 if (opcode->flags & PPC_OPCODE_RFMCI)
2814 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
2815 }
2816 #endif
2817
2818 /* Write out the instruction. */
2819 f = frag_more (4);
2820 addr_mod = frag_now_fix () & 3;
2821 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2822 as_bad (_("instruction address is not a multiple of 4"));
2823 frag_now->insn_addr = addr_mod;
2824 frag_now->has_code = 1;
2825 md_number_to_chars (f, insn, 4);
2826
2827 #ifdef OBJ_ELF
2828 dwarf2_emit_insn (4);
2829 #endif
2830
2831 /* Create any fixups. At this point we do not use a
2832 bfd_reloc_code_real_type, but instead just use the
2833 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2834 handle fixups for any operand type, although that is admittedly
2835 not a very exciting feature. We pick a BFD reloc type in
2836 md_apply_fix. */
2837 for (i = 0; i < fc; i++)
2838 {
2839 const struct powerpc_operand *operand;
2840
2841 operand = &powerpc_operands[fixups[i].opindex];
2842 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2843 {
2844 reloc_howto_type *reloc_howto;
2845 int size;
2846 int offset;
2847 fixS *fixP;
2848
2849 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
2850 if (!reloc_howto)
2851 abort ();
2852
2853 size = bfd_get_reloc_size (reloc_howto);
2854 offset = target_big_endian ? (4 - size) : 0;
2855
2856 if (size < 1 || size > 4)
2857 abort ();
2858
2859 fixP = fix_new_exp (frag_now,
2860 f - frag_now->fr_literal + offset,
2861 size,
2862 &fixups[i].exp,
2863 reloc_howto->pc_relative,
2864 fixups[i].reloc);
2865
2866 /* Turn off complaints that the addend is too large for things like
2867 foo+100000@ha. */
2868 switch (fixups[i].reloc)
2869 {
2870 case BFD_RELOC_16_GOTOFF:
2871 case BFD_RELOC_PPC_TOC16:
2872 case BFD_RELOC_LO16:
2873 case BFD_RELOC_HI16:
2874 case BFD_RELOC_HI16_S:
2875 #ifdef OBJ_ELF
2876 case BFD_RELOC_PPC64_HIGHER:
2877 case BFD_RELOC_PPC64_HIGHER_S:
2878 case BFD_RELOC_PPC64_HIGHEST:
2879 case BFD_RELOC_PPC64_HIGHEST_S:
2880 #endif
2881 fixP->fx_no_overflow = 1;
2882 break;
2883 default:
2884 break;
2885 }
2886 }
2887 else
2888 fix_new_exp (frag_now,
2889 f - frag_now->fr_literal,
2890 4,
2891 &fixups[i].exp,
2892 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2893 ((bfd_reloc_code_real_type)
2894 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
2895 }
2896 }
2897
2898 /* Handle a macro. Gather all the operands, transform them as
2899 described by the macro, and call md_assemble recursively. All the
2900 operands are separated by commas; we don't accept parentheses
2901 around operands here. */
2902
2903 static void
2904 ppc_macro (char *str, const struct powerpc_macro *macro)
2905 {
2906 char *operands[10];
2907 unsigned int count;
2908 char *s;
2909 unsigned int len;
2910 const char *format;
2911 unsigned int arg;
2912 char *send;
2913 char *complete;
2914
2915 /* Gather the users operands into the operands array. */
2916 count = 0;
2917 s = str;
2918 while (1)
2919 {
2920 if (count >= sizeof operands / sizeof operands[0])
2921 break;
2922 operands[count++] = s;
2923 s = strchr (s, ',');
2924 if (s == (char *) NULL)
2925 break;
2926 *s++ = '\0';
2927 }
2928
2929 if (count != macro->operands)
2930 {
2931 as_bad (_("wrong number of operands"));
2932 return;
2933 }
2934
2935 /* Work out how large the string must be (the size is unbounded
2936 because it includes user input). */
2937 len = 0;
2938 format = macro->format;
2939 while (*format != '\0')
2940 {
2941 if (*format != '%')
2942 {
2943 ++len;
2944 ++format;
2945 }
2946 else
2947 {
2948 arg = strtol (format + 1, &send, 10);
2949 know (send != format && arg < count);
2950 len += strlen (operands[arg]);
2951 format = send;
2952 }
2953 }
2954
2955 /* Put the string together. */
2956 complete = s = (char *) alloca (len + 1);
2957 format = macro->format;
2958 while (*format != '\0')
2959 {
2960 if (*format != '%')
2961 *s++ = *format++;
2962 else
2963 {
2964 arg = strtol (format + 1, &send, 10);
2965 strcpy (s, operands[arg]);
2966 s += strlen (s);
2967 format = send;
2968 }
2969 }
2970 *s = '\0';
2971
2972 /* Assemble the constructed instruction. */
2973 md_assemble (complete);
2974 }
2975 \f
2976 #ifdef OBJ_ELF
2977 /* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
2978
2979 int
2980 ppc_section_letter (int letter, char **ptr_msg)
2981 {
2982 if (letter == 'e')
2983 return SHF_EXCLUDE;
2984
2985 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
2986 return -1;
2987 }
2988
2989 int
2990 ppc_section_word (char *str, size_t len)
2991 {
2992 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2993 return SHF_EXCLUDE;
2994
2995 return -1;
2996 }
2997
2998 int
2999 ppc_section_type (char *str, size_t len)
3000 {
3001 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3002 return SHT_ORDERED;
3003
3004 return -1;
3005 }
3006
3007 int
3008 ppc_section_flags (int flags, int attr, int type)
3009 {
3010 if (type == SHT_ORDERED)
3011 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3012
3013 if (attr & SHF_EXCLUDE)
3014 flags |= SEC_EXCLUDE;
3015
3016 return flags;
3017 }
3018 #endif /* OBJ_ELF */
3019
3020 \f
3021 /* Pseudo-op handling. */
3022
3023 /* The .byte pseudo-op. This is similar to the normal .byte
3024 pseudo-op, but it can also take a single ASCII string. */
3025
3026 static void
3027 ppc_byte (int ignore ATTRIBUTE_UNUSED)
3028 {
3029 if (*input_line_pointer != '\"')
3030 {
3031 cons (1);
3032 return;
3033 }
3034
3035 /* Gather characters. A real double quote is doubled. Unusual
3036 characters are not permitted. */
3037 ++input_line_pointer;
3038 while (1)
3039 {
3040 char c;
3041
3042 c = *input_line_pointer++;
3043
3044 if (c == '\"')
3045 {
3046 if (*input_line_pointer != '\"')
3047 break;
3048 ++input_line_pointer;
3049 }
3050
3051 FRAG_APPEND_1_CHAR (c);
3052 }
3053
3054 demand_empty_rest_of_line ();
3055 }
3056 \f
3057 #ifdef OBJ_XCOFF
3058
3059 /* XCOFF specific pseudo-op handling. */
3060
3061 /* This is set if we are creating a .stabx symbol, since we don't want
3062 to handle symbol suffixes for such symbols. */
3063 static bfd_boolean ppc_stab_symbol;
3064
3065 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3066 symbols in the .bss segment as though they were local common
3067 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3068 aligns .comm and .lcomm to 4 bytes. */
3069
3070 static void
3071 ppc_comm (int lcomm)
3072 {
3073 asection *current_seg = now_seg;
3074 subsegT current_subseg = now_subseg;
3075 char *name;
3076 char endc;
3077 char *end_name;
3078 offsetT size;
3079 offsetT align;
3080 symbolS *lcomm_sym = NULL;
3081 symbolS *sym;
3082 char *pfrag;
3083
3084 name = input_line_pointer;
3085 endc = get_symbol_end ();
3086 end_name = input_line_pointer;
3087 *end_name = endc;
3088
3089 if (*input_line_pointer != ',')
3090 {
3091 as_bad (_("missing size"));
3092 ignore_rest_of_line ();
3093 return;
3094 }
3095 ++input_line_pointer;
3096
3097 size = get_absolute_expression ();
3098 if (size < 0)
3099 {
3100 as_bad (_("negative size"));
3101 ignore_rest_of_line ();
3102 return;
3103 }
3104
3105 if (! lcomm)
3106 {
3107 /* The third argument to .comm is the alignment. */
3108 if (*input_line_pointer != ',')
3109 align = 2;
3110 else
3111 {
3112 ++input_line_pointer;
3113 align = get_absolute_expression ();
3114 if (align <= 0)
3115 {
3116 as_warn (_("ignoring bad alignment"));
3117 align = 2;
3118 }
3119 }
3120 }
3121 else
3122 {
3123 char *lcomm_name;
3124 char lcomm_endc;
3125
3126 if (size <= 4)
3127 align = 2;
3128 else
3129 align = 3;
3130
3131 /* The third argument to .lcomm appears to be the real local
3132 common symbol to create. References to the symbol named in
3133 the first argument are turned into references to the third
3134 argument. */
3135 if (*input_line_pointer != ',')
3136 {
3137 as_bad (_("missing real symbol name"));
3138 ignore_rest_of_line ();
3139 return;
3140 }
3141 ++input_line_pointer;
3142
3143 lcomm_name = input_line_pointer;
3144 lcomm_endc = get_symbol_end ();
3145
3146 lcomm_sym = symbol_find_or_make (lcomm_name);
3147
3148 *input_line_pointer = lcomm_endc;
3149 }
3150
3151 *end_name = '\0';
3152 sym = symbol_find_or_make (name);
3153 *end_name = endc;
3154
3155 if (S_IS_DEFINED (sym)
3156 || S_GET_VALUE (sym) != 0)
3157 {
3158 as_bad (_("attempt to redefine symbol"));
3159 ignore_rest_of_line ();
3160 return;
3161 }
3162
3163 record_alignment (bss_section, align);
3164
3165 if (! lcomm
3166 || ! S_IS_DEFINED (lcomm_sym))
3167 {
3168 symbolS *def_sym;
3169 offsetT def_size;
3170
3171 if (! lcomm)
3172 {
3173 def_sym = sym;
3174 def_size = size;
3175 S_SET_EXTERNAL (sym);
3176 }
3177 else
3178 {
3179 symbol_get_tc (lcomm_sym)->output = 1;
3180 def_sym = lcomm_sym;
3181 def_size = 0;
3182 }
3183
3184 subseg_set (bss_section, 1);
3185 frag_align (align, 0, 0);
3186
3187 symbol_set_frag (def_sym, frag_now);
3188 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3189 def_size, (char *) NULL);
3190 *pfrag = 0;
3191 S_SET_SEGMENT (def_sym, bss_section);
3192 symbol_get_tc (def_sym)->align = align;
3193 }
3194 else if (lcomm)
3195 {
3196 /* Align the size of lcomm_sym. */
3197 symbol_get_frag (lcomm_sym)->fr_offset =
3198 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3199 &~ ((1 << align) - 1));
3200 if (align > symbol_get_tc (lcomm_sym)->align)
3201 symbol_get_tc (lcomm_sym)->align = align;
3202 }
3203
3204 if (lcomm)
3205 {
3206 /* Make sym an offset from lcomm_sym. */
3207 S_SET_SEGMENT (sym, bss_section);
3208 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3209 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3210 symbol_get_frag (lcomm_sym)->fr_offset += size;
3211 }
3212
3213 subseg_set (current_seg, current_subseg);
3214
3215 demand_empty_rest_of_line ();
3216 }
3217
3218 /* The .csect pseudo-op. This switches us into a different
3219 subsegment. The first argument is a symbol whose value is the
3220 start of the .csect. In COFF, csect symbols get special aux
3221 entries defined by the x_csect field of union internal_auxent. The
3222 optional second argument is the alignment (the default is 2). */
3223
3224 static void
3225 ppc_csect (int ignore ATTRIBUTE_UNUSED)
3226 {
3227 char *name;
3228 char endc;
3229 symbolS *sym;
3230 offsetT align;
3231
3232 name = input_line_pointer;
3233 endc = get_symbol_end ();
3234
3235 sym = symbol_find_or_make (name);
3236
3237 *input_line_pointer = endc;
3238
3239 if (S_GET_NAME (sym)[0] == '\0')
3240 {
3241 /* An unnamed csect is assumed to be [PR]. */
3242 symbol_get_tc (sym)->class = XMC_PR;
3243 }
3244
3245 align = 2;
3246 if (*input_line_pointer == ',')
3247 {
3248 ++input_line_pointer;
3249 align = get_absolute_expression ();
3250 }
3251
3252 ppc_change_csect (sym, align);
3253
3254 demand_empty_rest_of_line ();
3255 }
3256
3257 /* Change to a different csect. */
3258
3259 static void
3260 ppc_change_csect (symbolS *sym, offsetT align)
3261 {
3262 if (S_IS_DEFINED (sym))
3263 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3264 else
3265 {
3266 symbolS **list_ptr;
3267 int after_toc;
3268 int hold_chunksize;
3269 symbolS *list;
3270 int is_code;
3271 segT sec;
3272
3273 /* This is a new csect. We need to look at the symbol class to
3274 figure out whether it should go in the text section or the
3275 data section. */
3276 after_toc = 0;
3277 is_code = 0;
3278 switch (symbol_get_tc (sym)->class)
3279 {
3280 case XMC_PR:
3281 case XMC_RO:
3282 case XMC_DB:
3283 case XMC_GL:
3284 case XMC_XO:
3285 case XMC_SV:
3286 case XMC_TI:
3287 case XMC_TB:
3288 S_SET_SEGMENT (sym, text_section);
3289 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3290 ++ppc_text_subsegment;
3291 list_ptr = &ppc_text_csects;
3292 is_code = 1;
3293 break;
3294 case XMC_RW:
3295 case XMC_TC0:
3296 case XMC_TC:
3297 case XMC_DS:
3298 case XMC_UA:
3299 case XMC_BS:
3300 case XMC_UC:
3301 if (ppc_toc_csect != NULL
3302 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3303 == ppc_data_subsegment))
3304 after_toc = 1;
3305 S_SET_SEGMENT (sym, data_section);
3306 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
3307 ++ppc_data_subsegment;
3308 list_ptr = &ppc_data_csects;
3309 break;
3310 default:
3311 abort ();
3312 }
3313
3314 /* We set the obstack chunk size to a small value before
3315 changing subsegments, so that we don't use a lot of memory
3316 space for what may be a small section. */
3317 hold_chunksize = chunksize;
3318 chunksize = 64;
3319
3320 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3321 symbol_get_tc (sym)->subseg);
3322
3323 chunksize = hold_chunksize;
3324
3325 if (after_toc)
3326 ppc_after_toc_frag = frag_now;
3327
3328 record_alignment (sec, align);
3329 if (is_code)
3330 frag_align_code (align, 0);
3331 else
3332 frag_align (align, 0, 0);
3333
3334 symbol_set_frag (sym, frag_now);
3335 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3336
3337 symbol_get_tc (sym)->align = align;
3338 symbol_get_tc (sym)->output = 1;
3339 symbol_get_tc (sym)->within = sym;
3340
3341 for (list = *list_ptr;
3342 symbol_get_tc (list)->next != (symbolS *) NULL;
3343 list = symbol_get_tc (list)->next)
3344 ;
3345 symbol_get_tc (list)->next = sym;
3346
3347 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3348 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3349 &symbol_lastP);
3350 }
3351
3352 ppc_current_csect = sym;
3353 }
3354
3355 /* This function handles the .text and .data pseudo-ops. These
3356 pseudo-ops aren't really used by XCOFF; we implement them for the
3357 convenience of people who aren't used to XCOFF. */
3358
3359 static void
3360 ppc_section (int type)
3361 {
3362 const char *name;
3363 symbolS *sym;
3364
3365 if (type == 't')
3366 name = ".text[PR]";
3367 else if (type == 'd')
3368 name = ".data[RW]";
3369 else
3370 abort ();
3371
3372 sym = symbol_find_or_make (name);
3373
3374 ppc_change_csect (sym, 2);
3375
3376 demand_empty_rest_of_line ();
3377 }
3378
3379 /* This function handles the .section pseudo-op. This is mostly to
3380 give an error, since XCOFF only supports .text, .data and .bss, but
3381 we do permit the user to name the text or data section. */
3382
3383 static void
3384 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
3385 {
3386 char *user_name;
3387 const char *real_name;
3388 char c;
3389 symbolS *sym;
3390
3391 user_name = input_line_pointer;
3392 c = get_symbol_end ();
3393
3394 if (strcmp (user_name, ".text") == 0)
3395 real_name = ".text[PR]";
3396 else if (strcmp (user_name, ".data") == 0)
3397 real_name = ".data[RW]";
3398 else
3399 {
3400 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3401 *input_line_pointer = c;
3402 ignore_rest_of_line ();
3403 return;
3404 }
3405
3406 *input_line_pointer = c;
3407
3408 sym = symbol_find_or_make (real_name);
3409
3410 ppc_change_csect (sym, 2);
3411
3412 demand_empty_rest_of_line ();
3413 }
3414
3415 /* The .extern pseudo-op. We create an undefined symbol. */
3416
3417 static void
3418 ppc_extern (int ignore ATTRIBUTE_UNUSED)
3419 {
3420 char *name;
3421 char endc;
3422
3423 name = input_line_pointer;
3424 endc = get_symbol_end ();
3425
3426 (void) symbol_find_or_make (name);
3427
3428 *input_line_pointer = endc;
3429
3430 demand_empty_rest_of_line ();
3431 }
3432
3433 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3434
3435 static void
3436 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
3437 {
3438 char *name;
3439 char endc;
3440 symbolS *sym;
3441
3442 name = input_line_pointer;
3443 endc = get_symbol_end ();
3444
3445 sym = symbol_find_or_make (name);
3446
3447 *input_line_pointer = endc;
3448
3449 symbol_get_tc (sym)->output = 1;
3450
3451 demand_empty_rest_of_line ();
3452 }
3453
3454 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3455 although I don't know why it bothers. */
3456
3457 static void
3458 ppc_rename (int ignore ATTRIBUTE_UNUSED)
3459 {
3460 char *name;
3461 char endc;
3462 symbolS *sym;
3463 int len;
3464
3465 name = input_line_pointer;
3466 endc = get_symbol_end ();
3467
3468 sym = symbol_find_or_make (name);
3469
3470 *input_line_pointer = endc;
3471
3472 if (*input_line_pointer != ',')
3473 {
3474 as_bad (_("missing rename string"));
3475 ignore_rest_of_line ();
3476 return;
3477 }
3478 ++input_line_pointer;
3479
3480 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
3481
3482 demand_empty_rest_of_line ();
3483 }
3484
3485 /* The .stabx pseudo-op. This is similar to a normal .stabs
3486 pseudo-op, but slightly different. A sample is
3487 .stabx "main:F-1",.main,142,0
3488 The first argument is the symbol name to create. The second is the
3489 value, and the third is the storage class. The fourth seems to be
3490 always zero, and I am assuming it is the type. */
3491
3492 static void
3493 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
3494 {
3495 char *name;
3496 int len;
3497 symbolS *sym;
3498 expressionS exp;
3499
3500 name = demand_copy_C_string (&len);
3501
3502 if (*input_line_pointer != ',')
3503 {
3504 as_bad (_("missing value"));
3505 return;
3506 }
3507 ++input_line_pointer;
3508
3509 ppc_stab_symbol = TRUE;
3510 sym = symbol_make (name);
3511 ppc_stab_symbol = FALSE;
3512
3513 symbol_get_tc (sym)->real_name = name;
3514
3515 (void) expression (&exp);
3516
3517 switch (exp.X_op)
3518 {
3519 case O_illegal:
3520 case O_absent:
3521 case O_big:
3522 as_bad (_("illegal .stabx expression; zero assumed"));
3523 exp.X_add_number = 0;
3524 /* Fall through. */
3525 case O_constant:
3526 S_SET_VALUE (sym, (valueT) exp.X_add_number);
3527 symbol_set_frag (sym, &zero_address_frag);
3528 break;
3529
3530 case O_symbol:
3531 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
3532 symbol_set_value_expression (sym, &exp);
3533 else
3534 {
3535 S_SET_VALUE (sym,
3536 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
3537 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
3538 }
3539 break;
3540
3541 default:
3542 /* The value is some complex expression. This will probably
3543 fail at some later point, but this is probably the right
3544 thing to do here. */
3545 symbol_set_value_expression (sym, &exp);
3546 break;
3547 }
3548
3549 S_SET_SEGMENT (sym, ppc_coff_debug_section);
3550 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3551
3552 if (*input_line_pointer != ',')
3553 {
3554 as_bad (_("missing class"));
3555 return;
3556 }
3557 ++input_line_pointer;
3558
3559 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3560
3561 if (*input_line_pointer != ',')
3562 {
3563 as_bad (_("missing type"));
3564 return;
3565 }
3566 ++input_line_pointer;
3567
3568 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3569
3570 symbol_get_tc (sym)->output = 1;
3571
3572 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
3573
3574 symbol_get_tc (sym)->within = ppc_current_block;
3575
3576 /* In this case :
3577
3578 .bs name
3579 .stabx "z",arrays_,133,0
3580 .es
3581
3582 .comm arrays_,13768,3
3583
3584 resolve_symbol_value will copy the exp's "within" into sym's when the
3585 offset is 0. Since this seems to be corner case problem,
3586 only do the correction for storage class C_STSYM. A better solution
3587 would be to have the tc field updated in ppc_symbol_new_hook. */
3588
3589 if (exp.X_op == O_symbol)
3590 {
3591 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3592 }
3593 }
3594
3595 if (exp.X_op != O_symbol
3596 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3597 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3598 ppc_frob_label (sym);
3599 else
3600 {
3601 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3602 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
3603 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3604 symbol_get_tc (ppc_current_csect)->within = sym;
3605 }
3606
3607 demand_empty_rest_of_line ();
3608 }
3609
3610 /* The .function pseudo-op. This takes several arguments. The first
3611 argument seems to be the external name of the symbol. The second
3612 argument seems to be the label for the start of the function. gcc
3613 uses the same name for both. I have no idea what the third and
3614 fourth arguments are meant to be. The optional fifth argument is
3615 an expression for the size of the function. In COFF this symbol
3616 gets an aux entry like that used for a csect. */
3617
3618 static void
3619 ppc_function (int ignore ATTRIBUTE_UNUSED)
3620 {
3621 char *name;
3622 char endc;
3623 char *s;
3624 symbolS *ext_sym;
3625 symbolS *lab_sym;
3626
3627 name = input_line_pointer;
3628 endc = get_symbol_end ();
3629
3630 /* Ignore any [PR] suffix. */
3631 name = ppc_canonicalize_symbol_name (name);
3632 s = strchr (name, '[');
3633 if (s != (char *) NULL
3634 && strcmp (s + 1, "PR]") == 0)
3635 *s = '\0';
3636
3637 ext_sym = symbol_find_or_make (name);
3638
3639 *input_line_pointer = endc;
3640
3641 if (*input_line_pointer != ',')
3642 {
3643 as_bad (_("missing symbol name"));
3644 ignore_rest_of_line ();
3645 return;
3646 }
3647 ++input_line_pointer;
3648
3649 name = input_line_pointer;
3650 endc = get_symbol_end ();
3651
3652 lab_sym = symbol_find_or_make (name);
3653
3654 *input_line_pointer = endc;
3655
3656 if (ext_sym != lab_sym)
3657 {
3658 expressionS exp;
3659
3660 exp.X_op = O_symbol;
3661 exp.X_add_symbol = lab_sym;
3662 exp.X_op_symbol = NULL;
3663 exp.X_add_number = 0;
3664 exp.X_unsigned = 0;
3665 symbol_set_value_expression (ext_sym, &exp);
3666 }
3667
3668 if (symbol_get_tc (ext_sym)->class == -1)
3669 symbol_get_tc (ext_sym)->class = XMC_PR;
3670 symbol_get_tc (ext_sym)->output = 1;
3671
3672 if (*input_line_pointer == ',')
3673 {
3674 expressionS ignore;
3675
3676 /* Ignore the third argument. */
3677 ++input_line_pointer;
3678 expression (&ignore);
3679 if (*input_line_pointer == ',')
3680 {
3681 /* Ignore the fourth argument. */
3682 ++input_line_pointer;
3683 expression (&ignore);
3684 if (*input_line_pointer == ',')
3685 {
3686 /* The fifth argument is the function size. */
3687 ++input_line_pointer;
3688 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3689 absolute_section,
3690 (valueT) 0,
3691 &zero_address_frag);
3692 pseudo_set (symbol_get_tc (ext_sym)->size);
3693 }
3694 }
3695 }
3696
3697 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3698 SF_SET_FUNCTION (ext_sym);
3699 SF_SET_PROCESS (ext_sym);
3700 coff_add_linesym (ext_sym);
3701
3702 demand_empty_rest_of_line ();
3703 }
3704
3705 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
3706 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3707 with the correct line number */
3708
3709 static symbolS *saved_bi_sym = 0;
3710
3711 static void
3712 ppc_bf (int ignore ATTRIBUTE_UNUSED)
3713 {
3714 symbolS *sym;
3715
3716 sym = symbol_make (".bf");
3717 S_SET_SEGMENT (sym, text_section);
3718 symbol_set_frag (sym, frag_now);
3719 S_SET_VALUE (sym, frag_now_fix ());
3720 S_SET_STORAGE_CLASS (sym, C_FCN);
3721
3722 coff_line_base = get_absolute_expression ();
3723
3724 S_SET_NUMBER_AUXILIARY (sym, 1);
3725 SA_SET_SYM_LNNO (sym, coff_line_base);
3726
3727 /* Line number for bi. */
3728 if (saved_bi_sym)
3729 {
3730 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3731 saved_bi_sym = 0;
3732 }
3733
3734
3735 symbol_get_tc (sym)->output = 1;
3736
3737 ppc_frob_label (sym);
3738
3739 demand_empty_rest_of_line ();
3740 }
3741
3742 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3743 ".ef", except that the line number is absolute, not relative to the
3744 most recent ".bf" symbol. */
3745
3746 static void
3747 ppc_ef (int ignore ATTRIBUTE_UNUSED)
3748 {
3749 symbolS *sym;
3750
3751 sym = symbol_make (".ef");
3752 S_SET_SEGMENT (sym, text_section);
3753 symbol_set_frag (sym, frag_now);
3754 S_SET_VALUE (sym, frag_now_fix ());
3755 S_SET_STORAGE_CLASS (sym, C_FCN);
3756 S_SET_NUMBER_AUXILIARY (sym, 1);
3757 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3758 symbol_get_tc (sym)->output = 1;
3759
3760 ppc_frob_label (sym);
3761
3762 demand_empty_rest_of_line ();
3763 }
3764
3765 /* The .bi and .ei pseudo-ops. These take a string argument and
3766 generates a C_BINCL or C_EINCL symbol, which goes at the start of
3767 the symbol list. The value of .bi will be know when the next .bf
3768 is encountered. */
3769
3770 static void
3771 ppc_biei (int ei)
3772 {
3773 static symbolS *last_biei;
3774
3775 char *name;
3776 int len;
3777 symbolS *sym;
3778 symbolS *look;
3779
3780 name = demand_copy_C_string (&len);
3781
3782 /* The value of these symbols is actually file offset. Here we set
3783 the value to the index into the line number entries. In
3784 ppc_frob_symbols we set the fix_line field, which will cause BFD
3785 to do the right thing. */
3786
3787 sym = symbol_make (name);
3788 /* obj-coff.c currently only handles line numbers correctly in the
3789 .text section. */
3790 S_SET_SEGMENT (sym, text_section);
3791 S_SET_VALUE (sym, coff_n_line_nos);
3792 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3793
3794 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
3795 symbol_get_tc (sym)->output = 1;
3796
3797 /* Save bi. */
3798 if (ei)
3799 saved_bi_sym = 0;
3800 else
3801 saved_bi_sym = sym;
3802
3803 for (look = last_biei ? last_biei : symbol_rootP;
3804 (look != (symbolS *) NULL
3805 && (S_GET_STORAGE_CLASS (look) == C_FILE
3806 || S_GET_STORAGE_CLASS (look) == C_BINCL
3807 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3808 look = symbol_next (look))
3809 ;
3810 if (look != (symbolS *) NULL)
3811 {
3812 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3813 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3814 last_biei = sym;
3815 }
3816
3817 demand_empty_rest_of_line ();
3818 }
3819
3820 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3821 There is one argument, which is a csect symbol. The value of the
3822 .bs symbol is the index of this csect symbol. */
3823
3824 static void
3825 ppc_bs (int ignore ATTRIBUTE_UNUSED)
3826 {
3827 char *name;
3828 char endc;
3829 symbolS *csect;
3830 symbolS *sym;
3831
3832 if (ppc_current_block != NULL)
3833 as_bad (_("nested .bs blocks"));
3834
3835 name = input_line_pointer;
3836 endc = get_symbol_end ();
3837
3838 csect = symbol_find_or_make (name);
3839
3840 *input_line_pointer = endc;
3841
3842 sym = symbol_make (".bs");
3843 S_SET_SEGMENT (sym, now_seg);
3844 S_SET_STORAGE_CLASS (sym, C_BSTAT);
3845 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3846 symbol_get_tc (sym)->output = 1;
3847
3848 symbol_get_tc (sym)->within = csect;
3849
3850 ppc_frob_label (sym);
3851
3852 ppc_current_block = sym;
3853
3854 demand_empty_rest_of_line ();
3855 }
3856
3857 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3858
3859 static void
3860 ppc_es (int ignore ATTRIBUTE_UNUSED)
3861 {
3862 symbolS *sym;
3863
3864 if (ppc_current_block == NULL)
3865 as_bad (_(".es without preceding .bs"));
3866
3867 sym = symbol_make (".es");
3868 S_SET_SEGMENT (sym, now_seg);
3869 S_SET_STORAGE_CLASS (sym, C_ESTAT);
3870 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3871 symbol_get_tc (sym)->output = 1;
3872
3873 ppc_frob_label (sym);
3874
3875 ppc_current_block = NULL;
3876
3877 demand_empty_rest_of_line ();
3878 }
3879
3880 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3881 line number. */
3882
3883 static void
3884 ppc_bb (int ignore ATTRIBUTE_UNUSED)
3885 {
3886 symbolS *sym;
3887
3888 sym = symbol_make (".bb");
3889 S_SET_SEGMENT (sym, text_section);
3890 symbol_set_frag (sym, frag_now);
3891 S_SET_VALUE (sym, frag_now_fix ());
3892 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3893
3894 S_SET_NUMBER_AUXILIARY (sym, 1);
3895 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3896
3897 symbol_get_tc (sym)->output = 1;
3898
3899 SF_SET_PROCESS (sym);
3900
3901 ppc_frob_label (sym);
3902
3903 demand_empty_rest_of_line ();
3904 }
3905
3906 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3907 line number. */
3908
3909 static void
3910 ppc_eb (int ignore ATTRIBUTE_UNUSED)
3911 {
3912 symbolS *sym;
3913
3914 sym = symbol_make (".eb");
3915 S_SET_SEGMENT (sym, text_section);
3916 symbol_set_frag (sym, frag_now);
3917 S_SET_VALUE (sym, frag_now_fix ());
3918 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3919 S_SET_NUMBER_AUXILIARY (sym, 1);
3920 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3921 symbol_get_tc (sym)->output = 1;
3922
3923 SF_SET_PROCESS (sym);
3924
3925 ppc_frob_label (sym);
3926
3927 demand_empty_rest_of_line ();
3928 }
3929
3930 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3931 specified name. */
3932
3933 static void
3934 ppc_bc (int ignore ATTRIBUTE_UNUSED)
3935 {
3936 char *name;
3937 int len;
3938 symbolS *sym;
3939
3940 name = demand_copy_C_string (&len);
3941 sym = symbol_make (name);
3942 S_SET_SEGMENT (sym, ppc_coff_debug_section);
3943 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3944 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3945 S_SET_VALUE (sym, 0);
3946 symbol_get_tc (sym)->output = 1;
3947
3948 ppc_frob_label (sym);
3949
3950 demand_empty_rest_of_line ();
3951 }
3952
3953 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3954
3955 static void
3956 ppc_ec (int ignore ATTRIBUTE_UNUSED)
3957 {
3958 symbolS *sym;
3959
3960 sym = symbol_make (".ec");
3961 S_SET_SEGMENT (sym, ppc_coff_debug_section);
3962 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3963 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3964 S_SET_VALUE (sym, 0);
3965 symbol_get_tc (sym)->output = 1;
3966
3967 ppc_frob_label (sym);
3968
3969 demand_empty_rest_of_line ();
3970 }
3971
3972 /* The .toc pseudo-op. Switch to the .toc subsegment. */
3973
3974 static void
3975 ppc_toc (int ignore ATTRIBUTE_UNUSED)
3976 {
3977 if (ppc_toc_csect != (symbolS *) NULL)
3978 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
3979 else
3980 {
3981 subsegT subseg;
3982 symbolS *sym;
3983 symbolS *list;
3984
3985 subseg = ppc_data_subsegment;
3986 ++ppc_data_subsegment;
3987
3988 subseg_new (segment_name (data_section), subseg);
3989 ppc_toc_frag = frag_now;
3990
3991 sym = symbol_find_or_make ("TOC[TC0]");
3992 symbol_set_frag (sym, frag_now);
3993 S_SET_SEGMENT (sym, data_section);
3994 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3995 symbol_get_tc (sym)->subseg = subseg;
3996 symbol_get_tc (sym)->output = 1;
3997 symbol_get_tc (sym)->within = sym;
3998
3999 ppc_toc_csect = sym;
4000
4001 for (list = ppc_data_csects;
4002 symbol_get_tc (list)->next != (symbolS *) NULL;
4003 list = symbol_get_tc (list)->next)
4004 ;
4005 symbol_get_tc (list)->next = sym;
4006
4007 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4008 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4009 &symbol_lastP);
4010 }
4011
4012 ppc_current_csect = ppc_toc_csect;
4013
4014 demand_empty_rest_of_line ();
4015 }
4016
4017 /* The AIX assembler automatically aligns the operands of a .long or
4018 .short pseudo-op, and we want to be compatible. */
4019
4020 static void
4021 ppc_xcoff_cons (int log_size)
4022 {
4023 frag_align (log_size, 0, 0);
4024 record_alignment (now_seg, log_size);
4025 cons (1 << log_size);
4026 }
4027
4028 static void
4029 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4030 {
4031 expressionS exp;
4032 int byte_count;
4033
4034 (void) expression (&exp);
4035
4036 if (exp.X_op != O_constant)
4037 {
4038 as_bad (_("non-constant byte count"));
4039 return;
4040 }
4041
4042 byte_count = exp.X_add_number;
4043
4044 if (*input_line_pointer != ',')
4045 {
4046 as_bad (_("missing value"));
4047 return;
4048 }
4049
4050 ++input_line_pointer;
4051 cons (byte_count);
4052 }
4053
4054 #endif /* OBJ_XCOFF */
4055 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4056 \f
4057 /* The .tc pseudo-op. This is used when generating either XCOFF or
4058 ELF. This takes two or more arguments.
4059
4060 When generating XCOFF output, the first argument is the name to
4061 give to this location in the toc; this will be a symbol with class
4062 TC. The rest of the arguments are N-byte values to actually put at
4063 this location in the TOC; often there is just one more argument, a
4064 relocatable symbol reference. The size of the value to store
4065 depends on target word size. A 32-bit target uses 4-byte values, a
4066 64-bit target uses 8-byte values.
4067
4068 When not generating XCOFF output, the arguments are the same, but
4069 the first argument is simply ignored. */
4070
4071 static void
4072 ppc_tc (int ignore ATTRIBUTE_UNUSED)
4073 {
4074 #ifdef OBJ_XCOFF
4075
4076 /* Define the TOC symbol name. */
4077 {
4078 char *name;
4079 char endc;
4080 symbolS *sym;
4081
4082 if (ppc_toc_csect == (symbolS *) NULL
4083 || ppc_toc_csect != ppc_current_csect)
4084 {
4085 as_bad (_(".tc not in .toc section"));
4086 ignore_rest_of_line ();
4087 return;
4088 }
4089
4090 name = input_line_pointer;
4091 endc = get_symbol_end ();
4092
4093 sym = symbol_find_or_make (name);
4094
4095 *input_line_pointer = endc;
4096
4097 if (S_IS_DEFINED (sym))
4098 {
4099 symbolS *label;
4100
4101 label = symbol_get_tc (ppc_current_csect)->within;
4102 if (symbol_get_tc (label)->class != XMC_TC0)
4103 {
4104 as_bad (_(".tc with no label"));
4105 ignore_rest_of_line ();
4106 return;
4107 }
4108
4109 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
4110 symbol_set_frag (label, symbol_get_frag (sym));
4111 S_SET_VALUE (label, S_GET_VALUE (sym));
4112
4113 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4114 ++input_line_pointer;
4115
4116 return;
4117 }
4118
4119 S_SET_SEGMENT (sym, now_seg);
4120 symbol_set_frag (sym, frag_now);
4121 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4122 symbol_get_tc (sym)->class = XMC_TC;
4123 symbol_get_tc (sym)->output = 1;
4124
4125 ppc_frob_label (sym);
4126 }
4127
4128 #endif /* OBJ_XCOFF */
4129 #ifdef OBJ_ELF
4130 int align;
4131
4132 /* Skip the TOC symbol name. */
4133 while (is_part_of_name (*input_line_pointer)
4134 || *input_line_pointer == ' '
4135 || *input_line_pointer == '['
4136 || *input_line_pointer == ']'
4137 || *input_line_pointer == '{'
4138 || *input_line_pointer == '}')
4139 ++input_line_pointer;
4140
4141 /* Align to a four/eight byte boundary. */
4142 align = ppc_obj64 ? 3 : 2;
4143 frag_align (align, 0, 0);
4144 record_alignment (now_seg, align);
4145 #endif /* OBJ_ELF */
4146
4147 if (*input_line_pointer != ',')
4148 demand_empty_rest_of_line ();
4149 else
4150 {
4151 ++input_line_pointer;
4152 cons (ppc_obj64 ? 8 : 4);
4153 }
4154 }
4155
4156 /* Pseudo-op .machine. */
4157
4158 static void
4159 ppc_machine (int ignore ATTRIBUTE_UNUSED)
4160 {
4161 char *cpu_string;
4162 #define MAX_HISTORY 100
4163 static ppc_cpu_t *cpu_history;
4164 static int curr_hist;
4165
4166 SKIP_WHITESPACE ();
4167
4168 if (*input_line_pointer == '"')
4169 {
4170 int len;
4171 cpu_string = demand_copy_C_string (&len);
4172 }
4173 else
4174 {
4175 char c;
4176 cpu_string = input_line_pointer;
4177 c = get_symbol_end ();
4178 cpu_string = xstrdup (cpu_string);
4179 *input_line_pointer = c;
4180 }
4181
4182 if (cpu_string != NULL)
4183 {
4184 ppc_cpu_t old_cpu = ppc_cpu;
4185 char *p;
4186
4187 for (p = cpu_string; *p != 0; p++)
4188 *p = TOLOWER (*p);
4189
4190 if (strcmp (cpu_string, "push") == 0)
4191 {
4192 if (cpu_history == NULL)
4193 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4194
4195 if (curr_hist >= MAX_HISTORY)
4196 as_bad (_(".machine stack overflow"));
4197 else
4198 cpu_history[curr_hist++] = ppc_cpu;
4199 }
4200 else if (strcmp (cpu_string, "pop") == 0)
4201 {
4202 if (curr_hist <= 0)
4203 as_bad (_(".machine stack underflow"));
4204 else
4205 ppc_cpu = cpu_history[--curr_hist];
4206 }
4207 else if (parse_cpu (cpu_string))
4208 ;
4209 else
4210 as_bad (_("invalid machine `%s'"), cpu_string);
4211
4212 if (ppc_cpu != old_cpu)
4213 ppc_setup_opcodes ();
4214 }
4215
4216 demand_empty_rest_of_line ();
4217 }
4218
4219 /* See whether a symbol is in the TOC section. */
4220
4221 static int
4222 ppc_is_toc_sym (symbolS *sym)
4223 {
4224 #ifdef OBJ_XCOFF
4225 return symbol_get_tc (sym)->class == XMC_TC;
4226 #endif
4227 #ifdef OBJ_ELF
4228 const char *sname = segment_name (S_GET_SEGMENT (sym));
4229 if (ppc_obj64)
4230 return strcmp (sname, ".toc") == 0;
4231 else
4232 return strcmp (sname, ".got") == 0;
4233 #endif
4234 }
4235 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
4236 \f
4237 #ifdef TE_PE
4238
4239 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
4240
4241 /* Set the current section. */
4242 static void
4243 ppc_set_current_section (segT new)
4244 {
4245 ppc_previous_section = ppc_current_section;
4246 ppc_current_section = new;
4247 }
4248
4249 /* pseudo-op: .previous
4250 behaviour: toggles the current section with the previous section.
4251 errors: None
4252 warnings: "No previous section" */
4253
4254 static void
4255 ppc_previous (int ignore ATTRIBUTE_UNUSED)
4256 {
4257 symbolS *tmp;
4258
4259 if (ppc_previous_section == NULL)
4260 {
4261 as_warn (_("No previous section to return to. Directive ignored."));
4262 return;
4263 }
4264
4265 subseg_set (ppc_previous_section, 0);
4266
4267 ppc_set_current_section (ppc_previous_section);
4268 }
4269
4270 /* pseudo-op: .pdata
4271 behaviour: predefined read only data section
4272 double word aligned
4273 errors: None
4274 warnings: None
4275 initial: .section .pdata "adr3"
4276 a - don't know -- maybe a misprint
4277 d - initialized data
4278 r - readable
4279 3 - double word aligned (that would be 4 byte boundary)
4280
4281 commentary:
4282 Tag index tables (also known as the function table) for exception
4283 handling, debugging, etc. */
4284
4285 static void
4286 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
4287 {
4288 if (pdata_section == 0)
4289 {
4290 pdata_section = subseg_new (".pdata", 0);
4291
4292 bfd_set_section_flags (stdoutput, pdata_section,
4293 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4294 | SEC_READONLY | SEC_DATA ));
4295
4296 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4297 }
4298 else
4299 {
4300 pdata_section = subseg_new (".pdata", 0);
4301 }
4302 ppc_set_current_section (pdata_section);
4303 }
4304
4305 /* pseudo-op: .ydata
4306 behaviour: predefined read only data section
4307 double word aligned
4308 errors: None
4309 warnings: None
4310 initial: .section .ydata "drw3"
4311 a - don't know -- maybe a misprint
4312 d - initialized data
4313 r - readable
4314 3 - double word aligned (that would be 4 byte boundary)
4315 commentary:
4316 Tag tables (also known as the scope table) for exception handling,
4317 debugging, etc. */
4318
4319 static void
4320 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
4321 {
4322 if (ydata_section == 0)
4323 {
4324 ydata_section = subseg_new (".ydata", 0);
4325 bfd_set_section_flags (stdoutput, ydata_section,
4326 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4327 | SEC_READONLY | SEC_DATA ));
4328
4329 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4330 }
4331 else
4332 {
4333 ydata_section = subseg_new (".ydata", 0);
4334 }
4335 ppc_set_current_section (ydata_section);
4336 }
4337
4338 /* pseudo-op: .reldata
4339 behaviour: predefined read write data section
4340 double word aligned (4-byte)
4341 FIXME: relocation is applied to it
4342 FIXME: what's the difference between this and .data?
4343 errors: None
4344 warnings: None
4345 initial: .section .reldata "drw3"
4346 d - initialized data
4347 r - readable
4348 w - writeable
4349 3 - double word aligned (that would be 8 byte boundary)
4350
4351 commentary:
4352 Like .data, but intended to hold data subject to relocation, such as
4353 function descriptors, etc. */
4354
4355 static void
4356 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
4357 {
4358 if (reldata_section == 0)
4359 {
4360 reldata_section = subseg_new (".reldata", 0);
4361
4362 bfd_set_section_flags (stdoutput, reldata_section,
4363 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4364 | SEC_DATA));
4365
4366 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4367 }
4368 else
4369 {
4370 reldata_section = subseg_new (".reldata", 0);
4371 }
4372 ppc_set_current_section (reldata_section);
4373 }
4374
4375 /* pseudo-op: .rdata
4376 behaviour: predefined read only data section
4377 double word aligned
4378 errors: None
4379 warnings: None
4380 initial: .section .rdata "dr3"
4381 d - initialized data
4382 r - readable
4383 3 - double word aligned (that would be 4 byte boundary) */
4384
4385 static void
4386 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
4387 {
4388 if (rdata_section == 0)
4389 {
4390 rdata_section = subseg_new (".rdata", 0);
4391 bfd_set_section_flags (stdoutput, rdata_section,
4392 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4393 | SEC_READONLY | SEC_DATA ));
4394
4395 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4396 }
4397 else
4398 {
4399 rdata_section = subseg_new (".rdata", 0);
4400 }
4401 ppc_set_current_section (rdata_section);
4402 }
4403
4404 /* pseudo-op: .ualong
4405 behaviour: much like .int, with the exception that no alignment is
4406 performed.
4407 FIXME: test the alignment statement
4408 errors: None
4409 warnings: None */
4410
4411 static void
4412 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
4413 {
4414 /* Try for long. */
4415 cons (4);
4416 }
4417
4418 /* pseudo-op: .znop <symbol name>
4419 behaviour: Issue a nop instruction
4420 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
4421 the supplied symbol name.
4422 errors: None
4423 warnings: Missing symbol name */
4424
4425 static void
4426 ppc_znop (int ignore ATTRIBUTE_UNUSED)
4427 {
4428 unsigned long insn;
4429 const struct powerpc_opcode *opcode;
4430 expressionS ex;
4431 char *f;
4432 symbolS *sym;
4433 char *symbol_name;
4434 char c;
4435 char *name;
4436 unsigned int exp;
4437 flagword flags;
4438 asection *sec;
4439
4440 /* Strip out the symbol name. */
4441 symbol_name = input_line_pointer;
4442 c = get_symbol_end ();
4443
4444 name = xmalloc (input_line_pointer - symbol_name + 1);
4445 strcpy (name, symbol_name);
4446
4447 sym = symbol_find_or_make (name);
4448
4449 *input_line_pointer = c;
4450
4451 SKIP_WHITESPACE ();
4452
4453 /* Look up the opcode in the hash table. */
4454 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4455
4456 /* Stick in the nop. */
4457 insn = opcode->opcode;
4458
4459 /* Write out the instruction. */
4460 f = frag_more (4);
4461 md_number_to_chars (f, insn, 4);
4462 fix_new (frag_now,
4463 f - frag_now->fr_literal,
4464 4,
4465 sym,
4466 0,
4467 0,
4468 BFD_RELOC_16_GOT_PCREL);
4469
4470 }
4471
4472 /* pseudo-op:
4473 behaviour:
4474 errors:
4475 warnings: */
4476
4477 static void
4478 ppc_pe_comm (int lcomm)
4479 {
4480 char *name;
4481 char c;
4482 char *p;
4483 offsetT temp;
4484 symbolS *symbolP;
4485 offsetT align;
4486
4487 name = input_line_pointer;
4488 c = get_symbol_end ();
4489
4490 /* just after name is now '\0'. */
4491 p = input_line_pointer;
4492 *p = c;
4493 SKIP_WHITESPACE ();
4494 if (*input_line_pointer != ',')
4495 {
4496 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4497 ignore_rest_of_line ();
4498 return;
4499 }
4500
4501 input_line_pointer++; /* skip ',' */
4502 if ((temp = get_absolute_expression ()) < 0)
4503 {
4504 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4505 ignore_rest_of_line ();
4506 return;
4507 }
4508
4509 if (! lcomm)
4510 {
4511 /* The third argument to .comm is the alignment. */
4512 if (*input_line_pointer != ',')
4513 align = 3;
4514 else
4515 {
4516 ++input_line_pointer;
4517 align = get_absolute_expression ();
4518 if (align <= 0)
4519 {
4520 as_warn (_("ignoring bad alignment"));
4521 align = 3;
4522 }
4523 }
4524 }
4525
4526 *p = 0;
4527 symbolP = symbol_find_or_make (name);
4528
4529 *p = c;
4530 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4531 {
4532 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4533 S_GET_NAME (symbolP));
4534 ignore_rest_of_line ();
4535 return;
4536 }
4537
4538 if (S_GET_VALUE (symbolP))
4539 {
4540 if (S_GET_VALUE (symbolP) != (valueT) temp)
4541 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4542 S_GET_NAME (symbolP),
4543 (long) S_GET_VALUE (symbolP),
4544 (long) temp);
4545 }
4546 else
4547 {
4548 S_SET_VALUE (symbolP, (valueT) temp);
4549 S_SET_EXTERNAL (symbolP);
4550 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
4551 }
4552
4553 demand_empty_rest_of_line ();
4554 }
4555
4556 /*
4557 * implement the .section pseudo op:
4558 * .section name {, "flags"}
4559 * ^ ^
4560 * | +--- optional flags: 'b' for bss
4561 * | 'i' for info
4562 * +-- section name 'l' for lib
4563 * 'n' for noload
4564 * 'o' for over
4565 * 'w' for data
4566 * 'd' (apparently m88k for data)
4567 * 'x' for text
4568 * But if the argument is not a quoted string, treat it as a
4569 * subsegment number.
4570 *
4571 * FIXME: this is a copy of the section processing from obj-coff.c, with
4572 * additions/changes for the moto-pas assembler support. There are three
4573 * categories:
4574 *
4575 * FIXME: I just noticed this. This doesn't work at all really. It it
4576 * setting bits that bfd probably neither understands or uses. The
4577 * correct approach (?) will have to incorporate extra fields attached
4578 * to the section to hold the system specific stuff. (krk)
4579 *
4580 * Section Contents:
4581 * 'a' - unknown - referred to in documentation, but no definition supplied
4582 * 'c' - section has code
4583 * 'd' - section has initialized data
4584 * 'u' - section has uninitialized data
4585 * 'i' - section contains directives (info)
4586 * 'n' - section can be discarded
4587 * 'R' - remove section at link time
4588 *
4589 * Section Protection:
4590 * 'r' - section is readable
4591 * 'w' - section is writeable
4592 * 'x' - section is executable
4593 * 's' - section is sharable
4594 *
4595 * Section Alignment:
4596 * '0' - align to byte boundary
4597 * '1' - align to halfword undary
4598 * '2' - align to word boundary
4599 * '3' - align to doubleword boundary
4600 * '4' - align to quadword boundary
4601 * '5' - align to 32 byte boundary
4602 * '6' - align to 64 byte boundary
4603 *
4604 */
4605
4606 void
4607 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
4608 {
4609 /* Strip out the section name. */
4610 char *section_name;
4611 char c;
4612 char *name;
4613 unsigned int exp;
4614 flagword flags;
4615 segT sec;
4616 int align;
4617
4618 section_name = input_line_pointer;
4619 c = get_symbol_end ();
4620
4621 name = xmalloc (input_line_pointer - section_name + 1);
4622 strcpy (name, section_name);
4623
4624 *input_line_pointer = c;
4625
4626 SKIP_WHITESPACE ();
4627
4628 exp = 0;
4629 flags = SEC_NO_FLAGS;
4630
4631 if (strcmp (name, ".idata$2") == 0)
4632 {
4633 align = 0;
4634 }
4635 else if (strcmp (name, ".idata$3") == 0)
4636 {
4637 align = 0;
4638 }
4639 else if (strcmp (name, ".idata$4") == 0)
4640 {
4641 align = 2;
4642 }
4643 else if (strcmp (name, ".idata$5") == 0)
4644 {
4645 align = 2;
4646 }
4647 else if (strcmp (name, ".idata$6") == 0)
4648 {
4649 align = 1;
4650 }
4651 else
4652 /* Default alignment to 16 byte boundary. */
4653 align = 4;
4654
4655 if (*input_line_pointer == ',')
4656 {
4657 ++input_line_pointer;
4658 SKIP_WHITESPACE ();
4659 if (*input_line_pointer != '"')
4660 exp = get_absolute_expression ();
4661 else
4662 {
4663 ++input_line_pointer;
4664 while (*input_line_pointer != '"'
4665 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4666 {
4667 switch (*input_line_pointer)
4668 {
4669 /* Section Contents */
4670 case 'a': /* unknown */
4671 as_bad (_("Unsupported section attribute -- 'a'"));
4672 break;
4673 case 'c': /* code section */
4674 flags |= SEC_CODE;
4675 break;
4676 case 'd': /* section has initialized data */
4677 flags |= SEC_DATA;
4678 break;
4679 case 'u': /* section has uninitialized data */
4680 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4681 in winnt.h */
4682 flags |= SEC_ROM;
4683 break;
4684 case 'i': /* section contains directives (info) */
4685 /* FIXME: This is IMAGE_SCN_LNK_INFO
4686 in winnt.h */
4687 flags |= SEC_HAS_CONTENTS;
4688 break;
4689 case 'n': /* section can be discarded */
4690 flags &=~ SEC_LOAD;
4691 break;
4692 case 'R': /* Remove section at link time */
4693 flags |= SEC_NEVER_LOAD;
4694 break;
4695 #if IFLICT_BRAIN_DAMAGE
4696 /* Section Protection */
4697 case 'r': /* section is readable */
4698 flags |= IMAGE_SCN_MEM_READ;
4699 break;
4700 case 'w': /* section is writeable */
4701 flags |= IMAGE_SCN_MEM_WRITE;
4702 break;
4703 case 'x': /* section is executable */
4704 flags |= IMAGE_SCN_MEM_EXECUTE;
4705 break;
4706 case 's': /* section is sharable */
4707 flags |= IMAGE_SCN_MEM_SHARED;
4708 break;
4709
4710 /* Section Alignment */
4711 case '0': /* align to byte boundary */
4712 flags |= IMAGE_SCN_ALIGN_1BYTES;
4713 align = 0;
4714 break;
4715 case '1': /* align to halfword boundary */
4716 flags |= IMAGE_SCN_ALIGN_2BYTES;
4717 align = 1;
4718 break;
4719 case '2': /* align to word boundary */
4720 flags |= IMAGE_SCN_ALIGN_4BYTES;
4721 align = 2;
4722 break;
4723 case '3': /* align to doubleword boundary */
4724 flags |= IMAGE_SCN_ALIGN_8BYTES;
4725 align = 3;
4726 break;
4727 case '4': /* align to quadword boundary */
4728 flags |= IMAGE_SCN_ALIGN_16BYTES;
4729 align = 4;
4730 break;
4731 case '5': /* align to 32 byte boundary */
4732 flags |= IMAGE_SCN_ALIGN_32BYTES;
4733 align = 5;
4734 break;
4735 case '6': /* align to 64 byte boundary */
4736 flags |= IMAGE_SCN_ALIGN_64BYTES;
4737 align = 6;
4738 break;
4739 #endif
4740 default:
4741 as_bad (_("unknown section attribute '%c'"),
4742 *input_line_pointer);
4743 break;
4744 }
4745 ++input_line_pointer;
4746 }
4747 if (*input_line_pointer == '"')
4748 ++input_line_pointer;
4749 }
4750 }
4751
4752 sec = subseg_new (name, (subsegT) exp);
4753
4754 ppc_set_current_section (sec);
4755
4756 if (flags != SEC_NO_FLAGS)
4757 {
4758 if (! bfd_set_section_flags (stdoutput, sec, flags))
4759 as_bad (_("error setting flags for \"%s\": %s"),
4760 bfd_section_name (stdoutput, sec),
4761 bfd_errmsg (bfd_get_error ()));
4762 }
4763
4764 bfd_set_section_alignment (stdoutput, sec, align);
4765 }
4766
4767 static void
4768 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
4769 {
4770 char *name;
4771 char endc;
4772 symbolS *ext_sym;
4773
4774 name = input_line_pointer;
4775 endc = get_symbol_end ();
4776
4777 ext_sym = symbol_find_or_make (name);
4778
4779 *input_line_pointer = endc;
4780
4781 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4782 SF_SET_FUNCTION (ext_sym);
4783 SF_SET_PROCESS (ext_sym);
4784 coff_add_linesym (ext_sym);
4785
4786 demand_empty_rest_of_line ();
4787 }
4788
4789 static void
4790 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
4791 {
4792 if (tocdata_section == 0)
4793 {
4794 tocdata_section = subseg_new (".tocd", 0);
4795 /* FIXME: section flags won't work. */
4796 bfd_set_section_flags (stdoutput, tocdata_section,
4797 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4798 | SEC_READONLY | SEC_DATA));
4799
4800 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4801 }
4802 else
4803 {
4804 rdata_section = subseg_new (".tocd", 0);
4805 }
4806
4807 ppc_set_current_section (tocdata_section);
4808
4809 demand_empty_rest_of_line ();
4810 }
4811
4812 /* Don't adjust TOC relocs to use the section symbol. */
4813
4814 int
4815 ppc_pe_fix_adjustable (fixS *fix)
4816 {
4817 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4818 }
4819
4820 #endif
4821 \f
4822 #ifdef OBJ_XCOFF
4823
4824 /* XCOFF specific symbol and file handling. */
4825
4826 /* Canonicalize the symbol name. We use the to force the suffix, if
4827 any, to use square brackets, and to be in upper case. */
4828
4829 char *
4830 ppc_canonicalize_symbol_name (char *name)
4831 {
4832 char *s;
4833
4834 if (ppc_stab_symbol)
4835 return name;
4836
4837 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4838 ;
4839 if (*s != '\0')
4840 {
4841 char brac;
4842
4843 if (*s == '[')
4844 brac = ']';
4845 else
4846 {
4847 *s = '[';
4848 brac = '}';
4849 }
4850
4851 for (s++; *s != '\0' && *s != brac; s++)
4852 *s = TOUPPER (*s);
4853
4854 if (*s == '\0' || s[1] != '\0')
4855 as_bad (_("bad symbol suffix"));
4856
4857 *s = ']';
4858 }
4859
4860 return name;
4861 }
4862
4863 /* Set the class of a symbol based on the suffix, if any. This is
4864 called whenever a new symbol is created. */
4865
4866 void
4867 ppc_symbol_new_hook (symbolS *sym)
4868 {
4869 struct ppc_tc_sy *tc;
4870 const char *s;
4871
4872 tc = symbol_get_tc (sym);
4873 tc->next = NULL;
4874 tc->output = 0;
4875 tc->class = -1;
4876 tc->real_name = NULL;
4877 tc->subseg = 0;
4878 tc->align = 0;
4879 tc->size = NULL;
4880 tc->within = NULL;
4881
4882 if (ppc_stab_symbol)
4883 return;
4884
4885 s = strchr (S_GET_NAME (sym), '[');
4886 if (s == (const char *) NULL)
4887 {
4888 /* There is no suffix. */
4889 return;
4890 }
4891
4892 ++s;
4893
4894 switch (s[0])
4895 {
4896 case 'B':
4897 if (strcmp (s, "BS]") == 0)
4898 tc->class = XMC_BS;
4899 break;
4900 case 'D':
4901 if (strcmp (s, "DB]") == 0)
4902 tc->class = XMC_DB;
4903 else if (strcmp (s, "DS]") == 0)
4904 tc->class = XMC_DS;
4905 break;
4906 case 'G':
4907 if (strcmp (s, "GL]") == 0)
4908 tc->class = XMC_GL;
4909 break;
4910 case 'P':
4911 if (strcmp (s, "PR]") == 0)
4912 tc->class = XMC_PR;
4913 break;
4914 case 'R':
4915 if (strcmp (s, "RO]") == 0)
4916 tc->class = XMC_RO;
4917 else if (strcmp (s, "RW]") == 0)
4918 tc->class = XMC_RW;
4919 break;
4920 case 'S':
4921 if (strcmp (s, "SV]") == 0)
4922 tc->class = XMC_SV;
4923 break;
4924 case 'T':
4925 if (strcmp (s, "TC]") == 0)
4926 tc->class = XMC_TC;
4927 else if (strcmp (s, "TI]") == 0)
4928 tc->class = XMC_TI;
4929 else if (strcmp (s, "TB]") == 0)
4930 tc->class = XMC_TB;
4931 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
4932 tc->class = XMC_TC0;
4933 break;
4934 case 'U':
4935 if (strcmp (s, "UA]") == 0)
4936 tc->class = XMC_UA;
4937 else if (strcmp (s, "UC]") == 0)
4938 tc->class = XMC_UC;
4939 break;
4940 case 'X':
4941 if (strcmp (s, "XO]") == 0)
4942 tc->class = XMC_XO;
4943 break;
4944 }
4945
4946 if (tc->class == -1)
4947 as_bad (_("Unrecognized symbol suffix"));
4948 }
4949
4950 /* Set the class of a label based on where it is defined. This
4951 handles symbols without suffixes. Also, move the symbol so that it
4952 follows the csect symbol. */
4953
4954 void
4955 ppc_frob_label (symbolS *sym)
4956 {
4957 if (ppc_current_csect != (symbolS *) NULL)
4958 {
4959 if (symbol_get_tc (sym)->class == -1)
4960 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
4961
4962 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4963 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4964 &symbol_rootP, &symbol_lastP);
4965 symbol_get_tc (ppc_current_csect)->within = sym;
4966 }
4967
4968 #ifdef OBJ_ELF
4969 dwarf2_emit_label (sym);
4970 #endif
4971 }
4972
4973 /* This variable is set by ppc_frob_symbol if any absolute symbols are
4974 seen. It tells ppc_adjust_symtab whether it needs to look through
4975 the symbols. */
4976
4977 static bfd_boolean ppc_saw_abs;
4978
4979 /* Change the name of a symbol just before writing it out. Set the
4980 real name if the .rename pseudo-op was used. Otherwise, remove any
4981 class suffix. Return 1 if the symbol should not be included in the
4982 symbol table. */
4983
4984 int
4985 ppc_frob_symbol (symbolS *sym)
4986 {
4987 static symbolS *ppc_last_function;
4988 static symbolS *set_end;
4989
4990 /* Discard symbols that should not be included in the output symbol
4991 table. */
4992 if (! symbol_used_in_reloc_p (sym)
4993 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
4994 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
4995 && ! symbol_get_tc (sym)->output
4996 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4997 return 1;
4998
4999 /* This one will disappear anyway. Don't make a csect sym for it. */
5000 if (sym == abs_section_sym)
5001 return 1;
5002
5003 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5004 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
5005 else
5006 {
5007 const char *name;
5008 const char *s;
5009
5010 name = S_GET_NAME (sym);
5011 s = strchr (name, '[');
5012 if (s != (char *) NULL)
5013 {
5014 unsigned int len;
5015 char *snew;
5016
5017 len = s - name;
5018 snew = xmalloc (len + 1);
5019 memcpy (snew, name, len);
5020 snew[len] = '\0';
5021
5022 S_SET_NAME (sym, snew);
5023 }
5024 }
5025
5026 if (set_end != (symbolS *) NULL)
5027 {
5028 SA_SET_SYM_ENDNDX (set_end, sym);
5029 set_end = NULL;
5030 }
5031
5032 if (SF_GET_FUNCTION (sym))
5033 {
5034 if (ppc_last_function != (symbolS *) NULL)
5035 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5036 ppc_last_function = sym;
5037 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
5038 {
5039 resolve_symbol_value (symbol_get_tc (sym)->size);
5040 SA_SET_SYM_FSIZE (sym,
5041 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
5042 }
5043 }
5044 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5045 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5046 {
5047 if (ppc_last_function == (symbolS *) NULL)
5048 as_bad (_(".ef with no preceding .function"));
5049 else
5050 {
5051 set_end = ppc_last_function;
5052 ppc_last_function = NULL;
5053
5054 /* We don't have a C_EFCN symbol, but we need to force the
5055 COFF backend to believe that it has seen one. */
5056 coff_last_function = NULL;
5057 }
5058 }
5059
5060 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5061 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5062 && S_GET_STORAGE_CLASS (sym) != C_FILE
5063 && S_GET_STORAGE_CLASS (sym) != C_FCN
5064 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5065 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5066 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5067 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5068 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5069 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5070 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5071
5072 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5073 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5074 {
5075 int i;
5076 union internal_auxent *a;
5077
5078 /* Create a csect aux. */
5079 i = S_GET_NUMBER_AUXILIARY (sym);
5080 S_SET_NUMBER_AUXILIARY (sym, i + 1);
5081 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5082 if (symbol_get_tc (sym)->class == XMC_TC0)
5083 {
5084 /* This is the TOC table. */
5085 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5086 a->x_csect.x_scnlen.l = 0;
5087 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5088 }
5089 else if (symbol_get_tc (sym)->subseg != 0)
5090 {
5091 /* This is a csect symbol. x_scnlen is the size of the
5092 csect. */
5093 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5094 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5095 S_GET_SEGMENT (sym))
5096 - S_GET_VALUE (sym));
5097 else
5098 {
5099 resolve_symbol_value (symbol_get_tc (sym)->next);
5100 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5101 - S_GET_VALUE (sym));
5102 }
5103 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5104 }
5105 else if (S_GET_SEGMENT (sym) == bss_section)
5106 {
5107 /* This is a common symbol. */
5108 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5109 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
5110 if (S_IS_EXTERNAL (sym))
5111 symbol_get_tc (sym)->class = XMC_RW;
5112 else
5113 symbol_get_tc (sym)->class = XMC_BS;
5114 }
5115 else if (S_GET_SEGMENT (sym) == absolute_section)
5116 {
5117 /* This is an absolute symbol. The csect will be created by
5118 ppc_adjust_symtab. */
5119 ppc_saw_abs = TRUE;
5120 a->x_csect.x_smtyp = XTY_LD;
5121 if (symbol_get_tc (sym)->class == -1)
5122 symbol_get_tc (sym)->class = XMC_XO;
5123 }
5124 else if (! S_IS_DEFINED (sym))
5125 {
5126 /* This is an external symbol. */
5127 a->x_csect.x_scnlen.l = 0;
5128 a->x_csect.x_smtyp = XTY_ER;
5129 }
5130 else if (symbol_get_tc (sym)->class == XMC_TC)
5131 {
5132 symbolS *next;
5133
5134 /* This is a TOC definition. x_scnlen is the size of the
5135 TOC entry. */
5136 next = symbol_next (sym);
5137 while (symbol_get_tc (next)->class == XMC_TC0)
5138 next = symbol_next (next);
5139 if (next == (symbolS *) NULL
5140 || symbol_get_tc (next)->class != XMC_TC)
5141 {
5142 if (ppc_after_toc_frag == (fragS *) NULL)
5143 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5144 data_section)
5145 - S_GET_VALUE (sym));
5146 else
5147 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5148 - S_GET_VALUE (sym));
5149 }
5150 else
5151 {
5152 resolve_symbol_value (next);
5153 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5154 - S_GET_VALUE (sym));
5155 }
5156 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5157 }
5158 else
5159 {
5160 symbolS *csect;
5161
5162 /* This is a normal symbol definition. x_scnlen is the
5163 symbol index of the containing csect. */
5164 if (S_GET_SEGMENT (sym) == text_section)
5165 csect = ppc_text_csects;
5166 else if (S_GET_SEGMENT (sym) == data_section)
5167 csect = ppc_data_csects;
5168 else
5169 abort ();
5170
5171 /* Skip the initial dummy symbol. */
5172 csect = symbol_get_tc (csect)->next;
5173
5174 if (csect == (symbolS *) NULL)
5175 {
5176 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5177 a->x_csect.x_scnlen.l = 0;
5178 }
5179 else
5180 {
5181 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
5182 {
5183 resolve_symbol_value (symbol_get_tc (csect)->next);
5184 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5185 > S_GET_VALUE (sym))
5186 break;
5187 csect = symbol_get_tc (csect)->next;
5188 }
5189
5190 a->x_csect.x_scnlen.p =
5191 coffsymbol (symbol_get_bfdsym (csect))->native;
5192 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5193 1;
5194 }
5195 a->x_csect.x_smtyp = XTY_LD;
5196 }
5197
5198 a->x_csect.x_parmhash = 0;
5199 a->x_csect.x_snhash = 0;
5200 if (symbol_get_tc (sym)->class == -1)
5201 a->x_csect.x_smclas = XMC_PR;
5202 else
5203 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
5204 a->x_csect.x_stab = 0;
5205 a->x_csect.x_snstab = 0;
5206
5207 /* Don't let the COFF backend resort these symbols. */
5208 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
5209 }
5210 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5211 {
5212 /* We want the value to be the symbol index of the referenced
5213 csect symbol. BFD will do that for us if we set the right
5214 flags. */
5215 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5216 combined_entry_type *c = coffsymbol (bsym)->native;
5217
5218 S_SET_VALUE (sym, (valueT) (size_t) c);
5219 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
5220 }
5221 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5222 {
5223 symbolS *block;
5224 symbolS *csect;
5225
5226 /* The value is the offset from the enclosing csect. */
5227 block = symbol_get_tc (sym)->within;
5228 csect = symbol_get_tc (block)->within;
5229 resolve_symbol_value (csect);
5230 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5231 }
5232 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5233 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5234 {
5235 /* We want the value to be a file offset into the line numbers.
5236 BFD will do that for us if we set the right flags. We have
5237 already set the value correctly. */
5238 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
5239 }
5240
5241 return 0;
5242 }
5243
5244 /* Adjust the symbol table. This creates csect symbols for all
5245 absolute symbols. */
5246
5247 void
5248 ppc_adjust_symtab (void)
5249 {
5250 symbolS *sym;
5251
5252 if (! ppc_saw_abs)
5253 return;
5254
5255 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5256 {
5257 symbolS *csect;
5258 int i;
5259 union internal_auxent *a;
5260
5261 if (S_GET_SEGMENT (sym) != absolute_section)
5262 continue;
5263
5264 csect = symbol_create (".abs[XO]", absolute_section,
5265 S_GET_VALUE (sym), &zero_address_frag);
5266 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
5267 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5268 i = S_GET_NUMBER_AUXILIARY (csect);
5269 S_SET_NUMBER_AUXILIARY (csect, i + 1);
5270 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
5271 a->x_csect.x_scnlen.l = 0;
5272 a->x_csect.x_smtyp = XTY_SD;
5273 a->x_csect.x_parmhash = 0;
5274 a->x_csect.x_snhash = 0;
5275 a->x_csect.x_smclas = XMC_XO;
5276 a->x_csect.x_stab = 0;
5277 a->x_csect.x_snstab = 0;
5278
5279 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5280
5281 i = S_GET_NUMBER_AUXILIARY (sym);
5282 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5283 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5284 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
5285 }
5286
5287 ppc_saw_abs = FALSE;
5288 }
5289
5290 /* Set the VMA for a section. This is called on all the sections in
5291 turn. */
5292
5293 void
5294 ppc_frob_section (asection *sec)
5295 {
5296 static bfd_vma vma = 0;
5297
5298 vma = md_section_align (sec, vma);
5299 bfd_set_section_vma (stdoutput, sec, vma);
5300 vma += bfd_section_size (stdoutput, sec);
5301 }
5302
5303 #endif /* OBJ_XCOFF */
5304 \f
5305 char *
5306 md_atof (int type, char *litp, int *sizep)
5307 {
5308 return ieee_md_atof (type, litp, sizep, target_big_endian);
5309 }
5310
5311 /* Write a value out to the object file, using the appropriate
5312 endianness. */
5313
5314 void
5315 md_number_to_chars (char *buf, valueT val, int n)
5316 {
5317 if (target_big_endian)
5318 number_to_chars_bigendian (buf, val, n);
5319 else
5320 number_to_chars_littleendian (buf, val, n);
5321 }
5322
5323 /* Align a section (I don't know why this is machine dependent). */
5324
5325 valueT
5326 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
5327 {
5328 #ifdef OBJ_ELF
5329 return addr;
5330 #else
5331 int align = bfd_get_section_alignment (stdoutput, seg);
5332
5333 return ((addr + (1 << align) - 1) & (-1 << align));
5334 #endif
5335 }
5336
5337 /* We don't have any form of relaxing. */
5338
5339 int
5340 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5341 asection *seg ATTRIBUTE_UNUSED)
5342 {
5343 abort ();
5344 return 0;
5345 }
5346
5347 /* Convert a machine dependent frag. We never generate these. */
5348
5349 void
5350 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5351 asection *sec ATTRIBUTE_UNUSED,
5352 fragS *fragp ATTRIBUTE_UNUSED)
5353 {
5354 abort ();
5355 }
5356
5357 /* We have no need to default values of symbols. */
5358
5359 symbolS *
5360 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
5361 {
5362 return 0;
5363 }
5364 \f
5365 /* Functions concerning relocs. */
5366
5367 /* The location from which a PC relative jump should be calculated,
5368 given a PC relative reloc. */
5369
5370 long
5371 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
5372 {
5373 return fixp->fx_frag->fr_address + fixp->fx_where;
5374 }
5375
5376 #ifdef OBJ_XCOFF
5377
5378 /* This is called to see whether a fixup should be adjusted to use a
5379 section symbol. We take the opportunity to change a fixup against
5380 a symbol in the TOC subsegment into a reloc against the
5381 corresponding .tc symbol. */
5382
5383 int
5384 ppc_fix_adjustable (fixS *fix)
5385 {
5386 valueT val = resolve_symbol_value (fix->fx_addsy);
5387 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5388 TC_SYMFIELD_TYPE *tc;
5389
5390 if (symseg == absolute_section)
5391 return 0;
5392
5393 if (ppc_toc_csect != (symbolS *) NULL
5394 && fix->fx_addsy != ppc_toc_csect
5395 && symseg == data_section
5396 && val >= ppc_toc_frag->fr_address
5397 && (ppc_after_toc_frag == (fragS *) NULL
5398 || val < ppc_after_toc_frag->fr_address))
5399 {
5400 symbolS *sy;
5401
5402 for (sy = symbol_next (ppc_toc_csect);
5403 sy != (symbolS *) NULL;
5404 sy = symbol_next (sy))
5405 {
5406 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5407
5408 if (sy_tc->class == XMC_TC0)
5409 continue;
5410 if (sy_tc->class != XMC_TC)
5411 break;
5412 if (val == resolve_symbol_value (sy))
5413 {
5414 fix->fx_addsy = sy;
5415 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5416 return 0;
5417 }
5418 }
5419
5420 as_bad_where (fix->fx_file, fix->fx_line,
5421 _("symbol in .toc does not match any .tc"));
5422 }
5423
5424 /* Possibly adjust the reloc to be against the csect. */
5425 tc = symbol_get_tc (fix->fx_addsy);
5426 if (tc->subseg == 0
5427 && tc->class != XMC_TC0
5428 && tc->class != XMC_TC
5429 && symseg != bss_section
5430 /* Don't adjust if this is a reloc in the toc section. */
5431 && (symseg != data_section
5432 || ppc_toc_csect == NULL
5433 || val < ppc_toc_frag->fr_address
5434 || (ppc_after_toc_frag != NULL
5435 && val >= ppc_after_toc_frag->fr_address)))
5436 {
5437 symbolS *csect;
5438 symbolS *next_csect;
5439
5440 if (symseg == text_section)
5441 csect = ppc_text_csects;
5442 else if (symseg == data_section)
5443 csect = ppc_data_csects;
5444 else
5445 abort ();
5446
5447 /* Skip the initial dummy symbol. */
5448 csect = symbol_get_tc (csect)->next;
5449
5450 if (csect != (symbolS *) NULL)
5451 {
5452 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5453 && (symbol_get_frag (next_csect)->fr_address <= val))
5454 {
5455 /* If the csect address equals the symbol value, then we
5456 have to look through the full symbol table to see
5457 whether this is the csect we want. Note that we will
5458 only get here if the csect has zero length. */
5459 if (symbol_get_frag (csect)->fr_address == val
5460 && S_GET_VALUE (csect) == val)
5461 {
5462 symbolS *scan;
5463
5464 for (scan = symbol_next (csect);
5465 scan != NULL;
5466 scan = symbol_next (scan))
5467 {
5468 if (symbol_get_tc (scan)->subseg != 0)
5469 break;
5470 if (scan == fix->fx_addsy)
5471 break;
5472 }
5473
5474 /* If we found the symbol before the next csect
5475 symbol, then this is the csect we want. */
5476 if (scan == fix->fx_addsy)
5477 break;
5478 }
5479
5480 csect = next_csect;
5481 }
5482
5483 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
5484 fix->fx_addsy = csect;
5485 }
5486 return 0;
5487 }
5488
5489 /* Adjust a reloc against a .lcomm symbol to be against the base
5490 .lcomm. */
5491 if (symseg == bss_section
5492 && ! S_IS_EXTERNAL (fix->fx_addsy))
5493 {
5494 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5495
5496 fix->fx_offset += val - resolve_symbol_value (sy);
5497 fix->fx_addsy = sy;
5498 }
5499
5500 return 0;
5501 }
5502
5503 /* A reloc from one csect to another must be kept. The assembler
5504 will, of course, keep relocs between sections, and it will keep
5505 absolute relocs, but we need to force it to keep PC relative relocs
5506 between two csects in the same section. */
5507
5508 int
5509 ppc_force_relocation (fixS *fix)
5510 {
5511 /* At this point fix->fx_addsy should already have been converted to
5512 a csect symbol. If the csect does not include the fragment, then
5513 we need to force the relocation. */
5514 if (fix->fx_pcrel
5515 && fix->fx_addsy != NULL
5516 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5517 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5518 > fix->fx_frag->fr_address)
5519 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5520 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
5521 <= fix->fx_frag->fr_address))))
5522 return 1;
5523
5524 return generic_force_reloc (fix);
5525 }
5526
5527 #endif /* OBJ_XCOFF */
5528
5529 #ifdef OBJ_ELF
5530 /* If this function returns non-zero, it guarantees that a relocation
5531 will be emitted for a fixup. */
5532
5533 int
5534 ppc_force_relocation (fixS *fix)
5535 {
5536 /* Branch prediction relocations must force a relocation, as must
5537 the vtable description relocs. */
5538 switch (fix->fx_r_type)
5539 {
5540 case BFD_RELOC_PPC_B16_BRTAKEN:
5541 case BFD_RELOC_PPC_B16_BRNTAKEN:
5542 case BFD_RELOC_PPC_BA16_BRTAKEN:
5543 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5544 case BFD_RELOC_24_PLT_PCREL:
5545 case BFD_RELOC_PPC64_TOC:
5546 return 1;
5547 default:
5548 break;
5549 }
5550
5551 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5552 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5553 return 1;
5554
5555 return generic_force_reloc (fix);
5556 }
5557
5558 int
5559 ppc_fix_adjustable (fixS *fix)
5560 {
5561 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5562 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5563 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5564 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5565 && fix->fx_r_type != BFD_RELOC_GPREL16
5566 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5567 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
5568 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
5569 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
5570 }
5571 #endif
5572
5573 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5574 rs_align_code frag. */
5575
5576 void
5577 ppc_handle_align (struct frag *fragP)
5578 {
5579 valueT count = (fragP->fr_next->fr_address
5580 - (fragP->fr_address + fragP->fr_fix));
5581
5582 if (count != 0 && (count & 3) == 0)
5583 {
5584 char *dest = fragP->fr_literal + fragP->fr_fix;
5585
5586 fragP->fr_var = 4;
5587 md_number_to_chars (dest, 0x60000000, 4);
5588
5589 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5590 {
5591 /* For power6, we want the last nop to be a group terminating
5592 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5593 immediately after this one, with its address set to the last
5594 nop location. This will automatically reduce the number of
5595 nops in the current frag by one. */
5596 if (count > 4)
5597 {
5598 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5599
5600 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5601 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5602 group_nop->fr_fix = 0;
5603 group_nop->fr_offset = 1;
5604 group_nop->fr_type = rs_fill;
5605 fragP->fr_next = group_nop;
5606 dest = group_nop->fr_literal;
5607 }
5608
5609 md_number_to_chars (dest, 0x60210000, 4);
5610 }
5611 }
5612 }
5613
5614 /* Apply a fixup to the object code. This is called for all the
5615 fixups we generated by the call to fix_new_exp, above. In the call
5616 above we used a reloc code which was the largest legal reloc code
5617 plus the operand index. Here we undo that to recover the operand
5618 index. At this point all symbol values should be fully resolved,
5619 and we attempt to completely resolve the reloc. If we can not do
5620 that, we determine the correct reloc code and put it back in the
5621 fixup. */
5622
5623 void
5624 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
5625 {
5626 valueT value = * valP;
5627
5628 #ifdef OBJ_ELF
5629 if (fixP->fx_addsy != NULL)
5630 {
5631 /* Hack around bfd_install_relocation brain damage. */
5632 if (fixP->fx_pcrel)
5633 value += fixP->fx_frag->fr_address + fixP->fx_where;
5634 }
5635 else
5636 fixP->fx_done = 1;
5637 #else
5638 /* FIXME FIXME FIXME: The value we are passed in *valP includes
5639 the symbol values. If we are doing this relocation the code in
5640 write.c is going to call bfd_install_relocation, which is also
5641 going to use the symbol value. That means that if the reloc is
5642 fully resolved we want to use *valP since bfd_install_relocation is
5643 not being used.
5644 However, if the reloc is not fully resolved we do not want to use
5645 *valP, and must use fx_offset instead. However, if the reloc
5646 is PC relative, we do want to use *valP since it includes the
5647 result of md_pcrel_from. This is confusing. */
5648 if (fixP->fx_addsy == (symbolS *) NULL)
5649 fixP->fx_done = 1;
5650
5651 else if (fixP->fx_pcrel)
5652 ;
5653
5654 else
5655 value = fixP->fx_offset;
5656 #endif
5657
5658 if (fixP->fx_subsy != (symbolS *) NULL)
5659 {
5660 /* We can't actually support subtracting a symbol. */
5661 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
5662 }
5663
5664 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
5665 {
5666 int opindex;
5667 const struct powerpc_operand *operand;
5668 char *where;
5669 unsigned long insn;
5670
5671 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
5672
5673 operand = &powerpc_operands[opindex];
5674
5675 #ifdef OBJ_XCOFF
5676 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5677 does not generate a reloc. It uses the offset of `sym' within its
5678 csect. Other usages, such as `.long sym', generate relocs. This
5679 is the documented behaviour of non-TOC symbols. */
5680 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5681 && (operand->bitm & 0xfff0) == 0xfff0
5682 && operand->shift == 0
5683 && (operand->insert == NULL || ppc_obj64)
5684 && fixP->fx_addsy != NULL
5685 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5686 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5687 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5688 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
5689 {
5690 value = fixP->fx_offset;
5691 fixP->fx_done = 1;
5692 }
5693 #endif
5694
5695 /* Fetch the instruction, insert the fully resolved operand
5696 value, and stuff the instruction back again. */
5697 where = fixP->fx_frag->fr_literal + fixP->fx_where;
5698 if (target_big_endian)
5699 insn = bfd_getb32 ((unsigned char *) where);
5700 else
5701 insn = bfd_getl32 ((unsigned char *) where);
5702 insn = ppc_insert_operand (insn, operand, (offsetT) value,
5703 fixP->tc_fix_data.ppc_cpu,
5704 fixP->fx_file, fixP->fx_line);
5705 if (target_big_endian)
5706 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5707 else
5708 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5709
5710 if (fixP->fx_done)
5711 /* Nothing else to do here. */
5712 return;
5713
5714 assert (fixP->fx_addsy != NULL);
5715
5716 /* Determine a BFD reloc value based on the operand information.
5717 We are only prepared to turn a few of the operands into
5718 relocs. */
5719 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5720 && operand->bitm == 0x3fffffc
5721 && operand->shift == 0)
5722 fixP->fx_r_type = BFD_RELOC_PPC_B26;
5723 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5724 && operand->bitm == 0xfffc
5725 && operand->shift == 0)
5726 {
5727 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5728 #ifdef OBJ_XCOFF
5729 fixP->fx_size = 2;
5730 if (target_big_endian)
5731 fixP->fx_where += 2;
5732 #endif
5733 }
5734 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5735 && operand->bitm == 0x3fffffc
5736 && operand->shift == 0)
5737 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
5738 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5739 && operand->bitm == 0xfffc
5740 && operand->shift == 0)
5741 {
5742 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5743 #ifdef OBJ_XCOFF
5744 fixP->fx_size = 2;
5745 if (target_big_endian)
5746 fixP->fx_where += 2;
5747 #endif
5748 }
5749 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5750 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5751 && (operand->bitm & 0xfff0) == 0xfff0
5752 && operand->shift == 0)
5753 {
5754 if (ppc_is_toc_sym (fixP->fx_addsy))
5755 {
5756 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
5757 #ifdef OBJ_ELF
5758 if (ppc_obj64
5759 && (operand->flags & PPC_OPERAND_DS) != 0)
5760 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5761 #endif
5762 }
5763 else
5764 {
5765 fixP->fx_r_type = BFD_RELOC_16;
5766 #ifdef OBJ_ELF
5767 if (ppc_obj64
5768 && (operand->flags & PPC_OPERAND_DS) != 0)
5769 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
5770 #endif
5771 }
5772 fixP->fx_size = 2;
5773 if (target_big_endian)
5774 fixP->fx_where += 2;
5775 }
5776 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5777 else
5778 {
5779 char *sfile;
5780 unsigned int sline;
5781
5782 /* Use expr_symbol_where to see if this is an expression
5783 symbol. */
5784 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5785 as_bad_where (fixP->fx_file, fixP->fx_line,
5786 _("unresolved expression that must be resolved"));
5787 else
5788 as_bad_where (fixP->fx_file, fixP->fx_line,
5789 _("unsupported relocation against %s"),
5790 S_GET_NAME (fixP->fx_addsy));
5791 fixP->fx_done = 1;
5792 return;
5793 }
5794 }
5795 else
5796 {
5797 #ifdef OBJ_ELF
5798 ppc_elf_validate_fix (fixP, seg);
5799 #endif
5800 switch (fixP->fx_r_type)
5801 {
5802 case BFD_RELOC_CTOR:
5803 if (ppc_obj64)
5804 goto ctor64;
5805 /* fall through */
5806
5807 case BFD_RELOC_32:
5808 if (fixP->fx_pcrel)
5809 fixP->fx_r_type = BFD_RELOC_32_PCREL;
5810 /* fall through */
5811
5812 case BFD_RELOC_RVA:
5813 case BFD_RELOC_32_PCREL:
5814 case BFD_RELOC_PPC_EMB_NADDR32:
5815 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5816 value, 4);
5817 break;
5818
5819 case BFD_RELOC_64:
5820 ctor64:
5821 if (fixP->fx_pcrel)
5822 fixP->fx_r_type = BFD_RELOC_64_PCREL;
5823 /* fall through */
5824
5825 case BFD_RELOC_64_PCREL:
5826 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5827 value, 8);
5828 break;
5829
5830 case BFD_RELOC_GPREL16:
5831 case BFD_RELOC_16_GOT_PCREL:
5832 case BFD_RELOC_16_GOTOFF:
5833 case BFD_RELOC_LO16_GOTOFF:
5834 case BFD_RELOC_HI16_GOTOFF:
5835 case BFD_RELOC_HI16_S_GOTOFF:
5836 case BFD_RELOC_16_BASEREL:
5837 case BFD_RELOC_LO16_BASEREL:
5838 case BFD_RELOC_HI16_BASEREL:
5839 case BFD_RELOC_HI16_S_BASEREL:
5840 case BFD_RELOC_PPC_EMB_NADDR16:
5841 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5842 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5843 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5844 case BFD_RELOC_PPC_EMB_SDAI16:
5845 case BFD_RELOC_PPC_EMB_SDA2REL:
5846 case BFD_RELOC_PPC_EMB_SDA2I16:
5847 case BFD_RELOC_PPC_EMB_RELSEC16:
5848 case BFD_RELOC_PPC_EMB_RELST_LO:
5849 case BFD_RELOC_PPC_EMB_RELST_HI:
5850 case BFD_RELOC_PPC_EMB_RELST_HA:
5851 case BFD_RELOC_PPC_EMB_RELSDA:
5852 case BFD_RELOC_PPC_TOC16:
5853 #ifdef OBJ_ELF
5854 case BFD_RELOC_PPC64_TOC16_LO:
5855 case BFD_RELOC_PPC64_TOC16_HI:
5856 case BFD_RELOC_PPC64_TOC16_HA:
5857 #endif
5858 if (fixP->fx_pcrel)
5859 {
5860 if (fixP->fx_addsy != NULL)
5861 as_bad_where (fixP->fx_file, fixP->fx_line,
5862 _("cannot emit PC relative %s relocation against %s"),
5863 bfd_get_reloc_code_name (fixP->fx_r_type),
5864 S_GET_NAME (fixP->fx_addsy));
5865 else
5866 as_bad_where (fixP->fx_file, fixP->fx_line,
5867 _("cannot emit PC relative %s relocation"),
5868 bfd_get_reloc_code_name (fixP->fx_r_type));
5869 }
5870
5871 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5872 value, 2);
5873 break;
5874
5875 case BFD_RELOC_16:
5876 if (fixP->fx_pcrel)
5877 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5878 /* fall through */
5879
5880 case BFD_RELOC_16_PCREL:
5881 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5882 value, 2);
5883 break;
5884
5885 case BFD_RELOC_LO16:
5886 if (fixP->fx_pcrel)
5887 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5888 /* fall through */
5889
5890 case BFD_RELOC_LO16_PCREL:
5891 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5892 value, 2);
5893 break;
5894
5895 /* This case happens when you write, for example,
5896 lis %r3,(L1-L2)@ha
5897 where L1 and L2 are defined later. */
5898 case BFD_RELOC_HI16:
5899 if (fixP->fx_pcrel)
5900 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5901 /* fall through */
5902
5903 case BFD_RELOC_HI16_PCREL:
5904 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5905 PPC_HI (value), 2);
5906 break;
5907
5908 case BFD_RELOC_HI16_S:
5909 if (fixP->fx_pcrel)
5910 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5911 /* fall through */
5912
5913 case BFD_RELOC_HI16_S_PCREL:
5914 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5915 PPC_HA (value), 2);
5916 break;
5917
5918 #ifdef OBJ_ELF
5919 case BFD_RELOC_PPC64_HIGHER:
5920 if (fixP->fx_pcrel)
5921 abort ();
5922 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5923 PPC_HIGHER (value), 2);
5924 break;
5925
5926 case BFD_RELOC_PPC64_HIGHER_S:
5927 if (fixP->fx_pcrel)
5928 abort ();
5929 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5930 PPC_HIGHERA (value), 2);
5931 break;
5932
5933 case BFD_RELOC_PPC64_HIGHEST:
5934 if (fixP->fx_pcrel)
5935 abort ();
5936 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5937 PPC_HIGHEST (value), 2);
5938 break;
5939
5940 case BFD_RELOC_PPC64_HIGHEST_S:
5941 if (fixP->fx_pcrel)
5942 abort ();
5943 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5944 PPC_HIGHESTA (value), 2);
5945 break;
5946
5947 case BFD_RELOC_PPC64_ADDR16_DS:
5948 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5949 case BFD_RELOC_PPC64_GOT16_DS:
5950 case BFD_RELOC_PPC64_GOT16_LO_DS:
5951 case BFD_RELOC_PPC64_PLT16_LO_DS:
5952 case BFD_RELOC_PPC64_SECTOFF_DS:
5953 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5954 case BFD_RELOC_PPC64_TOC16_DS:
5955 case BFD_RELOC_PPC64_TOC16_LO_DS:
5956 case BFD_RELOC_PPC64_PLTGOT16_DS:
5957 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
5958 if (fixP->fx_pcrel)
5959 abort ();
5960 {
5961 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
5962 unsigned long val, mask;
5963
5964 if (target_big_endian)
5965 val = bfd_getb32 (where - 2);
5966 else
5967 val = bfd_getl32 (where);
5968 mask = 0xfffc;
5969 /* lq insns reserve the four lsbs. */
5970 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
5971 && (val & (0x3f << 26)) == (56u << 26))
5972 mask = 0xfff0;
5973 val |= value & mask;
5974 if (target_big_endian)
5975 bfd_putb16 ((bfd_vma) val, where);
5976 else
5977 bfd_putl16 ((bfd_vma) val, where);
5978 }
5979 break;
5980
5981 case BFD_RELOC_PPC_B16_BRTAKEN:
5982 case BFD_RELOC_PPC_B16_BRNTAKEN:
5983 case BFD_RELOC_PPC_BA16_BRTAKEN:
5984 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5985 break;
5986
5987 case BFD_RELOC_PPC_TLS:
5988 break;
5989
5990 case BFD_RELOC_PPC_DTPMOD:
5991 case BFD_RELOC_PPC_TPREL16:
5992 case BFD_RELOC_PPC_TPREL16_LO:
5993 case BFD_RELOC_PPC_TPREL16_HI:
5994 case BFD_RELOC_PPC_TPREL16_HA:
5995 case BFD_RELOC_PPC_TPREL:
5996 case BFD_RELOC_PPC_DTPREL16:
5997 case BFD_RELOC_PPC_DTPREL16_LO:
5998 case BFD_RELOC_PPC_DTPREL16_HI:
5999 case BFD_RELOC_PPC_DTPREL16_HA:
6000 case BFD_RELOC_PPC_DTPREL:
6001 case BFD_RELOC_PPC_GOT_TLSGD16:
6002 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6003 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6004 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6005 case BFD_RELOC_PPC_GOT_TLSLD16:
6006 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6007 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6008 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6009 case BFD_RELOC_PPC_GOT_TPREL16:
6010 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6011 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6012 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6013 case BFD_RELOC_PPC_GOT_DTPREL16:
6014 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6015 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6016 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6017 case BFD_RELOC_PPC64_TPREL16_DS:
6018 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6019 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6020 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6021 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6022 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6023 case BFD_RELOC_PPC64_DTPREL16_DS:
6024 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6025 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6026 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6027 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6028 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6029 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6030 break;
6031 #endif
6032 /* Because SDA21 modifies the register field, the size is set to 4
6033 bytes, rather than 2, so offset it here appropriately. */
6034 case BFD_RELOC_PPC_EMB_SDA21:
6035 if (fixP->fx_pcrel)
6036 abort ();
6037
6038 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
6039 + ((target_big_endian) ? 2 : 0),
6040 value, 2);
6041 break;
6042
6043 case BFD_RELOC_8:
6044 if (fixP->fx_pcrel)
6045 {
6046 /* This can occur if there is a bug in the input assembler, eg:
6047 ".byte <undefined_symbol> - ." */
6048 if (fixP->fx_addsy)
6049 as_bad (_("Unable to handle reference to symbol %s"),
6050 S_GET_NAME (fixP->fx_addsy));
6051 else
6052 as_bad (_("Unable to resolve expression"));
6053 fixP->fx_done = 1;
6054 }
6055 else
6056 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6057 value, 1);
6058 break;
6059
6060 case BFD_RELOC_24_PLT_PCREL:
6061 case BFD_RELOC_PPC_LOCAL24PC:
6062 if (!fixP->fx_pcrel && !fixP->fx_done)
6063 abort ();
6064
6065 if (fixP->fx_done)
6066 {
6067 char *where;
6068 unsigned long insn;
6069
6070 /* Fetch the instruction, insert the fully resolved operand
6071 value, and stuff the instruction back again. */
6072 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6073 if (target_big_endian)
6074 insn = bfd_getb32 ((unsigned char *) where);
6075 else
6076 insn = bfd_getl32 ((unsigned char *) where);
6077 if ((value & 3) != 0)
6078 as_bad_where (fixP->fx_file, fixP->fx_line,
6079 _("must branch to an address a multiple of 4"));
6080 if ((offsetT) value < -0x40000000
6081 || (offsetT) value >= 0x40000000)
6082 as_bad_where (fixP->fx_file, fixP->fx_line,
6083 _("@local or @plt branch destination is too far away, %ld bytes"),
6084 (long) value);
6085 insn = insn | (value & 0x03fffffc);
6086 if (target_big_endian)
6087 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6088 else
6089 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6090 }
6091 break;
6092
6093 case BFD_RELOC_VTABLE_INHERIT:
6094 fixP->fx_done = 0;
6095 if (fixP->fx_addsy
6096 && !S_IS_DEFINED (fixP->fx_addsy)
6097 && !S_IS_WEAK (fixP->fx_addsy))
6098 S_SET_WEAK (fixP->fx_addsy);
6099 break;
6100
6101 case BFD_RELOC_VTABLE_ENTRY:
6102 fixP->fx_done = 0;
6103 break;
6104
6105 #ifdef OBJ_ELF
6106 /* Generated by reference to `sym@tocbase'. The sym is
6107 ignored by the linker. */
6108 case BFD_RELOC_PPC64_TOC:
6109 fixP->fx_done = 0;
6110 break;
6111 #endif
6112 default:
6113 fprintf (stderr,
6114 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
6115 fflush (stderr);
6116 abort ();
6117 }
6118 }
6119
6120 #ifdef OBJ_ELF
6121 fixP->fx_addnumber = value;
6122
6123 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6124 from the section contents. If we are going to be emitting a reloc
6125 then the section contents are immaterial, so don't warn if they
6126 happen to overflow. Leave such warnings to ld. */
6127 if (!fixP->fx_done)
6128 fixP->fx_no_overflow = 1;
6129 #else
6130 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6131 fixP->fx_addnumber = 0;
6132 else
6133 {
6134 #ifdef TE_PE
6135 fixP->fx_addnumber = 0;
6136 #else
6137 /* We want to use the offset within the toc, not the actual VMA
6138 of the symbol. */
6139 fixP->fx_addnumber =
6140 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6141 - S_GET_VALUE (ppc_toc_csect);
6142 #endif
6143 }
6144 #endif
6145 }
6146
6147 /* Generate a reloc for a fixup. */
6148
6149 arelent *
6150 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
6151 {
6152 arelent *reloc;
6153
6154 reloc = (arelent *) xmalloc (sizeof (arelent));
6155
6156 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6157 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
6158 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6159 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6160 if (reloc->howto == (reloc_howto_type *) NULL)
6161 {
6162 as_bad_where (fixp->fx_file, fixp->fx_line,
6163 _("reloc %d not supported by object file format"),
6164 (int) fixp->fx_r_type);
6165 return NULL;
6166 }
6167 reloc->addend = fixp->fx_addnumber;
6168
6169 return reloc;
6170 }
6171
6172 void
6173 ppc_cfi_frame_initial_instructions (void)
6174 {
6175 cfi_add_CFA_def_cfa (1, 0);
6176 }
6177
6178 int
6179 tc_ppc_regname_to_dw2regnum (char *regname)
6180 {
6181 unsigned int regnum = -1;
6182 unsigned int i;
6183 const char *p;
6184 char *q;
6185 static struct { char *name; int dw2regnum; } regnames[] =
6186 {
6187 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6188 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
6189 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
6190 { "spe_acc", 111 }, { "spefscr", 112 }
6191 };
6192
6193 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6194 if (strcmp (regnames[i].name, regname) == 0)
6195 return regnames[i].dw2regnum;
6196
6197 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6198 {
6199 p = regname + 1 + (regname[1] == '.');
6200 regnum = strtoul (p, &q, 10);
6201 if (p == q || *q || regnum >= 32)
6202 return -1;
6203 if (regname[0] == 'f')
6204 regnum += 32;
6205 else if (regname[0] == 'v')
6206 regnum += 77;
6207 }
6208 else if (regname[0] == 'c' && regname[1] == 'r')
6209 {
6210 p = regname + 2 + (regname[2] == '.');
6211 if (p[0] < '0' || p[0] > '7' || p[1])
6212 return -1;
6213 regnum = p[0] - '0' + 68;
6214 }
6215 return regnum;
6216 }
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