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[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
22
23 #include "as.h"
24 #include "safe-ctype.h"
25 #include "subsegs.h"
26 #include "dw2gencfi.h"
27 #include "opcode/ppc.h"
28
29 #ifdef OBJ_ELF
30 #include "elf/ppc.h"
31 #include "dwarf2dbg.h"
32 #endif
33
34 #ifdef TE_PE
35 #include "coff/pe.h"
36 #endif
37
38 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40 /* Tell the main code what the endianness is. */
41 extern int target_big_endian;
42
43 /* Whether or not, we've set target_big_endian. */
44 static int set_target_endian = 0;
45
46 /* Whether to use user friendly register names. */
47 #ifndef TARGET_REG_NAMES_P
48 #ifdef TE_PE
49 #define TARGET_REG_NAMES_P TRUE
50 #else
51 #define TARGET_REG_NAMES_P FALSE
52 #endif
53 #endif
54
55 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58 /* #lo(value) denotes the least significant 16 bits of the indicated. */
59 #define PPC_LO(v) ((v) & 0xffff)
60
61 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
62 #define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
67 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
68
69 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
70 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
71
72 /* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
74 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
75
76 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
77 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
78
79 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
80 compensating for #lo being treated as a signed number. */
81 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
82
83 #define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
85 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
86
87 static void ppc_macro (char *, const struct powerpc_macro *);
88 static void ppc_byte (int);
89
90 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
91 static void ppc_tc (int);
92 static void ppc_machine (int);
93 #endif
94
95 #ifdef OBJ_XCOFF
96 static void ppc_comm (int);
97 static void ppc_bb (int);
98 static void ppc_bc (int);
99 static void ppc_bf (int);
100 static void ppc_biei (int);
101 static void ppc_bs (int);
102 static void ppc_eb (int);
103 static void ppc_ec (int);
104 static void ppc_ef (int);
105 static void ppc_es (int);
106 static void ppc_csect (int);
107 static void ppc_change_csect (symbolS *, offsetT);
108 static void ppc_function (int);
109 static void ppc_extern (int);
110 static void ppc_lglobl (int);
111 static void ppc_section (int);
112 static void ppc_named_section (int);
113 static void ppc_stabx (int);
114 static void ppc_rename (int);
115 static void ppc_toc (int);
116 static void ppc_xcoff_cons (int);
117 static void ppc_vbyte (int);
118 #endif
119
120 #ifdef OBJ_ELF
121 static void ppc_elf_cons (int);
122 static void ppc_elf_rdata (int);
123 static void ppc_elf_lcomm (int);
124 #endif
125
126 #ifdef TE_PE
127 static void ppc_previous (int);
128 static void ppc_pdata (int);
129 static void ppc_ydata (int);
130 static void ppc_reldata (int);
131 static void ppc_rdata (int);
132 static void ppc_ualong (int);
133 static void ppc_znop (int);
134 static void ppc_pe_comm (int);
135 static void ppc_pe_section (int);
136 static void ppc_pe_function (int);
137 static void ppc_pe_tocd (int);
138 #endif
139 \f
140 /* Generic assembler global variables which must be defined by all
141 targets. */
142
143 #ifdef OBJ_ELF
144 /* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148 static const char ppc_solaris_comment_chars[] = "#!";
149 static const char ppc_eabi_comment_chars[] = "#";
150
151 #ifdef TARGET_SOLARIS_COMMENT
152 const char *ppc_comment_chars = ppc_solaris_comment_chars;
153 #else
154 const char *ppc_comment_chars = ppc_eabi_comment_chars;
155 #endif
156 #else
157 const char comment_chars[] = "#";
158 #endif
159
160 /* Characters which start a comment at the beginning of a line. */
161 const char line_comment_chars[] = "#";
162
163 /* Characters which may be used to separate multiple commands on a
164 single line. */
165 const char line_separator_chars[] = ";";
166
167 /* Characters which are used to indicate an exponent in a floating
168 point number. */
169 const char EXP_CHARS[] = "eE";
170
171 /* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173 const char FLT_CHARS[] = "dD";
174
175 /* Anything that can start an operand needs to be mentioned here,
176 to stop the input scrubber eating whitespace. */
177 const char ppc_symbol_chars[] = "%[";
178
179 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180 int ppc_cie_data_alignment;
181
182 /* The type of processor we are assembling for. This is one or more
183 of the PPC_OPCODE flags defined in opcode/ppc.h. */
184 ppc_cpu_t ppc_cpu = 0;
185 \f
186 /* The target specific pseudo-ops which we support. */
187
188 const pseudo_typeS md_pseudo_table[] =
189 {
190 /* Pseudo-ops which must be overridden. */
191 { "byte", ppc_byte, 0 },
192
193 #ifdef OBJ_XCOFF
194 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
195 legitimately belong in the obj-*.c file. However, XCOFF is based
196 on COFF, and is only implemented for the RS/6000. We just use
197 obj-coff.c, and add what we need here. */
198 { "comm", ppc_comm, 0 },
199 { "lcomm", ppc_comm, 1 },
200 { "bb", ppc_bb, 0 },
201 { "bc", ppc_bc, 0 },
202 { "bf", ppc_bf, 0 },
203 { "bi", ppc_biei, 0 },
204 { "bs", ppc_bs, 0 },
205 { "csect", ppc_csect, 0 },
206 { "data", ppc_section, 'd' },
207 { "eb", ppc_eb, 0 },
208 { "ec", ppc_ec, 0 },
209 { "ef", ppc_ef, 0 },
210 { "ei", ppc_biei, 1 },
211 { "es", ppc_es, 0 },
212 { "extern", ppc_extern, 0 },
213 { "function", ppc_function, 0 },
214 { "lglobl", ppc_lglobl, 0 },
215 { "rename", ppc_rename, 0 },
216 { "section", ppc_named_section, 0 },
217 { "stabx", ppc_stabx, 0 },
218 { "text", ppc_section, 't' },
219 { "toc", ppc_toc, 0 },
220 { "long", ppc_xcoff_cons, 2 },
221 { "llong", ppc_xcoff_cons, 3 },
222 { "word", ppc_xcoff_cons, 1 },
223 { "short", ppc_xcoff_cons, 1 },
224 { "vbyte", ppc_vbyte, 0 },
225 #endif
226
227 #ifdef OBJ_ELF
228 { "llong", ppc_elf_cons, 8 },
229 { "quad", ppc_elf_cons, 8 },
230 { "long", ppc_elf_cons, 4 },
231 { "word", ppc_elf_cons, 2 },
232 { "short", ppc_elf_cons, 2 },
233 { "rdata", ppc_elf_rdata, 0 },
234 { "rodata", ppc_elf_rdata, 0 },
235 { "lcomm", ppc_elf_lcomm, 0 },
236 #endif
237
238 #ifdef TE_PE
239 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
240 { "previous", ppc_previous, 0 },
241 { "pdata", ppc_pdata, 0 },
242 { "ydata", ppc_ydata, 0 },
243 { "reldata", ppc_reldata, 0 },
244 { "rdata", ppc_rdata, 0 },
245 { "ualong", ppc_ualong, 0 },
246 { "znop", ppc_znop, 0 },
247 { "comm", ppc_pe_comm, 0 },
248 { "lcomm", ppc_pe_comm, 1 },
249 { "section", ppc_pe_section, 0 },
250 { "function", ppc_pe_function,0 },
251 { "tocd", ppc_pe_tocd, 0 },
252 #endif
253
254 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
255 { "tc", ppc_tc, 0 },
256 { "machine", ppc_machine, 0 },
257 #endif
258
259 { NULL, NULL, 0 }
260 };
261
262 \f
263 /* Predefined register names if -mregnames (or default for Windows NT).
264 In general, there are lots of them, in an attempt to be compatible
265 with a number of other Windows NT assemblers. */
266
267 /* Structure to hold information about predefined registers. */
268 struct pd_reg
269 {
270 char *name;
271 int value;
272 };
273
274 /* List of registers that are pre-defined:
275
276 Each general register has predefined names of the form:
277 1. r<reg_num> which has the value <reg_num>.
278 2. r.<reg_num> which has the value <reg_num>.
279
280 Each floating point register has predefined names of the form:
281 1. f<reg_num> which has the value <reg_num>.
282 2. f.<reg_num> which has the value <reg_num>.
283
284 Each vector unit register has predefined names of the form:
285 1. v<reg_num> which has the value <reg_num>.
286 2. v.<reg_num> which has the value <reg_num>.
287
288 Each condition register has predefined names of the form:
289 1. cr<reg_num> which has the value <reg_num>.
290 2. cr.<reg_num> which has the value <reg_num>.
291
292 There are individual registers as well:
293 sp or r.sp has the value 1
294 rtoc or r.toc has the value 2
295 fpscr has the value 0
296 xer has the value 1
297 lr has the value 8
298 ctr has the value 9
299 pmr has the value 0
300 dar has the value 19
301 dsisr has the value 18
302 dec has the value 22
303 sdr1 has the value 25
304 srr0 has the value 26
305 srr1 has the value 27
306
307 The table is sorted. Suitable for searching by a binary search. */
308
309 static const struct pd_reg pre_defined_registers[] =
310 {
311 { "cr.0", 0 }, /* Condition Registers */
312 { "cr.1", 1 },
313 { "cr.2", 2 },
314 { "cr.3", 3 },
315 { "cr.4", 4 },
316 { "cr.5", 5 },
317 { "cr.6", 6 },
318 { "cr.7", 7 },
319
320 { "cr0", 0 },
321 { "cr1", 1 },
322 { "cr2", 2 },
323 { "cr3", 3 },
324 { "cr4", 4 },
325 { "cr5", 5 },
326 { "cr6", 6 },
327 { "cr7", 7 },
328
329 { "ctr", 9 },
330
331 { "dar", 19 }, /* Data Access Register */
332 { "dec", 22 }, /* Decrementer */
333 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
334
335 { "f.0", 0 }, /* Floating point registers */
336 { "f.1", 1 },
337 { "f.10", 10 },
338 { "f.11", 11 },
339 { "f.12", 12 },
340 { "f.13", 13 },
341 { "f.14", 14 },
342 { "f.15", 15 },
343 { "f.16", 16 },
344 { "f.17", 17 },
345 { "f.18", 18 },
346 { "f.19", 19 },
347 { "f.2", 2 },
348 { "f.20", 20 },
349 { "f.21", 21 },
350 { "f.22", 22 },
351 { "f.23", 23 },
352 { "f.24", 24 },
353 { "f.25", 25 },
354 { "f.26", 26 },
355 { "f.27", 27 },
356 { "f.28", 28 },
357 { "f.29", 29 },
358 { "f.3", 3 },
359 { "f.30", 30 },
360 { "f.31", 31 },
361 { "f.4", 4 },
362 { "f.5", 5 },
363 { "f.6", 6 },
364 { "f.7", 7 },
365 { "f.8", 8 },
366 { "f.9", 9 },
367
368 { "f0", 0 },
369 { "f1", 1 },
370 { "f10", 10 },
371 { "f11", 11 },
372 { "f12", 12 },
373 { "f13", 13 },
374 { "f14", 14 },
375 { "f15", 15 },
376 { "f16", 16 },
377 { "f17", 17 },
378 { "f18", 18 },
379 { "f19", 19 },
380 { "f2", 2 },
381 { "f20", 20 },
382 { "f21", 21 },
383 { "f22", 22 },
384 { "f23", 23 },
385 { "f24", 24 },
386 { "f25", 25 },
387 { "f26", 26 },
388 { "f27", 27 },
389 { "f28", 28 },
390 { "f29", 29 },
391 { "f3", 3 },
392 { "f30", 30 },
393 { "f31", 31 },
394 { "f4", 4 },
395 { "f5", 5 },
396 { "f6", 6 },
397 { "f7", 7 },
398 { "f8", 8 },
399 { "f9", 9 },
400
401 { "fpscr", 0 },
402
403 /* Quantization registers used with pair single instructions. */
404 { "gqr.0", 0 },
405 { "gqr.1", 1 },
406 { "gqr.2", 2 },
407 { "gqr.3", 3 },
408 { "gqr.4", 4 },
409 { "gqr.5", 5 },
410 { "gqr.6", 6 },
411 { "gqr.7", 7 },
412 { "gqr0", 0 },
413 { "gqr1", 1 },
414 { "gqr2", 2 },
415 { "gqr3", 3 },
416 { "gqr4", 4 },
417 { "gqr5", 5 },
418 { "gqr6", 6 },
419 { "gqr7", 7 },
420
421 { "lr", 8 }, /* Link Register */
422
423 { "pmr", 0 },
424
425 { "r.0", 0 }, /* General Purpose Registers */
426 { "r.1", 1 },
427 { "r.10", 10 },
428 { "r.11", 11 },
429 { "r.12", 12 },
430 { "r.13", 13 },
431 { "r.14", 14 },
432 { "r.15", 15 },
433 { "r.16", 16 },
434 { "r.17", 17 },
435 { "r.18", 18 },
436 { "r.19", 19 },
437 { "r.2", 2 },
438 { "r.20", 20 },
439 { "r.21", 21 },
440 { "r.22", 22 },
441 { "r.23", 23 },
442 { "r.24", 24 },
443 { "r.25", 25 },
444 { "r.26", 26 },
445 { "r.27", 27 },
446 { "r.28", 28 },
447 { "r.29", 29 },
448 { "r.3", 3 },
449 { "r.30", 30 },
450 { "r.31", 31 },
451 { "r.4", 4 },
452 { "r.5", 5 },
453 { "r.6", 6 },
454 { "r.7", 7 },
455 { "r.8", 8 },
456 { "r.9", 9 },
457
458 { "r.sp", 1 }, /* Stack Pointer */
459
460 { "r.toc", 2 }, /* Pointer to the table of contents */
461
462 { "r0", 0 }, /* More general purpose registers */
463 { "r1", 1 },
464 { "r10", 10 },
465 { "r11", 11 },
466 { "r12", 12 },
467 { "r13", 13 },
468 { "r14", 14 },
469 { "r15", 15 },
470 { "r16", 16 },
471 { "r17", 17 },
472 { "r18", 18 },
473 { "r19", 19 },
474 { "r2", 2 },
475 { "r20", 20 },
476 { "r21", 21 },
477 { "r22", 22 },
478 { "r23", 23 },
479 { "r24", 24 },
480 { "r25", 25 },
481 { "r26", 26 },
482 { "r27", 27 },
483 { "r28", 28 },
484 { "r29", 29 },
485 { "r3", 3 },
486 { "r30", 30 },
487 { "r31", 31 },
488 { "r4", 4 },
489 { "r5", 5 },
490 { "r6", 6 },
491 { "r7", 7 },
492 { "r8", 8 },
493 { "r9", 9 },
494
495 { "rtoc", 2 }, /* Table of contents */
496
497 { "sdr1", 25 }, /* Storage Description Register 1 */
498
499 { "sp", 1 },
500
501 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
502 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
503
504 { "v.0", 0 }, /* Vector registers */
505 { "v.1", 1 },
506 { "v.10", 10 },
507 { "v.11", 11 },
508 { "v.12", 12 },
509 { "v.13", 13 },
510 { "v.14", 14 },
511 { "v.15", 15 },
512 { "v.16", 16 },
513 { "v.17", 17 },
514 { "v.18", 18 },
515 { "v.19", 19 },
516 { "v.2", 2 },
517 { "v.20", 20 },
518 { "v.21", 21 },
519 { "v.22", 22 },
520 { "v.23", 23 },
521 { "v.24", 24 },
522 { "v.25", 25 },
523 { "v.26", 26 },
524 { "v.27", 27 },
525 { "v.28", 28 },
526 { "v.29", 29 },
527 { "v.3", 3 },
528 { "v.30", 30 },
529 { "v.31", 31 },
530 { "v.4", 4 },
531 { "v.5", 5 },
532 { "v.6", 6 },
533 { "v.7", 7 },
534 { "v.8", 8 },
535 { "v.9", 9 },
536
537 { "v0", 0 },
538 { "v1", 1 },
539 { "v10", 10 },
540 { "v11", 11 },
541 { "v12", 12 },
542 { "v13", 13 },
543 { "v14", 14 },
544 { "v15", 15 },
545 { "v16", 16 },
546 { "v17", 17 },
547 { "v18", 18 },
548 { "v19", 19 },
549 { "v2", 2 },
550 { "v20", 20 },
551 { "v21", 21 },
552 { "v22", 22 },
553 { "v23", 23 },
554 { "v24", 24 },
555 { "v25", 25 },
556 { "v26", 26 },
557 { "v27", 27 },
558 { "v28", 28 },
559 { "v29", 29 },
560 { "v3", 3 },
561 { "v30", 30 },
562 { "v31", 31 },
563 { "v4", 4 },
564 { "v5", 5 },
565 { "v6", 6 },
566 { "v7", 7 },
567 { "v8", 8 },
568 { "v9", 9 },
569
570 { "xer", 1 },
571
572 };
573
574 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
575
576 /* Given NAME, find the register number associated with that name, return
577 the integer value associated with the given name or -1 on failure. */
578
579 static int
580 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
581 {
582 int middle, low, high;
583 int cmp;
584
585 low = 0;
586 high = regcount - 1;
587
588 do
589 {
590 middle = (low + high) / 2;
591 cmp = strcasecmp (name, regs[middle].name);
592 if (cmp < 0)
593 high = middle - 1;
594 else if (cmp > 0)
595 low = middle + 1;
596 else
597 return regs[middle].value;
598 }
599 while (low <= high);
600
601 return -1;
602 }
603
604 /*
605 * Summary of register_name.
606 *
607 * in: Input_line_pointer points to 1st char of operand.
608 *
609 * out: A expressionS.
610 * The operand may have been a register: in this case, X_op == O_register,
611 * X_add_number is set to the register number, and truth is returned.
612 * Input_line_pointer->(next non-blank) char after operand, or is in its
613 * original state.
614 */
615
616 static bfd_boolean
617 register_name (expressionS *expressionP)
618 {
619 int reg_number;
620 char *name;
621 char *start;
622 char c;
623
624 /* Find the spelling of the operand. */
625 start = name = input_line_pointer;
626 if (name[0] == '%' && ISALPHA (name[1]))
627 name = ++input_line_pointer;
628
629 else if (!reg_names_p || !ISALPHA (name[0]))
630 return FALSE;
631
632 c = get_symbol_end ();
633 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
634
635 /* Put back the delimiting char. */
636 *input_line_pointer = c;
637
638 /* Look to see if it's in the register table. */
639 if (reg_number >= 0)
640 {
641 expressionP->X_op = O_register;
642 expressionP->X_add_number = reg_number;
643
644 /* Make the rest nice. */
645 expressionP->X_add_symbol = NULL;
646 expressionP->X_op_symbol = NULL;
647 return TRUE;
648 }
649
650 /* Reset the line as if we had not done anything. */
651 input_line_pointer = start;
652 return FALSE;
653 }
654 \f
655 /* This function is called for each symbol seen in an expression. It
656 handles the special parsing which PowerPC assemblers are supposed
657 to use for condition codes. */
658
659 /* Whether to do the special parsing. */
660 static bfd_boolean cr_operand;
661
662 /* Names to recognize in a condition code. This table is sorted. */
663 static const struct pd_reg cr_names[] =
664 {
665 { "cr0", 0 },
666 { "cr1", 1 },
667 { "cr2", 2 },
668 { "cr3", 3 },
669 { "cr4", 4 },
670 { "cr5", 5 },
671 { "cr6", 6 },
672 { "cr7", 7 },
673 { "eq", 2 },
674 { "gt", 1 },
675 { "lt", 0 },
676 { "so", 3 },
677 { "un", 3 }
678 };
679
680 /* Parsing function. This returns non-zero if it recognized an
681 expression. */
682
683 int
684 ppc_parse_name (const char *name, expressionS *expr)
685 {
686 int val;
687
688 if (! cr_operand)
689 return 0;
690
691 if (*name == '%')
692 ++name;
693 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
694 name);
695 if (val < 0)
696 return 0;
697
698 expr->X_op = O_constant;
699 expr->X_add_number = val;
700
701 return 1;
702 }
703 \f
704 /* Local variables. */
705
706 /* Whether to target xcoff64/elf64. */
707 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
708
709 /* Opcode hash table. */
710 static struct hash_control *ppc_hash;
711
712 /* Macro hash table. */
713 static struct hash_control *ppc_macro_hash;
714
715 #ifdef OBJ_ELF
716 /* What type of shared library support to use. */
717 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
718
719 /* Flags to set in the elf header. */
720 static flagword ppc_flags = 0;
721
722 /* Whether this is Solaris or not. */
723 #ifdef TARGET_SOLARIS_COMMENT
724 #define SOLARIS_P TRUE
725 #else
726 #define SOLARIS_P FALSE
727 #endif
728
729 static bfd_boolean msolaris = SOLARIS_P;
730 #endif
731
732 #ifdef OBJ_XCOFF
733
734 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740 /* Next subsegment to allocate within the .text segment. */
741 static subsegT ppc_text_subsegment = 2;
742
743 /* Linked list of csects in the text section. */
744 static symbolS *ppc_text_csects;
745
746 /* Next subsegment to allocate within the .data segment. */
747 static subsegT ppc_data_subsegment = 2;
748
749 /* Linked list of csects in the data section. */
750 static symbolS *ppc_data_csects;
751
752 /* The current csect. */
753 static symbolS *ppc_current_csect;
754
755 /* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760 static symbolS *ppc_toc_csect;
761
762 /* The first frag in the TOC subsegment. */
763 static fragS *ppc_toc_frag;
764
765 /* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767 static fragS *ppc_after_toc_frag;
768
769 /* The current static block. */
770 static symbolS *ppc_current_block;
771
772 /* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775 static asection *ppc_coff_debug_section;
776
777 #endif /* OBJ_XCOFF */
778
779 #ifdef TE_PE
780
781 /* Various sections that we need for PE coff support. */
782 static segT ydata_section;
783 static segT pdata_section;
784 static segT reldata_section;
785 static segT rdata_section;
786 static segT tocdata_section;
787
788 /* The current section and the previous section. See ppc_previous. */
789 static segT ppc_previous_section;
790 static segT ppc_current_section;
791
792 #endif /* TE_PE */
793
794 #ifdef OBJ_ELF
795 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
796 #define PPC_APUINFO_ISEL 0x40
797 #define PPC_APUINFO_PMR 0x41
798 #define PPC_APUINFO_RFMCI 0x42
799 #define PPC_APUINFO_CACHELCK 0x43
800 #define PPC_APUINFO_SPE 0x100
801 #define PPC_APUINFO_EFS 0x101
802 #define PPC_APUINFO_BRLOCK 0x102
803
804 /*
805 * We keep a list of APUinfo
806 */
807 unsigned long *ppc_apuinfo_list;
808 unsigned int ppc_apuinfo_num;
809 unsigned int ppc_apuinfo_num_alloc;
810 #endif /* OBJ_ELF */
811 \f
812 #ifdef OBJ_ELF
813 const char *const md_shortopts = "b:l:usm:K:VQ:";
814 #else
815 const char *const md_shortopts = "um:";
816 #endif
817 const struct option md_longopts[] = {
818 {NULL, no_argument, NULL, 0}
819 };
820 const size_t md_longopts_size = sizeof (md_longopts);
821
822
823 /* Handle -m options that set cpu type, and .machine arg. */
824
825 static int
826 parse_cpu (const char *arg)
827 {
828 ppc_cpu_t altivec_or_spe = ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_SPE);
829
830 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
831 (RIOS2). */
832 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
833 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
834 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
835 else if (strcmp (arg, "pwr") == 0)
836 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
837 /* -m601 means to assemble for the PowerPC 601, which includes
838 instructions that are holdovers from the Power. */
839 else if (strcmp (arg, "601") == 0)
840 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
841 | PPC_OPCODE_601 | PPC_OPCODE_32);
842 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
843 PowerPC 603/604. */
844 else if (strcmp (arg, "ppc") == 0
845 || strcmp (arg, "ppc32") == 0
846 || strcmp (arg, "603") == 0
847 || strcmp (arg, "604") == 0)
848 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
849 /* Do all PPC750s have paired single ops? */
850 else if (strcmp (arg, "750cl") == 0)
851 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS;
852 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
853 else if (strcmp (arg, "403") == 0
854 || strcmp (arg, "405") == 0)
855 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
856 | PPC_OPCODE_403 | PPC_OPCODE_32);
857 else if (strcmp (arg, "440") == 0
858 || strcmp (arg, "464") == 0)
859 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
860 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
861 else if (strcmp (arg, "7400") == 0
862 || strcmp (arg, "7410") == 0
863 || strcmp (arg, "7450") == 0
864 || strcmp (arg, "7455") == 0)
865 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
866 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
867 else if (strcmp (arg, "e300") == 0)
868 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
869 | PPC_OPCODE_E300);
870 else if (strcmp (arg, "altivec") == 0)
871 {
872 if (ppc_cpu == 0)
873 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC;
874
875 altivec_or_spe |= PPC_OPCODE_ALTIVEC;
876 }
877 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
878 {
879 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
880 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
881 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
882 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
883 }
884 else if (strcmp (arg, "e500mc") == 0)
885 {
886 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
887 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
888 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
889 }
890 else if (strcmp (arg, "spe") == 0)
891 {
892 if (ppc_cpu == 0)
893 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_EFS;
894
895 altivec_or_spe |= PPC_OPCODE_SPE;
896 }
897 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
898 620. */
899 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
900 {
901 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
902 }
903 else if (strcmp (arg, "ppc64bridge") == 0)
904 {
905 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
906 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
907 }
908 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
909 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
910 {
911 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
912 }
913 /* -mbooke64 means enable 64-bit BookE support. */
914 else if (strcmp (arg, "booke64") == 0)
915 {
916 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
917 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
918 }
919 else if (strcmp (arg, "power4") == 0)
920 {
921 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
922 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
923 }
924 else if (strcmp (arg, "power5") == 0)
925 {
926 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
927 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
928 | PPC_OPCODE_POWER5);
929 }
930 else if (strcmp (arg, "power6") == 0)
931 {
932 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
933 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
934 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
935 }
936 else if (strcmp (arg, "cell") == 0)
937 {
938 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
939 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
940 | PPC_OPCODE_CELL);
941 }
942 /* -mcom means assemble for the common intersection between Power
943 and PowerPC. At present, we just allow the union, rather
944 than the intersection. */
945 else if (strcmp (arg, "com") == 0)
946 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
947 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
948 else if (strcmp (arg, "any") == 0)
949 ppc_cpu |= PPC_OPCODE_ANY;
950 else
951 return 0;
952
953 /* Make sure the the Altivec and SPE bits are not lost. */
954 ppc_cpu |= altivec_or_spe;
955 return 1;
956 }
957
958 int
959 md_parse_option (int c, char *arg)
960 {
961 switch (c)
962 {
963 case 'u':
964 /* -u means that any undefined symbols should be treated as
965 external, which is the default for gas anyhow. */
966 break;
967
968 #ifdef OBJ_ELF
969 case 'l':
970 /* Solaris as takes -le (presumably for little endian). For completeness
971 sake, recognize -be also. */
972 if (strcmp (arg, "e") == 0)
973 {
974 target_big_endian = 0;
975 set_target_endian = 1;
976 }
977 else
978 return 0;
979
980 break;
981
982 case 'b':
983 if (strcmp (arg, "e") == 0)
984 {
985 target_big_endian = 1;
986 set_target_endian = 1;
987 }
988 else
989 return 0;
990
991 break;
992
993 case 'K':
994 /* Recognize -K PIC. */
995 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
996 {
997 shlib = SHLIB_PIC;
998 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
999 }
1000 else
1001 return 0;
1002
1003 break;
1004 #endif
1005
1006 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1007 case 'a':
1008 if (strcmp (arg, "64") == 0)
1009 {
1010 #ifdef BFD64
1011 ppc_obj64 = 1;
1012 #else
1013 as_fatal (_("%s unsupported"), "-a64");
1014 #endif
1015 }
1016 else if (strcmp (arg, "32") == 0)
1017 ppc_obj64 = 0;
1018 else
1019 return 0;
1020 break;
1021
1022 case 'm':
1023 if (parse_cpu (arg))
1024 ;
1025
1026 else if (strcmp (arg, "regnames") == 0)
1027 reg_names_p = TRUE;
1028
1029 else if (strcmp (arg, "no-regnames") == 0)
1030 reg_names_p = FALSE;
1031
1032 #ifdef OBJ_ELF
1033 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1034 that require relocation. */
1035 else if (strcmp (arg, "relocatable") == 0)
1036 {
1037 shlib = SHLIB_MRELOCATABLE;
1038 ppc_flags |= EF_PPC_RELOCATABLE;
1039 }
1040
1041 else if (strcmp (arg, "relocatable-lib") == 0)
1042 {
1043 shlib = SHLIB_MRELOCATABLE;
1044 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1045 }
1046
1047 /* -memb, set embedded bit. */
1048 else if (strcmp (arg, "emb") == 0)
1049 ppc_flags |= EF_PPC_EMB;
1050
1051 /* -mlittle/-mbig set the endianess. */
1052 else if (strcmp (arg, "little") == 0
1053 || strcmp (arg, "little-endian") == 0)
1054 {
1055 target_big_endian = 0;
1056 set_target_endian = 1;
1057 }
1058
1059 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1060 {
1061 target_big_endian = 1;
1062 set_target_endian = 1;
1063 }
1064
1065 else if (strcmp (arg, "solaris") == 0)
1066 {
1067 msolaris = TRUE;
1068 ppc_comment_chars = ppc_solaris_comment_chars;
1069 }
1070
1071 else if (strcmp (arg, "no-solaris") == 0)
1072 {
1073 msolaris = FALSE;
1074 ppc_comment_chars = ppc_eabi_comment_chars;
1075 }
1076 #endif
1077 else
1078 {
1079 as_bad (_("invalid switch -m%s"), arg);
1080 return 0;
1081 }
1082 break;
1083
1084 #ifdef OBJ_ELF
1085 /* -V: SVR4 argument to print version ID. */
1086 case 'V':
1087 print_version_id ();
1088 break;
1089
1090 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1091 should be emitted or not. FIXME: Not implemented. */
1092 case 'Q':
1093 break;
1094
1095 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1096 rather than .stabs.excl, which is ignored by the linker.
1097 FIXME: Not implemented. */
1098 case 's':
1099 if (arg)
1100 return 0;
1101
1102 break;
1103 #endif
1104
1105 default:
1106 return 0;
1107 }
1108
1109 return 1;
1110 }
1111
1112 void
1113 md_show_usage (FILE *stream)
1114 {
1115 fprintf (stream, _("\
1116 PowerPC options:\n\
1117 -a32 generate ELF32/XCOFF32\n\
1118 -a64 generate ELF64/XCOFF64\n\
1119 -u ignored\n\
1120 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1121 -mpwr generate code for POWER (RIOS1)\n\
1122 -m601 generate code for PowerPC 601\n\
1123 -mppc, -mppc32, -m603, -m604\n\
1124 generate code for PowerPC 603/604\n\
1125 -m403, -m405 generate code for PowerPC 403/405\n\
1126 -m440 generate code for PowerPC 440\n\
1127 -m464 generate code for PowerPC 464\n\
1128 -m7400, -m7410, -m7450, -m7455\n\
1129 generate code for PowerPC 7400/7410/7450/7455\n\
1130 -m750cl generate code for PowerPC 750cl\n"));
1131 fprintf (stream, _("\
1132 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1133 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1134 -mbooke64 generate code for 64-bit PowerPC BookE\n\
1135 -mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
1136 -mpower4 generate code for Power4 architecture\n\
1137 -mpower5 generate code for Power5 architecture\n\
1138 -mpower6 generate code for Power6 architecture\n\
1139 -mcell generate code for Cell Broadband Engine architecture\n\
1140 -mcom generate code Power/PowerPC common instructions\n\
1141 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1142 fprintf (stream, _("\
1143 -maltivec generate code for AltiVec\n\
1144 -me300 generate code for PowerPC e300 family\n\
1145 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1146 -me500mc, generate code for Freescale e500mc core complex\n\
1147 -mspe generate code for Motorola SPE instructions\n\
1148 -mregnames Allow symbolic names for registers\n\
1149 -mno-regnames Do not allow symbolic names for registers\n"));
1150 #ifdef OBJ_ELF
1151 fprintf (stream, _("\
1152 -mrelocatable support for GCC's -mrelocatble option\n\
1153 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1154 -memb set PPC_EMB bit in ELF flags\n\
1155 -mlittle, -mlittle-endian, -l, -le\n\
1156 generate code for a little endian machine\n\
1157 -mbig, -mbig-endian, -b, -be\n\
1158 generate code for a big endian machine\n\
1159 -msolaris generate code for Solaris\n\
1160 -mno-solaris do not generate code for Solaris\n\
1161 -V print assembler version number\n\
1162 -Qy, -Qn ignored\n"));
1163 #endif
1164 }
1165 \f
1166 /* Set ppc_cpu if it is not already set. */
1167
1168 static void
1169 ppc_set_cpu (void)
1170 {
1171 const char *default_os = TARGET_OS;
1172 const char *default_cpu = TARGET_CPU;
1173
1174 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
1175 {
1176 if (ppc_obj64)
1177 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
1178 else if (strncmp (default_os, "aix", 3) == 0
1179 && default_os[3] >= '4' && default_os[3] <= '9')
1180 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
1181 else if (strncmp (default_os, "aix3", 4) == 0)
1182 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
1183 else if (strcmp (default_cpu, "rs6000") == 0)
1184 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
1185 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1186 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
1187 else
1188 as_fatal (_("Unknown default cpu = %s, os = %s"),
1189 default_cpu, default_os);
1190 }
1191 }
1192
1193 /* Figure out the BFD architecture to use. This function and ppc_mach
1194 are called well before md_begin, when the output file is opened. */
1195
1196 enum bfd_architecture
1197 ppc_arch (void)
1198 {
1199 const char *default_cpu = TARGET_CPU;
1200 ppc_set_cpu ();
1201
1202 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1203 return bfd_arch_powerpc;
1204 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1205 return bfd_arch_rs6000;
1206 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1207 {
1208 if (strcmp (default_cpu, "rs6000") == 0)
1209 return bfd_arch_rs6000;
1210 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1211 return bfd_arch_powerpc;
1212 }
1213
1214 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1215 return bfd_arch_unknown;
1216 }
1217
1218 unsigned long
1219 ppc_mach (void)
1220 {
1221 if (ppc_obj64)
1222 return bfd_mach_ppc64;
1223 else if (ppc_arch () == bfd_arch_rs6000)
1224 return bfd_mach_rs6k;
1225 else
1226 return bfd_mach_ppc;
1227 }
1228
1229 extern char*
1230 ppc_target_format (void)
1231 {
1232 #ifdef OBJ_COFF
1233 #ifdef TE_PE
1234 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1235 #elif TE_POWERMAC
1236 return "xcoff-powermac";
1237 #else
1238 # ifdef TE_AIX5
1239 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1240 # else
1241 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1242 # endif
1243 #endif
1244 #endif
1245 #ifdef OBJ_ELF
1246 # ifdef TE_VXWORKS
1247 return "elf32-powerpc-vxworks";
1248 # else
1249 return (target_big_endian
1250 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1251 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1252 # endif
1253 #endif
1254 }
1255
1256 /* Insert opcodes and macros into hash tables. Called at startup and
1257 for .cpu pseudo. */
1258
1259 static void
1260 ppc_setup_opcodes (void)
1261 {
1262 const struct powerpc_opcode *op;
1263 const struct powerpc_opcode *op_end;
1264 const struct powerpc_macro *macro;
1265 const struct powerpc_macro *macro_end;
1266 bfd_boolean bad_insn = FALSE;
1267
1268 if (ppc_hash != NULL)
1269 hash_die (ppc_hash);
1270 if (ppc_macro_hash != NULL)
1271 hash_die (ppc_macro_hash);
1272
1273 /* Insert the opcodes into a hash table. */
1274 ppc_hash = hash_new ();
1275
1276 if (ENABLE_CHECKING)
1277 {
1278 unsigned int i;
1279
1280 /* Check operand masks. Code here and in the disassembler assumes
1281 all the 1's in the mask are contiguous. */
1282 for (i = 0; i < num_powerpc_operands; ++i)
1283 {
1284 unsigned long mask = powerpc_operands[i].bitm;
1285 unsigned long right_bit;
1286 unsigned int j;
1287
1288 right_bit = mask & -mask;
1289 mask += right_bit;
1290 right_bit = mask & -mask;
1291 if (mask != right_bit)
1292 {
1293 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1294 bad_insn = TRUE;
1295 }
1296 for (j = i + 1; j < num_powerpc_operands; ++j)
1297 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1298 sizeof (powerpc_operands[0])) == 0)
1299 {
1300 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1301 j, i);
1302 bad_insn = TRUE;
1303 }
1304 }
1305 }
1306
1307 op_end = powerpc_opcodes + powerpc_num_opcodes;
1308 for (op = powerpc_opcodes; op < op_end; op++)
1309 {
1310 if (ENABLE_CHECKING)
1311 {
1312 const unsigned char *o;
1313 unsigned long omask = op->mask;
1314
1315 if (op != powerpc_opcodes)
1316 {
1317 /* The major opcodes had better be sorted. Code in the
1318 disassembler assumes the insns are sorted according to
1319 major opcode. */
1320 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1321 {
1322 as_bad (_("major opcode is not sorted for %s"),
1323 op->name);
1324 bad_insn = TRUE;
1325 }
1326
1327 /* Warn if the table isn't more strictly ordered.
1328 Unfortunately it doesn't seem possible to order the
1329 table on much more than the major opcode, which makes
1330 it difficult to implement a binary search in the
1331 disassembler. The problem is that we have multiple
1332 ways to disassemble instructions, and we usually want
1333 to choose a more specific form (with more bits set in
1334 the opcode) than a more general form. eg. all of the
1335 following are equivalent:
1336 bne label # opcode = 0x40820000, mask = 0xff830003
1337 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1338 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1339
1340 There are also cases where the table needs to be out
1341 of order to disassemble the correct instruction for
1342 processor variants. eg. "lhae" booke64 insn must be
1343 found before "ld" ppc64 insn. */
1344 else if (0)
1345 {
1346 unsigned long t1 = op[0].opcode;
1347 unsigned long t2 = op[-1].opcode;
1348
1349 if (((t1 ^ t2) & 0xfc0007ff) == 0
1350 && (t1 & 0xfc0006df) == 0x7c000286)
1351 {
1352 /* spr field is split. */
1353 t1 = ((t1 & ~0x1ff800)
1354 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1355 t2 = ((t2 & ~0x1ff800)
1356 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1357 }
1358 if (t1 < t2)
1359 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1360 op[0].name, op[0].opcode, op[0].mask,
1361 op[-1].name, op[-1].opcode, op[-1].mask);
1362 }
1363 }
1364
1365 /* The mask had better not trim off opcode bits. */
1366 if ((op->opcode & omask) != op->opcode)
1367 {
1368 as_bad (_("mask trims opcode bits for %s"),
1369 op->name);
1370 bad_insn = TRUE;
1371 }
1372
1373 /* The operands must not overlap the opcode or each other. */
1374 for (o = op->operands; *o; ++o)
1375 if (*o >= num_powerpc_operands)
1376 {
1377 as_bad (_("operand index error for %s"),
1378 op->name);
1379 bad_insn = TRUE;
1380 }
1381 else
1382 {
1383 const struct powerpc_operand *operand = &powerpc_operands[*o];
1384 if (operand->shift >= 0)
1385 {
1386 unsigned long mask = operand->bitm << operand->shift;
1387 if (omask & mask)
1388 {
1389 as_bad (_("operand %d overlap in %s"),
1390 (int) (o - op->operands), op->name);
1391 bad_insn = TRUE;
1392 }
1393 omask |= mask;
1394 }
1395 }
1396 }
1397
1398 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
1399 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
1400 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1401 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
1402 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
1403 /* Certain instructions (eg: extsw) do not exist in the
1404 32-bit BookE instruction set, but they do exist in the
1405 64-bit BookE instruction set, and other PPC instruction
1406 sets. Check to see if the opcode has the BOOKE64 flag set.
1407 If it does make sure that the target CPU is not the BookE32. */
1408 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1409 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1410 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
1411 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1412 || ((op->flags & PPC_OPCODE_POWER4)
1413 == (ppc_cpu & PPC_OPCODE_POWER4)))
1414 && ((op->flags & PPC_OPCODE_POWER5) == 0
1415 || ((op->flags & PPC_OPCODE_POWER5)
1416 == (ppc_cpu & PPC_OPCODE_POWER5)))
1417 && ((op->flags & PPC_OPCODE_POWER6) == 0
1418 || ((op->flags & PPC_OPCODE_POWER6)
1419 == (ppc_cpu & PPC_OPCODE_POWER6))))
1420 {
1421 const char *retval;
1422
1423 retval = hash_insert (ppc_hash, op->name, (void *) op);
1424 if (retval != NULL)
1425 {
1426 /* Ignore Power duplicates for -m601. */
1427 if ((ppc_cpu & PPC_OPCODE_601) != 0
1428 && (op->flags & PPC_OPCODE_POWER) != 0)
1429 continue;
1430
1431 as_bad (_("duplicate instruction %s"),
1432 op->name);
1433 bad_insn = TRUE;
1434 }
1435 }
1436 }
1437
1438 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1439 for (op = powerpc_opcodes; op < op_end; op++)
1440 hash_insert (ppc_hash, op->name, (void *) op);
1441
1442 /* Insert the macros into a hash table. */
1443 ppc_macro_hash = hash_new ();
1444
1445 macro_end = powerpc_macros + powerpc_num_macros;
1446 for (macro = powerpc_macros; macro < macro_end; macro++)
1447 {
1448 if ((macro->flags & ppc_cpu) != 0)
1449 {
1450 const char *retval;
1451
1452 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1453 if (retval != (const char *) NULL)
1454 {
1455 as_bad (_("duplicate macro %s"), macro->name);
1456 bad_insn = TRUE;
1457 }
1458 }
1459 }
1460
1461 if (bad_insn)
1462 abort ();
1463 }
1464
1465 /* This function is called when the assembler starts up. It is called
1466 after the options have been parsed and the output file has been
1467 opened. */
1468
1469 void
1470 md_begin (void)
1471 {
1472 ppc_set_cpu ();
1473
1474 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1475
1476 #ifdef OBJ_ELF
1477 /* Set the ELF flags if desired. */
1478 if (ppc_flags && !msolaris)
1479 bfd_set_private_flags (stdoutput, ppc_flags);
1480 #endif
1481
1482 ppc_setup_opcodes ();
1483
1484 /* Tell the main code what the endianness is if it is not overridden
1485 by the user. */
1486 if (!set_target_endian)
1487 {
1488 set_target_endian = 1;
1489 target_big_endian = PPC_BIG_ENDIAN;
1490 }
1491
1492 #ifdef OBJ_XCOFF
1493 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1494
1495 /* Create dummy symbols to serve as initial csects. This forces the
1496 text csects to precede the data csects. These symbols will not
1497 be output. */
1498 ppc_text_csects = symbol_make ("dummy\001");
1499 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1500 ppc_data_csects = symbol_make ("dummy\001");
1501 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1502 #endif
1503
1504 #ifdef TE_PE
1505
1506 ppc_current_section = text_section;
1507 ppc_previous_section = 0;
1508
1509 #endif
1510 }
1511
1512 void
1513 ppc_cleanup (void)
1514 {
1515 #ifdef OBJ_ELF
1516 if (ppc_apuinfo_list == NULL)
1517 return;
1518
1519 /* Ok, so write the section info out. We have this layout:
1520
1521 byte data what
1522 ---- ---- ----
1523 0 8 length of "APUinfo\0"
1524 4 (n*4) number of APU's (4 bytes each)
1525 8 2 note type 2
1526 12 "APUinfo\0" name
1527 20 APU#1 first APU's info
1528 24 APU#2 second APU's info
1529 ... ...
1530 */
1531 {
1532 char *p;
1533 asection *seg = now_seg;
1534 subsegT subseg = now_subseg;
1535 asection *apuinfo_secp = (asection *) NULL;
1536 unsigned int i;
1537
1538 /* Create the .PPC.EMB.apuinfo section. */
1539 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1540 bfd_set_section_flags (stdoutput,
1541 apuinfo_secp,
1542 SEC_HAS_CONTENTS | SEC_READONLY);
1543
1544 p = frag_more (4);
1545 md_number_to_chars (p, (valueT) 8, 4);
1546
1547 p = frag_more (4);
1548 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1549
1550 p = frag_more (4);
1551 md_number_to_chars (p, (valueT) 2, 4);
1552
1553 p = frag_more (8);
1554 strcpy (p, "APUinfo");
1555
1556 for (i = 0; i < ppc_apuinfo_num; i++)
1557 {
1558 p = frag_more (4);
1559 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1560 }
1561
1562 frag_align (2, 0, 0);
1563
1564 /* We probably can't restore the current segment, for there likely
1565 isn't one yet... */
1566 if (seg && subseg)
1567 subseg_set (seg, subseg);
1568 }
1569 #endif
1570 }
1571
1572 /* Insert an operand value into an instruction. */
1573
1574 static unsigned long
1575 ppc_insert_operand (unsigned long insn,
1576 const struct powerpc_operand *operand,
1577 offsetT val,
1578 ppc_cpu_t ppc_cpu,
1579 char *file,
1580 unsigned int line)
1581 {
1582 long min, max, right;
1583
1584 max = operand->bitm;
1585 right = max & -max;
1586 min = 0;
1587
1588 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1589 {
1590 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
1591 max = (max >> 1) & -right;
1592 min = ~max & -right;
1593 }
1594
1595 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1596 max++;
1597
1598 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1599 {
1600 long tmp = min;
1601 min = -max;
1602 max = -tmp;
1603 }
1604
1605 if (min <= max)
1606 {
1607 /* Some people write constants with the sign extension done by
1608 hand but only up to 32 bits. This shouldn't really be valid,
1609 but, to permit this code to assemble on a 64-bit host, we
1610 sign extend the 32-bit value to 64 bits if so doing makes the
1611 value valid. */
1612 if (val > max
1613 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1614 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1615 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1616 val = val - 0x80000000 - 0x80000000;
1617
1618 /* Similarly, people write expressions like ~(1<<15), and expect
1619 this to be OK for a 32-bit unsigned value. */
1620 else if (val < min
1621 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1622 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1623 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1624 val = val + 0x80000000 + 0x80000000;
1625
1626 else if (val < min
1627 || val > max
1628 || (val & (right - 1)) != 0)
1629 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1630 }
1631
1632 if (operand->insert)
1633 {
1634 const char *errmsg;
1635
1636 errmsg = NULL;
1637 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
1638 if (errmsg != (const char *) NULL)
1639 as_bad_where (file, line, errmsg);
1640 }
1641 else
1642 insn |= ((long) val & operand->bitm) << operand->shift;
1643
1644 return insn;
1645 }
1646
1647 \f
1648 #ifdef OBJ_ELF
1649 /* Parse @got, etc. and return the desired relocation. */
1650 static bfd_reloc_code_real_type
1651 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1652 {
1653 struct map_bfd {
1654 char *string;
1655 unsigned int length : 8;
1656 unsigned int valid32 : 1;
1657 unsigned int valid64 : 1;
1658 unsigned int reloc;
1659 };
1660
1661 char ident[20];
1662 char *str = *str_p;
1663 char *str2;
1664 int ch;
1665 int len;
1666 const struct map_bfd *ptr;
1667
1668 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1669 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1670 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1671
1672 static const struct map_bfd mapping[] = {
1673 MAP ("l", BFD_RELOC_LO16),
1674 MAP ("h", BFD_RELOC_HI16),
1675 MAP ("ha", BFD_RELOC_HI16_S),
1676 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1677 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1678 MAP ("got", BFD_RELOC_16_GOTOFF),
1679 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1680 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1681 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1682 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1683 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1684 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1685 MAP ("copy", BFD_RELOC_PPC_COPY),
1686 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1687 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1688 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1689 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1690 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1691 MAP ("tls", BFD_RELOC_PPC_TLS),
1692 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1693 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1694 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1695 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1696 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1697 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1698 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1699 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1700 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1701 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1702 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1703 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1704 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1705 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1706 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1707 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1708 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1709 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1710 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1711 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1712 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1713 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1714 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1715 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1716 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1717 MAP32 ("fixup", BFD_RELOC_CTOR),
1718 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1719 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1720 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1721 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1722 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1723 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1724 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1725 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1726 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1727 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1728 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1729 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1730 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1731 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1732 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1733 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1734 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1735 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1736 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1737 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1738 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1739 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1740 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1741 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1742 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1743 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1744 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1745 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1746 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1747 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1748 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1749 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1750 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1751 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1752 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1753 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1754 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1755 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1756 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1757 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1758 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
1759 };
1760
1761 if (*str++ != '@')
1762 return BFD_RELOC_UNUSED;
1763
1764 for (ch = *str, str2 = ident;
1765 (str2 < ident + sizeof (ident) - 1
1766 && (ISALNUM (ch) || ch == '@'));
1767 ch = *++str)
1768 {
1769 *str2++ = TOLOWER (ch);
1770 }
1771
1772 *str2 = '\0';
1773 len = str2 - ident;
1774
1775 ch = ident[0];
1776 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1777 if (ch == ptr->string[0]
1778 && len == ptr->length
1779 && memcmp (ident, ptr->string, ptr->length) == 0
1780 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
1781 {
1782 int reloc = ptr->reloc;
1783
1784 if (!ppc_obj64)
1785 if (exp_p->X_add_number != 0
1786 && (reloc == (int) BFD_RELOC_16_GOTOFF
1787 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1788 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1789 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1790 as_warn (_("identifier+constant@got means identifier@got+constant"));
1791
1792 /* Now check for identifier@suffix+constant. */
1793 if (*str == '-' || *str == '+')
1794 {
1795 char *orig_line = input_line_pointer;
1796 expressionS new_exp;
1797
1798 input_line_pointer = str;
1799 expression (&new_exp);
1800 if (new_exp.X_op == O_constant)
1801 {
1802 exp_p->X_add_number += new_exp.X_add_number;
1803 str = input_line_pointer;
1804 }
1805
1806 if (&input_line_pointer != str_p)
1807 input_line_pointer = orig_line;
1808 }
1809 *str_p = str;
1810
1811 if (reloc == (int) BFD_RELOC_PPC64_TOC
1812 && exp_p->X_op == O_symbol
1813 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
1814 {
1815 /* Change the symbol so that the dummy .TOC. symbol can be
1816 omitted from the object file. */
1817 exp_p->X_add_symbol = &abs_symbol;
1818 }
1819
1820 return (bfd_reloc_code_real_type) reloc;
1821 }
1822
1823 return BFD_RELOC_UNUSED;
1824 }
1825
1826 /* Like normal .long/.short/.word, except support @got, etc.
1827 Clobbers input_line_pointer, checks end-of-line. */
1828 static void
1829 ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
1830 {
1831 expressionS exp;
1832 bfd_reloc_code_real_type reloc;
1833
1834 if (is_it_end_of_statement ())
1835 {
1836 demand_empty_rest_of_line ();
1837 return;
1838 }
1839
1840 do
1841 {
1842 expression (&exp);
1843 if (exp.X_op == O_symbol
1844 && *input_line_pointer == '@'
1845 && (reloc = ppc_elf_suffix (&input_line_pointer,
1846 &exp)) != BFD_RELOC_UNUSED)
1847 {
1848 reloc_howto_type *reloc_howto;
1849 int size;
1850
1851 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1852 size = bfd_get_reloc_size (reloc_howto);
1853
1854 if (size > nbytes)
1855 {
1856 as_bad (_("%s relocations do not fit in %d bytes\n"),
1857 reloc_howto->name, nbytes);
1858 }
1859 else
1860 {
1861 char *p;
1862 int offset;
1863
1864 p = frag_more (nbytes);
1865 offset = 0;
1866 if (target_big_endian)
1867 offset = nbytes - size;
1868 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1869 &exp, 0, reloc);
1870 }
1871 }
1872 else
1873 emit_expr (&exp, (unsigned int) nbytes);
1874 }
1875 while (*input_line_pointer++ == ',');
1876
1877 /* Put terminator back into stream. */
1878 input_line_pointer--;
1879 demand_empty_rest_of_line ();
1880 }
1881
1882 /* Solaris pseduo op to change to the .rodata section. */
1883 static void
1884 ppc_elf_rdata (int xxx)
1885 {
1886 char *save_line = input_line_pointer;
1887 static char section[] = ".rodata\n";
1888
1889 /* Just pretend this is .section .rodata */
1890 input_line_pointer = section;
1891 obj_elf_section (xxx);
1892
1893 input_line_pointer = save_line;
1894 }
1895
1896 /* Pseudo op to make file scope bss items. */
1897 static void
1898 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
1899 {
1900 char *name;
1901 char c;
1902 char *p;
1903 offsetT size;
1904 symbolS *symbolP;
1905 offsetT align;
1906 segT old_sec;
1907 int old_subsec;
1908 char *pfrag;
1909 int align2;
1910
1911 name = input_line_pointer;
1912 c = get_symbol_end ();
1913
1914 /* just after name is now '\0'. */
1915 p = input_line_pointer;
1916 *p = c;
1917 SKIP_WHITESPACE ();
1918 if (*input_line_pointer != ',')
1919 {
1920 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1921 ignore_rest_of_line ();
1922 return;
1923 }
1924
1925 input_line_pointer++; /* skip ',' */
1926 if ((size = get_absolute_expression ()) < 0)
1927 {
1928 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1929 ignore_rest_of_line ();
1930 return;
1931 }
1932
1933 /* The third argument to .lcomm is the alignment. */
1934 if (*input_line_pointer != ',')
1935 align = 8;
1936 else
1937 {
1938 ++input_line_pointer;
1939 align = get_absolute_expression ();
1940 if (align <= 0)
1941 {
1942 as_warn (_("ignoring bad alignment"));
1943 align = 8;
1944 }
1945 }
1946
1947 *p = 0;
1948 symbolP = symbol_find_or_make (name);
1949 *p = c;
1950
1951 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1952 {
1953 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1954 S_GET_NAME (symbolP));
1955 ignore_rest_of_line ();
1956 return;
1957 }
1958
1959 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1960 {
1961 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1962 S_GET_NAME (symbolP),
1963 (long) S_GET_VALUE (symbolP),
1964 (long) size);
1965
1966 ignore_rest_of_line ();
1967 return;
1968 }
1969
1970 /* Allocate_bss. */
1971 old_sec = now_seg;
1972 old_subsec = now_subseg;
1973 if (align)
1974 {
1975 /* Convert to a power of 2 alignment. */
1976 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1977 if (align != 1)
1978 {
1979 as_bad (_("Common alignment not a power of 2"));
1980 ignore_rest_of_line ();
1981 return;
1982 }
1983 }
1984 else
1985 align2 = 0;
1986
1987 record_alignment (bss_section, align2);
1988 subseg_set (bss_section, 0);
1989 if (align2)
1990 frag_align (align2, 0, 0);
1991 if (S_GET_SEGMENT (symbolP) == bss_section)
1992 symbol_get_frag (symbolP)->fr_symbol = 0;
1993 symbol_set_frag (symbolP, frag_now);
1994 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1995 (char *) 0);
1996 *pfrag = 0;
1997 S_SET_SIZE (symbolP, size);
1998 S_SET_SEGMENT (symbolP, bss_section);
1999 subseg_set (old_sec, old_subsec);
2000 demand_empty_rest_of_line ();
2001 }
2002
2003 /* Validate any relocations emitted for -mrelocatable, possibly adding
2004 fixups for word relocations in writable segments, so we can adjust
2005 them at runtime. */
2006 static void
2007 ppc_elf_validate_fix (fixS *fixp, segT seg)
2008 {
2009 if (fixp->fx_done || fixp->fx_pcrel)
2010 return;
2011
2012 switch (shlib)
2013 {
2014 case SHLIB_NONE:
2015 case SHLIB_PIC:
2016 return;
2017
2018 case SHLIB_MRELOCATABLE:
2019 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2020 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2021 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2022 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2023 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2024 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2025 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2026 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2027 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2028 && (seg->flags & SEC_LOAD) != 0
2029 && strcmp (segment_name (seg), ".got2") != 0
2030 && strcmp (segment_name (seg), ".dtors") != 0
2031 && strcmp (segment_name (seg), ".ctors") != 0
2032 && strcmp (segment_name (seg), ".fixup") != 0
2033 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2034 && strcmp (segment_name (seg), ".eh_frame") != 0
2035 && strcmp (segment_name (seg), ".ex_shared") != 0)
2036 {
2037 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2038 || fixp->fx_r_type != BFD_RELOC_CTOR)
2039 {
2040 as_bad_where (fixp->fx_file, fixp->fx_line,
2041 _("Relocation cannot be done when using -mrelocatable"));
2042 }
2043 }
2044 return;
2045 }
2046 }
2047
2048 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2049 function descriptor sym if the corresponding code sym is used. */
2050
2051 void
2052 ppc_frob_file_before_adjust (void)
2053 {
2054 symbolS *symp;
2055 asection *toc;
2056
2057 if (!ppc_obj64)
2058 return;
2059
2060 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2061 {
2062 const char *name;
2063 char *dotname;
2064 symbolS *dotsym;
2065 size_t len;
2066
2067 name = S_GET_NAME (symp);
2068 if (name[0] == '.')
2069 continue;
2070
2071 if (! S_IS_WEAK (symp)
2072 || S_IS_DEFINED (symp))
2073 continue;
2074
2075 len = strlen (name) + 1;
2076 dotname = xmalloc (len + 1);
2077 dotname[0] = '.';
2078 memcpy (dotname + 1, name, len);
2079 dotsym = symbol_find_noref (dotname, 1);
2080 free (dotname);
2081 if (dotsym != NULL && (symbol_used_p (dotsym)
2082 || symbol_used_in_reloc_p (dotsym)))
2083 symbol_mark_used (symp);
2084
2085 }
2086
2087 toc = bfd_get_section_by_name (stdoutput, ".toc");
2088 if (toc != NULL
2089 && bfd_section_size (stdoutput, toc) > 0x10000)
2090 as_warn (_("TOC section size exceeds 64k"));
2091
2092 /* Don't emit .TOC. symbol. */
2093 symp = symbol_find (".TOC.");
2094 if (symp != NULL)
2095 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2096 }
2097 #endif /* OBJ_ELF */
2098 \f
2099 #ifdef TE_PE
2100
2101 /*
2102 * Summary of parse_toc_entry.
2103 *
2104 * in: Input_line_pointer points to the '[' in one of:
2105 *
2106 * [toc] [tocv] [toc32] [toc64]
2107 *
2108 * Anything else is an error of one kind or another.
2109 *
2110 * out:
2111 * return value: success or failure
2112 * toc_kind: kind of toc reference
2113 * input_line_pointer:
2114 * success: first char after the ']'
2115 * failure: unchanged
2116 *
2117 * settings:
2118 *
2119 * [toc] - rv == success, toc_kind = default_toc
2120 * [tocv] - rv == success, toc_kind = data_in_toc
2121 * [toc32] - rv == success, toc_kind = must_be_32
2122 * [toc64] - rv == success, toc_kind = must_be_64
2123 *
2124 */
2125
2126 enum toc_size_qualifier
2127 {
2128 default_toc, /* The toc cell constructed should be the system default size */
2129 data_in_toc, /* This is a direct reference to a toc cell */
2130 must_be_32, /* The toc cell constructed must be 32 bits wide */
2131 must_be_64 /* The toc cell constructed must be 64 bits wide */
2132 };
2133
2134 static int
2135 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2136 {
2137 char *start;
2138 char *toc_spec;
2139 char c;
2140 enum toc_size_qualifier t;
2141
2142 /* Save the input_line_pointer. */
2143 start = input_line_pointer;
2144
2145 /* Skip over the '[' , and whitespace. */
2146 ++input_line_pointer;
2147 SKIP_WHITESPACE ();
2148
2149 /* Find the spelling of the operand. */
2150 toc_spec = input_line_pointer;
2151 c = get_symbol_end ();
2152
2153 if (strcmp (toc_spec, "toc") == 0)
2154 {
2155 t = default_toc;
2156 }
2157 else if (strcmp (toc_spec, "tocv") == 0)
2158 {
2159 t = data_in_toc;
2160 }
2161 else if (strcmp (toc_spec, "toc32") == 0)
2162 {
2163 t = must_be_32;
2164 }
2165 else if (strcmp (toc_spec, "toc64") == 0)
2166 {
2167 t = must_be_64;
2168 }
2169 else
2170 {
2171 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2172 *input_line_pointer = c;
2173 input_line_pointer = start;
2174 return 0;
2175 }
2176
2177 /* Now find the ']'. */
2178 *input_line_pointer = c;
2179
2180 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2181 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2182
2183 if (c != ']')
2184 {
2185 as_bad (_("syntax error: expected `]', found `%c'"), c);
2186 input_line_pointer = start;
2187 return 0;
2188 }
2189
2190 *toc_kind = t;
2191 return 1;
2192 }
2193 #endif
2194 \f
2195
2196 #ifdef OBJ_ELF
2197 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2198 static void
2199 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2200 {
2201 unsigned int i;
2202
2203 /* Check we don't already exist. */
2204 for (i = 0; i < ppc_apuinfo_num; i++)
2205 if (ppc_apuinfo_list[i] == APUID (apu, version))
2206 return;
2207
2208 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2209 {
2210 if (ppc_apuinfo_num_alloc == 0)
2211 {
2212 ppc_apuinfo_num_alloc = 4;
2213 ppc_apuinfo_list = (unsigned long *)
2214 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2215 }
2216 else
2217 {
2218 ppc_apuinfo_num_alloc += 4;
2219 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2220 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2221 }
2222 }
2223 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2224 }
2225 #undef APUID
2226 #endif
2227 \f
2228
2229 /* We need to keep a list of fixups. We can't simply generate them as
2230 we go, because that would require us to first create the frag, and
2231 that would screw up references to ``.''. */
2232
2233 struct ppc_fixup
2234 {
2235 expressionS exp;
2236 int opindex;
2237 bfd_reloc_code_real_type reloc;
2238 };
2239
2240 #define MAX_INSN_FIXUPS (5)
2241
2242 /* This routine is called for each instruction to be assembled. */
2243
2244 void
2245 md_assemble (char *str)
2246 {
2247 char *s;
2248 const struct powerpc_opcode *opcode;
2249 unsigned long insn;
2250 const unsigned char *opindex_ptr;
2251 int skip_optional;
2252 int need_paren;
2253 int next_opindex;
2254 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2255 int fc;
2256 char *f;
2257 int addr_mod;
2258 int i;
2259 #ifdef OBJ_ELF
2260 bfd_reloc_code_real_type reloc;
2261 #endif
2262
2263 /* Get the opcode. */
2264 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2265 ;
2266 if (*s != '\0')
2267 *s++ = '\0';
2268
2269 /* Look up the opcode in the hash table. */
2270 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2271 if (opcode == (const struct powerpc_opcode *) NULL)
2272 {
2273 const struct powerpc_macro *macro;
2274
2275 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2276 if (macro == (const struct powerpc_macro *) NULL)
2277 as_bad (_("Unrecognized opcode: `%s'"), str);
2278 else
2279 ppc_macro (s, macro);
2280
2281 return;
2282 }
2283
2284 insn = opcode->opcode;
2285
2286 str = s;
2287 while (ISSPACE (*str))
2288 ++str;
2289
2290 /* PowerPC operands are just expressions. The only real issue is
2291 that a few operand types are optional. All cases which might use
2292 an optional operand separate the operands only with commas (in some
2293 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2294 have optional operands). Most instructions with optional operands
2295 have only one. Those that have more than one optional operand can
2296 take either all their operands or none. So, before we start seriously
2297 parsing the operands, we check to see if we have optional operands,
2298 and if we do, we count the number of commas to see which operands
2299 have been omitted. */
2300 skip_optional = 0;
2301 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2302 {
2303 const struct powerpc_operand *operand;
2304
2305 operand = &powerpc_operands[*opindex_ptr];
2306 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2307 {
2308 unsigned int opcount;
2309 unsigned int num_operands_expected;
2310 unsigned int i;
2311
2312 /* There is an optional operand. Count the number of
2313 commas in the input line. */
2314 if (*str == '\0')
2315 opcount = 0;
2316 else
2317 {
2318 opcount = 1;
2319 s = str;
2320 while ((s = strchr (s, ',')) != (char *) NULL)
2321 {
2322 ++opcount;
2323 ++s;
2324 }
2325 }
2326
2327 /* Compute the number of expected operands.
2328 Do not count fake operands. */
2329 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2330 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2331 ++ num_operands_expected;
2332
2333 /* If there are fewer operands in the line then are called
2334 for by the instruction, we want to skip the optional
2335 operands. */
2336 if (opcount < num_operands_expected)
2337 skip_optional = 1;
2338
2339 break;
2340 }
2341 }
2342
2343 /* Gather the operands. */
2344 need_paren = 0;
2345 next_opindex = 0;
2346 fc = 0;
2347 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2348 {
2349 const struct powerpc_operand *operand;
2350 const char *errmsg;
2351 char *hold;
2352 expressionS ex;
2353 char endc;
2354
2355 if (next_opindex == 0)
2356 operand = &powerpc_operands[*opindex_ptr];
2357 else
2358 {
2359 operand = &powerpc_operands[next_opindex];
2360 next_opindex = 0;
2361 }
2362 errmsg = NULL;
2363
2364 /* If this is a fake operand, then we do not expect anything
2365 from the input. */
2366 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2367 {
2368 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2369 if (errmsg != (const char *) NULL)
2370 as_bad (errmsg);
2371 continue;
2372 }
2373
2374 /* If this is an optional operand, and we are skipping it, just
2375 insert a zero. */
2376 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2377 && skip_optional)
2378 {
2379 if (operand->insert)
2380 {
2381 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2382 if (errmsg != (const char *) NULL)
2383 as_bad (errmsg);
2384 }
2385 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2386 next_opindex = *opindex_ptr + 1;
2387 continue;
2388 }
2389
2390 /* Gather the operand. */
2391 hold = input_line_pointer;
2392 input_line_pointer = str;
2393
2394 #ifdef TE_PE
2395 if (*input_line_pointer == '[')
2396 {
2397 /* We are expecting something like the second argument here:
2398 *
2399 * lwz r4,[toc].GS.0.static_int(rtoc)
2400 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2401 * The argument following the `]' must be a symbol name, and the
2402 * register must be the toc register: 'rtoc' or '2'
2403 *
2404 * The effect is to 0 as the displacement field
2405 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2406 * the appropriate variation) reloc against it based on the symbol.
2407 * The linker will build the toc, and insert the resolved toc offset.
2408 *
2409 * Note:
2410 * o The size of the toc entry is currently assumed to be
2411 * 32 bits. This should not be assumed to be a hard coded
2412 * number.
2413 * o In an effort to cope with a change from 32 to 64 bits,
2414 * there are also toc entries that are specified to be
2415 * either 32 or 64 bits:
2416 * lwz r4,[toc32].GS.0.static_int(rtoc)
2417 * lwz r4,[toc64].GS.0.static_int(rtoc)
2418 * These demand toc entries of the specified size, and the
2419 * instruction probably requires it.
2420 */
2421
2422 int valid_toc;
2423 enum toc_size_qualifier toc_kind;
2424 bfd_reloc_code_real_type toc_reloc;
2425
2426 /* Go parse off the [tocXX] part. */
2427 valid_toc = parse_toc_entry (&toc_kind);
2428
2429 if (!valid_toc)
2430 {
2431 /* Note: message has already been issued.
2432 FIXME: what sort of recovery should we do?
2433 demand_rest_of_line (); return; ? */
2434 }
2435
2436 /* Now get the symbol following the ']'. */
2437 expression (&ex);
2438
2439 switch (toc_kind)
2440 {
2441 case default_toc:
2442 /* In this case, we may not have seen the symbol yet,
2443 since it is allowed to appear on a .extern or .globl
2444 or just be a label in the .data section. */
2445 toc_reloc = BFD_RELOC_PPC_TOC16;
2446 break;
2447 case data_in_toc:
2448 /* 1. The symbol must be defined and either in the toc
2449 section, or a global.
2450 2. The reloc generated must have the TOCDEFN flag set
2451 in upper bit mess of the reloc type.
2452 FIXME: It's a little confusing what the tocv
2453 qualifier can be used for. At the very least, I've
2454 seen three uses, only one of which I'm sure I can
2455 explain. */
2456 if (ex.X_op == O_symbol)
2457 {
2458 assert (ex.X_add_symbol != NULL);
2459 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2460 != tocdata_section)
2461 {
2462 as_bad (_("[tocv] symbol is not a toc symbol"));
2463 }
2464 }
2465
2466 toc_reloc = BFD_RELOC_PPC_TOC16;
2467 break;
2468 case must_be_32:
2469 /* FIXME: these next two specifically specify 32/64 bit
2470 toc entries. We don't support them today. Is this
2471 the right way to say that? */
2472 toc_reloc = BFD_RELOC_UNUSED;
2473 as_bad (_("Unimplemented toc32 expression modifier"));
2474 break;
2475 case must_be_64:
2476 /* FIXME: see above. */
2477 toc_reloc = BFD_RELOC_UNUSED;
2478 as_bad (_("Unimplemented toc64 expression modifier"));
2479 break;
2480 default:
2481 fprintf (stderr,
2482 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2483 toc_kind);
2484 abort ();
2485 break;
2486 }
2487
2488 /* We need to generate a fixup for this expression. */
2489 if (fc >= MAX_INSN_FIXUPS)
2490 as_fatal (_("too many fixups"));
2491
2492 fixups[fc].reloc = toc_reloc;
2493 fixups[fc].exp = ex;
2494 fixups[fc].opindex = *opindex_ptr;
2495 ++fc;
2496
2497 /* Ok. We've set up the fixup for the instruction. Now make it
2498 look like the constant 0 was found here. */
2499 ex.X_unsigned = 1;
2500 ex.X_op = O_constant;
2501 ex.X_add_number = 0;
2502 ex.X_add_symbol = NULL;
2503 ex.X_op_symbol = NULL;
2504 }
2505
2506 else
2507 #endif /* TE_PE */
2508 {
2509 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2510 || !register_name (&ex))
2511 {
2512 char save_lex = lex_type['%'];
2513
2514 if ((operand->flags & PPC_OPERAND_CR) != 0)
2515 {
2516 cr_operand = TRUE;
2517 lex_type['%'] |= LEX_BEGIN_NAME;
2518 }
2519 expression (&ex);
2520 cr_operand = FALSE;
2521 lex_type['%'] = save_lex;
2522 }
2523 }
2524
2525 str = input_line_pointer;
2526 input_line_pointer = hold;
2527
2528 if (ex.X_op == O_illegal)
2529 as_bad (_("illegal operand"));
2530 else if (ex.X_op == O_absent)
2531 as_bad (_("missing operand"));
2532 else if (ex.X_op == O_register)
2533 {
2534 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2535 ppc_cpu, (char *) NULL, 0);
2536 }
2537 else if (ex.X_op == O_constant)
2538 {
2539 #ifdef OBJ_ELF
2540 /* Allow @HA, @L, @H on constants. */
2541 char *orig_str = str;
2542
2543 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2544 switch (reloc)
2545 {
2546 default:
2547 str = orig_str;
2548 break;
2549
2550 case BFD_RELOC_LO16:
2551 /* X_unsigned is the default, so if the user has done
2552 something which cleared it, we always produce a
2553 signed value. */
2554 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2555 ex.X_add_number &= 0xffff;
2556 else
2557 ex.X_add_number = SEX16 (ex.X_add_number);
2558 break;
2559
2560 case BFD_RELOC_HI16:
2561 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2562 ex.X_add_number = PPC_HI (ex.X_add_number);
2563 else
2564 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
2565 break;
2566
2567 case BFD_RELOC_HI16_S:
2568 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2569 ex.X_add_number = PPC_HA (ex.X_add_number);
2570 else
2571 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2572 break;
2573
2574 case BFD_RELOC_PPC64_HIGHER:
2575 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2576 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2577 else
2578 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2579 break;
2580
2581 case BFD_RELOC_PPC64_HIGHER_S:
2582 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2583 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2584 else
2585 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
2586 break;
2587
2588 case BFD_RELOC_PPC64_HIGHEST:
2589 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2590 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2591 else
2592 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2593 break;
2594
2595 case BFD_RELOC_PPC64_HIGHEST_S:
2596 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2597 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2598 else
2599 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2600 break;
2601 }
2602 #endif /* OBJ_ELF */
2603 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2604 ppc_cpu, (char *) NULL, 0);
2605 }
2606 #ifdef OBJ_ELF
2607 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2608 {
2609 /* Some TLS tweaks. */
2610 switch (reloc)
2611 {
2612 default:
2613 break;
2614 case BFD_RELOC_PPC_TLS:
2615 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2616 ppc_cpu, (char *) NULL, 0);
2617 break;
2618 /* We'll only use the 32 (or 64) bit form of these relocations
2619 in constants. Instructions get the 16 bit form. */
2620 case BFD_RELOC_PPC_DTPREL:
2621 reloc = BFD_RELOC_PPC_DTPREL16;
2622 break;
2623 case BFD_RELOC_PPC_TPREL:
2624 reloc = BFD_RELOC_PPC_TPREL16;
2625 break;
2626 }
2627
2628 /* For the absolute forms of branches, convert the PC
2629 relative form back into the absolute. */
2630 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2631 {
2632 switch (reloc)
2633 {
2634 case BFD_RELOC_PPC_B26:
2635 reloc = BFD_RELOC_PPC_BA26;
2636 break;
2637 case BFD_RELOC_PPC_B16:
2638 reloc = BFD_RELOC_PPC_BA16;
2639 break;
2640 case BFD_RELOC_PPC_B16_BRTAKEN:
2641 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2642 break;
2643 case BFD_RELOC_PPC_B16_BRNTAKEN:
2644 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2645 break;
2646 default:
2647 break;
2648 }
2649 }
2650
2651 if (ppc_obj64
2652 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2653 {
2654 switch (reloc)
2655 {
2656 case BFD_RELOC_16:
2657 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2658 break;
2659 case BFD_RELOC_LO16:
2660 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2661 break;
2662 case BFD_RELOC_16_GOTOFF:
2663 reloc = BFD_RELOC_PPC64_GOT16_DS;
2664 break;
2665 case BFD_RELOC_LO16_GOTOFF:
2666 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2667 break;
2668 case BFD_RELOC_LO16_PLTOFF:
2669 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2670 break;
2671 case BFD_RELOC_16_BASEREL:
2672 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2673 break;
2674 case BFD_RELOC_LO16_BASEREL:
2675 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2676 break;
2677 case BFD_RELOC_PPC_TOC16:
2678 reloc = BFD_RELOC_PPC64_TOC16_DS;
2679 break;
2680 case BFD_RELOC_PPC64_TOC16_LO:
2681 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2682 break;
2683 case BFD_RELOC_PPC64_PLTGOT16:
2684 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2685 break;
2686 case BFD_RELOC_PPC64_PLTGOT16_LO:
2687 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2688 break;
2689 case BFD_RELOC_PPC_DTPREL16:
2690 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2691 break;
2692 case BFD_RELOC_PPC_DTPREL16_LO:
2693 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2694 break;
2695 case BFD_RELOC_PPC_TPREL16:
2696 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2697 break;
2698 case BFD_RELOC_PPC_TPREL16_LO:
2699 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2700 break;
2701 case BFD_RELOC_PPC_GOT_DTPREL16:
2702 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2703 case BFD_RELOC_PPC_GOT_TPREL16:
2704 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2705 break;
2706 default:
2707 as_bad (_("unsupported relocation for DS offset field"));
2708 break;
2709 }
2710 }
2711
2712 /* We need to generate a fixup for this expression. */
2713 if (fc >= MAX_INSN_FIXUPS)
2714 as_fatal (_("too many fixups"));
2715 fixups[fc].exp = ex;
2716 fixups[fc].opindex = 0;
2717 fixups[fc].reloc = reloc;
2718 ++fc;
2719 }
2720 #endif /* OBJ_ELF */
2721
2722 else
2723 {
2724 /* We need to generate a fixup for this expression. */
2725 if (fc >= MAX_INSN_FIXUPS)
2726 as_fatal (_("too many fixups"));
2727 fixups[fc].exp = ex;
2728 fixups[fc].opindex = *opindex_ptr;
2729 fixups[fc].reloc = BFD_RELOC_UNUSED;
2730 ++fc;
2731 }
2732
2733 if (need_paren)
2734 {
2735 endc = ')';
2736 need_paren = 0;
2737 /* If expecting more operands, then we want to see "),". */
2738 if (*str == endc && opindex_ptr[1] != 0)
2739 {
2740 do
2741 ++str;
2742 while (ISSPACE (*str));
2743 endc = ',';
2744 }
2745 }
2746 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2747 {
2748 endc = '(';
2749 need_paren = 1;
2750 }
2751 else
2752 endc = ',';
2753
2754 /* The call to expression should have advanced str past any
2755 whitespace. */
2756 if (*str != endc
2757 && (endc != ',' || *str != '\0'))
2758 {
2759 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2760 break;
2761 }
2762
2763 if (*str != '\0')
2764 ++str;
2765 }
2766
2767 while (ISSPACE (*str))
2768 ++str;
2769
2770 if (*str != '\0')
2771 as_bad (_("junk at end of line: `%s'"), str);
2772
2773 #ifdef OBJ_ELF
2774 /* Do we need/want a APUinfo section? */
2775 if (ppc_cpu & (PPC_OPCODE_SPE
2776 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2777 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2778 | PPC_OPCODE_RFMCI))
2779 {
2780 /* These are all version "1". */
2781 if (opcode->flags & PPC_OPCODE_SPE)
2782 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
2783 if (opcode->flags & PPC_OPCODE_ISEL)
2784 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
2785 if (opcode->flags & PPC_OPCODE_EFS)
2786 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
2787 if (opcode->flags & PPC_OPCODE_BRLOCK)
2788 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
2789 if (opcode->flags & PPC_OPCODE_PMR)
2790 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
2791 if (opcode->flags & PPC_OPCODE_CACHELCK)
2792 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
2793 if (opcode->flags & PPC_OPCODE_RFMCI)
2794 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
2795 }
2796 #endif
2797
2798 /* Write out the instruction. */
2799 f = frag_more (4);
2800 addr_mod = frag_now_fix () & 3;
2801 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2802 as_bad (_("instruction address is not a multiple of 4"));
2803 frag_now->insn_addr = addr_mod;
2804 frag_now->has_code = 1;
2805 md_number_to_chars (f, insn, 4);
2806
2807 #ifdef OBJ_ELF
2808 dwarf2_emit_insn (4);
2809 #endif
2810
2811 /* Create any fixups. At this point we do not use a
2812 bfd_reloc_code_real_type, but instead just use the
2813 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2814 handle fixups for any operand type, although that is admittedly
2815 not a very exciting feature. We pick a BFD reloc type in
2816 md_apply_fix. */
2817 for (i = 0; i < fc; i++)
2818 {
2819 const struct powerpc_operand *operand;
2820
2821 operand = &powerpc_operands[fixups[i].opindex];
2822 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2823 {
2824 reloc_howto_type *reloc_howto;
2825 int size;
2826 int offset;
2827 fixS *fixP;
2828
2829 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
2830 if (!reloc_howto)
2831 abort ();
2832
2833 size = bfd_get_reloc_size (reloc_howto);
2834 offset = target_big_endian ? (4 - size) : 0;
2835
2836 if (size < 1 || size > 4)
2837 abort ();
2838
2839 fixP = fix_new_exp (frag_now,
2840 f - frag_now->fr_literal + offset,
2841 size,
2842 &fixups[i].exp,
2843 reloc_howto->pc_relative,
2844 fixups[i].reloc);
2845
2846 /* Turn off complaints that the addend is too large for things like
2847 foo+100000@ha. */
2848 switch (fixups[i].reloc)
2849 {
2850 case BFD_RELOC_16_GOTOFF:
2851 case BFD_RELOC_PPC_TOC16:
2852 case BFD_RELOC_LO16:
2853 case BFD_RELOC_HI16:
2854 case BFD_RELOC_HI16_S:
2855 #ifdef OBJ_ELF
2856 case BFD_RELOC_PPC64_HIGHER:
2857 case BFD_RELOC_PPC64_HIGHER_S:
2858 case BFD_RELOC_PPC64_HIGHEST:
2859 case BFD_RELOC_PPC64_HIGHEST_S:
2860 #endif
2861 fixP->fx_no_overflow = 1;
2862 break;
2863 default:
2864 break;
2865 }
2866 }
2867 else
2868 fix_new_exp (frag_now,
2869 f - frag_now->fr_literal,
2870 4,
2871 &fixups[i].exp,
2872 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2873 ((bfd_reloc_code_real_type)
2874 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
2875 }
2876 }
2877
2878 /* Handle a macro. Gather all the operands, transform them as
2879 described by the macro, and call md_assemble recursively. All the
2880 operands are separated by commas; we don't accept parentheses
2881 around operands here. */
2882
2883 static void
2884 ppc_macro (char *str, const struct powerpc_macro *macro)
2885 {
2886 char *operands[10];
2887 unsigned int count;
2888 char *s;
2889 unsigned int len;
2890 const char *format;
2891 unsigned int arg;
2892 char *send;
2893 char *complete;
2894
2895 /* Gather the users operands into the operands array. */
2896 count = 0;
2897 s = str;
2898 while (1)
2899 {
2900 if (count >= sizeof operands / sizeof operands[0])
2901 break;
2902 operands[count++] = s;
2903 s = strchr (s, ',');
2904 if (s == (char *) NULL)
2905 break;
2906 *s++ = '\0';
2907 }
2908
2909 if (count != macro->operands)
2910 {
2911 as_bad (_("wrong number of operands"));
2912 return;
2913 }
2914
2915 /* Work out how large the string must be (the size is unbounded
2916 because it includes user input). */
2917 len = 0;
2918 format = macro->format;
2919 while (*format != '\0')
2920 {
2921 if (*format != '%')
2922 {
2923 ++len;
2924 ++format;
2925 }
2926 else
2927 {
2928 arg = strtol (format + 1, &send, 10);
2929 know (send != format && arg < count);
2930 len += strlen (operands[arg]);
2931 format = send;
2932 }
2933 }
2934
2935 /* Put the string together. */
2936 complete = s = (char *) alloca (len + 1);
2937 format = macro->format;
2938 while (*format != '\0')
2939 {
2940 if (*format != '%')
2941 *s++ = *format++;
2942 else
2943 {
2944 arg = strtol (format + 1, &send, 10);
2945 strcpy (s, operands[arg]);
2946 s += strlen (s);
2947 format = send;
2948 }
2949 }
2950 *s = '\0';
2951
2952 /* Assemble the constructed instruction. */
2953 md_assemble (complete);
2954 }
2955 \f
2956 #ifdef OBJ_ELF
2957 /* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
2958
2959 int
2960 ppc_section_letter (int letter, char **ptr_msg)
2961 {
2962 if (letter == 'e')
2963 return SHF_EXCLUDE;
2964
2965 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
2966 return -1;
2967 }
2968
2969 int
2970 ppc_section_word (char *str, size_t len)
2971 {
2972 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2973 return SHF_EXCLUDE;
2974
2975 return -1;
2976 }
2977
2978 int
2979 ppc_section_type (char *str, size_t len)
2980 {
2981 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2982 return SHT_ORDERED;
2983
2984 return -1;
2985 }
2986
2987 int
2988 ppc_section_flags (int flags, int attr, int type)
2989 {
2990 if (type == SHT_ORDERED)
2991 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2992
2993 if (attr & SHF_EXCLUDE)
2994 flags |= SEC_EXCLUDE;
2995
2996 return flags;
2997 }
2998 #endif /* OBJ_ELF */
2999
3000 \f
3001 /* Pseudo-op handling. */
3002
3003 /* The .byte pseudo-op. This is similar to the normal .byte
3004 pseudo-op, but it can also take a single ASCII string. */
3005
3006 static void
3007 ppc_byte (int ignore ATTRIBUTE_UNUSED)
3008 {
3009 if (*input_line_pointer != '\"')
3010 {
3011 cons (1);
3012 return;
3013 }
3014
3015 /* Gather characters. A real double quote is doubled. Unusual
3016 characters are not permitted. */
3017 ++input_line_pointer;
3018 while (1)
3019 {
3020 char c;
3021
3022 c = *input_line_pointer++;
3023
3024 if (c == '\"')
3025 {
3026 if (*input_line_pointer != '\"')
3027 break;
3028 ++input_line_pointer;
3029 }
3030
3031 FRAG_APPEND_1_CHAR (c);
3032 }
3033
3034 demand_empty_rest_of_line ();
3035 }
3036 \f
3037 #ifdef OBJ_XCOFF
3038
3039 /* XCOFF specific pseudo-op handling. */
3040
3041 /* This is set if we are creating a .stabx symbol, since we don't want
3042 to handle symbol suffixes for such symbols. */
3043 static bfd_boolean ppc_stab_symbol;
3044
3045 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3046 symbols in the .bss segment as though they were local common
3047 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3048 aligns .comm and .lcomm to 4 bytes. */
3049
3050 static void
3051 ppc_comm (int lcomm)
3052 {
3053 asection *current_seg = now_seg;
3054 subsegT current_subseg = now_subseg;
3055 char *name;
3056 char endc;
3057 char *end_name;
3058 offsetT size;
3059 offsetT align;
3060 symbolS *lcomm_sym = NULL;
3061 symbolS *sym;
3062 char *pfrag;
3063
3064 name = input_line_pointer;
3065 endc = get_symbol_end ();
3066 end_name = input_line_pointer;
3067 *end_name = endc;
3068
3069 if (*input_line_pointer != ',')
3070 {
3071 as_bad (_("missing size"));
3072 ignore_rest_of_line ();
3073 return;
3074 }
3075 ++input_line_pointer;
3076
3077 size = get_absolute_expression ();
3078 if (size < 0)
3079 {
3080 as_bad (_("negative size"));
3081 ignore_rest_of_line ();
3082 return;
3083 }
3084
3085 if (! lcomm)
3086 {
3087 /* The third argument to .comm is the alignment. */
3088 if (*input_line_pointer != ',')
3089 align = 2;
3090 else
3091 {
3092 ++input_line_pointer;
3093 align = get_absolute_expression ();
3094 if (align <= 0)
3095 {
3096 as_warn (_("ignoring bad alignment"));
3097 align = 2;
3098 }
3099 }
3100 }
3101 else
3102 {
3103 char *lcomm_name;
3104 char lcomm_endc;
3105
3106 if (size <= 4)
3107 align = 2;
3108 else
3109 align = 3;
3110
3111 /* The third argument to .lcomm appears to be the real local
3112 common symbol to create. References to the symbol named in
3113 the first argument are turned into references to the third
3114 argument. */
3115 if (*input_line_pointer != ',')
3116 {
3117 as_bad (_("missing real symbol name"));
3118 ignore_rest_of_line ();
3119 return;
3120 }
3121 ++input_line_pointer;
3122
3123 lcomm_name = input_line_pointer;
3124 lcomm_endc = get_symbol_end ();
3125
3126 lcomm_sym = symbol_find_or_make (lcomm_name);
3127
3128 *input_line_pointer = lcomm_endc;
3129 }
3130
3131 *end_name = '\0';
3132 sym = symbol_find_or_make (name);
3133 *end_name = endc;
3134
3135 if (S_IS_DEFINED (sym)
3136 || S_GET_VALUE (sym) != 0)
3137 {
3138 as_bad (_("attempt to redefine symbol"));
3139 ignore_rest_of_line ();
3140 return;
3141 }
3142
3143 record_alignment (bss_section, align);
3144
3145 if (! lcomm
3146 || ! S_IS_DEFINED (lcomm_sym))
3147 {
3148 symbolS *def_sym;
3149 offsetT def_size;
3150
3151 if (! lcomm)
3152 {
3153 def_sym = sym;
3154 def_size = size;
3155 S_SET_EXTERNAL (sym);
3156 }
3157 else
3158 {
3159 symbol_get_tc (lcomm_sym)->output = 1;
3160 def_sym = lcomm_sym;
3161 def_size = 0;
3162 }
3163
3164 subseg_set (bss_section, 1);
3165 frag_align (align, 0, 0);
3166
3167 symbol_set_frag (def_sym, frag_now);
3168 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3169 def_size, (char *) NULL);
3170 *pfrag = 0;
3171 S_SET_SEGMENT (def_sym, bss_section);
3172 symbol_get_tc (def_sym)->align = align;
3173 }
3174 else if (lcomm)
3175 {
3176 /* Align the size of lcomm_sym. */
3177 symbol_get_frag (lcomm_sym)->fr_offset =
3178 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3179 &~ ((1 << align) - 1));
3180 if (align > symbol_get_tc (lcomm_sym)->align)
3181 symbol_get_tc (lcomm_sym)->align = align;
3182 }
3183
3184 if (lcomm)
3185 {
3186 /* Make sym an offset from lcomm_sym. */
3187 S_SET_SEGMENT (sym, bss_section);
3188 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3189 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3190 symbol_get_frag (lcomm_sym)->fr_offset += size;
3191 }
3192
3193 subseg_set (current_seg, current_subseg);
3194
3195 demand_empty_rest_of_line ();
3196 }
3197
3198 /* The .csect pseudo-op. This switches us into a different
3199 subsegment. The first argument is a symbol whose value is the
3200 start of the .csect. In COFF, csect symbols get special aux
3201 entries defined by the x_csect field of union internal_auxent. The
3202 optional second argument is the alignment (the default is 2). */
3203
3204 static void
3205 ppc_csect (int ignore ATTRIBUTE_UNUSED)
3206 {
3207 char *name;
3208 char endc;
3209 symbolS *sym;
3210 offsetT align;
3211
3212 name = input_line_pointer;
3213 endc = get_symbol_end ();
3214
3215 sym = symbol_find_or_make (name);
3216
3217 *input_line_pointer = endc;
3218
3219 if (S_GET_NAME (sym)[0] == '\0')
3220 {
3221 /* An unnamed csect is assumed to be [PR]. */
3222 symbol_get_tc (sym)->class = XMC_PR;
3223 }
3224
3225 align = 2;
3226 if (*input_line_pointer == ',')
3227 {
3228 ++input_line_pointer;
3229 align = get_absolute_expression ();
3230 }
3231
3232 ppc_change_csect (sym, align);
3233
3234 demand_empty_rest_of_line ();
3235 }
3236
3237 /* Change to a different csect. */
3238
3239 static void
3240 ppc_change_csect (symbolS *sym, offsetT align)
3241 {
3242 if (S_IS_DEFINED (sym))
3243 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3244 else
3245 {
3246 symbolS **list_ptr;
3247 int after_toc;
3248 int hold_chunksize;
3249 symbolS *list;
3250 int is_code;
3251 segT sec;
3252
3253 /* This is a new csect. We need to look at the symbol class to
3254 figure out whether it should go in the text section or the
3255 data section. */
3256 after_toc = 0;
3257 is_code = 0;
3258 switch (symbol_get_tc (sym)->class)
3259 {
3260 case XMC_PR:
3261 case XMC_RO:
3262 case XMC_DB:
3263 case XMC_GL:
3264 case XMC_XO:
3265 case XMC_SV:
3266 case XMC_TI:
3267 case XMC_TB:
3268 S_SET_SEGMENT (sym, text_section);
3269 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3270 ++ppc_text_subsegment;
3271 list_ptr = &ppc_text_csects;
3272 is_code = 1;
3273 break;
3274 case XMC_RW:
3275 case XMC_TC0:
3276 case XMC_TC:
3277 case XMC_DS:
3278 case XMC_UA:
3279 case XMC_BS:
3280 case XMC_UC:
3281 if (ppc_toc_csect != NULL
3282 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3283 == ppc_data_subsegment))
3284 after_toc = 1;
3285 S_SET_SEGMENT (sym, data_section);
3286 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
3287 ++ppc_data_subsegment;
3288 list_ptr = &ppc_data_csects;
3289 break;
3290 default:
3291 abort ();
3292 }
3293
3294 /* We set the obstack chunk size to a small value before
3295 changing subsegments, so that we don't use a lot of memory
3296 space for what may be a small section. */
3297 hold_chunksize = chunksize;
3298 chunksize = 64;
3299
3300 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3301 symbol_get_tc (sym)->subseg);
3302
3303 chunksize = hold_chunksize;
3304
3305 if (after_toc)
3306 ppc_after_toc_frag = frag_now;
3307
3308 record_alignment (sec, align);
3309 if (is_code)
3310 frag_align_code (align, 0);
3311 else
3312 frag_align (align, 0, 0);
3313
3314 symbol_set_frag (sym, frag_now);
3315 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3316
3317 symbol_get_tc (sym)->align = align;
3318 symbol_get_tc (sym)->output = 1;
3319 symbol_get_tc (sym)->within = sym;
3320
3321 for (list = *list_ptr;
3322 symbol_get_tc (list)->next != (symbolS *) NULL;
3323 list = symbol_get_tc (list)->next)
3324 ;
3325 symbol_get_tc (list)->next = sym;
3326
3327 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3328 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3329 &symbol_lastP);
3330 }
3331
3332 ppc_current_csect = sym;
3333 }
3334
3335 /* This function handles the .text and .data pseudo-ops. These
3336 pseudo-ops aren't really used by XCOFF; we implement them for the
3337 convenience of people who aren't used to XCOFF. */
3338
3339 static void
3340 ppc_section (int type)
3341 {
3342 const char *name;
3343 symbolS *sym;
3344
3345 if (type == 't')
3346 name = ".text[PR]";
3347 else if (type == 'd')
3348 name = ".data[RW]";
3349 else
3350 abort ();
3351
3352 sym = symbol_find_or_make (name);
3353
3354 ppc_change_csect (sym, 2);
3355
3356 demand_empty_rest_of_line ();
3357 }
3358
3359 /* This function handles the .section pseudo-op. This is mostly to
3360 give an error, since XCOFF only supports .text, .data and .bss, but
3361 we do permit the user to name the text or data section. */
3362
3363 static void
3364 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
3365 {
3366 char *user_name;
3367 const char *real_name;
3368 char c;
3369 symbolS *sym;
3370
3371 user_name = input_line_pointer;
3372 c = get_symbol_end ();
3373
3374 if (strcmp (user_name, ".text") == 0)
3375 real_name = ".text[PR]";
3376 else if (strcmp (user_name, ".data") == 0)
3377 real_name = ".data[RW]";
3378 else
3379 {
3380 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3381 *input_line_pointer = c;
3382 ignore_rest_of_line ();
3383 return;
3384 }
3385
3386 *input_line_pointer = c;
3387
3388 sym = symbol_find_or_make (real_name);
3389
3390 ppc_change_csect (sym, 2);
3391
3392 demand_empty_rest_of_line ();
3393 }
3394
3395 /* The .extern pseudo-op. We create an undefined symbol. */
3396
3397 static void
3398 ppc_extern (int ignore ATTRIBUTE_UNUSED)
3399 {
3400 char *name;
3401 char endc;
3402
3403 name = input_line_pointer;
3404 endc = get_symbol_end ();
3405
3406 (void) symbol_find_or_make (name);
3407
3408 *input_line_pointer = endc;
3409
3410 demand_empty_rest_of_line ();
3411 }
3412
3413 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3414
3415 static void
3416 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
3417 {
3418 char *name;
3419 char endc;
3420 symbolS *sym;
3421
3422 name = input_line_pointer;
3423 endc = get_symbol_end ();
3424
3425 sym = symbol_find_or_make (name);
3426
3427 *input_line_pointer = endc;
3428
3429 symbol_get_tc (sym)->output = 1;
3430
3431 demand_empty_rest_of_line ();
3432 }
3433
3434 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3435 although I don't know why it bothers. */
3436
3437 static void
3438 ppc_rename (int ignore ATTRIBUTE_UNUSED)
3439 {
3440 char *name;
3441 char endc;
3442 symbolS *sym;
3443 int len;
3444
3445 name = input_line_pointer;
3446 endc = get_symbol_end ();
3447
3448 sym = symbol_find_or_make (name);
3449
3450 *input_line_pointer = endc;
3451
3452 if (*input_line_pointer != ',')
3453 {
3454 as_bad (_("missing rename string"));
3455 ignore_rest_of_line ();
3456 return;
3457 }
3458 ++input_line_pointer;
3459
3460 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
3461
3462 demand_empty_rest_of_line ();
3463 }
3464
3465 /* The .stabx pseudo-op. This is similar to a normal .stabs
3466 pseudo-op, but slightly different. A sample is
3467 .stabx "main:F-1",.main,142,0
3468 The first argument is the symbol name to create. The second is the
3469 value, and the third is the storage class. The fourth seems to be
3470 always zero, and I am assuming it is the type. */
3471
3472 static void
3473 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
3474 {
3475 char *name;
3476 int len;
3477 symbolS *sym;
3478 expressionS exp;
3479
3480 name = demand_copy_C_string (&len);
3481
3482 if (*input_line_pointer != ',')
3483 {
3484 as_bad (_("missing value"));
3485 return;
3486 }
3487 ++input_line_pointer;
3488
3489 ppc_stab_symbol = TRUE;
3490 sym = symbol_make (name);
3491 ppc_stab_symbol = FALSE;
3492
3493 symbol_get_tc (sym)->real_name = name;
3494
3495 (void) expression (&exp);
3496
3497 switch (exp.X_op)
3498 {
3499 case O_illegal:
3500 case O_absent:
3501 case O_big:
3502 as_bad (_("illegal .stabx expression; zero assumed"));
3503 exp.X_add_number = 0;
3504 /* Fall through. */
3505 case O_constant:
3506 S_SET_VALUE (sym, (valueT) exp.X_add_number);
3507 symbol_set_frag (sym, &zero_address_frag);
3508 break;
3509
3510 case O_symbol:
3511 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
3512 symbol_set_value_expression (sym, &exp);
3513 else
3514 {
3515 S_SET_VALUE (sym,
3516 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
3517 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
3518 }
3519 break;
3520
3521 default:
3522 /* The value is some complex expression. This will probably
3523 fail at some later point, but this is probably the right
3524 thing to do here. */
3525 symbol_set_value_expression (sym, &exp);
3526 break;
3527 }
3528
3529 S_SET_SEGMENT (sym, ppc_coff_debug_section);
3530 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3531
3532 if (*input_line_pointer != ',')
3533 {
3534 as_bad (_("missing class"));
3535 return;
3536 }
3537 ++input_line_pointer;
3538
3539 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3540
3541 if (*input_line_pointer != ',')
3542 {
3543 as_bad (_("missing type"));
3544 return;
3545 }
3546 ++input_line_pointer;
3547
3548 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3549
3550 symbol_get_tc (sym)->output = 1;
3551
3552 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
3553
3554 symbol_get_tc (sym)->within = ppc_current_block;
3555
3556 /* In this case :
3557
3558 .bs name
3559 .stabx "z",arrays_,133,0
3560 .es
3561
3562 .comm arrays_,13768,3
3563
3564 resolve_symbol_value will copy the exp's "within" into sym's when the
3565 offset is 0. Since this seems to be corner case problem,
3566 only do the correction for storage class C_STSYM. A better solution
3567 would be to have the tc field updated in ppc_symbol_new_hook. */
3568
3569 if (exp.X_op == O_symbol)
3570 {
3571 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3572 }
3573 }
3574
3575 if (exp.X_op != O_symbol
3576 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3577 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3578 ppc_frob_label (sym);
3579 else
3580 {
3581 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3582 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
3583 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3584 symbol_get_tc (ppc_current_csect)->within = sym;
3585 }
3586
3587 demand_empty_rest_of_line ();
3588 }
3589
3590 /* The .function pseudo-op. This takes several arguments. The first
3591 argument seems to be the external name of the symbol. The second
3592 argument seems to be the label for the start of the function. gcc
3593 uses the same name for both. I have no idea what the third and
3594 fourth arguments are meant to be. The optional fifth argument is
3595 an expression for the size of the function. In COFF this symbol
3596 gets an aux entry like that used for a csect. */
3597
3598 static void
3599 ppc_function (int ignore ATTRIBUTE_UNUSED)
3600 {
3601 char *name;
3602 char endc;
3603 char *s;
3604 symbolS *ext_sym;
3605 symbolS *lab_sym;
3606
3607 name = input_line_pointer;
3608 endc = get_symbol_end ();
3609
3610 /* Ignore any [PR] suffix. */
3611 name = ppc_canonicalize_symbol_name (name);
3612 s = strchr (name, '[');
3613 if (s != (char *) NULL
3614 && strcmp (s + 1, "PR]") == 0)
3615 *s = '\0';
3616
3617 ext_sym = symbol_find_or_make (name);
3618
3619 *input_line_pointer = endc;
3620
3621 if (*input_line_pointer != ',')
3622 {
3623 as_bad (_("missing symbol name"));
3624 ignore_rest_of_line ();
3625 return;
3626 }
3627 ++input_line_pointer;
3628
3629 name = input_line_pointer;
3630 endc = get_symbol_end ();
3631
3632 lab_sym = symbol_find_or_make (name);
3633
3634 *input_line_pointer = endc;
3635
3636 if (ext_sym != lab_sym)
3637 {
3638 expressionS exp;
3639
3640 exp.X_op = O_symbol;
3641 exp.X_add_symbol = lab_sym;
3642 exp.X_op_symbol = NULL;
3643 exp.X_add_number = 0;
3644 exp.X_unsigned = 0;
3645 symbol_set_value_expression (ext_sym, &exp);
3646 }
3647
3648 if (symbol_get_tc (ext_sym)->class == -1)
3649 symbol_get_tc (ext_sym)->class = XMC_PR;
3650 symbol_get_tc (ext_sym)->output = 1;
3651
3652 if (*input_line_pointer == ',')
3653 {
3654 expressionS ignore;
3655
3656 /* Ignore the third argument. */
3657 ++input_line_pointer;
3658 expression (&ignore);
3659 if (*input_line_pointer == ',')
3660 {
3661 /* Ignore the fourth argument. */
3662 ++input_line_pointer;
3663 expression (&ignore);
3664 if (*input_line_pointer == ',')
3665 {
3666 /* The fifth argument is the function size. */
3667 ++input_line_pointer;
3668 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3669 absolute_section,
3670 (valueT) 0,
3671 &zero_address_frag);
3672 pseudo_set (symbol_get_tc (ext_sym)->size);
3673 }
3674 }
3675 }
3676
3677 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3678 SF_SET_FUNCTION (ext_sym);
3679 SF_SET_PROCESS (ext_sym);
3680 coff_add_linesym (ext_sym);
3681
3682 demand_empty_rest_of_line ();
3683 }
3684
3685 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
3686 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3687 with the correct line number */
3688
3689 static symbolS *saved_bi_sym = 0;
3690
3691 static void
3692 ppc_bf (int ignore ATTRIBUTE_UNUSED)
3693 {
3694 symbolS *sym;
3695
3696 sym = symbol_make (".bf");
3697 S_SET_SEGMENT (sym, text_section);
3698 symbol_set_frag (sym, frag_now);
3699 S_SET_VALUE (sym, frag_now_fix ());
3700 S_SET_STORAGE_CLASS (sym, C_FCN);
3701
3702 coff_line_base = get_absolute_expression ();
3703
3704 S_SET_NUMBER_AUXILIARY (sym, 1);
3705 SA_SET_SYM_LNNO (sym, coff_line_base);
3706
3707 /* Line number for bi. */
3708 if (saved_bi_sym)
3709 {
3710 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3711 saved_bi_sym = 0;
3712 }
3713
3714
3715 symbol_get_tc (sym)->output = 1;
3716
3717 ppc_frob_label (sym);
3718
3719 demand_empty_rest_of_line ();
3720 }
3721
3722 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3723 ".ef", except that the line number is absolute, not relative to the
3724 most recent ".bf" symbol. */
3725
3726 static void
3727 ppc_ef (int ignore ATTRIBUTE_UNUSED)
3728 {
3729 symbolS *sym;
3730
3731 sym = symbol_make (".ef");
3732 S_SET_SEGMENT (sym, text_section);
3733 symbol_set_frag (sym, frag_now);
3734 S_SET_VALUE (sym, frag_now_fix ());
3735 S_SET_STORAGE_CLASS (sym, C_FCN);
3736 S_SET_NUMBER_AUXILIARY (sym, 1);
3737 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3738 symbol_get_tc (sym)->output = 1;
3739
3740 ppc_frob_label (sym);
3741
3742 demand_empty_rest_of_line ();
3743 }
3744
3745 /* The .bi and .ei pseudo-ops. These take a string argument and
3746 generates a C_BINCL or C_EINCL symbol, which goes at the start of
3747 the symbol list. The value of .bi will be know when the next .bf
3748 is encountered. */
3749
3750 static void
3751 ppc_biei (int ei)
3752 {
3753 static symbolS *last_biei;
3754
3755 char *name;
3756 int len;
3757 symbolS *sym;
3758 symbolS *look;
3759
3760 name = demand_copy_C_string (&len);
3761
3762 /* The value of these symbols is actually file offset. Here we set
3763 the value to the index into the line number entries. In
3764 ppc_frob_symbols we set the fix_line field, which will cause BFD
3765 to do the right thing. */
3766
3767 sym = symbol_make (name);
3768 /* obj-coff.c currently only handles line numbers correctly in the
3769 .text section. */
3770 S_SET_SEGMENT (sym, text_section);
3771 S_SET_VALUE (sym, coff_n_line_nos);
3772 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3773
3774 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
3775 symbol_get_tc (sym)->output = 1;
3776
3777 /* Save bi. */
3778 if (ei)
3779 saved_bi_sym = 0;
3780 else
3781 saved_bi_sym = sym;
3782
3783 for (look = last_biei ? last_biei : symbol_rootP;
3784 (look != (symbolS *) NULL
3785 && (S_GET_STORAGE_CLASS (look) == C_FILE
3786 || S_GET_STORAGE_CLASS (look) == C_BINCL
3787 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3788 look = symbol_next (look))
3789 ;
3790 if (look != (symbolS *) NULL)
3791 {
3792 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3793 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3794 last_biei = sym;
3795 }
3796
3797 demand_empty_rest_of_line ();
3798 }
3799
3800 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3801 There is one argument, which is a csect symbol. The value of the
3802 .bs symbol is the index of this csect symbol. */
3803
3804 static void
3805 ppc_bs (int ignore ATTRIBUTE_UNUSED)
3806 {
3807 char *name;
3808 char endc;
3809 symbolS *csect;
3810 symbolS *sym;
3811
3812 if (ppc_current_block != NULL)
3813 as_bad (_("nested .bs blocks"));
3814
3815 name = input_line_pointer;
3816 endc = get_symbol_end ();
3817
3818 csect = symbol_find_or_make (name);
3819
3820 *input_line_pointer = endc;
3821
3822 sym = symbol_make (".bs");
3823 S_SET_SEGMENT (sym, now_seg);
3824 S_SET_STORAGE_CLASS (sym, C_BSTAT);
3825 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3826 symbol_get_tc (sym)->output = 1;
3827
3828 symbol_get_tc (sym)->within = csect;
3829
3830 ppc_frob_label (sym);
3831
3832 ppc_current_block = sym;
3833
3834 demand_empty_rest_of_line ();
3835 }
3836
3837 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3838
3839 static void
3840 ppc_es (int ignore ATTRIBUTE_UNUSED)
3841 {
3842 symbolS *sym;
3843
3844 if (ppc_current_block == NULL)
3845 as_bad (_(".es without preceding .bs"));
3846
3847 sym = symbol_make (".es");
3848 S_SET_SEGMENT (sym, now_seg);
3849 S_SET_STORAGE_CLASS (sym, C_ESTAT);
3850 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3851 symbol_get_tc (sym)->output = 1;
3852
3853 ppc_frob_label (sym);
3854
3855 ppc_current_block = NULL;
3856
3857 demand_empty_rest_of_line ();
3858 }
3859
3860 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3861 line number. */
3862
3863 static void
3864 ppc_bb (int ignore ATTRIBUTE_UNUSED)
3865 {
3866 symbolS *sym;
3867
3868 sym = symbol_make (".bb");
3869 S_SET_SEGMENT (sym, text_section);
3870 symbol_set_frag (sym, frag_now);
3871 S_SET_VALUE (sym, frag_now_fix ());
3872 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3873
3874 S_SET_NUMBER_AUXILIARY (sym, 1);
3875 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3876
3877 symbol_get_tc (sym)->output = 1;
3878
3879 SF_SET_PROCESS (sym);
3880
3881 ppc_frob_label (sym);
3882
3883 demand_empty_rest_of_line ();
3884 }
3885
3886 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3887 line number. */
3888
3889 static void
3890 ppc_eb (int ignore ATTRIBUTE_UNUSED)
3891 {
3892 symbolS *sym;
3893
3894 sym = symbol_make (".eb");
3895 S_SET_SEGMENT (sym, text_section);
3896 symbol_set_frag (sym, frag_now);
3897 S_SET_VALUE (sym, frag_now_fix ());
3898 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3899 S_SET_NUMBER_AUXILIARY (sym, 1);
3900 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3901 symbol_get_tc (sym)->output = 1;
3902
3903 SF_SET_PROCESS (sym);
3904
3905 ppc_frob_label (sym);
3906
3907 demand_empty_rest_of_line ();
3908 }
3909
3910 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3911 specified name. */
3912
3913 static void
3914 ppc_bc (int ignore ATTRIBUTE_UNUSED)
3915 {
3916 char *name;
3917 int len;
3918 symbolS *sym;
3919
3920 name = demand_copy_C_string (&len);
3921 sym = symbol_make (name);
3922 S_SET_SEGMENT (sym, ppc_coff_debug_section);
3923 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3924 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3925 S_SET_VALUE (sym, 0);
3926 symbol_get_tc (sym)->output = 1;
3927
3928 ppc_frob_label (sym);
3929
3930 demand_empty_rest_of_line ();
3931 }
3932
3933 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3934
3935 static void
3936 ppc_ec (int ignore ATTRIBUTE_UNUSED)
3937 {
3938 symbolS *sym;
3939
3940 sym = symbol_make (".ec");
3941 S_SET_SEGMENT (sym, ppc_coff_debug_section);
3942 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3943 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3944 S_SET_VALUE (sym, 0);
3945 symbol_get_tc (sym)->output = 1;
3946
3947 ppc_frob_label (sym);
3948
3949 demand_empty_rest_of_line ();
3950 }
3951
3952 /* The .toc pseudo-op. Switch to the .toc subsegment. */
3953
3954 static void
3955 ppc_toc (int ignore ATTRIBUTE_UNUSED)
3956 {
3957 if (ppc_toc_csect != (symbolS *) NULL)
3958 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
3959 else
3960 {
3961 subsegT subseg;
3962 symbolS *sym;
3963 symbolS *list;
3964
3965 subseg = ppc_data_subsegment;
3966 ++ppc_data_subsegment;
3967
3968 subseg_new (segment_name (data_section), subseg);
3969 ppc_toc_frag = frag_now;
3970
3971 sym = symbol_find_or_make ("TOC[TC0]");
3972 symbol_set_frag (sym, frag_now);
3973 S_SET_SEGMENT (sym, data_section);
3974 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3975 symbol_get_tc (sym)->subseg = subseg;
3976 symbol_get_tc (sym)->output = 1;
3977 symbol_get_tc (sym)->within = sym;
3978
3979 ppc_toc_csect = sym;
3980
3981 for (list = ppc_data_csects;
3982 symbol_get_tc (list)->next != (symbolS *) NULL;
3983 list = symbol_get_tc (list)->next)
3984 ;
3985 symbol_get_tc (list)->next = sym;
3986
3987 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3988 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3989 &symbol_lastP);
3990 }
3991
3992 ppc_current_csect = ppc_toc_csect;
3993
3994 demand_empty_rest_of_line ();
3995 }
3996
3997 /* The AIX assembler automatically aligns the operands of a .long or
3998 .short pseudo-op, and we want to be compatible. */
3999
4000 static void
4001 ppc_xcoff_cons (int log_size)
4002 {
4003 frag_align (log_size, 0, 0);
4004 record_alignment (now_seg, log_size);
4005 cons (1 << log_size);
4006 }
4007
4008 static void
4009 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4010 {
4011 expressionS exp;
4012 int byte_count;
4013
4014 (void) expression (&exp);
4015
4016 if (exp.X_op != O_constant)
4017 {
4018 as_bad (_("non-constant byte count"));
4019 return;
4020 }
4021
4022 byte_count = exp.X_add_number;
4023
4024 if (*input_line_pointer != ',')
4025 {
4026 as_bad (_("missing value"));
4027 return;
4028 }
4029
4030 ++input_line_pointer;
4031 cons (byte_count);
4032 }
4033
4034 #endif /* OBJ_XCOFF */
4035 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4036 \f
4037 /* The .tc pseudo-op. This is used when generating either XCOFF or
4038 ELF. This takes two or more arguments.
4039
4040 When generating XCOFF output, the first argument is the name to
4041 give to this location in the toc; this will be a symbol with class
4042 TC. The rest of the arguments are N-byte values to actually put at
4043 this location in the TOC; often there is just one more argument, a
4044 relocatable symbol reference. The size of the value to store
4045 depends on target word size. A 32-bit target uses 4-byte values, a
4046 64-bit target uses 8-byte values.
4047
4048 When not generating XCOFF output, the arguments are the same, but
4049 the first argument is simply ignored. */
4050
4051 static void
4052 ppc_tc (int ignore ATTRIBUTE_UNUSED)
4053 {
4054 #ifdef OBJ_XCOFF
4055
4056 /* Define the TOC symbol name. */
4057 {
4058 char *name;
4059 char endc;
4060 symbolS *sym;
4061
4062 if (ppc_toc_csect == (symbolS *) NULL
4063 || ppc_toc_csect != ppc_current_csect)
4064 {
4065 as_bad (_(".tc not in .toc section"));
4066 ignore_rest_of_line ();
4067 return;
4068 }
4069
4070 name = input_line_pointer;
4071 endc = get_symbol_end ();
4072
4073 sym = symbol_find_or_make (name);
4074
4075 *input_line_pointer = endc;
4076
4077 if (S_IS_DEFINED (sym))
4078 {
4079 symbolS *label;
4080
4081 label = symbol_get_tc (ppc_current_csect)->within;
4082 if (symbol_get_tc (label)->class != XMC_TC0)
4083 {
4084 as_bad (_(".tc with no label"));
4085 ignore_rest_of_line ();
4086 return;
4087 }
4088
4089 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
4090 symbol_set_frag (label, symbol_get_frag (sym));
4091 S_SET_VALUE (label, S_GET_VALUE (sym));
4092
4093 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4094 ++input_line_pointer;
4095
4096 return;
4097 }
4098
4099 S_SET_SEGMENT (sym, now_seg);
4100 symbol_set_frag (sym, frag_now);
4101 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4102 symbol_get_tc (sym)->class = XMC_TC;
4103 symbol_get_tc (sym)->output = 1;
4104
4105 ppc_frob_label (sym);
4106 }
4107
4108 #endif /* OBJ_XCOFF */
4109 #ifdef OBJ_ELF
4110 int align;
4111
4112 /* Skip the TOC symbol name. */
4113 while (is_part_of_name (*input_line_pointer)
4114 || *input_line_pointer == ' '
4115 || *input_line_pointer == '['
4116 || *input_line_pointer == ']'
4117 || *input_line_pointer == '{'
4118 || *input_line_pointer == '}')
4119 ++input_line_pointer;
4120
4121 /* Align to a four/eight byte boundary. */
4122 align = ppc_obj64 ? 3 : 2;
4123 frag_align (align, 0, 0);
4124 record_alignment (now_seg, align);
4125 #endif /* OBJ_ELF */
4126
4127 if (*input_line_pointer != ',')
4128 demand_empty_rest_of_line ();
4129 else
4130 {
4131 ++input_line_pointer;
4132 cons (ppc_obj64 ? 8 : 4);
4133 }
4134 }
4135
4136 /* Pseudo-op .machine. */
4137
4138 static void
4139 ppc_machine (int ignore ATTRIBUTE_UNUSED)
4140 {
4141 char *cpu_string;
4142 #define MAX_HISTORY 100
4143 static ppc_cpu_t *cpu_history;
4144 static int curr_hist;
4145
4146 SKIP_WHITESPACE ();
4147
4148 if (*input_line_pointer == '"')
4149 {
4150 int len;
4151 cpu_string = demand_copy_C_string (&len);
4152 }
4153 else
4154 {
4155 char c;
4156 cpu_string = input_line_pointer;
4157 c = get_symbol_end ();
4158 cpu_string = xstrdup (cpu_string);
4159 *input_line_pointer = c;
4160 }
4161
4162 if (cpu_string != NULL)
4163 {
4164 ppc_cpu_t old_cpu = ppc_cpu;
4165 char *p;
4166
4167 for (p = cpu_string; *p != 0; p++)
4168 *p = TOLOWER (*p);
4169
4170 if (strcmp (cpu_string, "push") == 0)
4171 {
4172 if (cpu_history == NULL)
4173 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4174
4175 if (curr_hist >= MAX_HISTORY)
4176 as_bad (_(".machine stack overflow"));
4177 else
4178 cpu_history[curr_hist++] = ppc_cpu;
4179 }
4180 else if (strcmp (cpu_string, "pop") == 0)
4181 {
4182 if (curr_hist <= 0)
4183 as_bad (_(".machine stack underflow"));
4184 else
4185 ppc_cpu = cpu_history[--curr_hist];
4186 }
4187 else if (parse_cpu (cpu_string))
4188 ;
4189 else
4190 as_bad (_("invalid machine `%s'"), cpu_string);
4191
4192 if (ppc_cpu != old_cpu)
4193 ppc_setup_opcodes ();
4194 }
4195
4196 demand_empty_rest_of_line ();
4197 }
4198
4199 /* See whether a symbol is in the TOC section. */
4200
4201 static int
4202 ppc_is_toc_sym (symbolS *sym)
4203 {
4204 #ifdef OBJ_XCOFF
4205 return symbol_get_tc (sym)->class == XMC_TC;
4206 #endif
4207 #ifdef OBJ_ELF
4208 const char *sname = segment_name (S_GET_SEGMENT (sym));
4209 if (ppc_obj64)
4210 return strcmp (sname, ".toc") == 0;
4211 else
4212 return strcmp (sname, ".got") == 0;
4213 #endif
4214 }
4215 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
4216 \f
4217 #ifdef TE_PE
4218
4219 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
4220
4221 /* Set the current section. */
4222 static void
4223 ppc_set_current_section (segT new)
4224 {
4225 ppc_previous_section = ppc_current_section;
4226 ppc_current_section = new;
4227 }
4228
4229 /* pseudo-op: .previous
4230 behaviour: toggles the current section with the previous section.
4231 errors: None
4232 warnings: "No previous section" */
4233
4234 static void
4235 ppc_previous (int ignore ATTRIBUTE_UNUSED)
4236 {
4237 symbolS *tmp;
4238
4239 if (ppc_previous_section == NULL)
4240 {
4241 as_warn (_("No previous section to return to. Directive ignored."));
4242 return;
4243 }
4244
4245 subseg_set (ppc_previous_section, 0);
4246
4247 ppc_set_current_section (ppc_previous_section);
4248 }
4249
4250 /* pseudo-op: .pdata
4251 behaviour: predefined read only data section
4252 double word aligned
4253 errors: None
4254 warnings: None
4255 initial: .section .pdata "adr3"
4256 a - don't know -- maybe a misprint
4257 d - initialized data
4258 r - readable
4259 3 - double word aligned (that would be 4 byte boundary)
4260
4261 commentary:
4262 Tag index tables (also known as the function table) for exception
4263 handling, debugging, etc. */
4264
4265 static void
4266 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
4267 {
4268 if (pdata_section == 0)
4269 {
4270 pdata_section = subseg_new (".pdata", 0);
4271
4272 bfd_set_section_flags (stdoutput, pdata_section,
4273 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4274 | SEC_READONLY | SEC_DATA ));
4275
4276 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4277 }
4278 else
4279 {
4280 pdata_section = subseg_new (".pdata", 0);
4281 }
4282 ppc_set_current_section (pdata_section);
4283 }
4284
4285 /* pseudo-op: .ydata
4286 behaviour: predefined read only data section
4287 double word aligned
4288 errors: None
4289 warnings: None
4290 initial: .section .ydata "drw3"
4291 a - don't know -- maybe a misprint
4292 d - initialized data
4293 r - readable
4294 3 - double word aligned (that would be 4 byte boundary)
4295 commentary:
4296 Tag tables (also known as the scope table) for exception handling,
4297 debugging, etc. */
4298
4299 static void
4300 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
4301 {
4302 if (ydata_section == 0)
4303 {
4304 ydata_section = subseg_new (".ydata", 0);
4305 bfd_set_section_flags (stdoutput, ydata_section,
4306 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4307 | SEC_READONLY | SEC_DATA ));
4308
4309 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4310 }
4311 else
4312 {
4313 ydata_section = subseg_new (".ydata", 0);
4314 }
4315 ppc_set_current_section (ydata_section);
4316 }
4317
4318 /* pseudo-op: .reldata
4319 behaviour: predefined read write data section
4320 double word aligned (4-byte)
4321 FIXME: relocation is applied to it
4322 FIXME: what's the difference between this and .data?
4323 errors: None
4324 warnings: None
4325 initial: .section .reldata "drw3"
4326 d - initialized data
4327 r - readable
4328 w - writeable
4329 3 - double word aligned (that would be 8 byte boundary)
4330
4331 commentary:
4332 Like .data, but intended to hold data subject to relocation, such as
4333 function descriptors, etc. */
4334
4335 static void
4336 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
4337 {
4338 if (reldata_section == 0)
4339 {
4340 reldata_section = subseg_new (".reldata", 0);
4341
4342 bfd_set_section_flags (stdoutput, reldata_section,
4343 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4344 | SEC_DATA));
4345
4346 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4347 }
4348 else
4349 {
4350 reldata_section = subseg_new (".reldata", 0);
4351 }
4352 ppc_set_current_section (reldata_section);
4353 }
4354
4355 /* pseudo-op: .rdata
4356 behaviour: predefined read only data section
4357 double word aligned
4358 errors: None
4359 warnings: None
4360 initial: .section .rdata "dr3"
4361 d - initialized data
4362 r - readable
4363 3 - double word aligned (that would be 4 byte boundary) */
4364
4365 static void
4366 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
4367 {
4368 if (rdata_section == 0)
4369 {
4370 rdata_section = subseg_new (".rdata", 0);
4371 bfd_set_section_flags (stdoutput, rdata_section,
4372 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4373 | SEC_READONLY | SEC_DATA ));
4374
4375 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4376 }
4377 else
4378 {
4379 rdata_section = subseg_new (".rdata", 0);
4380 }
4381 ppc_set_current_section (rdata_section);
4382 }
4383
4384 /* pseudo-op: .ualong
4385 behaviour: much like .int, with the exception that no alignment is
4386 performed.
4387 FIXME: test the alignment statement
4388 errors: None
4389 warnings: None */
4390
4391 static void
4392 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
4393 {
4394 /* Try for long. */
4395 cons (4);
4396 }
4397
4398 /* pseudo-op: .znop <symbol name>
4399 behaviour: Issue a nop instruction
4400 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
4401 the supplied symbol name.
4402 errors: None
4403 warnings: Missing symbol name */
4404
4405 static void
4406 ppc_znop (int ignore ATTRIBUTE_UNUSED)
4407 {
4408 unsigned long insn;
4409 const struct powerpc_opcode *opcode;
4410 expressionS ex;
4411 char *f;
4412 symbolS *sym;
4413 char *symbol_name;
4414 char c;
4415 char *name;
4416 unsigned int exp;
4417 flagword flags;
4418 asection *sec;
4419
4420 /* Strip out the symbol name. */
4421 symbol_name = input_line_pointer;
4422 c = get_symbol_end ();
4423
4424 name = xmalloc (input_line_pointer - symbol_name + 1);
4425 strcpy (name, symbol_name);
4426
4427 sym = symbol_find_or_make (name);
4428
4429 *input_line_pointer = c;
4430
4431 SKIP_WHITESPACE ();
4432
4433 /* Look up the opcode in the hash table. */
4434 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4435
4436 /* Stick in the nop. */
4437 insn = opcode->opcode;
4438
4439 /* Write out the instruction. */
4440 f = frag_more (4);
4441 md_number_to_chars (f, insn, 4);
4442 fix_new (frag_now,
4443 f - frag_now->fr_literal,
4444 4,
4445 sym,
4446 0,
4447 0,
4448 BFD_RELOC_16_GOT_PCREL);
4449
4450 }
4451
4452 /* pseudo-op:
4453 behaviour:
4454 errors:
4455 warnings: */
4456
4457 static void
4458 ppc_pe_comm (int lcomm)
4459 {
4460 char *name;
4461 char c;
4462 char *p;
4463 offsetT temp;
4464 symbolS *symbolP;
4465 offsetT align;
4466
4467 name = input_line_pointer;
4468 c = get_symbol_end ();
4469
4470 /* just after name is now '\0'. */
4471 p = input_line_pointer;
4472 *p = c;
4473 SKIP_WHITESPACE ();
4474 if (*input_line_pointer != ',')
4475 {
4476 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4477 ignore_rest_of_line ();
4478 return;
4479 }
4480
4481 input_line_pointer++; /* skip ',' */
4482 if ((temp = get_absolute_expression ()) < 0)
4483 {
4484 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4485 ignore_rest_of_line ();
4486 return;
4487 }
4488
4489 if (! lcomm)
4490 {
4491 /* The third argument to .comm is the alignment. */
4492 if (*input_line_pointer != ',')
4493 align = 3;
4494 else
4495 {
4496 ++input_line_pointer;
4497 align = get_absolute_expression ();
4498 if (align <= 0)
4499 {
4500 as_warn (_("ignoring bad alignment"));
4501 align = 3;
4502 }
4503 }
4504 }
4505
4506 *p = 0;
4507 symbolP = symbol_find_or_make (name);
4508
4509 *p = c;
4510 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4511 {
4512 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4513 S_GET_NAME (symbolP));
4514 ignore_rest_of_line ();
4515 return;
4516 }
4517
4518 if (S_GET_VALUE (symbolP))
4519 {
4520 if (S_GET_VALUE (symbolP) != (valueT) temp)
4521 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4522 S_GET_NAME (symbolP),
4523 (long) S_GET_VALUE (symbolP),
4524 (long) temp);
4525 }
4526 else
4527 {
4528 S_SET_VALUE (symbolP, (valueT) temp);
4529 S_SET_EXTERNAL (symbolP);
4530 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
4531 }
4532
4533 demand_empty_rest_of_line ();
4534 }
4535
4536 /*
4537 * implement the .section pseudo op:
4538 * .section name {, "flags"}
4539 * ^ ^
4540 * | +--- optional flags: 'b' for bss
4541 * | 'i' for info
4542 * +-- section name 'l' for lib
4543 * 'n' for noload
4544 * 'o' for over
4545 * 'w' for data
4546 * 'd' (apparently m88k for data)
4547 * 'x' for text
4548 * But if the argument is not a quoted string, treat it as a
4549 * subsegment number.
4550 *
4551 * FIXME: this is a copy of the section processing from obj-coff.c, with
4552 * additions/changes for the moto-pas assembler support. There are three
4553 * categories:
4554 *
4555 * FIXME: I just noticed this. This doesn't work at all really. It it
4556 * setting bits that bfd probably neither understands or uses. The
4557 * correct approach (?) will have to incorporate extra fields attached
4558 * to the section to hold the system specific stuff. (krk)
4559 *
4560 * Section Contents:
4561 * 'a' - unknown - referred to in documentation, but no definition supplied
4562 * 'c' - section has code
4563 * 'd' - section has initialized data
4564 * 'u' - section has uninitialized data
4565 * 'i' - section contains directives (info)
4566 * 'n' - section can be discarded
4567 * 'R' - remove section at link time
4568 *
4569 * Section Protection:
4570 * 'r' - section is readable
4571 * 'w' - section is writeable
4572 * 'x' - section is executable
4573 * 's' - section is sharable
4574 *
4575 * Section Alignment:
4576 * '0' - align to byte boundary
4577 * '1' - align to halfword undary
4578 * '2' - align to word boundary
4579 * '3' - align to doubleword boundary
4580 * '4' - align to quadword boundary
4581 * '5' - align to 32 byte boundary
4582 * '6' - align to 64 byte boundary
4583 *
4584 */
4585
4586 void
4587 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
4588 {
4589 /* Strip out the section name. */
4590 char *section_name;
4591 char c;
4592 char *name;
4593 unsigned int exp;
4594 flagword flags;
4595 segT sec;
4596 int align;
4597
4598 section_name = input_line_pointer;
4599 c = get_symbol_end ();
4600
4601 name = xmalloc (input_line_pointer - section_name + 1);
4602 strcpy (name, section_name);
4603
4604 *input_line_pointer = c;
4605
4606 SKIP_WHITESPACE ();
4607
4608 exp = 0;
4609 flags = SEC_NO_FLAGS;
4610
4611 if (strcmp (name, ".idata$2") == 0)
4612 {
4613 align = 0;
4614 }
4615 else if (strcmp (name, ".idata$3") == 0)
4616 {
4617 align = 0;
4618 }
4619 else if (strcmp (name, ".idata$4") == 0)
4620 {
4621 align = 2;
4622 }
4623 else if (strcmp (name, ".idata$5") == 0)
4624 {
4625 align = 2;
4626 }
4627 else if (strcmp (name, ".idata$6") == 0)
4628 {
4629 align = 1;
4630 }
4631 else
4632 /* Default alignment to 16 byte boundary. */
4633 align = 4;
4634
4635 if (*input_line_pointer == ',')
4636 {
4637 ++input_line_pointer;
4638 SKIP_WHITESPACE ();
4639 if (*input_line_pointer != '"')
4640 exp = get_absolute_expression ();
4641 else
4642 {
4643 ++input_line_pointer;
4644 while (*input_line_pointer != '"'
4645 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4646 {
4647 switch (*input_line_pointer)
4648 {
4649 /* Section Contents */
4650 case 'a': /* unknown */
4651 as_bad (_("Unsupported section attribute -- 'a'"));
4652 break;
4653 case 'c': /* code section */
4654 flags |= SEC_CODE;
4655 break;
4656 case 'd': /* section has initialized data */
4657 flags |= SEC_DATA;
4658 break;
4659 case 'u': /* section has uninitialized data */
4660 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4661 in winnt.h */
4662 flags |= SEC_ROM;
4663 break;
4664 case 'i': /* section contains directives (info) */
4665 /* FIXME: This is IMAGE_SCN_LNK_INFO
4666 in winnt.h */
4667 flags |= SEC_HAS_CONTENTS;
4668 break;
4669 case 'n': /* section can be discarded */
4670 flags &=~ SEC_LOAD;
4671 break;
4672 case 'R': /* Remove section at link time */
4673 flags |= SEC_NEVER_LOAD;
4674 break;
4675 #if IFLICT_BRAIN_DAMAGE
4676 /* Section Protection */
4677 case 'r': /* section is readable */
4678 flags |= IMAGE_SCN_MEM_READ;
4679 break;
4680 case 'w': /* section is writeable */
4681 flags |= IMAGE_SCN_MEM_WRITE;
4682 break;
4683 case 'x': /* section is executable */
4684 flags |= IMAGE_SCN_MEM_EXECUTE;
4685 break;
4686 case 's': /* section is sharable */
4687 flags |= IMAGE_SCN_MEM_SHARED;
4688 break;
4689
4690 /* Section Alignment */
4691 case '0': /* align to byte boundary */
4692 flags |= IMAGE_SCN_ALIGN_1BYTES;
4693 align = 0;
4694 break;
4695 case '1': /* align to halfword boundary */
4696 flags |= IMAGE_SCN_ALIGN_2BYTES;
4697 align = 1;
4698 break;
4699 case '2': /* align to word boundary */
4700 flags |= IMAGE_SCN_ALIGN_4BYTES;
4701 align = 2;
4702 break;
4703 case '3': /* align to doubleword boundary */
4704 flags |= IMAGE_SCN_ALIGN_8BYTES;
4705 align = 3;
4706 break;
4707 case '4': /* align to quadword boundary */
4708 flags |= IMAGE_SCN_ALIGN_16BYTES;
4709 align = 4;
4710 break;
4711 case '5': /* align to 32 byte boundary */
4712 flags |= IMAGE_SCN_ALIGN_32BYTES;
4713 align = 5;
4714 break;
4715 case '6': /* align to 64 byte boundary */
4716 flags |= IMAGE_SCN_ALIGN_64BYTES;
4717 align = 6;
4718 break;
4719 #endif
4720 default:
4721 as_bad (_("unknown section attribute '%c'"),
4722 *input_line_pointer);
4723 break;
4724 }
4725 ++input_line_pointer;
4726 }
4727 if (*input_line_pointer == '"')
4728 ++input_line_pointer;
4729 }
4730 }
4731
4732 sec = subseg_new (name, (subsegT) exp);
4733
4734 ppc_set_current_section (sec);
4735
4736 if (flags != SEC_NO_FLAGS)
4737 {
4738 if (! bfd_set_section_flags (stdoutput, sec, flags))
4739 as_bad (_("error setting flags for \"%s\": %s"),
4740 bfd_section_name (stdoutput, sec),
4741 bfd_errmsg (bfd_get_error ()));
4742 }
4743
4744 bfd_set_section_alignment (stdoutput, sec, align);
4745 }
4746
4747 static void
4748 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
4749 {
4750 char *name;
4751 char endc;
4752 symbolS *ext_sym;
4753
4754 name = input_line_pointer;
4755 endc = get_symbol_end ();
4756
4757 ext_sym = symbol_find_or_make (name);
4758
4759 *input_line_pointer = endc;
4760
4761 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4762 SF_SET_FUNCTION (ext_sym);
4763 SF_SET_PROCESS (ext_sym);
4764 coff_add_linesym (ext_sym);
4765
4766 demand_empty_rest_of_line ();
4767 }
4768
4769 static void
4770 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
4771 {
4772 if (tocdata_section == 0)
4773 {
4774 tocdata_section = subseg_new (".tocd", 0);
4775 /* FIXME: section flags won't work. */
4776 bfd_set_section_flags (stdoutput, tocdata_section,
4777 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4778 | SEC_READONLY | SEC_DATA));
4779
4780 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4781 }
4782 else
4783 {
4784 rdata_section = subseg_new (".tocd", 0);
4785 }
4786
4787 ppc_set_current_section (tocdata_section);
4788
4789 demand_empty_rest_of_line ();
4790 }
4791
4792 /* Don't adjust TOC relocs to use the section symbol. */
4793
4794 int
4795 ppc_pe_fix_adjustable (fixS *fix)
4796 {
4797 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4798 }
4799
4800 #endif
4801 \f
4802 #ifdef OBJ_XCOFF
4803
4804 /* XCOFF specific symbol and file handling. */
4805
4806 /* Canonicalize the symbol name. We use the to force the suffix, if
4807 any, to use square brackets, and to be in upper case. */
4808
4809 char *
4810 ppc_canonicalize_symbol_name (char *name)
4811 {
4812 char *s;
4813
4814 if (ppc_stab_symbol)
4815 return name;
4816
4817 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4818 ;
4819 if (*s != '\0')
4820 {
4821 char brac;
4822
4823 if (*s == '[')
4824 brac = ']';
4825 else
4826 {
4827 *s = '[';
4828 brac = '}';
4829 }
4830
4831 for (s++; *s != '\0' && *s != brac; s++)
4832 *s = TOUPPER (*s);
4833
4834 if (*s == '\0' || s[1] != '\0')
4835 as_bad (_("bad symbol suffix"));
4836
4837 *s = ']';
4838 }
4839
4840 return name;
4841 }
4842
4843 /* Set the class of a symbol based on the suffix, if any. This is
4844 called whenever a new symbol is created. */
4845
4846 void
4847 ppc_symbol_new_hook (symbolS *sym)
4848 {
4849 struct ppc_tc_sy *tc;
4850 const char *s;
4851
4852 tc = symbol_get_tc (sym);
4853 tc->next = NULL;
4854 tc->output = 0;
4855 tc->class = -1;
4856 tc->real_name = NULL;
4857 tc->subseg = 0;
4858 tc->align = 0;
4859 tc->size = NULL;
4860 tc->within = NULL;
4861
4862 if (ppc_stab_symbol)
4863 return;
4864
4865 s = strchr (S_GET_NAME (sym), '[');
4866 if (s == (const char *) NULL)
4867 {
4868 /* There is no suffix. */
4869 return;
4870 }
4871
4872 ++s;
4873
4874 switch (s[0])
4875 {
4876 case 'B':
4877 if (strcmp (s, "BS]") == 0)
4878 tc->class = XMC_BS;
4879 break;
4880 case 'D':
4881 if (strcmp (s, "DB]") == 0)
4882 tc->class = XMC_DB;
4883 else if (strcmp (s, "DS]") == 0)
4884 tc->class = XMC_DS;
4885 break;
4886 case 'G':
4887 if (strcmp (s, "GL]") == 0)
4888 tc->class = XMC_GL;
4889 break;
4890 case 'P':
4891 if (strcmp (s, "PR]") == 0)
4892 tc->class = XMC_PR;
4893 break;
4894 case 'R':
4895 if (strcmp (s, "RO]") == 0)
4896 tc->class = XMC_RO;
4897 else if (strcmp (s, "RW]") == 0)
4898 tc->class = XMC_RW;
4899 break;
4900 case 'S':
4901 if (strcmp (s, "SV]") == 0)
4902 tc->class = XMC_SV;
4903 break;
4904 case 'T':
4905 if (strcmp (s, "TC]") == 0)
4906 tc->class = XMC_TC;
4907 else if (strcmp (s, "TI]") == 0)
4908 tc->class = XMC_TI;
4909 else if (strcmp (s, "TB]") == 0)
4910 tc->class = XMC_TB;
4911 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
4912 tc->class = XMC_TC0;
4913 break;
4914 case 'U':
4915 if (strcmp (s, "UA]") == 0)
4916 tc->class = XMC_UA;
4917 else if (strcmp (s, "UC]") == 0)
4918 tc->class = XMC_UC;
4919 break;
4920 case 'X':
4921 if (strcmp (s, "XO]") == 0)
4922 tc->class = XMC_XO;
4923 break;
4924 }
4925
4926 if (tc->class == -1)
4927 as_bad (_("Unrecognized symbol suffix"));
4928 }
4929
4930 /* Set the class of a label based on where it is defined. This
4931 handles symbols without suffixes. Also, move the symbol so that it
4932 follows the csect symbol. */
4933
4934 void
4935 ppc_frob_label (symbolS *sym)
4936 {
4937 if (ppc_current_csect != (symbolS *) NULL)
4938 {
4939 if (symbol_get_tc (sym)->class == -1)
4940 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
4941
4942 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4943 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4944 &symbol_rootP, &symbol_lastP);
4945 symbol_get_tc (ppc_current_csect)->within = sym;
4946 }
4947
4948 #ifdef OBJ_ELF
4949 dwarf2_emit_label (sym);
4950 #endif
4951 }
4952
4953 /* This variable is set by ppc_frob_symbol if any absolute symbols are
4954 seen. It tells ppc_adjust_symtab whether it needs to look through
4955 the symbols. */
4956
4957 static bfd_boolean ppc_saw_abs;
4958
4959 /* Change the name of a symbol just before writing it out. Set the
4960 real name if the .rename pseudo-op was used. Otherwise, remove any
4961 class suffix. Return 1 if the symbol should not be included in the
4962 symbol table. */
4963
4964 int
4965 ppc_frob_symbol (symbolS *sym)
4966 {
4967 static symbolS *ppc_last_function;
4968 static symbolS *set_end;
4969
4970 /* Discard symbols that should not be included in the output symbol
4971 table. */
4972 if (! symbol_used_in_reloc_p (sym)
4973 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
4974 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
4975 && ! symbol_get_tc (sym)->output
4976 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4977 return 1;
4978
4979 /* This one will disappear anyway. Don't make a csect sym for it. */
4980 if (sym == abs_section_sym)
4981 return 1;
4982
4983 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4984 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
4985 else
4986 {
4987 const char *name;
4988 const char *s;
4989
4990 name = S_GET_NAME (sym);
4991 s = strchr (name, '[');
4992 if (s != (char *) NULL)
4993 {
4994 unsigned int len;
4995 char *snew;
4996
4997 len = s - name;
4998 snew = xmalloc (len + 1);
4999 memcpy (snew, name, len);
5000 snew[len] = '\0';
5001
5002 S_SET_NAME (sym, snew);
5003 }
5004 }
5005
5006 if (set_end != (symbolS *) NULL)
5007 {
5008 SA_SET_SYM_ENDNDX (set_end, sym);
5009 set_end = NULL;
5010 }
5011
5012 if (SF_GET_FUNCTION (sym))
5013 {
5014 if (ppc_last_function != (symbolS *) NULL)
5015 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5016 ppc_last_function = sym;
5017 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
5018 {
5019 resolve_symbol_value (symbol_get_tc (sym)->size);
5020 SA_SET_SYM_FSIZE (sym,
5021 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
5022 }
5023 }
5024 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5025 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5026 {
5027 if (ppc_last_function == (symbolS *) NULL)
5028 as_bad (_(".ef with no preceding .function"));
5029 else
5030 {
5031 set_end = ppc_last_function;
5032 ppc_last_function = NULL;
5033
5034 /* We don't have a C_EFCN symbol, but we need to force the
5035 COFF backend to believe that it has seen one. */
5036 coff_last_function = NULL;
5037 }
5038 }
5039
5040 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5041 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5042 && S_GET_STORAGE_CLASS (sym) != C_FILE
5043 && S_GET_STORAGE_CLASS (sym) != C_FCN
5044 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5045 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5046 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5047 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5048 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5049 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5050 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5051
5052 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5053 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5054 {
5055 int i;
5056 union internal_auxent *a;
5057
5058 /* Create a csect aux. */
5059 i = S_GET_NUMBER_AUXILIARY (sym);
5060 S_SET_NUMBER_AUXILIARY (sym, i + 1);
5061 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5062 if (symbol_get_tc (sym)->class == XMC_TC0)
5063 {
5064 /* This is the TOC table. */
5065 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5066 a->x_csect.x_scnlen.l = 0;
5067 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5068 }
5069 else if (symbol_get_tc (sym)->subseg != 0)
5070 {
5071 /* This is a csect symbol. x_scnlen is the size of the
5072 csect. */
5073 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5074 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5075 S_GET_SEGMENT (sym))
5076 - S_GET_VALUE (sym));
5077 else
5078 {
5079 resolve_symbol_value (symbol_get_tc (sym)->next);
5080 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5081 - S_GET_VALUE (sym));
5082 }
5083 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5084 }
5085 else if (S_GET_SEGMENT (sym) == bss_section)
5086 {
5087 /* This is a common symbol. */
5088 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5089 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
5090 if (S_IS_EXTERNAL (sym))
5091 symbol_get_tc (sym)->class = XMC_RW;
5092 else
5093 symbol_get_tc (sym)->class = XMC_BS;
5094 }
5095 else if (S_GET_SEGMENT (sym) == absolute_section)
5096 {
5097 /* This is an absolute symbol. The csect will be created by
5098 ppc_adjust_symtab. */
5099 ppc_saw_abs = TRUE;
5100 a->x_csect.x_smtyp = XTY_LD;
5101 if (symbol_get_tc (sym)->class == -1)
5102 symbol_get_tc (sym)->class = XMC_XO;
5103 }
5104 else if (! S_IS_DEFINED (sym))
5105 {
5106 /* This is an external symbol. */
5107 a->x_csect.x_scnlen.l = 0;
5108 a->x_csect.x_smtyp = XTY_ER;
5109 }
5110 else if (symbol_get_tc (sym)->class == XMC_TC)
5111 {
5112 symbolS *next;
5113
5114 /* This is a TOC definition. x_scnlen is the size of the
5115 TOC entry. */
5116 next = symbol_next (sym);
5117 while (symbol_get_tc (next)->class == XMC_TC0)
5118 next = symbol_next (next);
5119 if (next == (symbolS *) NULL
5120 || symbol_get_tc (next)->class != XMC_TC)
5121 {
5122 if (ppc_after_toc_frag == (fragS *) NULL)
5123 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5124 data_section)
5125 - S_GET_VALUE (sym));
5126 else
5127 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5128 - S_GET_VALUE (sym));
5129 }
5130 else
5131 {
5132 resolve_symbol_value (next);
5133 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5134 - S_GET_VALUE (sym));
5135 }
5136 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5137 }
5138 else
5139 {
5140 symbolS *csect;
5141
5142 /* This is a normal symbol definition. x_scnlen is the
5143 symbol index of the containing csect. */
5144 if (S_GET_SEGMENT (sym) == text_section)
5145 csect = ppc_text_csects;
5146 else if (S_GET_SEGMENT (sym) == data_section)
5147 csect = ppc_data_csects;
5148 else
5149 abort ();
5150
5151 /* Skip the initial dummy symbol. */
5152 csect = symbol_get_tc (csect)->next;
5153
5154 if (csect == (symbolS *) NULL)
5155 {
5156 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5157 a->x_csect.x_scnlen.l = 0;
5158 }
5159 else
5160 {
5161 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
5162 {
5163 resolve_symbol_value (symbol_get_tc (csect)->next);
5164 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5165 > S_GET_VALUE (sym))
5166 break;
5167 csect = symbol_get_tc (csect)->next;
5168 }
5169
5170 a->x_csect.x_scnlen.p =
5171 coffsymbol (symbol_get_bfdsym (csect))->native;
5172 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5173 1;
5174 }
5175 a->x_csect.x_smtyp = XTY_LD;
5176 }
5177
5178 a->x_csect.x_parmhash = 0;
5179 a->x_csect.x_snhash = 0;
5180 if (symbol_get_tc (sym)->class == -1)
5181 a->x_csect.x_smclas = XMC_PR;
5182 else
5183 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
5184 a->x_csect.x_stab = 0;
5185 a->x_csect.x_snstab = 0;
5186
5187 /* Don't let the COFF backend resort these symbols. */
5188 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
5189 }
5190 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5191 {
5192 /* We want the value to be the symbol index of the referenced
5193 csect symbol. BFD will do that for us if we set the right
5194 flags. */
5195 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5196 combined_entry_type *c = coffsymbol (bsym)->native;
5197
5198 S_SET_VALUE (sym, (valueT) (size_t) c);
5199 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
5200 }
5201 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5202 {
5203 symbolS *block;
5204 symbolS *csect;
5205
5206 /* The value is the offset from the enclosing csect. */
5207 block = symbol_get_tc (sym)->within;
5208 csect = symbol_get_tc (block)->within;
5209 resolve_symbol_value (csect);
5210 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5211 }
5212 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5213 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5214 {
5215 /* We want the value to be a file offset into the line numbers.
5216 BFD will do that for us if we set the right flags. We have
5217 already set the value correctly. */
5218 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
5219 }
5220
5221 return 0;
5222 }
5223
5224 /* Adjust the symbol table. This creates csect symbols for all
5225 absolute symbols. */
5226
5227 void
5228 ppc_adjust_symtab (void)
5229 {
5230 symbolS *sym;
5231
5232 if (! ppc_saw_abs)
5233 return;
5234
5235 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5236 {
5237 symbolS *csect;
5238 int i;
5239 union internal_auxent *a;
5240
5241 if (S_GET_SEGMENT (sym) != absolute_section)
5242 continue;
5243
5244 csect = symbol_create (".abs[XO]", absolute_section,
5245 S_GET_VALUE (sym), &zero_address_frag);
5246 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
5247 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5248 i = S_GET_NUMBER_AUXILIARY (csect);
5249 S_SET_NUMBER_AUXILIARY (csect, i + 1);
5250 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
5251 a->x_csect.x_scnlen.l = 0;
5252 a->x_csect.x_smtyp = XTY_SD;
5253 a->x_csect.x_parmhash = 0;
5254 a->x_csect.x_snhash = 0;
5255 a->x_csect.x_smclas = XMC_XO;
5256 a->x_csect.x_stab = 0;
5257 a->x_csect.x_snstab = 0;
5258
5259 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5260
5261 i = S_GET_NUMBER_AUXILIARY (sym);
5262 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5263 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5264 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
5265 }
5266
5267 ppc_saw_abs = FALSE;
5268 }
5269
5270 /* Set the VMA for a section. This is called on all the sections in
5271 turn. */
5272
5273 void
5274 ppc_frob_section (asection *sec)
5275 {
5276 static bfd_vma vma = 0;
5277
5278 vma = md_section_align (sec, vma);
5279 bfd_set_section_vma (stdoutput, sec, vma);
5280 vma += bfd_section_size (stdoutput, sec);
5281 }
5282
5283 #endif /* OBJ_XCOFF */
5284 \f
5285 char *
5286 md_atof (int type, char *litp, int *sizep)
5287 {
5288 return ieee_md_atof (type, litp, sizep, target_big_endian);
5289 }
5290
5291 /* Write a value out to the object file, using the appropriate
5292 endianness. */
5293
5294 void
5295 md_number_to_chars (char *buf, valueT val, int n)
5296 {
5297 if (target_big_endian)
5298 number_to_chars_bigendian (buf, val, n);
5299 else
5300 number_to_chars_littleendian (buf, val, n);
5301 }
5302
5303 /* Align a section (I don't know why this is machine dependent). */
5304
5305 valueT
5306 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
5307 {
5308 #ifdef OBJ_ELF
5309 return addr;
5310 #else
5311 int align = bfd_get_section_alignment (stdoutput, seg);
5312
5313 return ((addr + (1 << align) - 1) & (-1 << align));
5314 #endif
5315 }
5316
5317 /* We don't have any form of relaxing. */
5318
5319 int
5320 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5321 asection *seg ATTRIBUTE_UNUSED)
5322 {
5323 abort ();
5324 return 0;
5325 }
5326
5327 /* Convert a machine dependent frag. We never generate these. */
5328
5329 void
5330 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5331 asection *sec ATTRIBUTE_UNUSED,
5332 fragS *fragp ATTRIBUTE_UNUSED)
5333 {
5334 abort ();
5335 }
5336
5337 /* We have no need to default values of symbols. */
5338
5339 symbolS *
5340 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
5341 {
5342 return 0;
5343 }
5344 \f
5345 /* Functions concerning relocs. */
5346
5347 /* The location from which a PC relative jump should be calculated,
5348 given a PC relative reloc. */
5349
5350 long
5351 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
5352 {
5353 return fixp->fx_frag->fr_address + fixp->fx_where;
5354 }
5355
5356 #ifdef OBJ_XCOFF
5357
5358 /* This is called to see whether a fixup should be adjusted to use a
5359 section symbol. We take the opportunity to change a fixup against
5360 a symbol in the TOC subsegment into a reloc against the
5361 corresponding .tc symbol. */
5362
5363 int
5364 ppc_fix_adjustable (fixS *fix)
5365 {
5366 valueT val = resolve_symbol_value (fix->fx_addsy);
5367 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5368 TC_SYMFIELD_TYPE *tc;
5369
5370 if (symseg == absolute_section)
5371 return 0;
5372
5373 if (ppc_toc_csect != (symbolS *) NULL
5374 && fix->fx_addsy != ppc_toc_csect
5375 && symseg == data_section
5376 && val >= ppc_toc_frag->fr_address
5377 && (ppc_after_toc_frag == (fragS *) NULL
5378 || val < ppc_after_toc_frag->fr_address))
5379 {
5380 symbolS *sy;
5381
5382 for (sy = symbol_next (ppc_toc_csect);
5383 sy != (symbolS *) NULL;
5384 sy = symbol_next (sy))
5385 {
5386 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5387
5388 if (sy_tc->class == XMC_TC0)
5389 continue;
5390 if (sy_tc->class != XMC_TC)
5391 break;
5392 if (val == resolve_symbol_value (sy))
5393 {
5394 fix->fx_addsy = sy;
5395 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5396 return 0;
5397 }
5398 }
5399
5400 as_bad_where (fix->fx_file, fix->fx_line,
5401 _("symbol in .toc does not match any .tc"));
5402 }
5403
5404 /* Possibly adjust the reloc to be against the csect. */
5405 tc = symbol_get_tc (fix->fx_addsy);
5406 if (tc->subseg == 0
5407 && tc->class != XMC_TC0
5408 && tc->class != XMC_TC
5409 && symseg != bss_section
5410 /* Don't adjust if this is a reloc in the toc section. */
5411 && (symseg != data_section
5412 || ppc_toc_csect == NULL
5413 || val < ppc_toc_frag->fr_address
5414 || (ppc_after_toc_frag != NULL
5415 && val >= ppc_after_toc_frag->fr_address)))
5416 {
5417 symbolS *csect;
5418 symbolS *next_csect;
5419
5420 if (symseg == text_section)
5421 csect = ppc_text_csects;
5422 else if (symseg == data_section)
5423 csect = ppc_data_csects;
5424 else
5425 abort ();
5426
5427 /* Skip the initial dummy symbol. */
5428 csect = symbol_get_tc (csect)->next;
5429
5430 if (csect != (symbolS *) NULL)
5431 {
5432 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5433 && (symbol_get_frag (next_csect)->fr_address <= val))
5434 {
5435 /* If the csect address equals the symbol value, then we
5436 have to look through the full symbol table to see
5437 whether this is the csect we want. Note that we will
5438 only get here if the csect has zero length. */
5439 if (symbol_get_frag (csect)->fr_address == val
5440 && S_GET_VALUE (csect) == val)
5441 {
5442 symbolS *scan;
5443
5444 for (scan = symbol_next (csect);
5445 scan != NULL;
5446 scan = symbol_next (scan))
5447 {
5448 if (symbol_get_tc (scan)->subseg != 0)
5449 break;
5450 if (scan == fix->fx_addsy)
5451 break;
5452 }
5453
5454 /* If we found the symbol before the next csect
5455 symbol, then this is the csect we want. */
5456 if (scan == fix->fx_addsy)
5457 break;
5458 }
5459
5460 csect = next_csect;
5461 }
5462
5463 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
5464 fix->fx_addsy = csect;
5465 }
5466 return 0;
5467 }
5468
5469 /* Adjust a reloc against a .lcomm symbol to be against the base
5470 .lcomm. */
5471 if (symseg == bss_section
5472 && ! S_IS_EXTERNAL (fix->fx_addsy))
5473 {
5474 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5475
5476 fix->fx_offset += val - resolve_symbol_value (sy);
5477 fix->fx_addsy = sy;
5478 }
5479
5480 return 0;
5481 }
5482
5483 /* A reloc from one csect to another must be kept. The assembler
5484 will, of course, keep relocs between sections, and it will keep
5485 absolute relocs, but we need to force it to keep PC relative relocs
5486 between two csects in the same section. */
5487
5488 int
5489 ppc_force_relocation (fixS *fix)
5490 {
5491 /* At this point fix->fx_addsy should already have been converted to
5492 a csect symbol. If the csect does not include the fragment, then
5493 we need to force the relocation. */
5494 if (fix->fx_pcrel
5495 && fix->fx_addsy != NULL
5496 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5497 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5498 > fix->fx_frag->fr_address)
5499 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5500 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
5501 <= fix->fx_frag->fr_address))))
5502 return 1;
5503
5504 return generic_force_reloc (fix);
5505 }
5506
5507 #endif /* OBJ_XCOFF */
5508
5509 #ifdef OBJ_ELF
5510 /* If this function returns non-zero, it guarantees that a relocation
5511 will be emitted for a fixup. */
5512
5513 int
5514 ppc_force_relocation (fixS *fix)
5515 {
5516 /* Branch prediction relocations must force a relocation, as must
5517 the vtable description relocs. */
5518 switch (fix->fx_r_type)
5519 {
5520 case BFD_RELOC_PPC_B16_BRTAKEN:
5521 case BFD_RELOC_PPC_B16_BRNTAKEN:
5522 case BFD_RELOC_PPC_BA16_BRTAKEN:
5523 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5524 case BFD_RELOC_24_PLT_PCREL:
5525 case BFD_RELOC_PPC64_TOC:
5526 return 1;
5527 default:
5528 break;
5529 }
5530
5531 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5532 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5533 return 1;
5534
5535 return generic_force_reloc (fix);
5536 }
5537
5538 int
5539 ppc_fix_adjustable (fixS *fix)
5540 {
5541 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5542 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5543 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5544 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5545 && fix->fx_r_type != BFD_RELOC_GPREL16
5546 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5547 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
5548 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
5549 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
5550 }
5551 #endif
5552
5553 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5554 rs_align_code frag. */
5555
5556 void
5557 ppc_handle_align (struct frag *fragP)
5558 {
5559 valueT count = (fragP->fr_next->fr_address
5560 - (fragP->fr_address + fragP->fr_fix));
5561
5562 if (count != 0 && (count & 3) == 0)
5563 {
5564 char *dest = fragP->fr_literal + fragP->fr_fix;
5565
5566 fragP->fr_var = 4;
5567 md_number_to_chars (dest, 0x60000000, 4);
5568
5569 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5570 {
5571 /* For power6, we want the last nop to be a group terminating
5572 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5573 immediately after this one, with its address set to the last
5574 nop location. This will automatically reduce the number of
5575 nops in the current frag by one. */
5576 if (count > 4)
5577 {
5578 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5579
5580 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5581 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5582 group_nop->fr_fix = 0;
5583 group_nop->fr_offset = 1;
5584 group_nop->fr_type = rs_fill;
5585 fragP->fr_next = group_nop;
5586 dest = group_nop->fr_literal;
5587 }
5588
5589 md_number_to_chars (dest, 0x60210000, 4);
5590 }
5591 }
5592 }
5593
5594 /* Apply a fixup to the object code. This is called for all the
5595 fixups we generated by the call to fix_new_exp, above. In the call
5596 above we used a reloc code which was the largest legal reloc code
5597 plus the operand index. Here we undo that to recover the operand
5598 index. At this point all symbol values should be fully resolved,
5599 and we attempt to completely resolve the reloc. If we can not do
5600 that, we determine the correct reloc code and put it back in the
5601 fixup. */
5602
5603 void
5604 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
5605 {
5606 valueT value = * valP;
5607
5608 #ifdef OBJ_ELF
5609 if (fixP->fx_addsy != NULL)
5610 {
5611 /* Hack around bfd_install_relocation brain damage. */
5612 if (fixP->fx_pcrel)
5613 value += fixP->fx_frag->fr_address + fixP->fx_where;
5614 }
5615 else
5616 fixP->fx_done = 1;
5617 #else
5618 /* FIXME FIXME FIXME: The value we are passed in *valP includes
5619 the symbol values. If we are doing this relocation the code in
5620 write.c is going to call bfd_install_relocation, which is also
5621 going to use the symbol value. That means that if the reloc is
5622 fully resolved we want to use *valP since bfd_install_relocation is
5623 not being used.
5624 However, if the reloc is not fully resolved we do not want to use
5625 *valP, and must use fx_offset instead. However, if the reloc
5626 is PC relative, we do want to use *valP since it includes the
5627 result of md_pcrel_from. This is confusing. */
5628 if (fixP->fx_addsy == (symbolS *) NULL)
5629 fixP->fx_done = 1;
5630
5631 else if (fixP->fx_pcrel)
5632 ;
5633
5634 else
5635 value = fixP->fx_offset;
5636 #endif
5637
5638 if (fixP->fx_subsy != (symbolS *) NULL)
5639 {
5640 /* We can't actually support subtracting a symbol. */
5641 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
5642 }
5643
5644 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
5645 {
5646 int opindex;
5647 const struct powerpc_operand *operand;
5648 char *where;
5649 unsigned long insn;
5650
5651 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
5652
5653 operand = &powerpc_operands[opindex];
5654
5655 #ifdef OBJ_XCOFF
5656 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5657 does not generate a reloc. It uses the offset of `sym' within its
5658 csect. Other usages, such as `.long sym', generate relocs. This
5659 is the documented behaviour of non-TOC symbols. */
5660 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5661 && (operand->bitm & 0xfff0) == 0xfff0
5662 && operand->shift == 0
5663 && (operand->insert == NULL || ppc_obj64)
5664 && fixP->fx_addsy != NULL
5665 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5666 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5667 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5668 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
5669 {
5670 value = fixP->fx_offset;
5671 fixP->fx_done = 1;
5672 }
5673 #endif
5674
5675 /* Fetch the instruction, insert the fully resolved operand
5676 value, and stuff the instruction back again. */
5677 where = fixP->fx_frag->fr_literal + fixP->fx_where;
5678 if (target_big_endian)
5679 insn = bfd_getb32 ((unsigned char *) where);
5680 else
5681 insn = bfd_getl32 ((unsigned char *) where);
5682 insn = ppc_insert_operand (insn, operand, (offsetT) value,
5683 fixP->tc_fix_data.ppc_cpu,
5684 fixP->fx_file, fixP->fx_line);
5685 if (target_big_endian)
5686 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5687 else
5688 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5689
5690 if (fixP->fx_done)
5691 /* Nothing else to do here. */
5692 return;
5693
5694 assert (fixP->fx_addsy != NULL);
5695
5696 /* Determine a BFD reloc value based on the operand information.
5697 We are only prepared to turn a few of the operands into
5698 relocs. */
5699 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5700 && operand->bitm == 0x3fffffc
5701 && operand->shift == 0)
5702 fixP->fx_r_type = BFD_RELOC_PPC_B26;
5703 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5704 && operand->bitm == 0xfffc
5705 && operand->shift == 0)
5706 {
5707 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5708 #ifdef OBJ_XCOFF
5709 fixP->fx_size = 2;
5710 if (target_big_endian)
5711 fixP->fx_where += 2;
5712 #endif
5713 }
5714 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5715 && operand->bitm == 0x3fffffc
5716 && operand->shift == 0)
5717 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
5718 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5719 && operand->bitm == 0xfffc
5720 && operand->shift == 0)
5721 {
5722 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5723 #ifdef OBJ_XCOFF
5724 fixP->fx_size = 2;
5725 if (target_big_endian)
5726 fixP->fx_where += 2;
5727 #endif
5728 }
5729 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5730 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5731 && (operand->bitm & 0xfff0) == 0xfff0
5732 && operand->shift == 0)
5733 {
5734 if (ppc_is_toc_sym (fixP->fx_addsy))
5735 {
5736 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
5737 #ifdef OBJ_ELF
5738 if (ppc_obj64
5739 && (operand->flags & PPC_OPERAND_DS) != 0)
5740 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5741 #endif
5742 }
5743 else
5744 {
5745 fixP->fx_r_type = BFD_RELOC_16;
5746 #ifdef OBJ_ELF
5747 if (ppc_obj64
5748 && (operand->flags & PPC_OPERAND_DS) != 0)
5749 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
5750 #endif
5751 }
5752 fixP->fx_size = 2;
5753 if (target_big_endian)
5754 fixP->fx_where += 2;
5755 }
5756 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5757 else
5758 {
5759 char *sfile;
5760 unsigned int sline;
5761
5762 /* Use expr_symbol_where to see if this is an expression
5763 symbol. */
5764 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5765 as_bad_where (fixP->fx_file, fixP->fx_line,
5766 _("unresolved expression that must be resolved"));
5767 else
5768 as_bad_where (fixP->fx_file, fixP->fx_line,
5769 _("unsupported relocation against %s"),
5770 S_GET_NAME (fixP->fx_addsy));
5771 fixP->fx_done = 1;
5772 return;
5773 }
5774 }
5775 else
5776 {
5777 #ifdef OBJ_ELF
5778 ppc_elf_validate_fix (fixP, seg);
5779 #endif
5780 switch (fixP->fx_r_type)
5781 {
5782 case BFD_RELOC_CTOR:
5783 if (ppc_obj64)
5784 goto ctor64;
5785 /* fall through */
5786
5787 case BFD_RELOC_32:
5788 if (fixP->fx_pcrel)
5789 fixP->fx_r_type = BFD_RELOC_32_PCREL;
5790 /* fall through */
5791
5792 case BFD_RELOC_RVA:
5793 case BFD_RELOC_32_PCREL:
5794 case BFD_RELOC_PPC_EMB_NADDR32:
5795 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5796 value, 4);
5797 break;
5798
5799 case BFD_RELOC_64:
5800 ctor64:
5801 if (fixP->fx_pcrel)
5802 fixP->fx_r_type = BFD_RELOC_64_PCREL;
5803 /* fall through */
5804
5805 case BFD_RELOC_64_PCREL:
5806 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5807 value, 8);
5808 break;
5809
5810 case BFD_RELOC_GPREL16:
5811 case BFD_RELOC_16_GOT_PCREL:
5812 case BFD_RELOC_16_GOTOFF:
5813 case BFD_RELOC_LO16_GOTOFF:
5814 case BFD_RELOC_HI16_GOTOFF:
5815 case BFD_RELOC_HI16_S_GOTOFF:
5816 case BFD_RELOC_16_BASEREL:
5817 case BFD_RELOC_LO16_BASEREL:
5818 case BFD_RELOC_HI16_BASEREL:
5819 case BFD_RELOC_HI16_S_BASEREL:
5820 case BFD_RELOC_PPC_EMB_NADDR16:
5821 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5822 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5823 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5824 case BFD_RELOC_PPC_EMB_SDAI16:
5825 case BFD_RELOC_PPC_EMB_SDA2REL:
5826 case BFD_RELOC_PPC_EMB_SDA2I16:
5827 case BFD_RELOC_PPC_EMB_RELSEC16:
5828 case BFD_RELOC_PPC_EMB_RELST_LO:
5829 case BFD_RELOC_PPC_EMB_RELST_HI:
5830 case BFD_RELOC_PPC_EMB_RELST_HA:
5831 case BFD_RELOC_PPC_EMB_RELSDA:
5832 case BFD_RELOC_PPC_TOC16:
5833 #ifdef OBJ_ELF
5834 case BFD_RELOC_PPC64_TOC16_LO:
5835 case BFD_RELOC_PPC64_TOC16_HI:
5836 case BFD_RELOC_PPC64_TOC16_HA:
5837 #endif
5838 if (fixP->fx_pcrel)
5839 {
5840 if (fixP->fx_addsy != NULL)
5841 as_bad_where (fixP->fx_file, fixP->fx_line,
5842 _("cannot emit PC relative %s relocation against %s"),
5843 bfd_get_reloc_code_name (fixP->fx_r_type),
5844 S_GET_NAME (fixP->fx_addsy));
5845 else
5846 as_bad_where (fixP->fx_file, fixP->fx_line,
5847 _("cannot emit PC relative %s relocation"),
5848 bfd_get_reloc_code_name (fixP->fx_r_type));
5849 }
5850
5851 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5852 value, 2);
5853 break;
5854
5855 case BFD_RELOC_16:
5856 if (fixP->fx_pcrel)
5857 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5858 /* fall through */
5859
5860 case BFD_RELOC_16_PCREL:
5861 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5862 value, 2);
5863 break;
5864
5865 case BFD_RELOC_LO16:
5866 if (fixP->fx_pcrel)
5867 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5868 /* fall through */
5869
5870 case BFD_RELOC_LO16_PCREL:
5871 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5872 value, 2);
5873 break;
5874
5875 /* This case happens when you write, for example,
5876 lis %r3,(L1-L2)@ha
5877 where L1 and L2 are defined later. */
5878 case BFD_RELOC_HI16:
5879 if (fixP->fx_pcrel)
5880 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5881 /* fall through */
5882
5883 case BFD_RELOC_HI16_PCREL:
5884 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5885 PPC_HI (value), 2);
5886 break;
5887
5888 case BFD_RELOC_HI16_S:
5889 if (fixP->fx_pcrel)
5890 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5891 /* fall through */
5892
5893 case BFD_RELOC_HI16_S_PCREL:
5894 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5895 PPC_HA (value), 2);
5896 break;
5897
5898 #ifdef OBJ_ELF
5899 case BFD_RELOC_PPC64_HIGHER:
5900 if (fixP->fx_pcrel)
5901 abort ();
5902 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5903 PPC_HIGHER (value), 2);
5904 break;
5905
5906 case BFD_RELOC_PPC64_HIGHER_S:
5907 if (fixP->fx_pcrel)
5908 abort ();
5909 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5910 PPC_HIGHERA (value), 2);
5911 break;
5912
5913 case BFD_RELOC_PPC64_HIGHEST:
5914 if (fixP->fx_pcrel)
5915 abort ();
5916 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5917 PPC_HIGHEST (value), 2);
5918 break;
5919
5920 case BFD_RELOC_PPC64_HIGHEST_S:
5921 if (fixP->fx_pcrel)
5922 abort ();
5923 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5924 PPC_HIGHESTA (value), 2);
5925 break;
5926
5927 case BFD_RELOC_PPC64_ADDR16_DS:
5928 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5929 case BFD_RELOC_PPC64_GOT16_DS:
5930 case BFD_RELOC_PPC64_GOT16_LO_DS:
5931 case BFD_RELOC_PPC64_PLT16_LO_DS:
5932 case BFD_RELOC_PPC64_SECTOFF_DS:
5933 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5934 case BFD_RELOC_PPC64_TOC16_DS:
5935 case BFD_RELOC_PPC64_TOC16_LO_DS:
5936 case BFD_RELOC_PPC64_PLTGOT16_DS:
5937 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
5938 if (fixP->fx_pcrel)
5939 abort ();
5940 {
5941 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
5942 unsigned long val, mask;
5943
5944 if (target_big_endian)
5945 val = bfd_getb32 (where - 2);
5946 else
5947 val = bfd_getl32 (where);
5948 mask = 0xfffc;
5949 /* lq insns reserve the four lsbs. */
5950 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
5951 && (val & (0x3f << 26)) == (56u << 26))
5952 mask = 0xfff0;
5953 val |= value & mask;
5954 if (target_big_endian)
5955 bfd_putb16 ((bfd_vma) val, where);
5956 else
5957 bfd_putl16 ((bfd_vma) val, where);
5958 }
5959 break;
5960
5961 case BFD_RELOC_PPC_B16_BRTAKEN:
5962 case BFD_RELOC_PPC_B16_BRNTAKEN:
5963 case BFD_RELOC_PPC_BA16_BRTAKEN:
5964 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5965 break;
5966
5967 case BFD_RELOC_PPC_TLS:
5968 break;
5969
5970 case BFD_RELOC_PPC_DTPMOD:
5971 case BFD_RELOC_PPC_TPREL16:
5972 case BFD_RELOC_PPC_TPREL16_LO:
5973 case BFD_RELOC_PPC_TPREL16_HI:
5974 case BFD_RELOC_PPC_TPREL16_HA:
5975 case BFD_RELOC_PPC_TPREL:
5976 case BFD_RELOC_PPC_DTPREL16:
5977 case BFD_RELOC_PPC_DTPREL16_LO:
5978 case BFD_RELOC_PPC_DTPREL16_HI:
5979 case BFD_RELOC_PPC_DTPREL16_HA:
5980 case BFD_RELOC_PPC_DTPREL:
5981 case BFD_RELOC_PPC_GOT_TLSGD16:
5982 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5983 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5984 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5985 case BFD_RELOC_PPC_GOT_TLSLD16:
5986 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5987 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5988 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5989 case BFD_RELOC_PPC_GOT_TPREL16:
5990 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5991 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5992 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5993 case BFD_RELOC_PPC_GOT_DTPREL16:
5994 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5995 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5996 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5997 case BFD_RELOC_PPC64_TPREL16_DS:
5998 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5999 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6000 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6001 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6002 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6003 case BFD_RELOC_PPC64_DTPREL16_DS:
6004 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6005 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6006 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6007 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6008 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6009 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6010 break;
6011 #endif
6012 /* Because SDA21 modifies the register field, the size is set to 4
6013 bytes, rather than 2, so offset it here appropriately. */
6014 case BFD_RELOC_PPC_EMB_SDA21:
6015 if (fixP->fx_pcrel)
6016 abort ();
6017
6018 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
6019 + ((target_big_endian) ? 2 : 0),
6020 value, 2);
6021 break;
6022
6023 case BFD_RELOC_8:
6024 if (fixP->fx_pcrel)
6025 {
6026 /* This can occur if there is a bug in the input assembler, eg:
6027 ".byte <undefined_symbol> - ." */
6028 if (fixP->fx_addsy)
6029 as_bad (_("Unable to handle reference to symbol %s"),
6030 S_GET_NAME (fixP->fx_addsy));
6031 else
6032 as_bad (_("Unable to resolve expression"));
6033 fixP->fx_done = 1;
6034 }
6035 else
6036 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6037 value, 1);
6038 break;
6039
6040 case BFD_RELOC_24_PLT_PCREL:
6041 case BFD_RELOC_PPC_LOCAL24PC:
6042 if (!fixP->fx_pcrel && !fixP->fx_done)
6043 abort ();
6044
6045 if (fixP->fx_done)
6046 {
6047 char *where;
6048 unsigned long insn;
6049
6050 /* Fetch the instruction, insert the fully resolved operand
6051 value, and stuff the instruction back again. */
6052 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6053 if (target_big_endian)
6054 insn = bfd_getb32 ((unsigned char *) where);
6055 else
6056 insn = bfd_getl32 ((unsigned char *) where);
6057 if ((value & 3) != 0)
6058 as_bad_where (fixP->fx_file, fixP->fx_line,
6059 _("must branch to an address a multiple of 4"));
6060 if ((offsetT) value < -0x40000000
6061 || (offsetT) value >= 0x40000000)
6062 as_bad_where (fixP->fx_file, fixP->fx_line,
6063 _("@local or @plt branch destination is too far away, %ld bytes"),
6064 (long) value);
6065 insn = insn | (value & 0x03fffffc);
6066 if (target_big_endian)
6067 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6068 else
6069 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6070 }
6071 break;
6072
6073 case BFD_RELOC_VTABLE_INHERIT:
6074 fixP->fx_done = 0;
6075 if (fixP->fx_addsy
6076 && !S_IS_DEFINED (fixP->fx_addsy)
6077 && !S_IS_WEAK (fixP->fx_addsy))
6078 S_SET_WEAK (fixP->fx_addsy);
6079 break;
6080
6081 case BFD_RELOC_VTABLE_ENTRY:
6082 fixP->fx_done = 0;
6083 break;
6084
6085 #ifdef OBJ_ELF
6086 /* Generated by reference to `sym@tocbase'. The sym is
6087 ignored by the linker. */
6088 case BFD_RELOC_PPC64_TOC:
6089 fixP->fx_done = 0;
6090 break;
6091 #endif
6092 default:
6093 fprintf (stderr,
6094 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
6095 fflush (stderr);
6096 abort ();
6097 }
6098 }
6099
6100 #ifdef OBJ_ELF
6101 fixP->fx_addnumber = value;
6102
6103 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6104 from the section contents. If we are going to be emitting a reloc
6105 then the section contents are immaterial, so don't warn if they
6106 happen to overflow. Leave such warnings to ld. */
6107 if (!fixP->fx_done)
6108 fixP->fx_no_overflow = 1;
6109 #else
6110 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6111 fixP->fx_addnumber = 0;
6112 else
6113 {
6114 #ifdef TE_PE
6115 fixP->fx_addnumber = 0;
6116 #else
6117 /* We want to use the offset within the toc, not the actual VMA
6118 of the symbol. */
6119 fixP->fx_addnumber =
6120 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6121 - S_GET_VALUE (ppc_toc_csect);
6122 #endif
6123 }
6124 #endif
6125 }
6126
6127 /* Generate a reloc for a fixup. */
6128
6129 arelent *
6130 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
6131 {
6132 arelent *reloc;
6133
6134 reloc = (arelent *) xmalloc (sizeof (arelent));
6135
6136 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6137 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
6138 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6139 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6140 if (reloc->howto == (reloc_howto_type *) NULL)
6141 {
6142 as_bad_where (fixp->fx_file, fixp->fx_line,
6143 _("reloc %d not supported by object file format"),
6144 (int) fixp->fx_r_type);
6145 return NULL;
6146 }
6147 reloc->addend = fixp->fx_addnumber;
6148
6149 return reloc;
6150 }
6151
6152 void
6153 ppc_cfi_frame_initial_instructions (void)
6154 {
6155 cfi_add_CFA_def_cfa (1, 0);
6156 }
6157
6158 int
6159 tc_ppc_regname_to_dw2regnum (char *regname)
6160 {
6161 unsigned int regnum = -1;
6162 unsigned int i;
6163 const char *p;
6164 char *q;
6165 static struct { char *name; int dw2regnum; } regnames[] =
6166 {
6167 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6168 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
6169 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
6170 { "spe_acc", 111 }, { "spefscr", 112 }
6171 };
6172
6173 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6174 if (strcmp (regnames[i].name, regname) == 0)
6175 return regnames[i].dw2regnum;
6176
6177 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6178 {
6179 p = regname + 1 + (regname[1] == '.');
6180 regnum = strtoul (p, &q, 10);
6181 if (p == q || *q || regnum >= 32)
6182 return -1;
6183 if (regname[0] == 'f')
6184 regnum += 32;
6185 else if (regname[0] == 'v')
6186 regnum += 77;
6187 }
6188 else if (regname[0] == 'c' && regname[1] == 'r')
6189 {
6190 p = regname + 2 + (regname[2] == '.');
6191 if (p[0] < '0' || p[0] > '7' || p[1])
6192 return -1;
6193 regnum = p[0] - '0' + 68;
6194 }
6195 return regnum;
6196 }
GDB Binutils - Deliverables
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