1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2018 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian
;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian
= 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p
= TARGET_REG_NAMES_P
;
96 static void ppc_macro (char *, const struct powerpc_macro
*);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS
*, offsetT
);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
153 /* Generic assembler global variables which must be defined by all
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars
[] = "#!";
162 static const char ppc_eabi_comment_chars
[] = "#";
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
167 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
170 const char comment_chars
[] = "#";
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars
[] = "#";
176 /* Characters which may be used to separate multiple commands on a
178 const char line_separator_chars
[] = ";";
180 /* Characters which are used to indicate an exponent in a floating
182 const char EXP_CHARS
[] = "eE";
184 /* Characters which mean that a number is a floating point constant,
186 const char FLT_CHARS
[] = "dD";
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars
[] = "%[";
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment
;
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length
;
198 /* More than this number of nops in an alignment op gets a branch
200 unsigned long nop_limit
= 4;
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu
= 0;
205 ppc_cpu_t sticky
= 0;
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion
= 0;
211 /* Flags set on encountering toc relocs. */
213 has_large_toc_reloc
= 1,
214 has_small_toc_reloc
= 2
218 /* Warn on emitting data to code sections. */
224 /* The target specific pseudo-ops which we support. */
226 const pseudo_typeS md_pseudo_table
[] =
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte
, 0 },
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm
, 0 },
237 { "lcomm", ppc_comm
, 1 },
241 { "bi", ppc_biei
, 0 },
243 { "csect", ppc_csect
, 0 },
244 { "dwsect", ppc_dwsect
, 0 },
245 { "data", ppc_section
, 'd' },
249 { "ei", ppc_biei
, 1 },
251 { "extern", ppc_extern
, 0 },
252 { "function", ppc_function
, 0 },
253 { "lglobl", ppc_lglobl
, 0 },
254 { "ref", ppc_ref
, 0 },
255 { "rename", ppc_rename
, 0 },
256 { "section", ppc_named_section
, 0 },
257 { "stabx", ppc_stabx
, 0 },
258 { "text", ppc_section
, 't' },
259 { "toc", ppc_toc
, 0 },
260 { "long", ppc_xcoff_cons
, 2 },
261 { "llong", ppc_xcoff_cons
, 3 },
262 { "word", ppc_xcoff_cons
, 1 },
263 { "short", ppc_xcoff_cons
, 1 },
264 { "vbyte", ppc_vbyte
, 0 },
268 { "llong", cons
, 8 },
269 { "rdata", ppc_elf_rdata
, 0 },
270 { "rodata", ppc_elf_rdata
, 0 },
271 { "lcomm", ppc_elf_lcomm
, 0 },
272 { "localentry", ppc_elf_localentry
, 0 },
273 { "abiversion", ppc_elf_abiversion
, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous
, 0 },
280 { "pdata", ppc_pdata
, 0 },
281 { "ydata", ppc_ydata
, 0 },
282 { "reldata", ppc_reldata
, 0 },
283 { "rdata", ppc_rdata
, 0 },
284 { "ualong", ppc_ualong
, 0 },
285 { "znop", ppc_znop
, 0 },
286 { "comm", ppc_pe_comm
, 0 },
287 { "lcomm", ppc_pe_comm
, 1 },
288 { "section", ppc_pe_section
, 0 },
289 { "function", ppc_pe_function
,0 },
290 { "tocd", ppc_pe_tocd
, 0 },
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
295 { "machine", ppc_machine
, 0 },
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
306 /* Structure to hold information about predefined registers. */
310 unsigned short value
;
311 unsigned short flags
;
314 /* List of registers that are pre-defined:
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
339 dsisr has the value 18
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
345 The table is sorted. Suitable for searching by a binary search. */
347 static const struct pd_reg pre_defined_registers
[] =
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG
},
351 { "cr.1", 1, PPC_OPERAND_CR_REG
},
352 { "cr.2", 2, PPC_OPERAND_CR_REG
},
353 { "cr.3", 3, PPC_OPERAND_CR_REG
},
354 { "cr.4", 4, PPC_OPERAND_CR_REG
},
355 { "cr.5", 5, PPC_OPERAND_CR_REG
},
356 { "cr.6", 6, PPC_OPERAND_CR_REG
},
357 { "cr.7", 7, PPC_OPERAND_CR_REG
},
359 { "cr0", 0, PPC_OPERAND_CR_REG
},
360 { "cr1", 1, PPC_OPERAND_CR_REG
},
361 { "cr2", 2, PPC_OPERAND_CR_REG
},
362 { "cr3", 3, PPC_OPERAND_CR_REG
},
363 { "cr4", 4, PPC_OPERAND_CR_REG
},
364 { "cr5", 5, PPC_OPERAND_CR_REG
},
365 { "cr6", 6, PPC_OPERAND_CR_REG
},
366 { "cr7", 7, PPC_OPERAND_CR_REG
},
368 { "ctr", 9, PPC_OPERAND_SPR
},
369 { "dar", 19, PPC_OPERAND_SPR
},
370 { "dec", 22, PPC_OPERAND_SPR
},
371 { "dsisr", 18, PPC_OPERAND_SPR
},
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR
},
375 { "f.1", 1, PPC_OPERAND_FPR
},
376 { "f.10", 10, PPC_OPERAND_FPR
},
377 { "f.11", 11, PPC_OPERAND_FPR
},
378 { "f.12", 12, PPC_OPERAND_FPR
},
379 { "f.13", 13, PPC_OPERAND_FPR
},
380 { "f.14", 14, PPC_OPERAND_FPR
},
381 { "f.15", 15, PPC_OPERAND_FPR
},
382 { "f.16", 16, PPC_OPERAND_FPR
},
383 { "f.17", 17, PPC_OPERAND_FPR
},
384 { "f.18", 18, PPC_OPERAND_FPR
},
385 { "f.19", 19, PPC_OPERAND_FPR
},
386 { "f.2", 2, PPC_OPERAND_FPR
},
387 { "f.20", 20, PPC_OPERAND_FPR
},
388 { "f.21", 21, PPC_OPERAND_FPR
},
389 { "f.22", 22, PPC_OPERAND_FPR
},
390 { "f.23", 23, PPC_OPERAND_FPR
},
391 { "f.24", 24, PPC_OPERAND_FPR
},
392 { "f.25", 25, PPC_OPERAND_FPR
},
393 { "f.26", 26, PPC_OPERAND_FPR
},
394 { "f.27", 27, PPC_OPERAND_FPR
},
395 { "f.28", 28, PPC_OPERAND_FPR
},
396 { "f.29", 29, PPC_OPERAND_FPR
},
397 { "f.3", 3, PPC_OPERAND_FPR
},
398 { "f.30", 30, PPC_OPERAND_FPR
},
399 { "f.31", 31, PPC_OPERAND_FPR
},
400 { "f.32", 32, PPC_OPERAND_VSR
},
401 { "f.33", 33, PPC_OPERAND_VSR
},
402 { "f.34", 34, PPC_OPERAND_VSR
},
403 { "f.35", 35, PPC_OPERAND_VSR
},
404 { "f.36", 36, PPC_OPERAND_VSR
},
405 { "f.37", 37, PPC_OPERAND_VSR
},
406 { "f.38", 38, PPC_OPERAND_VSR
},
407 { "f.39", 39, PPC_OPERAND_VSR
},
408 { "f.4", 4, PPC_OPERAND_FPR
},
409 { "f.40", 40, PPC_OPERAND_VSR
},
410 { "f.41", 41, PPC_OPERAND_VSR
},
411 { "f.42", 42, PPC_OPERAND_VSR
},
412 { "f.43", 43, PPC_OPERAND_VSR
},
413 { "f.44", 44, PPC_OPERAND_VSR
},
414 { "f.45", 45, PPC_OPERAND_VSR
},
415 { "f.46", 46, PPC_OPERAND_VSR
},
416 { "f.47", 47, PPC_OPERAND_VSR
},
417 { "f.48", 48, PPC_OPERAND_VSR
},
418 { "f.49", 49, PPC_OPERAND_VSR
},
419 { "f.5", 5, PPC_OPERAND_FPR
},
420 { "f.50", 50, PPC_OPERAND_VSR
},
421 { "f.51", 51, PPC_OPERAND_VSR
},
422 { "f.52", 52, PPC_OPERAND_VSR
},
423 { "f.53", 53, PPC_OPERAND_VSR
},
424 { "f.54", 54, PPC_OPERAND_VSR
},
425 { "f.55", 55, PPC_OPERAND_VSR
},
426 { "f.56", 56, PPC_OPERAND_VSR
},
427 { "f.57", 57, PPC_OPERAND_VSR
},
428 { "f.58", 58, PPC_OPERAND_VSR
},
429 { "f.59", 59, PPC_OPERAND_VSR
},
430 { "f.6", 6, PPC_OPERAND_FPR
},
431 { "f.60", 60, PPC_OPERAND_VSR
},
432 { "f.61", 61, PPC_OPERAND_VSR
},
433 { "f.62", 62, PPC_OPERAND_VSR
},
434 { "f.63", 63, PPC_OPERAND_VSR
},
435 { "f.7", 7, PPC_OPERAND_FPR
},
436 { "f.8", 8, PPC_OPERAND_FPR
},
437 { "f.9", 9, PPC_OPERAND_FPR
},
439 { "f0", 0, PPC_OPERAND_FPR
},
440 { "f1", 1, PPC_OPERAND_FPR
},
441 { "f10", 10, PPC_OPERAND_FPR
},
442 { "f11", 11, PPC_OPERAND_FPR
},
443 { "f12", 12, PPC_OPERAND_FPR
},
444 { "f13", 13, PPC_OPERAND_FPR
},
445 { "f14", 14, PPC_OPERAND_FPR
},
446 { "f15", 15, PPC_OPERAND_FPR
},
447 { "f16", 16, PPC_OPERAND_FPR
},
448 { "f17", 17, PPC_OPERAND_FPR
},
449 { "f18", 18, PPC_OPERAND_FPR
},
450 { "f19", 19, PPC_OPERAND_FPR
},
451 { "f2", 2, PPC_OPERAND_FPR
},
452 { "f20", 20, PPC_OPERAND_FPR
},
453 { "f21", 21, PPC_OPERAND_FPR
},
454 { "f22", 22, PPC_OPERAND_FPR
},
455 { "f23", 23, PPC_OPERAND_FPR
},
456 { "f24", 24, PPC_OPERAND_FPR
},
457 { "f25", 25, PPC_OPERAND_FPR
},
458 { "f26", 26, PPC_OPERAND_FPR
},
459 { "f27", 27, PPC_OPERAND_FPR
},
460 { "f28", 28, PPC_OPERAND_FPR
},
461 { "f29", 29, PPC_OPERAND_FPR
},
462 { "f3", 3, PPC_OPERAND_FPR
},
463 { "f30", 30, PPC_OPERAND_FPR
},
464 { "f31", 31, PPC_OPERAND_FPR
},
465 { "f32", 32, PPC_OPERAND_VSR
},
466 { "f33", 33, PPC_OPERAND_VSR
},
467 { "f34", 34, PPC_OPERAND_VSR
},
468 { "f35", 35, PPC_OPERAND_VSR
},
469 { "f36", 36, PPC_OPERAND_VSR
},
470 { "f37", 37, PPC_OPERAND_VSR
},
471 { "f38", 38, PPC_OPERAND_VSR
},
472 { "f39", 39, PPC_OPERAND_VSR
},
473 { "f4", 4, PPC_OPERAND_FPR
},
474 { "f40", 40, PPC_OPERAND_VSR
},
475 { "f41", 41, PPC_OPERAND_VSR
},
476 { "f42", 42, PPC_OPERAND_VSR
},
477 { "f43", 43, PPC_OPERAND_VSR
},
478 { "f44", 44, PPC_OPERAND_VSR
},
479 { "f45", 45, PPC_OPERAND_VSR
},
480 { "f46", 46, PPC_OPERAND_VSR
},
481 { "f47", 47, PPC_OPERAND_VSR
},
482 { "f48", 48, PPC_OPERAND_VSR
},
483 { "f49", 49, PPC_OPERAND_VSR
},
484 { "f5", 5, PPC_OPERAND_FPR
},
485 { "f50", 50, PPC_OPERAND_VSR
},
486 { "f51", 51, PPC_OPERAND_VSR
},
487 { "f52", 52, PPC_OPERAND_VSR
},
488 { "f53", 53, PPC_OPERAND_VSR
},
489 { "f54", 54, PPC_OPERAND_VSR
},
490 { "f55", 55, PPC_OPERAND_VSR
},
491 { "f56", 56, PPC_OPERAND_VSR
},
492 { "f57", 57, PPC_OPERAND_VSR
},
493 { "f58", 58, PPC_OPERAND_VSR
},
494 { "f59", 59, PPC_OPERAND_VSR
},
495 { "f6", 6, PPC_OPERAND_FPR
},
496 { "f60", 60, PPC_OPERAND_VSR
},
497 { "f61", 61, PPC_OPERAND_VSR
},
498 { "f62", 62, PPC_OPERAND_VSR
},
499 { "f63", 63, PPC_OPERAND_VSR
},
500 { "f7", 7, PPC_OPERAND_FPR
},
501 { "f8", 8, PPC_OPERAND_FPR
},
502 { "f9", 9, PPC_OPERAND_FPR
},
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR
},
506 { "gqr.1", 1, PPC_OPERAND_GQR
},
507 { "gqr.2", 2, PPC_OPERAND_GQR
},
508 { "gqr.3", 3, PPC_OPERAND_GQR
},
509 { "gqr.4", 4, PPC_OPERAND_GQR
},
510 { "gqr.5", 5, PPC_OPERAND_GQR
},
511 { "gqr.6", 6, PPC_OPERAND_GQR
},
512 { "gqr.7", 7, PPC_OPERAND_GQR
},
513 { "gqr0", 0, PPC_OPERAND_GQR
},
514 { "gqr1", 1, PPC_OPERAND_GQR
},
515 { "gqr2", 2, PPC_OPERAND_GQR
},
516 { "gqr3", 3, PPC_OPERAND_GQR
},
517 { "gqr4", 4, PPC_OPERAND_GQR
},
518 { "gqr5", 5, PPC_OPERAND_GQR
},
519 { "gqr6", 6, PPC_OPERAND_GQR
},
520 { "gqr7", 7, PPC_OPERAND_GQR
},
522 { "lr", 8, PPC_OPERAND_SPR
},
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR
},
526 { "r.1", 1, PPC_OPERAND_GPR
},
527 { "r.10", 10, PPC_OPERAND_GPR
},
528 { "r.11", 11, PPC_OPERAND_GPR
},
529 { "r.12", 12, PPC_OPERAND_GPR
},
530 { "r.13", 13, PPC_OPERAND_GPR
},
531 { "r.14", 14, PPC_OPERAND_GPR
},
532 { "r.15", 15, PPC_OPERAND_GPR
},
533 { "r.16", 16, PPC_OPERAND_GPR
},
534 { "r.17", 17, PPC_OPERAND_GPR
},
535 { "r.18", 18, PPC_OPERAND_GPR
},
536 { "r.19", 19, PPC_OPERAND_GPR
},
537 { "r.2", 2, PPC_OPERAND_GPR
},
538 { "r.20", 20, PPC_OPERAND_GPR
},
539 { "r.21", 21, PPC_OPERAND_GPR
},
540 { "r.22", 22, PPC_OPERAND_GPR
},
541 { "r.23", 23, PPC_OPERAND_GPR
},
542 { "r.24", 24, PPC_OPERAND_GPR
},
543 { "r.25", 25, PPC_OPERAND_GPR
},
544 { "r.26", 26, PPC_OPERAND_GPR
},
545 { "r.27", 27, PPC_OPERAND_GPR
},
546 { "r.28", 28, PPC_OPERAND_GPR
},
547 { "r.29", 29, PPC_OPERAND_GPR
},
548 { "r.3", 3, PPC_OPERAND_GPR
},
549 { "r.30", 30, PPC_OPERAND_GPR
},
550 { "r.31", 31, PPC_OPERAND_GPR
},
551 { "r.4", 4, PPC_OPERAND_GPR
},
552 { "r.5", 5, PPC_OPERAND_GPR
},
553 { "r.6", 6, PPC_OPERAND_GPR
},
554 { "r.7", 7, PPC_OPERAND_GPR
},
555 { "r.8", 8, PPC_OPERAND_GPR
},
556 { "r.9", 9, PPC_OPERAND_GPR
},
558 { "r.sp", 1, PPC_OPERAND_GPR
},
560 { "r.toc", 2, PPC_OPERAND_GPR
},
562 { "r0", 0, PPC_OPERAND_GPR
},
563 { "r1", 1, PPC_OPERAND_GPR
},
564 { "r10", 10, PPC_OPERAND_GPR
},
565 { "r11", 11, PPC_OPERAND_GPR
},
566 { "r12", 12, PPC_OPERAND_GPR
},
567 { "r13", 13, PPC_OPERAND_GPR
},
568 { "r14", 14, PPC_OPERAND_GPR
},
569 { "r15", 15, PPC_OPERAND_GPR
},
570 { "r16", 16, PPC_OPERAND_GPR
},
571 { "r17", 17, PPC_OPERAND_GPR
},
572 { "r18", 18, PPC_OPERAND_GPR
},
573 { "r19", 19, PPC_OPERAND_GPR
},
574 { "r2", 2, PPC_OPERAND_GPR
},
575 { "r20", 20, PPC_OPERAND_GPR
},
576 { "r21", 21, PPC_OPERAND_GPR
},
577 { "r22", 22, PPC_OPERAND_GPR
},
578 { "r23", 23, PPC_OPERAND_GPR
},
579 { "r24", 24, PPC_OPERAND_GPR
},
580 { "r25", 25, PPC_OPERAND_GPR
},
581 { "r26", 26, PPC_OPERAND_GPR
},
582 { "r27", 27, PPC_OPERAND_GPR
},
583 { "r28", 28, PPC_OPERAND_GPR
},
584 { "r29", 29, PPC_OPERAND_GPR
},
585 { "r3", 3, PPC_OPERAND_GPR
},
586 { "r30", 30, PPC_OPERAND_GPR
},
587 { "r31", 31, PPC_OPERAND_GPR
},
588 { "r4", 4, PPC_OPERAND_GPR
},
589 { "r5", 5, PPC_OPERAND_GPR
},
590 { "r6", 6, PPC_OPERAND_GPR
},
591 { "r7", 7, PPC_OPERAND_GPR
},
592 { "r8", 8, PPC_OPERAND_GPR
},
593 { "r9", 9, PPC_OPERAND_GPR
},
595 { "rtoc", 2, PPC_OPERAND_GPR
},
597 { "sdr1", 25, PPC_OPERAND_SPR
},
599 { "sp", 1, PPC_OPERAND_GPR
},
601 { "srr0", 26, PPC_OPERAND_SPR
},
602 { "srr1", 27, PPC_OPERAND_SPR
},
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR
},
606 { "v.1", 1, PPC_OPERAND_VR
},
607 { "v.10", 10, PPC_OPERAND_VR
},
608 { "v.11", 11, PPC_OPERAND_VR
},
609 { "v.12", 12, PPC_OPERAND_VR
},
610 { "v.13", 13, PPC_OPERAND_VR
},
611 { "v.14", 14, PPC_OPERAND_VR
},
612 { "v.15", 15, PPC_OPERAND_VR
},
613 { "v.16", 16, PPC_OPERAND_VR
},
614 { "v.17", 17, PPC_OPERAND_VR
},
615 { "v.18", 18, PPC_OPERAND_VR
},
616 { "v.19", 19, PPC_OPERAND_VR
},
617 { "v.2", 2, PPC_OPERAND_VR
},
618 { "v.20", 20, PPC_OPERAND_VR
},
619 { "v.21", 21, PPC_OPERAND_VR
},
620 { "v.22", 22, PPC_OPERAND_VR
},
621 { "v.23", 23, PPC_OPERAND_VR
},
622 { "v.24", 24, PPC_OPERAND_VR
},
623 { "v.25", 25, PPC_OPERAND_VR
},
624 { "v.26", 26, PPC_OPERAND_VR
},
625 { "v.27", 27, PPC_OPERAND_VR
},
626 { "v.28", 28, PPC_OPERAND_VR
},
627 { "v.29", 29, PPC_OPERAND_VR
},
628 { "v.3", 3, PPC_OPERAND_VR
},
629 { "v.30", 30, PPC_OPERAND_VR
},
630 { "v.31", 31, PPC_OPERAND_VR
},
631 { "v.4", 4, PPC_OPERAND_VR
},
632 { "v.5", 5, PPC_OPERAND_VR
},
633 { "v.6", 6, PPC_OPERAND_VR
},
634 { "v.7", 7, PPC_OPERAND_VR
},
635 { "v.8", 8, PPC_OPERAND_VR
},
636 { "v.9", 9, PPC_OPERAND_VR
},
638 { "v0", 0, PPC_OPERAND_VR
},
639 { "v1", 1, PPC_OPERAND_VR
},
640 { "v10", 10, PPC_OPERAND_VR
},
641 { "v11", 11, PPC_OPERAND_VR
},
642 { "v12", 12, PPC_OPERAND_VR
},
643 { "v13", 13, PPC_OPERAND_VR
},
644 { "v14", 14, PPC_OPERAND_VR
},
645 { "v15", 15, PPC_OPERAND_VR
},
646 { "v16", 16, PPC_OPERAND_VR
},
647 { "v17", 17, PPC_OPERAND_VR
},
648 { "v18", 18, PPC_OPERAND_VR
},
649 { "v19", 19, PPC_OPERAND_VR
},
650 { "v2", 2, PPC_OPERAND_VR
},
651 { "v20", 20, PPC_OPERAND_VR
},
652 { "v21", 21, PPC_OPERAND_VR
},
653 { "v22", 22, PPC_OPERAND_VR
},
654 { "v23", 23, PPC_OPERAND_VR
},
655 { "v24", 24, PPC_OPERAND_VR
},
656 { "v25", 25, PPC_OPERAND_VR
},
657 { "v26", 26, PPC_OPERAND_VR
},
658 { "v27", 27, PPC_OPERAND_VR
},
659 { "v28", 28, PPC_OPERAND_VR
},
660 { "v29", 29, PPC_OPERAND_VR
},
661 { "v3", 3, PPC_OPERAND_VR
},
662 { "v30", 30, PPC_OPERAND_VR
},
663 { "v31", 31, PPC_OPERAND_VR
},
664 { "v4", 4, PPC_OPERAND_VR
},
665 { "v5", 5, PPC_OPERAND_VR
},
666 { "v6", 6, PPC_OPERAND_VR
},
667 { "v7", 7, PPC_OPERAND_VR
},
668 { "v8", 8, PPC_OPERAND_VR
},
669 { "v9", 9, PPC_OPERAND_VR
},
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR
},
673 { "vs.1", 1, PPC_OPERAND_VSR
},
674 { "vs.10", 10, PPC_OPERAND_VSR
},
675 { "vs.11", 11, PPC_OPERAND_VSR
},
676 { "vs.12", 12, PPC_OPERAND_VSR
},
677 { "vs.13", 13, PPC_OPERAND_VSR
},
678 { "vs.14", 14, PPC_OPERAND_VSR
},
679 { "vs.15", 15, PPC_OPERAND_VSR
},
680 { "vs.16", 16, PPC_OPERAND_VSR
},
681 { "vs.17", 17, PPC_OPERAND_VSR
},
682 { "vs.18", 18, PPC_OPERAND_VSR
},
683 { "vs.19", 19, PPC_OPERAND_VSR
},
684 { "vs.2", 2, PPC_OPERAND_VSR
},
685 { "vs.20", 20, PPC_OPERAND_VSR
},
686 { "vs.21", 21, PPC_OPERAND_VSR
},
687 { "vs.22", 22, PPC_OPERAND_VSR
},
688 { "vs.23", 23, PPC_OPERAND_VSR
},
689 { "vs.24", 24, PPC_OPERAND_VSR
},
690 { "vs.25", 25, PPC_OPERAND_VSR
},
691 { "vs.26", 26, PPC_OPERAND_VSR
},
692 { "vs.27", 27, PPC_OPERAND_VSR
},
693 { "vs.28", 28, PPC_OPERAND_VSR
},
694 { "vs.29", 29, PPC_OPERAND_VSR
},
695 { "vs.3", 3, PPC_OPERAND_VSR
},
696 { "vs.30", 30, PPC_OPERAND_VSR
},
697 { "vs.31", 31, PPC_OPERAND_VSR
},
698 { "vs.32", 32, PPC_OPERAND_VSR
},
699 { "vs.33", 33, PPC_OPERAND_VSR
},
700 { "vs.34", 34, PPC_OPERAND_VSR
},
701 { "vs.35", 35, PPC_OPERAND_VSR
},
702 { "vs.36", 36, PPC_OPERAND_VSR
},
703 { "vs.37", 37, PPC_OPERAND_VSR
},
704 { "vs.38", 38, PPC_OPERAND_VSR
},
705 { "vs.39", 39, PPC_OPERAND_VSR
},
706 { "vs.4", 4, PPC_OPERAND_VSR
},
707 { "vs.40", 40, PPC_OPERAND_VSR
},
708 { "vs.41", 41, PPC_OPERAND_VSR
},
709 { "vs.42", 42, PPC_OPERAND_VSR
},
710 { "vs.43", 43, PPC_OPERAND_VSR
},
711 { "vs.44", 44, PPC_OPERAND_VSR
},
712 { "vs.45", 45, PPC_OPERAND_VSR
},
713 { "vs.46", 46, PPC_OPERAND_VSR
},
714 { "vs.47", 47, PPC_OPERAND_VSR
},
715 { "vs.48", 48, PPC_OPERAND_VSR
},
716 { "vs.49", 49, PPC_OPERAND_VSR
},
717 { "vs.5", 5, PPC_OPERAND_VSR
},
718 { "vs.50", 50, PPC_OPERAND_VSR
},
719 { "vs.51", 51, PPC_OPERAND_VSR
},
720 { "vs.52", 52, PPC_OPERAND_VSR
},
721 { "vs.53", 53, PPC_OPERAND_VSR
},
722 { "vs.54", 54, PPC_OPERAND_VSR
},
723 { "vs.55", 55, PPC_OPERAND_VSR
},
724 { "vs.56", 56, PPC_OPERAND_VSR
},
725 { "vs.57", 57, PPC_OPERAND_VSR
},
726 { "vs.58", 58, PPC_OPERAND_VSR
},
727 { "vs.59", 59, PPC_OPERAND_VSR
},
728 { "vs.6", 6, PPC_OPERAND_VSR
},
729 { "vs.60", 60, PPC_OPERAND_VSR
},
730 { "vs.61", 61, PPC_OPERAND_VSR
},
731 { "vs.62", 62, PPC_OPERAND_VSR
},
732 { "vs.63", 63, PPC_OPERAND_VSR
},
733 { "vs.7", 7, PPC_OPERAND_VSR
},
734 { "vs.8", 8, PPC_OPERAND_VSR
},
735 { "vs.9", 9, PPC_OPERAND_VSR
},
737 { "vs0", 0, PPC_OPERAND_VSR
},
738 { "vs1", 1, PPC_OPERAND_VSR
},
739 { "vs10", 10, PPC_OPERAND_VSR
},
740 { "vs11", 11, PPC_OPERAND_VSR
},
741 { "vs12", 12, PPC_OPERAND_VSR
},
742 { "vs13", 13, PPC_OPERAND_VSR
},
743 { "vs14", 14, PPC_OPERAND_VSR
},
744 { "vs15", 15, PPC_OPERAND_VSR
},
745 { "vs16", 16, PPC_OPERAND_VSR
},
746 { "vs17", 17, PPC_OPERAND_VSR
},
747 { "vs18", 18, PPC_OPERAND_VSR
},
748 { "vs19", 19, PPC_OPERAND_VSR
},
749 { "vs2", 2, PPC_OPERAND_VSR
},
750 { "vs20", 20, PPC_OPERAND_VSR
},
751 { "vs21", 21, PPC_OPERAND_VSR
},
752 { "vs22", 22, PPC_OPERAND_VSR
},
753 { "vs23", 23, PPC_OPERAND_VSR
},
754 { "vs24", 24, PPC_OPERAND_VSR
},
755 { "vs25", 25, PPC_OPERAND_VSR
},
756 { "vs26", 26, PPC_OPERAND_VSR
},
757 { "vs27", 27, PPC_OPERAND_VSR
},
758 { "vs28", 28, PPC_OPERAND_VSR
},
759 { "vs29", 29, PPC_OPERAND_VSR
},
760 { "vs3", 3, PPC_OPERAND_VSR
},
761 { "vs30", 30, PPC_OPERAND_VSR
},
762 { "vs31", 31, PPC_OPERAND_VSR
},
763 { "vs32", 32, PPC_OPERAND_VSR
},
764 { "vs33", 33, PPC_OPERAND_VSR
},
765 { "vs34", 34, PPC_OPERAND_VSR
},
766 { "vs35", 35, PPC_OPERAND_VSR
},
767 { "vs36", 36, PPC_OPERAND_VSR
},
768 { "vs37", 37, PPC_OPERAND_VSR
},
769 { "vs38", 38, PPC_OPERAND_VSR
},
770 { "vs39", 39, PPC_OPERAND_VSR
},
771 { "vs4", 4, PPC_OPERAND_VSR
},
772 { "vs40", 40, PPC_OPERAND_VSR
},
773 { "vs41", 41, PPC_OPERAND_VSR
},
774 { "vs42", 42, PPC_OPERAND_VSR
},
775 { "vs43", 43, PPC_OPERAND_VSR
},
776 { "vs44", 44, PPC_OPERAND_VSR
},
777 { "vs45", 45, PPC_OPERAND_VSR
},
778 { "vs46", 46, PPC_OPERAND_VSR
},
779 { "vs47", 47, PPC_OPERAND_VSR
},
780 { "vs48", 48, PPC_OPERAND_VSR
},
781 { "vs49", 49, PPC_OPERAND_VSR
},
782 { "vs5", 5, PPC_OPERAND_VSR
},
783 { "vs50", 50, PPC_OPERAND_VSR
},
784 { "vs51", 51, PPC_OPERAND_VSR
},
785 { "vs52", 52, PPC_OPERAND_VSR
},
786 { "vs53", 53, PPC_OPERAND_VSR
},
787 { "vs54", 54, PPC_OPERAND_VSR
},
788 { "vs55", 55, PPC_OPERAND_VSR
},
789 { "vs56", 56, PPC_OPERAND_VSR
},
790 { "vs57", 57, PPC_OPERAND_VSR
},
791 { "vs58", 58, PPC_OPERAND_VSR
},
792 { "vs59", 59, PPC_OPERAND_VSR
},
793 { "vs6", 6, PPC_OPERAND_VSR
},
794 { "vs60", 60, PPC_OPERAND_VSR
},
795 { "vs61", 61, PPC_OPERAND_VSR
},
796 { "vs62", 62, PPC_OPERAND_VSR
},
797 { "vs63", 63, PPC_OPERAND_VSR
},
798 { "vs7", 7, PPC_OPERAND_VSR
},
799 { "vs8", 8, PPC_OPERAND_VSR
},
800 { "vs9", 9, PPC_OPERAND_VSR
},
802 { "xer", 1, PPC_OPERAND_SPR
}
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
810 static const struct pd_reg
*
811 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
813 int middle
, low
, high
;
821 middle
= (low
+ high
) / 2;
822 cmp
= strcasecmp (name
, regs
[middle
].name
);
828 return ®s
[middle
];
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS
*expressionP
)
850 const struct pd_reg
*reg
;
855 /* Find the spelling of the operand. */
856 start
= name
= input_line_pointer
;
857 if (name
[0] == '%' && ISALPHA (name
[1]))
858 name
= ++input_line_pointer
;
860 else if (!reg_names_p
|| !ISALPHA (name
[0]))
863 c
= get_symbol_name (&name
);
864 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
866 /* Put back the delimiting char. */
867 *input_line_pointer
= c
;
869 /* Look to see if it's in the register table. */
872 expressionP
->X_op
= O_register
;
873 expressionP
->X_add_number
= reg
->value
;
874 expressionP
->X_md
= reg
->flags
;
876 /* Make the rest nice. */
877 expressionP
->X_add_symbol
= NULL
;
878 expressionP
->X_op_symbol
= NULL
;
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer
= start
;
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand
;
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names
[] =
897 { "cr0", 0, PPC_OPERAND_CR_REG
},
898 { "cr1", 1, PPC_OPERAND_CR_REG
},
899 { "cr2", 2, PPC_OPERAND_CR_REG
},
900 { "cr3", 3, PPC_OPERAND_CR_REG
},
901 { "cr4", 4, PPC_OPERAND_CR_REG
},
902 { "cr5", 5, PPC_OPERAND_CR_REG
},
903 { "cr6", 6, PPC_OPERAND_CR_REG
},
904 { "cr7", 7, PPC_OPERAND_CR_REG
},
905 { "eq", 2, PPC_OPERAND_CR_BIT
},
906 { "gt", 1, PPC_OPERAND_CR_BIT
},
907 { "lt", 0, PPC_OPERAND_CR_BIT
},
908 { "so", 3, PPC_OPERAND_CR_BIT
},
909 { "un", 3, PPC_OPERAND_CR_BIT
}
912 /* Parsing function. This returns non-zero if it recognized an
916 ppc_parse_name (const char *name
, expressionS
*exp
)
918 const struct pd_reg
*reg
;
925 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
930 exp
->X_op
= O_register
;
931 exp
->X_add_number
= reg
->value
;
932 exp
->X_md
= reg
->flags
;
937 /* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
941 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
943 /* Accept 4*cr<n> and cr<n>*4. */
945 && ((right
->X_op
== O_register
946 && right
->X_md
== PPC_OPERAND_CR_REG
947 && left
->X_op
== O_constant
948 && left
->X_add_number
== 4)
949 || (left
->X_op
== O_register
950 && left
->X_md
== PPC_OPERAND_CR_REG
951 && right
->X_op
== O_constant
952 && right
->X_add_number
== 4)))
954 left
->X_op
= O_register
;
955 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
956 left
->X_add_number
*= right
->X_add_number
;
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right
->X_op
== O_register
962 && left
->X_op
== O_register
964 && ((right
->X_md
== PPC_OPERAND_CR_BIT
965 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
966 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
967 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
969 left
->X_md
= PPC_OPERAND_CR_BIT
;
970 right
->X_op
= O_constant
;
974 /* Accept reg +/- constant. */
975 if (left
->X_op
== O_register
976 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
977 as_warn (_("invalid register expression"));
979 /* Accept constant + reg. */
980 if (right
->X_op
== O_register
)
982 if (op
== O_add
&& left
->X_op
== O_constant
)
983 left
->X_md
= right
->X_md
;
985 as_warn (_("invalid register expression"));
991 /* Local variables. */
993 /* Whether to target xcoff64/elf64. */
994 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
996 /* Opcode hash table. */
997 static struct hash_control
*ppc_hash
;
999 /* Macro hash table. */
1000 static struct hash_control
*ppc_macro_hash
;
1003 /* What type of shared library support to use. */
1004 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
1006 /* Flags to set in the elf header. */
1007 static flagword ppc_flags
= 0;
1009 /* Whether this is Solaris or not. */
1010 #ifdef TARGET_SOLARIS_COMMENT
1011 #define SOLARIS_P TRUE
1013 #define SOLARIS_P FALSE
1016 static bfd_boolean msolaris
= SOLARIS_P
;
1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1027 /* Next subsegment to allocate within the .text segment. */
1028 static subsegT ppc_text_subsegment
= 2;
1030 /* Linked list of csects in the text section. */
1031 static symbolS
*ppc_text_csects
;
1033 /* Next subsegment to allocate within the .data segment. */
1034 static subsegT ppc_data_subsegment
= 2;
1036 /* Linked list of csects in the data section. */
1037 static symbolS
*ppc_data_csects
;
1039 /* The current csect. */
1040 static symbolS
*ppc_current_csect
;
1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047 static symbolS
*ppc_toc_csect
;
1049 /* The first frag in the TOC subsegment. */
1050 static fragS
*ppc_toc_frag
;
1052 /* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054 static fragS
*ppc_after_toc_frag
;
1056 /* The current static block. */
1057 static symbolS
*ppc_current_block
;
1059 /* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062 static asection
*ppc_coff_debug_section
;
1064 /* Structure to set the length field of the dwarf sections. */
1065 struct dw_subsection
{
1066 /* Subsections are simply linked. */
1067 struct dw_subsection
*link
;
1069 /* The subsection number. */
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp
;
1076 static struct dw_section
{
1077 /* Corresponding section. */
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection
*list_subseg
;
1083 /* The anonymous subsection. */
1084 struct dw_subsection
*anon_subseg
;
1085 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1086 #endif /* OBJ_XCOFF */
1090 /* Various sections that we need for PE coff support. */
1091 static segT ydata_section
;
1092 static segT pdata_section
;
1093 static segT reldata_section
;
1094 static segT rdata_section
;
1095 static segT tocdata_section
;
1097 /* The current section and the previous section. See ppc_previous. */
1098 static segT ppc_previous_section
;
1099 static segT ppc_current_section
;
1104 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105 unsigned long *ppc_apuinfo_list
;
1106 unsigned int ppc_apuinfo_num
;
1107 unsigned int ppc_apuinfo_num_alloc
;
1108 #endif /* OBJ_ELF */
1111 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1113 const char *const md_shortopts
= "um:";
1115 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1116 const struct option md_longopts
[] = {
1117 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1118 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1119 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1120 {NULL
, no_argument
, NULL
, 0}
1122 const size_t md_longopts_size
= sizeof (md_longopts
);
1125 md_parse_option (int c
, const char *arg
)
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg
, "e") == 0)
1142 target_big_endian
= 0;
1143 set_target_endian
= 1;
1144 if (ppc_cpu
& PPC_OPCODE_VLE
)
1145 as_bad (_("the use of -mvle requires big endian."));
1153 if (strcmp (arg
, "e") == 0)
1155 target_big_endian
= 1;
1156 set_target_endian
= 1;
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1168 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1178 if (strcmp (arg
, "64") == 0)
1182 if (ppc_cpu
& PPC_OPCODE_VLE
)
1183 as_bad (_("the use of -mvle requires -a32."));
1185 as_fatal (_("%s unsupported"), "-a64");
1188 else if (strcmp (arg
, "32") == 0)
1195 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1196 /* "raw" is only valid for the disassembler. */
1197 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1200 if (strcmp (arg
, "vle") == 0)
1202 if (set_target_endian
&& target_big_endian
== 0)
1203 as_bad (_("the use of -mvle requires big endian."));
1205 as_bad (_("the use of -mvle requires -a32."));
1209 else if (strcmp (arg
, "no-vle") == 0)
1211 sticky
&= ~PPC_OPCODE_VLE
;
1213 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1214 new_cpu
&= ~PPC_OPCODE_VLE
;
1219 else if (strcmp (arg
, "regnames") == 0)
1222 else if (strcmp (arg
, "no-regnames") == 0)
1223 reg_names_p
= FALSE
;
1226 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1227 that require relocation. */
1228 else if (strcmp (arg
, "relocatable") == 0)
1230 shlib
= SHLIB_MRELOCATABLE
;
1231 ppc_flags
|= EF_PPC_RELOCATABLE
;
1234 else if (strcmp (arg
, "relocatable-lib") == 0)
1236 shlib
= SHLIB_MRELOCATABLE
;
1237 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1240 /* -memb, set embedded bit. */
1241 else if (strcmp (arg
, "emb") == 0)
1242 ppc_flags
|= EF_PPC_EMB
;
1244 /* -mlittle/-mbig set the endianness. */
1245 else if (strcmp (arg
, "little") == 0
1246 || strcmp (arg
, "little-endian") == 0)
1248 target_big_endian
= 0;
1249 set_target_endian
= 1;
1250 if (ppc_cpu
& PPC_OPCODE_VLE
)
1251 as_bad (_("the use of -mvle requires big endian."));
1254 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1256 target_big_endian
= 1;
1257 set_target_endian
= 1;
1260 else if (strcmp (arg
, "solaris") == 0)
1263 ppc_comment_chars
= ppc_solaris_comment_chars
;
1266 else if (strcmp (arg
, "no-solaris") == 0)
1269 ppc_comment_chars
= ppc_eabi_comment_chars
;
1271 else if (strcmp (arg
, "spe2") == 0)
1273 ppc_cpu
|= PPC_OPCODE_SPE2
;
1278 as_bad (_("invalid switch -m%s"), arg
);
1284 /* -V: SVR4 argument to print version ID. */
1286 print_version_id ();
1289 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1290 should be emitted or not. FIXME: Not implemented. */
1294 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1295 rather than .stabs.excl, which is ignored by the linker.
1296 FIXME: Not implemented. */
1307 nop_limit
= strtoul (optarg
, &end
, 0);
1309 as_bad (_("--nops needs a numeric argument"));
1324 md_show_usage (FILE *stream
)
1326 fprintf (stream
, _("\
1328 -a32 generate ELF32/XCOFF32\n\
1329 -a64 generate ELF64/XCOFF64\n\
1331 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1332 -mpwr generate code for POWER (RIOS1)\n\
1333 -m601 generate code for PowerPC 601\n\
1334 -mppc, -mppc32, -m603, -m604\n\
1335 generate code for PowerPC 603/604\n\
1336 -m403 generate code for PowerPC 403\n\
1337 -m405 generate code for PowerPC 405\n\
1338 -m440 generate code for PowerPC 440\n\
1339 -m464 generate code for PowerPC 464\n\
1340 -m476 generate code for PowerPC 476\n\
1341 -m7400, -m7410, -m7450, -m7455\n\
1342 generate code for PowerPC 7400/7410/7450/7455\n\
1343 -m750cl, -mgekko, -mbroadway\n\
1344 generate code for PowerPC 750cl/Gekko/Broadway\n\
1345 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1346 fprintf (stream
, _("\
1347 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1348 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1349 -mbooke generate code for 32-bit PowerPC BookE\n\
1350 -ma2 generate code for A2 architecture\n\
1351 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1352 -mpower5, -mpwr5, -mpwr5x\n\
1353 generate code for Power5 architecture\n\
1354 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1355 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1356 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1357 -mpower9, -mpwr9 generate code for Power9 architecture\n\
1358 -mcell generate code for Cell Broadband Engine architecture\n\
1359 -mcom generate code for Power/PowerPC common instructions\n\
1360 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1361 fprintf (stream
, _("\
1362 -maltivec generate code for AltiVec\n\
1363 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1364 -me300 generate code for PowerPC e300 family\n\
1365 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1366 -me500mc, generate code for Freescale e500mc core complex\n\
1367 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1368 -me5500, generate code for Freescale e5500 core complex\n\
1369 -me6500, generate code for Freescale e6500 core complex\n\
1370 -mspe generate code for Motorola SPE instructions\n\
1371 -mspe2 generate code for Freescale SPE2 instructions\n\
1372 -mvle generate code for Freescale VLE instructions\n\
1373 -mtitan generate code for AppliedMicro Titan core complex\n\
1374 -mregnames Allow symbolic names for registers\n\
1375 -mno-regnames Do not allow symbolic names for registers\n"));
1377 fprintf (stream
, _("\
1378 -mrelocatable support for GCC's -mrelocatble option\n\
1379 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1380 -memb set PPC_EMB bit in ELF flags\n\
1381 -mlittle, -mlittle-endian, -le\n\
1382 generate code for a little endian machine\n\
1383 -mbig, -mbig-endian, -be\n\
1384 generate code for a big endian machine\n\
1385 -msolaris generate code for Solaris\n\
1386 -mno-solaris do not generate code for Solaris\n\
1387 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1388 -V print assembler version number\n\
1389 -Qy, -Qn ignored\n"));
1391 fprintf (stream
, _("\
1392 -nops=count when aligning, more than COUNT nops uses a branch\n\
1393 -ppc476-workaround warn if emitting data to code sections\n"));
1396 /* Set ppc_cpu if it is not already set. */
1401 const char *default_os
= TARGET_OS
;
1402 const char *default_cpu
= TARGET_CPU
;
1404 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1407 if (target_big_endian
)
1408 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1410 /* The minimum supported cpu for 64-bit little-endian is power8. */
1411 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1412 else if (strncmp (default_os
, "aix", 3) == 0
1413 && default_os
[3] >= '4' && default_os
[3] <= '9')
1414 ppc_cpu
|= PPC_OPCODE_COMMON
;
1415 else if (strncmp (default_os
, "aix3", 4) == 0)
1416 ppc_cpu
|= PPC_OPCODE_POWER
;
1417 else if (strcmp (default_cpu
, "rs6000") == 0)
1418 ppc_cpu
|= PPC_OPCODE_POWER
;
1419 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1420 ppc_cpu
|= PPC_OPCODE_PPC
;
1422 as_fatal (_("unknown default cpu = %s, os = %s"),
1423 default_cpu
, default_os
);
1427 /* Figure out the BFD architecture to use. This function and ppc_mach
1428 are called well before md_begin, when the output file is opened. */
1430 enum bfd_architecture
1433 const char *default_cpu
= TARGET_CPU
;
1436 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1437 return bfd_arch_powerpc
;
1438 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1439 return bfd_arch_powerpc
;
1440 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1441 return bfd_arch_rs6000
;
1442 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1444 if (strcmp (default_cpu
, "rs6000") == 0)
1445 return bfd_arch_rs6000
;
1446 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1447 return bfd_arch_powerpc
;
1450 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1451 return bfd_arch_unknown
;
1458 return bfd_mach_ppc64
;
1459 else if (ppc_arch () == bfd_arch_rs6000
)
1460 return bfd_mach_rs6k
;
1461 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1462 return bfd_mach_ppc_titan
;
1463 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1464 return bfd_mach_ppc_vle
;
1466 return bfd_mach_ppc
;
1470 ppc_target_format (void)
1474 return target_big_endian
? "pe-powerpc" : "pe-powerpcle";
1476 return "xcoff-powermac";
1479 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1481 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1487 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1488 # elif defined (TE_VXWORKS)
1489 return "elf32-powerpc-vxworks";
1491 return (target_big_endian
1492 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1493 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1498 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1499 Return TRUE if there's a problem, otherwise FALSE. */
1502 insn_validate (const struct powerpc_opcode
*op
)
1504 const unsigned char *o
;
1505 uint64_t omask
= op
->mask
;
1507 /* The mask had better not trim off opcode bits. */
1508 if ((op
->opcode
& omask
) != op
->opcode
)
1510 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1514 /* The operands must not overlap the opcode or each other. */
1515 for (o
= op
->operands
; *o
; ++o
)
1517 bfd_boolean optional
= FALSE
;
1518 if (*o
>= num_powerpc_operands
)
1520 as_bad (_("operand index error for %s"), op
->name
);
1526 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1527 if (operand
->shift
== (int) PPC_OPSHIFT_INV
)
1534 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1536 else if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1538 mask
= (*operand
->insert
) (0, val
, ppc_cpu
, &errmsg
);
1540 else if (operand
->shift
>= 0)
1541 mask
= operand
->bitm
<< operand
->shift
;
1543 mask
= operand
->bitm
>> -operand
->shift
;
1546 as_bad (_("operand %d overlap in %s"),
1547 (int) (o
- op
->operands
), op
->name
);
1551 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
1555 as_bad (_("non-optional operand %d follows optional operand in %s"),
1556 (int) (o
- op
->operands
), op
->name
);
1564 /* Insert opcodes and macros into hash tables. Called at startup and
1565 for .machine pseudo. */
1568 ppc_setup_opcodes (void)
1570 const struct powerpc_opcode
*op
;
1571 const struct powerpc_opcode
*op_end
;
1572 const struct powerpc_macro
*macro
;
1573 const struct powerpc_macro
*macro_end
;
1574 bfd_boolean bad_insn
= FALSE
;
1576 if (ppc_hash
!= NULL
)
1577 hash_die (ppc_hash
);
1578 if (ppc_macro_hash
!= NULL
)
1579 hash_die (ppc_macro_hash
);
1581 /* Insert the opcodes into a hash table. */
1582 ppc_hash
= hash_new ();
1584 if (ENABLE_CHECKING
)
1588 /* An index into powerpc_operands is stored in struct fix
1589 fx_pcrel_adjust which is 8 bits wide. */
1590 gas_assert (num_powerpc_operands
< 256);
1592 /* Check operand masks. Code here and in the disassembler assumes
1593 all the 1's in the mask are contiguous. */
1594 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1596 uint64_t mask
= powerpc_operands
[i
].bitm
;
1600 right_bit
= mask
& -mask
;
1602 right_bit
= mask
& -mask
;
1603 if (mask
!= right_bit
)
1605 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1608 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1609 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1610 sizeof (powerpc_operands
[0])) == 0)
1612 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1619 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1620 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1622 if (ENABLE_CHECKING
)
1624 unsigned int new_opcode
= PPC_OP (op
[0].opcode
);
1626 #ifdef PRINT_OPCODE_TABLE
1627 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1628 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1629 new_opcode
, (unsigned long long) op
->opcode
,
1630 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1633 /* The major opcodes had better be sorted. Code in the disassembler
1634 assumes the insns are sorted according to major opcode. */
1635 if (op
!= powerpc_opcodes
1636 && new_opcode
< PPC_OP (op
[-1].opcode
))
1638 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1642 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1644 as_bad (_("%s is enabled by vle flag"), op
->name
);
1647 if (PPC_OP (op
->opcode
) != 4
1648 && PPC_OP (op
->opcode
) != 31
1649 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1651 as_bad (_("%s not disabled by vle flag"), op
->name
);
1654 bad_insn
|= insn_validate (op
);
1657 if ((ppc_cpu
& op
->flags
) != 0
1658 && !(ppc_cpu
& op
->deprecated
))
1662 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1665 as_bad (_("duplicate instruction %s"),
1672 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1673 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1674 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1676 op_end
= vle_opcodes
+ vle_num_opcodes
;
1677 for (op
= vle_opcodes
; op
< op_end
; op
++)
1679 if (ENABLE_CHECKING
)
1681 unsigned new_seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1683 #ifdef PRINT_OPCODE_TABLE
1684 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1685 op
->name
, (unsigned int) (op
- vle_opcodes
),
1686 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1687 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1690 /* The major opcodes had better be sorted. Code in the disassembler
1691 assumes the insns are sorted according to major opcode. */
1692 if (op
!= vle_opcodes
1693 && new_seg
< VLE_OP_TO_SEG (VLE_OP (op
[-1].opcode
, op
[-1].mask
)))
1695 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1699 bad_insn
|= insn_validate (op
);
1702 if ((ppc_cpu
& op
->flags
) != 0
1703 && !(ppc_cpu
& op
->deprecated
))
1707 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1710 as_bad (_("duplicate instruction %s"),
1717 /* SPE2 instructions */
1718 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1720 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1721 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1723 if (ENABLE_CHECKING
)
1725 if (op
!= spe2_opcodes
)
1727 unsigned old_seg
, new_seg
;
1729 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1730 old_seg
= VLE_OP_TO_SEG (old_seg
);
1731 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1732 new_seg
= VLE_OP_TO_SEG (new_seg
);
1734 /* The major opcodes had better be sorted. Code in the
1735 disassembler assumes the insns are sorted according to
1737 if (new_seg
< old_seg
)
1739 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1744 bad_insn
|= insn_validate (op
);
1747 if ((ppc_cpu
& op
->flags
) != 0 && !(ppc_cpu
& op
->deprecated
))
1751 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1754 as_bad (_("duplicate instruction %s"),
1761 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1762 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1765 /* Insert the macros into a hash table. */
1766 ppc_macro_hash
= hash_new ();
1768 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1769 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1771 if ((macro
->flags
& ppc_cpu
) != 0 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1775 retval
= hash_insert (ppc_macro_hash
, macro
->name
, (void *) macro
);
1776 if (retval
!= (const char *) NULL
)
1778 as_bad (_("duplicate macro %s"), macro
->name
);
1788 /* This function is called when the assembler starts up. It is called
1789 after the options have been parsed and the output file has been
1797 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1798 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1801 /* Set the ELF flags if desired. */
1802 if (ppc_flags
&& !msolaris
)
1803 bfd_set_private_flags (stdoutput
, ppc_flags
);
1806 ppc_setup_opcodes ();
1808 /* Tell the main code what the endianness is if it is not overridden
1810 if (!set_target_endian
)
1812 set_target_endian
= 1;
1813 target_big_endian
= PPC_BIG_ENDIAN
;
1817 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1819 /* Create dummy symbols to serve as initial csects. This forces the
1820 text csects to precede the data csects. These symbols will not
1822 ppc_text_csects
= symbol_make ("dummy\001");
1823 symbol_get_tc (ppc_text_csects
)->within
= ppc_text_csects
;
1824 ppc_data_csects
= symbol_make ("dummy\001");
1825 symbol_get_tc (ppc_data_csects
)->within
= ppc_data_csects
;
1830 ppc_current_section
= text_section
;
1831 ppc_previous_section
= 0;
1840 if (ppc_apuinfo_list
== NULL
)
1843 /* Ok, so write the section info out. We have this layout:
1847 0 8 length of "APUinfo\0"
1848 4 (n*4) number of APU's (4 bytes each)
1851 20 APU#1 first APU's info
1852 24 APU#2 second APU's info
1857 asection
*seg
= now_seg
;
1858 subsegT subseg
= now_subseg
;
1859 asection
*apuinfo_secp
= (asection
*) NULL
;
1862 /* Create the .PPC.EMB.apuinfo section. */
1863 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1864 bfd_set_section_flags (stdoutput
,
1866 SEC_HAS_CONTENTS
| SEC_READONLY
);
1869 md_number_to_chars (p
, (valueT
) 8, 4);
1872 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1875 md_number_to_chars (p
, (valueT
) 2, 4);
1878 strcpy (p
, APUINFO_LABEL
);
1880 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1883 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1886 frag_align (2, 0, 0);
1888 /* We probably can't restore the current segment, for there likely
1891 subseg_set (seg
, subseg
);
1896 /* Insert an operand value into an instruction. */
1899 ppc_insert_operand (uint64_t insn
,
1900 const struct powerpc_operand
*operand
,
1906 int64_t min
, max
, right
;
1908 max
= operand
->bitm
;
1912 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
1914 /* Extend the allowed range for addis to [-32768, 65535].
1915 Similarly for cmpli and some VLE high part insns. For 64-bit
1916 it would be good to disable this for signed fields since the
1917 value is sign extended into the high 32 bits of the register.
1918 If the value is, say, an address, then we might care about
1919 the high bits. However, gcc as of 2014-06 uses unsigned
1920 values when loading the high part of 64-bit constants using
1922 min
= ~(max
>> 1) & -right
;
1924 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
1926 max
= (max
>> 1) & -right
;
1927 min
= ~max
& -right
;
1930 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1933 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1942 /* Some people write constants with the sign extension done by
1943 hand but only up to 32 bits. This shouldn't really be valid,
1944 but, to permit this code to assemble on a 64-bit host, we
1945 sign extend the 32-bit value to 64 bits if so doing makes the
1948 && (val
- (1LL << 32)) >= min
1949 && (val
- (1LL << 32)) <= max
1950 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
1951 val
= val
- (1LL << 32);
1953 /* Similarly, people write expressions like ~(1<<15), and expect
1954 this to be OK for a 32-bit unsigned value. */
1956 && (val
+ (1LL << 32)) >= min
1957 && (val
+ (1LL << 32)) <= max
1958 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
1959 val
= val
+ (1LL << 32);
1963 || (val
& (right
- 1)) != 0)
1964 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
1967 if (operand
->insert
)
1972 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
1973 if (errmsg
!= (const char *) NULL
)
1974 as_bad_where (file
, line
, "%s", errmsg
);
1976 else if (operand
->shift
>= 0)
1977 insn
|= (val
& operand
->bitm
) << operand
->shift
;
1979 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
1986 /* Parse @got, etc. and return the desired relocation. */
1987 static bfd_reloc_code_real_type
1988 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
1992 unsigned int length
: 8;
1993 unsigned int valid32
: 1;
1994 unsigned int valid64
: 1;
2003 const struct map_bfd
*ptr
;
2005 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2006 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2007 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2009 static const struct map_bfd mapping
[] = {
2010 MAP ("l", BFD_RELOC_LO16
),
2011 MAP ("h", BFD_RELOC_HI16
),
2012 MAP ("ha", BFD_RELOC_HI16_S
),
2013 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2014 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2015 MAP ("got", BFD_RELOC_16_GOTOFF
),
2016 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2017 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2018 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2019 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2020 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2021 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2022 MAP ("copy", BFD_RELOC_PPC_COPY
),
2023 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2024 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2025 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2026 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2027 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2028 MAP ("tls", BFD_RELOC_PPC_TLS
),
2029 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2030 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2031 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2032 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2033 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2034 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2035 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2036 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2037 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2038 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2039 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2040 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2041 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2042 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2043 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2044 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2045 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2046 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2047 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2048 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2049 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2050 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2051 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2052 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2053 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2054 MAP32 ("fixup", BFD_RELOC_CTOR
),
2055 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2056 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2057 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2058 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2059 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2060 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2061 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2062 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2063 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2064 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2065 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2066 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2067 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2068 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2069 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2070 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2071 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2072 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2073 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2074 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2075 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2076 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2077 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2078 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2079 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2080 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2081 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2082 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2083 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2084 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2085 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2086 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2087 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2088 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2089 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2090 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2091 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2092 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2093 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2094 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2095 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2096 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2097 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2098 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2099 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2100 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2101 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2102 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2103 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2104 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2105 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2106 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC
),
2107 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2111 return BFD_RELOC_NONE
;
2113 for (ch
= *str
, str2
= ident
;
2114 (str2
< ident
+ sizeof (ident
) - 1
2115 && (ISALNUM (ch
) || ch
== '@'));
2118 *str2
++ = TOLOWER (ch
);
2125 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2126 if (ch
== ptr
->string
[0]
2127 && len
== ptr
->length
2128 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2129 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2131 int reloc
= ptr
->reloc
;
2133 if (!ppc_obj64
&& exp_p
->X_add_number
!= 0)
2137 case BFD_RELOC_16_GOTOFF
:
2138 case BFD_RELOC_LO16_GOTOFF
:
2139 case BFD_RELOC_HI16_GOTOFF
:
2140 case BFD_RELOC_HI16_S_GOTOFF
:
2141 as_warn (_("identifier+constant@got means "
2142 "identifier@got+constant"));
2145 case BFD_RELOC_PPC_GOT_TLSGD16
:
2146 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2147 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2148 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2149 case BFD_RELOC_PPC_GOT_TLSLD16
:
2150 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2151 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2152 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2153 case BFD_RELOC_PPC_GOT_DTPREL16
:
2154 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2155 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2156 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2157 case BFD_RELOC_PPC_GOT_TPREL16
:
2158 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2159 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2160 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2161 as_bad (_("symbol+offset not supported for got tls"));
2166 /* Now check for identifier@suffix+constant. */
2167 if (*str
== '-' || *str
== '+')
2169 char *orig_line
= input_line_pointer
;
2170 expressionS new_exp
;
2172 input_line_pointer
= str
;
2173 expression (&new_exp
);
2174 if (new_exp
.X_op
== O_constant
)
2176 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2177 str
= input_line_pointer
;
2180 if (&input_line_pointer
!= str_p
)
2181 input_line_pointer
= orig_line
;
2185 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2186 && exp_p
->X_op
== O_symbol
2187 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2189 /* Change the symbol so that the dummy .TOC. symbol can be
2190 omitted from the object file. */
2191 exp_p
->X_add_symbol
= &abs_symbol
;
2194 return (bfd_reloc_code_real_type
) reloc
;
2197 return BFD_RELOC_NONE
;
2200 /* Support @got, etc. on constants emitted via .short, .int etc. */
2202 bfd_reloc_code_real_type
2203 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2206 if (nbytes
>= 2 && *input_line_pointer
== '@')
2207 return ppc_elf_suffix (&input_line_pointer
, exp
);
2208 return BFD_RELOC_NONE
;
2211 /* Warn when emitting data to code sections, unless we are emitting
2212 a relocation that ld --ppc476-workaround uses to recognise data
2213 *and* there was an unconditional branch prior to the data. */
2216 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2217 unsigned int nbytes
, fixS
*fix
)
2220 && (now_seg
->flags
& SEC_CODE
) != 0
2223 || !(fix
->fx_r_type
== BFD_RELOC_32
2224 || fix
->fx_r_type
== BFD_RELOC_CTOR
2225 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2226 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2227 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2228 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2229 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2230 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2231 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2232 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2234 /* Flag that we've warned. */
2238 as_warn (_("data in executable section"));
2242 /* Solaris pseduo op to change to the .rodata section. */
2244 ppc_elf_rdata (int xxx
)
2246 char *save_line
= input_line_pointer
;
2247 static char section
[] = ".rodata\n";
2249 /* Just pretend this is .section .rodata */
2250 input_line_pointer
= section
;
2251 obj_elf_section (xxx
);
2253 input_line_pointer
= save_line
;
2256 /* Pseudo op to make file scope bss items. */
2258 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2271 c
= get_symbol_name (&name
);
2273 /* Just after name is now '\0'. */
2274 p
= input_line_pointer
;
2276 SKIP_WHITESPACE_AFTER_NAME ();
2277 if (*input_line_pointer
!= ',')
2279 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2280 ignore_rest_of_line ();
2284 input_line_pointer
++; /* skip ',' */
2285 if ((size
= get_absolute_expression ()) < 0)
2287 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2288 ignore_rest_of_line ();
2292 /* The third argument to .lcomm is the alignment. */
2293 if (*input_line_pointer
!= ',')
2297 ++input_line_pointer
;
2298 align
= get_absolute_expression ();
2301 as_warn (_("ignoring bad alignment"));
2307 symbolP
= symbol_find_or_make (name
);
2310 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2312 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2313 S_GET_NAME (symbolP
));
2314 ignore_rest_of_line ();
2318 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2320 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2321 S_GET_NAME (symbolP
),
2322 (long) S_GET_VALUE (symbolP
),
2325 ignore_rest_of_line ();
2331 old_subsec
= now_subseg
;
2334 /* Convert to a power of 2 alignment. */
2335 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2338 as_bad (_("common alignment not a power of 2"));
2339 ignore_rest_of_line ();
2346 record_alignment (bss_section
, align2
);
2347 subseg_set (bss_section
, 1);
2349 frag_align (align2
, 0, 0);
2350 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2351 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2352 symbol_set_frag (symbolP
, frag_now
);
2353 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2356 S_SET_SIZE (symbolP
, size
);
2357 S_SET_SEGMENT (symbolP
, bss_section
);
2358 subseg_set (old_sec
, old_subsec
);
2359 demand_empty_rest_of_line ();
2362 /* Pseudo op to set symbol local entry point. */
2364 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2367 char c
= get_symbol_name (&name
);
2372 elf_symbol_type
*elfsym
;
2374 p
= input_line_pointer
;
2376 SKIP_WHITESPACE_AFTER_NAME ();
2377 if (*input_line_pointer
!= ',')
2380 as_bad (_("expected comma after name `%s' in .localentry directive"),
2383 ignore_rest_of_line ();
2386 input_line_pointer
++;
2388 if (exp
.X_op
== O_absent
)
2390 as_bad (_("missing expression in .localentry directive"));
2391 exp
.X_op
= O_constant
;
2392 exp
.X_add_number
= 0;
2395 sym
= symbol_find_or_make (name
);
2398 if (resolve_expression (&exp
)
2399 && exp
.X_op
== O_constant
)
2401 unsigned int encoded
, ok
;
2404 if (exp
.X_add_number
== 1 || exp
.X_add_number
== 7)
2405 encoded
= exp
.X_add_number
<< STO_PPC64_LOCAL_BIT
;
2408 encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2409 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2411 as_bad (_(".localentry expression for `%s' "
2412 "is not a valid power of 2"), S_GET_NAME (sym
));
2418 bfdsym
= symbol_get_bfdsym (sym
);
2419 elfsym
= elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
2420 gas_assert (elfsym
);
2421 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2422 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2423 if (ppc_abiversion
== 0)
2428 as_bad (_(".localentry expression for `%s' "
2429 "does not evaluate to a constant"), S_GET_NAME (sym
));
2431 demand_empty_rest_of_line ();
2434 /* Pseudo op to set ABI version. */
2436 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2441 if (exp
.X_op
== O_absent
)
2443 as_bad (_("missing expression in .abiversion directive"));
2444 exp
.X_op
= O_constant
;
2445 exp
.X_add_number
= 0;
2448 if (resolve_expression (&exp
)
2449 && exp
.X_op
== O_constant
)
2450 ppc_abiversion
= exp
.X_add_number
;
2452 as_bad (_(".abiversion expression does not evaluate to a constant"));
2453 demand_empty_rest_of_line ();
2456 /* Parse a .gnu_attribute directive. */
2458 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2460 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2462 /* Check validity of defined powerpc tags. */
2463 if (tag
== Tag_GNU_Power_ABI_FP
2464 || tag
== Tag_GNU_Power_ABI_Vector
2465 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2469 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2471 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2472 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2473 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2474 as_warn (_("unknown .gnu_attribute value"));
2478 /* Set ABI version in output file. */
2482 if (ppc_obj64
&& ppc_abiversion
!= 0)
2484 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2485 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2489 /* Validate any relocations emitted for -mrelocatable, possibly adding
2490 fixups for word relocations in writable segments, so we can adjust
2493 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2495 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2504 case SHLIB_MRELOCATABLE
:
2505 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2506 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2507 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2508 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2509 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2510 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2511 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2512 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2513 && (seg
->flags
& SEC_LOAD
) != 0
2514 && strcmp (segment_name (seg
), ".got2") != 0
2515 && strcmp (segment_name (seg
), ".dtors") != 0
2516 && strcmp (segment_name (seg
), ".ctors") != 0
2517 && strcmp (segment_name (seg
), ".fixup") != 0
2518 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2519 && strcmp (segment_name (seg
), ".eh_frame") != 0
2520 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2522 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2523 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2525 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2526 _("relocation cannot be done when using -mrelocatable"));
2533 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2534 function descriptor sym if the corresponding code sym is used. */
2537 ppc_frob_file_before_adjust (void)
2545 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2551 name
= S_GET_NAME (symp
);
2555 if (! S_IS_WEAK (symp
)
2556 || S_IS_DEFINED (symp
))
2559 dotname
= concat (".", name
, (char *) NULL
);
2560 dotsym
= symbol_find_noref (dotname
, 1);
2562 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2563 || symbol_used_in_reloc_p (dotsym
)))
2564 symbol_mark_used (symp
);
2568 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2570 && toc_reloc_types
!= has_large_toc_reloc
2571 && bfd_section_size (stdoutput
, toc
) > 0x10000)
2572 as_warn (_("TOC section size exceeds 64k"));
2575 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2576 emitted. Other uses of .TOC. will cause the symbol to be marked
2577 with BSF_KEEP in md_apply_fix. */
2580 ppc_elf_adjust_symtab (void)
2585 symp
= symbol_find (".TOC.");
2588 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2589 if ((bsym
->flags
& BSF_KEEP
) == 0)
2590 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2594 #endif /* OBJ_ELF */
2599 * Summary of parse_toc_entry.
2601 * in: Input_line_pointer points to the '[' in one of:
2603 * [toc] [tocv] [toc32] [toc64]
2605 * Anything else is an error of one kind or another.
2608 * return value: success or failure
2609 * toc_kind: kind of toc reference
2610 * input_line_pointer:
2611 * success: first char after the ']'
2612 * failure: unchanged
2616 * [toc] - rv == success, toc_kind = default_toc
2617 * [tocv] - rv == success, toc_kind = data_in_toc
2618 * [toc32] - rv == success, toc_kind = must_be_32
2619 * [toc64] - rv == success, toc_kind = must_be_64
2623 enum toc_size_qualifier
2625 default_toc
, /* The toc cell constructed should be the system default size */
2626 data_in_toc
, /* This is a direct reference to a toc cell */
2627 must_be_32
, /* The toc cell constructed must be 32 bits wide */
2628 must_be_64
/* The toc cell constructed must be 64 bits wide */
2632 parse_toc_entry (enum toc_size_qualifier
*toc_kind
)
2637 enum toc_size_qualifier t
;
2639 /* Save the input_line_pointer. */
2640 start
= input_line_pointer
;
2642 /* Skip over the '[' , and whitespace. */
2643 ++input_line_pointer
;
2646 /* Find the spelling of the operand. */
2647 c
= get_symbol_name (&toc_spec
);
2649 if (strcmp (toc_spec
, "toc") == 0)
2653 else if (strcmp (toc_spec
, "tocv") == 0)
2657 else if (strcmp (toc_spec
, "toc32") == 0)
2661 else if (strcmp (toc_spec
, "toc64") == 0)
2667 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec
);
2668 *input_line_pointer
= c
;
2669 input_line_pointer
= start
;
2673 /* Now find the ']'. */
2674 *input_line_pointer
= c
;
2676 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2677 c
= *input_line_pointer
++; /* input_line_pointer->past char in c. */
2681 as_bad (_("syntax error: expected `]', found `%c'"), c
);
2682 input_line_pointer
= start
;
2691 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2692 /* See whether a symbol is in the TOC section. */
2695 ppc_is_toc_sym (symbolS
*sym
)
2698 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2699 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2702 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2704 return strcmp (sname
, ".toc") == 0;
2706 return strcmp (sname
, ".got") == 0;
2709 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2713 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2715 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2719 /* Check we don't already exist. */
2720 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2721 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2724 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2726 if (ppc_apuinfo_num_alloc
== 0)
2728 ppc_apuinfo_num_alloc
= 4;
2729 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2733 ppc_apuinfo_num_alloc
+= 4;
2734 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2735 ppc_apuinfo_num_alloc
);
2738 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2744 /* We need to keep a list of fixups. We can't simply generate them as
2745 we go, because that would require us to first create the frag, and
2746 that would screw up references to ``.''. */
2752 bfd_reloc_code_real_type reloc
;
2755 #define MAX_INSN_FIXUPS (5)
2757 /* Return the field size operated on by RELOC, and whether it is
2758 pc-relative in PC_RELATIVE. */
2761 fixup_size (bfd_reloc_code_real_type reloc
, bfd_boolean
*pc_relative
)
2763 unsigned int size
= 0;
2764 bfd_boolean pcrel
= FALSE
;
2768 /* This switch statement must handle all BFD_RELOC values
2769 possible in instruction fixups. As is, it handles all
2770 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c,
2771 bfd/coff-ppc, bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
2772 Overkill since data and marker relocs need not be handled
2773 here, but this way we can be sure a needed fixup reloc isn't
2774 accidentally omitted. */
2775 case BFD_RELOC_PPC_EMB_MRKREF
:
2776 case BFD_RELOC_VTABLE_ENTRY
:
2777 case BFD_RELOC_VTABLE_INHERIT
:
2785 case BFD_RELOC_16_BASEREL
:
2786 case BFD_RELOC_16_GOTOFF
:
2787 case BFD_RELOC_GPREL16
:
2788 case BFD_RELOC_HI16
:
2789 case BFD_RELOC_HI16_BASEREL
:
2790 case BFD_RELOC_HI16_GOTOFF
:
2791 case BFD_RELOC_HI16_PLTOFF
:
2792 case BFD_RELOC_HI16_S
:
2793 case BFD_RELOC_HI16_S_BASEREL
:
2794 case BFD_RELOC_HI16_S_GOTOFF
:
2795 case BFD_RELOC_HI16_S_PLTOFF
:
2796 case BFD_RELOC_LO16
:
2797 case BFD_RELOC_LO16_BASEREL
:
2798 case BFD_RELOC_LO16_GOTOFF
:
2799 case BFD_RELOC_LO16_PLTOFF
:
2800 case BFD_RELOC_PPC64_ADDR16_DS
:
2801 case BFD_RELOC_PPC64_ADDR16_HIGH
:
2802 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
2803 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
2804 case BFD_RELOC_PPC64_DTPREL16_DS
:
2805 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
2806 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
2807 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
2808 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
2809 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
2810 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
2811 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
2812 case BFD_RELOC_PPC64_GOT16_DS
:
2813 case BFD_RELOC_PPC64_GOT16_LO_DS
:
2814 case BFD_RELOC_PPC64_HIGHER
:
2815 case BFD_RELOC_PPC64_HIGHER_S
:
2816 case BFD_RELOC_PPC64_HIGHEST
:
2817 case BFD_RELOC_PPC64_HIGHEST_S
:
2818 case BFD_RELOC_PPC64_PLT16_LO_DS
:
2819 case BFD_RELOC_PPC64_PLTGOT16
:
2820 case BFD_RELOC_PPC64_PLTGOT16_DS
:
2821 case BFD_RELOC_PPC64_PLTGOT16_HA
:
2822 case BFD_RELOC_PPC64_PLTGOT16_HI
:
2823 case BFD_RELOC_PPC64_PLTGOT16_LO
:
2824 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
2825 case BFD_RELOC_PPC64_SECTOFF_DS
:
2826 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
2827 case BFD_RELOC_PPC64_TOC16_DS
:
2828 case BFD_RELOC_PPC64_TOC16_HA
:
2829 case BFD_RELOC_PPC64_TOC16_HI
:
2830 case BFD_RELOC_PPC64_TOC16_LO
:
2831 case BFD_RELOC_PPC64_TOC16_LO_DS
:
2832 case BFD_RELOC_PPC64_TPREL16_DS
:
2833 case BFD_RELOC_PPC64_TPREL16_HIGH
:
2834 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
2835 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
2836 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
2837 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
2838 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
2839 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
2841 case BFD_RELOC_PPC_BA16
:
2843 case BFD_RELOC_PPC_DTPREL16
:
2844 case BFD_RELOC_PPC_DTPREL16_HA
:
2845 case BFD_RELOC_PPC_DTPREL16_HI
:
2846 case BFD_RELOC_PPC_DTPREL16_LO
:
2847 case BFD_RELOC_PPC_EMB_NADDR16
:
2848 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
2849 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
2850 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
2851 case BFD_RELOC_PPC_EMB_RELSDA
:
2852 case BFD_RELOC_PPC_EMB_RELSEC16
:
2853 case BFD_RELOC_PPC_EMB_RELST_LO
:
2854 case BFD_RELOC_PPC_EMB_RELST_HI
:
2855 case BFD_RELOC_PPC_EMB_RELST_HA
:
2856 case BFD_RELOC_PPC_EMB_SDA2I16
:
2857 case BFD_RELOC_PPC_EMB_SDA2REL
:
2858 case BFD_RELOC_PPC_EMB_SDAI16
:
2859 case BFD_RELOC_PPC_GOT_DTPREL16
:
2860 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2861 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2862 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2863 case BFD_RELOC_PPC_GOT_TLSGD16
:
2864 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2865 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2866 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2867 case BFD_RELOC_PPC_GOT_TLSLD16
:
2868 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2869 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2870 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2871 case BFD_RELOC_PPC_GOT_TPREL16
:
2872 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2873 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2874 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2875 case BFD_RELOC_PPC_TOC16
:
2876 case BFD_RELOC_PPC_TPREL16
:
2877 case BFD_RELOC_PPC_TPREL16_HA
:
2878 case BFD_RELOC_PPC_TPREL16_HI
:
2879 case BFD_RELOC_PPC_TPREL16_LO
:
2883 case BFD_RELOC_16_PCREL
:
2884 case BFD_RELOC_HI16_PCREL
:
2885 case BFD_RELOC_HI16_S_PCREL
:
2886 case BFD_RELOC_LO16_PCREL
:
2887 case BFD_RELOC_PPC64_REL16_HIGH
:
2888 case BFD_RELOC_PPC64_REL16_HIGHA
:
2889 case BFD_RELOC_PPC64_REL16_HIGHER
:
2890 case BFD_RELOC_PPC64_REL16_HIGHERA
:
2891 case BFD_RELOC_PPC64_REL16_HIGHEST
:
2892 case BFD_RELOC_PPC64_REL16_HIGHESTA
:
2894 case BFD_RELOC_PPC_B16
:
2896 case BFD_RELOC_PPC_VLE_REL8
:
2901 case BFD_RELOC_16_GOT_PCREL
: /* coff reloc, bad name re size. */
2903 case BFD_RELOC_32_GOTOFF
:
2904 case BFD_RELOC_32_PLTOFF
:
2906 case BFD_RELOC_CTOR
:
2908 case BFD_RELOC_PPC64_ENTRY
:
2909 case BFD_RELOC_PPC_16DX_HA
:
2911 case BFD_RELOC_PPC_BA16
:
2913 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
2914 case BFD_RELOC_PPC_BA16_BRTAKEN
:
2915 case BFD_RELOC_PPC_BA26
:
2916 case BFD_RELOC_PPC_EMB_BIT_FLD
:
2917 case BFD_RELOC_PPC_EMB_NADDR32
:
2918 case BFD_RELOC_PPC_EMB_SDA21
:
2919 case BFD_RELOC_PPC_TLS
:
2920 case BFD_RELOC_PPC_TLSGD
:
2921 case BFD_RELOC_PPC_TLSLD
:
2922 case BFD_RELOC_PPC_VLE_HA16A
:
2923 case BFD_RELOC_PPC_VLE_HA16D
:
2924 case BFD_RELOC_PPC_VLE_HI16A
:
2925 case BFD_RELOC_PPC_VLE_HI16D
:
2926 case BFD_RELOC_PPC_VLE_LO16A
:
2927 case BFD_RELOC_PPC_VLE_LO16D
:
2928 case BFD_RELOC_PPC_VLE_SDA21
:
2929 case BFD_RELOC_PPC_VLE_SDA21_LO
:
2930 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
2931 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
2932 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
2933 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
2934 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
2935 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
2940 case BFD_RELOC_24_PLT_PCREL
:
2941 case BFD_RELOC_32_PCREL
:
2942 case BFD_RELOC_32_PLT_PCREL
:
2943 case BFD_RELOC_PPC64_REL24_NOTOC
:
2945 case BFD_RELOC_PPC_B16
:
2947 case BFD_RELOC_PPC_B16_BRNTAKEN
:
2948 case BFD_RELOC_PPC_B16_BRTAKEN
:
2949 case BFD_RELOC_PPC_B26
:
2950 case BFD_RELOC_PPC_LOCAL24PC
:
2951 case BFD_RELOC_PPC_REL16DX_HA
:
2952 case BFD_RELOC_PPC_VLE_REL15
:
2953 case BFD_RELOC_PPC_VLE_REL24
:
2959 case BFD_RELOC_CTOR
:
2961 case BFD_RELOC_PPC_COPY
:
2962 case BFD_RELOC_PPC_DTPMOD
:
2963 case BFD_RELOC_PPC_DTPREL
:
2964 case BFD_RELOC_PPC_GLOB_DAT
:
2965 case BFD_RELOC_PPC_TPREL
:
2966 size
= ppc_obj64
? 8 : 4;
2970 case BFD_RELOC_64_PLTOFF
:
2971 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
2972 case BFD_RELOC_PPC64_TOC
:
2976 case BFD_RELOC_64_PCREL
:
2977 case BFD_RELOC_64_PLT_PCREL
:
2986 if (ENABLE_CHECKING
)
2988 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
2989 if (reloc_howto
!= NULL
2990 && (size
!= bfd_get_reloc_size (reloc_howto
)
2991 || pcrel
!= reloc_howto
->pc_relative
))
2993 as_bad (_("%s howto doesn't match size/pcrel in gas"),
2998 *pc_relative
= pcrel
;
3002 /* This routine is called for each instruction to be assembled. */
3005 md_assemble (char *str
)
3008 const struct powerpc_opcode
*opcode
;
3010 const unsigned char *opindex_ptr
;
3013 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
3018 unsigned int insn_length
;
3020 /* Get the opcode. */
3021 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
3026 /* Look up the opcode in the hash table. */
3027 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, str
);
3028 if (opcode
== (const struct powerpc_opcode
*) NULL
)
3030 const struct powerpc_macro
*macro
;
3032 macro
= (const struct powerpc_macro
*) hash_find (ppc_macro_hash
, str
);
3033 if (macro
== (const struct powerpc_macro
*) NULL
)
3034 as_bad (_("unrecognized opcode: `%s'"), str
);
3036 ppc_macro (s
, macro
);
3041 insn
= opcode
->opcode
;
3044 while (ISSPACE (*str
))
3047 /* PowerPC operands are just expressions. The only real issue is
3048 that a few operand types are optional. If an instruction has
3049 multiple optional operands and one is omitted, then all optional
3050 operands past the first omitted one must also be omitted. */
3051 int num_optional_operands
= 0;
3052 int num_optional_provided
= 0;
3054 /* Gather the operands. */
3058 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
3060 const struct powerpc_operand
*operand
;
3066 if (next_opindex
== 0)
3067 operand
= &powerpc_operands
[*opindex_ptr
];
3070 operand
= &powerpc_operands
[next_opindex
];
3075 /* If this is an optional operand, and we are skipping it, just
3076 insert the default value, usually a zero. */
3077 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3078 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
3080 if (num_optional_operands
== 0)
3082 const unsigned char *optr
;
3088 for (optr
= opindex_ptr
; *optr
!= 0; optr
++)
3090 const struct powerpc_operand
*op
;
3091 op
= &powerpc_operands
[*optr
];
3095 if ((op
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3096 && !((op
->flags
& PPC_OPERAND_OPTIONAL32
) != 0
3098 ++num_optional_operands
;
3100 if (s
!= NULL
&& *s
!= '\0')
3104 /* Look for the start of the next operand. */
3105 if ((op
->flags
& PPC_OPERAND_PARENS
) != 0)
3106 s
= strpbrk (s
, "(,");
3108 s
= strchr (s
, ',');
3114 omitted
= total
- provided
;
3115 num_optional_provided
= num_optional_operands
- omitted
;
3117 if (--num_optional_provided
< 0)
3119 int64_t val
= ppc_optional_operand_value (operand
, insn
, ppc_cpu
,
3120 num_optional_provided
);
3121 if (operand
->insert
)
3123 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
3124 if (errmsg
!= (const char *) NULL
)
3125 as_bad ("%s", errmsg
);
3127 else if (operand
->shift
>= 0)
3128 insn
|= (val
& operand
->bitm
) << operand
->shift
;
3130 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
3132 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
3133 next_opindex
= *opindex_ptr
+ 1;
3138 /* Gather the operand. */
3139 hold
= input_line_pointer
;
3140 input_line_pointer
= str
;
3143 if (*input_line_pointer
== '[')
3145 /* We are expecting something like the second argument here:
3147 * lwz r4,[toc].GS.0.static_int(rtoc)
3148 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
3149 * The argument following the `]' must be a symbol name, and the
3150 * register must be the toc register: 'rtoc' or '2'
3152 * The effect is to 0 as the displacement field
3153 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
3154 * the appropriate variation) reloc against it based on the symbol.
3155 * The linker will build the toc, and insert the resolved toc offset.
3158 * o The size of the toc entry is currently assumed to be
3159 * 32 bits. This should not be assumed to be a hard coded
3161 * o In an effort to cope with a change from 32 to 64 bits,
3162 * there are also toc entries that are specified to be
3163 * either 32 or 64 bits:
3164 * lwz r4,[toc32].GS.0.static_int(rtoc)
3165 * lwz r4,[toc64].GS.0.static_int(rtoc)
3166 * These demand toc entries of the specified size, and the
3167 * instruction probably requires it.
3171 enum toc_size_qualifier toc_kind
;
3172 bfd_reloc_code_real_type toc_reloc
;
3174 /* Go parse off the [tocXX] part. */
3175 valid_toc
= parse_toc_entry (&toc_kind
);
3179 ignore_rest_of_line ();
3183 /* Now get the symbol following the ']'. */
3189 /* In this case, we may not have seen the symbol yet,
3190 since it is allowed to appear on a .extern or .globl
3191 or just be a label in the .data section. */
3192 toc_reloc
= BFD_RELOC_PPC_TOC16
;
3195 /* 1. The symbol must be defined and either in the toc
3196 section, or a global.
3197 2. The reloc generated must have the TOCDEFN flag set
3198 in upper bit mess of the reloc type.
3199 FIXME: It's a little confusing what the tocv
3200 qualifier can be used for. At the very least, I've
3201 seen three uses, only one of which I'm sure I can
3203 if (ex
.X_op
== O_symbol
)
3205 gas_assert (ex
.X_add_symbol
!= NULL
);
3206 if (symbol_get_bfdsym (ex
.X_add_symbol
)->section
3209 as_bad (_("[tocv] symbol is not a toc symbol"));
3213 toc_reloc
= BFD_RELOC_PPC_TOC16
;
3216 /* FIXME: these next two specifically specify 32/64 bit
3217 toc entries. We don't support them today. Is this
3218 the right way to say that? */
3219 toc_reloc
= BFD_RELOC_NONE
;
3220 as_bad (_("unimplemented toc32 expression modifier"));
3223 /* FIXME: see above. */
3224 toc_reloc
= BFD_RELOC_NONE
;
3225 as_bad (_("unimplemented toc64 expression modifier"));
3229 _("Unexpected return value [%d] from parse_toc_entry!\n"),
3235 /* We need to generate a fixup for this expression. */
3236 if (fc
>= MAX_INSN_FIXUPS
)
3237 as_fatal (_("too many fixups"));
3239 fixups
[fc
].reloc
= toc_reloc
;
3240 fixups
[fc
].exp
= ex
;
3241 fixups
[fc
].opindex
= *opindex_ptr
;
3244 /* Ok. We've set up the fixup for the instruction. Now make it
3245 look like the constant 0 was found here. */
3247 ex
.X_op
= O_constant
;
3248 ex
.X_add_number
= 0;
3249 ex
.X_add_symbol
= NULL
;
3250 ex
.X_op_symbol
= NULL
;
3257 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3258 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
3259 || !register_name (&ex
))
3261 char save_lex
= lex_type
['%'];
3263 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
3264 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3267 lex_type
['%'] |= LEX_BEGIN_NAME
;
3271 lex_type
['%'] = save_lex
;
3275 str
= input_line_pointer
;
3276 input_line_pointer
= hold
;
3278 if (ex
.X_op
== O_illegal
)
3279 as_bad (_("illegal operand"));
3280 else if (ex
.X_op
== O_absent
)
3281 as_bad (_("missing operand"));
3282 else if (ex
.X_op
== O_register
)
3286 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3287 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3288 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
)) != 0
3289 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3290 && ex
.X_add_number
!= 0
3291 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3292 as_warn (_("invalid register expression"));
3293 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3294 ppc_cpu
, (char *) NULL
, 0);
3296 else if (ex
.X_op
== O_constant
)
3299 /* Allow @HA, @L, @H on constants. */
3300 bfd_reloc_code_real_type reloc
;
3301 char *orig_str
= str
;
3303 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3310 case BFD_RELOC_LO16
:
3311 ex
.X_add_number
&= 0xffff;
3312 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3313 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3316 case BFD_RELOC_HI16
:
3317 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3319 /* PowerPC64 @h is tested for overflow. */
3320 ex
.X_add_number
= (addressT
) ex
.X_add_number
>> 16;
3321 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3323 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3325 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3331 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3332 ex
.X_add_number
= PPC_HI (ex
.X_add_number
);
3333 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3334 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3337 case BFD_RELOC_HI16_S
:
3338 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3340 /* PowerPC64 @ha is tested for overflow. */
3342 = ((addressT
) ex
.X_add_number
+ 0x8000) >> 16;
3343 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3345 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3347 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3353 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3354 ex
.X_add_number
= PPC_HA (ex
.X_add_number
);
3355 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3356 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3359 case BFD_RELOC_PPC64_HIGHER
:
3360 ex
.X_add_number
= PPC_HIGHER (ex
.X_add_number
);
3361 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3362 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3365 case BFD_RELOC_PPC64_HIGHER_S
:
3366 ex
.X_add_number
= PPC_HIGHERA (ex
.X_add_number
);
3367 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3368 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3371 case BFD_RELOC_PPC64_HIGHEST
:
3372 ex
.X_add_number
= PPC_HIGHEST (ex
.X_add_number
);
3373 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3374 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3377 case BFD_RELOC_PPC64_HIGHEST_S
:
3378 ex
.X_add_number
= PPC_HIGHESTA (ex
.X_add_number
);
3379 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3380 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3383 #endif /* OBJ_ELF */
3384 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3385 ppc_cpu
, (char *) NULL
, 0);
3389 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3391 if (ex
.X_op
== O_symbol
&& str
[0] == '(')
3393 const char *sym_name
= S_GET_NAME (ex
.X_add_symbol
);
3394 if (sym_name
[0] == '.')
3397 if (strcasecmp (sym_name
, "__tls_get_addr") == 0)
3399 expressionS tls_exp
;
3401 hold
= input_line_pointer
;
3402 input_line_pointer
= str
+ 1;
3403 expression (&tls_exp
);
3404 if (tls_exp
.X_op
== O_symbol
)
3406 reloc
= BFD_RELOC_NONE
;
3407 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3409 reloc
= BFD_RELOC_PPC_TLSGD
;
3410 input_line_pointer
+= 7;
3412 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3414 reloc
= BFD_RELOC_PPC_TLSLD
;
3415 input_line_pointer
+= 7;
3417 if (reloc
!= BFD_RELOC_NONE
)
3420 str
= input_line_pointer
;
3422 if (fc
>= MAX_INSN_FIXUPS
)
3423 as_fatal (_("too many fixups"));
3424 fixups
[fc
].exp
= tls_exp
;
3425 fixups
[fc
].opindex
= *opindex_ptr
;
3426 fixups
[fc
].reloc
= reloc
;
3430 input_line_pointer
= hold
;
3434 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3436 /* Some TLS tweaks. */
3442 case BFD_RELOC_PPC_TLS
:
3443 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3444 as_bad (_("@tls may not be used with \"%s\" operands"),
3446 else if (operand
->shift
!= 11)
3447 as_bad (_("@tls may only be used in last operand"));
3449 insn
= ppc_insert_operand (insn
, operand
,
3451 ppc_cpu
, (char *) NULL
, 0);
3454 /* We'll only use the 32 (or 64) bit form of these relocations
3455 in constants. Instructions get the 16 bit form. */
3456 case BFD_RELOC_PPC_DTPREL
:
3457 reloc
= BFD_RELOC_PPC_DTPREL16
;
3459 case BFD_RELOC_PPC_TPREL
:
3460 reloc
= BFD_RELOC_PPC_TPREL16
;
3465 if (opcode
->opcode
== (19 << 26) + (2 << 1)
3466 && reloc
== BFD_RELOC_HI16_S
)
3467 reloc
= BFD_RELOC_PPC_16DX_HA
;
3469 /* If VLE-mode convert LO/HI/HA relocations. */
3470 if (opcode
->flags
& PPC_OPCODE_VLE
)
3472 uint64_t tmp_insn
= insn
& opcode
->mask
;
3474 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3475 || tmp_insn
== E_AND2I_DOT_INSN
3476 || tmp_insn
== E_OR2IS_INSN
3477 || tmp_insn
== E_LIS_INSN
3478 || tmp_insn
== E_AND2IS_DOT_INSN
);
3481 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3482 || tmp_insn
== E_ADD2IS_INSN
3483 || tmp_insn
== E_CMP16I_INSN
3484 || tmp_insn
== E_MULL2I_INSN
3485 || tmp_insn
== E_CMPL16I_INSN
3486 || tmp_insn
== E_CMPH16I_INSN
3487 || tmp_insn
== E_CMPHL16I_INSN
);
3494 case BFD_RELOC_PPC_EMB_SDA21
:
3495 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3498 case BFD_RELOC_LO16
:
3500 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3501 else if (use_a_reloc
)
3502 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3505 case BFD_RELOC_HI16
:
3507 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3508 else if (use_a_reloc
)
3509 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3512 case BFD_RELOC_HI16_S
:
3514 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3515 else if (use_a_reloc
)
3516 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3519 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3521 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3524 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3526 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3529 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3531 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3536 #endif /* OBJ_ELF */
3538 if (reloc
!= BFD_RELOC_NONE
)
3540 /* Determine a BFD reloc value based on the operand information.
3541 We are only prepared to turn a few of the operands into
3543 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3544 | PPC_OPERAND_ABSOLUTE
)) != 0
3545 && operand
->bitm
== 0x3fffffc
3546 && operand
->shift
== 0)
3547 reloc
= BFD_RELOC_PPC_B26
;
3548 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3549 | PPC_OPERAND_ABSOLUTE
)) != 0
3550 && operand
->bitm
== 0xfffc
3551 && operand
->shift
== 0)
3552 reloc
= BFD_RELOC_PPC_B16
;
3553 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3554 && operand
->bitm
== 0x1fe
3555 && operand
->shift
== -1)
3556 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3557 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3558 && operand
->bitm
== 0xfffe
3559 && operand
->shift
== 0)
3560 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3561 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3562 && operand
->bitm
== 0x1fffffe
3563 && operand
->shift
== 0)
3564 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3565 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3566 && (operand
->bitm
& 0xfff0) == 0xfff0
3567 && operand
->shift
== 0)
3569 reloc
= BFD_RELOC_16
;
3570 #if defined OBJ_XCOFF || defined OBJ_ELF
3571 /* Note: the symbol may be not yet defined. */
3572 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3573 && ppc_is_toc_sym (ex
.X_add_symbol
))
3575 reloc
= BFD_RELOC_PPC_TOC16
;
3577 as_warn (_("assuming %s on symbol"),
3578 ppc_obj64
? "@toc" : "@xgot");
3584 /* For the absolute forms of branches, convert the PC
3585 relative form back into the absolute. */
3586 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3590 case BFD_RELOC_PPC_B26
:
3591 reloc
= BFD_RELOC_PPC_BA26
;
3593 case BFD_RELOC_PPC_B16
:
3594 reloc
= BFD_RELOC_PPC_BA16
;
3597 case BFD_RELOC_PPC_B16_BRTAKEN
:
3598 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3600 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3601 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3612 case BFD_RELOC_PPC_TOC16
:
3613 toc_reloc_types
|= has_small_toc_reloc
;
3615 case BFD_RELOC_PPC64_TOC16_LO
:
3616 case BFD_RELOC_PPC64_TOC16_HI
:
3617 case BFD_RELOC_PPC64_TOC16_HA
:
3618 toc_reloc_types
|= has_large_toc_reloc
;
3625 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3630 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3632 case BFD_RELOC_LO16
:
3633 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3635 case BFD_RELOC_16_GOTOFF
:
3636 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3638 case BFD_RELOC_LO16_GOTOFF
:
3639 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3641 case BFD_RELOC_LO16_PLTOFF
:
3642 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3644 case BFD_RELOC_16_BASEREL
:
3645 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3647 case BFD_RELOC_LO16_BASEREL
:
3648 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3650 case BFD_RELOC_PPC_TOC16
:
3651 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3653 case BFD_RELOC_PPC64_TOC16_LO
:
3654 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3656 case BFD_RELOC_PPC64_PLTGOT16
:
3657 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3659 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3660 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3662 case BFD_RELOC_PPC_DTPREL16
:
3663 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3665 case BFD_RELOC_PPC_DTPREL16_LO
:
3666 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3668 case BFD_RELOC_PPC_TPREL16
:
3669 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3671 case BFD_RELOC_PPC_TPREL16_LO
:
3672 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3674 case BFD_RELOC_PPC_GOT_DTPREL16
:
3675 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3676 case BFD_RELOC_PPC_GOT_TPREL16
:
3677 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3680 as_bad (_("unsupported relocation for DS offset field"));
3686 /* We need to generate a fixup for this expression. */
3687 if (fc
>= MAX_INSN_FIXUPS
)
3688 as_fatal (_("too many fixups"));
3689 fixups
[fc
].exp
= ex
;
3690 fixups
[fc
].opindex
= *opindex_ptr
;
3691 fixups
[fc
].reloc
= reloc
;
3699 /* If expecting more operands, then we want to see "),". */
3700 if (*str
== endc
&& opindex_ptr
[1] != 0)
3704 while (ISSPACE (*str
));
3708 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
3713 /* The call to expression should have advanced str past any
3721 else if (*str
!= '\0')
3723 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
3726 else if (endc
== ')')
3728 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
3733 while (ISSPACE (*str
))
3737 as_bad (_("junk at end of line: `%s'"), str
);
3740 /* Do we need/want an APUinfo section? */
3741 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
3744 /* These are all version "1". */
3745 if (opcode
->flags
& PPC_OPCODE_SPE
)
3746 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
3747 if (opcode
->flags
& PPC_OPCODE_ISEL
)
3748 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
3749 if (opcode
->flags
& PPC_OPCODE_EFS
)
3750 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
3751 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
3752 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
3753 if (opcode
->flags
& PPC_OPCODE_PMR
)
3754 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
3755 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
3756 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
3757 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
3758 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
3759 /* Only set the VLE flag if the instruction has been pulled via
3760 the VLE instruction set. This way the flag is guaranteed to
3761 be set for VLE-only instructions or for VLE-only processors,
3762 however it'll remain clear for dual-mode instructions on
3763 dual-mode and, more importantly, standard-mode processors. */
3764 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
3766 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
3767 if (elf_section_data (now_seg
) != NULL
)
3768 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
3773 /* Write out the instruction. */
3776 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
3777 /* All instructions can start on a 2 byte boundary for VLE. */
3780 if (frag_now
->insn_addr
!= addr_mask
)
3782 /* Don't emit instructions to a frag started for data, or for a
3783 CPU differing in VLE mode. Data is allowed to be misaligned,
3784 and it's possible to start a new frag in the middle of
3786 frag_wane (frag_now
);
3790 /* Check that insns within the frag are aligned. ppc_frag_check
3791 will ensure that the frag start address is aligned. */
3792 if ((frag_now_fix () & addr_mask
) != 0)
3793 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
3795 /* Differentiate between two and four byte insns. */
3797 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
3800 f
= frag_more (insn_length
);
3801 frag_now
->insn_addr
= addr_mask
;
3802 md_number_to_chars (f
, insn
, insn_length
);
3805 last_subseg
= now_subseg
;
3808 dwarf2_emit_insn (insn_length
);
3811 /* Create any fixups. */
3812 for (i
= 0; i
< fc
; i
++)
3815 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
3818 unsigned int size
= fixup_size (fixups
[i
].reloc
, &pcrel
);
3819 int offset
= target_big_endian
? (insn_length
- size
) : 0;
3821 fixP
= fix_new_exp (frag_now
,
3822 f
- frag_now
->fr_literal
+ offset
,
3830 const struct powerpc_operand
*operand
;
3832 operand
= &powerpc_operands
[fixups
[i
].opindex
];
3833 fixP
= fix_new_exp (frag_now
,
3834 f
- frag_now
->fr_literal
,
3837 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
3840 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
3844 /* Handle a macro. Gather all the operands, transform them as
3845 described by the macro, and call md_assemble recursively. All the
3846 operands are separated by commas; we don't accept parentheses
3847 around operands here. */
3850 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
3861 /* Gather the users operands into the operands array. */
3866 if (count
>= sizeof operands
/ sizeof operands
[0])
3868 operands
[count
++] = s
;
3869 s
= strchr (s
, ',');
3870 if (s
== (char *) NULL
)
3875 if (count
!= macro
->operands
)
3877 as_bad (_("wrong number of operands"));
3881 /* Work out how large the string must be (the size is unbounded
3882 because it includes user input). */
3884 format
= macro
->format
;
3885 while (*format
!= '\0')
3894 arg
= strtol (format
+ 1, &send
, 10);
3895 know (send
!= format
&& arg
< count
);
3896 len
+= strlen (operands
[arg
]);
3901 /* Put the string together. */
3902 complete
= s
= XNEWVEC (char, len
+ 1);
3903 format
= macro
->format
;
3904 while (*format
!= '\0')
3910 arg
= strtol (format
+ 1, &send
, 10);
3911 strcpy (s
, operands
[arg
]);
3918 /* Assemble the constructed instruction. */
3919 md_assemble (complete
);
3924 /* For ELF, add support for SHT_ORDERED. */
3927 ppc_section_type (char *str
, size_t len
)
3929 if (len
== 7 && strncmp (str
, "ordered", 7) == 0)
3936 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
3938 if (type
== SHT_ORDERED
)
3939 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
3945 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
3950 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
3953 #endif /* OBJ_ELF */
3956 /* Pseudo-op handling. */
3958 /* The .byte pseudo-op. This is similar to the normal .byte
3959 pseudo-op, but it can also take a single ASCII string. */
3962 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
3966 if (*input_line_pointer
!= '\"')
3972 /* Gather characters. A real double quote is doubled. Unusual
3973 characters are not permitted. */
3974 ++input_line_pointer
;
3979 c
= *input_line_pointer
++;
3983 if (*input_line_pointer
!= '\"')
3985 ++input_line_pointer
;
3988 FRAG_APPEND_1_CHAR (c
);
3992 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
3993 as_warn (_("data in executable section"));
3994 demand_empty_rest_of_line ();
3999 /* XCOFF specific pseudo-op handling. */
4001 /* This is set if we are creating a .stabx symbol, since we don't want
4002 to handle symbol suffixes for such symbols. */
4003 static bfd_boolean ppc_stab_symbol
;
4005 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
4006 symbols in the .bss segment as though they were local common
4007 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
4008 aligns .comm and .lcomm to 4 bytes. */
4011 ppc_comm (int lcomm
)
4013 asection
*current_seg
= now_seg
;
4014 subsegT current_subseg
= now_subseg
;
4020 symbolS
*lcomm_sym
= NULL
;
4024 endc
= get_symbol_name (&name
);
4025 end_name
= input_line_pointer
;
4026 (void) restore_line_pointer (endc
);
4028 if (*input_line_pointer
!= ',')
4030 as_bad (_("missing size"));
4031 ignore_rest_of_line ();
4034 ++input_line_pointer
;
4036 size
= get_absolute_expression ();
4039 as_bad (_("negative size"));
4040 ignore_rest_of_line ();
4046 /* The third argument to .comm is the alignment. */
4047 if (*input_line_pointer
!= ',')
4051 ++input_line_pointer
;
4052 align
= get_absolute_expression ();
4055 as_warn (_("ignoring bad alignment"));
4065 /* The third argument to .lcomm appears to be the real local
4066 common symbol to create. References to the symbol named in
4067 the first argument are turned into references to the third
4069 if (*input_line_pointer
!= ',')
4071 as_bad (_("missing real symbol name"));
4072 ignore_rest_of_line ();
4075 ++input_line_pointer
;
4077 lcomm_endc
= get_symbol_name (&lcomm_name
);
4079 lcomm_sym
= symbol_find_or_make (lcomm_name
);
4081 (void) restore_line_pointer (lcomm_endc
);
4083 /* The fourth argument to .lcomm is the alignment. */
4084 if (*input_line_pointer
!= ',')
4093 ++input_line_pointer
;
4094 align
= get_absolute_expression ();
4097 as_warn (_("ignoring bad alignment"));
4104 sym
= symbol_find_or_make (name
);
4107 if (S_IS_DEFINED (sym
)
4108 || S_GET_VALUE (sym
) != 0)
4110 as_bad (_("attempt to redefine symbol"));
4111 ignore_rest_of_line ();
4115 record_alignment (bss_section
, align
);
4118 || ! S_IS_DEFINED (lcomm_sym
))
4127 S_SET_EXTERNAL (sym
);
4131 symbol_get_tc (lcomm_sym
)->output
= 1;
4132 def_sym
= lcomm_sym
;
4136 subseg_set (bss_section
, 1);
4137 frag_align (align
, 0, 0);
4139 symbol_set_frag (def_sym
, frag_now
);
4140 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
4141 def_size
, (char *) NULL
);
4143 S_SET_SEGMENT (def_sym
, bss_section
);
4144 symbol_get_tc (def_sym
)->align
= align
;
4148 /* Align the size of lcomm_sym. */
4149 symbol_get_frag (lcomm_sym
)->fr_offset
=
4150 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
4151 &~ ((1 << align
) - 1));
4152 if (align
> symbol_get_tc (lcomm_sym
)->align
)
4153 symbol_get_tc (lcomm_sym
)->align
= align
;
4158 /* Make sym an offset from lcomm_sym. */
4159 S_SET_SEGMENT (sym
, bss_section
);
4160 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
4161 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
4162 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
4165 subseg_set (current_seg
, current_subseg
);
4167 demand_empty_rest_of_line ();
4170 /* The .csect pseudo-op. This switches us into a different
4171 subsegment. The first argument is a symbol whose value is the
4172 start of the .csect. In COFF, csect symbols get special aux
4173 entries defined by the x_csect field of union internal_auxent. The
4174 optional second argument is the alignment (the default is 2). */
4177 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
4184 endc
= get_symbol_name (&name
);
4186 sym
= symbol_find_or_make (name
);
4188 (void) restore_line_pointer (endc
);
4190 if (S_GET_NAME (sym
)[0] == '\0')
4192 /* An unnamed csect is assumed to be [PR]. */
4193 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
4197 if (*input_line_pointer
== ',')
4199 ++input_line_pointer
;
4200 align
= get_absolute_expression ();
4203 ppc_change_csect (sym
, align
);
4205 demand_empty_rest_of_line ();
4208 /* Change to a different csect. */
4211 ppc_change_csect (symbolS
*sym
, offsetT align
)
4213 if (S_IS_DEFINED (sym
))
4214 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
4224 /* This is a new csect. We need to look at the symbol class to
4225 figure out whether it should go in the text section or the
4229 switch (symbol_get_tc (sym
)->symbol_class
)
4239 S_SET_SEGMENT (sym
, text_section
);
4240 symbol_get_tc (sym
)->subseg
= ppc_text_subsegment
;
4241 ++ppc_text_subsegment
;
4242 list_ptr
= &ppc_text_csects
;
4252 if (ppc_toc_csect
!= NULL
4253 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4254 == ppc_data_subsegment
))
4256 S_SET_SEGMENT (sym
, data_section
);
4257 symbol_get_tc (sym
)->subseg
= ppc_data_subsegment
;
4258 ++ppc_data_subsegment
;
4259 list_ptr
= &ppc_data_csects
;
4265 /* We set the obstack chunk size to a small value before
4266 changing subsegments, so that we don't use a lot of memory
4267 space for what may be a small section. */
4268 hold_chunksize
= chunksize
;
4271 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4272 symbol_get_tc (sym
)->subseg
);
4274 chunksize
= hold_chunksize
;
4277 ppc_after_toc_frag
= frag_now
;
4279 record_alignment (sec
, align
);
4281 frag_align_code (align
, 0);
4283 frag_align (align
, 0, 0);
4285 symbol_set_frag (sym
, frag_now
);
4286 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4288 symbol_get_tc (sym
)->align
= align
;
4289 symbol_get_tc (sym
)->output
= 1;
4290 symbol_get_tc (sym
)->within
= sym
;
4292 for (list
= *list_ptr
;
4293 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4294 list
= symbol_get_tc (list
)->next
)
4296 symbol_get_tc (list
)->next
= sym
;
4298 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4299 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4303 ppc_current_csect
= sym
;
4307 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4311 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4313 sec
= subseg_new (dw
->name
, subseg
);
4314 oldflags
= bfd_get_section_flags (stdoutput
, sec
);
4315 if (oldflags
== SEC_NO_FLAGS
)
4317 /* Just created section. */
4318 gas_assert (dw_sections
[idx
].sect
== NULL
);
4320 bfd_set_section_flags (stdoutput
, sec
, SEC_DEBUGGING
);
4321 bfd_set_section_alignment (stdoutput
, sec
, 0);
4322 dw_sections
[idx
].sect
= sec
;
4325 /* Not anymore in a csect. */
4326 ppc_current_csect
= NULL
;
4329 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4330 .dwsect flag [, opt-label ]
4334 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4338 const struct xcoff_dwsect_name
*dw
;
4339 struct dw_subsection
*subseg
;
4340 struct dw_section
*dws
;
4344 flag
= get_absolute_expression ();
4346 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4347 if (xcoff_dwsect_names
[i
].flag
== flag
)
4349 dw
= &xcoff_dwsect_names
[i
];
4353 /* Parse opt-label. */
4354 if (*input_line_pointer
== ',')
4359 ++input_line_pointer
;
4361 c
= get_symbol_name (&label
);
4362 opt_label
= symbol_find_or_make (label
);
4363 (void) restore_line_pointer (c
);
4368 demand_empty_rest_of_line ();
4370 /* Return now in case of unknown subsection. */
4373 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4378 /* Find the subsection. */
4379 dws
= &dw_sections
[i
];
4381 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4383 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4384 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4386 as_bad (_("label %s was not defined in this dwarf section"),
4387 S_GET_NAME (opt_label
));
4388 subseg
= dws
->anon_subseg
;
4392 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4397 /* Switch to the subsection. */
4398 ppc_change_debug_section (i
, subseg
->subseg
);
4402 /* Create a new dw subsection. */
4403 subseg
= XNEW (struct dw_subsection
);
4405 if (opt_label
== NULL
)
4407 /* The anonymous one. */
4409 subseg
->link
= NULL
;
4410 dws
->anon_subseg
= subseg
;
4415 if (dws
->list_subseg
!= NULL
)
4416 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4420 subseg
->link
= dws
->list_subseg
;
4421 dws
->list_subseg
= subseg
;
4422 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4425 ppc_change_debug_section (i
, subseg
->subseg
);
4429 /* Add the length field. */
4430 expressionS
*exp
= &subseg
->end_exp
;
4433 if (opt_label
!= NULL
)
4434 symbol_set_value_now (opt_label
);
4436 /* Add the length field. Note that according to the AIX assembler
4437 manual, the size of the length field is 4 for powerpc32 but
4438 12 for powerpc64. */
4441 /* Write the 64bit marker. */
4442 md_number_to_chars (frag_more (4), -1, 4);
4445 exp
->X_op
= O_subtract
;
4446 exp
->X_op_symbol
= symbol_temp_new_now ();
4447 exp
->X_add_symbol
= symbol_temp_make ();
4449 sz
= ppc_obj64
? 8 : 4;
4450 exp
->X_add_number
= -sz
;
4451 emit_expr (exp
, sz
);
4456 /* This function handles the .text and .data pseudo-ops. These
4457 pseudo-ops aren't really used by XCOFF; we implement them for the
4458 convenience of people who aren't used to XCOFF. */
4461 ppc_section (int type
)
4468 else if (type
== 'd')
4473 sym
= symbol_find_or_make (name
);
4475 ppc_change_csect (sym
, 2);
4477 demand_empty_rest_of_line ();
4480 /* This function handles the .section pseudo-op. This is mostly to
4481 give an error, since XCOFF only supports .text, .data and .bss, but
4482 we do permit the user to name the text or data section. */
4485 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4488 const char *real_name
;
4492 c
= get_symbol_name (&user_name
);
4494 if (strcmp (user_name
, ".text") == 0)
4495 real_name
= ".text[PR]";
4496 else if (strcmp (user_name
, ".data") == 0)
4497 real_name
= ".data[RW]";
4500 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4501 (void) restore_line_pointer (c
);
4502 ignore_rest_of_line ();
4506 (void) restore_line_pointer (c
);
4508 sym
= symbol_find_or_make (real_name
);
4510 ppc_change_csect (sym
, 2);
4512 demand_empty_rest_of_line ();
4515 /* The .extern pseudo-op. We create an undefined symbol. */
4518 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4523 endc
= get_symbol_name (&name
);
4525 (void) symbol_find_or_make (name
);
4527 (void) restore_line_pointer (endc
);
4529 demand_empty_rest_of_line ();
4532 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4535 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4541 endc
= get_symbol_name (&name
);
4543 sym
= symbol_find_or_make (name
);
4545 (void) restore_line_pointer (endc
);
4547 symbol_get_tc (sym
)->output
= 1;
4549 demand_empty_rest_of_line ();
4552 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4553 relocations at the beginning of the current csect.
4555 (In principle, there's no reason why the relocations _have_ to be at
4556 the beginning. Anywhere in the csect would do. However, inserting
4557 at the beginning is what the native assembler does, and it helps to
4558 deal with cases where the .ref statements follow the section contents.)
4560 ??? .refs don't work for empty .csects. However, the native assembler
4561 doesn't report an error in this case, and neither yet do we. */
4564 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
4569 if (ppc_current_csect
== NULL
)
4571 as_bad (_(".ref outside .csect"));
4572 ignore_rest_of_line ();
4578 c
= get_symbol_name (&name
);
4580 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
4581 symbol_find_or_make (name
), 0, FALSE
, BFD_RELOC_NONE
);
4583 *input_line_pointer
= c
;
4584 SKIP_WHITESPACE_AFTER_NAME ();
4585 c
= *input_line_pointer
;
4588 input_line_pointer
++;
4590 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
4592 as_bad (_("missing symbol name"));
4593 ignore_rest_of_line ();
4600 demand_empty_rest_of_line ();
4603 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4604 although I don't know why it bothers. */
4607 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
4614 endc
= get_symbol_name (&name
);
4616 sym
= symbol_find_or_make (name
);
4618 (void) restore_line_pointer (endc
);
4620 if (*input_line_pointer
!= ',')
4622 as_bad (_("missing rename string"));
4623 ignore_rest_of_line ();
4626 ++input_line_pointer
;
4628 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
4630 demand_empty_rest_of_line ();
4633 /* The .stabx pseudo-op. This is similar to a normal .stabs
4634 pseudo-op, but slightly different. A sample is
4635 .stabx "main:F-1",.main,142,0
4636 The first argument is the symbol name to create. The second is the
4637 value, and the third is the storage class. The fourth seems to be
4638 always zero, and I am assuming it is the type. */
4641 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
4648 name
= demand_copy_C_string (&len
);
4650 if (*input_line_pointer
!= ',')
4652 as_bad (_("missing value"));
4655 ++input_line_pointer
;
4657 ppc_stab_symbol
= TRUE
;
4658 sym
= symbol_make (name
);
4659 ppc_stab_symbol
= FALSE
;
4661 symbol_get_tc (sym
)->real_name
= name
;
4663 (void) expression (&exp
);
4670 as_bad (_("illegal .stabx expression; zero assumed"));
4671 exp
.X_add_number
= 0;
4674 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
4675 symbol_set_frag (sym
, &zero_address_frag
);
4679 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
4680 symbol_set_value_expression (sym
, &exp
);
4684 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
4685 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
4690 /* The value is some complex expression. This will probably
4691 fail at some later point, but this is probably the right
4692 thing to do here. */
4693 symbol_set_value_expression (sym
, &exp
);
4697 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4698 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4700 if (*input_line_pointer
!= ',')
4702 as_bad (_("missing class"));
4705 ++input_line_pointer
;
4707 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
4709 if (*input_line_pointer
!= ',')
4711 as_bad (_("missing type"));
4714 ++input_line_pointer
;
4716 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
4718 symbol_get_tc (sym
)->output
= 1;
4720 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
4725 .stabx "z",arrays_,133,0
4728 .comm arrays_,13768,3
4730 resolve_symbol_value will copy the exp's "within" into sym's when the
4731 offset is 0. Since this seems to be corner case problem,
4732 only do the correction for storage class C_STSYM. A better solution
4733 would be to have the tc field updated in ppc_symbol_new_hook. */
4735 if (exp
.X_op
== O_symbol
)
4737 if (ppc_current_block
== NULL
)
4738 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4740 symbol_get_tc (sym
)->within
= ppc_current_block
;
4741 symbol_get_tc (exp
.X_add_symbol
)->within
= ppc_current_block
;
4745 if (exp
.X_op
!= O_symbol
4746 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
4747 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
4748 ppc_frob_label (sym
);
4751 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4752 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
4753 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
4754 symbol_get_tc (ppc_current_csect
)->within
= sym
;
4757 demand_empty_rest_of_line ();
4760 /* The .function pseudo-op. This takes several arguments. The first
4761 argument seems to be the external name of the symbol. The second
4762 argument seems to be the label for the start of the function. gcc
4763 uses the same name for both. I have no idea what the third and
4764 fourth arguments are meant to be. The optional fifth argument is
4765 an expression for the size of the function. In COFF this symbol
4766 gets an aux entry like that used for a csect. */
4769 ppc_function (int ignore ATTRIBUTE_UNUSED
)
4777 endc
= get_symbol_name (&name
);
4779 /* Ignore any [PR] suffix. */
4780 name
= ppc_canonicalize_symbol_name (name
);
4781 s
= strchr (name
, '[');
4782 if (s
!= (char *) NULL
4783 && strcmp (s
+ 1, "PR]") == 0)
4786 ext_sym
= symbol_find_or_make (name
);
4788 (void) restore_line_pointer (endc
);
4790 if (*input_line_pointer
!= ',')
4792 as_bad (_("missing symbol name"));
4793 ignore_rest_of_line ();
4796 ++input_line_pointer
;
4798 endc
= get_symbol_name (&name
);
4800 lab_sym
= symbol_find_or_make (name
);
4802 (void) restore_line_pointer (endc
);
4804 if (ext_sym
!= lab_sym
)
4808 exp
.X_op
= O_symbol
;
4809 exp
.X_add_symbol
= lab_sym
;
4810 exp
.X_op_symbol
= NULL
;
4811 exp
.X_add_number
= 0;
4813 symbol_set_value_expression (ext_sym
, &exp
);
4816 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
4817 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
4818 symbol_get_tc (ext_sym
)->output
= 1;
4820 if (*input_line_pointer
== ',')
4824 /* Ignore the third argument. */
4825 ++input_line_pointer
;
4827 if (*input_line_pointer
== ',')
4829 /* Ignore the fourth argument. */
4830 ++input_line_pointer
;
4832 if (*input_line_pointer
== ',')
4834 /* The fifth argument is the function size. */
4835 ++input_line_pointer
;
4836 symbol_get_tc (ext_sym
)->u
.size
= symbol_new
4837 ("L0\001", absolute_section
,(valueT
) 0, &zero_address_frag
);
4838 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
4843 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
4844 SF_SET_FUNCTION (ext_sym
);
4845 SF_SET_PROCESS (ext_sym
);
4846 coff_add_linesym (ext_sym
);
4848 demand_empty_rest_of_line ();
4851 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4852 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4853 with the correct line number */
4855 static symbolS
*saved_bi_sym
= 0;
4858 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
4862 sym
= symbol_make (".bf");
4863 S_SET_SEGMENT (sym
, text_section
);
4864 symbol_set_frag (sym
, frag_now
);
4865 S_SET_VALUE (sym
, frag_now_fix ());
4866 S_SET_STORAGE_CLASS (sym
, C_FCN
);
4868 coff_line_base
= get_absolute_expression ();
4870 S_SET_NUMBER_AUXILIARY (sym
, 1);
4871 SA_SET_SYM_LNNO (sym
, coff_line_base
);
4873 /* Line number for bi. */
4876 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
4881 symbol_get_tc (sym
)->output
= 1;
4883 ppc_frob_label (sym
);
4885 demand_empty_rest_of_line ();
4888 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4889 ".ef", except that the line number is absolute, not relative to the
4890 most recent ".bf" symbol. */
4893 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
4897 sym
= symbol_make (".ef");
4898 S_SET_SEGMENT (sym
, text_section
);
4899 symbol_set_frag (sym
, frag_now
);
4900 S_SET_VALUE (sym
, frag_now_fix ());
4901 S_SET_STORAGE_CLASS (sym
, C_FCN
);
4902 S_SET_NUMBER_AUXILIARY (sym
, 1);
4903 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4904 symbol_get_tc (sym
)->output
= 1;
4906 ppc_frob_label (sym
);
4908 demand_empty_rest_of_line ();
4911 /* The .bi and .ei pseudo-ops. These take a string argument and
4912 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4913 the symbol list. The value of .bi will be know when the next .bf
4919 static symbolS
*last_biei
;
4926 name
= demand_copy_C_string (&len
);
4928 /* The value of these symbols is actually file offset. Here we set
4929 the value to the index into the line number entries. In
4930 ppc_frob_symbols we set the fix_line field, which will cause BFD
4931 to do the right thing. */
4933 sym
= symbol_make (name
);
4934 /* obj-coff.c currently only handles line numbers correctly in the
4936 S_SET_SEGMENT (sym
, text_section
);
4937 S_SET_VALUE (sym
, coff_n_line_nos
);
4938 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4940 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
4941 symbol_get_tc (sym
)->output
= 1;
4949 for (look
= last_biei
? last_biei
: symbol_rootP
;
4950 (look
!= (symbolS
*) NULL
4951 && (S_GET_STORAGE_CLASS (look
) == C_FILE
4952 || S_GET_STORAGE_CLASS (look
) == C_BINCL
4953 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
4954 look
= symbol_next (look
))
4956 if (look
!= (symbolS
*) NULL
)
4958 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4959 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
4963 demand_empty_rest_of_line ();
4966 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4967 There is one argument, which is a csect symbol. The value of the
4968 .bs symbol is the index of this csect symbol. */
4971 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
4978 if (ppc_current_block
!= NULL
)
4979 as_bad (_("nested .bs blocks"));
4981 endc
= get_symbol_name (&name
);
4983 csect
= symbol_find_or_make (name
);
4985 (void) restore_line_pointer (endc
);
4987 sym
= symbol_make (".bs");
4988 S_SET_SEGMENT (sym
, now_seg
);
4989 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
4990 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4991 symbol_get_tc (sym
)->output
= 1;
4993 symbol_get_tc (sym
)->within
= csect
;
4995 ppc_frob_label (sym
);
4997 ppc_current_block
= sym
;
4999 demand_empty_rest_of_line ();
5002 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
5005 ppc_es (int ignore ATTRIBUTE_UNUSED
)
5009 if (ppc_current_block
== NULL
)
5010 as_bad (_(".es without preceding .bs"));
5012 sym
= symbol_make (".es");
5013 S_SET_SEGMENT (sym
, now_seg
);
5014 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
5015 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5016 symbol_get_tc (sym
)->output
= 1;
5018 ppc_frob_label (sym
);
5020 ppc_current_block
= NULL
;
5022 demand_empty_rest_of_line ();
5025 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
5029 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
5033 sym
= symbol_make (".bb");
5034 S_SET_SEGMENT (sym
, text_section
);
5035 symbol_set_frag (sym
, frag_now
);
5036 S_SET_VALUE (sym
, frag_now_fix ());
5037 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5039 S_SET_NUMBER_AUXILIARY (sym
, 1);
5040 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5042 symbol_get_tc (sym
)->output
= 1;
5044 SF_SET_PROCESS (sym
);
5046 ppc_frob_label (sym
);
5048 demand_empty_rest_of_line ();
5051 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
5055 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
5059 sym
= symbol_make (".eb");
5060 S_SET_SEGMENT (sym
, text_section
);
5061 symbol_set_frag (sym
, frag_now
);
5062 S_SET_VALUE (sym
, frag_now_fix ());
5063 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5064 S_SET_NUMBER_AUXILIARY (sym
, 1);
5065 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5066 symbol_get_tc (sym
)->output
= 1;
5068 SF_SET_PROCESS (sym
);
5070 ppc_frob_label (sym
);
5072 demand_empty_rest_of_line ();
5075 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
5079 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
5085 name
= demand_copy_C_string (&len
);
5086 sym
= symbol_make (name
);
5087 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5088 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5089 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
5090 S_SET_VALUE (sym
, 0);
5091 symbol_get_tc (sym
)->output
= 1;
5093 ppc_frob_label (sym
);
5095 demand_empty_rest_of_line ();
5098 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
5101 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
5105 sym
= symbol_make (".ec");
5106 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5107 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5108 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
5109 S_SET_VALUE (sym
, 0);
5110 symbol_get_tc (sym
)->output
= 1;
5112 ppc_frob_label (sym
);
5114 demand_empty_rest_of_line ();
5117 /* The .toc pseudo-op. Switch to the .toc subsegment. */
5120 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
5122 if (ppc_toc_csect
!= (symbolS
*) NULL
)
5123 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
5130 subseg
= ppc_data_subsegment
;
5131 ++ppc_data_subsegment
;
5133 subseg_new (segment_name (data_section
), subseg
);
5134 ppc_toc_frag
= frag_now
;
5136 sym
= symbol_find_or_make ("TOC[TC0]");
5137 symbol_set_frag (sym
, frag_now
);
5138 S_SET_SEGMENT (sym
, data_section
);
5139 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5140 symbol_get_tc (sym
)->subseg
= subseg
;
5141 symbol_get_tc (sym
)->output
= 1;
5142 symbol_get_tc (sym
)->within
= sym
;
5144 ppc_toc_csect
= sym
;
5146 for (list
= ppc_data_csects
;
5147 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
5148 list
= symbol_get_tc (list
)->next
)
5150 symbol_get_tc (list
)->next
= sym
;
5152 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5153 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
5157 ppc_current_csect
= ppc_toc_csect
;
5159 demand_empty_rest_of_line ();
5162 /* The AIX assembler automatically aligns the operands of a .long or
5163 .short pseudo-op, and we want to be compatible. */
5166 ppc_xcoff_cons (int log_size
)
5168 frag_align (log_size
, 0, 0);
5169 record_alignment (now_seg
, log_size
);
5170 cons (1 << log_size
);
5174 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
5179 (void) expression (&exp
);
5181 if (exp
.X_op
!= O_constant
)
5183 as_bad (_("non-constant byte count"));
5187 byte_count
= exp
.X_add_number
;
5189 if (*input_line_pointer
!= ',')
5191 as_bad (_("missing value"));
5195 ++input_line_pointer
;
5200 ppc_xcoff_end (void)
5204 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
5206 struct dw_section
*dws
= &dw_sections
[i
];
5207 struct dw_subsection
*dwss
;
5209 if (dws
->anon_subseg
)
5211 dwss
= dws
->anon_subseg
;
5212 dwss
->link
= dws
->list_subseg
;
5215 dwss
= dws
->list_subseg
;
5217 for (; dwss
!= NULL
; dwss
= dwss
->link
)
5218 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
5220 subseg_set (dws
->sect
, dwss
->subseg
);
5221 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
5226 #endif /* OBJ_XCOFF */
5227 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5229 /* The .tc pseudo-op. This is used when generating either XCOFF or
5230 ELF. This takes two or more arguments.
5232 When generating XCOFF output, the first argument is the name to
5233 give to this location in the toc; this will be a symbol with class
5234 TC. The rest of the arguments are N-byte values to actually put at
5235 this location in the TOC; often there is just one more argument, a
5236 relocatable symbol reference. The size of the value to store
5237 depends on target word size. A 32-bit target uses 4-byte values, a
5238 64-bit target uses 8-byte values.
5240 When not generating XCOFF output, the arguments are the same, but
5241 the first argument is simply ignored. */
5244 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5248 /* Define the TOC symbol name. */
5254 if (ppc_toc_csect
== (symbolS
*) NULL
5255 || ppc_toc_csect
!= ppc_current_csect
)
5257 as_bad (_(".tc not in .toc section"));
5258 ignore_rest_of_line ();
5262 endc
= get_symbol_name (&name
);
5264 sym
= symbol_find_or_make (name
);
5266 (void) restore_line_pointer (endc
);
5268 if (S_IS_DEFINED (sym
))
5272 label
= symbol_get_tc (ppc_current_csect
)->within
;
5273 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5275 as_bad (_(".tc with no label"));
5276 ignore_rest_of_line ();
5280 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5281 symbol_set_frag (label
, symbol_get_frag (sym
));
5282 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5284 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5285 ++input_line_pointer
;
5290 S_SET_SEGMENT (sym
, now_seg
);
5291 symbol_set_frag (sym
, frag_now
);
5292 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5293 symbol_get_tc (sym
)->symbol_class
= XMC_TC
;
5294 symbol_get_tc (sym
)->output
= 1;
5296 ppc_frob_label (sym
);
5299 #endif /* OBJ_XCOFF */
5303 /* Skip the TOC symbol name. */
5304 while (is_part_of_name (*input_line_pointer
)
5305 || *input_line_pointer
== ' '
5306 || *input_line_pointer
== '['
5307 || *input_line_pointer
== ']'
5308 || *input_line_pointer
== '{'
5309 || *input_line_pointer
== '}')
5310 ++input_line_pointer
;
5312 /* Align to a four/eight byte boundary. */
5313 align
= ppc_obj64
? 3 : 2;
5314 frag_align (align
, 0, 0);
5315 record_alignment (now_seg
, align
);
5316 #endif /* OBJ_ELF */
5318 if (*input_line_pointer
!= ',')
5319 demand_empty_rest_of_line ();
5322 ++input_line_pointer
;
5323 cons (ppc_obj64
? 8 : 4);
5327 /* Pseudo-op .machine. */
5330 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5334 #define MAX_HISTORY 100
5335 static ppc_cpu_t
*cpu_history
;
5336 static int curr_hist
;
5340 c
= get_symbol_name (&cpu_string
);
5341 cpu_string
= xstrdup (cpu_string
);
5342 (void) restore_line_pointer (c
);
5344 if (cpu_string
!= NULL
)
5346 ppc_cpu_t old_cpu
= ppc_cpu
;
5350 for (p
= cpu_string
; *p
!= 0; p
++)
5353 if (strcmp (cpu_string
, "push") == 0)
5355 if (cpu_history
== NULL
)
5356 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5358 if (curr_hist
>= MAX_HISTORY
)
5359 as_bad (_(".machine stack overflow"));
5361 cpu_history
[curr_hist
++] = ppc_cpu
;
5363 else if (strcmp (cpu_string
, "pop") == 0)
5366 as_bad (_(".machine stack underflow"));
5368 ppc_cpu
= cpu_history
[--curr_hist
];
5370 else if ((new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, cpu_string
)) != 0)
5373 as_bad (_("invalid machine `%s'"), cpu_string
);
5375 if (ppc_cpu
!= old_cpu
)
5376 ppc_setup_opcodes ();
5379 demand_empty_rest_of_line ();
5381 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5385 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5387 /* Set the current section. */
5389 ppc_set_current_section (segT
new)
5391 ppc_previous_section
= ppc_current_section
;
5392 ppc_current_section
= new;
5395 /* pseudo-op: .previous
5396 behaviour: toggles the current section with the previous section.
5398 warnings: "No previous section" */
5401 ppc_previous (int ignore ATTRIBUTE_UNUSED
)
5403 if (ppc_previous_section
== NULL
)
5405 as_warn (_("no previous section to return to, ignored."));
5409 subseg_set (ppc_previous_section
, 0);
5411 ppc_set_current_section (ppc_previous_section
);
5414 /* pseudo-op: .pdata
5415 behaviour: predefined read only data section
5419 initial: .section .pdata "adr3"
5420 a - don't know -- maybe a misprint
5421 d - initialized data
5423 3 - double word aligned (that would be 4 byte boundary)
5426 Tag index tables (also known as the function table) for exception
5427 handling, debugging, etc. */
5430 ppc_pdata (int ignore ATTRIBUTE_UNUSED
)
5432 if (pdata_section
== 0)
5434 pdata_section
= subseg_new (".pdata", 0);
5436 bfd_set_section_flags (stdoutput
, pdata_section
,
5437 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5438 | SEC_READONLY
| SEC_DATA
));
5440 bfd_set_section_alignment (stdoutput
, pdata_section
, 2);
5444 pdata_section
= subseg_new (".pdata", 0);
5446 ppc_set_current_section (pdata_section
);
5449 /* pseudo-op: .ydata
5450 behaviour: predefined read only data section
5454 initial: .section .ydata "drw3"
5455 a - don't know -- maybe a misprint
5456 d - initialized data
5458 3 - double word aligned (that would be 4 byte boundary)
5460 Tag tables (also known as the scope table) for exception handling,
5464 ppc_ydata (int ignore ATTRIBUTE_UNUSED
)
5466 if (ydata_section
== 0)
5468 ydata_section
= subseg_new (".ydata", 0);
5469 bfd_set_section_flags (stdoutput
, ydata_section
,
5470 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5471 | SEC_READONLY
| SEC_DATA
));
5473 bfd_set_section_alignment (stdoutput
, ydata_section
, 3);
5477 ydata_section
= subseg_new (".ydata", 0);
5479 ppc_set_current_section (ydata_section
);
5482 /* pseudo-op: .reldata
5483 behaviour: predefined read write data section
5484 double word aligned (4-byte)
5485 FIXME: relocation is applied to it
5486 FIXME: what's the difference between this and .data?
5489 initial: .section .reldata "drw3"
5490 d - initialized data
5493 3 - double word aligned (that would be 8 byte boundary)
5496 Like .data, but intended to hold data subject to relocation, such as
5497 function descriptors, etc. */
5500 ppc_reldata (int ignore ATTRIBUTE_UNUSED
)
5502 if (reldata_section
== 0)
5504 reldata_section
= subseg_new (".reldata", 0);
5506 bfd_set_section_flags (stdoutput
, reldata_section
,
5507 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5510 bfd_set_section_alignment (stdoutput
, reldata_section
, 2);
5514 reldata_section
= subseg_new (".reldata", 0);
5516 ppc_set_current_section (reldata_section
);
5519 /* pseudo-op: .rdata
5520 behaviour: predefined read only data section
5524 initial: .section .rdata "dr3"
5525 d - initialized data
5527 3 - double word aligned (that would be 4 byte boundary) */
5530 ppc_rdata (int ignore ATTRIBUTE_UNUSED
)
5532 if (rdata_section
== 0)
5534 rdata_section
= subseg_new (".rdata", 0);
5535 bfd_set_section_flags (stdoutput
, rdata_section
,
5536 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5537 | SEC_READONLY
| SEC_DATA
));
5539 bfd_set_section_alignment (stdoutput
, rdata_section
, 2);
5543 rdata_section
= subseg_new (".rdata", 0);
5545 ppc_set_current_section (rdata_section
);
5548 /* pseudo-op: .ualong
5549 behaviour: much like .int, with the exception that no alignment is
5551 FIXME: test the alignment statement
5556 ppc_ualong (int ignore ATTRIBUTE_UNUSED
)
5562 /* pseudo-op: .znop <symbol name>
5563 behaviour: Issue a nop instruction
5564 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5565 the supplied symbol name.
5567 warnings: Missing symbol name */
5570 ppc_znop (int ignore ATTRIBUTE_UNUSED
)
5573 const struct powerpc_opcode
*opcode
;
5580 /* Strip out the symbol name. */
5581 c
= get_symbol_name (&symbol_name
);
5583 name
= xstrdup (symbol_name
);
5585 sym
= symbol_find_or_make (name
);
5587 *input_line_pointer
= c
;
5589 SKIP_WHITESPACE_AFTER_NAME ();
5591 /* Look up the opcode in the hash table. */
5592 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, "nop");
5594 /* Stick in the nop. */
5595 insn
= opcode
->opcode
;
5597 /* Write out the instruction. */
5599 md_number_to_chars (f
, insn
, 4);
5601 f
- frag_now
->fr_literal
,
5606 BFD_RELOC_16_GOT_PCREL
);
5616 ppc_pe_comm (int lcomm
)
5625 c
= get_symbol_name (&name
);
5627 /* just after name is now '\0'. */
5628 p
= input_line_pointer
;
5630 SKIP_WHITESPACE_AFTER_NAME ();
5631 if (*input_line_pointer
!= ',')
5633 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5634 ignore_rest_of_line ();
5638 input_line_pointer
++; /* skip ',' */
5639 if ((temp
= get_absolute_expression ()) < 0)
5641 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
5642 ignore_rest_of_line ();
5648 /* The third argument to .comm is the alignment. */
5649 if (*input_line_pointer
!= ',')
5653 ++input_line_pointer
;
5654 align
= get_absolute_expression ();
5657 as_warn (_("ignoring bad alignment"));
5664 symbolP
= symbol_find_or_make (name
);
5667 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
5669 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5670 S_GET_NAME (symbolP
));
5671 ignore_rest_of_line ();
5675 if (S_GET_VALUE (symbolP
))
5677 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
5678 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5679 S_GET_NAME (symbolP
),
5680 (long) S_GET_VALUE (symbolP
),
5685 S_SET_VALUE (symbolP
, (valueT
) temp
);
5686 S_SET_EXTERNAL (symbolP
);
5687 S_SET_SEGMENT (symbolP
, bfd_com_section_ptr
);
5690 demand_empty_rest_of_line ();
5694 * implement the .section pseudo op:
5695 * .section name {, "flags"}
5697 * | +--- optional flags: 'b' for bss
5699 * +-- section name 'l' for lib
5703 * 'd' (apparently m88k for data)
5705 * But if the argument is not a quoted string, treat it as a
5706 * subsegment number.
5708 * FIXME: this is a copy of the section processing from obj-coff.c, with
5709 * additions/changes for the moto-pas assembler support. There are three
5712 * FIXME: I just noticed this. This doesn't work at all really. It it
5713 * setting bits that bfd probably neither understands or uses. The
5714 * correct approach (?) will have to incorporate extra fields attached
5715 * to the section to hold the system specific stuff. (krk)
5718 * 'a' - unknown - referred to in documentation, but no definition supplied
5719 * 'c' - section has code
5720 * 'd' - section has initialized data
5721 * 'u' - section has uninitialized data
5722 * 'i' - section contains directives (info)
5723 * 'n' - section can be discarded
5724 * 'R' - remove section at link time
5726 * Section Protection:
5727 * 'r' - section is readable
5728 * 'w' - section is writable
5729 * 'x' - section is executable
5730 * 's' - section is sharable
5732 * Section Alignment:
5733 * '0' - align to byte boundary
5734 * '1' - align to halfword boundary
5735 * '2' - align to word boundary
5736 * '3' - align to doubleword boundary
5737 * '4' - align to quadword boundary
5738 * '5' - align to 32 byte boundary
5739 * '6' - align to 64 byte boundary
5744 ppc_pe_section (int ignore ATTRIBUTE_UNUSED
)
5746 /* Strip out the section name. */
5755 c
= get_symbol_name (§ion_name
);
5757 name
= xstrdup (section_name
);
5759 *input_line_pointer
= c
;
5761 SKIP_WHITESPACE_AFTER_NAME ();
5764 flags
= SEC_NO_FLAGS
;
5766 if (strcmp (name
, ".idata$2") == 0)
5770 else if (strcmp (name
, ".idata$3") == 0)
5774 else if (strcmp (name
, ".idata$4") == 0)
5778 else if (strcmp (name
, ".idata$5") == 0)
5782 else if (strcmp (name
, ".idata$6") == 0)
5787 /* Default alignment to 16 byte boundary. */
5790 if (*input_line_pointer
== ',')
5792 ++input_line_pointer
;
5794 if (*input_line_pointer
!= '"')
5795 exp
= get_absolute_expression ();
5798 ++input_line_pointer
;
5799 while (*input_line_pointer
!= '"'
5800 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
5802 switch (*input_line_pointer
)
5804 /* Section Contents */
5805 case 'a': /* unknown */
5806 as_bad (_("unsupported section attribute -- 'a'"));
5808 case 'c': /* code section */
5811 case 'd': /* section has initialized data */
5814 case 'u': /* section has uninitialized data */
5815 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5819 case 'i': /* section contains directives (info) */
5820 /* FIXME: This is IMAGE_SCN_LNK_INFO
5822 flags
|= SEC_HAS_CONTENTS
;
5824 case 'n': /* section can be discarded */
5827 case 'R': /* Remove section at link time */
5828 flags
|= SEC_NEVER_LOAD
;
5830 #if IFLICT_BRAIN_DAMAGE
5831 /* Section Protection */
5832 case 'r': /* section is readable */
5833 flags
|= IMAGE_SCN_MEM_READ
;
5835 case 'w': /* section is writable */
5836 flags
|= IMAGE_SCN_MEM_WRITE
;
5838 case 'x': /* section is executable */
5839 flags
|= IMAGE_SCN_MEM_EXECUTE
;
5841 case 's': /* section is sharable */
5842 flags
|= IMAGE_SCN_MEM_SHARED
;
5845 /* Section Alignment */
5846 case '0': /* align to byte boundary */
5847 flags
|= IMAGE_SCN_ALIGN_1BYTES
;
5850 case '1': /* align to halfword boundary */
5851 flags
|= IMAGE_SCN_ALIGN_2BYTES
;
5854 case '2': /* align to word boundary */
5855 flags
|= IMAGE_SCN_ALIGN_4BYTES
;
5858 case '3': /* align to doubleword boundary */
5859 flags
|= IMAGE_SCN_ALIGN_8BYTES
;
5862 case '4': /* align to quadword boundary */
5863 flags
|= IMAGE_SCN_ALIGN_16BYTES
;
5866 case '5': /* align to 32 byte boundary */
5867 flags
|= IMAGE_SCN_ALIGN_32BYTES
;
5870 case '6': /* align to 64 byte boundary */
5871 flags
|= IMAGE_SCN_ALIGN_64BYTES
;
5876 as_bad (_("unknown section attribute '%c'"),
5877 *input_line_pointer
);
5880 ++input_line_pointer
;
5882 if (*input_line_pointer
== '"')
5883 ++input_line_pointer
;
5887 sec
= subseg_new (name
, (subsegT
) exp
);
5889 ppc_set_current_section (sec
);
5891 if (flags
!= SEC_NO_FLAGS
)
5893 if (! bfd_set_section_flags (stdoutput
, sec
, flags
))
5894 as_bad (_("error setting flags for \"%s\": %s"),
5895 bfd_section_name (stdoutput
, sec
),
5896 bfd_errmsg (bfd_get_error ()));
5899 bfd_set_section_alignment (stdoutput
, sec
, align
);
5903 ppc_pe_function (int ignore ATTRIBUTE_UNUSED
)
5909 endc
= get_symbol_name (&name
);
5911 ext_sym
= symbol_find_or_make (name
);
5913 (void) restore_line_pointer (endc
);
5915 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5916 SF_SET_FUNCTION (ext_sym
);
5917 SF_SET_PROCESS (ext_sym
);
5918 coff_add_linesym (ext_sym
);
5920 demand_empty_rest_of_line ();
5924 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED
)
5926 if (tocdata_section
== 0)
5928 tocdata_section
= subseg_new (".tocd", 0);
5929 /* FIXME: section flags won't work. */
5930 bfd_set_section_flags (stdoutput
, tocdata_section
,
5931 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5932 | SEC_READONLY
| SEC_DATA
));
5934 bfd_set_section_alignment (stdoutput
, tocdata_section
, 2);
5938 rdata_section
= subseg_new (".tocd", 0);
5941 ppc_set_current_section (tocdata_section
);
5943 demand_empty_rest_of_line ();
5946 /* Don't adjust TOC relocs to use the section symbol. */
5949 ppc_pe_fix_adjustable (fixS
*fix
)
5951 return fix
->fx_r_type
!= BFD_RELOC_PPC_TOC16
;
5958 /* XCOFF specific symbol and file handling. */
5960 /* Canonicalize the symbol name. We use the to force the suffix, if
5961 any, to use square brackets, and to be in upper case. */
5964 ppc_canonicalize_symbol_name (char *name
)
5968 if (ppc_stab_symbol
)
5971 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
5985 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
5988 if (*s
== '\0' || s
[1] != '\0')
5989 as_bad (_("bad symbol suffix"));
5997 /* Set the class of a symbol based on the suffix, if any. This is
5998 called whenever a new symbol is created. */
6001 ppc_symbol_new_hook (symbolS
*sym
)
6003 struct ppc_tc_sy
*tc
;
6006 tc
= symbol_get_tc (sym
);
6009 tc
->symbol_class
= -1;
6010 tc
->real_name
= NULL
;
6017 if (ppc_stab_symbol
)
6020 s
= strchr (S_GET_NAME (sym
), '[');
6021 if (s
== (const char *) NULL
)
6023 /* There is no suffix. */
6032 if (strcmp (s
, "BS]") == 0)
6033 tc
->symbol_class
= XMC_BS
;
6036 if (strcmp (s
, "DB]") == 0)
6037 tc
->symbol_class
= XMC_DB
;
6038 else if (strcmp (s
, "DS]") == 0)
6039 tc
->symbol_class
= XMC_DS
;
6042 if (strcmp (s
, "GL]") == 0)
6043 tc
->symbol_class
= XMC_GL
;
6046 if (strcmp (s
, "PR]") == 0)
6047 tc
->symbol_class
= XMC_PR
;
6050 if (strcmp (s
, "RO]") == 0)
6051 tc
->symbol_class
= XMC_RO
;
6052 else if (strcmp (s
, "RW]") == 0)
6053 tc
->symbol_class
= XMC_RW
;
6056 if (strcmp (s
, "SV]") == 0)
6057 tc
->symbol_class
= XMC_SV
;
6060 if (strcmp (s
, "TC]") == 0)
6061 tc
->symbol_class
= XMC_TC
;
6062 else if (strcmp (s
, "TI]") == 0)
6063 tc
->symbol_class
= XMC_TI
;
6064 else if (strcmp (s
, "TB]") == 0)
6065 tc
->symbol_class
= XMC_TB
;
6066 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
6067 tc
->symbol_class
= XMC_TC0
;
6070 if (strcmp (s
, "UA]") == 0)
6071 tc
->symbol_class
= XMC_UA
;
6072 else if (strcmp (s
, "UC]") == 0)
6073 tc
->symbol_class
= XMC_UC
;
6076 if (strcmp (s
, "XO]") == 0)
6077 tc
->symbol_class
= XMC_XO
;
6081 if (tc
->symbol_class
== -1)
6082 as_bad (_("unrecognized symbol suffix"));
6085 /* Set the class of a label based on where it is defined. This
6086 handles symbols without suffixes. Also, move the symbol so that it
6087 follows the csect symbol. */
6090 ppc_frob_label (symbolS
*sym
)
6092 if (ppc_current_csect
!= (symbolS
*) NULL
)
6094 if (symbol_get_tc (sym
)->symbol_class
== -1)
6095 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
6097 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
6098 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
6099 &symbol_rootP
, &symbol_lastP
);
6100 symbol_get_tc (ppc_current_csect
)->within
= sym
;
6101 symbol_get_tc (sym
)->within
= ppc_current_csect
;
6105 dwarf2_emit_label (sym
);
6109 /* This variable is set by ppc_frob_symbol if any absolute symbols are
6110 seen. It tells ppc_adjust_symtab whether it needs to look through
6113 static bfd_boolean ppc_saw_abs
;
6115 /* Change the name of a symbol just before writing it out. Set the
6116 real name if the .rename pseudo-op was used. Otherwise, remove any
6117 class suffix. Return 1 if the symbol should not be included in the
6121 ppc_frob_symbol (symbolS
*sym
)
6123 static symbolS
*ppc_last_function
;
6124 static symbolS
*set_end
;
6126 /* Discard symbols that should not be included in the output symbol
6128 if (! symbol_used_in_reloc_p (sym
)
6129 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
6130 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6131 && ! symbol_get_tc (sym
)->output
6132 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
6135 /* This one will disappear anyway. Don't make a csect sym for it. */
6136 if (sym
== abs_section_sym
)
6139 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
6140 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
6146 name
= S_GET_NAME (sym
);
6147 s
= strchr (name
, '[');
6148 if (s
!= (char *) NULL
)
6154 snew
= xstrndup (name
, len
);
6156 S_SET_NAME (sym
, snew
);
6160 if (set_end
!= (symbolS
*) NULL
)
6162 SA_SET_SYM_ENDNDX (set_end
, sym
);
6166 if (SF_GET_FUNCTION (sym
))
6168 if (ppc_last_function
!= (symbolS
*) NULL
)
6169 as_bad (_("two .function pseudo-ops with no intervening .ef"));
6170 ppc_last_function
= sym
;
6171 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
6173 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
6174 SA_SET_SYM_FSIZE (sym
,
6175 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
6178 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
6179 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
6181 if (ppc_last_function
== (symbolS
*) NULL
)
6182 as_bad (_(".ef with no preceding .function"));
6185 set_end
= ppc_last_function
;
6186 ppc_last_function
= NULL
;
6188 /* We don't have a C_EFCN symbol, but we need to force the
6189 COFF backend to believe that it has seen one. */
6190 coff_last_function
= NULL
;
6194 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6195 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
6196 && S_GET_STORAGE_CLASS (sym
) != C_FILE
6197 && S_GET_STORAGE_CLASS (sym
) != C_FCN
6198 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
6199 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
6200 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
6201 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
6202 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
6203 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
6204 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
6206 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
6207 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
6208 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
6211 union internal_auxent
*a
;
6213 /* Create a csect aux. */
6214 i
= S_GET_NUMBER_AUXILIARY (sym
);
6215 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
6216 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
6217 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
6219 /* This is the TOC table. */
6220 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
6221 a
->x_csect
.x_scnlen
.l
= 0;
6222 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6224 else if (symbol_get_tc (sym
)->subseg
!= 0)
6226 /* This is a csect symbol. x_scnlen is the size of the
6228 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
6229 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6230 S_GET_SEGMENT (sym
))
6231 - S_GET_VALUE (sym
));
6234 resolve_symbol_value (symbol_get_tc (sym
)->next
);
6235 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
6236 - S_GET_VALUE (sym
));
6238 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
6240 else if (S_GET_SEGMENT (sym
) == bss_section
)
6242 /* This is a common symbol. */
6243 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
6244 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6245 if (S_IS_EXTERNAL (sym
))
6246 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
6248 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
6250 else if (S_GET_SEGMENT (sym
) == absolute_section
)
6252 /* This is an absolute symbol. The csect will be created by
6253 ppc_adjust_symtab. */
6255 a
->x_csect
.x_smtyp
= XTY_LD
;
6256 if (symbol_get_tc (sym
)->symbol_class
== -1)
6257 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6259 else if (! S_IS_DEFINED (sym
))
6261 /* This is an external symbol. */
6262 a
->x_csect
.x_scnlen
.l
= 0;
6263 a
->x_csect
.x_smtyp
= XTY_ER
;
6265 else if (symbol_get_tc (sym
)->symbol_class
== XMC_TC
)
6269 /* This is a TOC definition. x_scnlen is the size of the
6271 next
= symbol_next (sym
);
6272 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6273 next
= symbol_next (next
);
6274 if (next
== (symbolS
*) NULL
6275 || symbol_get_tc (next
)->symbol_class
!= XMC_TC
)
6277 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6278 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6280 - S_GET_VALUE (sym
));
6282 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6283 - S_GET_VALUE (sym
));
6287 resolve_symbol_value (next
);
6288 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6289 - S_GET_VALUE (sym
));
6291 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6297 /* This is a normal symbol definition. x_scnlen is the
6298 symbol index of the containing csect. */
6299 if (S_GET_SEGMENT (sym
) == text_section
)
6300 csect
= ppc_text_csects
;
6301 else if (S_GET_SEGMENT (sym
) == data_section
)
6302 csect
= ppc_data_csects
;
6306 /* Skip the initial dummy symbol. */
6307 csect
= symbol_get_tc (csect
)->next
;
6309 if (csect
== (symbolS
*) NULL
)
6311 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6312 a
->x_csect
.x_scnlen
.l
= 0;
6316 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6318 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6319 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6320 > S_GET_VALUE (sym
))
6322 csect
= symbol_get_tc (csect
)->next
;
6325 a
->x_csect
.x_scnlen
.p
=
6326 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6327 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6330 a
->x_csect
.x_smtyp
= XTY_LD
;
6333 a
->x_csect
.x_parmhash
= 0;
6334 a
->x_csect
.x_snhash
= 0;
6335 if (symbol_get_tc (sym
)->symbol_class
== -1)
6336 a
->x_csect
.x_smclas
= XMC_PR
;
6338 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6339 a
->x_csect
.x_stab
= 0;
6340 a
->x_csect
.x_snstab
= 0;
6342 /* Don't let the COFF backend resort these symbols. */
6343 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6345 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6347 /* We want the value to be the symbol index of the referenced
6348 csect symbol. BFD will do that for us if we set the right
6350 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6351 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6353 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6354 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6356 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6361 block
= symbol_get_tc (sym
)->within
;
6364 /* The value is the offset from the enclosing csect. */
6367 csect
= symbol_get_tc (block
)->within
;
6368 resolve_symbol_value (csect
);
6369 base
= S_GET_VALUE (csect
);
6374 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6376 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6377 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6379 /* We want the value to be a file offset into the line numbers.
6380 BFD will do that for us if we set the right flags. We have
6381 already set the value correctly. */
6382 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6388 /* Adjust the symbol table. This creates csect symbols for all
6389 absolute symbols. */
6392 ppc_adjust_symtab (void)
6399 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6403 union internal_auxent
*a
;
6405 if (S_GET_SEGMENT (sym
) != absolute_section
)
6408 csect
= symbol_create (".abs[XO]", absolute_section
,
6409 S_GET_VALUE (sym
), &zero_address_frag
);
6410 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6411 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6412 i
= S_GET_NUMBER_AUXILIARY (csect
);
6413 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6414 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6415 a
->x_csect
.x_scnlen
.l
= 0;
6416 a
->x_csect
.x_smtyp
= XTY_SD
;
6417 a
->x_csect
.x_parmhash
= 0;
6418 a
->x_csect
.x_snhash
= 0;
6419 a
->x_csect
.x_smclas
= XMC_XO
;
6420 a
->x_csect
.x_stab
= 0;
6421 a
->x_csect
.x_snstab
= 0;
6423 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6425 i
= S_GET_NUMBER_AUXILIARY (sym
);
6426 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6427 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6428 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6431 ppc_saw_abs
= FALSE
;
6434 /* Set the VMA for a section. This is called on all the sections in
6438 ppc_frob_section (asection
*sec
)
6440 static bfd_vma vma
= 0;
6442 /* Dwarf sections start at 0. */
6443 if (bfd_get_section_flags (NULL
, sec
) & SEC_DEBUGGING
)
6446 vma
= md_section_align (sec
, vma
);
6447 bfd_set_section_vma (stdoutput
, sec
, vma
);
6448 vma
+= bfd_section_size (stdoutput
, sec
);
6451 #endif /* OBJ_XCOFF */
6454 md_atof (int type
, char *litp
, int *sizep
)
6456 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6459 /* Write a value out to the object file, using the appropriate
6463 md_number_to_chars (char *buf
, valueT val
, int n
)
6465 if (target_big_endian
)
6466 number_to_chars_bigendian (buf
, val
, n
);
6468 number_to_chars_littleendian (buf
, val
, n
);
6471 /* Align a section (I don't know why this is machine dependent). */
6474 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6479 int align
= bfd_get_section_alignment (stdoutput
, seg
);
6481 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6485 /* We don't have any form of relaxing. */
6488 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6489 asection
*seg ATTRIBUTE_UNUSED
)
6495 /* Convert a machine dependent frag. We never generate these. */
6498 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6499 asection
*sec ATTRIBUTE_UNUSED
,
6500 fragS
*fragp ATTRIBUTE_UNUSED
)
6505 /* We have no need to default values of symbols. */
6508 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6513 /* Functions concerning relocs. */
6515 /* The location from which a PC relative jump should be calculated,
6516 given a PC relative reloc. */
6519 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6521 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6526 /* This is called to see whether a fixup should be adjusted to use a
6527 section symbol. We take the opportunity to change a fixup against
6528 a symbol in the TOC subsegment into a reloc against the
6529 corresponding .tc symbol. */
6532 ppc_fix_adjustable (fixS
*fix
)
6534 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6535 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6536 TC_SYMFIELD_TYPE
*tc
;
6538 if (symseg
== absolute_section
)
6541 /* Always adjust symbols in debugging sections. */
6542 if (bfd_get_section_flags (stdoutput
, symseg
) & SEC_DEBUGGING
)
6545 if (ppc_toc_csect
!= (symbolS
*) NULL
6546 && fix
->fx_addsy
!= ppc_toc_csect
6547 && symseg
== data_section
6548 && val
>= ppc_toc_frag
->fr_address
6549 && (ppc_after_toc_frag
== (fragS
*) NULL
6550 || val
< ppc_after_toc_frag
->fr_address
))
6554 for (sy
= symbol_next (ppc_toc_csect
);
6555 sy
!= (symbolS
*) NULL
;
6556 sy
= symbol_next (sy
))
6558 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6560 if (sy_tc
->symbol_class
== XMC_TC0
)
6562 if (sy_tc
->symbol_class
!= XMC_TC
)
6564 if (val
== resolve_symbol_value (sy
))
6567 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6572 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6573 _("symbol in .toc does not match any .tc"));
6576 /* Possibly adjust the reloc to be against the csect. */
6577 tc
= symbol_get_tc (fix
->fx_addsy
);
6579 && tc
->symbol_class
!= XMC_TC0
6580 && tc
->symbol_class
!= XMC_TC
6581 && symseg
!= bss_section
6582 /* Don't adjust if this is a reloc in the toc section. */
6583 && (symseg
!= data_section
6584 || ppc_toc_csect
== NULL
6585 || val
< ppc_toc_frag
->fr_address
6586 || (ppc_after_toc_frag
!= NULL
6587 && val
>= ppc_after_toc_frag
->fr_address
)))
6589 symbolS
*csect
= tc
->within
;
6591 /* If the symbol was not declared by a label (eg: a section symbol),
6592 use the section instead of the csect. This doesn't happen in
6593 normal AIX assembly code. */
6595 csect
= seg_info (symseg
)->sym
;
6597 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6598 fix
->fx_addsy
= csect
;
6603 /* Adjust a reloc against a .lcomm symbol to be against the base
6605 if (symseg
== bss_section
6606 && ! S_IS_EXTERNAL (fix
->fx_addsy
))
6608 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6610 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6617 /* A reloc from one csect to another must be kept. The assembler
6618 will, of course, keep relocs between sections, and it will keep
6619 absolute relocs, but we need to force it to keep PC relative relocs
6620 between two csects in the same section. */
6623 ppc_force_relocation (fixS
*fix
)
6625 /* At this point fix->fx_addsy should already have been converted to
6626 a csect symbol. If the csect does not include the fragment, then
6627 we need to force the relocation. */
6629 && fix
->fx_addsy
!= NULL
6630 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6631 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6632 > fix
->fx_frag
->fr_address
)
6633 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6634 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6635 <= fix
->fx_frag
->fr_address
))))
6638 return generic_force_reloc (fix
);
6642 ppc_new_dot_label (symbolS
*sym
)
6644 /* Anchor this label to the current csect for relocations. */
6645 symbol_get_tc (sym
)->within
= ppc_current_csect
;
6648 #endif /* OBJ_XCOFF */
6651 /* If this function returns non-zero, it guarantees that a relocation
6652 will be emitted for a fixup. */
6655 ppc_force_relocation (fixS
*fix
)
6657 /* Branch prediction relocations must force a relocation, as must
6658 the vtable description relocs. */
6659 switch (fix
->fx_r_type
)
6661 case BFD_RELOC_PPC_B16_BRTAKEN
:
6662 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6663 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6664 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6665 case BFD_RELOC_24_PLT_PCREL
:
6666 case BFD_RELOC_PPC64_TOC
:
6668 case BFD_RELOC_PPC_B26
:
6669 case BFD_RELOC_PPC_BA26
:
6670 case BFD_RELOC_PPC_B16
:
6671 case BFD_RELOC_PPC_BA16
:
6672 case BFD_RELOC_PPC64_REL24_NOTOC
:
6673 /* All branch fixups targeting a localentry symbol must
6674 force a relocation. */
6677 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6678 elf_symbol_type
*elfsym
6679 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6680 gas_assert (elfsym
);
6681 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6689 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6690 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
)
6693 return generic_force_reloc (fix
);
6697 ppc_fix_adjustable (fixS
*fix
)
6699 switch (fix
->fx_r_type
)
6701 /* All branch fixups targeting a localentry symbol must
6702 continue using the symbol. */
6703 case BFD_RELOC_PPC_B26
:
6704 case BFD_RELOC_PPC_BA26
:
6705 case BFD_RELOC_PPC_B16
:
6706 case BFD_RELOC_PPC_BA16
:
6707 case BFD_RELOC_PPC_B16_BRTAKEN
:
6708 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6709 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6710 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6711 case BFD_RELOC_PPC64_REL24_NOTOC
:
6714 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6715 elf_symbol_type
*elfsym
6716 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6717 gas_assert (elfsym
);
6718 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6726 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
6727 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
6728 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
6729 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
6730 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
6731 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
6732 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
6733 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
6734 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
6735 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6736 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
));
6741 ppc_frag_check (struct frag
*fragP
)
6743 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
6744 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6745 _("instruction address is not a multiple of %d"),
6746 fragP
->insn_addr
+ 1);
6749 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6750 rs_align_code frag. */
6753 ppc_handle_align (struct frag
*fragP
)
6755 valueT count
= (fragP
->fr_next
->fr_address
6756 - (fragP
->fr_address
+ fragP
->fr_fix
));
6758 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && count
!= 0 && (count
& 1) == 0)
6760 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6763 md_number_to_chars (dest
, 0x4400, 2);
6765 else if (count
!= 0 && (count
& 3) == 0)
6767 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6771 if (count
> 4 * nop_limit
&& count
< 0x2000000)
6775 /* Make a branch, then follow with nops. Insert another
6776 frag to handle the nops. */
6777 md_number_to_chars (dest
, 0x48000000 + count
, 4);
6782 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6783 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
6784 fragP
->fr_next
= rest
;
6786 rest
->fr_address
+= rest
->fr_fix
+ 4;
6788 /* If we leave the next frag as rs_align_code we'll come here
6789 again, resulting in a bunch of branches rather than a
6790 branch followed by nops. */
6791 rest
->fr_type
= rs_align
;
6792 dest
= rest
->fr_literal
;
6795 md_number_to_chars (dest
, 0x60000000, 4);
6797 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0
6798 && (ppc_cpu
& PPC_OPCODE_POWER9
) == 0)
6800 /* For power6, power7, and power8, we want the last nop to
6801 be a group terminating one. Do this by inserting an
6802 rs_fill frag immediately after this one, with its address
6803 set to the last nop location. This will automatically
6804 reduce the number of nops in the current frag by one. */
6807 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6809 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
6810 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
6811 group_nop
->fr_fix
= 0;
6812 group_nop
->fr_offset
= 1;
6813 group_nop
->fr_type
= rs_fill
;
6814 fragP
->fr_next
= group_nop
;
6815 dest
= group_nop
->fr_literal
;
6818 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
6820 if (ppc_cpu
& PPC_OPCODE_E500MC
)
6821 /* e500mc group terminating nop: "ori 0,0,0". */
6822 md_number_to_chars (dest
, 0x60000000, 4);
6824 /* power7/power8 group terminating nop: "ori 2,2,0". */
6825 md_number_to_chars (dest
, 0x60420000, 4);
6828 /* power6 group terminating nop: "ori 1,1,0". */
6829 md_number_to_chars (dest
, 0x60210000, 4);
6834 /* Apply a fixup to the object code. This is called for all the
6835 fixups we generated by the calls to fix_new_exp, above. */
6838 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
6840 valueT value
= * valP
;
6842 const struct powerpc_operand
*operand
;
6845 if (fixP
->fx_addsy
!= NULL
)
6847 /* Hack around bfd_install_relocation brain damage. */
6849 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
6851 if (fixP
->fx_addsy
== abs_section_sym
)
6857 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6858 the symbol values. If we are doing this relocation the code in
6859 write.c is going to call bfd_install_relocation, which is also
6860 going to use the symbol value. That means that if the reloc is
6861 fully resolved we want to use *valP since bfd_install_relocation is
6863 However, if the reloc is not fully resolved we do not want to
6864 use *valP, and must use fx_offset instead. If the relocation
6865 is PC-relative, we then need to re-apply md_pcrel_from_section
6866 to this new relocation value. */
6867 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
6872 value
= fixP
->fx_offset
;
6874 value
-= md_pcrel_from_section (fixP
, seg
);
6878 /* We are only able to convert some relocs to pc-relative. */
6881 switch (fixP
->fx_r_type
)
6884 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
6888 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
6892 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
6895 case BFD_RELOC_LO16
:
6896 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
6899 case BFD_RELOC_HI16
:
6900 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
6903 case BFD_RELOC_HI16_S
:
6904 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
6907 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6908 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGH
;
6911 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6912 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHA
;
6915 case BFD_RELOC_PPC64_HIGHER
:
6916 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER
;
6919 case BFD_RELOC_PPC64_HIGHER_S
:
6920 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA
;
6923 case BFD_RELOC_PPC64_HIGHEST
:
6924 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST
;
6927 case BFD_RELOC_PPC64_HIGHEST_S
:
6928 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA
;
6931 case BFD_RELOC_PPC_16DX_HA
:
6932 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6939 else if (!fixP
->fx_done
6940 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
6942 /* addpcis is relative to next insn address. */
6944 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6949 if (fixP
->fx_pcrel_adjust
!= 0)
6951 /* This is a fixup on an instruction. */
6952 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
6954 operand
= &powerpc_operands
[opindex
];
6956 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6957 does not generate a reloc. It uses the offset of `sym' within its
6958 csect. Other usages, such as `.long sym', generate relocs. This
6959 is the documented behaviour of non-TOC symbols. */
6960 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
6961 && (operand
->bitm
& 0xfff0) == 0xfff0
6962 && operand
->shift
== 0
6963 && (operand
->insert
== NULL
|| ppc_obj64
)
6964 && fixP
->fx_addsy
!= NULL
6965 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
6966 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
6967 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC0
6968 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
6970 value
= fixP
->fx_offset
;
6974 /* During parsing of instructions, a TOC16 reloc is generated for
6975 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6976 in the toc. But at parse time, SYM may be not yet defined, so
6977 check again here. */
6978 if (fixP
->fx_r_type
== BFD_RELOC_16
6979 && fixP
->fx_addsy
!= NULL
6980 && ppc_is_toc_sym (fixP
->fx_addsy
))
6981 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
6985 /* Calculate value to be stored in field. */
6987 switch (fixP
->fx_r_type
)
6990 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
6991 case BFD_RELOC_PPC_VLE_LO16A
:
6992 case BFD_RELOC_PPC_VLE_LO16D
:
6994 case BFD_RELOC_LO16
:
6995 case BFD_RELOC_LO16_PCREL
:
6996 fieldval
= value
& 0xffff;
6998 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6999 fieldval
= SEX16 (fieldval
);
7000 fixP
->fx_no_overflow
= 1;
7003 case BFD_RELOC_HI16
:
7004 case BFD_RELOC_HI16_PCREL
:
7006 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7008 fieldval
= value
>> 16;
7009 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7011 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7012 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7018 case BFD_RELOC_PPC_VLE_HI16A
:
7019 case BFD_RELOC_PPC_VLE_HI16D
:
7020 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7022 fieldval
= PPC_HI (value
);
7023 goto sign_extend_16
;
7025 case BFD_RELOC_HI16_S
:
7026 case BFD_RELOC_HI16_S_PCREL
:
7027 case BFD_RELOC_PPC_16DX_HA
:
7028 case BFD_RELOC_PPC_REL16DX_HA
:
7030 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7032 fieldval
= (value
+ 0x8000) >> 16;
7033 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7035 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7036 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7042 case BFD_RELOC_PPC_VLE_HA16A
:
7043 case BFD_RELOC_PPC_VLE_HA16D
:
7044 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7046 fieldval
= PPC_HA (value
);
7047 goto sign_extend_16
;
7050 case BFD_RELOC_PPC64_HIGHER
:
7051 fieldval
= PPC_HIGHER (value
);
7052 goto sign_extend_16
;
7054 case BFD_RELOC_PPC64_HIGHER_S
:
7055 fieldval
= PPC_HIGHERA (value
);
7056 goto sign_extend_16
;
7058 case BFD_RELOC_PPC64_HIGHEST
:
7059 fieldval
= PPC_HIGHEST (value
);
7060 goto sign_extend_16
;
7062 case BFD_RELOC_PPC64_HIGHEST_S
:
7063 fieldval
= PPC_HIGHESTA (value
);
7064 goto sign_extend_16
;
7071 if (operand
!= NULL
)
7073 /* Handle relocs in an insn. */
7074 switch (fixP
->fx_r_type
)
7077 /* The following relocs can't be calculated by the assembler.
7078 Leave the field zero. */
7079 case BFD_RELOC_PPC_TPREL16
:
7080 case BFD_RELOC_PPC_TPREL16_LO
:
7081 case BFD_RELOC_PPC_TPREL16_HI
:
7082 case BFD_RELOC_PPC_TPREL16_HA
:
7083 case BFD_RELOC_PPC_DTPREL16
:
7084 case BFD_RELOC_PPC_DTPREL16_LO
:
7085 case BFD_RELOC_PPC_DTPREL16_HI
:
7086 case BFD_RELOC_PPC_DTPREL16_HA
:
7087 case BFD_RELOC_PPC_GOT_TLSGD16
:
7088 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7089 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7090 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7091 case BFD_RELOC_PPC_GOT_TLSLD16
:
7092 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7093 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7094 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7095 case BFD_RELOC_PPC_GOT_TPREL16
:
7096 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7097 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7098 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7099 case BFD_RELOC_PPC_GOT_DTPREL16
:
7100 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7101 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7102 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7103 case BFD_RELOC_PPC64_TPREL16_DS
:
7104 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
7105 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7106 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7107 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7108 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7109 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7110 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7111 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7112 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7113 case BFD_RELOC_PPC64_DTPREL16_DS
:
7114 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
7115 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7116 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7117 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7118 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7119 gas_assert (fixP
->fx_addsy
!= NULL
);
7120 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7124 /* These also should leave the field zero for the same
7125 reason. Note that older versions of gas wrote values
7126 here. If we want to go back to the old behaviour, then
7127 all _LO and _LO_DS cases will need to be treated like
7128 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
7129 case BFD_RELOC_16_GOTOFF
:
7130 case BFD_RELOC_LO16_GOTOFF
:
7131 case BFD_RELOC_HI16_GOTOFF
:
7132 case BFD_RELOC_HI16_S_GOTOFF
:
7133 case BFD_RELOC_LO16_PLTOFF
:
7134 case BFD_RELOC_HI16_PLTOFF
:
7135 case BFD_RELOC_HI16_S_PLTOFF
:
7136 case BFD_RELOC_GPREL16
:
7137 case BFD_RELOC_16_BASEREL
:
7138 case BFD_RELOC_LO16_BASEREL
:
7139 case BFD_RELOC_HI16_BASEREL
:
7140 case BFD_RELOC_HI16_S_BASEREL
:
7141 case BFD_RELOC_PPC_TOC16
:
7142 case BFD_RELOC_PPC64_TOC16_LO
:
7143 case BFD_RELOC_PPC64_TOC16_HI
:
7144 case BFD_RELOC_PPC64_TOC16_HA
:
7145 case BFD_RELOC_PPC64_PLTGOT16
:
7146 case BFD_RELOC_PPC64_PLTGOT16_LO
:
7147 case BFD_RELOC_PPC64_PLTGOT16_HI
:
7148 case BFD_RELOC_PPC64_PLTGOT16_HA
:
7149 case BFD_RELOC_PPC64_GOT16_DS
:
7150 case BFD_RELOC_PPC64_GOT16_LO_DS
:
7151 case BFD_RELOC_PPC64_PLT16_LO_DS
:
7152 case BFD_RELOC_PPC64_SECTOFF_DS
:
7153 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
7154 case BFD_RELOC_PPC64_TOC16_DS
:
7155 case BFD_RELOC_PPC64_TOC16_LO_DS
:
7156 case BFD_RELOC_PPC64_PLTGOT16_DS
:
7157 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
7158 case BFD_RELOC_PPC_EMB_NADDR16
:
7159 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7160 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7161 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7162 case BFD_RELOC_PPC_EMB_SDAI16
:
7163 case BFD_RELOC_PPC_EMB_SDA2I16
:
7164 case BFD_RELOC_PPC_EMB_SDA2REL
:
7165 case BFD_RELOC_PPC_EMB_SDA21
:
7166 case BFD_RELOC_PPC_EMB_MRKREF
:
7167 case BFD_RELOC_PPC_EMB_RELSEC16
:
7168 case BFD_RELOC_PPC_EMB_RELST_LO
:
7169 case BFD_RELOC_PPC_EMB_RELST_HI
:
7170 case BFD_RELOC_PPC_EMB_RELST_HA
:
7171 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7172 case BFD_RELOC_PPC_EMB_RELSDA
:
7173 case BFD_RELOC_PPC_VLE_SDA21
:
7174 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7175 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7176 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
7177 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7178 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
7179 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7180 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
7181 gas_assert (fixP
->fx_addsy
!= NULL
);
7184 case BFD_RELOC_PPC_TLS
:
7185 case BFD_RELOC_PPC_TLSGD
:
7186 case BFD_RELOC_PPC_TLSLD
:
7192 case BFD_RELOC_PPC_B16
:
7193 /* Adjust the offset to the instruction boundary. */
7198 case BFD_RELOC_VTABLE_INHERIT
:
7199 case BFD_RELOC_VTABLE_ENTRY
:
7200 case BFD_RELOC_PPC_DTPMOD
:
7201 case BFD_RELOC_PPC_TPREL
:
7202 case BFD_RELOC_PPC_DTPREL
:
7203 case BFD_RELOC_PPC_COPY
:
7204 case BFD_RELOC_PPC_GLOB_DAT
:
7205 case BFD_RELOC_32_PLT_PCREL
:
7206 case BFD_RELOC_PPC_EMB_NADDR32
:
7207 case BFD_RELOC_PPC64_TOC
:
7208 case BFD_RELOC_CTOR
:
7210 case BFD_RELOC_32_PCREL
:
7213 case BFD_RELOC_64_PCREL
:
7214 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7215 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7216 _("%s unsupported as instruction fixup"),
7217 bfd_get_reloc_code_name (fixP
->fx_r_type
));
7226 /* powerpc uses RELA style relocs, so if emitting a reloc the field
7227 contents can stay at zero. */
7228 #define APPLY_RELOC fixP->fx_done
7230 #define APPLY_RELOC 1
7232 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
7235 unsigned char *where
;
7237 /* Fetch the instruction, insert the fully resolved operand
7238 value, and stuff the instruction back again. */
7239 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
7240 if (target_big_endian
)
7242 if (fixP
->fx_size
== 4)
7243 insn
= bfd_getb32 (where
);
7245 insn
= bfd_getb16 (where
);
7249 if (fixP
->fx_size
== 4)
7250 insn
= bfd_getl32 (where
);
7252 insn
= bfd_getl16 (where
);
7254 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
7255 fixP
->tc_fix_data
.ppc_cpu
,
7256 fixP
->fx_file
, fixP
->fx_line
);
7257 if (target_big_endian
)
7259 if (fixP
->fx_size
== 4)
7260 bfd_putb32 (insn
, where
);
7262 bfd_putb16 (insn
, where
);
7266 if (fixP
->fx_size
== 4)
7267 bfd_putl32 (insn
, where
);
7269 bfd_putl16 (insn
, where
);
7274 /* Nothing else to do here. */
7277 gas_assert (fixP
->fx_addsy
!= NULL
);
7278 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7283 /* Use expr_symbol_where to see if this is an expression
7285 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7286 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7287 _("unresolved expression that must be resolved"));
7289 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7290 _("unsupported relocation against %s"),
7291 S_GET_NAME (fixP
->fx_addsy
));
7298 /* Handle relocs in data. */
7299 switch (fixP
->fx_r_type
)
7301 case BFD_RELOC_VTABLE_INHERIT
:
7303 && !S_IS_DEFINED (fixP
->fx_addsy
)
7304 && !S_IS_WEAK (fixP
->fx_addsy
))
7305 S_SET_WEAK (fixP
->fx_addsy
);
7308 case BFD_RELOC_VTABLE_ENTRY
:
7313 /* These can appear with @l etc. in data. */
7314 case BFD_RELOC_LO16
:
7315 case BFD_RELOC_LO16_PCREL
:
7316 case BFD_RELOC_HI16
:
7317 case BFD_RELOC_HI16_PCREL
:
7318 case BFD_RELOC_HI16_S
:
7319 case BFD_RELOC_HI16_S_PCREL
:
7320 case BFD_RELOC_PPC64_HIGHER
:
7321 case BFD_RELOC_PPC64_HIGHER_S
:
7322 case BFD_RELOC_PPC64_HIGHEST
:
7323 case BFD_RELOC_PPC64_HIGHEST_S
:
7324 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7325 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7326 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7329 case BFD_RELOC_PPC_DTPMOD
:
7330 case BFD_RELOC_PPC_TPREL
:
7331 case BFD_RELOC_PPC_DTPREL
:
7332 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7335 /* Just punt all of these to the linker. */
7336 case BFD_RELOC_PPC_B16_BRTAKEN
:
7337 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7338 case BFD_RELOC_16_GOTOFF
:
7339 case BFD_RELOC_LO16_GOTOFF
:
7340 case BFD_RELOC_HI16_GOTOFF
:
7341 case BFD_RELOC_HI16_S_GOTOFF
:
7342 case BFD_RELOC_LO16_PLTOFF
:
7343 case BFD_RELOC_HI16_PLTOFF
:
7344 case BFD_RELOC_HI16_S_PLTOFF
:
7345 case BFD_RELOC_PPC_COPY
:
7346 case BFD_RELOC_PPC_GLOB_DAT
:
7347 case BFD_RELOC_16_BASEREL
:
7348 case BFD_RELOC_LO16_BASEREL
:
7349 case BFD_RELOC_HI16_BASEREL
:
7350 case BFD_RELOC_HI16_S_BASEREL
:
7351 case BFD_RELOC_PPC_TLS
:
7352 case BFD_RELOC_PPC_DTPREL16_LO
:
7353 case BFD_RELOC_PPC_DTPREL16_HI
:
7354 case BFD_RELOC_PPC_DTPREL16_HA
:
7355 case BFD_RELOC_PPC_TPREL16_LO
:
7356 case BFD_RELOC_PPC_TPREL16_HI
:
7357 case BFD_RELOC_PPC_TPREL16_HA
:
7358 case BFD_RELOC_PPC_GOT_TLSGD16
:
7359 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7360 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7361 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7362 case BFD_RELOC_PPC_GOT_TLSLD16
:
7363 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7364 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7365 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7366 case BFD_RELOC_PPC_GOT_DTPREL16
:
7367 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7368 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7369 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7370 case BFD_RELOC_PPC_GOT_TPREL16
:
7371 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7372 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7373 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7374 case BFD_RELOC_24_PLT_PCREL
:
7375 case BFD_RELOC_PPC_LOCAL24PC
:
7376 case BFD_RELOC_32_PLT_PCREL
:
7377 case BFD_RELOC_GPREL16
:
7378 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7379 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7380 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7381 case BFD_RELOC_PPC_EMB_NADDR32
:
7382 case BFD_RELOC_PPC_EMB_NADDR16
:
7383 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7384 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7385 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7386 case BFD_RELOC_PPC_EMB_SDAI16
:
7387 case BFD_RELOC_PPC_EMB_SDA2REL
:
7388 case BFD_RELOC_PPC_EMB_SDA2I16
:
7389 case BFD_RELOC_PPC_EMB_SDA21
:
7390 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7391 case BFD_RELOC_PPC_EMB_MRKREF
:
7392 case BFD_RELOC_PPC_EMB_RELSEC16
:
7393 case BFD_RELOC_PPC_EMB_RELST_LO
:
7394 case BFD_RELOC_PPC_EMB_RELST_HI
:
7395 case BFD_RELOC_PPC_EMB_RELST_HA
:
7396 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7397 case BFD_RELOC_PPC_EMB_RELSDA
:
7398 case BFD_RELOC_PPC64_TOC
:
7399 case BFD_RELOC_PPC_TOC16
:
7400 case BFD_RELOC_PPC64_TOC16_LO
:
7401 case BFD_RELOC_PPC64_TOC16_HI
:
7402 case BFD_RELOC_PPC64_TOC16_HA
:
7403 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7404 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7405 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7406 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7407 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7408 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7409 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7410 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7411 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7412 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7413 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7414 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7420 case BFD_RELOC_NONE
:
7422 case BFD_RELOC_CTOR
:
7424 case BFD_RELOC_32_PCREL
:
7427 case BFD_RELOC_64_PCREL
:
7429 case BFD_RELOC_16_PCREL
:
7435 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7440 if (fixP
->fx_size
&& APPLY_RELOC
)
7441 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7442 fieldval
, fixP
->fx_size
);
7444 && (seg
->flags
& SEC_CODE
) != 0
7445 && fixP
->fx_size
== 4
7448 && (fixP
->fx_r_type
== BFD_RELOC_32
7449 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7450 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7451 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7452 _("data in executable section"));
7456 ppc_elf_validate_fix (fixP
, seg
);
7457 fixP
->fx_addnumber
= value
;
7459 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7460 from the section contents. If we are going to be emitting a reloc
7461 then the section contents are immaterial, so don't warn if they
7462 happen to overflow. Leave such warnings to ld. */
7465 fixP
->fx_no_overflow
= 1;
7467 /* Arrange to emit .TOC. as a normal symbol if used in anything
7468 but .TOC.@tocbase. */
7470 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7471 && fixP
->fx_addsy
!= NULL
7472 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7473 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7476 if (fixP
->fx_r_type
!= BFD_RELOC_PPC_TOC16
)
7477 fixP
->fx_addnumber
= 0;
7481 fixP
->fx_addnumber
= 0;
7483 /* We want to use the offset within the toc, not the actual VMA
7485 fixP
->fx_addnumber
=
7486 - bfd_get_section_vma (stdoutput
, S_GET_SEGMENT (fixP
->fx_addsy
))
7487 - S_GET_VALUE (ppc_toc_csect
);
7488 /* Set *valP to avoid errors. */
7495 /* Generate a reloc for a fixup. */
7498 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7502 reloc
= XNEW (arelent
);
7504 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7505 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7506 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7507 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7508 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7510 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7511 _("reloc %d not supported by object file format"),
7512 (int) fixp
->fx_r_type
);
7515 reloc
->addend
= fixp
->fx_addnumber
;
7521 ppc_cfi_frame_initial_instructions (void)
7523 cfi_add_CFA_def_cfa (1, 0);
7527 tc_ppc_regname_to_dw2regnum (char *regname
)
7529 unsigned int regnum
= -1;
7533 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7535 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7536 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7537 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7538 { "spe_acc", 111 }, { "spefscr", 112 }
7541 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7542 if (strcmp (regnames
[i
].name
, regname
) == 0)
7543 return regnames
[i
].dw2regnum
;
7545 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7547 p
= regname
+ 1 + (regname
[1] == '.');
7548 regnum
= strtoul (p
, &q
, 10);
7549 if (p
== q
|| *q
|| regnum
>= 32)
7551 if (regname
[0] == 'f')
7553 else if (regname
[0] == 'v')
7556 else if (regname
[0] == 'c' && regname
[1] == 'r')
7558 p
= regname
+ 2 + (regname
[2] == '.');
7559 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7561 regnum
= p
[0] - '0' + 68;