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include/opcode/
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
22
23 #include "as.h"
24 #include "safe-ctype.h"
25 #include "subsegs.h"
26 #include "dw2gencfi.h"
27 #include "opcode/ppc.h"
28
29 #ifdef OBJ_ELF
30 #include "elf/ppc.h"
31 #include "dwarf2dbg.h"
32 #endif
33
34 #ifdef TE_PE
35 #include "coff/pe.h"
36 #endif
37
38 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40 /* Tell the main code what the endianness is. */
41 extern int target_big_endian;
42
43 /* Whether or not, we've set target_big_endian. */
44 static int set_target_endian = 0;
45
46 /* Whether to use user friendly register names. */
47 #ifndef TARGET_REG_NAMES_P
48 #ifdef TE_PE
49 #define TARGET_REG_NAMES_P TRUE
50 #else
51 #define TARGET_REG_NAMES_P FALSE
52 #endif
53 #endif
54
55 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58 /* #lo(value) denotes the least significant 16 bits of the indicated. */
59 #define PPC_LO(v) ((v) & 0xffff)
60
61 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
62 #define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
67 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
68
69 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
70 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
71
72 /* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
74 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
75
76 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
77 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
78
79 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
80 compensating for #lo being treated as a signed number. */
81 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
82
83 #define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
85 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
86
87 static void ppc_macro (char *, const struct powerpc_macro *);
88 static void ppc_byte (int);
89
90 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
91 static void ppc_tc (int);
92 static void ppc_machine (int);
93 #endif
94
95 #ifdef OBJ_XCOFF
96 static void ppc_comm (int);
97 static void ppc_bb (int);
98 static void ppc_bc (int);
99 static void ppc_bf (int);
100 static void ppc_biei (int);
101 static void ppc_bs (int);
102 static void ppc_eb (int);
103 static void ppc_ec (int);
104 static void ppc_ef (int);
105 static void ppc_es (int);
106 static void ppc_csect (int);
107 static void ppc_change_csect (symbolS *, offsetT);
108 static void ppc_function (int);
109 static void ppc_extern (int);
110 static void ppc_lglobl (int);
111 static void ppc_section (int);
112 static void ppc_named_section (int);
113 static void ppc_stabx (int);
114 static void ppc_rename (int);
115 static void ppc_toc (int);
116 static void ppc_xcoff_cons (int);
117 static void ppc_vbyte (int);
118 #endif
119
120 #ifdef OBJ_ELF
121 static void ppc_elf_cons (int);
122 static void ppc_elf_rdata (int);
123 static void ppc_elf_lcomm (int);
124 #endif
125
126 #ifdef TE_PE
127 static void ppc_previous (int);
128 static void ppc_pdata (int);
129 static void ppc_ydata (int);
130 static void ppc_reldata (int);
131 static void ppc_rdata (int);
132 static void ppc_ualong (int);
133 static void ppc_znop (int);
134 static void ppc_pe_comm (int);
135 static void ppc_pe_section (int);
136 static void ppc_pe_function (int);
137 static void ppc_pe_tocd (int);
138 #endif
139 \f
140 /* Generic assembler global variables which must be defined by all
141 targets. */
142
143 #ifdef OBJ_ELF
144 /* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148 static const char ppc_solaris_comment_chars[] = "#!";
149 static const char ppc_eabi_comment_chars[] = "#";
150
151 #ifdef TARGET_SOLARIS_COMMENT
152 const char *ppc_comment_chars = ppc_solaris_comment_chars;
153 #else
154 const char *ppc_comment_chars = ppc_eabi_comment_chars;
155 #endif
156 #else
157 const char comment_chars[] = "#";
158 #endif
159
160 /* Characters which start a comment at the beginning of a line. */
161 const char line_comment_chars[] = "#";
162
163 /* Characters which may be used to separate multiple commands on a
164 single line. */
165 const char line_separator_chars[] = ";";
166
167 /* Characters which are used to indicate an exponent in a floating
168 point number. */
169 const char EXP_CHARS[] = "eE";
170
171 /* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173 const char FLT_CHARS[] = "dD";
174
175 /* Anything that can start an operand needs to be mentioned here,
176 to stop the input scrubber eating whitespace. */
177 const char ppc_symbol_chars[] = "%[";
178
179 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180 int ppc_cie_data_alignment;
181
182 /* The type of processor we are assembling for. This is one or more
183 of the PPC_OPCODE flags defined in opcode/ppc.h. */
184 ppc_cpu_t ppc_cpu = 0;
185 \f
186 /* The target specific pseudo-ops which we support. */
187
188 const pseudo_typeS md_pseudo_table[] =
189 {
190 /* Pseudo-ops which must be overridden. */
191 { "byte", ppc_byte, 0 },
192
193 #ifdef OBJ_XCOFF
194 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
195 legitimately belong in the obj-*.c file. However, XCOFF is based
196 on COFF, and is only implemented for the RS/6000. We just use
197 obj-coff.c, and add what we need here. */
198 { "comm", ppc_comm, 0 },
199 { "lcomm", ppc_comm, 1 },
200 { "bb", ppc_bb, 0 },
201 { "bc", ppc_bc, 0 },
202 { "bf", ppc_bf, 0 },
203 { "bi", ppc_biei, 0 },
204 { "bs", ppc_bs, 0 },
205 { "csect", ppc_csect, 0 },
206 { "data", ppc_section, 'd' },
207 { "eb", ppc_eb, 0 },
208 { "ec", ppc_ec, 0 },
209 { "ef", ppc_ef, 0 },
210 { "ei", ppc_biei, 1 },
211 { "es", ppc_es, 0 },
212 { "extern", ppc_extern, 0 },
213 { "function", ppc_function, 0 },
214 { "lglobl", ppc_lglobl, 0 },
215 { "rename", ppc_rename, 0 },
216 { "section", ppc_named_section, 0 },
217 { "stabx", ppc_stabx, 0 },
218 { "text", ppc_section, 't' },
219 { "toc", ppc_toc, 0 },
220 { "long", ppc_xcoff_cons, 2 },
221 { "llong", ppc_xcoff_cons, 3 },
222 { "word", ppc_xcoff_cons, 1 },
223 { "short", ppc_xcoff_cons, 1 },
224 { "vbyte", ppc_vbyte, 0 },
225 #endif
226
227 #ifdef OBJ_ELF
228 { "llong", ppc_elf_cons, 8 },
229 { "quad", ppc_elf_cons, 8 },
230 { "long", ppc_elf_cons, 4 },
231 { "word", ppc_elf_cons, 2 },
232 { "short", ppc_elf_cons, 2 },
233 { "rdata", ppc_elf_rdata, 0 },
234 { "rodata", ppc_elf_rdata, 0 },
235 { "lcomm", ppc_elf_lcomm, 0 },
236 #endif
237
238 #ifdef TE_PE
239 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
240 { "previous", ppc_previous, 0 },
241 { "pdata", ppc_pdata, 0 },
242 { "ydata", ppc_ydata, 0 },
243 { "reldata", ppc_reldata, 0 },
244 { "rdata", ppc_rdata, 0 },
245 { "ualong", ppc_ualong, 0 },
246 { "znop", ppc_znop, 0 },
247 { "comm", ppc_pe_comm, 0 },
248 { "lcomm", ppc_pe_comm, 1 },
249 { "section", ppc_pe_section, 0 },
250 { "function", ppc_pe_function,0 },
251 { "tocd", ppc_pe_tocd, 0 },
252 #endif
253
254 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
255 { "tc", ppc_tc, 0 },
256 { "machine", ppc_machine, 0 },
257 #endif
258
259 { NULL, NULL, 0 }
260 };
261
262 \f
263 /* Predefined register names if -mregnames (or default for Windows NT).
264 In general, there are lots of them, in an attempt to be compatible
265 with a number of other Windows NT assemblers. */
266
267 /* Structure to hold information about predefined registers. */
268 struct pd_reg
269 {
270 char *name;
271 int value;
272 };
273
274 /* List of registers that are pre-defined:
275
276 Each general register has predefined names of the form:
277 1. r<reg_num> which has the value <reg_num>.
278 2. r.<reg_num> which has the value <reg_num>.
279
280 Each floating point register has predefined names of the form:
281 1. f<reg_num> which has the value <reg_num>.
282 2. f.<reg_num> which has the value <reg_num>.
283
284 Each vector unit register has predefined names of the form:
285 1. v<reg_num> which has the value <reg_num>.
286 2. v.<reg_num> which has the value <reg_num>.
287
288 Each condition register has predefined names of the form:
289 1. cr<reg_num> which has the value <reg_num>.
290 2. cr.<reg_num> which has the value <reg_num>.
291
292 There are individual registers as well:
293 sp or r.sp has the value 1
294 rtoc or r.toc has the value 2
295 fpscr has the value 0
296 xer has the value 1
297 lr has the value 8
298 ctr has the value 9
299 pmr has the value 0
300 dar has the value 19
301 dsisr has the value 18
302 dec has the value 22
303 sdr1 has the value 25
304 srr0 has the value 26
305 srr1 has the value 27
306
307 The table is sorted. Suitable for searching by a binary search. */
308
309 static const struct pd_reg pre_defined_registers[] =
310 {
311 { "cr.0", 0 }, /* Condition Registers */
312 { "cr.1", 1 },
313 { "cr.2", 2 },
314 { "cr.3", 3 },
315 { "cr.4", 4 },
316 { "cr.5", 5 },
317 { "cr.6", 6 },
318 { "cr.7", 7 },
319
320 { "cr0", 0 },
321 { "cr1", 1 },
322 { "cr2", 2 },
323 { "cr3", 3 },
324 { "cr4", 4 },
325 { "cr5", 5 },
326 { "cr6", 6 },
327 { "cr7", 7 },
328
329 { "ctr", 9 },
330
331 { "dar", 19 }, /* Data Access Register */
332 { "dec", 22 }, /* Decrementer */
333 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
334
335 { "f.0", 0 }, /* Floating point registers */
336 { "f.1", 1 },
337 { "f.10", 10 },
338 { "f.11", 11 },
339 { "f.12", 12 },
340 { "f.13", 13 },
341 { "f.14", 14 },
342 { "f.15", 15 },
343 { "f.16", 16 },
344 { "f.17", 17 },
345 { "f.18", 18 },
346 { "f.19", 19 },
347 { "f.2", 2 },
348 { "f.20", 20 },
349 { "f.21", 21 },
350 { "f.22", 22 },
351 { "f.23", 23 },
352 { "f.24", 24 },
353 { "f.25", 25 },
354 { "f.26", 26 },
355 { "f.27", 27 },
356 { "f.28", 28 },
357 { "f.29", 29 },
358 { "f.3", 3 },
359 { "f.30", 30 },
360 { "f.31", 31 },
361 { "f.4", 4 },
362 { "f.5", 5 },
363 { "f.6", 6 },
364 { "f.7", 7 },
365 { "f.8", 8 },
366 { "f.9", 9 },
367
368 { "f0", 0 },
369 { "f1", 1 },
370 { "f10", 10 },
371 { "f11", 11 },
372 { "f12", 12 },
373 { "f13", 13 },
374 { "f14", 14 },
375 { "f15", 15 },
376 { "f16", 16 },
377 { "f17", 17 },
378 { "f18", 18 },
379 { "f19", 19 },
380 { "f2", 2 },
381 { "f20", 20 },
382 { "f21", 21 },
383 { "f22", 22 },
384 { "f23", 23 },
385 { "f24", 24 },
386 { "f25", 25 },
387 { "f26", 26 },
388 { "f27", 27 },
389 { "f28", 28 },
390 { "f29", 29 },
391 { "f3", 3 },
392 { "f30", 30 },
393 { "f31", 31 },
394 { "f4", 4 },
395 { "f5", 5 },
396 { "f6", 6 },
397 { "f7", 7 },
398 { "f8", 8 },
399 { "f9", 9 },
400
401 { "fpscr", 0 },
402
403 /* Quantization registers used with pair single instructions. */
404 { "gqr.0", 0 },
405 { "gqr.1", 1 },
406 { "gqr.2", 2 },
407 { "gqr.3", 3 },
408 { "gqr.4", 4 },
409 { "gqr.5", 5 },
410 { "gqr.6", 6 },
411 { "gqr.7", 7 },
412 { "gqr0", 0 },
413 { "gqr1", 1 },
414 { "gqr2", 2 },
415 { "gqr3", 3 },
416 { "gqr4", 4 },
417 { "gqr5", 5 },
418 { "gqr6", 6 },
419 { "gqr7", 7 },
420
421 { "lr", 8 }, /* Link Register */
422
423 { "pmr", 0 },
424
425 { "r.0", 0 }, /* General Purpose Registers */
426 { "r.1", 1 },
427 { "r.10", 10 },
428 { "r.11", 11 },
429 { "r.12", 12 },
430 { "r.13", 13 },
431 { "r.14", 14 },
432 { "r.15", 15 },
433 { "r.16", 16 },
434 { "r.17", 17 },
435 { "r.18", 18 },
436 { "r.19", 19 },
437 { "r.2", 2 },
438 { "r.20", 20 },
439 { "r.21", 21 },
440 { "r.22", 22 },
441 { "r.23", 23 },
442 { "r.24", 24 },
443 { "r.25", 25 },
444 { "r.26", 26 },
445 { "r.27", 27 },
446 { "r.28", 28 },
447 { "r.29", 29 },
448 { "r.3", 3 },
449 { "r.30", 30 },
450 { "r.31", 31 },
451 { "r.4", 4 },
452 { "r.5", 5 },
453 { "r.6", 6 },
454 { "r.7", 7 },
455 { "r.8", 8 },
456 { "r.9", 9 },
457
458 { "r.sp", 1 }, /* Stack Pointer */
459
460 { "r.toc", 2 }, /* Pointer to the table of contents */
461
462 { "r0", 0 }, /* More general purpose registers */
463 { "r1", 1 },
464 { "r10", 10 },
465 { "r11", 11 },
466 { "r12", 12 },
467 { "r13", 13 },
468 { "r14", 14 },
469 { "r15", 15 },
470 { "r16", 16 },
471 { "r17", 17 },
472 { "r18", 18 },
473 { "r19", 19 },
474 { "r2", 2 },
475 { "r20", 20 },
476 { "r21", 21 },
477 { "r22", 22 },
478 { "r23", 23 },
479 { "r24", 24 },
480 { "r25", 25 },
481 { "r26", 26 },
482 { "r27", 27 },
483 { "r28", 28 },
484 { "r29", 29 },
485 { "r3", 3 },
486 { "r30", 30 },
487 { "r31", 31 },
488 { "r4", 4 },
489 { "r5", 5 },
490 { "r6", 6 },
491 { "r7", 7 },
492 { "r8", 8 },
493 { "r9", 9 },
494
495 { "rtoc", 2 }, /* Table of contents */
496
497 { "sdr1", 25 }, /* Storage Description Register 1 */
498
499 { "sp", 1 },
500
501 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
502 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
503
504 { "v.0", 0 }, /* Vector registers */
505 { "v.1", 1 },
506 { "v.10", 10 },
507 { "v.11", 11 },
508 { "v.12", 12 },
509 { "v.13", 13 },
510 { "v.14", 14 },
511 { "v.15", 15 },
512 { "v.16", 16 },
513 { "v.17", 17 },
514 { "v.18", 18 },
515 { "v.19", 19 },
516 { "v.2", 2 },
517 { "v.20", 20 },
518 { "v.21", 21 },
519 { "v.22", 22 },
520 { "v.23", 23 },
521 { "v.24", 24 },
522 { "v.25", 25 },
523 { "v.26", 26 },
524 { "v.27", 27 },
525 { "v.28", 28 },
526 { "v.29", 29 },
527 { "v.3", 3 },
528 { "v.30", 30 },
529 { "v.31", 31 },
530 { "v.4", 4 },
531 { "v.5", 5 },
532 { "v.6", 6 },
533 { "v.7", 7 },
534 { "v.8", 8 },
535 { "v.9", 9 },
536
537 { "v0", 0 },
538 { "v1", 1 },
539 { "v10", 10 },
540 { "v11", 11 },
541 { "v12", 12 },
542 { "v13", 13 },
543 { "v14", 14 },
544 { "v15", 15 },
545 { "v16", 16 },
546 { "v17", 17 },
547 { "v18", 18 },
548 { "v19", 19 },
549 { "v2", 2 },
550 { "v20", 20 },
551 { "v21", 21 },
552 { "v22", 22 },
553 { "v23", 23 },
554 { "v24", 24 },
555 { "v25", 25 },
556 { "v26", 26 },
557 { "v27", 27 },
558 { "v28", 28 },
559 { "v29", 29 },
560 { "v3", 3 },
561 { "v30", 30 },
562 { "v31", 31 },
563 { "v4", 4 },
564 { "v5", 5 },
565 { "v6", 6 },
566 { "v7", 7 },
567 { "v8", 8 },
568 { "v9", 9 },
569
570 { "xer", 1 },
571
572 };
573
574 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
575
576 /* Given NAME, find the register number associated with that name, return
577 the integer value associated with the given name or -1 on failure. */
578
579 static int
580 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
581 {
582 int middle, low, high;
583 int cmp;
584
585 low = 0;
586 high = regcount - 1;
587
588 do
589 {
590 middle = (low + high) / 2;
591 cmp = strcasecmp (name, regs[middle].name);
592 if (cmp < 0)
593 high = middle - 1;
594 else if (cmp > 0)
595 low = middle + 1;
596 else
597 return regs[middle].value;
598 }
599 while (low <= high);
600
601 return -1;
602 }
603
604 /*
605 * Summary of register_name.
606 *
607 * in: Input_line_pointer points to 1st char of operand.
608 *
609 * out: A expressionS.
610 * The operand may have been a register: in this case, X_op == O_register,
611 * X_add_number is set to the register number, and truth is returned.
612 * Input_line_pointer->(next non-blank) char after operand, or is in its
613 * original state.
614 */
615
616 static bfd_boolean
617 register_name (expressionS *expressionP)
618 {
619 int reg_number;
620 char *name;
621 char *start;
622 char c;
623
624 /* Find the spelling of the operand. */
625 start = name = input_line_pointer;
626 if (name[0] == '%' && ISALPHA (name[1]))
627 name = ++input_line_pointer;
628
629 else if (!reg_names_p || !ISALPHA (name[0]))
630 return FALSE;
631
632 c = get_symbol_end ();
633 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
634
635 /* Put back the delimiting char. */
636 *input_line_pointer = c;
637
638 /* Look to see if it's in the register table. */
639 if (reg_number >= 0)
640 {
641 expressionP->X_op = O_register;
642 expressionP->X_add_number = reg_number;
643
644 /* Make the rest nice. */
645 expressionP->X_add_symbol = NULL;
646 expressionP->X_op_symbol = NULL;
647 return TRUE;
648 }
649
650 /* Reset the line as if we had not done anything. */
651 input_line_pointer = start;
652 return FALSE;
653 }
654 \f
655 /* This function is called for each symbol seen in an expression. It
656 handles the special parsing which PowerPC assemblers are supposed
657 to use for condition codes. */
658
659 /* Whether to do the special parsing. */
660 static bfd_boolean cr_operand;
661
662 /* Names to recognize in a condition code. This table is sorted. */
663 static const struct pd_reg cr_names[] =
664 {
665 { "cr0", 0 },
666 { "cr1", 1 },
667 { "cr2", 2 },
668 { "cr3", 3 },
669 { "cr4", 4 },
670 { "cr5", 5 },
671 { "cr6", 6 },
672 { "cr7", 7 },
673 { "eq", 2 },
674 { "gt", 1 },
675 { "lt", 0 },
676 { "so", 3 },
677 { "un", 3 }
678 };
679
680 /* Parsing function. This returns non-zero if it recognized an
681 expression. */
682
683 int
684 ppc_parse_name (const char *name, expressionS *expr)
685 {
686 int val;
687
688 if (! cr_operand)
689 return 0;
690
691 if (*name == '%')
692 ++name;
693 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
694 name);
695 if (val < 0)
696 return 0;
697
698 expr->X_op = O_constant;
699 expr->X_add_number = val;
700
701 return 1;
702 }
703 \f
704 /* Local variables. */
705
706 /* Whether to target xcoff64/elf64. */
707 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
708
709 /* Opcode hash table. */
710 static struct hash_control *ppc_hash;
711
712 /* Macro hash table. */
713 static struct hash_control *ppc_macro_hash;
714
715 #ifdef OBJ_ELF
716 /* What type of shared library support to use. */
717 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
718
719 /* Flags to set in the elf header. */
720 static flagword ppc_flags = 0;
721
722 /* Whether this is Solaris or not. */
723 #ifdef TARGET_SOLARIS_COMMENT
724 #define SOLARIS_P TRUE
725 #else
726 #define SOLARIS_P FALSE
727 #endif
728
729 static bfd_boolean msolaris = SOLARIS_P;
730 #endif
731
732 #ifdef OBJ_XCOFF
733
734 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740 /* Next subsegment to allocate within the .text segment. */
741 static subsegT ppc_text_subsegment = 2;
742
743 /* Linked list of csects in the text section. */
744 static symbolS *ppc_text_csects;
745
746 /* Next subsegment to allocate within the .data segment. */
747 static subsegT ppc_data_subsegment = 2;
748
749 /* Linked list of csects in the data section. */
750 static symbolS *ppc_data_csects;
751
752 /* The current csect. */
753 static symbolS *ppc_current_csect;
754
755 /* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760 static symbolS *ppc_toc_csect;
761
762 /* The first frag in the TOC subsegment. */
763 static fragS *ppc_toc_frag;
764
765 /* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767 static fragS *ppc_after_toc_frag;
768
769 /* The current static block. */
770 static symbolS *ppc_current_block;
771
772 /* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775 static asection *ppc_coff_debug_section;
776
777 #endif /* OBJ_XCOFF */
778
779 #ifdef TE_PE
780
781 /* Various sections that we need for PE coff support. */
782 static segT ydata_section;
783 static segT pdata_section;
784 static segT reldata_section;
785 static segT rdata_section;
786 static segT tocdata_section;
787
788 /* The current section and the previous section. See ppc_previous. */
789 static segT ppc_previous_section;
790 static segT ppc_current_section;
791
792 #endif /* TE_PE */
793
794 #ifdef OBJ_ELF
795 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
796 #define PPC_APUINFO_ISEL 0x40
797 #define PPC_APUINFO_PMR 0x41
798 #define PPC_APUINFO_RFMCI 0x42
799 #define PPC_APUINFO_CACHELCK 0x43
800 #define PPC_APUINFO_SPE 0x100
801 #define PPC_APUINFO_EFS 0x101
802 #define PPC_APUINFO_BRLOCK 0x102
803
804 /*
805 * We keep a list of APUinfo
806 */
807 unsigned long *ppc_apuinfo_list;
808 unsigned int ppc_apuinfo_num;
809 unsigned int ppc_apuinfo_num_alloc;
810 #endif /* OBJ_ELF */
811 \f
812 #ifdef OBJ_ELF
813 const char *const md_shortopts = "b:l:usm:K:VQ:";
814 #else
815 const char *const md_shortopts = "um:";
816 #endif
817 const struct option md_longopts[] = {
818 {NULL, no_argument, NULL, 0}
819 };
820 const size_t md_longopts_size = sizeof (md_longopts);
821
822
823 /* Handle -m options that set cpu type, and .machine arg. */
824
825 static int
826 parse_cpu (const char *arg)
827 {
828 ppc_cpu_t altivec_or_spe = ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_SPE);
829
830 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
831 (RIOS2). */
832 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
833 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
834 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
835 else if (strcmp (arg, "pwr") == 0)
836 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
837 /* -m601 means to assemble for the PowerPC 601, which includes
838 instructions that are holdovers from the Power. */
839 else if (strcmp (arg, "601") == 0)
840 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
841 | PPC_OPCODE_601 | PPC_OPCODE_32);
842 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
843 PowerPC 603/604. */
844 else if (strcmp (arg, "ppc") == 0
845 || strcmp (arg, "ppc32") == 0
846 || strcmp (arg, "603") == 0
847 || strcmp (arg, "604") == 0)
848 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
849 /* Do all PPC750s have paired single ops? */
850 else if (strcmp (arg, "750cl") == 0)
851 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS;
852 else if (strcmp (arg, "403") == 0)
853 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
854 | PPC_OPCODE_403 | PPC_OPCODE_32);
855 else if (strcmp (arg, "405") == 0)
856 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
857 | PPC_OPCODE_403 | PPC_OPCODE_405 | PPC_OPCODE_32);
858 else if (strcmp (arg, "440") == 0
859 || strcmp (arg, "464") == 0)
860 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
861 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
862 else if (strcmp (arg, "7400") == 0
863 || strcmp (arg, "7410") == 0
864 || strcmp (arg, "7450") == 0
865 || strcmp (arg, "7455") == 0)
866 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
867 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
868 else if (strcmp (arg, "e300") == 0)
869 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
870 | PPC_OPCODE_E300);
871 else if (strcmp (arg, "altivec") == 0)
872 {
873 if (ppc_cpu == 0)
874 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC;
875
876 altivec_or_spe |= PPC_OPCODE_ALTIVEC;
877 }
878 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
879 {
880 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
881 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
882 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
883 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
884 }
885 else if (strcmp (arg, "e500mc") == 0)
886 {
887 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
888 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
889 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
890 }
891 else if (strcmp (arg, "spe") == 0)
892 {
893 if (ppc_cpu == 0)
894 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_EFS;
895
896 altivec_or_spe |= PPC_OPCODE_SPE;
897 }
898 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
899 620. */
900 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
901 {
902 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
903 }
904 else if (strcmp (arg, "ppc64bridge") == 0)
905 {
906 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
907 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
908 }
909 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
910 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
911 {
912 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
913 }
914 /* -mbooke64 means enable 64-bit BookE support. */
915 else if (strcmp (arg, "booke64") == 0)
916 {
917 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
918 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
919 }
920 else if (strcmp (arg, "power4") == 0)
921 {
922 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
923 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
924 }
925 else if (strcmp (arg, "power5") == 0)
926 {
927 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
928 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
929 | PPC_OPCODE_POWER5);
930 }
931 else if (strcmp (arg, "power6") == 0)
932 {
933 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
934 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
935 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
936 }
937 else if (strcmp (arg, "cell") == 0)
938 {
939 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
940 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
941 | PPC_OPCODE_CELL);
942 }
943 /* -mcom means assemble for the common intersection between Power
944 and PowerPC. At present, we just allow the union, rather
945 than the intersection. */
946 else if (strcmp (arg, "com") == 0)
947 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
948 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
949 else if (strcmp (arg, "any") == 0)
950 ppc_cpu |= PPC_OPCODE_ANY;
951 else
952 return 0;
953
954 /* Make sure the the Altivec and SPE bits are not lost. */
955 ppc_cpu |= altivec_or_spe;
956 return 1;
957 }
958
959 int
960 md_parse_option (int c, char *arg)
961 {
962 switch (c)
963 {
964 case 'u':
965 /* -u means that any undefined symbols should be treated as
966 external, which is the default for gas anyhow. */
967 break;
968
969 #ifdef OBJ_ELF
970 case 'l':
971 /* Solaris as takes -le (presumably for little endian). For completeness
972 sake, recognize -be also. */
973 if (strcmp (arg, "e") == 0)
974 {
975 target_big_endian = 0;
976 set_target_endian = 1;
977 }
978 else
979 return 0;
980
981 break;
982
983 case 'b':
984 if (strcmp (arg, "e") == 0)
985 {
986 target_big_endian = 1;
987 set_target_endian = 1;
988 }
989 else
990 return 0;
991
992 break;
993
994 case 'K':
995 /* Recognize -K PIC. */
996 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
997 {
998 shlib = SHLIB_PIC;
999 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1000 }
1001 else
1002 return 0;
1003
1004 break;
1005 #endif
1006
1007 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1008 case 'a':
1009 if (strcmp (arg, "64") == 0)
1010 {
1011 #ifdef BFD64
1012 ppc_obj64 = 1;
1013 #else
1014 as_fatal (_("%s unsupported"), "-a64");
1015 #endif
1016 }
1017 else if (strcmp (arg, "32") == 0)
1018 ppc_obj64 = 0;
1019 else
1020 return 0;
1021 break;
1022
1023 case 'm':
1024 if (parse_cpu (arg))
1025 ;
1026
1027 else if (strcmp (arg, "regnames") == 0)
1028 reg_names_p = TRUE;
1029
1030 else if (strcmp (arg, "no-regnames") == 0)
1031 reg_names_p = FALSE;
1032
1033 #ifdef OBJ_ELF
1034 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1035 that require relocation. */
1036 else if (strcmp (arg, "relocatable") == 0)
1037 {
1038 shlib = SHLIB_MRELOCATABLE;
1039 ppc_flags |= EF_PPC_RELOCATABLE;
1040 }
1041
1042 else if (strcmp (arg, "relocatable-lib") == 0)
1043 {
1044 shlib = SHLIB_MRELOCATABLE;
1045 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1046 }
1047
1048 /* -memb, set embedded bit. */
1049 else if (strcmp (arg, "emb") == 0)
1050 ppc_flags |= EF_PPC_EMB;
1051
1052 /* -mlittle/-mbig set the endianess. */
1053 else if (strcmp (arg, "little") == 0
1054 || strcmp (arg, "little-endian") == 0)
1055 {
1056 target_big_endian = 0;
1057 set_target_endian = 1;
1058 }
1059
1060 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1061 {
1062 target_big_endian = 1;
1063 set_target_endian = 1;
1064 }
1065
1066 else if (strcmp (arg, "solaris") == 0)
1067 {
1068 msolaris = TRUE;
1069 ppc_comment_chars = ppc_solaris_comment_chars;
1070 }
1071
1072 else if (strcmp (arg, "no-solaris") == 0)
1073 {
1074 msolaris = FALSE;
1075 ppc_comment_chars = ppc_eabi_comment_chars;
1076 }
1077 #endif
1078 else
1079 {
1080 as_bad (_("invalid switch -m%s"), arg);
1081 return 0;
1082 }
1083 break;
1084
1085 #ifdef OBJ_ELF
1086 /* -V: SVR4 argument to print version ID. */
1087 case 'V':
1088 print_version_id ();
1089 break;
1090
1091 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1092 should be emitted or not. FIXME: Not implemented. */
1093 case 'Q':
1094 break;
1095
1096 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1097 rather than .stabs.excl, which is ignored by the linker.
1098 FIXME: Not implemented. */
1099 case 's':
1100 if (arg)
1101 return 0;
1102
1103 break;
1104 #endif
1105
1106 default:
1107 return 0;
1108 }
1109
1110 return 1;
1111 }
1112
1113 void
1114 md_show_usage (FILE *stream)
1115 {
1116 fprintf (stream, _("\
1117 PowerPC options:\n\
1118 -a32 generate ELF32/XCOFF32\n\
1119 -a64 generate ELF64/XCOFF64\n\
1120 -u ignored\n\
1121 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1122 -mpwr generate code for POWER (RIOS1)\n\
1123 -m601 generate code for PowerPC 601\n\
1124 -mppc, -mppc32, -m603, -m604\n\
1125 generate code for PowerPC 603/604\n\
1126 -m403 generate code for PowerPC 403\n\
1127 -m405 generate code for PowerPC 405\n\
1128 -m440 generate code for PowerPC 440\n\
1129 -m464 generate code for PowerPC 464\n\
1130 -m7400, -m7410, -m7450, -m7455\n\
1131 generate code for PowerPC 7400/7410/7450/7455\n\
1132 -m750cl generate code for PowerPC 750cl\n"));
1133 fprintf (stream, _("\
1134 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1135 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1136 -mbooke64 generate code for 64-bit PowerPC BookE\n\
1137 -mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
1138 -mpower4 generate code for Power4 architecture\n\
1139 -mpower5 generate code for Power5 architecture\n\
1140 -mpower6 generate code for Power6 architecture\n\
1141 -mcell generate code for Cell Broadband Engine architecture\n\
1142 -mcom generate code Power/PowerPC common instructions\n\
1143 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1144 fprintf (stream, _("\
1145 -maltivec generate code for AltiVec\n\
1146 -me300 generate code for PowerPC e300 family\n\
1147 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1148 -me500mc, generate code for Freescale e500mc core complex\n\
1149 -mspe generate code for Motorola SPE instructions\n\
1150 -mregnames Allow symbolic names for registers\n\
1151 -mno-regnames Do not allow symbolic names for registers\n"));
1152 #ifdef OBJ_ELF
1153 fprintf (stream, _("\
1154 -mrelocatable support for GCC's -mrelocatble option\n\
1155 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1156 -memb set PPC_EMB bit in ELF flags\n\
1157 -mlittle, -mlittle-endian, -l, -le\n\
1158 generate code for a little endian machine\n\
1159 -mbig, -mbig-endian, -b, -be\n\
1160 generate code for a big endian machine\n\
1161 -msolaris generate code for Solaris\n\
1162 -mno-solaris do not generate code for Solaris\n\
1163 -V print assembler version number\n\
1164 -Qy, -Qn ignored\n"));
1165 #endif
1166 }
1167 \f
1168 /* Set ppc_cpu if it is not already set. */
1169
1170 static void
1171 ppc_set_cpu (void)
1172 {
1173 const char *default_os = TARGET_OS;
1174 const char *default_cpu = TARGET_CPU;
1175
1176 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
1177 {
1178 if (ppc_obj64)
1179 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
1180 else if (strncmp (default_os, "aix", 3) == 0
1181 && default_os[3] >= '4' && default_os[3] <= '9')
1182 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
1183 else if (strncmp (default_os, "aix3", 4) == 0)
1184 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
1185 else if (strcmp (default_cpu, "rs6000") == 0)
1186 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
1187 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1188 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
1189 else
1190 as_fatal (_("Unknown default cpu = %s, os = %s"),
1191 default_cpu, default_os);
1192 }
1193 }
1194
1195 /* Figure out the BFD architecture to use. This function and ppc_mach
1196 are called well before md_begin, when the output file is opened. */
1197
1198 enum bfd_architecture
1199 ppc_arch (void)
1200 {
1201 const char *default_cpu = TARGET_CPU;
1202 ppc_set_cpu ();
1203
1204 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1205 return bfd_arch_powerpc;
1206 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1207 return bfd_arch_rs6000;
1208 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1209 {
1210 if (strcmp (default_cpu, "rs6000") == 0)
1211 return bfd_arch_rs6000;
1212 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1213 return bfd_arch_powerpc;
1214 }
1215
1216 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1217 return bfd_arch_unknown;
1218 }
1219
1220 unsigned long
1221 ppc_mach (void)
1222 {
1223 if (ppc_obj64)
1224 return bfd_mach_ppc64;
1225 else if (ppc_arch () == bfd_arch_rs6000)
1226 return bfd_mach_rs6k;
1227 else
1228 return bfd_mach_ppc;
1229 }
1230
1231 extern char*
1232 ppc_target_format (void)
1233 {
1234 #ifdef OBJ_COFF
1235 #ifdef TE_PE
1236 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1237 #elif TE_POWERMAC
1238 return "xcoff-powermac";
1239 #else
1240 # ifdef TE_AIX5
1241 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1242 # else
1243 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1244 # endif
1245 #endif
1246 #endif
1247 #ifdef OBJ_ELF
1248 # ifdef TE_VXWORKS
1249 return "elf32-powerpc-vxworks";
1250 # else
1251 return (target_big_endian
1252 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1253 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1254 # endif
1255 #endif
1256 }
1257
1258 /* Insert opcodes and macros into hash tables. Called at startup and
1259 for .cpu pseudo. */
1260
1261 static void
1262 ppc_setup_opcodes (void)
1263 {
1264 const struct powerpc_opcode *op;
1265 const struct powerpc_opcode *op_end;
1266 const struct powerpc_macro *macro;
1267 const struct powerpc_macro *macro_end;
1268 bfd_boolean bad_insn = FALSE;
1269
1270 if (ppc_hash != NULL)
1271 hash_die (ppc_hash);
1272 if (ppc_macro_hash != NULL)
1273 hash_die (ppc_macro_hash);
1274
1275 /* Insert the opcodes into a hash table. */
1276 ppc_hash = hash_new ();
1277
1278 if (ENABLE_CHECKING)
1279 {
1280 unsigned int i;
1281
1282 /* Check operand masks. Code here and in the disassembler assumes
1283 all the 1's in the mask are contiguous. */
1284 for (i = 0; i < num_powerpc_operands; ++i)
1285 {
1286 unsigned long mask = powerpc_operands[i].bitm;
1287 unsigned long right_bit;
1288 unsigned int j;
1289
1290 right_bit = mask & -mask;
1291 mask += right_bit;
1292 right_bit = mask & -mask;
1293 if (mask != right_bit)
1294 {
1295 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1296 bad_insn = TRUE;
1297 }
1298 for (j = i + 1; j < num_powerpc_operands; ++j)
1299 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1300 sizeof (powerpc_operands[0])) == 0)
1301 {
1302 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1303 j, i);
1304 bad_insn = TRUE;
1305 }
1306 }
1307 }
1308
1309 op_end = powerpc_opcodes + powerpc_num_opcodes;
1310 for (op = powerpc_opcodes; op < op_end; op++)
1311 {
1312 if (ENABLE_CHECKING)
1313 {
1314 const unsigned char *o;
1315 unsigned long omask = op->mask;
1316
1317 if (op != powerpc_opcodes)
1318 {
1319 /* The major opcodes had better be sorted. Code in the
1320 disassembler assumes the insns are sorted according to
1321 major opcode. */
1322 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1323 {
1324 as_bad (_("major opcode is not sorted for %s"),
1325 op->name);
1326 bad_insn = TRUE;
1327 }
1328
1329 /* Warn if the table isn't more strictly ordered.
1330 Unfortunately it doesn't seem possible to order the
1331 table on much more than the major opcode, which makes
1332 it difficult to implement a binary search in the
1333 disassembler. The problem is that we have multiple
1334 ways to disassemble instructions, and we usually want
1335 to choose a more specific form (with more bits set in
1336 the opcode) than a more general form. eg. all of the
1337 following are equivalent:
1338 bne label # opcode = 0x40820000, mask = 0xff830003
1339 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1340 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1341
1342 There are also cases where the table needs to be out
1343 of order to disassemble the correct instruction for
1344 processor variants. eg. "lhae" booke64 insn must be
1345 found before "ld" ppc64 insn. */
1346 else if (0)
1347 {
1348 unsigned long t1 = op[0].opcode;
1349 unsigned long t2 = op[-1].opcode;
1350
1351 if (((t1 ^ t2) & 0xfc0007ff) == 0
1352 && (t1 & 0xfc0006df) == 0x7c000286)
1353 {
1354 /* spr field is split. */
1355 t1 = ((t1 & ~0x1ff800)
1356 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1357 t2 = ((t2 & ~0x1ff800)
1358 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1359 }
1360 if (t1 < t2)
1361 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1362 op[0].name, op[0].opcode, op[0].mask,
1363 op[-1].name, op[-1].opcode, op[-1].mask);
1364 }
1365 }
1366
1367 /* The mask had better not trim off opcode bits. */
1368 if ((op->opcode & omask) != op->opcode)
1369 {
1370 as_bad (_("mask trims opcode bits for %s"),
1371 op->name);
1372 bad_insn = TRUE;
1373 }
1374
1375 /* The operands must not overlap the opcode or each other. */
1376 for (o = op->operands; *o; ++o)
1377 if (*o >= num_powerpc_operands)
1378 {
1379 as_bad (_("operand index error for %s"),
1380 op->name);
1381 bad_insn = TRUE;
1382 }
1383 else
1384 {
1385 const struct powerpc_operand *operand = &powerpc_operands[*o];
1386 if (operand->shift >= 0)
1387 {
1388 unsigned long mask = operand->bitm << operand->shift;
1389 if (omask & mask)
1390 {
1391 as_bad (_("operand %d overlap in %s"),
1392 (int) (o - op->operands), op->name);
1393 bad_insn = TRUE;
1394 }
1395 omask |= mask;
1396 }
1397 }
1398 }
1399
1400 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
1401 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
1402 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1403 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
1404 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
1405 /* Certain instructions (eg: extsw) do not exist in the
1406 32-bit BookE instruction set, but they do exist in the
1407 64-bit BookE instruction set, and other PPC instruction
1408 sets. Check to see if the opcode has the BOOKE64 flag set.
1409 If it does make sure that the target CPU is not the BookE32. */
1410 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1411 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1412 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
1413 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1414 || ((op->flags & PPC_OPCODE_POWER4)
1415 == (ppc_cpu & PPC_OPCODE_POWER4)))
1416 && ((op->flags & PPC_OPCODE_POWER5) == 0
1417 || ((op->flags & PPC_OPCODE_POWER5)
1418 == (ppc_cpu & PPC_OPCODE_POWER5)))
1419 && ((op->flags & PPC_OPCODE_POWER6) == 0
1420 || ((op->flags & PPC_OPCODE_POWER6)
1421 == (ppc_cpu & PPC_OPCODE_POWER6))))
1422 {
1423 const char *retval;
1424
1425 retval = hash_insert (ppc_hash, op->name, (void *) op);
1426 if (retval != NULL)
1427 {
1428 /* Ignore Power duplicates for -m601. */
1429 if ((ppc_cpu & PPC_OPCODE_601) != 0
1430 && (op->flags & PPC_OPCODE_POWER) != 0)
1431 continue;
1432
1433 as_bad (_("duplicate instruction %s"),
1434 op->name);
1435 bad_insn = TRUE;
1436 }
1437 }
1438 }
1439
1440 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1441 for (op = powerpc_opcodes; op < op_end; op++)
1442 hash_insert (ppc_hash, op->name, (void *) op);
1443
1444 /* Insert the macros into a hash table. */
1445 ppc_macro_hash = hash_new ();
1446
1447 macro_end = powerpc_macros + powerpc_num_macros;
1448 for (macro = powerpc_macros; macro < macro_end; macro++)
1449 {
1450 if ((macro->flags & ppc_cpu) != 0)
1451 {
1452 const char *retval;
1453
1454 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1455 if (retval != (const char *) NULL)
1456 {
1457 as_bad (_("duplicate macro %s"), macro->name);
1458 bad_insn = TRUE;
1459 }
1460 }
1461 }
1462
1463 if (bad_insn)
1464 abort ();
1465 }
1466
1467 /* This function is called when the assembler starts up. It is called
1468 after the options have been parsed and the output file has been
1469 opened. */
1470
1471 void
1472 md_begin (void)
1473 {
1474 ppc_set_cpu ();
1475
1476 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1477
1478 #ifdef OBJ_ELF
1479 /* Set the ELF flags if desired. */
1480 if (ppc_flags && !msolaris)
1481 bfd_set_private_flags (stdoutput, ppc_flags);
1482 #endif
1483
1484 ppc_setup_opcodes ();
1485
1486 /* Tell the main code what the endianness is if it is not overridden
1487 by the user. */
1488 if (!set_target_endian)
1489 {
1490 set_target_endian = 1;
1491 target_big_endian = PPC_BIG_ENDIAN;
1492 }
1493
1494 #ifdef OBJ_XCOFF
1495 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1496
1497 /* Create dummy symbols to serve as initial csects. This forces the
1498 text csects to precede the data csects. These symbols will not
1499 be output. */
1500 ppc_text_csects = symbol_make ("dummy\001");
1501 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1502 ppc_data_csects = symbol_make ("dummy\001");
1503 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1504 #endif
1505
1506 #ifdef TE_PE
1507
1508 ppc_current_section = text_section;
1509 ppc_previous_section = 0;
1510
1511 #endif
1512 }
1513
1514 void
1515 ppc_cleanup (void)
1516 {
1517 #ifdef OBJ_ELF
1518 if (ppc_apuinfo_list == NULL)
1519 return;
1520
1521 /* Ok, so write the section info out. We have this layout:
1522
1523 byte data what
1524 ---- ---- ----
1525 0 8 length of "APUinfo\0"
1526 4 (n*4) number of APU's (4 bytes each)
1527 8 2 note type 2
1528 12 "APUinfo\0" name
1529 20 APU#1 first APU's info
1530 24 APU#2 second APU's info
1531 ... ...
1532 */
1533 {
1534 char *p;
1535 asection *seg = now_seg;
1536 subsegT subseg = now_subseg;
1537 asection *apuinfo_secp = (asection *) NULL;
1538 unsigned int i;
1539
1540 /* Create the .PPC.EMB.apuinfo section. */
1541 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1542 bfd_set_section_flags (stdoutput,
1543 apuinfo_secp,
1544 SEC_HAS_CONTENTS | SEC_READONLY);
1545
1546 p = frag_more (4);
1547 md_number_to_chars (p, (valueT) 8, 4);
1548
1549 p = frag_more (4);
1550 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1551
1552 p = frag_more (4);
1553 md_number_to_chars (p, (valueT) 2, 4);
1554
1555 p = frag_more (8);
1556 strcpy (p, "APUinfo");
1557
1558 for (i = 0; i < ppc_apuinfo_num; i++)
1559 {
1560 p = frag_more (4);
1561 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1562 }
1563
1564 frag_align (2, 0, 0);
1565
1566 /* We probably can't restore the current segment, for there likely
1567 isn't one yet... */
1568 if (seg && subseg)
1569 subseg_set (seg, subseg);
1570 }
1571 #endif
1572 }
1573
1574 /* Insert an operand value into an instruction. */
1575
1576 static unsigned long
1577 ppc_insert_operand (unsigned long insn,
1578 const struct powerpc_operand *operand,
1579 offsetT val,
1580 ppc_cpu_t ppc_cpu,
1581 char *file,
1582 unsigned int line)
1583 {
1584 long min, max, right;
1585
1586 max = operand->bitm;
1587 right = max & -max;
1588 min = 0;
1589
1590 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1591 {
1592 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
1593 max = (max >> 1) & -right;
1594 min = ~max & -right;
1595 }
1596
1597 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1598 max++;
1599
1600 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1601 {
1602 long tmp = min;
1603 min = -max;
1604 max = -tmp;
1605 }
1606
1607 if (min <= max)
1608 {
1609 /* Some people write constants with the sign extension done by
1610 hand but only up to 32 bits. This shouldn't really be valid,
1611 but, to permit this code to assemble on a 64-bit host, we
1612 sign extend the 32-bit value to 64 bits if so doing makes the
1613 value valid. */
1614 if (val > max
1615 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1616 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1617 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1618 val = val - 0x80000000 - 0x80000000;
1619
1620 /* Similarly, people write expressions like ~(1<<15), and expect
1621 this to be OK for a 32-bit unsigned value. */
1622 else if (val < min
1623 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1624 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1625 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1626 val = val + 0x80000000 + 0x80000000;
1627
1628 else if (val < min
1629 || val > max
1630 || (val & (right - 1)) != 0)
1631 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1632 }
1633
1634 if (operand->insert)
1635 {
1636 const char *errmsg;
1637
1638 errmsg = NULL;
1639 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
1640 if (errmsg != (const char *) NULL)
1641 as_bad_where (file, line, errmsg);
1642 }
1643 else
1644 insn |= ((long) val & operand->bitm) << operand->shift;
1645
1646 return insn;
1647 }
1648
1649 \f
1650 #ifdef OBJ_ELF
1651 /* Parse @got, etc. and return the desired relocation. */
1652 static bfd_reloc_code_real_type
1653 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1654 {
1655 struct map_bfd {
1656 char *string;
1657 unsigned int length : 8;
1658 unsigned int valid32 : 1;
1659 unsigned int valid64 : 1;
1660 unsigned int reloc;
1661 };
1662
1663 char ident[20];
1664 char *str = *str_p;
1665 char *str2;
1666 int ch;
1667 int len;
1668 const struct map_bfd *ptr;
1669
1670 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1671 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1672 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1673
1674 static const struct map_bfd mapping[] = {
1675 MAP ("l", BFD_RELOC_LO16),
1676 MAP ("h", BFD_RELOC_HI16),
1677 MAP ("ha", BFD_RELOC_HI16_S),
1678 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1679 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1680 MAP ("got", BFD_RELOC_16_GOTOFF),
1681 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1682 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1683 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1684 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1685 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1686 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1687 MAP ("copy", BFD_RELOC_PPC_COPY),
1688 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1689 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1690 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1691 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1692 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1693 MAP ("tls", BFD_RELOC_PPC_TLS),
1694 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1695 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1696 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1697 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1698 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1699 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1700 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1701 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1702 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1703 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1704 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1705 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1706 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1707 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1708 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1709 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1710 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1711 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1712 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1713 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1714 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1715 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1716 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1717 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1718 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1719 MAP32 ("fixup", BFD_RELOC_CTOR),
1720 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1721 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1722 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1723 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1724 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1725 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1726 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1727 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1728 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1729 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1730 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1731 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1732 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1733 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1734 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1735 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1736 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1737 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1738 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1739 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1740 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1741 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1742 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1743 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1744 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1745 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1746 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1747 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1748 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1749 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1750 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1751 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1752 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1753 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1754 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1755 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1756 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1757 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1758 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1759 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1760 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
1761 };
1762
1763 if (*str++ != '@')
1764 return BFD_RELOC_UNUSED;
1765
1766 for (ch = *str, str2 = ident;
1767 (str2 < ident + sizeof (ident) - 1
1768 && (ISALNUM (ch) || ch == '@'));
1769 ch = *++str)
1770 {
1771 *str2++ = TOLOWER (ch);
1772 }
1773
1774 *str2 = '\0';
1775 len = str2 - ident;
1776
1777 ch = ident[0];
1778 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1779 if (ch == ptr->string[0]
1780 && len == ptr->length
1781 && memcmp (ident, ptr->string, ptr->length) == 0
1782 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
1783 {
1784 int reloc = ptr->reloc;
1785
1786 if (!ppc_obj64)
1787 if (exp_p->X_add_number != 0
1788 && (reloc == (int) BFD_RELOC_16_GOTOFF
1789 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1790 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1791 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1792 as_warn (_("identifier+constant@got means identifier@got+constant"));
1793
1794 /* Now check for identifier@suffix+constant. */
1795 if (*str == '-' || *str == '+')
1796 {
1797 char *orig_line = input_line_pointer;
1798 expressionS new_exp;
1799
1800 input_line_pointer = str;
1801 expression (&new_exp);
1802 if (new_exp.X_op == O_constant)
1803 {
1804 exp_p->X_add_number += new_exp.X_add_number;
1805 str = input_line_pointer;
1806 }
1807
1808 if (&input_line_pointer != str_p)
1809 input_line_pointer = orig_line;
1810 }
1811 *str_p = str;
1812
1813 if (reloc == (int) BFD_RELOC_PPC64_TOC
1814 && exp_p->X_op == O_symbol
1815 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
1816 {
1817 /* Change the symbol so that the dummy .TOC. symbol can be
1818 omitted from the object file. */
1819 exp_p->X_add_symbol = &abs_symbol;
1820 }
1821
1822 return (bfd_reloc_code_real_type) reloc;
1823 }
1824
1825 return BFD_RELOC_UNUSED;
1826 }
1827
1828 /* Like normal .long/.short/.word, except support @got, etc.
1829 Clobbers input_line_pointer, checks end-of-line. */
1830 static void
1831 ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
1832 {
1833 expressionS exp;
1834 bfd_reloc_code_real_type reloc;
1835
1836 if (is_it_end_of_statement ())
1837 {
1838 demand_empty_rest_of_line ();
1839 return;
1840 }
1841
1842 do
1843 {
1844 expression (&exp);
1845 if (exp.X_op == O_symbol
1846 && *input_line_pointer == '@'
1847 && (reloc = ppc_elf_suffix (&input_line_pointer,
1848 &exp)) != BFD_RELOC_UNUSED)
1849 {
1850 reloc_howto_type *reloc_howto;
1851 int size;
1852
1853 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1854 size = bfd_get_reloc_size (reloc_howto);
1855
1856 if (size > nbytes)
1857 {
1858 as_bad (_("%s relocations do not fit in %d bytes\n"),
1859 reloc_howto->name, nbytes);
1860 }
1861 else
1862 {
1863 char *p;
1864 int offset;
1865
1866 p = frag_more (nbytes);
1867 offset = 0;
1868 if (target_big_endian)
1869 offset = nbytes - size;
1870 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1871 &exp, 0, reloc);
1872 }
1873 }
1874 else
1875 emit_expr (&exp, (unsigned int) nbytes);
1876 }
1877 while (*input_line_pointer++ == ',');
1878
1879 /* Put terminator back into stream. */
1880 input_line_pointer--;
1881 demand_empty_rest_of_line ();
1882 }
1883
1884 /* Solaris pseduo op to change to the .rodata section. */
1885 static void
1886 ppc_elf_rdata (int xxx)
1887 {
1888 char *save_line = input_line_pointer;
1889 static char section[] = ".rodata\n";
1890
1891 /* Just pretend this is .section .rodata */
1892 input_line_pointer = section;
1893 obj_elf_section (xxx);
1894
1895 input_line_pointer = save_line;
1896 }
1897
1898 /* Pseudo op to make file scope bss items. */
1899 static void
1900 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
1901 {
1902 char *name;
1903 char c;
1904 char *p;
1905 offsetT size;
1906 symbolS *symbolP;
1907 offsetT align;
1908 segT old_sec;
1909 int old_subsec;
1910 char *pfrag;
1911 int align2;
1912
1913 name = input_line_pointer;
1914 c = get_symbol_end ();
1915
1916 /* just after name is now '\0'. */
1917 p = input_line_pointer;
1918 *p = c;
1919 SKIP_WHITESPACE ();
1920 if (*input_line_pointer != ',')
1921 {
1922 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1923 ignore_rest_of_line ();
1924 return;
1925 }
1926
1927 input_line_pointer++; /* skip ',' */
1928 if ((size = get_absolute_expression ()) < 0)
1929 {
1930 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1931 ignore_rest_of_line ();
1932 return;
1933 }
1934
1935 /* The third argument to .lcomm is the alignment. */
1936 if (*input_line_pointer != ',')
1937 align = 8;
1938 else
1939 {
1940 ++input_line_pointer;
1941 align = get_absolute_expression ();
1942 if (align <= 0)
1943 {
1944 as_warn (_("ignoring bad alignment"));
1945 align = 8;
1946 }
1947 }
1948
1949 *p = 0;
1950 symbolP = symbol_find_or_make (name);
1951 *p = c;
1952
1953 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1954 {
1955 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1956 S_GET_NAME (symbolP));
1957 ignore_rest_of_line ();
1958 return;
1959 }
1960
1961 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1962 {
1963 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1964 S_GET_NAME (symbolP),
1965 (long) S_GET_VALUE (symbolP),
1966 (long) size);
1967
1968 ignore_rest_of_line ();
1969 return;
1970 }
1971
1972 /* Allocate_bss. */
1973 old_sec = now_seg;
1974 old_subsec = now_subseg;
1975 if (align)
1976 {
1977 /* Convert to a power of 2 alignment. */
1978 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1979 if (align != 1)
1980 {
1981 as_bad (_("Common alignment not a power of 2"));
1982 ignore_rest_of_line ();
1983 return;
1984 }
1985 }
1986 else
1987 align2 = 0;
1988
1989 record_alignment (bss_section, align2);
1990 subseg_set (bss_section, 0);
1991 if (align2)
1992 frag_align (align2, 0, 0);
1993 if (S_GET_SEGMENT (symbolP) == bss_section)
1994 symbol_get_frag (symbolP)->fr_symbol = 0;
1995 symbol_set_frag (symbolP, frag_now);
1996 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1997 (char *) 0);
1998 *pfrag = 0;
1999 S_SET_SIZE (symbolP, size);
2000 S_SET_SEGMENT (symbolP, bss_section);
2001 subseg_set (old_sec, old_subsec);
2002 demand_empty_rest_of_line ();
2003 }
2004
2005 /* Validate any relocations emitted for -mrelocatable, possibly adding
2006 fixups for word relocations in writable segments, so we can adjust
2007 them at runtime. */
2008 static void
2009 ppc_elf_validate_fix (fixS *fixp, segT seg)
2010 {
2011 if (fixp->fx_done || fixp->fx_pcrel)
2012 return;
2013
2014 switch (shlib)
2015 {
2016 case SHLIB_NONE:
2017 case SHLIB_PIC:
2018 return;
2019
2020 case SHLIB_MRELOCATABLE:
2021 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2022 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2023 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2024 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2025 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2026 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2027 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2028 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2029 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2030 && (seg->flags & SEC_LOAD) != 0
2031 && strcmp (segment_name (seg), ".got2") != 0
2032 && strcmp (segment_name (seg), ".dtors") != 0
2033 && strcmp (segment_name (seg), ".ctors") != 0
2034 && strcmp (segment_name (seg), ".fixup") != 0
2035 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2036 && strcmp (segment_name (seg), ".eh_frame") != 0
2037 && strcmp (segment_name (seg), ".ex_shared") != 0)
2038 {
2039 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2040 || fixp->fx_r_type != BFD_RELOC_CTOR)
2041 {
2042 as_bad_where (fixp->fx_file, fixp->fx_line,
2043 _("Relocation cannot be done when using -mrelocatable"));
2044 }
2045 }
2046 return;
2047 }
2048 }
2049
2050 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2051 function descriptor sym if the corresponding code sym is used. */
2052
2053 void
2054 ppc_frob_file_before_adjust (void)
2055 {
2056 symbolS *symp;
2057 asection *toc;
2058
2059 if (!ppc_obj64)
2060 return;
2061
2062 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2063 {
2064 const char *name;
2065 char *dotname;
2066 symbolS *dotsym;
2067 size_t len;
2068
2069 name = S_GET_NAME (symp);
2070 if (name[0] == '.')
2071 continue;
2072
2073 if (! S_IS_WEAK (symp)
2074 || S_IS_DEFINED (symp))
2075 continue;
2076
2077 len = strlen (name) + 1;
2078 dotname = xmalloc (len + 1);
2079 dotname[0] = '.';
2080 memcpy (dotname + 1, name, len);
2081 dotsym = symbol_find_noref (dotname, 1);
2082 free (dotname);
2083 if (dotsym != NULL && (symbol_used_p (dotsym)
2084 || symbol_used_in_reloc_p (dotsym)))
2085 symbol_mark_used (symp);
2086
2087 }
2088
2089 toc = bfd_get_section_by_name (stdoutput, ".toc");
2090 if (toc != NULL
2091 && bfd_section_size (stdoutput, toc) > 0x10000)
2092 as_warn (_("TOC section size exceeds 64k"));
2093
2094 /* Don't emit .TOC. symbol. */
2095 symp = symbol_find (".TOC.");
2096 if (symp != NULL)
2097 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2098 }
2099 #endif /* OBJ_ELF */
2100 \f
2101 #ifdef TE_PE
2102
2103 /*
2104 * Summary of parse_toc_entry.
2105 *
2106 * in: Input_line_pointer points to the '[' in one of:
2107 *
2108 * [toc] [tocv] [toc32] [toc64]
2109 *
2110 * Anything else is an error of one kind or another.
2111 *
2112 * out:
2113 * return value: success or failure
2114 * toc_kind: kind of toc reference
2115 * input_line_pointer:
2116 * success: first char after the ']'
2117 * failure: unchanged
2118 *
2119 * settings:
2120 *
2121 * [toc] - rv == success, toc_kind = default_toc
2122 * [tocv] - rv == success, toc_kind = data_in_toc
2123 * [toc32] - rv == success, toc_kind = must_be_32
2124 * [toc64] - rv == success, toc_kind = must_be_64
2125 *
2126 */
2127
2128 enum toc_size_qualifier
2129 {
2130 default_toc, /* The toc cell constructed should be the system default size */
2131 data_in_toc, /* This is a direct reference to a toc cell */
2132 must_be_32, /* The toc cell constructed must be 32 bits wide */
2133 must_be_64 /* The toc cell constructed must be 64 bits wide */
2134 };
2135
2136 static int
2137 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2138 {
2139 char *start;
2140 char *toc_spec;
2141 char c;
2142 enum toc_size_qualifier t;
2143
2144 /* Save the input_line_pointer. */
2145 start = input_line_pointer;
2146
2147 /* Skip over the '[' , and whitespace. */
2148 ++input_line_pointer;
2149 SKIP_WHITESPACE ();
2150
2151 /* Find the spelling of the operand. */
2152 toc_spec = input_line_pointer;
2153 c = get_symbol_end ();
2154
2155 if (strcmp (toc_spec, "toc") == 0)
2156 {
2157 t = default_toc;
2158 }
2159 else if (strcmp (toc_spec, "tocv") == 0)
2160 {
2161 t = data_in_toc;
2162 }
2163 else if (strcmp (toc_spec, "toc32") == 0)
2164 {
2165 t = must_be_32;
2166 }
2167 else if (strcmp (toc_spec, "toc64") == 0)
2168 {
2169 t = must_be_64;
2170 }
2171 else
2172 {
2173 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2174 *input_line_pointer = c;
2175 input_line_pointer = start;
2176 return 0;
2177 }
2178
2179 /* Now find the ']'. */
2180 *input_line_pointer = c;
2181
2182 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2183 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2184
2185 if (c != ']')
2186 {
2187 as_bad (_("syntax error: expected `]', found `%c'"), c);
2188 input_line_pointer = start;
2189 return 0;
2190 }
2191
2192 *toc_kind = t;
2193 return 1;
2194 }
2195 #endif
2196 \f
2197
2198 #ifdef OBJ_ELF
2199 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2200 static void
2201 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2202 {
2203 unsigned int i;
2204
2205 /* Check we don't already exist. */
2206 for (i = 0; i < ppc_apuinfo_num; i++)
2207 if (ppc_apuinfo_list[i] == APUID (apu, version))
2208 return;
2209
2210 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2211 {
2212 if (ppc_apuinfo_num_alloc == 0)
2213 {
2214 ppc_apuinfo_num_alloc = 4;
2215 ppc_apuinfo_list = (unsigned long *)
2216 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2217 }
2218 else
2219 {
2220 ppc_apuinfo_num_alloc += 4;
2221 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2222 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2223 }
2224 }
2225 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2226 }
2227 #undef APUID
2228 #endif
2229 \f
2230
2231 /* We need to keep a list of fixups. We can't simply generate them as
2232 we go, because that would require us to first create the frag, and
2233 that would screw up references to ``.''. */
2234
2235 struct ppc_fixup
2236 {
2237 expressionS exp;
2238 int opindex;
2239 bfd_reloc_code_real_type reloc;
2240 };
2241
2242 #define MAX_INSN_FIXUPS (5)
2243
2244 /* This routine is called for each instruction to be assembled. */
2245
2246 void
2247 md_assemble (char *str)
2248 {
2249 char *s;
2250 const struct powerpc_opcode *opcode;
2251 unsigned long insn;
2252 const unsigned char *opindex_ptr;
2253 int skip_optional;
2254 int need_paren;
2255 int next_opindex;
2256 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2257 int fc;
2258 char *f;
2259 int addr_mod;
2260 int i;
2261 #ifdef OBJ_ELF
2262 bfd_reloc_code_real_type reloc;
2263 #endif
2264
2265 /* Get the opcode. */
2266 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2267 ;
2268 if (*s != '\0')
2269 *s++ = '\0';
2270
2271 /* Look up the opcode in the hash table. */
2272 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2273 if (opcode == (const struct powerpc_opcode *) NULL)
2274 {
2275 const struct powerpc_macro *macro;
2276
2277 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2278 if (macro == (const struct powerpc_macro *) NULL)
2279 as_bad (_("Unrecognized opcode: `%s'"), str);
2280 else
2281 ppc_macro (s, macro);
2282
2283 return;
2284 }
2285
2286 insn = opcode->opcode;
2287
2288 str = s;
2289 while (ISSPACE (*str))
2290 ++str;
2291
2292 /* PowerPC operands are just expressions. The only real issue is
2293 that a few operand types are optional. All cases which might use
2294 an optional operand separate the operands only with commas (in some
2295 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2296 have optional operands). Most instructions with optional operands
2297 have only one. Those that have more than one optional operand can
2298 take either all their operands or none. So, before we start seriously
2299 parsing the operands, we check to see if we have optional operands,
2300 and if we do, we count the number of commas to see which operands
2301 have been omitted. */
2302 skip_optional = 0;
2303 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2304 {
2305 const struct powerpc_operand *operand;
2306
2307 operand = &powerpc_operands[*opindex_ptr];
2308 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2309 {
2310 unsigned int opcount;
2311 unsigned int num_operands_expected;
2312 unsigned int i;
2313
2314 /* There is an optional operand. Count the number of
2315 commas in the input line. */
2316 if (*str == '\0')
2317 opcount = 0;
2318 else
2319 {
2320 opcount = 1;
2321 s = str;
2322 while ((s = strchr (s, ',')) != (char *) NULL)
2323 {
2324 ++opcount;
2325 ++s;
2326 }
2327 }
2328
2329 /* Compute the number of expected operands.
2330 Do not count fake operands. */
2331 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2332 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2333 ++ num_operands_expected;
2334
2335 /* If there are fewer operands in the line then are called
2336 for by the instruction, we want to skip the optional
2337 operands. */
2338 if (opcount < num_operands_expected)
2339 skip_optional = 1;
2340
2341 break;
2342 }
2343 }
2344
2345 /* Gather the operands. */
2346 need_paren = 0;
2347 next_opindex = 0;
2348 fc = 0;
2349 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2350 {
2351 const struct powerpc_operand *operand;
2352 const char *errmsg;
2353 char *hold;
2354 expressionS ex;
2355 char endc;
2356
2357 if (next_opindex == 0)
2358 operand = &powerpc_operands[*opindex_ptr];
2359 else
2360 {
2361 operand = &powerpc_operands[next_opindex];
2362 next_opindex = 0;
2363 }
2364 errmsg = NULL;
2365
2366 /* If this is a fake operand, then we do not expect anything
2367 from the input. */
2368 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2369 {
2370 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2371 if (errmsg != (const char *) NULL)
2372 as_bad (errmsg);
2373 continue;
2374 }
2375
2376 /* If this is an optional operand, and we are skipping it, just
2377 insert a zero. */
2378 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2379 && skip_optional)
2380 {
2381 if (operand->insert)
2382 {
2383 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2384 if (errmsg != (const char *) NULL)
2385 as_bad (errmsg);
2386 }
2387 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2388 next_opindex = *opindex_ptr + 1;
2389 continue;
2390 }
2391
2392 /* Gather the operand. */
2393 hold = input_line_pointer;
2394 input_line_pointer = str;
2395
2396 #ifdef TE_PE
2397 if (*input_line_pointer == '[')
2398 {
2399 /* We are expecting something like the second argument here:
2400 *
2401 * lwz r4,[toc].GS.0.static_int(rtoc)
2402 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2403 * The argument following the `]' must be a symbol name, and the
2404 * register must be the toc register: 'rtoc' or '2'
2405 *
2406 * The effect is to 0 as the displacement field
2407 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2408 * the appropriate variation) reloc against it based on the symbol.
2409 * The linker will build the toc, and insert the resolved toc offset.
2410 *
2411 * Note:
2412 * o The size of the toc entry is currently assumed to be
2413 * 32 bits. This should not be assumed to be a hard coded
2414 * number.
2415 * o In an effort to cope with a change from 32 to 64 bits,
2416 * there are also toc entries that are specified to be
2417 * either 32 or 64 bits:
2418 * lwz r4,[toc32].GS.0.static_int(rtoc)
2419 * lwz r4,[toc64].GS.0.static_int(rtoc)
2420 * These demand toc entries of the specified size, and the
2421 * instruction probably requires it.
2422 */
2423
2424 int valid_toc;
2425 enum toc_size_qualifier toc_kind;
2426 bfd_reloc_code_real_type toc_reloc;
2427
2428 /* Go parse off the [tocXX] part. */
2429 valid_toc = parse_toc_entry (&toc_kind);
2430
2431 if (!valid_toc)
2432 {
2433 /* Note: message has already been issued.
2434 FIXME: what sort of recovery should we do?
2435 demand_rest_of_line (); return; ? */
2436 }
2437
2438 /* Now get the symbol following the ']'. */
2439 expression (&ex);
2440
2441 switch (toc_kind)
2442 {
2443 case default_toc:
2444 /* In this case, we may not have seen the symbol yet,
2445 since it is allowed to appear on a .extern or .globl
2446 or just be a label in the .data section. */
2447 toc_reloc = BFD_RELOC_PPC_TOC16;
2448 break;
2449 case data_in_toc:
2450 /* 1. The symbol must be defined and either in the toc
2451 section, or a global.
2452 2. The reloc generated must have the TOCDEFN flag set
2453 in upper bit mess of the reloc type.
2454 FIXME: It's a little confusing what the tocv
2455 qualifier can be used for. At the very least, I've
2456 seen three uses, only one of which I'm sure I can
2457 explain. */
2458 if (ex.X_op == O_symbol)
2459 {
2460 assert (ex.X_add_symbol != NULL);
2461 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2462 != tocdata_section)
2463 {
2464 as_bad (_("[tocv] symbol is not a toc symbol"));
2465 }
2466 }
2467
2468 toc_reloc = BFD_RELOC_PPC_TOC16;
2469 break;
2470 case must_be_32:
2471 /* FIXME: these next two specifically specify 32/64 bit
2472 toc entries. We don't support them today. Is this
2473 the right way to say that? */
2474 toc_reloc = BFD_RELOC_UNUSED;
2475 as_bad (_("Unimplemented toc32 expression modifier"));
2476 break;
2477 case must_be_64:
2478 /* FIXME: see above. */
2479 toc_reloc = BFD_RELOC_UNUSED;
2480 as_bad (_("Unimplemented toc64 expression modifier"));
2481 break;
2482 default:
2483 fprintf (stderr,
2484 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2485 toc_kind);
2486 abort ();
2487 break;
2488 }
2489
2490 /* We need to generate a fixup for this expression. */
2491 if (fc >= MAX_INSN_FIXUPS)
2492 as_fatal (_("too many fixups"));
2493
2494 fixups[fc].reloc = toc_reloc;
2495 fixups[fc].exp = ex;
2496 fixups[fc].opindex = *opindex_ptr;
2497 ++fc;
2498
2499 /* Ok. We've set up the fixup for the instruction. Now make it
2500 look like the constant 0 was found here. */
2501 ex.X_unsigned = 1;
2502 ex.X_op = O_constant;
2503 ex.X_add_number = 0;
2504 ex.X_add_symbol = NULL;
2505 ex.X_op_symbol = NULL;
2506 }
2507
2508 else
2509 #endif /* TE_PE */
2510 {
2511 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2512 || !register_name (&ex))
2513 {
2514 char save_lex = lex_type['%'];
2515
2516 if ((operand->flags & PPC_OPERAND_CR) != 0)
2517 {
2518 cr_operand = TRUE;
2519 lex_type['%'] |= LEX_BEGIN_NAME;
2520 }
2521 expression (&ex);
2522 cr_operand = FALSE;
2523 lex_type['%'] = save_lex;
2524 }
2525 }
2526
2527 str = input_line_pointer;
2528 input_line_pointer = hold;
2529
2530 if (ex.X_op == O_illegal)
2531 as_bad (_("illegal operand"));
2532 else if (ex.X_op == O_absent)
2533 as_bad (_("missing operand"));
2534 else if (ex.X_op == O_register)
2535 {
2536 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2537 ppc_cpu, (char *) NULL, 0);
2538 }
2539 else if (ex.X_op == O_constant)
2540 {
2541 #ifdef OBJ_ELF
2542 /* Allow @HA, @L, @H on constants. */
2543 char *orig_str = str;
2544
2545 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2546 switch (reloc)
2547 {
2548 default:
2549 str = orig_str;
2550 break;
2551
2552 case BFD_RELOC_LO16:
2553 /* X_unsigned is the default, so if the user has done
2554 something which cleared it, we always produce a
2555 signed value. */
2556 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2557 ex.X_add_number &= 0xffff;
2558 else
2559 ex.X_add_number = SEX16 (ex.X_add_number);
2560 break;
2561
2562 case BFD_RELOC_HI16:
2563 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2564 ex.X_add_number = PPC_HI (ex.X_add_number);
2565 else
2566 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
2567 break;
2568
2569 case BFD_RELOC_HI16_S:
2570 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2571 ex.X_add_number = PPC_HA (ex.X_add_number);
2572 else
2573 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2574 break;
2575
2576 case BFD_RELOC_PPC64_HIGHER:
2577 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2578 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2579 else
2580 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2581 break;
2582
2583 case BFD_RELOC_PPC64_HIGHER_S:
2584 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2585 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2586 else
2587 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
2588 break;
2589
2590 case BFD_RELOC_PPC64_HIGHEST:
2591 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2592 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2593 else
2594 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2595 break;
2596
2597 case BFD_RELOC_PPC64_HIGHEST_S:
2598 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2599 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2600 else
2601 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2602 break;
2603 }
2604 #endif /* OBJ_ELF */
2605 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2606 ppc_cpu, (char *) NULL, 0);
2607 }
2608 #ifdef OBJ_ELF
2609 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2610 {
2611 /* Some TLS tweaks. */
2612 switch (reloc)
2613 {
2614 default:
2615 break;
2616 case BFD_RELOC_PPC_TLS:
2617 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2618 ppc_cpu, (char *) NULL, 0);
2619 break;
2620 /* We'll only use the 32 (or 64) bit form of these relocations
2621 in constants. Instructions get the 16 bit form. */
2622 case BFD_RELOC_PPC_DTPREL:
2623 reloc = BFD_RELOC_PPC_DTPREL16;
2624 break;
2625 case BFD_RELOC_PPC_TPREL:
2626 reloc = BFD_RELOC_PPC_TPREL16;
2627 break;
2628 }
2629
2630 /* For the absolute forms of branches, convert the PC
2631 relative form back into the absolute. */
2632 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2633 {
2634 switch (reloc)
2635 {
2636 case BFD_RELOC_PPC_B26:
2637 reloc = BFD_RELOC_PPC_BA26;
2638 break;
2639 case BFD_RELOC_PPC_B16:
2640 reloc = BFD_RELOC_PPC_BA16;
2641 break;
2642 case BFD_RELOC_PPC_B16_BRTAKEN:
2643 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2644 break;
2645 case BFD_RELOC_PPC_B16_BRNTAKEN:
2646 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2647 break;
2648 default:
2649 break;
2650 }
2651 }
2652
2653 if (ppc_obj64
2654 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2655 {
2656 switch (reloc)
2657 {
2658 case BFD_RELOC_16:
2659 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2660 break;
2661 case BFD_RELOC_LO16:
2662 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2663 break;
2664 case BFD_RELOC_16_GOTOFF:
2665 reloc = BFD_RELOC_PPC64_GOT16_DS;
2666 break;
2667 case BFD_RELOC_LO16_GOTOFF:
2668 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2669 break;
2670 case BFD_RELOC_LO16_PLTOFF:
2671 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2672 break;
2673 case BFD_RELOC_16_BASEREL:
2674 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2675 break;
2676 case BFD_RELOC_LO16_BASEREL:
2677 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2678 break;
2679 case BFD_RELOC_PPC_TOC16:
2680 reloc = BFD_RELOC_PPC64_TOC16_DS;
2681 break;
2682 case BFD_RELOC_PPC64_TOC16_LO:
2683 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2684 break;
2685 case BFD_RELOC_PPC64_PLTGOT16:
2686 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2687 break;
2688 case BFD_RELOC_PPC64_PLTGOT16_LO:
2689 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2690 break;
2691 case BFD_RELOC_PPC_DTPREL16:
2692 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2693 break;
2694 case BFD_RELOC_PPC_DTPREL16_LO:
2695 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2696 break;
2697 case BFD_RELOC_PPC_TPREL16:
2698 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2699 break;
2700 case BFD_RELOC_PPC_TPREL16_LO:
2701 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2702 break;
2703 case BFD_RELOC_PPC_GOT_DTPREL16:
2704 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2705 case BFD_RELOC_PPC_GOT_TPREL16:
2706 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2707 break;
2708 default:
2709 as_bad (_("unsupported relocation for DS offset field"));
2710 break;
2711 }
2712 }
2713
2714 /* We need to generate a fixup for this expression. */
2715 if (fc >= MAX_INSN_FIXUPS)
2716 as_fatal (_("too many fixups"));
2717 fixups[fc].exp = ex;
2718 fixups[fc].opindex = 0;
2719 fixups[fc].reloc = reloc;
2720 ++fc;
2721 }
2722 #endif /* OBJ_ELF */
2723
2724 else
2725 {
2726 /* We need to generate a fixup for this expression. */
2727 if (fc >= MAX_INSN_FIXUPS)
2728 as_fatal (_("too many fixups"));
2729 fixups[fc].exp = ex;
2730 fixups[fc].opindex = *opindex_ptr;
2731 fixups[fc].reloc = BFD_RELOC_UNUSED;
2732 ++fc;
2733 }
2734
2735 if (need_paren)
2736 {
2737 endc = ')';
2738 need_paren = 0;
2739 /* If expecting more operands, then we want to see "),". */
2740 if (*str == endc && opindex_ptr[1] != 0)
2741 {
2742 do
2743 ++str;
2744 while (ISSPACE (*str));
2745 endc = ',';
2746 }
2747 }
2748 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2749 {
2750 endc = '(';
2751 need_paren = 1;
2752 }
2753 else
2754 endc = ',';
2755
2756 /* The call to expression should have advanced str past any
2757 whitespace. */
2758 if (*str != endc
2759 && (endc != ',' || *str != '\0'))
2760 {
2761 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2762 break;
2763 }
2764
2765 if (*str != '\0')
2766 ++str;
2767 }
2768
2769 while (ISSPACE (*str))
2770 ++str;
2771
2772 if (*str != '\0')
2773 as_bad (_("junk at end of line: `%s'"), str);
2774
2775 #ifdef OBJ_ELF
2776 /* Do we need/want a APUinfo section? */
2777 if (ppc_cpu & (PPC_OPCODE_SPE
2778 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2779 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2780 | PPC_OPCODE_RFMCI))
2781 {
2782 /* These are all version "1". */
2783 if (opcode->flags & PPC_OPCODE_SPE)
2784 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
2785 if (opcode->flags & PPC_OPCODE_ISEL)
2786 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
2787 if (opcode->flags & PPC_OPCODE_EFS)
2788 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
2789 if (opcode->flags & PPC_OPCODE_BRLOCK)
2790 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
2791 if (opcode->flags & PPC_OPCODE_PMR)
2792 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
2793 if (opcode->flags & PPC_OPCODE_CACHELCK)
2794 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
2795 if (opcode->flags & PPC_OPCODE_RFMCI)
2796 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
2797 }
2798 #endif
2799
2800 /* Write out the instruction. */
2801 f = frag_more (4);
2802 addr_mod = frag_now_fix () & 3;
2803 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2804 as_bad (_("instruction address is not a multiple of 4"));
2805 frag_now->insn_addr = addr_mod;
2806 frag_now->has_code = 1;
2807 md_number_to_chars (f, insn, 4);
2808
2809 #ifdef OBJ_ELF
2810 dwarf2_emit_insn (4);
2811 #endif
2812
2813 /* Create any fixups. At this point we do not use a
2814 bfd_reloc_code_real_type, but instead just use the
2815 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2816 handle fixups for any operand type, although that is admittedly
2817 not a very exciting feature. We pick a BFD reloc type in
2818 md_apply_fix. */
2819 for (i = 0; i < fc; i++)
2820 {
2821 const struct powerpc_operand *operand;
2822
2823 operand = &powerpc_operands[fixups[i].opindex];
2824 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2825 {
2826 reloc_howto_type *reloc_howto;
2827 int size;
2828 int offset;
2829 fixS *fixP;
2830
2831 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
2832 if (!reloc_howto)
2833 abort ();
2834
2835 size = bfd_get_reloc_size (reloc_howto);
2836 offset = target_big_endian ? (4 - size) : 0;
2837
2838 if (size < 1 || size > 4)
2839 abort ();
2840
2841 fixP = fix_new_exp (frag_now,
2842 f - frag_now->fr_literal + offset,
2843 size,
2844 &fixups[i].exp,
2845 reloc_howto->pc_relative,
2846 fixups[i].reloc);
2847
2848 /* Turn off complaints that the addend is too large for things like
2849 foo+100000@ha. */
2850 switch (fixups[i].reloc)
2851 {
2852 case BFD_RELOC_16_GOTOFF:
2853 case BFD_RELOC_PPC_TOC16:
2854 case BFD_RELOC_LO16:
2855 case BFD_RELOC_HI16:
2856 case BFD_RELOC_HI16_S:
2857 #ifdef OBJ_ELF
2858 case BFD_RELOC_PPC64_HIGHER:
2859 case BFD_RELOC_PPC64_HIGHER_S:
2860 case BFD_RELOC_PPC64_HIGHEST:
2861 case BFD_RELOC_PPC64_HIGHEST_S:
2862 #endif
2863 fixP->fx_no_overflow = 1;
2864 break;
2865 default:
2866 break;
2867 }
2868 }
2869 else
2870 fix_new_exp (frag_now,
2871 f - frag_now->fr_literal,
2872 4,
2873 &fixups[i].exp,
2874 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2875 ((bfd_reloc_code_real_type)
2876 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
2877 }
2878 }
2879
2880 /* Handle a macro. Gather all the operands, transform them as
2881 described by the macro, and call md_assemble recursively. All the
2882 operands are separated by commas; we don't accept parentheses
2883 around operands here. */
2884
2885 static void
2886 ppc_macro (char *str, const struct powerpc_macro *macro)
2887 {
2888 char *operands[10];
2889 unsigned int count;
2890 char *s;
2891 unsigned int len;
2892 const char *format;
2893 unsigned int arg;
2894 char *send;
2895 char *complete;
2896
2897 /* Gather the users operands into the operands array. */
2898 count = 0;
2899 s = str;
2900 while (1)
2901 {
2902 if (count >= sizeof operands / sizeof operands[0])
2903 break;
2904 operands[count++] = s;
2905 s = strchr (s, ',');
2906 if (s == (char *) NULL)
2907 break;
2908 *s++ = '\0';
2909 }
2910
2911 if (count != macro->operands)
2912 {
2913 as_bad (_("wrong number of operands"));
2914 return;
2915 }
2916
2917 /* Work out how large the string must be (the size is unbounded
2918 because it includes user input). */
2919 len = 0;
2920 format = macro->format;
2921 while (*format != '\0')
2922 {
2923 if (*format != '%')
2924 {
2925 ++len;
2926 ++format;
2927 }
2928 else
2929 {
2930 arg = strtol (format + 1, &send, 10);
2931 know (send != format && arg < count);
2932 len += strlen (operands[arg]);
2933 format = send;
2934 }
2935 }
2936
2937 /* Put the string together. */
2938 complete = s = (char *) alloca (len + 1);
2939 format = macro->format;
2940 while (*format != '\0')
2941 {
2942 if (*format != '%')
2943 *s++ = *format++;
2944 else
2945 {
2946 arg = strtol (format + 1, &send, 10);
2947 strcpy (s, operands[arg]);
2948 s += strlen (s);
2949 format = send;
2950 }
2951 }
2952 *s = '\0';
2953
2954 /* Assemble the constructed instruction. */
2955 md_assemble (complete);
2956 }
2957 \f
2958 #ifdef OBJ_ELF
2959 /* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
2960
2961 int
2962 ppc_section_letter (int letter, char **ptr_msg)
2963 {
2964 if (letter == 'e')
2965 return SHF_EXCLUDE;
2966
2967 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
2968 return -1;
2969 }
2970
2971 int
2972 ppc_section_word (char *str, size_t len)
2973 {
2974 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2975 return SHF_EXCLUDE;
2976
2977 return -1;
2978 }
2979
2980 int
2981 ppc_section_type (char *str, size_t len)
2982 {
2983 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2984 return SHT_ORDERED;
2985
2986 return -1;
2987 }
2988
2989 int
2990 ppc_section_flags (int flags, int attr, int type)
2991 {
2992 if (type == SHT_ORDERED)
2993 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2994
2995 if (attr & SHF_EXCLUDE)
2996 flags |= SEC_EXCLUDE;
2997
2998 return flags;
2999 }
3000 #endif /* OBJ_ELF */
3001
3002 \f
3003 /* Pseudo-op handling. */
3004
3005 /* The .byte pseudo-op. This is similar to the normal .byte
3006 pseudo-op, but it can also take a single ASCII string. */
3007
3008 static void
3009 ppc_byte (int ignore ATTRIBUTE_UNUSED)
3010 {
3011 if (*input_line_pointer != '\"')
3012 {
3013 cons (1);
3014 return;
3015 }
3016
3017 /* Gather characters. A real double quote is doubled. Unusual
3018 characters are not permitted. */
3019 ++input_line_pointer;
3020 while (1)
3021 {
3022 char c;
3023
3024 c = *input_line_pointer++;
3025
3026 if (c == '\"')
3027 {
3028 if (*input_line_pointer != '\"')
3029 break;
3030 ++input_line_pointer;
3031 }
3032
3033 FRAG_APPEND_1_CHAR (c);
3034 }
3035
3036 demand_empty_rest_of_line ();
3037 }
3038 \f
3039 #ifdef OBJ_XCOFF
3040
3041 /* XCOFF specific pseudo-op handling. */
3042
3043 /* This is set if we are creating a .stabx symbol, since we don't want
3044 to handle symbol suffixes for such symbols. */
3045 static bfd_boolean ppc_stab_symbol;
3046
3047 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3048 symbols in the .bss segment as though they were local common
3049 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3050 aligns .comm and .lcomm to 4 bytes. */
3051
3052 static void
3053 ppc_comm (int lcomm)
3054 {
3055 asection *current_seg = now_seg;
3056 subsegT current_subseg = now_subseg;
3057 char *name;
3058 char endc;
3059 char *end_name;
3060 offsetT size;
3061 offsetT align;
3062 symbolS *lcomm_sym = NULL;
3063 symbolS *sym;
3064 char *pfrag;
3065
3066 name = input_line_pointer;
3067 endc = get_symbol_end ();
3068 end_name = input_line_pointer;
3069 *end_name = endc;
3070
3071 if (*input_line_pointer != ',')
3072 {
3073 as_bad (_("missing size"));
3074 ignore_rest_of_line ();
3075 return;
3076 }
3077 ++input_line_pointer;
3078
3079 size = get_absolute_expression ();
3080 if (size < 0)
3081 {
3082 as_bad (_("negative size"));
3083 ignore_rest_of_line ();
3084 return;
3085 }
3086
3087 if (! lcomm)
3088 {
3089 /* The third argument to .comm is the alignment. */
3090 if (*input_line_pointer != ',')
3091 align = 2;
3092 else
3093 {
3094 ++input_line_pointer;
3095 align = get_absolute_expression ();
3096 if (align <= 0)
3097 {
3098 as_warn (_("ignoring bad alignment"));
3099 align = 2;
3100 }
3101 }
3102 }
3103 else
3104 {
3105 char *lcomm_name;
3106 char lcomm_endc;
3107
3108 if (size <= 4)
3109 align = 2;
3110 else
3111 align = 3;
3112
3113 /* The third argument to .lcomm appears to be the real local
3114 common symbol to create. References to the symbol named in
3115 the first argument are turned into references to the third
3116 argument. */
3117 if (*input_line_pointer != ',')
3118 {
3119 as_bad (_("missing real symbol name"));
3120 ignore_rest_of_line ();
3121 return;
3122 }
3123 ++input_line_pointer;
3124
3125 lcomm_name = input_line_pointer;
3126 lcomm_endc = get_symbol_end ();
3127
3128 lcomm_sym = symbol_find_or_make (lcomm_name);
3129
3130 *input_line_pointer = lcomm_endc;
3131 }
3132
3133 *end_name = '\0';
3134 sym = symbol_find_or_make (name);
3135 *end_name = endc;
3136
3137 if (S_IS_DEFINED (sym)
3138 || S_GET_VALUE (sym) != 0)
3139 {
3140 as_bad (_("attempt to redefine symbol"));
3141 ignore_rest_of_line ();
3142 return;
3143 }
3144
3145 record_alignment (bss_section, align);
3146
3147 if (! lcomm
3148 || ! S_IS_DEFINED (lcomm_sym))
3149 {
3150 symbolS *def_sym;
3151 offsetT def_size;
3152
3153 if (! lcomm)
3154 {
3155 def_sym = sym;
3156 def_size = size;
3157 S_SET_EXTERNAL (sym);
3158 }
3159 else
3160 {
3161 symbol_get_tc (lcomm_sym)->output = 1;
3162 def_sym = lcomm_sym;
3163 def_size = 0;
3164 }
3165
3166 subseg_set (bss_section, 1);
3167 frag_align (align, 0, 0);
3168
3169 symbol_set_frag (def_sym, frag_now);
3170 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3171 def_size, (char *) NULL);
3172 *pfrag = 0;
3173 S_SET_SEGMENT (def_sym, bss_section);
3174 symbol_get_tc (def_sym)->align = align;
3175 }
3176 else if (lcomm)
3177 {
3178 /* Align the size of lcomm_sym. */
3179 symbol_get_frag (lcomm_sym)->fr_offset =
3180 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3181 &~ ((1 << align) - 1));
3182 if (align > symbol_get_tc (lcomm_sym)->align)
3183 symbol_get_tc (lcomm_sym)->align = align;
3184 }
3185
3186 if (lcomm)
3187 {
3188 /* Make sym an offset from lcomm_sym. */
3189 S_SET_SEGMENT (sym, bss_section);
3190 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3191 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3192 symbol_get_frag (lcomm_sym)->fr_offset += size;
3193 }
3194
3195 subseg_set (current_seg, current_subseg);
3196
3197 demand_empty_rest_of_line ();
3198 }
3199
3200 /* The .csect pseudo-op. This switches us into a different
3201 subsegment. The first argument is a symbol whose value is the
3202 start of the .csect. In COFF, csect symbols get special aux
3203 entries defined by the x_csect field of union internal_auxent. The
3204 optional second argument is the alignment (the default is 2). */
3205
3206 static void
3207 ppc_csect (int ignore ATTRIBUTE_UNUSED)
3208 {
3209 char *name;
3210 char endc;
3211 symbolS *sym;
3212 offsetT align;
3213
3214 name = input_line_pointer;
3215 endc = get_symbol_end ();
3216
3217 sym = symbol_find_or_make (name);
3218
3219 *input_line_pointer = endc;
3220
3221 if (S_GET_NAME (sym)[0] == '\0')
3222 {
3223 /* An unnamed csect is assumed to be [PR]. */
3224 symbol_get_tc (sym)->class = XMC_PR;
3225 }
3226
3227 align = 2;
3228 if (*input_line_pointer == ',')
3229 {
3230 ++input_line_pointer;
3231 align = get_absolute_expression ();
3232 }
3233
3234 ppc_change_csect (sym, align);
3235
3236 demand_empty_rest_of_line ();
3237 }
3238
3239 /* Change to a different csect. */
3240
3241 static void
3242 ppc_change_csect (symbolS *sym, offsetT align)
3243 {
3244 if (S_IS_DEFINED (sym))
3245 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3246 else
3247 {
3248 symbolS **list_ptr;
3249 int after_toc;
3250 int hold_chunksize;
3251 symbolS *list;
3252 int is_code;
3253 segT sec;
3254
3255 /* This is a new csect. We need to look at the symbol class to
3256 figure out whether it should go in the text section or the
3257 data section. */
3258 after_toc = 0;
3259 is_code = 0;
3260 switch (symbol_get_tc (sym)->class)
3261 {
3262 case XMC_PR:
3263 case XMC_RO:
3264 case XMC_DB:
3265 case XMC_GL:
3266 case XMC_XO:
3267 case XMC_SV:
3268 case XMC_TI:
3269 case XMC_TB:
3270 S_SET_SEGMENT (sym, text_section);
3271 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3272 ++ppc_text_subsegment;
3273 list_ptr = &ppc_text_csects;
3274 is_code = 1;
3275 break;
3276 case XMC_RW:
3277 case XMC_TC0:
3278 case XMC_TC:
3279 case XMC_DS:
3280 case XMC_UA:
3281 case XMC_BS:
3282 case XMC_UC:
3283 if (ppc_toc_csect != NULL
3284 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3285 == ppc_data_subsegment))
3286 after_toc = 1;
3287 S_SET_SEGMENT (sym, data_section);
3288 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
3289 ++ppc_data_subsegment;
3290 list_ptr = &ppc_data_csects;
3291 break;
3292 default:
3293 abort ();
3294 }
3295
3296 /* We set the obstack chunk size to a small value before
3297 changing subsegments, so that we don't use a lot of memory
3298 space for what may be a small section. */
3299 hold_chunksize = chunksize;
3300 chunksize = 64;
3301
3302 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3303 symbol_get_tc (sym)->subseg);
3304
3305 chunksize = hold_chunksize;
3306
3307 if (after_toc)
3308 ppc_after_toc_frag = frag_now;
3309
3310 record_alignment (sec, align);
3311 if (is_code)
3312 frag_align_code (align, 0);
3313 else
3314 frag_align (align, 0, 0);
3315
3316 symbol_set_frag (sym, frag_now);
3317 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3318
3319 symbol_get_tc (sym)->align = align;
3320 symbol_get_tc (sym)->output = 1;
3321 symbol_get_tc (sym)->within = sym;
3322
3323 for (list = *list_ptr;
3324 symbol_get_tc (list)->next != (symbolS *) NULL;
3325 list = symbol_get_tc (list)->next)
3326 ;
3327 symbol_get_tc (list)->next = sym;
3328
3329 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3330 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3331 &symbol_lastP);
3332 }
3333
3334 ppc_current_csect = sym;
3335 }
3336
3337 /* This function handles the .text and .data pseudo-ops. These
3338 pseudo-ops aren't really used by XCOFF; we implement them for the
3339 convenience of people who aren't used to XCOFF. */
3340
3341 static void
3342 ppc_section (int type)
3343 {
3344 const char *name;
3345 symbolS *sym;
3346
3347 if (type == 't')
3348 name = ".text[PR]";
3349 else if (type == 'd')
3350 name = ".data[RW]";
3351 else
3352 abort ();
3353
3354 sym = symbol_find_or_make (name);
3355
3356 ppc_change_csect (sym, 2);
3357
3358 demand_empty_rest_of_line ();
3359 }
3360
3361 /* This function handles the .section pseudo-op. This is mostly to
3362 give an error, since XCOFF only supports .text, .data and .bss, but
3363 we do permit the user to name the text or data section. */
3364
3365 static void
3366 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
3367 {
3368 char *user_name;
3369 const char *real_name;
3370 char c;
3371 symbolS *sym;
3372
3373 user_name = input_line_pointer;
3374 c = get_symbol_end ();
3375
3376 if (strcmp (user_name, ".text") == 0)
3377 real_name = ".text[PR]";
3378 else if (strcmp (user_name, ".data") == 0)
3379 real_name = ".data[RW]";
3380 else
3381 {
3382 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3383 *input_line_pointer = c;
3384 ignore_rest_of_line ();
3385 return;
3386 }
3387
3388 *input_line_pointer = c;
3389
3390 sym = symbol_find_or_make (real_name);
3391
3392 ppc_change_csect (sym, 2);
3393
3394 demand_empty_rest_of_line ();
3395 }
3396
3397 /* The .extern pseudo-op. We create an undefined symbol. */
3398
3399 static void
3400 ppc_extern (int ignore ATTRIBUTE_UNUSED)
3401 {
3402 char *name;
3403 char endc;
3404
3405 name = input_line_pointer;
3406 endc = get_symbol_end ();
3407
3408 (void) symbol_find_or_make (name);
3409
3410 *input_line_pointer = endc;
3411
3412 demand_empty_rest_of_line ();
3413 }
3414
3415 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3416
3417 static void
3418 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
3419 {
3420 char *name;
3421 char endc;
3422 symbolS *sym;
3423
3424 name = input_line_pointer;
3425 endc = get_symbol_end ();
3426
3427 sym = symbol_find_or_make (name);
3428
3429 *input_line_pointer = endc;
3430
3431 symbol_get_tc (sym)->output = 1;
3432
3433 demand_empty_rest_of_line ();
3434 }
3435
3436 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3437 although I don't know why it bothers. */
3438
3439 static void
3440 ppc_rename (int ignore ATTRIBUTE_UNUSED)
3441 {
3442 char *name;
3443 char endc;
3444 symbolS *sym;
3445 int len;
3446
3447 name = input_line_pointer;
3448 endc = get_symbol_end ();
3449
3450 sym = symbol_find_or_make (name);
3451
3452 *input_line_pointer = endc;
3453
3454 if (*input_line_pointer != ',')
3455 {
3456 as_bad (_("missing rename string"));
3457 ignore_rest_of_line ();
3458 return;
3459 }
3460 ++input_line_pointer;
3461
3462 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
3463
3464 demand_empty_rest_of_line ();
3465 }
3466
3467 /* The .stabx pseudo-op. This is similar to a normal .stabs
3468 pseudo-op, but slightly different. A sample is
3469 .stabx "main:F-1",.main,142,0
3470 The first argument is the symbol name to create. The second is the
3471 value, and the third is the storage class. The fourth seems to be
3472 always zero, and I am assuming it is the type. */
3473
3474 static void
3475 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
3476 {
3477 char *name;
3478 int len;
3479 symbolS *sym;
3480 expressionS exp;
3481
3482 name = demand_copy_C_string (&len);
3483
3484 if (*input_line_pointer != ',')
3485 {
3486 as_bad (_("missing value"));
3487 return;
3488 }
3489 ++input_line_pointer;
3490
3491 ppc_stab_symbol = TRUE;
3492 sym = symbol_make (name);
3493 ppc_stab_symbol = FALSE;
3494
3495 symbol_get_tc (sym)->real_name = name;
3496
3497 (void) expression (&exp);
3498
3499 switch (exp.X_op)
3500 {
3501 case O_illegal:
3502 case O_absent:
3503 case O_big:
3504 as_bad (_("illegal .stabx expression; zero assumed"));
3505 exp.X_add_number = 0;
3506 /* Fall through. */
3507 case O_constant:
3508 S_SET_VALUE (sym, (valueT) exp.X_add_number);
3509 symbol_set_frag (sym, &zero_address_frag);
3510 break;
3511
3512 case O_symbol:
3513 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
3514 symbol_set_value_expression (sym, &exp);
3515 else
3516 {
3517 S_SET_VALUE (sym,
3518 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
3519 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
3520 }
3521 break;
3522
3523 default:
3524 /* The value is some complex expression. This will probably
3525 fail at some later point, but this is probably the right
3526 thing to do here. */
3527 symbol_set_value_expression (sym, &exp);
3528 break;
3529 }
3530
3531 S_SET_SEGMENT (sym, ppc_coff_debug_section);
3532 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3533
3534 if (*input_line_pointer != ',')
3535 {
3536 as_bad (_("missing class"));
3537 return;
3538 }
3539 ++input_line_pointer;
3540
3541 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3542
3543 if (*input_line_pointer != ',')
3544 {
3545 as_bad (_("missing type"));
3546 return;
3547 }
3548 ++input_line_pointer;
3549
3550 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3551
3552 symbol_get_tc (sym)->output = 1;
3553
3554 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
3555
3556 symbol_get_tc (sym)->within = ppc_current_block;
3557
3558 /* In this case :
3559
3560 .bs name
3561 .stabx "z",arrays_,133,0
3562 .es
3563
3564 .comm arrays_,13768,3
3565
3566 resolve_symbol_value will copy the exp's "within" into sym's when the
3567 offset is 0. Since this seems to be corner case problem,
3568 only do the correction for storage class C_STSYM. A better solution
3569 would be to have the tc field updated in ppc_symbol_new_hook. */
3570
3571 if (exp.X_op == O_symbol)
3572 {
3573 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3574 }
3575 }
3576
3577 if (exp.X_op != O_symbol
3578 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3579 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3580 ppc_frob_label (sym);
3581 else
3582 {
3583 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3584 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
3585 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3586 symbol_get_tc (ppc_current_csect)->within = sym;
3587 }
3588
3589 demand_empty_rest_of_line ();
3590 }
3591
3592 /* The .function pseudo-op. This takes several arguments. The first
3593 argument seems to be the external name of the symbol. The second
3594 argument seems to be the label for the start of the function. gcc
3595 uses the same name for both. I have no idea what the third and
3596 fourth arguments are meant to be. The optional fifth argument is
3597 an expression for the size of the function. In COFF this symbol
3598 gets an aux entry like that used for a csect. */
3599
3600 static void
3601 ppc_function (int ignore ATTRIBUTE_UNUSED)
3602 {
3603 char *name;
3604 char endc;
3605 char *s;
3606 symbolS *ext_sym;
3607 symbolS *lab_sym;
3608
3609 name = input_line_pointer;
3610 endc = get_symbol_end ();
3611
3612 /* Ignore any [PR] suffix. */
3613 name = ppc_canonicalize_symbol_name (name);
3614 s = strchr (name, '[');
3615 if (s != (char *) NULL
3616 && strcmp (s + 1, "PR]") == 0)
3617 *s = '\0';
3618
3619 ext_sym = symbol_find_or_make (name);
3620
3621 *input_line_pointer = endc;
3622
3623 if (*input_line_pointer != ',')
3624 {
3625 as_bad (_("missing symbol name"));
3626 ignore_rest_of_line ();
3627 return;
3628 }
3629 ++input_line_pointer;
3630
3631 name = input_line_pointer;
3632 endc = get_symbol_end ();
3633
3634 lab_sym = symbol_find_or_make (name);
3635
3636 *input_line_pointer = endc;
3637
3638 if (ext_sym != lab_sym)
3639 {
3640 expressionS exp;
3641
3642 exp.X_op = O_symbol;
3643 exp.X_add_symbol = lab_sym;
3644 exp.X_op_symbol = NULL;
3645 exp.X_add_number = 0;
3646 exp.X_unsigned = 0;
3647 symbol_set_value_expression (ext_sym, &exp);
3648 }
3649
3650 if (symbol_get_tc (ext_sym)->class == -1)
3651 symbol_get_tc (ext_sym)->class = XMC_PR;
3652 symbol_get_tc (ext_sym)->output = 1;
3653
3654 if (*input_line_pointer == ',')
3655 {
3656 expressionS ignore;
3657
3658 /* Ignore the third argument. */
3659 ++input_line_pointer;
3660 expression (&ignore);
3661 if (*input_line_pointer == ',')
3662 {
3663 /* Ignore the fourth argument. */
3664 ++input_line_pointer;
3665 expression (&ignore);
3666 if (*input_line_pointer == ',')
3667 {
3668 /* The fifth argument is the function size. */
3669 ++input_line_pointer;
3670 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3671 absolute_section,
3672 (valueT) 0,
3673 &zero_address_frag);
3674 pseudo_set (symbol_get_tc (ext_sym)->size);
3675 }
3676 }
3677 }
3678
3679 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3680 SF_SET_FUNCTION (ext_sym);
3681 SF_SET_PROCESS (ext_sym);
3682 coff_add_linesym (ext_sym);
3683
3684 demand_empty_rest_of_line ();
3685 }
3686
3687 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
3688 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3689 with the correct line number */
3690
3691 static symbolS *saved_bi_sym = 0;
3692
3693 static void
3694 ppc_bf (int ignore ATTRIBUTE_UNUSED)
3695 {
3696 symbolS *sym;
3697
3698 sym = symbol_make (".bf");
3699 S_SET_SEGMENT (sym, text_section);
3700 symbol_set_frag (sym, frag_now);
3701 S_SET_VALUE (sym, frag_now_fix ());
3702 S_SET_STORAGE_CLASS (sym, C_FCN);
3703
3704 coff_line_base = get_absolute_expression ();
3705
3706 S_SET_NUMBER_AUXILIARY (sym, 1);
3707 SA_SET_SYM_LNNO (sym, coff_line_base);
3708
3709 /* Line number for bi. */
3710 if (saved_bi_sym)
3711 {
3712 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3713 saved_bi_sym = 0;
3714 }
3715
3716
3717 symbol_get_tc (sym)->output = 1;
3718
3719 ppc_frob_label (sym);
3720
3721 demand_empty_rest_of_line ();
3722 }
3723
3724 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3725 ".ef", except that the line number is absolute, not relative to the
3726 most recent ".bf" symbol. */
3727
3728 static void
3729 ppc_ef (int ignore ATTRIBUTE_UNUSED)
3730 {
3731 symbolS *sym;
3732
3733 sym = symbol_make (".ef");
3734 S_SET_SEGMENT (sym, text_section);
3735 symbol_set_frag (sym, frag_now);
3736 S_SET_VALUE (sym, frag_now_fix ());
3737 S_SET_STORAGE_CLASS (sym, C_FCN);
3738 S_SET_NUMBER_AUXILIARY (sym, 1);
3739 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3740 symbol_get_tc (sym)->output = 1;
3741
3742 ppc_frob_label (sym);
3743
3744 demand_empty_rest_of_line ();
3745 }
3746
3747 /* The .bi and .ei pseudo-ops. These take a string argument and
3748 generates a C_BINCL or C_EINCL symbol, which goes at the start of
3749 the symbol list. The value of .bi will be know when the next .bf
3750 is encountered. */
3751
3752 static void
3753 ppc_biei (int ei)
3754 {
3755 static symbolS *last_biei;
3756
3757 char *name;
3758 int len;
3759 symbolS *sym;
3760 symbolS *look;
3761
3762 name = demand_copy_C_string (&len);
3763
3764 /* The value of these symbols is actually file offset. Here we set
3765 the value to the index into the line number entries. In
3766 ppc_frob_symbols we set the fix_line field, which will cause BFD
3767 to do the right thing. */
3768
3769 sym = symbol_make (name);
3770 /* obj-coff.c currently only handles line numbers correctly in the
3771 .text section. */
3772 S_SET_SEGMENT (sym, text_section);
3773 S_SET_VALUE (sym, coff_n_line_nos);
3774 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3775
3776 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
3777 symbol_get_tc (sym)->output = 1;
3778
3779 /* Save bi. */
3780 if (ei)
3781 saved_bi_sym = 0;
3782 else
3783 saved_bi_sym = sym;
3784
3785 for (look = last_biei ? last_biei : symbol_rootP;
3786 (look != (symbolS *) NULL
3787 && (S_GET_STORAGE_CLASS (look) == C_FILE
3788 || S_GET_STORAGE_CLASS (look) == C_BINCL
3789 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3790 look = symbol_next (look))
3791 ;
3792 if (look != (symbolS *) NULL)
3793 {
3794 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3795 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3796 last_biei = sym;
3797 }
3798
3799 demand_empty_rest_of_line ();
3800 }
3801
3802 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3803 There is one argument, which is a csect symbol. The value of the
3804 .bs symbol is the index of this csect symbol. */
3805
3806 static void
3807 ppc_bs (int ignore ATTRIBUTE_UNUSED)
3808 {
3809 char *name;
3810 char endc;
3811 symbolS *csect;
3812 symbolS *sym;
3813
3814 if (ppc_current_block != NULL)
3815 as_bad (_("nested .bs blocks"));
3816
3817 name = input_line_pointer;
3818 endc = get_symbol_end ();
3819
3820 csect = symbol_find_or_make (name);
3821
3822 *input_line_pointer = endc;
3823
3824 sym = symbol_make (".bs");
3825 S_SET_SEGMENT (sym, now_seg);
3826 S_SET_STORAGE_CLASS (sym, C_BSTAT);
3827 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3828 symbol_get_tc (sym)->output = 1;
3829
3830 symbol_get_tc (sym)->within = csect;
3831
3832 ppc_frob_label (sym);
3833
3834 ppc_current_block = sym;
3835
3836 demand_empty_rest_of_line ();
3837 }
3838
3839 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3840
3841 static void
3842 ppc_es (int ignore ATTRIBUTE_UNUSED)
3843 {
3844 symbolS *sym;
3845
3846 if (ppc_current_block == NULL)
3847 as_bad (_(".es without preceding .bs"));
3848
3849 sym = symbol_make (".es");
3850 S_SET_SEGMENT (sym, now_seg);
3851 S_SET_STORAGE_CLASS (sym, C_ESTAT);
3852 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3853 symbol_get_tc (sym)->output = 1;
3854
3855 ppc_frob_label (sym);
3856
3857 ppc_current_block = NULL;
3858
3859 demand_empty_rest_of_line ();
3860 }
3861
3862 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3863 line number. */
3864
3865 static void
3866 ppc_bb (int ignore ATTRIBUTE_UNUSED)
3867 {
3868 symbolS *sym;
3869
3870 sym = symbol_make (".bb");
3871 S_SET_SEGMENT (sym, text_section);
3872 symbol_set_frag (sym, frag_now);
3873 S_SET_VALUE (sym, frag_now_fix ());
3874 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3875
3876 S_SET_NUMBER_AUXILIARY (sym, 1);
3877 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3878
3879 symbol_get_tc (sym)->output = 1;
3880
3881 SF_SET_PROCESS (sym);
3882
3883 ppc_frob_label (sym);
3884
3885 demand_empty_rest_of_line ();
3886 }
3887
3888 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3889 line number. */
3890
3891 static void
3892 ppc_eb (int ignore ATTRIBUTE_UNUSED)
3893 {
3894 symbolS *sym;
3895
3896 sym = symbol_make (".eb");
3897 S_SET_SEGMENT (sym, text_section);
3898 symbol_set_frag (sym, frag_now);
3899 S_SET_VALUE (sym, frag_now_fix ());
3900 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3901 S_SET_NUMBER_AUXILIARY (sym, 1);
3902 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3903 symbol_get_tc (sym)->output = 1;
3904
3905 SF_SET_PROCESS (sym);
3906
3907 ppc_frob_label (sym);
3908
3909 demand_empty_rest_of_line ();
3910 }
3911
3912 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3913 specified name. */
3914
3915 static void
3916 ppc_bc (int ignore ATTRIBUTE_UNUSED)
3917 {
3918 char *name;
3919 int len;
3920 symbolS *sym;
3921
3922 name = demand_copy_C_string (&len);
3923 sym = symbol_make (name);
3924 S_SET_SEGMENT (sym, ppc_coff_debug_section);
3925 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3926 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3927 S_SET_VALUE (sym, 0);
3928 symbol_get_tc (sym)->output = 1;
3929
3930 ppc_frob_label (sym);
3931
3932 demand_empty_rest_of_line ();
3933 }
3934
3935 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3936
3937 static void
3938 ppc_ec (int ignore ATTRIBUTE_UNUSED)
3939 {
3940 symbolS *sym;
3941
3942 sym = symbol_make (".ec");
3943 S_SET_SEGMENT (sym, ppc_coff_debug_section);
3944 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3945 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3946 S_SET_VALUE (sym, 0);
3947 symbol_get_tc (sym)->output = 1;
3948
3949 ppc_frob_label (sym);
3950
3951 demand_empty_rest_of_line ();
3952 }
3953
3954 /* The .toc pseudo-op. Switch to the .toc subsegment. */
3955
3956 static void
3957 ppc_toc (int ignore ATTRIBUTE_UNUSED)
3958 {
3959 if (ppc_toc_csect != (symbolS *) NULL)
3960 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
3961 else
3962 {
3963 subsegT subseg;
3964 symbolS *sym;
3965 symbolS *list;
3966
3967 subseg = ppc_data_subsegment;
3968 ++ppc_data_subsegment;
3969
3970 subseg_new (segment_name (data_section), subseg);
3971 ppc_toc_frag = frag_now;
3972
3973 sym = symbol_find_or_make ("TOC[TC0]");
3974 symbol_set_frag (sym, frag_now);
3975 S_SET_SEGMENT (sym, data_section);
3976 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3977 symbol_get_tc (sym)->subseg = subseg;
3978 symbol_get_tc (sym)->output = 1;
3979 symbol_get_tc (sym)->within = sym;
3980
3981 ppc_toc_csect = sym;
3982
3983 for (list = ppc_data_csects;
3984 symbol_get_tc (list)->next != (symbolS *) NULL;
3985 list = symbol_get_tc (list)->next)
3986 ;
3987 symbol_get_tc (list)->next = sym;
3988
3989 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3990 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3991 &symbol_lastP);
3992 }
3993
3994 ppc_current_csect = ppc_toc_csect;
3995
3996 demand_empty_rest_of_line ();
3997 }
3998
3999 /* The AIX assembler automatically aligns the operands of a .long or
4000 .short pseudo-op, and we want to be compatible. */
4001
4002 static void
4003 ppc_xcoff_cons (int log_size)
4004 {
4005 frag_align (log_size, 0, 0);
4006 record_alignment (now_seg, log_size);
4007 cons (1 << log_size);
4008 }
4009
4010 static void
4011 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4012 {
4013 expressionS exp;
4014 int byte_count;
4015
4016 (void) expression (&exp);
4017
4018 if (exp.X_op != O_constant)
4019 {
4020 as_bad (_("non-constant byte count"));
4021 return;
4022 }
4023
4024 byte_count = exp.X_add_number;
4025
4026 if (*input_line_pointer != ',')
4027 {
4028 as_bad (_("missing value"));
4029 return;
4030 }
4031
4032 ++input_line_pointer;
4033 cons (byte_count);
4034 }
4035
4036 #endif /* OBJ_XCOFF */
4037 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4038 \f
4039 /* The .tc pseudo-op. This is used when generating either XCOFF or
4040 ELF. This takes two or more arguments.
4041
4042 When generating XCOFF output, the first argument is the name to
4043 give to this location in the toc; this will be a symbol with class
4044 TC. The rest of the arguments are N-byte values to actually put at
4045 this location in the TOC; often there is just one more argument, a
4046 relocatable symbol reference. The size of the value to store
4047 depends on target word size. A 32-bit target uses 4-byte values, a
4048 64-bit target uses 8-byte values.
4049
4050 When not generating XCOFF output, the arguments are the same, but
4051 the first argument is simply ignored. */
4052
4053 static void
4054 ppc_tc (int ignore ATTRIBUTE_UNUSED)
4055 {
4056 #ifdef OBJ_XCOFF
4057
4058 /* Define the TOC symbol name. */
4059 {
4060 char *name;
4061 char endc;
4062 symbolS *sym;
4063
4064 if (ppc_toc_csect == (symbolS *) NULL
4065 || ppc_toc_csect != ppc_current_csect)
4066 {
4067 as_bad (_(".tc not in .toc section"));
4068 ignore_rest_of_line ();
4069 return;
4070 }
4071
4072 name = input_line_pointer;
4073 endc = get_symbol_end ();
4074
4075 sym = symbol_find_or_make (name);
4076
4077 *input_line_pointer = endc;
4078
4079 if (S_IS_DEFINED (sym))
4080 {
4081 symbolS *label;
4082
4083 label = symbol_get_tc (ppc_current_csect)->within;
4084 if (symbol_get_tc (label)->class != XMC_TC0)
4085 {
4086 as_bad (_(".tc with no label"));
4087 ignore_rest_of_line ();
4088 return;
4089 }
4090
4091 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
4092 symbol_set_frag (label, symbol_get_frag (sym));
4093 S_SET_VALUE (label, S_GET_VALUE (sym));
4094
4095 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4096 ++input_line_pointer;
4097
4098 return;
4099 }
4100
4101 S_SET_SEGMENT (sym, now_seg);
4102 symbol_set_frag (sym, frag_now);
4103 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4104 symbol_get_tc (sym)->class = XMC_TC;
4105 symbol_get_tc (sym)->output = 1;
4106
4107 ppc_frob_label (sym);
4108 }
4109
4110 #endif /* OBJ_XCOFF */
4111 #ifdef OBJ_ELF
4112 int align;
4113
4114 /* Skip the TOC symbol name. */
4115 while (is_part_of_name (*input_line_pointer)
4116 || *input_line_pointer == ' '
4117 || *input_line_pointer == '['
4118 || *input_line_pointer == ']'
4119 || *input_line_pointer == '{'
4120 || *input_line_pointer == '}')
4121 ++input_line_pointer;
4122
4123 /* Align to a four/eight byte boundary. */
4124 align = ppc_obj64 ? 3 : 2;
4125 frag_align (align, 0, 0);
4126 record_alignment (now_seg, align);
4127 #endif /* OBJ_ELF */
4128
4129 if (*input_line_pointer != ',')
4130 demand_empty_rest_of_line ();
4131 else
4132 {
4133 ++input_line_pointer;
4134 cons (ppc_obj64 ? 8 : 4);
4135 }
4136 }
4137
4138 /* Pseudo-op .machine. */
4139
4140 static void
4141 ppc_machine (int ignore ATTRIBUTE_UNUSED)
4142 {
4143 char *cpu_string;
4144 #define MAX_HISTORY 100
4145 static ppc_cpu_t *cpu_history;
4146 static int curr_hist;
4147
4148 SKIP_WHITESPACE ();
4149
4150 if (*input_line_pointer == '"')
4151 {
4152 int len;
4153 cpu_string = demand_copy_C_string (&len);
4154 }
4155 else
4156 {
4157 char c;
4158 cpu_string = input_line_pointer;
4159 c = get_symbol_end ();
4160 cpu_string = xstrdup (cpu_string);
4161 *input_line_pointer = c;
4162 }
4163
4164 if (cpu_string != NULL)
4165 {
4166 ppc_cpu_t old_cpu = ppc_cpu;
4167 char *p;
4168
4169 for (p = cpu_string; *p != 0; p++)
4170 *p = TOLOWER (*p);
4171
4172 if (strcmp (cpu_string, "push") == 0)
4173 {
4174 if (cpu_history == NULL)
4175 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4176
4177 if (curr_hist >= MAX_HISTORY)
4178 as_bad (_(".machine stack overflow"));
4179 else
4180 cpu_history[curr_hist++] = ppc_cpu;
4181 }
4182 else if (strcmp (cpu_string, "pop") == 0)
4183 {
4184 if (curr_hist <= 0)
4185 as_bad (_(".machine stack underflow"));
4186 else
4187 ppc_cpu = cpu_history[--curr_hist];
4188 }
4189 else if (parse_cpu (cpu_string))
4190 ;
4191 else
4192 as_bad (_("invalid machine `%s'"), cpu_string);
4193
4194 if (ppc_cpu != old_cpu)
4195 ppc_setup_opcodes ();
4196 }
4197
4198 demand_empty_rest_of_line ();
4199 }
4200
4201 /* See whether a symbol is in the TOC section. */
4202
4203 static int
4204 ppc_is_toc_sym (symbolS *sym)
4205 {
4206 #ifdef OBJ_XCOFF
4207 return symbol_get_tc (sym)->class == XMC_TC;
4208 #endif
4209 #ifdef OBJ_ELF
4210 const char *sname = segment_name (S_GET_SEGMENT (sym));
4211 if (ppc_obj64)
4212 return strcmp (sname, ".toc") == 0;
4213 else
4214 return strcmp (sname, ".got") == 0;
4215 #endif
4216 }
4217 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
4218 \f
4219 #ifdef TE_PE
4220
4221 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
4222
4223 /* Set the current section. */
4224 static void
4225 ppc_set_current_section (segT new)
4226 {
4227 ppc_previous_section = ppc_current_section;
4228 ppc_current_section = new;
4229 }
4230
4231 /* pseudo-op: .previous
4232 behaviour: toggles the current section with the previous section.
4233 errors: None
4234 warnings: "No previous section" */
4235
4236 static void
4237 ppc_previous (int ignore ATTRIBUTE_UNUSED)
4238 {
4239 symbolS *tmp;
4240
4241 if (ppc_previous_section == NULL)
4242 {
4243 as_warn (_("No previous section to return to. Directive ignored."));
4244 return;
4245 }
4246
4247 subseg_set (ppc_previous_section, 0);
4248
4249 ppc_set_current_section (ppc_previous_section);
4250 }
4251
4252 /* pseudo-op: .pdata
4253 behaviour: predefined read only data section
4254 double word aligned
4255 errors: None
4256 warnings: None
4257 initial: .section .pdata "adr3"
4258 a - don't know -- maybe a misprint
4259 d - initialized data
4260 r - readable
4261 3 - double word aligned (that would be 4 byte boundary)
4262
4263 commentary:
4264 Tag index tables (also known as the function table) for exception
4265 handling, debugging, etc. */
4266
4267 static void
4268 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
4269 {
4270 if (pdata_section == 0)
4271 {
4272 pdata_section = subseg_new (".pdata", 0);
4273
4274 bfd_set_section_flags (stdoutput, pdata_section,
4275 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4276 | SEC_READONLY | SEC_DATA ));
4277
4278 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4279 }
4280 else
4281 {
4282 pdata_section = subseg_new (".pdata", 0);
4283 }
4284 ppc_set_current_section (pdata_section);
4285 }
4286
4287 /* pseudo-op: .ydata
4288 behaviour: predefined read only data section
4289 double word aligned
4290 errors: None
4291 warnings: None
4292 initial: .section .ydata "drw3"
4293 a - don't know -- maybe a misprint
4294 d - initialized data
4295 r - readable
4296 3 - double word aligned (that would be 4 byte boundary)
4297 commentary:
4298 Tag tables (also known as the scope table) for exception handling,
4299 debugging, etc. */
4300
4301 static void
4302 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
4303 {
4304 if (ydata_section == 0)
4305 {
4306 ydata_section = subseg_new (".ydata", 0);
4307 bfd_set_section_flags (stdoutput, ydata_section,
4308 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4309 | SEC_READONLY | SEC_DATA ));
4310
4311 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4312 }
4313 else
4314 {
4315 ydata_section = subseg_new (".ydata", 0);
4316 }
4317 ppc_set_current_section (ydata_section);
4318 }
4319
4320 /* pseudo-op: .reldata
4321 behaviour: predefined read write data section
4322 double word aligned (4-byte)
4323 FIXME: relocation is applied to it
4324 FIXME: what's the difference between this and .data?
4325 errors: None
4326 warnings: None
4327 initial: .section .reldata "drw3"
4328 d - initialized data
4329 r - readable
4330 w - writeable
4331 3 - double word aligned (that would be 8 byte boundary)
4332
4333 commentary:
4334 Like .data, but intended to hold data subject to relocation, such as
4335 function descriptors, etc. */
4336
4337 static void
4338 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
4339 {
4340 if (reldata_section == 0)
4341 {
4342 reldata_section = subseg_new (".reldata", 0);
4343
4344 bfd_set_section_flags (stdoutput, reldata_section,
4345 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4346 | SEC_DATA));
4347
4348 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4349 }
4350 else
4351 {
4352 reldata_section = subseg_new (".reldata", 0);
4353 }
4354 ppc_set_current_section (reldata_section);
4355 }
4356
4357 /* pseudo-op: .rdata
4358 behaviour: predefined read only data section
4359 double word aligned
4360 errors: None
4361 warnings: None
4362 initial: .section .rdata "dr3"
4363 d - initialized data
4364 r - readable
4365 3 - double word aligned (that would be 4 byte boundary) */
4366
4367 static void
4368 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
4369 {
4370 if (rdata_section == 0)
4371 {
4372 rdata_section = subseg_new (".rdata", 0);
4373 bfd_set_section_flags (stdoutput, rdata_section,
4374 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4375 | SEC_READONLY | SEC_DATA ));
4376
4377 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4378 }
4379 else
4380 {
4381 rdata_section = subseg_new (".rdata", 0);
4382 }
4383 ppc_set_current_section (rdata_section);
4384 }
4385
4386 /* pseudo-op: .ualong
4387 behaviour: much like .int, with the exception that no alignment is
4388 performed.
4389 FIXME: test the alignment statement
4390 errors: None
4391 warnings: None */
4392
4393 static void
4394 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
4395 {
4396 /* Try for long. */
4397 cons (4);
4398 }
4399
4400 /* pseudo-op: .znop <symbol name>
4401 behaviour: Issue a nop instruction
4402 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
4403 the supplied symbol name.
4404 errors: None
4405 warnings: Missing symbol name */
4406
4407 static void
4408 ppc_znop (int ignore ATTRIBUTE_UNUSED)
4409 {
4410 unsigned long insn;
4411 const struct powerpc_opcode *opcode;
4412 expressionS ex;
4413 char *f;
4414 symbolS *sym;
4415 char *symbol_name;
4416 char c;
4417 char *name;
4418 unsigned int exp;
4419 flagword flags;
4420 asection *sec;
4421
4422 /* Strip out the symbol name. */
4423 symbol_name = input_line_pointer;
4424 c = get_symbol_end ();
4425
4426 name = xmalloc (input_line_pointer - symbol_name + 1);
4427 strcpy (name, symbol_name);
4428
4429 sym = symbol_find_or_make (name);
4430
4431 *input_line_pointer = c;
4432
4433 SKIP_WHITESPACE ();
4434
4435 /* Look up the opcode in the hash table. */
4436 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4437
4438 /* Stick in the nop. */
4439 insn = opcode->opcode;
4440
4441 /* Write out the instruction. */
4442 f = frag_more (4);
4443 md_number_to_chars (f, insn, 4);
4444 fix_new (frag_now,
4445 f - frag_now->fr_literal,
4446 4,
4447 sym,
4448 0,
4449 0,
4450 BFD_RELOC_16_GOT_PCREL);
4451
4452 }
4453
4454 /* pseudo-op:
4455 behaviour:
4456 errors:
4457 warnings: */
4458
4459 static void
4460 ppc_pe_comm (int lcomm)
4461 {
4462 char *name;
4463 char c;
4464 char *p;
4465 offsetT temp;
4466 symbolS *symbolP;
4467 offsetT align;
4468
4469 name = input_line_pointer;
4470 c = get_symbol_end ();
4471
4472 /* just after name is now '\0'. */
4473 p = input_line_pointer;
4474 *p = c;
4475 SKIP_WHITESPACE ();
4476 if (*input_line_pointer != ',')
4477 {
4478 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4479 ignore_rest_of_line ();
4480 return;
4481 }
4482
4483 input_line_pointer++; /* skip ',' */
4484 if ((temp = get_absolute_expression ()) < 0)
4485 {
4486 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4487 ignore_rest_of_line ();
4488 return;
4489 }
4490
4491 if (! lcomm)
4492 {
4493 /* The third argument to .comm is the alignment. */
4494 if (*input_line_pointer != ',')
4495 align = 3;
4496 else
4497 {
4498 ++input_line_pointer;
4499 align = get_absolute_expression ();
4500 if (align <= 0)
4501 {
4502 as_warn (_("ignoring bad alignment"));
4503 align = 3;
4504 }
4505 }
4506 }
4507
4508 *p = 0;
4509 symbolP = symbol_find_or_make (name);
4510
4511 *p = c;
4512 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4513 {
4514 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4515 S_GET_NAME (symbolP));
4516 ignore_rest_of_line ();
4517 return;
4518 }
4519
4520 if (S_GET_VALUE (symbolP))
4521 {
4522 if (S_GET_VALUE (symbolP) != (valueT) temp)
4523 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4524 S_GET_NAME (symbolP),
4525 (long) S_GET_VALUE (symbolP),
4526 (long) temp);
4527 }
4528 else
4529 {
4530 S_SET_VALUE (symbolP, (valueT) temp);
4531 S_SET_EXTERNAL (symbolP);
4532 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
4533 }
4534
4535 demand_empty_rest_of_line ();
4536 }
4537
4538 /*
4539 * implement the .section pseudo op:
4540 * .section name {, "flags"}
4541 * ^ ^
4542 * | +--- optional flags: 'b' for bss
4543 * | 'i' for info
4544 * +-- section name 'l' for lib
4545 * 'n' for noload
4546 * 'o' for over
4547 * 'w' for data
4548 * 'd' (apparently m88k for data)
4549 * 'x' for text
4550 * But if the argument is not a quoted string, treat it as a
4551 * subsegment number.
4552 *
4553 * FIXME: this is a copy of the section processing from obj-coff.c, with
4554 * additions/changes for the moto-pas assembler support. There are three
4555 * categories:
4556 *
4557 * FIXME: I just noticed this. This doesn't work at all really. It it
4558 * setting bits that bfd probably neither understands or uses. The
4559 * correct approach (?) will have to incorporate extra fields attached
4560 * to the section to hold the system specific stuff. (krk)
4561 *
4562 * Section Contents:
4563 * 'a' - unknown - referred to in documentation, but no definition supplied
4564 * 'c' - section has code
4565 * 'd' - section has initialized data
4566 * 'u' - section has uninitialized data
4567 * 'i' - section contains directives (info)
4568 * 'n' - section can be discarded
4569 * 'R' - remove section at link time
4570 *
4571 * Section Protection:
4572 * 'r' - section is readable
4573 * 'w' - section is writeable
4574 * 'x' - section is executable
4575 * 's' - section is sharable
4576 *
4577 * Section Alignment:
4578 * '0' - align to byte boundary
4579 * '1' - align to halfword undary
4580 * '2' - align to word boundary
4581 * '3' - align to doubleword boundary
4582 * '4' - align to quadword boundary
4583 * '5' - align to 32 byte boundary
4584 * '6' - align to 64 byte boundary
4585 *
4586 */
4587
4588 void
4589 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
4590 {
4591 /* Strip out the section name. */
4592 char *section_name;
4593 char c;
4594 char *name;
4595 unsigned int exp;
4596 flagword flags;
4597 segT sec;
4598 int align;
4599
4600 section_name = input_line_pointer;
4601 c = get_symbol_end ();
4602
4603 name = xmalloc (input_line_pointer - section_name + 1);
4604 strcpy (name, section_name);
4605
4606 *input_line_pointer = c;
4607
4608 SKIP_WHITESPACE ();
4609
4610 exp = 0;
4611 flags = SEC_NO_FLAGS;
4612
4613 if (strcmp (name, ".idata$2") == 0)
4614 {
4615 align = 0;
4616 }
4617 else if (strcmp (name, ".idata$3") == 0)
4618 {
4619 align = 0;
4620 }
4621 else if (strcmp (name, ".idata$4") == 0)
4622 {
4623 align = 2;
4624 }
4625 else if (strcmp (name, ".idata$5") == 0)
4626 {
4627 align = 2;
4628 }
4629 else if (strcmp (name, ".idata$6") == 0)
4630 {
4631 align = 1;
4632 }
4633 else
4634 /* Default alignment to 16 byte boundary. */
4635 align = 4;
4636
4637 if (*input_line_pointer == ',')
4638 {
4639 ++input_line_pointer;
4640 SKIP_WHITESPACE ();
4641 if (*input_line_pointer != '"')
4642 exp = get_absolute_expression ();
4643 else
4644 {
4645 ++input_line_pointer;
4646 while (*input_line_pointer != '"'
4647 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4648 {
4649 switch (*input_line_pointer)
4650 {
4651 /* Section Contents */
4652 case 'a': /* unknown */
4653 as_bad (_("Unsupported section attribute -- 'a'"));
4654 break;
4655 case 'c': /* code section */
4656 flags |= SEC_CODE;
4657 break;
4658 case 'd': /* section has initialized data */
4659 flags |= SEC_DATA;
4660 break;
4661 case 'u': /* section has uninitialized data */
4662 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4663 in winnt.h */
4664 flags |= SEC_ROM;
4665 break;
4666 case 'i': /* section contains directives (info) */
4667 /* FIXME: This is IMAGE_SCN_LNK_INFO
4668 in winnt.h */
4669 flags |= SEC_HAS_CONTENTS;
4670 break;
4671 case 'n': /* section can be discarded */
4672 flags &=~ SEC_LOAD;
4673 break;
4674 case 'R': /* Remove section at link time */
4675 flags |= SEC_NEVER_LOAD;
4676 break;
4677 #if IFLICT_BRAIN_DAMAGE
4678 /* Section Protection */
4679 case 'r': /* section is readable */
4680 flags |= IMAGE_SCN_MEM_READ;
4681 break;
4682 case 'w': /* section is writeable */
4683 flags |= IMAGE_SCN_MEM_WRITE;
4684 break;
4685 case 'x': /* section is executable */
4686 flags |= IMAGE_SCN_MEM_EXECUTE;
4687 break;
4688 case 's': /* section is sharable */
4689 flags |= IMAGE_SCN_MEM_SHARED;
4690 break;
4691
4692 /* Section Alignment */
4693 case '0': /* align to byte boundary */
4694 flags |= IMAGE_SCN_ALIGN_1BYTES;
4695 align = 0;
4696 break;
4697 case '1': /* align to halfword boundary */
4698 flags |= IMAGE_SCN_ALIGN_2BYTES;
4699 align = 1;
4700 break;
4701 case '2': /* align to word boundary */
4702 flags |= IMAGE_SCN_ALIGN_4BYTES;
4703 align = 2;
4704 break;
4705 case '3': /* align to doubleword boundary */
4706 flags |= IMAGE_SCN_ALIGN_8BYTES;
4707 align = 3;
4708 break;
4709 case '4': /* align to quadword boundary */
4710 flags |= IMAGE_SCN_ALIGN_16BYTES;
4711 align = 4;
4712 break;
4713 case '5': /* align to 32 byte boundary */
4714 flags |= IMAGE_SCN_ALIGN_32BYTES;
4715 align = 5;
4716 break;
4717 case '6': /* align to 64 byte boundary */
4718 flags |= IMAGE_SCN_ALIGN_64BYTES;
4719 align = 6;
4720 break;
4721 #endif
4722 default:
4723 as_bad (_("unknown section attribute '%c'"),
4724 *input_line_pointer);
4725 break;
4726 }
4727 ++input_line_pointer;
4728 }
4729 if (*input_line_pointer == '"')
4730 ++input_line_pointer;
4731 }
4732 }
4733
4734 sec = subseg_new (name, (subsegT) exp);
4735
4736 ppc_set_current_section (sec);
4737
4738 if (flags != SEC_NO_FLAGS)
4739 {
4740 if (! bfd_set_section_flags (stdoutput, sec, flags))
4741 as_bad (_("error setting flags for \"%s\": %s"),
4742 bfd_section_name (stdoutput, sec),
4743 bfd_errmsg (bfd_get_error ()));
4744 }
4745
4746 bfd_set_section_alignment (stdoutput, sec, align);
4747 }
4748
4749 static void
4750 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
4751 {
4752 char *name;
4753 char endc;
4754 symbolS *ext_sym;
4755
4756 name = input_line_pointer;
4757 endc = get_symbol_end ();
4758
4759 ext_sym = symbol_find_or_make (name);
4760
4761 *input_line_pointer = endc;
4762
4763 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4764 SF_SET_FUNCTION (ext_sym);
4765 SF_SET_PROCESS (ext_sym);
4766 coff_add_linesym (ext_sym);
4767
4768 demand_empty_rest_of_line ();
4769 }
4770
4771 static void
4772 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
4773 {
4774 if (tocdata_section == 0)
4775 {
4776 tocdata_section = subseg_new (".tocd", 0);
4777 /* FIXME: section flags won't work. */
4778 bfd_set_section_flags (stdoutput, tocdata_section,
4779 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4780 | SEC_READONLY | SEC_DATA));
4781
4782 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4783 }
4784 else
4785 {
4786 rdata_section = subseg_new (".tocd", 0);
4787 }
4788
4789 ppc_set_current_section (tocdata_section);
4790
4791 demand_empty_rest_of_line ();
4792 }
4793
4794 /* Don't adjust TOC relocs to use the section symbol. */
4795
4796 int
4797 ppc_pe_fix_adjustable (fixS *fix)
4798 {
4799 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4800 }
4801
4802 #endif
4803 \f
4804 #ifdef OBJ_XCOFF
4805
4806 /* XCOFF specific symbol and file handling. */
4807
4808 /* Canonicalize the symbol name. We use the to force the suffix, if
4809 any, to use square brackets, and to be in upper case. */
4810
4811 char *
4812 ppc_canonicalize_symbol_name (char *name)
4813 {
4814 char *s;
4815
4816 if (ppc_stab_symbol)
4817 return name;
4818
4819 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4820 ;
4821 if (*s != '\0')
4822 {
4823 char brac;
4824
4825 if (*s == '[')
4826 brac = ']';
4827 else
4828 {
4829 *s = '[';
4830 brac = '}';
4831 }
4832
4833 for (s++; *s != '\0' && *s != brac; s++)
4834 *s = TOUPPER (*s);
4835
4836 if (*s == '\0' || s[1] != '\0')
4837 as_bad (_("bad symbol suffix"));
4838
4839 *s = ']';
4840 }
4841
4842 return name;
4843 }
4844
4845 /* Set the class of a symbol based on the suffix, if any. This is
4846 called whenever a new symbol is created. */
4847
4848 void
4849 ppc_symbol_new_hook (symbolS *sym)
4850 {
4851 struct ppc_tc_sy *tc;
4852 const char *s;
4853
4854 tc = symbol_get_tc (sym);
4855 tc->next = NULL;
4856 tc->output = 0;
4857 tc->class = -1;
4858 tc->real_name = NULL;
4859 tc->subseg = 0;
4860 tc->align = 0;
4861 tc->size = NULL;
4862 tc->within = NULL;
4863
4864 if (ppc_stab_symbol)
4865 return;
4866
4867 s = strchr (S_GET_NAME (sym), '[');
4868 if (s == (const char *) NULL)
4869 {
4870 /* There is no suffix. */
4871 return;
4872 }
4873
4874 ++s;
4875
4876 switch (s[0])
4877 {
4878 case 'B':
4879 if (strcmp (s, "BS]") == 0)
4880 tc->class = XMC_BS;
4881 break;
4882 case 'D':
4883 if (strcmp (s, "DB]") == 0)
4884 tc->class = XMC_DB;
4885 else if (strcmp (s, "DS]") == 0)
4886 tc->class = XMC_DS;
4887 break;
4888 case 'G':
4889 if (strcmp (s, "GL]") == 0)
4890 tc->class = XMC_GL;
4891 break;
4892 case 'P':
4893 if (strcmp (s, "PR]") == 0)
4894 tc->class = XMC_PR;
4895 break;
4896 case 'R':
4897 if (strcmp (s, "RO]") == 0)
4898 tc->class = XMC_RO;
4899 else if (strcmp (s, "RW]") == 0)
4900 tc->class = XMC_RW;
4901 break;
4902 case 'S':
4903 if (strcmp (s, "SV]") == 0)
4904 tc->class = XMC_SV;
4905 break;
4906 case 'T':
4907 if (strcmp (s, "TC]") == 0)
4908 tc->class = XMC_TC;
4909 else if (strcmp (s, "TI]") == 0)
4910 tc->class = XMC_TI;
4911 else if (strcmp (s, "TB]") == 0)
4912 tc->class = XMC_TB;
4913 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
4914 tc->class = XMC_TC0;
4915 break;
4916 case 'U':
4917 if (strcmp (s, "UA]") == 0)
4918 tc->class = XMC_UA;
4919 else if (strcmp (s, "UC]") == 0)
4920 tc->class = XMC_UC;
4921 break;
4922 case 'X':
4923 if (strcmp (s, "XO]") == 0)
4924 tc->class = XMC_XO;
4925 break;
4926 }
4927
4928 if (tc->class == -1)
4929 as_bad (_("Unrecognized symbol suffix"));
4930 }
4931
4932 /* Set the class of a label based on where it is defined. This
4933 handles symbols without suffixes. Also, move the symbol so that it
4934 follows the csect symbol. */
4935
4936 void
4937 ppc_frob_label (symbolS *sym)
4938 {
4939 if (ppc_current_csect != (symbolS *) NULL)
4940 {
4941 if (symbol_get_tc (sym)->class == -1)
4942 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
4943
4944 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4945 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4946 &symbol_rootP, &symbol_lastP);
4947 symbol_get_tc (ppc_current_csect)->within = sym;
4948 }
4949
4950 #ifdef OBJ_ELF
4951 dwarf2_emit_label (sym);
4952 #endif
4953 }
4954
4955 /* This variable is set by ppc_frob_symbol if any absolute symbols are
4956 seen. It tells ppc_adjust_symtab whether it needs to look through
4957 the symbols. */
4958
4959 static bfd_boolean ppc_saw_abs;
4960
4961 /* Change the name of a symbol just before writing it out. Set the
4962 real name if the .rename pseudo-op was used. Otherwise, remove any
4963 class suffix. Return 1 if the symbol should not be included in the
4964 symbol table. */
4965
4966 int
4967 ppc_frob_symbol (symbolS *sym)
4968 {
4969 static symbolS *ppc_last_function;
4970 static symbolS *set_end;
4971
4972 /* Discard symbols that should not be included in the output symbol
4973 table. */
4974 if (! symbol_used_in_reloc_p (sym)
4975 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
4976 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
4977 && ! symbol_get_tc (sym)->output
4978 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4979 return 1;
4980
4981 /* This one will disappear anyway. Don't make a csect sym for it. */
4982 if (sym == abs_section_sym)
4983 return 1;
4984
4985 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4986 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
4987 else
4988 {
4989 const char *name;
4990 const char *s;
4991
4992 name = S_GET_NAME (sym);
4993 s = strchr (name, '[');
4994 if (s != (char *) NULL)
4995 {
4996 unsigned int len;
4997 char *snew;
4998
4999 len = s - name;
5000 snew = xmalloc (len + 1);
5001 memcpy (snew, name, len);
5002 snew[len] = '\0';
5003
5004 S_SET_NAME (sym, snew);
5005 }
5006 }
5007
5008 if (set_end != (symbolS *) NULL)
5009 {
5010 SA_SET_SYM_ENDNDX (set_end, sym);
5011 set_end = NULL;
5012 }
5013
5014 if (SF_GET_FUNCTION (sym))
5015 {
5016 if (ppc_last_function != (symbolS *) NULL)
5017 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5018 ppc_last_function = sym;
5019 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
5020 {
5021 resolve_symbol_value (symbol_get_tc (sym)->size);
5022 SA_SET_SYM_FSIZE (sym,
5023 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
5024 }
5025 }
5026 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5027 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5028 {
5029 if (ppc_last_function == (symbolS *) NULL)
5030 as_bad (_(".ef with no preceding .function"));
5031 else
5032 {
5033 set_end = ppc_last_function;
5034 ppc_last_function = NULL;
5035
5036 /* We don't have a C_EFCN symbol, but we need to force the
5037 COFF backend to believe that it has seen one. */
5038 coff_last_function = NULL;
5039 }
5040 }
5041
5042 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5043 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5044 && S_GET_STORAGE_CLASS (sym) != C_FILE
5045 && S_GET_STORAGE_CLASS (sym) != C_FCN
5046 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5047 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5048 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5049 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5050 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5051 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5052 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5053
5054 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5055 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5056 {
5057 int i;
5058 union internal_auxent *a;
5059
5060 /* Create a csect aux. */
5061 i = S_GET_NUMBER_AUXILIARY (sym);
5062 S_SET_NUMBER_AUXILIARY (sym, i + 1);
5063 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5064 if (symbol_get_tc (sym)->class == XMC_TC0)
5065 {
5066 /* This is the TOC table. */
5067 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5068 a->x_csect.x_scnlen.l = 0;
5069 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5070 }
5071 else if (symbol_get_tc (sym)->subseg != 0)
5072 {
5073 /* This is a csect symbol. x_scnlen is the size of the
5074 csect. */
5075 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5076 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5077 S_GET_SEGMENT (sym))
5078 - S_GET_VALUE (sym));
5079 else
5080 {
5081 resolve_symbol_value (symbol_get_tc (sym)->next);
5082 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5083 - S_GET_VALUE (sym));
5084 }
5085 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5086 }
5087 else if (S_GET_SEGMENT (sym) == bss_section)
5088 {
5089 /* This is a common symbol. */
5090 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5091 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
5092 if (S_IS_EXTERNAL (sym))
5093 symbol_get_tc (sym)->class = XMC_RW;
5094 else
5095 symbol_get_tc (sym)->class = XMC_BS;
5096 }
5097 else if (S_GET_SEGMENT (sym) == absolute_section)
5098 {
5099 /* This is an absolute symbol. The csect will be created by
5100 ppc_adjust_symtab. */
5101 ppc_saw_abs = TRUE;
5102 a->x_csect.x_smtyp = XTY_LD;
5103 if (symbol_get_tc (sym)->class == -1)
5104 symbol_get_tc (sym)->class = XMC_XO;
5105 }
5106 else if (! S_IS_DEFINED (sym))
5107 {
5108 /* This is an external symbol. */
5109 a->x_csect.x_scnlen.l = 0;
5110 a->x_csect.x_smtyp = XTY_ER;
5111 }
5112 else if (symbol_get_tc (sym)->class == XMC_TC)
5113 {
5114 symbolS *next;
5115
5116 /* This is a TOC definition. x_scnlen is the size of the
5117 TOC entry. */
5118 next = symbol_next (sym);
5119 while (symbol_get_tc (next)->class == XMC_TC0)
5120 next = symbol_next (next);
5121 if (next == (symbolS *) NULL
5122 || symbol_get_tc (next)->class != XMC_TC)
5123 {
5124 if (ppc_after_toc_frag == (fragS *) NULL)
5125 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5126 data_section)
5127 - S_GET_VALUE (sym));
5128 else
5129 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5130 - S_GET_VALUE (sym));
5131 }
5132 else
5133 {
5134 resolve_symbol_value (next);
5135 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5136 - S_GET_VALUE (sym));
5137 }
5138 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5139 }
5140 else
5141 {
5142 symbolS *csect;
5143
5144 /* This is a normal symbol definition. x_scnlen is the
5145 symbol index of the containing csect. */
5146 if (S_GET_SEGMENT (sym) == text_section)
5147 csect = ppc_text_csects;
5148 else if (S_GET_SEGMENT (sym) == data_section)
5149 csect = ppc_data_csects;
5150 else
5151 abort ();
5152
5153 /* Skip the initial dummy symbol. */
5154 csect = symbol_get_tc (csect)->next;
5155
5156 if (csect == (symbolS *) NULL)
5157 {
5158 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5159 a->x_csect.x_scnlen.l = 0;
5160 }
5161 else
5162 {
5163 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
5164 {
5165 resolve_symbol_value (symbol_get_tc (csect)->next);
5166 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5167 > S_GET_VALUE (sym))
5168 break;
5169 csect = symbol_get_tc (csect)->next;
5170 }
5171
5172 a->x_csect.x_scnlen.p =
5173 coffsymbol (symbol_get_bfdsym (csect))->native;
5174 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5175 1;
5176 }
5177 a->x_csect.x_smtyp = XTY_LD;
5178 }
5179
5180 a->x_csect.x_parmhash = 0;
5181 a->x_csect.x_snhash = 0;
5182 if (symbol_get_tc (sym)->class == -1)
5183 a->x_csect.x_smclas = XMC_PR;
5184 else
5185 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
5186 a->x_csect.x_stab = 0;
5187 a->x_csect.x_snstab = 0;
5188
5189 /* Don't let the COFF backend resort these symbols. */
5190 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
5191 }
5192 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5193 {
5194 /* We want the value to be the symbol index of the referenced
5195 csect symbol. BFD will do that for us if we set the right
5196 flags. */
5197 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5198 combined_entry_type *c = coffsymbol (bsym)->native;
5199
5200 S_SET_VALUE (sym, (valueT) (size_t) c);
5201 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
5202 }
5203 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5204 {
5205 symbolS *block;
5206 symbolS *csect;
5207
5208 /* The value is the offset from the enclosing csect. */
5209 block = symbol_get_tc (sym)->within;
5210 csect = symbol_get_tc (block)->within;
5211 resolve_symbol_value (csect);
5212 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5213 }
5214 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5215 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5216 {
5217 /* We want the value to be a file offset into the line numbers.
5218 BFD will do that for us if we set the right flags. We have
5219 already set the value correctly. */
5220 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
5221 }
5222
5223 return 0;
5224 }
5225
5226 /* Adjust the symbol table. This creates csect symbols for all
5227 absolute symbols. */
5228
5229 void
5230 ppc_adjust_symtab (void)
5231 {
5232 symbolS *sym;
5233
5234 if (! ppc_saw_abs)
5235 return;
5236
5237 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5238 {
5239 symbolS *csect;
5240 int i;
5241 union internal_auxent *a;
5242
5243 if (S_GET_SEGMENT (sym) != absolute_section)
5244 continue;
5245
5246 csect = symbol_create (".abs[XO]", absolute_section,
5247 S_GET_VALUE (sym), &zero_address_frag);
5248 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
5249 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5250 i = S_GET_NUMBER_AUXILIARY (csect);
5251 S_SET_NUMBER_AUXILIARY (csect, i + 1);
5252 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
5253 a->x_csect.x_scnlen.l = 0;
5254 a->x_csect.x_smtyp = XTY_SD;
5255 a->x_csect.x_parmhash = 0;
5256 a->x_csect.x_snhash = 0;
5257 a->x_csect.x_smclas = XMC_XO;
5258 a->x_csect.x_stab = 0;
5259 a->x_csect.x_snstab = 0;
5260
5261 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5262
5263 i = S_GET_NUMBER_AUXILIARY (sym);
5264 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5265 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5266 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
5267 }
5268
5269 ppc_saw_abs = FALSE;
5270 }
5271
5272 /* Set the VMA for a section. This is called on all the sections in
5273 turn. */
5274
5275 void
5276 ppc_frob_section (asection *sec)
5277 {
5278 static bfd_vma vma = 0;
5279
5280 vma = md_section_align (sec, vma);
5281 bfd_set_section_vma (stdoutput, sec, vma);
5282 vma += bfd_section_size (stdoutput, sec);
5283 }
5284
5285 #endif /* OBJ_XCOFF */
5286 \f
5287 char *
5288 md_atof (int type, char *litp, int *sizep)
5289 {
5290 return ieee_md_atof (type, litp, sizep, target_big_endian);
5291 }
5292
5293 /* Write a value out to the object file, using the appropriate
5294 endianness. */
5295
5296 void
5297 md_number_to_chars (char *buf, valueT val, int n)
5298 {
5299 if (target_big_endian)
5300 number_to_chars_bigendian (buf, val, n);
5301 else
5302 number_to_chars_littleendian (buf, val, n);
5303 }
5304
5305 /* Align a section (I don't know why this is machine dependent). */
5306
5307 valueT
5308 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
5309 {
5310 #ifdef OBJ_ELF
5311 return addr;
5312 #else
5313 int align = bfd_get_section_alignment (stdoutput, seg);
5314
5315 return ((addr + (1 << align) - 1) & (-1 << align));
5316 #endif
5317 }
5318
5319 /* We don't have any form of relaxing. */
5320
5321 int
5322 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5323 asection *seg ATTRIBUTE_UNUSED)
5324 {
5325 abort ();
5326 return 0;
5327 }
5328
5329 /* Convert a machine dependent frag. We never generate these. */
5330
5331 void
5332 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5333 asection *sec ATTRIBUTE_UNUSED,
5334 fragS *fragp ATTRIBUTE_UNUSED)
5335 {
5336 abort ();
5337 }
5338
5339 /* We have no need to default values of symbols. */
5340
5341 symbolS *
5342 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
5343 {
5344 return 0;
5345 }
5346 \f
5347 /* Functions concerning relocs. */
5348
5349 /* The location from which a PC relative jump should be calculated,
5350 given a PC relative reloc. */
5351
5352 long
5353 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
5354 {
5355 return fixp->fx_frag->fr_address + fixp->fx_where;
5356 }
5357
5358 #ifdef OBJ_XCOFF
5359
5360 /* This is called to see whether a fixup should be adjusted to use a
5361 section symbol. We take the opportunity to change a fixup against
5362 a symbol in the TOC subsegment into a reloc against the
5363 corresponding .tc symbol. */
5364
5365 int
5366 ppc_fix_adjustable (fixS *fix)
5367 {
5368 valueT val = resolve_symbol_value (fix->fx_addsy);
5369 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5370 TC_SYMFIELD_TYPE *tc;
5371
5372 if (symseg == absolute_section)
5373 return 0;
5374
5375 if (ppc_toc_csect != (symbolS *) NULL
5376 && fix->fx_addsy != ppc_toc_csect
5377 && symseg == data_section
5378 && val >= ppc_toc_frag->fr_address
5379 && (ppc_after_toc_frag == (fragS *) NULL
5380 || val < ppc_after_toc_frag->fr_address))
5381 {
5382 symbolS *sy;
5383
5384 for (sy = symbol_next (ppc_toc_csect);
5385 sy != (symbolS *) NULL;
5386 sy = symbol_next (sy))
5387 {
5388 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5389
5390 if (sy_tc->class == XMC_TC0)
5391 continue;
5392 if (sy_tc->class != XMC_TC)
5393 break;
5394 if (val == resolve_symbol_value (sy))
5395 {
5396 fix->fx_addsy = sy;
5397 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5398 return 0;
5399 }
5400 }
5401
5402 as_bad_where (fix->fx_file, fix->fx_line,
5403 _("symbol in .toc does not match any .tc"));
5404 }
5405
5406 /* Possibly adjust the reloc to be against the csect. */
5407 tc = symbol_get_tc (fix->fx_addsy);
5408 if (tc->subseg == 0
5409 && tc->class != XMC_TC0
5410 && tc->class != XMC_TC
5411 && symseg != bss_section
5412 /* Don't adjust if this is a reloc in the toc section. */
5413 && (symseg != data_section
5414 || ppc_toc_csect == NULL
5415 || val < ppc_toc_frag->fr_address
5416 || (ppc_after_toc_frag != NULL
5417 && val >= ppc_after_toc_frag->fr_address)))
5418 {
5419 symbolS *csect;
5420 symbolS *next_csect;
5421
5422 if (symseg == text_section)
5423 csect = ppc_text_csects;
5424 else if (symseg == data_section)
5425 csect = ppc_data_csects;
5426 else
5427 abort ();
5428
5429 /* Skip the initial dummy symbol. */
5430 csect = symbol_get_tc (csect)->next;
5431
5432 if (csect != (symbolS *) NULL)
5433 {
5434 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5435 && (symbol_get_frag (next_csect)->fr_address <= val))
5436 {
5437 /* If the csect address equals the symbol value, then we
5438 have to look through the full symbol table to see
5439 whether this is the csect we want. Note that we will
5440 only get here if the csect has zero length. */
5441 if (symbol_get_frag (csect)->fr_address == val
5442 && S_GET_VALUE (csect) == val)
5443 {
5444 symbolS *scan;
5445
5446 for (scan = symbol_next (csect);
5447 scan != NULL;
5448 scan = symbol_next (scan))
5449 {
5450 if (symbol_get_tc (scan)->subseg != 0)
5451 break;
5452 if (scan == fix->fx_addsy)
5453 break;
5454 }
5455
5456 /* If we found the symbol before the next csect
5457 symbol, then this is the csect we want. */
5458 if (scan == fix->fx_addsy)
5459 break;
5460 }
5461
5462 csect = next_csect;
5463 }
5464
5465 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
5466 fix->fx_addsy = csect;
5467 }
5468 return 0;
5469 }
5470
5471 /* Adjust a reloc against a .lcomm symbol to be against the base
5472 .lcomm. */
5473 if (symseg == bss_section
5474 && ! S_IS_EXTERNAL (fix->fx_addsy))
5475 {
5476 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5477
5478 fix->fx_offset += val - resolve_symbol_value (sy);
5479 fix->fx_addsy = sy;
5480 }
5481
5482 return 0;
5483 }
5484
5485 /* A reloc from one csect to another must be kept. The assembler
5486 will, of course, keep relocs between sections, and it will keep
5487 absolute relocs, but we need to force it to keep PC relative relocs
5488 between two csects in the same section. */
5489
5490 int
5491 ppc_force_relocation (fixS *fix)
5492 {
5493 /* At this point fix->fx_addsy should already have been converted to
5494 a csect symbol. If the csect does not include the fragment, then
5495 we need to force the relocation. */
5496 if (fix->fx_pcrel
5497 && fix->fx_addsy != NULL
5498 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5499 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5500 > fix->fx_frag->fr_address)
5501 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5502 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
5503 <= fix->fx_frag->fr_address))))
5504 return 1;
5505
5506 return generic_force_reloc (fix);
5507 }
5508
5509 #endif /* OBJ_XCOFF */
5510
5511 #ifdef OBJ_ELF
5512 /* If this function returns non-zero, it guarantees that a relocation
5513 will be emitted for a fixup. */
5514
5515 int
5516 ppc_force_relocation (fixS *fix)
5517 {
5518 /* Branch prediction relocations must force a relocation, as must
5519 the vtable description relocs. */
5520 switch (fix->fx_r_type)
5521 {
5522 case BFD_RELOC_PPC_B16_BRTAKEN:
5523 case BFD_RELOC_PPC_B16_BRNTAKEN:
5524 case BFD_RELOC_PPC_BA16_BRTAKEN:
5525 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5526 case BFD_RELOC_24_PLT_PCREL:
5527 case BFD_RELOC_PPC64_TOC:
5528 return 1;
5529 default:
5530 break;
5531 }
5532
5533 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5534 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5535 return 1;
5536
5537 return generic_force_reloc (fix);
5538 }
5539
5540 int
5541 ppc_fix_adjustable (fixS *fix)
5542 {
5543 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5544 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5545 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5546 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5547 && fix->fx_r_type != BFD_RELOC_GPREL16
5548 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5549 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
5550 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
5551 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
5552 }
5553 #endif
5554
5555 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5556 rs_align_code frag. */
5557
5558 void
5559 ppc_handle_align (struct frag *fragP)
5560 {
5561 valueT count = (fragP->fr_next->fr_address
5562 - (fragP->fr_address + fragP->fr_fix));
5563
5564 if (count != 0 && (count & 3) == 0)
5565 {
5566 char *dest = fragP->fr_literal + fragP->fr_fix;
5567
5568 fragP->fr_var = 4;
5569 md_number_to_chars (dest, 0x60000000, 4);
5570
5571 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5572 {
5573 /* For power6, we want the last nop to be a group terminating
5574 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5575 immediately after this one, with its address set to the last
5576 nop location. This will automatically reduce the number of
5577 nops in the current frag by one. */
5578 if (count > 4)
5579 {
5580 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5581
5582 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5583 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5584 group_nop->fr_fix = 0;
5585 group_nop->fr_offset = 1;
5586 group_nop->fr_type = rs_fill;
5587 fragP->fr_next = group_nop;
5588 dest = group_nop->fr_literal;
5589 }
5590
5591 md_number_to_chars (dest, 0x60210000, 4);
5592 }
5593 }
5594 }
5595
5596 /* Apply a fixup to the object code. This is called for all the
5597 fixups we generated by the call to fix_new_exp, above. In the call
5598 above we used a reloc code which was the largest legal reloc code
5599 plus the operand index. Here we undo that to recover the operand
5600 index. At this point all symbol values should be fully resolved,
5601 and we attempt to completely resolve the reloc. If we can not do
5602 that, we determine the correct reloc code and put it back in the
5603 fixup. */
5604
5605 void
5606 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
5607 {
5608 valueT value = * valP;
5609
5610 #ifdef OBJ_ELF
5611 if (fixP->fx_addsy != NULL)
5612 {
5613 /* Hack around bfd_install_relocation brain damage. */
5614 if (fixP->fx_pcrel)
5615 value += fixP->fx_frag->fr_address + fixP->fx_where;
5616 }
5617 else
5618 fixP->fx_done = 1;
5619 #else
5620 /* FIXME FIXME FIXME: The value we are passed in *valP includes
5621 the symbol values. If we are doing this relocation the code in
5622 write.c is going to call bfd_install_relocation, which is also
5623 going to use the symbol value. That means that if the reloc is
5624 fully resolved we want to use *valP since bfd_install_relocation is
5625 not being used.
5626 However, if the reloc is not fully resolved we do not want to use
5627 *valP, and must use fx_offset instead. However, if the reloc
5628 is PC relative, we do want to use *valP since it includes the
5629 result of md_pcrel_from. This is confusing. */
5630 if (fixP->fx_addsy == (symbolS *) NULL)
5631 fixP->fx_done = 1;
5632
5633 else if (fixP->fx_pcrel)
5634 ;
5635
5636 else
5637 value = fixP->fx_offset;
5638 #endif
5639
5640 if (fixP->fx_subsy != (symbolS *) NULL)
5641 {
5642 /* We can't actually support subtracting a symbol. */
5643 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
5644 }
5645
5646 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
5647 {
5648 int opindex;
5649 const struct powerpc_operand *operand;
5650 char *where;
5651 unsigned long insn;
5652
5653 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
5654
5655 operand = &powerpc_operands[opindex];
5656
5657 #ifdef OBJ_XCOFF
5658 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5659 does not generate a reloc. It uses the offset of `sym' within its
5660 csect. Other usages, such as `.long sym', generate relocs. This
5661 is the documented behaviour of non-TOC symbols. */
5662 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5663 && (operand->bitm & 0xfff0) == 0xfff0
5664 && operand->shift == 0
5665 && (operand->insert == NULL || ppc_obj64)
5666 && fixP->fx_addsy != NULL
5667 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5668 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5669 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5670 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
5671 {
5672 value = fixP->fx_offset;
5673 fixP->fx_done = 1;
5674 }
5675 #endif
5676
5677 /* Fetch the instruction, insert the fully resolved operand
5678 value, and stuff the instruction back again. */
5679 where = fixP->fx_frag->fr_literal + fixP->fx_where;
5680 if (target_big_endian)
5681 insn = bfd_getb32 ((unsigned char *) where);
5682 else
5683 insn = bfd_getl32 ((unsigned char *) where);
5684 insn = ppc_insert_operand (insn, operand, (offsetT) value,
5685 fixP->tc_fix_data.ppc_cpu,
5686 fixP->fx_file, fixP->fx_line);
5687 if (target_big_endian)
5688 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5689 else
5690 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5691
5692 if (fixP->fx_done)
5693 /* Nothing else to do here. */
5694 return;
5695
5696 assert (fixP->fx_addsy != NULL);
5697
5698 /* Determine a BFD reloc value based on the operand information.
5699 We are only prepared to turn a few of the operands into
5700 relocs. */
5701 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5702 && operand->bitm == 0x3fffffc
5703 && operand->shift == 0)
5704 fixP->fx_r_type = BFD_RELOC_PPC_B26;
5705 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5706 && operand->bitm == 0xfffc
5707 && operand->shift == 0)
5708 {
5709 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5710 #ifdef OBJ_XCOFF
5711 fixP->fx_size = 2;
5712 if (target_big_endian)
5713 fixP->fx_where += 2;
5714 #endif
5715 }
5716 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5717 && operand->bitm == 0x3fffffc
5718 && operand->shift == 0)
5719 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
5720 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5721 && operand->bitm == 0xfffc
5722 && operand->shift == 0)
5723 {
5724 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5725 #ifdef OBJ_XCOFF
5726 fixP->fx_size = 2;
5727 if (target_big_endian)
5728 fixP->fx_where += 2;
5729 #endif
5730 }
5731 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5732 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5733 && (operand->bitm & 0xfff0) == 0xfff0
5734 && operand->shift == 0)
5735 {
5736 if (ppc_is_toc_sym (fixP->fx_addsy))
5737 {
5738 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
5739 #ifdef OBJ_ELF
5740 if (ppc_obj64
5741 && (operand->flags & PPC_OPERAND_DS) != 0)
5742 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5743 #endif
5744 }
5745 else
5746 {
5747 fixP->fx_r_type = BFD_RELOC_16;
5748 #ifdef OBJ_ELF
5749 if (ppc_obj64
5750 && (operand->flags & PPC_OPERAND_DS) != 0)
5751 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
5752 #endif
5753 }
5754 fixP->fx_size = 2;
5755 if (target_big_endian)
5756 fixP->fx_where += 2;
5757 }
5758 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5759 else
5760 {
5761 char *sfile;
5762 unsigned int sline;
5763
5764 /* Use expr_symbol_where to see if this is an expression
5765 symbol. */
5766 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5767 as_bad_where (fixP->fx_file, fixP->fx_line,
5768 _("unresolved expression that must be resolved"));
5769 else
5770 as_bad_where (fixP->fx_file, fixP->fx_line,
5771 _("unsupported relocation against %s"),
5772 S_GET_NAME (fixP->fx_addsy));
5773 fixP->fx_done = 1;
5774 return;
5775 }
5776 }
5777 else
5778 {
5779 #ifdef OBJ_ELF
5780 ppc_elf_validate_fix (fixP, seg);
5781 #endif
5782 switch (fixP->fx_r_type)
5783 {
5784 case BFD_RELOC_CTOR:
5785 if (ppc_obj64)
5786 goto ctor64;
5787 /* fall through */
5788
5789 case BFD_RELOC_32:
5790 if (fixP->fx_pcrel)
5791 fixP->fx_r_type = BFD_RELOC_32_PCREL;
5792 /* fall through */
5793
5794 case BFD_RELOC_RVA:
5795 case BFD_RELOC_32_PCREL:
5796 case BFD_RELOC_PPC_EMB_NADDR32:
5797 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5798 value, 4);
5799 break;
5800
5801 case BFD_RELOC_64:
5802 ctor64:
5803 if (fixP->fx_pcrel)
5804 fixP->fx_r_type = BFD_RELOC_64_PCREL;
5805 /* fall through */
5806
5807 case BFD_RELOC_64_PCREL:
5808 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5809 value, 8);
5810 break;
5811
5812 case BFD_RELOC_GPREL16:
5813 case BFD_RELOC_16_GOT_PCREL:
5814 case BFD_RELOC_16_GOTOFF:
5815 case BFD_RELOC_LO16_GOTOFF:
5816 case BFD_RELOC_HI16_GOTOFF:
5817 case BFD_RELOC_HI16_S_GOTOFF:
5818 case BFD_RELOC_16_BASEREL:
5819 case BFD_RELOC_LO16_BASEREL:
5820 case BFD_RELOC_HI16_BASEREL:
5821 case BFD_RELOC_HI16_S_BASEREL:
5822 case BFD_RELOC_PPC_EMB_NADDR16:
5823 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5824 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5825 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5826 case BFD_RELOC_PPC_EMB_SDAI16:
5827 case BFD_RELOC_PPC_EMB_SDA2REL:
5828 case BFD_RELOC_PPC_EMB_SDA2I16:
5829 case BFD_RELOC_PPC_EMB_RELSEC16:
5830 case BFD_RELOC_PPC_EMB_RELST_LO:
5831 case BFD_RELOC_PPC_EMB_RELST_HI:
5832 case BFD_RELOC_PPC_EMB_RELST_HA:
5833 case BFD_RELOC_PPC_EMB_RELSDA:
5834 case BFD_RELOC_PPC_TOC16:
5835 #ifdef OBJ_ELF
5836 case BFD_RELOC_PPC64_TOC16_LO:
5837 case BFD_RELOC_PPC64_TOC16_HI:
5838 case BFD_RELOC_PPC64_TOC16_HA:
5839 #endif
5840 if (fixP->fx_pcrel)
5841 {
5842 if (fixP->fx_addsy != NULL)
5843 as_bad_where (fixP->fx_file, fixP->fx_line,
5844 _("cannot emit PC relative %s relocation against %s"),
5845 bfd_get_reloc_code_name (fixP->fx_r_type),
5846 S_GET_NAME (fixP->fx_addsy));
5847 else
5848 as_bad_where (fixP->fx_file, fixP->fx_line,
5849 _("cannot emit PC relative %s relocation"),
5850 bfd_get_reloc_code_name (fixP->fx_r_type));
5851 }
5852
5853 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5854 value, 2);
5855 break;
5856
5857 case BFD_RELOC_16:
5858 if (fixP->fx_pcrel)
5859 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5860 /* fall through */
5861
5862 case BFD_RELOC_16_PCREL:
5863 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5864 value, 2);
5865 break;
5866
5867 case BFD_RELOC_LO16:
5868 if (fixP->fx_pcrel)
5869 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5870 /* fall through */
5871
5872 case BFD_RELOC_LO16_PCREL:
5873 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5874 value, 2);
5875 break;
5876
5877 /* This case happens when you write, for example,
5878 lis %r3,(L1-L2)@ha
5879 where L1 and L2 are defined later. */
5880 case BFD_RELOC_HI16:
5881 if (fixP->fx_pcrel)
5882 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5883 /* fall through */
5884
5885 case BFD_RELOC_HI16_PCREL:
5886 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5887 PPC_HI (value), 2);
5888 break;
5889
5890 case BFD_RELOC_HI16_S:
5891 if (fixP->fx_pcrel)
5892 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5893 /* fall through */
5894
5895 case BFD_RELOC_HI16_S_PCREL:
5896 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5897 PPC_HA (value), 2);
5898 break;
5899
5900 #ifdef OBJ_ELF
5901 case BFD_RELOC_PPC64_HIGHER:
5902 if (fixP->fx_pcrel)
5903 abort ();
5904 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5905 PPC_HIGHER (value), 2);
5906 break;
5907
5908 case BFD_RELOC_PPC64_HIGHER_S:
5909 if (fixP->fx_pcrel)
5910 abort ();
5911 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5912 PPC_HIGHERA (value), 2);
5913 break;
5914
5915 case BFD_RELOC_PPC64_HIGHEST:
5916 if (fixP->fx_pcrel)
5917 abort ();
5918 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5919 PPC_HIGHEST (value), 2);
5920 break;
5921
5922 case BFD_RELOC_PPC64_HIGHEST_S:
5923 if (fixP->fx_pcrel)
5924 abort ();
5925 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5926 PPC_HIGHESTA (value), 2);
5927 break;
5928
5929 case BFD_RELOC_PPC64_ADDR16_DS:
5930 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5931 case BFD_RELOC_PPC64_GOT16_DS:
5932 case BFD_RELOC_PPC64_GOT16_LO_DS:
5933 case BFD_RELOC_PPC64_PLT16_LO_DS:
5934 case BFD_RELOC_PPC64_SECTOFF_DS:
5935 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5936 case BFD_RELOC_PPC64_TOC16_DS:
5937 case BFD_RELOC_PPC64_TOC16_LO_DS:
5938 case BFD_RELOC_PPC64_PLTGOT16_DS:
5939 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
5940 if (fixP->fx_pcrel)
5941 abort ();
5942 {
5943 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
5944 unsigned long val, mask;
5945
5946 if (target_big_endian)
5947 val = bfd_getb32 (where - 2);
5948 else
5949 val = bfd_getl32 (where);
5950 mask = 0xfffc;
5951 /* lq insns reserve the four lsbs. */
5952 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
5953 && (val & (0x3f << 26)) == (56u << 26))
5954 mask = 0xfff0;
5955 val |= value & mask;
5956 if (target_big_endian)
5957 bfd_putb16 ((bfd_vma) val, where);
5958 else
5959 bfd_putl16 ((bfd_vma) val, where);
5960 }
5961 break;
5962
5963 case BFD_RELOC_PPC_B16_BRTAKEN:
5964 case BFD_RELOC_PPC_B16_BRNTAKEN:
5965 case BFD_RELOC_PPC_BA16_BRTAKEN:
5966 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5967 break;
5968
5969 case BFD_RELOC_PPC_TLS:
5970 break;
5971
5972 case BFD_RELOC_PPC_DTPMOD:
5973 case BFD_RELOC_PPC_TPREL16:
5974 case BFD_RELOC_PPC_TPREL16_LO:
5975 case BFD_RELOC_PPC_TPREL16_HI:
5976 case BFD_RELOC_PPC_TPREL16_HA:
5977 case BFD_RELOC_PPC_TPREL:
5978 case BFD_RELOC_PPC_DTPREL16:
5979 case BFD_RELOC_PPC_DTPREL16_LO:
5980 case BFD_RELOC_PPC_DTPREL16_HI:
5981 case BFD_RELOC_PPC_DTPREL16_HA:
5982 case BFD_RELOC_PPC_DTPREL:
5983 case BFD_RELOC_PPC_GOT_TLSGD16:
5984 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5985 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5986 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5987 case BFD_RELOC_PPC_GOT_TLSLD16:
5988 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5989 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5990 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5991 case BFD_RELOC_PPC_GOT_TPREL16:
5992 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5993 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5994 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5995 case BFD_RELOC_PPC_GOT_DTPREL16:
5996 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5997 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5998 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5999 case BFD_RELOC_PPC64_TPREL16_DS:
6000 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6001 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6002 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6003 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6004 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6005 case BFD_RELOC_PPC64_DTPREL16_DS:
6006 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6007 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6008 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6009 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6010 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6011 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6012 break;
6013 #endif
6014 /* Because SDA21 modifies the register field, the size is set to 4
6015 bytes, rather than 2, so offset it here appropriately. */
6016 case BFD_RELOC_PPC_EMB_SDA21:
6017 if (fixP->fx_pcrel)
6018 abort ();
6019
6020 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
6021 + ((target_big_endian) ? 2 : 0),
6022 value, 2);
6023 break;
6024
6025 case BFD_RELOC_8:
6026 if (fixP->fx_pcrel)
6027 {
6028 /* This can occur if there is a bug in the input assembler, eg:
6029 ".byte <undefined_symbol> - ." */
6030 if (fixP->fx_addsy)
6031 as_bad (_("Unable to handle reference to symbol %s"),
6032 S_GET_NAME (fixP->fx_addsy));
6033 else
6034 as_bad (_("Unable to resolve expression"));
6035 fixP->fx_done = 1;
6036 }
6037 else
6038 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6039 value, 1);
6040 break;
6041
6042 case BFD_RELOC_24_PLT_PCREL:
6043 case BFD_RELOC_PPC_LOCAL24PC:
6044 if (!fixP->fx_pcrel && !fixP->fx_done)
6045 abort ();
6046
6047 if (fixP->fx_done)
6048 {
6049 char *where;
6050 unsigned long insn;
6051
6052 /* Fetch the instruction, insert the fully resolved operand
6053 value, and stuff the instruction back again. */
6054 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6055 if (target_big_endian)
6056 insn = bfd_getb32 ((unsigned char *) where);
6057 else
6058 insn = bfd_getl32 ((unsigned char *) where);
6059 if ((value & 3) != 0)
6060 as_bad_where (fixP->fx_file, fixP->fx_line,
6061 _("must branch to an address a multiple of 4"));
6062 if ((offsetT) value < -0x40000000
6063 || (offsetT) value >= 0x40000000)
6064 as_bad_where (fixP->fx_file, fixP->fx_line,
6065 _("@local or @plt branch destination is too far away, %ld bytes"),
6066 (long) value);
6067 insn = insn | (value & 0x03fffffc);
6068 if (target_big_endian)
6069 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6070 else
6071 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6072 }
6073 break;
6074
6075 case BFD_RELOC_VTABLE_INHERIT:
6076 fixP->fx_done = 0;
6077 if (fixP->fx_addsy
6078 && !S_IS_DEFINED (fixP->fx_addsy)
6079 && !S_IS_WEAK (fixP->fx_addsy))
6080 S_SET_WEAK (fixP->fx_addsy);
6081 break;
6082
6083 case BFD_RELOC_VTABLE_ENTRY:
6084 fixP->fx_done = 0;
6085 break;
6086
6087 #ifdef OBJ_ELF
6088 /* Generated by reference to `sym@tocbase'. The sym is
6089 ignored by the linker. */
6090 case BFD_RELOC_PPC64_TOC:
6091 fixP->fx_done = 0;
6092 break;
6093 #endif
6094 default:
6095 fprintf (stderr,
6096 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
6097 fflush (stderr);
6098 abort ();
6099 }
6100 }
6101
6102 #ifdef OBJ_ELF
6103 fixP->fx_addnumber = value;
6104
6105 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6106 from the section contents. If we are going to be emitting a reloc
6107 then the section contents are immaterial, so don't warn if they
6108 happen to overflow. Leave such warnings to ld. */
6109 if (!fixP->fx_done)
6110 fixP->fx_no_overflow = 1;
6111 #else
6112 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6113 fixP->fx_addnumber = 0;
6114 else
6115 {
6116 #ifdef TE_PE
6117 fixP->fx_addnumber = 0;
6118 #else
6119 /* We want to use the offset within the toc, not the actual VMA
6120 of the symbol. */
6121 fixP->fx_addnumber =
6122 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6123 - S_GET_VALUE (ppc_toc_csect);
6124 #endif
6125 }
6126 #endif
6127 }
6128
6129 /* Generate a reloc for a fixup. */
6130
6131 arelent *
6132 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
6133 {
6134 arelent *reloc;
6135
6136 reloc = (arelent *) xmalloc (sizeof (arelent));
6137
6138 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6139 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
6140 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6141 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6142 if (reloc->howto == (reloc_howto_type *) NULL)
6143 {
6144 as_bad_where (fixp->fx_file, fixp->fx_line,
6145 _("reloc %d not supported by object file format"),
6146 (int) fixp->fx_r_type);
6147 return NULL;
6148 }
6149 reloc->addend = fixp->fx_addnumber;
6150
6151 return reloc;
6152 }
6153
6154 void
6155 ppc_cfi_frame_initial_instructions (void)
6156 {
6157 cfi_add_CFA_def_cfa (1, 0);
6158 }
6159
6160 int
6161 tc_ppc_regname_to_dw2regnum (char *regname)
6162 {
6163 unsigned int regnum = -1;
6164 unsigned int i;
6165 const char *p;
6166 char *q;
6167 static struct { char *name; int dw2regnum; } regnames[] =
6168 {
6169 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6170 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
6171 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
6172 { "spe_acc", 111 }, { "spefscr", 112 }
6173 };
6174
6175 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6176 if (strcmp (regnames[i].name, regname) == 0)
6177 return regnames[i].dw2regnum;
6178
6179 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6180 {
6181 p = regname + 1 + (regname[1] == '.');
6182 regnum = strtoul (p, &q, 10);
6183 if (p == q || *q || regnum >= 32)
6184 return -1;
6185 if (regname[0] == 'f')
6186 regnum += 32;
6187 else if (regname[0] == 'v')
6188 regnum += 77;
6189 }
6190 else if (regname[0] == 'c' && regname[1] == 'r')
6191 {
6192 p = regname + 2 + (regname[2] == '.');
6193 if (p[0] < '0' || p[0] > '7' || p[1])
6194 return -1;
6195 regnum = p[0] - '0' + 68;
6196 }
6197 return regnum;
6198 }
GDB Binutils - Deliverables
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