1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2019 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian
;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian
= 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p
= TARGET_REG_NAMES_P
;
96 static void ppc_macro (char *, const struct powerpc_macro
*);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS
*, offsetT
);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
153 /* Generic assembler global variables which must be defined by all
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars
[] = "#!";
162 static const char ppc_eabi_comment_chars
[] = "#";
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
167 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
170 const char comment_chars
[] = "#";
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars
[] = "#";
176 /* Characters which may be used to separate multiple commands on a
178 const char line_separator_chars
[] = ";";
180 /* Characters which are used to indicate an exponent in a floating
182 const char EXP_CHARS
[] = "eE";
184 /* Characters which mean that a number is a floating point constant,
186 const char FLT_CHARS
[] = "dD";
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars
[] = "%[";
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment
;
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length
;
198 /* More than this number of nops in an alignment op gets a branch
200 unsigned long nop_limit
= 4;
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu
= 0;
205 ppc_cpu_t sticky
= 0;
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion
= 0;
211 /* Flags set on encountering toc relocs. */
213 has_large_toc_reloc
= 1,
214 has_small_toc_reloc
= 2
218 /* Warn on emitting data to code sections. */
224 /* The target specific pseudo-ops which we support. */
226 const pseudo_typeS md_pseudo_table
[] =
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte
, 0 },
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm
, 0 },
237 { "lcomm", ppc_comm
, 1 },
241 { "bi", ppc_biei
, 0 },
243 { "csect", ppc_csect
, 0 },
244 { "dwsect", ppc_dwsect
, 0 },
245 { "data", ppc_section
, 'd' },
249 { "ei", ppc_biei
, 1 },
251 { "extern", ppc_extern
, 0 },
252 { "function", ppc_function
, 0 },
253 { "lglobl", ppc_lglobl
, 0 },
254 { "ref", ppc_ref
, 0 },
255 { "rename", ppc_rename
, 0 },
256 { "section", ppc_named_section
, 0 },
257 { "stabx", ppc_stabx
, 0 },
258 { "text", ppc_section
, 't' },
259 { "toc", ppc_toc
, 0 },
260 { "long", ppc_xcoff_cons
, 2 },
261 { "llong", ppc_xcoff_cons
, 3 },
262 { "word", ppc_xcoff_cons
, 1 },
263 { "short", ppc_xcoff_cons
, 1 },
264 { "vbyte", ppc_vbyte
, 0 },
268 { "llong", cons
, 8 },
269 { "rdata", ppc_elf_rdata
, 0 },
270 { "rodata", ppc_elf_rdata
, 0 },
271 { "lcomm", ppc_elf_lcomm
, 0 },
272 { "localentry", ppc_elf_localentry
, 0 },
273 { "abiversion", ppc_elf_abiversion
, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous
, 0 },
280 { "pdata", ppc_pdata
, 0 },
281 { "ydata", ppc_ydata
, 0 },
282 { "reldata", ppc_reldata
, 0 },
283 { "rdata", ppc_rdata
, 0 },
284 { "ualong", ppc_ualong
, 0 },
285 { "znop", ppc_znop
, 0 },
286 { "comm", ppc_pe_comm
, 0 },
287 { "lcomm", ppc_pe_comm
, 1 },
288 { "section", ppc_pe_section
, 0 },
289 { "function", ppc_pe_function
,0 },
290 { "tocd", ppc_pe_tocd
, 0 },
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
295 { "machine", ppc_machine
, 0 },
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
306 /* Structure to hold information about predefined registers. */
310 unsigned short value
;
311 unsigned short flags
;
314 /* List of registers that are pre-defined:
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
339 dsisr has the value 18
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
345 The table is sorted. Suitable for searching by a binary search. */
347 static const struct pd_reg pre_defined_registers
[] =
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG
},
351 { "cr.1", 1, PPC_OPERAND_CR_REG
},
352 { "cr.2", 2, PPC_OPERAND_CR_REG
},
353 { "cr.3", 3, PPC_OPERAND_CR_REG
},
354 { "cr.4", 4, PPC_OPERAND_CR_REG
},
355 { "cr.5", 5, PPC_OPERAND_CR_REG
},
356 { "cr.6", 6, PPC_OPERAND_CR_REG
},
357 { "cr.7", 7, PPC_OPERAND_CR_REG
},
359 { "cr0", 0, PPC_OPERAND_CR_REG
},
360 { "cr1", 1, PPC_OPERAND_CR_REG
},
361 { "cr2", 2, PPC_OPERAND_CR_REG
},
362 { "cr3", 3, PPC_OPERAND_CR_REG
},
363 { "cr4", 4, PPC_OPERAND_CR_REG
},
364 { "cr5", 5, PPC_OPERAND_CR_REG
},
365 { "cr6", 6, PPC_OPERAND_CR_REG
},
366 { "cr7", 7, PPC_OPERAND_CR_REG
},
368 { "ctr", 9, PPC_OPERAND_SPR
},
369 { "dar", 19, PPC_OPERAND_SPR
},
370 { "dec", 22, PPC_OPERAND_SPR
},
371 { "dsisr", 18, PPC_OPERAND_SPR
},
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR
},
375 { "f.1", 1, PPC_OPERAND_FPR
},
376 { "f.10", 10, PPC_OPERAND_FPR
},
377 { "f.11", 11, PPC_OPERAND_FPR
},
378 { "f.12", 12, PPC_OPERAND_FPR
},
379 { "f.13", 13, PPC_OPERAND_FPR
},
380 { "f.14", 14, PPC_OPERAND_FPR
},
381 { "f.15", 15, PPC_OPERAND_FPR
},
382 { "f.16", 16, PPC_OPERAND_FPR
},
383 { "f.17", 17, PPC_OPERAND_FPR
},
384 { "f.18", 18, PPC_OPERAND_FPR
},
385 { "f.19", 19, PPC_OPERAND_FPR
},
386 { "f.2", 2, PPC_OPERAND_FPR
},
387 { "f.20", 20, PPC_OPERAND_FPR
},
388 { "f.21", 21, PPC_OPERAND_FPR
},
389 { "f.22", 22, PPC_OPERAND_FPR
},
390 { "f.23", 23, PPC_OPERAND_FPR
},
391 { "f.24", 24, PPC_OPERAND_FPR
},
392 { "f.25", 25, PPC_OPERAND_FPR
},
393 { "f.26", 26, PPC_OPERAND_FPR
},
394 { "f.27", 27, PPC_OPERAND_FPR
},
395 { "f.28", 28, PPC_OPERAND_FPR
},
396 { "f.29", 29, PPC_OPERAND_FPR
},
397 { "f.3", 3, PPC_OPERAND_FPR
},
398 { "f.30", 30, PPC_OPERAND_FPR
},
399 { "f.31", 31, PPC_OPERAND_FPR
},
400 { "f.32", 32, PPC_OPERAND_VSR
},
401 { "f.33", 33, PPC_OPERAND_VSR
},
402 { "f.34", 34, PPC_OPERAND_VSR
},
403 { "f.35", 35, PPC_OPERAND_VSR
},
404 { "f.36", 36, PPC_OPERAND_VSR
},
405 { "f.37", 37, PPC_OPERAND_VSR
},
406 { "f.38", 38, PPC_OPERAND_VSR
},
407 { "f.39", 39, PPC_OPERAND_VSR
},
408 { "f.4", 4, PPC_OPERAND_FPR
},
409 { "f.40", 40, PPC_OPERAND_VSR
},
410 { "f.41", 41, PPC_OPERAND_VSR
},
411 { "f.42", 42, PPC_OPERAND_VSR
},
412 { "f.43", 43, PPC_OPERAND_VSR
},
413 { "f.44", 44, PPC_OPERAND_VSR
},
414 { "f.45", 45, PPC_OPERAND_VSR
},
415 { "f.46", 46, PPC_OPERAND_VSR
},
416 { "f.47", 47, PPC_OPERAND_VSR
},
417 { "f.48", 48, PPC_OPERAND_VSR
},
418 { "f.49", 49, PPC_OPERAND_VSR
},
419 { "f.5", 5, PPC_OPERAND_FPR
},
420 { "f.50", 50, PPC_OPERAND_VSR
},
421 { "f.51", 51, PPC_OPERAND_VSR
},
422 { "f.52", 52, PPC_OPERAND_VSR
},
423 { "f.53", 53, PPC_OPERAND_VSR
},
424 { "f.54", 54, PPC_OPERAND_VSR
},
425 { "f.55", 55, PPC_OPERAND_VSR
},
426 { "f.56", 56, PPC_OPERAND_VSR
},
427 { "f.57", 57, PPC_OPERAND_VSR
},
428 { "f.58", 58, PPC_OPERAND_VSR
},
429 { "f.59", 59, PPC_OPERAND_VSR
},
430 { "f.6", 6, PPC_OPERAND_FPR
},
431 { "f.60", 60, PPC_OPERAND_VSR
},
432 { "f.61", 61, PPC_OPERAND_VSR
},
433 { "f.62", 62, PPC_OPERAND_VSR
},
434 { "f.63", 63, PPC_OPERAND_VSR
},
435 { "f.7", 7, PPC_OPERAND_FPR
},
436 { "f.8", 8, PPC_OPERAND_FPR
},
437 { "f.9", 9, PPC_OPERAND_FPR
},
439 { "f0", 0, PPC_OPERAND_FPR
},
440 { "f1", 1, PPC_OPERAND_FPR
},
441 { "f10", 10, PPC_OPERAND_FPR
},
442 { "f11", 11, PPC_OPERAND_FPR
},
443 { "f12", 12, PPC_OPERAND_FPR
},
444 { "f13", 13, PPC_OPERAND_FPR
},
445 { "f14", 14, PPC_OPERAND_FPR
},
446 { "f15", 15, PPC_OPERAND_FPR
},
447 { "f16", 16, PPC_OPERAND_FPR
},
448 { "f17", 17, PPC_OPERAND_FPR
},
449 { "f18", 18, PPC_OPERAND_FPR
},
450 { "f19", 19, PPC_OPERAND_FPR
},
451 { "f2", 2, PPC_OPERAND_FPR
},
452 { "f20", 20, PPC_OPERAND_FPR
},
453 { "f21", 21, PPC_OPERAND_FPR
},
454 { "f22", 22, PPC_OPERAND_FPR
},
455 { "f23", 23, PPC_OPERAND_FPR
},
456 { "f24", 24, PPC_OPERAND_FPR
},
457 { "f25", 25, PPC_OPERAND_FPR
},
458 { "f26", 26, PPC_OPERAND_FPR
},
459 { "f27", 27, PPC_OPERAND_FPR
},
460 { "f28", 28, PPC_OPERAND_FPR
},
461 { "f29", 29, PPC_OPERAND_FPR
},
462 { "f3", 3, PPC_OPERAND_FPR
},
463 { "f30", 30, PPC_OPERAND_FPR
},
464 { "f31", 31, PPC_OPERAND_FPR
},
465 { "f32", 32, PPC_OPERAND_VSR
},
466 { "f33", 33, PPC_OPERAND_VSR
},
467 { "f34", 34, PPC_OPERAND_VSR
},
468 { "f35", 35, PPC_OPERAND_VSR
},
469 { "f36", 36, PPC_OPERAND_VSR
},
470 { "f37", 37, PPC_OPERAND_VSR
},
471 { "f38", 38, PPC_OPERAND_VSR
},
472 { "f39", 39, PPC_OPERAND_VSR
},
473 { "f4", 4, PPC_OPERAND_FPR
},
474 { "f40", 40, PPC_OPERAND_VSR
},
475 { "f41", 41, PPC_OPERAND_VSR
},
476 { "f42", 42, PPC_OPERAND_VSR
},
477 { "f43", 43, PPC_OPERAND_VSR
},
478 { "f44", 44, PPC_OPERAND_VSR
},
479 { "f45", 45, PPC_OPERAND_VSR
},
480 { "f46", 46, PPC_OPERAND_VSR
},
481 { "f47", 47, PPC_OPERAND_VSR
},
482 { "f48", 48, PPC_OPERAND_VSR
},
483 { "f49", 49, PPC_OPERAND_VSR
},
484 { "f5", 5, PPC_OPERAND_FPR
},
485 { "f50", 50, PPC_OPERAND_VSR
},
486 { "f51", 51, PPC_OPERAND_VSR
},
487 { "f52", 52, PPC_OPERAND_VSR
},
488 { "f53", 53, PPC_OPERAND_VSR
},
489 { "f54", 54, PPC_OPERAND_VSR
},
490 { "f55", 55, PPC_OPERAND_VSR
},
491 { "f56", 56, PPC_OPERAND_VSR
},
492 { "f57", 57, PPC_OPERAND_VSR
},
493 { "f58", 58, PPC_OPERAND_VSR
},
494 { "f59", 59, PPC_OPERAND_VSR
},
495 { "f6", 6, PPC_OPERAND_FPR
},
496 { "f60", 60, PPC_OPERAND_VSR
},
497 { "f61", 61, PPC_OPERAND_VSR
},
498 { "f62", 62, PPC_OPERAND_VSR
},
499 { "f63", 63, PPC_OPERAND_VSR
},
500 { "f7", 7, PPC_OPERAND_FPR
},
501 { "f8", 8, PPC_OPERAND_FPR
},
502 { "f9", 9, PPC_OPERAND_FPR
},
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR
},
506 { "gqr.1", 1, PPC_OPERAND_GQR
},
507 { "gqr.2", 2, PPC_OPERAND_GQR
},
508 { "gqr.3", 3, PPC_OPERAND_GQR
},
509 { "gqr.4", 4, PPC_OPERAND_GQR
},
510 { "gqr.5", 5, PPC_OPERAND_GQR
},
511 { "gqr.6", 6, PPC_OPERAND_GQR
},
512 { "gqr.7", 7, PPC_OPERAND_GQR
},
513 { "gqr0", 0, PPC_OPERAND_GQR
},
514 { "gqr1", 1, PPC_OPERAND_GQR
},
515 { "gqr2", 2, PPC_OPERAND_GQR
},
516 { "gqr3", 3, PPC_OPERAND_GQR
},
517 { "gqr4", 4, PPC_OPERAND_GQR
},
518 { "gqr5", 5, PPC_OPERAND_GQR
},
519 { "gqr6", 6, PPC_OPERAND_GQR
},
520 { "gqr7", 7, PPC_OPERAND_GQR
},
522 { "lr", 8, PPC_OPERAND_SPR
},
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR
},
526 { "r.1", 1, PPC_OPERAND_GPR
},
527 { "r.10", 10, PPC_OPERAND_GPR
},
528 { "r.11", 11, PPC_OPERAND_GPR
},
529 { "r.12", 12, PPC_OPERAND_GPR
},
530 { "r.13", 13, PPC_OPERAND_GPR
},
531 { "r.14", 14, PPC_OPERAND_GPR
},
532 { "r.15", 15, PPC_OPERAND_GPR
},
533 { "r.16", 16, PPC_OPERAND_GPR
},
534 { "r.17", 17, PPC_OPERAND_GPR
},
535 { "r.18", 18, PPC_OPERAND_GPR
},
536 { "r.19", 19, PPC_OPERAND_GPR
},
537 { "r.2", 2, PPC_OPERAND_GPR
},
538 { "r.20", 20, PPC_OPERAND_GPR
},
539 { "r.21", 21, PPC_OPERAND_GPR
},
540 { "r.22", 22, PPC_OPERAND_GPR
},
541 { "r.23", 23, PPC_OPERAND_GPR
},
542 { "r.24", 24, PPC_OPERAND_GPR
},
543 { "r.25", 25, PPC_OPERAND_GPR
},
544 { "r.26", 26, PPC_OPERAND_GPR
},
545 { "r.27", 27, PPC_OPERAND_GPR
},
546 { "r.28", 28, PPC_OPERAND_GPR
},
547 { "r.29", 29, PPC_OPERAND_GPR
},
548 { "r.3", 3, PPC_OPERAND_GPR
},
549 { "r.30", 30, PPC_OPERAND_GPR
},
550 { "r.31", 31, PPC_OPERAND_GPR
},
551 { "r.4", 4, PPC_OPERAND_GPR
},
552 { "r.5", 5, PPC_OPERAND_GPR
},
553 { "r.6", 6, PPC_OPERAND_GPR
},
554 { "r.7", 7, PPC_OPERAND_GPR
},
555 { "r.8", 8, PPC_OPERAND_GPR
},
556 { "r.9", 9, PPC_OPERAND_GPR
},
558 { "r.sp", 1, PPC_OPERAND_GPR
},
560 { "r.toc", 2, PPC_OPERAND_GPR
},
562 { "r0", 0, PPC_OPERAND_GPR
},
563 { "r1", 1, PPC_OPERAND_GPR
},
564 { "r10", 10, PPC_OPERAND_GPR
},
565 { "r11", 11, PPC_OPERAND_GPR
},
566 { "r12", 12, PPC_OPERAND_GPR
},
567 { "r13", 13, PPC_OPERAND_GPR
},
568 { "r14", 14, PPC_OPERAND_GPR
},
569 { "r15", 15, PPC_OPERAND_GPR
},
570 { "r16", 16, PPC_OPERAND_GPR
},
571 { "r17", 17, PPC_OPERAND_GPR
},
572 { "r18", 18, PPC_OPERAND_GPR
},
573 { "r19", 19, PPC_OPERAND_GPR
},
574 { "r2", 2, PPC_OPERAND_GPR
},
575 { "r20", 20, PPC_OPERAND_GPR
},
576 { "r21", 21, PPC_OPERAND_GPR
},
577 { "r22", 22, PPC_OPERAND_GPR
},
578 { "r23", 23, PPC_OPERAND_GPR
},
579 { "r24", 24, PPC_OPERAND_GPR
},
580 { "r25", 25, PPC_OPERAND_GPR
},
581 { "r26", 26, PPC_OPERAND_GPR
},
582 { "r27", 27, PPC_OPERAND_GPR
},
583 { "r28", 28, PPC_OPERAND_GPR
},
584 { "r29", 29, PPC_OPERAND_GPR
},
585 { "r3", 3, PPC_OPERAND_GPR
},
586 { "r30", 30, PPC_OPERAND_GPR
},
587 { "r31", 31, PPC_OPERAND_GPR
},
588 { "r4", 4, PPC_OPERAND_GPR
},
589 { "r5", 5, PPC_OPERAND_GPR
},
590 { "r6", 6, PPC_OPERAND_GPR
},
591 { "r7", 7, PPC_OPERAND_GPR
},
592 { "r8", 8, PPC_OPERAND_GPR
},
593 { "r9", 9, PPC_OPERAND_GPR
},
595 { "rtoc", 2, PPC_OPERAND_GPR
},
597 { "sdr1", 25, PPC_OPERAND_SPR
},
599 { "sp", 1, PPC_OPERAND_GPR
},
601 { "srr0", 26, PPC_OPERAND_SPR
},
602 { "srr1", 27, PPC_OPERAND_SPR
},
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR
},
606 { "v.1", 1, PPC_OPERAND_VR
},
607 { "v.10", 10, PPC_OPERAND_VR
},
608 { "v.11", 11, PPC_OPERAND_VR
},
609 { "v.12", 12, PPC_OPERAND_VR
},
610 { "v.13", 13, PPC_OPERAND_VR
},
611 { "v.14", 14, PPC_OPERAND_VR
},
612 { "v.15", 15, PPC_OPERAND_VR
},
613 { "v.16", 16, PPC_OPERAND_VR
},
614 { "v.17", 17, PPC_OPERAND_VR
},
615 { "v.18", 18, PPC_OPERAND_VR
},
616 { "v.19", 19, PPC_OPERAND_VR
},
617 { "v.2", 2, PPC_OPERAND_VR
},
618 { "v.20", 20, PPC_OPERAND_VR
},
619 { "v.21", 21, PPC_OPERAND_VR
},
620 { "v.22", 22, PPC_OPERAND_VR
},
621 { "v.23", 23, PPC_OPERAND_VR
},
622 { "v.24", 24, PPC_OPERAND_VR
},
623 { "v.25", 25, PPC_OPERAND_VR
},
624 { "v.26", 26, PPC_OPERAND_VR
},
625 { "v.27", 27, PPC_OPERAND_VR
},
626 { "v.28", 28, PPC_OPERAND_VR
},
627 { "v.29", 29, PPC_OPERAND_VR
},
628 { "v.3", 3, PPC_OPERAND_VR
},
629 { "v.30", 30, PPC_OPERAND_VR
},
630 { "v.31", 31, PPC_OPERAND_VR
},
631 { "v.4", 4, PPC_OPERAND_VR
},
632 { "v.5", 5, PPC_OPERAND_VR
},
633 { "v.6", 6, PPC_OPERAND_VR
},
634 { "v.7", 7, PPC_OPERAND_VR
},
635 { "v.8", 8, PPC_OPERAND_VR
},
636 { "v.9", 9, PPC_OPERAND_VR
},
638 { "v0", 0, PPC_OPERAND_VR
},
639 { "v1", 1, PPC_OPERAND_VR
},
640 { "v10", 10, PPC_OPERAND_VR
},
641 { "v11", 11, PPC_OPERAND_VR
},
642 { "v12", 12, PPC_OPERAND_VR
},
643 { "v13", 13, PPC_OPERAND_VR
},
644 { "v14", 14, PPC_OPERAND_VR
},
645 { "v15", 15, PPC_OPERAND_VR
},
646 { "v16", 16, PPC_OPERAND_VR
},
647 { "v17", 17, PPC_OPERAND_VR
},
648 { "v18", 18, PPC_OPERAND_VR
},
649 { "v19", 19, PPC_OPERAND_VR
},
650 { "v2", 2, PPC_OPERAND_VR
},
651 { "v20", 20, PPC_OPERAND_VR
},
652 { "v21", 21, PPC_OPERAND_VR
},
653 { "v22", 22, PPC_OPERAND_VR
},
654 { "v23", 23, PPC_OPERAND_VR
},
655 { "v24", 24, PPC_OPERAND_VR
},
656 { "v25", 25, PPC_OPERAND_VR
},
657 { "v26", 26, PPC_OPERAND_VR
},
658 { "v27", 27, PPC_OPERAND_VR
},
659 { "v28", 28, PPC_OPERAND_VR
},
660 { "v29", 29, PPC_OPERAND_VR
},
661 { "v3", 3, PPC_OPERAND_VR
},
662 { "v30", 30, PPC_OPERAND_VR
},
663 { "v31", 31, PPC_OPERAND_VR
},
664 { "v4", 4, PPC_OPERAND_VR
},
665 { "v5", 5, PPC_OPERAND_VR
},
666 { "v6", 6, PPC_OPERAND_VR
},
667 { "v7", 7, PPC_OPERAND_VR
},
668 { "v8", 8, PPC_OPERAND_VR
},
669 { "v9", 9, PPC_OPERAND_VR
},
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR
},
673 { "vs.1", 1, PPC_OPERAND_VSR
},
674 { "vs.10", 10, PPC_OPERAND_VSR
},
675 { "vs.11", 11, PPC_OPERAND_VSR
},
676 { "vs.12", 12, PPC_OPERAND_VSR
},
677 { "vs.13", 13, PPC_OPERAND_VSR
},
678 { "vs.14", 14, PPC_OPERAND_VSR
},
679 { "vs.15", 15, PPC_OPERAND_VSR
},
680 { "vs.16", 16, PPC_OPERAND_VSR
},
681 { "vs.17", 17, PPC_OPERAND_VSR
},
682 { "vs.18", 18, PPC_OPERAND_VSR
},
683 { "vs.19", 19, PPC_OPERAND_VSR
},
684 { "vs.2", 2, PPC_OPERAND_VSR
},
685 { "vs.20", 20, PPC_OPERAND_VSR
},
686 { "vs.21", 21, PPC_OPERAND_VSR
},
687 { "vs.22", 22, PPC_OPERAND_VSR
},
688 { "vs.23", 23, PPC_OPERAND_VSR
},
689 { "vs.24", 24, PPC_OPERAND_VSR
},
690 { "vs.25", 25, PPC_OPERAND_VSR
},
691 { "vs.26", 26, PPC_OPERAND_VSR
},
692 { "vs.27", 27, PPC_OPERAND_VSR
},
693 { "vs.28", 28, PPC_OPERAND_VSR
},
694 { "vs.29", 29, PPC_OPERAND_VSR
},
695 { "vs.3", 3, PPC_OPERAND_VSR
},
696 { "vs.30", 30, PPC_OPERAND_VSR
},
697 { "vs.31", 31, PPC_OPERAND_VSR
},
698 { "vs.32", 32, PPC_OPERAND_VSR
},
699 { "vs.33", 33, PPC_OPERAND_VSR
},
700 { "vs.34", 34, PPC_OPERAND_VSR
},
701 { "vs.35", 35, PPC_OPERAND_VSR
},
702 { "vs.36", 36, PPC_OPERAND_VSR
},
703 { "vs.37", 37, PPC_OPERAND_VSR
},
704 { "vs.38", 38, PPC_OPERAND_VSR
},
705 { "vs.39", 39, PPC_OPERAND_VSR
},
706 { "vs.4", 4, PPC_OPERAND_VSR
},
707 { "vs.40", 40, PPC_OPERAND_VSR
},
708 { "vs.41", 41, PPC_OPERAND_VSR
},
709 { "vs.42", 42, PPC_OPERAND_VSR
},
710 { "vs.43", 43, PPC_OPERAND_VSR
},
711 { "vs.44", 44, PPC_OPERAND_VSR
},
712 { "vs.45", 45, PPC_OPERAND_VSR
},
713 { "vs.46", 46, PPC_OPERAND_VSR
},
714 { "vs.47", 47, PPC_OPERAND_VSR
},
715 { "vs.48", 48, PPC_OPERAND_VSR
},
716 { "vs.49", 49, PPC_OPERAND_VSR
},
717 { "vs.5", 5, PPC_OPERAND_VSR
},
718 { "vs.50", 50, PPC_OPERAND_VSR
},
719 { "vs.51", 51, PPC_OPERAND_VSR
},
720 { "vs.52", 52, PPC_OPERAND_VSR
},
721 { "vs.53", 53, PPC_OPERAND_VSR
},
722 { "vs.54", 54, PPC_OPERAND_VSR
},
723 { "vs.55", 55, PPC_OPERAND_VSR
},
724 { "vs.56", 56, PPC_OPERAND_VSR
},
725 { "vs.57", 57, PPC_OPERAND_VSR
},
726 { "vs.58", 58, PPC_OPERAND_VSR
},
727 { "vs.59", 59, PPC_OPERAND_VSR
},
728 { "vs.6", 6, PPC_OPERAND_VSR
},
729 { "vs.60", 60, PPC_OPERAND_VSR
},
730 { "vs.61", 61, PPC_OPERAND_VSR
},
731 { "vs.62", 62, PPC_OPERAND_VSR
},
732 { "vs.63", 63, PPC_OPERAND_VSR
},
733 { "vs.7", 7, PPC_OPERAND_VSR
},
734 { "vs.8", 8, PPC_OPERAND_VSR
},
735 { "vs.9", 9, PPC_OPERAND_VSR
},
737 { "vs0", 0, PPC_OPERAND_VSR
},
738 { "vs1", 1, PPC_OPERAND_VSR
},
739 { "vs10", 10, PPC_OPERAND_VSR
},
740 { "vs11", 11, PPC_OPERAND_VSR
},
741 { "vs12", 12, PPC_OPERAND_VSR
},
742 { "vs13", 13, PPC_OPERAND_VSR
},
743 { "vs14", 14, PPC_OPERAND_VSR
},
744 { "vs15", 15, PPC_OPERAND_VSR
},
745 { "vs16", 16, PPC_OPERAND_VSR
},
746 { "vs17", 17, PPC_OPERAND_VSR
},
747 { "vs18", 18, PPC_OPERAND_VSR
},
748 { "vs19", 19, PPC_OPERAND_VSR
},
749 { "vs2", 2, PPC_OPERAND_VSR
},
750 { "vs20", 20, PPC_OPERAND_VSR
},
751 { "vs21", 21, PPC_OPERAND_VSR
},
752 { "vs22", 22, PPC_OPERAND_VSR
},
753 { "vs23", 23, PPC_OPERAND_VSR
},
754 { "vs24", 24, PPC_OPERAND_VSR
},
755 { "vs25", 25, PPC_OPERAND_VSR
},
756 { "vs26", 26, PPC_OPERAND_VSR
},
757 { "vs27", 27, PPC_OPERAND_VSR
},
758 { "vs28", 28, PPC_OPERAND_VSR
},
759 { "vs29", 29, PPC_OPERAND_VSR
},
760 { "vs3", 3, PPC_OPERAND_VSR
},
761 { "vs30", 30, PPC_OPERAND_VSR
},
762 { "vs31", 31, PPC_OPERAND_VSR
},
763 { "vs32", 32, PPC_OPERAND_VSR
},
764 { "vs33", 33, PPC_OPERAND_VSR
},
765 { "vs34", 34, PPC_OPERAND_VSR
},
766 { "vs35", 35, PPC_OPERAND_VSR
},
767 { "vs36", 36, PPC_OPERAND_VSR
},
768 { "vs37", 37, PPC_OPERAND_VSR
},
769 { "vs38", 38, PPC_OPERAND_VSR
},
770 { "vs39", 39, PPC_OPERAND_VSR
},
771 { "vs4", 4, PPC_OPERAND_VSR
},
772 { "vs40", 40, PPC_OPERAND_VSR
},
773 { "vs41", 41, PPC_OPERAND_VSR
},
774 { "vs42", 42, PPC_OPERAND_VSR
},
775 { "vs43", 43, PPC_OPERAND_VSR
},
776 { "vs44", 44, PPC_OPERAND_VSR
},
777 { "vs45", 45, PPC_OPERAND_VSR
},
778 { "vs46", 46, PPC_OPERAND_VSR
},
779 { "vs47", 47, PPC_OPERAND_VSR
},
780 { "vs48", 48, PPC_OPERAND_VSR
},
781 { "vs49", 49, PPC_OPERAND_VSR
},
782 { "vs5", 5, PPC_OPERAND_VSR
},
783 { "vs50", 50, PPC_OPERAND_VSR
},
784 { "vs51", 51, PPC_OPERAND_VSR
},
785 { "vs52", 52, PPC_OPERAND_VSR
},
786 { "vs53", 53, PPC_OPERAND_VSR
},
787 { "vs54", 54, PPC_OPERAND_VSR
},
788 { "vs55", 55, PPC_OPERAND_VSR
},
789 { "vs56", 56, PPC_OPERAND_VSR
},
790 { "vs57", 57, PPC_OPERAND_VSR
},
791 { "vs58", 58, PPC_OPERAND_VSR
},
792 { "vs59", 59, PPC_OPERAND_VSR
},
793 { "vs6", 6, PPC_OPERAND_VSR
},
794 { "vs60", 60, PPC_OPERAND_VSR
},
795 { "vs61", 61, PPC_OPERAND_VSR
},
796 { "vs62", 62, PPC_OPERAND_VSR
},
797 { "vs63", 63, PPC_OPERAND_VSR
},
798 { "vs7", 7, PPC_OPERAND_VSR
},
799 { "vs8", 8, PPC_OPERAND_VSR
},
800 { "vs9", 9, PPC_OPERAND_VSR
},
802 { "xer", 1, PPC_OPERAND_SPR
}
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
810 static const struct pd_reg
*
811 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
813 int middle
, low
, high
;
821 middle
= (low
+ high
) / 2;
822 cmp
= strcasecmp (name
, regs
[middle
].name
);
828 return ®s
[middle
];
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS
*expressionP
)
850 const struct pd_reg
*reg
;
855 /* Find the spelling of the operand. */
856 start
= name
= input_line_pointer
;
857 if (name
[0] == '%' && ISALPHA (name
[1]))
858 name
= ++input_line_pointer
;
860 else if (!reg_names_p
|| !ISALPHA (name
[0]))
863 c
= get_symbol_name (&name
);
864 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
866 /* Put back the delimiting char. */
867 *input_line_pointer
= c
;
869 /* Look to see if it's in the register table. */
872 expressionP
->X_op
= O_register
;
873 expressionP
->X_add_number
= reg
->value
;
874 expressionP
->X_md
= reg
->flags
;
876 /* Make the rest nice. */
877 expressionP
->X_add_symbol
= NULL
;
878 expressionP
->X_op_symbol
= NULL
;
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer
= start
;
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand
;
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names
[] =
897 { "cr0", 0, PPC_OPERAND_CR_REG
},
898 { "cr1", 1, PPC_OPERAND_CR_REG
},
899 { "cr2", 2, PPC_OPERAND_CR_REG
},
900 { "cr3", 3, PPC_OPERAND_CR_REG
},
901 { "cr4", 4, PPC_OPERAND_CR_REG
},
902 { "cr5", 5, PPC_OPERAND_CR_REG
},
903 { "cr6", 6, PPC_OPERAND_CR_REG
},
904 { "cr7", 7, PPC_OPERAND_CR_REG
},
905 { "eq", 2, PPC_OPERAND_CR_BIT
},
906 { "gt", 1, PPC_OPERAND_CR_BIT
},
907 { "lt", 0, PPC_OPERAND_CR_BIT
},
908 { "so", 3, PPC_OPERAND_CR_BIT
},
909 { "un", 3, PPC_OPERAND_CR_BIT
}
912 /* Parsing function. This returns non-zero if it recognized an
916 ppc_parse_name (const char *name
, expressionS
*exp
)
918 const struct pd_reg
*reg
;
925 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
930 exp
->X_op
= O_register
;
931 exp
->X_add_number
= reg
->value
;
932 exp
->X_md
= reg
->flags
;
937 /* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
941 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
943 /* Accept 4*cr<n> and cr<n>*4. */
945 && ((right
->X_op
== O_register
946 && right
->X_md
== PPC_OPERAND_CR_REG
947 && left
->X_op
== O_constant
948 && left
->X_add_number
== 4)
949 || (left
->X_op
== O_register
950 && left
->X_md
== PPC_OPERAND_CR_REG
951 && right
->X_op
== O_constant
952 && right
->X_add_number
== 4)))
954 left
->X_op
= O_register
;
955 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
956 left
->X_add_number
*= right
->X_add_number
;
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right
->X_op
== O_register
962 && left
->X_op
== O_register
964 && ((right
->X_md
== PPC_OPERAND_CR_BIT
965 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
966 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
967 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
969 left
->X_md
= PPC_OPERAND_CR_BIT
;
970 right
->X_op
= O_constant
;
974 /* Accept reg +/- constant. */
975 if (left
->X_op
== O_register
976 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
977 as_warn (_("invalid register expression"));
979 /* Accept constant + reg. */
980 if (right
->X_op
== O_register
)
982 if (op
== O_add
&& left
->X_op
== O_constant
)
983 left
->X_md
= right
->X_md
;
985 as_warn (_("invalid register expression"));
991 /* Local variables. */
993 /* Whether to target xcoff64/elf64. */
994 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
996 /* Opcode hash table. */
997 static struct hash_control
*ppc_hash
;
999 /* Macro hash table. */
1000 static struct hash_control
*ppc_macro_hash
;
1003 /* What type of shared library support to use. */
1004 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
1006 /* Flags to set in the elf header. */
1007 static flagword ppc_flags
= 0;
1009 /* Whether this is Solaris or not. */
1010 #ifdef TARGET_SOLARIS_COMMENT
1011 #define SOLARIS_P TRUE
1013 #define SOLARIS_P FALSE
1016 static bfd_boolean msolaris
= SOLARIS_P
;
1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1027 /* Next subsegment to allocate within the .text segment. */
1028 static subsegT ppc_text_subsegment
= 2;
1030 /* Linked list of csects in the text section. */
1031 static symbolS
*ppc_text_csects
;
1033 /* Next subsegment to allocate within the .data segment. */
1034 static subsegT ppc_data_subsegment
= 2;
1036 /* Linked list of csects in the data section. */
1037 static symbolS
*ppc_data_csects
;
1039 /* The current csect. */
1040 static symbolS
*ppc_current_csect
;
1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047 static symbolS
*ppc_toc_csect
;
1049 /* The first frag in the TOC subsegment. */
1050 static fragS
*ppc_toc_frag
;
1052 /* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054 static fragS
*ppc_after_toc_frag
;
1056 /* The current static block. */
1057 static symbolS
*ppc_current_block
;
1059 /* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062 static asection
*ppc_coff_debug_section
;
1064 /* Structure to set the length field of the dwarf sections. */
1065 struct dw_subsection
{
1066 /* Subsections are simply linked. */
1067 struct dw_subsection
*link
;
1069 /* The subsection number. */
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp
;
1076 static struct dw_section
{
1077 /* Corresponding section. */
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection
*list_subseg
;
1083 /* The anonymous subsection. */
1084 struct dw_subsection
*anon_subseg
;
1085 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1086 #endif /* OBJ_XCOFF */
1090 /* Various sections that we need for PE coff support. */
1091 static segT ydata_section
;
1092 static segT pdata_section
;
1093 static segT reldata_section
;
1094 static segT rdata_section
;
1095 static segT tocdata_section
;
1097 /* The current section and the previous section. See ppc_previous. */
1098 static segT ppc_previous_section
;
1099 static segT ppc_current_section
;
1104 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105 unsigned long *ppc_apuinfo_list
;
1106 unsigned int ppc_apuinfo_num
;
1107 unsigned int ppc_apuinfo_num_alloc
;
1108 #endif /* OBJ_ELF */
1111 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1113 const char *const md_shortopts
= "um:";
1115 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1116 const struct option md_longopts
[] = {
1117 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1118 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1119 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1120 {NULL
, no_argument
, NULL
, 0}
1122 const size_t md_longopts_size
= sizeof (md_longopts
);
1125 md_parse_option (int c
, const char *arg
)
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg
, "e") == 0)
1142 target_big_endian
= 0;
1143 set_target_endian
= 1;
1144 if (ppc_cpu
& PPC_OPCODE_VLE
)
1145 as_bad (_("the use of -mvle requires big endian."));
1153 if (strcmp (arg
, "e") == 0)
1155 target_big_endian
= 1;
1156 set_target_endian
= 1;
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1168 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1178 if (strcmp (arg
, "64") == 0)
1182 if (ppc_cpu
& PPC_OPCODE_VLE
)
1183 as_bad (_("the use of -mvle requires -a32."));
1185 as_fatal (_("%s unsupported"), "-a64");
1188 else if (strcmp (arg
, "32") == 0)
1195 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1196 /* "raw" is only valid for the disassembler. */
1197 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1200 if (strcmp (arg
, "vle") == 0)
1202 if (set_target_endian
&& target_big_endian
== 0)
1203 as_bad (_("the use of -mvle requires big endian."));
1205 as_bad (_("the use of -mvle requires -a32."));
1209 else if (strcmp (arg
, "no-vle") == 0)
1211 sticky
&= ~PPC_OPCODE_VLE
;
1213 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1214 new_cpu
&= ~PPC_OPCODE_VLE
;
1219 else if (strcmp (arg
, "regnames") == 0)
1222 else if (strcmp (arg
, "no-regnames") == 0)
1223 reg_names_p
= FALSE
;
1226 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1227 that require relocation. */
1228 else if (strcmp (arg
, "relocatable") == 0)
1230 shlib
= SHLIB_MRELOCATABLE
;
1231 ppc_flags
|= EF_PPC_RELOCATABLE
;
1234 else if (strcmp (arg
, "relocatable-lib") == 0)
1236 shlib
= SHLIB_MRELOCATABLE
;
1237 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1240 /* -memb, set embedded bit. */
1241 else if (strcmp (arg
, "emb") == 0)
1242 ppc_flags
|= EF_PPC_EMB
;
1244 /* -mlittle/-mbig set the endianness. */
1245 else if (strcmp (arg
, "little") == 0
1246 || strcmp (arg
, "little-endian") == 0)
1248 target_big_endian
= 0;
1249 set_target_endian
= 1;
1250 if (ppc_cpu
& PPC_OPCODE_VLE
)
1251 as_bad (_("the use of -mvle requires big endian."));
1254 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1256 target_big_endian
= 1;
1257 set_target_endian
= 1;
1260 else if (strcmp (arg
, "solaris") == 0)
1263 ppc_comment_chars
= ppc_solaris_comment_chars
;
1266 else if (strcmp (arg
, "no-solaris") == 0)
1269 ppc_comment_chars
= ppc_eabi_comment_chars
;
1271 else if (strcmp (arg
, "spe2") == 0)
1273 ppc_cpu
|= PPC_OPCODE_SPE2
;
1278 as_bad (_("invalid switch -m%s"), arg
);
1284 /* -V: SVR4 argument to print version ID. */
1286 print_version_id ();
1289 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1290 should be emitted or not. FIXME: Not implemented. */
1294 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1295 rather than .stabs.excl, which is ignored by the linker.
1296 FIXME: Not implemented. */
1307 nop_limit
= strtoul (optarg
, &end
, 0);
1309 as_bad (_("--nops needs a numeric argument"));
1324 is_ppc64_target (const bfd_target
*targ
, void *data ATTRIBUTE_UNUSED
)
1326 switch (targ
->flavour
)
1329 case bfd_target_elf_flavour
:
1330 return strncmp (targ
->name
, "elf64-powerpc", 13) == 0;
1333 case bfd_target_xcoff_flavour
:
1334 return (strcmp (targ
->name
, "aixcoff64-rs6000") == 0
1335 || strcmp (targ
->name
, "aix5coff64-rs6000") == 0);
1343 md_show_usage (FILE *stream
)
1345 fprintf (stream
, _("\
1346 PowerPC options:\n"));
1347 fprintf (stream
, _("\
1348 -a32 generate ELF32/XCOFF32\n"));
1349 if (bfd_iterate_over_targets (is_ppc64_target
, NULL
))
1350 fprintf (stream
, _("\
1351 -a64 generate ELF64/XCOFF64\n"));
1352 fprintf (stream
, _("\
1354 fprintf (stream
, _("\
1355 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n"));
1356 fprintf (stream
, _("\
1357 -mpwr generate code for POWER (RIOS1)\n"));
1358 fprintf (stream
, _("\
1359 -m601 generate code for PowerPC 601\n"));
1360 fprintf (stream
, _("\
1361 -mppc, -mppc32, -m603, -m604\n\
1362 generate code for PowerPC 603/604\n"));
1363 fprintf (stream
, _("\
1364 -m403 generate code for PowerPC 403\n"));
1365 fprintf (stream
, _("\
1366 -m405 generate code for PowerPC 405\n"));
1367 fprintf (stream
, _("\
1368 -m440 generate code for PowerPC 440\n"));
1369 fprintf (stream
, _("\
1370 -m464 generate code for PowerPC 464\n"));
1371 fprintf (stream
, _("\
1372 -m476 generate code for PowerPC 476\n"));
1373 fprintf (stream
, _("\
1374 -m7400, -m7410, -m7450, -m7455\n\
1375 generate code for PowerPC 7400/7410/7450/7455\n"));
1376 fprintf (stream
, _("\
1377 -m750cl, -mgekko, -mbroadway\n\
1378 generate code for PowerPC 750cl/Gekko/Broadway\n"));
1379 fprintf (stream
, _("\
1380 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1381 fprintf (stream
, _("\
1382 -mppc64, -m620 generate code for PowerPC 620/625/630\n"));
1383 fprintf (stream
, _("\
1384 -mppc64bridge generate code for PowerPC 64, including bridge insns\n"));
1385 fprintf (stream
, _("\
1386 -mbooke generate code for 32-bit PowerPC BookE\n"));
1387 fprintf (stream
, _("\
1388 -ma2 generate code for A2 architecture\n"));
1389 fprintf (stream
, _("\
1390 -mpower4, -mpwr4 generate code for Power4 architecture\n"));
1391 fprintf (stream
, _("\
1392 -mpower5, -mpwr5, -mpwr5x\n\
1393 generate code for Power5 architecture\n"));
1394 fprintf (stream
, _("\
1395 -mpower6, -mpwr6 generate code for Power6 architecture\n"));
1396 fprintf (stream
, _("\
1397 -mpower7, -mpwr7 generate code for Power7 architecture\n"));
1398 fprintf (stream
, _("\
1399 -mpower8, -mpwr8 generate code for Power8 architecture\n"));
1400 fprintf (stream
, _("\
1401 -mpower9, -mpwr9 generate code for Power9 architecture\n"));
1402 fprintf (stream
, _("\
1403 -mcell generate code for Cell Broadband Engine architecture\n"));
1404 fprintf (stream
, _("\
1405 -mcom generate code for Power/PowerPC common instructions\n"));
1406 fprintf (stream
, _("\
1407 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1408 fprintf (stream
, _("\
1409 -maltivec generate code for AltiVec\n"));
1410 fprintf (stream
, _("\
1411 -mvsx generate code for Vector-Scalar (VSX) instructions\n"));
1412 fprintf (stream
, _("\
1413 -me300 generate code for PowerPC e300 family\n"));
1414 fprintf (stream
, _("\
1415 -me500, -me500x2 generate code for Motorola e500 core complex\n"));
1416 fprintf (stream
, _("\
1417 -me500mc, generate code for Freescale e500mc core complex\n"));
1418 fprintf (stream
, _("\
1419 -me500mc64, generate code for Freescale e500mc64 core complex\n"));
1420 fprintf (stream
, _("\
1421 -me5500, generate code for Freescale e5500 core complex\n"));
1422 fprintf (stream
, _("\
1423 -me6500, generate code for Freescale e6500 core complex\n"));
1424 fprintf (stream
, _("\
1425 -mspe generate code for Motorola SPE instructions\n"));
1426 fprintf (stream
, _("\
1427 -mspe2 generate code for Freescale SPE2 instructions\n"));
1428 fprintf (stream
, _("\
1429 -mvle generate code for Freescale VLE instructions\n"));
1430 fprintf (stream
, _("\
1431 -mtitan generate code for AppliedMicro Titan core complex\n"));
1432 fprintf (stream
, _("\
1433 -mregnames Allow symbolic names for registers\n"));
1434 fprintf (stream
, _("\
1435 -mno-regnames Do not allow symbolic names for registers\n"));
1437 fprintf (stream
, _("\
1438 -mrelocatable support for GCC's -mrelocatble option\n"));
1439 fprintf (stream
, _("\
1440 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n"));
1441 fprintf (stream
, _("\
1442 -memb set PPC_EMB bit in ELF flags\n"));
1443 fprintf (stream
, _("\
1444 -mlittle, -mlittle-endian, -le\n\
1445 generate code for a little endian machine\n"));
1446 fprintf (stream
, _("\
1447 -mbig, -mbig-endian, -be\n\
1448 generate code for a big endian machine\n"));
1449 fprintf (stream
, _("\
1450 -msolaris generate code for Solaris\n"));
1451 fprintf (stream
, _("\
1452 -mno-solaris do not generate code for Solaris\n"));
1453 fprintf (stream
, _("\
1454 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n"));
1455 fprintf (stream
, _("\
1456 -V print assembler version number\n"));
1457 fprintf (stream
, _("\
1458 -Qy, -Qn ignored\n"));
1460 fprintf (stream
, _("\
1461 -nops=count when aligning, more than COUNT nops uses a branch\n"));
1462 fprintf (stream
, _("\
1463 -ppc476-workaround warn if emitting data to code sections\n"));
1466 /* Set ppc_cpu if it is not already set. */
1471 const char *default_os
= TARGET_OS
;
1472 const char *default_cpu
= TARGET_CPU
;
1474 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1477 if (target_big_endian
)
1478 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1480 /* The minimum supported cpu for 64-bit little-endian is power8. */
1481 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1482 else if (strncmp (default_os
, "aix", 3) == 0
1483 && default_os
[3] >= '4' && default_os
[3] <= '9')
1484 ppc_cpu
|= PPC_OPCODE_COMMON
;
1485 else if (strncmp (default_os
, "aix3", 4) == 0)
1486 ppc_cpu
|= PPC_OPCODE_POWER
;
1487 else if (strcmp (default_cpu
, "rs6000") == 0)
1488 ppc_cpu
|= PPC_OPCODE_POWER
;
1489 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1490 ppc_cpu
|= PPC_OPCODE_PPC
;
1492 as_fatal (_("unknown default cpu = %s, os = %s"),
1493 default_cpu
, default_os
);
1497 /* Figure out the BFD architecture to use. This function and ppc_mach
1498 are called well before md_begin, when the output file is opened. */
1500 enum bfd_architecture
1503 const char *default_cpu
= TARGET_CPU
;
1506 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1507 return bfd_arch_powerpc
;
1508 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1509 return bfd_arch_powerpc
;
1510 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1511 return bfd_arch_rs6000
;
1512 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1514 if (strcmp (default_cpu
, "rs6000") == 0)
1515 return bfd_arch_rs6000
;
1516 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1517 return bfd_arch_powerpc
;
1520 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1521 return bfd_arch_unknown
;
1528 return bfd_mach_ppc64
;
1529 else if (ppc_arch () == bfd_arch_rs6000
)
1530 return bfd_mach_rs6k
;
1531 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1532 return bfd_mach_ppc_titan
;
1533 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1534 return bfd_mach_ppc_vle
;
1536 return bfd_mach_ppc
;
1540 ppc_target_format (void)
1544 return target_big_endian
? "pe-powerpc" : "pe-powerpcle";
1546 return "xcoff-powermac";
1549 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1551 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1557 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1558 # elif defined (TE_VXWORKS)
1559 return "elf32-powerpc-vxworks";
1561 return (target_big_endian
1562 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1563 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1568 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1569 Return TRUE if there's a problem, otherwise FALSE. */
1572 insn_validate (const struct powerpc_opcode
*op
)
1574 const unsigned char *o
;
1575 uint64_t omask
= op
->mask
;
1577 /* The mask had better not trim off opcode bits. */
1578 if ((op
->opcode
& omask
) != op
->opcode
)
1580 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1584 /* The operands must not overlap the opcode or each other. */
1585 for (o
= op
->operands
; *o
; ++o
)
1587 bfd_boolean optional
= FALSE
;
1588 if (*o
>= num_powerpc_operands
)
1590 as_bad (_("operand index error for %s"), op
->name
);
1596 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1597 if (operand
->shift
== (int) PPC_OPSHIFT_INV
)
1604 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1606 else if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1608 mask
= (*operand
->insert
) (0, val
, ppc_cpu
, &errmsg
);
1610 else if (operand
->shift
>= 0)
1611 mask
= operand
->bitm
<< operand
->shift
;
1613 mask
= operand
->bitm
>> -operand
->shift
;
1616 as_bad (_("operand %d overlap in %s"),
1617 (int) (o
- op
->operands
), op
->name
);
1621 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
1625 as_bad (_("non-optional operand %d follows optional operand in %s"),
1626 (int) (o
- op
->operands
), op
->name
);
1634 /* Insert opcodes and macros into hash tables. Called at startup and
1635 for .machine pseudo. */
1638 ppc_setup_opcodes (void)
1640 const struct powerpc_opcode
*op
;
1641 const struct powerpc_opcode
*op_end
;
1642 const struct powerpc_macro
*macro
;
1643 const struct powerpc_macro
*macro_end
;
1644 bfd_boolean bad_insn
= FALSE
;
1646 if (ppc_hash
!= NULL
)
1647 hash_die (ppc_hash
);
1648 if (ppc_macro_hash
!= NULL
)
1649 hash_die (ppc_macro_hash
);
1651 /* Insert the opcodes into a hash table. */
1652 ppc_hash
= hash_new ();
1654 if (ENABLE_CHECKING
)
1658 /* An index into powerpc_operands is stored in struct fix
1659 fx_pcrel_adjust which is 8 bits wide. */
1660 gas_assert (num_powerpc_operands
< 256);
1662 /* Check operand masks. Code here and in the disassembler assumes
1663 all the 1's in the mask are contiguous. */
1664 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1666 uint64_t mask
= powerpc_operands
[i
].bitm
;
1670 right_bit
= mask
& -mask
;
1672 right_bit
= mask
& -mask
;
1673 if (mask
!= right_bit
)
1675 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1678 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1679 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1680 sizeof (powerpc_operands
[0])) == 0)
1682 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1689 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1690 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1692 if (ENABLE_CHECKING
)
1694 unsigned int new_opcode
= PPC_OP (op
[0].opcode
);
1696 #ifdef PRINT_OPCODE_TABLE
1697 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1698 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1699 new_opcode
, (unsigned long long) op
->opcode
,
1700 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1703 /* The major opcodes had better be sorted. Code in the disassembler
1704 assumes the insns are sorted according to major opcode. */
1705 if (op
!= powerpc_opcodes
1706 && new_opcode
< PPC_OP (op
[-1].opcode
))
1708 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1712 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1714 as_bad (_("%s is enabled by vle flag"), op
->name
);
1717 if (PPC_OP (op
->opcode
) != 4
1718 && PPC_OP (op
->opcode
) != 31
1719 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1721 as_bad (_("%s not disabled by vle flag"), op
->name
);
1724 bad_insn
|= insn_validate (op
);
1727 if ((ppc_cpu
& op
->flags
) != 0
1728 && !(ppc_cpu
& op
->deprecated
))
1732 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1735 as_bad (_("duplicate instruction %s"),
1742 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1743 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1744 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1746 op_end
= prefix_opcodes
+ prefix_num_opcodes
;
1747 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1749 if (ENABLE_CHECKING
)
1751 unsigned int new_opcode
= PPC_PREFIX_SEG (op
[0].opcode
);
1753 #ifdef PRINT_OPCODE_TABLE
1754 printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1755 op
->name
, (unsigned int) (op
- prefix_opcodes
),
1756 new_opcode
, (unsigned long long) op
->opcode
,
1757 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1760 /* The major opcodes had better be sorted. Code in the disassembler
1761 assumes the insns are sorted according to major opcode. */
1762 if (op
!= prefix_opcodes
1763 && new_opcode
< PPC_PREFIX_SEG (op
[-1].opcode
))
1765 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1768 bad_insn
|= insn_validate (op
);
1771 if ((ppc_cpu
& op
->flags
) != 0
1772 && !(ppc_cpu
& op
->deprecated
))
1776 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1779 as_bad (_("duplicate instruction %s"),
1786 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1787 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1788 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1790 op_end
= vle_opcodes
+ vle_num_opcodes
;
1791 for (op
= vle_opcodes
; op
< op_end
; op
++)
1793 if (ENABLE_CHECKING
)
1795 unsigned new_seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1797 #ifdef PRINT_OPCODE_TABLE
1798 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1799 op
->name
, (unsigned int) (op
- vle_opcodes
),
1800 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1801 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1804 /* The major opcodes had better be sorted. Code in the disassembler
1805 assumes the insns are sorted according to major opcode. */
1806 if (op
!= vle_opcodes
1807 && new_seg
< VLE_OP_TO_SEG (VLE_OP (op
[-1].opcode
, op
[-1].mask
)))
1809 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1813 bad_insn
|= insn_validate (op
);
1816 if ((ppc_cpu
& op
->flags
) != 0
1817 && !(ppc_cpu
& op
->deprecated
))
1821 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1824 as_bad (_("duplicate instruction %s"),
1831 /* SPE2 instructions */
1832 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1834 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1835 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1837 if (ENABLE_CHECKING
)
1839 if (op
!= spe2_opcodes
)
1841 unsigned old_seg
, new_seg
;
1843 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1844 old_seg
= VLE_OP_TO_SEG (old_seg
);
1845 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1846 new_seg
= VLE_OP_TO_SEG (new_seg
);
1848 /* The major opcodes had better be sorted. Code in the
1849 disassembler assumes the insns are sorted according to
1851 if (new_seg
< old_seg
)
1853 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1858 bad_insn
|= insn_validate (op
);
1861 if ((ppc_cpu
& op
->flags
) != 0 && !(ppc_cpu
& op
->deprecated
))
1865 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1868 as_bad (_("duplicate instruction %s"),
1875 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1876 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1879 /* Insert the macros into a hash table. */
1880 ppc_macro_hash
= hash_new ();
1882 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1883 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1885 if ((macro
->flags
& ppc_cpu
) != 0 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1889 retval
= hash_insert (ppc_macro_hash
, macro
->name
, (void *) macro
);
1890 if (retval
!= (const char *) NULL
)
1892 as_bad (_("duplicate macro %s"), macro
->name
);
1902 /* This function is called when the assembler starts up. It is called
1903 after the options have been parsed and the output file has been
1911 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1912 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1915 /* Set the ELF flags if desired. */
1916 if (ppc_flags
&& !msolaris
)
1917 bfd_set_private_flags (stdoutput
, ppc_flags
);
1920 ppc_setup_opcodes ();
1922 /* Tell the main code what the endianness is if it is not overridden
1924 if (!set_target_endian
)
1926 set_target_endian
= 1;
1927 target_big_endian
= PPC_BIG_ENDIAN
;
1931 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1933 /* Create dummy symbols to serve as initial csects. This forces the
1934 text csects to precede the data csects. These symbols will not
1936 ppc_text_csects
= symbol_make ("dummy\001");
1937 symbol_get_tc (ppc_text_csects
)->within
= ppc_text_csects
;
1938 ppc_data_csects
= symbol_make ("dummy\001");
1939 symbol_get_tc (ppc_data_csects
)->within
= ppc_data_csects
;
1944 ppc_current_section
= text_section
;
1945 ppc_previous_section
= 0;
1954 if (ppc_apuinfo_list
== NULL
)
1957 /* Ok, so write the section info out. We have this layout:
1961 0 8 length of "APUinfo\0"
1962 4 (n*4) number of APU's (4 bytes each)
1965 20 APU#1 first APU's info
1966 24 APU#2 second APU's info
1971 asection
*seg
= now_seg
;
1972 subsegT subseg
= now_subseg
;
1973 asection
*apuinfo_secp
= (asection
*) NULL
;
1976 /* Create the .PPC.EMB.apuinfo section. */
1977 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1978 bfd_set_section_flags (stdoutput
,
1980 SEC_HAS_CONTENTS
| SEC_READONLY
);
1983 md_number_to_chars (p
, (valueT
) 8, 4);
1986 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1989 md_number_to_chars (p
, (valueT
) 2, 4);
1992 strcpy (p
, APUINFO_LABEL
);
1994 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1997 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
2000 frag_align (2, 0, 0);
2002 /* We probably can't restore the current segment, for there likely
2005 subseg_set (seg
, subseg
);
2010 /* Insert an operand value into an instruction. */
2013 ppc_insert_operand (uint64_t insn
,
2014 const struct powerpc_operand
*operand
,
2020 int64_t min
, max
, right
;
2022 max
= operand
->bitm
;
2026 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
2028 /* Extend the allowed range for addis to [-32768, 65535].
2029 Similarly for cmpli and some VLE high part insns. For 64-bit
2030 it would be good to disable this for signed fields since the
2031 value is sign extended into the high 32 bits of the register.
2032 If the value is, say, an address, then we might care about
2033 the high bits. However, gcc as of 2014-06 uses unsigned
2034 values when loading the high part of 64-bit constants using
2036 min
= ~(max
>> 1) & -right
;
2038 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
2040 max
= (max
>> 1) & -right
;
2041 min
= ~max
& -right
;
2044 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
2047 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
2056 /* Some people write constants with the sign extension done by
2057 hand but only up to 32 bits. This shouldn't really be valid,
2058 but, to permit this code to assemble on a 64-bit host, we
2059 sign extend the 32-bit value to 64 bits if so doing makes the
2060 value valid. We only do this for operands that are 32-bits or
2063 && (operand
->bitm
& ~0xffffffffULL
) == 0
2064 && (val
- (1LL << 32)) >= min
2065 && (val
- (1LL << 32)) <= max
2066 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
2067 val
= val
- (1LL << 32);
2069 /* Similarly, people write expressions like ~(1<<15), and expect
2070 this to be OK for a 32-bit unsigned value. */
2072 && (operand
->bitm
& ~0xffffffffULL
) == 0
2073 && (val
+ (1LL << 32)) >= min
2074 && (val
+ (1LL << 32)) <= max
2075 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
2076 val
= val
+ (1LL << 32);
2080 || (val
& (right
- 1)) != 0)
2081 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
2084 if (operand
->insert
)
2089 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
2090 if (errmsg
!= (const char *) NULL
)
2091 as_bad_where (file
, line
, "%s", errmsg
);
2093 else if (operand
->shift
>= 0)
2094 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2096 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2103 /* Parse @got, etc. and return the desired relocation. */
2104 static bfd_reloc_code_real_type
2105 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
2109 unsigned int length
: 8;
2110 unsigned int valid32
: 1;
2111 unsigned int valid64
: 1;
2120 const struct map_bfd
*ptr
;
2122 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2123 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2124 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2126 static const struct map_bfd mapping
[] = {
2127 MAP ("l", BFD_RELOC_LO16
),
2128 MAP ("h", BFD_RELOC_HI16
),
2129 MAP ("ha", BFD_RELOC_HI16_S
),
2130 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2131 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2132 MAP ("got", BFD_RELOC_16_GOTOFF
),
2133 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2134 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2135 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2136 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2137 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2138 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2139 MAP ("copy", BFD_RELOC_PPC_COPY
),
2140 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2141 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2142 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2143 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2144 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2145 MAP ("tls", BFD_RELOC_PPC_TLS
),
2146 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2147 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2148 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2149 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2150 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2151 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2152 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2153 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2154 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2155 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2156 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2157 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2158 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2159 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2160 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2161 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2162 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2163 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2164 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2165 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2166 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2167 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2168 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2169 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2170 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2171 MAP32 ("fixup", BFD_RELOC_CTOR
),
2172 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2173 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2174 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2175 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2176 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2177 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2178 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2179 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2180 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2181 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2182 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2183 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2184 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2185 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2186 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2187 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2188 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2189 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2190 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2191 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2192 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2193 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2194 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2195 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2196 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2197 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2198 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2199 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2200 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2201 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2202 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2203 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2204 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2205 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2206 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2207 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2208 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2209 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2210 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2211 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2212 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2213 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2214 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2215 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2216 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2217 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2218 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2219 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2220 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2221 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2222 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2223 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC
),
2224 MAP64 ("pcrel", BFD_RELOC_PPC64_PCREL34
),
2225 MAP64 ("got@pcrel", BFD_RELOC_PPC64_GOT_PCREL34
),
2226 MAP64 ("plt@pcrel", BFD_RELOC_PPC64_PLT_PCREL34
),
2227 MAP64 ("higher34", BFD_RELOC_PPC64_ADDR16_HIGHER34
),
2228 MAP64 ("highera34", BFD_RELOC_PPC64_ADDR16_HIGHERA34
),
2229 MAP64 ("highest34", BFD_RELOC_PPC64_ADDR16_HIGHEST34
),
2230 MAP64 ("highesta34", BFD_RELOC_PPC64_ADDR16_HIGHESTA34
),
2231 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2235 return BFD_RELOC_NONE
;
2237 for (ch
= *str
, str2
= ident
;
2238 (str2
< ident
+ sizeof (ident
) - 1
2239 && (ISALNUM (ch
) || ch
== '@'));
2242 *str2
++ = TOLOWER (ch
);
2249 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2250 if (ch
== ptr
->string
[0]
2251 && len
== ptr
->length
2252 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2253 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2255 int reloc
= ptr
->reloc
;
2257 if (!ppc_obj64
&& exp_p
->X_add_number
!= 0)
2261 case BFD_RELOC_16_GOTOFF
:
2262 case BFD_RELOC_LO16_GOTOFF
:
2263 case BFD_RELOC_HI16_GOTOFF
:
2264 case BFD_RELOC_HI16_S_GOTOFF
:
2265 as_warn (_("identifier+constant@got means "
2266 "identifier@got+constant"));
2269 case BFD_RELOC_PPC_GOT_TLSGD16
:
2270 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2271 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2272 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2273 case BFD_RELOC_PPC_GOT_TLSLD16
:
2274 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2275 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2276 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2277 case BFD_RELOC_PPC_GOT_DTPREL16
:
2278 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2279 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2280 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2281 case BFD_RELOC_PPC_GOT_TPREL16
:
2282 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2283 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2284 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2285 as_bad (_("symbol+offset not supported for got tls"));
2290 /* Now check for identifier@suffix+constant. */
2291 if (*str
== '-' || *str
== '+')
2293 char *orig_line
= input_line_pointer
;
2294 expressionS new_exp
;
2296 input_line_pointer
= str
;
2297 expression (&new_exp
);
2298 if (new_exp
.X_op
== O_constant
)
2300 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2301 str
= input_line_pointer
;
2304 if (&input_line_pointer
!= str_p
)
2305 input_line_pointer
= orig_line
;
2309 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2310 && exp_p
->X_op
== O_symbol
2311 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2313 /* Change the symbol so that the dummy .TOC. symbol can be
2314 omitted from the object file. */
2315 exp_p
->X_add_symbol
= &abs_symbol
;
2318 return (bfd_reloc_code_real_type
) reloc
;
2321 return BFD_RELOC_NONE
;
2324 /* Support @got, etc. on constants emitted via .short, .int etc. */
2326 bfd_reloc_code_real_type
2327 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2330 if (nbytes
>= 2 && *input_line_pointer
== '@')
2331 return ppc_elf_suffix (&input_line_pointer
, exp
);
2332 return BFD_RELOC_NONE
;
2335 /* Warn when emitting data to code sections, unless we are emitting
2336 a relocation that ld --ppc476-workaround uses to recognise data
2337 *and* there was an unconditional branch prior to the data. */
2340 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2341 unsigned int nbytes
, fixS
*fix
)
2344 && (now_seg
->flags
& SEC_CODE
) != 0
2347 || !(fix
->fx_r_type
== BFD_RELOC_32
2348 || fix
->fx_r_type
== BFD_RELOC_CTOR
2349 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2350 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2351 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2352 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2353 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2354 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2355 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2356 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2358 /* Flag that we've warned. */
2362 as_warn (_("data in executable section"));
2366 /* Solaris pseduo op to change to the .rodata section. */
2368 ppc_elf_rdata (int xxx
)
2370 char *save_line
= input_line_pointer
;
2371 static char section
[] = ".rodata\n";
2373 /* Just pretend this is .section .rodata */
2374 input_line_pointer
= section
;
2375 obj_elf_section (xxx
);
2377 input_line_pointer
= save_line
;
2380 /* Pseudo op to make file scope bss items. */
2382 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2395 c
= get_symbol_name (&name
);
2397 /* Just after name is now '\0'. */
2398 p
= input_line_pointer
;
2400 SKIP_WHITESPACE_AFTER_NAME ();
2401 if (*input_line_pointer
!= ',')
2403 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2404 ignore_rest_of_line ();
2408 input_line_pointer
++; /* skip ',' */
2409 if ((size
= get_absolute_expression ()) < 0)
2411 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2412 ignore_rest_of_line ();
2416 /* The third argument to .lcomm is the alignment. */
2417 if (*input_line_pointer
!= ',')
2421 ++input_line_pointer
;
2422 align
= get_absolute_expression ();
2425 as_warn (_("ignoring bad alignment"));
2431 symbolP
= symbol_find_or_make (name
);
2434 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2436 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2437 S_GET_NAME (symbolP
));
2438 ignore_rest_of_line ();
2442 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2444 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2445 S_GET_NAME (symbolP
),
2446 (long) S_GET_VALUE (symbolP
),
2449 ignore_rest_of_line ();
2455 old_subsec
= now_subseg
;
2458 /* Convert to a power of 2 alignment. */
2459 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2462 as_bad (_("common alignment not a power of 2"));
2463 ignore_rest_of_line ();
2470 record_alignment (bss_section
, align2
);
2471 subseg_set (bss_section
, 1);
2473 frag_align (align2
, 0, 0);
2474 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2475 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2476 symbol_set_frag (symbolP
, frag_now
);
2477 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2480 S_SET_SIZE (symbolP
, size
);
2481 S_SET_SEGMENT (symbolP
, bss_section
);
2482 subseg_set (old_sec
, old_subsec
);
2483 demand_empty_rest_of_line ();
2486 /* Pseudo op to set symbol local entry point. */
2488 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2491 char c
= get_symbol_name (&name
);
2496 elf_symbol_type
*elfsym
;
2498 p
= input_line_pointer
;
2500 SKIP_WHITESPACE_AFTER_NAME ();
2501 if (*input_line_pointer
!= ',')
2504 as_bad (_("expected comma after name `%s' in .localentry directive"),
2507 ignore_rest_of_line ();
2510 input_line_pointer
++;
2512 if (exp
.X_op
== O_absent
)
2514 as_bad (_("missing expression in .localentry directive"));
2515 exp
.X_op
= O_constant
;
2516 exp
.X_add_number
= 0;
2519 sym
= symbol_find_or_make (name
);
2522 if (resolve_expression (&exp
)
2523 && exp
.X_op
== O_constant
)
2525 unsigned int encoded
, ok
;
2528 if (exp
.X_add_number
== 1 || exp
.X_add_number
== 7)
2529 encoded
= exp
.X_add_number
<< STO_PPC64_LOCAL_BIT
;
2532 encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2533 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2535 as_bad (_(".localentry expression for `%s' "
2536 "is not a valid power of 2"), S_GET_NAME (sym
));
2542 bfdsym
= symbol_get_bfdsym (sym
);
2543 elfsym
= elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
2544 gas_assert (elfsym
);
2545 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2546 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2547 if (ppc_abiversion
== 0)
2552 as_bad (_(".localentry expression for `%s' "
2553 "does not evaluate to a constant"), S_GET_NAME (sym
));
2555 demand_empty_rest_of_line ();
2558 /* Pseudo op to set ABI version. */
2560 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2565 if (exp
.X_op
== O_absent
)
2567 as_bad (_("missing expression in .abiversion directive"));
2568 exp
.X_op
= O_constant
;
2569 exp
.X_add_number
= 0;
2572 if (resolve_expression (&exp
)
2573 && exp
.X_op
== O_constant
)
2574 ppc_abiversion
= exp
.X_add_number
;
2576 as_bad (_(".abiversion expression does not evaluate to a constant"));
2577 demand_empty_rest_of_line ();
2580 /* Parse a .gnu_attribute directive. */
2582 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2584 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2586 /* Check validity of defined powerpc tags. */
2587 if (tag
== Tag_GNU_Power_ABI_FP
2588 || tag
== Tag_GNU_Power_ABI_Vector
2589 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2593 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2595 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2596 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2597 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2598 as_warn (_("unknown .gnu_attribute value"));
2602 /* Set ABI version in output file. */
2606 if (ppc_obj64
&& ppc_abiversion
!= 0)
2608 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2609 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2613 /* Validate any relocations emitted for -mrelocatable, possibly adding
2614 fixups for word relocations in writable segments, so we can adjust
2617 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2619 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2628 case SHLIB_MRELOCATABLE
:
2629 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2630 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2631 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2632 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2633 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2634 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2635 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2636 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2637 && (seg
->flags
& SEC_LOAD
) != 0
2638 && strcmp (segment_name (seg
), ".got2") != 0
2639 && strcmp (segment_name (seg
), ".dtors") != 0
2640 && strcmp (segment_name (seg
), ".ctors") != 0
2641 && strcmp (segment_name (seg
), ".fixup") != 0
2642 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2643 && strcmp (segment_name (seg
), ".eh_frame") != 0
2644 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2646 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2647 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2649 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2650 _("relocation cannot be done when using -mrelocatable"));
2657 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2658 function descriptor sym if the corresponding code sym is used. */
2661 ppc_frob_file_before_adjust (void)
2669 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2675 name
= S_GET_NAME (symp
);
2679 if (! S_IS_WEAK (symp
)
2680 || S_IS_DEFINED (symp
))
2683 dotname
= concat (".", name
, (char *) NULL
);
2684 dotsym
= symbol_find_noref (dotname
, 1);
2686 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2687 || symbol_used_in_reloc_p (dotsym
)))
2688 symbol_mark_used (symp
);
2692 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2694 && toc_reloc_types
!= has_large_toc_reloc
2695 && bfd_section_size (stdoutput
, toc
) > 0x10000)
2696 as_warn (_("TOC section size exceeds 64k"));
2699 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2700 emitted. Other uses of .TOC. will cause the symbol to be marked
2701 with BSF_KEEP in md_apply_fix. */
2704 ppc_elf_adjust_symtab (void)
2709 symp
= symbol_find (".TOC.");
2712 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2713 if ((bsym
->flags
& BSF_KEEP
) == 0)
2714 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2718 #endif /* OBJ_ELF */
2723 * Summary of parse_toc_entry.
2725 * in: Input_line_pointer points to the '[' in one of:
2727 * [toc] [tocv] [toc32] [toc64]
2729 * Anything else is an error of one kind or another.
2732 * return value: success or failure
2733 * toc_kind: kind of toc reference
2734 * input_line_pointer:
2735 * success: first char after the ']'
2736 * failure: unchanged
2740 * [toc] - rv == success, toc_kind = default_toc
2741 * [tocv] - rv == success, toc_kind = data_in_toc
2742 * [toc32] - rv == success, toc_kind = must_be_32
2743 * [toc64] - rv == success, toc_kind = must_be_64
2747 enum toc_size_qualifier
2749 default_toc
, /* The toc cell constructed should be the system default size */
2750 data_in_toc
, /* This is a direct reference to a toc cell */
2751 must_be_32
, /* The toc cell constructed must be 32 bits wide */
2752 must_be_64
/* The toc cell constructed must be 64 bits wide */
2756 parse_toc_entry (enum toc_size_qualifier
*toc_kind
)
2761 enum toc_size_qualifier t
;
2763 /* Save the input_line_pointer. */
2764 start
= input_line_pointer
;
2766 /* Skip over the '[' , and whitespace. */
2767 ++input_line_pointer
;
2770 /* Find the spelling of the operand. */
2771 c
= get_symbol_name (&toc_spec
);
2773 if (strcmp (toc_spec
, "toc") == 0)
2777 else if (strcmp (toc_spec
, "tocv") == 0)
2781 else if (strcmp (toc_spec
, "toc32") == 0)
2785 else if (strcmp (toc_spec
, "toc64") == 0)
2791 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec
);
2792 *input_line_pointer
= c
;
2793 input_line_pointer
= start
;
2797 /* Now find the ']'. */
2798 *input_line_pointer
= c
;
2800 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2801 c
= *input_line_pointer
++; /* input_line_pointer->past char in c. */
2805 as_bad (_("syntax error: expected `]', found `%c'"), c
);
2806 input_line_pointer
= start
;
2815 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2816 /* See whether a symbol is in the TOC section. */
2819 ppc_is_toc_sym (symbolS
*sym
)
2822 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2823 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2826 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2828 return strcmp (sname
, ".toc") == 0;
2830 return strcmp (sname
, ".got") == 0;
2833 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2837 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2839 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2843 /* Check we don't already exist. */
2844 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2845 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2848 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2850 if (ppc_apuinfo_num_alloc
== 0)
2852 ppc_apuinfo_num_alloc
= 4;
2853 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2857 ppc_apuinfo_num_alloc
+= 4;
2858 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2859 ppc_apuinfo_num_alloc
);
2862 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2867 /* Various frobbings of labels and their addresses. */
2869 /* Symbols labelling the current insn. */
2870 struct insn_label_list
2872 struct insn_label_list
*next
;
2876 static struct insn_label_list
*insn_labels
;
2877 static struct insn_label_list
*free_insn_labels
;
2880 ppc_record_label (symbolS
*sym
)
2882 struct insn_label_list
*l
;
2884 if (free_insn_labels
== NULL
)
2885 l
= XNEW (struct insn_label_list
);
2888 l
= free_insn_labels
;
2889 free_insn_labels
= l
->next
;
2893 l
->next
= insn_labels
;
2898 ppc_clear_labels (void)
2900 while (insn_labels
!= NULL
)
2902 struct insn_label_list
*l
= insn_labels
;
2903 insn_labels
= l
->next
;
2904 l
->next
= free_insn_labels
;
2905 free_insn_labels
= l
;
2910 ppc_start_line_hook (void)
2912 ppc_clear_labels ();
2916 ppc_new_dot_label (symbolS
*sym
)
2918 ppc_record_label (sym
);
2920 /* Anchor this label to the current csect for relocations. */
2921 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2926 ppc_frob_label (symbolS
*sym
)
2928 ppc_record_label (sym
);
2931 /* Set the class of a label based on where it is defined. This handles
2932 symbols without suffixes. Also, move the symbol so that it follows
2933 the csect symbol. */
2934 if (ppc_current_csect
!= (symbolS
*) NULL
)
2936 if (symbol_get_tc (sym
)->symbol_class
== -1)
2937 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
2939 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
2940 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
2941 &symbol_rootP
, &symbol_lastP
);
2942 symbol_get_tc (ppc_current_csect
)->within
= sym
;
2943 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2948 dwarf2_emit_label (sym
);
2952 /* We need to keep a list of fixups. We can't simply generate them as
2953 we go, because that would require us to first create the frag, and
2954 that would screw up references to ``.''. */
2960 bfd_reloc_code_real_type reloc
;
2963 #define MAX_INSN_FIXUPS (5)
2965 /* Return the field size operated on by RELOC, and whether it is
2966 pc-relative in PC_RELATIVE. */
2969 fixup_size (bfd_reloc_code_real_type reloc
, bfd_boolean
*pc_relative
)
2971 unsigned int size
= 0;
2972 bfd_boolean pcrel
= FALSE
;
2976 /* This switch statement must handle all BFD_RELOC values
2977 possible in instruction fixups. As is, it handles all
2978 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c,
2979 bfd/coff-ppc, bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
2980 Overkill since data and marker relocs need not be handled
2981 here, but this way we can be sure a needed fixup reloc isn't
2982 accidentally omitted. */
2983 case BFD_RELOC_PPC_EMB_MRKREF
:
2984 case BFD_RELOC_VTABLE_ENTRY
:
2985 case BFD_RELOC_VTABLE_INHERIT
:
2993 case BFD_RELOC_16_BASEREL
:
2994 case BFD_RELOC_16_GOTOFF
:
2995 case BFD_RELOC_GPREL16
:
2996 case BFD_RELOC_HI16
:
2997 case BFD_RELOC_HI16_BASEREL
:
2998 case BFD_RELOC_HI16_GOTOFF
:
2999 case BFD_RELOC_HI16_PLTOFF
:
3000 case BFD_RELOC_HI16_S
:
3001 case BFD_RELOC_HI16_S_BASEREL
:
3002 case BFD_RELOC_HI16_S_GOTOFF
:
3003 case BFD_RELOC_HI16_S_PLTOFF
:
3004 case BFD_RELOC_LO16
:
3005 case BFD_RELOC_LO16_BASEREL
:
3006 case BFD_RELOC_LO16_GOTOFF
:
3007 case BFD_RELOC_LO16_PLTOFF
:
3008 case BFD_RELOC_PPC64_ADDR16_DS
:
3009 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3010 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3011 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
3012 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
3013 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
3014 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
3015 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
3016 case BFD_RELOC_PPC64_DTPREL16_DS
:
3017 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
3018 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
3019 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
3020 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
3021 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
3022 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
3023 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
3024 case BFD_RELOC_PPC64_GOT16_DS
:
3025 case BFD_RELOC_PPC64_GOT16_LO_DS
:
3026 case BFD_RELOC_PPC64_HIGHER
:
3027 case BFD_RELOC_PPC64_HIGHER_S
:
3028 case BFD_RELOC_PPC64_HIGHEST
:
3029 case BFD_RELOC_PPC64_HIGHEST_S
:
3030 case BFD_RELOC_PPC64_PLT16_LO_DS
:
3031 case BFD_RELOC_PPC64_PLTGOT16
:
3032 case BFD_RELOC_PPC64_PLTGOT16_DS
:
3033 case BFD_RELOC_PPC64_PLTGOT16_HA
:
3034 case BFD_RELOC_PPC64_PLTGOT16_HI
:
3035 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3036 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
3037 case BFD_RELOC_PPC64_SECTOFF_DS
:
3038 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
3039 case BFD_RELOC_PPC64_TOC16_DS
:
3040 case BFD_RELOC_PPC64_TOC16_HA
:
3041 case BFD_RELOC_PPC64_TOC16_HI
:
3042 case BFD_RELOC_PPC64_TOC16_LO
:
3043 case BFD_RELOC_PPC64_TOC16_LO_DS
:
3044 case BFD_RELOC_PPC64_TPREL16_DS
:
3045 case BFD_RELOC_PPC64_TPREL16_HIGH
:
3046 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
3047 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
3048 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
3049 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
3050 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
3051 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
3053 case BFD_RELOC_PPC_BA16
:
3055 case BFD_RELOC_PPC_DTPREL16
:
3056 case BFD_RELOC_PPC_DTPREL16_HA
:
3057 case BFD_RELOC_PPC_DTPREL16_HI
:
3058 case BFD_RELOC_PPC_DTPREL16_LO
:
3059 case BFD_RELOC_PPC_EMB_NADDR16
:
3060 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
3061 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
3062 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
3063 case BFD_RELOC_PPC_EMB_RELSDA
:
3064 case BFD_RELOC_PPC_EMB_RELSEC16
:
3065 case BFD_RELOC_PPC_EMB_RELST_LO
:
3066 case BFD_RELOC_PPC_EMB_RELST_HI
:
3067 case BFD_RELOC_PPC_EMB_RELST_HA
:
3068 case BFD_RELOC_PPC_EMB_SDA2I16
:
3069 case BFD_RELOC_PPC_EMB_SDA2REL
:
3070 case BFD_RELOC_PPC_EMB_SDAI16
:
3071 case BFD_RELOC_PPC_GOT_DTPREL16
:
3072 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
3073 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
3074 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3075 case BFD_RELOC_PPC_GOT_TLSGD16
:
3076 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
3077 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
3078 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
3079 case BFD_RELOC_PPC_GOT_TLSLD16
:
3080 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
3081 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
3082 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
3083 case BFD_RELOC_PPC_GOT_TPREL16
:
3084 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
3085 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
3086 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3087 case BFD_RELOC_PPC_TOC16
:
3088 case BFD_RELOC_PPC_TPREL16
:
3089 case BFD_RELOC_PPC_TPREL16_HA
:
3090 case BFD_RELOC_PPC_TPREL16_HI
:
3091 case BFD_RELOC_PPC_TPREL16_LO
:
3095 case BFD_RELOC_16_PCREL
:
3096 case BFD_RELOC_HI16_PCREL
:
3097 case BFD_RELOC_HI16_S_PCREL
:
3098 case BFD_RELOC_LO16_PCREL
:
3099 case BFD_RELOC_PPC64_REL16_HIGH
:
3100 case BFD_RELOC_PPC64_REL16_HIGHA
:
3101 case BFD_RELOC_PPC64_REL16_HIGHER
:
3102 case BFD_RELOC_PPC64_REL16_HIGHER34
:
3103 case BFD_RELOC_PPC64_REL16_HIGHERA
:
3104 case BFD_RELOC_PPC64_REL16_HIGHERA34
:
3105 case BFD_RELOC_PPC64_REL16_HIGHEST
:
3106 case BFD_RELOC_PPC64_REL16_HIGHEST34
:
3107 case BFD_RELOC_PPC64_REL16_HIGHESTA
:
3108 case BFD_RELOC_PPC64_REL16_HIGHESTA34
:
3110 case BFD_RELOC_PPC_B16
:
3112 case BFD_RELOC_PPC_VLE_REL8
:
3117 case BFD_RELOC_16_GOT_PCREL
: /* coff reloc, bad name re size. */
3119 case BFD_RELOC_32_GOTOFF
:
3120 case BFD_RELOC_32_PLTOFF
:
3122 case BFD_RELOC_CTOR
:
3124 case BFD_RELOC_PPC64_ENTRY
:
3125 case BFD_RELOC_PPC_16DX_HA
:
3127 case BFD_RELOC_PPC_BA16
:
3129 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
3130 case BFD_RELOC_PPC_BA16_BRTAKEN
:
3131 case BFD_RELOC_PPC_BA26
:
3132 case BFD_RELOC_PPC_EMB_BIT_FLD
:
3133 case BFD_RELOC_PPC_EMB_NADDR32
:
3134 case BFD_RELOC_PPC_EMB_SDA21
:
3135 case BFD_RELOC_PPC_TLS
:
3136 case BFD_RELOC_PPC_TLSGD
:
3137 case BFD_RELOC_PPC_TLSLD
:
3138 case BFD_RELOC_PPC_VLE_HA16A
:
3139 case BFD_RELOC_PPC_VLE_HA16D
:
3140 case BFD_RELOC_PPC_VLE_HI16A
:
3141 case BFD_RELOC_PPC_VLE_HI16D
:
3142 case BFD_RELOC_PPC_VLE_LO16A
:
3143 case BFD_RELOC_PPC_VLE_LO16D
:
3144 case BFD_RELOC_PPC_VLE_SDA21
:
3145 case BFD_RELOC_PPC_VLE_SDA21_LO
:
3146 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3147 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
3148 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3149 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
3150 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3151 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
3156 case BFD_RELOC_24_PLT_PCREL
:
3157 case BFD_RELOC_32_PCREL
:
3158 case BFD_RELOC_32_PLT_PCREL
:
3159 case BFD_RELOC_PPC64_REL24_NOTOC
:
3161 case BFD_RELOC_PPC_B16
:
3163 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3164 case BFD_RELOC_PPC_B16_BRTAKEN
:
3165 case BFD_RELOC_PPC_B26
:
3166 case BFD_RELOC_PPC_LOCAL24PC
:
3167 case BFD_RELOC_PPC_REL16DX_HA
:
3168 case BFD_RELOC_PPC_VLE_REL15
:
3169 case BFD_RELOC_PPC_VLE_REL24
:
3175 case BFD_RELOC_CTOR
:
3177 case BFD_RELOC_PPC_COPY
:
3178 case BFD_RELOC_PPC_DTPMOD
:
3179 case BFD_RELOC_PPC_DTPREL
:
3180 case BFD_RELOC_PPC_GLOB_DAT
:
3181 case BFD_RELOC_PPC_TPREL
:
3182 size
= ppc_obj64
? 8 : 4;
3186 case BFD_RELOC_64_PLTOFF
:
3187 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
3188 case BFD_RELOC_PPC64_D28
:
3189 case BFD_RELOC_PPC64_D34
:
3190 case BFD_RELOC_PPC64_D34_LO
:
3191 case BFD_RELOC_PPC64_D34_HI30
:
3192 case BFD_RELOC_PPC64_D34_HA30
:
3193 case BFD_RELOC_PPC64_TOC
:
3197 case BFD_RELOC_64_PCREL
:
3198 case BFD_RELOC_64_PLT_PCREL
:
3199 case BFD_RELOC_PPC64_GOT_PCREL34
:
3200 case BFD_RELOC_PPC64_PCREL28
:
3201 case BFD_RELOC_PPC64_PCREL34
:
3202 case BFD_RELOC_PPC64_PLT_PCREL34
:
3211 if (ENABLE_CHECKING
)
3213 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
3214 if (reloc_howto
!= NULL
3215 && (size
!= bfd_get_reloc_size (reloc_howto
)
3216 || pcrel
!= reloc_howto
->pc_relative
))
3218 as_bad (_("%s howto doesn't match size/pcrel in gas"),
3223 *pc_relative
= pcrel
;
3228 /* If we have parsed a call to __tls_get_addr, parse an argument like
3229 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg
3230 is successfully parsed, *STR is updated past the trailing
3231 parenthesis and trailing white space, and *TLS_FIX contains the
3232 reloc and arg expression. */
3235 parse_tls_arg (char **str
, const expressionS
*exp
, struct ppc_fixup
*tls_fix
)
3237 const char *sym_name
= S_GET_NAME (exp
->X_add_symbol
);
3238 if (sym_name
[0] == '.')
3241 tls_fix
->reloc
= BFD_RELOC_NONE
;
3242 if (strcasecmp (sym_name
, "__tls_get_addr") == 0)
3244 char *hold
= input_line_pointer
;
3245 input_line_pointer
= *str
+ 1;
3246 expression (&tls_fix
->exp
);
3247 if (tls_fix
->exp
.X_op
== O_symbol
)
3249 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3250 tls_fix
->reloc
= BFD_RELOC_PPC_TLSGD
;
3251 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3252 tls_fix
->reloc
= BFD_RELOC_PPC_TLSLD
;
3253 if (tls_fix
->reloc
!= BFD_RELOC_NONE
)
3255 input_line_pointer
+= 7;
3257 *str
= input_line_pointer
;
3260 input_line_pointer
= hold
;
3262 return tls_fix
->reloc
!= BFD_RELOC_NONE
;
3266 /* This routine is called for each instruction to be assembled. */
3269 md_assemble (char *str
)
3272 const struct powerpc_opcode
*opcode
;
3274 const unsigned char *opindex_ptr
;
3277 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
3282 unsigned int insn_length
;
3284 /* Get the opcode. */
3285 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
3290 /* Look up the opcode in the hash table. */
3291 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, str
);
3292 if (opcode
== (const struct powerpc_opcode
*) NULL
)
3294 const struct powerpc_macro
*macro
;
3296 macro
= (const struct powerpc_macro
*) hash_find (ppc_macro_hash
, str
);
3297 if (macro
== (const struct powerpc_macro
*) NULL
)
3298 as_bad (_("unrecognized opcode: `%s'"), str
);
3300 ppc_macro (s
, macro
);
3302 ppc_clear_labels ();
3306 insn
= opcode
->opcode
;
3309 while (ISSPACE (*str
))
3312 /* PowerPC operands are just expressions. The only real issue is
3313 that a few operand types are optional. If an instruction has
3314 multiple optional operands and one is omitted, then all optional
3315 operands past the first omitted one must also be omitted. */
3316 int num_optional_operands
= 0;
3317 int num_optional_provided
= 0;
3319 /* Gather the operands. */
3323 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
3325 const struct powerpc_operand
*operand
;
3331 if (next_opindex
== 0)
3332 operand
= &powerpc_operands
[*opindex_ptr
];
3335 operand
= &powerpc_operands
[next_opindex
];
3340 /* If this is an optional operand, and we are skipping it, just
3341 insert the default value, usually a zero. */
3342 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3343 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
3345 if (num_optional_operands
== 0)
3347 const unsigned char *optr
;
3353 for (optr
= opindex_ptr
; *optr
!= 0; optr
++)
3355 const struct powerpc_operand
*op
;
3356 op
= &powerpc_operands
[*optr
];
3360 if ((op
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3361 && !((op
->flags
& PPC_OPERAND_OPTIONAL32
) != 0
3363 ++num_optional_operands
;
3365 if (s
!= NULL
&& *s
!= '\0')
3369 /* Look for the start of the next operand. */
3370 if ((op
->flags
& PPC_OPERAND_PARENS
) != 0)
3371 s
= strpbrk (s
, "(,");
3373 s
= strchr (s
, ',');
3379 omitted
= total
- provided
;
3380 num_optional_provided
= num_optional_operands
- omitted
;
3382 if (--num_optional_provided
< 0)
3384 int64_t val
= ppc_optional_operand_value (operand
, insn
, ppc_cpu
,
3385 num_optional_provided
);
3386 if (operand
->insert
)
3388 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
3389 if (errmsg
!= (const char *) NULL
)
3390 as_bad ("%s", errmsg
);
3392 else if (operand
->shift
>= 0)
3393 insn
|= (val
& operand
->bitm
) << operand
->shift
;
3395 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
3397 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
3398 next_opindex
= *opindex_ptr
+ 1;
3403 /* Gather the operand. */
3404 hold
= input_line_pointer
;
3405 input_line_pointer
= str
;
3408 if (*input_line_pointer
== '[')
3410 /* We are expecting something like the second argument here:
3412 * lwz r4,[toc].GS.0.static_int(rtoc)
3413 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
3414 * The argument following the `]' must be a symbol name, and the
3415 * register must be the toc register: 'rtoc' or '2'
3417 * The effect is to 0 as the displacement field
3418 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
3419 * the appropriate variation) reloc against it based on the symbol.
3420 * The linker will build the toc, and insert the resolved toc offset.
3423 * o The size of the toc entry is currently assumed to be
3424 * 32 bits. This should not be assumed to be a hard coded
3426 * o In an effort to cope with a change from 32 to 64 bits,
3427 * there are also toc entries that are specified to be
3428 * either 32 or 64 bits:
3429 * lwz r4,[toc32].GS.0.static_int(rtoc)
3430 * lwz r4,[toc64].GS.0.static_int(rtoc)
3431 * These demand toc entries of the specified size, and the
3432 * instruction probably requires it.
3436 enum toc_size_qualifier toc_kind
;
3437 bfd_reloc_code_real_type toc_reloc
;
3439 /* Go parse off the [tocXX] part. */
3440 valid_toc
= parse_toc_entry (&toc_kind
);
3444 ignore_rest_of_line ();
3448 /* Now get the symbol following the ']'. */
3454 /* In this case, we may not have seen the symbol yet,
3455 since it is allowed to appear on a .extern or .globl
3456 or just be a label in the .data section. */
3457 toc_reloc
= BFD_RELOC_PPC_TOC16
;
3460 /* 1. The symbol must be defined and either in the toc
3461 section, or a global.
3462 2. The reloc generated must have the TOCDEFN flag set
3463 in upper bit mess of the reloc type.
3464 FIXME: It's a little confusing what the tocv
3465 qualifier can be used for. At the very least, I've
3466 seen three uses, only one of which I'm sure I can
3468 if (ex
.X_op
== O_symbol
)
3470 gas_assert (ex
.X_add_symbol
!= NULL
);
3471 if (symbol_get_bfdsym (ex
.X_add_symbol
)->section
3474 as_bad (_("[tocv] symbol is not a toc symbol"));
3478 toc_reloc
= BFD_RELOC_PPC_TOC16
;
3481 /* FIXME: these next two specifically specify 32/64 bit
3482 toc entries. We don't support them today. Is this
3483 the right way to say that? */
3484 toc_reloc
= BFD_RELOC_NONE
;
3485 as_bad (_("unimplemented toc32 expression modifier"));
3488 /* FIXME: see above. */
3489 toc_reloc
= BFD_RELOC_NONE
;
3490 as_bad (_("unimplemented toc64 expression modifier"));
3494 _("Unexpected return value [%d] from parse_toc_entry!\n"),
3500 /* We need to generate a fixup for this expression. */
3501 if (fc
>= MAX_INSN_FIXUPS
)
3502 as_fatal (_("too many fixups"));
3504 fixups
[fc
].reloc
= toc_reloc
;
3505 fixups
[fc
].exp
= ex
;
3506 fixups
[fc
].opindex
= *opindex_ptr
;
3509 /* Ok. We've set up the fixup for the instruction. Now make it
3510 look like the constant 0 was found here. */
3512 ex
.X_op
= O_constant
;
3513 ex
.X_add_number
= 0;
3514 ex
.X_add_symbol
= NULL
;
3515 ex
.X_op_symbol
= NULL
;
3522 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3523 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
3524 || !register_name (&ex
))
3526 char save_lex
= lex_type
['%'];
3528 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
3529 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3532 lex_type
['%'] |= LEX_BEGIN_NAME
;
3536 lex_type
['%'] = save_lex
;
3540 str
= input_line_pointer
;
3541 input_line_pointer
= hold
;
3543 if (ex
.X_op
== O_illegal
)
3544 as_bad (_("illegal operand"));
3545 else if (ex
.X_op
== O_absent
)
3546 as_bad (_("missing operand"));
3547 else if (ex
.X_op
== O_register
)
3551 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3552 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3553 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
)) != 0
3554 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3555 && ex
.X_add_number
!= 0
3556 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3557 as_warn (_("invalid register expression"));
3558 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3559 ppc_cpu
, (char *) NULL
, 0);
3561 else if (ex
.X_op
== O_constant
)
3564 /* Allow @HA, @L, @H on constants. */
3565 bfd_reloc_code_real_type reloc
;
3566 char *orig_str
= str
;
3568 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3575 case BFD_RELOC_LO16
:
3576 ex
.X_add_number
&= 0xffff;
3577 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3578 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3581 case BFD_RELOC_HI16
:
3582 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3584 /* PowerPC64 @h is tested for overflow. */
3585 ex
.X_add_number
= (addressT
) ex
.X_add_number
>> 16;
3586 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3588 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3590 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3596 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3597 ex
.X_add_number
= PPC_HI (ex
.X_add_number
);
3598 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3599 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3602 case BFD_RELOC_HI16_S
:
3603 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3605 /* PowerPC64 @ha is tested for overflow. */
3607 = ((addressT
) ex
.X_add_number
+ 0x8000) >> 16;
3608 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3610 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3612 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3618 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3619 ex
.X_add_number
= PPC_HA (ex
.X_add_number
);
3620 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3621 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3624 case BFD_RELOC_PPC64_HIGHER
:
3625 ex
.X_add_number
= PPC_HIGHER (ex
.X_add_number
);
3626 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3627 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3630 case BFD_RELOC_PPC64_HIGHER_S
:
3631 ex
.X_add_number
= PPC_HIGHERA (ex
.X_add_number
);
3632 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3633 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3636 case BFD_RELOC_PPC64_HIGHEST
:
3637 ex
.X_add_number
= PPC_HIGHEST (ex
.X_add_number
);
3638 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3639 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3642 case BFD_RELOC_PPC64_HIGHEST_S
:
3643 ex
.X_add_number
= PPC_HIGHESTA (ex
.X_add_number
);
3644 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3645 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3648 #endif /* OBJ_ELF */
3649 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3650 ppc_cpu
, (char *) NULL
, 0);
3654 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3656 /* Look for a __tls_get_addr arg using the insane old syntax. */
3657 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3658 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3660 fixups
[fc
].opindex
= *opindex_ptr
;
3664 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3666 /* If VLE-mode convert LO/HI/HA relocations. */
3667 if (opcode
->flags
& PPC_OPCODE_VLE
)
3669 uint64_t tmp_insn
= insn
& opcode
->mask
;
3671 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3672 || tmp_insn
== E_AND2I_DOT_INSN
3673 || tmp_insn
== E_OR2IS_INSN
3674 || tmp_insn
== E_LI_INSN
3675 || tmp_insn
== E_LIS_INSN
3676 || tmp_insn
== E_AND2IS_DOT_INSN
);
3679 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3680 || tmp_insn
== E_ADD2IS_INSN
3681 || tmp_insn
== E_CMP16I_INSN
3682 || tmp_insn
== E_MULL2I_INSN
3683 || tmp_insn
== E_CMPL16I_INSN
3684 || tmp_insn
== E_CMPH16I_INSN
3685 || tmp_insn
== E_CMPHL16I_INSN
);
3692 case BFD_RELOC_PPC_EMB_SDA21
:
3693 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3696 case BFD_RELOC_LO16
:
3698 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3699 else if (use_a_reloc
)
3700 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3703 case BFD_RELOC_HI16
:
3705 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3706 else if (use_a_reloc
)
3707 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3710 case BFD_RELOC_HI16_S
:
3712 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3713 else if (use_a_reloc
)
3714 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3717 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3719 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3722 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3724 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3727 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3729 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3734 /* TLS and other tweaks. */
3740 case BFD_RELOC_PPC_TLS
:
3741 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3742 as_bad (_("@tls may not be used with \"%s\" operands"),
3744 else if (operand
->shift
!= 11)
3745 as_bad (_("@tls may only be used in last operand"));
3747 insn
= ppc_insert_operand (insn
, operand
,
3749 ppc_cpu
, (char *) NULL
, 0);
3752 /* We'll only use the 32 (or 64) bit form of these relocations
3753 in constants. Instructions get the 16 bit form. */
3754 case BFD_RELOC_PPC_DTPREL
:
3755 reloc
= BFD_RELOC_PPC_DTPREL16
;
3758 case BFD_RELOC_PPC_TPREL
:
3759 reloc
= BFD_RELOC_PPC_TPREL16
;
3762 case BFD_RELOC_PPC64_PCREL34
:
3763 if (operand
->bitm
== 0xfffffffULL
)
3765 reloc
= BFD_RELOC_PPC64_PCREL28
;
3769 case BFD_RELOC_PPC64_GOT_PCREL34
:
3770 case BFD_RELOC_PPC64_PLT_PCREL34
:
3771 if (operand
->bitm
!= 0x3ffffffffULL
3772 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3773 as_warn (_("%s unsupported on this instruction"), "@pcrel");
3776 case BFD_RELOC_LO16
:
3777 if (operand
->bitm
== 0x3ffffffffULL
3778 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3779 reloc
= BFD_RELOC_PPC64_D34_LO
;
3780 else if ((operand
->bitm
| 0xf) != 0xffff
3781 || operand
->shift
!= 0
3782 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3783 as_warn (_("%s unsupported on this instruction"), "@l");
3786 case BFD_RELOC_HI16
:
3787 if (operand
->bitm
== 0x3ffffffffULL
3788 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3789 reloc
= BFD_RELOC_PPC64_D34_HI30
;
3790 else if (operand
->bitm
!= 0xffff
3791 || operand
->shift
!= 0
3792 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3793 as_warn (_("%s unsupported on this instruction"), "@h");
3796 case BFD_RELOC_HI16_S
:
3797 if (operand
->bitm
== 0x3ffffffffULL
3798 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3799 reloc
= BFD_RELOC_PPC64_D34_HA30
;
3800 else if (operand
->bitm
== 0xffff
3801 && operand
->shift
== (int) PPC_OPSHIFT_INV
3802 && opcode
->opcode
== (19 << 26) + (2 << 1))
3804 reloc
= BFD_RELOC_PPC_16DX_HA
;
3805 else if (operand
->bitm
!= 0xffff
3806 || operand
->shift
!= 0
3807 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3808 as_warn (_("%s unsupported on this instruction"), "@ha");
3811 #endif /* OBJ_ELF */
3813 if (reloc
!= BFD_RELOC_NONE
)
3815 /* Determine a BFD reloc value based on the operand information.
3816 We are only prepared to turn a few of the operands into
3818 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3819 | PPC_OPERAND_ABSOLUTE
)) != 0
3820 && operand
->bitm
== 0x3fffffc
3821 && operand
->shift
== 0)
3822 reloc
= BFD_RELOC_PPC_B26
;
3823 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3824 | PPC_OPERAND_ABSOLUTE
)) != 0
3825 && operand
->bitm
== 0xfffc
3826 && operand
->shift
== 0)
3827 reloc
= BFD_RELOC_PPC_B16
;
3828 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3829 && operand
->bitm
== 0x1fe
3830 && operand
->shift
== -1)
3831 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3832 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3833 && operand
->bitm
== 0xfffe
3834 && operand
->shift
== 0)
3835 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3836 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3837 && operand
->bitm
== 0x1fffffe
3838 && operand
->shift
== 0)
3839 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3840 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3841 && (operand
->bitm
& 0xfff0) == 0xfff0
3842 && operand
->shift
== 0)
3844 reloc
= BFD_RELOC_16
;
3845 #if defined OBJ_XCOFF || defined OBJ_ELF
3846 /* Note: the symbol may be not yet defined. */
3847 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3848 && ppc_is_toc_sym (ex
.X_add_symbol
))
3850 reloc
= BFD_RELOC_PPC_TOC16
;
3852 as_warn (_("assuming %s on symbol"),
3853 ppc_obj64
? "@toc" : "@xgot");
3858 else if (operand
->bitm
== 0x3ffffffffULL
)
3859 reloc
= BFD_RELOC_PPC64_D34
;
3860 else if (operand
->bitm
== 0xfffffffULL
)
3861 reloc
= BFD_RELOC_PPC64_D28
;
3863 /* For the absolute forms of branches, convert the PC
3864 relative form back into the absolute. */
3865 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3869 case BFD_RELOC_PPC_B26
:
3870 reloc
= BFD_RELOC_PPC_BA26
;
3872 case BFD_RELOC_PPC_B16
:
3873 reloc
= BFD_RELOC_PPC_BA16
;
3876 case BFD_RELOC_PPC_B16_BRTAKEN
:
3877 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3879 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3880 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3891 case BFD_RELOC_PPC_TOC16
:
3892 toc_reloc_types
|= has_small_toc_reloc
;
3894 case BFD_RELOC_PPC64_TOC16_LO
:
3895 case BFD_RELOC_PPC64_TOC16_HI
:
3896 case BFD_RELOC_PPC64_TOC16_HA
:
3897 toc_reloc_types
|= has_large_toc_reloc
;
3904 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3909 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3912 case BFD_RELOC_LO16
:
3913 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3916 case BFD_RELOC_16_GOTOFF
:
3917 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3920 case BFD_RELOC_LO16_GOTOFF
:
3921 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3924 case BFD_RELOC_LO16_PLTOFF
:
3925 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3928 case BFD_RELOC_16_BASEREL
:
3929 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3932 case BFD_RELOC_LO16_BASEREL
:
3933 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3936 case BFD_RELOC_PPC_TOC16
:
3937 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3940 case BFD_RELOC_PPC64_TOC16_LO
:
3941 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3944 case BFD_RELOC_PPC64_PLTGOT16
:
3945 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3948 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3949 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3952 case BFD_RELOC_PPC_DTPREL16
:
3953 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3956 case BFD_RELOC_PPC_DTPREL16_LO
:
3957 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3960 case BFD_RELOC_PPC_TPREL16
:
3961 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3964 case BFD_RELOC_PPC_TPREL16_LO
:
3965 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3968 case BFD_RELOC_PPC_GOT_DTPREL16
:
3969 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3970 case BFD_RELOC_PPC_GOT_TPREL16
:
3971 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3975 as_bad (_("unsupported relocation for DS offset field"));
3980 /* Look for a __tls_get_addr arg after any __tls_get_addr
3981 modifiers like @plt. This fixup must be emitted before
3982 the usual call fixup. */
3983 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3984 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3986 fixups
[fc
].opindex
= *opindex_ptr
;
3991 /* We need to generate a fixup for this expression. */
3992 if (fc
>= MAX_INSN_FIXUPS
)
3993 as_fatal (_("too many fixups"));
3994 fixups
[fc
].exp
= ex
;
3995 fixups
[fc
].opindex
= *opindex_ptr
;
3996 fixups
[fc
].reloc
= reloc
;
4004 /* If expecting more operands, then we want to see "),". */
4005 if (*str
== endc
&& opindex_ptr
[1] != 0)
4009 while (ISSPACE (*str
));
4013 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
4018 /* The call to expression should have advanced str past any
4026 else if (*str
!= '\0')
4028 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
4031 else if (endc
== ')')
4033 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
4038 while (ISSPACE (*str
))
4042 as_bad (_("junk at end of line: `%s'"), str
);
4045 /* Do we need/want an APUinfo section? */
4046 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
4049 /* These are all version "1". */
4050 if (opcode
->flags
& PPC_OPCODE_SPE
)
4051 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
4052 if (opcode
->flags
& PPC_OPCODE_ISEL
)
4053 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
4054 if (opcode
->flags
& PPC_OPCODE_EFS
)
4055 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
4056 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
4057 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
4058 if (opcode
->flags
& PPC_OPCODE_PMR
)
4059 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
4060 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
4061 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
4062 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
4063 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
4064 /* Only set the VLE flag if the instruction has been pulled via
4065 the VLE instruction set. This way the flag is guaranteed to
4066 be set for VLE-only instructions or for VLE-only processors,
4067 however it'll remain clear for dual-mode instructions on
4068 dual-mode and, more importantly, standard-mode processors. */
4069 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
4071 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
4072 if (elf_section_data (now_seg
) != NULL
)
4073 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
4078 /* Write out the instruction. */
4081 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
4082 /* All instructions can start on a 2 byte boundary for VLE. */
4085 if (frag_now
->insn_addr
!= addr_mask
)
4087 /* Don't emit instructions to a frag started for data, or for a
4088 CPU differing in VLE mode. Data is allowed to be misaligned,
4089 and it's possible to start a new frag in the middle of
4091 frag_wane (frag_now
);
4095 /* Check that insns within the frag are aligned. ppc_frag_check
4096 will ensure that the frag start address is aligned. */
4097 if ((frag_now_fix () & addr_mask
) != 0)
4098 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
4100 /* Differentiate between two, four, and eight byte insns. */
4102 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
4104 else if ((opcode
->flags
& PPC_OPCODE_POWERXX
) != 0
4105 && PPC_PREFIX_P (insn
))
4107 struct insn_label_list
*l
;
4111 /* 8-byte prefix instructions are not allowed to cross 64-byte
4113 frag_align_code (6, 4);
4114 record_alignment (now_seg
, 6);
4116 /* Update "dot" in any expressions used by this instruction, and
4117 a label attached to the instruction. By "attached" we mean
4118 on the same source line as the instruction and without any
4119 intervening semicolons. */
4120 dot_value
= frag_now_fix ();
4121 dot_frag
= frag_now
;
4122 for (l
= insn_labels
; l
!= NULL
; l
= l
->next
)
4124 symbol_set_frag (l
->label
, dot_frag
);
4125 S_SET_VALUE (l
->label
, dot_value
);
4129 ppc_clear_labels ();
4131 f
= frag_more (insn_length
);
4132 frag_now
->insn_addr
= addr_mask
;
4134 /* The prefix part of an 8-byte instruction always occupies the lower
4135 addressed word in a doubleword, regardless of endianness. */
4136 if (!target_big_endian
&& insn_length
== 8)
4138 md_number_to_chars (f
, PPC_GET_PREFIX (insn
), 4);
4139 md_number_to_chars (f
+ 4, PPC_GET_SUFFIX (insn
), 4);
4142 md_number_to_chars (f
, insn
, insn_length
);
4146 last_subseg
= now_subseg
;
4149 dwarf2_emit_insn (insn_length
);
4152 /* Create any fixups. */
4153 for (i
= 0; i
< fc
; i
++)
4156 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
4159 unsigned int size
= fixup_size (fixups
[i
].reloc
, &pcrel
);
4160 int offset
= target_big_endian
? (insn_length
- size
) : 0;
4162 fixP
= fix_new_exp (frag_now
,
4163 f
- frag_now
->fr_literal
+ offset
,
4171 const struct powerpc_operand
*operand
;
4173 operand
= &powerpc_operands
[fixups
[i
].opindex
];
4174 fixP
= fix_new_exp (frag_now
,
4175 f
- frag_now
->fr_literal
,
4178 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
4181 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
4185 /* Handle a macro. Gather all the operands, transform them as
4186 described by the macro, and call md_assemble recursively. All the
4187 operands are separated by commas; we don't accept parentheses
4188 around operands here. */
4191 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
4202 /* Gather the users operands into the operands array. */
4207 if (count
>= sizeof operands
/ sizeof operands
[0])
4209 operands
[count
++] = s
;
4210 s
= strchr (s
, ',');
4211 if (s
== (char *) NULL
)
4216 if (count
!= macro
->operands
)
4218 as_bad (_("wrong number of operands"));
4222 /* Work out how large the string must be (the size is unbounded
4223 because it includes user input). */
4225 format
= macro
->format
;
4226 while (*format
!= '\0')
4235 arg
= strtol (format
+ 1, &send
, 10);
4236 know (send
!= format
&& arg
< count
);
4237 len
+= strlen (operands
[arg
]);
4242 /* Put the string together. */
4243 complete
= s
= XNEWVEC (char, len
+ 1);
4244 format
= macro
->format
;
4245 while (*format
!= '\0')
4251 arg
= strtol (format
+ 1, &send
, 10);
4252 strcpy (s
, operands
[arg
]);
4259 /* Assemble the constructed instruction. */
4260 md_assemble (complete
);
4265 /* For ELF, add support for SHT_ORDERED. */
4268 ppc_section_type (char *str
, size_t len
)
4270 if (len
== 7 && strncmp (str
, "ordered", 7) == 0)
4277 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
4279 if (type
== SHT_ORDERED
)
4280 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
4286 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
4291 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
4294 #endif /* OBJ_ELF */
4297 /* Pseudo-op handling. */
4299 /* The .byte pseudo-op. This is similar to the normal .byte
4300 pseudo-op, but it can also take a single ASCII string. */
4303 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
4307 if (*input_line_pointer
!= '\"')
4313 /* Gather characters. A real double quote is doubled. Unusual
4314 characters are not permitted. */
4315 ++input_line_pointer
;
4320 c
= *input_line_pointer
++;
4324 if (*input_line_pointer
!= '\"')
4326 ++input_line_pointer
;
4329 FRAG_APPEND_1_CHAR (c
);
4333 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
4334 as_warn (_("data in executable section"));
4335 demand_empty_rest_of_line ();
4340 /* XCOFF specific pseudo-op handling. */
4342 /* This is set if we are creating a .stabx symbol, since we don't want
4343 to handle symbol suffixes for such symbols. */
4344 static bfd_boolean ppc_stab_symbol
;
4346 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
4347 symbols in the .bss segment as though they were local common
4348 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
4349 aligns .comm and .lcomm to 4 bytes. */
4352 ppc_comm (int lcomm
)
4354 asection
*current_seg
= now_seg
;
4355 subsegT current_subseg
= now_subseg
;
4361 symbolS
*lcomm_sym
= NULL
;
4365 endc
= get_symbol_name (&name
);
4366 end_name
= input_line_pointer
;
4367 (void) restore_line_pointer (endc
);
4369 if (*input_line_pointer
!= ',')
4371 as_bad (_("missing size"));
4372 ignore_rest_of_line ();
4375 ++input_line_pointer
;
4377 size
= get_absolute_expression ();
4380 as_bad (_("negative size"));
4381 ignore_rest_of_line ();
4387 /* The third argument to .comm is the alignment. */
4388 if (*input_line_pointer
!= ',')
4392 ++input_line_pointer
;
4393 align
= get_absolute_expression ();
4396 as_warn (_("ignoring bad alignment"));
4406 /* The third argument to .lcomm appears to be the real local
4407 common symbol to create. References to the symbol named in
4408 the first argument are turned into references to the third
4410 if (*input_line_pointer
!= ',')
4412 as_bad (_("missing real symbol name"));
4413 ignore_rest_of_line ();
4416 ++input_line_pointer
;
4418 lcomm_endc
= get_symbol_name (&lcomm_name
);
4420 lcomm_sym
= symbol_find_or_make (lcomm_name
);
4422 (void) restore_line_pointer (lcomm_endc
);
4424 /* The fourth argument to .lcomm is the alignment. */
4425 if (*input_line_pointer
!= ',')
4434 ++input_line_pointer
;
4435 align
= get_absolute_expression ();
4438 as_warn (_("ignoring bad alignment"));
4445 sym
= symbol_find_or_make (name
);
4448 if (S_IS_DEFINED (sym
)
4449 || S_GET_VALUE (sym
) != 0)
4451 as_bad (_("attempt to redefine symbol"));
4452 ignore_rest_of_line ();
4456 record_alignment (bss_section
, align
);
4459 || ! S_IS_DEFINED (lcomm_sym
))
4468 S_SET_EXTERNAL (sym
);
4472 symbol_get_tc (lcomm_sym
)->output
= 1;
4473 def_sym
= lcomm_sym
;
4477 subseg_set (bss_section
, 1);
4478 frag_align (align
, 0, 0);
4480 symbol_set_frag (def_sym
, frag_now
);
4481 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
4482 def_size
, (char *) NULL
);
4484 S_SET_SEGMENT (def_sym
, bss_section
);
4485 symbol_get_tc (def_sym
)->align
= align
;
4489 /* Align the size of lcomm_sym. */
4490 symbol_get_frag (lcomm_sym
)->fr_offset
=
4491 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
4492 &~ ((1 << align
) - 1));
4493 if (align
> symbol_get_tc (lcomm_sym
)->align
)
4494 symbol_get_tc (lcomm_sym
)->align
= align
;
4499 /* Make sym an offset from lcomm_sym. */
4500 S_SET_SEGMENT (sym
, bss_section
);
4501 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
4502 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
4503 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
4506 subseg_set (current_seg
, current_subseg
);
4508 demand_empty_rest_of_line ();
4511 /* The .csect pseudo-op. This switches us into a different
4512 subsegment. The first argument is a symbol whose value is the
4513 start of the .csect. In COFF, csect symbols get special aux
4514 entries defined by the x_csect field of union internal_auxent. The
4515 optional second argument is the alignment (the default is 2). */
4518 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
4525 endc
= get_symbol_name (&name
);
4527 sym
= symbol_find_or_make (name
);
4529 (void) restore_line_pointer (endc
);
4531 if (S_GET_NAME (sym
)[0] == '\0')
4533 /* An unnamed csect is assumed to be [PR]. */
4534 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
4538 if (*input_line_pointer
== ',')
4540 ++input_line_pointer
;
4541 align
= get_absolute_expression ();
4544 ppc_change_csect (sym
, align
);
4546 demand_empty_rest_of_line ();
4549 /* Change to a different csect. */
4552 ppc_change_csect (symbolS
*sym
, offsetT align
)
4554 if (S_IS_DEFINED (sym
))
4555 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
4565 /* This is a new csect. We need to look at the symbol class to
4566 figure out whether it should go in the text section or the
4570 switch (symbol_get_tc (sym
)->symbol_class
)
4580 S_SET_SEGMENT (sym
, text_section
);
4581 symbol_get_tc (sym
)->subseg
= ppc_text_subsegment
;
4582 ++ppc_text_subsegment
;
4583 list_ptr
= &ppc_text_csects
;
4593 if (ppc_toc_csect
!= NULL
4594 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4595 == ppc_data_subsegment
))
4597 S_SET_SEGMENT (sym
, data_section
);
4598 symbol_get_tc (sym
)->subseg
= ppc_data_subsegment
;
4599 ++ppc_data_subsegment
;
4600 list_ptr
= &ppc_data_csects
;
4606 /* We set the obstack chunk size to a small value before
4607 changing subsegments, so that we don't use a lot of memory
4608 space for what may be a small section. */
4609 hold_chunksize
= chunksize
;
4612 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4613 symbol_get_tc (sym
)->subseg
);
4615 chunksize
= hold_chunksize
;
4618 ppc_after_toc_frag
= frag_now
;
4620 record_alignment (sec
, align
);
4622 frag_align_code (align
, 0);
4624 frag_align (align
, 0, 0);
4626 symbol_set_frag (sym
, frag_now
);
4627 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4629 symbol_get_tc (sym
)->align
= align
;
4630 symbol_get_tc (sym
)->output
= 1;
4631 symbol_get_tc (sym
)->within
= sym
;
4633 for (list
= *list_ptr
;
4634 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4635 list
= symbol_get_tc (list
)->next
)
4637 symbol_get_tc (list
)->next
= sym
;
4639 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4640 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4644 ppc_current_csect
= sym
;
4648 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4652 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4654 sec
= subseg_new (dw
->name
, subseg
);
4655 oldflags
= bfd_get_section_flags (stdoutput
, sec
);
4656 if (oldflags
== SEC_NO_FLAGS
)
4658 /* Just created section. */
4659 gas_assert (dw_sections
[idx
].sect
== NULL
);
4661 bfd_set_section_flags (stdoutput
, sec
, SEC_DEBUGGING
);
4662 bfd_set_section_alignment (stdoutput
, sec
, 0);
4663 dw_sections
[idx
].sect
= sec
;
4666 /* Not anymore in a csect. */
4667 ppc_current_csect
= NULL
;
4670 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4671 .dwsect flag [, opt-label ]
4675 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4679 const struct xcoff_dwsect_name
*dw
;
4680 struct dw_subsection
*subseg
;
4681 struct dw_section
*dws
;
4685 flag
= get_absolute_expression ();
4687 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4688 if (xcoff_dwsect_names
[i
].flag
== flag
)
4690 dw
= &xcoff_dwsect_names
[i
];
4694 /* Parse opt-label. */
4695 if (*input_line_pointer
== ',')
4700 ++input_line_pointer
;
4702 c
= get_symbol_name (&label
);
4703 opt_label
= symbol_find_or_make (label
);
4704 (void) restore_line_pointer (c
);
4709 demand_empty_rest_of_line ();
4711 /* Return now in case of unknown subsection. */
4714 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4719 /* Find the subsection. */
4720 dws
= &dw_sections
[i
];
4722 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4724 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4725 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4727 as_bad (_("label %s was not defined in this dwarf section"),
4728 S_GET_NAME (opt_label
));
4729 subseg
= dws
->anon_subseg
;
4733 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4738 /* Switch to the subsection. */
4739 ppc_change_debug_section (i
, subseg
->subseg
);
4743 /* Create a new dw subsection. */
4744 subseg
= XNEW (struct dw_subsection
);
4746 if (opt_label
== NULL
)
4748 /* The anonymous one. */
4750 subseg
->link
= NULL
;
4751 dws
->anon_subseg
= subseg
;
4756 if (dws
->list_subseg
!= NULL
)
4757 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4761 subseg
->link
= dws
->list_subseg
;
4762 dws
->list_subseg
= subseg
;
4763 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4766 ppc_change_debug_section (i
, subseg
->subseg
);
4770 /* Add the length field. */
4771 expressionS
*exp
= &subseg
->end_exp
;
4774 if (opt_label
!= NULL
)
4775 symbol_set_value_now (opt_label
);
4777 /* Add the length field. Note that according to the AIX assembler
4778 manual, the size of the length field is 4 for powerpc32 but
4779 12 for powerpc64. */
4782 /* Write the 64bit marker. */
4783 md_number_to_chars (frag_more (4), -1, 4);
4786 exp
->X_op
= O_subtract
;
4787 exp
->X_op_symbol
= symbol_temp_new_now ();
4788 exp
->X_add_symbol
= symbol_temp_make ();
4790 sz
= ppc_obj64
? 8 : 4;
4791 exp
->X_add_number
= -sz
;
4792 emit_expr (exp
, sz
);
4797 /* This function handles the .text and .data pseudo-ops. These
4798 pseudo-ops aren't really used by XCOFF; we implement them for the
4799 convenience of people who aren't used to XCOFF. */
4802 ppc_section (int type
)
4809 else if (type
== 'd')
4814 sym
= symbol_find_or_make (name
);
4816 ppc_change_csect (sym
, 2);
4818 demand_empty_rest_of_line ();
4821 /* This function handles the .section pseudo-op. This is mostly to
4822 give an error, since XCOFF only supports .text, .data and .bss, but
4823 we do permit the user to name the text or data section. */
4826 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4829 const char *real_name
;
4833 c
= get_symbol_name (&user_name
);
4835 if (strcmp (user_name
, ".text") == 0)
4836 real_name
= ".text[PR]";
4837 else if (strcmp (user_name
, ".data") == 0)
4838 real_name
= ".data[RW]";
4841 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4842 (void) restore_line_pointer (c
);
4843 ignore_rest_of_line ();
4847 (void) restore_line_pointer (c
);
4849 sym
= symbol_find_or_make (real_name
);
4851 ppc_change_csect (sym
, 2);
4853 demand_empty_rest_of_line ();
4856 /* The .extern pseudo-op. We create an undefined symbol. */
4859 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4864 endc
= get_symbol_name (&name
);
4866 (void) symbol_find_or_make (name
);
4868 (void) restore_line_pointer (endc
);
4870 demand_empty_rest_of_line ();
4873 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4876 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4882 endc
= get_symbol_name (&name
);
4884 sym
= symbol_find_or_make (name
);
4886 (void) restore_line_pointer (endc
);
4888 symbol_get_tc (sym
)->output
= 1;
4890 demand_empty_rest_of_line ();
4893 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4894 relocations at the beginning of the current csect.
4896 (In principle, there's no reason why the relocations _have_ to be at
4897 the beginning. Anywhere in the csect would do. However, inserting
4898 at the beginning is what the native assembler does, and it helps to
4899 deal with cases where the .ref statements follow the section contents.)
4901 ??? .refs don't work for empty .csects. However, the native assembler
4902 doesn't report an error in this case, and neither yet do we. */
4905 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
4910 if (ppc_current_csect
== NULL
)
4912 as_bad (_(".ref outside .csect"));
4913 ignore_rest_of_line ();
4919 c
= get_symbol_name (&name
);
4921 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
4922 symbol_find_or_make (name
), 0, FALSE
, BFD_RELOC_NONE
);
4924 *input_line_pointer
= c
;
4925 SKIP_WHITESPACE_AFTER_NAME ();
4926 c
= *input_line_pointer
;
4929 input_line_pointer
++;
4931 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
4933 as_bad (_("missing symbol name"));
4934 ignore_rest_of_line ();
4941 demand_empty_rest_of_line ();
4944 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4945 although I don't know why it bothers. */
4948 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
4955 endc
= get_symbol_name (&name
);
4957 sym
= symbol_find_or_make (name
);
4959 (void) restore_line_pointer (endc
);
4961 if (*input_line_pointer
!= ',')
4963 as_bad (_("missing rename string"));
4964 ignore_rest_of_line ();
4967 ++input_line_pointer
;
4969 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
4971 demand_empty_rest_of_line ();
4974 /* The .stabx pseudo-op. This is similar to a normal .stabs
4975 pseudo-op, but slightly different. A sample is
4976 .stabx "main:F-1",.main,142,0
4977 The first argument is the symbol name to create. The second is the
4978 value, and the third is the storage class. The fourth seems to be
4979 always zero, and I am assuming it is the type. */
4982 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
4989 name
= demand_copy_C_string (&len
);
4991 if (*input_line_pointer
!= ',')
4993 as_bad (_("missing value"));
4996 ++input_line_pointer
;
4998 ppc_stab_symbol
= TRUE
;
4999 sym
= symbol_make (name
);
5000 ppc_stab_symbol
= FALSE
;
5002 symbol_get_tc (sym
)->real_name
= name
;
5004 (void) expression (&exp
);
5011 as_bad (_("illegal .stabx expression; zero assumed"));
5012 exp
.X_add_number
= 0;
5015 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
5016 symbol_set_frag (sym
, &zero_address_frag
);
5020 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
5021 symbol_set_value_expression (sym
, &exp
);
5025 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
5026 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
5031 /* The value is some complex expression. This will probably
5032 fail at some later point, but this is probably the right
5033 thing to do here. */
5034 symbol_set_value_expression (sym
, &exp
);
5038 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5039 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5041 if (*input_line_pointer
!= ',')
5043 as_bad (_("missing class"));
5046 ++input_line_pointer
;
5048 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
5050 if (*input_line_pointer
!= ',')
5052 as_bad (_("missing type"));
5055 ++input_line_pointer
;
5057 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
5059 symbol_get_tc (sym
)->output
= 1;
5061 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
5066 .stabx "z",arrays_,133,0
5069 .comm arrays_,13768,3
5071 resolve_symbol_value will copy the exp's "within" into sym's when the
5072 offset is 0. Since this seems to be corner case problem,
5073 only do the correction for storage class C_STSYM. A better solution
5074 would be to have the tc field updated in ppc_symbol_new_hook. */
5076 if (exp
.X_op
== O_symbol
)
5078 if (ppc_current_block
== NULL
)
5079 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
5081 symbol_get_tc (sym
)->within
= ppc_current_block
;
5082 symbol_get_tc (exp
.X_add_symbol
)->within
= ppc_current_block
;
5086 if (exp
.X_op
!= O_symbol
5087 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
5088 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
5089 ppc_frob_label (sym
);
5092 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5093 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
5094 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
5095 symbol_get_tc (ppc_current_csect
)->within
= sym
;
5098 demand_empty_rest_of_line ();
5101 /* The .function pseudo-op. This takes several arguments. The first
5102 argument seems to be the external name of the symbol. The second
5103 argument seems to be the label for the start of the function. gcc
5104 uses the same name for both. I have no idea what the third and
5105 fourth arguments are meant to be. The optional fifth argument is
5106 an expression for the size of the function. In COFF this symbol
5107 gets an aux entry like that used for a csect. */
5110 ppc_function (int ignore ATTRIBUTE_UNUSED
)
5118 endc
= get_symbol_name (&name
);
5120 /* Ignore any [PR] suffix. */
5121 name
= ppc_canonicalize_symbol_name (name
);
5122 s
= strchr (name
, '[');
5123 if (s
!= (char *) NULL
5124 && strcmp (s
+ 1, "PR]") == 0)
5127 ext_sym
= symbol_find_or_make (name
);
5129 (void) restore_line_pointer (endc
);
5131 if (*input_line_pointer
!= ',')
5133 as_bad (_("missing symbol name"));
5134 ignore_rest_of_line ();
5137 ++input_line_pointer
;
5139 endc
= get_symbol_name (&name
);
5141 lab_sym
= symbol_find_or_make (name
);
5143 (void) restore_line_pointer (endc
);
5145 if (ext_sym
!= lab_sym
)
5149 exp
.X_op
= O_symbol
;
5150 exp
.X_add_symbol
= lab_sym
;
5151 exp
.X_op_symbol
= NULL
;
5152 exp
.X_add_number
= 0;
5154 symbol_set_value_expression (ext_sym
, &exp
);
5157 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
5158 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
5159 symbol_get_tc (ext_sym
)->output
= 1;
5161 if (*input_line_pointer
== ',')
5165 /* Ignore the third argument. */
5166 ++input_line_pointer
;
5168 if (*input_line_pointer
== ',')
5170 /* Ignore the fourth argument. */
5171 ++input_line_pointer
;
5173 if (*input_line_pointer
== ',')
5175 /* The fifth argument is the function size. */
5176 ++input_line_pointer
;
5177 symbol_get_tc (ext_sym
)->u
.size
= symbol_new
5178 ("L0\001", absolute_section
,(valueT
) 0, &zero_address_frag
);
5179 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
5184 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5185 SF_SET_FUNCTION (ext_sym
);
5186 SF_SET_PROCESS (ext_sym
);
5187 coff_add_linesym (ext_sym
);
5189 demand_empty_rest_of_line ();
5192 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
5193 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
5194 with the correct line number */
5196 static symbolS
*saved_bi_sym
= 0;
5199 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
5203 sym
= symbol_make (".bf");
5204 S_SET_SEGMENT (sym
, text_section
);
5205 symbol_set_frag (sym
, frag_now
);
5206 S_SET_VALUE (sym
, frag_now_fix ());
5207 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5209 coff_line_base
= get_absolute_expression ();
5211 S_SET_NUMBER_AUXILIARY (sym
, 1);
5212 SA_SET_SYM_LNNO (sym
, coff_line_base
);
5214 /* Line number for bi. */
5217 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
5222 symbol_get_tc (sym
)->output
= 1;
5224 ppc_frob_label (sym
);
5226 demand_empty_rest_of_line ();
5229 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
5230 ".ef", except that the line number is absolute, not relative to the
5231 most recent ".bf" symbol. */
5234 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
5238 sym
= symbol_make (".ef");
5239 S_SET_SEGMENT (sym
, text_section
);
5240 symbol_set_frag (sym
, frag_now
);
5241 S_SET_VALUE (sym
, frag_now_fix ());
5242 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5243 S_SET_NUMBER_AUXILIARY (sym
, 1);
5244 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5245 symbol_get_tc (sym
)->output
= 1;
5247 ppc_frob_label (sym
);
5249 demand_empty_rest_of_line ();
5252 /* The .bi and .ei pseudo-ops. These take a string argument and
5253 generates a C_BINCL or C_EINCL symbol, which goes at the start of
5254 the symbol list. The value of .bi will be know when the next .bf
5260 static symbolS
*last_biei
;
5267 name
= demand_copy_C_string (&len
);
5269 /* The value of these symbols is actually file offset. Here we set
5270 the value to the index into the line number entries. In
5271 ppc_frob_symbols we set the fix_line field, which will cause BFD
5272 to do the right thing. */
5274 sym
= symbol_make (name
);
5275 /* obj-coff.c currently only handles line numbers correctly in the
5277 S_SET_SEGMENT (sym
, text_section
);
5278 S_SET_VALUE (sym
, coff_n_line_nos
);
5279 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5281 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
5282 symbol_get_tc (sym
)->output
= 1;
5290 for (look
= last_biei
? last_biei
: symbol_rootP
;
5291 (look
!= (symbolS
*) NULL
5292 && (S_GET_STORAGE_CLASS (look
) == C_FILE
5293 || S_GET_STORAGE_CLASS (look
) == C_BINCL
5294 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
5295 look
= symbol_next (look
))
5297 if (look
!= (symbolS
*) NULL
)
5299 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5300 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
5304 demand_empty_rest_of_line ();
5307 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
5308 There is one argument, which is a csect symbol. The value of the
5309 .bs symbol is the index of this csect symbol. */
5312 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
5319 if (ppc_current_block
!= NULL
)
5320 as_bad (_("nested .bs blocks"));
5322 endc
= get_symbol_name (&name
);
5324 csect
= symbol_find_or_make (name
);
5326 (void) restore_line_pointer (endc
);
5328 sym
= symbol_make (".bs");
5329 S_SET_SEGMENT (sym
, now_seg
);
5330 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
5331 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5332 symbol_get_tc (sym
)->output
= 1;
5334 symbol_get_tc (sym
)->within
= csect
;
5336 ppc_frob_label (sym
);
5338 ppc_current_block
= sym
;
5340 demand_empty_rest_of_line ();
5343 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
5346 ppc_es (int ignore ATTRIBUTE_UNUSED
)
5350 if (ppc_current_block
== NULL
)
5351 as_bad (_(".es without preceding .bs"));
5353 sym
= symbol_make (".es");
5354 S_SET_SEGMENT (sym
, now_seg
);
5355 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
5356 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5357 symbol_get_tc (sym
)->output
= 1;
5359 ppc_frob_label (sym
);
5361 ppc_current_block
= NULL
;
5363 demand_empty_rest_of_line ();
5366 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
5370 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
5374 sym
= symbol_make (".bb");
5375 S_SET_SEGMENT (sym
, text_section
);
5376 symbol_set_frag (sym
, frag_now
);
5377 S_SET_VALUE (sym
, frag_now_fix ());
5378 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5380 S_SET_NUMBER_AUXILIARY (sym
, 1);
5381 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5383 symbol_get_tc (sym
)->output
= 1;
5385 SF_SET_PROCESS (sym
);
5387 ppc_frob_label (sym
);
5389 demand_empty_rest_of_line ();
5392 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
5396 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
5400 sym
= symbol_make (".eb");
5401 S_SET_SEGMENT (sym
, text_section
);
5402 symbol_set_frag (sym
, frag_now
);
5403 S_SET_VALUE (sym
, frag_now_fix ());
5404 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5405 S_SET_NUMBER_AUXILIARY (sym
, 1);
5406 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5407 symbol_get_tc (sym
)->output
= 1;
5409 SF_SET_PROCESS (sym
);
5411 ppc_frob_label (sym
);
5413 demand_empty_rest_of_line ();
5416 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
5420 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
5426 name
= demand_copy_C_string (&len
);
5427 sym
= symbol_make (name
);
5428 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5429 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5430 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
5431 S_SET_VALUE (sym
, 0);
5432 symbol_get_tc (sym
)->output
= 1;
5434 ppc_frob_label (sym
);
5436 demand_empty_rest_of_line ();
5439 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
5442 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
5446 sym
= symbol_make (".ec");
5447 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5448 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5449 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
5450 S_SET_VALUE (sym
, 0);
5451 symbol_get_tc (sym
)->output
= 1;
5453 ppc_frob_label (sym
);
5455 demand_empty_rest_of_line ();
5458 /* The .toc pseudo-op. Switch to the .toc subsegment. */
5461 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
5463 if (ppc_toc_csect
!= (symbolS
*) NULL
)
5464 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
5471 subseg
= ppc_data_subsegment
;
5472 ++ppc_data_subsegment
;
5474 subseg_new (segment_name (data_section
), subseg
);
5475 ppc_toc_frag
= frag_now
;
5477 sym
= symbol_find_or_make ("TOC[TC0]");
5478 symbol_set_frag (sym
, frag_now
);
5479 S_SET_SEGMENT (sym
, data_section
);
5480 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5481 symbol_get_tc (sym
)->subseg
= subseg
;
5482 symbol_get_tc (sym
)->output
= 1;
5483 symbol_get_tc (sym
)->within
= sym
;
5485 ppc_toc_csect
= sym
;
5487 for (list
= ppc_data_csects
;
5488 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
5489 list
= symbol_get_tc (list
)->next
)
5491 symbol_get_tc (list
)->next
= sym
;
5493 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5494 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
5498 ppc_current_csect
= ppc_toc_csect
;
5500 demand_empty_rest_of_line ();
5503 /* The AIX assembler automatically aligns the operands of a .long or
5504 .short pseudo-op, and we want to be compatible. */
5507 ppc_xcoff_cons (int log_size
)
5509 frag_align (log_size
, 0, 0);
5510 record_alignment (now_seg
, log_size
);
5511 cons (1 << log_size
);
5515 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
5520 (void) expression (&exp
);
5522 if (exp
.X_op
!= O_constant
)
5524 as_bad (_("non-constant byte count"));
5528 byte_count
= exp
.X_add_number
;
5530 if (*input_line_pointer
!= ',')
5532 as_bad (_("missing value"));
5536 ++input_line_pointer
;
5541 ppc_xcoff_end (void)
5545 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
5547 struct dw_section
*dws
= &dw_sections
[i
];
5548 struct dw_subsection
*dwss
;
5550 if (dws
->anon_subseg
)
5552 dwss
= dws
->anon_subseg
;
5553 dwss
->link
= dws
->list_subseg
;
5556 dwss
= dws
->list_subseg
;
5558 for (; dwss
!= NULL
; dwss
= dwss
->link
)
5559 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
5561 subseg_set (dws
->sect
, dwss
->subseg
);
5562 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
5567 #endif /* OBJ_XCOFF */
5568 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5570 /* The .tc pseudo-op. This is used when generating either XCOFF or
5571 ELF. This takes two or more arguments.
5573 When generating XCOFF output, the first argument is the name to
5574 give to this location in the toc; this will be a symbol with class
5575 TC. The rest of the arguments are N-byte values to actually put at
5576 this location in the TOC; often there is just one more argument, a
5577 relocatable symbol reference. The size of the value to store
5578 depends on target word size. A 32-bit target uses 4-byte values, a
5579 64-bit target uses 8-byte values.
5581 When not generating XCOFF output, the arguments are the same, but
5582 the first argument is simply ignored. */
5585 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5589 /* Define the TOC symbol name. */
5595 if (ppc_toc_csect
== (symbolS
*) NULL
5596 || ppc_toc_csect
!= ppc_current_csect
)
5598 as_bad (_(".tc not in .toc section"));
5599 ignore_rest_of_line ();
5603 endc
= get_symbol_name (&name
);
5605 sym
= symbol_find_or_make (name
);
5607 (void) restore_line_pointer (endc
);
5609 if (S_IS_DEFINED (sym
))
5613 label
= symbol_get_tc (ppc_current_csect
)->within
;
5614 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5616 as_bad (_(".tc with no label"));
5617 ignore_rest_of_line ();
5621 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5622 symbol_set_frag (label
, symbol_get_frag (sym
));
5623 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5625 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5626 ++input_line_pointer
;
5631 S_SET_SEGMENT (sym
, now_seg
);
5632 symbol_set_frag (sym
, frag_now
);
5633 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5634 symbol_get_tc (sym
)->symbol_class
= XMC_TC
;
5635 symbol_get_tc (sym
)->output
= 1;
5637 ppc_frob_label (sym
);
5640 #endif /* OBJ_XCOFF */
5644 /* Skip the TOC symbol name. */
5645 while (is_part_of_name (*input_line_pointer
)
5646 || *input_line_pointer
== ' '
5647 || *input_line_pointer
== '['
5648 || *input_line_pointer
== ']'
5649 || *input_line_pointer
== '{'
5650 || *input_line_pointer
== '}')
5651 ++input_line_pointer
;
5653 /* Align to a four/eight byte boundary. */
5654 align
= ppc_obj64
? 3 : 2;
5655 frag_align (align
, 0, 0);
5656 record_alignment (now_seg
, align
);
5657 #endif /* OBJ_ELF */
5659 if (*input_line_pointer
!= ',')
5660 demand_empty_rest_of_line ();
5663 ++input_line_pointer
;
5664 cons (ppc_obj64
? 8 : 4);
5668 /* Pseudo-op .machine. */
5671 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5675 #define MAX_HISTORY 100
5676 static ppc_cpu_t
*cpu_history
;
5677 static int curr_hist
;
5681 c
= get_symbol_name (&cpu_string
);
5682 cpu_string
= xstrdup (cpu_string
);
5683 (void) restore_line_pointer (c
);
5685 if (cpu_string
!= NULL
)
5687 ppc_cpu_t old_cpu
= ppc_cpu
;
5691 for (p
= cpu_string
; *p
!= 0; p
++)
5694 if (strcmp (cpu_string
, "push") == 0)
5696 if (cpu_history
== NULL
)
5697 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5699 if (curr_hist
>= MAX_HISTORY
)
5700 as_bad (_(".machine stack overflow"));
5702 cpu_history
[curr_hist
++] = ppc_cpu
;
5704 else if (strcmp (cpu_string
, "pop") == 0)
5707 as_bad (_(".machine stack underflow"));
5709 ppc_cpu
= cpu_history
[--curr_hist
];
5711 else if ((new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, cpu_string
)) != 0)
5714 as_bad (_("invalid machine `%s'"), cpu_string
);
5716 if (ppc_cpu
!= old_cpu
)
5717 ppc_setup_opcodes ();
5720 demand_empty_rest_of_line ();
5722 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5726 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5728 /* Set the current section. */
5730 ppc_set_current_section (segT
new)
5732 ppc_previous_section
= ppc_current_section
;
5733 ppc_current_section
= new;
5736 /* pseudo-op: .previous
5737 behaviour: toggles the current section with the previous section.
5739 warnings: "No previous section" */
5742 ppc_previous (int ignore ATTRIBUTE_UNUSED
)
5744 if (ppc_previous_section
== NULL
)
5746 as_warn (_("no previous section to return to, ignored."));
5750 subseg_set (ppc_previous_section
, 0);
5752 ppc_set_current_section (ppc_previous_section
);
5755 /* pseudo-op: .pdata
5756 behaviour: predefined read only data section
5760 initial: .section .pdata "adr3"
5761 a - don't know -- maybe a misprint
5762 d - initialized data
5764 3 - double word aligned (that would be 4 byte boundary)
5767 Tag index tables (also known as the function table) for exception
5768 handling, debugging, etc. */
5771 ppc_pdata (int ignore ATTRIBUTE_UNUSED
)
5773 if (pdata_section
== 0)
5775 pdata_section
= subseg_new (".pdata", 0);
5777 bfd_set_section_flags (stdoutput
, pdata_section
,
5778 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5779 | SEC_READONLY
| SEC_DATA
));
5781 bfd_set_section_alignment (stdoutput
, pdata_section
, 2);
5785 pdata_section
= subseg_new (".pdata", 0);
5787 ppc_set_current_section (pdata_section
);
5790 /* pseudo-op: .ydata
5791 behaviour: predefined read only data section
5795 initial: .section .ydata "drw3"
5796 a - don't know -- maybe a misprint
5797 d - initialized data
5799 3 - double word aligned (that would be 4 byte boundary)
5801 Tag tables (also known as the scope table) for exception handling,
5805 ppc_ydata (int ignore ATTRIBUTE_UNUSED
)
5807 if (ydata_section
== 0)
5809 ydata_section
= subseg_new (".ydata", 0);
5810 bfd_set_section_flags (stdoutput
, ydata_section
,
5811 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5812 | SEC_READONLY
| SEC_DATA
));
5814 bfd_set_section_alignment (stdoutput
, ydata_section
, 3);
5818 ydata_section
= subseg_new (".ydata", 0);
5820 ppc_set_current_section (ydata_section
);
5823 /* pseudo-op: .reldata
5824 behaviour: predefined read write data section
5825 double word aligned (4-byte)
5826 FIXME: relocation is applied to it
5827 FIXME: what's the difference between this and .data?
5830 initial: .section .reldata "drw3"
5831 d - initialized data
5834 3 - double word aligned (that would be 8 byte boundary)
5837 Like .data, but intended to hold data subject to relocation, such as
5838 function descriptors, etc. */
5841 ppc_reldata (int ignore ATTRIBUTE_UNUSED
)
5843 if (reldata_section
== 0)
5845 reldata_section
= subseg_new (".reldata", 0);
5847 bfd_set_section_flags (stdoutput
, reldata_section
,
5848 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5851 bfd_set_section_alignment (stdoutput
, reldata_section
, 2);
5855 reldata_section
= subseg_new (".reldata", 0);
5857 ppc_set_current_section (reldata_section
);
5860 /* pseudo-op: .rdata
5861 behaviour: predefined read only data section
5865 initial: .section .rdata "dr3"
5866 d - initialized data
5868 3 - double word aligned (that would be 4 byte boundary) */
5871 ppc_rdata (int ignore ATTRIBUTE_UNUSED
)
5873 if (rdata_section
== 0)
5875 rdata_section
= subseg_new (".rdata", 0);
5876 bfd_set_section_flags (stdoutput
, rdata_section
,
5877 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5878 | SEC_READONLY
| SEC_DATA
));
5880 bfd_set_section_alignment (stdoutput
, rdata_section
, 2);
5884 rdata_section
= subseg_new (".rdata", 0);
5886 ppc_set_current_section (rdata_section
);
5889 /* pseudo-op: .ualong
5890 behaviour: much like .int, with the exception that no alignment is
5892 FIXME: test the alignment statement
5897 ppc_ualong (int ignore ATTRIBUTE_UNUSED
)
5903 /* pseudo-op: .znop <symbol name>
5904 behaviour: Issue a nop instruction
5905 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5906 the supplied symbol name.
5908 warnings: Missing symbol name */
5911 ppc_znop (int ignore ATTRIBUTE_UNUSED
)
5914 const struct powerpc_opcode
*opcode
;
5921 /* Strip out the symbol name. */
5922 c
= get_symbol_name (&symbol_name
);
5924 name
= xstrdup (symbol_name
);
5926 sym
= symbol_find_or_make (name
);
5928 *input_line_pointer
= c
;
5930 SKIP_WHITESPACE_AFTER_NAME ();
5932 /* Look up the opcode in the hash table. */
5933 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, "nop");
5935 /* Stick in the nop. */
5936 insn
= opcode
->opcode
;
5938 /* Write out the instruction. */
5940 md_number_to_chars (f
, insn
, 4);
5942 f
- frag_now
->fr_literal
,
5947 BFD_RELOC_16_GOT_PCREL
);
5957 ppc_pe_comm (int lcomm
)
5966 c
= get_symbol_name (&name
);
5968 /* just after name is now '\0'. */
5969 p
= input_line_pointer
;
5971 SKIP_WHITESPACE_AFTER_NAME ();
5972 if (*input_line_pointer
!= ',')
5974 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5975 ignore_rest_of_line ();
5979 input_line_pointer
++; /* skip ',' */
5980 if ((temp
= get_absolute_expression ()) < 0)
5982 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
5983 ignore_rest_of_line ();
5989 /* The third argument to .comm is the alignment. */
5990 if (*input_line_pointer
!= ',')
5994 ++input_line_pointer
;
5995 align
= get_absolute_expression ();
5998 as_warn (_("ignoring bad alignment"));
6005 symbolP
= symbol_find_or_make (name
);
6008 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
6010 as_bad (_("ignoring attempt to re-define symbol `%s'."),
6011 S_GET_NAME (symbolP
));
6012 ignore_rest_of_line ();
6016 if (S_GET_VALUE (symbolP
))
6018 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
6019 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
6020 S_GET_NAME (symbolP
),
6021 (long) S_GET_VALUE (symbolP
),
6026 S_SET_VALUE (symbolP
, (valueT
) temp
);
6027 S_SET_EXTERNAL (symbolP
);
6028 S_SET_SEGMENT (symbolP
, bfd_com_section_ptr
);
6031 demand_empty_rest_of_line ();
6035 * implement the .section pseudo op:
6036 * .section name {, "flags"}
6038 * | +--- optional flags: 'b' for bss
6040 * +-- section name 'l' for lib
6044 * 'd' (apparently m88k for data)
6046 * But if the argument is not a quoted string, treat it as a
6047 * subsegment number.
6049 * FIXME: this is a copy of the section processing from obj-coff.c, with
6050 * additions/changes for the moto-pas assembler support. There are three
6053 * FIXME: I just noticed this. This doesn't work at all really. It it
6054 * setting bits that bfd probably neither understands or uses. The
6055 * correct approach (?) will have to incorporate extra fields attached
6056 * to the section to hold the system specific stuff. (krk)
6059 * 'a' - unknown - referred to in documentation, but no definition supplied
6060 * 'c' - section has code
6061 * 'd' - section has initialized data
6062 * 'u' - section has uninitialized data
6063 * 'i' - section contains directives (info)
6064 * 'n' - section can be discarded
6065 * 'R' - remove section at link time
6067 * Section Protection:
6068 * 'r' - section is readable
6069 * 'w' - section is writable
6070 * 'x' - section is executable
6071 * 's' - section is sharable
6073 * Section Alignment:
6074 * '0' - align to byte boundary
6075 * '1' - align to halfword boundary
6076 * '2' - align to word boundary
6077 * '3' - align to doubleword boundary
6078 * '4' - align to quadword boundary
6079 * '5' - align to 32 byte boundary
6080 * '6' - align to 64 byte boundary
6085 ppc_pe_section (int ignore ATTRIBUTE_UNUSED
)
6087 /* Strip out the section name. */
6096 c
= get_symbol_name (§ion_name
);
6098 name
= xstrdup (section_name
);
6100 *input_line_pointer
= c
;
6102 SKIP_WHITESPACE_AFTER_NAME ();
6105 flags
= SEC_NO_FLAGS
;
6107 if (strcmp (name
, ".idata$2") == 0)
6111 else if (strcmp (name
, ".idata$3") == 0)
6115 else if (strcmp (name
, ".idata$4") == 0)
6119 else if (strcmp (name
, ".idata$5") == 0)
6123 else if (strcmp (name
, ".idata$6") == 0)
6128 /* Default alignment to 16 byte boundary. */
6131 if (*input_line_pointer
== ',')
6133 ++input_line_pointer
;
6135 if (*input_line_pointer
!= '"')
6136 exp
= get_absolute_expression ();
6139 ++input_line_pointer
;
6140 while (*input_line_pointer
!= '"'
6141 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
6143 switch (*input_line_pointer
)
6145 /* Section Contents */
6146 case 'a': /* unknown */
6147 as_bad (_("unsupported section attribute -- 'a'"));
6149 case 'c': /* code section */
6152 case 'd': /* section has initialized data */
6155 case 'u': /* section has uninitialized data */
6156 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
6160 case 'i': /* section contains directives (info) */
6161 /* FIXME: This is IMAGE_SCN_LNK_INFO
6163 flags
|= SEC_HAS_CONTENTS
;
6165 case 'n': /* section can be discarded */
6168 case 'R': /* Remove section at link time */
6169 flags
|= SEC_NEVER_LOAD
;
6171 #if IFLICT_BRAIN_DAMAGE
6172 /* Section Protection */
6173 case 'r': /* section is readable */
6174 flags
|= IMAGE_SCN_MEM_READ
;
6176 case 'w': /* section is writable */
6177 flags
|= IMAGE_SCN_MEM_WRITE
;
6179 case 'x': /* section is executable */
6180 flags
|= IMAGE_SCN_MEM_EXECUTE
;
6182 case 's': /* section is sharable */
6183 flags
|= IMAGE_SCN_MEM_SHARED
;
6186 /* Section Alignment */
6187 case '0': /* align to byte boundary */
6188 flags
|= IMAGE_SCN_ALIGN_1BYTES
;
6191 case '1': /* align to halfword boundary */
6192 flags
|= IMAGE_SCN_ALIGN_2BYTES
;
6195 case '2': /* align to word boundary */
6196 flags
|= IMAGE_SCN_ALIGN_4BYTES
;
6199 case '3': /* align to doubleword boundary */
6200 flags
|= IMAGE_SCN_ALIGN_8BYTES
;
6203 case '4': /* align to quadword boundary */
6204 flags
|= IMAGE_SCN_ALIGN_16BYTES
;
6207 case '5': /* align to 32 byte boundary */
6208 flags
|= IMAGE_SCN_ALIGN_32BYTES
;
6211 case '6': /* align to 64 byte boundary */
6212 flags
|= IMAGE_SCN_ALIGN_64BYTES
;
6217 as_bad (_("unknown section attribute '%c'"),
6218 *input_line_pointer
);
6221 ++input_line_pointer
;
6223 if (*input_line_pointer
== '"')
6224 ++input_line_pointer
;
6228 sec
= subseg_new (name
, (subsegT
) exp
);
6230 ppc_set_current_section (sec
);
6232 if (flags
!= SEC_NO_FLAGS
)
6234 if (! bfd_set_section_flags (stdoutput
, sec
, flags
))
6235 as_bad (_("error setting flags for \"%s\": %s"),
6236 bfd_section_name (stdoutput
, sec
),
6237 bfd_errmsg (bfd_get_error ()));
6240 bfd_set_section_alignment (stdoutput
, sec
, align
);
6244 ppc_pe_function (int ignore ATTRIBUTE_UNUSED
)
6250 endc
= get_symbol_name (&name
);
6252 ext_sym
= symbol_find_or_make (name
);
6254 (void) restore_line_pointer (endc
);
6256 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
6257 SF_SET_FUNCTION (ext_sym
);
6258 SF_SET_PROCESS (ext_sym
);
6259 coff_add_linesym (ext_sym
);
6261 demand_empty_rest_of_line ();
6265 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED
)
6267 if (tocdata_section
== 0)
6269 tocdata_section
= subseg_new (".tocd", 0);
6270 /* FIXME: section flags won't work. */
6271 bfd_set_section_flags (stdoutput
, tocdata_section
,
6272 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
6273 | SEC_READONLY
| SEC_DATA
));
6275 bfd_set_section_alignment (stdoutput
, tocdata_section
, 2);
6279 rdata_section
= subseg_new (".tocd", 0);
6282 ppc_set_current_section (tocdata_section
);
6284 demand_empty_rest_of_line ();
6287 /* Don't adjust TOC relocs to use the section symbol. */
6290 ppc_pe_fix_adjustable (fixS
*fix
)
6292 return fix
->fx_r_type
!= BFD_RELOC_PPC_TOC16
;
6299 /* XCOFF specific symbol and file handling. */
6301 /* Canonicalize the symbol name. We use the to force the suffix, if
6302 any, to use square brackets, and to be in upper case. */
6305 ppc_canonicalize_symbol_name (char *name
)
6309 if (ppc_stab_symbol
)
6312 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
6326 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
6329 if (*s
== '\0' || s
[1] != '\0')
6330 as_bad (_("bad symbol suffix"));
6338 /* Set the class of a symbol based on the suffix, if any. This is
6339 called whenever a new symbol is created. */
6342 ppc_symbol_new_hook (symbolS
*sym
)
6344 struct ppc_tc_sy
*tc
;
6347 tc
= symbol_get_tc (sym
);
6350 tc
->symbol_class
= -1;
6351 tc
->real_name
= NULL
;
6358 if (ppc_stab_symbol
)
6361 s
= strchr (S_GET_NAME (sym
), '[');
6362 if (s
== (const char *) NULL
)
6364 /* There is no suffix. */
6373 if (strcmp (s
, "BS]") == 0)
6374 tc
->symbol_class
= XMC_BS
;
6377 if (strcmp (s
, "DB]") == 0)
6378 tc
->symbol_class
= XMC_DB
;
6379 else if (strcmp (s
, "DS]") == 0)
6380 tc
->symbol_class
= XMC_DS
;
6383 if (strcmp (s
, "GL]") == 0)
6384 tc
->symbol_class
= XMC_GL
;
6387 if (strcmp (s
, "PR]") == 0)
6388 tc
->symbol_class
= XMC_PR
;
6391 if (strcmp (s
, "RO]") == 0)
6392 tc
->symbol_class
= XMC_RO
;
6393 else if (strcmp (s
, "RW]") == 0)
6394 tc
->symbol_class
= XMC_RW
;
6397 if (strcmp (s
, "SV]") == 0)
6398 tc
->symbol_class
= XMC_SV
;
6401 if (strcmp (s
, "TC]") == 0)
6402 tc
->symbol_class
= XMC_TC
;
6403 else if (strcmp (s
, "TI]") == 0)
6404 tc
->symbol_class
= XMC_TI
;
6405 else if (strcmp (s
, "TB]") == 0)
6406 tc
->symbol_class
= XMC_TB
;
6407 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
6408 tc
->symbol_class
= XMC_TC0
;
6411 if (strcmp (s
, "UA]") == 0)
6412 tc
->symbol_class
= XMC_UA
;
6413 else if (strcmp (s
, "UC]") == 0)
6414 tc
->symbol_class
= XMC_UC
;
6417 if (strcmp (s
, "XO]") == 0)
6418 tc
->symbol_class
= XMC_XO
;
6422 if (tc
->symbol_class
== -1)
6423 as_bad (_("unrecognized symbol suffix"));
6426 /* This variable is set by ppc_frob_symbol if any absolute symbols are
6427 seen. It tells ppc_adjust_symtab whether it needs to look through
6430 static bfd_boolean ppc_saw_abs
;
6432 /* Change the name of a symbol just before writing it out. Set the
6433 real name if the .rename pseudo-op was used. Otherwise, remove any
6434 class suffix. Return 1 if the symbol should not be included in the
6438 ppc_frob_symbol (symbolS
*sym
)
6440 static symbolS
*ppc_last_function
;
6441 static symbolS
*set_end
;
6443 /* Discard symbols that should not be included in the output symbol
6445 if (! symbol_used_in_reloc_p (sym
)
6446 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
6447 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6448 && ! symbol_get_tc (sym
)->output
6449 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
6452 /* This one will disappear anyway. Don't make a csect sym for it. */
6453 if (sym
== abs_section_sym
)
6456 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
6457 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
6463 name
= S_GET_NAME (sym
);
6464 s
= strchr (name
, '[');
6465 if (s
!= (char *) NULL
)
6471 snew
= xstrndup (name
, len
);
6473 S_SET_NAME (sym
, snew
);
6477 if (set_end
!= (symbolS
*) NULL
)
6479 SA_SET_SYM_ENDNDX (set_end
, sym
);
6483 if (SF_GET_FUNCTION (sym
))
6485 if (ppc_last_function
!= (symbolS
*) NULL
)
6486 as_bad (_("two .function pseudo-ops with no intervening .ef"));
6487 ppc_last_function
= sym
;
6488 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
6490 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
6491 SA_SET_SYM_FSIZE (sym
,
6492 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
6495 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
6496 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
6498 if (ppc_last_function
== (symbolS
*) NULL
)
6499 as_bad (_(".ef with no preceding .function"));
6502 set_end
= ppc_last_function
;
6503 ppc_last_function
= NULL
;
6505 /* We don't have a C_EFCN symbol, but we need to force the
6506 COFF backend to believe that it has seen one. */
6507 coff_last_function
= NULL
;
6511 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6512 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
6513 && S_GET_STORAGE_CLASS (sym
) != C_FILE
6514 && S_GET_STORAGE_CLASS (sym
) != C_FCN
6515 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
6516 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
6517 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
6518 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
6519 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
6520 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
6521 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
6523 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
6524 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
6525 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
6528 union internal_auxent
*a
;
6530 /* Create a csect aux. */
6531 i
= S_GET_NUMBER_AUXILIARY (sym
);
6532 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
6533 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
6534 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
6536 /* This is the TOC table. */
6537 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
6538 a
->x_csect
.x_scnlen
.l
= 0;
6539 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6541 else if (symbol_get_tc (sym
)->subseg
!= 0)
6543 /* This is a csect symbol. x_scnlen is the size of the
6545 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
6546 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6547 S_GET_SEGMENT (sym
))
6548 - S_GET_VALUE (sym
));
6551 resolve_symbol_value (symbol_get_tc (sym
)->next
);
6552 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
6553 - S_GET_VALUE (sym
));
6555 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
6557 else if (S_GET_SEGMENT (sym
) == bss_section
)
6559 /* This is a common symbol. */
6560 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
6561 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6562 if (S_IS_EXTERNAL (sym
))
6563 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
6565 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
6567 else if (S_GET_SEGMENT (sym
) == absolute_section
)
6569 /* This is an absolute symbol. The csect will be created by
6570 ppc_adjust_symtab. */
6572 a
->x_csect
.x_smtyp
= XTY_LD
;
6573 if (symbol_get_tc (sym
)->symbol_class
== -1)
6574 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6576 else if (! S_IS_DEFINED (sym
))
6578 /* This is an external symbol. */
6579 a
->x_csect
.x_scnlen
.l
= 0;
6580 a
->x_csect
.x_smtyp
= XTY_ER
;
6582 else if (symbol_get_tc (sym
)->symbol_class
== XMC_TC
)
6586 /* This is a TOC definition. x_scnlen is the size of the
6588 next
= symbol_next (sym
);
6589 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6590 next
= symbol_next (next
);
6591 if (next
== (symbolS
*) NULL
6592 || symbol_get_tc (next
)->symbol_class
!= XMC_TC
)
6594 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6595 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6597 - S_GET_VALUE (sym
));
6599 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6600 - S_GET_VALUE (sym
));
6604 resolve_symbol_value (next
);
6605 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6606 - S_GET_VALUE (sym
));
6608 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6614 /* This is a normal symbol definition. x_scnlen is the
6615 symbol index of the containing csect. */
6616 if (S_GET_SEGMENT (sym
) == text_section
)
6617 csect
= ppc_text_csects
;
6618 else if (S_GET_SEGMENT (sym
) == data_section
)
6619 csect
= ppc_data_csects
;
6623 /* Skip the initial dummy symbol. */
6624 csect
= symbol_get_tc (csect
)->next
;
6626 if (csect
== (symbolS
*) NULL
)
6628 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6629 a
->x_csect
.x_scnlen
.l
= 0;
6633 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6635 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6636 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6637 > S_GET_VALUE (sym
))
6639 csect
= symbol_get_tc (csect
)->next
;
6642 a
->x_csect
.x_scnlen
.p
=
6643 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6644 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6647 a
->x_csect
.x_smtyp
= XTY_LD
;
6650 a
->x_csect
.x_parmhash
= 0;
6651 a
->x_csect
.x_snhash
= 0;
6652 if (symbol_get_tc (sym
)->symbol_class
== -1)
6653 a
->x_csect
.x_smclas
= XMC_PR
;
6655 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6656 a
->x_csect
.x_stab
= 0;
6657 a
->x_csect
.x_snstab
= 0;
6659 /* Don't let the COFF backend resort these symbols. */
6660 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6662 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6664 /* We want the value to be the symbol index of the referenced
6665 csect symbol. BFD will do that for us if we set the right
6667 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6668 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6670 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6671 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6673 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6678 block
= symbol_get_tc (sym
)->within
;
6681 /* The value is the offset from the enclosing csect. */
6684 csect
= symbol_get_tc (block
)->within
;
6685 resolve_symbol_value (csect
);
6686 base
= S_GET_VALUE (csect
);
6691 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6693 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6694 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6696 /* We want the value to be a file offset into the line numbers.
6697 BFD will do that for us if we set the right flags. We have
6698 already set the value correctly. */
6699 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6705 /* Adjust the symbol table. This creates csect symbols for all
6706 absolute symbols. */
6709 ppc_adjust_symtab (void)
6716 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6720 union internal_auxent
*a
;
6722 if (S_GET_SEGMENT (sym
) != absolute_section
)
6725 csect
= symbol_create (".abs[XO]", absolute_section
,
6726 S_GET_VALUE (sym
), &zero_address_frag
);
6727 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6728 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6729 i
= S_GET_NUMBER_AUXILIARY (csect
);
6730 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6731 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6732 a
->x_csect
.x_scnlen
.l
= 0;
6733 a
->x_csect
.x_smtyp
= XTY_SD
;
6734 a
->x_csect
.x_parmhash
= 0;
6735 a
->x_csect
.x_snhash
= 0;
6736 a
->x_csect
.x_smclas
= XMC_XO
;
6737 a
->x_csect
.x_stab
= 0;
6738 a
->x_csect
.x_snstab
= 0;
6740 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6742 i
= S_GET_NUMBER_AUXILIARY (sym
);
6743 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6744 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6745 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6748 ppc_saw_abs
= FALSE
;
6751 /* Set the VMA for a section. This is called on all the sections in
6755 ppc_frob_section (asection
*sec
)
6757 static bfd_vma vma
= 0;
6759 /* Dwarf sections start at 0. */
6760 if (bfd_get_section_flags (NULL
, sec
) & SEC_DEBUGGING
)
6763 vma
= md_section_align (sec
, vma
);
6764 bfd_set_section_vma (stdoutput
, sec
, vma
);
6765 vma
+= bfd_section_size (stdoutput
, sec
);
6768 #endif /* OBJ_XCOFF */
6771 md_atof (int type
, char *litp
, int *sizep
)
6773 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6776 /* Write a value out to the object file, using the appropriate
6780 md_number_to_chars (char *buf
, valueT val
, int n
)
6782 if (target_big_endian
)
6783 number_to_chars_bigendian (buf
, val
, n
);
6785 number_to_chars_littleendian (buf
, val
, n
);
6788 /* Align a section (I don't know why this is machine dependent). */
6791 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6796 int align
= bfd_get_section_alignment (stdoutput
, seg
);
6798 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6802 /* We don't have any form of relaxing. */
6805 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6806 asection
*seg ATTRIBUTE_UNUSED
)
6812 /* Convert a machine dependent frag. We never generate these. */
6815 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6816 asection
*sec ATTRIBUTE_UNUSED
,
6817 fragS
*fragp ATTRIBUTE_UNUSED
)
6822 /* We have no need to default values of symbols. */
6825 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6830 /* Functions concerning relocs. */
6832 /* The location from which a PC relative jump should be calculated,
6833 given a PC relative reloc. */
6836 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6838 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6843 /* This is called to see whether a fixup should be adjusted to use a
6844 section symbol. We take the opportunity to change a fixup against
6845 a symbol in the TOC subsegment into a reloc against the
6846 corresponding .tc symbol. */
6849 ppc_fix_adjustable (fixS
*fix
)
6851 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6852 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6853 TC_SYMFIELD_TYPE
*tc
;
6855 if (symseg
== absolute_section
)
6858 /* Always adjust symbols in debugging sections. */
6859 if (bfd_get_section_flags (stdoutput
, symseg
) & SEC_DEBUGGING
)
6862 if (ppc_toc_csect
!= (symbolS
*) NULL
6863 && fix
->fx_addsy
!= ppc_toc_csect
6864 && symseg
== data_section
6865 && val
>= ppc_toc_frag
->fr_address
6866 && (ppc_after_toc_frag
== (fragS
*) NULL
6867 || val
< ppc_after_toc_frag
->fr_address
))
6871 for (sy
= symbol_next (ppc_toc_csect
);
6872 sy
!= (symbolS
*) NULL
;
6873 sy
= symbol_next (sy
))
6875 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6877 if (sy_tc
->symbol_class
== XMC_TC0
)
6879 if (sy_tc
->symbol_class
!= XMC_TC
)
6881 if (val
== resolve_symbol_value (sy
))
6884 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6889 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6890 _("symbol in .toc does not match any .tc"));
6893 /* Possibly adjust the reloc to be against the csect. */
6894 tc
= symbol_get_tc (fix
->fx_addsy
);
6896 && tc
->symbol_class
!= XMC_TC0
6897 && tc
->symbol_class
!= XMC_TC
6898 && symseg
!= bss_section
6899 /* Don't adjust if this is a reloc in the toc section. */
6900 && (symseg
!= data_section
6901 || ppc_toc_csect
== NULL
6902 || val
< ppc_toc_frag
->fr_address
6903 || (ppc_after_toc_frag
!= NULL
6904 && val
>= ppc_after_toc_frag
->fr_address
)))
6906 symbolS
*csect
= tc
->within
;
6908 /* If the symbol was not declared by a label (eg: a section symbol),
6909 use the section instead of the csect. This doesn't happen in
6910 normal AIX assembly code. */
6912 csect
= seg_info (symseg
)->sym
;
6914 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6915 fix
->fx_addsy
= csect
;
6920 /* Adjust a reloc against a .lcomm symbol to be against the base
6922 if (symseg
== bss_section
6923 && ! S_IS_EXTERNAL (fix
->fx_addsy
))
6925 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6927 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6934 /* A reloc from one csect to another must be kept. The assembler
6935 will, of course, keep relocs between sections, and it will keep
6936 absolute relocs, but we need to force it to keep PC relative relocs
6937 between two csects in the same section. */
6940 ppc_force_relocation (fixS
*fix
)
6942 /* At this point fix->fx_addsy should already have been converted to
6943 a csect symbol. If the csect does not include the fragment, then
6944 we need to force the relocation. */
6946 && fix
->fx_addsy
!= NULL
6947 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6948 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6949 > fix
->fx_frag
->fr_address
)
6950 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6951 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6952 <= fix
->fx_frag
->fr_address
))))
6955 return generic_force_reloc (fix
);
6957 #endif /* OBJ_XCOFF */
6960 /* If this function returns non-zero, it guarantees that a relocation
6961 will be emitted for a fixup. */
6964 ppc_force_relocation (fixS
*fix
)
6966 /* Branch prediction relocations must force a relocation, as must
6967 the vtable description relocs. */
6968 switch (fix
->fx_r_type
)
6970 case BFD_RELOC_PPC_B16_BRTAKEN
:
6971 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6972 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6973 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6974 case BFD_RELOC_24_PLT_PCREL
:
6975 case BFD_RELOC_PPC64_TOC
:
6977 case BFD_RELOC_PPC_B26
:
6978 case BFD_RELOC_PPC_BA26
:
6979 case BFD_RELOC_PPC_B16
:
6980 case BFD_RELOC_PPC_BA16
:
6981 case BFD_RELOC_PPC64_REL24_NOTOC
:
6982 /* All branch fixups targeting a localentry symbol must
6983 force a relocation. */
6986 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6987 elf_symbol_type
*elfsym
6988 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6989 gas_assert (elfsym
);
6990 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6998 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6999 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
)
7002 return generic_force_reloc (fix
);
7006 ppc_fix_adjustable (fixS
*fix
)
7008 switch (fix
->fx_r_type
)
7010 /* All branch fixups targeting a localentry symbol must
7011 continue using the symbol. */
7012 case BFD_RELOC_PPC_B26
:
7013 case BFD_RELOC_PPC_BA26
:
7014 case BFD_RELOC_PPC_B16
:
7015 case BFD_RELOC_PPC_BA16
:
7016 case BFD_RELOC_PPC_B16_BRTAKEN
:
7017 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7018 case BFD_RELOC_PPC_BA16_BRTAKEN
:
7019 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
7020 case BFD_RELOC_PPC64_REL24_NOTOC
:
7023 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
7024 elf_symbol_type
*elfsym
7025 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
7026 gas_assert (elfsym
);
7027 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
7035 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
7036 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
7037 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
7038 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
7039 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
7040 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
7041 && fix
->fx_r_type
!= BFD_RELOC_16_GOT_PCREL
7042 && fix
->fx_r_type
!= BFD_RELOC_32_GOTOFF
7043 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT_PCREL34
7044 && fix
->fx_r_type
!= BFD_RELOC_24_PLT_PCREL
7045 && fix
->fx_r_type
!= BFD_RELOC_32_PLTOFF
7046 && fix
->fx_r_type
!= BFD_RELOC_32_PLT_PCREL
7047 && fix
->fx_r_type
!= BFD_RELOC_LO16_PLTOFF
7048 && fix
->fx_r_type
!= BFD_RELOC_HI16_PLTOFF
7049 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_PLTOFF
7050 && fix
->fx_r_type
!= BFD_RELOC_64_PLTOFF
7051 && fix
->fx_r_type
!= BFD_RELOC_64_PLT_PCREL
7052 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT16_LO_DS
7053 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT_PCREL34
7054 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16
7055 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO
7056 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HI
7057 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HA
7058 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_DS
7059 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO_DS
7060 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
7061 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_LO16A
7062 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HI16A
7063 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HA16A
7064 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
7065 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
7066 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
7067 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
));
7072 ppc_frag_check (struct frag
*fragP
)
7074 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
7075 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
7076 _("instruction address is not a multiple of %d"),
7077 fragP
->insn_addr
+ 1);
7080 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
7081 rs_align_code frag. */
7084 ppc_handle_align (struct frag
*fragP
)
7086 valueT count
= (fragP
->fr_next
->fr_address
7087 - (fragP
->fr_address
+ fragP
->fr_fix
));
7089 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && count
!= 0 && (count
& 1) == 0)
7091 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
7094 md_number_to_chars (dest
, 0x4400, 2);
7096 else if (count
!= 0 && (count
& 3) == 0)
7098 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
7102 if (count
> 4 * nop_limit
&& count
< 0x2000000)
7106 /* Make a branch, then follow with nops. Insert another
7107 frag to handle the nops. */
7108 md_number_to_chars (dest
, 0x48000000 + count
, 4);
7113 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
7114 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
7115 fragP
->fr_next
= rest
;
7117 rest
->fr_address
+= rest
->fr_fix
+ 4;
7119 /* If we leave the next frag as rs_align_code we'll come here
7120 again, resulting in a bunch of branches rather than a
7121 branch followed by nops. */
7122 rest
->fr_type
= rs_align
;
7123 dest
= rest
->fr_literal
;
7126 md_number_to_chars (dest
, 0x60000000, 4);
7128 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0
7129 && (ppc_cpu
& PPC_OPCODE_POWER9
) == 0)
7131 /* For power6, power7, and power8, we want the last nop to
7132 be a group terminating one. Do this by inserting an
7133 rs_fill frag immediately after this one, with its address
7134 set to the last nop location. This will automatically
7135 reduce the number of nops in the current frag by one. */
7138 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
7140 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
7141 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
7142 group_nop
->fr_fix
= 0;
7143 group_nop
->fr_offset
= 1;
7144 group_nop
->fr_type
= rs_fill
;
7145 fragP
->fr_next
= group_nop
;
7146 dest
= group_nop
->fr_literal
;
7149 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
7151 if (ppc_cpu
& PPC_OPCODE_E500MC
)
7152 /* e500mc group terminating nop: "ori 0,0,0". */
7153 md_number_to_chars (dest
, 0x60000000, 4);
7155 /* power7/power8 group terminating nop: "ori 2,2,0". */
7156 md_number_to_chars (dest
, 0x60420000, 4);
7159 /* power6 group terminating nop: "ori 1,1,0". */
7160 md_number_to_chars (dest
, 0x60210000, 4);
7165 /* Apply a fixup to the object code. This is called for all the
7166 fixups we generated by the calls to fix_new_exp, above. */
7169 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
7171 valueT value
= * valP
;
7173 const struct powerpc_operand
*operand
;
7176 if (fixP
->fx_addsy
!= NULL
)
7178 /* Hack around bfd_install_relocation brain damage. */
7180 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
7182 if (fixP
->fx_addsy
== abs_section_sym
)
7188 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7189 the symbol values. If we are doing this relocation the code in
7190 write.c is going to call bfd_install_relocation, which is also
7191 going to use the symbol value. That means that if the reloc is
7192 fully resolved we want to use *valP since bfd_install_relocation is
7194 However, if the reloc is not fully resolved we do not want to
7195 use *valP, and must use fx_offset instead. If the relocation
7196 is PC-relative, we then need to re-apply md_pcrel_from_section
7197 to this new relocation value. */
7198 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
7203 value
= fixP
->fx_offset
;
7205 value
-= md_pcrel_from_section (fixP
, seg
);
7209 /* We are only able to convert some relocs to pc-relative. */
7212 switch (fixP
->fx_r_type
)
7215 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
7219 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
7223 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
7226 case BFD_RELOC_LO16
:
7227 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
7230 case BFD_RELOC_HI16
:
7231 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
7234 case BFD_RELOC_HI16_S
:
7235 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
7238 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7239 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGH
;
7242 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7243 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHA
;
7246 case BFD_RELOC_PPC64_HIGHER
:
7247 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER
;
7250 case BFD_RELOC_PPC64_HIGHER_S
:
7251 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA
;
7254 case BFD_RELOC_PPC64_HIGHEST
:
7255 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST
;
7258 case BFD_RELOC_PPC64_HIGHEST_S
:
7259 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA
;
7262 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
7263 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER34
;
7266 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
7267 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA34
;
7270 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
7271 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST34
;
7274 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
7275 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA34
;
7278 case BFD_RELOC_PPC_16DX_HA
:
7279 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7282 case BFD_RELOC_PPC64_D34
:
7283 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL34
;
7286 case BFD_RELOC_PPC64_D28
:
7287 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL28
;
7294 else if (!fixP
->fx_done
7295 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
7297 /* addpcis is relative to next insn address. */
7299 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7304 if (fixP
->fx_pcrel_adjust
!= 0)
7306 /* This is a fixup on an instruction. */
7307 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
7309 operand
= &powerpc_operands
[opindex
];
7311 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
7312 does not generate a reloc. It uses the offset of `sym' within its
7313 csect. Other usages, such as `.long sym', generate relocs. This
7314 is the documented behaviour of non-TOC symbols. */
7315 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
7316 && (operand
->bitm
& 0xfff0) == 0xfff0
7317 && operand
->shift
== 0
7318 && (operand
->insert
== NULL
|| ppc_obj64
)
7319 && fixP
->fx_addsy
!= NULL
7320 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
7321 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
7322 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC0
7323 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
7325 value
= fixP
->fx_offset
;
7329 /* During parsing of instructions, a TOC16 reloc is generated for
7330 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
7331 in the toc. But at parse time, SYM may be not yet defined, so
7332 check again here. */
7333 if (fixP
->fx_r_type
== BFD_RELOC_16
7334 && fixP
->fx_addsy
!= NULL
7335 && ppc_is_toc_sym (fixP
->fx_addsy
))
7336 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
7340 /* Calculate value to be stored in field. */
7342 switch (fixP
->fx_r_type
)
7345 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
7346 case BFD_RELOC_PPC_VLE_LO16A
:
7347 case BFD_RELOC_PPC_VLE_LO16D
:
7349 case BFD_RELOC_LO16
:
7350 case BFD_RELOC_LO16_PCREL
:
7351 fieldval
= value
& 0xffff;
7353 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7354 fieldval
= SEX16 (fieldval
);
7355 fixP
->fx_no_overflow
= 1;
7358 case BFD_RELOC_HI16
:
7359 case BFD_RELOC_HI16_PCREL
:
7361 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7363 fieldval
= value
>> 16;
7364 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7366 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7367 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7373 case BFD_RELOC_PPC_VLE_HI16A
:
7374 case BFD_RELOC_PPC_VLE_HI16D
:
7375 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7377 fieldval
= PPC_HI (value
);
7378 goto sign_extend_16
;
7380 case BFD_RELOC_HI16_S
:
7381 case BFD_RELOC_HI16_S_PCREL
:
7382 case BFD_RELOC_PPC_16DX_HA
:
7383 case BFD_RELOC_PPC_REL16DX_HA
:
7385 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7387 fieldval
= (value
+ 0x8000) >> 16;
7388 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7390 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7391 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7397 case BFD_RELOC_PPC_VLE_HA16A
:
7398 case BFD_RELOC_PPC_VLE_HA16D
:
7399 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7401 fieldval
= PPC_HA (value
);
7402 goto sign_extend_16
;
7405 case BFD_RELOC_PPC64_HIGHER
:
7406 fieldval
= PPC_HIGHER (value
);
7407 goto sign_extend_16
;
7409 case BFD_RELOC_PPC64_HIGHER_S
:
7410 fieldval
= PPC_HIGHERA (value
);
7411 goto sign_extend_16
;
7413 case BFD_RELOC_PPC64_HIGHEST
:
7414 fieldval
= PPC_HIGHEST (value
);
7415 goto sign_extend_16
;
7417 case BFD_RELOC_PPC64_HIGHEST_S
:
7418 fieldval
= PPC_HIGHESTA (value
);
7419 goto sign_extend_16
;
7426 if (operand
!= NULL
)
7428 /* Handle relocs in an insn. */
7429 switch (fixP
->fx_r_type
)
7432 /* The following relocs can't be calculated by the assembler.
7433 Leave the field zero. */
7434 case BFD_RELOC_PPC_TPREL16
:
7435 case BFD_RELOC_PPC_TPREL16_LO
:
7436 case BFD_RELOC_PPC_TPREL16_HI
:
7437 case BFD_RELOC_PPC_TPREL16_HA
:
7438 case BFD_RELOC_PPC_DTPREL16
:
7439 case BFD_RELOC_PPC_DTPREL16_LO
:
7440 case BFD_RELOC_PPC_DTPREL16_HI
:
7441 case BFD_RELOC_PPC_DTPREL16_HA
:
7442 case BFD_RELOC_PPC_GOT_TLSGD16
:
7443 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7444 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7445 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7446 case BFD_RELOC_PPC_GOT_TLSLD16
:
7447 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7448 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7449 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7450 case BFD_RELOC_PPC_GOT_TPREL16
:
7451 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7452 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7453 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7454 case BFD_RELOC_PPC_GOT_DTPREL16
:
7455 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7456 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7457 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7458 case BFD_RELOC_PPC64_TPREL16_DS
:
7459 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
7460 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7461 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7462 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7463 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7464 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7465 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7466 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7467 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7468 case BFD_RELOC_PPC64_DTPREL16_DS
:
7469 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
7470 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7471 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7472 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7473 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7474 gas_assert (fixP
->fx_addsy
!= NULL
);
7475 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7479 /* These also should leave the field zero for the same
7480 reason. Note that older versions of gas wrote values
7481 here. If we want to go back to the old behaviour, then
7482 all _LO and _LO_DS cases will need to be treated like
7483 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
7484 case BFD_RELOC_16_GOTOFF
:
7485 case BFD_RELOC_LO16_GOTOFF
:
7486 case BFD_RELOC_HI16_GOTOFF
:
7487 case BFD_RELOC_HI16_S_GOTOFF
:
7488 case BFD_RELOC_LO16_PLTOFF
:
7489 case BFD_RELOC_HI16_PLTOFF
:
7490 case BFD_RELOC_HI16_S_PLTOFF
:
7491 case BFD_RELOC_GPREL16
:
7492 case BFD_RELOC_16_BASEREL
:
7493 case BFD_RELOC_LO16_BASEREL
:
7494 case BFD_RELOC_HI16_BASEREL
:
7495 case BFD_RELOC_HI16_S_BASEREL
:
7496 case BFD_RELOC_PPC_TOC16
:
7497 case BFD_RELOC_PPC64_TOC16_LO
:
7498 case BFD_RELOC_PPC64_TOC16_HI
:
7499 case BFD_RELOC_PPC64_TOC16_HA
:
7500 case BFD_RELOC_PPC64_PLTGOT16
:
7501 case BFD_RELOC_PPC64_PLTGOT16_LO
:
7502 case BFD_RELOC_PPC64_PLTGOT16_HI
:
7503 case BFD_RELOC_PPC64_PLTGOT16_HA
:
7504 case BFD_RELOC_PPC64_GOT16_DS
:
7505 case BFD_RELOC_PPC64_GOT16_LO_DS
:
7506 case BFD_RELOC_PPC64_PLT16_LO_DS
:
7507 case BFD_RELOC_PPC64_SECTOFF_DS
:
7508 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
7509 case BFD_RELOC_PPC64_TOC16_DS
:
7510 case BFD_RELOC_PPC64_TOC16_LO_DS
:
7511 case BFD_RELOC_PPC64_PLTGOT16_DS
:
7512 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
7513 case BFD_RELOC_PPC_EMB_NADDR16
:
7514 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7515 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7516 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7517 case BFD_RELOC_PPC_EMB_SDAI16
:
7518 case BFD_RELOC_PPC_EMB_SDA2I16
:
7519 case BFD_RELOC_PPC_EMB_SDA2REL
:
7520 case BFD_RELOC_PPC_EMB_SDA21
:
7521 case BFD_RELOC_PPC_EMB_MRKREF
:
7522 case BFD_RELOC_PPC_EMB_RELSEC16
:
7523 case BFD_RELOC_PPC_EMB_RELST_LO
:
7524 case BFD_RELOC_PPC_EMB_RELST_HI
:
7525 case BFD_RELOC_PPC_EMB_RELST_HA
:
7526 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7527 case BFD_RELOC_PPC_EMB_RELSDA
:
7528 case BFD_RELOC_PPC_VLE_SDA21
:
7529 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7530 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7531 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
7532 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7533 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
7534 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7535 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
7536 case BFD_RELOC_PPC64_GOT_PCREL34
:
7537 case BFD_RELOC_PPC64_PLT_PCREL34
:
7538 gas_assert (fixP
->fx_addsy
!= NULL
);
7541 case BFD_RELOC_PPC_TLS
:
7542 case BFD_RELOC_PPC_TLSGD
:
7543 case BFD_RELOC_PPC_TLSLD
:
7549 case BFD_RELOC_PPC_B16
:
7550 /* Adjust the offset to the instruction boundary. */
7555 case BFD_RELOC_VTABLE_INHERIT
:
7556 case BFD_RELOC_VTABLE_ENTRY
:
7557 case BFD_RELOC_PPC_DTPMOD
:
7558 case BFD_RELOC_PPC_TPREL
:
7559 case BFD_RELOC_PPC_DTPREL
:
7560 case BFD_RELOC_PPC_COPY
:
7561 case BFD_RELOC_PPC_GLOB_DAT
:
7562 case BFD_RELOC_32_PLT_PCREL
:
7563 case BFD_RELOC_PPC_EMB_NADDR32
:
7564 case BFD_RELOC_PPC64_TOC
:
7565 case BFD_RELOC_CTOR
:
7567 case BFD_RELOC_32_PCREL
:
7570 case BFD_RELOC_64_PCREL
:
7571 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7572 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7573 _("%s unsupported as instruction fixup"),
7574 bfd_get_reloc_code_name (fixP
->fx_r_type
));
7583 /* powerpc uses RELA style relocs, so if emitting a reloc the field
7584 contents can stay at zero. */
7585 #define APPLY_RELOC fixP->fx_done
7587 #define APPLY_RELOC 1
7589 /* We need to call the insert function even when fieldval is
7590 zero if the insert function would translate that zero to a
7591 bit pattern other than all zeros. */
7592 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
7595 unsigned char *where
;
7597 /* Fetch the instruction, insert the fully resolved operand
7598 value, and stuff the instruction back again. */
7599 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
7600 if (target_big_endian
)
7602 if (fixP
->fx_size
< 4)
7603 insn
= bfd_getb16 (where
);
7606 insn
= bfd_getb32 (where
);
7607 if (fixP
->fx_size
> 4)
7608 insn
= insn
<< 32 | bfd_getb32 (where
+ 4);
7613 if (fixP
->fx_size
< 4)
7614 insn
= bfd_getl16 (where
);
7617 insn
= bfd_getl32 (where
);
7618 if (fixP
->fx_size
> 4)
7619 insn
= insn
<< 32 | bfd_getl32 (where
+ 4);
7622 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
7623 fixP
->tc_fix_data
.ppc_cpu
,
7624 fixP
->fx_file
, fixP
->fx_line
);
7625 if (target_big_endian
)
7627 if (fixP
->fx_size
< 4)
7628 bfd_putb16 (insn
, where
);
7631 if (fixP
->fx_size
> 4)
7633 bfd_putb32 (insn
, where
+ 4);
7636 bfd_putb32 (insn
, where
);
7641 if (fixP
->fx_size
< 4)
7642 bfd_putl16 (insn
, where
);
7645 if (fixP
->fx_size
> 4)
7647 bfd_putl32 (insn
, where
+ 4);
7650 bfd_putl32 (insn
, where
);
7656 /* Nothing else to do here. */
7659 gas_assert (fixP
->fx_addsy
!= NULL
);
7660 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7665 /* Use expr_symbol_where to see if this is an expression
7667 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7668 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7669 _("unresolved expression that must be resolved"));
7671 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7672 _("unsupported relocation against %s"),
7673 S_GET_NAME (fixP
->fx_addsy
));
7680 /* Handle relocs in data. */
7681 switch (fixP
->fx_r_type
)
7683 case BFD_RELOC_VTABLE_INHERIT
:
7685 && !S_IS_DEFINED (fixP
->fx_addsy
)
7686 && !S_IS_WEAK (fixP
->fx_addsy
))
7687 S_SET_WEAK (fixP
->fx_addsy
);
7690 case BFD_RELOC_VTABLE_ENTRY
:
7695 /* These can appear with @l etc. in data. */
7696 case BFD_RELOC_LO16
:
7697 case BFD_RELOC_LO16_PCREL
:
7698 case BFD_RELOC_HI16
:
7699 case BFD_RELOC_HI16_PCREL
:
7700 case BFD_RELOC_HI16_S
:
7701 case BFD_RELOC_HI16_S_PCREL
:
7702 case BFD_RELOC_PPC64_HIGHER
:
7703 case BFD_RELOC_PPC64_HIGHER_S
:
7704 case BFD_RELOC_PPC64_HIGHEST
:
7705 case BFD_RELOC_PPC64_HIGHEST_S
:
7706 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7707 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7708 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7711 case BFD_RELOC_PPC_DTPMOD
:
7712 case BFD_RELOC_PPC_TPREL
:
7713 case BFD_RELOC_PPC_DTPREL
:
7714 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7717 /* Just punt all of these to the linker. */
7718 case BFD_RELOC_PPC_B16_BRTAKEN
:
7719 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7720 case BFD_RELOC_16_GOTOFF
:
7721 case BFD_RELOC_LO16_GOTOFF
:
7722 case BFD_RELOC_HI16_GOTOFF
:
7723 case BFD_RELOC_HI16_S_GOTOFF
:
7724 case BFD_RELOC_LO16_PLTOFF
:
7725 case BFD_RELOC_HI16_PLTOFF
:
7726 case BFD_RELOC_HI16_S_PLTOFF
:
7727 case BFD_RELOC_PPC_COPY
:
7728 case BFD_RELOC_PPC_GLOB_DAT
:
7729 case BFD_RELOC_16_BASEREL
:
7730 case BFD_RELOC_LO16_BASEREL
:
7731 case BFD_RELOC_HI16_BASEREL
:
7732 case BFD_RELOC_HI16_S_BASEREL
:
7733 case BFD_RELOC_PPC_TLS
:
7734 case BFD_RELOC_PPC_DTPREL16_LO
:
7735 case BFD_RELOC_PPC_DTPREL16_HI
:
7736 case BFD_RELOC_PPC_DTPREL16_HA
:
7737 case BFD_RELOC_PPC_TPREL16_LO
:
7738 case BFD_RELOC_PPC_TPREL16_HI
:
7739 case BFD_RELOC_PPC_TPREL16_HA
:
7740 case BFD_RELOC_PPC_GOT_TLSGD16
:
7741 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7742 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7743 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7744 case BFD_RELOC_PPC_GOT_TLSLD16
:
7745 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7746 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7747 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7748 case BFD_RELOC_PPC_GOT_DTPREL16
:
7749 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7750 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7751 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7752 case BFD_RELOC_PPC_GOT_TPREL16
:
7753 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7754 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7755 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7756 case BFD_RELOC_24_PLT_PCREL
:
7757 case BFD_RELOC_PPC_LOCAL24PC
:
7758 case BFD_RELOC_32_PLT_PCREL
:
7759 case BFD_RELOC_GPREL16
:
7760 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7761 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7762 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7763 case BFD_RELOC_PPC_EMB_NADDR32
:
7764 case BFD_RELOC_PPC_EMB_NADDR16
:
7765 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7766 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7767 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7768 case BFD_RELOC_PPC_EMB_SDAI16
:
7769 case BFD_RELOC_PPC_EMB_SDA2REL
:
7770 case BFD_RELOC_PPC_EMB_SDA2I16
:
7771 case BFD_RELOC_PPC_EMB_SDA21
:
7772 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7773 case BFD_RELOC_PPC_EMB_MRKREF
:
7774 case BFD_RELOC_PPC_EMB_RELSEC16
:
7775 case BFD_RELOC_PPC_EMB_RELST_LO
:
7776 case BFD_RELOC_PPC_EMB_RELST_HI
:
7777 case BFD_RELOC_PPC_EMB_RELST_HA
:
7778 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7779 case BFD_RELOC_PPC_EMB_RELSDA
:
7780 case BFD_RELOC_PPC64_TOC
:
7781 case BFD_RELOC_PPC_TOC16
:
7782 case BFD_RELOC_PPC64_TOC16_LO
:
7783 case BFD_RELOC_PPC64_TOC16_HI
:
7784 case BFD_RELOC_PPC64_TOC16_HA
:
7785 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7786 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7787 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7788 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7789 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7790 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7791 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7792 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7793 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7794 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7795 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7796 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7802 case BFD_RELOC_NONE
:
7804 case BFD_RELOC_CTOR
:
7806 case BFD_RELOC_32_PCREL
:
7809 case BFD_RELOC_64_PCREL
:
7811 case BFD_RELOC_16_PCREL
:
7817 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7822 if (fixP
->fx_size
&& APPLY_RELOC
)
7823 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7824 fieldval
, fixP
->fx_size
);
7826 && (seg
->flags
& SEC_CODE
) != 0
7827 && fixP
->fx_size
== 4
7830 && (fixP
->fx_r_type
== BFD_RELOC_32
7831 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7832 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7833 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7834 _("data in executable section"));
7838 ppc_elf_validate_fix (fixP
, seg
);
7839 fixP
->fx_addnumber
= value
;
7841 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7842 from the section contents. If we are going to be emitting a reloc
7843 then the section contents are immaterial, so don't warn if they
7844 happen to overflow. Leave such warnings to ld. */
7847 fixP
->fx_no_overflow
= 1;
7849 /* Arrange to emit .TOC. as a normal symbol if used in anything
7850 but .TOC.@tocbase. */
7852 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7853 && fixP
->fx_addsy
!= NULL
7854 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7855 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7858 if (fixP
->fx_r_type
!= BFD_RELOC_PPC_TOC16
)
7859 fixP
->fx_addnumber
= 0;
7863 fixP
->fx_addnumber
= 0;
7865 /* We want to use the offset within the toc, not the actual VMA
7867 fixP
->fx_addnumber
=
7868 - bfd_get_section_vma (stdoutput
, S_GET_SEGMENT (fixP
->fx_addsy
))
7869 - S_GET_VALUE (ppc_toc_csect
);
7870 /* Set *valP to avoid errors. */
7877 /* Generate a reloc for a fixup. */
7880 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7884 reloc
= XNEW (arelent
);
7886 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7887 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7888 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7889 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7890 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7892 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7893 _("reloc %d not supported by object file format"),
7894 (int) fixp
->fx_r_type
);
7897 reloc
->addend
= fixp
->fx_addnumber
;
7903 ppc_cfi_frame_initial_instructions (void)
7905 cfi_add_CFA_def_cfa (1, 0);
7909 tc_ppc_regname_to_dw2regnum (char *regname
)
7911 unsigned int regnum
= -1;
7915 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7917 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7918 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7919 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7920 { "spe_acc", 111 }, { "spefscr", 112 }
7923 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7924 if (strcmp (regnames
[i
].name
, regname
) == 0)
7925 return regnames
[i
].dw2regnum
;
7927 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7929 p
= regname
+ 1 + (regname
[1] == '.');
7930 regnum
= strtoul (p
, &q
, 10);
7931 if (p
== q
|| *q
|| regnum
>= 32)
7933 if (regname
[0] == 'f')
7935 else if (regname
[0] == 'v')
7938 else if (regname
[0] == 'c' && regname
[1] == 'r')
7940 p
= regname
+ 2 + (regname
[2] == '.');
7941 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7943 regnum
= p
[0] - '0' + 68;