1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2018 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian
;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian
= 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p
= TARGET_REG_NAMES_P
;
96 static void ppc_macro (char *, const struct powerpc_macro
*);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS
*, offsetT
);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
153 /* Generic assembler global variables which must be defined by all
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars
[] = "#!";
162 static const char ppc_eabi_comment_chars
[] = "#";
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
167 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
170 const char comment_chars
[] = "#";
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars
[] = "#";
176 /* Characters which may be used to separate multiple commands on a
178 const char line_separator_chars
[] = ";";
180 /* Characters which are used to indicate an exponent in a floating
182 const char EXP_CHARS
[] = "eE";
184 /* Characters which mean that a number is a floating point constant,
186 const char FLT_CHARS
[] = "dD";
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars
[] = "%[";
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment
;
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length
;
198 /* More than this number of nops in an alignment op gets a branch
200 unsigned long nop_limit
= 4;
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu
= 0;
205 ppc_cpu_t sticky
= 0;
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion
= 0;
211 /* Flags set on encountering toc relocs. */
213 has_large_toc_reloc
= 1,
214 has_small_toc_reloc
= 2
218 /* Warn on emitting data to code sections. */
224 /* The target specific pseudo-ops which we support. */
226 const pseudo_typeS md_pseudo_table
[] =
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte
, 0 },
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm
, 0 },
237 { "lcomm", ppc_comm
, 1 },
241 { "bi", ppc_biei
, 0 },
243 { "csect", ppc_csect
, 0 },
244 { "dwsect", ppc_dwsect
, 0 },
245 { "data", ppc_section
, 'd' },
249 { "ei", ppc_biei
, 1 },
251 { "extern", ppc_extern
, 0 },
252 { "function", ppc_function
, 0 },
253 { "lglobl", ppc_lglobl
, 0 },
254 { "ref", ppc_ref
, 0 },
255 { "rename", ppc_rename
, 0 },
256 { "section", ppc_named_section
, 0 },
257 { "stabx", ppc_stabx
, 0 },
258 { "text", ppc_section
, 't' },
259 { "toc", ppc_toc
, 0 },
260 { "long", ppc_xcoff_cons
, 2 },
261 { "llong", ppc_xcoff_cons
, 3 },
262 { "word", ppc_xcoff_cons
, 1 },
263 { "short", ppc_xcoff_cons
, 1 },
264 { "vbyte", ppc_vbyte
, 0 },
268 { "llong", cons
, 8 },
269 { "rdata", ppc_elf_rdata
, 0 },
270 { "rodata", ppc_elf_rdata
, 0 },
271 { "lcomm", ppc_elf_lcomm
, 0 },
272 { "localentry", ppc_elf_localentry
, 0 },
273 { "abiversion", ppc_elf_abiversion
, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous
, 0 },
280 { "pdata", ppc_pdata
, 0 },
281 { "ydata", ppc_ydata
, 0 },
282 { "reldata", ppc_reldata
, 0 },
283 { "rdata", ppc_rdata
, 0 },
284 { "ualong", ppc_ualong
, 0 },
285 { "znop", ppc_znop
, 0 },
286 { "comm", ppc_pe_comm
, 0 },
287 { "lcomm", ppc_pe_comm
, 1 },
288 { "section", ppc_pe_section
, 0 },
289 { "function", ppc_pe_function
,0 },
290 { "tocd", ppc_pe_tocd
, 0 },
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
295 { "machine", ppc_machine
, 0 },
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
306 /* Structure to hold information about predefined registers. */
310 unsigned short value
;
311 unsigned short flags
;
314 /* List of registers that are pre-defined:
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
339 dsisr has the value 18
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
345 The table is sorted. Suitable for searching by a binary search. */
347 static const struct pd_reg pre_defined_registers
[] =
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG
},
351 { "cr.1", 1, PPC_OPERAND_CR_REG
},
352 { "cr.2", 2, PPC_OPERAND_CR_REG
},
353 { "cr.3", 3, PPC_OPERAND_CR_REG
},
354 { "cr.4", 4, PPC_OPERAND_CR_REG
},
355 { "cr.5", 5, PPC_OPERAND_CR_REG
},
356 { "cr.6", 6, PPC_OPERAND_CR_REG
},
357 { "cr.7", 7, PPC_OPERAND_CR_REG
},
359 { "cr0", 0, PPC_OPERAND_CR_REG
},
360 { "cr1", 1, PPC_OPERAND_CR_REG
},
361 { "cr2", 2, PPC_OPERAND_CR_REG
},
362 { "cr3", 3, PPC_OPERAND_CR_REG
},
363 { "cr4", 4, PPC_OPERAND_CR_REG
},
364 { "cr5", 5, PPC_OPERAND_CR_REG
},
365 { "cr6", 6, PPC_OPERAND_CR_REG
},
366 { "cr7", 7, PPC_OPERAND_CR_REG
},
368 { "ctr", 9, PPC_OPERAND_SPR
},
369 { "dar", 19, PPC_OPERAND_SPR
},
370 { "dec", 22, PPC_OPERAND_SPR
},
371 { "dsisr", 18, PPC_OPERAND_SPR
},
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR
},
375 { "f.1", 1, PPC_OPERAND_FPR
},
376 { "f.10", 10, PPC_OPERAND_FPR
},
377 { "f.11", 11, PPC_OPERAND_FPR
},
378 { "f.12", 12, PPC_OPERAND_FPR
},
379 { "f.13", 13, PPC_OPERAND_FPR
},
380 { "f.14", 14, PPC_OPERAND_FPR
},
381 { "f.15", 15, PPC_OPERAND_FPR
},
382 { "f.16", 16, PPC_OPERAND_FPR
},
383 { "f.17", 17, PPC_OPERAND_FPR
},
384 { "f.18", 18, PPC_OPERAND_FPR
},
385 { "f.19", 19, PPC_OPERAND_FPR
},
386 { "f.2", 2, PPC_OPERAND_FPR
},
387 { "f.20", 20, PPC_OPERAND_FPR
},
388 { "f.21", 21, PPC_OPERAND_FPR
},
389 { "f.22", 22, PPC_OPERAND_FPR
},
390 { "f.23", 23, PPC_OPERAND_FPR
},
391 { "f.24", 24, PPC_OPERAND_FPR
},
392 { "f.25", 25, PPC_OPERAND_FPR
},
393 { "f.26", 26, PPC_OPERAND_FPR
},
394 { "f.27", 27, PPC_OPERAND_FPR
},
395 { "f.28", 28, PPC_OPERAND_FPR
},
396 { "f.29", 29, PPC_OPERAND_FPR
},
397 { "f.3", 3, PPC_OPERAND_FPR
},
398 { "f.30", 30, PPC_OPERAND_FPR
},
399 { "f.31", 31, PPC_OPERAND_FPR
},
400 { "f.32", 32, PPC_OPERAND_VSR
},
401 { "f.33", 33, PPC_OPERAND_VSR
},
402 { "f.34", 34, PPC_OPERAND_VSR
},
403 { "f.35", 35, PPC_OPERAND_VSR
},
404 { "f.36", 36, PPC_OPERAND_VSR
},
405 { "f.37", 37, PPC_OPERAND_VSR
},
406 { "f.38", 38, PPC_OPERAND_VSR
},
407 { "f.39", 39, PPC_OPERAND_VSR
},
408 { "f.4", 4, PPC_OPERAND_FPR
},
409 { "f.40", 40, PPC_OPERAND_VSR
},
410 { "f.41", 41, PPC_OPERAND_VSR
},
411 { "f.42", 42, PPC_OPERAND_VSR
},
412 { "f.43", 43, PPC_OPERAND_VSR
},
413 { "f.44", 44, PPC_OPERAND_VSR
},
414 { "f.45", 45, PPC_OPERAND_VSR
},
415 { "f.46", 46, PPC_OPERAND_VSR
},
416 { "f.47", 47, PPC_OPERAND_VSR
},
417 { "f.48", 48, PPC_OPERAND_VSR
},
418 { "f.49", 49, PPC_OPERAND_VSR
},
419 { "f.5", 5, PPC_OPERAND_FPR
},
420 { "f.50", 50, PPC_OPERAND_VSR
},
421 { "f.51", 51, PPC_OPERAND_VSR
},
422 { "f.52", 52, PPC_OPERAND_VSR
},
423 { "f.53", 53, PPC_OPERAND_VSR
},
424 { "f.54", 54, PPC_OPERAND_VSR
},
425 { "f.55", 55, PPC_OPERAND_VSR
},
426 { "f.56", 56, PPC_OPERAND_VSR
},
427 { "f.57", 57, PPC_OPERAND_VSR
},
428 { "f.58", 58, PPC_OPERAND_VSR
},
429 { "f.59", 59, PPC_OPERAND_VSR
},
430 { "f.6", 6, PPC_OPERAND_FPR
},
431 { "f.60", 60, PPC_OPERAND_VSR
},
432 { "f.61", 61, PPC_OPERAND_VSR
},
433 { "f.62", 62, PPC_OPERAND_VSR
},
434 { "f.63", 63, PPC_OPERAND_VSR
},
435 { "f.7", 7, PPC_OPERAND_FPR
},
436 { "f.8", 8, PPC_OPERAND_FPR
},
437 { "f.9", 9, PPC_OPERAND_FPR
},
439 { "f0", 0, PPC_OPERAND_FPR
},
440 { "f1", 1, PPC_OPERAND_FPR
},
441 { "f10", 10, PPC_OPERAND_FPR
},
442 { "f11", 11, PPC_OPERAND_FPR
},
443 { "f12", 12, PPC_OPERAND_FPR
},
444 { "f13", 13, PPC_OPERAND_FPR
},
445 { "f14", 14, PPC_OPERAND_FPR
},
446 { "f15", 15, PPC_OPERAND_FPR
},
447 { "f16", 16, PPC_OPERAND_FPR
},
448 { "f17", 17, PPC_OPERAND_FPR
},
449 { "f18", 18, PPC_OPERAND_FPR
},
450 { "f19", 19, PPC_OPERAND_FPR
},
451 { "f2", 2, PPC_OPERAND_FPR
},
452 { "f20", 20, PPC_OPERAND_FPR
},
453 { "f21", 21, PPC_OPERAND_FPR
},
454 { "f22", 22, PPC_OPERAND_FPR
},
455 { "f23", 23, PPC_OPERAND_FPR
},
456 { "f24", 24, PPC_OPERAND_FPR
},
457 { "f25", 25, PPC_OPERAND_FPR
},
458 { "f26", 26, PPC_OPERAND_FPR
},
459 { "f27", 27, PPC_OPERAND_FPR
},
460 { "f28", 28, PPC_OPERAND_FPR
},
461 { "f29", 29, PPC_OPERAND_FPR
},
462 { "f3", 3, PPC_OPERAND_FPR
},
463 { "f30", 30, PPC_OPERAND_FPR
},
464 { "f31", 31, PPC_OPERAND_FPR
},
465 { "f32", 32, PPC_OPERAND_VSR
},
466 { "f33", 33, PPC_OPERAND_VSR
},
467 { "f34", 34, PPC_OPERAND_VSR
},
468 { "f35", 35, PPC_OPERAND_VSR
},
469 { "f36", 36, PPC_OPERAND_VSR
},
470 { "f37", 37, PPC_OPERAND_VSR
},
471 { "f38", 38, PPC_OPERAND_VSR
},
472 { "f39", 39, PPC_OPERAND_VSR
},
473 { "f4", 4, PPC_OPERAND_FPR
},
474 { "f40", 40, PPC_OPERAND_VSR
},
475 { "f41", 41, PPC_OPERAND_VSR
},
476 { "f42", 42, PPC_OPERAND_VSR
},
477 { "f43", 43, PPC_OPERAND_VSR
},
478 { "f44", 44, PPC_OPERAND_VSR
},
479 { "f45", 45, PPC_OPERAND_VSR
},
480 { "f46", 46, PPC_OPERAND_VSR
},
481 { "f47", 47, PPC_OPERAND_VSR
},
482 { "f48", 48, PPC_OPERAND_VSR
},
483 { "f49", 49, PPC_OPERAND_VSR
},
484 { "f5", 5, PPC_OPERAND_FPR
},
485 { "f50", 50, PPC_OPERAND_VSR
},
486 { "f51", 51, PPC_OPERAND_VSR
},
487 { "f52", 52, PPC_OPERAND_VSR
},
488 { "f53", 53, PPC_OPERAND_VSR
},
489 { "f54", 54, PPC_OPERAND_VSR
},
490 { "f55", 55, PPC_OPERAND_VSR
},
491 { "f56", 56, PPC_OPERAND_VSR
},
492 { "f57", 57, PPC_OPERAND_VSR
},
493 { "f58", 58, PPC_OPERAND_VSR
},
494 { "f59", 59, PPC_OPERAND_VSR
},
495 { "f6", 6, PPC_OPERAND_FPR
},
496 { "f60", 60, PPC_OPERAND_VSR
},
497 { "f61", 61, PPC_OPERAND_VSR
},
498 { "f62", 62, PPC_OPERAND_VSR
},
499 { "f63", 63, PPC_OPERAND_VSR
},
500 { "f7", 7, PPC_OPERAND_FPR
},
501 { "f8", 8, PPC_OPERAND_FPR
},
502 { "f9", 9, PPC_OPERAND_FPR
},
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR
},
506 { "gqr.1", 1, PPC_OPERAND_GQR
},
507 { "gqr.2", 2, PPC_OPERAND_GQR
},
508 { "gqr.3", 3, PPC_OPERAND_GQR
},
509 { "gqr.4", 4, PPC_OPERAND_GQR
},
510 { "gqr.5", 5, PPC_OPERAND_GQR
},
511 { "gqr.6", 6, PPC_OPERAND_GQR
},
512 { "gqr.7", 7, PPC_OPERAND_GQR
},
513 { "gqr0", 0, PPC_OPERAND_GQR
},
514 { "gqr1", 1, PPC_OPERAND_GQR
},
515 { "gqr2", 2, PPC_OPERAND_GQR
},
516 { "gqr3", 3, PPC_OPERAND_GQR
},
517 { "gqr4", 4, PPC_OPERAND_GQR
},
518 { "gqr5", 5, PPC_OPERAND_GQR
},
519 { "gqr6", 6, PPC_OPERAND_GQR
},
520 { "gqr7", 7, PPC_OPERAND_GQR
},
522 { "lr", 8, PPC_OPERAND_SPR
},
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR
},
526 { "r.1", 1, PPC_OPERAND_GPR
},
527 { "r.10", 10, PPC_OPERAND_GPR
},
528 { "r.11", 11, PPC_OPERAND_GPR
},
529 { "r.12", 12, PPC_OPERAND_GPR
},
530 { "r.13", 13, PPC_OPERAND_GPR
},
531 { "r.14", 14, PPC_OPERAND_GPR
},
532 { "r.15", 15, PPC_OPERAND_GPR
},
533 { "r.16", 16, PPC_OPERAND_GPR
},
534 { "r.17", 17, PPC_OPERAND_GPR
},
535 { "r.18", 18, PPC_OPERAND_GPR
},
536 { "r.19", 19, PPC_OPERAND_GPR
},
537 { "r.2", 2, PPC_OPERAND_GPR
},
538 { "r.20", 20, PPC_OPERAND_GPR
},
539 { "r.21", 21, PPC_OPERAND_GPR
},
540 { "r.22", 22, PPC_OPERAND_GPR
},
541 { "r.23", 23, PPC_OPERAND_GPR
},
542 { "r.24", 24, PPC_OPERAND_GPR
},
543 { "r.25", 25, PPC_OPERAND_GPR
},
544 { "r.26", 26, PPC_OPERAND_GPR
},
545 { "r.27", 27, PPC_OPERAND_GPR
},
546 { "r.28", 28, PPC_OPERAND_GPR
},
547 { "r.29", 29, PPC_OPERAND_GPR
},
548 { "r.3", 3, PPC_OPERAND_GPR
},
549 { "r.30", 30, PPC_OPERAND_GPR
},
550 { "r.31", 31, PPC_OPERAND_GPR
},
551 { "r.4", 4, PPC_OPERAND_GPR
},
552 { "r.5", 5, PPC_OPERAND_GPR
},
553 { "r.6", 6, PPC_OPERAND_GPR
},
554 { "r.7", 7, PPC_OPERAND_GPR
},
555 { "r.8", 8, PPC_OPERAND_GPR
},
556 { "r.9", 9, PPC_OPERAND_GPR
},
558 { "r.sp", 1, PPC_OPERAND_GPR
},
560 { "r.toc", 2, PPC_OPERAND_GPR
},
562 { "r0", 0, PPC_OPERAND_GPR
},
563 { "r1", 1, PPC_OPERAND_GPR
},
564 { "r10", 10, PPC_OPERAND_GPR
},
565 { "r11", 11, PPC_OPERAND_GPR
},
566 { "r12", 12, PPC_OPERAND_GPR
},
567 { "r13", 13, PPC_OPERAND_GPR
},
568 { "r14", 14, PPC_OPERAND_GPR
},
569 { "r15", 15, PPC_OPERAND_GPR
},
570 { "r16", 16, PPC_OPERAND_GPR
},
571 { "r17", 17, PPC_OPERAND_GPR
},
572 { "r18", 18, PPC_OPERAND_GPR
},
573 { "r19", 19, PPC_OPERAND_GPR
},
574 { "r2", 2, PPC_OPERAND_GPR
},
575 { "r20", 20, PPC_OPERAND_GPR
},
576 { "r21", 21, PPC_OPERAND_GPR
},
577 { "r22", 22, PPC_OPERAND_GPR
},
578 { "r23", 23, PPC_OPERAND_GPR
},
579 { "r24", 24, PPC_OPERAND_GPR
},
580 { "r25", 25, PPC_OPERAND_GPR
},
581 { "r26", 26, PPC_OPERAND_GPR
},
582 { "r27", 27, PPC_OPERAND_GPR
},
583 { "r28", 28, PPC_OPERAND_GPR
},
584 { "r29", 29, PPC_OPERAND_GPR
},
585 { "r3", 3, PPC_OPERAND_GPR
},
586 { "r30", 30, PPC_OPERAND_GPR
},
587 { "r31", 31, PPC_OPERAND_GPR
},
588 { "r4", 4, PPC_OPERAND_GPR
},
589 { "r5", 5, PPC_OPERAND_GPR
},
590 { "r6", 6, PPC_OPERAND_GPR
},
591 { "r7", 7, PPC_OPERAND_GPR
},
592 { "r8", 8, PPC_OPERAND_GPR
},
593 { "r9", 9, PPC_OPERAND_GPR
},
595 { "rtoc", 2, PPC_OPERAND_GPR
},
597 { "sdr1", 25, PPC_OPERAND_SPR
},
599 { "sp", 1, PPC_OPERAND_GPR
},
601 { "srr0", 26, PPC_OPERAND_SPR
},
602 { "srr1", 27, PPC_OPERAND_SPR
},
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR
},
606 { "v.1", 1, PPC_OPERAND_VR
},
607 { "v.10", 10, PPC_OPERAND_VR
},
608 { "v.11", 11, PPC_OPERAND_VR
},
609 { "v.12", 12, PPC_OPERAND_VR
},
610 { "v.13", 13, PPC_OPERAND_VR
},
611 { "v.14", 14, PPC_OPERAND_VR
},
612 { "v.15", 15, PPC_OPERAND_VR
},
613 { "v.16", 16, PPC_OPERAND_VR
},
614 { "v.17", 17, PPC_OPERAND_VR
},
615 { "v.18", 18, PPC_OPERAND_VR
},
616 { "v.19", 19, PPC_OPERAND_VR
},
617 { "v.2", 2, PPC_OPERAND_VR
},
618 { "v.20", 20, PPC_OPERAND_VR
},
619 { "v.21", 21, PPC_OPERAND_VR
},
620 { "v.22", 22, PPC_OPERAND_VR
},
621 { "v.23", 23, PPC_OPERAND_VR
},
622 { "v.24", 24, PPC_OPERAND_VR
},
623 { "v.25", 25, PPC_OPERAND_VR
},
624 { "v.26", 26, PPC_OPERAND_VR
},
625 { "v.27", 27, PPC_OPERAND_VR
},
626 { "v.28", 28, PPC_OPERAND_VR
},
627 { "v.29", 29, PPC_OPERAND_VR
},
628 { "v.3", 3, PPC_OPERAND_VR
},
629 { "v.30", 30, PPC_OPERAND_VR
},
630 { "v.31", 31, PPC_OPERAND_VR
},
631 { "v.4", 4, PPC_OPERAND_VR
},
632 { "v.5", 5, PPC_OPERAND_VR
},
633 { "v.6", 6, PPC_OPERAND_VR
},
634 { "v.7", 7, PPC_OPERAND_VR
},
635 { "v.8", 8, PPC_OPERAND_VR
},
636 { "v.9", 9, PPC_OPERAND_VR
},
638 { "v0", 0, PPC_OPERAND_VR
},
639 { "v1", 1, PPC_OPERAND_VR
},
640 { "v10", 10, PPC_OPERAND_VR
},
641 { "v11", 11, PPC_OPERAND_VR
},
642 { "v12", 12, PPC_OPERAND_VR
},
643 { "v13", 13, PPC_OPERAND_VR
},
644 { "v14", 14, PPC_OPERAND_VR
},
645 { "v15", 15, PPC_OPERAND_VR
},
646 { "v16", 16, PPC_OPERAND_VR
},
647 { "v17", 17, PPC_OPERAND_VR
},
648 { "v18", 18, PPC_OPERAND_VR
},
649 { "v19", 19, PPC_OPERAND_VR
},
650 { "v2", 2, PPC_OPERAND_VR
},
651 { "v20", 20, PPC_OPERAND_VR
},
652 { "v21", 21, PPC_OPERAND_VR
},
653 { "v22", 22, PPC_OPERAND_VR
},
654 { "v23", 23, PPC_OPERAND_VR
},
655 { "v24", 24, PPC_OPERAND_VR
},
656 { "v25", 25, PPC_OPERAND_VR
},
657 { "v26", 26, PPC_OPERAND_VR
},
658 { "v27", 27, PPC_OPERAND_VR
},
659 { "v28", 28, PPC_OPERAND_VR
},
660 { "v29", 29, PPC_OPERAND_VR
},
661 { "v3", 3, PPC_OPERAND_VR
},
662 { "v30", 30, PPC_OPERAND_VR
},
663 { "v31", 31, PPC_OPERAND_VR
},
664 { "v4", 4, PPC_OPERAND_VR
},
665 { "v5", 5, PPC_OPERAND_VR
},
666 { "v6", 6, PPC_OPERAND_VR
},
667 { "v7", 7, PPC_OPERAND_VR
},
668 { "v8", 8, PPC_OPERAND_VR
},
669 { "v9", 9, PPC_OPERAND_VR
},
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR
},
673 { "vs.1", 1, PPC_OPERAND_VSR
},
674 { "vs.10", 10, PPC_OPERAND_VSR
},
675 { "vs.11", 11, PPC_OPERAND_VSR
},
676 { "vs.12", 12, PPC_OPERAND_VSR
},
677 { "vs.13", 13, PPC_OPERAND_VSR
},
678 { "vs.14", 14, PPC_OPERAND_VSR
},
679 { "vs.15", 15, PPC_OPERAND_VSR
},
680 { "vs.16", 16, PPC_OPERAND_VSR
},
681 { "vs.17", 17, PPC_OPERAND_VSR
},
682 { "vs.18", 18, PPC_OPERAND_VSR
},
683 { "vs.19", 19, PPC_OPERAND_VSR
},
684 { "vs.2", 2, PPC_OPERAND_VSR
},
685 { "vs.20", 20, PPC_OPERAND_VSR
},
686 { "vs.21", 21, PPC_OPERAND_VSR
},
687 { "vs.22", 22, PPC_OPERAND_VSR
},
688 { "vs.23", 23, PPC_OPERAND_VSR
},
689 { "vs.24", 24, PPC_OPERAND_VSR
},
690 { "vs.25", 25, PPC_OPERAND_VSR
},
691 { "vs.26", 26, PPC_OPERAND_VSR
},
692 { "vs.27", 27, PPC_OPERAND_VSR
},
693 { "vs.28", 28, PPC_OPERAND_VSR
},
694 { "vs.29", 29, PPC_OPERAND_VSR
},
695 { "vs.3", 3, PPC_OPERAND_VSR
},
696 { "vs.30", 30, PPC_OPERAND_VSR
},
697 { "vs.31", 31, PPC_OPERAND_VSR
},
698 { "vs.32", 32, PPC_OPERAND_VSR
},
699 { "vs.33", 33, PPC_OPERAND_VSR
},
700 { "vs.34", 34, PPC_OPERAND_VSR
},
701 { "vs.35", 35, PPC_OPERAND_VSR
},
702 { "vs.36", 36, PPC_OPERAND_VSR
},
703 { "vs.37", 37, PPC_OPERAND_VSR
},
704 { "vs.38", 38, PPC_OPERAND_VSR
},
705 { "vs.39", 39, PPC_OPERAND_VSR
},
706 { "vs.4", 4, PPC_OPERAND_VSR
},
707 { "vs.40", 40, PPC_OPERAND_VSR
},
708 { "vs.41", 41, PPC_OPERAND_VSR
},
709 { "vs.42", 42, PPC_OPERAND_VSR
},
710 { "vs.43", 43, PPC_OPERAND_VSR
},
711 { "vs.44", 44, PPC_OPERAND_VSR
},
712 { "vs.45", 45, PPC_OPERAND_VSR
},
713 { "vs.46", 46, PPC_OPERAND_VSR
},
714 { "vs.47", 47, PPC_OPERAND_VSR
},
715 { "vs.48", 48, PPC_OPERAND_VSR
},
716 { "vs.49", 49, PPC_OPERAND_VSR
},
717 { "vs.5", 5, PPC_OPERAND_VSR
},
718 { "vs.50", 50, PPC_OPERAND_VSR
},
719 { "vs.51", 51, PPC_OPERAND_VSR
},
720 { "vs.52", 52, PPC_OPERAND_VSR
},
721 { "vs.53", 53, PPC_OPERAND_VSR
},
722 { "vs.54", 54, PPC_OPERAND_VSR
},
723 { "vs.55", 55, PPC_OPERAND_VSR
},
724 { "vs.56", 56, PPC_OPERAND_VSR
},
725 { "vs.57", 57, PPC_OPERAND_VSR
},
726 { "vs.58", 58, PPC_OPERAND_VSR
},
727 { "vs.59", 59, PPC_OPERAND_VSR
},
728 { "vs.6", 6, PPC_OPERAND_VSR
},
729 { "vs.60", 60, PPC_OPERAND_VSR
},
730 { "vs.61", 61, PPC_OPERAND_VSR
},
731 { "vs.62", 62, PPC_OPERAND_VSR
},
732 { "vs.63", 63, PPC_OPERAND_VSR
},
733 { "vs.7", 7, PPC_OPERAND_VSR
},
734 { "vs.8", 8, PPC_OPERAND_VSR
},
735 { "vs.9", 9, PPC_OPERAND_VSR
},
737 { "vs0", 0, PPC_OPERAND_VSR
},
738 { "vs1", 1, PPC_OPERAND_VSR
},
739 { "vs10", 10, PPC_OPERAND_VSR
},
740 { "vs11", 11, PPC_OPERAND_VSR
},
741 { "vs12", 12, PPC_OPERAND_VSR
},
742 { "vs13", 13, PPC_OPERAND_VSR
},
743 { "vs14", 14, PPC_OPERAND_VSR
},
744 { "vs15", 15, PPC_OPERAND_VSR
},
745 { "vs16", 16, PPC_OPERAND_VSR
},
746 { "vs17", 17, PPC_OPERAND_VSR
},
747 { "vs18", 18, PPC_OPERAND_VSR
},
748 { "vs19", 19, PPC_OPERAND_VSR
},
749 { "vs2", 2, PPC_OPERAND_VSR
},
750 { "vs20", 20, PPC_OPERAND_VSR
},
751 { "vs21", 21, PPC_OPERAND_VSR
},
752 { "vs22", 22, PPC_OPERAND_VSR
},
753 { "vs23", 23, PPC_OPERAND_VSR
},
754 { "vs24", 24, PPC_OPERAND_VSR
},
755 { "vs25", 25, PPC_OPERAND_VSR
},
756 { "vs26", 26, PPC_OPERAND_VSR
},
757 { "vs27", 27, PPC_OPERAND_VSR
},
758 { "vs28", 28, PPC_OPERAND_VSR
},
759 { "vs29", 29, PPC_OPERAND_VSR
},
760 { "vs3", 3, PPC_OPERAND_VSR
},
761 { "vs30", 30, PPC_OPERAND_VSR
},
762 { "vs31", 31, PPC_OPERAND_VSR
},
763 { "vs32", 32, PPC_OPERAND_VSR
},
764 { "vs33", 33, PPC_OPERAND_VSR
},
765 { "vs34", 34, PPC_OPERAND_VSR
},
766 { "vs35", 35, PPC_OPERAND_VSR
},
767 { "vs36", 36, PPC_OPERAND_VSR
},
768 { "vs37", 37, PPC_OPERAND_VSR
},
769 { "vs38", 38, PPC_OPERAND_VSR
},
770 { "vs39", 39, PPC_OPERAND_VSR
},
771 { "vs4", 4, PPC_OPERAND_VSR
},
772 { "vs40", 40, PPC_OPERAND_VSR
},
773 { "vs41", 41, PPC_OPERAND_VSR
},
774 { "vs42", 42, PPC_OPERAND_VSR
},
775 { "vs43", 43, PPC_OPERAND_VSR
},
776 { "vs44", 44, PPC_OPERAND_VSR
},
777 { "vs45", 45, PPC_OPERAND_VSR
},
778 { "vs46", 46, PPC_OPERAND_VSR
},
779 { "vs47", 47, PPC_OPERAND_VSR
},
780 { "vs48", 48, PPC_OPERAND_VSR
},
781 { "vs49", 49, PPC_OPERAND_VSR
},
782 { "vs5", 5, PPC_OPERAND_VSR
},
783 { "vs50", 50, PPC_OPERAND_VSR
},
784 { "vs51", 51, PPC_OPERAND_VSR
},
785 { "vs52", 52, PPC_OPERAND_VSR
},
786 { "vs53", 53, PPC_OPERAND_VSR
},
787 { "vs54", 54, PPC_OPERAND_VSR
},
788 { "vs55", 55, PPC_OPERAND_VSR
},
789 { "vs56", 56, PPC_OPERAND_VSR
},
790 { "vs57", 57, PPC_OPERAND_VSR
},
791 { "vs58", 58, PPC_OPERAND_VSR
},
792 { "vs59", 59, PPC_OPERAND_VSR
},
793 { "vs6", 6, PPC_OPERAND_VSR
},
794 { "vs60", 60, PPC_OPERAND_VSR
},
795 { "vs61", 61, PPC_OPERAND_VSR
},
796 { "vs62", 62, PPC_OPERAND_VSR
},
797 { "vs63", 63, PPC_OPERAND_VSR
},
798 { "vs7", 7, PPC_OPERAND_VSR
},
799 { "vs8", 8, PPC_OPERAND_VSR
},
800 { "vs9", 9, PPC_OPERAND_VSR
},
802 { "xer", 1, PPC_OPERAND_SPR
}
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
810 static const struct pd_reg
*
811 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
813 int middle
, low
, high
;
821 middle
= (low
+ high
) / 2;
822 cmp
= strcasecmp (name
, regs
[middle
].name
);
828 return ®s
[middle
];
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS
*expressionP
)
850 const struct pd_reg
*reg
;
855 /* Find the spelling of the operand. */
856 start
= name
= input_line_pointer
;
857 if (name
[0] == '%' && ISALPHA (name
[1]))
858 name
= ++input_line_pointer
;
860 else if (!reg_names_p
|| !ISALPHA (name
[0]))
863 c
= get_symbol_name (&name
);
864 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
866 /* Put back the delimiting char. */
867 *input_line_pointer
= c
;
869 /* Look to see if it's in the register table. */
872 expressionP
->X_op
= O_register
;
873 expressionP
->X_add_number
= reg
->value
;
874 expressionP
->X_md
= reg
->flags
;
876 /* Make the rest nice. */
877 expressionP
->X_add_symbol
= NULL
;
878 expressionP
->X_op_symbol
= NULL
;
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer
= start
;
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand
;
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names
[] =
897 { "cr0", 0, PPC_OPERAND_CR_REG
},
898 { "cr1", 1, PPC_OPERAND_CR_REG
},
899 { "cr2", 2, PPC_OPERAND_CR_REG
},
900 { "cr3", 3, PPC_OPERAND_CR_REG
},
901 { "cr4", 4, PPC_OPERAND_CR_REG
},
902 { "cr5", 5, PPC_OPERAND_CR_REG
},
903 { "cr6", 6, PPC_OPERAND_CR_REG
},
904 { "cr7", 7, PPC_OPERAND_CR_REG
},
905 { "eq", 2, PPC_OPERAND_CR_BIT
},
906 { "gt", 1, PPC_OPERAND_CR_BIT
},
907 { "lt", 0, PPC_OPERAND_CR_BIT
},
908 { "so", 3, PPC_OPERAND_CR_BIT
},
909 { "un", 3, PPC_OPERAND_CR_BIT
}
912 /* Parsing function. This returns non-zero if it recognized an
916 ppc_parse_name (const char *name
, expressionS
*exp
)
918 const struct pd_reg
*reg
;
925 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
930 exp
->X_op
= O_register
;
931 exp
->X_add_number
= reg
->value
;
932 exp
->X_md
= reg
->flags
;
937 /* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
941 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
943 /* Accept 4*cr<n> and cr<n>*4. */
945 && ((right
->X_op
== O_register
946 && right
->X_md
== PPC_OPERAND_CR_REG
947 && left
->X_op
== O_constant
948 && left
->X_add_number
== 4)
949 || (left
->X_op
== O_register
950 && left
->X_md
== PPC_OPERAND_CR_REG
951 && right
->X_op
== O_constant
952 && right
->X_add_number
== 4)))
954 left
->X_op
= O_register
;
955 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
956 left
->X_add_number
*= right
->X_add_number
;
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right
->X_op
== O_register
962 && left
->X_op
== O_register
964 && ((right
->X_md
== PPC_OPERAND_CR_BIT
965 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
966 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
967 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
969 left
->X_md
= PPC_OPERAND_CR_BIT
;
970 right
->X_op
= O_constant
;
974 /* Accept reg +/- constant. */
975 if (left
->X_op
== O_register
976 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
977 as_warn (_("invalid register expression"));
979 /* Accept constant + reg. */
980 if (right
->X_op
== O_register
)
982 if (op
== O_add
&& left
->X_op
== O_constant
)
983 left
->X_md
= right
->X_md
;
985 as_warn (_("invalid register expression"));
991 /* Local variables. */
993 /* Whether to target xcoff64/elf64. */
994 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
996 /* Opcode hash table. */
997 static struct hash_control
*ppc_hash
;
999 /* Macro hash table. */
1000 static struct hash_control
*ppc_macro_hash
;
1003 /* What type of shared library support to use. */
1004 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
1006 /* Flags to set in the elf header. */
1007 static flagword ppc_flags
= 0;
1009 /* Whether this is Solaris or not. */
1010 #ifdef TARGET_SOLARIS_COMMENT
1011 #define SOLARIS_P TRUE
1013 #define SOLARIS_P FALSE
1016 static bfd_boolean msolaris
= SOLARIS_P
;
1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1027 /* Next subsegment to allocate within the .text segment. */
1028 static subsegT ppc_text_subsegment
= 2;
1030 /* Linked list of csects in the text section. */
1031 static symbolS
*ppc_text_csects
;
1033 /* Next subsegment to allocate within the .data segment. */
1034 static subsegT ppc_data_subsegment
= 2;
1036 /* Linked list of csects in the data section. */
1037 static symbolS
*ppc_data_csects
;
1039 /* The current csect. */
1040 static symbolS
*ppc_current_csect
;
1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047 static symbolS
*ppc_toc_csect
;
1049 /* The first frag in the TOC subsegment. */
1050 static fragS
*ppc_toc_frag
;
1052 /* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054 static fragS
*ppc_after_toc_frag
;
1056 /* The current static block. */
1057 static symbolS
*ppc_current_block
;
1059 /* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062 static asection
*ppc_coff_debug_section
;
1064 /* Structure to set the length field of the dwarf sections. */
1065 struct dw_subsection
{
1066 /* Subsections are simply linked. */
1067 struct dw_subsection
*link
;
1069 /* The subsection number. */
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp
;
1076 static struct dw_section
{
1077 /* Corresponding section. */
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection
*list_subseg
;
1083 /* The anonymous subsection. */
1084 struct dw_subsection
*anon_subseg
;
1085 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1086 #endif /* OBJ_XCOFF */
1090 /* Various sections that we need for PE coff support. */
1091 static segT ydata_section
;
1092 static segT pdata_section
;
1093 static segT reldata_section
;
1094 static segT rdata_section
;
1095 static segT tocdata_section
;
1097 /* The current section and the previous section. See ppc_previous. */
1098 static segT ppc_previous_section
;
1099 static segT ppc_current_section
;
1104 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105 unsigned long *ppc_apuinfo_list
;
1106 unsigned int ppc_apuinfo_num
;
1107 unsigned int ppc_apuinfo_num_alloc
;
1108 #endif /* OBJ_ELF */
1111 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1113 const char *const md_shortopts
= "um:";
1115 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1116 const struct option md_longopts
[] = {
1117 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1118 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1119 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1120 {NULL
, no_argument
, NULL
, 0}
1122 const size_t md_longopts_size
= sizeof (md_longopts
);
1125 md_parse_option (int c
, const char *arg
)
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg
, "e") == 0)
1142 target_big_endian
= 0;
1143 set_target_endian
= 1;
1144 if (ppc_cpu
& PPC_OPCODE_VLE
)
1145 as_bad (_("the use of -mvle requires big endian."));
1153 if (strcmp (arg
, "e") == 0)
1155 target_big_endian
= 1;
1156 set_target_endian
= 1;
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1168 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1178 if (strcmp (arg
, "64") == 0)
1182 if (ppc_cpu
& PPC_OPCODE_VLE
)
1183 as_bad (_("the use of -mvle requires -a32."));
1185 as_fatal (_("%s unsupported"), "-a64");
1188 else if (strcmp (arg
, "32") == 0)
1195 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1196 /* "raw" is only valid for the disassembler. */
1197 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1200 if (strcmp (arg
, "vle") == 0)
1202 if (set_target_endian
&& target_big_endian
== 0)
1203 as_bad (_("the use of -mvle requires big endian."));
1205 as_bad (_("the use of -mvle requires -a32."));
1209 else if (strcmp (arg
, "no-vle") == 0)
1211 sticky
&= ~PPC_OPCODE_VLE
;
1213 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1214 new_cpu
&= ~PPC_OPCODE_VLE
;
1219 else if (strcmp (arg
, "regnames") == 0)
1222 else if (strcmp (arg
, "no-regnames") == 0)
1223 reg_names_p
= FALSE
;
1226 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1227 that require relocation. */
1228 else if (strcmp (arg
, "relocatable") == 0)
1230 shlib
= SHLIB_MRELOCATABLE
;
1231 ppc_flags
|= EF_PPC_RELOCATABLE
;
1234 else if (strcmp (arg
, "relocatable-lib") == 0)
1236 shlib
= SHLIB_MRELOCATABLE
;
1237 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1240 /* -memb, set embedded bit. */
1241 else if (strcmp (arg
, "emb") == 0)
1242 ppc_flags
|= EF_PPC_EMB
;
1244 /* -mlittle/-mbig set the endianness. */
1245 else if (strcmp (arg
, "little") == 0
1246 || strcmp (arg
, "little-endian") == 0)
1248 target_big_endian
= 0;
1249 set_target_endian
= 1;
1250 if (ppc_cpu
& PPC_OPCODE_VLE
)
1251 as_bad (_("the use of -mvle requires big endian."));
1254 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1256 target_big_endian
= 1;
1257 set_target_endian
= 1;
1260 else if (strcmp (arg
, "solaris") == 0)
1263 ppc_comment_chars
= ppc_solaris_comment_chars
;
1266 else if (strcmp (arg
, "no-solaris") == 0)
1269 ppc_comment_chars
= ppc_eabi_comment_chars
;
1271 else if (strcmp (arg
, "spe2") == 0)
1273 ppc_cpu
|= PPC_OPCODE_SPE2
;
1278 as_bad (_("invalid switch -m%s"), arg
);
1284 /* -V: SVR4 argument to print version ID. */
1286 print_version_id ();
1289 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1290 should be emitted or not. FIXME: Not implemented. */
1294 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1295 rather than .stabs.excl, which is ignored by the linker.
1296 FIXME: Not implemented. */
1307 nop_limit
= strtoul (optarg
, &end
, 0);
1309 as_bad (_("--nops needs a numeric argument"));
1324 md_show_usage (FILE *stream
)
1326 fprintf (stream
, _("\
1328 -a32 generate ELF32/XCOFF32\n\
1329 -a64 generate ELF64/XCOFF64\n\
1331 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1332 -mpwr generate code for POWER (RIOS1)\n\
1333 -m601 generate code for PowerPC 601\n\
1334 -mppc, -mppc32, -m603, -m604\n\
1335 generate code for PowerPC 603/604\n\
1336 -m403 generate code for PowerPC 403\n\
1337 -m405 generate code for PowerPC 405\n\
1338 -m440 generate code for PowerPC 440\n\
1339 -m464 generate code for PowerPC 464\n\
1340 -m476 generate code for PowerPC 476\n\
1341 -m7400, -m7410, -m7450, -m7455\n\
1342 generate code for PowerPC 7400/7410/7450/7455\n\
1343 -m750cl generate code for PowerPC 750cl\n\
1344 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1345 fprintf (stream
, _("\
1346 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1347 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1348 -mbooke generate code for 32-bit PowerPC BookE\n\
1349 -ma2 generate code for A2 architecture\n\
1350 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1351 -mpower5, -mpwr5, -mpwr5x\n\
1352 generate code for Power5 architecture\n\
1353 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1354 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1355 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1356 -mpower9, -mpwr9 generate code for Power9 architecture\n\
1357 -mcell generate code for Cell Broadband Engine architecture\n\
1358 -mcom generate code for Power/PowerPC common instructions\n\
1359 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1360 fprintf (stream
, _("\
1361 -maltivec generate code for AltiVec\n\
1362 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1363 -me300 generate code for PowerPC e300 family\n\
1364 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1365 -me500mc, generate code for Freescale e500mc core complex\n\
1366 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1367 -me5500, generate code for Freescale e5500 core complex\n\
1368 -me6500, generate code for Freescale e6500 core complex\n\
1369 -mspe generate code for Motorola SPE instructions\n\
1370 -mspe2 generate code for Freescale SPE2 instructions\n\
1371 -mvle generate code for Freescale VLE instructions\n\
1372 -mtitan generate code for AppliedMicro Titan core complex\n\
1373 -mregnames Allow symbolic names for registers\n\
1374 -mno-regnames Do not allow symbolic names for registers\n"));
1376 fprintf (stream
, _("\
1377 -mrelocatable support for GCC's -mrelocatble option\n\
1378 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1379 -memb set PPC_EMB bit in ELF flags\n\
1380 -mlittle, -mlittle-endian, -le\n\
1381 generate code for a little endian machine\n\
1382 -mbig, -mbig-endian, -be\n\
1383 generate code for a big endian machine\n\
1384 -msolaris generate code for Solaris\n\
1385 -mno-solaris do not generate code for Solaris\n\
1386 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1387 -V print assembler version number\n\
1388 -Qy, -Qn ignored\n"));
1390 fprintf (stream
, _("\
1391 -nops=count when aligning, more than COUNT nops uses a branch\n\
1392 -ppc476-workaround warn if emitting data to code sections\n"));
1395 /* Set ppc_cpu if it is not already set. */
1400 const char *default_os
= TARGET_OS
;
1401 const char *default_cpu
= TARGET_CPU
;
1403 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1406 if (target_big_endian
)
1407 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1409 /* The minimum supported cpu for 64-bit little-endian is power8. */
1410 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1411 else if (strncmp (default_os
, "aix", 3) == 0
1412 && default_os
[3] >= '4' && default_os
[3] <= '9')
1413 ppc_cpu
|= PPC_OPCODE_COMMON
;
1414 else if (strncmp (default_os
, "aix3", 4) == 0)
1415 ppc_cpu
|= PPC_OPCODE_POWER
;
1416 else if (strcmp (default_cpu
, "rs6000") == 0)
1417 ppc_cpu
|= PPC_OPCODE_POWER
;
1418 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1419 ppc_cpu
|= PPC_OPCODE_PPC
;
1421 as_fatal (_("unknown default cpu = %s, os = %s"),
1422 default_cpu
, default_os
);
1426 /* Figure out the BFD architecture to use. This function and ppc_mach
1427 are called well before md_begin, when the output file is opened. */
1429 enum bfd_architecture
1432 const char *default_cpu
= TARGET_CPU
;
1435 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1436 return bfd_arch_powerpc
;
1437 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1438 return bfd_arch_powerpc
;
1439 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1440 return bfd_arch_rs6000
;
1441 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1443 if (strcmp (default_cpu
, "rs6000") == 0)
1444 return bfd_arch_rs6000
;
1445 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1446 return bfd_arch_powerpc
;
1449 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1450 return bfd_arch_unknown
;
1457 return bfd_mach_ppc64
;
1458 else if (ppc_arch () == bfd_arch_rs6000
)
1459 return bfd_mach_rs6k
;
1460 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1461 return bfd_mach_ppc_titan
;
1462 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1463 return bfd_mach_ppc_vle
;
1465 return bfd_mach_ppc
;
1469 ppc_target_format (void)
1473 return target_big_endian
? "pe-powerpc" : "pe-powerpcle";
1475 return "xcoff-powermac";
1478 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1480 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1486 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1487 # elif defined (TE_VXWORKS)
1488 return "elf32-powerpc-vxworks";
1490 return (target_big_endian
1491 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1492 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1497 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1498 Return TRUE if there's a problem, otherwise FALSE. */
1501 insn_validate (const struct powerpc_opcode
*op
)
1503 const unsigned char *o
;
1504 uint64_t omask
= op
->mask
;
1506 /* The mask had better not trim off opcode bits. */
1507 if ((op
->opcode
& omask
) != op
->opcode
)
1509 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1513 /* The operands must not overlap the opcode or each other. */
1514 for (o
= op
->operands
; *o
; ++o
)
1516 if (*o
>= num_powerpc_operands
)
1518 as_bad (_("operand index error for %s"), op
->name
);
1523 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1524 if (operand
->shift
!= (int) PPC_OPSHIFT_INV
)
1528 if (operand
->shift
>= 0)
1529 mask
= operand
->bitm
<< operand
->shift
;
1531 mask
= operand
->bitm
>> -operand
->shift
;
1534 as_bad (_("operand %d overlap in %s"),
1535 (int) (o
- op
->operands
), op
->name
);
1545 /* Insert opcodes and macros into hash tables. Called at startup and
1546 for .machine pseudo. */
1549 ppc_setup_opcodes (void)
1551 const struct powerpc_opcode
*op
;
1552 const struct powerpc_opcode
*op_end
;
1553 const struct powerpc_macro
*macro
;
1554 const struct powerpc_macro
*macro_end
;
1555 bfd_boolean bad_insn
= FALSE
;
1557 if (ppc_hash
!= NULL
)
1558 hash_die (ppc_hash
);
1559 if (ppc_macro_hash
!= NULL
)
1560 hash_die (ppc_macro_hash
);
1562 /* Insert the opcodes into a hash table. */
1563 ppc_hash
= hash_new ();
1565 if (ENABLE_CHECKING
)
1569 /* An index into powerpc_operands is stored in struct fix
1570 fx_pcrel_adjust which is 8 bits wide. */
1571 gas_assert (num_powerpc_operands
< 256);
1573 /* Check operand masks. Code here and in the disassembler assumes
1574 all the 1's in the mask are contiguous. */
1575 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1577 uint64_t mask
= powerpc_operands
[i
].bitm
;
1581 right_bit
= mask
& -mask
;
1583 right_bit
= mask
& -mask
;
1584 if (mask
!= right_bit
)
1586 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1589 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1590 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1591 sizeof (powerpc_operands
[0])) == 0)
1593 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1600 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1601 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1603 if (ENABLE_CHECKING
)
1605 if (op
!= powerpc_opcodes
)
1607 int old_opcode
= PPC_OP (op
[-1].opcode
);
1608 int new_opcode
= PPC_OP (op
[0].opcode
);
1610 #ifdef PRINT_OPCODE_TABLE
1611 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1612 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1613 (unsigned int) new_opcode
, (unsigned long long) op
->opcode
,
1614 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1617 /* The major opcodes had better be sorted. Code in the
1618 disassembler assumes the insns are sorted according to
1620 if (new_opcode
< old_opcode
)
1622 as_bad (_("major opcode is not sorted for %s"),
1627 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1629 as_bad (_("%s is enabled by vle flag"), op
->name
);
1632 if (PPC_OP (op
->opcode
) != 4
1633 && PPC_OP (op
->opcode
) != 31
1634 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1636 as_bad (_("%s not disabled by vle flag"), op
->name
);
1639 bad_insn
|= insn_validate (op
);
1642 if ((ppc_cpu
& op
->flags
) != 0
1643 && !(ppc_cpu
& op
->deprecated
))
1647 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1650 as_bad (_("duplicate instruction %s"),
1657 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1658 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1659 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1661 op_end
= vle_opcodes
+ vle_num_opcodes
;
1662 for (op
= vle_opcodes
; op
< op_end
; op
++)
1664 if (ENABLE_CHECKING
)
1666 if (op
!= vle_opcodes
)
1668 unsigned old_seg
, new_seg
;
1670 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1671 old_seg
= VLE_OP_TO_SEG (old_seg
);
1672 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1673 new_seg
= VLE_OP_TO_SEG (new_seg
);
1675 #ifdef PRINT_OPCODE_TABLE
1676 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1677 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1678 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1679 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1681 /* The major opcodes had better be sorted. Code in the
1682 disassembler assumes the insns are sorted according to
1684 if (new_seg
< old_seg
)
1686 as_bad (_("major opcode is not sorted for %s"),
1692 bad_insn
|= insn_validate (op
);
1695 if ((ppc_cpu
& op
->flags
) != 0
1696 && !(ppc_cpu
& op
->deprecated
))
1700 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1703 as_bad (_("duplicate instruction %s"),
1710 /* SPE2 instructions */
1711 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1713 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1714 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1716 if (ENABLE_CHECKING
)
1718 if (op
!= spe2_opcodes
)
1720 unsigned old_seg
, new_seg
;
1722 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1723 old_seg
= VLE_OP_TO_SEG (old_seg
);
1724 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1725 new_seg
= VLE_OP_TO_SEG (new_seg
);
1727 /* The major opcodes had better be sorted. Code in the
1728 disassembler assumes the insns are sorted according to
1730 if (new_seg
< old_seg
)
1732 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1737 bad_insn
|= insn_validate (op
);
1740 if ((ppc_cpu
& op
->flags
) != 0 && !(ppc_cpu
& op
->deprecated
))
1744 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1747 as_bad (_("duplicate instruction %s"),
1754 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1755 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1758 /* Insert the macros into a hash table. */
1759 ppc_macro_hash
= hash_new ();
1761 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1762 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1764 if ((macro
->flags
& ppc_cpu
) != 0 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1768 retval
= hash_insert (ppc_macro_hash
, macro
->name
, (void *) macro
);
1769 if (retval
!= (const char *) NULL
)
1771 as_bad (_("duplicate macro %s"), macro
->name
);
1781 /* This function is called when the assembler starts up. It is called
1782 after the options have been parsed and the output file has been
1790 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1791 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1794 /* Set the ELF flags if desired. */
1795 if (ppc_flags
&& !msolaris
)
1796 bfd_set_private_flags (stdoutput
, ppc_flags
);
1799 ppc_setup_opcodes ();
1801 /* Tell the main code what the endianness is if it is not overridden
1803 if (!set_target_endian
)
1805 set_target_endian
= 1;
1806 target_big_endian
= PPC_BIG_ENDIAN
;
1810 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1812 /* Create dummy symbols to serve as initial csects. This forces the
1813 text csects to precede the data csects. These symbols will not
1815 ppc_text_csects
= symbol_make ("dummy\001");
1816 symbol_get_tc (ppc_text_csects
)->within
= ppc_text_csects
;
1817 ppc_data_csects
= symbol_make ("dummy\001");
1818 symbol_get_tc (ppc_data_csects
)->within
= ppc_data_csects
;
1823 ppc_current_section
= text_section
;
1824 ppc_previous_section
= 0;
1833 if (ppc_apuinfo_list
== NULL
)
1836 /* Ok, so write the section info out. We have this layout:
1840 0 8 length of "APUinfo\0"
1841 4 (n*4) number of APU's (4 bytes each)
1844 20 APU#1 first APU's info
1845 24 APU#2 second APU's info
1850 asection
*seg
= now_seg
;
1851 subsegT subseg
= now_subseg
;
1852 asection
*apuinfo_secp
= (asection
*) NULL
;
1855 /* Create the .PPC.EMB.apuinfo section. */
1856 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1857 bfd_set_section_flags (stdoutput
,
1859 SEC_HAS_CONTENTS
| SEC_READONLY
);
1862 md_number_to_chars (p
, (valueT
) 8, 4);
1865 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1868 md_number_to_chars (p
, (valueT
) 2, 4);
1871 strcpy (p
, APUINFO_LABEL
);
1873 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1876 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1879 frag_align (2, 0, 0);
1881 /* We probably can't restore the current segment, for there likely
1884 subseg_set (seg
, subseg
);
1889 /* Insert an operand value into an instruction. */
1892 ppc_insert_operand (uint64_t insn
,
1893 const struct powerpc_operand
*operand
,
1899 int64_t min
, max
, right
;
1901 max
= operand
->bitm
;
1905 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
1907 /* Extend the allowed range for addis to [-32768, 65535].
1908 Similarly for cmpli and some VLE high part insns. For 64-bit
1909 it would be good to disable this for signed fields since the
1910 value is sign extended into the high 32 bits of the register.
1911 If the value is, say, an address, then we might care about
1912 the high bits. However, gcc as of 2014-06 uses unsigned
1913 values when loading the high part of 64-bit constants using
1915 min
= ~(max
>> 1) & -right
;
1917 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
1919 max
= (max
>> 1) & -right
;
1920 min
= ~max
& -right
;
1923 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1926 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1935 /* Some people write constants with the sign extension done by
1936 hand but only up to 32 bits. This shouldn't really be valid,
1937 but, to permit this code to assemble on a 64-bit host, we
1938 sign extend the 32-bit value to 64 bits if so doing makes the
1941 && (val
- (1LL << 32)) >= min
1942 && (val
- (1LL << 32)) <= max
1943 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
1944 val
= val
- (1LL << 32);
1946 /* Similarly, people write expressions like ~(1<<15), and expect
1947 this to be OK for a 32-bit unsigned value. */
1949 && (val
+ (1LL << 32)) >= min
1950 && (val
+ (1LL << 32)) <= max
1951 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
1952 val
= val
+ (1LL << 32);
1956 || (val
& (right
- 1)) != 0)
1957 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
1960 if (operand
->insert
)
1965 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
1966 if (errmsg
!= (const char *) NULL
)
1967 as_bad_where (file
, line
, "%s", errmsg
);
1969 else if (operand
->shift
>= 0)
1970 insn
|= (val
& operand
->bitm
) << operand
->shift
;
1972 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
1979 /* Parse @got, etc. and return the desired relocation. */
1980 static bfd_reloc_code_real_type
1981 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
1985 unsigned int length
: 8;
1986 unsigned int valid32
: 1;
1987 unsigned int valid64
: 1;
1996 const struct map_bfd
*ptr
;
1998 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1999 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2000 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2002 static const struct map_bfd mapping
[] = {
2003 MAP ("l", BFD_RELOC_LO16
),
2004 MAP ("h", BFD_RELOC_HI16
),
2005 MAP ("ha", BFD_RELOC_HI16_S
),
2006 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2007 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2008 MAP ("got", BFD_RELOC_16_GOTOFF
),
2009 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2010 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2011 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2012 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2013 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2014 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2015 MAP ("copy", BFD_RELOC_PPC_COPY
),
2016 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2017 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2018 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2019 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2020 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2021 MAP ("tls", BFD_RELOC_PPC_TLS
),
2022 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2023 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2024 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2025 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2026 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2027 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2028 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2029 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2030 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2031 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2032 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2033 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2034 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2035 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2036 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2037 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2038 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2039 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2040 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2041 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2042 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2043 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2044 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2045 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2046 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2047 MAP32 ("fixup", BFD_RELOC_CTOR
),
2048 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2049 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2050 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2051 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2052 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2053 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2054 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2055 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2056 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2057 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2058 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2059 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2060 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2061 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2062 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2063 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2064 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2065 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2066 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2067 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2068 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2069 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2070 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2071 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2072 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2073 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2074 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2075 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2076 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2077 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2078 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2079 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2080 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2081 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2082 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2083 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2084 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2085 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2086 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2087 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2088 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2089 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2090 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2091 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2092 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2093 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2094 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2095 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2096 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2097 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2098 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2099 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2103 return BFD_RELOC_NONE
;
2105 for (ch
= *str
, str2
= ident
;
2106 (str2
< ident
+ sizeof (ident
) - 1
2107 && (ISALNUM (ch
) || ch
== '@'));
2110 *str2
++ = TOLOWER (ch
);
2117 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2118 if (ch
== ptr
->string
[0]
2119 && len
== ptr
->length
2120 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2121 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2123 int reloc
= ptr
->reloc
;
2125 if (!ppc_obj64
&& exp_p
->X_add_number
!= 0)
2129 case BFD_RELOC_16_GOTOFF
:
2130 case BFD_RELOC_LO16_GOTOFF
:
2131 case BFD_RELOC_HI16_GOTOFF
:
2132 case BFD_RELOC_HI16_S_GOTOFF
:
2133 as_warn (_("identifier+constant@got means "
2134 "identifier@got+constant"));
2137 case BFD_RELOC_PPC_GOT_TLSGD16
:
2138 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2139 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2140 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2141 case BFD_RELOC_PPC_GOT_TLSLD16
:
2142 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2143 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2144 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2145 case BFD_RELOC_PPC_GOT_DTPREL16
:
2146 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2147 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2148 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2149 case BFD_RELOC_PPC_GOT_TPREL16
:
2150 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2151 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2152 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2153 as_bad (_("symbol+offset not supported for got tls"));
2158 /* Now check for identifier@suffix+constant. */
2159 if (*str
== '-' || *str
== '+')
2161 char *orig_line
= input_line_pointer
;
2162 expressionS new_exp
;
2164 input_line_pointer
= str
;
2165 expression (&new_exp
);
2166 if (new_exp
.X_op
== O_constant
)
2168 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2169 str
= input_line_pointer
;
2172 if (&input_line_pointer
!= str_p
)
2173 input_line_pointer
= orig_line
;
2177 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2178 && exp_p
->X_op
== O_symbol
2179 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2181 /* Change the symbol so that the dummy .TOC. symbol can be
2182 omitted from the object file. */
2183 exp_p
->X_add_symbol
= &abs_symbol
;
2186 return (bfd_reloc_code_real_type
) reloc
;
2189 return BFD_RELOC_NONE
;
2192 /* Support @got, etc. on constants emitted via .short, .int etc. */
2194 bfd_reloc_code_real_type
2195 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2198 if (nbytes
>= 2 && *input_line_pointer
== '@')
2199 return ppc_elf_suffix (&input_line_pointer
, exp
);
2200 return BFD_RELOC_NONE
;
2203 /* Warn when emitting data to code sections, unless we are emitting
2204 a relocation that ld --ppc476-workaround uses to recognise data
2205 *and* there was an unconditional branch prior to the data. */
2208 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2209 unsigned int nbytes
, fixS
*fix
)
2212 && (now_seg
->flags
& SEC_CODE
) != 0
2215 || !(fix
->fx_r_type
== BFD_RELOC_32
2216 || fix
->fx_r_type
== BFD_RELOC_CTOR
2217 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2218 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2219 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2220 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2221 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2222 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2223 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2224 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2226 /* Flag that we've warned. */
2230 as_warn (_("data in executable section"));
2234 /* Solaris pseduo op to change to the .rodata section. */
2236 ppc_elf_rdata (int xxx
)
2238 char *save_line
= input_line_pointer
;
2239 static char section
[] = ".rodata\n";
2241 /* Just pretend this is .section .rodata */
2242 input_line_pointer
= section
;
2243 obj_elf_section (xxx
);
2245 input_line_pointer
= save_line
;
2248 /* Pseudo op to make file scope bss items. */
2250 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2263 c
= get_symbol_name (&name
);
2265 /* Just after name is now '\0'. */
2266 p
= input_line_pointer
;
2268 SKIP_WHITESPACE_AFTER_NAME ();
2269 if (*input_line_pointer
!= ',')
2271 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2272 ignore_rest_of_line ();
2276 input_line_pointer
++; /* skip ',' */
2277 if ((size
= get_absolute_expression ()) < 0)
2279 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2280 ignore_rest_of_line ();
2284 /* The third argument to .lcomm is the alignment. */
2285 if (*input_line_pointer
!= ',')
2289 ++input_line_pointer
;
2290 align
= get_absolute_expression ();
2293 as_warn (_("ignoring bad alignment"));
2299 symbolP
= symbol_find_or_make (name
);
2302 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2304 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2305 S_GET_NAME (symbolP
));
2306 ignore_rest_of_line ();
2310 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2312 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2313 S_GET_NAME (symbolP
),
2314 (long) S_GET_VALUE (symbolP
),
2317 ignore_rest_of_line ();
2323 old_subsec
= now_subseg
;
2326 /* Convert to a power of 2 alignment. */
2327 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2330 as_bad (_("common alignment not a power of 2"));
2331 ignore_rest_of_line ();
2338 record_alignment (bss_section
, align2
);
2339 subseg_set (bss_section
, 1);
2341 frag_align (align2
, 0, 0);
2342 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2343 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2344 symbol_set_frag (symbolP
, frag_now
);
2345 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2348 S_SET_SIZE (symbolP
, size
);
2349 S_SET_SEGMENT (symbolP
, bss_section
);
2350 subseg_set (old_sec
, old_subsec
);
2351 demand_empty_rest_of_line ();
2354 /* Pseudo op to set symbol local entry point. */
2356 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2359 char c
= get_symbol_name (&name
);
2364 elf_symbol_type
*elfsym
;
2366 p
= input_line_pointer
;
2368 SKIP_WHITESPACE_AFTER_NAME ();
2369 if (*input_line_pointer
!= ',')
2372 as_bad (_("expected comma after name `%s' in .localentry directive"),
2375 ignore_rest_of_line ();
2378 input_line_pointer
++;
2380 if (exp
.X_op
== O_absent
)
2382 as_bad (_("missing expression in .localentry directive"));
2383 exp
.X_op
= O_constant
;
2384 exp
.X_add_number
= 0;
2387 sym
= symbol_find_or_make (name
);
2390 if (resolve_expression (&exp
)
2391 && exp
.X_op
== O_constant
)
2393 unsigned char encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2395 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2396 as_bad (_(".localentry expression for `%s' "
2397 "is not a valid power of 2"), S_GET_NAME (sym
));
2400 bfdsym
= symbol_get_bfdsym (sym
);
2401 elfsym
= elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
2402 gas_assert (elfsym
);
2403 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2404 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2405 if (ppc_abiversion
== 0)
2410 as_bad (_(".localentry expression for `%s' "
2411 "does not evaluate to a constant"), S_GET_NAME (sym
));
2413 demand_empty_rest_of_line ();
2416 /* Pseudo op to set ABI version. */
2418 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2423 if (exp
.X_op
== O_absent
)
2425 as_bad (_("missing expression in .abiversion directive"));
2426 exp
.X_op
= O_constant
;
2427 exp
.X_add_number
= 0;
2430 if (resolve_expression (&exp
)
2431 && exp
.X_op
== O_constant
)
2432 ppc_abiversion
= exp
.X_add_number
;
2434 as_bad (_(".abiversion expression does not evaluate to a constant"));
2435 demand_empty_rest_of_line ();
2438 /* Parse a .gnu_attribute directive. */
2440 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2442 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2444 /* Check validity of defined powerpc tags. */
2445 if (tag
== Tag_GNU_Power_ABI_FP
2446 || tag
== Tag_GNU_Power_ABI_Vector
2447 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2451 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2453 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2454 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2455 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2456 as_warn (_("unknown .gnu_attribute value"));
2460 /* Set ABI version in output file. */
2464 if (ppc_obj64
&& ppc_abiversion
!= 0)
2466 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2467 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2471 /* Validate any relocations emitted for -mrelocatable, possibly adding
2472 fixups for word relocations in writable segments, so we can adjust
2475 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2477 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2486 case SHLIB_MRELOCATABLE
:
2487 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2488 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2489 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2490 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2491 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2492 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2493 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2494 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2495 && (seg
->flags
& SEC_LOAD
) != 0
2496 && strcmp (segment_name (seg
), ".got2") != 0
2497 && strcmp (segment_name (seg
), ".dtors") != 0
2498 && strcmp (segment_name (seg
), ".ctors") != 0
2499 && strcmp (segment_name (seg
), ".fixup") != 0
2500 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2501 && strcmp (segment_name (seg
), ".eh_frame") != 0
2502 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2504 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2505 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2507 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2508 _("relocation cannot be done when using -mrelocatable"));
2515 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2516 function descriptor sym if the corresponding code sym is used. */
2519 ppc_frob_file_before_adjust (void)
2527 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2533 name
= S_GET_NAME (symp
);
2537 if (! S_IS_WEAK (symp
)
2538 || S_IS_DEFINED (symp
))
2541 dotname
= concat (".", name
, (char *) NULL
);
2542 dotsym
= symbol_find_noref (dotname
, 1);
2544 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2545 || symbol_used_in_reloc_p (dotsym
)))
2546 symbol_mark_used (symp
);
2550 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2552 && toc_reloc_types
!= has_large_toc_reloc
2553 && bfd_section_size (stdoutput
, toc
) > 0x10000)
2554 as_warn (_("TOC section size exceeds 64k"));
2557 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2558 emitted. Other uses of .TOC. will cause the symbol to be marked
2559 with BSF_KEEP in md_apply_fix. */
2562 ppc_elf_adjust_symtab (void)
2567 symp
= symbol_find (".TOC.");
2570 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2571 if ((bsym
->flags
& BSF_KEEP
) == 0)
2572 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2576 #endif /* OBJ_ELF */
2581 * Summary of parse_toc_entry.
2583 * in: Input_line_pointer points to the '[' in one of:
2585 * [toc] [tocv] [toc32] [toc64]
2587 * Anything else is an error of one kind or another.
2590 * return value: success or failure
2591 * toc_kind: kind of toc reference
2592 * input_line_pointer:
2593 * success: first char after the ']'
2594 * failure: unchanged
2598 * [toc] - rv == success, toc_kind = default_toc
2599 * [tocv] - rv == success, toc_kind = data_in_toc
2600 * [toc32] - rv == success, toc_kind = must_be_32
2601 * [toc64] - rv == success, toc_kind = must_be_64
2605 enum toc_size_qualifier
2607 default_toc
, /* The toc cell constructed should be the system default size */
2608 data_in_toc
, /* This is a direct reference to a toc cell */
2609 must_be_32
, /* The toc cell constructed must be 32 bits wide */
2610 must_be_64
/* The toc cell constructed must be 64 bits wide */
2614 parse_toc_entry (enum toc_size_qualifier
*toc_kind
)
2619 enum toc_size_qualifier t
;
2621 /* Save the input_line_pointer. */
2622 start
= input_line_pointer
;
2624 /* Skip over the '[' , and whitespace. */
2625 ++input_line_pointer
;
2628 /* Find the spelling of the operand. */
2629 c
= get_symbol_name (&toc_spec
);
2631 if (strcmp (toc_spec
, "toc") == 0)
2635 else if (strcmp (toc_spec
, "tocv") == 0)
2639 else if (strcmp (toc_spec
, "toc32") == 0)
2643 else if (strcmp (toc_spec
, "toc64") == 0)
2649 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec
);
2650 *input_line_pointer
= c
;
2651 input_line_pointer
= start
;
2655 /* Now find the ']'. */
2656 *input_line_pointer
= c
;
2658 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2659 c
= *input_line_pointer
++; /* input_line_pointer->past char in c. */
2663 as_bad (_("syntax error: expected `]', found `%c'"), c
);
2664 input_line_pointer
= start
;
2673 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2674 /* See whether a symbol is in the TOC section. */
2677 ppc_is_toc_sym (symbolS
*sym
)
2680 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2681 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2684 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2686 return strcmp (sname
, ".toc") == 0;
2688 return strcmp (sname
, ".got") == 0;
2691 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2695 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2697 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2701 /* Check we don't already exist. */
2702 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2703 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2706 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2708 if (ppc_apuinfo_num_alloc
== 0)
2710 ppc_apuinfo_num_alloc
= 4;
2711 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2715 ppc_apuinfo_num_alloc
+= 4;
2716 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2717 ppc_apuinfo_num_alloc
);
2720 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2726 /* We need to keep a list of fixups. We can't simply generate them as
2727 we go, because that would require us to first create the frag, and
2728 that would screw up references to ``.''. */
2734 bfd_reloc_code_real_type reloc
;
2737 #define MAX_INSN_FIXUPS (5)
2739 /* This routine is called for each instruction to be assembled. */
2742 md_assemble (char *str
)
2745 const struct powerpc_opcode
*opcode
;
2747 const unsigned char *opindex_ptr
;
2751 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
2756 unsigned int insn_length
;
2758 /* Get the opcode. */
2759 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
2764 /* Look up the opcode in the hash table. */
2765 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, str
);
2766 if (opcode
== (const struct powerpc_opcode
*) NULL
)
2768 const struct powerpc_macro
*macro
;
2770 macro
= (const struct powerpc_macro
*) hash_find (ppc_macro_hash
, str
);
2771 if (macro
== (const struct powerpc_macro
*) NULL
)
2772 as_bad (_("unrecognized opcode: `%s'"), str
);
2774 ppc_macro (s
, macro
);
2779 insn
= opcode
->opcode
;
2782 while (ISSPACE (*str
))
2785 /* PowerPC operands are just expressions. The only real issue is
2786 that a few operand types are optional. All cases which might use
2787 an optional operand separate the operands only with commas (in some
2788 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2789 have optional operands). Most instructions with optional operands
2790 have only one. Those that have more than one optional operand can
2791 take either all their operands or none. So, before we start seriously
2792 parsing the operands, we check to see if we have optional operands,
2793 and if we do, we count the number of commas to see which operands
2794 have been omitted. */
2796 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
2798 const struct powerpc_operand
*operand
;
2800 operand
= &powerpc_operands
[*opindex_ptr
];
2801 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
2802 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
2804 unsigned int opcount
;
2805 unsigned int num_operands_expected
;
2807 /* There is an optional operand. Count the number of
2808 commas in the input line. */
2815 while ((s
= strchr (s
, ',')) != (char *) NULL
)
2822 /* Compute the number of expected operands.
2823 Do not count fake operands. */
2824 for (num_operands_expected
= 0, i
= 0; opcode
->operands
[i
]; i
++)
2825 if ((powerpc_operands
[opcode
->operands
[i
]].flags
& PPC_OPERAND_FAKE
) == 0)
2826 ++ num_operands_expected
;
2828 /* If there are fewer operands in the line then are called
2829 for by the instruction, we want to skip the optional
2831 if (opcount
< num_operands_expected
)
2838 /* Gather the operands. */
2842 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
2844 const struct powerpc_operand
*operand
;
2850 if (next_opindex
== 0)
2851 operand
= &powerpc_operands
[*opindex_ptr
];
2854 operand
= &powerpc_operands
[next_opindex
];
2859 /* If this is a fake operand, then we do not expect anything
2861 if ((operand
->flags
& PPC_OPERAND_FAKE
) != 0)
2863 insn
= (*operand
->insert
) (insn
, 0L, ppc_cpu
, &errmsg
);
2864 if (errmsg
!= (const char *) NULL
)
2865 as_bad ("%s", errmsg
);
2869 /* If this is an optional operand, and we are skipping it, just
2871 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
2872 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
)
2875 int64_t val
= ppc_optional_operand_value (operand
);
2876 if (operand
->insert
)
2878 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
2879 if (errmsg
!= (const char *) NULL
)
2880 as_bad ("%s", errmsg
);
2882 else if (operand
->shift
>= 0)
2883 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2885 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2887 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
2888 next_opindex
= *opindex_ptr
+ 1;
2892 /* Gather the operand. */
2893 hold
= input_line_pointer
;
2894 input_line_pointer
= str
;
2897 if (*input_line_pointer
== '[')
2899 /* We are expecting something like the second argument here:
2901 * lwz r4,[toc].GS.0.static_int(rtoc)
2902 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2903 * The argument following the `]' must be a symbol name, and the
2904 * register must be the toc register: 'rtoc' or '2'
2906 * The effect is to 0 as the displacement field
2907 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2908 * the appropriate variation) reloc against it based on the symbol.
2909 * The linker will build the toc, and insert the resolved toc offset.
2912 * o The size of the toc entry is currently assumed to be
2913 * 32 bits. This should not be assumed to be a hard coded
2915 * o In an effort to cope with a change from 32 to 64 bits,
2916 * there are also toc entries that are specified to be
2917 * either 32 or 64 bits:
2918 * lwz r4,[toc32].GS.0.static_int(rtoc)
2919 * lwz r4,[toc64].GS.0.static_int(rtoc)
2920 * These demand toc entries of the specified size, and the
2921 * instruction probably requires it.
2925 enum toc_size_qualifier toc_kind
;
2926 bfd_reloc_code_real_type toc_reloc
;
2928 /* Go parse off the [tocXX] part. */
2929 valid_toc
= parse_toc_entry (&toc_kind
);
2933 ignore_rest_of_line ();
2937 /* Now get the symbol following the ']'. */
2943 /* In this case, we may not have seen the symbol yet,
2944 since it is allowed to appear on a .extern or .globl
2945 or just be a label in the .data section. */
2946 toc_reloc
= BFD_RELOC_PPC_TOC16
;
2949 /* 1. The symbol must be defined and either in the toc
2950 section, or a global.
2951 2. The reloc generated must have the TOCDEFN flag set
2952 in upper bit mess of the reloc type.
2953 FIXME: It's a little confusing what the tocv
2954 qualifier can be used for. At the very least, I've
2955 seen three uses, only one of which I'm sure I can
2957 if (ex
.X_op
== O_symbol
)
2959 gas_assert (ex
.X_add_symbol
!= NULL
);
2960 if (symbol_get_bfdsym (ex
.X_add_symbol
)->section
2963 as_bad (_("[tocv] symbol is not a toc symbol"));
2967 toc_reloc
= BFD_RELOC_PPC_TOC16
;
2970 /* FIXME: these next two specifically specify 32/64 bit
2971 toc entries. We don't support them today. Is this
2972 the right way to say that? */
2973 toc_reloc
= BFD_RELOC_NONE
;
2974 as_bad (_("unimplemented toc32 expression modifier"));
2977 /* FIXME: see above. */
2978 toc_reloc
= BFD_RELOC_NONE
;
2979 as_bad (_("unimplemented toc64 expression modifier"));
2983 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2989 /* We need to generate a fixup for this expression. */
2990 if (fc
>= MAX_INSN_FIXUPS
)
2991 as_fatal (_("too many fixups"));
2993 fixups
[fc
].reloc
= toc_reloc
;
2994 fixups
[fc
].exp
= ex
;
2995 fixups
[fc
].opindex
= *opindex_ptr
;
2998 /* Ok. We've set up the fixup for the instruction. Now make it
2999 look like the constant 0 was found here. */
3001 ex
.X_op
= O_constant
;
3002 ex
.X_add_number
= 0;
3003 ex
.X_add_symbol
= NULL
;
3004 ex
.X_op_symbol
= NULL
;
3011 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3012 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
3013 || !register_name (&ex
))
3015 char save_lex
= lex_type
['%'];
3017 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
3018 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3021 lex_type
['%'] |= LEX_BEGIN_NAME
;
3025 lex_type
['%'] = save_lex
;
3029 str
= input_line_pointer
;
3030 input_line_pointer
= hold
;
3032 if (ex
.X_op
== O_illegal
)
3033 as_bad (_("illegal operand"));
3034 else if (ex
.X_op
== O_absent
)
3035 as_bad (_("missing operand"));
3036 else if (ex
.X_op
== O_register
)
3040 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3041 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3042 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
)) != 0
3043 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3044 && ex
.X_add_number
!= 0
3045 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3046 as_warn (_("invalid register expression"));
3047 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3048 ppc_cpu
, (char *) NULL
, 0);
3050 else if (ex
.X_op
== O_constant
)
3053 /* Allow @HA, @L, @H on constants. */
3054 bfd_reloc_code_real_type reloc
;
3055 char *orig_str
= str
;
3057 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3064 case BFD_RELOC_LO16
:
3065 ex
.X_add_number
&= 0xffff;
3066 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3067 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3070 case BFD_RELOC_HI16
:
3071 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3073 /* PowerPC64 @h is tested for overflow. */
3074 ex
.X_add_number
= (addressT
) ex
.X_add_number
>> 16;
3075 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3077 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3079 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3085 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3086 ex
.X_add_number
= PPC_HI (ex
.X_add_number
);
3087 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3088 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3091 case BFD_RELOC_HI16_S
:
3092 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3094 /* PowerPC64 @ha is tested for overflow. */
3096 = ((addressT
) ex
.X_add_number
+ 0x8000) >> 16;
3097 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3099 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3101 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3107 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3108 ex
.X_add_number
= PPC_HA (ex
.X_add_number
);
3109 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3110 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3113 case BFD_RELOC_PPC64_HIGHER
:
3114 ex
.X_add_number
= PPC_HIGHER (ex
.X_add_number
);
3115 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3116 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3119 case BFD_RELOC_PPC64_HIGHER_S
:
3120 ex
.X_add_number
= PPC_HIGHERA (ex
.X_add_number
);
3121 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3122 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3125 case BFD_RELOC_PPC64_HIGHEST
:
3126 ex
.X_add_number
= PPC_HIGHEST (ex
.X_add_number
);
3127 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3128 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3131 case BFD_RELOC_PPC64_HIGHEST_S
:
3132 ex
.X_add_number
= PPC_HIGHESTA (ex
.X_add_number
);
3133 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3134 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3137 #endif /* OBJ_ELF */
3138 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3139 ppc_cpu
, (char *) NULL
, 0);
3143 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3145 if (ex
.X_op
== O_symbol
&& str
[0] == '(')
3147 const char *sym_name
= S_GET_NAME (ex
.X_add_symbol
);
3148 if (sym_name
[0] == '.')
3151 if (strcasecmp (sym_name
, "__tls_get_addr") == 0)
3153 expressionS tls_exp
;
3155 hold
= input_line_pointer
;
3156 input_line_pointer
= str
+ 1;
3157 expression (&tls_exp
);
3158 if (tls_exp
.X_op
== O_symbol
)
3160 reloc
= BFD_RELOC_NONE
;
3161 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3163 reloc
= BFD_RELOC_PPC_TLSGD
;
3164 input_line_pointer
+= 7;
3166 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3168 reloc
= BFD_RELOC_PPC_TLSLD
;
3169 input_line_pointer
+= 7;
3171 if (reloc
!= BFD_RELOC_NONE
)
3174 str
= input_line_pointer
;
3176 if (fc
>= MAX_INSN_FIXUPS
)
3177 as_fatal (_("too many fixups"));
3178 fixups
[fc
].exp
= tls_exp
;
3179 fixups
[fc
].opindex
= *opindex_ptr
;
3180 fixups
[fc
].reloc
= reloc
;
3184 input_line_pointer
= hold
;
3188 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3190 /* Some TLS tweaks. */
3196 case BFD_RELOC_PPC_TLS
:
3197 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3198 as_bad (_("@tls may not be used with \"%s\" operands"),
3200 else if (operand
->shift
!= 11)
3201 as_bad (_("@tls may only be used in last operand"));
3203 insn
= ppc_insert_operand (insn
, operand
,
3205 ppc_cpu
, (char *) NULL
, 0);
3208 /* We'll only use the 32 (or 64) bit form of these relocations
3209 in constants. Instructions get the 16 bit form. */
3210 case BFD_RELOC_PPC_DTPREL
:
3211 reloc
= BFD_RELOC_PPC_DTPREL16
;
3213 case BFD_RELOC_PPC_TPREL
:
3214 reloc
= BFD_RELOC_PPC_TPREL16
;
3219 if (opcode
->opcode
== (19 << 26) + (2 << 1)
3220 && reloc
== BFD_RELOC_HI16_S
)
3221 reloc
= BFD_RELOC_PPC_16DX_HA
;
3223 /* If VLE-mode convert LO/HI/HA relocations. */
3224 if (opcode
->flags
& PPC_OPCODE_VLE
)
3226 uint64_t tmp_insn
= insn
& opcode
->mask
;
3228 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3229 || tmp_insn
== E_AND2I_DOT_INSN
3230 || tmp_insn
== E_OR2IS_INSN
3231 || tmp_insn
== E_LIS_INSN
3232 || tmp_insn
== E_AND2IS_DOT_INSN
);
3235 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3236 || tmp_insn
== E_ADD2IS_INSN
3237 || tmp_insn
== E_CMP16I_INSN
3238 || tmp_insn
== E_MULL2I_INSN
3239 || tmp_insn
== E_CMPL16I_INSN
3240 || tmp_insn
== E_CMPH16I_INSN
3241 || tmp_insn
== E_CMPHL16I_INSN
);
3248 case BFD_RELOC_PPC_EMB_SDA21
:
3249 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3252 case BFD_RELOC_LO16
:
3254 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3255 else if (use_a_reloc
)
3256 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3259 case BFD_RELOC_HI16
:
3261 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3262 else if (use_a_reloc
)
3263 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3266 case BFD_RELOC_HI16_S
:
3268 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3269 else if (use_a_reloc
)
3270 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3273 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3275 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3278 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3280 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3283 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3285 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3290 #endif /* OBJ_ELF */
3292 if (reloc
!= BFD_RELOC_NONE
)
3294 /* Determine a BFD reloc value based on the operand information.
3295 We are only prepared to turn a few of the operands into
3297 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3298 | PPC_OPERAND_ABSOLUTE
)) != 0
3299 && operand
->bitm
== 0x3fffffc
3300 && operand
->shift
== 0)
3301 reloc
= BFD_RELOC_PPC_B26
;
3302 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3303 | PPC_OPERAND_ABSOLUTE
)) != 0
3304 && operand
->bitm
== 0xfffc
3305 && operand
->shift
== 0)
3306 reloc
= BFD_RELOC_PPC_B16
;
3307 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3308 && operand
->bitm
== 0x1fe
3309 && operand
->shift
== -1)
3310 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3311 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3312 && operand
->bitm
== 0xfffe
3313 && operand
->shift
== 0)
3314 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3315 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3316 && operand
->bitm
== 0x1fffffe
3317 && operand
->shift
== 0)
3318 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3319 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3320 && (operand
->bitm
& 0xfff0) == 0xfff0
3321 && operand
->shift
== 0)
3323 reloc
= BFD_RELOC_16
;
3324 #if defined OBJ_XCOFF || defined OBJ_ELF
3325 /* Note: the symbol may be not yet defined. */
3326 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3327 && ppc_is_toc_sym (ex
.X_add_symbol
))
3329 reloc
= BFD_RELOC_PPC_TOC16
;
3331 as_warn (_("assuming %s on symbol"),
3332 ppc_obj64
? "@toc" : "@xgot");
3338 /* For the absolute forms of branches, convert the PC
3339 relative form back into the absolute. */
3340 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3344 case BFD_RELOC_PPC_B26
:
3345 reloc
= BFD_RELOC_PPC_BA26
;
3347 case BFD_RELOC_PPC_B16
:
3348 reloc
= BFD_RELOC_PPC_BA16
;
3351 case BFD_RELOC_PPC_B16_BRTAKEN
:
3352 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3354 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3355 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3366 case BFD_RELOC_PPC_TOC16
:
3367 toc_reloc_types
|= has_small_toc_reloc
;
3369 case BFD_RELOC_PPC64_TOC16_LO
:
3370 case BFD_RELOC_PPC64_TOC16_HI
:
3371 case BFD_RELOC_PPC64_TOC16_HA
:
3372 toc_reloc_types
|= has_large_toc_reloc
;
3379 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3384 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3386 case BFD_RELOC_LO16
:
3387 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3389 case BFD_RELOC_16_GOTOFF
:
3390 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3392 case BFD_RELOC_LO16_GOTOFF
:
3393 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3395 case BFD_RELOC_LO16_PLTOFF
:
3396 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3398 case BFD_RELOC_16_BASEREL
:
3399 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3401 case BFD_RELOC_LO16_BASEREL
:
3402 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3404 case BFD_RELOC_PPC_TOC16
:
3405 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3407 case BFD_RELOC_PPC64_TOC16_LO
:
3408 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3410 case BFD_RELOC_PPC64_PLTGOT16
:
3411 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3413 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3414 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3416 case BFD_RELOC_PPC_DTPREL16
:
3417 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3419 case BFD_RELOC_PPC_DTPREL16_LO
:
3420 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3422 case BFD_RELOC_PPC_TPREL16
:
3423 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3425 case BFD_RELOC_PPC_TPREL16_LO
:
3426 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3428 case BFD_RELOC_PPC_GOT_DTPREL16
:
3429 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3430 case BFD_RELOC_PPC_GOT_TPREL16
:
3431 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3434 as_bad (_("unsupported relocation for DS offset field"));
3440 /* We need to generate a fixup for this expression. */
3441 if (fc
>= MAX_INSN_FIXUPS
)
3442 as_fatal (_("too many fixups"));
3443 fixups
[fc
].exp
= ex
;
3444 fixups
[fc
].opindex
= *opindex_ptr
;
3445 fixups
[fc
].reloc
= reloc
;
3453 /* If expecting more operands, then we want to see "),". */
3454 if (*str
== endc
&& opindex_ptr
[1] != 0)
3458 while (ISSPACE (*str
));
3462 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
3470 /* The call to expression should have advanced str past any
3473 && (endc
!= ',' || *str
!= '\0'))
3476 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
3478 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
3486 while (ISSPACE (*str
))
3490 as_bad (_("junk at end of line: `%s'"), str
);
3493 /* Do we need/want an APUinfo section? */
3494 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
3497 /* These are all version "1". */
3498 if (opcode
->flags
& PPC_OPCODE_SPE
)
3499 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
3500 if (opcode
->flags
& PPC_OPCODE_ISEL
)
3501 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
3502 if (opcode
->flags
& PPC_OPCODE_EFS
)
3503 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
3504 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
3505 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
3506 if (opcode
->flags
& PPC_OPCODE_PMR
)
3507 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
3508 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
3509 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
3510 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
3511 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
3512 /* Only set the VLE flag if the instruction has been pulled via
3513 the VLE instruction set. This way the flag is guaranteed to
3514 be set for VLE-only instructions or for VLE-only processors,
3515 however it'll remain clear for dual-mode instructions on
3516 dual-mode and, more importantly, standard-mode processors. */
3517 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
3519 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
3520 if (elf_section_data (now_seg
) != NULL
)
3521 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
3526 /* Write out the instruction. */
3529 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
3530 /* All instructions can start on a 2 byte boundary for VLE. */
3533 if (frag_now
->insn_addr
!= addr_mask
)
3535 /* Don't emit instructions to a frag started for data, or for a
3536 CPU differing in VLE mode. Data is allowed to be misaligned,
3537 and it's possible to start a new frag in the middle of
3539 frag_wane (frag_now
);
3543 /* Check that insns within the frag are aligned. ppc_frag_check
3544 will ensure that the frag start address is aligned. */
3545 if ((frag_now_fix () & addr_mask
) != 0)
3546 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
3548 /* Differentiate between two and four byte insns. */
3550 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
3553 f
= frag_more (insn_length
);
3554 frag_now
->insn_addr
= addr_mask
;
3555 md_number_to_chars (f
, insn
, insn_length
);
3558 last_subseg
= now_subseg
;
3561 dwarf2_emit_insn (insn_length
);
3564 /* Create any fixups. */
3565 for (i
= 0; i
< fc
; i
++)
3568 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
3570 reloc_howto_type
*reloc_howto
;
3574 reloc_howto
= bfd_reloc_type_lookup (stdoutput
, fixups
[i
].reloc
);
3578 size
= bfd_get_reloc_size (reloc_howto
);
3579 offset
= target_big_endian
? (insn_length
- size
) : 0;
3581 fixP
= fix_new_exp (frag_now
,
3582 f
- frag_now
->fr_literal
+ offset
,
3585 reloc_howto
->pc_relative
,
3590 const struct powerpc_operand
*operand
;
3592 operand
= &powerpc_operands
[fixups
[i
].opindex
];
3593 fixP
= fix_new_exp (frag_now
,
3594 f
- frag_now
->fr_literal
,
3597 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
3600 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
3604 /* Handle a macro. Gather all the operands, transform them as
3605 described by the macro, and call md_assemble recursively. All the
3606 operands are separated by commas; we don't accept parentheses
3607 around operands here. */
3610 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
3621 /* Gather the users operands into the operands array. */
3626 if (count
>= sizeof operands
/ sizeof operands
[0])
3628 operands
[count
++] = s
;
3629 s
= strchr (s
, ',');
3630 if (s
== (char *) NULL
)
3635 if (count
!= macro
->operands
)
3637 as_bad (_("wrong number of operands"));
3641 /* Work out how large the string must be (the size is unbounded
3642 because it includes user input). */
3644 format
= macro
->format
;
3645 while (*format
!= '\0')
3654 arg
= strtol (format
+ 1, &send
, 10);
3655 know (send
!= format
&& arg
< count
);
3656 len
+= strlen (operands
[arg
]);
3661 /* Put the string together. */
3662 complete
= s
= XNEWVEC (char, len
+ 1);
3663 format
= macro
->format
;
3664 while (*format
!= '\0')
3670 arg
= strtol (format
+ 1, &send
, 10);
3671 strcpy (s
, operands
[arg
]);
3678 /* Assemble the constructed instruction. */
3679 md_assemble (complete
);
3684 /* For ELF, add support for SHT_ORDERED. */
3687 ppc_section_type (char *str
, size_t len
)
3689 if (len
== 7 && strncmp (str
, "ordered", 7) == 0)
3696 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
3698 if (type
== SHT_ORDERED
)
3699 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
3705 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
3710 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
3713 #endif /* OBJ_ELF */
3716 /* Pseudo-op handling. */
3718 /* The .byte pseudo-op. This is similar to the normal .byte
3719 pseudo-op, but it can also take a single ASCII string. */
3722 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
3726 if (*input_line_pointer
!= '\"')
3732 /* Gather characters. A real double quote is doubled. Unusual
3733 characters are not permitted. */
3734 ++input_line_pointer
;
3739 c
= *input_line_pointer
++;
3743 if (*input_line_pointer
!= '\"')
3745 ++input_line_pointer
;
3748 FRAG_APPEND_1_CHAR (c
);
3752 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
3753 as_warn (_("data in executable section"));
3754 demand_empty_rest_of_line ();
3759 /* XCOFF specific pseudo-op handling. */
3761 /* This is set if we are creating a .stabx symbol, since we don't want
3762 to handle symbol suffixes for such symbols. */
3763 static bfd_boolean ppc_stab_symbol
;
3765 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3766 symbols in the .bss segment as though they were local common
3767 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3768 aligns .comm and .lcomm to 4 bytes. */
3771 ppc_comm (int lcomm
)
3773 asection
*current_seg
= now_seg
;
3774 subsegT current_subseg
= now_subseg
;
3780 symbolS
*lcomm_sym
= NULL
;
3784 endc
= get_symbol_name (&name
);
3785 end_name
= input_line_pointer
;
3786 (void) restore_line_pointer (endc
);
3788 if (*input_line_pointer
!= ',')
3790 as_bad (_("missing size"));
3791 ignore_rest_of_line ();
3794 ++input_line_pointer
;
3796 size
= get_absolute_expression ();
3799 as_bad (_("negative size"));
3800 ignore_rest_of_line ();
3806 /* The third argument to .comm is the alignment. */
3807 if (*input_line_pointer
!= ',')
3811 ++input_line_pointer
;
3812 align
= get_absolute_expression ();
3815 as_warn (_("ignoring bad alignment"));
3825 /* The third argument to .lcomm appears to be the real local
3826 common symbol to create. References to the symbol named in
3827 the first argument are turned into references to the third
3829 if (*input_line_pointer
!= ',')
3831 as_bad (_("missing real symbol name"));
3832 ignore_rest_of_line ();
3835 ++input_line_pointer
;
3837 lcomm_endc
= get_symbol_name (&lcomm_name
);
3839 lcomm_sym
= symbol_find_or_make (lcomm_name
);
3841 (void) restore_line_pointer (lcomm_endc
);
3843 /* The fourth argument to .lcomm is the alignment. */
3844 if (*input_line_pointer
!= ',')
3853 ++input_line_pointer
;
3854 align
= get_absolute_expression ();
3857 as_warn (_("ignoring bad alignment"));
3864 sym
= symbol_find_or_make (name
);
3867 if (S_IS_DEFINED (sym
)
3868 || S_GET_VALUE (sym
) != 0)
3870 as_bad (_("attempt to redefine symbol"));
3871 ignore_rest_of_line ();
3875 record_alignment (bss_section
, align
);
3878 || ! S_IS_DEFINED (lcomm_sym
))
3887 S_SET_EXTERNAL (sym
);
3891 symbol_get_tc (lcomm_sym
)->output
= 1;
3892 def_sym
= lcomm_sym
;
3896 subseg_set (bss_section
, 1);
3897 frag_align (align
, 0, 0);
3899 symbol_set_frag (def_sym
, frag_now
);
3900 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
3901 def_size
, (char *) NULL
);
3903 S_SET_SEGMENT (def_sym
, bss_section
);
3904 symbol_get_tc (def_sym
)->align
= align
;
3908 /* Align the size of lcomm_sym. */
3909 symbol_get_frag (lcomm_sym
)->fr_offset
=
3910 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
3911 &~ ((1 << align
) - 1));
3912 if (align
> symbol_get_tc (lcomm_sym
)->align
)
3913 symbol_get_tc (lcomm_sym
)->align
= align
;
3918 /* Make sym an offset from lcomm_sym. */
3919 S_SET_SEGMENT (sym
, bss_section
);
3920 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
3921 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
3922 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
3925 subseg_set (current_seg
, current_subseg
);
3927 demand_empty_rest_of_line ();
3930 /* The .csect pseudo-op. This switches us into a different
3931 subsegment. The first argument is a symbol whose value is the
3932 start of the .csect. In COFF, csect symbols get special aux
3933 entries defined by the x_csect field of union internal_auxent. The
3934 optional second argument is the alignment (the default is 2). */
3937 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
3944 endc
= get_symbol_name (&name
);
3946 sym
= symbol_find_or_make (name
);
3948 (void) restore_line_pointer (endc
);
3950 if (S_GET_NAME (sym
)[0] == '\0')
3952 /* An unnamed csect is assumed to be [PR]. */
3953 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
3957 if (*input_line_pointer
== ',')
3959 ++input_line_pointer
;
3960 align
= get_absolute_expression ();
3963 ppc_change_csect (sym
, align
);
3965 demand_empty_rest_of_line ();
3968 /* Change to a different csect. */
3971 ppc_change_csect (symbolS
*sym
, offsetT align
)
3973 if (S_IS_DEFINED (sym
))
3974 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
3984 /* This is a new csect. We need to look at the symbol class to
3985 figure out whether it should go in the text section or the
3989 switch (symbol_get_tc (sym
)->symbol_class
)
3999 S_SET_SEGMENT (sym
, text_section
);
4000 symbol_get_tc (sym
)->subseg
= ppc_text_subsegment
;
4001 ++ppc_text_subsegment
;
4002 list_ptr
= &ppc_text_csects
;
4012 if (ppc_toc_csect
!= NULL
4013 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4014 == ppc_data_subsegment
))
4016 S_SET_SEGMENT (sym
, data_section
);
4017 symbol_get_tc (sym
)->subseg
= ppc_data_subsegment
;
4018 ++ppc_data_subsegment
;
4019 list_ptr
= &ppc_data_csects
;
4025 /* We set the obstack chunk size to a small value before
4026 changing subsegments, so that we don't use a lot of memory
4027 space for what may be a small section. */
4028 hold_chunksize
= chunksize
;
4031 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4032 symbol_get_tc (sym
)->subseg
);
4034 chunksize
= hold_chunksize
;
4037 ppc_after_toc_frag
= frag_now
;
4039 record_alignment (sec
, align
);
4041 frag_align_code (align
, 0);
4043 frag_align (align
, 0, 0);
4045 symbol_set_frag (sym
, frag_now
);
4046 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4048 symbol_get_tc (sym
)->align
= align
;
4049 symbol_get_tc (sym
)->output
= 1;
4050 symbol_get_tc (sym
)->within
= sym
;
4052 for (list
= *list_ptr
;
4053 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4054 list
= symbol_get_tc (list
)->next
)
4056 symbol_get_tc (list
)->next
= sym
;
4058 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4059 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4063 ppc_current_csect
= sym
;
4067 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4071 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4073 sec
= subseg_new (dw
->name
, subseg
);
4074 oldflags
= bfd_get_section_flags (stdoutput
, sec
);
4075 if (oldflags
== SEC_NO_FLAGS
)
4077 /* Just created section. */
4078 gas_assert (dw_sections
[idx
].sect
== NULL
);
4080 bfd_set_section_flags (stdoutput
, sec
, SEC_DEBUGGING
);
4081 bfd_set_section_alignment (stdoutput
, sec
, 0);
4082 dw_sections
[idx
].sect
= sec
;
4085 /* Not anymore in a csect. */
4086 ppc_current_csect
= NULL
;
4089 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4090 .dwsect flag [, opt-label ]
4094 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4098 const struct xcoff_dwsect_name
*dw
;
4099 struct dw_subsection
*subseg
;
4100 struct dw_section
*dws
;
4104 flag
= get_absolute_expression ();
4106 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4107 if (xcoff_dwsect_names
[i
].flag
== flag
)
4109 dw
= &xcoff_dwsect_names
[i
];
4113 /* Parse opt-label. */
4114 if (*input_line_pointer
== ',')
4119 ++input_line_pointer
;
4121 c
= get_symbol_name (&label
);
4122 opt_label
= symbol_find_or_make (label
);
4123 (void) restore_line_pointer (c
);
4128 demand_empty_rest_of_line ();
4130 /* Return now in case of unknown subsection. */
4133 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4138 /* Find the subsection. */
4139 dws
= &dw_sections
[i
];
4141 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4143 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4144 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4146 as_bad (_("label %s was not defined in this dwarf section"),
4147 S_GET_NAME (opt_label
));
4148 subseg
= dws
->anon_subseg
;
4152 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4157 /* Switch to the subsection. */
4158 ppc_change_debug_section (i
, subseg
->subseg
);
4162 /* Create a new dw subsection. */
4163 subseg
= XNEW (struct dw_subsection
);
4165 if (opt_label
== NULL
)
4167 /* The anonymous one. */
4169 subseg
->link
= NULL
;
4170 dws
->anon_subseg
= subseg
;
4175 if (dws
->list_subseg
!= NULL
)
4176 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4180 subseg
->link
= dws
->list_subseg
;
4181 dws
->list_subseg
= subseg
;
4182 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4185 ppc_change_debug_section (i
, subseg
->subseg
);
4189 /* Add the length field. */
4190 expressionS
*exp
= &subseg
->end_exp
;
4193 if (opt_label
!= NULL
)
4194 symbol_set_value_now (opt_label
);
4196 /* Add the length field. Note that according to the AIX assembler
4197 manual, the size of the length field is 4 for powerpc32 but
4198 12 for powerpc64. */
4201 /* Write the 64bit marker. */
4202 md_number_to_chars (frag_more (4), -1, 4);
4205 exp
->X_op
= O_subtract
;
4206 exp
->X_op_symbol
= symbol_temp_new_now ();
4207 exp
->X_add_symbol
= symbol_temp_make ();
4209 sz
= ppc_obj64
? 8 : 4;
4210 exp
->X_add_number
= -sz
;
4211 emit_expr (exp
, sz
);
4216 /* This function handles the .text and .data pseudo-ops. These
4217 pseudo-ops aren't really used by XCOFF; we implement them for the
4218 convenience of people who aren't used to XCOFF. */
4221 ppc_section (int type
)
4228 else if (type
== 'd')
4233 sym
= symbol_find_or_make (name
);
4235 ppc_change_csect (sym
, 2);
4237 demand_empty_rest_of_line ();
4240 /* This function handles the .section pseudo-op. This is mostly to
4241 give an error, since XCOFF only supports .text, .data and .bss, but
4242 we do permit the user to name the text or data section. */
4245 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4248 const char *real_name
;
4252 c
= get_symbol_name (&user_name
);
4254 if (strcmp (user_name
, ".text") == 0)
4255 real_name
= ".text[PR]";
4256 else if (strcmp (user_name
, ".data") == 0)
4257 real_name
= ".data[RW]";
4260 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4261 (void) restore_line_pointer (c
);
4262 ignore_rest_of_line ();
4266 (void) restore_line_pointer (c
);
4268 sym
= symbol_find_or_make (real_name
);
4270 ppc_change_csect (sym
, 2);
4272 demand_empty_rest_of_line ();
4275 /* The .extern pseudo-op. We create an undefined symbol. */
4278 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4283 endc
= get_symbol_name (&name
);
4285 (void) symbol_find_or_make (name
);
4287 (void) restore_line_pointer (endc
);
4289 demand_empty_rest_of_line ();
4292 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4295 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4301 endc
= get_symbol_name (&name
);
4303 sym
= symbol_find_or_make (name
);
4305 (void) restore_line_pointer (endc
);
4307 symbol_get_tc (sym
)->output
= 1;
4309 demand_empty_rest_of_line ();
4312 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4313 relocations at the beginning of the current csect.
4315 (In principle, there's no reason why the relocations _have_ to be at
4316 the beginning. Anywhere in the csect would do. However, inserting
4317 at the beginning is what the native assembler does, and it helps to
4318 deal with cases where the .ref statements follow the section contents.)
4320 ??? .refs don't work for empty .csects. However, the native assembler
4321 doesn't report an error in this case, and neither yet do we. */
4324 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
4329 if (ppc_current_csect
== NULL
)
4331 as_bad (_(".ref outside .csect"));
4332 ignore_rest_of_line ();
4338 c
= get_symbol_name (&name
);
4340 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
4341 symbol_find_or_make (name
), 0, FALSE
, BFD_RELOC_NONE
);
4343 *input_line_pointer
= c
;
4344 SKIP_WHITESPACE_AFTER_NAME ();
4345 c
= *input_line_pointer
;
4348 input_line_pointer
++;
4350 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
4352 as_bad (_("missing symbol name"));
4353 ignore_rest_of_line ();
4360 demand_empty_rest_of_line ();
4363 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4364 although I don't know why it bothers. */
4367 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
4374 endc
= get_symbol_name (&name
);
4376 sym
= symbol_find_or_make (name
);
4378 (void) restore_line_pointer (endc
);
4380 if (*input_line_pointer
!= ',')
4382 as_bad (_("missing rename string"));
4383 ignore_rest_of_line ();
4386 ++input_line_pointer
;
4388 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
4390 demand_empty_rest_of_line ();
4393 /* The .stabx pseudo-op. This is similar to a normal .stabs
4394 pseudo-op, but slightly different. A sample is
4395 .stabx "main:F-1",.main,142,0
4396 The first argument is the symbol name to create. The second is the
4397 value, and the third is the storage class. The fourth seems to be
4398 always zero, and I am assuming it is the type. */
4401 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
4408 name
= demand_copy_C_string (&len
);
4410 if (*input_line_pointer
!= ',')
4412 as_bad (_("missing value"));
4415 ++input_line_pointer
;
4417 ppc_stab_symbol
= TRUE
;
4418 sym
= symbol_make (name
);
4419 ppc_stab_symbol
= FALSE
;
4421 symbol_get_tc (sym
)->real_name
= name
;
4423 (void) expression (&exp
);
4430 as_bad (_("illegal .stabx expression; zero assumed"));
4431 exp
.X_add_number
= 0;
4434 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
4435 symbol_set_frag (sym
, &zero_address_frag
);
4439 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
4440 symbol_set_value_expression (sym
, &exp
);
4444 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
4445 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
4450 /* The value is some complex expression. This will probably
4451 fail at some later point, but this is probably the right
4452 thing to do here. */
4453 symbol_set_value_expression (sym
, &exp
);
4457 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4458 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4460 if (*input_line_pointer
!= ',')
4462 as_bad (_("missing class"));
4465 ++input_line_pointer
;
4467 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
4469 if (*input_line_pointer
!= ',')
4471 as_bad (_("missing type"));
4474 ++input_line_pointer
;
4476 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
4478 symbol_get_tc (sym
)->output
= 1;
4480 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
4485 .stabx "z",arrays_,133,0
4488 .comm arrays_,13768,3
4490 resolve_symbol_value will copy the exp's "within" into sym's when the
4491 offset is 0. Since this seems to be corner case problem,
4492 only do the correction for storage class C_STSYM. A better solution
4493 would be to have the tc field updated in ppc_symbol_new_hook. */
4495 if (exp
.X_op
== O_symbol
)
4497 if (ppc_current_block
== NULL
)
4498 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4500 symbol_get_tc (sym
)->within
= ppc_current_block
;
4501 symbol_get_tc (exp
.X_add_symbol
)->within
= ppc_current_block
;
4505 if (exp
.X_op
!= O_symbol
4506 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
4507 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
4508 ppc_frob_label (sym
);
4511 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4512 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
4513 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
4514 symbol_get_tc (ppc_current_csect
)->within
= sym
;
4517 demand_empty_rest_of_line ();
4520 /* The .function pseudo-op. This takes several arguments. The first
4521 argument seems to be the external name of the symbol. The second
4522 argument seems to be the label for the start of the function. gcc
4523 uses the same name for both. I have no idea what the third and
4524 fourth arguments are meant to be. The optional fifth argument is
4525 an expression for the size of the function. In COFF this symbol
4526 gets an aux entry like that used for a csect. */
4529 ppc_function (int ignore ATTRIBUTE_UNUSED
)
4537 endc
= get_symbol_name (&name
);
4539 /* Ignore any [PR] suffix. */
4540 name
= ppc_canonicalize_symbol_name (name
);
4541 s
= strchr (name
, '[');
4542 if (s
!= (char *) NULL
4543 && strcmp (s
+ 1, "PR]") == 0)
4546 ext_sym
= symbol_find_or_make (name
);
4548 (void) restore_line_pointer (endc
);
4550 if (*input_line_pointer
!= ',')
4552 as_bad (_("missing symbol name"));
4553 ignore_rest_of_line ();
4556 ++input_line_pointer
;
4558 endc
= get_symbol_name (&name
);
4560 lab_sym
= symbol_find_or_make (name
);
4562 (void) restore_line_pointer (endc
);
4564 if (ext_sym
!= lab_sym
)
4568 exp
.X_op
= O_symbol
;
4569 exp
.X_add_symbol
= lab_sym
;
4570 exp
.X_op_symbol
= NULL
;
4571 exp
.X_add_number
= 0;
4573 symbol_set_value_expression (ext_sym
, &exp
);
4576 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
4577 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
4578 symbol_get_tc (ext_sym
)->output
= 1;
4580 if (*input_line_pointer
== ',')
4584 /* Ignore the third argument. */
4585 ++input_line_pointer
;
4587 if (*input_line_pointer
== ',')
4589 /* Ignore the fourth argument. */
4590 ++input_line_pointer
;
4592 if (*input_line_pointer
== ',')
4594 /* The fifth argument is the function size. */
4595 ++input_line_pointer
;
4596 symbol_get_tc (ext_sym
)->u
.size
= symbol_new
4597 ("L0\001", absolute_section
,(valueT
) 0, &zero_address_frag
);
4598 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
4603 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
4604 SF_SET_FUNCTION (ext_sym
);
4605 SF_SET_PROCESS (ext_sym
);
4606 coff_add_linesym (ext_sym
);
4608 demand_empty_rest_of_line ();
4611 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4612 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4613 with the correct line number */
4615 static symbolS
*saved_bi_sym
= 0;
4618 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
4622 sym
= symbol_make (".bf");
4623 S_SET_SEGMENT (sym
, text_section
);
4624 symbol_set_frag (sym
, frag_now
);
4625 S_SET_VALUE (sym
, frag_now_fix ());
4626 S_SET_STORAGE_CLASS (sym
, C_FCN
);
4628 coff_line_base
= get_absolute_expression ();
4630 S_SET_NUMBER_AUXILIARY (sym
, 1);
4631 SA_SET_SYM_LNNO (sym
, coff_line_base
);
4633 /* Line number for bi. */
4636 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
4641 symbol_get_tc (sym
)->output
= 1;
4643 ppc_frob_label (sym
);
4645 demand_empty_rest_of_line ();
4648 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4649 ".ef", except that the line number is absolute, not relative to the
4650 most recent ".bf" symbol. */
4653 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
4657 sym
= symbol_make (".ef");
4658 S_SET_SEGMENT (sym
, text_section
);
4659 symbol_set_frag (sym
, frag_now
);
4660 S_SET_VALUE (sym
, frag_now_fix ());
4661 S_SET_STORAGE_CLASS (sym
, C_FCN
);
4662 S_SET_NUMBER_AUXILIARY (sym
, 1);
4663 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4664 symbol_get_tc (sym
)->output
= 1;
4666 ppc_frob_label (sym
);
4668 demand_empty_rest_of_line ();
4671 /* The .bi and .ei pseudo-ops. These take a string argument and
4672 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4673 the symbol list. The value of .bi will be know when the next .bf
4679 static symbolS
*last_biei
;
4686 name
= demand_copy_C_string (&len
);
4688 /* The value of these symbols is actually file offset. Here we set
4689 the value to the index into the line number entries. In
4690 ppc_frob_symbols we set the fix_line field, which will cause BFD
4691 to do the right thing. */
4693 sym
= symbol_make (name
);
4694 /* obj-coff.c currently only handles line numbers correctly in the
4696 S_SET_SEGMENT (sym
, text_section
);
4697 S_SET_VALUE (sym
, coff_n_line_nos
);
4698 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4700 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
4701 symbol_get_tc (sym
)->output
= 1;
4709 for (look
= last_biei
? last_biei
: symbol_rootP
;
4710 (look
!= (symbolS
*) NULL
4711 && (S_GET_STORAGE_CLASS (look
) == C_FILE
4712 || S_GET_STORAGE_CLASS (look
) == C_BINCL
4713 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
4714 look
= symbol_next (look
))
4716 if (look
!= (symbolS
*) NULL
)
4718 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4719 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
4723 demand_empty_rest_of_line ();
4726 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4727 There is one argument, which is a csect symbol. The value of the
4728 .bs symbol is the index of this csect symbol. */
4731 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
4738 if (ppc_current_block
!= NULL
)
4739 as_bad (_("nested .bs blocks"));
4741 endc
= get_symbol_name (&name
);
4743 csect
= symbol_find_or_make (name
);
4745 (void) restore_line_pointer (endc
);
4747 sym
= symbol_make (".bs");
4748 S_SET_SEGMENT (sym
, now_seg
);
4749 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
4750 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4751 symbol_get_tc (sym
)->output
= 1;
4753 symbol_get_tc (sym
)->within
= csect
;
4755 ppc_frob_label (sym
);
4757 ppc_current_block
= sym
;
4759 demand_empty_rest_of_line ();
4762 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4765 ppc_es (int ignore ATTRIBUTE_UNUSED
)
4769 if (ppc_current_block
== NULL
)
4770 as_bad (_(".es without preceding .bs"));
4772 sym
= symbol_make (".es");
4773 S_SET_SEGMENT (sym
, now_seg
);
4774 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
4775 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4776 symbol_get_tc (sym
)->output
= 1;
4778 ppc_frob_label (sym
);
4780 ppc_current_block
= NULL
;
4782 demand_empty_rest_of_line ();
4785 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4789 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
4793 sym
= symbol_make (".bb");
4794 S_SET_SEGMENT (sym
, text_section
);
4795 symbol_set_frag (sym
, frag_now
);
4796 S_SET_VALUE (sym
, frag_now_fix ());
4797 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
4799 S_SET_NUMBER_AUXILIARY (sym
, 1);
4800 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4802 symbol_get_tc (sym
)->output
= 1;
4804 SF_SET_PROCESS (sym
);
4806 ppc_frob_label (sym
);
4808 demand_empty_rest_of_line ();
4811 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4815 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
4819 sym
= symbol_make (".eb");
4820 S_SET_SEGMENT (sym
, text_section
);
4821 symbol_set_frag (sym
, frag_now
);
4822 S_SET_VALUE (sym
, frag_now_fix ());
4823 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
4824 S_SET_NUMBER_AUXILIARY (sym
, 1);
4825 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4826 symbol_get_tc (sym
)->output
= 1;
4828 SF_SET_PROCESS (sym
);
4830 ppc_frob_label (sym
);
4832 demand_empty_rest_of_line ();
4835 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4839 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
4845 name
= demand_copy_C_string (&len
);
4846 sym
= symbol_make (name
);
4847 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4848 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4849 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
4850 S_SET_VALUE (sym
, 0);
4851 symbol_get_tc (sym
)->output
= 1;
4853 ppc_frob_label (sym
);
4855 demand_empty_rest_of_line ();
4858 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4861 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
4865 sym
= symbol_make (".ec");
4866 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4867 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4868 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
4869 S_SET_VALUE (sym
, 0);
4870 symbol_get_tc (sym
)->output
= 1;
4872 ppc_frob_label (sym
);
4874 demand_empty_rest_of_line ();
4877 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4880 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
4882 if (ppc_toc_csect
!= (symbolS
*) NULL
)
4883 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
4890 subseg
= ppc_data_subsegment
;
4891 ++ppc_data_subsegment
;
4893 subseg_new (segment_name (data_section
), subseg
);
4894 ppc_toc_frag
= frag_now
;
4896 sym
= symbol_find_or_make ("TOC[TC0]");
4897 symbol_set_frag (sym
, frag_now
);
4898 S_SET_SEGMENT (sym
, data_section
);
4899 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4900 symbol_get_tc (sym
)->subseg
= subseg
;
4901 symbol_get_tc (sym
)->output
= 1;
4902 symbol_get_tc (sym
)->within
= sym
;
4904 ppc_toc_csect
= sym
;
4906 for (list
= ppc_data_csects
;
4907 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4908 list
= symbol_get_tc (list
)->next
)
4910 symbol_get_tc (list
)->next
= sym
;
4912 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4913 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4917 ppc_current_csect
= ppc_toc_csect
;
4919 demand_empty_rest_of_line ();
4922 /* The AIX assembler automatically aligns the operands of a .long or
4923 .short pseudo-op, and we want to be compatible. */
4926 ppc_xcoff_cons (int log_size
)
4928 frag_align (log_size
, 0, 0);
4929 record_alignment (now_seg
, log_size
);
4930 cons (1 << log_size
);
4934 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
4939 (void) expression (&exp
);
4941 if (exp
.X_op
!= O_constant
)
4943 as_bad (_("non-constant byte count"));
4947 byte_count
= exp
.X_add_number
;
4949 if (*input_line_pointer
!= ',')
4951 as_bad (_("missing value"));
4955 ++input_line_pointer
;
4960 ppc_xcoff_end (void)
4964 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4966 struct dw_section
*dws
= &dw_sections
[i
];
4967 struct dw_subsection
*dwss
;
4969 if (dws
->anon_subseg
)
4971 dwss
= dws
->anon_subseg
;
4972 dwss
->link
= dws
->list_subseg
;
4975 dwss
= dws
->list_subseg
;
4977 for (; dwss
!= NULL
; dwss
= dwss
->link
)
4978 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
4980 subseg_set (dws
->sect
, dwss
->subseg
);
4981 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
4986 #endif /* OBJ_XCOFF */
4987 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4989 /* The .tc pseudo-op. This is used when generating either XCOFF or
4990 ELF. This takes two or more arguments.
4992 When generating XCOFF output, the first argument is the name to
4993 give to this location in the toc; this will be a symbol with class
4994 TC. The rest of the arguments are N-byte values to actually put at
4995 this location in the TOC; often there is just one more argument, a
4996 relocatable symbol reference. The size of the value to store
4997 depends on target word size. A 32-bit target uses 4-byte values, a
4998 64-bit target uses 8-byte values.
5000 When not generating XCOFF output, the arguments are the same, but
5001 the first argument is simply ignored. */
5004 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5008 /* Define the TOC symbol name. */
5014 if (ppc_toc_csect
== (symbolS
*) NULL
5015 || ppc_toc_csect
!= ppc_current_csect
)
5017 as_bad (_(".tc not in .toc section"));
5018 ignore_rest_of_line ();
5022 endc
= get_symbol_name (&name
);
5024 sym
= symbol_find_or_make (name
);
5026 (void) restore_line_pointer (endc
);
5028 if (S_IS_DEFINED (sym
))
5032 label
= symbol_get_tc (ppc_current_csect
)->within
;
5033 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5035 as_bad (_(".tc with no label"));
5036 ignore_rest_of_line ();
5040 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5041 symbol_set_frag (label
, symbol_get_frag (sym
));
5042 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5044 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5045 ++input_line_pointer
;
5050 S_SET_SEGMENT (sym
, now_seg
);
5051 symbol_set_frag (sym
, frag_now
);
5052 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5053 symbol_get_tc (sym
)->symbol_class
= XMC_TC
;
5054 symbol_get_tc (sym
)->output
= 1;
5056 ppc_frob_label (sym
);
5059 #endif /* OBJ_XCOFF */
5063 /* Skip the TOC symbol name. */
5064 while (is_part_of_name (*input_line_pointer
)
5065 || *input_line_pointer
== ' '
5066 || *input_line_pointer
== '['
5067 || *input_line_pointer
== ']'
5068 || *input_line_pointer
== '{'
5069 || *input_line_pointer
== '}')
5070 ++input_line_pointer
;
5072 /* Align to a four/eight byte boundary. */
5073 align
= ppc_obj64
? 3 : 2;
5074 frag_align (align
, 0, 0);
5075 record_alignment (now_seg
, align
);
5076 #endif /* OBJ_ELF */
5078 if (*input_line_pointer
!= ',')
5079 demand_empty_rest_of_line ();
5082 ++input_line_pointer
;
5083 cons (ppc_obj64
? 8 : 4);
5087 /* Pseudo-op .machine. */
5090 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5094 #define MAX_HISTORY 100
5095 static ppc_cpu_t
*cpu_history
;
5096 static int curr_hist
;
5100 c
= get_symbol_name (&cpu_string
);
5101 cpu_string
= xstrdup (cpu_string
);
5102 (void) restore_line_pointer (c
);
5104 if (cpu_string
!= NULL
)
5106 ppc_cpu_t old_cpu
= ppc_cpu
;
5110 for (p
= cpu_string
; *p
!= 0; p
++)
5113 if (strcmp (cpu_string
, "push") == 0)
5115 if (cpu_history
== NULL
)
5116 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5118 if (curr_hist
>= MAX_HISTORY
)
5119 as_bad (_(".machine stack overflow"));
5121 cpu_history
[curr_hist
++] = ppc_cpu
;
5123 else if (strcmp (cpu_string
, "pop") == 0)
5126 as_bad (_(".machine stack underflow"));
5128 ppc_cpu
= cpu_history
[--curr_hist
];
5130 else if ((new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, cpu_string
)) != 0)
5133 as_bad (_("invalid machine `%s'"), cpu_string
);
5135 if (ppc_cpu
!= old_cpu
)
5136 ppc_setup_opcodes ();
5139 demand_empty_rest_of_line ();
5141 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5145 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5147 /* Set the current section. */
5149 ppc_set_current_section (segT
new)
5151 ppc_previous_section
= ppc_current_section
;
5152 ppc_current_section
= new;
5155 /* pseudo-op: .previous
5156 behaviour: toggles the current section with the previous section.
5158 warnings: "No previous section" */
5161 ppc_previous (int ignore ATTRIBUTE_UNUSED
)
5163 if (ppc_previous_section
== NULL
)
5165 as_warn (_("no previous section to return to, ignored."));
5169 subseg_set (ppc_previous_section
, 0);
5171 ppc_set_current_section (ppc_previous_section
);
5174 /* pseudo-op: .pdata
5175 behaviour: predefined read only data section
5179 initial: .section .pdata "adr3"
5180 a - don't know -- maybe a misprint
5181 d - initialized data
5183 3 - double word aligned (that would be 4 byte boundary)
5186 Tag index tables (also known as the function table) for exception
5187 handling, debugging, etc. */
5190 ppc_pdata (int ignore ATTRIBUTE_UNUSED
)
5192 if (pdata_section
== 0)
5194 pdata_section
= subseg_new (".pdata", 0);
5196 bfd_set_section_flags (stdoutput
, pdata_section
,
5197 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5198 | SEC_READONLY
| SEC_DATA
));
5200 bfd_set_section_alignment (stdoutput
, pdata_section
, 2);
5204 pdata_section
= subseg_new (".pdata", 0);
5206 ppc_set_current_section (pdata_section
);
5209 /* pseudo-op: .ydata
5210 behaviour: predefined read only data section
5214 initial: .section .ydata "drw3"
5215 a - don't know -- maybe a misprint
5216 d - initialized data
5218 3 - double word aligned (that would be 4 byte boundary)
5220 Tag tables (also known as the scope table) for exception handling,
5224 ppc_ydata (int ignore ATTRIBUTE_UNUSED
)
5226 if (ydata_section
== 0)
5228 ydata_section
= subseg_new (".ydata", 0);
5229 bfd_set_section_flags (stdoutput
, ydata_section
,
5230 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5231 | SEC_READONLY
| SEC_DATA
));
5233 bfd_set_section_alignment (stdoutput
, ydata_section
, 3);
5237 ydata_section
= subseg_new (".ydata", 0);
5239 ppc_set_current_section (ydata_section
);
5242 /* pseudo-op: .reldata
5243 behaviour: predefined read write data section
5244 double word aligned (4-byte)
5245 FIXME: relocation is applied to it
5246 FIXME: what's the difference between this and .data?
5249 initial: .section .reldata "drw3"
5250 d - initialized data
5253 3 - double word aligned (that would be 8 byte boundary)
5256 Like .data, but intended to hold data subject to relocation, such as
5257 function descriptors, etc. */
5260 ppc_reldata (int ignore ATTRIBUTE_UNUSED
)
5262 if (reldata_section
== 0)
5264 reldata_section
= subseg_new (".reldata", 0);
5266 bfd_set_section_flags (stdoutput
, reldata_section
,
5267 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5270 bfd_set_section_alignment (stdoutput
, reldata_section
, 2);
5274 reldata_section
= subseg_new (".reldata", 0);
5276 ppc_set_current_section (reldata_section
);
5279 /* pseudo-op: .rdata
5280 behaviour: predefined read only data section
5284 initial: .section .rdata "dr3"
5285 d - initialized data
5287 3 - double word aligned (that would be 4 byte boundary) */
5290 ppc_rdata (int ignore ATTRIBUTE_UNUSED
)
5292 if (rdata_section
== 0)
5294 rdata_section
= subseg_new (".rdata", 0);
5295 bfd_set_section_flags (stdoutput
, rdata_section
,
5296 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5297 | SEC_READONLY
| SEC_DATA
));
5299 bfd_set_section_alignment (stdoutput
, rdata_section
, 2);
5303 rdata_section
= subseg_new (".rdata", 0);
5305 ppc_set_current_section (rdata_section
);
5308 /* pseudo-op: .ualong
5309 behaviour: much like .int, with the exception that no alignment is
5311 FIXME: test the alignment statement
5316 ppc_ualong (int ignore ATTRIBUTE_UNUSED
)
5322 /* pseudo-op: .znop <symbol name>
5323 behaviour: Issue a nop instruction
5324 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5325 the supplied symbol name.
5327 warnings: Missing symbol name */
5330 ppc_znop (int ignore ATTRIBUTE_UNUSED
)
5333 const struct powerpc_opcode
*opcode
;
5340 /* Strip out the symbol name. */
5341 c
= get_symbol_name (&symbol_name
);
5343 name
= xstrdup (symbol_name
);
5345 sym
= symbol_find_or_make (name
);
5347 *input_line_pointer
= c
;
5349 SKIP_WHITESPACE_AFTER_NAME ();
5351 /* Look up the opcode in the hash table. */
5352 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, "nop");
5354 /* Stick in the nop. */
5355 insn
= opcode
->opcode
;
5357 /* Write out the instruction. */
5359 md_number_to_chars (f
, insn
, 4);
5361 f
- frag_now
->fr_literal
,
5366 BFD_RELOC_16_GOT_PCREL
);
5376 ppc_pe_comm (int lcomm
)
5385 c
= get_symbol_name (&name
);
5387 /* just after name is now '\0'. */
5388 p
= input_line_pointer
;
5390 SKIP_WHITESPACE_AFTER_NAME ();
5391 if (*input_line_pointer
!= ',')
5393 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5394 ignore_rest_of_line ();
5398 input_line_pointer
++; /* skip ',' */
5399 if ((temp
= get_absolute_expression ()) < 0)
5401 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
5402 ignore_rest_of_line ();
5408 /* The third argument to .comm is the alignment. */
5409 if (*input_line_pointer
!= ',')
5413 ++input_line_pointer
;
5414 align
= get_absolute_expression ();
5417 as_warn (_("ignoring bad alignment"));
5424 symbolP
= symbol_find_or_make (name
);
5427 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
5429 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5430 S_GET_NAME (symbolP
));
5431 ignore_rest_of_line ();
5435 if (S_GET_VALUE (symbolP
))
5437 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
5438 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5439 S_GET_NAME (symbolP
),
5440 (long) S_GET_VALUE (symbolP
),
5445 S_SET_VALUE (symbolP
, (valueT
) temp
);
5446 S_SET_EXTERNAL (symbolP
);
5447 S_SET_SEGMENT (symbolP
, bfd_com_section_ptr
);
5450 demand_empty_rest_of_line ();
5454 * implement the .section pseudo op:
5455 * .section name {, "flags"}
5457 * | +--- optional flags: 'b' for bss
5459 * +-- section name 'l' for lib
5463 * 'd' (apparently m88k for data)
5465 * But if the argument is not a quoted string, treat it as a
5466 * subsegment number.
5468 * FIXME: this is a copy of the section processing from obj-coff.c, with
5469 * additions/changes for the moto-pas assembler support. There are three
5472 * FIXME: I just noticed this. This doesn't work at all really. It it
5473 * setting bits that bfd probably neither understands or uses. The
5474 * correct approach (?) will have to incorporate extra fields attached
5475 * to the section to hold the system specific stuff. (krk)
5478 * 'a' - unknown - referred to in documentation, but no definition supplied
5479 * 'c' - section has code
5480 * 'd' - section has initialized data
5481 * 'u' - section has uninitialized data
5482 * 'i' - section contains directives (info)
5483 * 'n' - section can be discarded
5484 * 'R' - remove section at link time
5486 * Section Protection:
5487 * 'r' - section is readable
5488 * 'w' - section is writable
5489 * 'x' - section is executable
5490 * 's' - section is sharable
5492 * Section Alignment:
5493 * '0' - align to byte boundary
5494 * '1' - align to halfword boundary
5495 * '2' - align to word boundary
5496 * '3' - align to doubleword boundary
5497 * '4' - align to quadword boundary
5498 * '5' - align to 32 byte boundary
5499 * '6' - align to 64 byte boundary
5504 ppc_pe_section (int ignore ATTRIBUTE_UNUSED
)
5506 /* Strip out the section name. */
5515 c
= get_symbol_name (§ion_name
);
5517 name
= xstrdup (section_name
);
5519 *input_line_pointer
= c
;
5521 SKIP_WHITESPACE_AFTER_NAME ();
5524 flags
= SEC_NO_FLAGS
;
5526 if (strcmp (name
, ".idata$2") == 0)
5530 else if (strcmp (name
, ".idata$3") == 0)
5534 else if (strcmp (name
, ".idata$4") == 0)
5538 else if (strcmp (name
, ".idata$5") == 0)
5542 else if (strcmp (name
, ".idata$6") == 0)
5547 /* Default alignment to 16 byte boundary. */
5550 if (*input_line_pointer
== ',')
5552 ++input_line_pointer
;
5554 if (*input_line_pointer
!= '"')
5555 exp
= get_absolute_expression ();
5558 ++input_line_pointer
;
5559 while (*input_line_pointer
!= '"'
5560 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
5562 switch (*input_line_pointer
)
5564 /* Section Contents */
5565 case 'a': /* unknown */
5566 as_bad (_("unsupported section attribute -- 'a'"));
5568 case 'c': /* code section */
5571 case 'd': /* section has initialized data */
5574 case 'u': /* section has uninitialized data */
5575 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5579 case 'i': /* section contains directives (info) */
5580 /* FIXME: This is IMAGE_SCN_LNK_INFO
5582 flags
|= SEC_HAS_CONTENTS
;
5584 case 'n': /* section can be discarded */
5587 case 'R': /* Remove section at link time */
5588 flags
|= SEC_NEVER_LOAD
;
5590 #if IFLICT_BRAIN_DAMAGE
5591 /* Section Protection */
5592 case 'r': /* section is readable */
5593 flags
|= IMAGE_SCN_MEM_READ
;
5595 case 'w': /* section is writable */
5596 flags
|= IMAGE_SCN_MEM_WRITE
;
5598 case 'x': /* section is executable */
5599 flags
|= IMAGE_SCN_MEM_EXECUTE
;
5601 case 's': /* section is sharable */
5602 flags
|= IMAGE_SCN_MEM_SHARED
;
5605 /* Section Alignment */
5606 case '0': /* align to byte boundary */
5607 flags
|= IMAGE_SCN_ALIGN_1BYTES
;
5610 case '1': /* align to halfword boundary */
5611 flags
|= IMAGE_SCN_ALIGN_2BYTES
;
5614 case '2': /* align to word boundary */
5615 flags
|= IMAGE_SCN_ALIGN_4BYTES
;
5618 case '3': /* align to doubleword boundary */
5619 flags
|= IMAGE_SCN_ALIGN_8BYTES
;
5622 case '4': /* align to quadword boundary */
5623 flags
|= IMAGE_SCN_ALIGN_16BYTES
;
5626 case '5': /* align to 32 byte boundary */
5627 flags
|= IMAGE_SCN_ALIGN_32BYTES
;
5630 case '6': /* align to 64 byte boundary */
5631 flags
|= IMAGE_SCN_ALIGN_64BYTES
;
5636 as_bad (_("unknown section attribute '%c'"),
5637 *input_line_pointer
);
5640 ++input_line_pointer
;
5642 if (*input_line_pointer
== '"')
5643 ++input_line_pointer
;
5647 sec
= subseg_new (name
, (subsegT
) exp
);
5649 ppc_set_current_section (sec
);
5651 if (flags
!= SEC_NO_FLAGS
)
5653 if (! bfd_set_section_flags (stdoutput
, sec
, flags
))
5654 as_bad (_("error setting flags for \"%s\": %s"),
5655 bfd_section_name (stdoutput
, sec
),
5656 bfd_errmsg (bfd_get_error ()));
5659 bfd_set_section_alignment (stdoutput
, sec
, align
);
5663 ppc_pe_function (int ignore ATTRIBUTE_UNUSED
)
5669 endc
= get_symbol_name (&name
);
5671 ext_sym
= symbol_find_or_make (name
);
5673 (void) restore_line_pointer (endc
);
5675 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5676 SF_SET_FUNCTION (ext_sym
);
5677 SF_SET_PROCESS (ext_sym
);
5678 coff_add_linesym (ext_sym
);
5680 demand_empty_rest_of_line ();
5684 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED
)
5686 if (tocdata_section
== 0)
5688 tocdata_section
= subseg_new (".tocd", 0);
5689 /* FIXME: section flags won't work. */
5690 bfd_set_section_flags (stdoutput
, tocdata_section
,
5691 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5692 | SEC_READONLY
| SEC_DATA
));
5694 bfd_set_section_alignment (stdoutput
, tocdata_section
, 2);
5698 rdata_section
= subseg_new (".tocd", 0);
5701 ppc_set_current_section (tocdata_section
);
5703 demand_empty_rest_of_line ();
5706 /* Don't adjust TOC relocs to use the section symbol. */
5709 ppc_pe_fix_adjustable (fixS
*fix
)
5711 return fix
->fx_r_type
!= BFD_RELOC_PPC_TOC16
;
5718 /* XCOFF specific symbol and file handling. */
5720 /* Canonicalize the symbol name. We use the to force the suffix, if
5721 any, to use square brackets, and to be in upper case. */
5724 ppc_canonicalize_symbol_name (char *name
)
5728 if (ppc_stab_symbol
)
5731 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
5745 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
5748 if (*s
== '\0' || s
[1] != '\0')
5749 as_bad (_("bad symbol suffix"));
5757 /* Set the class of a symbol based on the suffix, if any. This is
5758 called whenever a new symbol is created. */
5761 ppc_symbol_new_hook (symbolS
*sym
)
5763 struct ppc_tc_sy
*tc
;
5766 tc
= symbol_get_tc (sym
);
5769 tc
->symbol_class
= -1;
5770 tc
->real_name
= NULL
;
5777 if (ppc_stab_symbol
)
5780 s
= strchr (S_GET_NAME (sym
), '[');
5781 if (s
== (const char *) NULL
)
5783 /* There is no suffix. */
5792 if (strcmp (s
, "BS]") == 0)
5793 tc
->symbol_class
= XMC_BS
;
5796 if (strcmp (s
, "DB]") == 0)
5797 tc
->symbol_class
= XMC_DB
;
5798 else if (strcmp (s
, "DS]") == 0)
5799 tc
->symbol_class
= XMC_DS
;
5802 if (strcmp (s
, "GL]") == 0)
5803 tc
->symbol_class
= XMC_GL
;
5806 if (strcmp (s
, "PR]") == 0)
5807 tc
->symbol_class
= XMC_PR
;
5810 if (strcmp (s
, "RO]") == 0)
5811 tc
->symbol_class
= XMC_RO
;
5812 else if (strcmp (s
, "RW]") == 0)
5813 tc
->symbol_class
= XMC_RW
;
5816 if (strcmp (s
, "SV]") == 0)
5817 tc
->symbol_class
= XMC_SV
;
5820 if (strcmp (s
, "TC]") == 0)
5821 tc
->symbol_class
= XMC_TC
;
5822 else if (strcmp (s
, "TI]") == 0)
5823 tc
->symbol_class
= XMC_TI
;
5824 else if (strcmp (s
, "TB]") == 0)
5825 tc
->symbol_class
= XMC_TB
;
5826 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
5827 tc
->symbol_class
= XMC_TC0
;
5830 if (strcmp (s
, "UA]") == 0)
5831 tc
->symbol_class
= XMC_UA
;
5832 else if (strcmp (s
, "UC]") == 0)
5833 tc
->symbol_class
= XMC_UC
;
5836 if (strcmp (s
, "XO]") == 0)
5837 tc
->symbol_class
= XMC_XO
;
5841 if (tc
->symbol_class
== -1)
5842 as_bad (_("unrecognized symbol suffix"));
5845 /* Set the class of a label based on where it is defined. This
5846 handles symbols without suffixes. Also, move the symbol so that it
5847 follows the csect symbol. */
5850 ppc_frob_label (symbolS
*sym
)
5852 if (ppc_current_csect
!= (symbolS
*) NULL
)
5854 if (symbol_get_tc (sym
)->symbol_class
== -1)
5855 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
5857 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5858 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
5859 &symbol_rootP
, &symbol_lastP
);
5860 symbol_get_tc (ppc_current_csect
)->within
= sym
;
5861 symbol_get_tc (sym
)->within
= ppc_current_csect
;
5865 dwarf2_emit_label (sym
);
5869 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5870 seen. It tells ppc_adjust_symtab whether it needs to look through
5873 static bfd_boolean ppc_saw_abs
;
5875 /* Change the name of a symbol just before writing it out. Set the
5876 real name if the .rename pseudo-op was used. Otherwise, remove any
5877 class suffix. Return 1 if the symbol should not be included in the
5881 ppc_frob_symbol (symbolS
*sym
)
5883 static symbolS
*ppc_last_function
;
5884 static symbolS
*set_end
;
5886 /* Discard symbols that should not be included in the output symbol
5888 if (! symbol_used_in_reloc_p (sym
)
5889 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
5890 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
5891 && ! symbol_get_tc (sym
)->output
5892 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
5895 /* This one will disappear anyway. Don't make a csect sym for it. */
5896 if (sym
== abs_section_sym
)
5899 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
5900 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
5906 name
= S_GET_NAME (sym
);
5907 s
= strchr (name
, '[');
5908 if (s
!= (char *) NULL
)
5914 snew
= xstrndup (name
, len
);
5916 S_SET_NAME (sym
, snew
);
5920 if (set_end
!= (symbolS
*) NULL
)
5922 SA_SET_SYM_ENDNDX (set_end
, sym
);
5926 if (SF_GET_FUNCTION (sym
))
5928 if (ppc_last_function
!= (symbolS
*) NULL
)
5929 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5930 ppc_last_function
= sym
;
5931 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
5933 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
5934 SA_SET_SYM_FSIZE (sym
,
5935 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
5938 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
5939 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
5941 if (ppc_last_function
== (symbolS
*) NULL
)
5942 as_bad (_(".ef with no preceding .function"));
5945 set_end
= ppc_last_function
;
5946 ppc_last_function
= NULL
;
5948 /* We don't have a C_EFCN symbol, but we need to force the
5949 COFF backend to believe that it has seen one. */
5950 coff_last_function
= NULL
;
5954 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
5955 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
5956 && S_GET_STORAGE_CLASS (sym
) != C_FILE
5957 && S_GET_STORAGE_CLASS (sym
) != C_FCN
5958 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
5959 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
5960 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
5961 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
5962 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
5963 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
5964 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
5966 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
5967 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
5968 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
5971 union internal_auxent
*a
;
5973 /* Create a csect aux. */
5974 i
= S_GET_NUMBER_AUXILIARY (sym
);
5975 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
5976 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
5977 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
5979 /* This is the TOC table. */
5980 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
5981 a
->x_csect
.x_scnlen
.l
= 0;
5982 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
5984 else if (symbol_get_tc (sym
)->subseg
!= 0)
5986 /* This is a csect symbol. x_scnlen is the size of the
5988 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
5989 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
5990 S_GET_SEGMENT (sym
))
5991 - S_GET_VALUE (sym
));
5994 resolve_symbol_value (symbol_get_tc (sym
)->next
);
5995 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
5996 - S_GET_VALUE (sym
));
5998 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
6000 else if (S_GET_SEGMENT (sym
) == bss_section
)
6002 /* This is a common symbol. */
6003 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
6004 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6005 if (S_IS_EXTERNAL (sym
))
6006 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
6008 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
6010 else if (S_GET_SEGMENT (sym
) == absolute_section
)
6012 /* This is an absolute symbol. The csect will be created by
6013 ppc_adjust_symtab. */
6015 a
->x_csect
.x_smtyp
= XTY_LD
;
6016 if (symbol_get_tc (sym
)->symbol_class
== -1)
6017 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6019 else if (! S_IS_DEFINED (sym
))
6021 /* This is an external symbol. */
6022 a
->x_csect
.x_scnlen
.l
= 0;
6023 a
->x_csect
.x_smtyp
= XTY_ER
;
6025 else if (symbol_get_tc (sym
)->symbol_class
== XMC_TC
)
6029 /* This is a TOC definition. x_scnlen is the size of the
6031 next
= symbol_next (sym
);
6032 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6033 next
= symbol_next (next
);
6034 if (next
== (symbolS
*) NULL
6035 || symbol_get_tc (next
)->symbol_class
!= XMC_TC
)
6037 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6038 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6040 - S_GET_VALUE (sym
));
6042 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6043 - S_GET_VALUE (sym
));
6047 resolve_symbol_value (next
);
6048 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6049 - S_GET_VALUE (sym
));
6051 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6057 /* This is a normal symbol definition. x_scnlen is the
6058 symbol index of the containing csect. */
6059 if (S_GET_SEGMENT (sym
) == text_section
)
6060 csect
= ppc_text_csects
;
6061 else if (S_GET_SEGMENT (sym
) == data_section
)
6062 csect
= ppc_data_csects
;
6066 /* Skip the initial dummy symbol. */
6067 csect
= symbol_get_tc (csect
)->next
;
6069 if (csect
== (symbolS
*) NULL
)
6071 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6072 a
->x_csect
.x_scnlen
.l
= 0;
6076 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6078 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6079 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6080 > S_GET_VALUE (sym
))
6082 csect
= symbol_get_tc (csect
)->next
;
6085 a
->x_csect
.x_scnlen
.p
=
6086 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6087 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6090 a
->x_csect
.x_smtyp
= XTY_LD
;
6093 a
->x_csect
.x_parmhash
= 0;
6094 a
->x_csect
.x_snhash
= 0;
6095 if (symbol_get_tc (sym
)->symbol_class
== -1)
6096 a
->x_csect
.x_smclas
= XMC_PR
;
6098 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6099 a
->x_csect
.x_stab
= 0;
6100 a
->x_csect
.x_snstab
= 0;
6102 /* Don't let the COFF backend resort these symbols. */
6103 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6105 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6107 /* We want the value to be the symbol index of the referenced
6108 csect symbol. BFD will do that for us if we set the right
6110 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6111 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6113 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6114 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6116 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6121 block
= symbol_get_tc (sym
)->within
;
6124 /* The value is the offset from the enclosing csect. */
6127 csect
= symbol_get_tc (block
)->within
;
6128 resolve_symbol_value (csect
);
6129 base
= S_GET_VALUE (csect
);
6134 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6136 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6137 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6139 /* We want the value to be a file offset into the line numbers.
6140 BFD will do that for us if we set the right flags. We have
6141 already set the value correctly. */
6142 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6148 /* Adjust the symbol table. This creates csect symbols for all
6149 absolute symbols. */
6152 ppc_adjust_symtab (void)
6159 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6163 union internal_auxent
*a
;
6165 if (S_GET_SEGMENT (sym
) != absolute_section
)
6168 csect
= symbol_create (".abs[XO]", absolute_section
,
6169 S_GET_VALUE (sym
), &zero_address_frag
);
6170 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6171 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6172 i
= S_GET_NUMBER_AUXILIARY (csect
);
6173 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6174 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6175 a
->x_csect
.x_scnlen
.l
= 0;
6176 a
->x_csect
.x_smtyp
= XTY_SD
;
6177 a
->x_csect
.x_parmhash
= 0;
6178 a
->x_csect
.x_snhash
= 0;
6179 a
->x_csect
.x_smclas
= XMC_XO
;
6180 a
->x_csect
.x_stab
= 0;
6181 a
->x_csect
.x_snstab
= 0;
6183 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6185 i
= S_GET_NUMBER_AUXILIARY (sym
);
6186 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6187 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6188 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6191 ppc_saw_abs
= FALSE
;
6194 /* Set the VMA for a section. This is called on all the sections in
6198 ppc_frob_section (asection
*sec
)
6200 static bfd_vma vma
= 0;
6202 /* Dwarf sections start at 0. */
6203 if (bfd_get_section_flags (NULL
, sec
) & SEC_DEBUGGING
)
6206 vma
= md_section_align (sec
, vma
);
6207 bfd_set_section_vma (stdoutput
, sec
, vma
);
6208 vma
+= bfd_section_size (stdoutput
, sec
);
6211 #endif /* OBJ_XCOFF */
6214 md_atof (int type
, char *litp
, int *sizep
)
6216 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6219 /* Write a value out to the object file, using the appropriate
6223 md_number_to_chars (char *buf
, valueT val
, int n
)
6225 if (target_big_endian
)
6226 number_to_chars_bigendian (buf
, val
, n
);
6228 number_to_chars_littleendian (buf
, val
, n
);
6231 /* Align a section (I don't know why this is machine dependent). */
6234 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6239 int align
= bfd_get_section_alignment (stdoutput
, seg
);
6241 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6245 /* We don't have any form of relaxing. */
6248 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6249 asection
*seg ATTRIBUTE_UNUSED
)
6255 /* Convert a machine dependent frag. We never generate these. */
6258 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6259 asection
*sec ATTRIBUTE_UNUSED
,
6260 fragS
*fragp ATTRIBUTE_UNUSED
)
6265 /* We have no need to default values of symbols. */
6268 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6273 /* Functions concerning relocs. */
6275 /* The location from which a PC relative jump should be calculated,
6276 given a PC relative reloc. */
6279 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6281 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6286 /* This is called to see whether a fixup should be adjusted to use a
6287 section symbol. We take the opportunity to change a fixup against
6288 a symbol in the TOC subsegment into a reloc against the
6289 corresponding .tc symbol. */
6292 ppc_fix_adjustable (fixS
*fix
)
6294 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6295 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6296 TC_SYMFIELD_TYPE
*tc
;
6298 if (symseg
== absolute_section
)
6301 /* Always adjust symbols in debugging sections. */
6302 if (bfd_get_section_flags (stdoutput
, symseg
) & SEC_DEBUGGING
)
6305 if (ppc_toc_csect
!= (symbolS
*) NULL
6306 && fix
->fx_addsy
!= ppc_toc_csect
6307 && symseg
== data_section
6308 && val
>= ppc_toc_frag
->fr_address
6309 && (ppc_after_toc_frag
== (fragS
*) NULL
6310 || val
< ppc_after_toc_frag
->fr_address
))
6314 for (sy
= symbol_next (ppc_toc_csect
);
6315 sy
!= (symbolS
*) NULL
;
6316 sy
= symbol_next (sy
))
6318 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6320 if (sy_tc
->symbol_class
== XMC_TC0
)
6322 if (sy_tc
->symbol_class
!= XMC_TC
)
6324 if (val
== resolve_symbol_value (sy
))
6327 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6332 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6333 _("symbol in .toc does not match any .tc"));
6336 /* Possibly adjust the reloc to be against the csect. */
6337 tc
= symbol_get_tc (fix
->fx_addsy
);
6339 && tc
->symbol_class
!= XMC_TC0
6340 && tc
->symbol_class
!= XMC_TC
6341 && symseg
!= bss_section
6342 /* Don't adjust if this is a reloc in the toc section. */
6343 && (symseg
!= data_section
6344 || ppc_toc_csect
== NULL
6345 || val
< ppc_toc_frag
->fr_address
6346 || (ppc_after_toc_frag
!= NULL
6347 && val
>= ppc_after_toc_frag
->fr_address
)))
6349 symbolS
*csect
= tc
->within
;
6351 /* If the symbol was not declared by a label (eg: a section symbol),
6352 use the section instead of the csect. This doesn't happen in
6353 normal AIX assembly code. */
6355 csect
= seg_info (symseg
)->sym
;
6357 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6358 fix
->fx_addsy
= csect
;
6363 /* Adjust a reloc against a .lcomm symbol to be against the base
6365 if (symseg
== bss_section
6366 && ! S_IS_EXTERNAL (fix
->fx_addsy
))
6368 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6370 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6377 /* A reloc from one csect to another must be kept. The assembler
6378 will, of course, keep relocs between sections, and it will keep
6379 absolute relocs, but we need to force it to keep PC relative relocs
6380 between two csects in the same section. */
6383 ppc_force_relocation (fixS
*fix
)
6385 /* At this point fix->fx_addsy should already have been converted to
6386 a csect symbol. If the csect does not include the fragment, then
6387 we need to force the relocation. */
6389 && fix
->fx_addsy
!= NULL
6390 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6391 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6392 > fix
->fx_frag
->fr_address
)
6393 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6394 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6395 <= fix
->fx_frag
->fr_address
))))
6398 return generic_force_reloc (fix
);
6402 ppc_new_dot_label (symbolS
*sym
)
6404 /* Anchor this label to the current csect for relocations. */
6405 symbol_get_tc (sym
)->within
= ppc_current_csect
;
6408 #endif /* OBJ_XCOFF */
6411 /* If this function returns non-zero, it guarantees that a relocation
6412 will be emitted for a fixup. */
6415 ppc_force_relocation (fixS
*fix
)
6417 /* Branch prediction relocations must force a relocation, as must
6418 the vtable description relocs. */
6419 switch (fix
->fx_r_type
)
6421 case BFD_RELOC_PPC_B16_BRTAKEN
:
6422 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6423 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6424 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6425 case BFD_RELOC_24_PLT_PCREL
:
6426 case BFD_RELOC_PPC64_TOC
:
6428 case BFD_RELOC_PPC_B26
:
6429 case BFD_RELOC_PPC_BA26
:
6430 case BFD_RELOC_PPC_B16
:
6431 case BFD_RELOC_PPC_BA16
:
6432 /* All branch fixups targeting a localentry symbol must
6433 force a relocation. */
6436 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6437 elf_symbol_type
*elfsym
6438 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6439 gas_assert (elfsym
);
6440 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6448 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6449 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
)
6452 return generic_force_reloc (fix
);
6456 ppc_fix_adjustable (fixS
*fix
)
6458 switch (fix
->fx_r_type
)
6460 /* All branch fixups targeting a localentry symbol must
6461 continue using the symbol. */
6462 case BFD_RELOC_PPC_B26
:
6463 case BFD_RELOC_PPC_BA26
:
6464 case BFD_RELOC_PPC_B16
:
6465 case BFD_RELOC_PPC_BA16
:
6466 case BFD_RELOC_PPC_B16_BRTAKEN
:
6467 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6468 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6469 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6472 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6473 elf_symbol_type
*elfsym
6474 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6475 gas_assert (elfsym
);
6476 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6484 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
6485 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
6486 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
6487 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
6488 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
6489 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
6490 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
6491 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
6492 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
6493 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6494 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
));
6499 ppc_frag_check (struct frag
*fragP
)
6501 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
6502 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6503 _("instruction address is not a multiple of %d"),
6504 fragP
->insn_addr
+ 1);
6507 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6508 rs_align_code frag. */
6511 ppc_handle_align (struct frag
*fragP
)
6513 valueT count
= (fragP
->fr_next
->fr_address
6514 - (fragP
->fr_address
+ fragP
->fr_fix
));
6516 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && count
!= 0 && (count
& 1) == 0)
6518 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6521 md_number_to_chars (dest
, 0x4400, 2);
6523 else if (count
!= 0 && (count
& 3) == 0)
6525 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6529 if (count
> 4 * nop_limit
&& count
< 0x2000000)
6533 /* Make a branch, then follow with nops. Insert another
6534 frag to handle the nops. */
6535 md_number_to_chars (dest
, 0x48000000 + count
, 4);
6540 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6541 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
6542 fragP
->fr_next
= rest
;
6544 rest
->fr_address
+= rest
->fr_fix
+ 4;
6546 /* If we leave the next frag as rs_align_code we'll come here
6547 again, resulting in a bunch of branches rather than a
6548 branch followed by nops. */
6549 rest
->fr_type
= rs_align
;
6550 dest
= rest
->fr_literal
;
6553 md_number_to_chars (dest
, 0x60000000, 4);
6555 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0
6556 && (ppc_cpu
& PPC_OPCODE_POWER9
) == 0)
6558 /* For power6, power7, and power8, we want the last nop to
6559 be a group terminating one. Do this by inserting an
6560 rs_fill frag immediately after this one, with its address
6561 set to the last nop location. This will automatically
6562 reduce the number of nops in the current frag by one. */
6565 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6567 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
6568 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
6569 group_nop
->fr_fix
= 0;
6570 group_nop
->fr_offset
= 1;
6571 group_nop
->fr_type
= rs_fill
;
6572 fragP
->fr_next
= group_nop
;
6573 dest
= group_nop
->fr_literal
;
6576 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
6578 if (ppc_cpu
& PPC_OPCODE_E500MC
)
6579 /* e500mc group terminating nop: "ori 0,0,0". */
6580 md_number_to_chars (dest
, 0x60000000, 4);
6582 /* power7/power8 group terminating nop: "ori 2,2,0". */
6583 md_number_to_chars (dest
, 0x60420000, 4);
6586 /* power6 group terminating nop: "ori 1,1,0". */
6587 md_number_to_chars (dest
, 0x60210000, 4);
6592 /* Apply a fixup to the object code. This is called for all the
6593 fixups we generated by the calls to fix_new_exp, above. */
6596 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
6598 valueT value
= * valP
;
6600 const struct powerpc_operand
*operand
;
6603 if (fixP
->fx_addsy
!= NULL
)
6605 /* Hack around bfd_install_relocation brain damage. */
6607 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
6609 if (fixP
->fx_addsy
== abs_section_sym
)
6615 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6616 the symbol values. If we are doing this relocation the code in
6617 write.c is going to call bfd_install_relocation, which is also
6618 going to use the symbol value. That means that if the reloc is
6619 fully resolved we want to use *valP since bfd_install_relocation is
6621 However, if the reloc is not fully resolved we do not want to
6622 use *valP, and must use fx_offset instead. If the relocation
6623 is PC-relative, we then need to re-apply md_pcrel_from_section
6624 to this new relocation value. */
6625 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
6630 value
= fixP
->fx_offset
;
6632 value
-= md_pcrel_from_section (fixP
, seg
);
6636 /* We are only able to convert some relocs to pc-relative. */
6639 switch (fixP
->fx_r_type
)
6641 case BFD_RELOC_LO16
:
6642 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
6645 case BFD_RELOC_HI16
:
6646 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
6649 case BFD_RELOC_HI16_S
:
6650 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
6654 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
6658 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
6662 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
6665 case BFD_RELOC_PPC_16DX_HA
:
6666 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6673 else if (!fixP
->fx_done
6674 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
6676 /* addpcis is relative to next insn address. */
6678 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6683 if (fixP
->fx_pcrel_adjust
!= 0)
6685 /* This is a fixup on an instruction. */
6686 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
6688 operand
= &powerpc_operands
[opindex
];
6690 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6691 does not generate a reloc. It uses the offset of `sym' within its
6692 csect. Other usages, such as `.long sym', generate relocs. This
6693 is the documented behaviour of non-TOC symbols. */
6694 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
6695 && (operand
->bitm
& 0xfff0) == 0xfff0
6696 && operand
->shift
== 0
6697 && (operand
->insert
== NULL
|| ppc_obj64
)
6698 && fixP
->fx_addsy
!= NULL
6699 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
6700 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
6701 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC0
6702 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
6704 value
= fixP
->fx_offset
;
6708 /* During parsing of instructions, a TOC16 reloc is generated for
6709 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6710 in the toc. But at parse time, SYM may be not yet defined, so
6711 check again here. */
6712 if (fixP
->fx_r_type
== BFD_RELOC_16
6713 && fixP
->fx_addsy
!= NULL
6714 && ppc_is_toc_sym (fixP
->fx_addsy
))
6715 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
6719 /* Calculate value to be stored in field. */
6721 switch (fixP
->fx_r_type
)
6724 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
6725 case BFD_RELOC_PPC_VLE_LO16A
:
6726 case BFD_RELOC_PPC_VLE_LO16D
:
6728 case BFD_RELOC_LO16
:
6729 case BFD_RELOC_LO16_PCREL
:
6730 fieldval
= value
& 0xffff;
6732 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6733 fieldval
= SEX16 (fieldval
);
6734 fixP
->fx_no_overflow
= 1;
6737 case BFD_RELOC_HI16
:
6738 case BFD_RELOC_HI16_PCREL
:
6740 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6742 fieldval
= value
>> 16;
6743 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6745 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6746 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
6752 case BFD_RELOC_PPC_VLE_HI16A
:
6753 case BFD_RELOC_PPC_VLE_HI16D
:
6754 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6756 fieldval
= PPC_HI (value
);
6757 goto sign_extend_16
;
6759 case BFD_RELOC_HI16_S
:
6760 case BFD_RELOC_HI16_S_PCREL
:
6761 case BFD_RELOC_PPC_16DX_HA
:
6762 case BFD_RELOC_PPC_REL16DX_HA
:
6764 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6766 fieldval
= (value
+ 0x8000) >> 16;
6767 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6769 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6770 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
6776 case BFD_RELOC_PPC_VLE_HA16A
:
6777 case BFD_RELOC_PPC_VLE_HA16D
:
6778 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6780 fieldval
= PPC_HA (value
);
6781 goto sign_extend_16
;
6784 case BFD_RELOC_PPC64_HIGHER
:
6785 fieldval
= PPC_HIGHER (value
);
6786 goto sign_extend_16
;
6788 case BFD_RELOC_PPC64_HIGHER_S
:
6789 fieldval
= PPC_HIGHERA (value
);
6790 goto sign_extend_16
;
6792 case BFD_RELOC_PPC64_HIGHEST
:
6793 fieldval
= PPC_HIGHEST (value
);
6794 goto sign_extend_16
;
6796 case BFD_RELOC_PPC64_HIGHEST_S
:
6797 fieldval
= PPC_HIGHESTA (value
);
6798 goto sign_extend_16
;
6805 if (operand
!= NULL
)
6807 /* Handle relocs in an insn. */
6808 switch (fixP
->fx_r_type
)
6811 /* The following relocs can't be calculated by the assembler.
6812 Leave the field zero. */
6813 case BFD_RELOC_PPC_TPREL16
:
6814 case BFD_RELOC_PPC_TPREL16_LO
:
6815 case BFD_RELOC_PPC_TPREL16_HI
:
6816 case BFD_RELOC_PPC_TPREL16_HA
:
6817 case BFD_RELOC_PPC_DTPREL16
:
6818 case BFD_RELOC_PPC_DTPREL16_LO
:
6819 case BFD_RELOC_PPC_DTPREL16_HI
:
6820 case BFD_RELOC_PPC_DTPREL16_HA
:
6821 case BFD_RELOC_PPC_GOT_TLSGD16
:
6822 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
6823 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
6824 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
6825 case BFD_RELOC_PPC_GOT_TLSLD16
:
6826 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
6827 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
6828 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
6829 case BFD_RELOC_PPC_GOT_TPREL16
:
6830 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
6831 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
6832 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
6833 case BFD_RELOC_PPC_GOT_DTPREL16
:
6834 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
6835 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
6836 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
6837 case BFD_RELOC_PPC64_TPREL16_DS
:
6838 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
6839 case BFD_RELOC_PPC64_TPREL16_HIGH
:
6840 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
6841 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
6842 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
6843 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
6844 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
6845 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
6846 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
6847 case BFD_RELOC_PPC64_DTPREL16_DS
:
6848 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
6849 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
6850 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
6851 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
6852 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
6853 gas_assert (fixP
->fx_addsy
!= NULL
);
6854 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
6858 /* These also should leave the field zero for the same
6859 reason. Note that older versions of gas wrote values
6860 here. If we want to go back to the old behaviour, then
6861 all _LO and _LO_DS cases will need to be treated like
6862 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6863 case BFD_RELOC_16_GOTOFF
:
6864 case BFD_RELOC_LO16_GOTOFF
:
6865 case BFD_RELOC_HI16_GOTOFF
:
6866 case BFD_RELOC_HI16_S_GOTOFF
:
6867 case BFD_RELOC_LO16_PLTOFF
:
6868 case BFD_RELOC_HI16_PLTOFF
:
6869 case BFD_RELOC_HI16_S_PLTOFF
:
6870 case BFD_RELOC_GPREL16
:
6871 case BFD_RELOC_16_BASEREL
:
6872 case BFD_RELOC_LO16_BASEREL
:
6873 case BFD_RELOC_HI16_BASEREL
:
6874 case BFD_RELOC_HI16_S_BASEREL
:
6875 case BFD_RELOC_PPC_TOC16
:
6876 case BFD_RELOC_PPC64_TOC16_LO
:
6877 case BFD_RELOC_PPC64_TOC16_HI
:
6878 case BFD_RELOC_PPC64_TOC16_HA
:
6879 case BFD_RELOC_PPC64_PLTGOT16
:
6880 case BFD_RELOC_PPC64_PLTGOT16_LO
:
6881 case BFD_RELOC_PPC64_PLTGOT16_HI
:
6882 case BFD_RELOC_PPC64_PLTGOT16_HA
:
6883 case BFD_RELOC_PPC64_GOT16_DS
:
6884 case BFD_RELOC_PPC64_GOT16_LO_DS
:
6885 case BFD_RELOC_PPC64_PLT16_LO_DS
:
6886 case BFD_RELOC_PPC64_SECTOFF_DS
:
6887 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
6888 case BFD_RELOC_PPC64_TOC16_DS
:
6889 case BFD_RELOC_PPC64_TOC16_LO_DS
:
6890 case BFD_RELOC_PPC64_PLTGOT16_DS
:
6891 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
6892 case BFD_RELOC_PPC_EMB_NADDR16
:
6893 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
6894 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
6895 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
6896 case BFD_RELOC_PPC_EMB_SDAI16
:
6897 case BFD_RELOC_PPC_EMB_SDA2I16
:
6898 case BFD_RELOC_PPC_EMB_SDA2REL
:
6899 case BFD_RELOC_PPC_EMB_SDA21
:
6900 case BFD_RELOC_PPC_EMB_MRKREF
:
6901 case BFD_RELOC_PPC_EMB_RELSEC16
:
6902 case BFD_RELOC_PPC_EMB_RELST_LO
:
6903 case BFD_RELOC_PPC_EMB_RELST_HI
:
6904 case BFD_RELOC_PPC_EMB_RELST_HA
:
6905 case BFD_RELOC_PPC_EMB_BIT_FLD
:
6906 case BFD_RELOC_PPC_EMB_RELSDA
:
6907 case BFD_RELOC_PPC_VLE_SDA21
:
6908 case BFD_RELOC_PPC_VLE_SDA21_LO
:
6909 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
6910 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
6911 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
6912 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
6913 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
6914 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
6915 gas_assert (fixP
->fx_addsy
!= NULL
);
6918 case BFD_RELOC_PPC_TLS
:
6919 case BFD_RELOC_PPC_TLSGD
:
6920 case BFD_RELOC_PPC_TLSLD
:
6926 case BFD_RELOC_PPC_B16
:
6927 /* Adjust the offset to the instruction boundary. */
6932 case BFD_RELOC_VTABLE_INHERIT
:
6933 case BFD_RELOC_VTABLE_ENTRY
:
6934 case BFD_RELOC_PPC_DTPMOD
:
6935 case BFD_RELOC_PPC_TPREL
:
6936 case BFD_RELOC_PPC_DTPREL
:
6937 case BFD_RELOC_PPC_COPY
:
6938 case BFD_RELOC_PPC_GLOB_DAT
:
6939 case BFD_RELOC_32_PLT_PCREL
:
6940 case BFD_RELOC_PPC_EMB_NADDR32
:
6941 case BFD_RELOC_PPC64_TOC
:
6942 case BFD_RELOC_CTOR
:
6944 case BFD_RELOC_32_PCREL
:
6947 case BFD_RELOC_64_PCREL
:
6948 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
6949 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
6950 _("%s unsupported as instruction fixup"),
6951 bfd_get_reloc_code_name (fixP
->fx_r_type
));
6960 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6961 contents can stay at zero. */
6962 #define APPLY_RELOC fixP->fx_done
6964 #define APPLY_RELOC 1
6966 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
6969 unsigned char *where
;
6971 /* Fetch the instruction, insert the fully resolved operand
6972 value, and stuff the instruction back again. */
6973 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
6974 if (target_big_endian
)
6976 if (fixP
->fx_size
== 4)
6977 insn
= bfd_getb32 (where
);
6979 insn
= bfd_getb16 (where
);
6983 if (fixP
->fx_size
== 4)
6984 insn
= bfd_getl32 (where
);
6986 insn
= bfd_getl16 (where
);
6988 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
6989 fixP
->tc_fix_data
.ppc_cpu
,
6990 fixP
->fx_file
, fixP
->fx_line
);
6991 if (target_big_endian
)
6993 if (fixP
->fx_size
== 4)
6994 bfd_putb32 (insn
, where
);
6996 bfd_putb16 (insn
, where
);
7000 if (fixP
->fx_size
== 4)
7001 bfd_putl32 (insn
, where
);
7003 bfd_putl16 (insn
, where
);
7008 /* Nothing else to do here. */
7011 gas_assert (fixP
->fx_addsy
!= NULL
);
7012 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7017 /* Use expr_symbol_where to see if this is an expression
7019 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7020 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7021 _("unresolved expression that must be resolved"));
7023 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7024 _("unsupported relocation against %s"),
7025 S_GET_NAME (fixP
->fx_addsy
));
7032 /* Handle relocs in data. */
7033 switch (fixP
->fx_r_type
)
7035 case BFD_RELOC_VTABLE_INHERIT
:
7037 && !S_IS_DEFINED (fixP
->fx_addsy
)
7038 && !S_IS_WEAK (fixP
->fx_addsy
))
7039 S_SET_WEAK (fixP
->fx_addsy
);
7042 case BFD_RELOC_VTABLE_ENTRY
:
7047 /* These can appear with @l etc. in data. */
7048 case BFD_RELOC_LO16
:
7049 case BFD_RELOC_LO16_PCREL
:
7050 case BFD_RELOC_HI16
:
7051 case BFD_RELOC_HI16_PCREL
:
7052 case BFD_RELOC_HI16_S
:
7053 case BFD_RELOC_HI16_S_PCREL
:
7054 case BFD_RELOC_PPC64_HIGHER
:
7055 case BFD_RELOC_PPC64_HIGHER_S
:
7056 case BFD_RELOC_PPC64_HIGHEST
:
7057 case BFD_RELOC_PPC64_HIGHEST_S
:
7058 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7059 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7060 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7063 case BFD_RELOC_PPC_DTPMOD
:
7064 case BFD_RELOC_PPC_TPREL
:
7065 case BFD_RELOC_PPC_DTPREL
:
7066 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7069 /* Just punt all of these to the linker. */
7070 case BFD_RELOC_PPC_B16_BRTAKEN
:
7071 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7072 case BFD_RELOC_16_GOTOFF
:
7073 case BFD_RELOC_LO16_GOTOFF
:
7074 case BFD_RELOC_HI16_GOTOFF
:
7075 case BFD_RELOC_HI16_S_GOTOFF
:
7076 case BFD_RELOC_LO16_PLTOFF
:
7077 case BFD_RELOC_HI16_PLTOFF
:
7078 case BFD_RELOC_HI16_S_PLTOFF
:
7079 case BFD_RELOC_PPC_COPY
:
7080 case BFD_RELOC_PPC_GLOB_DAT
:
7081 case BFD_RELOC_16_BASEREL
:
7082 case BFD_RELOC_LO16_BASEREL
:
7083 case BFD_RELOC_HI16_BASEREL
:
7084 case BFD_RELOC_HI16_S_BASEREL
:
7085 case BFD_RELOC_PPC_TLS
:
7086 case BFD_RELOC_PPC_DTPREL16_LO
:
7087 case BFD_RELOC_PPC_DTPREL16_HI
:
7088 case BFD_RELOC_PPC_DTPREL16_HA
:
7089 case BFD_RELOC_PPC_TPREL16_LO
:
7090 case BFD_RELOC_PPC_TPREL16_HI
:
7091 case BFD_RELOC_PPC_TPREL16_HA
:
7092 case BFD_RELOC_PPC_GOT_TLSGD16
:
7093 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7094 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7095 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7096 case BFD_RELOC_PPC_GOT_TLSLD16
:
7097 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7098 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7099 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7100 case BFD_RELOC_PPC_GOT_DTPREL16
:
7101 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7102 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7103 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7104 case BFD_RELOC_PPC_GOT_TPREL16
:
7105 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7106 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7107 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7108 case BFD_RELOC_24_PLT_PCREL
:
7109 case BFD_RELOC_PPC_LOCAL24PC
:
7110 case BFD_RELOC_32_PLT_PCREL
:
7111 case BFD_RELOC_GPREL16
:
7112 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7113 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7114 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7115 case BFD_RELOC_PPC_EMB_NADDR32
:
7116 case BFD_RELOC_PPC_EMB_NADDR16
:
7117 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7118 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7119 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7120 case BFD_RELOC_PPC_EMB_SDAI16
:
7121 case BFD_RELOC_PPC_EMB_SDA2REL
:
7122 case BFD_RELOC_PPC_EMB_SDA2I16
:
7123 case BFD_RELOC_PPC_EMB_SDA21
:
7124 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7125 case BFD_RELOC_PPC_EMB_MRKREF
:
7126 case BFD_RELOC_PPC_EMB_RELSEC16
:
7127 case BFD_RELOC_PPC_EMB_RELST_LO
:
7128 case BFD_RELOC_PPC_EMB_RELST_HI
:
7129 case BFD_RELOC_PPC_EMB_RELST_HA
:
7130 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7131 case BFD_RELOC_PPC_EMB_RELSDA
:
7132 case BFD_RELOC_PPC64_TOC
:
7133 case BFD_RELOC_PPC_TOC16
:
7134 case BFD_RELOC_PPC64_TOC16_LO
:
7135 case BFD_RELOC_PPC64_TOC16_HI
:
7136 case BFD_RELOC_PPC64_TOC16_HA
:
7137 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7138 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7139 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7140 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7141 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7142 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7143 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7144 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7145 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7146 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7147 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7148 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7154 case BFD_RELOC_NONE
:
7156 case BFD_RELOC_CTOR
:
7158 case BFD_RELOC_32_PCREL
:
7161 case BFD_RELOC_64_PCREL
:
7163 case BFD_RELOC_16_PCREL
:
7169 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7174 if (fixP
->fx_size
&& APPLY_RELOC
)
7175 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7176 fieldval
, fixP
->fx_size
);
7178 && (seg
->flags
& SEC_CODE
) != 0
7179 && fixP
->fx_size
== 4
7182 && (fixP
->fx_r_type
== BFD_RELOC_32
7183 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7184 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7185 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7186 _("data in executable section"));
7190 ppc_elf_validate_fix (fixP
, seg
);
7191 fixP
->fx_addnumber
= value
;
7193 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7194 from the section contents. If we are going to be emitting a reloc
7195 then the section contents are immaterial, so don't warn if they
7196 happen to overflow. Leave such warnings to ld. */
7199 fixP
->fx_no_overflow
= 1;
7201 /* Arrange to emit .TOC. as a normal symbol if used in anything
7202 but .TOC.@tocbase. */
7204 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7205 && fixP
->fx_addsy
!= NULL
7206 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7207 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7210 if (fixP
->fx_r_type
!= BFD_RELOC_PPC_TOC16
)
7211 fixP
->fx_addnumber
= 0;
7215 fixP
->fx_addnumber
= 0;
7217 /* We want to use the offset within the toc, not the actual VMA
7219 fixP
->fx_addnumber
=
7220 - bfd_get_section_vma (stdoutput
, S_GET_SEGMENT (fixP
->fx_addsy
))
7221 - S_GET_VALUE (ppc_toc_csect
);
7222 /* Set *valP to avoid errors. */
7229 /* Generate a reloc for a fixup. */
7232 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7236 reloc
= XNEW (arelent
);
7238 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7239 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7240 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7241 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7242 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7244 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7245 _("reloc %d not supported by object file format"),
7246 (int) fixp
->fx_r_type
);
7249 reloc
->addend
= fixp
->fx_addnumber
;
7255 ppc_cfi_frame_initial_instructions (void)
7257 cfi_add_CFA_def_cfa (1, 0);
7261 tc_ppc_regname_to_dw2regnum (char *regname
)
7263 unsigned int regnum
= -1;
7267 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7269 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7270 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7271 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7272 { "spe_acc", 111 }, { "spefscr", 112 }
7275 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7276 if (strcmp (regnames
[i
].name
, regname
) == 0)
7277 return regnames
[i
].dw2regnum
;
7279 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7281 p
= regname
+ 1 + (regname
[1] == '.');
7282 regnum
= strtoul (p
, &q
, 10);
7283 if (p
== q
|| *q
|| regnum
>= 32)
7285 if (regname
[0] == 'f')
7287 else if (regname
[0] == 'v')
7290 else if (regname
[0] == 'c' && regname
[1] == 'r')
7292 p
= regname
+ 2 + (regname
[2] == '.');
7293 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7295 regnum
= p
[0] - '0' + 68;