1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2018 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian
;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian
= 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p
= TARGET_REG_NAMES_P
;
96 static void ppc_macro (char *, const struct powerpc_macro
*);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS
*, offsetT
);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
153 /* Generic assembler global variables which must be defined by all
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars
[] = "#!";
162 static const char ppc_eabi_comment_chars
[] = "#";
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
167 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
170 const char comment_chars
[] = "#";
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars
[] = "#";
176 /* Characters which may be used to separate multiple commands on a
178 const char line_separator_chars
[] = ";";
180 /* Characters which are used to indicate an exponent in a floating
182 const char EXP_CHARS
[] = "eE";
184 /* Characters which mean that a number is a floating point constant,
186 const char FLT_CHARS
[] = "dD";
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars
[] = "%[";
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment
;
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length
;
198 /* More than this number of nops in an alignment op gets a branch
200 unsigned long nop_limit
= 4;
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu
= 0;
205 ppc_cpu_t sticky
= 0;
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion
= 0;
211 /* Flags set on encountering toc relocs. */
213 has_large_toc_reloc
= 1,
214 has_small_toc_reloc
= 2
218 /* Warn on emitting data to code sections. */
224 /* The target specific pseudo-ops which we support. */
226 const pseudo_typeS md_pseudo_table
[] =
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte
, 0 },
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm
, 0 },
237 { "lcomm", ppc_comm
, 1 },
241 { "bi", ppc_biei
, 0 },
243 { "csect", ppc_csect
, 0 },
244 { "dwsect", ppc_dwsect
, 0 },
245 { "data", ppc_section
, 'd' },
249 { "ei", ppc_biei
, 1 },
251 { "extern", ppc_extern
, 0 },
252 { "function", ppc_function
, 0 },
253 { "lglobl", ppc_lglobl
, 0 },
254 { "ref", ppc_ref
, 0 },
255 { "rename", ppc_rename
, 0 },
256 { "section", ppc_named_section
, 0 },
257 { "stabx", ppc_stabx
, 0 },
258 { "text", ppc_section
, 't' },
259 { "toc", ppc_toc
, 0 },
260 { "long", ppc_xcoff_cons
, 2 },
261 { "llong", ppc_xcoff_cons
, 3 },
262 { "word", ppc_xcoff_cons
, 1 },
263 { "short", ppc_xcoff_cons
, 1 },
264 { "vbyte", ppc_vbyte
, 0 },
268 { "llong", cons
, 8 },
269 { "rdata", ppc_elf_rdata
, 0 },
270 { "rodata", ppc_elf_rdata
, 0 },
271 { "lcomm", ppc_elf_lcomm
, 0 },
272 { "localentry", ppc_elf_localentry
, 0 },
273 { "abiversion", ppc_elf_abiversion
, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous
, 0 },
280 { "pdata", ppc_pdata
, 0 },
281 { "ydata", ppc_ydata
, 0 },
282 { "reldata", ppc_reldata
, 0 },
283 { "rdata", ppc_rdata
, 0 },
284 { "ualong", ppc_ualong
, 0 },
285 { "znop", ppc_znop
, 0 },
286 { "comm", ppc_pe_comm
, 0 },
287 { "lcomm", ppc_pe_comm
, 1 },
288 { "section", ppc_pe_section
, 0 },
289 { "function", ppc_pe_function
,0 },
290 { "tocd", ppc_pe_tocd
, 0 },
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
295 { "machine", ppc_machine
, 0 },
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
306 /* Structure to hold information about predefined registers. */
310 unsigned short value
;
311 unsigned short flags
;
314 /* List of registers that are pre-defined:
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
339 dsisr has the value 18
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
345 The table is sorted. Suitable for searching by a binary search. */
347 static const struct pd_reg pre_defined_registers
[] =
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG
},
351 { "cr.1", 1, PPC_OPERAND_CR_REG
},
352 { "cr.2", 2, PPC_OPERAND_CR_REG
},
353 { "cr.3", 3, PPC_OPERAND_CR_REG
},
354 { "cr.4", 4, PPC_OPERAND_CR_REG
},
355 { "cr.5", 5, PPC_OPERAND_CR_REG
},
356 { "cr.6", 6, PPC_OPERAND_CR_REG
},
357 { "cr.7", 7, PPC_OPERAND_CR_REG
},
359 { "cr0", 0, PPC_OPERAND_CR_REG
},
360 { "cr1", 1, PPC_OPERAND_CR_REG
},
361 { "cr2", 2, PPC_OPERAND_CR_REG
},
362 { "cr3", 3, PPC_OPERAND_CR_REG
},
363 { "cr4", 4, PPC_OPERAND_CR_REG
},
364 { "cr5", 5, PPC_OPERAND_CR_REG
},
365 { "cr6", 6, PPC_OPERAND_CR_REG
},
366 { "cr7", 7, PPC_OPERAND_CR_REG
},
368 { "ctr", 9, PPC_OPERAND_SPR
},
369 { "dar", 19, PPC_OPERAND_SPR
},
370 { "dec", 22, PPC_OPERAND_SPR
},
371 { "dsisr", 18, PPC_OPERAND_SPR
},
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR
},
375 { "f.1", 1, PPC_OPERAND_FPR
},
376 { "f.10", 10, PPC_OPERAND_FPR
},
377 { "f.11", 11, PPC_OPERAND_FPR
},
378 { "f.12", 12, PPC_OPERAND_FPR
},
379 { "f.13", 13, PPC_OPERAND_FPR
},
380 { "f.14", 14, PPC_OPERAND_FPR
},
381 { "f.15", 15, PPC_OPERAND_FPR
},
382 { "f.16", 16, PPC_OPERAND_FPR
},
383 { "f.17", 17, PPC_OPERAND_FPR
},
384 { "f.18", 18, PPC_OPERAND_FPR
},
385 { "f.19", 19, PPC_OPERAND_FPR
},
386 { "f.2", 2, PPC_OPERAND_FPR
},
387 { "f.20", 20, PPC_OPERAND_FPR
},
388 { "f.21", 21, PPC_OPERAND_FPR
},
389 { "f.22", 22, PPC_OPERAND_FPR
},
390 { "f.23", 23, PPC_OPERAND_FPR
},
391 { "f.24", 24, PPC_OPERAND_FPR
},
392 { "f.25", 25, PPC_OPERAND_FPR
},
393 { "f.26", 26, PPC_OPERAND_FPR
},
394 { "f.27", 27, PPC_OPERAND_FPR
},
395 { "f.28", 28, PPC_OPERAND_FPR
},
396 { "f.29", 29, PPC_OPERAND_FPR
},
397 { "f.3", 3, PPC_OPERAND_FPR
},
398 { "f.30", 30, PPC_OPERAND_FPR
},
399 { "f.31", 31, PPC_OPERAND_FPR
},
400 { "f.32", 32, PPC_OPERAND_VSR
},
401 { "f.33", 33, PPC_OPERAND_VSR
},
402 { "f.34", 34, PPC_OPERAND_VSR
},
403 { "f.35", 35, PPC_OPERAND_VSR
},
404 { "f.36", 36, PPC_OPERAND_VSR
},
405 { "f.37", 37, PPC_OPERAND_VSR
},
406 { "f.38", 38, PPC_OPERAND_VSR
},
407 { "f.39", 39, PPC_OPERAND_VSR
},
408 { "f.4", 4, PPC_OPERAND_FPR
},
409 { "f.40", 40, PPC_OPERAND_VSR
},
410 { "f.41", 41, PPC_OPERAND_VSR
},
411 { "f.42", 42, PPC_OPERAND_VSR
},
412 { "f.43", 43, PPC_OPERAND_VSR
},
413 { "f.44", 44, PPC_OPERAND_VSR
},
414 { "f.45", 45, PPC_OPERAND_VSR
},
415 { "f.46", 46, PPC_OPERAND_VSR
},
416 { "f.47", 47, PPC_OPERAND_VSR
},
417 { "f.48", 48, PPC_OPERAND_VSR
},
418 { "f.49", 49, PPC_OPERAND_VSR
},
419 { "f.5", 5, PPC_OPERAND_FPR
},
420 { "f.50", 50, PPC_OPERAND_VSR
},
421 { "f.51", 51, PPC_OPERAND_VSR
},
422 { "f.52", 52, PPC_OPERAND_VSR
},
423 { "f.53", 53, PPC_OPERAND_VSR
},
424 { "f.54", 54, PPC_OPERAND_VSR
},
425 { "f.55", 55, PPC_OPERAND_VSR
},
426 { "f.56", 56, PPC_OPERAND_VSR
},
427 { "f.57", 57, PPC_OPERAND_VSR
},
428 { "f.58", 58, PPC_OPERAND_VSR
},
429 { "f.59", 59, PPC_OPERAND_VSR
},
430 { "f.6", 6, PPC_OPERAND_FPR
},
431 { "f.60", 60, PPC_OPERAND_VSR
},
432 { "f.61", 61, PPC_OPERAND_VSR
},
433 { "f.62", 62, PPC_OPERAND_VSR
},
434 { "f.63", 63, PPC_OPERAND_VSR
},
435 { "f.7", 7, PPC_OPERAND_FPR
},
436 { "f.8", 8, PPC_OPERAND_FPR
},
437 { "f.9", 9, PPC_OPERAND_FPR
},
439 { "f0", 0, PPC_OPERAND_FPR
},
440 { "f1", 1, PPC_OPERAND_FPR
},
441 { "f10", 10, PPC_OPERAND_FPR
},
442 { "f11", 11, PPC_OPERAND_FPR
},
443 { "f12", 12, PPC_OPERAND_FPR
},
444 { "f13", 13, PPC_OPERAND_FPR
},
445 { "f14", 14, PPC_OPERAND_FPR
},
446 { "f15", 15, PPC_OPERAND_FPR
},
447 { "f16", 16, PPC_OPERAND_FPR
},
448 { "f17", 17, PPC_OPERAND_FPR
},
449 { "f18", 18, PPC_OPERAND_FPR
},
450 { "f19", 19, PPC_OPERAND_FPR
},
451 { "f2", 2, PPC_OPERAND_FPR
},
452 { "f20", 20, PPC_OPERAND_FPR
},
453 { "f21", 21, PPC_OPERAND_FPR
},
454 { "f22", 22, PPC_OPERAND_FPR
},
455 { "f23", 23, PPC_OPERAND_FPR
},
456 { "f24", 24, PPC_OPERAND_FPR
},
457 { "f25", 25, PPC_OPERAND_FPR
},
458 { "f26", 26, PPC_OPERAND_FPR
},
459 { "f27", 27, PPC_OPERAND_FPR
},
460 { "f28", 28, PPC_OPERAND_FPR
},
461 { "f29", 29, PPC_OPERAND_FPR
},
462 { "f3", 3, PPC_OPERAND_FPR
},
463 { "f30", 30, PPC_OPERAND_FPR
},
464 { "f31", 31, PPC_OPERAND_FPR
},
465 { "f32", 32, PPC_OPERAND_VSR
},
466 { "f33", 33, PPC_OPERAND_VSR
},
467 { "f34", 34, PPC_OPERAND_VSR
},
468 { "f35", 35, PPC_OPERAND_VSR
},
469 { "f36", 36, PPC_OPERAND_VSR
},
470 { "f37", 37, PPC_OPERAND_VSR
},
471 { "f38", 38, PPC_OPERAND_VSR
},
472 { "f39", 39, PPC_OPERAND_VSR
},
473 { "f4", 4, PPC_OPERAND_FPR
},
474 { "f40", 40, PPC_OPERAND_VSR
},
475 { "f41", 41, PPC_OPERAND_VSR
},
476 { "f42", 42, PPC_OPERAND_VSR
},
477 { "f43", 43, PPC_OPERAND_VSR
},
478 { "f44", 44, PPC_OPERAND_VSR
},
479 { "f45", 45, PPC_OPERAND_VSR
},
480 { "f46", 46, PPC_OPERAND_VSR
},
481 { "f47", 47, PPC_OPERAND_VSR
},
482 { "f48", 48, PPC_OPERAND_VSR
},
483 { "f49", 49, PPC_OPERAND_VSR
},
484 { "f5", 5, PPC_OPERAND_FPR
},
485 { "f50", 50, PPC_OPERAND_VSR
},
486 { "f51", 51, PPC_OPERAND_VSR
},
487 { "f52", 52, PPC_OPERAND_VSR
},
488 { "f53", 53, PPC_OPERAND_VSR
},
489 { "f54", 54, PPC_OPERAND_VSR
},
490 { "f55", 55, PPC_OPERAND_VSR
},
491 { "f56", 56, PPC_OPERAND_VSR
},
492 { "f57", 57, PPC_OPERAND_VSR
},
493 { "f58", 58, PPC_OPERAND_VSR
},
494 { "f59", 59, PPC_OPERAND_VSR
},
495 { "f6", 6, PPC_OPERAND_FPR
},
496 { "f60", 60, PPC_OPERAND_VSR
},
497 { "f61", 61, PPC_OPERAND_VSR
},
498 { "f62", 62, PPC_OPERAND_VSR
},
499 { "f63", 63, PPC_OPERAND_VSR
},
500 { "f7", 7, PPC_OPERAND_FPR
},
501 { "f8", 8, PPC_OPERAND_FPR
},
502 { "f9", 9, PPC_OPERAND_FPR
},
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR
},
506 { "gqr.1", 1, PPC_OPERAND_GQR
},
507 { "gqr.2", 2, PPC_OPERAND_GQR
},
508 { "gqr.3", 3, PPC_OPERAND_GQR
},
509 { "gqr.4", 4, PPC_OPERAND_GQR
},
510 { "gqr.5", 5, PPC_OPERAND_GQR
},
511 { "gqr.6", 6, PPC_OPERAND_GQR
},
512 { "gqr.7", 7, PPC_OPERAND_GQR
},
513 { "gqr0", 0, PPC_OPERAND_GQR
},
514 { "gqr1", 1, PPC_OPERAND_GQR
},
515 { "gqr2", 2, PPC_OPERAND_GQR
},
516 { "gqr3", 3, PPC_OPERAND_GQR
},
517 { "gqr4", 4, PPC_OPERAND_GQR
},
518 { "gqr5", 5, PPC_OPERAND_GQR
},
519 { "gqr6", 6, PPC_OPERAND_GQR
},
520 { "gqr7", 7, PPC_OPERAND_GQR
},
522 { "lr", 8, PPC_OPERAND_SPR
},
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR
},
526 { "r.1", 1, PPC_OPERAND_GPR
},
527 { "r.10", 10, PPC_OPERAND_GPR
},
528 { "r.11", 11, PPC_OPERAND_GPR
},
529 { "r.12", 12, PPC_OPERAND_GPR
},
530 { "r.13", 13, PPC_OPERAND_GPR
},
531 { "r.14", 14, PPC_OPERAND_GPR
},
532 { "r.15", 15, PPC_OPERAND_GPR
},
533 { "r.16", 16, PPC_OPERAND_GPR
},
534 { "r.17", 17, PPC_OPERAND_GPR
},
535 { "r.18", 18, PPC_OPERAND_GPR
},
536 { "r.19", 19, PPC_OPERAND_GPR
},
537 { "r.2", 2, PPC_OPERAND_GPR
},
538 { "r.20", 20, PPC_OPERAND_GPR
},
539 { "r.21", 21, PPC_OPERAND_GPR
},
540 { "r.22", 22, PPC_OPERAND_GPR
},
541 { "r.23", 23, PPC_OPERAND_GPR
},
542 { "r.24", 24, PPC_OPERAND_GPR
},
543 { "r.25", 25, PPC_OPERAND_GPR
},
544 { "r.26", 26, PPC_OPERAND_GPR
},
545 { "r.27", 27, PPC_OPERAND_GPR
},
546 { "r.28", 28, PPC_OPERAND_GPR
},
547 { "r.29", 29, PPC_OPERAND_GPR
},
548 { "r.3", 3, PPC_OPERAND_GPR
},
549 { "r.30", 30, PPC_OPERAND_GPR
},
550 { "r.31", 31, PPC_OPERAND_GPR
},
551 { "r.4", 4, PPC_OPERAND_GPR
},
552 { "r.5", 5, PPC_OPERAND_GPR
},
553 { "r.6", 6, PPC_OPERAND_GPR
},
554 { "r.7", 7, PPC_OPERAND_GPR
},
555 { "r.8", 8, PPC_OPERAND_GPR
},
556 { "r.9", 9, PPC_OPERAND_GPR
},
558 { "r.sp", 1, PPC_OPERAND_GPR
},
560 { "r.toc", 2, PPC_OPERAND_GPR
},
562 { "r0", 0, PPC_OPERAND_GPR
},
563 { "r1", 1, PPC_OPERAND_GPR
},
564 { "r10", 10, PPC_OPERAND_GPR
},
565 { "r11", 11, PPC_OPERAND_GPR
},
566 { "r12", 12, PPC_OPERAND_GPR
},
567 { "r13", 13, PPC_OPERAND_GPR
},
568 { "r14", 14, PPC_OPERAND_GPR
},
569 { "r15", 15, PPC_OPERAND_GPR
},
570 { "r16", 16, PPC_OPERAND_GPR
},
571 { "r17", 17, PPC_OPERAND_GPR
},
572 { "r18", 18, PPC_OPERAND_GPR
},
573 { "r19", 19, PPC_OPERAND_GPR
},
574 { "r2", 2, PPC_OPERAND_GPR
},
575 { "r20", 20, PPC_OPERAND_GPR
},
576 { "r21", 21, PPC_OPERAND_GPR
},
577 { "r22", 22, PPC_OPERAND_GPR
},
578 { "r23", 23, PPC_OPERAND_GPR
},
579 { "r24", 24, PPC_OPERAND_GPR
},
580 { "r25", 25, PPC_OPERAND_GPR
},
581 { "r26", 26, PPC_OPERAND_GPR
},
582 { "r27", 27, PPC_OPERAND_GPR
},
583 { "r28", 28, PPC_OPERAND_GPR
},
584 { "r29", 29, PPC_OPERAND_GPR
},
585 { "r3", 3, PPC_OPERAND_GPR
},
586 { "r30", 30, PPC_OPERAND_GPR
},
587 { "r31", 31, PPC_OPERAND_GPR
},
588 { "r4", 4, PPC_OPERAND_GPR
},
589 { "r5", 5, PPC_OPERAND_GPR
},
590 { "r6", 6, PPC_OPERAND_GPR
},
591 { "r7", 7, PPC_OPERAND_GPR
},
592 { "r8", 8, PPC_OPERAND_GPR
},
593 { "r9", 9, PPC_OPERAND_GPR
},
595 { "rtoc", 2, PPC_OPERAND_GPR
},
597 { "sdr1", 25, PPC_OPERAND_SPR
},
599 { "sp", 1, PPC_OPERAND_GPR
},
601 { "srr0", 26, PPC_OPERAND_SPR
},
602 { "srr1", 27, PPC_OPERAND_SPR
},
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR
},
606 { "v.1", 1, PPC_OPERAND_VR
},
607 { "v.10", 10, PPC_OPERAND_VR
},
608 { "v.11", 11, PPC_OPERAND_VR
},
609 { "v.12", 12, PPC_OPERAND_VR
},
610 { "v.13", 13, PPC_OPERAND_VR
},
611 { "v.14", 14, PPC_OPERAND_VR
},
612 { "v.15", 15, PPC_OPERAND_VR
},
613 { "v.16", 16, PPC_OPERAND_VR
},
614 { "v.17", 17, PPC_OPERAND_VR
},
615 { "v.18", 18, PPC_OPERAND_VR
},
616 { "v.19", 19, PPC_OPERAND_VR
},
617 { "v.2", 2, PPC_OPERAND_VR
},
618 { "v.20", 20, PPC_OPERAND_VR
},
619 { "v.21", 21, PPC_OPERAND_VR
},
620 { "v.22", 22, PPC_OPERAND_VR
},
621 { "v.23", 23, PPC_OPERAND_VR
},
622 { "v.24", 24, PPC_OPERAND_VR
},
623 { "v.25", 25, PPC_OPERAND_VR
},
624 { "v.26", 26, PPC_OPERAND_VR
},
625 { "v.27", 27, PPC_OPERAND_VR
},
626 { "v.28", 28, PPC_OPERAND_VR
},
627 { "v.29", 29, PPC_OPERAND_VR
},
628 { "v.3", 3, PPC_OPERAND_VR
},
629 { "v.30", 30, PPC_OPERAND_VR
},
630 { "v.31", 31, PPC_OPERAND_VR
},
631 { "v.4", 4, PPC_OPERAND_VR
},
632 { "v.5", 5, PPC_OPERAND_VR
},
633 { "v.6", 6, PPC_OPERAND_VR
},
634 { "v.7", 7, PPC_OPERAND_VR
},
635 { "v.8", 8, PPC_OPERAND_VR
},
636 { "v.9", 9, PPC_OPERAND_VR
},
638 { "v0", 0, PPC_OPERAND_VR
},
639 { "v1", 1, PPC_OPERAND_VR
},
640 { "v10", 10, PPC_OPERAND_VR
},
641 { "v11", 11, PPC_OPERAND_VR
},
642 { "v12", 12, PPC_OPERAND_VR
},
643 { "v13", 13, PPC_OPERAND_VR
},
644 { "v14", 14, PPC_OPERAND_VR
},
645 { "v15", 15, PPC_OPERAND_VR
},
646 { "v16", 16, PPC_OPERAND_VR
},
647 { "v17", 17, PPC_OPERAND_VR
},
648 { "v18", 18, PPC_OPERAND_VR
},
649 { "v19", 19, PPC_OPERAND_VR
},
650 { "v2", 2, PPC_OPERAND_VR
},
651 { "v20", 20, PPC_OPERAND_VR
},
652 { "v21", 21, PPC_OPERAND_VR
},
653 { "v22", 22, PPC_OPERAND_VR
},
654 { "v23", 23, PPC_OPERAND_VR
},
655 { "v24", 24, PPC_OPERAND_VR
},
656 { "v25", 25, PPC_OPERAND_VR
},
657 { "v26", 26, PPC_OPERAND_VR
},
658 { "v27", 27, PPC_OPERAND_VR
},
659 { "v28", 28, PPC_OPERAND_VR
},
660 { "v29", 29, PPC_OPERAND_VR
},
661 { "v3", 3, PPC_OPERAND_VR
},
662 { "v30", 30, PPC_OPERAND_VR
},
663 { "v31", 31, PPC_OPERAND_VR
},
664 { "v4", 4, PPC_OPERAND_VR
},
665 { "v5", 5, PPC_OPERAND_VR
},
666 { "v6", 6, PPC_OPERAND_VR
},
667 { "v7", 7, PPC_OPERAND_VR
},
668 { "v8", 8, PPC_OPERAND_VR
},
669 { "v9", 9, PPC_OPERAND_VR
},
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR
},
673 { "vs.1", 1, PPC_OPERAND_VSR
},
674 { "vs.10", 10, PPC_OPERAND_VSR
},
675 { "vs.11", 11, PPC_OPERAND_VSR
},
676 { "vs.12", 12, PPC_OPERAND_VSR
},
677 { "vs.13", 13, PPC_OPERAND_VSR
},
678 { "vs.14", 14, PPC_OPERAND_VSR
},
679 { "vs.15", 15, PPC_OPERAND_VSR
},
680 { "vs.16", 16, PPC_OPERAND_VSR
},
681 { "vs.17", 17, PPC_OPERAND_VSR
},
682 { "vs.18", 18, PPC_OPERAND_VSR
},
683 { "vs.19", 19, PPC_OPERAND_VSR
},
684 { "vs.2", 2, PPC_OPERAND_VSR
},
685 { "vs.20", 20, PPC_OPERAND_VSR
},
686 { "vs.21", 21, PPC_OPERAND_VSR
},
687 { "vs.22", 22, PPC_OPERAND_VSR
},
688 { "vs.23", 23, PPC_OPERAND_VSR
},
689 { "vs.24", 24, PPC_OPERAND_VSR
},
690 { "vs.25", 25, PPC_OPERAND_VSR
},
691 { "vs.26", 26, PPC_OPERAND_VSR
},
692 { "vs.27", 27, PPC_OPERAND_VSR
},
693 { "vs.28", 28, PPC_OPERAND_VSR
},
694 { "vs.29", 29, PPC_OPERAND_VSR
},
695 { "vs.3", 3, PPC_OPERAND_VSR
},
696 { "vs.30", 30, PPC_OPERAND_VSR
},
697 { "vs.31", 31, PPC_OPERAND_VSR
},
698 { "vs.32", 32, PPC_OPERAND_VSR
},
699 { "vs.33", 33, PPC_OPERAND_VSR
},
700 { "vs.34", 34, PPC_OPERAND_VSR
},
701 { "vs.35", 35, PPC_OPERAND_VSR
},
702 { "vs.36", 36, PPC_OPERAND_VSR
},
703 { "vs.37", 37, PPC_OPERAND_VSR
},
704 { "vs.38", 38, PPC_OPERAND_VSR
},
705 { "vs.39", 39, PPC_OPERAND_VSR
},
706 { "vs.4", 4, PPC_OPERAND_VSR
},
707 { "vs.40", 40, PPC_OPERAND_VSR
},
708 { "vs.41", 41, PPC_OPERAND_VSR
},
709 { "vs.42", 42, PPC_OPERAND_VSR
},
710 { "vs.43", 43, PPC_OPERAND_VSR
},
711 { "vs.44", 44, PPC_OPERAND_VSR
},
712 { "vs.45", 45, PPC_OPERAND_VSR
},
713 { "vs.46", 46, PPC_OPERAND_VSR
},
714 { "vs.47", 47, PPC_OPERAND_VSR
},
715 { "vs.48", 48, PPC_OPERAND_VSR
},
716 { "vs.49", 49, PPC_OPERAND_VSR
},
717 { "vs.5", 5, PPC_OPERAND_VSR
},
718 { "vs.50", 50, PPC_OPERAND_VSR
},
719 { "vs.51", 51, PPC_OPERAND_VSR
},
720 { "vs.52", 52, PPC_OPERAND_VSR
},
721 { "vs.53", 53, PPC_OPERAND_VSR
},
722 { "vs.54", 54, PPC_OPERAND_VSR
},
723 { "vs.55", 55, PPC_OPERAND_VSR
},
724 { "vs.56", 56, PPC_OPERAND_VSR
},
725 { "vs.57", 57, PPC_OPERAND_VSR
},
726 { "vs.58", 58, PPC_OPERAND_VSR
},
727 { "vs.59", 59, PPC_OPERAND_VSR
},
728 { "vs.6", 6, PPC_OPERAND_VSR
},
729 { "vs.60", 60, PPC_OPERAND_VSR
},
730 { "vs.61", 61, PPC_OPERAND_VSR
},
731 { "vs.62", 62, PPC_OPERAND_VSR
},
732 { "vs.63", 63, PPC_OPERAND_VSR
},
733 { "vs.7", 7, PPC_OPERAND_VSR
},
734 { "vs.8", 8, PPC_OPERAND_VSR
},
735 { "vs.9", 9, PPC_OPERAND_VSR
},
737 { "vs0", 0, PPC_OPERAND_VSR
},
738 { "vs1", 1, PPC_OPERAND_VSR
},
739 { "vs10", 10, PPC_OPERAND_VSR
},
740 { "vs11", 11, PPC_OPERAND_VSR
},
741 { "vs12", 12, PPC_OPERAND_VSR
},
742 { "vs13", 13, PPC_OPERAND_VSR
},
743 { "vs14", 14, PPC_OPERAND_VSR
},
744 { "vs15", 15, PPC_OPERAND_VSR
},
745 { "vs16", 16, PPC_OPERAND_VSR
},
746 { "vs17", 17, PPC_OPERAND_VSR
},
747 { "vs18", 18, PPC_OPERAND_VSR
},
748 { "vs19", 19, PPC_OPERAND_VSR
},
749 { "vs2", 2, PPC_OPERAND_VSR
},
750 { "vs20", 20, PPC_OPERAND_VSR
},
751 { "vs21", 21, PPC_OPERAND_VSR
},
752 { "vs22", 22, PPC_OPERAND_VSR
},
753 { "vs23", 23, PPC_OPERAND_VSR
},
754 { "vs24", 24, PPC_OPERAND_VSR
},
755 { "vs25", 25, PPC_OPERAND_VSR
},
756 { "vs26", 26, PPC_OPERAND_VSR
},
757 { "vs27", 27, PPC_OPERAND_VSR
},
758 { "vs28", 28, PPC_OPERAND_VSR
},
759 { "vs29", 29, PPC_OPERAND_VSR
},
760 { "vs3", 3, PPC_OPERAND_VSR
},
761 { "vs30", 30, PPC_OPERAND_VSR
},
762 { "vs31", 31, PPC_OPERAND_VSR
},
763 { "vs32", 32, PPC_OPERAND_VSR
},
764 { "vs33", 33, PPC_OPERAND_VSR
},
765 { "vs34", 34, PPC_OPERAND_VSR
},
766 { "vs35", 35, PPC_OPERAND_VSR
},
767 { "vs36", 36, PPC_OPERAND_VSR
},
768 { "vs37", 37, PPC_OPERAND_VSR
},
769 { "vs38", 38, PPC_OPERAND_VSR
},
770 { "vs39", 39, PPC_OPERAND_VSR
},
771 { "vs4", 4, PPC_OPERAND_VSR
},
772 { "vs40", 40, PPC_OPERAND_VSR
},
773 { "vs41", 41, PPC_OPERAND_VSR
},
774 { "vs42", 42, PPC_OPERAND_VSR
},
775 { "vs43", 43, PPC_OPERAND_VSR
},
776 { "vs44", 44, PPC_OPERAND_VSR
},
777 { "vs45", 45, PPC_OPERAND_VSR
},
778 { "vs46", 46, PPC_OPERAND_VSR
},
779 { "vs47", 47, PPC_OPERAND_VSR
},
780 { "vs48", 48, PPC_OPERAND_VSR
},
781 { "vs49", 49, PPC_OPERAND_VSR
},
782 { "vs5", 5, PPC_OPERAND_VSR
},
783 { "vs50", 50, PPC_OPERAND_VSR
},
784 { "vs51", 51, PPC_OPERAND_VSR
},
785 { "vs52", 52, PPC_OPERAND_VSR
},
786 { "vs53", 53, PPC_OPERAND_VSR
},
787 { "vs54", 54, PPC_OPERAND_VSR
},
788 { "vs55", 55, PPC_OPERAND_VSR
},
789 { "vs56", 56, PPC_OPERAND_VSR
},
790 { "vs57", 57, PPC_OPERAND_VSR
},
791 { "vs58", 58, PPC_OPERAND_VSR
},
792 { "vs59", 59, PPC_OPERAND_VSR
},
793 { "vs6", 6, PPC_OPERAND_VSR
},
794 { "vs60", 60, PPC_OPERAND_VSR
},
795 { "vs61", 61, PPC_OPERAND_VSR
},
796 { "vs62", 62, PPC_OPERAND_VSR
},
797 { "vs63", 63, PPC_OPERAND_VSR
},
798 { "vs7", 7, PPC_OPERAND_VSR
},
799 { "vs8", 8, PPC_OPERAND_VSR
},
800 { "vs9", 9, PPC_OPERAND_VSR
},
802 { "xer", 1, PPC_OPERAND_SPR
}
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
810 static const struct pd_reg
*
811 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
813 int middle
, low
, high
;
821 middle
= (low
+ high
) / 2;
822 cmp
= strcasecmp (name
, regs
[middle
].name
);
828 return ®s
[middle
];
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS
*expressionP
)
850 const struct pd_reg
*reg
;
855 /* Find the spelling of the operand. */
856 start
= name
= input_line_pointer
;
857 if (name
[0] == '%' && ISALPHA (name
[1]))
858 name
= ++input_line_pointer
;
860 else if (!reg_names_p
|| !ISALPHA (name
[0]))
863 c
= get_symbol_name (&name
);
864 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
866 /* Put back the delimiting char. */
867 *input_line_pointer
= c
;
869 /* Look to see if it's in the register table. */
872 expressionP
->X_op
= O_register
;
873 expressionP
->X_add_number
= reg
->value
;
874 expressionP
->X_md
= reg
->flags
;
876 /* Make the rest nice. */
877 expressionP
->X_add_symbol
= NULL
;
878 expressionP
->X_op_symbol
= NULL
;
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer
= start
;
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand
;
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names
[] =
897 { "cr0", 0, PPC_OPERAND_CR_REG
},
898 { "cr1", 1, PPC_OPERAND_CR_REG
},
899 { "cr2", 2, PPC_OPERAND_CR_REG
},
900 { "cr3", 3, PPC_OPERAND_CR_REG
},
901 { "cr4", 4, PPC_OPERAND_CR_REG
},
902 { "cr5", 5, PPC_OPERAND_CR_REG
},
903 { "cr6", 6, PPC_OPERAND_CR_REG
},
904 { "cr7", 7, PPC_OPERAND_CR_REG
},
905 { "eq", 2, PPC_OPERAND_CR_BIT
},
906 { "gt", 1, PPC_OPERAND_CR_BIT
},
907 { "lt", 0, PPC_OPERAND_CR_BIT
},
908 { "so", 3, PPC_OPERAND_CR_BIT
},
909 { "un", 3, PPC_OPERAND_CR_BIT
}
912 /* Parsing function. This returns non-zero if it recognized an
916 ppc_parse_name (const char *name
, expressionS
*exp
)
918 const struct pd_reg
*reg
;
925 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
930 exp
->X_op
= O_register
;
931 exp
->X_add_number
= reg
->value
;
932 exp
->X_md
= reg
->flags
;
937 /* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
941 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
943 /* Accept 4*cr<n> and cr<n>*4. */
945 && ((right
->X_op
== O_register
946 && right
->X_md
== PPC_OPERAND_CR_REG
947 && left
->X_op
== O_constant
948 && left
->X_add_number
== 4)
949 || (left
->X_op
== O_register
950 && left
->X_md
== PPC_OPERAND_CR_REG
951 && right
->X_op
== O_constant
952 && right
->X_add_number
== 4)))
954 left
->X_op
= O_register
;
955 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
956 left
->X_add_number
*= right
->X_add_number
;
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right
->X_op
== O_register
962 && left
->X_op
== O_register
964 && ((right
->X_md
== PPC_OPERAND_CR_BIT
965 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
966 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
967 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
969 left
->X_md
= PPC_OPERAND_CR_BIT
;
970 right
->X_op
= O_constant
;
974 /* Accept reg +/- constant. */
975 if (left
->X_op
== O_register
976 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
977 as_warn (_("invalid register expression"));
979 /* Accept constant + reg. */
980 if (right
->X_op
== O_register
)
982 if (op
== O_add
&& left
->X_op
== O_constant
)
983 left
->X_md
= right
->X_md
;
985 as_warn (_("invalid register expression"));
991 /* Local variables. */
993 /* Whether to target xcoff64/elf64. */
994 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
996 /* Opcode hash table. */
997 static struct hash_control
*ppc_hash
;
999 /* Macro hash table. */
1000 static struct hash_control
*ppc_macro_hash
;
1003 /* What type of shared library support to use. */
1004 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
1006 /* Flags to set in the elf header. */
1007 static flagword ppc_flags
= 0;
1009 /* Whether this is Solaris or not. */
1010 #ifdef TARGET_SOLARIS_COMMENT
1011 #define SOLARIS_P TRUE
1013 #define SOLARIS_P FALSE
1016 static bfd_boolean msolaris
= SOLARIS_P
;
1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1027 /* Next subsegment to allocate within the .text segment. */
1028 static subsegT ppc_text_subsegment
= 2;
1030 /* Linked list of csects in the text section. */
1031 static symbolS
*ppc_text_csects
;
1033 /* Next subsegment to allocate within the .data segment. */
1034 static subsegT ppc_data_subsegment
= 2;
1036 /* Linked list of csects in the data section. */
1037 static symbolS
*ppc_data_csects
;
1039 /* The current csect. */
1040 static symbolS
*ppc_current_csect
;
1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047 static symbolS
*ppc_toc_csect
;
1049 /* The first frag in the TOC subsegment. */
1050 static fragS
*ppc_toc_frag
;
1052 /* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054 static fragS
*ppc_after_toc_frag
;
1056 /* The current static block. */
1057 static symbolS
*ppc_current_block
;
1059 /* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062 static asection
*ppc_coff_debug_section
;
1064 /* Structure to set the length field of the dwarf sections. */
1065 struct dw_subsection
{
1066 /* Subsections are simply linked. */
1067 struct dw_subsection
*link
;
1069 /* The subsection number. */
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp
;
1076 static struct dw_section
{
1077 /* Corresponding section. */
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection
*list_subseg
;
1083 /* The anonymous subsection. */
1084 struct dw_subsection
*anon_subseg
;
1085 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1086 #endif /* OBJ_XCOFF */
1090 /* Various sections that we need for PE coff support. */
1091 static segT ydata_section
;
1092 static segT pdata_section
;
1093 static segT reldata_section
;
1094 static segT rdata_section
;
1095 static segT tocdata_section
;
1097 /* The current section and the previous section. See ppc_previous. */
1098 static segT ppc_previous_section
;
1099 static segT ppc_current_section
;
1104 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105 unsigned long *ppc_apuinfo_list
;
1106 unsigned int ppc_apuinfo_num
;
1107 unsigned int ppc_apuinfo_num_alloc
;
1108 #endif /* OBJ_ELF */
1111 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1113 const char *const md_shortopts
= "um:";
1115 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1116 const struct option md_longopts
[] = {
1117 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1118 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1119 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1120 {NULL
, no_argument
, NULL
, 0}
1122 const size_t md_longopts_size
= sizeof (md_longopts
);
1125 md_parse_option (int c
, const char *arg
)
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg
, "e") == 0)
1142 target_big_endian
= 0;
1143 set_target_endian
= 1;
1144 if (ppc_cpu
& PPC_OPCODE_VLE
)
1145 as_bad (_("the use of -mvle requires big endian."));
1153 if (strcmp (arg
, "e") == 0)
1155 target_big_endian
= 1;
1156 set_target_endian
= 1;
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1168 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1178 if (strcmp (arg
, "64") == 0)
1182 if (ppc_cpu
& PPC_OPCODE_VLE
)
1183 as_bad (_("the use of -mvle requires -a32."));
1185 as_fatal (_("%s unsupported"), "-a64");
1188 else if (strcmp (arg
, "32") == 0)
1195 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1196 /* "raw" is only valid for the disassembler. */
1197 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1200 if (strcmp (arg
, "vle") == 0)
1202 if (set_target_endian
&& target_big_endian
== 0)
1203 as_bad (_("the use of -mvle requires big endian."));
1205 as_bad (_("the use of -mvle requires -a32."));
1209 else if (strcmp (arg
, "no-vle") == 0)
1211 sticky
&= ~PPC_OPCODE_VLE
;
1213 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1214 new_cpu
&= ~PPC_OPCODE_VLE
;
1219 else if (strcmp (arg
, "regnames") == 0)
1222 else if (strcmp (arg
, "no-regnames") == 0)
1223 reg_names_p
= FALSE
;
1226 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1227 that require relocation. */
1228 else if (strcmp (arg
, "relocatable") == 0)
1230 shlib
= SHLIB_MRELOCATABLE
;
1231 ppc_flags
|= EF_PPC_RELOCATABLE
;
1234 else if (strcmp (arg
, "relocatable-lib") == 0)
1236 shlib
= SHLIB_MRELOCATABLE
;
1237 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1240 /* -memb, set embedded bit. */
1241 else if (strcmp (arg
, "emb") == 0)
1242 ppc_flags
|= EF_PPC_EMB
;
1244 /* -mlittle/-mbig set the endianness. */
1245 else if (strcmp (arg
, "little") == 0
1246 || strcmp (arg
, "little-endian") == 0)
1248 target_big_endian
= 0;
1249 set_target_endian
= 1;
1250 if (ppc_cpu
& PPC_OPCODE_VLE
)
1251 as_bad (_("the use of -mvle requires big endian."));
1254 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1256 target_big_endian
= 1;
1257 set_target_endian
= 1;
1260 else if (strcmp (arg
, "solaris") == 0)
1263 ppc_comment_chars
= ppc_solaris_comment_chars
;
1266 else if (strcmp (arg
, "no-solaris") == 0)
1269 ppc_comment_chars
= ppc_eabi_comment_chars
;
1271 else if (strcmp (arg
, "spe2") == 0)
1273 ppc_cpu
|= PPC_OPCODE_SPE2
;
1278 as_bad (_("invalid switch -m%s"), arg
);
1284 /* -V: SVR4 argument to print version ID. */
1286 print_version_id ();
1289 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1290 should be emitted or not. FIXME: Not implemented. */
1294 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1295 rather than .stabs.excl, which is ignored by the linker.
1296 FIXME: Not implemented. */
1307 nop_limit
= strtoul (optarg
, &end
, 0);
1309 as_bad (_("--nops needs a numeric argument"));
1324 md_show_usage (FILE *stream
)
1326 fprintf (stream
, _("\
1328 -a32 generate ELF32/XCOFF32\n\
1329 -a64 generate ELF64/XCOFF64\n\
1331 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1332 -mpwr generate code for POWER (RIOS1)\n\
1333 -m601 generate code for PowerPC 601\n\
1334 -mppc, -mppc32, -m603, -m604\n\
1335 generate code for PowerPC 603/604\n\
1336 -m403 generate code for PowerPC 403\n\
1337 -m405 generate code for PowerPC 405\n\
1338 -m440 generate code for PowerPC 440\n\
1339 -m464 generate code for PowerPC 464\n\
1340 -m476 generate code for PowerPC 476\n\
1341 -m7400, -m7410, -m7450, -m7455\n\
1342 generate code for PowerPC 7400/7410/7450/7455\n\
1343 -m750cl generate code for PowerPC 750cl\n\
1344 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1345 fprintf (stream
, _("\
1346 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1347 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1348 -mbooke generate code for 32-bit PowerPC BookE\n\
1349 -ma2 generate code for A2 architecture\n\
1350 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1351 -mpower5, -mpwr5, -mpwr5x\n\
1352 generate code for Power5 architecture\n\
1353 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1354 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1355 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1356 -mpower9, -mpwr9 generate code for Power9 architecture\n\
1357 -mcell generate code for Cell Broadband Engine architecture\n\
1358 -mcom generate code for Power/PowerPC common instructions\n\
1359 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1360 fprintf (stream
, _("\
1361 -maltivec generate code for AltiVec\n\
1362 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1363 -me300 generate code for PowerPC e300 family\n\
1364 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1365 -me500mc, generate code for Freescale e500mc core complex\n\
1366 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1367 -me5500, generate code for Freescale e5500 core complex\n\
1368 -me6500, generate code for Freescale e6500 core complex\n\
1369 -mspe generate code for Motorola SPE instructions\n\
1370 -mspe2 generate code for Freescale SPE2 instructions\n\
1371 -mvle generate code for Freescale VLE instructions\n\
1372 -mtitan generate code for AppliedMicro Titan core complex\n\
1373 -mregnames Allow symbolic names for registers\n\
1374 -mno-regnames Do not allow symbolic names for registers\n"));
1376 fprintf (stream
, _("\
1377 -mrelocatable support for GCC's -mrelocatble option\n\
1378 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1379 -memb set PPC_EMB bit in ELF flags\n\
1380 -mlittle, -mlittle-endian, -le\n\
1381 generate code for a little endian machine\n\
1382 -mbig, -mbig-endian, -be\n\
1383 generate code for a big endian machine\n\
1384 -msolaris generate code for Solaris\n\
1385 -mno-solaris do not generate code for Solaris\n\
1386 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1387 -V print assembler version number\n\
1388 -Qy, -Qn ignored\n"));
1390 fprintf (stream
, _("\
1391 -nops=count when aligning, more than COUNT nops uses a branch\n\
1392 -ppc476-workaround warn if emitting data to code sections\n"));
1395 /* Set ppc_cpu if it is not already set. */
1400 const char *default_os
= TARGET_OS
;
1401 const char *default_cpu
= TARGET_CPU
;
1403 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1406 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1407 else if (strncmp (default_os
, "aix", 3) == 0
1408 && default_os
[3] >= '4' && default_os
[3] <= '9')
1409 ppc_cpu
|= PPC_OPCODE_COMMON
;
1410 else if (strncmp (default_os
, "aix3", 4) == 0)
1411 ppc_cpu
|= PPC_OPCODE_POWER
;
1412 else if (strcmp (default_cpu
, "rs6000") == 0)
1413 ppc_cpu
|= PPC_OPCODE_POWER
;
1414 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1415 ppc_cpu
|= PPC_OPCODE_PPC
;
1417 as_fatal (_("unknown default cpu = %s, os = %s"),
1418 default_cpu
, default_os
);
1422 /* Figure out the BFD architecture to use. This function and ppc_mach
1423 are called well before md_begin, when the output file is opened. */
1425 enum bfd_architecture
1428 const char *default_cpu
= TARGET_CPU
;
1431 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1432 return bfd_arch_powerpc
;
1433 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1434 return bfd_arch_powerpc
;
1435 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1436 return bfd_arch_rs6000
;
1437 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1439 if (strcmp (default_cpu
, "rs6000") == 0)
1440 return bfd_arch_rs6000
;
1441 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1442 return bfd_arch_powerpc
;
1445 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1446 return bfd_arch_unknown
;
1453 return bfd_mach_ppc64
;
1454 else if (ppc_arch () == bfd_arch_rs6000
)
1455 return bfd_mach_rs6k
;
1456 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1457 return bfd_mach_ppc_titan
;
1458 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1459 return bfd_mach_ppc_vle
;
1461 return bfd_mach_ppc
;
1465 ppc_target_format (void)
1469 return target_big_endian
? "pe-powerpc" : "pe-powerpcle";
1471 return "xcoff-powermac";
1474 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1476 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1482 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1483 # elif defined (TE_VXWORKS)
1484 return "elf32-powerpc-vxworks";
1486 return (target_big_endian
1487 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1488 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1493 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1494 Return TRUE if there's a problem, otherwise FALSE. */
1497 insn_validate (const struct powerpc_opcode
*op
)
1499 const unsigned char *o
;
1500 uint64_t omask
= op
->mask
;
1502 /* The mask had better not trim off opcode bits. */
1503 if ((op
->opcode
& omask
) != op
->opcode
)
1505 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1509 /* The operands must not overlap the opcode or each other. */
1510 for (o
= op
->operands
; *o
; ++o
)
1512 if (*o
>= num_powerpc_operands
)
1514 as_bad (_("operand index error for %s"), op
->name
);
1519 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1520 if (operand
->shift
!= (int) PPC_OPSHIFT_INV
)
1524 if (operand
->shift
>= 0)
1525 mask
= operand
->bitm
<< operand
->shift
;
1527 mask
= operand
->bitm
>> -operand
->shift
;
1530 as_bad (_("operand %d overlap in %s"),
1531 (int) (o
- op
->operands
), op
->name
);
1541 /* Insert opcodes and macros into hash tables. Called at startup and
1542 for .machine pseudo. */
1545 ppc_setup_opcodes (void)
1547 const struct powerpc_opcode
*op
;
1548 const struct powerpc_opcode
*op_end
;
1549 const struct powerpc_macro
*macro
;
1550 const struct powerpc_macro
*macro_end
;
1551 bfd_boolean bad_insn
= FALSE
;
1553 if (ppc_hash
!= NULL
)
1554 hash_die (ppc_hash
);
1555 if (ppc_macro_hash
!= NULL
)
1556 hash_die (ppc_macro_hash
);
1558 /* Insert the opcodes into a hash table. */
1559 ppc_hash
= hash_new ();
1561 if (ENABLE_CHECKING
)
1565 /* An index into powerpc_operands is stored in struct fix
1566 fx_pcrel_adjust which is 8 bits wide. */
1567 gas_assert (num_powerpc_operands
< 256);
1569 /* Check operand masks. Code here and in the disassembler assumes
1570 all the 1's in the mask are contiguous. */
1571 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1573 uint64_t mask
= powerpc_operands
[i
].bitm
;
1577 right_bit
= mask
& -mask
;
1579 right_bit
= mask
& -mask
;
1580 if (mask
!= right_bit
)
1582 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1585 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1586 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1587 sizeof (powerpc_operands
[0])) == 0)
1589 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1596 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1597 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1599 if (ENABLE_CHECKING
)
1601 if (op
!= powerpc_opcodes
)
1603 int old_opcode
= PPC_OP (op
[-1].opcode
);
1604 int new_opcode
= PPC_OP (op
[0].opcode
);
1606 #ifdef PRINT_OPCODE_TABLE
1607 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1608 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1609 (unsigned int) new_opcode
, (unsigned long long) op
->opcode
,
1610 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1613 /* The major opcodes had better be sorted. Code in the
1614 disassembler assumes the insns are sorted according to
1616 if (new_opcode
< old_opcode
)
1618 as_bad (_("major opcode is not sorted for %s"),
1623 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1625 as_bad (_("%s is enabled by vle flag"), op
->name
);
1628 if (PPC_OP (op
->opcode
) != 4
1629 && PPC_OP (op
->opcode
) != 31
1630 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1632 as_bad (_("%s not disabled by vle flag"), op
->name
);
1635 bad_insn
|= insn_validate (op
);
1638 if ((ppc_cpu
& op
->flags
) != 0
1639 && !(ppc_cpu
& op
->deprecated
))
1643 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1646 as_bad (_("duplicate instruction %s"),
1653 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1654 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1655 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1657 op_end
= vle_opcodes
+ vle_num_opcodes
;
1658 for (op
= vle_opcodes
; op
< op_end
; op
++)
1660 if (ENABLE_CHECKING
)
1662 if (op
!= vle_opcodes
)
1664 unsigned old_seg
, new_seg
;
1666 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1667 old_seg
= VLE_OP_TO_SEG (old_seg
);
1668 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1669 new_seg
= VLE_OP_TO_SEG (new_seg
);
1671 #ifdef PRINT_OPCODE_TABLE
1672 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1673 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1674 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1675 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1677 /* The major opcodes had better be sorted. Code in the
1678 disassembler assumes the insns are sorted according to
1680 if (new_seg
< old_seg
)
1682 as_bad (_("major opcode is not sorted for %s"),
1688 bad_insn
|= insn_validate (op
);
1691 if ((ppc_cpu
& op
->flags
) != 0
1692 && !(ppc_cpu
& op
->deprecated
))
1696 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1699 as_bad (_("duplicate instruction %s"),
1706 /* SPE2 instructions */
1707 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1709 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1710 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1712 if (ENABLE_CHECKING
)
1714 if (op
!= spe2_opcodes
)
1716 unsigned old_seg
, new_seg
;
1718 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1719 old_seg
= VLE_OP_TO_SEG (old_seg
);
1720 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1721 new_seg
= VLE_OP_TO_SEG (new_seg
);
1723 /* The major opcodes had better be sorted. Code in the
1724 disassembler assumes the insns are sorted according to
1726 if (new_seg
< old_seg
)
1728 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1733 bad_insn
|= insn_validate (op
);
1736 if ((ppc_cpu
& op
->flags
) != 0 && !(ppc_cpu
& op
->deprecated
))
1740 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1743 as_bad (_("duplicate instruction %s"),
1750 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1751 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1754 /* Insert the macros into a hash table. */
1755 ppc_macro_hash
= hash_new ();
1757 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1758 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1760 if ((macro
->flags
& ppc_cpu
) != 0 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1764 retval
= hash_insert (ppc_macro_hash
, macro
->name
, (void *) macro
);
1765 if (retval
!= (const char *) NULL
)
1767 as_bad (_("duplicate macro %s"), macro
->name
);
1777 /* This function is called when the assembler starts up. It is called
1778 after the options have been parsed and the output file has been
1786 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1787 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1790 /* Set the ELF flags if desired. */
1791 if (ppc_flags
&& !msolaris
)
1792 bfd_set_private_flags (stdoutput
, ppc_flags
);
1795 ppc_setup_opcodes ();
1797 /* Tell the main code what the endianness is if it is not overridden
1799 if (!set_target_endian
)
1801 set_target_endian
= 1;
1802 target_big_endian
= PPC_BIG_ENDIAN
;
1806 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1808 /* Create dummy symbols to serve as initial csects. This forces the
1809 text csects to precede the data csects. These symbols will not
1811 ppc_text_csects
= symbol_make ("dummy\001");
1812 symbol_get_tc (ppc_text_csects
)->within
= ppc_text_csects
;
1813 ppc_data_csects
= symbol_make ("dummy\001");
1814 symbol_get_tc (ppc_data_csects
)->within
= ppc_data_csects
;
1819 ppc_current_section
= text_section
;
1820 ppc_previous_section
= 0;
1829 if (ppc_apuinfo_list
== NULL
)
1832 /* Ok, so write the section info out. We have this layout:
1836 0 8 length of "APUinfo\0"
1837 4 (n*4) number of APU's (4 bytes each)
1840 20 APU#1 first APU's info
1841 24 APU#2 second APU's info
1846 asection
*seg
= now_seg
;
1847 subsegT subseg
= now_subseg
;
1848 asection
*apuinfo_secp
= (asection
*) NULL
;
1851 /* Create the .PPC.EMB.apuinfo section. */
1852 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1853 bfd_set_section_flags (stdoutput
,
1855 SEC_HAS_CONTENTS
| SEC_READONLY
);
1858 md_number_to_chars (p
, (valueT
) 8, 4);
1861 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1864 md_number_to_chars (p
, (valueT
) 2, 4);
1867 strcpy (p
, APUINFO_LABEL
);
1869 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1872 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1875 frag_align (2, 0, 0);
1877 /* We probably can't restore the current segment, for there likely
1880 subseg_set (seg
, subseg
);
1885 /* Insert an operand value into an instruction. */
1888 ppc_insert_operand (uint64_t insn
,
1889 const struct powerpc_operand
*operand
,
1895 int64_t min
, max
, right
;
1897 max
= operand
->bitm
;
1901 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
1903 /* Extend the allowed range for addis to [-32768, 65535].
1904 Similarly for cmpli and some VLE high part insns. For 64-bit
1905 it would be good to disable this for signed fields since the
1906 value is sign extended into the high 32 bits of the register.
1907 If the value is, say, an address, then we might care about
1908 the high bits. However, gcc as of 2014-06 uses unsigned
1909 values when loading the high part of 64-bit constants using
1911 min
= ~(max
>> 1) & -right
;
1913 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
1915 max
= (max
>> 1) & -right
;
1916 min
= ~max
& -right
;
1919 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1922 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1931 /* Some people write constants with the sign extension done by
1932 hand but only up to 32 bits. This shouldn't really be valid,
1933 but, to permit this code to assemble on a 64-bit host, we
1934 sign extend the 32-bit value to 64 bits if so doing makes the
1937 && (val
- (1LL << 32)) >= min
1938 && (val
- (1LL << 32)) <= max
1939 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
1940 val
= val
- (1LL << 32);
1942 /* Similarly, people write expressions like ~(1<<15), and expect
1943 this to be OK for a 32-bit unsigned value. */
1945 && (val
+ (1LL << 32)) >= min
1946 && (val
+ (1LL << 32)) <= max
1947 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
1948 val
= val
+ (1LL << 32);
1952 || (val
& (right
- 1)) != 0)
1953 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
1956 if (operand
->insert
)
1961 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
1962 if (errmsg
!= (const char *) NULL
)
1963 as_bad_where (file
, line
, "%s", errmsg
);
1965 else if (operand
->shift
>= 0)
1966 insn
|= (val
& operand
->bitm
) << operand
->shift
;
1968 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
1975 /* Parse @got, etc. and return the desired relocation. */
1976 static bfd_reloc_code_real_type
1977 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
1981 unsigned int length
: 8;
1982 unsigned int valid32
: 1;
1983 unsigned int valid64
: 1;
1992 const struct map_bfd
*ptr
;
1994 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1995 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1996 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1998 static const struct map_bfd mapping
[] = {
1999 MAP ("l", BFD_RELOC_LO16
),
2000 MAP ("h", BFD_RELOC_HI16
),
2001 MAP ("ha", BFD_RELOC_HI16_S
),
2002 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2003 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2004 MAP ("got", BFD_RELOC_16_GOTOFF
),
2005 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2006 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2007 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2008 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2009 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2010 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2011 MAP ("copy", BFD_RELOC_PPC_COPY
),
2012 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2013 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2014 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2015 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2016 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2017 MAP ("tls", BFD_RELOC_PPC_TLS
),
2018 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2019 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2020 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2021 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2022 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2023 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2024 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2025 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2026 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2027 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2028 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2029 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2030 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2031 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2032 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2033 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2034 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2035 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2036 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2037 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2038 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2039 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2040 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2041 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2042 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2043 MAP32 ("fixup", BFD_RELOC_CTOR
),
2044 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2045 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2046 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2047 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2048 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2049 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2050 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2051 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2052 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2053 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2054 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2055 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2056 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2057 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2058 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2059 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2060 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2061 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2062 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2063 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2064 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2065 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2066 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2067 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2068 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2069 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2070 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2071 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2072 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2073 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2074 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2075 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2076 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2077 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2078 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2079 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2080 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2081 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2082 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2083 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2084 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2085 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2086 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2087 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2088 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2089 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2090 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2091 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2092 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2093 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2094 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2095 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2099 return BFD_RELOC_NONE
;
2101 for (ch
= *str
, str2
= ident
;
2102 (str2
< ident
+ sizeof (ident
) - 1
2103 && (ISALNUM (ch
) || ch
== '@'));
2106 *str2
++ = TOLOWER (ch
);
2113 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2114 if (ch
== ptr
->string
[0]
2115 && len
== ptr
->length
2116 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2117 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2119 int reloc
= ptr
->reloc
;
2121 if (!ppc_obj64
&& exp_p
->X_add_number
!= 0)
2125 case BFD_RELOC_16_GOTOFF
:
2126 case BFD_RELOC_LO16_GOTOFF
:
2127 case BFD_RELOC_HI16_GOTOFF
:
2128 case BFD_RELOC_HI16_S_GOTOFF
:
2129 as_warn (_("identifier+constant@got means "
2130 "identifier@got+constant"));
2133 case BFD_RELOC_PPC_GOT_TLSGD16
:
2134 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2135 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2136 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2137 case BFD_RELOC_PPC_GOT_TLSLD16
:
2138 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2139 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2140 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2141 case BFD_RELOC_PPC_GOT_DTPREL16
:
2142 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2143 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2144 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2145 case BFD_RELOC_PPC_GOT_TPREL16
:
2146 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2147 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2148 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2149 as_bad (_("symbol+offset not supported for got tls"));
2154 /* Now check for identifier@suffix+constant. */
2155 if (*str
== '-' || *str
== '+')
2157 char *orig_line
= input_line_pointer
;
2158 expressionS new_exp
;
2160 input_line_pointer
= str
;
2161 expression (&new_exp
);
2162 if (new_exp
.X_op
== O_constant
)
2164 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2165 str
= input_line_pointer
;
2168 if (&input_line_pointer
!= str_p
)
2169 input_line_pointer
= orig_line
;
2173 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2174 && exp_p
->X_op
== O_symbol
2175 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2177 /* Change the symbol so that the dummy .TOC. symbol can be
2178 omitted from the object file. */
2179 exp_p
->X_add_symbol
= &abs_symbol
;
2182 return (bfd_reloc_code_real_type
) reloc
;
2185 return BFD_RELOC_NONE
;
2188 /* Support @got, etc. on constants emitted via .short, .int etc. */
2190 bfd_reloc_code_real_type
2191 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2194 if (nbytes
>= 2 && *input_line_pointer
== '@')
2195 return ppc_elf_suffix (&input_line_pointer
, exp
);
2196 return BFD_RELOC_NONE
;
2199 /* Warn when emitting data to code sections, unless we are emitting
2200 a relocation that ld --ppc476-workaround uses to recognise data
2201 *and* there was an unconditional branch prior to the data. */
2204 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2205 unsigned int nbytes
, fixS
*fix
)
2208 && (now_seg
->flags
& SEC_CODE
) != 0
2211 || !(fix
->fx_r_type
== BFD_RELOC_32
2212 || fix
->fx_r_type
== BFD_RELOC_CTOR
2213 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2214 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2215 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2216 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2217 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2218 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2219 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2220 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2222 /* Flag that we've warned. */
2226 as_warn (_("data in executable section"));
2230 /* Solaris pseduo op to change to the .rodata section. */
2232 ppc_elf_rdata (int xxx
)
2234 char *save_line
= input_line_pointer
;
2235 static char section
[] = ".rodata\n";
2237 /* Just pretend this is .section .rodata */
2238 input_line_pointer
= section
;
2239 obj_elf_section (xxx
);
2241 input_line_pointer
= save_line
;
2244 /* Pseudo op to make file scope bss items. */
2246 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2259 c
= get_symbol_name (&name
);
2261 /* Just after name is now '\0'. */
2262 p
= input_line_pointer
;
2264 SKIP_WHITESPACE_AFTER_NAME ();
2265 if (*input_line_pointer
!= ',')
2267 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2268 ignore_rest_of_line ();
2272 input_line_pointer
++; /* skip ',' */
2273 if ((size
= get_absolute_expression ()) < 0)
2275 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2276 ignore_rest_of_line ();
2280 /* The third argument to .lcomm is the alignment. */
2281 if (*input_line_pointer
!= ',')
2285 ++input_line_pointer
;
2286 align
= get_absolute_expression ();
2289 as_warn (_("ignoring bad alignment"));
2295 symbolP
= symbol_find_or_make (name
);
2298 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2300 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2301 S_GET_NAME (symbolP
));
2302 ignore_rest_of_line ();
2306 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2308 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2309 S_GET_NAME (symbolP
),
2310 (long) S_GET_VALUE (symbolP
),
2313 ignore_rest_of_line ();
2319 old_subsec
= now_subseg
;
2322 /* Convert to a power of 2 alignment. */
2323 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2326 as_bad (_("common alignment not a power of 2"));
2327 ignore_rest_of_line ();
2334 record_alignment (bss_section
, align2
);
2335 subseg_set (bss_section
, 1);
2337 frag_align (align2
, 0, 0);
2338 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2339 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2340 symbol_set_frag (symbolP
, frag_now
);
2341 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2344 S_SET_SIZE (symbolP
, size
);
2345 S_SET_SEGMENT (symbolP
, bss_section
);
2346 subseg_set (old_sec
, old_subsec
);
2347 demand_empty_rest_of_line ();
2350 /* Pseudo op to set symbol local entry point. */
2352 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2355 char c
= get_symbol_name (&name
);
2360 elf_symbol_type
*elfsym
;
2362 p
= input_line_pointer
;
2364 SKIP_WHITESPACE_AFTER_NAME ();
2365 if (*input_line_pointer
!= ',')
2368 as_bad (_("expected comma after name `%s' in .localentry directive"),
2371 ignore_rest_of_line ();
2374 input_line_pointer
++;
2376 if (exp
.X_op
== O_absent
)
2378 as_bad (_("missing expression in .localentry directive"));
2379 exp
.X_op
= O_constant
;
2380 exp
.X_add_number
= 0;
2383 sym
= symbol_find_or_make (name
);
2386 if (resolve_expression (&exp
)
2387 && exp
.X_op
== O_constant
)
2389 unsigned char encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2391 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2392 as_bad (_(".localentry expression for `%s' "
2393 "is not a valid power of 2"), S_GET_NAME (sym
));
2396 bfdsym
= symbol_get_bfdsym (sym
);
2397 elfsym
= elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
2398 gas_assert (elfsym
);
2399 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2400 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2401 if (ppc_abiversion
== 0)
2406 as_bad (_(".localentry expression for `%s' "
2407 "does not evaluate to a constant"), S_GET_NAME (sym
));
2409 demand_empty_rest_of_line ();
2412 /* Pseudo op to set ABI version. */
2414 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2419 if (exp
.X_op
== O_absent
)
2421 as_bad (_("missing expression in .abiversion directive"));
2422 exp
.X_op
= O_constant
;
2423 exp
.X_add_number
= 0;
2426 if (resolve_expression (&exp
)
2427 && exp
.X_op
== O_constant
)
2428 ppc_abiversion
= exp
.X_add_number
;
2430 as_bad (_(".abiversion expression does not evaluate to a constant"));
2431 demand_empty_rest_of_line ();
2434 /* Parse a .gnu_attribute directive. */
2436 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2438 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2440 /* Check validity of defined powerpc tags. */
2441 if (tag
== Tag_GNU_Power_ABI_FP
2442 || tag
== Tag_GNU_Power_ABI_Vector
2443 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2447 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2449 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2450 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2451 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2452 as_warn (_("unknown .gnu_attribute value"));
2456 /* Set ABI version in output file. */
2460 if (ppc_obj64
&& ppc_abiversion
!= 0)
2462 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2463 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2467 /* Validate any relocations emitted for -mrelocatable, possibly adding
2468 fixups for word relocations in writable segments, so we can adjust
2471 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2473 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2482 case SHLIB_MRELOCATABLE
:
2483 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2484 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2485 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2486 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2487 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2488 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2489 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2490 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2491 && (seg
->flags
& SEC_LOAD
) != 0
2492 && strcmp (segment_name (seg
), ".got2") != 0
2493 && strcmp (segment_name (seg
), ".dtors") != 0
2494 && strcmp (segment_name (seg
), ".ctors") != 0
2495 && strcmp (segment_name (seg
), ".fixup") != 0
2496 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2497 && strcmp (segment_name (seg
), ".eh_frame") != 0
2498 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2500 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2501 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2503 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2504 _("relocation cannot be done when using -mrelocatable"));
2511 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2512 function descriptor sym if the corresponding code sym is used. */
2515 ppc_frob_file_before_adjust (void)
2523 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2529 name
= S_GET_NAME (symp
);
2533 if (! S_IS_WEAK (symp
)
2534 || S_IS_DEFINED (symp
))
2537 dotname
= concat (".", name
, (char *) NULL
);
2538 dotsym
= symbol_find_noref (dotname
, 1);
2540 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2541 || symbol_used_in_reloc_p (dotsym
)))
2542 symbol_mark_used (symp
);
2546 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2548 && toc_reloc_types
!= has_large_toc_reloc
2549 && bfd_section_size (stdoutput
, toc
) > 0x10000)
2550 as_warn (_("TOC section size exceeds 64k"));
2553 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2554 emitted. Other uses of .TOC. will cause the symbol to be marked
2555 with BSF_KEEP in md_apply_fix. */
2558 ppc_elf_adjust_symtab (void)
2563 symp
= symbol_find (".TOC.");
2566 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2567 if ((bsym
->flags
& BSF_KEEP
) == 0)
2568 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2572 #endif /* OBJ_ELF */
2577 * Summary of parse_toc_entry.
2579 * in: Input_line_pointer points to the '[' in one of:
2581 * [toc] [tocv] [toc32] [toc64]
2583 * Anything else is an error of one kind or another.
2586 * return value: success or failure
2587 * toc_kind: kind of toc reference
2588 * input_line_pointer:
2589 * success: first char after the ']'
2590 * failure: unchanged
2594 * [toc] - rv == success, toc_kind = default_toc
2595 * [tocv] - rv == success, toc_kind = data_in_toc
2596 * [toc32] - rv == success, toc_kind = must_be_32
2597 * [toc64] - rv == success, toc_kind = must_be_64
2601 enum toc_size_qualifier
2603 default_toc
, /* The toc cell constructed should be the system default size */
2604 data_in_toc
, /* This is a direct reference to a toc cell */
2605 must_be_32
, /* The toc cell constructed must be 32 bits wide */
2606 must_be_64
/* The toc cell constructed must be 64 bits wide */
2610 parse_toc_entry (enum toc_size_qualifier
*toc_kind
)
2615 enum toc_size_qualifier t
;
2617 /* Save the input_line_pointer. */
2618 start
= input_line_pointer
;
2620 /* Skip over the '[' , and whitespace. */
2621 ++input_line_pointer
;
2624 /* Find the spelling of the operand. */
2625 c
= get_symbol_name (&toc_spec
);
2627 if (strcmp (toc_spec
, "toc") == 0)
2631 else if (strcmp (toc_spec
, "tocv") == 0)
2635 else if (strcmp (toc_spec
, "toc32") == 0)
2639 else if (strcmp (toc_spec
, "toc64") == 0)
2645 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec
);
2646 *input_line_pointer
= c
;
2647 input_line_pointer
= start
;
2651 /* Now find the ']'. */
2652 *input_line_pointer
= c
;
2654 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2655 c
= *input_line_pointer
++; /* input_line_pointer->past char in c. */
2659 as_bad (_("syntax error: expected `]', found `%c'"), c
);
2660 input_line_pointer
= start
;
2669 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2670 /* See whether a symbol is in the TOC section. */
2673 ppc_is_toc_sym (symbolS
*sym
)
2676 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2677 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2680 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2682 return strcmp (sname
, ".toc") == 0;
2684 return strcmp (sname
, ".got") == 0;
2687 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2691 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2693 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2697 /* Check we don't already exist. */
2698 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2699 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2702 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2704 if (ppc_apuinfo_num_alloc
== 0)
2706 ppc_apuinfo_num_alloc
= 4;
2707 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2711 ppc_apuinfo_num_alloc
+= 4;
2712 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2713 ppc_apuinfo_num_alloc
);
2716 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2722 /* We need to keep a list of fixups. We can't simply generate them as
2723 we go, because that would require us to first create the frag, and
2724 that would screw up references to ``.''. */
2730 bfd_reloc_code_real_type reloc
;
2733 #define MAX_INSN_FIXUPS (5)
2735 /* This routine is called for each instruction to be assembled. */
2738 md_assemble (char *str
)
2741 const struct powerpc_opcode
*opcode
;
2743 const unsigned char *opindex_ptr
;
2747 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
2752 unsigned int insn_length
;
2754 /* Get the opcode. */
2755 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
2760 /* Look up the opcode in the hash table. */
2761 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, str
);
2762 if (opcode
== (const struct powerpc_opcode
*) NULL
)
2764 const struct powerpc_macro
*macro
;
2766 macro
= (const struct powerpc_macro
*) hash_find (ppc_macro_hash
, str
);
2767 if (macro
== (const struct powerpc_macro
*) NULL
)
2768 as_bad (_("unrecognized opcode: `%s'"), str
);
2770 ppc_macro (s
, macro
);
2775 insn
= opcode
->opcode
;
2778 while (ISSPACE (*str
))
2781 /* PowerPC operands are just expressions. The only real issue is
2782 that a few operand types are optional. All cases which might use
2783 an optional operand separate the operands only with commas (in some
2784 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2785 have optional operands). Most instructions with optional operands
2786 have only one. Those that have more than one optional operand can
2787 take either all their operands or none. So, before we start seriously
2788 parsing the operands, we check to see if we have optional operands,
2789 and if we do, we count the number of commas to see which operands
2790 have been omitted. */
2792 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
2794 const struct powerpc_operand
*operand
;
2796 operand
= &powerpc_operands
[*opindex_ptr
];
2797 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
2798 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
2800 unsigned int opcount
;
2801 unsigned int num_operands_expected
;
2803 /* There is an optional operand. Count the number of
2804 commas in the input line. */
2811 while ((s
= strchr (s
, ',')) != (char *) NULL
)
2818 /* Compute the number of expected operands.
2819 Do not count fake operands. */
2820 for (num_operands_expected
= 0, i
= 0; opcode
->operands
[i
]; i
++)
2821 if ((powerpc_operands
[opcode
->operands
[i
]].flags
& PPC_OPERAND_FAKE
) == 0)
2822 ++ num_operands_expected
;
2824 /* If there are fewer operands in the line then are called
2825 for by the instruction, we want to skip the optional
2827 if (opcount
< num_operands_expected
)
2834 /* Gather the operands. */
2838 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
2840 const struct powerpc_operand
*operand
;
2846 if (next_opindex
== 0)
2847 operand
= &powerpc_operands
[*opindex_ptr
];
2850 operand
= &powerpc_operands
[next_opindex
];
2855 /* If this is a fake operand, then we do not expect anything
2857 if ((operand
->flags
& PPC_OPERAND_FAKE
) != 0)
2859 insn
= (*operand
->insert
) (insn
, 0L, ppc_cpu
, &errmsg
);
2860 if (errmsg
!= (const char *) NULL
)
2861 as_bad ("%s", errmsg
);
2865 /* If this is an optional operand, and we are skipping it, just
2867 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
2868 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
)
2871 int64_t val
= ppc_optional_operand_value (operand
);
2872 if (operand
->insert
)
2874 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
2875 if (errmsg
!= (const char *) NULL
)
2876 as_bad ("%s", errmsg
);
2878 else if (operand
->shift
>= 0)
2879 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2881 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2883 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
2884 next_opindex
= *opindex_ptr
+ 1;
2888 /* Gather the operand. */
2889 hold
= input_line_pointer
;
2890 input_line_pointer
= str
;
2893 if (*input_line_pointer
== '[')
2895 /* We are expecting something like the second argument here:
2897 * lwz r4,[toc].GS.0.static_int(rtoc)
2898 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2899 * The argument following the `]' must be a symbol name, and the
2900 * register must be the toc register: 'rtoc' or '2'
2902 * The effect is to 0 as the displacement field
2903 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2904 * the appropriate variation) reloc against it based on the symbol.
2905 * The linker will build the toc, and insert the resolved toc offset.
2908 * o The size of the toc entry is currently assumed to be
2909 * 32 bits. This should not be assumed to be a hard coded
2911 * o In an effort to cope with a change from 32 to 64 bits,
2912 * there are also toc entries that are specified to be
2913 * either 32 or 64 bits:
2914 * lwz r4,[toc32].GS.0.static_int(rtoc)
2915 * lwz r4,[toc64].GS.0.static_int(rtoc)
2916 * These demand toc entries of the specified size, and the
2917 * instruction probably requires it.
2921 enum toc_size_qualifier toc_kind
;
2922 bfd_reloc_code_real_type toc_reloc
;
2924 /* Go parse off the [tocXX] part. */
2925 valid_toc
= parse_toc_entry (&toc_kind
);
2929 ignore_rest_of_line ();
2933 /* Now get the symbol following the ']'. */
2939 /* In this case, we may not have seen the symbol yet,
2940 since it is allowed to appear on a .extern or .globl
2941 or just be a label in the .data section. */
2942 toc_reloc
= BFD_RELOC_PPC_TOC16
;
2945 /* 1. The symbol must be defined and either in the toc
2946 section, or a global.
2947 2. The reloc generated must have the TOCDEFN flag set
2948 in upper bit mess of the reloc type.
2949 FIXME: It's a little confusing what the tocv
2950 qualifier can be used for. At the very least, I've
2951 seen three uses, only one of which I'm sure I can
2953 if (ex
.X_op
== O_symbol
)
2955 gas_assert (ex
.X_add_symbol
!= NULL
);
2956 if (symbol_get_bfdsym (ex
.X_add_symbol
)->section
2959 as_bad (_("[tocv] symbol is not a toc symbol"));
2963 toc_reloc
= BFD_RELOC_PPC_TOC16
;
2966 /* FIXME: these next two specifically specify 32/64 bit
2967 toc entries. We don't support them today. Is this
2968 the right way to say that? */
2969 toc_reloc
= BFD_RELOC_NONE
;
2970 as_bad (_("unimplemented toc32 expression modifier"));
2973 /* FIXME: see above. */
2974 toc_reloc
= BFD_RELOC_NONE
;
2975 as_bad (_("unimplemented toc64 expression modifier"));
2979 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2985 /* We need to generate a fixup for this expression. */
2986 if (fc
>= MAX_INSN_FIXUPS
)
2987 as_fatal (_("too many fixups"));
2989 fixups
[fc
].reloc
= toc_reloc
;
2990 fixups
[fc
].exp
= ex
;
2991 fixups
[fc
].opindex
= *opindex_ptr
;
2994 /* Ok. We've set up the fixup for the instruction. Now make it
2995 look like the constant 0 was found here. */
2997 ex
.X_op
= O_constant
;
2998 ex
.X_add_number
= 0;
2999 ex
.X_add_symbol
= NULL
;
3000 ex
.X_op_symbol
= NULL
;
3007 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3008 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
3009 || !register_name (&ex
))
3011 char save_lex
= lex_type
['%'];
3013 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
3014 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3017 lex_type
['%'] |= LEX_BEGIN_NAME
;
3021 lex_type
['%'] = save_lex
;
3025 str
= input_line_pointer
;
3026 input_line_pointer
= hold
;
3028 if (ex
.X_op
== O_illegal
)
3029 as_bad (_("illegal operand"));
3030 else if (ex
.X_op
== O_absent
)
3031 as_bad (_("missing operand"));
3032 else if (ex
.X_op
== O_register
)
3036 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3037 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3038 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
)) != 0
3039 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3040 && ex
.X_add_number
!= 0
3041 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3042 as_warn (_("invalid register expression"));
3043 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3044 ppc_cpu
, (char *) NULL
, 0);
3046 else if (ex
.X_op
== O_constant
)
3049 /* Allow @HA, @L, @H on constants. */
3050 bfd_reloc_code_real_type reloc
;
3051 char *orig_str
= str
;
3053 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3060 case BFD_RELOC_LO16
:
3061 ex
.X_add_number
&= 0xffff;
3062 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3063 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3066 case BFD_RELOC_HI16
:
3067 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3069 /* PowerPC64 @h is tested for overflow. */
3070 ex
.X_add_number
= (addressT
) ex
.X_add_number
>> 16;
3071 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3073 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3075 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3081 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3082 ex
.X_add_number
= PPC_HI (ex
.X_add_number
);
3083 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3084 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3087 case BFD_RELOC_HI16_S
:
3088 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3090 /* PowerPC64 @ha is tested for overflow. */
3092 = ((addressT
) ex
.X_add_number
+ 0x8000) >> 16;
3093 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3095 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3097 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3103 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3104 ex
.X_add_number
= PPC_HA (ex
.X_add_number
);
3105 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3106 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3109 case BFD_RELOC_PPC64_HIGHER
:
3110 ex
.X_add_number
= PPC_HIGHER (ex
.X_add_number
);
3111 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3112 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3115 case BFD_RELOC_PPC64_HIGHER_S
:
3116 ex
.X_add_number
= PPC_HIGHERA (ex
.X_add_number
);
3117 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3118 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3121 case BFD_RELOC_PPC64_HIGHEST
:
3122 ex
.X_add_number
= PPC_HIGHEST (ex
.X_add_number
);
3123 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3124 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3127 case BFD_RELOC_PPC64_HIGHEST_S
:
3128 ex
.X_add_number
= PPC_HIGHESTA (ex
.X_add_number
);
3129 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3130 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3133 #endif /* OBJ_ELF */
3134 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3135 ppc_cpu
, (char *) NULL
, 0);
3139 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3141 if (ex
.X_op
== O_symbol
&& str
[0] == '(')
3143 const char *sym_name
= S_GET_NAME (ex
.X_add_symbol
);
3144 if (sym_name
[0] == '.')
3147 if (strcasecmp (sym_name
, "__tls_get_addr") == 0)
3149 expressionS tls_exp
;
3151 hold
= input_line_pointer
;
3152 input_line_pointer
= str
+ 1;
3153 expression (&tls_exp
);
3154 if (tls_exp
.X_op
== O_symbol
)
3156 reloc
= BFD_RELOC_NONE
;
3157 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3159 reloc
= BFD_RELOC_PPC_TLSGD
;
3160 input_line_pointer
+= 7;
3162 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3164 reloc
= BFD_RELOC_PPC_TLSLD
;
3165 input_line_pointer
+= 7;
3167 if (reloc
!= BFD_RELOC_NONE
)
3170 str
= input_line_pointer
;
3172 if (fc
>= MAX_INSN_FIXUPS
)
3173 as_fatal (_("too many fixups"));
3174 fixups
[fc
].exp
= tls_exp
;
3175 fixups
[fc
].opindex
= *opindex_ptr
;
3176 fixups
[fc
].reloc
= reloc
;
3180 input_line_pointer
= hold
;
3184 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3186 /* Some TLS tweaks. */
3192 case BFD_RELOC_PPC_TLS
:
3193 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3194 as_bad (_("@tls may not be used with \"%s\" operands"),
3196 else if (operand
->shift
!= 11)
3197 as_bad (_("@tls may only be used in last operand"));
3199 insn
= ppc_insert_operand (insn
, operand
,
3201 ppc_cpu
, (char *) NULL
, 0);
3204 /* We'll only use the 32 (or 64) bit form of these relocations
3205 in constants. Instructions get the 16 bit form. */
3206 case BFD_RELOC_PPC_DTPREL
:
3207 reloc
= BFD_RELOC_PPC_DTPREL16
;
3209 case BFD_RELOC_PPC_TPREL
:
3210 reloc
= BFD_RELOC_PPC_TPREL16
;
3215 if (opcode
->opcode
== (19 << 26) + (2 << 1)
3216 && reloc
== BFD_RELOC_HI16_S
)
3217 reloc
= BFD_RELOC_PPC_16DX_HA
;
3219 /* If VLE-mode convert LO/HI/HA relocations. */
3220 if (opcode
->flags
& PPC_OPCODE_VLE
)
3222 uint64_t tmp_insn
= insn
& opcode
->mask
;
3224 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3225 || tmp_insn
== E_AND2I_DOT_INSN
3226 || tmp_insn
== E_OR2IS_INSN
3227 || tmp_insn
== E_LIS_INSN
3228 || tmp_insn
== E_AND2IS_DOT_INSN
);
3231 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3232 || tmp_insn
== E_ADD2IS_INSN
3233 || tmp_insn
== E_CMP16I_INSN
3234 || tmp_insn
== E_MULL2I_INSN
3235 || tmp_insn
== E_CMPL16I_INSN
3236 || tmp_insn
== E_CMPH16I_INSN
3237 || tmp_insn
== E_CMPHL16I_INSN
);
3244 case BFD_RELOC_PPC_EMB_SDA21
:
3245 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3248 case BFD_RELOC_LO16
:
3250 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3251 else if (use_a_reloc
)
3252 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3255 case BFD_RELOC_HI16
:
3257 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3258 else if (use_a_reloc
)
3259 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3262 case BFD_RELOC_HI16_S
:
3264 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3265 else if (use_a_reloc
)
3266 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3269 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3271 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3274 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3276 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3279 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3281 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3286 #endif /* OBJ_ELF */
3288 if (reloc
!= BFD_RELOC_NONE
)
3290 /* Determine a BFD reloc value based on the operand information.
3291 We are only prepared to turn a few of the operands into
3293 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3294 | PPC_OPERAND_ABSOLUTE
)) != 0
3295 && operand
->bitm
== 0x3fffffc
3296 && operand
->shift
== 0)
3297 reloc
= BFD_RELOC_PPC_B26
;
3298 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3299 | PPC_OPERAND_ABSOLUTE
)) != 0
3300 && operand
->bitm
== 0xfffc
3301 && operand
->shift
== 0)
3302 reloc
= BFD_RELOC_PPC_B16
;
3303 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3304 && operand
->bitm
== 0x1fe
3305 && operand
->shift
== -1)
3306 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3307 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3308 && operand
->bitm
== 0xfffe
3309 && operand
->shift
== 0)
3310 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3311 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3312 && operand
->bitm
== 0x1fffffe
3313 && operand
->shift
== 0)
3314 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3315 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3316 && (operand
->bitm
& 0xfff0) == 0xfff0
3317 && operand
->shift
== 0)
3319 reloc
= BFD_RELOC_16
;
3320 #if defined OBJ_XCOFF || defined OBJ_ELF
3321 /* Note: the symbol may be not yet defined. */
3322 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3323 && ppc_is_toc_sym (ex
.X_add_symbol
))
3325 reloc
= BFD_RELOC_PPC_TOC16
;
3327 as_warn (_("assuming %s on symbol"),
3328 ppc_obj64
? "@toc" : "@xgot");
3334 /* For the absolute forms of branches, convert the PC
3335 relative form back into the absolute. */
3336 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3340 case BFD_RELOC_PPC_B26
:
3341 reloc
= BFD_RELOC_PPC_BA26
;
3343 case BFD_RELOC_PPC_B16
:
3344 reloc
= BFD_RELOC_PPC_BA16
;
3347 case BFD_RELOC_PPC_B16_BRTAKEN
:
3348 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3350 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3351 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3362 case BFD_RELOC_PPC_TOC16
:
3363 toc_reloc_types
|= has_small_toc_reloc
;
3365 case BFD_RELOC_PPC64_TOC16_LO
:
3366 case BFD_RELOC_PPC64_TOC16_HI
:
3367 case BFD_RELOC_PPC64_TOC16_HA
:
3368 toc_reloc_types
|= has_large_toc_reloc
;
3375 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3380 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3382 case BFD_RELOC_LO16
:
3383 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3385 case BFD_RELOC_16_GOTOFF
:
3386 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3388 case BFD_RELOC_LO16_GOTOFF
:
3389 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3391 case BFD_RELOC_LO16_PLTOFF
:
3392 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3394 case BFD_RELOC_16_BASEREL
:
3395 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3397 case BFD_RELOC_LO16_BASEREL
:
3398 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3400 case BFD_RELOC_PPC_TOC16
:
3401 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3403 case BFD_RELOC_PPC64_TOC16_LO
:
3404 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3406 case BFD_RELOC_PPC64_PLTGOT16
:
3407 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3409 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3410 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3412 case BFD_RELOC_PPC_DTPREL16
:
3413 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3415 case BFD_RELOC_PPC_DTPREL16_LO
:
3416 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3418 case BFD_RELOC_PPC_TPREL16
:
3419 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3421 case BFD_RELOC_PPC_TPREL16_LO
:
3422 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3424 case BFD_RELOC_PPC_GOT_DTPREL16
:
3425 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3426 case BFD_RELOC_PPC_GOT_TPREL16
:
3427 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3430 as_bad (_("unsupported relocation for DS offset field"));
3436 /* We need to generate a fixup for this expression. */
3437 if (fc
>= MAX_INSN_FIXUPS
)
3438 as_fatal (_("too many fixups"));
3439 fixups
[fc
].exp
= ex
;
3440 fixups
[fc
].opindex
= *opindex_ptr
;
3441 fixups
[fc
].reloc
= reloc
;
3449 /* If expecting more operands, then we want to see "),". */
3450 if (*str
== endc
&& opindex_ptr
[1] != 0)
3454 while (ISSPACE (*str
));
3458 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
3466 /* The call to expression should have advanced str past any
3469 && (endc
!= ',' || *str
!= '\0'))
3472 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
3474 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
3482 while (ISSPACE (*str
))
3486 as_bad (_("junk at end of line: `%s'"), str
);
3489 /* Do we need/want an APUinfo section? */
3490 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
3493 /* These are all version "1". */
3494 if (opcode
->flags
& PPC_OPCODE_SPE
)
3495 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
3496 if (opcode
->flags
& PPC_OPCODE_ISEL
)
3497 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
3498 if (opcode
->flags
& PPC_OPCODE_EFS
)
3499 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
3500 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
3501 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
3502 if (opcode
->flags
& PPC_OPCODE_PMR
)
3503 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
3504 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
3505 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
3506 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
3507 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
3508 /* Only set the VLE flag if the instruction has been pulled via
3509 the VLE instruction set. This way the flag is guaranteed to
3510 be set for VLE-only instructions or for VLE-only processors,
3511 however it'll remain clear for dual-mode instructions on
3512 dual-mode and, more importantly, standard-mode processors. */
3513 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
3515 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
3516 if (elf_section_data (now_seg
) != NULL
)
3517 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
3522 /* Write out the instruction. */
3525 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
3526 /* All instructions can start on a 2 byte boundary for VLE. */
3529 if (frag_now
->insn_addr
!= addr_mask
)
3531 /* Don't emit instructions to a frag started for data, or for a
3532 CPU differing in VLE mode. Data is allowed to be misaligned,
3533 and it's possible to start a new frag in the middle of
3535 frag_wane (frag_now
);
3539 /* Check that insns within the frag are aligned. ppc_frag_check
3540 will ensure that the frag start address is aligned. */
3541 if ((frag_now_fix () & addr_mask
) != 0)
3542 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
3544 /* Differentiate between two and four byte insns. */
3546 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
3549 f
= frag_more (insn_length
);
3550 frag_now
->insn_addr
= addr_mask
;
3551 md_number_to_chars (f
, insn
, insn_length
);
3554 last_subseg
= now_subseg
;
3557 dwarf2_emit_insn (insn_length
);
3560 /* Create any fixups. */
3561 for (i
= 0; i
< fc
; i
++)
3564 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
3566 reloc_howto_type
*reloc_howto
;
3570 reloc_howto
= bfd_reloc_type_lookup (stdoutput
, fixups
[i
].reloc
);
3574 size
= bfd_get_reloc_size (reloc_howto
);
3575 offset
= target_big_endian
? (insn_length
- size
) : 0;
3577 fixP
= fix_new_exp (frag_now
,
3578 f
- frag_now
->fr_literal
+ offset
,
3581 reloc_howto
->pc_relative
,
3586 const struct powerpc_operand
*operand
;
3588 operand
= &powerpc_operands
[fixups
[i
].opindex
];
3589 fixP
= fix_new_exp (frag_now
,
3590 f
- frag_now
->fr_literal
,
3593 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
3596 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
3600 /* Handle a macro. Gather all the operands, transform them as
3601 described by the macro, and call md_assemble recursively. All the
3602 operands are separated by commas; we don't accept parentheses
3603 around operands here. */
3606 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
3617 /* Gather the users operands into the operands array. */
3622 if (count
>= sizeof operands
/ sizeof operands
[0])
3624 operands
[count
++] = s
;
3625 s
= strchr (s
, ',');
3626 if (s
== (char *) NULL
)
3631 if (count
!= macro
->operands
)
3633 as_bad (_("wrong number of operands"));
3637 /* Work out how large the string must be (the size is unbounded
3638 because it includes user input). */
3640 format
= macro
->format
;
3641 while (*format
!= '\0')
3650 arg
= strtol (format
+ 1, &send
, 10);
3651 know (send
!= format
&& arg
< count
);
3652 len
+= strlen (operands
[arg
]);
3657 /* Put the string together. */
3658 complete
= s
= XNEWVEC (char, len
+ 1);
3659 format
= macro
->format
;
3660 while (*format
!= '\0')
3666 arg
= strtol (format
+ 1, &send
, 10);
3667 strcpy (s
, operands
[arg
]);
3674 /* Assemble the constructed instruction. */
3675 md_assemble (complete
);
3680 /* For ELF, add support for SHT_ORDERED. */
3683 ppc_section_type (char *str
, size_t len
)
3685 if (len
== 7 && strncmp (str
, "ordered", 7) == 0)
3692 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
3694 if (type
== SHT_ORDERED
)
3695 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
3701 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
3706 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
3709 #endif /* OBJ_ELF */
3712 /* Pseudo-op handling. */
3714 /* The .byte pseudo-op. This is similar to the normal .byte
3715 pseudo-op, but it can also take a single ASCII string. */
3718 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
3722 if (*input_line_pointer
!= '\"')
3728 /* Gather characters. A real double quote is doubled. Unusual
3729 characters are not permitted. */
3730 ++input_line_pointer
;
3735 c
= *input_line_pointer
++;
3739 if (*input_line_pointer
!= '\"')
3741 ++input_line_pointer
;
3744 FRAG_APPEND_1_CHAR (c
);
3748 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
3749 as_warn (_("data in executable section"));
3750 demand_empty_rest_of_line ();
3755 /* XCOFF specific pseudo-op handling. */
3757 /* This is set if we are creating a .stabx symbol, since we don't want
3758 to handle symbol suffixes for such symbols. */
3759 static bfd_boolean ppc_stab_symbol
;
3761 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3762 symbols in the .bss segment as though they were local common
3763 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3764 aligns .comm and .lcomm to 4 bytes. */
3767 ppc_comm (int lcomm
)
3769 asection
*current_seg
= now_seg
;
3770 subsegT current_subseg
= now_subseg
;
3776 symbolS
*lcomm_sym
= NULL
;
3780 endc
= get_symbol_name (&name
);
3781 end_name
= input_line_pointer
;
3782 (void) restore_line_pointer (endc
);
3784 if (*input_line_pointer
!= ',')
3786 as_bad (_("missing size"));
3787 ignore_rest_of_line ();
3790 ++input_line_pointer
;
3792 size
= get_absolute_expression ();
3795 as_bad (_("negative size"));
3796 ignore_rest_of_line ();
3802 /* The third argument to .comm is the alignment. */
3803 if (*input_line_pointer
!= ',')
3807 ++input_line_pointer
;
3808 align
= get_absolute_expression ();
3811 as_warn (_("ignoring bad alignment"));
3821 /* The third argument to .lcomm appears to be the real local
3822 common symbol to create. References to the symbol named in
3823 the first argument are turned into references to the third
3825 if (*input_line_pointer
!= ',')
3827 as_bad (_("missing real symbol name"));
3828 ignore_rest_of_line ();
3831 ++input_line_pointer
;
3833 lcomm_endc
= get_symbol_name (&lcomm_name
);
3835 lcomm_sym
= symbol_find_or_make (lcomm_name
);
3837 (void) restore_line_pointer (lcomm_endc
);
3839 /* The fourth argument to .lcomm is the alignment. */
3840 if (*input_line_pointer
!= ',')
3849 ++input_line_pointer
;
3850 align
= get_absolute_expression ();
3853 as_warn (_("ignoring bad alignment"));
3860 sym
= symbol_find_or_make (name
);
3863 if (S_IS_DEFINED (sym
)
3864 || S_GET_VALUE (sym
) != 0)
3866 as_bad (_("attempt to redefine symbol"));
3867 ignore_rest_of_line ();
3871 record_alignment (bss_section
, align
);
3874 || ! S_IS_DEFINED (lcomm_sym
))
3883 S_SET_EXTERNAL (sym
);
3887 symbol_get_tc (lcomm_sym
)->output
= 1;
3888 def_sym
= lcomm_sym
;
3892 subseg_set (bss_section
, 1);
3893 frag_align (align
, 0, 0);
3895 symbol_set_frag (def_sym
, frag_now
);
3896 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
3897 def_size
, (char *) NULL
);
3899 S_SET_SEGMENT (def_sym
, bss_section
);
3900 symbol_get_tc (def_sym
)->align
= align
;
3904 /* Align the size of lcomm_sym. */
3905 symbol_get_frag (lcomm_sym
)->fr_offset
=
3906 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
3907 &~ ((1 << align
) - 1));
3908 if (align
> symbol_get_tc (lcomm_sym
)->align
)
3909 symbol_get_tc (lcomm_sym
)->align
= align
;
3914 /* Make sym an offset from lcomm_sym. */
3915 S_SET_SEGMENT (sym
, bss_section
);
3916 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
3917 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
3918 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
3921 subseg_set (current_seg
, current_subseg
);
3923 demand_empty_rest_of_line ();
3926 /* The .csect pseudo-op. This switches us into a different
3927 subsegment. The first argument is a symbol whose value is the
3928 start of the .csect. In COFF, csect symbols get special aux
3929 entries defined by the x_csect field of union internal_auxent. The
3930 optional second argument is the alignment (the default is 2). */
3933 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
3940 endc
= get_symbol_name (&name
);
3942 sym
= symbol_find_or_make (name
);
3944 (void) restore_line_pointer (endc
);
3946 if (S_GET_NAME (sym
)[0] == '\0')
3948 /* An unnamed csect is assumed to be [PR]. */
3949 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
3953 if (*input_line_pointer
== ',')
3955 ++input_line_pointer
;
3956 align
= get_absolute_expression ();
3959 ppc_change_csect (sym
, align
);
3961 demand_empty_rest_of_line ();
3964 /* Change to a different csect. */
3967 ppc_change_csect (symbolS
*sym
, offsetT align
)
3969 if (S_IS_DEFINED (sym
))
3970 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
3980 /* This is a new csect. We need to look at the symbol class to
3981 figure out whether it should go in the text section or the
3985 switch (symbol_get_tc (sym
)->symbol_class
)
3995 S_SET_SEGMENT (sym
, text_section
);
3996 symbol_get_tc (sym
)->subseg
= ppc_text_subsegment
;
3997 ++ppc_text_subsegment
;
3998 list_ptr
= &ppc_text_csects
;
4008 if (ppc_toc_csect
!= NULL
4009 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4010 == ppc_data_subsegment
))
4012 S_SET_SEGMENT (sym
, data_section
);
4013 symbol_get_tc (sym
)->subseg
= ppc_data_subsegment
;
4014 ++ppc_data_subsegment
;
4015 list_ptr
= &ppc_data_csects
;
4021 /* We set the obstack chunk size to a small value before
4022 changing subsegments, so that we don't use a lot of memory
4023 space for what may be a small section. */
4024 hold_chunksize
= chunksize
;
4027 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4028 symbol_get_tc (sym
)->subseg
);
4030 chunksize
= hold_chunksize
;
4033 ppc_after_toc_frag
= frag_now
;
4035 record_alignment (sec
, align
);
4037 frag_align_code (align
, 0);
4039 frag_align (align
, 0, 0);
4041 symbol_set_frag (sym
, frag_now
);
4042 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4044 symbol_get_tc (sym
)->align
= align
;
4045 symbol_get_tc (sym
)->output
= 1;
4046 symbol_get_tc (sym
)->within
= sym
;
4048 for (list
= *list_ptr
;
4049 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4050 list
= symbol_get_tc (list
)->next
)
4052 symbol_get_tc (list
)->next
= sym
;
4054 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4055 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4059 ppc_current_csect
= sym
;
4063 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4067 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4069 sec
= subseg_new (dw
->name
, subseg
);
4070 oldflags
= bfd_get_section_flags (stdoutput
, sec
);
4071 if (oldflags
== SEC_NO_FLAGS
)
4073 /* Just created section. */
4074 gas_assert (dw_sections
[idx
].sect
== NULL
);
4076 bfd_set_section_flags (stdoutput
, sec
, SEC_DEBUGGING
);
4077 bfd_set_section_alignment (stdoutput
, sec
, 0);
4078 dw_sections
[idx
].sect
= sec
;
4081 /* Not anymore in a csect. */
4082 ppc_current_csect
= NULL
;
4085 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4086 .dwsect flag [, opt-label ]
4090 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4094 const struct xcoff_dwsect_name
*dw
;
4095 struct dw_subsection
*subseg
;
4096 struct dw_section
*dws
;
4100 flag
= get_absolute_expression ();
4102 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4103 if (xcoff_dwsect_names
[i
].flag
== flag
)
4105 dw
= &xcoff_dwsect_names
[i
];
4109 /* Parse opt-label. */
4110 if (*input_line_pointer
== ',')
4115 ++input_line_pointer
;
4117 c
= get_symbol_name (&label
);
4118 opt_label
= symbol_find_or_make (label
);
4119 (void) restore_line_pointer (c
);
4124 demand_empty_rest_of_line ();
4126 /* Return now in case of unknown subsection. */
4129 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4134 /* Find the subsection. */
4135 dws
= &dw_sections
[i
];
4137 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4139 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4140 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4142 as_bad (_("label %s was not defined in this dwarf section"),
4143 S_GET_NAME (opt_label
));
4144 subseg
= dws
->anon_subseg
;
4148 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4153 /* Switch to the subsection. */
4154 ppc_change_debug_section (i
, subseg
->subseg
);
4158 /* Create a new dw subsection. */
4159 subseg
= XNEW (struct dw_subsection
);
4161 if (opt_label
== NULL
)
4163 /* The anonymous one. */
4165 subseg
->link
= NULL
;
4166 dws
->anon_subseg
= subseg
;
4171 if (dws
->list_subseg
!= NULL
)
4172 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4176 subseg
->link
= dws
->list_subseg
;
4177 dws
->list_subseg
= subseg
;
4178 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4181 ppc_change_debug_section (i
, subseg
->subseg
);
4185 /* Add the length field. */
4186 expressionS
*exp
= &subseg
->end_exp
;
4189 if (opt_label
!= NULL
)
4190 symbol_set_value_now (opt_label
);
4192 /* Add the length field. Note that according to the AIX assembler
4193 manual, the size of the length field is 4 for powerpc32 but
4194 12 for powerpc64. */
4197 /* Write the 64bit marker. */
4198 md_number_to_chars (frag_more (4), -1, 4);
4201 exp
->X_op
= O_subtract
;
4202 exp
->X_op_symbol
= symbol_temp_new_now ();
4203 exp
->X_add_symbol
= symbol_temp_make ();
4205 sz
= ppc_obj64
? 8 : 4;
4206 exp
->X_add_number
= -sz
;
4207 emit_expr (exp
, sz
);
4212 /* This function handles the .text and .data pseudo-ops. These
4213 pseudo-ops aren't really used by XCOFF; we implement them for the
4214 convenience of people who aren't used to XCOFF. */
4217 ppc_section (int type
)
4224 else if (type
== 'd')
4229 sym
= symbol_find_or_make (name
);
4231 ppc_change_csect (sym
, 2);
4233 demand_empty_rest_of_line ();
4236 /* This function handles the .section pseudo-op. This is mostly to
4237 give an error, since XCOFF only supports .text, .data and .bss, but
4238 we do permit the user to name the text or data section. */
4241 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4244 const char *real_name
;
4248 c
= get_symbol_name (&user_name
);
4250 if (strcmp (user_name
, ".text") == 0)
4251 real_name
= ".text[PR]";
4252 else if (strcmp (user_name
, ".data") == 0)
4253 real_name
= ".data[RW]";
4256 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4257 (void) restore_line_pointer (c
);
4258 ignore_rest_of_line ();
4262 (void) restore_line_pointer (c
);
4264 sym
= symbol_find_or_make (real_name
);
4266 ppc_change_csect (sym
, 2);
4268 demand_empty_rest_of_line ();
4271 /* The .extern pseudo-op. We create an undefined symbol. */
4274 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4279 endc
= get_symbol_name (&name
);
4281 (void) symbol_find_or_make (name
);
4283 (void) restore_line_pointer (endc
);
4285 demand_empty_rest_of_line ();
4288 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4291 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4297 endc
= get_symbol_name (&name
);
4299 sym
= symbol_find_or_make (name
);
4301 (void) restore_line_pointer (endc
);
4303 symbol_get_tc (sym
)->output
= 1;
4305 demand_empty_rest_of_line ();
4308 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4309 relocations at the beginning of the current csect.
4311 (In principle, there's no reason why the relocations _have_ to be at
4312 the beginning. Anywhere in the csect would do. However, inserting
4313 at the beginning is what the native assembler does, and it helps to
4314 deal with cases where the .ref statements follow the section contents.)
4316 ??? .refs don't work for empty .csects. However, the native assembler
4317 doesn't report an error in this case, and neither yet do we. */
4320 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
4325 if (ppc_current_csect
== NULL
)
4327 as_bad (_(".ref outside .csect"));
4328 ignore_rest_of_line ();
4334 c
= get_symbol_name (&name
);
4336 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
4337 symbol_find_or_make (name
), 0, FALSE
, BFD_RELOC_NONE
);
4339 *input_line_pointer
= c
;
4340 SKIP_WHITESPACE_AFTER_NAME ();
4341 c
= *input_line_pointer
;
4344 input_line_pointer
++;
4346 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
4348 as_bad (_("missing symbol name"));
4349 ignore_rest_of_line ();
4356 demand_empty_rest_of_line ();
4359 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4360 although I don't know why it bothers. */
4363 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
4370 endc
= get_symbol_name (&name
);
4372 sym
= symbol_find_or_make (name
);
4374 (void) restore_line_pointer (endc
);
4376 if (*input_line_pointer
!= ',')
4378 as_bad (_("missing rename string"));
4379 ignore_rest_of_line ();
4382 ++input_line_pointer
;
4384 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
4386 demand_empty_rest_of_line ();
4389 /* The .stabx pseudo-op. This is similar to a normal .stabs
4390 pseudo-op, but slightly different. A sample is
4391 .stabx "main:F-1",.main,142,0
4392 The first argument is the symbol name to create. The second is the
4393 value, and the third is the storage class. The fourth seems to be
4394 always zero, and I am assuming it is the type. */
4397 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
4404 name
= demand_copy_C_string (&len
);
4406 if (*input_line_pointer
!= ',')
4408 as_bad (_("missing value"));
4411 ++input_line_pointer
;
4413 ppc_stab_symbol
= TRUE
;
4414 sym
= symbol_make (name
);
4415 ppc_stab_symbol
= FALSE
;
4417 symbol_get_tc (sym
)->real_name
= name
;
4419 (void) expression (&exp
);
4426 as_bad (_("illegal .stabx expression; zero assumed"));
4427 exp
.X_add_number
= 0;
4430 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
4431 symbol_set_frag (sym
, &zero_address_frag
);
4435 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
4436 symbol_set_value_expression (sym
, &exp
);
4440 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
4441 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
4446 /* The value is some complex expression. This will probably
4447 fail at some later point, but this is probably the right
4448 thing to do here. */
4449 symbol_set_value_expression (sym
, &exp
);
4453 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4454 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4456 if (*input_line_pointer
!= ',')
4458 as_bad (_("missing class"));
4461 ++input_line_pointer
;
4463 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
4465 if (*input_line_pointer
!= ',')
4467 as_bad (_("missing type"));
4470 ++input_line_pointer
;
4472 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
4474 symbol_get_tc (sym
)->output
= 1;
4476 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
4481 .stabx "z",arrays_,133,0
4484 .comm arrays_,13768,3
4486 resolve_symbol_value will copy the exp's "within" into sym's when the
4487 offset is 0. Since this seems to be corner case problem,
4488 only do the correction for storage class C_STSYM. A better solution
4489 would be to have the tc field updated in ppc_symbol_new_hook. */
4491 if (exp
.X_op
== O_symbol
)
4493 if (ppc_current_block
== NULL
)
4494 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4496 symbol_get_tc (sym
)->within
= ppc_current_block
;
4497 symbol_get_tc (exp
.X_add_symbol
)->within
= ppc_current_block
;
4501 if (exp
.X_op
!= O_symbol
4502 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
4503 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
4504 ppc_frob_label (sym
);
4507 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4508 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
4509 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
4510 symbol_get_tc (ppc_current_csect
)->within
= sym
;
4513 demand_empty_rest_of_line ();
4516 /* The .function pseudo-op. This takes several arguments. The first
4517 argument seems to be the external name of the symbol. The second
4518 argument seems to be the label for the start of the function. gcc
4519 uses the same name for both. I have no idea what the third and
4520 fourth arguments are meant to be. The optional fifth argument is
4521 an expression for the size of the function. In COFF this symbol
4522 gets an aux entry like that used for a csect. */
4525 ppc_function (int ignore ATTRIBUTE_UNUSED
)
4533 endc
= get_symbol_name (&name
);
4535 /* Ignore any [PR] suffix. */
4536 name
= ppc_canonicalize_symbol_name (name
);
4537 s
= strchr (name
, '[');
4538 if (s
!= (char *) NULL
4539 && strcmp (s
+ 1, "PR]") == 0)
4542 ext_sym
= symbol_find_or_make (name
);
4544 (void) restore_line_pointer (endc
);
4546 if (*input_line_pointer
!= ',')
4548 as_bad (_("missing symbol name"));
4549 ignore_rest_of_line ();
4552 ++input_line_pointer
;
4554 endc
= get_symbol_name (&name
);
4556 lab_sym
= symbol_find_or_make (name
);
4558 (void) restore_line_pointer (endc
);
4560 if (ext_sym
!= lab_sym
)
4564 exp
.X_op
= O_symbol
;
4565 exp
.X_add_symbol
= lab_sym
;
4566 exp
.X_op_symbol
= NULL
;
4567 exp
.X_add_number
= 0;
4569 symbol_set_value_expression (ext_sym
, &exp
);
4572 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
4573 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
4574 symbol_get_tc (ext_sym
)->output
= 1;
4576 if (*input_line_pointer
== ',')
4580 /* Ignore the third argument. */
4581 ++input_line_pointer
;
4583 if (*input_line_pointer
== ',')
4585 /* Ignore the fourth argument. */
4586 ++input_line_pointer
;
4588 if (*input_line_pointer
== ',')
4590 /* The fifth argument is the function size. */
4591 ++input_line_pointer
;
4592 symbol_get_tc (ext_sym
)->u
.size
= symbol_new
4593 ("L0\001", absolute_section
,(valueT
) 0, &zero_address_frag
);
4594 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
4599 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
4600 SF_SET_FUNCTION (ext_sym
);
4601 SF_SET_PROCESS (ext_sym
);
4602 coff_add_linesym (ext_sym
);
4604 demand_empty_rest_of_line ();
4607 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4608 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4609 with the correct line number */
4611 static symbolS
*saved_bi_sym
= 0;
4614 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
4618 sym
= symbol_make (".bf");
4619 S_SET_SEGMENT (sym
, text_section
);
4620 symbol_set_frag (sym
, frag_now
);
4621 S_SET_VALUE (sym
, frag_now_fix ());
4622 S_SET_STORAGE_CLASS (sym
, C_FCN
);
4624 coff_line_base
= get_absolute_expression ();
4626 S_SET_NUMBER_AUXILIARY (sym
, 1);
4627 SA_SET_SYM_LNNO (sym
, coff_line_base
);
4629 /* Line number for bi. */
4632 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
4637 symbol_get_tc (sym
)->output
= 1;
4639 ppc_frob_label (sym
);
4641 demand_empty_rest_of_line ();
4644 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4645 ".ef", except that the line number is absolute, not relative to the
4646 most recent ".bf" symbol. */
4649 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
4653 sym
= symbol_make (".ef");
4654 S_SET_SEGMENT (sym
, text_section
);
4655 symbol_set_frag (sym
, frag_now
);
4656 S_SET_VALUE (sym
, frag_now_fix ());
4657 S_SET_STORAGE_CLASS (sym
, C_FCN
);
4658 S_SET_NUMBER_AUXILIARY (sym
, 1);
4659 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4660 symbol_get_tc (sym
)->output
= 1;
4662 ppc_frob_label (sym
);
4664 demand_empty_rest_of_line ();
4667 /* The .bi and .ei pseudo-ops. These take a string argument and
4668 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4669 the symbol list. The value of .bi will be know when the next .bf
4675 static symbolS
*last_biei
;
4682 name
= demand_copy_C_string (&len
);
4684 /* The value of these symbols is actually file offset. Here we set
4685 the value to the index into the line number entries. In
4686 ppc_frob_symbols we set the fix_line field, which will cause BFD
4687 to do the right thing. */
4689 sym
= symbol_make (name
);
4690 /* obj-coff.c currently only handles line numbers correctly in the
4692 S_SET_SEGMENT (sym
, text_section
);
4693 S_SET_VALUE (sym
, coff_n_line_nos
);
4694 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4696 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
4697 symbol_get_tc (sym
)->output
= 1;
4705 for (look
= last_biei
? last_biei
: symbol_rootP
;
4706 (look
!= (symbolS
*) NULL
4707 && (S_GET_STORAGE_CLASS (look
) == C_FILE
4708 || S_GET_STORAGE_CLASS (look
) == C_BINCL
4709 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
4710 look
= symbol_next (look
))
4712 if (look
!= (symbolS
*) NULL
)
4714 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4715 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
4719 demand_empty_rest_of_line ();
4722 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4723 There is one argument, which is a csect symbol. The value of the
4724 .bs symbol is the index of this csect symbol. */
4727 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
4734 if (ppc_current_block
!= NULL
)
4735 as_bad (_("nested .bs blocks"));
4737 endc
= get_symbol_name (&name
);
4739 csect
= symbol_find_or_make (name
);
4741 (void) restore_line_pointer (endc
);
4743 sym
= symbol_make (".bs");
4744 S_SET_SEGMENT (sym
, now_seg
);
4745 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
4746 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4747 symbol_get_tc (sym
)->output
= 1;
4749 symbol_get_tc (sym
)->within
= csect
;
4751 ppc_frob_label (sym
);
4753 ppc_current_block
= sym
;
4755 demand_empty_rest_of_line ();
4758 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4761 ppc_es (int ignore ATTRIBUTE_UNUSED
)
4765 if (ppc_current_block
== NULL
)
4766 as_bad (_(".es without preceding .bs"));
4768 sym
= symbol_make (".es");
4769 S_SET_SEGMENT (sym
, now_seg
);
4770 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
4771 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4772 symbol_get_tc (sym
)->output
= 1;
4774 ppc_frob_label (sym
);
4776 ppc_current_block
= NULL
;
4778 demand_empty_rest_of_line ();
4781 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4785 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
4789 sym
= symbol_make (".bb");
4790 S_SET_SEGMENT (sym
, text_section
);
4791 symbol_set_frag (sym
, frag_now
);
4792 S_SET_VALUE (sym
, frag_now_fix ());
4793 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
4795 S_SET_NUMBER_AUXILIARY (sym
, 1);
4796 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4798 symbol_get_tc (sym
)->output
= 1;
4800 SF_SET_PROCESS (sym
);
4802 ppc_frob_label (sym
);
4804 demand_empty_rest_of_line ();
4807 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4811 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
4815 sym
= symbol_make (".eb");
4816 S_SET_SEGMENT (sym
, text_section
);
4817 symbol_set_frag (sym
, frag_now
);
4818 S_SET_VALUE (sym
, frag_now_fix ());
4819 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
4820 S_SET_NUMBER_AUXILIARY (sym
, 1);
4821 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4822 symbol_get_tc (sym
)->output
= 1;
4824 SF_SET_PROCESS (sym
);
4826 ppc_frob_label (sym
);
4828 demand_empty_rest_of_line ();
4831 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4835 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
4841 name
= demand_copy_C_string (&len
);
4842 sym
= symbol_make (name
);
4843 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4844 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4845 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
4846 S_SET_VALUE (sym
, 0);
4847 symbol_get_tc (sym
)->output
= 1;
4849 ppc_frob_label (sym
);
4851 demand_empty_rest_of_line ();
4854 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4857 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
4861 sym
= symbol_make (".ec");
4862 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4863 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4864 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
4865 S_SET_VALUE (sym
, 0);
4866 symbol_get_tc (sym
)->output
= 1;
4868 ppc_frob_label (sym
);
4870 demand_empty_rest_of_line ();
4873 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4876 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
4878 if (ppc_toc_csect
!= (symbolS
*) NULL
)
4879 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
4886 subseg
= ppc_data_subsegment
;
4887 ++ppc_data_subsegment
;
4889 subseg_new (segment_name (data_section
), subseg
);
4890 ppc_toc_frag
= frag_now
;
4892 sym
= symbol_find_or_make ("TOC[TC0]");
4893 symbol_set_frag (sym
, frag_now
);
4894 S_SET_SEGMENT (sym
, data_section
);
4895 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4896 symbol_get_tc (sym
)->subseg
= subseg
;
4897 symbol_get_tc (sym
)->output
= 1;
4898 symbol_get_tc (sym
)->within
= sym
;
4900 ppc_toc_csect
= sym
;
4902 for (list
= ppc_data_csects
;
4903 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4904 list
= symbol_get_tc (list
)->next
)
4906 symbol_get_tc (list
)->next
= sym
;
4908 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4909 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4913 ppc_current_csect
= ppc_toc_csect
;
4915 demand_empty_rest_of_line ();
4918 /* The AIX assembler automatically aligns the operands of a .long or
4919 .short pseudo-op, and we want to be compatible. */
4922 ppc_xcoff_cons (int log_size
)
4924 frag_align (log_size
, 0, 0);
4925 record_alignment (now_seg
, log_size
);
4926 cons (1 << log_size
);
4930 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
4935 (void) expression (&exp
);
4937 if (exp
.X_op
!= O_constant
)
4939 as_bad (_("non-constant byte count"));
4943 byte_count
= exp
.X_add_number
;
4945 if (*input_line_pointer
!= ',')
4947 as_bad (_("missing value"));
4951 ++input_line_pointer
;
4956 ppc_xcoff_end (void)
4960 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4962 struct dw_section
*dws
= &dw_sections
[i
];
4963 struct dw_subsection
*dwss
;
4965 if (dws
->anon_subseg
)
4967 dwss
= dws
->anon_subseg
;
4968 dwss
->link
= dws
->list_subseg
;
4971 dwss
= dws
->list_subseg
;
4973 for (; dwss
!= NULL
; dwss
= dwss
->link
)
4974 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
4976 subseg_set (dws
->sect
, dwss
->subseg
);
4977 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
4982 #endif /* OBJ_XCOFF */
4983 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4985 /* The .tc pseudo-op. This is used when generating either XCOFF or
4986 ELF. This takes two or more arguments.
4988 When generating XCOFF output, the first argument is the name to
4989 give to this location in the toc; this will be a symbol with class
4990 TC. The rest of the arguments are N-byte values to actually put at
4991 this location in the TOC; often there is just one more argument, a
4992 relocatable symbol reference. The size of the value to store
4993 depends on target word size. A 32-bit target uses 4-byte values, a
4994 64-bit target uses 8-byte values.
4996 When not generating XCOFF output, the arguments are the same, but
4997 the first argument is simply ignored. */
5000 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5004 /* Define the TOC symbol name. */
5010 if (ppc_toc_csect
== (symbolS
*) NULL
5011 || ppc_toc_csect
!= ppc_current_csect
)
5013 as_bad (_(".tc not in .toc section"));
5014 ignore_rest_of_line ();
5018 endc
= get_symbol_name (&name
);
5020 sym
= symbol_find_or_make (name
);
5022 (void) restore_line_pointer (endc
);
5024 if (S_IS_DEFINED (sym
))
5028 label
= symbol_get_tc (ppc_current_csect
)->within
;
5029 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5031 as_bad (_(".tc with no label"));
5032 ignore_rest_of_line ();
5036 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5037 symbol_set_frag (label
, symbol_get_frag (sym
));
5038 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5040 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5041 ++input_line_pointer
;
5046 S_SET_SEGMENT (sym
, now_seg
);
5047 symbol_set_frag (sym
, frag_now
);
5048 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5049 symbol_get_tc (sym
)->symbol_class
= XMC_TC
;
5050 symbol_get_tc (sym
)->output
= 1;
5052 ppc_frob_label (sym
);
5055 #endif /* OBJ_XCOFF */
5059 /* Skip the TOC symbol name. */
5060 while (is_part_of_name (*input_line_pointer
)
5061 || *input_line_pointer
== ' '
5062 || *input_line_pointer
== '['
5063 || *input_line_pointer
== ']'
5064 || *input_line_pointer
== '{'
5065 || *input_line_pointer
== '}')
5066 ++input_line_pointer
;
5068 /* Align to a four/eight byte boundary. */
5069 align
= ppc_obj64
? 3 : 2;
5070 frag_align (align
, 0, 0);
5071 record_alignment (now_seg
, align
);
5072 #endif /* OBJ_ELF */
5074 if (*input_line_pointer
!= ',')
5075 demand_empty_rest_of_line ();
5078 ++input_line_pointer
;
5079 cons (ppc_obj64
? 8 : 4);
5083 /* Pseudo-op .machine. */
5086 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5090 #define MAX_HISTORY 100
5091 static ppc_cpu_t
*cpu_history
;
5092 static int curr_hist
;
5096 c
= get_symbol_name (&cpu_string
);
5097 cpu_string
= xstrdup (cpu_string
);
5098 (void) restore_line_pointer (c
);
5100 if (cpu_string
!= NULL
)
5102 ppc_cpu_t old_cpu
= ppc_cpu
;
5106 for (p
= cpu_string
; *p
!= 0; p
++)
5109 if (strcmp (cpu_string
, "push") == 0)
5111 if (cpu_history
== NULL
)
5112 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5114 if (curr_hist
>= MAX_HISTORY
)
5115 as_bad (_(".machine stack overflow"));
5117 cpu_history
[curr_hist
++] = ppc_cpu
;
5119 else if (strcmp (cpu_string
, "pop") == 0)
5122 as_bad (_(".machine stack underflow"));
5124 ppc_cpu
= cpu_history
[--curr_hist
];
5126 else if ((new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, cpu_string
)) != 0)
5129 as_bad (_("invalid machine `%s'"), cpu_string
);
5131 if (ppc_cpu
!= old_cpu
)
5132 ppc_setup_opcodes ();
5135 demand_empty_rest_of_line ();
5137 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5141 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5143 /* Set the current section. */
5145 ppc_set_current_section (segT
new)
5147 ppc_previous_section
= ppc_current_section
;
5148 ppc_current_section
= new;
5151 /* pseudo-op: .previous
5152 behaviour: toggles the current section with the previous section.
5154 warnings: "No previous section" */
5157 ppc_previous (int ignore ATTRIBUTE_UNUSED
)
5159 if (ppc_previous_section
== NULL
)
5161 as_warn (_("no previous section to return to, ignored."));
5165 subseg_set (ppc_previous_section
, 0);
5167 ppc_set_current_section (ppc_previous_section
);
5170 /* pseudo-op: .pdata
5171 behaviour: predefined read only data section
5175 initial: .section .pdata "adr3"
5176 a - don't know -- maybe a misprint
5177 d - initialized data
5179 3 - double word aligned (that would be 4 byte boundary)
5182 Tag index tables (also known as the function table) for exception
5183 handling, debugging, etc. */
5186 ppc_pdata (int ignore ATTRIBUTE_UNUSED
)
5188 if (pdata_section
== 0)
5190 pdata_section
= subseg_new (".pdata", 0);
5192 bfd_set_section_flags (stdoutput
, pdata_section
,
5193 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5194 | SEC_READONLY
| SEC_DATA
));
5196 bfd_set_section_alignment (stdoutput
, pdata_section
, 2);
5200 pdata_section
= subseg_new (".pdata", 0);
5202 ppc_set_current_section (pdata_section
);
5205 /* pseudo-op: .ydata
5206 behaviour: predefined read only data section
5210 initial: .section .ydata "drw3"
5211 a - don't know -- maybe a misprint
5212 d - initialized data
5214 3 - double word aligned (that would be 4 byte boundary)
5216 Tag tables (also known as the scope table) for exception handling,
5220 ppc_ydata (int ignore ATTRIBUTE_UNUSED
)
5222 if (ydata_section
== 0)
5224 ydata_section
= subseg_new (".ydata", 0);
5225 bfd_set_section_flags (stdoutput
, ydata_section
,
5226 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5227 | SEC_READONLY
| SEC_DATA
));
5229 bfd_set_section_alignment (stdoutput
, ydata_section
, 3);
5233 ydata_section
= subseg_new (".ydata", 0);
5235 ppc_set_current_section (ydata_section
);
5238 /* pseudo-op: .reldata
5239 behaviour: predefined read write data section
5240 double word aligned (4-byte)
5241 FIXME: relocation is applied to it
5242 FIXME: what's the difference between this and .data?
5245 initial: .section .reldata "drw3"
5246 d - initialized data
5249 3 - double word aligned (that would be 8 byte boundary)
5252 Like .data, but intended to hold data subject to relocation, such as
5253 function descriptors, etc. */
5256 ppc_reldata (int ignore ATTRIBUTE_UNUSED
)
5258 if (reldata_section
== 0)
5260 reldata_section
= subseg_new (".reldata", 0);
5262 bfd_set_section_flags (stdoutput
, reldata_section
,
5263 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5266 bfd_set_section_alignment (stdoutput
, reldata_section
, 2);
5270 reldata_section
= subseg_new (".reldata", 0);
5272 ppc_set_current_section (reldata_section
);
5275 /* pseudo-op: .rdata
5276 behaviour: predefined read only data section
5280 initial: .section .rdata "dr3"
5281 d - initialized data
5283 3 - double word aligned (that would be 4 byte boundary) */
5286 ppc_rdata (int ignore ATTRIBUTE_UNUSED
)
5288 if (rdata_section
== 0)
5290 rdata_section
= subseg_new (".rdata", 0);
5291 bfd_set_section_flags (stdoutput
, rdata_section
,
5292 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5293 | SEC_READONLY
| SEC_DATA
));
5295 bfd_set_section_alignment (stdoutput
, rdata_section
, 2);
5299 rdata_section
= subseg_new (".rdata", 0);
5301 ppc_set_current_section (rdata_section
);
5304 /* pseudo-op: .ualong
5305 behaviour: much like .int, with the exception that no alignment is
5307 FIXME: test the alignment statement
5312 ppc_ualong (int ignore ATTRIBUTE_UNUSED
)
5318 /* pseudo-op: .znop <symbol name>
5319 behaviour: Issue a nop instruction
5320 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5321 the supplied symbol name.
5323 warnings: Missing symbol name */
5326 ppc_znop (int ignore ATTRIBUTE_UNUSED
)
5329 const struct powerpc_opcode
*opcode
;
5336 /* Strip out the symbol name. */
5337 c
= get_symbol_name (&symbol_name
);
5339 name
= xstrdup (symbol_name
);
5341 sym
= symbol_find_or_make (name
);
5343 *input_line_pointer
= c
;
5345 SKIP_WHITESPACE_AFTER_NAME ();
5347 /* Look up the opcode in the hash table. */
5348 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, "nop");
5350 /* Stick in the nop. */
5351 insn
= opcode
->opcode
;
5353 /* Write out the instruction. */
5355 md_number_to_chars (f
, insn
, 4);
5357 f
- frag_now
->fr_literal
,
5362 BFD_RELOC_16_GOT_PCREL
);
5372 ppc_pe_comm (int lcomm
)
5381 c
= get_symbol_name (&name
);
5383 /* just after name is now '\0'. */
5384 p
= input_line_pointer
;
5386 SKIP_WHITESPACE_AFTER_NAME ();
5387 if (*input_line_pointer
!= ',')
5389 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5390 ignore_rest_of_line ();
5394 input_line_pointer
++; /* skip ',' */
5395 if ((temp
= get_absolute_expression ()) < 0)
5397 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
5398 ignore_rest_of_line ();
5404 /* The third argument to .comm is the alignment. */
5405 if (*input_line_pointer
!= ',')
5409 ++input_line_pointer
;
5410 align
= get_absolute_expression ();
5413 as_warn (_("ignoring bad alignment"));
5420 symbolP
= symbol_find_or_make (name
);
5423 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
5425 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5426 S_GET_NAME (symbolP
));
5427 ignore_rest_of_line ();
5431 if (S_GET_VALUE (symbolP
))
5433 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
5434 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5435 S_GET_NAME (symbolP
),
5436 (long) S_GET_VALUE (symbolP
),
5441 S_SET_VALUE (symbolP
, (valueT
) temp
);
5442 S_SET_EXTERNAL (symbolP
);
5443 S_SET_SEGMENT (symbolP
, bfd_com_section_ptr
);
5446 demand_empty_rest_of_line ();
5450 * implement the .section pseudo op:
5451 * .section name {, "flags"}
5453 * | +--- optional flags: 'b' for bss
5455 * +-- section name 'l' for lib
5459 * 'd' (apparently m88k for data)
5461 * But if the argument is not a quoted string, treat it as a
5462 * subsegment number.
5464 * FIXME: this is a copy of the section processing from obj-coff.c, with
5465 * additions/changes for the moto-pas assembler support. There are three
5468 * FIXME: I just noticed this. This doesn't work at all really. It it
5469 * setting bits that bfd probably neither understands or uses. The
5470 * correct approach (?) will have to incorporate extra fields attached
5471 * to the section to hold the system specific stuff. (krk)
5474 * 'a' - unknown - referred to in documentation, but no definition supplied
5475 * 'c' - section has code
5476 * 'd' - section has initialized data
5477 * 'u' - section has uninitialized data
5478 * 'i' - section contains directives (info)
5479 * 'n' - section can be discarded
5480 * 'R' - remove section at link time
5482 * Section Protection:
5483 * 'r' - section is readable
5484 * 'w' - section is writable
5485 * 'x' - section is executable
5486 * 's' - section is sharable
5488 * Section Alignment:
5489 * '0' - align to byte boundary
5490 * '1' - align to halfword boundary
5491 * '2' - align to word boundary
5492 * '3' - align to doubleword boundary
5493 * '4' - align to quadword boundary
5494 * '5' - align to 32 byte boundary
5495 * '6' - align to 64 byte boundary
5500 ppc_pe_section (int ignore ATTRIBUTE_UNUSED
)
5502 /* Strip out the section name. */
5511 c
= get_symbol_name (§ion_name
);
5513 name
= xstrdup (section_name
);
5515 *input_line_pointer
= c
;
5517 SKIP_WHITESPACE_AFTER_NAME ();
5520 flags
= SEC_NO_FLAGS
;
5522 if (strcmp (name
, ".idata$2") == 0)
5526 else if (strcmp (name
, ".idata$3") == 0)
5530 else if (strcmp (name
, ".idata$4") == 0)
5534 else if (strcmp (name
, ".idata$5") == 0)
5538 else if (strcmp (name
, ".idata$6") == 0)
5543 /* Default alignment to 16 byte boundary. */
5546 if (*input_line_pointer
== ',')
5548 ++input_line_pointer
;
5550 if (*input_line_pointer
!= '"')
5551 exp
= get_absolute_expression ();
5554 ++input_line_pointer
;
5555 while (*input_line_pointer
!= '"'
5556 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
5558 switch (*input_line_pointer
)
5560 /* Section Contents */
5561 case 'a': /* unknown */
5562 as_bad (_("unsupported section attribute -- 'a'"));
5564 case 'c': /* code section */
5567 case 'd': /* section has initialized data */
5570 case 'u': /* section has uninitialized data */
5571 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5575 case 'i': /* section contains directives (info) */
5576 /* FIXME: This is IMAGE_SCN_LNK_INFO
5578 flags
|= SEC_HAS_CONTENTS
;
5580 case 'n': /* section can be discarded */
5583 case 'R': /* Remove section at link time */
5584 flags
|= SEC_NEVER_LOAD
;
5586 #if IFLICT_BRAIN_DAMAGE
5587 /* Section Protection */
5588 case 'r': /* section is readable */
5589 flags
|= IMAGE_SCN_MEM_READ
;
5591 case 'w': /* section is writable */
5592 flags
|= IMAGE_SCN_MEM_WRITE
;
5594 case 'x': /* section is executable */
5595 flags
|= IMAGE_SCN_MEM_EXECUTE
;
5597 case 's': /* section is sharable */
5598 flags
|= IMAGE_SCN_MEM_SHARED
;
5601 /* Section Alignment */
5602 case '0': /* align to byte boundary */
5603 flags
|= IMAGE_SCN_ALIGN_1BYTES
;
5606 case '1': /* align to halfword boundary */
5607 flags
|= IMAGE_SCN_ALIGN_2BYTES
;
5610 case '2': /* align to word boundary */
5611 flags
|= IMAGE_SCN_ALIGN_4BYTES
;
5614 case '3': /* align to doubleword boundary */
5615 flags
|= IMAGE_SCN_ALIGN_8BYTES
;
5618 case '4': /* align to quadword boundary */
5619 flags
|= IMAGE_SCN_ALIGN_16BYTES
;
5622 case '5': /* align to 32 byte boundary */
5623 flags
|= IMAGE_SCN_ALIGN_32BYTES
;
5626 case '6': /* align to 64 byte boundary */
5627 flags
|= IMAGE_SCN_ALIGN_64BYTES
;
5632 as_bad (_("unknown section attribute '%c'"),
5633 *input_line_pointer
);
5636 ++input_line_pointer
;
5638 if (*input_line_pointer
== '"')
5639 ++input_line_pointer
;
5643 sec
= subseg_new (name
, (subsegT
) exp
);
5645 ppc_set_current_section (sec
);
5647 if (flags
!= SEC_NO_FLAGS
)
5649 if (! bfd_set_section_flags (stdoutput
, sec
, flags
))
5650 as_bad (_("error setting flags for \"%s\": %s"),
5651 bfd_section_name (stdoutput
, sec
),
5652 bfd_errmsg (bfd_get_error ()));
5655 bfd_set_section_alignment (stdoutput
, sec
, align
);
5659 ppc_pe_function (int ignore ATTRIBUTE_UNUSED
)
5665 endc
= get_symbol_name (&name
);
5667 ext_sym
= symbol_find_or_make (name
);
5669 (void) restore_line_pointer (endc
);
5671 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5672 SF_SET_FUNCTION (ext_sym
);
5673 SF_SET_PROCESS (ext_sym
);
5674 coff_add_linesym (ext_sym
);
5676 demand_empty_rest_of_line ();
5680 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED
)
5682 if (tocdata_section
== 0)
5684 tocdata_section
= subseg_new (".tocd", 0);
5685 /* FIXME: section flags won't work. */
5686 bfd_set_section_flags (stdoutput
, tocdata_section
,
5687 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5688 | SEC_READONLY
| SEC_DATA
));
5690 bfd_set_section_alignment (stdoutput
, tocdata_section
, 2);
5694 rdata_section
= subseg_new (".tocd", 0);
5697 ppc_set_current_section (tocdata_section
);
5699 demand_empty_rest_of_line ();
5702 /* Don't adjust TOC relocs to use the section symbol. */
5705 ppc_pe_fix_adjustable (fixS
*fix
)
5707 return fix
->fx_r_type
!= BFD_RELOC_PPC_TOC16
;
5714 /* XCOFF specific symbol and file handling. */
5716 /* Canonicalize the symbol name. We use the to force the suffix, if
5717 any, to use square brackets, and to be in upper case. */
5720 ppc_canonicalize_symbol_name (char *name
)
5724 if (ppc_stab_symbol
)
5727 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
5741 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
5744 if (*s
== '\0' || s
[1] != '\0')
5745 as_bad (_("bad symbol suffix"));
5753 /* Set the class of a symbol based on the suffix, if any. This is
5754 called whenever a new symbol is created. */
5757 ppc_symbol_new_hook (symbolS
*sym
)
5759 struct ppc_tc_sy
*tc
;
5762 tc
= symbol_get_tc (sym
);
5765 tc
->symbol_class
= -1;
5766 tc
->real_name
= NULL
;
5773 if (ppc_stab_symbol
)
5776 s
= strchr (S_GET_NAME (sym
), '[');
5777 if (s
== (const char *) NULL
)
5779 /* There is no suffix. */
5788 if (strcmp (s
, "BS]") == 0)
5789 tc
->symbol_class
= XMC_BS
;
5792 if (strcmp (s
, "DB]") == 0)
5793 tc
->symbol_class
= XMC_DB
;
5794 else if (strcmp (s
, "DS]") == 0)
5795 tc
->symbol_class
= XMC_DS
;
5798 if (strcmp (s
, "GL]") == 0)
5799 tc
->symbol_class
= XMC_GL
;
5802 if (strcmp (s
, "PR]") == 0)
5803 tc
->symbol_class
= XMC_PR
;
5806 if (strcmp (s
, "RO]") == 0)
5807 tc
->symbol_class
= XMC_RO
;
5808 else if (strcmp (s
, "RW]") == 0)
5809 tc
->symbol_class
= XMC_RW
;
5812 if (strcmp (s
, "SV]") == 0)
5813 tc
->symbol_class
= XMC_SV
;
5816 if (strcmp (s
, "TC]") == 0)
5817 tc
->symbol_class
= XMC_TC
;
5818 else if (strcmp (s
, "TI]") == 0)
5819 tc
->symbol_class
= XMC_TI
;
5820 else if (strcmp (s
, "TB]") == 0)
5821 tc
->symbol_class
= XMC_TB
;
5822 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
5823 tc
->symbol_class
= XMC_TC0
;
5826 if (strcmp (s
, "UA]") == 0)
5827 tc
->symbol_class
= XMC_UA
;
5828 else if (strcmp (s
, "UC]") == 0)
5829 tc
->symbol_class
= XMC_UC
;
5832 if (strcmp (s
, "XO]") == 0)
5833 tc
->symbol_class
= XMC_XO
;
5837 if (tc
->symbol_class
== -1)
5838 as_bad (_("unrecognized symbol suffix"));
5841 /* Set the class of a label based on where it is defined. This
5842 handles symbols without suffixes. Also, move the symbol so that it
5843 follows the csect symbol. */
5846 ppc_frob_label (symbolS
*sym
)
5848 if (ppc_current_csect
!= (symbolS
*) NULL
)
5850 if (symbol_get_tc (sym
)->symbol_class
== -1)
5851 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
5853 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5854 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
5855 &symbol_rootP
, &symbol_lastP
);
5856 symbol_get_tc (ppc_current_csect
)->within
= sym
;
5857 symbol_get_tc (sym
)->within
= ppc_current_csect
;
5861 dwarf2_emit_label (sym
);
5865 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5866 seen. It tells ppc_adjust_symtab whether it needs to look through
5869 static bfd_boolean ppc_saw_abs
;
5871 /* Change the name of a symbol just before writing it out. Set the
5872 real name if the .rename pseudo-op was used. Otherwise, remove any
5873 class suffix. Return 1 if the symbol should not be included in the
5877 ppc_frob_symbol (symbolS
*sym
)
5879 static symbolS
*ppc_last_function
;
5880 static symbolS
*set_end
;
5882 /* Discard symbols that should not be included in the output symbol
5884 if (! symbol_used_in_reloc_p (sym
)
5885 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
5886 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
5887 && ! symbol_get_tc (sym
)->output
5888 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
5891 /* This one will disappear anyway. Don't make a csect sym for it. */
5892 if (sym
== abs_section_sym
)
5895 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
5896 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
5902 name
= S_GET_NAME (sym
);
5903 s
= strchr (name
, '[');
5904 if (s
!= (char *) NULL
)
5910 snew
= xstrndup (name
, len
);
5912 S_SET_NAME (sym
, snew
);
5916 if (set_end
!= (symbolS
*) NULL
)
5918 SA_SET_SYM_ENDNDX (set_end
, sym
);
5922 if (SF_GET_FUNCTION (sym
))
5924 if (ppc_last_function
!= (symbolS
*) NULL
)
5925 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5926 ppc_last_function
= sym
;
5927 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
5929 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
5930 SA_SET_SYM_FSIZE (sym
,
5931 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
5934 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
5935 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
5937 if (ppc_last_function
== (symbolS
*) NULL
)
5938 as_bad (_(".ef with no preceding .function"));
5941 set_end
= ppc_last_function
;
5942 ppc_last_function
= NULL
;
5944 /* We don't have a C_EFCN symbol, but we need to force the
5945 COFF backend to believe that it has seen one. */
5946 coff_last_function
= NULL
;
5950 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
5951 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
5952 && S_GET_STORAGE_CLASS (sym
) != C_FILE
5953 && S_GET_STORAGE_CLASS (sym
) != C_FCN
5954 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
5955 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
5956 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
5957 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
5958 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
5959 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
5960 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
5962 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
5963 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
5964 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
5967 union internal_auxent
*a
;
5969 /* Create a csect aux. */
5970 i
= S_GET_NUMBER_AUXILIARY (sym
);
5971 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
5972 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
5973 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
5975 /* This is the TOC table. */
5976 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
5977 a
->x_csect
.x_scnlen
.l
= 0;
5978 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
5980 else if (symbol_get_tc (sym
)->subseg
!= 0)
5982 /* This is a csect symbol. x_scnlen is the size of the
5984 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
5985 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
5986 S_GET_SEGMENT (sym
))
5987 - S_GET_VALUE (sym
));
5990 resolve_symbol_value (symbol_get_tc (sym
)->next
);
5991 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
5992 - S_GET_VALUE (sym
));
5994 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
5996 else if (S_GET_SEGMENT (sym
) == bss_section
)
5998 /* This is a common symbol. */
5999 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
6000 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6001 if (S_IS_EXTERNAL (sym
))
6002 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
6004 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
6006 else if (S_GET_SEGMENT (sym
) == absolute_section
)
6008 /* This is an absolute symbol. The csect will be created by
6009 ppc_adjust_symtab. */
6011 a
->x_csect
.x_smtyp
= XTY_LD
;
6012 if (symbol_get_tc (sym
)->symbol_class
== -1)
6013 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6015 else if (! S_IS_DEFINED (sym
))
6017 /* This is an external symbol. */
6018 a
->x_csect
.x_scnlen
.l
= 0;
6019 a
->x_csect
.x_smtyp
= XTY_ER
;
6021 else if (symbol_get_tc (sym
)->symbol_class
== XMC_TC
)
6025 /* This is a TOC definition. x_scnlen is the size of the
6027 next
= symbol_next (sym
);
6028 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6029 next
= symbol_next (next
);
6030 if (next
== (symbolS
*) NULL
6031 || symbol_get_tc (next
)->symbol_class
!= XMC_TC
)
6033 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6034 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6036 - S_GET_VALUE (sym
));
6038 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6039 - S_GET_VALUE (sym
));
6043 resolve_symbol_value (next
);
6044 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6045 - S_GET_VALUE (sym
));
6047 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6053 /* This is a normal symbol definition. x_scnlen is the
6054 symbol index of the containing csect. */
6055 if (S_GET_SEGMENT (sym
) == text_section
)
6056 csect
= ppc_text_csects
;
6057 else if (S_GET_SEGMENT (sym
) == data_section
)
6058 csect
= ppc_data_csects
;
6062 /* Skip the initial dummy symbol. */
6063 csect
= symbol_get_tc (csect
)->next
;
6065 if (csect
== (symbolS
*) NULL
)
6067 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6068 a
->x_csect
.x_scnlen
.l
= 0;
6072 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6074 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6075 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6076 > S_GET_VALUE (sym
))
6078 csect
= symbol_get_tc (csect
)->next
;
6081 a
->x_csect
.x_scnlen
.p
=
6082 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6083 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6086 a
->x_csect
.x_smtyp
= XTY_LD
;
6089 a
->x_csect
.x_parmhash
= 0;
6090 a
->x_csect
.x_snhash
= 0;
6091 if (symbol_get_tc (sym
)->symbol_class
== -1)
6092 a
->x_csect
.x_smclas
= XMC_PR
;
6094 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6095 a
->x_csect
.x_stab
= 0;
6096 a
->x_csect
.x_snstab
= 0;
6098 /* Don't let the COFF backend resort these symbols. */
6099 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6101 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6103 /* We want the value to be the symbol index of the referenced
6104 csect symbol. BFD will do that for us if we set the right
6106 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6107 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6109 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6110 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6112 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6117 block
= symbol_get_tc (sym
)->within
;
6120 /* The value is the offset from the enclosing csect. */
6123 csect
= symbol_get_tc (block
)->within
;
6124 resolve_symbol_value (csect
);
6125 base
= S_GET_VALUE (csect
);
6130 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6132 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6133 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6135 /* We want the value to be a file offset into the line numbers.
6136 BFD will do that for us if we set the right flags. We have
6137 already set the value correctly. */
6138 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6144 /* Adjust the symbol table. This creates csect symbols for all
6145 absolute symbols. */
6148 ppc_adjust_symtab (void)
6155 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6159 union internal_auxent
*a
;
6161 if (S_GET_SEGMENT (sym
) != absolute_section
)
6164 csect
= symbol_create (".abs[XO]", absolute_section
,
6165 S_GET_VALUE (sym
), &zero_address_frag
);
6166 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6167 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6168 i
= S_GET_NUMBER_AUXILIARY (csect
);
6169 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6170 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6171 a
->x_csect
.x_scnlen
.l
= 0;
6172 a
->x_csect
.x_smtyp
= XTY_SD
;
6173 a
->x_csect
.x_parmhash
= 0;
6174 a
->x_csect
.x_snhash
= 0;
6175 a
->x_csect
.x_smclas
= XMC_XO
;
6176 a
->x_csect
.x_stab
= 0;
6177 a
->x_csect
.x_snstab
= 0;
6179 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6181 i
= S_GET_NUMBER_AUXILIARY (sym
);
6182 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6183 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6184 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6187 ppc_saw_abs
= FALSE
;
6190 /* Set the VMA for a section. This is called on all the sections in
6194 ppc_frob_section (asection
*sec
)
6196 static bfd_vma vma
= 0;
6198 /* Dwarf sections start at 0. */
6199 if (bfd_get_section_flags (NULL
, sec
) & SEC_DEBUGGING
)
6202 vma
= md_section_align (sec
, vma
);
6203 bfd_set_section_vma (stdoutput
, sec
, vma
);
6204 vma
+= bfd_section_size (stdoutput
, sec
);
6207 #endif /* OBJ_XCOFF */
6210 md_atof (int type
, char *litp
, int *sizep
)
6212 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6215 /* Write a value out to the object file, using the appropriate
6219 md_number_to_chars (char *buf
, valueT val
, int n
)
6221 if (target_big_endian
)
6222 number_to_chars_bigendian (buf
, val
, n
);
6224 number_to_chars_littleendian (buf
, val
, n
);
6227 /* Align a section (I don't know why this is machine dependent). */
6230 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6235 int align
= bfd_get_section_alignment (stdoutput
, seg
);
6237 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6241 /* We don't have any form of relaxing. */
6244 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6245 asection
*seg ATTRIBUTE_UNUSED
)
6251 /* Convert a machine dependent frag. We never generate these. */
6254 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6255 asection
*sec ATTRIBUTE_UNUSED
,
6256 fragS
*fragp ATTRIBUTE_UNUSED
)
6261 /* We have no need to default values of symbols. */
6264 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6269 /* Functions concerning relocs. */
6271 /* The location from which a PC relative jump should be calculated,
6272 given a PC relative reloc. */
6275 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6277 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6282 /* This is called to see whether a fixup should be adjusted to use a
6283 section symbol. We take the opportunity to change a fixup against
6284 a symbol in the TOC subsegment into a reloc against the
6285 corresponding .tc symbol. */
6288 ppc_fix_adjustable (fixS
*fix
)
6290 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6291 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6292 TC_SYMFIELD_TYPE
*tc
;
6294 if (symseg
== absolute_section
)
6297 /* Always adjust symbols in debugging sections. */
6298 if (bfd_get_section_flags (stdoutput
, symseg
) & SEC_DEBUGGING
)
6301 if (ppc_toc_csect
!= (symbolS
*) NULL
6302 && fix
->fx_addsy
!= ppc_toc_csect
6303 && symseg
== data_section
6304 && val
>= ppc_toc_frag
->fr_address
6305 && (ppc_after_toc_frag
== (fragS
*) NULL
6306 || val
< ppc_after_toc_frag
->fr_address
))
6310 for (sy
= symbol_next (ppc_toc_csect
);
6311 sy
!= (symbolS
*) NULL
;
6312 sy
= symbol_next (sy
))
6314 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6316 if (sy_tc
->symbol_class
== XMC_TC0
)
6318 if (sy_tc
->symbol_class
!= XMC_TC
)
6320 if (val
== resolve_symbol_value (sy
))
6323 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6328 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6329 _("symbol in .toc does not match any .tc"));
6332 /* Possibly adjust the reloc to be against the csect. */
6333 tc
= symbol_get_tc (fix
->fx_addsy
);
6335 && tc
->symbol_class
!= XMC_TC0
6336 && tc
->symbol_class
!= XMC_TC
6337 && symseg
!= bss_section
6338 /* Don't adjust if this is a reloc in the toc section. */
6339 && (symseg
!= data_section
6340 || ppc_toc_csect
== NULL
6341 || val
< ppc_toc_frag
->fr_address
6342 || (ppc_after_toc_frag
!= NULL
6343 && val
>= ppc_after_toc_frag
->fr_address
)))
6345 symbolS
*csect
= tc
->within
;
6347 /* If the symbol was not declared by a label (eg: a section symbol),
6348 use the section instead of the csect. This doesn't happen in
6349 normal AIX assembly code. */
6351 csect
= seg_info (symseg
)->sym
;
6353 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6354 fix
->fx_addsy
= csect
;
6359 /* Adjust a reloc against a .lcomm symbol to be against the base
6361 if (symseg
== bss_section
6362 && ! S_IS_EXTERNAL (fix
->fx_addsy
))
6364 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6366 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6373 /* A reloc from one csect to another must be kept. The assembler
6374 will, of course, keep relocs between sections, and it will keep
6375 absolute relocs, but we need to force it to keep PC relative relocs
6376 between two csects in the same section. */
6379 ppc_force_relocation (fixS
*fix
)
6381 /* At this point fix->fx_addsy should already have been converted to
6382 a csect symbol. If the csect does not include the fragment, then
6383 we need to force the relocation. */
6385 && fix
->fx_addsy
!= NULL
6386 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6387 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6388 > fix
->fx_frag
->fr_address
)
6389 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6390 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6391 <= fix
->fx_frag
->fr_address
))))
6394 return generic_force_reloc (fix
);
6398 ppc_new_dot_label (symbolS
*sym
)
6400 /* Anchor this label to the current csect for relocations. */
6401 symbol_get_tc (sym
)->within
= ppc_current_csect
;
6404 #endif /* OBJ_XCOFF */
6407 /* If this function returns non-zero, it guarantees that a relocation
6408 will be emitted for a fixup. */
6411 ppc_force_relocation (fixS
*fix
)
6413 /* Branch prediction relocations must force a relocation, as must
6414 the vtable description relocs. */
6415 switch (fix
->fx_r_type
)
6417 case BFD_RELOC_PPC_B16_BRTAKEN
:
6418 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6419 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6420 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6421 case BFD_RELOC_24_PLT_PCREL
:
6422 case BFD_RELOC_PPC64_TOC
:
6424 case BFD_RELOC_PPC_B26
:
6425 case BFD_RELOC_PPC_BA26
:
6426 case BFD_RELOC_PPC_B16
:
6427 case BFD_RELOC_PPC_BA16
:
6428 /* All branch fixups targeting a localentry symbol must
6429 force a relocation. */
6432 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6433 elf_symbol_type
*elfsym
6434 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6435 gas_assert (elfsym
);
6436 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6444 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6445 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
)
6448 return generic_force_reloc (fix
);
6452 ppc_fix_adjustable (fixS
*fix
)
6454 switch (fix
->fx_r_type
)
6456 /* All branch fixups targeting a localentry symbol must
6457 continue using the symbol. */
6458 case BFD_RELOC_PPC_B26
:
6459 case BFD_RELOC_PPC_BA26
:
6460 case BFD_RELOC_PPC_B16
:
6461 case BFD_RELOC_PPC_BA16
:
6462 case BFD_RELOC_PPC_B16_BRTAKEN
:
6463 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6464 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6465 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6468 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6469 elf_symbol_type
*elfsym
6470 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6471 gas_assert (elfsym
);
6472 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6480 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
6481 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
6482 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
6483 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
6484 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
6485 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
6486 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
6487 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
6488 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
6489 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6490 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
));
6495 ppc_frag_check (struct frag
*fragP
)
6497 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
6498 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6499 _("instruction address is not a multiple of %d"),
6500 fragP
->insn_addr
+ 1);
6503 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6504 rs_align_code frag. */
6507 ppc_handle_align (struct frag
*fragP
)
6509 valueT count
= (fragP
->fr_next
->fr_address
6510 - (fragP
->fr_address
+ fragP
->fr_fix
));
6512 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && count
!= 0 && (count
& 1) == 0)
6514 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6517 md_number_to_chars (dest
, 0x4400, 2);
6519 else if (count
!= 0 && (count
& 3) == 0)
6521 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6525 if (count
> 4 * nop_limit
&& count
< 0x2000000)
6529 /* Make a branch, then follow with nops. Insert another
6530 frag to handle the nops. */
6531 md_number_to_chars (dest
, 0x48000000 + count
, 4);
6536 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6537 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
6538 fragP
->fr_next
= rest
;
6540 rest
->fr_address
+= rest
->fr_fix
+ 4;
6542 /* If we leave the next frag as rs_align_code we'll come here
6543 again, resulting in a bunch of branches rather than a
6544 branch followed by nops. */
6545 rest
->fr_type
= rs_align
;
6546 dest
= rest
->fr_literal
;
6549 md_number_to_chars (dest
, 0x60000000, 4);
6551 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0
6552 || (ppc_cpu
& PPC_OPCODE_POWER7
) != 0
6553 || (ppc_cpu
& PPC_OPCODE_POWER8
) != 0
6554 || (ppc_cpu
& PPC_OPCODE_POWER9
) != 0)
6556 /* For power6, power7, power8 and power9, we want the last nop to be
6557 a group terminating one. Do this by inserting an rs_fill frag
6558 immediately after this one, with its address set to the last nop
6559 location. This will automatically reduce the number of nops in
6560 the current frag by one. */
6563 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6565 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
6566 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
6567 group_nop
->fr_fix
= 0;
6568 group_nop
->fr_offset
= 1;
6569 group_nop
->fr_type
= rs_fill
;
6570 fragP
->fr_next
= group_nop
;
6571 dest
= group_nop
->fr_literal
;
6574 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0
6575 || (ppc_cpu
& PPC_OPCODE_POWER8
) != 0
6576 || (ppc_cpu
& PPC_OPCODE_POWER9
) != 0)
6578 if (ppc_cpu
& PPC_OPCODE_E500MC
)
6579 /* e500mc group terminating nop: "ori 0,0,0". */
6580 md_number_to_chars (dest
, 0x60000000, 4);
6582 /* power7/power8/power9 group terminating nop: "ori 2,2,0". */
6583 md_number_to_chars (dest
, 0x60420000, 4);
6586 /* power6 group terminating nop: "ori 1,1,0". */
6587 md_number_to_chars (dest
, 0x60210000, 4);
6592 /* Apply a fixup to the object code. This is called for all the
6593 fixups we generated by the calls to fix_new_exp, above. */
6596 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
6598 valueT value
= * valP
;
6600 const struct powerpc_operand
*operand
;
6603 if (fixP
->fx_addsy
!= NULL
)
6605 /* Hack around bfd_install_relocation brain damage. */
6607 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
6609 if (fixP
->fx_addsy
== abs_section_sym
)
6615 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6616 the symbol values. If we are doing this relocation the code in
6617 write.c is going to call bfd_install_relocation, which is also
6618 going to use the symbol value. That means that if the reloc is
6619 fully resolved we want to use *valP since bfd_install_relocation is
6621 However, if the reloc is not fully resolved we do not want to
6622 use *valP, and must use fx_offset instead. If the relocation
6623 is PC-relative, we then need to re-apply md_pcrel_from_section
6624 to this new relocation value. */
6625 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
6630 value
= fixP
->fx_offset
;
6632 value
-= md_pcrel_from_section (fixP
, seg
);
6636 /* We are only able to convert some relocs to pc-relative. */
6639 switch (fixP
->fx_r_type
)
6641 case BFD_RELOC_LO16
:
6642 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
6645 case BFD_RELOC_HI16
:
6646 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
6649 case BFD_RELOC_HI16_S
:
6650 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
6654 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
6658 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
6662 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
6665 case BFD_RELOC_PPC_16DX_HA
:
6666 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6673 else if (!fixP
->fx_done
6674 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
6676 /* addpcis is relative to next insn address. */
6678 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6683 if (fixP
->fx_pcrel_adjust
!= 0)
6685 /* This is a fixup on an instruction. */
6686 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
6688 operand
= &powerpc_operands
[opindex
];
6690 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6691 does not generate a reloc. It uses the offset of `sym' within its
6692 csect. Other usages, such as `.long sym', generate relocs. This
6693 is the documented behaviour of non-TOC symbols. */
6694 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
6695 && (operand
->bitm
& 0xfff0) == 0xfff0
6696 && operand
->shift
== 0
6697 && (operand
->insert
== NULL
|| ppc_obj64
)
6698 && fixP
->fx_addsy
!= NULL
6699 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
6700 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
6701 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC0
6702 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
6704 value
= fixP
->fx_offset
;
6708 /* During parsing of instructions, a TOC16 reloc is generated for
6709 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6710 in the toc. But at parse time, SYM may be not yet defined, so
6711 check again here. */
6712 if (fixP
->fx_r_type
== BFD_RELOC_16
6713 && fixP
->fx_addsy
!= NULL
6714 && ppc_is_toc_sym (fixP
->fx_addsy
))
6715 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
6719 /* Calculate value to be stored in field. */
6721 switch (fixP
->fx_r_type
)
6724 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
6725 case BFD_RELOC_PPC_VLE_LO16A
:
6726 case BFD_RELOC_PPC_VLE_LO16D
:
6728 case BFD_RELOC_LO16
:
6729 case BFD_RELOC_LO16_PCREL
:
6730 fieldval
= value
& 0xffff;
6732 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6733 fieldval
= SEX16 (fieldval
);
6734 fixP
->fx_no_overflow
= 1;
6737 case BFD_RELOC_HI16
:
6738 case BFD_RELOC_HI16_PCREL
:
6740 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6742 fieldval
= value
>> 16;
6743 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6745 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6746 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
6752 case BFD_RELOC_PPC_VLE_HI16A
:
6753 case BFD_RELOC_PPC_VLE_HI16D
:
6754 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6756 fieldval
= PPC_HI (value
);
6757 goto sign_extend_16
;
6759 case BFD_RELOC_HI16_S
:
6760 case BFD_RELOC_HI16_S_PCREL
:
6761 case BFD_RELOC_PPC_16DX_HA
:
6762 case BFD_RELOC_PPC_REL16DX_HA
:
6764 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6766 fieldval
= (value
+ 0x8000) >> 16;
6767 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6769 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6770 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
6776 case BFD_RELOC_PPC_VLE_HA16A
:
6777 case BFD_RELOC_PPC_VLE_HA16D
:
6778 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6780 fieldval
= PPC_HA (value
);
6781 goto sign_extend_16
;
6784 case BFD_RELOC_PPC64_HIGHER
:
6785 fieldval
= PPC_HIGHER (value
);
6786 goto sign_extend_16
;
6788 case BFD_RELOC_PPC64_HIGHER_S
:
6789 fieldval
= PPC_HIGHERA (value
);
6790 goto sign_extend_16
;
6792 case BFD_RELOC_PPC64_HIGHEST
:
6793 fieldval
= PPC_HIGHEST (value
);
6794 goto sign_extend_16
;
6796 case BFD_RELOC_PPC64_HIGHEST_S
:
6797 fieldval
= PPC_HIGHESTA (value
);
6798 goto sign_extend_16
;
6805 if (operand
!= NULL
)
6807 /* Handle relocs in an insn. */
6808 switch (fixP
->fx_r_type
)
6811 /* The following relocs can't be calculated by the assembler.
6812 Leave the field zero. */
6813 case BFD_RELOC_PPC_TPREL16
:
6814 case BFD_RELOC_PPC_TPREL16_LO
:
6815 case BFD_RELOC_PPC_TPREL16_HI
:
6816 case BFD_RELOC_PPC_TPREL16_HA
:
6817 case BFD_RELOC_PPC_DTPREL16
:
6818 case BFD_RELOC_PPC_DTPREL16_LO
:
6819 case BFD_RELOC_PPC_DTPREL16_HI
:
6820 case BFD_RELOC_PPC_DTPREL16_HA
:
6821 case BFD_RELOC_PPC_GOT_TLSGD16
:
6822 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
6823 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
6824 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
6825 case BFD_RELOC_PPC_GOT_TLSLD16
:
6826 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
6827 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
6828 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
6829 case BFD_RELOC_PPC_GOT_TPREL16
:
6830 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
6831 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
6832 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
6833 case BFD_RELOC_PPC_GOT_DTPREL16
:
6834 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
6835 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
6836 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
6837 case BFD_RELOC_PPC64_TPREL16_DS
:
6838 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
6839 case BFD_RELOC_PPC64_TPREL16_HIGH
:
6840 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
6841 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
6842 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
6843 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
6844 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
6845 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
6846 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
6847 case BFD_RELOC_PPC64_DTPREL16_DS
:
6848 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
6849 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
6850 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
6851 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
6852 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
6853 gas_assert (fixP
->fx_addsy
!= NULL
);
6854 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
6858 /* These also should leave the field zero for the same
6859 reason. Note that older versions of gas wrote values
6860 here. If we want to go back to the old behaviour, then
6861 all _LO and _LO_DS cases will need to be treated like
6862 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6863 case BFD_RELOC_16_GOTOFF
:
6864 case BFD_RELOC_LO16_GOTOFF
:
6865 case BFD_RELOC_HI16_GOTOFF
:
6866 case BFD_RELOC_HI16_S_GOTOFF
:
6867 case BFD_RELOC_LO16_PLTOFF
:
6868 case BFD_RELOC_HI16_PLTOFF
:
6869 case BFD_RELOC_HI16_S_PLTOFF
:
6870 case BFD_RELOC_GPREL16
:
6871 case BFD_RELOC_16_BASEREL
:
6872 case BFD_RELOC_LO16_BASEREL
:
6873 case BFD_RELOC_HI16_BASEREL
:
6874 case BFD_RELOC_HI16_S_BASEREL
:
6875 case BFD_RELOC_PPC_TOC16
:
6876 case BFD_RELOC_PPC64_TOC16_LO
:
6877 case BFD_RELOC_PPC64_TOC16_HI
:
6878 case BFD_RELOC_PPC64_TOC16_HA
:
6879 case BFD_RELOC_PPC64_PLTGOT16
:
6880 case BFD_RELOC_PPC64_PLTGOT16_LO
:
6881 case BFD_RELOC_PPC64_PLTGOT16_HI
:
6882 case BFD_RELOC_PPC64_PLTGOT16_HA
:
6883 case BFD_RELOC_PPC64_GOT16_DS
:
6884 case BFD_RELOC_PPC64_GOT16_LO_DS
:
6885 case BFD_RELOC_PPC64_PLT16_LO_DS
:
6886 case BFD_RELOC_PPC64_SECTOFF_DS
:
6887 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
6888 case BFD_RELOC_PPC64_TOC16_DS
:
6889 case BFD_RELOC_PPC64_TOC16_LO_DS
:
6890 case BFD_RELOC_PPC64_PLTGOT16_DS
:
6891 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
6892 case BFD_RELOC_PPC_EMB_NADDR16
:
6893 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
6894 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
6895 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
6896 case BFD_RELOC_PPC_EMB_SDAI16
:
6897 case BFD_RELOC_PPC_EMB_SDA2I16
:
6898 case BFD_RELOC_PPC_EMB_SDA2REL
:
6899 case BFD_RELOC_PPC_EMB_SDA21
:
6900 case BFD_RELOC_PPC_EMB_MRKREF
:
6901 case BFD_RELOC_PPC_EMB_RELSEC16
:
6902 case BFD_RELOC_PPC_EMB_RELST_LO
:
6903 case BFD_RELOC_PPC_EMB_RELST_HI
:
6904 case BFD_RELOC_PPC_EMB_RELST_HA
:
6905 case BFD_RELOC_PPC_EMB_BIT_FLD
:
6906 case BFD_RELOC_PPC_EMB_RELSDA
:
6907 case BFD_RELOC_PPC_VLE_SDA21
:
6908 case BFD_RELOC_PPC_VLE_SDA21_LO
:
6909 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
6910 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
6911 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
6912 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
6913 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
6914 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
6915 gas_assert (fixP
->fx_addsy
!= NULL
);
6918 case BFD_RELOC_PPC_TLS
:
6919 case BFD_RELOC_PPC_TLSGD
:
6920 case BFD_RELOC_PPC_TLSLD
:
6926 case BFD_RELOC_PPC_B16
:
6927 /* Adjust the offset to the instruction boundary. */
6932 case BFD_RELOC_VTABLE_INHERIT
:
6933 case BFD_RELOC_VTABLE_ENTRY
:
6934 case BFD_RELOC_PPC_DTPMOD
:
6935 case BFD_RELOC_PPC_TPREL
:
6936 case BFD_RELOC_PPC_DTPREL
:
6937 case BFD_RELOC_PPC_COPY
:
6938 case BFD_RELOC_PPC_GLOB_DAT
:
6939 case BFD_RELOC_32_PLT_PCREL
:
6940 case BFD_RELOC_PPC_EMB_NADDR32
:
6941 case BFD_RELOC_PPC64_TOC
:
6942 case BFD_RELOC_CTOR
:
6944 case BFD_RELOC_32_PCREL
:
6947 case BFD_RELOC_64_PCREL
:
6948 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
6949 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
6950 _("%s unsupported as instruction fixup"),
6951 bfd_get_reloc_code_name (fixP
->fx_r_type
));
6960 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6961 contents can stay at zero. */
6962 #define APPLY_RELOC fixP->fx_done
6964 #define APPLY_RELOC 1
6966 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
6969 unsigned char *where
;
6971 /* Fetch the instruction, insert the fully resolved operand
6972 value, and stuff the instruction back again. */
6973 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
6974 if (target_big_endian
)
6976 if (fixP
->fx_size
== 4)
6977 insn
= bfd_getb32 (where
);
6979 insn
= bfd_getb16 (where
);
6983 if (fixP
->fx_size
== 4)
6984 insn
= bfd_getl32 (where
);
6986 insn
= bfd_getl16 (where
);
6988 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
6989 fixP
->tc_fix_data
.ppc_cpu
,
6990 fixP
->fx_file
, fixP
->fx_line
);
6991 if (target_big_endian
)
6993 if (fixP
->fx_size
== 4)
6994 bfd_putb32 (insn
, where
);
6996 bfd_putb16 (insn
, where
);
7000 if (fixP
->fx_size
== 4)
7001 bfd_putl32 (insn
, where
);
7003 bfd_putl16 (insn
, where
);
7008 /* Nothing else to do here. */
7011 gas_assert (fixP
->fx_addsy
!= NULL
);
7012 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7017 /* Use expr_symbol_where to see if this is an expression
7019 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7020 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7021 _("unresolved expression that must be resolved"));
7023 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7024 _("unsupported relocation against %s"),
7025 S_GET_NAME (fixP
->fx_addsy
));
7032 /* Handle relocs in data. */
7033 switch (fixP
->fx_r_type
)
7035 case BFD_RELOC_VTABLE_INHERIT
:
7037 && !S_IS_DEFINED (fixP
->fx_addsy
)
7038 && !S_IS_WEAK (fixP
->fx_addsy
))
7039 S_SET_WEAK (fixP
->fx_addsy
);
7042 case BFD_RELOC_VTABLE_ENTRY
:
7047 /* These can appear with @l etc. in data. */
7048 case BFD_RELOC_LO16
:
7049 case BFD_RELOC_LO16_PCREL
:
7050 case BFD_RELOC_HI16
:
7051 case BFD_RELOC_HI16_PCREL
:
7052 case BFD_RELOC_HI16_S
:
7053 case BFD_RELOC_HI16_S_PCREL
:
7054 case BFD_RELOC_PPC64_HIGHER
:
7055 case BFD_RELOC_PPC64_HIGHER_S
:
7056 case BFD_RELOC_PPC64_HIGHEST
:
7057 case BFD_RELOC_PPC64_HIGHEST_S
:
7058 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7059 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7060 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7063 case BFD_RELOC_PPC_DTPMOD
:
7064 case BFD_RELOC_PPC_TPREL
:
7065 case BFD_RELOC_PPC_DTPREL
:
7066 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7069 /* Just punt all of these to the linker. */
7070 case BFD_RELOC_PPC_B16_BRTAKEN
:
7071 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7072 case BFD_RELOC_16_GOTOFF
:
7073 case BFD_RELOC_LO16_GOTOFF
:
7074 case BFD_RELOC_HI16_GOTOFF
:
7075 case BFD_RELOC_HI16_S_GOTOFF
:
7076 case BFD_RELOC_LO16_PLTOFF
:
7077 case BFD_RELOC_HI16_PLTOFF
:
7078 case BFD_RELOC_HI16_S_PLTOFF
:
7079 case BFD_RELOC_PPC_COPY
:
7080 case BFD_RELOC_PPC_GLOB_DAT
:
7081 case BFD_RELOC_16_BASEREL
:
7082 case BFD_RELOC_LO16_BASEREL
:
7083 case BFD_RELOC_HI16_BASEREL
:
7084 case BFD_RELOC_HI16_S_BASEREL
:
7085 case BFD_RELOC_PPC_TLS
:
7086 case BFD_RELOC_PPC_DTPREL16_LO
:
7087 case BFD_RELOC_PPC_DTPREL16_HI
:
7088 case BFD_RELOC_PPC_DTPREL16_HA
:
7089 case BFD_RELOC_PPC_TPREL16_LO
:
7090 case BFD_RELOC_PPC_TPREL16_HI
:
7091 case BFD_RELOC_PPC_TPREL16_HA
:
7092 case BFD_RELOC_PPC_GOT_TLSGD16
:
7093 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7094 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7095 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7096 case BFD_RELOC_PPC_GOT_TLSLD16
:
7097 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7098 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7099 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7100 case BFD_RELOC_PPC_GOT_DTPREL16
:
7101 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7102 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7103 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7104 case BFD_RELOC_PPC_GOT_TPREL16
:
7105 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7106 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7107 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7108 case BFD_RELOC_24_PLT_PCREL
:
7109 case BFD_RELOC_PPC_LOCAL24PC
:
7110 case BFD_RELOC_32_PLT_PCREL
:
7111 case BFD_RELOC_GPREL16
:
7112 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7113 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7114 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7115 case BFD_RELOC_PPC_EMB_NADDR32
:
7116 case BFD_RELOC_PPC_EMB_NADDR16
:
7117 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7118 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7119 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7120 case BFD_RELOC_PPC_EMB_SDAI16
:
7121 case BFD_RELOC_PPC_EMB_SDA2REL
:
7122 case BFD_RELOC_PPC_EMB_SDA2I16
:
7123 case BFD_RELOC_PPC_EMB_SDA21
:
7124 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7125 case BFD_RELOC_PPC_EMB_MRKREF
:
7126 case BFD_RELOC_PPC_EMB_RELSEC16
:
7127 case BFD_RELOC_PPC_EMB_RELST_LO
:
7128 case BFD_RELOC_PPC_EMB_RELST_HI
:
7129 case BFD_RELOC_PPC_EMB_RELST_HA
:
7130 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7131 case BFD_RELOC_PPC_EMB_RELSDA
:
7132 case BFD_RELOC_PPC64_TOC
:
7133 case BFD_RELOC_PPC_TOC16
:
7134 case BFD_RELOC_PPC64_TOC16_LO
:
7135 case BFD_RELOC_PPC64_TOC16_HI
:
7136 case BFD_RELOC_PPC64_TOC16_HA
:
7137 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7138 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7139 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7140 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7141 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7142 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7143 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7144 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7145 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7146 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7147 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7148 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7154 case BFD_RELOC_NONE
:
7156 case BFD_RELOC_CTOR
:
7158 case BFD_RELOC_32_PCREL
:
7161 case BFD_RELOC_64_PCREL
:
7163 case BFD_RELOC_16_PCREL
:
7169 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7174 if (fixP
->fx_size
&& APPLY_RELOC
)
7175 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7176 fieldval
, fixP
->fx_size
);
7178 && (seg
->flags
& SEC_CODE
) != 0
7179 && fixP
->fx_size
== 4
7182 && (fixP
->fx_r_type
== BFD_RELOC_32
7183 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7184 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7185 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7186 _("data in executable section"));
7190 ppc_elf_validate_fix (fixP
, seg
);
7191 fixP
->fx_addnumber
= value
;
7193 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7194 from the section contents. If we are going to be emitting a reloc
7195 then the section contents are immaterial, so don't warn if they
7196 happen to overflow. Leave such warnings to ld. */
7199 fixP
->fx_no_overflow
= 1;
7201 /* Arrange to emit .TOC. as a normal symbol if used in anything
7202 but .TOC.@tocbase. */
7204 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7205 && fixP
->fx_addsy
!= NULL
7206 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7207 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7210 if (fixP
->fx_r_type
!= BFD_RELOC_PPC_TOC16
)
7211 fixP
->fx_addnumber
= 0;
7215 fixP
->fx_addnumber
= 0;
7217 /* We want to use the offset within the toc, not the actual VMA
7219 fixP
->fx_addnumber
=
7220 - bfd_get_section_vma (stdoutput
, S_GET_SEGMENT (fixP
->fx_addsy
))
7221 - S_GET_VALUE (ppc_toc_csect
);
7222 /* Set *valP to avoid errors. */
7229 /* Generate a reloc for a fixup. */
7232 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7236 reloc
= XNEW (arelent
);
7238 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7239 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7240 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7241 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7242 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7244 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7245 _("reloc %d not supported by object file format"),
7246 (int) fixp
->fx_r_type
);
7249 reloc
->addend
= fixp
->fx_addnumber
;
7255 ppc_cfi_frame_initial_instructions (void)
7257 cfi_add_CFA_def_cfa (1, 0);
7261 tc_ppc_regname_to_dw2regnum (char *regname
)
7263 unsigned int regnum
= -1;
7267 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7269 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7270 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7271 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7272 { "spe_acc", 111 }, { "spefscr", 112 }
7275 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7276 if (strcmp (regnames
[i
].name
, regname
) == 0)
7277 return regnames
[i
].dw2regnum
;
7279 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7281 p
= regname
+ 1 + (regname
[1] == '.');
7282 regnum
= strtoul (p
, &q
, 10);
7283 if (p
== q
|| *q
|| regnum
>= 32)
7285 if (regname
[0] == 'f')
7287 else if (regname
[0] == 'v')
7290 else if (regname
[0] == 'c' && regname
[1] == 'r')
7292 p
= regname
+ 2 + (regname
[2] == '.');
7293 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7295 regnum
= p
[0] - '0' + 68;