1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2018 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian
;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian
= 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p
= TARGET_REG_NAMES_P
;
96 static void ppc_macro (char *, const struct powerpc_macro
*);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS
*, offsetT
);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
153 /* Generic assembler global variables which must be defined by all
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars
[] = "#!";
162 static const char ppc_eabi_comment_chars
[] = "#";
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
167 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
170 const char comment_chars
[] = "#";
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars
[] = "#";
176 /* Characters which may be used to separate multiple commands on a
178 const char line_separator_chars
[] = ";";
180 /* Characters which are used to indicate an exponent in a floating
182 const char EXP_CHARS
[] = "eE";
184 /* Characters which mean that a number is a floating point constant,
186 const char FLT_CHARS
[] = "dD";
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars
[] = "%[";
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment
;
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length
;
198 /* More than this number of nops in an alignment op gets a branch
200 unsigned long nop_limit
= 4;
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu
= 0;
205 ppc_cpu_t sticky
= 0;
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion
= 0;
211 /* Flags set on encountering toc relocs. */
213 has_large_toc_reloc
= 1,
214 has_small_toc_reloc
= 2
218 /* Warn on emitting data to code sections. */
224 /* The target specific pseudo-ops which we support. */
226 const pseudo_typeS md_pseudo_table
[] =
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte
, 0 },
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm
, 0 },
237 { "lcomm", ppc_comm
, 1 },
241 { "bi", ppc_biei
, 0 },
243 { "csect", ppc_csect
, 0 },
244 { "dwsect", ppc_dwsect
, 0 },
245 { "data", ppc_section
, 'd' },
249 { "ei", ppc_biei
, 1 },
251 { "extern", ppc_extern
, 0 },
252 { "function", ppc_function
, 0 },
253 { "lglobl", ppc_lglobl
, 0 },
254 { "ref", ppc_ref
, 0 },
255 { "rename", ppc_rename
, 0 },
256 { "section", ppc_named_section
, 0 },
257 { "stabx", ppc_stabx
, 0 },
258 { "text", ppc_section
, 't' },
259 { "toc", ppc_toc
, 0 },
260 { "long", ppc_xcoff_cons
, 2 },
261 { "llong", ppc_xcoff_cons
, 3 },
262 { "word", ppc_xcoff_cons
, 1 },
263 { "short", ppc_xcoff_cons
, 1 },
264 { "vbyte", ppc_vbyte
, 0 },
268 { "llong", cons
, 8 },
269 { "rdata", ppc_elf_rdata
, 0 },
270 { "rodata", ppc_elf_rdata
, 0 },
271 { "lcomm", ppc_elf_lcomm
, 0 },
272 { "localentry", ppc_elf_localentry
, 0 },
273 { "abiversion", ppc_elf_abiversion
, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous
, 0 },
280 { "pdata", ppc_pdata
, 0 },
281 { "ydata", ppc_ydata
, 0 },
282 { "reldata", ppc_reldata
, 0 },
283 { "rdata", ppc_rdata
, 0 },
284 { "ualong", ppc_ualong
, 0 },
285 { "znop", ppc_znop
, 0 },
286 { "comm", ppc_pe_comm
, 0 },
287 { "lcomm", ppc_pe_comm
, 1 },
288 { "section", ppc_pe_section
, 0 },
289 { "function", ppc_pe_function
,0 },
290 { "tocd", ppc_pe_tocd
, 0 },
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
295 { "machine", ppc_machine
, 0 },
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
306 /* Structure to hold information about predefined registers. */
310 unsigned short value
;
311 unsigned short flags
;
314 /* List of registers that are pre-defined:
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
339 dsisr has the value 18
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
345 The table is sorted. Suitable for searching by a binary search. */
347 static const struct pd_reg pre_defined_registers
[] =
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG
},
351 { "cr.1", 1, PPC_OPERAND_CR_REG
},
352 { "cr.2", 2, PPC_OPERAND_CR_REG
},
353 { "cr.3", 3, PPC_OPERAND_CR_REG
},
354 { "cr.4", 4, PPC_OPERAND_CR_REG
},
355 { "cr.5", 5, PPC_OPERAND_CR_REG
},
356 { "cr.6", 6, PPC_OPERAND_CR_REG
},
357 { "cr.7", 7, PPC_OPERAND_CR_REG
},
359 { "cr0", 0, PPC_OPERAND_CR_REG
},
360 { "cr1", 1, PPC_OPERAND_CR_REG
},
361 { "cr2", 2, PPC_OPERAND_CR_REG
},
362 { "cr3", 3, PPC_OPERAND_CR_REG
},
363 { "cr4", 4, PPC_OPERAND_CR_REG
},
364 { "cr5", 5, PPC_OPERAND_CR_REG
},
365 { "cr6", 6, PPC_OPERAND_CR_REG
},
366 { "cr7", 7, PPC_OPERAND_CR_REG
},
368 { "ctr", 9, PPC_OPERAND_SPR
},
369 { "dar", 19, PPC_OPERAND_SPR
},
370 { "dec", 22, PPC_OPERAND_SPR
},
371 { "dsisr", 18, PPC_OPERAND_SPR
},
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR
},
375 { "f.1", 1, PPC_OPERAND_FPR
},
376 { "f.10", 10, PPC_OPERAND_FPR
},
377 { "f.11", 11, PPC_OPERAND_FPR
},
378 { "f.12", 12, PPC_OPERAND_FPR
},
379 { "f.13", 13, PPC_OPERAND_FPR
},
380 { "f.14", 14, PPC_OPERAND_FPR
},
381 { "f.15", 15, PPC_OPERAND_FPR
},
382 { "f.16", 16, PPC_OPERAND_FPR
},
383 { "f.17", 17, PPC_OPERAND_FPR
},
384 { "f.18", 18, PPC_OPERAND_FPR
},
385 { "f.19", 19, PPC_OPERAND_FPR
},
386 { "f.2", 2, PPC_OPERAND_FPR
},
387 { "f.20", 20, PPC_OPERAND_FPR
},
388 { "f.21", 21, PPC_OPERAND_FPR
},
389 { "f.22", 22, PPC_OPERAND_FPR
},
390 { "f.23", 23, PPC_OPERAND_FPR
},
391 { "f.24", 24, PPC_OPERAND_FPR
},
392 { "f.25", 25, PPC_OPERAND_FPR
},
393 { "f.26", 26, PPC_OPERAND_FPR
},
394 { "f.27", 27, PPC_OPERAND_FPR
},
395 { "f.28", 28, PPC_OPERAND_FPR
},
396 { "f.29", 29, PPC_OPERAND_FPR
},
397 { "f.3", 3, PPC_OPERAND_FPR
},
398 { "f.30", 30, PPC_OPERAND_FPR
},
399 { "f.31", 31, PPC_OPERAND_FPR
},
400 { "f.32", 32, PPC_OPERAND_VSR
},
401 { "f.33", 33, PPC_OPERAND_VSR
},
402 { "f.34", 34, PPC_OPERAND_VSR
},
403 { "f.35", 35, PPC_OPERAND_VSR
},
404 { "f.36", 36, PPC_OPERAND_VSR
},
405 { "f.37", 37, PPC_OPERAND_VSR
},
406 { "f.38", 38, PPC_OPERAND_VSR
},
407 { "f.39", 39, PPC_OPERAND_VSR
},
408 { "f.4", 4, PPC_OPERAND_FPR
},
409 { "f.40", 40, PPC_OPERAND_VSR
},
410 { "f.41", 41, PPC_OPERAND_VSR
},
411 { "f.42", 42, PPC_OPERAND_VSR
},
412 { "f.43", 43, PPC_OPERAND_VSR
},
413 { "f.44", 44, PPC_OPERAND_VSR
},
414 { "f.45", 45, PPC_OPERAND_VSR
},
415 { "f.46", 46, PPC_OPERAND_VSR
},
416 { "f.47", 47, PPC_OPERAND_VSR
},
417 { "f.48", 48, PPC_OPERAND_VSR
},
418 { "f.49", 49, PPC_OPERAND_VSR
},
419 { "f.5", 5, PPC_OPERAND_FPR
},
420 { "f.50", 50, PPC_OPERAND_VSR
},
421 { "f.51", 51, PPC_OPERAND_VSR
},
422 { "f.52", 52, PPC_OPERAND_VSR
},
423 { "f.53", 53, PPC_OPERAND_VSR
},
424 { "f.54", 54, PPC_OPERAND_VSR
},
425 { "f.55", 55, PPC_OPERAND_VSR
},
426 { "f.56", 56, PPC_OPERAND_VSR
},
427 { "f.57", 57, PPC_OPERAND_VSR
},
428 { "f.58", 58, PPC_OPERAND_VSR
},
429 { "f.59", 59, PPC_OPERAND_VSR
},
430 { "f.6", 6, PPC_OPERAND_FPR
},
431 { "f.60", 60, PPC_OPERAND_VSR
},
432 { "f.61", 61, PPC_OPERAND_VSR
},
433 { "f.62", 62, PPC_OPERAND_VSR
},
434 { "f.63", 63, PPC_OPERAND_VSR
},
435 { "f.7", 7, PPC_OPERAND_FPR
},
436 { "f.8", 8, PPC_OPERAND_FPR
},
437 { "f.9", 9, PPC_OPERAND_FPR
},
439 { "f0", 0, PPC_OPERAND_FPR
},
440 { "f1", 1, PPC_OPERAND_FPR
},
441 { "f10", 10, PPC_OPERAND_FPR
},
442 { "f11", 11, PPC_OPERAND_FPR
},
443 { "f12", 12, PPC_OPERAND_FPR
},
444 { "f13", 13, PPC_OPERAND_FPR
},
445 { "f14", 14, PPC_OPERAND_FPR
},
446 { "f15", 15, PPC_OPERAND_FPR
},
447 { "f16", 16, PPC_OPERAND_FPR
},
448 { "f17", 17, PPC_OPERAND_FPR
},
449 { "f18", 18, PPC_OPERAND_FPR
},
450 { "f19", 19, PPC_OPERAND_FPR
},
451 { "f2", 2, PPC_OPERAND_FPR
},
452 { "f20", 20, PPC_OPERAND_FPR
},
453 { "f21", 21, PPC_OPERAND_FPR
},
454 { "f22", 22, PPC_OPERAND_FPR
},
455 { "f23", 23, PPC_OPERAND_FPR
},
456 { "f24", 24, PPC_OPERAND_FPR
},
457 { "f25", 25, PPC_OPERAND_FPR
},
458 { "f26", 26, PPC_OPERAND_FPR
},
459 { "f27", 27, PPC_OPERAND_FPR
},
460 { "f28", 28, PPC_OPERAND_FPR
},
461 { "f29", 29, PPC_OPERAND_FPR
},
462 { "f3", 3, PPC_OPERAND_FPR
},
463 { "f30", 30, PPC_OPERAND_FPR
},
464 { "f31", 31, PPC_OPERAND_FPR
},
465 { "f32", 32, PPC_OPERAND_VSR
},
466 { "f33", 33, PPC_OPERAND_VSR
},
467 { "f34", 34, PPC_OPERAND_VSR
},
468 { "f35", 35, PPC_OPERAND_VSR
},
469 { "f36", 36, PPC_OPERAND_VSR
},
470 { "f37", 37, PPC_OPERAND_VSR
},
471 { "f38", 38, PPC_OPERAND_VSR
},
472 { "f39", 39, PPC_OPERAND_VSR
},
473 { "f4", 4, PPC_OPERAND_FPR
},
474 { "f40", 40, PPC_OPERAND_VSR
},
475 { "f41", 41, PPC_OPERAND_VSR
},
476 { "f42", 42, PPC_OPERAND_VSR
},
477 { "f43", 43, PPC_OPERAND_VSR
},
478 { "f44", 44, PPC_OPERAND_VSR
},
479 { "f45", 45, PPC_OPERAND_VSR
},
480 { "f46", 46, PPC_OPERAND_VSR
},
481 { "f47", 47, PPC_OPERAND_VSR
},
482 { "f48", 48, PPC_OPERAND_VSR
},
483 { "f49", 49, PPC_OPERAND_VSR
},
484 { "f5", 5, PPC_OPERAND_FPR
},
485 { "f50", 50, PPC_OPERAND_VSR
},
486 { "f51", 51, PPC_OPERAND_VSR
},
487 { "f52", 52, PPC_OPERAND_VSR
},
488 { "f53", 53, PPC_OPERAND_VSR
},
489 { "f54", 54, PPC_OPERAND_VSR
},
490 { "f55", 55, PPC_OPERAND_VSR
},
491 { "f56", 56, PPC_OPERAND_VSR
},
492 { "f57", 57, PPC_OPERAND_VSR
},
493 { "f58", 58, PPC_OPERAND_VSR
},
494 { "f59", 59, PPC_OPERAND_VSR
},
495 { "f6", 6, PPC_OPERAND_FPR
},
496 { "f60", 60, PPC_OPERAND_VSR
},
497 { "f61", 61, PPC_OPERAND_VSR
},
498 { "f62", 62, PPC_OPERAND_VSR
},
499 { "f63", 63, PPC_OPERAND_VSR
},
500 { "f7", 7, PPC_OPERAND_FPR
},
501 { "f8", 8, PPC_OPERAND_FPR
},
502 { "f9", 9, PPC_OPERAND_FPR
},
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR
},
506 { "gqr.1", 1, PPC_OPERAND_GQR
},
507 { "gqr.2", 2, PPC_OPERAND_GQR
},
508 { "gqr.3", 3, PPC_OPERAND_GQR
},
509 { "gqr.4", 4, PPC_OPERAND_GQR
},
510 { "gqr.5", 5, PPC_OPERAND_GQR
},
511 { "gqr.6", 6, PPC_OPERAND_GQR
},
512 { "gqr.7", 7, PPC_OPERAND_GQR
},
513 { "gqr0", 0, PPC_OPERAND_GQR
},
514 { "gqr1", 1, PPC_OPERAND_GQR
},
515 { "gqr2", 2, PPC_OPERAND_GQR
},
516 { "gqr3", 3, PPC_OPERAND_GQR
},
517 { "gqr4", 4, PPC_OPERAND_GQR
},
518 { "gqr5", 5, PPC_OPERAND_GQR
},
519 { "gqr6", 6, PPC_OPERAND_GQR
},
520 { "gqr7", 7, PPC_OPERAND_GQR
},
522 { "lr", 8, PPC_OPERAND_SPR
},
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR
},
526 { "r.1", 1, PPC_OPERAND_GPR
},
527 { "r.10", 10, PPC_OPERAND_GPR
},
528 { "r.11", 11, PPC_OPERAND_GPR
},
529 { "r.12", 12, PPC_OPERAND_GPR
},
530 { "r.13", 13, PPC_OPERAND_GPR
},
531 { "r.14", 14, PPC_OPERAND_GPR
},
532 { "r.15", 15, PPC_OPERAND_GPR
},
533 { "r.16", 16, PPC_OPERAND_GPR
},
534 { "r.17", 17, PPC_OPERAND_GPR
},
535 { "r.18", 18, PPC_OPERAND_GPR
},
536 { "r.19", 19, PPC_OPERAND_GPR
},
537 { "r.2", 2, PPC_OPERAND_GPR
},
538 { "r.20", 20, PPC_OPERAND_GPR
},
539 { "r.21", 21, PPC_OPERAND_GPR
},
540 { "r.22", 22, PPC_OPERAND_GPR
},
541 { "r.23", 23, PPC_OPERAND_GPR
},
542 { "r.24", 24, PPC_OPERAND_GPR
},
543 { "r.25", 25, PPC_OPERAND_GPR
},
544 { "r.26", 26, PPC_OPERAND_GPR
},
545 { "r.27", 27, PPC_OPERAND_GPR
},
546 { "r.28", 28, PPC_OPERAND_GPR
},
547 { "r.29", 29, PPC_OPERAND_GPR
},
548 { "r.3", 3, PPC_OPERAND_GPR
},
549 { "r.30", 30, PPC_OPERAND_GPR
},
550 { "r.31", 31, PPC_OPERAND_GPR
},
551 { "r.4", 4, PPC_OPERAND_GPR
},
552 { "r.5", 5, PPC_OPERAND_GPR
},
553 { "r.6", 6, PPC_OPERAND_GPR
},
554 { "r.7", 7, PPC_OPERAND_GPR
},
555 { "r.8", 8, PPC_OPERAND_GPR
},
556 { "r.9", 9, PPC_OPERAND_GPR
},
558 { "r.sp", 1, PPC_OPERAND_GPR
},
560 { "r.toc", 2, PPC_OPERAND_GPR
},
562 { "r0", 0, PPC_OPERAND_GPR
},
563 { "r1", 1, PPC_OPERAND_GPR
},
564 { "r10", 10, PPC_OPERAND_GPR
},
565 { "r11", 11, PPC_OPERAND_GPR
},
566 { "r12", 12, PPC_OPERAND_GPR
},
567 { "r13", 13, PPC_OPERAND_GPR
},
568 { "r14", 14, PPC_OPERAND_GPR
},
569 { "r15", 15, PPC_OPERAND_GPR
},
570 { "r16", 16, PPC_OPERAND_GPR
},
571 { "r17", 17, PPC_OPERAND_GPR
},
572 { "r18", 18, PPC_OPERAND_GPR
},
573 { "r19", 19, PPC_OPERAND_GPR
},
574 { "r2", 2, PPC_OPERAND_GPR
},
575 { "r20", 20, PPC_OPERAND_GPR
},
576 { "r21", 21, PPC_OPERAND_GPR
},
577 { "r22", 22, PPC_OPERAND_GPR
},
578 { "r23", 23, PPC_OPERAND_GPR
},
579 { "r24", 24, PPC_OPERAND_GPR
},
580 { "r25", 25, PPC_OPERAND_GPR
},
581 { "r26", 26, PPC_OPERAND_GPR
},
582 { "r27", 27, PPC_OPERAND_GPR
},
583 { "r28", 28, PPC_OPERAND_GPR
},
584 { "r29", 29, PPC_OPERAND_GPR
},
585 { "r3", 3, PPC_OPERAND_GPR
},
586 { "r30", 30, PPC_OPERAND_GPR
},
587 { "r31", 31, PPC_OPERAND_GPR
},
588 { "r4", 4, PPC_OPERAND_GPR
},
589 { "r5", 5, PPC_OPERAND_GPR
},
590 { "r6", 6, PPC_OPERAND_GPR
},
591 { "r7", 7, PPC_OPERAND_GPR
},
592 { "r8", 8, PPC_OPERAND_GPR
},
593 { "r9", 9, PPC_OPERAND_GPR
},
595 { "rtoc", 2, PPC_OPERAND_GPR
},
597 { "sdr1", 25, PPC_OPERAND_SPR
},
599 { "sp", 1, PPC_OPERAND_GPR
},
601 { "srr0", 26, PPC_OPERAND_SPR
},
602 { "srr1", 27, PPC_OPERAND_SPR
},
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR
},
606 { "v.1", 1, PPC_OPERAND_VR
},
607 { "v.10", 10, PPC_OPERAND_VR
},
608 { "v.11", 11, PPC_OPERAND_VR
},
609 { "v.12", 12, PPC_OPERAND_VR
},
610 { "v.13", 13, PPC_OPERAND_VR
},
611 { "v.14", 14, PPC_OPERAND_VR
},
612 { "v.15", 15, PPC_OPERAND_VR
},
613 { "v.16", 16, PPC_OPERAND_VR
},
614 { "v.17", 17, PPC_OPERAND_VR
},
615 { "v.18", 18, PPC_OPERAND_VR
},
616 { "v.19", 19, PPC_OPERAND_VR
},
617 { "v.2", 2, PPC_OPERAND_VR
},
618 { "v.20", 20, PPC_OPERAND_VR
},
619 { "v.21", 21, PPC_OPERAND_VR
},
620 { "v.22", 22, PPC_OPERAND_VR
},
621 { "v.23", 23, PPC_OPERAND_VR
},
622 { "v.24", 24, PPC_OPERAND_VR
},
623 { "v.25", 25, PPC_OPERAND_VR
},
624 { "v.26", 26, PPC_OPERAND_VR
},
625 { "v.27", 27, PPC_OPERAND_VR
},
626 { "v.28", 28, PPC_OPERAND_VR
},
627 { "v.29", 29, PPC_OPERAND_VR
},
628 { "v.3", 3, PPC_OPERAND_VR
},
629 { "v.30", 30, PPC_OPERAND_VR
},
630 { "v.31", 31, PPC_OPERAND_VR
},
631 { "v.4", 4, PPC_OPERAND_VR
},
632 { "v.5", 5, PPC_OPERAND_VR
},
633 { "v.6", 6, PPC_OPERAND_VR
},
634 { "v.7", 7, PPC_OPERAND_VR
},
635 { "v.8", 8, PPC_OPERAND_VR
},
636 { "v.9", 9, PPC_OPERAND_VR
},
638 { "v0", 0, PPC_OPERAND_VR
},
639 { "v1", 1, PPC_OPERAND_VR
},
640 { "v10", 10, PPC_OPERAND_VR
},
641 { "v11", 11, PPC_OPERAND_VR
},
642 { "v12", 12, PPC_OPERAND_VR
},
643 { "v13", 13, PPC_OPERAND_VR
},
644 { "v14", 14, PPC_OPERAND_VR
},
645 { "v15", 15, PPC_OPERAND_VR
},
646 { "v16", 16, PPC_OPERAND_VR
},
647 { "v17", 17, PPC_OPERAND_VR
},
648 { "v18", 18, PPC_OPERAND_VR
},
649 { "v19", 19, PPC_OPERAND_VR
},
650 { "v2", 2, PPC_OPERAND_VR
},
651 { "v20", 20, PPC_OPERAND_VR
},
652 { "v21", 21, PPC_OPERAND_VR
},
653 { "v22", 22, PPC_OPERAND_VR
},
654 { "v23", 23, PPC_OPERAND_VR
},
655 { "v24", 24, PPC_OPERAND_VR
},
656 { "v25", 25, PPC_OPERAND_VR
},
657 { "v26", 26, PPC_OPERAND_VR
},
658 { "v27", 27, PPC_OPERAND_VR
},
659 { "v28", 28, PPC_OPERAND_VR
},
660 { "v29", 29, PPC_OPERAND_VR
},
661 { "v3", 3, PPC_OPERAND_VR
},
662 { "v30", 30, PPC_OPERAND_VR
},
663 { "v31", 31, PPC_OPERAND_VR
},
664 { "v4", 4, PPC_OPERAND_VR
},
665 { "v5", 5, PPC_OPERAND_VR
},
666 { "v6", 6, PPC_OPERAND_VR
},
667 { "v7", 7, PPC_OPERAND_VR
},
668 { "v8", 8, PPC_OPERAND_VR
},
669 { "v9", 9, PPC_OPERAND_VR
},
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR
},
673 { "vs.1", 1, PPC_OPERAND_VSR
},
674 { "vs.10", 10, PPC_OPERAND_VSR
},
675 { "vs.11", 11, PPC_OPERAND_VSR
},
676 { "vs.12", 12, PPC_OPERAND_VSR
},
677 { "vs.13", 13, PPC_OPERAND_VSR
},
678 { "vs.14", 14, PPC_OPERAND_VSR
},
679 { "vs.15", 15, PPC_OPERAND_VSR
},
680 { "vs.16", 16, PPC_OPERAND_VSR
},
681 { "vs.17", 17, PPC_OPERAND_VSR
},
682 { "vs.18", 18, PPC_OPERAND_VSR
},
683 { "vs.19", 19, PPC_OPERAND_VSR
},
684 { "vs.2", 2, PPC_OPERAND_VSR
},
685 { "vs.20", 20, PPC_OPERAND_VSR
},
686 { "vs.21", 21, PPC_OPERAND_VSR
},
687 { "vs.22", 22, PPC_OPERAND_VSR
},
688 { "vs.23", 23, PPC_OPERAND_VSR
},
689 { "vs.24", 24, PPC_OPERAND_VSR
},
690 { "vs.25", 25, PPC_OPERAND_VSR
},
691 { "vs.26", 26, PPC_OPERAND_VSR
},
692 { "vs.27", 27, PPC_OPERAND_VSR
},
693 { "vs.28", 28, PPC_OPERAND_VSR
},
694 { "vs.29", 29, PPC_OPERAND_VSR
},
695 { "vs.3", 3, PPC_OPERAND_VSR
},
696 { "vs.30", 30, PPC_OPERAND_VSR
},
697 { "vs.31", 31, PPC_OPERAND_VSR
},
698 { "vs.32", 32, PPC_OPERAND_VSR
},
699 { "vs.33", 33, PPC_OPERAND_VSR
},
700 { "vs.34", 34, PPC_OPERAND_VSR
},
701 { "vs.35", 35, PPC_OPERAND_VSR
},
702 { "vs.36", 36, PPC_OPERAND_VSR
},
703 { "vs.37", 37, PPC_OPERAND_VSR
},
704 { "vs.38", 38, PPC_OPERAND_VSR
},
705 { "vs.39", 39, PPC_OPERAND_VSR
},
706 { "vs.4", 4, PPC_OPERAND_VSR
},
707 { "vs.40", 40, PPC_OPERAND_VSR
},
708 { "vs.41", 41, PPC_OPERAND_VSR
},
709 { "vs.42", 42, PPC_OPERAND_VSR
},
710 { "vs.43", 43, PPC_OPERAND_VSR
},
711 { "vs.44", 44, PPC_OPERAND_VSR
},
712 { "vs.45", 45, PPC_OPERAND_VSR
},
713 { "vs.46", 46, PPC_OPERAND_VSR
},
714 { "vs.47", 47, PPC_OPERAND_VSR
},
715 { "vs.48", 48, PPC_OPERAND_VSR
},
716 { "vs.49", 49, PPC_OPERAND_VSR
},
717 { "vs.5", 5, PPC_OPERAND_VSR
},
718 { "vs.50", 50, PPC_OPERAND_VSR
},
719 { "vs.51", 51, PPC_OPERAND_VSR
},
720 { "vs.52", 52, PPC_OPERAND_VSR
},
721 { "vs.53", 53, PPC_OPERAND_VSR
},
722 { "vs.54", 54, PPC_OPERAND_VSR
},
723 { "vs.55", 55, PPC_OPERAND_VSR
},
724 { "vs.56", 56, PPC_OPERAND_VSR
},
725 { "vs.57", 57, PPC_OPERAND_VSR
},
726 { "vs.58", 58, PPC_OPERAND_VSR
},
727 { "vs.59", 59, PPC_OPERAND_VSR
},
728 { "vs.6", 6, PPC_OPERAND_VSR
},
729 { "vs.60", 60, PPC_OPERAND_VSR
},
730 { "vs.61", 61, PPC_OPERAND_VSR
},
731 { "vs.62", 62, PPC_OPERAND_VSR
},
732 { "vs.63", 63, PPC_OPERAND_VSR
},
733 { "vs.7", 7, PPC_OPERAND_VSR
},
734 { "vs.8", 8, PPC_OPERAND_VSR
},
735 { "vs.9", 9, PPC_OPERAND_VSR
},
737 { "vs0", 0, PPC_OPERAND_VSR
},
738 { "vs1", 1, PPC_OPERAND_VSR
},
739 { "vs10", 10, PPC_OPERAND_VSR
},
740 { "vs11", 11, PPC_OPERAND_VSR
},
741 { "vs12", 12, PPC_OPERAND_VSR
},
742 { "vs13", 13, PPC_OPERAND_VSR
},
743 { "vs14", 14, PPC_OPERAND_VSR
},
744 { "vs15", 15, PPC_OPERAND_VSR
},
745 { "vs16", 16, PPC_OPERAND_VSR
},
746 { "vs17", 17, PPC_OPERAND_VSR
},
747 { "vs18", 18, PPC_OPERAND_VSR
},
748 { "vs19", 19, PPC_OPERAND_VSR
},
749 { "vs2", 2, PPC_OPERAND_VSR
},
750 { "vs20", 20, PPC_OPERAND_VSR
},
751 { "vs21", 21, PPC_OPERAND_VSR
},
752 { "vs22", 22, PPC_OPERAND_VSR
},
753 { "vs23", 23, PPC_OPERAND_VSR
},
754 { "vs24", 24, PPC_OPERAND_VSR
},
755 { "vs25", 25, PPC_OPERAND_VSR
},
756 { "vs26", 26, PPC_OPERAND_VSR
},
757 { "vs27", 27, PPC_OPERAND_VSR
},
758 { "vs28", 28, PPC_OPERAND_VSR
},
759 { "vs29", 29, PPC_OPERAND_VSR
},
760 { "vs3", 3, PPC_OPERAND_VSR
},
761 { "vs30", 30, PPC_OPERAND_VSR
},
762 { "vs31", 31, PPC_OPERAND_VSR
},
763 { "vs32", 32, PPC_OPERAND_VSR
},
764 { "vs33", 33, PPC_OPERAND_VSR
},
765 { "vs34", 34, PPC_OPERAND_VSR
},
766 { "vs35", 35, PPC_OPERAND_VSR
},
767 { "vs36", 36, PPC_OPERAND_VSR
},
768 { "vs37", 37, PPC_OPERAND_VSR
},
769 { "vs38", 38, PPC_OPERAND_VSR
},
770 { "vs39", 39, PPC_OPERAND_VSR
},
771 { "vs4", 4, PPC_OPERAND_VSR
},
772 { "vs40", 40, PPC_OPERAND_VSR
},
773 { "vs41", 41, PPC_OPERAND_VSR
},
774 { "vs42", 42, PPC_OPERAND_VSR
},
775 { "vs43", 43, PPC_OPERAND_VSR
},
776 { "vs44", 44, PPC_OPERAND_VSR
},
777 { "vs45", 45, PPC_OPERAND_VSR
},
778 { "vs46", 46, PPC_OPERAND_VSR
},
779 { "vs47", 47, PPC_OPERAND_VSR
},
780 { "vs48", 48, PPC_OPERAND_VSR
},
781 { "vs49", 49, PPC_OPERAND_VSR
},
782 { "vs5", 5, PPC_OPERAND_VSR
},
783 { "vs50", 50, PPC_OPERAND_VSR
},
784 { "vs51", 51, PPC_OPERAND_VSR
},
785 { "vs52", 52, PPC_OPERAND_VSR
},
786 { "vs53", 53, PPC_OPERAND_VSR
},
787 { "vs54", 54, PPC_OPERAND_VSR
},
788 { "vs55", 55, PPC_OPERAND_VSR
},
789 { "vs56", 56, PPC_OPERAND_VSR
},
790 { "vs57", 57, PPC_OPERAND_VSR
},
791 { "vs58", 58, PPC_OPERAND_VSR
},
792 { "vs59", 59, PPC_OPERAND_VSR
},
793 { "vs6", 6, PPC_OPERAND_VSR
},
794 { "vs60", 60, PPC_OPERAND_VSR
},
795 { "vs61", 61, PPC_OPERAND_VSR
},
796 { "vs62", 62, PPC_OPERAND_VSR
},
797 { "vs63", 63, PPC_OPERAND_VSR
},
798 { "vs7", 7, PPC_OPERAND_VSR
},
799 { "vs8", 8, PPC_OPERAND_VSR
},
800 { "vs9", 9, PPC_OPERAND_VSR
},
802 { "xer", 1, PPC_OPERAND_SPR
}
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
810 static const struct pd_reg
*
811 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
813 int middle
, low
, high
;
821 middle
= (low
+ high
) / 2;
822 cmp
= strcasecmp (name
, regs
[middle
].name
);
828 return ®s
[middle
];
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS
*expressionP
)
850 const struct pd_reg
*reg
;
855 /* Find the spelling of the operand. */
856 start
= name
= input_line_pointer
;
857 if (name
[0] == '%' && ISALPHA (name
[1]))
858 name
= ++input_line_pointer
;
860 else if (!reg_names_p
|| !ISALPHA (name
[0]))
863 c
= get_symbol_name (&name
);
864 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
866 /* Put back the delimiting char. */
867 *input_line_pointer
= c
;
869 /* Look to see if it's in the register table. */
872 expressionP
->X_op
= O_register
;
873 expressionP
->X_add_number
= reg
->value
;
874 expressionP
->X_md
= reg
->flags
;
876 /* Make the rest nice. */
877 expressionP
->X_add_symbol
= NULL
;
878 expressionP
->X_op_symbol
= NULL
;
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer
= start
;
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand
;
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names
[] =
897 { "cr0", 0, PPC_OPERAND_CR_REG
},
898 { "cr1", 1, PPC_OPERAND_CR_REG
},
899 { "cr2", 2, PPC_OPERAND_CR_REG
},
900 { "cr3", 3, PPC_OPERAND_CR_REG
},
901 { "cr4", 4, PPC_OPERAND_CR_REG
},
902 { "cr5", 5, PPC_OPERAND_CR_REG
},
903 { "cr6", 6, PPC_OPERAND_CR_REG
},
904 { "cr7", 7, PPC_OPERAND_CR_REG
},
905 { "eq", 2, PPC_OPERAND_CR_BIT
},
906 { "gt", 1, PPC_OPERAND_CR_BIT
},
907 { "lt", 0, PPC_OPERAND_CR_BIT
},
908 { "so", 3, PPC_OPERAND_CR_BIT
},
909 { "un", 3, PPC_OPERAND_CR_BIT
}
912 /* Parsing function. This returns non-zero if it recognized an
916 ppc_parse_name (const char *name
, expressionS
*exp
)
918 const struct pd_reg
*reg
;
925 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
930 exp
->X_op
= O_register
;
931 exp
->X_add_number
= reg
->value
;
932 exp
->X_md
= reg
->flags
;
937 /* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
941 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
943 /* Accept 4*cr<n> and cr<n>*4. */
945 && ((right
->X_op
== O_register
946 && right
->X_md
== PPC_OPERAND_CR_REG
947 && left
->X_op
== O_constant
948 && left
->X_add_number
== 4)
949 || (left
->X_op
== O_register
950 && left
->X_md
== PPC_OPERAND_CR_REG
951 && right
->X_op
== O_constant
952 && right
->X_add_number
== 4)))
954 left
->X_op
= O_register
;
955 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
956 left
->X_add_number
*= right
->X_add_number
;
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right
->X_op
== O_register
962 && left
->X_op
== O_register
964 && ((right
->X_md
== PPC_OPERAND_CR_BIT
965 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
966 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
967 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
969 left
->X_md
= PPC_OPERAND_CR_BIT
;
970 right
->X_op
= O_constant
;
974 /* Accept reg +/- constant. */
975 if (left
->X_op
== O_register
976 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
977 as_warn (_("invalid register expression"));
979 /* Accept constant + reg. */
980 if (right
->X_op
== O_register
)
982 if (op
== O_add
&& left
->X_op
== O_constant
)
983 left
->X_md
= right
->X_md
;
985 as_warn (_("invalid register expression"));
991 /* Local variables. */
993 /* Whether to target xcoff64/elf64. */
994 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
996 /* Opcode hash table. */
997 static struct hash_control
*ppc_hash
;
999 /* Macro hash table. */
1000 static struct hash_control
*ppc_macro_hash
;
1003 /* What type of shared library support to use. */
1004 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
1006 /* Flags to set in the elf header. */
1007 static flagword ppc_flags
= 0;
1009 /* Whether this is Solaris or not. */
1010 #ifdef TARGET_SOLARIS_COMMENT
1011 #define SOLARIS_P TRUE
1013 #define SOLARIS_P FALSE
1016 static bfd_boolean msolaris
= SOLARIS_P
;
1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1027 /* Next subsegment to allocate within the .text segment. */
1028 static subsegT ppc_text_subsegment
= 2;
1030 /* Linked list of csects in the text section. */
1031 static symbolS
*ppc_text_csects
;
1033 /* Next subsegment to allocate within the .data segment. */
1034 static subsegT ppc_data_subsegment
= 2;
1036 /* Linked list of csects in the data section. */
1037 static symbolS
*ppc_data_csects
;
1039 /* The current csect. */
1040 static symbolS
*ppc_current_csect
;
1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047 static symbolS
*ppc_toc_csect
;
1049 /* The first frag in the TOC subsegment. */
1050 static fragS
*ppc_toc_frag
;
1052 /* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054 static fragS
*ppc_after_toc_frag
;
1056 /* The current static block. */
1057 static symbolS
*ppc_current_block
;
1059 /* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062 static asection
*ppc_coff_debug_section
;
1064 /* Structure to set the length field of the dwarf sections. */
1065 struct dw_subsection
{
1066 /* Subsections are simply linked. */
1067 struct dw_subsection
*link
;
1069 /* The subsection number. */
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp
;
1076 static struct dw_section
{
1077 /* Corresponding section. */
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection
*list_subseg
;
1083 /* The anonymous subsection. */
1084 struct dw_subsection
*anon_subseg
;
1085 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1086 #endif /* OBJ_XCOFF */
1090 /* Various sections that we need for PE coff support. */
1091 static segT ydata_section
;
1092 static segT pdata_section
;
1093 static segT reldata_section
;
1094 static segT rdata_section
;
1095 static segT tocdata_section
;
1097 /* The current section and the previous section. See ppc_previous. */
1098 static segT ppc_previous_section
;
1099 static segT ppc_current_section
;
1104 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105 unsigned long *ppc_apuinfo_list
;
1106 unsigned int ppc_apuinfo_num
;
1107 unsigned int ppc_apuinfo_num_alloc
;
1108 #endif /* OBJ_ELF */
1111 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1113 const char *const md_shortopts
= "um:";
1115 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1116 const struct option md_longopts
[] = {
1117 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1118 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1119 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1120 {NULL
, no_argument
, NULL
, 0}
1122 const size_t md_longopts_size
= sizeof (md_longopts
);
1125 md_parse_option (int c
, const char *arg
)
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg
, "e") == 0)
1142 target_big_endian
= 0;
1143 set_target_endian
= 1;
1144 if (ppc_cpu
& PPC_OPCODE_VLE
)
1145 as_bad (_("the use of -mvle requires big endian."));
1153 if (strcmp (arg
, "e") == 0)
1155 target_big_endian
= 1;
1156 set_target_endian
= 1;
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1168 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1178 if (strcmp (arg
, "64") == 0)
1182 if (ppc_cpu
& PPC_OPCODE_VLE
)
1183 as_bad (_("the use of -mvle requires -a32."));
1185 as_fatal (_("%s unsupported"), "-a64");
1188 else if (strcmp (arg
, "32") == 0)
1195 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1196 /* "raw" is only valid for the disassembler. */
1197 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1200 if (strcmp (arg
, "vle") == 0)
1202 if (set_target_endian
&& target_big_endian
== 0)
1203 as_bad (_("the use of -mvle requires big endian."));
1205 as_bad (_("the use of -mvle requires -a32."));
1209 else if (strcmp (arg
, "no-vle") == 0)
1211 sticky
&= ~PPC_OPCODE_VLE
;
1213 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1214 new_cpu
&= ~PPC_OPCODE_VLE
;
1219 else if (strcmp (arg
, "regnames") == 0)
1222 else if (strcmp (arg
, "no-regnames") == 0)
1223 reg_names_p
= FALSE
;
1226 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1227 that require relocation. */
1228 else if (strcmp (arg
, "relocatable") == 0)
1230 shlib
= SHLIB_MRELOCATABLE
;
1231 ppc_flags
|= EF_PPC_RELOCATABLE
;
1234 else if (strcmp (arg
, "relocatable-lib") == 0)
1236 shlib
= SHLIB_MRELOCATABLE
;
1237 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1240 /* -memb, set embedded bit. */
1241 else if (strcmp (arg
, "emb") == 0)
1242 ppc_flags
|= EF_PPC_EMB
;
1244 /* -mlittle/-mbig set the endianness. */
1245 else if (strcmp (arg
, "little") == 0
1246 || strcmp (arg
, "little-endian") == 0)
1248 target_big_endian
= 0;
1249 set_target_endian
= 1;
1250 if (ppc_cpu
& PPC_OPCODE_VLE
)
1251 as_bad (_("the use of -mvle requires big endian."));
1254 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1256 target_big_endian
= 1;
1257 set_target_endian
= 1;
1260 else if (strcmp (arg
, "solaris") == 0)
1263 ppc_comment_chars
= ppc_solaris_comment_chars
;
1266 else if (strcmp (arg
, "no-solaris") == 0)
1269 ppc_comment_chars
= ppc_eabi_comment_chars
;
1271 else if (strcmp (arg
, "spe2") == 0)
1273 ppc_cpu
|= PPC_OPCODE_SPE2
;
1278 as_bad (_("invalid switch -m%s"), arg
);
1284 /* -V: SVR4 argument to print version ID. */
1286 print_version_id ();
1289 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1290 should be emitted or not. FIXME: Not implemented. */
1294 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1295 rather than .stabs.excl, which is ignored by the linker.
1296 FIXME: Not implemented. */
1307 nop_limit
= strtoul (optarg
, &end
, 0);
1309 as_bad (_("--nops needs a numeric argument"));
1324 md_show_usage (FILE *stream
)
1326 fprintf (stream
, _("\
1328 -a32 generate ELF32/XCOFF32\n\
1329 -a64 generate ELF64/XCOFF64\n\
1331 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1332 -mpwr generate code for POWER (RIOS1)\n\
1333 -m601 generate code for PowerPC 601\n\
1334 -mppc, -mppc32, -m603, -m604\n\
1335 generate code for PowerPC 603/604\n\
1336 -m403 generate code for PowerPC 403\n\
1337 -m405 generate code for PowerPC 405\n\
1338 -m440 generate code for PowerPC 440\n\
1339 -m464 generate code for PowerPC 464\n\
1340 -m476 generate code for PowerPC 476\n\
1341 -m7400, -m7410, -m7450, -m7455\n\
1342 generate code for PowerPC 7400/7410/7450/7455\n\
1343 -m750cl, -mgekko, -mbroadway\n\
1344 generate code for PowerPC 750cl/Gekko/Broadway\n\
1345 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1346 fprintf (stream
, _("\
1347 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1348 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1349 -mbooke generate code for 32-bit PowerPC BookE\n\
1350 -ma2 generate code for A2 architecture\n\
1351 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1352 -mpower5, -mpwr5, -mpwr5x\n\
1353 generate code for Power5 architecture\n\
1354 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1355 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1356 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1357 -mpower9, -mpwr9 generate code for Power9 architecture\n\
1358 -mcell generate code for Cell Broadband Engine architecture\n\
1359 -mcom generate code for Power/PowerPC common instructions\n\
1360 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1361 fprintf (stream
, _("\
1362 -maltivec generate code for AltiVec\n\
1363 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1364 -me300 generate code for PowerPC e300 family\n\
1365 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1366 -me500mc, generate code for Freescale e500mc core complex\n\
1367 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1368 -me5500, generate code for Freescale e5500 core complex\n\
1369 -me6500, generate code for Freescale e6500 core complex\n\
1370 -mspe generate code for Motorola SPE instructions\n\
1371 -mspe2 generate code for Freescale SPE2 instructions\n\
1372 -mvle generate code for Freescale VLE instructions\n\
1373 -mtitan generate code for AppliedMicro Titan core complex\n\
1374 -mregnames Allow symbolic names for registers\n\
1375 -mno-regnames Do not allow symbolic names for registers\n"));
1377 fprintf (stream
, _("\
1378 -mrelocatable support for GCC's -mrelocatble option\n\
1379 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1380 -memb set PPC_EMB bit in ELF flags\n\
1381 -mlittle, -mlittle-endian, -le\n\
1382 generate code for a little endian machine\n\
1383 -mbig, -mbig-endian, -be\n\
1384 generate code for a big endian machine\n\
1385 -msolaris generate code for Solaris\n\
1386 -mno-solaris do not generate code for Solaris\n\
1387 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1388 -V print assembler version number\n\
1389 -Qy, -Qn ignored\n"));
1391 fprintf (stream
, _("\
1392 -nops=count when aligning, more than COUNT nops uses a branch\n\
1393 -ppc476-workaround warn if emitting data to code sections\n"));
1396 /* Set ppc_cpu if it is not already set. */
1401 const char *default_os
= TARGET_OS
;
1402 const char *default_cpu
= TARGET_CPU
;
1404 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1407 if (target_big_endian
)
1408 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1410 /* The minimum supported cpu for 64-bit little-endian is power8. */
1411 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1412 else if (strncmp (default_os
, "aix", 3) == 0
1413 && default_os
[3] >= '4' && default_os
[3] <= '9')
1414 ppc_cpu
|= PPC_OPCODE_COMMON
;
1415 else if (strncmp (default_os
, "aix3", 4) == 0)
1416 ppc_cpu
|= PPC_OPCODE_POWER
;
1417 else if (strcmp (default_cpu
, "rs6000") == 0)
1418 ppc_cpu
|= PPC_OPCODE_POWER
;
1419 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1420 ppc_cpu
|= PPC_OPCODE_PPC
;
1422 as_fatal (_("unknown default cpu = %s, os = %s"),
1423 default_cpu
, default_os
);
1427 /* Figure out the BFD architecture to use. This function and ppc_mach
1428 are called well before md_begin, when the output file is opened. */
1430 enum bfd_architecture
1433 const char *default_cpu
= TARGET_CPU
;
1436 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1437 return bfd_arch_powerpc
;
1438 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1439 return bfd_arch_powerpc
;
1440 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1441 return bfd_arch_rs6000
;
1442 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1444 if (strcmp (default_cpu
, "rs6000") == 0)
1445 return bfd_arch_rs6000
;
1446 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1447 return bfd_arch_powerpc
;
1450 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1451 return bfd_arch_unknown
;
1458 return bfd_mach_ppc64
;
1459 else if (ppc_arch () == bfd_arch_rs6000
)
1460 return bfd_mach_rs6k
;
1461 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1462 return bfd_mach_ppc_titan
;
1463 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1464 return bfd_mach_ppc_vle
;
1466 return bfd_mach_ppc
;
1470 ppc_target_format (void)
1474 return target_big_endian
? "pe-powerpc" : "pe-powerpcle";
1476 return "xcoff-powermac";
1479 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1481 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1487 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1488 # elif defined (TE_VXWORKS)
1489 return "elf32-powerpc-vxworks";
1491 return (target_big_endian
1492 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1493 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1498 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1499 Return TRUE if there's a problem, otherwise FALSE. */
1502 insn_validate (const struct powerpc_opcode
*op
)
1504 const unsigned char *o
;
1505 uint64_t omask
= op
->mask
;
1507 /* The mask had better not trim off opcode bits. */
1508 if ((op
->opcode
& omask
) != op
->opcode
)
1510 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1514 /* The operands must not overlap the opcode or each other. */
1515 for (o
= op
->operands
; *o
; ++o
)
1517 if (*o
>= num_powerpc_operands
)
1519 as_bad (_("operand index error for %s"), op
->name
);
1524 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1525 if (operand
->shift
!= (int) PPC_OPSHIFT_INV
)
1529 if (operand
->shift
>= 0)
1530 mask
= operand
->bitm
<< operand
->shift
;
1532 mask
= operand
->bitm
>> -operand
->shift
;
1535 as_bad (_("operand %d overlap in %s"),
1536 (int) (o
- op
->operands
), op
->name
);
1546 /* Insert opcodes and macros into hash tables. Called at startup and
1547 for .machine pseudo. */
1550 ppc_setup_opcodes (void)
1552 const struct powerpc_opcode
*op
;
1553 const struct powerpc_opcode
*op_end
;
1554 const struct powerpc_macro
*macro
;
1555 const struct powerpc_macro
*macro_end
;
1556 bfd_boolean bad_insn
= FALSE
;
1558 if (ppc_hash
!= NULL
)
1559 hash_die (ppc_hash
);
1560 if (ppc_macro_hash
!= NULL
)
1561 hash_die (ppc_macro_hash
);
1563 /* Insert the opcodes into a hash table. */
1564 ppc_hash
= hash_new ();
1566 if (ENABLE_CHECKING
)
1570 /* An index into powerpc_operands is stored in struct fix
1571 fx_pcrel_adjust which is 8 bits wide. */
1572 gas_assert (num_powerpc_operands
< 256);
1574 /* Check operand masks. Code here and in the disassembler assumes
1575 all the 1's in the mask are contiguous. */
1576 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1578 uint64_t mask
= powerpc_operands
[i
].bitm
;
1582 right_bit
= mask
& -mask
;
1584 right_bit
= mask
& -mask
;
1585 if (mask
!= right_bit
)
1587 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1590 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1591 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1592 sizeof (powerpc_operands
[0])) == 0)
1594 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1601 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1602 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1604 if (ENABLE_CHECKING
)
1606 unsigned int new_opcode
= PPC_OP (op
[0].opcode
);
1608 #ifdef PRINT_OPCODE_TABLE
1609 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1610 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1611 new_opcode
, (unsigned long long) op
->opcode
,
1612 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1615 /* The major opcodes had better be sorted. Code in the disassembler
1616 assumes the insns are sorted according to major opcode. */
1617 if (op
!= powerpc_opcodes
1618 && new_opcode
< PPC_OP (op
[-1].opcode
))
1620 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1624 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1626 as_bad (_("%s is enabled by vle flag"), op
->name
);
1629 if (PPC_OP (op
->opcode
) != 4
1630 && PPC_OP (op
->opcode
) != 31
1631 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1633 as_bad (_("%s not disabled by vle flag"), op
->name
);
1636 bad_insn
|= insn_validate (op
);
1639 if ((ppc_cpu
& op
->flags
) != 0
1640 && !(ppc_cpu
& op
->deprecated
))
1644 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1647 as_bad (_("duplicate instruction %s"),
1654 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1655 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1656 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1658 op_end
= vle_opcodes
+ vle_num_opcodes
;
1659 for (op
= vle_opcodes
; op
< op_end
; op
++)
1661 if (ENABLE_CHECKING
)
1663 unsigned new_seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1665 #ifdef PRINT_OPCODE_TABLE
1666 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1667 op
->name
, (unsigned int) (op
- vle_opcodes
),
1668 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1669 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1672 /* The major opcodes had better be sorted. Code in the disassembler
1673 assumes the insns are sorted according to major opcode. */
1674 if (op
!= vle_opcodes
1675 && new_seg
< VLE_OP_TO_SEG (VLE_OP (op
[-1].opcode
, op
[-1].mask
)))
1677 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1681 bad_insn
|= insn_validate (op
);
1684 if ((ppc_cpu
& op
->flags
) != 0
1685 && !(ppc_cpu
& op
->deprecated
))
1689 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1692 as_bad (_("duplicate instruction %s"),
1699 /* SPE2 instructions */
1700 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1702 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1703 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1705 if (ENABLE_CHECKING
)
1707 if (op
!= spe2_opcodes
)
1709 unsigned old_seg
, new_seg
;
1711 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1712 old_seg
= VLE_OP_TO_SEG (old_seg
);
1713 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1714 new_seg
= VLE_OP_TO_SEG (new_seg
);
1716 /* The major opcodes had better be sorted. Code in the
1717 disassembler assumes the insns are sorted according to
1719 if (new_seg
< old_seg
)
1721 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1726 bad_insn
|= insn_validate (op
);
1729 if ((ppc_cpu
& op
->flags
) != 0 && !(ppc_cpu
& op
->deprecated
))
1733 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1736 as_bad (_("duplicate instruction %s"),
1743 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1744 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1747 /* Insert the macros into a hash table. */
1748 ppc_macro_hash
= hash_new ();
1750 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1751 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1753 if ((macro
->flags
& ppc_cpu
) != 0 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1757 retval
= hash_insert (ppc_macro_hash
, macro
->name
, (void *) macro
);
1758 if (retval
!= (const char *) NULL
)
1760 as_bad (_("duplicate macro %s"), macro
->name
);
1770 /* This function is called when the assembler starts up. It is called
1771 after the options have been parsed and the output file has been
1779 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1780 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1783 /* Set the ELF flags if desired. */
1784 if (ppc_flags
&& !msolaris
)
1785 bfd_set_private_flags (stdoutput
, ppc_flags
);
1788 ppc_setup_opcodes ();
1790 /* Tell the main code what the endianness is if it is not overridden
1792 if (!set_target_endian
)
1794 set_target_endian
= 1;
1795 target_big_endian
= PPC_BIG_ENDIAN
;
1799 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1801 /* Create dummy symbols to serve as initial csects. This forces the
1802 text csects to precede the data csects. These symbols will not
1804 ppc_text_csects
= symbol_make ("dummy\001");
1805 symbol_get_tc (ppc_text_csects
)->within
= ppc_text_csects
;
1806 ppc_data_csects
= symbol_make ("dummy\001");
1807 symbol_get_tc (ppc_data_csects
)->within
= ppc_data_csects
;
1812 ppc_current_section
= text_section
;
1813 ppc_previous_section
= 0;
1822 if (ppc_apuinfo_list
== NULL
)
1825 /* Ok, so write the section info out. We have this layout:
1829 0 8 length of "APUinfo\0"
1830 4 (n*4) number of APU's (4 bytes each)
1833 20 APU#1 first APU's info
1834 24 APU#2 second APU's info
1839 asection
*seg
= now_seg
;
1840 subsegT subseg
= now_subseg
;
1841 asection
*apuinfo_secp
= (asection
*) NULL
;
1844 /* Create the .PPC.EMB.apuinfo section. */
1845 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1846 bfd_set_section_flags (stdoutput
,
1848 SEC_HAS_CONTENTS
| SEC_READONLY
);
1851 md_number_to_chars (p
, (valueT
) 8, 4);
1854 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1857 md_number_to_chars (p
, (valueT
) 2, 4);
1860 strcpy (p
, APUINFO_LABEL
);
1862 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1865 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1868 frag_align (2, 0, 0);
1870 /* We probably can't restore the current segment, for there likely
1873 subseg_set (seg
, subseg
);
1878 /* Insert an operand value into an instruction. */
1881 ppc_insert_operand (uint64_t insn
,
1882 const struct powerpc_operand
*operand
,
1888 int64_t min
, max
, right
;
1890 max
= operand
->bitm
;
1894 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
1896 /* Extend the allowed range for addis to [-32768, 65535].
1897 Similarly for cmpli and some VLE high part insns. For 64-bit
1898 it would be good to disable this for signed fields since the
1899 value is sign extended into the high 32 bits of the register.
1900 If the value is, say, an address, then we might care about
1901 the high bits. However, gcc as of 2014-06 uses unsigned
1902 values when loading the high part of 64-bit constants using
1904 min
= ~(max
>> 1) & -right
;
1906 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
1908 max
= (max
>> 1) & -right
;
1909 min
= ~max
& -right
;
1912 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1915 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1924 /* Some people write constants with the sign extension done by
1925 hand but only up to 32 bits. This shouldn't really be valid,
1926 but, to permit this code to assemble on a 64-bit host, we
1927 sign extend the 32-bit value to 64 bits if so doing makes the
1930 && (val
- (1LL << 32)) >= min
1931 && (val
- (1LL << 32)) <= max
1932 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
1933 val
= val
- (1LL << 32);
1935 /* Similarly, people write expressions like ~(1<<15), and expect
1936 this to be OK for a 32-bit unsigned value. */
1938 && (val
+ (1LL << 32)) >= min
1939 && (val
+ (1LL << 32)) <= max
1940 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
1941 val
= val
+ (1LL << 32);
1945 || (val
& (right
- 1)) != 0)
1946 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
1949 if (operand
->insert
)
1954 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
1955 if (errmsg
!= (const char *) NULL
)
1956 as_bad_where (file
, line
, "%s", errmsg
);
1958 else if (operand
->shift
>= 0)
1959 insn
|= (val
& operand
->bitm
) << operand
->shift
;
1961 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
1968 /* Parse @got, etc. and return the desired relocation. */
1969 static bfd_reloc_code_real_type
1970 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
1974 unsigned int length
: 8;
1975 unsigned int valid32
: 1;
1976 unsigned int valid64
: 1;
1985 const struct map_bfd
*ptr
;
1987 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1988 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1989 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1991 static const struct map_bfd mapping
[] = {
1992 MAP ("l", BFD_RELOC_LO16
),
1993 MAP ("h", BFD_RELOC_HI16
),
1994 MAP ("ha", BFD_RELOC_HI16_S
),
1995 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
1996 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
1997 MAP ("got", BFD_RELOC_16_GOTOFF
),
1998 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
1999 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2000 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2001 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2002 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2003 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2004 MAP ("copy", BFD_RELOC_PPC_COPY
),
2005 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2006 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2007 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2008 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2009 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2010 MAP ("tls", BFD_RELOC_PPC_TLS
),
2011 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2012 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2013 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2014 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2015 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2016 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2017 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2018 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2019 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2020 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2021 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2022 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2023 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2024 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2025 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2026 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2027 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2028 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2029 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2030 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2031 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2032 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2033 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2034 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2035 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2036 MAP32 ("fixup", BFD_RELOC_CTOR
),
2037 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2038 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2039 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2040 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2041 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2042 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2043 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2044 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2045 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2046 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2047 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2048 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2049 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2050 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2051 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2052 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2053 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2054 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2055 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2056 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2057 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2058 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2059 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2060 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2061 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2062 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2063 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2064 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2065 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2066 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2067 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2068 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2069 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2070 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2071 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2072 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2073 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2074 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2075 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2076 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2077 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2078 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2079 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2080 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2081 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2082 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2083 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2084 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2085 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2086 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2087 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2088 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2092 return BFD_RELOC_NONE
;
2094 for (ch
= *str
, str2
= ident
;
2095 (str2
< ident
+ sizeof (ident
) - 1
2096 && (ISALNUM (ch
) || ch
== '@'));
2099 *str2
++ = TOLOWER (ch
);
2106 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2107 if (ch
== ptr
->string
[0]
2108 && len
== ptr
->length
2109 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2110 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2112 int reloc
= ptr
->reloc
;
2114 if (!ppc_obj64
&& exp_p
->X_add_number
!= 0)
2118 case BFD_RELOC_16_GOTOFF
:
2119 case BFD_RELOC_LO16_GOTOFF
:
2120 case BFD_RELOC_HI16_GOTOFF
:
2121 case BFD_RELOC_HI16_S_GOTOFF
:
2122 as_warn (_("identifier+constant@got means "
2123 "identifier@got+constant"));
2126 case BFD_RELOC_PPC_GOT_TLSGD16
:
2127 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2128 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2129 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2130 case BFD_RELOC_PPC_GOT_TLSLD16
:
2131 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2132 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2133 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2134 case BFD_RELOC_PPC_GOT_DTPREL16
:
2135 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2136 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2137 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2138 case BFD_RELOC_PPC_GOT_TPREL16
:
2139 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2140 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2141 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2142 as_bad (_("symbol+offset not supported for got tls"));
2147 /* Now check for identifier@suffix+constant. */
2148 if (*str
== '-' || *str
== '+')
2150 char *orig_line
= input_line_pointer
;
2151 expressionS new_exp
;
2153 input_line_pointer
= str
;
2154 expression (&new_exp
);
2155 if (new_exp
.X_op
== O_constant
)
2157 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2158 str
= input_line_pointer
;
2161 if (&input_line_pointer
!= str_p
)
2162 input_line_pointer
= orig_line
;
2166 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2167 && exp_p
->X_op
== O_symbol
2168 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2170 /* Change the symbol so that the dummy .TOC. symbol can be
2171 omitted from the object file. */
2172 exp_p
->X_add_symbol
= &abs_symbol
;
2175 return (bfd_reloc_code_real_type
) reloc
;
2178 return BFD_RELOC_NONE
;
2181 /* Support @got, etc. on constants emitted via .short, .int etc. */
2183 bfd_reloc_code_real_type
2184 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2187 if (nbytes
>= 2 && *input_line_pointer
== '@')
2188 return ppc_elf_suffix (&input_line_pointer
, exp
);
2189 return BFD_RELOC_NONE
;
2192 /* Warn when emitting data to code sections, unless we are emitting
2193 a relocation that ld --ppc476-workaround uses to recognise data
2194 *and* there was an unconditional branch prior to the data. */
2197 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2198 unsigned int nbytes
, fixS
*fix
)
2201 && (now_seg
->flags
& SEC_CODE
) != 0
2204 || !(fix
->fx_r_type
== BFD_RELOC_32
2205 || fix
->fx_r_type
== BFD_RELOC_CTOR
2206 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2207 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2208 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2209 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2210 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2211 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2212 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2213 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2215 /* Flag that we've warned. */
2219 as_warn (_("data in executable section"));
2223 /* Solaris pseduo op to change to the .rodata section. */
2225 ppc_elf_rdata (int xxx
)
2227 char *save_line
= input_line_pointer
;
2228 static char section
[] = ".rodata\n";
2230 /* Just pretend this is .section .rodata */
2231 input_line_pointer
= section
;
2232 obj_elf_section (xxx
);
2234 input_line_pointer
= save_line
;
2237 /* Pseudo op to make file scope bss items. */
2239 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2252 c
= get_symbol_name (&name
);
2254 /* Just after name is now '\0'. */
2255 p
= input_line_pointer
;
2257 SKIP_WHITESPACE_AFTER_NAME ();
2258 if (*input_line_pointer
!= ',')
2260 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2261 ignore_rest_of_line ();
2265 input_line_pointer
++; /* skip ',' */
2266 if ((size
= get_absolute_expression ()) < 0)
2268 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2269 ignore_rest_of_line ();
2273 /* The third argument to .lcomm is the alignment. */
2274 if (*input_line_pointer
!= ',')
2278 ++input_line_pointer
;
2279 align
= get_absolute_expression ();
2282 as_warn (_("ignoring bad alignment"));
2288 symbolP
= symbol_find_or_make (name
);
2291 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2293 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2294 S_GET_NAME (symbolP
));
2295 ignore_rest_of_line ();
2299 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2301 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2302 S_GET_NAME (symbolP
),
2303 (long) S_GET_VALUE (symbolP
),
2306 ignore_rest_of_line ();
2312 old_subsec
= now_subseg
;
2315 /* Convert to a power of 2 alignment. */
2316 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2319 as_bad (_("common alignment not a power of 2"));
2320 ignore_rest_of_line ();
2327 record_alignment (bss_section
, align2
);
2328 subseg_set (bss_section
, 1);
2330 frag_align (align2
, 0, 0);
2331 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2332 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2333 symbol_set_frag (symbolP
, frag_now
);
2334 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2337 S_SET_SIZE (symbolP
, size
);
2338 S_SET_SEGMENT (symbolP
, bss_section
);
2339 subseg_set (old_sec
, old_subsec
);
2340 demand_empty_rest_of_line ();
2343 /* Pseudo op to set symbol local entry point. */
2345 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2348 char c
= get_symbol_name (&name
);
2353 elf_symbol_type
*elfsym
;
2355 p
= input_line_pointer
;
2357 SKIP_WHITESPACE_AFTER_NAME ();
2358 if (*input_line_pointer
!= ',')
2361 as_bad (_("expected comma after name `%s' in .localentry directive"),
2364 ignore_rest_of_line ();
2367 input_line_pointer
++;
2369 if (exp
.X_op
== O_absent
)
2371 as_bad (_("missing expression in .localentry directive"));
2372 exp
.X_op
= O_constant
;
2373 exp
.X_add_number
= 0;
2376 sym
= symbol_find_or_make (name
);
2379 if (resolve_expression (&exp
)
2380 && exp
.X_op
== O_constant
)
2382 unsigned int encoded
, ok
;
2385 if (exp
.X_add_number
== 1 || exp
.X_add_number
== 7)
2386 encoded
= exp
.X_add_number
<< STO_PPC64_LOCAL_BIT
;
2389 encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2390 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2392 as_bad (_(".localentry expression for `%s' "
2393 "is not a valid power of 2"), S_GET_NAME (sym
));
2399 bfdsym
= symbol_get_bfdsym (sym
);
2400 elfsym
= elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
2401 gas_assert (elfsym
);
2402 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2403 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2404 if (ppc_abiversion
== 0)
2409 as_bad (_(".localentry expression for `%s' "
2410 "does not evaluate to a constant"), S_GET_NAME (sym
));
2412 demand_empty_rest_of_line ();
2415 /* Pseudo op to set ABI version. */
2417 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2422 if (exp
.X_op
== O_absent
)
2424 as_bad (_("missing expression in .abiversion directive"));
2425 exp
.X_op
= O_constant
;
2426 exp
.X_add_number
= 0;
2429 if (resolve_expression (&exp
)
2430 && exp
.X_op
== O_constant
)
2431 ppc_abiversion
= exp
.X_add_number
;
2433 as_bad (_(".abiversion expression does not evaluate to a constant"));
2434 demand_empty_rest_of_line ();
2437 /* Parse a .gnu_attribute directive. */
2439 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2441 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2443 /* Check validity of defined powerpc tags. */
2444 if (tag
== Tag_GNU_Power_ABI_FP
2445 || tag
== Tag_GNU_Power_ABI_Vector
2446 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2450 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2452 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2453 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2454 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2455 as_warn (_("unknown .gnu_attribute value"));
2459 /* Set ABI version in output file. */
2463 if (ppc_obj64
&& ppc_abiversion
!= 0)
2465 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2466 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2470 /* Validate any relocations emitted for -mrelocatable, possibly adding
2471 fixups for word relocations in writable segments, so we can adjust
2474 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2476 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2485 case SHLIB_MRELOCATABLE
:
2486 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2487 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2488 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2489 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2490 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2491 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2492 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2493 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2494 && (seg
->flags
& SEC_LOAD
) != 0
2495 && strcmp (segment_name (seg
), ".got2") != 0
2496 && strcmp (segment_name (seg
), ".dtors") != 0
2497 && strcmp (segment_name (seg
), ".ctors") != 0
2498 && strcmp (segment_name (seg
), ".fixup") != 0
2499 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2500 && strcmp (segment_name (seg
), ".eh_frame") != 0
2501 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2503 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2504 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2506 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2507 _("relocation cannot be done when using -mrelocatable"));
2514 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2515 function descriptor sym if the corresponding code sym is used. */
2518 ppc_frob_file_before_adjust (void)
2526 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2532 name
= S_GET_NAME (symp
);
2536 if (! S_IS_WEAK (symp
)
2537 || S_IS_DEFINED (symp
))
2540 dotname
= concat (".", name
, (char *) NULL
);
2541 dotsym
= symbol_find_noref (dotname
, 1);
2543 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2544 || symbol_used_in_reloc_p (dotsym
)))
2545 symbol_mark_used (symp
);
2549 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2551 && toc_reloc_types
!= has_large_toc_reloc
2552 && bfd_section_size (stdoutput
, toc
) > 0x10000)
2553 as_warn (_("TOC section size exceeds 64k"));
2556 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2557 emitted. Other uses of .TOC. will cause the symbol to be marked
2558 with BSF_KEEP in md_apply_fix. */
2561 ppc_elf_adjust_symtab (void)
2566 symp
= symbol_find (".TOC.");
2569 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2570 if ((bsym
->flags
& BSF_KEEP
) == 0)
2571 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2575 #endif /* OBJ_ELF */
2580 * Summary of parse_toc_entry.
2582 * in: Input_line_pointer points to the '[' in one of:
2584 * [toc] [tocv] [toc32] [toc64]
2586 * Anything else is an error of one kind or another.
2589 * return value: success or failure
2590 * toc_kind: kind of toc reference
2591 * input_line_pointer:
2592 * success: first char after the ']'
2593 * failure: unchanged
2597 * [toc] - rv == success, toc_kind = default_toc
2598 * [tocv] - rv == success, toc_kind = data_in_toc
2599 * [toc32] - rv == success, toc_kind = must_be_32
2600 * [toc64] - rv == success, toc_kind = must_be_64
2604 enum toc_size_qualifier
2606 default_toc
, /* The toc cell constructed should be the system default size */
2607 data_in_toc
, /* This is a direct reference to a toc cell */
2608 must_be_32
, /* The toc cell constructed must be 32 bits wide */
2609 must_be_64
/* The toc cell constructed must be 64 bits wide */
2613 parse_toc_entry (enum toc_size_qualifier
*toc_kind
)
2618 enum toc_size_qualifier t
;
2620 /* Save the input_line_pointer. */
2621 start
= input_line_pointer
;
2623 /* Skip over the '[' , and whitespace. */
2624 ++input_line_pointer
;
2627 /* Find the spelling of the operand. */
2628 c
= get_symbol_name (&toc_spec
);
2630 if (strcmp (toc_spec
, "toc") == 0)
2634 else if (strcmp (toc_spec
, "tocv") == 0)
2638 else if (strcmp (toc_spec
, "toc32") == 0)
2642 else if (strcmp (toc_spec
, "toc64") == 0)
2648 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec
);
2649 *input_line_pointer
= c
;
2650 input_line_pointer
= start
;
2654 /* Now find the ']'. */
2655 *input_line_pointer
= c
;
2657 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2658 c
= *input_line_pointer
++; /* input_line_pointer->past char in c. */
2662 as_bad (_("syntax error: expected `]', found `%c'"), c
);
2663 input_line_pointer
= start
;
2672 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2673 /* See whether a symbol is in the TOC section. */
2676 ppc_is_toc_sym (symbolS
*sym
)
2679 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2680 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2683 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2685 return strcmp (sname
, ".toc") == 0;
2687 return strcmp (sname
, ".got") == 0;
2690 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2694 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2696 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2700 /* Check we don't already exist. */
2701 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2702 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2705 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2707 if (ppc_apuinfo_num_alloc
== 0)
2709 ppc_apuinfo_num_alloc
= 4;
2710 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2714 ppc_apuinfo_num_alloc
+= 4;
2715 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2716 ppc_apuinfo_num_alloc
);
2719 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2725 /* We need to keep a list of fixups. We can't simply generate them as
2726 we go, because that would require us to first create the frag, and
2727 that would screw up references to ``.''. */
2733 bfd_reloc_code_real_type reloc
;
2736 #define MAX_INSN_FIXUPS (5)
2738 /* This routine is called for each instruction to be assembled. */
2741 md_assemble (char *str
)
2744 const struct powerpc_opcode
*opcode
;
2746 const unsigned char *opindex_ptr
;
2750 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
2755 unsigned int insn_length
;
2757 /* Get the opcode. */
2758 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
2763 /* Look up the opcode in the hash table. */
2764 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, str
);
2765 if (opcode
== (const struct powerpc_opcode
*) NULL
)
2767 const struct powerpc_macro
*macro
;
2769 macro
= (const struct powerpc_macro
*) hash_find (ppc_macro_hash
, str
);
2770 if (macro
== (const struct powerpc_macro
*) NULL
)
2771 as_bad (_("unrecognized opcode: `%s'"), str
);
2773 ppc_macro (s
, macro
);
2778 insn
= opcode
->opcode
;
2781 while (ISSPACE (*str
))
2784 /* PowerPC operands are just expressions. The only real issue is
2785 that a few operand types are optional. All cases which might use
2786 an optional operand separate the operands only with commas (in some
2787 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2788 have optional operands). Most instructions with optional operands
2789 have only one. Those that have more than one optional operand can
2790 take either all their operands or none. So, before we start seriously
2791 parsing the operands, we check to see if we have optional operands,
2792 and if we do, we count the number of commas to see which operands
2793 have been omitted. */
2795 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
2797 const struct powerpc_operand
*operand
;
2799 operand
= &powerpc_operands
[*opindex_ptr
];
2800 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
2801 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
2803 unsigned int opcount
;
2804 unsigned int num_operands_expected
;
2806 /* There is an optional operand. Count the number of
2807 commas in the input line. */
2814 while ((s
= strchr (s
, ',')) != (char *) NULL
)
2821 /* Compute the number of expected operands. */
2822 for (num_operands_expected
= 0, i
= 0; opcode
->operands
[i
]; i
++)
2823 ++ num_operands_expected
;
2825 /* If there are fewer operands in the line then are called
2826 for by the instruction, we want to skip the optional
2828 if (opcount
< num_operands_expected
)
2835 /* Gather the operands. */
2839 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
2841 const struct powerpc_operand
*operand
;
2847 if (next_opindex
== 0)
2848 operand
= &powerpc_operands
[*opindex_ptr
];
2851 operand
= &powerpc_operands
[next_opindex
];
2856 /* If this is an optional operand, and we are skipping it, just
2858 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
2859 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
)
2862 int64_t val
= ppc_optional_operand_value (operand
);
2863 if (operand
->insert
)
2865 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
2866 if (errmsg
!= (const char *) NULL
)
2867 as_bad ("%s", errmsg
);
2869 else if (operand
->shift
>= 0)
2870 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2872 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2874 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
2875 next_opindex
= *opindex_ptr
+ 1;
2879 /* Gather the operand. */
2880 hold
= input_line_pointer
;
2881 input_line_pointer
= str
;
2884 if (*input_line_pointer
== '[')
2886 /* We are expecting something like the second argument here:
2888 * lwz r4,[toc].GS.0.static_int(rtoc)
2889 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2890 * The argument following the `]' must be a symbol name, and the
2891 * register must be the toc register: 'rtoc' or '2'
2893 * The effect is to 0 as the displacement field
2894 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2895 * the appropriate variation) reloc against it based on the symbol.
2896 * The linker will build the toc, and insert the resolved toc offset.
2899 * o The size of the toc entry is currently assumed to be
2900 * 32 bits. This should not be assumed to be a hard coded
2902 * o In an effort to cope with a change from 32 to 64 bits,
2903 * there are also toc entries that are specified to be
2904 * either 32 or 64 bits:
2905 * lwz r4,[toc32].GS.0.static_int(rtoc)
2906 * lwz r4,[toc64].GS.0.static_int(rtoc)
2907 * These demand toc entries of the specified size, and the
2908 * instruction probably requires it.
2912 enum toc_size_qualifier toc_kind
;
2913 bfd_reloc_code_real_type toc_reloc
;
2915 /* Go parse off the [tocXX] part. */
2916 valid_toc
= parse_toc_entry (&toc_kind
);
2920 ignore_rest_of_line ();
2924 /* Now get the symbol following the ']'. */
2930 /* In this case, we may not have seen the symbol yet,
2931 since it is allowed to appear on a .extern or .globl
2932 or just be a label in the .data section. */
2933 toc_reloc
= BFD_RELOC_PPC_TOC16
;
2936 /* 1. The symbol must be defined and either in the toc
2937 section, or a global.
2938 2. The reloc generated must have the TOCDEFN flag set
2939 in upper bit mess of the reloc type.
2940 FIXME: It's a little confusing what the tocv
2941 qualifier can be used for. At the very least, I've
2942 seen three uses, only one of which I'm sure I can
2944 if (ex
.X_op
== O_symbol
)
2946 gas_assert (ex
.X_add_symbol
!= NULL
);
2947 if (symbol_get_bfdsym (ex
.X_add_symbol
)->section
2950 as_bad (_("[tocv] symbol is not a toc symbol"));
2954 toc_reloc
= BFD_RELOC_PPC_TOC16
;
2957 /* FIXME: these next two specifically specify 32/64 bit
2958 toc entries. We don't support them today. Is this
2959 the right way to say that? */
2960 toc_reloc
= BFD_RELOC_NONE
;
2961 as_bad (_("unimplemented toc32 expression modifier"));
2964 /* FIXME: see above. */
2965 toc_reloc
= BFD_RELOC_NONE
;
2966 as_bad (_("unimplemented toc64 expression modifier"));
2970 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2976 /* We need to generate a fixup for this expression. */
2977 if (fc
>= MAX_INSN_FIXUPS
)
2978 as_fatal (_("too many fixups"));
2980 fixups
[fc
].reloc
= toc_reloc
;
2981 fixups
[fc
].exp
= ex
;
2982 fixups
[fc
].opindex
= *opindex_ptr
;
2985 /* Ok. We've set up the fixup for the instruction. Now make it
2986 look like the constant 0 was found here. */
2988 ex
.X_op
= O_constant
;
2989 ex
.X_add_number
= 0;
2990 ex
.X_add_symbol
= NULL
;
2991 ex
.X_op_symbol
= NULL
;
2998 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
2999 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
3000 || !register_name (&ex
))
3002 char save_lex
= lex_type
['%'];
3004 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
3005 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3008 lex_type
['%'] |= LEX_BEGIN_NAME
;
3012 lex_type
['%'] = save_lex
;
3016 str
= input_line_pointer
;
3017 input_line_pointer
= hold
;
3019 if (ex
.X_op
== O_illegal
)
3020 as_bad (_("illegal operand"));
3021 else if (ex
.X_op
== O_absent
)
3022 as_bad (_("missing operand"));
3023 else if (ex
.X_op
== O_register
)
3027 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3028 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3029 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
)) != 0
3030 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3031 && ex
.X_add_number
!= 0
3032 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3033 as_warn (_("invalid register expression"));
3034 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3035 ppc_cpu
, (char *) NULL
, 0);
3037 else if (ex
.X_op
== O_constant
)
3040 /* Allow @HA, @L, @H on constants. */
3041 bfd_reloc_code_real_type reloc
;
3042 char *orig_str
= str
;
3044 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3051 case BFD_RELOC_LO16
:
3052 ex
.X_add_number
&= 0xffff;
3053 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3054 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3057 case BFD_RELOC_HI16
:
3058 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3060 /* PowerPC64 @h is tested for overflow. */
3061 ex
.X_add_number
= (addressT
) ex
.X_add_number
>> 16;
3062 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3064 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3066 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3072 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3073 ex
.X_add_number
= PPC_HI (ex
.X_add_number
);
3074 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3075 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3078 case BFD_RELOC_HI16_S
:
3079 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3081 /* PowerPC64 @ha is tested for overflow. */
3083 = ((addressT
) ex
.X_add_number
+ 0x8000) >> 16;
3084 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3086 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3088 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3094 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3095 ex
.X_add_number
= PPC_HA (ex
.X_add_number
);
3096 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3097 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3100 case BFD_RELOC_PPC64_HIGHER
:
3101 ex
.X_add_number
= PPC_HIGHER (ex
.X_add_number
);
3102 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3103 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3106 case BFD_RELOC_PPC64_HIGHER_S
:
3107 ex
.X_add_number
= PPC_HIGHERA (ex
.X_add_number
);
3108 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3109 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3112 case BFD_RELOC_PPC64_HIGHEST
:
3113 ex
.X_add_number
= PPC_HIGHEST (ex
.X_add_number
);
3114 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3115 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3118 case BFD_RELOC_PPC64_HIGHEST_S
:
3119 ex
.X_add_number
= PPC_HIGHESTA (ex
.X_add_number
);
3120 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3121 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3124 #endif /* OBJ_ELF */
3125 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3126 ppc_cpu
, (char *) NULL
, 0);
3130 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3132 if (ex
.X_op
== O_symbol
&& str
[0] == '(')
3134 const char *sym_name
= S_GET_NAME (ex
.X_add_symbol
);
3135 if (sym_name
[0] == '.')
3138 if (strcasecmp (sym_name
, "__tls_get_addr") == 0)
3140 expressionS tls_exp
;
3142 hold
= input_line_pointer
;
3143 input_line_pointer
= str
+ 1;
3144 expression (&tls_exp
);
3145 if (tls_exp
.X_op
== O_symbol
)
3147 reloc
= BFD_RELOC_NONE
;
3148 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3150 reloc
= BFD_RELOC_PPC_TLSGD
;
3151 input_line_pointer
+= 7;
3153 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3155 reloc
= BFD_RELOC_PPC_TLSLD
;
3156 input_line_pointer
+= 7;
3158 if (reloc
!= BFD_RELOC_NONE
)
3161 str
= input_line_pointer
;
3163 if (fc
>= MAX_INSN_FIXUPS
)
3164 as_fatal (_("too many fixups"));
3165 fixups
[fc
].exp
= tls_exp
;
3166 fixups
[fc
].opindex
= *opindex_ptr
;
3167 fixups
[fc
].reloc
= reloc
;
3171 input_line_pointer
= hold
;
3175 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3177 /* Some TLS tweaks. */
3183 case BFD_RELOC_PPC_TLS
:
3184 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3185 as_bad (_("@tls may not be used with \"%s\" operands"),
3187 else if (operand
->shift
!= 11)
3188 as_bad (_("@tls may only be used in last operand"));
3190 insn
= ppc_insert_operand (insn
, operand
,
3192 ppc_cpu
, (char *) NULL
, 0);
3195 /* We'll only use the 32 (or 64) bit form of these relocations
3196 in constants. Instructions get the 16 bit form. */
3197 case BFD_RELOC_PPC_DTPREL
:
3198 reloc
= BFD_RELOC_PPC_DTPREL16
;
3200 case BFD_RELOC_PPC_TPREL
:
3201 reloc
= BFD_RELOC_PPC_TPREL16
;
3206 if (opcode
->opcode
== (19 << 26) + (2 << 1)
3207 && reloc
== BFD_RELOC_HI16_S
)
3208 reloc
= BFD_RELOC_PPC_16DX_HA
;
3210 /* If VLE-mode convert LO/HI/HA relocations. */
3211 if (opcode
->flags
& PPC_OPCODE_VLE
)
3213 uint64_t tmp_insn
= insn
& opcode
->mask
;
3215 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3216 || tmp_insn
== E_AND2I_DOT_INSN
3217 || tmp_insn
== E_OR2IS_INSN
3218 || tmp_insn
== E_LIS_INSN
3219 || tmp_insn
== E_AND2IS_DOT_INSN
);
3222 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3223 || tmp_insn
== E_ADD2IS_INSN
3224 || tmp_insn
== E_CMP16I_INSN
3225 || tmp_insn
== E_MULL2I_INSN
3226 || tmp_insn
== E_CMPL16I_INSN
3227 || tmp_insn
== E_CMPH16I_INSN
3228 || tmp_insn
== E_CMPHL16I_INSN
);
3235 case BFD_RELOC_PPC_EMB_SDA21
:
3236 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3239 case BFD_RELOC_LO16
:
3241 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3242 else if (use_a_reloc
)
3243 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3246 case BFD_RELOC_HI16
:
3248 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3249 else if (use_a_reloc
)
3250 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3253 case BFD_RELOC_HI16_S
:
3255 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3256 else if (use_a_reloc
)
3257 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3260 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3262 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3265 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3267 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3270 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3272 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3277 #endif /* OBJ_ELF */
3279 if (reloc
!= BFD_RELOC_NONE
)
3281 /* Determine a BFD reloc value based on the operand information.
3282 We are only prepared to turn a few of the operands into
3284 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3285 | PPC_OPERAND_ABSOLUTE
)) != 0
3286 && operand
->bitm
== 0x3fffffc
3287 && operand
->shift
== 0)
3288 reloc
= BFD_RELOC_PPC_B26
;
3289 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3290 | PPC_OPERAND_ABSOLUTE
)) != 0
3291 && operand
->bitm
== 0xfffc
3292 && operand
->shift
== 0)
3293 reloc
= BFD_RELOC_PPC_B16
;
3294 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3295 && operand
->bitm
== 0x1fe
3296 && operand
->shift
== -1)
3297 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3298 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3299 && operand
->bitm
== 0xfffe
3300 && operand
->shift
== 0)
3301 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3302 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3303 && operand
->bitm
== 0x1fffffe
3304 && operand
->shift
== 0)
3305 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3306 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3307 && (operand
->bitm
& 0xfff0) == 0xfff0
3308 && operand
->shift
== 0)
3310 reloc
= BFD_RELOC_16
;
3311 #if defined OBJ_XCOFF || defined OBJ_ELF
3312 /* Note: the symbol may be not yet defined. */
3313 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3314 && ppc_is_toc_sym (ex
.X_add_symbol
))
3316 reloc
= BFD_RELOC_PPC_TOC16
;
3318 as_warn (_("assuming %s on symbol"),
3319 ppc_obj64
? "@toc" : "@xgot");
3325 /* For the absolute forms of branches, convert the PC
3326 relative form back into the absolute. */
3327 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3331 case BFD_RELOC_PPC_B26
:
3332 reloc
= BFD_RELOC_PPC_BA26
;
3334 case BFD_RELOC_PPC_B16
:
3335 reloc
= BFD_RELOC_PPC_BA16
;
3338 case BFD_RELOC_PPC_B16_BRTAKEN
:
3339 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3341 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3342 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3353 case BFD_RELOC_PPC_TOC16
:
3354 toc_reloc_types
|= has_small_toc_reloc
;
3356 case BFD_RELOC_PPC64_TOC16_LO
:
3357 case BFD_RELOC_PPC64_TOC16_HI
:
3358 case BFD_RELOC_PPC64_TOC16_HA
:
3359 toc_reloc_types
|= has_large_toc_reloc
;
3366 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3371 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3373 case BFD_RELOC_LO16
:
3374 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3376 case BFD_RELOC_16_GOTOFF
:
3377 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3379 case BFD_RELOC_LO16_GOTOFF
:
3380 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3382 case BFD_RELOC_LO16_PLTOFF
:
3383 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3385 case BFD_RELOC_16_BASEREL
:
3386 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3388 case BFD_RELOC_LO16_BASEREL
:
3389 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3391 case BFD_RELOC_PPC_TOC16
:
3392 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3394 case BFD_RELOC_PPC64_TOC16_LO
:
3395 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3397 case BFD_RELOC_PPC64_PLTGOT16
:
3398 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3400 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3401 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3403 case BFD_RELOC_PPC_DTPREL16
:
3404 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3406 case BFD_RELOC_PPC_DTPREL16_LO
:
3407 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3409 case BFD_RELOC_PPC_TPREL16
:
3410 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3412 case BFD_RELOC_PPC_TPREL16_LO
:
3413 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3415 case BFD_RELOC_PPC_GOT_DTPREL16
:
3416 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3417 case BFD_RELOC_PPC_GOT_TPREL16
:
3418 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3421 as_bad (_("unsupported relocation for DS offset field"));
3427 /* We need to generate a fixup for this expression. */
3428 if (fc
>= MAX_INSN_FIXUPS
)
3429 as_fatal (_("too many fixups"));
3430 fixups
[fc
].exp
= ex
;
3431 fixups
[fc
].opindex
= *opindex_ptr
;
3432 fixups
[fc
].reloc
= reloc
;
3440 /* If expecting more operands, then we want to see "),". */
3441 if (*str
== endc
&& opindex_ptr
[1] != 0)
3445 while (ISSPACE (*str
));
3449 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
3457 /* The call to expression should have advanced str past any
3460 && (endc
!= ',' || *str
!= '\0'))
3463 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
3465 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
3473 while (ISSPACE (*str
))
3477 as_bad (_("junk at end of line: `%s'"), str
);
3480 /* Do we need/want an APUinfo section? */
3481 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
3484 /* These are all version "1". */
3485 if (opcode
->flags
& PPC_OPCODE_SPE
)
3486 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
3487 if (opcode
->flags
& PPC_OPCODE_ISEL
)
3488 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
3489 if (opcode
->flags
& PPC_OPCODE_EFS
)
3490 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
3491 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
3492 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
3493 if (opcode
->flags
& PPC_OPCODE_PMR
)
3494 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
3495 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
3496 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
3497 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
3498 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
3499 /* Only set the VLE flag if the instruction has been pulled via
3500 the VLE instruction set. This way the flag is guaranteed to
3501 be set for VLE-only instructions or for VLE-only processors,
3502 however it'll remain clear for dual-mode instructions on
3503 dual-mode and, more importantly, standard-mode processors. */
3504 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
3506 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
3507 if (elf_section_data (now_seg
) != NULL
)
3508 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
3513 /* Write out the instruction. */
3516 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
3517 /* All instructions can start on a 2 byte boundary for VLE. */
3520 if (frag_now
->insn_addr
!= addr_mask
)
3522 /* Don't emit instructions to a frag started for data, or for a
3523 CPU differing in VLE mode. Data is allowed to be misaligned,
3524 and it's possible to start a new frag in the middle of
3526 frag_wane (frag_now
);
3530 /* Check that insns within the frag are aligned. ppc_frag_check
3531 will ensure that the frag start address is aligned. */
3532 if ((frag_now_fix () & addr_mask
) != 0)
3533 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
3535 /* Differentiate between two and four byte insns. */
3537 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
3540 f
= frag_more (insn_length
);
3541 frag_now
->insn_addr
= addr_mask
;
3542 md_number_to_chars (f
, insn
, insn_length
);
3545 last_subseg
= now_subseg
;
3548 dwarf2_emit_insn (insn_length
);
3551 /* Create any fixups. */
3552 for (i
= 0; i
< fc
; i
++)
3555 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
3557 reloc_howto_type
*reloc_howto
;
3561 reloc_howto
= bfd_reloc_type_lookup (stdoutput
, fixups
[i
].reloc
);
3565 size
= bfd_get_reloc_size (reloc_howto
);
3566 offset
= target_big_endian
? (insn_length
- size
) : 0;
3568 fixP
= fix_new_exp (frag_now
,
3569 f
- frag_now
->fr_literal
+ offset
,
3572 reloc_howto
->pc_relative
,
3577 const struct powerpc_operand
*operand
;
3579 operand
= &powerpc_operands
[fixups
[i
].opindex
];
3580 fixP
= fix_new_exp (frag_now
,
3581 f
- frag_now
->fr_literal
,
3584 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
3587 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
3591 /* Handle a macro. Gather all the operands, transform them as
3592 described by the macro, and call md_assemble recursively. All the
3593 operands are separated by commas; we don't accept parentheses
3594 around operands here. */
3597 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
3608 /* Gather the users operands into the operands array. */
3613 if (count
>= sizeof operands
/ sizeof operands
[0])
3615 operands
[count
++] = s
;
3616 s
= strchr (s
, ',');
3617 if (s
== (char *) NULL
)
3622 if (count
!= macro
->operands
)
3624 as_bad (_("wrong number of operands"));
3628 /* Work out how large the string must be (the size is unbounded
3629 because it includes user input). */
3631 format
= macro
->format
;
3632 while (*format
!= '\0')
3641 arg
= strtol (format
+ 1, &send
, 10);
3642 know (send
!= format
&& arg
< count
);
3643 len
+= strlen (operands
[arg
]);
3648 /* Put the string together. */
3649 complete
= s
= XNEWVEC (char, len
+ 1);
3650 format
= macro
->format
;
3651 while (*format
!= '\0')
3657 arg
= strtol (format
+ 1, &send
, 10);
3658 strcpy (s
, operands
[arg
]);
3665 /* Assemble the constructed instruction. */
3666 md_assemble (complete
);
3671 /* For ELF, add support for SHT_ORDERED. */
3674 ppc_section_type (char *str
, size_t len
)
3676 if (len
== 7 && strncmp (str
, "ordered", 7) == 0)
3683 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
3685 if (type
== SHT_ORDERED
)
3686 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
3692 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
3697 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
3700 #endif /* OBJ_ELF */
3703 /* Pseudo-op handling. */
3705 /* The .byte pseudo-op. This is similar to the normal .byte
3706 pseudo-op, but it can also take a single ASCII string. */
3709 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
3713 if (*input_line_pointer
!= '\"')
3719 /* Gather characters. A real double quote is doubled. Unusual
3720 characters are not permitted. */
3721 ++input_line_pointer
;
3726 c
= *input_line_pointer
++;
3730 if (*input_line_pointer
!= '\"')
3732 ++input_line_pointer
;
3735 FRAG_APPEND_1_CHAR (c
);
3739 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
3740 as_warn (_("data in executable section"));
3741 demand_empty_rest_of_line ();
3746 /* XCOFF specific pseudo-op handling. */
3748 /* This is set if we are creating a .stabx symbol, since we don't want
3749 to handle symbol suffixes for such symbols. */
3750 static bfd_boolean ppc_stab_symbol
;
3752 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3753 symbols in the .bss segment as though they were local common
3754 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3755 aligns .comm and .lcomm to 4 bytes. */
3758 ppc_comm (int lcomm
)
3760 asection
*current_seg
= now_seg
;
3761 subsegT current_subseg
= now_subseg
;
3767 symbolS
*lcomm_sym
= NULL
;
3771 endc
= get_symbol_name (&name
);
3772 end_name
= input_line_pointer
;
3773 (void) restore_line_pointer (endc
);
3775 if (*input_line_pointer
!= ',')
3777 as_bad (_("missing size"));
3778 ignore_rest_of_line ();
3781 ++input_line_pointer
;
3783 size
= get_absolute_expression ();
3786 as_bad (_("negative size"));
3787 ignore_rest_of_line ();
3793 /* The third argument to .comm is the alignment. */
3794 if (*input_line_pointer
!= ',')
3798 ++input_line_pointer
;
3799 align
= get_absolute_expression ();
3802 as_warn (_("ignoring bad alignment"));
3812 /* The third argument to .lcomm appears to be the real local
3813 common symbol to create. References to the symbol named in
3814 the first argument are turned into references to the third
3816 if (*input_line_pointer
!= ',')
3818 as_bad (_("missing real symbol name"));
3819 ignore_rest_of_line ();
3822 ++input_line_pointer
;
3824 lcomm_endc
= get_symbol_name (&lcomm_name
);
3826 lcomm_sym
= symbol_find_or_make (lcomm_name
);
3828 (void) restore_line_pointer (lcomm_endc
);
3830 /* The fourth argument to .lcomm is the alignment. */
3831 if (*input_line_pointer
!= ',')
3840 ++input_line_pointer
;
3841 align
= get_absolute_expression ();
3844 as_warn (_("ignoring bad alignment"));
3851 sym
= symbol_find_or_make (name
);
3854 if (S_IS_DEFINED (sym
)
3855 || S_GET_VALUE (sym
) != 0)
3857 as_bad (_("attempt to redefine symbol"));
3858 ignore_rest_of_line ();
3862 record_alignment (bss_section
, align
);
3865 || ! S_IS_DEFINED (lcomm_sym
))
3874 S_SET_EXTERNAL (sym
);
3878 symbol_get_tc (lcomm_sym
)->output
= 1;
3879 def_sym
= lcomm_sym
;
3883 subseg_set (bss_section
, 1);
3884 frag_align (align
, 0, 0);
3886 symbol_set_frag (def_sym
, frag_now
);
3887 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
3888 def_size
, (char *) NULL
);
3890 S_SET_SEGMENT (def_sym
, bss_section
);
3891 symbol_get_tc (def_sym
)->align
= align
;
3895 /* Align the size of lcomm_sym. */
3896 symbol_get_frag (lcomm_sym
)->fr_offset
=
3897 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
3898 &~ ((1 << align
) - 1));
3899 if (align
> symbol_get_tc (lcomm_sym
)->align
)
3900 symbol_get_tc (lcomm_sym
)->align
= align
;
3905 /* Make sym an offset from lcomm_sym. */
3906 S_SET_SEGMENT (sym
, bss_section
);
3907 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
3908 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
3909 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
3912 subseg_set (current_seg
, current_subseg
);
3914 demand_empty_rest_of_line ();
3917 /* The .csect pseudo-op. This switches us into a different
3918 subsegment. The first argument is a symbol whose value is the
3919 start of the .csect. In COFF, csect symbols get special aux
3920 entries defined by the x_csect field of union internal_auxent. The
3921 optional second argument is the alignment (the default is 2). */
3924 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
3931 endc
= get_symbol_name (&name
);
3933 sym
= symbol_find_or_make (name
);
3935 (void) restore_line_pointer (endc
);
3937 if (S_GET_NAME (sym
)[0] == '\0')
3939 /* An unnamed csect is assumed to be [PR]. */
3940 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
3944 if (*input_line_pointer
== ',')
3946 ++input_line_pointer
;
3947 align
= get_absolute_expression ();
3950 ppc_change_csect (sym
, align
);
3952 demand_empty_rest_of_line ();
3955 /* Change to a different csect. */
3958 ppc_change_csect (symbolS
*sym
, offsetT align
)
3960 if (S_IS_DEFINED (sym
))
3961 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
3971 /* This is a new csect. We need to look at the symbol class to
3972 figure out whether it should go in the text section or the
3976 switch (symbol_get_tc (sym
)->symbol_class
)
3986 S_SET_SEGMENT (sym
, text_section
);
3987 symbol_get_tc (sym
)->subseg
= ppc_text_subsegment
;
3988 ++ppc_text_subsegment
;
3989 list_ptr
= &ppc_text_csects
;
3999 if (ppc_toc_csect
!= NULL
4000 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4001 == ppc_data_subsegment
))
4003 S_SET_SEGMENT (sym
, data_section
);
4004 symbol_get_tc (sym
)->subseg
= ppc_data_subsegment
;
4005 ++ppc_data_subsegment
;
4006 list_ptr
= &ppc_data_csects
;
4012 /* We set the obstack chunk size to a small value before
4013 changing subsegments, so that we don't use a lot of memory
4014 space for what may be a small section. */
4015 hold_chunksize
= chunksize
;
4018 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4019 symbol_get_tc (sym
)->subseg
);
4021 chunksize
= hold_chunksize
;
4024 ppc_after_toc_frag
= frag_now
;
4026 record_alignment (sec
, align
);
4028 frag_align_code (align
, 0);
4030 frag_align (align
, 0, 0);
4032 symbol_set_frag (sym
, frag_now
);
4033 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4035 symbol_get_tc (sym
)->align
= align
;
4036 symbol_get_tc (sym
)->output
= 1;
4037 symbol_get_tc (sym
)->within
= sym
;
4039 for (list
= *list_ptr
;
4040 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4041 list
= symbol_get_tc (list
)->next
)
4043 symbol_get_tc (list
)->next
= sym
;
4045 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4046 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4050 ppc_current_csect
= sym
;
4054 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4058 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4060 sec
= subseg_new (dw
->name
, subseg
);
4061 oldflags
= bfd_get_section_flags (stdoutput
, sec
);
4062 if (oldflags
== SEC_NO_FLAGS
)
4064 /* Just created section. */
4065 gas_assert (dw_sections
[idx
].sect
== NULL
);
4067 bfd_set_section_flags (stdoutput
, sec
, SEC_DEBUGGING
);
4068 bfd_set_section_alignment (stdoutput
, sec
, 0);
4069 dw_sections
[idx
].sect
= sec
;
4072 /* Not anymore in a csect. */
4073 ppc_current_csect
= NULL
;
4076 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4077 .dwsect flag [, opt-label ]
4081 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4085 const struct xcoff_dwsect_name
*dw
;
4086 struct dw_subsection
*subseg
;
4087 struct dw_section
*dws
;
4091 flag
= get_absolute_expression ();
4093 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4094 if (xcoff_dwsect_names
[i
].flag
== flag
)
4096 dw
= &xcoff_dwsect_names
[i
];
4100 /* Parse opt-label. */
4101 if (*input_line_pointer
== ',')
4106 ++input_line_pointer
;
4108 c
= get_symbol_name (&label
);
4109 opt_label
= symbol_find_or_make (label
);
4110 (void) restore_line_pointer (c
);
4115 demand_empty_rest_of_line ();
4117 /* Return now in case of unknown subsection. */
4120 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4125 /* Find the subsection. */
4126 dws
= &dw_sections
[i
];
4128 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4130 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4131 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4133 as_bad (_("label %s was not defined in this dwarf section"),
4134 S_GET_NAME (opt_label
));
4135 subseg
= dws
->anon_subseg
;
4139 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4144 /* Switch to the subsection. */
4145 ppc_change_debug_section (i
, subseg
->subseg
);
4149 /* Create a new dw subsection. */
4150 subseg
= XNEW (struct dw_subsection
);
4152 if (opt_label
== NULL
)
4154 /* The anonymous one. */
4156 subseg
->link
= NULL
;
4157 dws
->anon_subseg
= subseg
;
4162 if (dws
->list_subseg
!= NULL
)
4163 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4167 subseg
->link
= dws
->list_subseg
;
4168 dws
->list_subseg
= subseg
;
4169 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4172 ppc_change_debug_section (i
, subseg
->subseg
);
4176 /* Add the length field. */
4177 expressionS
*exp
= &subseg
->end_exp
;
4180 if (opt_label
!= NULL
)
4181 symbol_set_value_now (opt_label
);
4183 /* Add the length field. Note that according to the AIX assembler
4184 manual, the size of the length field is 4 for powerpc32 but
4185 12 for powerpc64. */
4188 /* Write the 64bit marker. */
4189 md_number_to_chars (frag_more (4), -1, 4);
4192 exp
->X_op
= O_subtract
;
4193 exp
->X_op_symbol
= symbol_temp_new_now ();
4194 exp
->X_add_symbol
= symbol_temp_make ();
4196 sz
= ppc_obj64
? 8 : 4;
4197 exp
->X_add_number
= -sz
;
4198 emit_expr (exp
, sz
);
4203 /* This function handles the .text and .data pseudo-ops. These
4204 pseudo-ops aren't really used by XCOFF; we implement them for the
4205 convenience of people who aren't used to XCOFF. */
4208 ppc_section (int type
)
4215 else if (type
== 'd')
4220 sym
= symbol_find_or_make (name
);
4222 ppc_change_csect (sym
, 2);
4224 demand_empty_rest_of_line ();
4227 /* This function handles the .section pseudo-op. This is mostly to
4228 give an error, since XCOFF only supports .text, .data and .bss, but
4229 we do permit the user to name the text or data section. */
4232 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4235 const char *real_name
;
4239 c
= get_symbol_name (&user_name
);
4241 if (strcmp (user_name
, ".text") == 0)
4242 real_name
= ".text[PR]";
4243 else if (strcmp (user_name
, ".data") == 0)
4244 real_name
= ".data[RW]";
4247 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4248 (void) restore_line_pointer (c
);
4249 ignore_rest_of_line ();
4253 (void) restore_line_pointer (c
);
4255 sym
= symbol_find_or_make (real_name
);
4257 ppc_change_csect (sym
, 2);
4259 demand_empty_rest_of_line ();
4262 /* The .extern pseudo-op. We create an undefined symbol. */
4265 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4270 endc
= get_symbol_name (&name
);
4272 (void) symbol_find_or_make (name
);
4274 (void) restore_line_pointer (endc
);
4276 demand_empty_rest_of_line ();
4279 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4282 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4288 endc
= get_symbol_name (&name
);
4290 sym
= symbol_find_or_make (name
);
4292 (void) restore_line_pointer (endc
);
4294 symbol_get_tc (sym
)->output
= 1;
4296 demand_empty_rest_of_line ();
4299 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4300 relocations at the beginning of the current csect.
4302 (In principle, there's no reason why the relocations _have_ to be at
4303 the beginning. Anywhere in the csect would do. However, inserting
4304 at the beginning is what the native assembler does, and it helps to
4305 deal with cases where the .ref statements follow the section contents.)
4307 ??? .refs don't work for empty .csects. However, the native assembler
4308 doesn't report an error in this case, and neither yet do we. */
4311 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
4316 if (ppc_current_csect
== NULL
)
4318 as_bad (_(".ref outside .csect"));
4319 ignore_rest_of_line ();
4325 c
= get_symbol_name (&name
);
4327 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
4328 symbol_find_or_make (name
), 0, FALSE
, BFD_RELOC_NONE
);
4330 *input_line_pointer
= c
;
4331 SKIP_WHITESPACE_AFTER_NAME ();
4332 c
= *input_line_pointer
;
4335 input_line_pointer
++;
4337 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
4339 as_bad (_("missing symbol name"));
4340 ignore_rest_of_line ();
4347 demand_empty_rest_of_line ();
4350 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4351 although I don't know why it bothers. */
4354 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
4361 endc
= get_symbol_name (&name
);
4363 sym
= symbol_find_or_make (name
);
4365 (void) restore_line_pointer (endc
);
4367 if (*input_line_pointer
!= ',')
4369 as_bad (_("missing rename string"));
4370 ignore_rest_of_line ();
4373 ++input_line_pointer
;
4375 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
4377 demand_empty_rest_of_line ();
4380 /* The .stabx pseudo-op. This is similar to a normal .stabs
4381 pseudo-op, but slightly different. A sample is
4382 .stabx "main:F-1",.main,142,0
4383 The first argument is the symbol name to create. The second is the
4384 value, and the third is the storage class. The fourth seems to be
4385 always zero, and I am assuming it is the type. */
4388 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
4395 name
= demand_copy_C_string (&len
);
4397 if (*input_line_pointer
!= ',')
4399 as_bad (_("missing value"));
4402 ++input_line_pointer
;
4404 ppc_stab_symbol
= TRUE
;
4405 sym
= symbol_make (name
);
4406 ppc_stab_symbol
= FALSE
;
4408 symbol_get_tc (sym
)->real_name
= name
;
4410 (void) expression (&exp
);
4417 as_bad (_("illegal .stabx expression; zero assumed"));
4418 exp
.X_add_number
= 0;
4421 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
4422 symbol_set_frag (sym
, &zero_address_frag
);
4426 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
4427 symbol_set_value_expression (sym
, &exp
);
4431 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
4432 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
4437 /* The value is some complex expression. This will probably
4438 fail at some later point, but this is probably the right
4439 thing to do here. */
4440 symbol_set_value_expression (sym
, &exp
);
4444 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4445 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4447 if (*input_line_pointer
!= ',')
4449 as_bad (_("missing class"));
4452 ++input_line_pointer
;
4454 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
4456 if (*input_line_pointer
!= ',')
4458 as_bad (_("missing type"));
4461 ++input_line_pointer
;
4463 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
4465 symbol_get_tc (sym
)->output
= 1;
4467 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
4472 .stabx "z",arrays_,133,0
4475 .comm arrays_,13768,3
4477 resolve_symbol_value will copy the exp's "within" into sym's when the
4478 offset is 0. Since this seems to be corner case problem,
4479 only do the correction for storage class C_STSYM. A better solution
4480 would be to have the tc field updated in ppc_symbol_new_hook. */
4482 if (exp
.X_op
== O_symbol
)
4484 if (ppc_current_block
== NULL
)
4485 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4487 symbol_get_tc (sym
)->within
= ppc_current_block
;
4488 symbol_get_tc (exp
.X_add_symbol
)->within
= ppc_current_block
;
4492 if (exp
.X_op
!= O_symbol
4493 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
4494 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
4495 ppc_frob_label (sym
);
4498 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4499 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
4500 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
4501 symbol_get_tc (ppc_current_csect
)->within
= sym
;
4504 demand_empty_rest_of_line ();
4507 /* The .function pseudo-op. This takes several arguments. The first
4508 argument seems to be the external name of the symbol. The second
4509 argument seems to be the label for the start of the function. gcc
4510 uses the same name for both. I have no idea what the third and
4511 fourth arguments are meant to be. The optional fifth argument is
4512 an expression for the size of the function. In COFF this symbol
4513 gets an aux entry like that used for a csect. */
4516 ppc_function (int ignore ATTRIBUTE_UNUSED
)
4524 endc
= get_symbol_name (&name
);
4526 /* Ignore any [PR] suffix. */
4527 name
= ppc_canonicalize_symbol_name (name
);
4528 s
= strchr (name
, '[');
4529 if (s
!= (char *) NULL
4530 && strcmp (s
+ 1, "PR]") == 0)
4533 ext_sym
= symbol_find_or_make (name
);
4535 (void) restore_line_pointer (endc
);
4537 if (*input_line_pointer
!= ',')
4539 as_bad (_("missing symbol name"));
4540 ignore_rest_of_line ();
4543 ++input_line_pointer
;
4545 endc
= get_symbol_name (&name
);
4547 lab_sym
= symbol_find_or_make (name
);
4549 (void) restore_line_pointer (endc
);
4551 if (ext_sym
!= lab_sym
)
4555 exp
.X_op
= O_symbol
;
4556 exp
.X_add_symbol
= lab_sym
;
4557 exp
.X_op_symbol
= NULL
;
4558 exp
.X_add_number
= 0;
4560 symbol_set_value_expression (ext_sym
, &exp
);
4563 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
4564 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
4565 symbol_get_tc (ext_sym
)->output
= 1;
4567 if (*input_line_pointer
== ',')
4571 /* Ignore the third argument. */
4572 ++input_line_pointer
;
4574 if (*input_line_pointer
== ',')
4576 /* Ignore the fourth argument. */
4577 ++input_line_pointer
;
4579 if (*input_line_pointer
== ',')
4581 /* The fifth argument is the function size. */
4582 ++input_line_pointer
;
4583 symbol_get_tc (ext_sym
)->u
.size
= symbol_new
4584 ("L0\001", absolute_section
,(valueT
) 0, &zero_address_frag
);
4585 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
4590 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
4591 SF_SET_FUNCTION (ext_sym
);
4592 SF_SET_PROCESS (ext_sym
);
4593 coff_add_linesym (ext_sym
);
4595 demand_empty_rest_of_line ();
4598 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4599 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4600 with the correct line number */
4602 static symbolS
*saved_bi_sym
= 0;
4605 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
4609 sym
= symbol_make (".bf");
4610 S_SET_SEGMENT (sym
, text_section
);
4611 symbol_set_frag (sym
, frag_now
);
4612 S_SET_VALUE (sym
, frag_now_fix ());
4613 S_SET_STORAGE_CLASS (sym
, C_FCN
);
4615 coff_line_base
= get_absolute_expression ();
4617 S_SET_NUMBER_AUXILIARY (sym
, 1);
4618 SA_SET_SYM_LNNO (sym
, coff_line_base
);
4620 /* Line number for bi. */
4623 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
4628 symbol_get_tc (sym
)->output
= 1;
4630 ppc_frob_label (sym
);
4632 demand_empty_rest_of_line ();
4635 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4636 ".ef", except that the line number is absolute, not relative to the
4637 most recent ".bf" symbol. */
4640 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
4644 sym
= symbol_make (".ef");
4645 S_SET_SEGMENT (sym
, text_section
);
4646 symbol_set_frag (sym
, frag_now
);
4647 S_SET_VALUE (sym
, frag_now_fix ());
4648 S_SET_STORAGE_CLASS (sym
, C_FCN
);
4649 S_SET_NUMBER_AUXILIARY (sym
, 1);
4650 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4651 symbol_get_tc (sym
)->output
= 1;
4653 ppc_frob_label (sym
);
4655 demand_empty_rest_of_line ();
4658 /* The .bi and .ei pseudo-ops. These take a string argument and
4659 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4660 the symbol list. The value of .bi will be know when the next .bf
4666 static symbolS
*last_biei
;
4673 name
= demand_copy_C_string (&len
);
4675 /* The value of these symbols is actually file offset. Here we set
4676 the value to the index into the line number entries. In
4677 ppc_frob_symbols we set the fix_line field, which will cause BFD
4678 to do the right thing. */
4680 sym
= symbol_make (name
);
4681 /* obj-coff.c currently only handles line numbers correctly in the
4683 S_SET_SEGMENT (sym
, text_section
);
4684 S_SET_VALUE (sym
, coff_n_line_nos
);
4685 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4687 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
4688 symbol_get_tc (sym
)->output
= 1;
4696 for (look
= last_biei
? last_biei
: symbol_rootP
;
4697 (look
!= (symbolS
*) NULL
4698 && (S_GET_STORAGE_CLASS (look
) == C_FILE
4699 || S_GET_STORAGE_CLASS (look
) == C_BINCL
4700 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
4701 look
= symbol_next (look
))
4703 if (look
!= (symbolS
*) NULL
)
4705 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4706 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
4710 demand_empty_rest_of_line ();
4713 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4714 There is one argument, which is a csect symbol. The value of the
4715 .bs symbol is the index of this csect symbol. */
4718 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
4725 if (ppc_current_block
!= NULL
)
4726 as_bad (_("nested .bs blocks"));
4728 endc
= get_symbol_name (&name
);
4730 csect
= symbol_find_or_make (name
);
4732 (void) restore_line_pointer (endc
);
4734 sym
= symbol_make (".bs");
4735 S_SET_SEGMENT (sym
, now_seg
);
4736 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
4737 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4738 symbol_get_tc (sym
)->output
= 1;
4740 symbol_get_tc (sym
)->within
= csect
;
4742 ppc_frob_label (sym
);
4744 ppc_current_block
= sym
;
4746 demand_empty_rest_of_line ();
4749 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4752 ppc_es (int ignore ATTRIBUTE_UNUSED
)
4756 if (ppc_current_block
== NULL
)
4757 as_bad (_(".es without preceding .bs"));
4759 sym
= symbol_make (".es");
4760 S_SET_SEGMENT (sym
, now_seg
);
4761 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
4762 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4763 symbol_get_tc (sym
)->output
= 1;
4765 ppc_frob_label (sym
);
4767 ppc_current_block
= NULL
;
4769 demand_empty_rest_of_line ();
4772 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4776 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
4780 sym
= symbol_make (".bb");
4781 S_SET_SEGMENT (sym
, text_section
);
4782 symbol_set_frag (sym
, frag_now
);
4783 S_SET_VALUE (sym
, frag_now_fix ());
4784 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
4786 S_SET_NUMBER_AUXILIARY (sym
, 1);
4787 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4789 symbol_get_tc (sym
)->output
= 1;
4791 SF_SET_PROCESS (sym
);
4793 ppc_frob_label (sym
);
4795 demand_empty_rest_of_line ();
4798 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4802 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
4806 sym
= symbol_make (".eb");
4807 S_SET_SEGMENT (sym
, text_section
);
4808 symbol_set_frag (sym
, frag_now
);
4809 S_SET_VALUE (sym
, frag_now_fix ());
4810 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
4811 S_SET_NUMBER_AUXILIARY (sym
, 1);
4812 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
4813 symbol_get_tc (sym
)->output
= 1;
4815 SF_SET_PROCESS (sym
);
4817 ppc_frob_label (sym
);
4819 demand_empty_rest_of_line ();
4822 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4826 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
4832 name
= demand_copy_C_string (&len
);
4833 sym
= symbol_make (name
);
4834 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4835 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4836 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
4837 S_SET_VALUE (sym
, 0);
4838 symbol_get_tc (sym
)->output
= 1;
4840 ppc_frob_label (sym
);
4842 demand_empty_rest_of_line ();
4845 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4848 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
4852 sym
= symbol_make (".ec");
4853 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4854 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4855 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
4856 S_SET_VALUE (sym
, 0);
4857 symbol_get_tc (sym
)->output
= 1;
4859 ppc_frob_label (sym
);
4861 demand_empty_rest_of_line ();
4864 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4867 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
4869 if (ppc_toc_csect
!= (symbolS
*) NULL
)
4870 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
4877 subseg
= ppc_data_subsegment
;
4878 ++ppc_data_subsegment
;
4880 subseg_new (segment_name (data_section
), subseg
);
4881 ppc_toc_frag
= frag_now
;
4883 sym
= symbol_find_or_make ("TOC[TC0]");
4884 symbol_set_frag (sym
, frag_now
);
4885 S_SET_SEGMENT (sym
, data_section
);
4886 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4887 symbol_get_tc (sym
)->subseg
= subseg
;
4888 symbol_get_tc (sym
)->output
= 1;
4889 symbol_get_tc (sym
)->within
= sym
;
4891 ppc_toc_csect
= sym
;
4893 for (list
= ppc_data_csects
;
4894 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4895 list
= symbol_get_tc (list
)->next
)
4897 symbol_get_tc (list
)->next
= sym
;
4899 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4900 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4904 ppc_current_csect
= ppc_toc_csect
;
4906 demand_empty_rest_of_line ();
4909 /* The AIX assembler automatically aligns the operands of a .long or
4910 .short pseudo-op, and we want to be compatible. */
4913 ppc_xcoff_cons (int log_size
)
4915 frag_align (log_size
, 0, 0);
4916 record_alignment (now_seg
, log_size
);
4917 cons (1 << log_size
);
4921 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
4926 (void) expression (&exp
);
4928 if (exp
.X_op
!= O_constant
)
4930 as_bad (_("non-constant byte count"));
4934 byte_count
= exp
.X_add_number
;
4936 if (*input_line_pointer
!= ',')
4938 as_bad (_("missing value"));
4942 ++input_line_pointer
;
4947 ppc_xcoff_end (void)
4951 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4953 struct dw_section
*dws
= &dw_sections
[i
];
4954 struct dw_subsection
*dwss
;
4956 if (dws
->anon_subseg
)
4958 dwss
= dws
->anon_subseg
;
4959 dwss
->link
= dws
->list_subseg
;
4962 dwss
= dws
->list_subseg
;
4964 for (; dwss
!= NULL
; dwss
= dwss
->link
)
4965 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
4967 subseg_set (dws
->sect
, dwss
->subseg
);
4968 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
4973 #endif /* OBJ_XCOFF */
4974 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4976 /* The .tc pseudo-op. This is used when generating either XCOFF or
4977 ELF. This takes two or more arguments.
4979 When generating XCOFF output, the first argument is the name to
4980 give to this location in the toc; this will be a symbol with class
4981 TC. The rest of the arguments are N-byte values to actually put at
4982 this location in the TOC; often there is just one more argument, a
4983 relocatable symbol reference. The size of the value to store
4984 depends on target word size. A 32-bit target uses 4-byte values, a
4985 64-bit target uses 8-byte values.
4987 When not generating XCOFF output, the arguments are the same, but
4988 the first argument is simply ignored. */
4991 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
4995 /* Define the TOC symbol name. */
5001 if (ppc_toc_csect
== (symbolS
*) NULL
5002 || ppc_toc_csect
!= ppc_current_csect
)
5004 as_bad (_(".tc not in .toc section"));
5005 ignore_rest_of_line ();
5009 endc
= get_symbol_name (&name
);
5011 sym
= symbol_find_or_make (name
);
5013 (void) restore_line_pointer (endc
);
5015 if (S_IS_DEFINED (sym
))
5019 label
= symbol_get_tc (ppc_current_csect
)->within
;
5020 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5022 as_bad (_(".tc with no label"));
5023 ignore_rest_of_line ();
5027 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5028 symbol_set_frag (label
, symbol_get_frag (sym
));
5029 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5031 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5032 ++input_line_pointer
;
5037 S_SET_SEGMENT (sym
, now_seg
);
5038 symbol_set_frag (sym
, frag_now
);
5039 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5040 symbol_get_tc (sym
)->symbol_class
= XMC_TC
;
5041 symbol_get_tc (sym
)->output
= 1;
5043 ppc_frob_label (sym
);
5046 #endif /* OBJ_XCOFF */
5050 /* Skip the TOC symbol name. */
5051 while (is_part_of_name (*input_line_pointer
)
5052 || *input_line_pointer
== ' '
5053 || *input_line_pointer
== '['
5054 || *input_line_pointer
== ']'
5055 || *input_line_pointer
== '{'
5056 || *input_line_pointer
== '}')
5057 ++input_line_pointer
;
5059 /* Align to a four/eight byte boundary. */
5060 align
= ppc_obj64
? 3 : 2;
5061 frag_align (align
, 0, 0);
5062 record_alignment (now_seg
, align
);
5063 #endif /* OBJ_ELF */
5065 if (*input_line_pointer
!= ',')
5066 demand_empty_rest_of_line ();
5069 ++input_line_pointer
;
5070 cons (ppc_obj64
? 8 : 4);
5074 /* Pseudo-op .machine. */
5077 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5081 #define MAX_HISTORY 100
5082 static ppc_cpu_t
*cpu_history
;
5083 static int curr_hist
;
5087 c
= get_symbol_name (&cpu_string
);
5088 cpu_string
= xstrdup (cpu_string
);
5089 (void) restore_line_pointer (c
);
5091 if (cpu_string
!= NULL
)
5093 ppc_cpu_t old_cpu
= ppc_cpu
;
5097 for (p
= cpu_string
; *p
!= 0; p
++)
5100 if (strcmp (cpu_string
, "push") == 0)
5102 if (cpu_history
== NULL
)
5103 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5105 if (curr_hist
>= MAX_HISTORY
)
5106 as_bad (_(".machine stack overflow"));
5108 cpu_history
[curr_hist
++] = ppc_cpu
;
5110 else if (strcmp (cpu_string
, "pop") == 0)
5113 as_bad (_(".machine stack underflow"));
5115 ppc_cpu
= cpu_history
[--curr_hist
];
5117 else if ((new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, cpu_string
)) != 0)
5120 as_bad (_("invalid machine `%s'"), cpu_string
);
5122 if (ppc_cpu
!= old_cpu
)
5123 ppc_setup_opcodes ();
5126 demand_empty_rest_of_line ();
5128 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5132 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5134 /* Set the current section. */
5136 ppc_set_current_section (segT
new)
5138 ppc_previous_section
= ppc_current_section
;
5139 ppc_current_section
= new;
5142 /* pseudo-op: .previous
5143 behaviour: toggles the current section with the previous section.
5145 warnings: "No previous section" */
5148 ppc_previous (int ignore ATTRIBUTE_UNUSED
)
5150 if (ppc_previous_section
== NULL
)
5152 as_warn (_("no previous section to return to, ignored."));
5156 subseg_set (ppc_previous_section
, 0);
5158 ppc_set_current_section (ppc_previous_section
);
5161 /* pseudo-op: .pdata
5162 behaviour: predefined read only data section
5166 initial: .section .pdata "adr3"
5167 a - don't know -- maybe a misprint
5168 d - initialized data
5170 3 - double word aligned (that would be 4 byte boundary)
5173 Tag index tables (also known as the function table) for exception
5174 handling, debugging, etc. */
5177 ppc_pdata (int ignore ATTRIBUTE_UNUSED
)
5179 if (pdata_section
== 0)
5181 pdata_section
= subseg_new (".pdata", 0);
5183 bfd_set_section_flags (stdoutput
, pdata_section
,
5184 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5185 | SEC_READONLY
| SEC_DATA
));
5187 bfd_set_section_alignment (stdoutput
, pdata_section
, 2);
5191 pdata_section
= subseg_new (".pdata", 0);
5193 ppc_set_current_section (pdata_section
);
5196 /* pseudo-op: .ydata
5197 behaviour: predefined read only data section
5201 initial: .section .ydata "drw3"
5202 a - don't know -- maybe a misprint
5203 d - initialized data
5205 3 - double word aligned (that would be 4 byte boundary)
5207 Tag tables (also known as the scope table) for exception handling,
5211 ppc_ydata (int ignore ATTRIBUTE_UNUSED
)
5213 if (ydata_section
== 0)
5215 ydata_section
= subseg_new (".ydata", 0);
5216 bfd_set_section_flags (stdoutput
, ydata_section
,
5217 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5218 | SEC_READONLY
| SEC_DATA
));
5220 bfd_set_section_alignment (stdoutput
, ydata_section
, 3);
5224 ydata_section
= subseg_new (".ydata", 0);
5226 ppc_set_current_section (ydata_section
);
5229 /* pseudo-op: .reldata
5230 behaviour: predefined read write data section
5231 double word aligned (4-byte)
5232 FIXME: relocation is applied to it
5233 FIXME: what's the difference between this and .data?
5236 initial: .section .reldata "drw3"
5237 d - initialized data
5240 3 - double word aligned (that would be 8 byte boundary)
5243 Like .data, but intended to hold data subject to relocation, such as
5244 function descriptors, etc. */
5247 ppc_reldata (int ignore ATTRIBUTE_UNUSED
)
5249 if (reldata_section
== 0)
5251 reldata_section
= subseg_new (".reldata", 0);
5253 bfd_set_section_flags (stdoutput
, reldata_section
,
5254 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5257 bfd_set_section_alignment (stdoutput
, reldata_section
, 2);
5261 reldata_section
= subseg_new (".reldata", 0);
5263 ppc_set_current_section (reldata_section
);
5266 /* pseudo-op: .rdata
5267 behaviour: predefined read only data section
5271 initial: .section .rdata "dr3"
5272 d - initialized data
5274 3 - double word aligned (that would be 4 byte boundary) */
5277 ppc_rdata (int ignore ATTRIBUTE_UNUSED
)
5279 if (rdata_section
== 0)
5281 rdata_section
= subseg_new (".rdata", 0);
5282 bfd_set_section_flags (stdoutput
, rdata_section
,
5283 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5284 | SEC_READONLY
| SEC_DATA
));
5286 bfd_set_section_alignment (stdoutput
, rdata_section
, 2);
5290 rdata_section
= subseg_new (".rdata", 0);
5292 ppc_set_current_section (rdata_section
);
5295 /* pseudo-op: .ualong
5296 behaviour: much like .int, with the exception that no alignment is
5298 FIXME: test the alignment statement
5303 ppc_ualong (int ignore ATTRIBUTE_UNUSED
)
5309 /* pseudo-op: .znop <symbol name>
5310 behaviour: Issue a nop instruction
5311 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5312 the supplied symbol name.
5314 warnings: Missing symbol name */
5317 ppc_znop (int ignore ATTRIBUTE_UNUSED
)
5320 const struct powerpc_opcode
*opcode
;
5327 /* Strip out the symbol name. */
5328 c
= get_symbol_name (&symbol_name
);
5330 name
= xstrdup (symbol_name
);
5332 sym
= symbol_find_or_make (name
);
5334 *input_line_pointer
= c
;
5336 SKIP_WHITESPACE_AFTER_NAME ();
5338 /* Look up the opcode in the hash table. */
5339 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, "nop");
5341 /* Stick in the nop. */
5342 insn
= opcode
->opcode
;
5344 /* Write out the instruction. */
5346 md_number_to_chars (f
, insn
, 4);
5348 f
- frag_now
->fr_literal
,
5353 BFD_RELOC_16_GOT_PCREL
);
5363 ppc_pe_comm (int lcomm
)
5372 c
= get_symbol_name (&name
);
5374 /* just after name is now '\0'. */
5375 p
= input_line_pointer
;
5377 SKIP_WHITESPACE_AFTER_NAME ();
5378 if (*input_line_pointer
!= ',')
5380 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5381 ignore_rest_of_line ();
5385 input_line_pointer
++; /* skip ',' */
5386 if ((temp
= get_absolute_expression ()) < 0)
5388 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
5389 ignore_rest_of_line ();
5395 /* The third argument to .comm is the alignment. */
5396 if (*input_line_pointer
!= ',')
5400 ++input_line_pointer
;
5401 align
= get_absolute_expression ();
5404 as_warn (_("ignoring bad alignment"));
5411 symbolP
= symbol_find_or_make (name
);
5414 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
5416 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5417 S_GET_NAME (symbolP
));
5418 ignore_rest_of_line ();
5422 if (S_GET_VALUE (symbolP
))
5424 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
5425 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5426 S_GET_NAME (symbolP
),
5427 (long) S_GET_VALUE (symbolP
),
5432 S_SET_VALUE (symbolP
, (valueT
) temp
);
5433 S_SET_EXTERNAL (symbolP
);
5434 S_SET_SEGMENT (symbolP
, bfd_com_section_ptr
);
5437 demand_empty_rest_of_line ();
5441 * implement the .section pseudo op:
5442 * .section name {, "flags"}
5444 * | +--- optional flags: 'b' for bss
5446 * +-- section name 'l' for lib
5450 * 'd' (apparently m88k for data)
5452 * But if the argument is not a quoted string, treat it as a
5453 * subsegment number.
5455 * FIXME: this is a copy of the section processing from obj-coff.c, with
5456 * additions/changes for the moto-pas assembler support. There are three
5459 * FIXME: I just noticed this. This doesn't work at all really. It it
5460 * setting bits that bfd probably neither understands or uses. The
5461 * correct approach (?) will have to incorporate extra fields attached
5462 * to the section to hold the system specific stuff. (krk)
5465 * 'a' - unknown - referred to in documentation, but no definition supplied
5466 * 'c' - section has code
5467 * 'd' - section has initialized data
5468 * 'u' - section has uninitialized data
5469 * 'i' - section contains directives (info)
5470 * 'n' - section can be discarded
5471 * 'R' - remove section at link time
5473 * Section Protection:
5474 * 'r' - section is readable
5475 * 'w' - section is writable
5476 * 'x' - section is executable
5477 * 's' - section is sharable
5479 * Section Alignment:
5480 * '0' - align to byte boundary
5481 * '1' - align to halfword boundary
5482 * '2' - align to word boundary
5483 * '3' - align to doubleword boundary
5484 * '4' - align to quadword boundary
5485 * '5' - align to 32 byte boundary
5486 * '6' - align to 64 byte boundary
5491 ppc_pe_section (int ignore ATTRIBUTE_UNUSED
)
5493 /* Strip out the section name. */
5502 c
= get_symbol_name (§ion_name
);
5504 name
= xstrdup (section_name
);
5506 *input_line_pointer
= c
;
5508 SKIP_WHITESPACE_AFTER_NAME ();
5511 flags
= SEC_NO_FLAGS
;
5513 if (strcmp (name
, ".idata$2") == 0)
5517 else if (strcmp (name
, ".idata$3") == 0)
5521 else if (strcmp (name
, ".idata$4") == 0)
5525 else if (strcmp (name
, ".idata$5") == 0)
5529 else if (strcmp (name
, ".idata$6") == 0)
5534 /* Default alignment to 16 byte boundary. */
5537 if (*input_line_pointer
== ',')
5539 ++input_line_pointer
;
5541 if (*input_line_pointer
!= '"')
5542 exp
= get_absolute_expression ();
5545 ++input_line_pointer
;
5546 while (*input_line_pointer
!= '"'
5547 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
5549 switch (*input_line_pointer
)
5551 /* Section Contents */
5552 case 'a': /* unknown */
5553 as_bad (_("unsupported section attribute -- 'a'"));
5555 case 'c': /* code section */
5558 case 'd': /* section has initialized data */
5561 case 'u': /* section has uninitialized data */
5562 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5566 case 'i': /* section contains directives (info) */
5567 /* FIXME: This is IMAGE_SCN_LNK_INFO
5569 flags
|= SEC_HAS_CONTENTS
;
5571 case 'n': /* section can be discarded */
5574 case 'R': /* Remove section at link time */
5575 flags
|= SEC_NEVER_LOAD
;
5577 #if IFLICT_BRAIN_DAMAGE
5578 /* Section Protection */
5579 case 'r': /* section is readable */
5580 flags
|= IMAGE_SCN_MEM_READ
;
5582 case 'w': /* section is writable */
5583 flags
|= IMAGE_SCN_MEM_WRITE
;
5585 case 'x': /* section is executable */
5586 flags
|= IMAGE_SCN_MEM_EXECUTE
;
5588 case 's': /* section is sharable */
5589 flags
|= IMAGE_SCN_MEM_SHARED
;
5592 /* Section Alignment */
5593 case '0': /* align to byte boundary */
5594 flags
|= IMAGE_SCN_ALIGN_1BYTES
;
5597 case '1': /* align to halfword boundary */
5598 flags
|= IMAGE_SCN_ALIGN_2BYTES
;
5601 case '2': /* align to word boundary */
5602 flags
|= IMAGE_SCN_ALIGN_4BYTES
;
5605 case '3': /* align to doubleword boundary */
5606 flags
|= IMAGE_SCN_ALIGN_8BYTES
;
5609 case '4': /* align to quadword boundary */
5610 flags
|= IMAGE_SCN_ALIGN_16BYTES
;
5613 case '5': /* align to 32 byte boundary */
5614 flags
|= IMAGE_SCN_ALIGN_32BYTES
;
5617 case '6': /* align to 64 byte boundary */
5618 flags
|= IMAGE_SCN_ALIGN_64BYTES
;
5623 as_bad (_("unknown section attribute '%c'"),
5624 *input_line_pointer
);
5627 ++input_line_pointer
;
5629 if (*input_line_pointer
== '"')
5630 ++input_line_pointer
;
5634 sec
= subseg_new (name
, (subsegT
) exp
);
5636 ppc_set_current_section (sec
);
5638 if (flags
!= SEC_NO_FLAGS
)
5640 if (! bfd_set_section_flags (stdoutput
, sec
, flags
))
5641 as_bad (_("error setting flags for \"%s\": %s"),
5642 bfd_section_name (stdoutput
, sec
),
5643 bfd_errmsg (bfd_get_error ()));
5646 bfd_set_section_alignment (stdoutput
, sec
, align
);
5650 ppc_pe_function (int ignore ATTRIBUTE_UNUSED
)
5656 endc
= get_symbol_name (&name
);
5658 ext_sym
= symbol_find_or_make (name
);
5660 (void) restore_line_pointer (endc
);
5662 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5663 SF_SET_FUNCTION (ext_sym
);
5664 SF_SET_PROCESS (ext_sym
);
5665 coff_add_linesym (ext_sym
);
5667 demand_empty_rest_of_line ();
5671 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED
)
5673 if (tocdata_section
== 0)
5675 tocdata_section
= subseg_new (".tocd", 0);
5676 /* FIXME: section flags won't work. */
5677 bfd_set_section_flags (stdoutput
, tocdata_section
,
5678 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5679 | SEC_READONLY
| SEC_DATA
));
5681 bfd_set_section_alignment (stdoutput
, tocdata_section
, 2);
5685 rdata_section
= subseg_new (".tocd", 0);
5688 ppc_set_current_section (tocdata_section
);
5690 demand_empty_rest_of_line ();
5693 /* Don't adjust TOC relocs to use the section symbol. */
5696 ppc_pe_fix_adjustable (fixS
*fix
)
5698 return fix
->fx_r_type
!= BFD_RELOC_PPC_TOC16
;
5705 /* XCOFF specific symbol and file handling. */
5707 /* Canonicalize the symbol name. We use the to force the suffix, if
5708 any, to use square brackets, and to be in upper case. */
5711 ppc_canonicalize_symbol_name (char *name
)
5715 if (ppc_stab_symbol
)
5718 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
5732 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
5735 if (*s
== '\0' || s
[1] != '\0')
5736 as_bad (_("bad symbol suffix"));
5744 /* Set the class of a symbol based on the suffix, if any. This is
5745 called whenever a new symbol is created. */
5748 ppc_symbol_new_hook (symbolS
*sym
)
5750 struct ppc_tc_sy
*tc
;
5753 tc
= symbol_get_tc (sym
);
5756 tc
->symbol_class
= -1;
5757 tc
->real_name
= NULL
;
5764 if (ppc_stab_symbol
)
5767 s
= strchr (S_GET_NAME (sym
), '[');
5768 if (s
== (const char *) NULL
)
5770 /* There is no suffix. */
5779 if (strcmp (s
, "BS]") == 0)
5780 tc
->symbol_class
= XMC_BS
;
5783 if (strcmp (s
, "DB]") == 0)
5784 tc
->symbol_class
= XMC_DB
;
5785 else if (strcmp (s
, "DS]") == 0)
5786 tc
->symbol_class
= XMC_DS
;
5789 if (strcmp (s
, "GL]") == 0)
5790 tc
->symbol_class
= XMC_GL
;
5793 if (strcmp (s
, "PR]") == 0)
5794 tc
->symbol_class
= XMC_PR
;
5797 if (strcmp (s
, "RO]") == 0)
5798 tc
->symbol_class
= XMC_RO
;
5799 else if (strcmp (s
, "RW]") == 0)
5800 tc
->symbol_class
= XMC_RW
;
5803 if (strcmp (s
, "SV]") == 0)
5804 tc
->symbol_class
= XMC_SV
;
5807 if (strcmp (s
, "TC]") == 0)
5808 tc
->symbol_class
= XMC_TC
;
5809 else if (strcmp (s
, "TI]") == 0)
5810 tc
->symbol_class
= XMC_TI
;
5811 else if (strcmp (s
, "TB]") == 0)
5812 tc
->symbol_class
= XMC_TB
;
5813 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
5814 tc
->symbol_class
= XMC_TC0
;
5817 if (strcmp (s
, "UA]") == 0)
5818 tc
->symbol_class
= XMC_UA
;
5819 else if (strcmp (s
, "UC]") == 0)
5820 tc
->symbol_class
= XMC_UC
;
5823 if (strcmp (s
, "XO]") == 0)
5824 tc
->symbol_class
= XMC_XO
;
5828 if (tc
->symbol_class
== -1)
5829 as_bad (_("unrecognized symbol suffix"));
5832 /* Set the class of a label based on where it is defined. This
5833 handles symbols without suffixes. Also, move the symbol so that it
5834 follows the csect symbol. */
5837 ppc_frob_label (symbolS
*sym
)
5839 if (ppc_current_csect
!= (symbolS
*) NULL
)
5841 if (symbol_get_tc (sym
)->symbol_class
== -1)
5842 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
5844 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5845 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
5846 &symbol_rootP
, &symbol_lastP
);
5847 symbol_get_tc (ppc_current_csect
)->within
= sym
;
5848 symbol_get_tc (sym
)->within
= ppc_current_csect
;
5852 dwarf2_emit_label (sym
);
5856 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5857 seen. It tells ppc_adjust_symtab whether it needs to look through
5860 static bfd_boolean ppc_saw_abs
;
5862 /* Change the name of a symbol just before writing it out. Set the
5863 real name if the .rename pseudo-op was used. Otherwise, remove any
5864 class suffix. Return 1 if the symbol should not be included in the
5868 ppc_frob_symbol (symbolS
*sym
)
5870 static symbolS
*ppc_last_function
;
5871 static symbolS
*set_end
;
5873 /* Discard symbols that should not be included in the output symbol
5875 if (! symbol_used_in_reloc_p (sym
)
5876 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
5877 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
5878 && ! symbol_get_tc (sym
)->output
5879 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
5882 /* This one will disappear anyway. Don't make a csect sym for it. */
5883 if (sym
== abs_section_sym
)
5886 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
5887 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
5893 name
= S_GET_NAME (sym
);
5894 s
= strchr (name
, '[');
5895 if (s
!= (char *) NULL
)
5901 snew
= xstrndup (name
, len
);
5903 S_SET_NAME (sym
, snew
);
5907 if (set_end
!= (symbolS
*) NULL
)
5909 SA_SET_SYM_ENDNDX (set_end
, sym
);
5913 if (SF_GET_FUNCTION (sym
))
5915 if (ppc_last_function
!= (symbolS
*) NULL
)
5916 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5917 ppc_last_function
= sym
;
5918 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
5920 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
5921 SA_SET_SYM_FSIZE (sym
,
5922 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
5925 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
5926 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
5928 if (ppc_last_function
== (symbolS
*) NULL
)
5929 as_bad (_(".ef with no preceding .function"));
5932 set_end
= ppc_last_function
;
5933 ppc_last_function
= NULL
;
5935 /* We don't have a C_EFCN symbol, but we need to force the
5936 COFF backend to believe that it has seen one. */
5937 coff_last_function
= NULL
;
5941 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
5942 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
5943 && S_GET_STORAGE_CLASS (sym
) != C_FILE
5944 && S_GET_STORAGE_CLASS (sym
) != C_FCN
5945 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
5946 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
5947 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
5948 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
5949 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
5950 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
5951 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
5953 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
5954 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
5955 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
5958 union internal_auxent
*a
;
5960 /* Create a csect aux. */
5961 i
= S_GET_NUMBER_AUXILIARY (sym
);
5962 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
5963 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
5964 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
5966 /* This is the TOC table. */
5967 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
5968 a
->x_csect
.x_scnlen
.l
= 0;
5969 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
5971 else if (symbol_get_tc (sym
)->subseg
!= 0)
5973 /* This is a csect symbol. x_scnlen is the size of the
5975 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
5976 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
5977 S_GET_SEGMENT (sym
))
5978 - S_GET_VALUE (sym
));
5981 resolve_symbol_value (symbol_get_tc (sym
)->next
);
5982 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
5983 - S_GET_VALUE (sym
));
5985 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
5987 else if (S_GET_SEGMENT (sym
) == bss_section
)
5989 /* This is a common symbol. */
5990 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
5991 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
5992 if (S_IS_EXTERNAL (sym
))
5993 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
5995 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
5997 else if (S_GET_SEGMENT (sym
) == absolute_section
)
5999 /* This is an absolute symbol. The csect will be created by
6000 ppc_adjust_symtab. */
6002 a
->x_csect
.x_smtyp
= XTY_LD
;
6003 if (symbol_get_tc (sym
)->symbol_class
== -1)
6004 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6006 else if (! S_IS_DEFINED (sym
))
6008 /* This is an external symbol. */
6009 a
->x_csect
.x_scnlen
.l
= 0;
6010 a
->x_csect
.x_smtyp
= XTY_ER
;
6012 else if (symbol_get_tc (sym
)->symbol_class
== XMC_TC
)
6016 /* This is a TOC definition. x_scnlen is the size of the
6018 next
= symbol_next (sym
);
6019 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6020 next
= symbol_next (next
);
6021 if (next
== (symbolS
*) NULL
6022 || symbol_get_tc (next
)->symbol_class
!= XMC_TC
)
6024 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6025 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6027 - S_GET_VALUE (sym
));
6029 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6030 - S_GET_VALUE (sym
));
6034 resolve_symbol_value (next
);
6035 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6036 - S_GET_VALUE (sym
));
6038 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6044 /* This is a normal symbol definition. x_scnlen is the
6045 symbol index of the containing csect. */
6046 if (S_GET_SEGMENT (sym
) == text_section
)
6047 csect
= ppc_text_csects
;
6048 else if (S_GET_SEGMENT (sym
) == data_section
)
6049 csect
= ppc_data_csects
;
6053 /* Skip the initial dummy symbol. */
6054 csect
= symbol_get_tc (csect
)->next
;
6056 if (csect
== (symbolS
*) NULL
)
6058 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6059 a
->x_csect
.x_scnlen
.l
= 0;
6063 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6065 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6066 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6067 > S_GET_VALUE (sym
))
6069 csect
= symbol_get_tc (csect
)->next
;
6072 a
->x_csect
.x_scnlen
.p
=
6073 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6074 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6077 a
->x_csect
.x_smtyp
= XTY_LD
;
6080 a
->x_csect
.x_parmhash
= 0;
6081 a
->x_csect
.x_snhash
= 0;
6082 if (symbol_get_tc (sym
)->symbol_class
== -1)
6083 a
->x_csect
.x_smclas
= XMC_PR
;
6085 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6086 a
->x_csect
.x_stab
= 0;
6087 a
->x_csect
.x_snstab
= 0;
6089 /* Don't let the COFF backend resort these symbols. */
6090 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6092 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6094 /* We want the value to be the symbol index of the referenced
6095 csect symbol. BFD will do that for us if we set the right
6097 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6098 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6100 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6101 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6103 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6108 block
= symbol_get_tc (sym
)->within
;
6111 /* The value is the offset from the enclosing csect. */
6114 csect
= symbol_get_tc (block
)->within
;
6115 resolve_symbol_value (csect
);
6116 base
= S_GET_VALUE (csect
);
6121 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6123 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6124 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6126 /* We want the value to be a file offset into the line numbers.
6127 BFD will do that for us if we set the right flags. We have
6128 already set the value correctly. */
6129 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6135 /* Adjust the symbol table. This creates csect symbols for all
6136 absolute symbols. */
6139 ppc_adjust_symtab (void)
6146 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6150 union internal_auxent
*a
;
6152 if (S_GET_SEGMENT (sym
) != absolute_section
)
6155 csect
= symbol_create (".abs[XO]", absolute_section
,
6156 S_GET_VALUE (sym
), &zero_address_frag
);
6157 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6158 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6159 i
= S_GET_NUMBER_AUXILIARY (csect
);
6160 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6161 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6162 a
->x_csect
.x_scnlen
.l
= 0;
6163 a
->x_csect
.x_smtyp
= XTY_SD
;
6164 a
->x_csect
.x_parmhash
= 0;
6165 a
->x_csect
.x_snhash
= 0;
6166 a
->x_csect
.x_smclas
= XMC_XO
;
6167 a
->x_csect
.x_stab
= 0;
6168 a
->x_csect
.x_snstab
= 0;
6170 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6172 i
= S_GET_NUMBER_AUXILIARY (sym
);
6173 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6174 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6175 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6178 ppc_saw_abs
= FALSE
;
6181 /* Set the VMA for a section. This is called on all the sections in
6185 ppc_frob_section (asection
*sec
)
6187 static bfd_vma vma
= 0;
6189 /* Dwarf sections start at 0. */
6190 if (bfd_get_section_flags (NULL
, sec
) & SEC_DEBUGGING
)
6193 vma
= md_section_align (sec
, vma
);
6194 bfd_set_section_vma (stdoutput
, sec
, vma
);
6195 vma
+= bfd_section_size (stdoutput
, sec
);
6198 #endif /* OBJ_XCOFF */
6201 md_atof (int type
, char *litp
, int *sizep
)
6203 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6206 /* Write a value out to the object file, using the appropriate
6210 md_number_to_chars (char *buf
, valueT val
, int n
)
6212 if (target_big_endian
)
6213 number_to_chars_bigendian (buf
, val
, n
);
6215 number_to_chars_littleendian (buf
, val
, n
);
6218 /* Align a section (I don't know why this is machine dependent). */
6221 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6226 int align
= bfd_get_section_alignment (stdoutput
, seg
);
6228 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6232 /* We don't have any form of relaxing. */
6235 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6236 asection
*seg ATTRIBUTE_UNUSED
)
6242 /* Convert a machine dependent frag. We never generate these. */
6245 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6246 asection
*sec ATTRIBUTE_UNUSED
,
6247 fragS
*fragp ATTRIBUTE_UNUSED
)
6252 /* We have no need to default values of symbols. */
6255 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6260 /* Functions concerning relocs. */
6262 /* The location from which a PC relative jump should be calculated,
6263 given a PC relative reloc. */
6266 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6268 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6273 /* This is called to see whether a fixup should be adjusted to use a
6274 section symbol. We take the opportunity to change a fixup against
6275 a symbol in the TOC subsegment into a reloc against the
6276 corresponding .tc symbol. */
6279 ppc_fix_adjustable (fixS
*fix
)
6281 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6282 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6283 TC_SYMFIELD_TYPE
*tc
;
6285 if (symseg
== absolute_section
)
6288 /* Always adjust symbols in debugging sections. */
6289 if (bfd_get_section_flags (stdoutput
, symseg
) & SEC_DEBUGGING
)
6292 if (ppc_toc_csect
!= (symbolS
*) NULL
6293 && fix
->fx_addsy
!= ppc_toc_csect
6294 && symseg
== data_section
6295 && val
>= ppc_toc_frag
->fr_address
6296 && (ppc_after_toc_frag
== (fragS
*) NULL
6297 || val
< ppc_after_toc_frag
->fr_address
))
6301 for (sy
= symbol_next (ppc_toc_csect
);
6302 sy
!= (symbolS
*) NULL
;
6303 sy
= symbol_next (sy
))
6305 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6307 if (sy_tc
->symbol_class
== XMC_TC0
)
6309 if (sy_tc
->symbol_class
!= XMC_TC
)
6311 if (val
== resolve_symbol_value (sy
))
6314 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6319 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6320 _("symbol in .toc does not match any .tc"));
6323 /* Possibly adjust the reloc to be against the csect. */
6324 tc
= symbol_get_tc (fix
->fx_addsy
);
6326 && tc
->symbol_class
!= XMC_TC0
6327 && tc
->symbol_class
!= XMC_TC
6328 && symseg
!= bss_section
6329 /* Don't adjust if this is a reloc in the toc section. */
6330 && (symseg
!= data_section
6331 || ppc_toc_csect
== NULL
6332 || val
< ppc_toc_frag
->fr_address
6333 || (ppc_after_toc_frag
!= NULL
6334 && val
>= ppc_after_toc_frag
->fr_address
)))
6336 symbolS
*csect
= tc
->within
;
6338 /* If the symbol was not declared by a label (eg: a section symbol),
6339 use the section instead of the csect. This doesn't happen in
6340 normal AIX assembly code. */
6342 csect
= seg_info (symseg
)->sym
;
6344 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6345 fix
->fx_addsy
= csect
;
6350 /* Adjust a reloc against a .lcomm symbol to be against the base
6352 if (symseg
== bss_section
6353 && ! S_IS_EXTERNAL (fix
->fx_addsy
))
6355 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6357 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6364 /* A reloc from one csect to another must be kept. The assembler
6365 will, of course, keep relocs between sections, and it will keep
6366 absolute relocs, but we need to force it to keep PC relative relocs
6367 between two csects in the same section. */
6370 ppc_force_relocation (fixS
*fix
)
6372 /* At this point fix->fx_addsy should already have been converted to
6373 a csect symbol. If the csect does not include the fragment, then
6374 we need to force the relocation. */
6376 && fix
->fx_addsy
!= NULL
6377 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6378 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6379 > fix
->fx_frag
->fr_address
)
6380 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6381 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6382 <= fix
->fx_frag
->fr_address
))))
6385 return generic_force_reloc (fix
);
6389 ppc_new_dot_label (symbolS
*sym
)
6391 /* Anchor this label to the current csect for relocations. */
6392 symbol_get_tc (sym
)->within
= ppc_current_csect
;
6395 #endif /* OBJ_XCOFF */
6398 /* If this function returns non-zero, it guarantees that a relocation
6399 will be emitted for a fixup. */
6402 ppc_force_relocation (fixS
*fix
)
6404 /* Branch prediction relocations must force a relocation, as must
6405 the vtable description relocs. */
6406 switch (fix
->fx_r_type
)
6408 case BFD_RELOC_PPC_B16_BRTAKEN
:
6409 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6410 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6411 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6412 case BFD_RELOC_24_PLT_PCREL
:
6413 case BFD_RELOC_PPC64_TOC
:
6415 case BFD_RELOC_PPC_B26
:
6416 case BFD_RELOC_PPC_BA26
:
6417 case BFD_RELOC_PPC_B16
:
6418 case BFD_RELOC_PPC_BA16
:
6419 /* All branch fixups targeting a localentry symbol must
6420 force a relocation. */
6423 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6424 elf_symbol_type
*elfsym
6425 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6426 gas_assert (elfsym
);
6427 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6435 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6436 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
)
6439 return generic_force_reloc (fix
);
6443 ppc_fix_adjustable (fixS
*fix
)
6445 switch (fix
->fx_r_type
)
6447 /* All branch fixups targeting a localentry symbol must
6448 continue using the symbol. */
6449 case BFD_RELOC_PPC_B26
:
6450 case BFD_RELOC_PPC_BA26
:
6451 case BFD_RELOC_PPC_B16
:
6452 case BFD_RELOC_PPC_BA16
:
6453 case BFD_RELOC_PPC_B16_BRTAKEN
:
6454 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6455 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6456 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6459 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6460 elf_symbol_type
*elfsym
6461 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6462 gas_assert (elfsym
);
6463 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6471 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
6472 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
6473 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
6474 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
6475 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
6476 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
6477 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
6478 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
6479 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
6480 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6481 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
));
6486 ppc_frag_check (struct frag
*fragP
)
6488 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
6489 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6490 _("instruction address is not a multiple of %d"),
6491 fragP
->insn_addr
+ 1);
6494 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6495 rs_align_code frag. */
6498 ppc_handle_align (struct frag
*fragP
)
6500 valueT count
= (fragP
->fr_next
->fr_address
6501 - (fragP
->fr_address
+ fragP
->fr_fix
));
6503 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && count
!= 0 && (count
& 1) == 0)
6505 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6508 md_number_to_chars (dest
, 0x4400, 2);
6510 else if (count
!= 0 && (count
& 3) == 0)
6512 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
6516 if (count
> 4 * nop_limit
&& count
< 0x2000000)
6520 /* Make a branch, then follow with nops. Insert another
6521 frag to handle the nops. */
6522 md_number_to_chars (dest
, 0x48000000 + count
, 4);
6527 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6528 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
6529 fragP
->fr_next
= rest
;
6531 rest
->fr_address
+= rest
->fr_fix
+ 4;
6533 /* If we leave the next frag as rs_align_code we'll come here
6534 again, resulting in a bunch of branches rather than a
6535 branch followed by nops. */
6536 rest
->fr_type
= rs_align
;
6537 dest
= rest
->fr_literal
;
6540 md_number_to_chars (dest
, 0x60000000, 4);
6542 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0
6543 && (ppc_cpu
& PPC_OPCODE_POWER9
) == 0)
6545 /* For power6, power7, and power8, we want the last nop to
6546 be a group terminating one. Do this by inserting an
6547 rs_fill frag immediately after this one, with its address
6548 set to the last nop location. This will automatically
6549 reduce the number of nops in the current frag by one. */
6552 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
6554 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
6555 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
6556 group_nop
->fr_fix
= 0;
6557 group_nop
->fr_offset
= 1;
6558 group_nop
->fr_type
= rs_fill
;
6559 fragP
->fr_next
= group_nop
;
6560 dest
= group_nop
->fr_literal
;
6563 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
6565 if (ppc_cpu
& PPC_OPCODE_E500MC
)
6566 /* e500mc group terminating nop: "ori 0,0,0". */
6567 md_number_to_chars (dest
, 0x60000000, 4);
6569 /* power7/power8 group terminating nop: "ori 2,2,0". */
6570 md_number_to_chars (dest
, 0x60420000, 4);
6573 /* power6 group terminating nop: "ori 1,1,0". */
6574 md_number_to_chars (dest
, 0x60210000, 4);
6579 /* Apply a fixup to the object code. This is called for all the
6580 fixups we generated by the calls to fix_new_exp, above. */
6583 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
6585 valueT value
= * valP
;
6587 const struct powerpc_operand
*operand
;
6590 if (fixP
->fx_addsy
!= NULL
)
6592 /* Hack around bfd_install_relocation brain damage. */
6594 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
6596 if (fixP
->fx_addsy
== abs_section_sym
)
6602 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6603 the symbol values. If we are doing this relocation the code in
6604 write.c is going to call bfd_install_relocation, which is also
6605 going to use the symbol value. That means that if the reloc is
6606 fully resolved we want to use *valP since bfd_install_relocation is
6608 However, if the reloc is not fully resolved we do not want to
6609 use *valP, and must use fx_offset instead. If the relocation
6610 is PC-relative, we then need to re-apply md_pcrel_from_section
6611 to this new relocation value. */
6612 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
6617 value
= fixP
->fx_offset
;
6619 value
-= md_pcrel_from_section (fixP
, seg
);
6623 /* We are only able to convert some relocs to pc-relative. */
6626 switch (fixP
->fx_r_type
)
6628 case BFD_RELOC_LO16
:
6629 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
6632 case BFD_RELOC_HI16
:
6633 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
6636 case BFD_RELOC_HI16_S
:
6637 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
6641 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
6645 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
6649 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
6652 case BFD_RELOC_PPC_16DX_HA
:
6653 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6660 else if (!fixP
->fx_done
6661 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
6663 /* addpcis is relative to next insn address. */
6665 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
6670 if (fixP
->fx_pcrel_adjust
!= 0)
6672 /* This is a fixup on an instruction. */
6673 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
6675 operand
= &powerpc_operands
[opindex
];
6677 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6678 does not generate a reloc. It uses the offset of `sym' within its
6679 csect. Other usages, such as `.long sym', generate relocs. This
6680 is the documented behaviour of non-TOC symbols. */
6681 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
6682 && (operand
->bitm
& 0xfff0) == 0xfff0
6683 && operand
->shift
== 0
6684 && (operand
->insert
== NULL
|| ppc_obj64
)
6685 && fixP
->fx_addsy
!= NULL
6686 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
6687 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
6688 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC0
6689 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
6691 value
= fixP
->fx_offset
;
6695 /* During parsing of instructions, a TOC16 reloc is generated for
6696 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6697 in the toc. But at parse time, SYM may be not yet defined, so
6698 check again here. */
6699 if (fixP
->fx_r_type
== BFD_RELOC_16
6700 && fixP
->fx_addsy
!= NULL
6701 && ppc_is_toc_sym (fixP
->fx_addsy
))
6702 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
6706 /* Calculate value to be stored in field. */
6708 switch (fixP
->fx_r_type
)
6711 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
6712 case BFD_RELOC_PPC_VLE_LO16A
:
6713 case BFD_RELOC_PPC_VLE_LO16D
:
6715 case BFD_RELOC_LO16
:
6716 case BFD_RELOC_LO16_PCREL
:
6717 fieldval
= value
& 0xffff;
6719 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6720 fieldval
= SEX16 (fieldval
);
6721 fixP
->fx_no_overflow
= 1;
6724 case BFD_RELOC_HI16
:
6725 case BFD_RELOC_HI16_PCREL
:
6727 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6729 fieldval
= value
>> 16;
6730 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6732 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6733 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
6739 case BFD_RELOC_PPC_VLE_HI16A
:
6740 case BFD_RELOC_PPC_VLE_HI16D
:
6741 case BFD_RELOC_PPC64_ADDR16_HIGH
:
6743 fieldval
= PPC_HI (value
);
6744 goto sign_extend_16
;
6746 case BFD_RELOC_HI16_S
:
6747 case BFD_RELOC_HI16_S_PCREL
:
6748 case BFD_RELOC_PPC_16DX_HA
:
6749 case BFD_RELOC_PPC_REL16DX_HA
:
6751 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
6753 fieldval
= (value
+ 0x8000) >> 16;
6754 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
6756 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
6757 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
6763 case BFD_RELOC_PPC_VLE_HA16A
:
6764 case BFD_RELOC_PPC_VLE_HA16D
:
6765 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
6767 fieldval
= PPC_HA (value
);
6768 goto sign_extend_16
;
6771 case BFD_RELOC_PPC64_HIGHER
:
6772 fieldval
= PPC_HIGHER (value
);
6773 goto sign_extend_16
;
6775 case BFD_RELOC_PPC64_HIGHER_S
:
6776 fieldval
= PPC_HIGHERA (value
);
6777 goto sign_extend_16
;
6779 case BFD_RELOC_PPC64_HIGHEST
:
6780 fieldval
= PPC_HIGHEST (value
);
6781 goto sign_extend_16
;
6783 case BFD_RELOC_PPC64_HIGHEST_S
:
6784 fieldval
= PPC_HIGHESTA (value
);
6785 goto sign_extend_16
;
6792 if (operand
!= NULL
)
6794 /* Handle relocs in an insn. */
6795 switch (fixP
->fx_r_type
)
6798 /* The following relocs can't be calculated by the assembler.
6799 Leave the field zero. */
6800 case BFD_RELOC_PPC_TPREL16
:
6801 case BFD_RELOC_PPC_TPREL16_LO
:
6802 case BFD_RELOC_PPC_TPREL16_HI
:
6803 case BFD_RELOC_PPC_TPREL16_HA
:
6804 case BFD_RELOC_PPC_DTPREL16
:
6805 case BFD_RELOC_PPC_DTPREL16_LO
:
6806 case BFD_RELOC_PPC_DTPREL16_HI
:
6807 case BFD_RELOC_PPC_DTPREL16_HA
:
6808 case BFD_RELOC_PPC_GOT_TLSGD16
:
6809 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
6810 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
6811 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
6812 case BFD_RELOC_PPC_GOT_TLSLD16
:
6813 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
6814 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
6815 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
6816 case BFD_RELOC_PPC_GOT_TPREL16
:
6817 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
6818 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
6819 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
6820 case BFD_RELOC_PPC_GOT_DTPREL16
:
6821 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
6822 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
6823 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
6824 case BFD_RELOC_PPC64_TPREL16_DS
:
6825 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
6826 case BFD_RELOC_PPC64_TPREL16_HIGH
:
6827 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
6828 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
6829 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
6830 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
6831 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
6832 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
6833 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
6834 case BFD_RELOC_PPC64_DTPREL16_DS
:
6835 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
6836 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
6837 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
6838 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
6839 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
6840 gas_assert (fixP
->fx_addsy
!= NULL
);
6841 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
6845 /* These also should leave the field zero for the same
6846 reason. Note that older versions of gas wrote values
6847 here. If we want to go back to the old behaviour, then
6848 all _LO and _LO_DS cases will need to be treated like
6849 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6850 case BFD_RELOC_16_GOTOFF
:
6851 case BFD_RELOC_LO16_GOTOFF
:
6852 case BFD_RELOC_HI16_GOTOFF
:
6853 case BFD_RELOC_HI16_S_GOTOFF
:
6854 case BFD_RELOC_LO16_PLTOFF
:
6855 case BFD_RELOC_HI16_PLTOFF
:
6856 case BFD_RELOC_HI16_S_PLTOFF
:
6857 case BFD_RELOC_GPREL16
:
6858 case BFD_RELOC_16_BASEREL
:
6859 case BFD_RELOC_LO16_BASEREL
:
6860 case BFD_RELOC_HI16_BASEREL
:
6861 case BFD_RELOC_HI16_S_BASEREL
:
6862 case BFD_RELOC_PPC_TOC16
:
6863 case BFD_RELOC_PPC64_TOC16_LO
:
6864 case BFD_RELOC_PPC64_TOC16_HI
:
6865 case BFD_RELOC_PPC64_TOC16_HA
:
6866 case BFD_RELOC_PPC64_PLTGOT16
:
6867 case BFD_RELOC_PPC64_PLTGOT16_LO
:
6868 case BFD_RELOC_PPC64_PLTGOT16_HI
:
6869 case BFD_RELOC_PPC64_PLTGOT16_HA
:
6870 case BFD_RELOC_PPC64_GOT16_DS
:
6871 case BFD_RELOC_PPC64_GOT16_LO_DS
:
6872 case BFD_RELOC_PPC64_PLT16_LO_DS
:
6873 case BFD_RELOC_PPC64_SECTOFF_DS
:
6874 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
6875 case BFD_RELOC_PPC64_TOC16_DS
:
6876 case BFD_RELOC_PPC64_TOC16_LO_DS
:
6877 case BFD_RELOC_PPC64_PLTGOT16_DS
:
6878 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
6879 case BFD_RELOC_PPC_EMB_NADDR16
:
6880 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
6881 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
6882 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
6883 case BFD_RELOC_PPC_EMB_SDAI16
:
6884 case BFD_RELOC_PPC_EMB_SDA2I16
:
6885 case BFD_RELOC_PPC_EMB_SDA2REL
:
6886 case BFD_RELOC_PPC_EMB_SDA21
:
6887 case BFD_RELOC_PPC_EMB_MRKREF
:
6888 case BFD_RELOC_PPC_EMB_RELSEC16
:
6889 case BFD_RELOC_PPC_EMB_RELST_LO
:
6890 case BFD_RELOC_PPC_EMB_RELST_HI
:
6891 case BFD_RELOC_PPC_EMB_RELST_HA
:
6892 case BFD_RELOC_PPC_EMB_BIT_FLD
:
6893 case BFD_RELOC_PPC_EMB_RELSDA
:
6894 case BFD_RELOC_PPC_VLE_SDA21
:
6895 case BFD_RELOC_PPC_VLE_SDA21_LO
:
6896 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
6897 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
6898 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
6899 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
6900 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
6901 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
6902 gas_assert (fixP
->fx_addsy
!= NULL
);
6905 case BFD_RELOC_PPC_TLS
:
6906 case BFD_RELOC_PPC_TLSGD
:
6907 case BFD_RELOC_PPC_TLSLD
:
6913 case BFD_RELOC_PPC_B16
:
6914 /* Adjust the offset to the instruction boundary. */
6919 case BFD_RELOC_VTABLE_INHERIT
:
6920 case BFD_RELOC_VTABLE_ENTRY
:
6921 case BFD_RELOC_PPC_DTPMOD
:
6922 case BFD_RELOC_PPC_TPREL
:
6923 case BFD_RELOC_PPC_DTPREL
:
6924 case BFD_RELOC_PPC_COPY
:
6925 case BFD_RELOC_PPC_GLOB_DAT
:
6926 case BFD_RELOC_32_PLT_PCREL
:
6927 case BFD_RELOC_PPC_EMB_NADDR32
:
6928 case BFD_RELOC_PPC64_TOC
:
6929 case BFD_RELOC_CTOR
:
6931 case BFD_RELOC_32_PCREL
:
6934 case BFD_RELOC_64_PCREL
:
6935 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
6936 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
6937 _("%s unsupported as instruction fixup"),
6938 bfd_get_reloc_code_name (fixP
->fx_r_type
));
6947 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6948 contents can stay at zero. */
6949 #define APPLY_RELOC fixP->fx_done
6951 #define APPLY_RELOC 1
6953 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
6956 unsigned char *where
;
6958 /* Fetch the instruction, insert the fully resolved operand
6959 value, and stuff the instruction back again. */
6960 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
6961 if (target_big_endian
)
6963 if (fixP
->fx_size
== 4)
6964 insn
= bfd_getb32 (where
);
6966 insn
= bfd_getb16 (where
);
6970 if (fixP
->fx_size
== 4)
6971 insn
= bfd_getl32 (where
);
6973 insn
= bfd_getl16 (where
);
6975 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
6976 fixP
->tc_fix_data
.ppc_cpu
,
6977 fixP
->fx_file
, fixP
->fx_line
);
6978 if (target_big_endian
)
6980 if (fixP
->fx_size
== 4)
6981 bfd_putb32 (insn
, where
);
6983 bfd_putb16 (insn
, where
);
6987 if (fixP
->fx_size
== 4)
6988 bfd_putl32 (insn
, where
);
6990 bfd_putl16 (insn
, where
);
6995 /* Nothing else to do here. */
6998 gas_assert (fixP
->fx_addsy
!= NULL
);
6999 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7004 /* Use expr_symbol_where to see if this is an expression
7006 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7007 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7008 _("unresolved expression that must be resolved"));
7010 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7011 _("unsupported relocation against %s"),
7012 S_GET_NAME (fixP
->fx_addsy
));
7019 /* Handle relocs in data. */
7020 switch (fixP
->fx_r_type
)
7022 case BFD_RELOC_VTABLE_INHERIT
:
7024 && !S_IS_DEFINED (fixP
->fx_addsy
)
7025 && !S_IS_WEAK (fixP
->fx_addsy
))
7026 S_SET_WEAK (fixP
->fx_addsy
);
7029 case BFD_RELOC_VTABLE_ENTRY
:
7034 /* These can appear with @l etc. in data. */
7035 case BFD_RELOC_LO16
:
7036 case BFD_RELOC_LO16_PCREL
:
7037 case BFD_RELOC_HI16
:
7038 case BFD_RELOC_HI16_PCREL
:
7039 case BFD_RELOC_HI16_S
:
7040 case BFD_RELOC_HI16_S_PCREL
:
7041 case BFD_RELOC_PPC64_HIGHER
:
7042 case BFD_RELOC_PPC64_HIGHER_S
:
7043 case BFD_RELOC_PPC64_HIGHEST
:
7044 case BFD_RELOC_PPC64_HIGHEST_S
:
7045 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7046 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7047 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7050 case BFD_RELOC_PPC_DTPMOD
:
7051 case BFD_RELOC_PPC_TPREL
:
7052 case BFD_RELOC_PPC_DTPREL
:
7053 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7056 /* Just punt all of these to the linker. */
7057 case BFD_RELOC_PPC_B16_BRTAKEN
:
7058 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7059 case BFD_RELOC_16_GOTOFF
:
7060 case BFD_RELOC_LO16_GOTOFF
:
7061 case BFD_RELOC_HI16_GOTOFF
:
7062 case BFD_RELOC_HI16_S_GOTOFF
:
7063 case BFD_RELOC_LO16_PLTOFF
:
7064 case BFD_RELOC_HI16_PLTOFF
:
7065 case BFD_RELOC_HI16_S_PLTOFF
:
7066 case BFD_RELOC_PPC_COPY
:
7067 case BFD_RELOC_PPC_GLOB_DAT
:
7068 case BFD_RELOC_16_BASEREL
:
7069 case BFD_RELOC_LO16_BASEREL
:
7070 case BFD_RELOC_HI16_BASEREL
:
7071 case BFD_RELOC_HI16_S_BASEREL
:
7072 case BFD_RELOC_PPC_TLS
:
7073 case BFD_RELOC_PPC_DTPREL16_LO
:
7074 case BFD_RELOC_PPC_DTPREL16_HI
:
7075 case BFD_RELOC_PPC_DTPREL16_HA
:
7076 case BFD_RELOC_PPC_TPREL16_LO
:
7077 case BFD_RELOC_PPC_TPREL16_HI
:
7078 case BFD_RELOC_PPC_TPREL16_HA
:
7079 case BFD_RELOC_PPC_GOT_TLSGD16
:
7080 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7081 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7082 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7083 case BFD_RELOC_PPC_GOT_TLSLD16
:
7084 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7085 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7086 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7087 case BFD_RELOC_PPC_GOT_DTPREL16
:
7088 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7089 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7090 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7091 case BFD_RELOC_PPC_GOT_TPREL16
:
7092 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7093 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7094 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7095 case BFD_RELOC_24_PLT_PCREL
:
7096 case BFD_RELOC_PPC_LOCAL24PC
:
7097 case BFD_RELOC_32_PLT_PCREL
:
7098 case BFD_RELOC_GPREL16
:
7099 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7100 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7101 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7102 case BFD_RELOC_PPC_EMB_NADDR32
:
7103 case BFD_RELOC_PPC_EMB_NADDR16
:
7104 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7105 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7106 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7107 case BFD_RELOC_PPC_EMB_SDAI16
:
7108 case BFD_RELOC_PPC_EMB_SDA2REL
:
7109 case BFD_RELOC_PPC_EMB_SDA2I16
:
7110 case BFD_RELOC_PPC_EMB_SDA21
:
7111 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7112 case BFD_RELOC_PPC_EMB_MRKREF
:
7113 case BFD_RELOC_PPC_EMB_RELSEC16
:
7114 case BFD_RELOC_PPC_EMB_RELST_LO
:
7115 case BFD_RELOC_PPC_EMB_RELST_HI
:
7116 case BFD_RELOC_PPC_EMB_RELST_HA
:
7117 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7118 case BFD_RELOC_PPC_EMB_RELSDA
:
7119 case BFD_RELOC_PPC64_TOC
:
7120 case BFD_RELOC_PPC_TOC16
:
7121 case BFD_RELOC_PPC64_TOC16_LO
:
7122 case BFD_RELOC_PPC64_TOC16_HI
:
7123 case BFD_RELOC_PPC64_TOC16_HA
:
7124 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7125 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7126 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7127 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7128 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7129 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7130 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7131 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7132 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7133 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7134 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7135 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7141 case BFD_RELOC_NONE
:
7143 case BFD_RELOC_CTOR
:
7145 case BFD_RELOC_32_PCREL
:
7148 case BFD_RELOC_64_PCREL
:
7150 case BFD_RELOC_16_PCREL
:
7156 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7161 if (fixP
->fx_size
&& APPLY_RELOC
)
7162 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7163 fieldval
, fixP
->fx_size
);
7165 && (seg
->flags
& SEC_CODE
) != 0
7166 && fixP
->fx_size
== 4
7169 && (fixP
->fx_r_type
== BFD_RELOC_32
7170 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7171 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7172 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7173 _("data in executable section"));
7177 ppc_elf_validate_fix (fixP
, seg
);
7178 fixP
->fx_addnumber
= value
;
7180 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7181 from the section contents. If we are going to be emitting a reloc
7182 then the section contents are immaterial, so don't warn if they
7183 happen to overflow. Leave such warnings to ld. */
7186 fixP
->fx_no_overflow
= 1;
7188 /* Arrange to emit .TOC. as a normal symbol if used in anything
7189 but .TOC.@tocbase. */
7191 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7192 && fixP
->fx_addsy
!= NULL
7193 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7194 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7197 if (fixP
->fx_r_type
!= BFD_RELOC_PPC_TOC16
)
7198 fixP
->fx_addnumber
= 0;
7202 fixP
->fx_addnumber
= 0;
7204 /* We want to use the offset within the toc, not the actual VMA
7206 fixP
->fx_addnumber
=
7207 - bfd_get_section_vma (stdoutput
, S_GET_SEGMENT (fixP
->fx_addsy
))
7208 - S_GET_VALUE (ppc_toc_csect
);
7209 /* Set *valP to avoid errors. */
7216 /* Generate a reloc for a fixup. */
7219 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7223 reloc
= XNEW (arelent
);
7225 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7226 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7227 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7228 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7229 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7231 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7232 _("reloc %d not supported by object file format"),
7233 (int) fixp
->fx_r_type
);
7236 reloc
->addend
= fixp
->fx_addnumber
;
7242 ppc_cfi_frame_initial_instructions (void)
7244 cfi_add_CFA_def_cfa (1, 0);
7248 tc_ppc_regname_to_dw2regnum (char *regname
)
7250 unsigned int regnum
= -1;
7254 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7256 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7257 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7258 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7259 { "spe_acc", 111 }, { "spefscr", 112 }
7262 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7263 if (strcmp (regnames
[i
].name
, regname
) == 0)
7264 return regnames
[i
].dw2regnum
;
7266 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7268 p
= regname
+ 1 + (regname
[1] == '.');
7269 regnum
= strtoul (p
, &q
, 10);
7270 if (p
== q
|| *q
|| regnum
>= 32)
7272 if (regname
[0] == 'f')
7274 else if (regname
[0] == 'v')
7277 else if (regname
[0] == 'c' && regname
[1] == 'r')
7279 p
= regname
+ 2 + (regname
[2] == '.');
7280 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7282 regnum
= p
[0] - '0' + 68;