1 /* tc-sh.c -- Assemble code for the Hitachi Super-H
2 Copyright (C) 1993, 94, 95, 96, 97, 98, 99, 2000 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 Written By Steve Chamberlain
31 #include "opcodes/sh-opc.h"
38 const char comment_chars
[] = "!";
39 const char line_separator_chars
[] = ";";
40 const char line_comment_chars
[] = "!#";
42 static void s_uses
PARAMS ((int));
44 static void sh_count_relocs
PARAMS ((bfd
*, segT
, PTR
));
45 static void sh_frob_section
PARAMS ((bfd
*, segT
, PTR
));
48 void s_align_bytes ();
49 static void s_uacons
PARAMS ((int));
50 static sh_opcode_info
*find_cooked_opcode
PARAMS ((char **));
51 static void assemble_ppi
PARAMS ((char *, sh_opcode_info
*));
60 target_big_endian
= 0;
63 /* This table describes all the machine specific pseudo-ops the assembler
64 has to support. The fields are:
65 pseudo-op name without dot
66 function to call to execute this pseudo-op
67 Integer arg to pass to the function
70 const pseudo_typeS md_pseudo_table
[] =
74 {"form", listing_psize
, 0},
75 {"little", little
, 0},
76 {"heading", listing_title
, 0},
77 {"import", s_ignore
, 0},
78 {"page", listing_eject
, 0},
79 {"program", s_ignore
, 0},
81 {"uaword", s_uacons
, 2},
82 {"ualong", s_uacons
, 4},
86 /*int md_reloc_size; */
88 int sh_relax
; /* set if -relax seen */
90 /* Whether -small was seen. */
94 /* Whether -dsp was seen. */
98 /* The bit mask of architectures that could
99 accomodate the insns seen so far. */
100 static int valid_arch
;
102 const char EXP_CHARS
[] = "eE";
104 /* Chars that mean this number is a floating point constant */
107 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
109 #define C(a,b) ENCODE_RELAX(a,b)
111 #define JREG 14 /* Register used as a temp when relaxing */
112 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
113 #define GET_WHAT(x) ((x>>4))
115 /* These are the three types of relaxable instrction */
117 #define COND_JUMP_DELAY 2
118 #define UNCOND_JUMP 3
127 #define UNDEF_WORD_DISP 4
132 /* Branch displacements are from the address of the branch plus
133 four, thus all minimum and maximum values have 4 added to them. */
136 #define COND8_LENGTH 2
138 /* There is one extra instruction before the branch, so we must add
139 two more bytes to account for it. */
140 #define COND12_F 4100
141 #define COND12_M -4090
142 #define COND12_LENGTH 6
144 #define COND12_DELAY_LENGTH 4
146 /* ??? The minimum and maximum values are wrong, but this does not matter
147 since this relocation type is not supported yet. */
148 #define COND32_F (1<<30)
149 #define COND32_M -(1<<30)
150 #define COND32_LENGTH 14
152 #define UNCOND12_F 4098
153 #define UNCOND12_M -4092
154 #define UNCOND12_LENGTH 2
156 /* ??? The minimum and maximum values are wrong, but this does not matter
157 since this relocation type is not supported yet. */
158 #define UNCOND32_F (1<<30)
159 #define UNCOND32_M -(1<<30)
160 #define UNCOND32_LENGTH 14
162 const relax_typeS md_relax_table
[C (END
, 0)] = {
163 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
164 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
167 /* C (COND_JUMP, COND8) */
168 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
169 /* C (COND_JUMP, COND12) */
170 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
171 /* C (COND_JUMP, COND32) */
172 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
173 { 0 }, { 0 }, { 0 }, { 0 },
174 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
177 /* C (COND_JUMP_DELAY, COND8) */
178 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
179 /* C (COND_JUMP_DELAY, COND12) */
180 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
181 /* C (COND_JUMP_DELAY, COND32) */
182 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
183 { 0 }, { 0 }, { 0 }, { 0 },
184 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
187 /* C (UNCOND_JUMP, UNCOND12) */
188 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
189 /* C (UNCOND_JUMP, UNCOND32) */
190 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
191 { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
192 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
195 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
198 This function is called once, at assembler startup time. This should
199 set up all the tables, etc that the MD part of the assembler needs
205 sh_opcode_info
*opcode
;
206 char *prev_name
= "";
210 /* The WinCE OS only supports little endian executables. */
211 target_big_endian
= 0;
214 target_big_endian
= 1;
217 target_arch
= arch_sh1_up
& ~(sh_dsp
? arch_sh3e_up
: arch_sh_dsp_up
);
218 valid_arch
= target_arch
;
220 opcode_hash_control
= hash_new ();
222 /* Insert unique names into hash table */
223 for (opcode
= sh_table
; opcode
->name
; opcode
++)
225 if (strcmp (prev_name
, opcode
->name
))
227 if (! (opcode
->arch
& target_arch
))
229 prev_name
= opcode
->name
;
230 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
234 /* Make all the opcodes with the same name point to the same
236 opcode
->name
= prev_name
;
243 static int reg_x
, reg_y
;
251 expressionS immediate
;
255 #define IDENT_CHAR(c) (isalnum (c) || (c) == '_')
257 /* try and parse a reg name, returns number of chars consumed */
259 parse_reg (src
, mode
, reg
)
264 /* We use ! IDENT_CHAR for the next character after the register name, to
265 make sure that we won't accidentally recognize a symbol name such as
266 'sram' or sr_ram as being a reference to the register 'sr'. */
272 if (src
[2] >= '0' && src
[2] <= '5'
273 && ! IDENT_CHAR ((unsigned char) src
[3]))
276 *reg
= 10 + src
[2] - '0';
280 if (src
[1] >= '0' && src
[1] <= '9'
281 && ! IDENT_CHAR ((unsigned char) src
[2]))
284 *reg
= (src
[1] - '0');
287 if (src
[1] >= '0' && src
[1] <= '7' && strncmp (&src
[2], "_bank", 5) == 0
288 && ! IDENT_CHAR ((unsigned char) src
[7]))
291 *reg
= (src
[1] - '0');
295 if (src
[1] == 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
300 if (src
[1] == 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
311 if (! IDENT_CHAR ((unsigned char) src
[2]))
317 if (src
[2] == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
326 if (! IDENT_CHAR ((unsigned char) src
[2]))
332 if (src
[2] == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
340 if (src
[1] == 'x' && src
[2] >= '0' && src
[2] <= '1'
341 && ! IDENT_CHAR ((unsigned char) src
[3]))
344 *reg
= 4 + (src
[1] - '0');
347 if (src
[1] == 'y' && src
[2] >= '0' && src
[2] <= '1'
348 && ! IDENT_CHAR ((unsigned char) src
[3]))
351 *reg
= 6 + (src
[1] - '0');
354 if (src
[1] == 's' && src
[2] >= '0' && src
[2] <= '3'
355 && ! IDENT_CHAR ((unsigned char) src
[3]))
357 int n
= src
[1] - '0';
360 *reg
= n
| ((~n
& 2) << 1);
365 if (src
[0] == 'i' && src
[1] && ! IDENT_CHAR ((unsigned char) src
[3]))
387 if (src
[0] == 'x' && src
[1] >= '0' && src
[1] <= '1'
388 && ! IDENT_CHAR ((unsigned char) src
[2]))
391 *reg
= A_X0_NUM
+ src
[1] - '0';
395 if (src
[0] == 'y' && src
[1] >= '0' && src
[1] <= '1'
396 && ! IDENT_CHAR ((unsigned char) src
[2]))
399 *reg
= A_Y0_NUM
+ src
[1] - '0';
403 if (src
[0] == 'm' && src
[1] >= '0' && src
[1] <= '1'
404 && ! IDENT_CHAR ((unsigned char) src
[2]))
407 *reg
= src
[1] == '0' ? A_M0_NUM
: A_M1_NUM
;
413 && src
[2] == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
419 if (src
[0] == 's' && src
[1] == 'p' && src
[2] == 'c'
420 && ! IDENT_CHAR ((unsigned char) src
[3]))
426 if (src
[0] == 's' && src
[1] == 'g' && src
[2] == 'r'
427 && ! IDENT_CHAR ((unsigned char) src
[3]))
433 if (src
[0] == 'd' && src
[1] == 's' && src
[2] == 'r'
434 && ! IDENT_CHAR ((unsigned char) src
[3]))
440 if (src
[0] == 'd' && src
[1] == 'b' && src
[2] == 'r'
441 && ! IDENT_CHAR ((unsigned char) src
[3]))
447 if (src
[0] == 's' && src
[1] == 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
453 if (src
[0] == 's' && src
[1] == 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
460 if (src
[0] == 'p' && src
[1] == 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
465 if (src
[0] == 'p' && src
[1] == 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
467 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
468 and use an uninitialized immediate. */
472 if (src
[0] == 'g' && src
[1] == 'b' && src
[2] == 'r'
473 && ! IDENT_CHAR ((unsigned char) src
[3]))
478 if (src
[0] == 'v' && src
[1] == 'b' && src
[2] == 'r'
479 && ! IDENT_CHAR ((unsigned char) src
[3]))
485 if (src
[0] == 'm' && src
[1] == 'a' && src
[2] == 'c'
486 && ! IDENT_CHAR ((unsigned char) src
[4]))
499 if (src
[0] == 'm' && src
[1] == 'o' && src
[2] == 'd'
500 && ! IDENT_CHAR ((unsigned char) src
[4]))
505 if (src
[0] == 'f' && src
[1] == 'r')
509 if (src
[3] >= '0' && src
[3] <= '5'
510 && ! IDENT_CHAR ((unsigned char) src
[4]))
513 *reg
= 10 + src
[3] - '0';
517 if (src
[2] >= '0' && src
[2] <= '9'
518 && ! IDENT_CHAR ((unsigned char) src
[3]))
521 *reg
= (src
[2] - '0');
525 if (src
[0] == 'd' && src
[1] == 'r')
529 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
530 && ! IDENT_CHAR ((unsigned char) src
[4]))
533 *reg
= 10 + src
[3] - '0';
537 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
538 && ! IDENT_CHAR ((unsigned char) src
[3]))
541 *reg
= (src
[2] - '0');
545 if (src
[0] == 'x' && src
[1] == 'd')
549 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
550 && ! IDENT_CHAR ((unsigned char) src
[4]))
553 *reg
= 11 + src
[3] - '0';
557 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
558 && ! IDENT_CHAR ((unsigned char) src
[3]))
561 *reg
= (src
[2] - '0') + 1;
565 if (src
[0] == 'f' && src
[1] == 'v')
567 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
573 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
574 && ! IDENT_CHAR ((unsigned char) src
[3]))
577 *reg
= (src
[2] - '0');
581 if (src
[0] == 'f' && src
[1] == 'p' && src
[2] == 'u' && src
[3] == 'l'
582 && ! IDENT_CHAR ((unsigned char) src
[4]))
588 if (src
[0] == 'f' && src
[1] == 'p' && src
[2] == 's' && src
[3] == 'c'
589 && src
[4] == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
595 if (src
[0] == 'x' && src
[1] == 'm' && src
[2] == 't' && src
[3] == 'r'
596 && src
[4] == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
605 static symbolS
*dot()
609 /* JF: '.' is pseudo symbol with value of current location
610 in current segment. */
611 fake
= FAKE_LABEL_NAME
;
612 return symbol_new (fake
,
614 (valueT
) frag_now_fix (),
629 save
= input_line_pointer
;
630 input_line_pointer
= s
;
631 expression (&op
->immediate
);
632 if (op
->immediate
.X_op
== O_absent
)
633 as_bad (_("missing operand"));
634 new = input_line_pointer
;
635 input_line_pointer
= save
;
640 /* The many forms of operand:
643 @Rn Register indirect
656 pr, gbr, vbr, macl, mach
671 /* Must be predecrement */
674 len
= parse_reg (src
, &mode
, &(op
->reg
));
676 as_bad (_("illegal register after @-"));
681 else if (src
[0] == '(')
683 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
686 len
= parse_reg (src
, &mode
, &(op
->reg
));
687 if (len
&& mode
== A_REG_N
)
692 as_bad (_("must be @(r0,...)"));
696 /* Now can be rn or gbr */
697 len
= parse_reg (src
, &mode
, &(op
->reg
));
702 else if (mode
== A_REG_N
)
704 op
->type
= A_IND_R0_REG_N
;
708 as_bad (_("syntax error in @(r0,...)"));
713 /* Must be an @(disp,.. thing) */
714 src
= parse_exp (src
, op
);
717 /* Now can be rn, gbr or pc */
718 len
= parse_reg (src
, &mode
, &op
->reg
);
723 op
->type
= A_DISP_REG_N
;
725 else if (mode
== A_GBR
)
727 op
->type
= A_DISP_GBR
;
729 else if (mode
== A_PC
)
731 /* Turn a plain @(4,pc) into @(.+4,pc) */
732 if (op
->immediate
.X_op
== O_constant
) {
733 op
->immediate
.X_add_symbol
= dot();
734 op
->immediate
.X_op
= O_symbol
;
736 op
->type
= A_DISP_PC
;
740 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
745 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
750 as_bad (_("expecting )"));
756 src
+= parse_reg (src
, &mode
, &(op
->reg
));
759 as_bad (_("illegal register after @"));
764 if ((src
[0] == 'r' && src
[1] == '8')
765 || (src
[0] == 'i' && (src
[1] == 'x' || src
[1] == 's')))
770 if ((src
[0] == 'r' && src
[1] == '9')
771 || (src
[0] == 'i' && src
[1] == 'y'))
774 op
->type
= A_PMODY_N
;
788 get_operand (ptr
, op
)
799 *ptr
= parse_exp (src
, op
);
804 else if (src
[0] == '@')
806 *ptr
= parse_at (src
, op
);
809 len
= parse_reg (src
, &mode
, &(op
->reg
));
818 /* Not a reg, the only thing left is a displacement */
819 *ptr
= parse_exp (src
, op
);
820 op
->type
= A_DISP_PC
;
827 get_operands (info
, args
, operand
)
828 sh_opcode_info
*info
;
830 sh_operand_info
*operand
;
836 /* The pre-processor will eliminate whitespace in front of '@'
837 after the first argument; we may be called multiple times
838 from assemble_ppi, so don't insist on finding whitespace here. */
842 get_operand (&ptr
, operand
+ 0);
849 get_operand (&ptr
, operand
+ 1);
850 /* ??? Hack: psha/pshl have a varying operand number depending on
851 the type of the first operand. We handle this by having the
852 three-operand version first and reducing the number of operands
853 parsed to two if we see that the first operand is an immediate.
854 This works because no insn with three operands has an immediate
856 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
862 get_operand (&ptr
, operand
+ 2);
884 /* Passed a pointer to a list of opcodes which use different
885 addressing modes, return the opcode which matches the opcodes
891 get_specific (opcode
, operands
)
892 sh_opcode_info
*opcode
;
893 sh_operand_info
*operands
;
895 sh_opcode_info
*this_try
= opcode
;
896 char *name
= opcode
->name
;
901 if (this_try
->name
!= name
)
903 /* We've looked so far down the table that we've run out of
904 opcodes with the same name */
907 /* look at both operands needed by the opcodes and provided by
908 the user - since an arg test will often fail on the same arg
909 again and again, we'll try and test the last failing arg the
910 first on each opcode try */
912 for (n
= 0; this_try
->arg
[n
]; n
++)
914 sh_operand_info
*user
= operands
+ n
;
915 sh_arg_type arg
= this_try
->arg
[n
];
926 if (user
->type
!= arg
)
930 /* opcode needs r0 */
931 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
935 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
939 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
958 /* Opcode needs rn */
959 if (user
->type
!= arg
)
964 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
979 if (user
->type
!= arg
)
984 if (user
->type
!= arg
)
996 /* Opcode needs rn */
997 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1003 if (user
->type
!= DSP_REG_N
)
1025 if (user
->type
!= DSP_REG_N
)
1047 if (user
->type
!= DSP_REG_N
)
1069 if (user
->type
!= DSP_REG_N
)
1091 if (user
->type
!= DSP_REG_N
)
1113 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
1117 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
1121 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
1125 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
1129 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
1139 /* Opcode needs rn */
1140 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
1145 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1150 if (user
->type
!= XMTRX_M4
)
1156 printf (_("unhandled %d\n"), arg
);
1160 if ( !(valid_arch
& this_try
->arch
))
1162 valid_arch
&= this_try
->arch
;
1171 check (operand
, low
, high
)
1172 expressionS
*operand
;
1176 if (operand
->X_op
!= O_constant
1177 || operand
->X_add_number
< low
1178 || operand
->X_add_number
> high
)
1180 as_bad (_("operand must be absolute in range %d..%d"), low
, high
);
1182 return operand
->X_add_number
;
1187 insert (where
, how
, pcrel
, op
)
1191 sh_operand_info
*op
;
1193 fix_new_exp (frag_now
,
1194 where
- frag_now
->fr_literal
,
1202 build_relax (opcode
, op
)
1203 sh_opcode_info
*opcode
;
1204 sh_operand_info
*op
;
1206 int high_byte
= target_big_endian
? 0 : 1;
1209 if (opcode
->arg
[0] == A_BDISP8
)
1211 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
1212 p
= frag_var (rs_machine_dependent
,
1213 md_relax_table
[C (what
, COND32
)].rlx_length
,
1214 md_relax_table
[C (what
, COND8
)].rlx_length
,
1216 op
->immediate
.X_add_symbol
,
1217 op
->immediate
.X_add_number
,
1219 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
1221 else if (opcode
->arg
[0] == A_BDISP12
)
1223 p
= frag_var (rs_machine_dependent
,
1224 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
1225 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
1227 op
->immediate
.X_add_symbol
,
1228 op
->immediate
.X_add_number
,
1230 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
1235 /* insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1237 insert_loop_bounds (output
, operand
)
1239 sh_operand_info
*operand
;
1244 /* Since the low byte of the opcode will be overwritten by the reloc, we
1245 can just stash the high byte into both bytes and ignore endianness. */
1248 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1249 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1253 static int count
= 0;
1255 /* If the last loop insn is a two-byte-insn, it is in danger of being
1256 swapped with the insn after it. To prevent this, create a new
1257 symbol - complete with SH_LABEL reloc - after the last loop insn.
1258 If the last loop insn is four bytes long, the symbol will be
1259 right in the middle, but four byte insns are not swapped anyways. */
1260 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1261 Hence a 9 digit number should be enough to count all REPEATs. */
1263 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
1264 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
1265 /* Make this a local symbol. */
1267 SF_SET_LOCAL (end_sym
);
1268 #endif /* OBJ_COFF */
1269 symbol_table_insert (end_sym
);
1270 end_sym
->sy_value
= operand
[1].immediate
;
1271 end_sym
->sy_value
.X_add_number
+= 2;
1272 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
1275 output
= frag_more (2);
1278 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1279 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1281 return frag_more (2);
1284 /* Now we know what sort of opcodes it is, lets build the bytes -
1287 build_Mytes (opcode
, operand
)
1288 sh_opcode_info
*opcode
;
1289 sh_operand_info
*operand
;
1294 char *output
= frag_more (2);
1295 int low_byte
= target_big_endian
? 1 : 0;
1301 for (index
= 0; index
< 4; index
++)
1303 sh_nibble_type i
= opcode
->nibbles
[index
];
1313 nbuf
[index
] = reg_n
;
1316 nbuf
[index
] = reg_m
;
1319 if (reg_n
< 2 || reg_n
> 5)
1320 as_bad (_("Invalid register: 'r%d'"), reg_n
);
1321 nbuf
[index
] = (reg_n
& 3) | 4;
1324 nbuf
[index
] = reg_n
| (reg_m
>> 2);
1327 nbuf
[index
] = reg_b
| 0x08;
1330 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
1333 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
1336 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
1339 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
1342 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
1345 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
1348 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
1351 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
1354 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
1357 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
1360 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
1363 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
1366 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
, 1, operand
);
1369 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
, 1, operand
);
1372 output
= insert_loop_bounds (output
, operand
);
1373 nbuf
[index
] = opcode
->nibbles
[3];
1377 printf (_("failed for %d\n"), i
);
1381 if (! target_big_endian
) {
1382 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
1383 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
1386 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
1387 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
1391 /* Find an opcode at the start of *STR_P in the hash table, and set
1392 *STR_P to the first character after the last one read. */
1394 static sh_opcode_info
*
1395 find_cooked_opcode (str_p
)
1399 unsigned char *op_start
;
1400 unsigned char *op_end
;
1403 /* Drop leading whitespace */
1407 /* Find the op code end.
1408 The pre-processor will eliminate whitespace in front of
1409 any '@' after the first argument; we may be called from
1410 assemble_ppi, so the opcode might be terminated by an '@'. */
1411 for (op_start
= op_end
= (unsigned char *) (str
);
1414 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
1417 unsigned char c
= op_start
[nlen
];
1419 /* The machine independent code will convert CMP/EQ into cmp/EQ
1420 because it thinks the '/' is the end of the symbol. Moreover,
1421 all but the first sub-insn is a parallel processing insn won't
1422 be capitailzed. Instead of hacking up the machine independent
1423 code, we just deal with it here. */
1424 c
= isupper (c
) ? tolower (c
) : c
;
1433 as_bad (_("can't find opcode "));
1436 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
1439 /* Assemble a parallel processing insn. */
1440 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
1442 assemble_ppi (op_end
, opcode
)
1444 sh_opcode_info
*opcode
;
1453 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
1454 Make sure we encode a defined insn pattern. */
1460 sh_operand_info operand
[3];
1462 if (opcode
->arg
[0] != A_END
)
1463 op_end
= get_operands (opcode
, op_end
, operand
);
1464 opcode
= get_specific (opcode
, operand
);
1467 /* Couldn't find an opcode which matched the operands */
1468 char *where
= frag_more (2);
1472 as_bad (_("invalid operands for opcode"));
1475 if (opcode
->nibbles
[0] != PPI
)
1476 as_bad (_("insn can't be combined with parallel processing insn"));
1478 switch (opcode
->nibbles
[1])
1483 as_bad (_("multiple movx specifications"));
1488 as_bad (_("multiple movy specifications"));
1494 as_bad (_("multiple movx specifications"));
1495 if (reg_n
< 4 || reg_n
> 5)
1496 as_bad (_("invalid movx address register"));
1497 if (opcode
->nibbles
[2] & 8)
1499 if (reg_m
== A_A1_NUM
)
1501 else if (reg_m
!= A_A0_NUM
)
1502 as_bad (_("invalid movx dsp register"));
1507 as_bad (_("invalid movx dsp register"));
1510 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
1515 as_bad (_("multiple movy specifications"));
1516 if (opcode
->nibbles
[2] & 8)
1518 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
1521 if (reg_m
== A_A1_NUM
)
1523 else if (reg_m
!= A_A0_NUM
)
1524 as_bad (_("invalid movy dsp register"));
1529 as_bad (_("invalid movy dsp register"));
1532 if (reg_n
< 6 || reg_n
> 7)
1533 as_bad (_("invalid movy address register"));
1534 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
1538 if (operand
[0].immediate
.X_op
!= O_constant
)
1539 as_bad (_("dsp immediate shift value not constant"));
1540 field_b
= ((opcode
->nibbles
[2] << 12)
1541 | (operand
[0].immediate
.X_add_number
& 127) << 4
1546 as_bad (_("multiple parallel processing specifications"));
1547 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1548 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1552 as_bad (_("multiple condition specifications"));
1553 cond
= opcode
->nibbles
[2] << 8;
1555 goto skip_cond_check
;
1559 as_bad (_("multiple parallel processing specifications"));
1560 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1561 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1567 if ((field_b
& 0xef00) != 0xa100)
1568 as_bad (_("insn cannot be combined with pmuls"));
1570 switch (field_b
& 0xf)
1573 field_b
+= 0 - A_X0_NUM
;
1576 field_b
+= 1 - A_Y0_NUM
;
1579 field_b
+= 2 - A_A0_NUM
;
1582 field_b
+= 3 - A_A1_NUM
;
1585 as_bad (_("bad padd / psub pmuls output operand"));
1588 field_b
+= 0x4000 + reg_efg
;
1595 as_bad (_("condition not followed by conditionalizable insn"));
1601 opcode
= find_cooked_opcode (&op_end
);
1605 (_("unrecognized characters at end of parallel processing insn")));
1610 move_code
= movx
| movy
;
1613 /* Parallel processing insn. */
1614 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
1616 output
= frag_more (4);
1617 if (! target_big_endian
)
1619 output
[3] = ppi_code
>> 8;
1620 output
[2] = ppi_code
;
1624 output
[2] = ppi_code
>> 8;
1625 output
[3] = ppi_code
;
1627 move_code
|= 0xf800;
1630 /* Just a double data transfer. */
1631 output
= frag_more (2);
1632 if (! target_big_endian
)
1634 output
[1] = move_code
>> 8;
1635 output
[0] = move_code
;
1639 output
[0] = move_code
>> 8;
1640 output
[1] = move_code
;
1644 /* This is the guts of the machine-dependent assembler. STR points to a
1645 machine dependent instruction. This function is supposed to emit
1646 the frags/bytes it assembles to.
1653 unsigned char *op_end
;
1654 sh_operand_info operand
[3];
1655 sh_opcode_info
*opcode
;
1657 opcode
= find_cooked_opcode (&str
);
1662 as_bad (_("unknown opcode"));
1667 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1669 /* Output a CODE reloc to tell the linker that the following
1670 bytes are instructions, not data. */
1671 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1673 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
1676 if (opcode
->nibbles
[0] == PPI
)
1678 assemble_ppi (op_end
, opcode
);
1682 if (opcode
->arg
[0] == A_BDISP12
1683 || opcode
->arg
[0] == A_BDISP8
)
1685 parse_exp (op_end
+ 1, &operand
[0]);
1686 build_relax (opcode
, &operand
[0]);
1690 if (opcode
->arg
[0] == A_END
)
1692 /* Ignore trailing whitespace. If there is any, it has already
1693 been compressed to a single space. */
1699 op_end
= get_operands (opcode
, op_end
, operand
);
1701 opcode
= get_specific (opcode
, operand
);
1705 /* Couldn't find an opcode which matched the operands */
1706 char *where
= frag_more (2);
1710 as_bad (_("invalid operands for opcode"));
1715 as_bad (_("excess operands: '%s'"), op_end
);
1717 build_Mytes (opcode
, operand
);
1722 /* This routine is called each time a label definition is seen. It
1723 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
1728 static fragS
*last_label_frag
;
1729 static int last_label_offset
;
1732 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1736 offset
= frag_now_fix ();
1737 if (frag_now
!= last_label_frag
1738 || offset
!= last_label_offset
)
1740 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
1741 last_label_frag
= frag_now
;
1742 last_label_offset
= offset
;
1747 /* This routine is called when the assembler is about to output some
1748 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
1751 sh_flush_pending_output ()
1754 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1756 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1758 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
1763 DEFUN (md_undefined_symbol
, (name
),
1770 #ifndef BFD_ASSEMBLER
1773 DEFUN (tc_crawl_symbol_chain
, (headers
),
1774 object_headers
* headers
)
1776 printf (_("call to tc_crawl_symbol_chain \n"));
1780 DEFUN (tc_headers_hook
, (headers
),
1781 object_headers
* headers
)
1783 printf (_("call to tc_headers_hook \n"));
1789 /* Various routines to kill one day */
1790 /* Equal to MAX_PRECISION in atof-ieee.c */
1791 #define MAX_LITTLENUMS 6
1793 /* Turn a string in input_line_pointer into a floating point constant of type
1794 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
1795 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
1798 md_atof (type
, litP
, sizeP
)
1804 LITTLENUM_TYPE words
[4];
1820 return _("bad call to md_atof");
1823 t
= atof_ieee (input_line_pointer
, type
, words
);
1825 input_line_pointer
= t
;
1829 if (! target_big_endian
)
1831 for (i
= prec
- 1; i
>= 0; i
--)
1833 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
1839 for (i
= 0; i
< prec
; i
++)
1841 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
1849 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
1850 call instruction. It refers to a label of the instruction which
1851 loads the register which the call uses. We use it to generate a
1852 special reloc for the linker. */
1861 as_warn (_(".uses pseudo-op seen when not relaxing"));
1865 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
1867 as_bad (_("bad .uses format"));
1868 ignore_rest_of_line ();
1872 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
1874 demand_empty_rest_of_line ();
1877 CONST
char *md_shortopts
= "";
1878 struct option md_longopts
[] = {
1880 #define OPTION_RELAX (OPTION_MD_BASE)
1881 #define OPTION_LITTLE (OPTION_MD_BASE + 1)
1882 #define OPTION_SMALL (OPTION_LITTLE + 1)
1883 #define OPTION_DSP (OPTION_SMALL + 1)
1885 {"relax", no_argument
, NULL
, OPTION_RELAX
},
1886 {"little", no_argument
, NULL
, OPTION_LITTLE
},
1887 {"small", no_argument
, NULL
, OPTION_SMALL
},
1888 {"dsp", no_argument
, NULL
, OPTION_DSP
},
1889 {NULL
, no_argument
, NULL
, 0}
1891 size_t md_longopts_size
= sizeof(md_longopts
);
1894 md_parse_option (c
, arg
)
1906 target_big_endian
= 0;
1925 md_show_usage (stream
)
1928 fprintf(stream
, _("\
1930 -little generate little endian code\n\
1931 -relax alter jump instructions for long displacements\n\
1932 -small align sections to 4 byte boundaries, not 16\n\
1933 -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n"));
1937 tc_Nout_fix_to_chars ()
1939 printf (_("call to tc_Nout_fix_to_chars \n"));
1943 /* This struct is used to pass arguments to sh_count_relocs through
1944 bfd_map_over_sections. */
1946 struct sh_count_relocs
1948 /* Symbol we are looking for. */
1950 /* Count of relocs found. */
1954 /* Count the number of fixups in a section which refer to a particular
1955 symbol. When using BFD_ASSEMBLER, this is called via
1956 bfd_map_over_sections. */
1960 sh_count_relocs (abfd
, sec
, data
)
1965 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
1966 segment_info_type
*seginfo
;
1970 seginfo
= seg_info (sec
);
1971 if (seginfo
== NULL
)
1975 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
1977 if (fix
->fx_addsy
== sym
)
1985 /* Handle the count relocs for a particular section. When using
1986 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
1990 sh_frob_section (abfd
, sec
, ignore
)
1995 segment_info_type
*seginfo
;
1998 seginfo
= seg_info (sec
);
1999 if (seginfo
== NULL
)
2002 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2007 struct sh_count_relocs info
;
2009 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
2012 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2013 symbol in the same section. */
2014 sym
= fix
->fx_addsy
;
2016 || fix
->fx_subsy
!= NULL
2017 || fix
->fx_addnumber
!= 0
2018 || S_GET_SEGMENT (sym
) != sec
2019 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2020 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2022 || S_IS_EXTERNAL (sym
))
2024 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2025 _(".uses does not refer to a local symbol in the same section"));
2029 /* Look through the fixups again, this time looking for one
2030 at the same location as sym. */
2031 val
= S_GET_VALUE (sym
);
2032 for (fscan
= seginfo
->fix_root
;
2034 fscan
= fscan
->fx_next
)
2035 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
2036 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
2037 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
2038 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
2039 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
2043 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2044 _("can't find fixup pointed to by .uses"));
2048 if (fscan
->fx_tcbit
)
2050 /* We've already done this one. */
2054 /* fscan should also be a fixup to a local symbol in the same
2056 sym
= fscan
->fx_addsy
;
2058 || fscan
->fx_subsy
!= NULL
2059 || fscan
->fx_addnumber
!= 0
2060 || S_GET_SEGMENT (sym
) != sec
2061 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2062 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2064 || S_IS_EXTERNAL (sym
))
2066 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2067 _(".uses target does not refer to a local symbol in the same section"));
2071 /* Now we look through all the fixups of all the sections,
2072 counting the number of times we find a reference to sym. */
2075 #ifdef BFD_ASSEMBLER
2076 bfd_map_over_sections (stdoutput
, sh_count_relocs
, (PTR
) &info
);
2081 for (iscan
= SEG_E0
; iscan
< SEG_UNKNOWN
; iscan
++)
2082 sh_count_relocs ((bfd
*) NULL
, iscan
, (PTR
) &info
);
2089 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2090 We have already adjusted the value of sym to include the
2091 fragment address, so we undo that adjustment here. */
2092 subseg_change (sec
, 0);
2093 fix_new (symbol_get_frag (sym
),
2094 S_GET_VALUE (sym
) - symbol_get_frag (sym
)->fr_address
,
2095 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
2099 /* This function is called after the symbol table has been completed,
2100 but before the relocs or section contents have been written out.
2101 If we have seen any .uses pseudo-ops, they point to an instruction
2102 which loads a register with the address of a function. We look
2103 through the fixups to find where the function address is being
2104 loaded from. We then generate a COUNT reloc giving the number of
2105 times that function address is referred to. The linker uses this
2106 information when doing relaxing, to decide when it can eliminate
2107 the stored function address entirely. */
2115 #ifdef BFD_ASSEMBLER
2116 bfd_map_over_sections (stdoutput
, sh_frob_section
, (PTR
) NULL
);
2121 for (iseg
= SEG_E0
; iseg
< SEG_UNKNOWN
; iseg
++)
2122 sh_frob_section ((bfd
*) NULL
, iseg
, (PTR
) NULL
);
2127 /* Called after relaxing. Set the correct sizes of the fragments, and
2128 create relocs so that md_apply_fix will fill in the correct values. */
2131 md_convert_frag (headers
, seg
, fragP
)
2132 #ifdef BFD_ASSEMBLER
2135 object_headers
*headers
;
2142 switch (fragP
->fr_subtype
)
2144 case C (COND_JUMP
, COND8
):
2145 case C (COND_JUMP_DELAY
, COND8
):
2146 subseg_change (seg
, 0);
2147 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2148 1, BFD_RELOC_SH_PCDISP8BY2
);
2153 case C (UNCOND_JUMP
, UNCOND12
):
2154 subseg_change (seg
, 0);
2155 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2156 1, BFD_RELOC_SH_PCDISP12BY2
);
2161 case C (UNCOND_JUMP
, UNCOND32
):
2162 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
2163 if (fragP
->fr_symbol
== NULL
)
2164 as_bad (_("at 0x%lx, displacement overflows 12-bit field"),
2165 (unsigned long) fragP
->fr_address
);
2166 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2167 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 12-bit field"),
2168 (unsigned long) fragP
->fr_address
,
2169 S_GET_NAME (fragP
->fr_symbol
));
2171 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 12-bit field"),
2172 (unsigned long) fragP
->fr_address
,
2173 S_GET_NAME (fragP
->fr_symbol
));
2175 #if 0 /* This code works, but generates poor code and the compiler
2176 should never produce a sequence that requires it to be used. */
2178 /* A jump wont fit in 12 bits, make code which looks like
2184 int t
= buffer
[0] & 0x10;
2186 buffer
[highbyte
] = 0xa0; /* branch over move and disp */
2187 buffer
[lowbyte
] = 3;
2188 buffer
[highbyte
+2] = 0xd0 | JREG
; /* Build mov insn */
2189 buffer
[lowbyte
+2] = 0x00;
2191 buffer
[highbyte
+4] = 0; /* space for 32 bit jump disp */
2192 buffer
[lowbyte
+4] = 0;
2193 buffer
[highbyte
+6] = 0;
2194 buffer
[lowbyte
+6] = 0;
2196 buffer
[highbyte
+8] = 0x40 | JREG
; /* Build jmp @JREG */
2197 buffer
[lowbyte
+8] = t
? 0xb : 0x2b;
2199 buffer
[highbyte
+10] = 0x20; /* build nop */
2200 buffer
[lowbyte
+10] = 0x0b;
2202 /* Make reloc for the long disp */
2210 fragP
->fr_fix
+= UNCOND32_LENGTH
;
2217 case C (COND_JUMP
, COND12
):
2218 case C (COND_JUMP_DELAY
, COND12
):
2219 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop */
2220 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2221 was due to gas incorrectly relaxing an out-of-range conditional
2222 branch with delay slot. It turned:
2223 bf.s L6 (slot mov.l r12,@(44,r0))
2226 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2228 32: 10 cb mov.l r12,@(44,r0)
2229 Therefore, branches with delay slots have to be handled
2230 differently from ones without delay slots. */
2232 unsigned char *buffer
=
2233 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
2234 int highbyte
= target_big_endian
? 0 : 1;
2235 int lowbyte
= target_big_endian
? 1 : 0;
2236 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
2238 /* Toggle the true/false bit of the bcond. */
2239 buffer
[highbyte
] ^= 0x2;
2241 /* If this is a dalayed branch, we may not put the the bra in the
2242 slot. So we change it to a non-delayed branch, like that:
2243 b! cond slot_label; bra disp; slot_label: slot_insn
2244 ??? We should try if swapping the conditional branch and
2245 its delay-slot insn already makes the branch reach. */
2247 /* Build a relocation to six / four bytes farther on. */
2248 subseg_change (seg
, 0);
2249 fix_new (fragP
, fragP
->fr_fix
, 2,
2250 #ifdef BFD_ASSEMBLER
2251 section_symbol (seg
),
2253 seg_info (seg
)->dot
,
2255 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
2256 1, BFD_RELOC_SH_PCDISP8BY2
);
2258 /* Set up a jump instruction. */
2259 buffer
[highbyte
+ 2] = 0xa0;
2260 buffer
[lowbyte
+ 2] = 0;
2261 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
2262 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
2266 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
2271 /* Fill in a NOP instruction. */
2272 buffer
[highbyte
+ 4] = 0x0;
2273 buffer
[lowbyte
+ 4] = 0x9;
2282 case C (COND_JUMP
, COND32
):
2283 case C (COND_JUMP_DELAY
, COND32
):
2284 case C (COND_JUMP
, UNDEF_WORD_DISP
):
2285 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
2286 if (fragP
->fr_symbol
== NULL
)
2287 as_bad (_("at 0x%lx, displacement overflows 8-bit field"),
2288 (unsigned long) fragP
->fr_address
);
2289 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2290 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 8-bit field "),
2291 (unsigned long) fragP
->fr_address
,
2292 S_GET_NAME (fragP
->fr_symbol
));
2294 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 8-bit field "),
2295 (unsigned long) fragP
->fr_address
,
2296 S_GET_NAME (fragP
->fr_symbol
));
2298 #if 0 /* This code works, but generates poor code, and the compiler
2299 should never produce a sequence that requires it to be used. */
2301 /* A bcond won't fit and it won't go into a 12 bit
2302 displacement either, the code sequence looks like:
2311 buffer
[0] ^= 0x2; /* Toggle T/F bit */
2313 buffer
[1] = 5; /* branch over mov, jump, nop and ptr */
2314 buffer
[2] = 0xd0 | JREG
; /* Build mov insn */
2316 buffer
[4] = 0x40 | JREG
; /* Build jmp @JREG */
2318 buffer
[6] = 0x20; /* build nop */
2320 buffer
[8] = 0; /* space for 32 bit jump disp */
2326 /* Make reloc for the long disp */
2334 fragP
->fr_fix
+= COND32_LENGTH
;
2345 if (donerelax
&& !sh_relax
)
2346 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
2347 _("overflow in branch to %s; converted into longer instruction sequence"),
2348 (fragP
->fr_symbol
!= NULL
2349 ? S_GET_NAME (fragP
->fr_symbol
)
2354 DEFUN (md_section_align
, (seg
, size
),
2358 #ifdef BFD_ASSEMBLER
2361 #else /* ! OBJ_ELF */
2362 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
2363 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
2364 #endif /* ! OBJ_ELF */
2365 #else /* ! BFD_ASSEMBLER */
2366 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
2367 & (-1 << section_alignment
[(int) seg
]));
2368 #endif /* ! BFD_ASSEMBLER */
2371 /* This static variable is set by s_uacons to tell sh_cons_align that
2372 the expession does not need to be aligned. */
2374 static int sh_no_align_cons
= 0;
2376 /* This handles the unaligned space allocation pseudo-ops, such as
2377 .uaword. .uaword is just like .word, but the value does not need
2384 /* Tell sh_cons_align not to align this value. */
2385 sh_no_align_cons
= 1;
2389 /* If a .word, et. al., pseud-op is seen, warn if the value is not
2390 aligned correctly. Note that this can cause warnings to be issued
2391 when assembling initialized structured which were declared with the
2392 packed attribute. FIXME: Perhaps we should require an option to
2393 enable this warning? */
2396 sh_cons_align (nbytes
)
2402 if (sh_no_align_cons
)
2404 /* This is an unaligned pseudo-op. */
2405 sh_no_align_cons
= 0;
2410 while ((nbytes
& 1) == 0)
2419 if (now_seg
== absolute_section
)
2421 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
2422 as_warn (_("misaligned data"));
2426 p
= frag_var (rs_align_code
, 1, 1, (relax_substateT
) 0,
2427 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
2429 record_alignment (now_seg
, nalign
);
2432 /* When relaxing, we need to output a reloc for any .align directive
2433 that requests alignment to a four byte boundary or larger. This is
2434 also where we check for misaligned data. */
2437 sh_handle_align (frag
)
2441 && frag
->fr_type
== rs_align
2442 && frag
->fr_address
+ frag
->fr_fix
> 0
2443 && frag
->fr_offset
> 1
2444 && now_seg
!= bss_section
)
2445 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
2446 BFD_RELOC_SH_ALIGN
);
2448 if (frag
->fr_type
== rs_align_code
2449 && frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
!= 0)
2450 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
2453 /* This macro decides whether a particular reloc is an entry in a
2454 switch table. It is used when relaxing, because the linker needs
2455 to know about all such entries so that it can adjust them if
2458 #ifdef BFD_ASSEMBLER
2459 #define SWITCH_TABLE_CONS(fix) (0)
2461 #define SWITCH_TABLE_CONS(fix) \
2462 ((fix)->fx_r_type == 0 \
2463 && ((fix)->fx_size == 2 \
2464 || (fix)->fx_size == 1 \
2465 || (fix)->fx_size == 4))
2468 #define SWITCH_TABLE(fix) \
2469 ((fix)->fx_addsy != NULL \
2470 && (fix)->fx_subsy != NULL \
2471 && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
2472 && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
2473 && ((fix)->fx_r_type == BFD_RELOC_32 \
2474 || (fix)->fx_r_type == BFD_RELOC_16 \
2475 || (fix)->fx_r_type == BFD_RELOC_8 \
2476 || SWITCH_TABLE_CONS (fix)))
2478 /* See whether we need to force a relocation into the output file.
2479 This is used to force out switch and PC relative relocations when
2483 sh_force_relocation (fix
)
2487 if (fix
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2488 || fix
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
2489 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
2490 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
)
2496 return (fix
->fx_pcrel
2497 || SWITCH_TABLE (fix
)
2498 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
2499 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
2500 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
2501 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
2502 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
2507 sh_fix_adjustable (fixP
)
2511 if (fixP
->fx_addsy
== NULL
)
2514 /* We need the symbol name for the VTABLE entries */
2515 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2516 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
2522 void sh_elf_final_processing()
2526 /* Set file-specific flags to indicate if this code needs
2527 a processor with the sh-dsp / sh3e ISA to execute. */
2528 if (valid_arch
& arch_sh1
)
2530 else if (valid_arch
& arch_sh2
)
2532 else if (valid_arch
& arch_sh_dsp
)
2534 else if (valid_arch
& arch_sh3
)
2536 else if (valid_arch
& arch_sh3_dsp
)
2538 else if (valid_arch
& arch_sh3e
)
2540 else if (valid_arch
& arch_sh4
)
2545 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
2546 elf_elfheader (stdoutput
)->e_flags
|= val
;
2550 /* Apply a fixup to the object file. */
2552 #ifdef BFD_ASSEMBLER
2554 md_apply_fix (fixP
, valp
)
2559 md_apply_fix (fixP
, val
)
2564 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2565 int lowbyte
= target_big_endian
? 1 : 0;
2566 int highbyte
= target_big_endian
? 0 : 1;
2567 #ifdef BFD_ASSEMBLER
2573 #ifdef BFD_ASSEMBLER
2574 /* adjust_reloc_syms won't convert a reloc against a weak symbol
2575 into a reloc against a section, but bfd_install_relocation will
2576 screw up if the symbol is defined, so we have to adjust val here
2577 to avoid the screw up later. */
2578 if (fixP
->fx_addsy
!= NULL
2579 && S_IS_WEAK (fixP
->fx_addsy
))
2580 val
-= S_GET_VALUE (fixP
->fx_addsy
);
2583 #ifndef BFD_ASSEMBLER
2584 if (fixP
->fx_r_type
== 0)
2586 if (fixP
->fx_size
== 2)
2587 fixP
->fx_r_type
= BFD_RELOC_16
;
2588 else if (fixP
->fx_size
== 4)
2589 fixP
->fx_r_type
= BFD_RELOC_32
;
2590 else if (fixP
->fx_size
== 1)
2591 fixP
->fx_r_type
= BFD_RELOC_8
;
2599 switch (fixP
->fx_r_type
)
2601 case BFD_RELOC_SH_IMM4
:
2603 *buf
= (*buf
& 0xf0) | (val
& 0xf);
2606 case BFD_RELOC_SH_IMM4BY2
:
2609 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
2612 case BFD_RELOC_SH_IMM4BY4
:
2615 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
2618 case BFD_RELOC_SH_IMM8BY2
:
2624 case BFD_RELOC_SH_IMM8BY4
:
2631 case BFD_RELOC_SH_IMM8
:
2632 /* Sometimes the 8 bit value is sign extended (e.g., add) and
2633 sometimes it is not (e.g., and). We permit any 8 bit value.
2634 Note that adding further restrictions may invalidate
2635 reasonable looking assembly code, such as ``and -0x1,r0''. */
2641 case BFD_RELOC_SH_PCRELIMM8BY4
:
2642 /* The lower two bits of the PC are cleared before the
2643 displacement is added in. We can assume that the destination
2644 is on a 4 byte bounday. If this instruction is also on a 4
2645 byte boundary, then we want
2647 and target - here is a multiple of 4.
2648 Otherwise, we are on a 2 byte boundary, and we want
2649 (target - (here - 2)) / 4
2650 and target - here is not a multiple of 4. Computing
2651 (target - (here - 2)) / 4 == (target - here + 2) / 4
2652 works for both cases, since in the first case the addition of
2653 2 will be removed by the division. target - here is in the
2655 val
= (val
+ 2) / 4;
2657 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2661 case BFD_RELOC_SH_PCRELIMM8BY2
:
2664 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2668 case BFD_RELOC_SH_PCDISP8BY2
:
2670 if (val
< -0x80 || val
> 0x7f)
2671 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2675 case BFD_RELOC_SH_PCDISP12BY2
:
2677 if (val
< -0x800 || val
>= 0x7ff)
2678 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2679 buf
[lowbyte
] = val
& 0xff;
2680 buf
[highbyte
] |= (val
>> 8) & 0xf;
2684 if (! target_big_endian
)
2701 if (! target_big_endian
)
2713 case BFD_RELOC_SH_USES
:
2714 /* Pass the value into sh_coff_reloc_mangle. */
2715 fixP
->fx_addnumber
= val
;
2718 case BFD_RELOC_SH_COUNT
:
2719 case BFD_RELOC_SH_ALIGN
:
2720 case BFD_RELOC_SH_CODE
:
2721 case BFD_RELOC_SH_DATA
:
2722 case BFD_RELOC_SH_LABEL
:
2723 /* Nothing to do here. */
2726 case BFD_RELOC_SH_LOOP_START
:
2727 case BFD_RELOC_SH_LOOP_END
:
2729 case BFD_RELOC_VTABLE_INHERIT
:
2730 case BFD_RELOC_VTABLE_ENTRY
:
2732 #ifdef BFD_ASSEMBLER
2744 if ((val
& ((1 << shift
) - 1)) != 0)
2745 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
2749 val
= ((val
>> shift
)
2750 | ((long) -1 & ~ ((long) -1 >> shift
)));
2752 if (max
!= 0 && (val
< min
|| val
> max
))
2753 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
2755 #ifdef BFD_ASSEMBLER
2760 /* Called just before address relaxation. Return the length
2761 by which a fragment must grow to reach it's destination. */
2764 md_estimate_size_before_relax (fragP
, segment_type
)
2765 register fragS
*fragP
;
2766 register segT segment_type
;
2768 switch (fragP
->fr_subtype
)
2770 case C (UNCOND_JUMP
, UNDEF_DISP
):
2771 /* used to be a branch to somewhere which was unknown */
2772 if (!fragP
->fr_symbol
)
2774 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
2775 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
;
2777 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
2779 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
2780 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
;
2784 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
2785 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
;
2786 return md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
;
2792 case C (COND_JUMP
, UNDEF_DISP
):
2793 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
2794 /* used to be a branch to somewhere which was unknown */
2795 if (fragP
->fr_symbol
2796 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
2798 int what
= GET_WHAT (fragP
->fr_subtype
);
2799 /* Got a symbol and it's defined in this segment, become byte
2800 sized - maybe it will fix up */
2801 fragP
->fr_subtype
= C (what
, COND8
);
2802 fragP
->fr_var
= md_relax_table
[C (what
, COND8
)].rlx_length
;
2804 else if (fragP
->fr_symbol
)
2806 int what
= GET_WHAT (fragP
->fr_subtype
);
2807 /* Its got a segment, but its not ours, so it will always be long */
2808 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
2809 fragP
->fr_var
= md_relax_table
[C (what
, COND32
)].rlx_length
;
2810 return md_relax_table
[C (what
, COND32
)].rlx_length
;
2814 int what
= GET_WHAT (fragP
->fr_subtype
);
2815 /* We know the abs value */
2816 fragP
->fr_subtype
= C (what
, COND8
);
2817 fragP
->fr_var
= md_relax_table
[C (what
, COND8
)].rlx_length
;
2822 return fragP
->fr_var
;
2825 /* Put number into target byte order */
2828 md_number_to_chars (ptr
, use
, nbytes
)
2833 if (! target_big_endian
)
2834 number_to_chars_littleendian (ptr
, use
, nbytes
);
2836 number_to_chars_bigendian (ptr
, use
, nbytes
);
2840 md_pcrel_from (fixP
)
2843 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
2849 tc_coff_sizemachdep (frag
)
2852 return md_relax_table
[frag
->fr_subtype
].rlx_length
;
2855 #endif /* OBJ_COFF */
2857 /* When we align the .text section, insert the correct NOP pattern. */
2860 sh_do_align (n
, fill
, len
, max
)
2867 && subseg_text_p (now_seg
)
2870 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
2871 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
2873 /* First align to a 2 byte boundary, in case there is an odd
2875 frag_align (1, 0, 0);
2876 if (target_big_endian
)
2877 frag_align_pattern (n
, big_nop_pattern
, sizeof big_nop_pattern
, max
);
2879 frag_align_pattern (n
, little_nop_pattern
, sizeof little_nop_pattern
,
2887 #ifndef BFD_ASSEMBLER
2890 /* Map BFD relocs to SH COFF relocs. */
2894 bfd_reloc_code_real_type bfd_reloc
;
2898 static const struct reloc_map coff_reloc_map
[] =
2900 { BFD_RELOC_32
, R_SH_IMM32
},
2901 { BFD_RELOC_16
, R_SH_IMM16
},
2902 { BFD_RELOC_8
, R_SH_IMM8
},
2903 { BFD_RELOC_SH_PCDISP8BY2
, R_SH_PCDISP8BY2
},
2904 { BFD_RELOC_SH_PCDISP12BY2
, R_SH_PCDISP
},
2905 { BFD_RELOC_SH_IMM4
, R_SH_IMM4
},
2906 { BFD_RELOC_SH_IMM4BY2
, R_SH_IMM4BY2
},
2907 { BFD_RELOC_SH_IMM4BY4
, R_SH_IMM4BY4
},
2908 { BFD_RELOC_SH_IMM8
, R_SH_IMM8
},
2909 { BFD_RELOC_SH_IMM8BY2
, R_SH_IMM8BY2
},
2910 { BFD_RELOC_SH_IMM8BY4
, R_SH_IMM8BY4
},
2911 { BFD_RELOC_SH_PCRELIMM8BY2
, R_SH_PCRELIMM8BY2
},
2912 { BFD_RELOC_SH_PCRELIMM8BY4
, R_SH_PCRELIMM8BY4
},
2913 { BFD_RELOC_8_PCREL
, R_SH_SWITCH8
},
2914 { BFD_RELOC_SH_SWITCH16
, R_SH_SWITCH16
},
2915 { BFD_RELOC_SH_SWITCH32
, R_SH_SWITCH32
},
2916 { BFD_RELOC_SH_USES
, R_SH_USES
},
2917 { BFD_RELOC_SH_COUNT
, R_SH_COUNT
},
2918 { BFD_RELOC_SH_ALIGN
, R_SH_ALIGN
},
2919 { BFD_RELOC_SH_CODE
, R_SH_CODE
},
2920 { BFD_RELOC_SH_DATA
, R_SH_DATA
},
2921 { BFD_RELOC_SH_LABEL
, R_SH_LABEL
},
2922 { BFD_RELOC_UNUSED
, 0 }
2925 /* Adjust a reloc for the SH. This is similar to the generic code,
2926 but does some minor tweaking. */
2929 sh_coff_reloc_mangle (seg
, fix
, intr
, paddr
)
2930 segment_info_type
*seg
;
2932 struct internal_reloc
*intr
;
2935 symbolS
*symbol_ptr
= fix
->fx_addsy
;
2938 intr
->r_vaddr
= paddr
+ fix
->fx_frag
->fr_address
+ fix
->fx_where
;
2940 if (! SWITCH_TABLE (fix
))
2942 const struct reloc_map
*rm
;
2944 for (rm
= coff_reloc_map
; rm
->bfd_reloc
!= BFD_RELOC_UNUSED
; rm
++)
2945 if (rm
->bfd_reloc
== (bfd_reloc_code_real_type
) fix
->fx_r_type
)
2947 if (rm
->bfd_reloc
== BFD_RELOC_UNUSED
)
2948 as_bad_where (fix
->fx_file
, fix
->fx_line
,
2949 _("Can not represent %s relocation in this object file format"),
2950 bfd_get_reloc_code_name (fix
->fx_r_type
));
2951 intr
->r_type
= rm
->sh_reloc
;
2958 if (fix
->fx_r_type
== BFD_RELOC_16
)
2959 intr
->r_type
= R_SH_SWITCH16
;
2960 else if (fix
->fx_r_type
== BFD_RELOC_8
)
2961 intr
->r_type
= R_SH_SWITCH8
;
2962 else if (fix
->fx_r_type
== BFD_RELOC_32
)
2963 intr
->r_type
= R_SH_SWITCH32
;
2967 /* For a switch reloc, we set r_offset to the difference between
2968 the reloc address and the subtrahend. When the linker is
2969 doing relaxing, it can use the determine the starting and
2970 ending points of the switch difference expression. */
2971 intr
->r_offset
= intr
->r_vaddr
- S_GET_VALUE (fix
->fx_subsy
);
2974 /* PC relative relocs are always against the current section. */
2975 if (symbol_ptr
== NULL
)
2977 switch (fix
->fx_r_type
)
2979 case BFD_RELOC_SH_PCRELIMM8BY2
:
2980 case BFD_RELOC_SH_PCRELIMM8BY4
:
2981 case BFD_RELOC_SH_PCDISP8BY2
:
2982 case BFD_RELOC_SH_PCDISP12BY2
:
2983 case BFD_RELOC_SH_USES
:
2984 symbol_ptr
= seg
->dot
;
2991 if (fix
->fx_r_type
== BFD_RELOC_SH_USES
)
2993 /* We can't store the offset in the object file, since this
2994 reloc does not take up any space, so we store it in r_offset.
2995 The fx_addnumber field was set in md_apply_fix. */
2996 intr
->r_offset
= fix
->fx_addnumber
;
2998 else if (fix
->fx_r_type
== BFD_RELOC_SH_COUNT
)
3000 /* We can't store the count in the object file, since this reloc
3001 does not take up any space, so we store it in r_offset. The
3002 fx_offset field was set when the fixup was created in
3003 sh_coff_frob_file. */
3004 intr
->r_offset
= fix
->fx_offset
;
3005 /* This reloc is always absolute. */
3008 else if (fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
)
3010 /* Store the alignment in the r_offset field. */
3011 intr
->r_offset
= fix
->fx_offset
;
3012 /* This reloc is always absolute. */
3015 else if (fix
->fx_r_type
== BFD_RELOC_SH_CODE
3016 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3017 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
)
3019 /* These relocs are always absolute. */
3023 /* Turn the segment of the symbol into an offset. */
3024 if (symbol_ptr
!= NULL
)
3026 dot
= segment_info
[S_GET_SEGMENT (symbol_ptr
)].dot
;
3028 intr
->r_symndx
= dot
->sy_number
;
3030 intr
->r_symndx
= symbol_ptr
->sy_number
;
3033 intr
->r_symndx
= -1;
3036 #endif /* OBJ_COFF */
3037 #endif /* ! BFD_ASSEMBLER */
3039 #ifdef BFD_ASSEMBLER
3041 /* Create a reloc. */
3044 tc_gen_reloc (section
, fixp
)
3049 bfd_reloc_code_real_type r_type
;
3051 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3052 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
3053 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
3054 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3056 r_type
= fixp
->fx_r_type
;
3058 if (SWITCH_TABLE (fixp
))
3060 rel
->addend
= rel
->address
- S_GET_VALUE (fixp
->fx_subsy
);
3061 if (r_type
== BFD_RELOC_16
)
3062 r_type
= BFD_RELOC_SH_SWITCH16
;
3063 else if (r_type
== BFD_RELOC_8
)
3064 r_type
= BFD_RELOC_8_PCREL
;
3065 else if (r_type
== BFD_RELOC_32
)
3066 r_type
= BFD_RELOC_SH_SWITCH32
;
3070 else if (r_type
== BFD_RELOC_SH_USES
)
3071 rel
->addend
= fixp
->fx_addnumber
;
3072 else if (r_type
== BFD_RELOC_SH_COUNT
)
3073 rel
->addend
= fixp
->fx_offset
;
3074 else if (r_type
== BFD_RELOC_SH_ALIGN
)
3075 rel
->addend
= fixp
->fx_offset
;
3076 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
3077 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
3078 rel
->addend
= fixp
->fx_offset
;
3079 else if (r_type
== BFD_RELOC_SH_LOOP_START
3080 || r_type
== BFD_RELOC_SH_LOOP_END
)
3081 rel
->addend
= fixp
->fx_offset
;
3082 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
3085 rel
->address
= rel
->addend
= fixp
->fx_offset
;
3087 else if (fixp
->fx_pcrel
)
3088 rel
->addend
= fixp
->fx_addnumber
;
3092 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
3093 if (rel
->howto
== NULL
)
3095 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3096 _("Cannot represent relocation type %s"),
3097 bfd_get_reloc_code_name (r_type
));
3098 /* Set howto to a garbage value so that we can keep going. */
3099 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3100 assert (rel
->howto
!= NULL
);
3106 #endif /* BFD_ASSEMBLER */