1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
23 /* Written By Steve Chamberlain <sac@cygnus.com> */
28 #include "opcodes/sh-opc.h"
29 #include "safe-ctype.h"
30 #include "struc-symbol.h"
36 #include "dwarf2dbg.h"
37 #include "dw2gencfi.h"
43 expressionS immediate
;
47 const char comment_chars
[] = "!";
48 const char line_separator_chars
[] = ";";
49 const char line_comment_chars
[] = "!#";
51 static void s_uses (int);
52 static void s_uacons (int);
55 static void sh_elf_cons (int);
57 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
61 big (int ignore ATTRIBUTE_UNUSED
)
63 if (! target_big_endian
)
64 as_bad (_("directive .big encountered when option -big required"));
66 /* Stop further messages. */
67 target_big_endian
= 1;
71 little (int ignore ATTRIBUTE_UNUSED
)
73 if (target_big_endian
)
74 as_bad (_("directive .little encountered when option -little required"));
76 /* Stop further messages. */
77 target_big_endian
= 0;
80 /* This table describes all the machine specific pseudo-ops the assembler
81 has to support. The fields are:
82 pseudo-op name without dot
83 function to call to execute this pseudo-op
84 Integer arg to pass to the function. */
86 const pseudo_typeS md_pseudo_table
[] =
89 {"long", sh_elf_cons
, 4},
90 {"int", sh_elf_cons
, 4},
91 {"word", sh_elf_cons
, 2},
92 {"short", sh_elf_cons
, 2},
98 {"form", listing_psize
, 0},
99 {"little", little
, 0},
100 {"heading", listing_title
, 0},
101 {"import", s_ignore
, 0},
102 {"page", listing_eject
, 0},
103 {"program", s_ignore
, 0},
105 {"uaword", s_uacons
, 2},
106 {"ualong", s_uacons
, 4},
107 {"uaquad", s_uacons
, 8},
108 {"2byte", s_uacons
, 2},
109 {"4byte", s_uacons
, 4},
110 {"8byte", s_uacons
, 8},
112 {"mode", s_sh64_mode
, 0 },
114 /* Have the old name too. */
115 {"isa", s_sh64_mode
, 0 },
117 /* Assert that the right ABI is used. */
118 {"abi", s_sh64_abi
, 0 },
120 { "vtable_inherit", sh64_vtable_inherit
, 0 },
121 { "vtable_entry", sh64_vtable_entry
, 0 },
122 #endif /* HAVE_SH64 */
126 int sh_relax
; /* set if -relax seen */
128 /* Whether -small was seen. */
132 /* Flag to generate relocations against symbol values for local symbols. */
134 static int dont_adjust_reloc_32
;
136 /* Flag to indicate that '$' is allowed as a register prefix. */
138 static int allow_dollar_register_prefix
;
140 /* Preset architecture set, if given; zero otherwise. */
142 static unsigned int preset_target_arch
;
144 /* The bit mask of architectures that could
145 accommodate the insns seen so far. */
146 static unsigned int valid_arch
;
149 /* Whether --fdpic was given. */
153 const char EXP_CHARS
[] = "eE";
155 /* Chars that mean this number is a floating point constant. */
158 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
160 #define C(a,b) ENCODE_RELAX(a,b)
162 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
163 #define GET_WHAT(x) ((x>>4))
165 /* These are the three types of relaxable instruction. */
166 /* These are the types of relaxable instructions; except for END which is
169 #define COND_JUMP_DELAY 2
170 #define UNCOND_JUMP 3
174 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
175 #define SH64PCREL16_32 4
176 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
177 #define SH64PCREL16_64 5
179 /* Variants of the above for adjusting the insn to PTA or PTB according to
181 #define SH64PCREL16PT_32 6
182 #define SH64PCREL16PT_64 7
184 /* A MOVI expansion, expanding to at most 32 or 64 bits. */
185 #define MOVI_IMM_32 8
186 #define MOVI_IMM_32_PCREL 9
187 #define MOVI_IMM_64 10
188 #define MOVI_IMM_64_PCREL 11
191 #else /* HAVE_SH64 */
195 #endif /* HAVE_SH64 */
201 #define UNDEF_WORD_DISP 4
207 #define UNDEF_SH64PCREL 0
208 #define SH64PCREL16 1
209 #define SH64PCREL32 2
210 #define SH64PCREL48 3
211 #define SH64PCREL64 4
212 #define SH64PCRELPLT 5
220 #define MOVI_GOTOFF 6
222 #endif /* HAVE_SH64 */
224 /* Branch displacements are from the address of the branch plus
225 four, thus all minimum and maximum values have 4 added to them. */
228 #define COND8_LENGTH 2
230 /* There is one extra instruction before the branch, so we must add
231 two more bytes to account for it. */
232 #define COND12_F 4100
233 #define COND12_M -4090
234 #define COND12_LENGTH 6
236 #define COND12_DELAY_LENGTH 4
238 /* ??? The minimum and maximum values are wrong, but this does not matter
239 since this relocation type is not supported yet. */
240 #define COND32_F (1<<30)
241 #define COND32_M -(1<<30)
242 #define COND32_LENGTH 14
244 #define UNCOND12_F 4098
245 #define UNCOND12_M -4092
246 #define UNCOND12_LENGTH 2
248 /* ??? The minimum and maximum values are wrong, but this does not matter
249 since this relocation type is not supported yet. */
250 #define UNCOND32_F (1<<30)
251 #define UNCOND32_M -(1<<30)
252 #define UNCOND32_LENGTH 14
255 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
256 TRd" as is the current insn, so no extra length. Note that the "reach"
257 is calculated from the address *after* that insn, but the offset in the
258 insn is calculated from the beginning of the insn. We also need to
259 take into account the implicit 1 coded as the "A" in PTA when counting
260 forward. If PTB reaches an odd address, we trap that as an error
261 elsewhere, so we don't have to have different relaxation entries. We
262 don't add a one to the negative range, since PTB would then have the
263 farthest backward-reaching value skipped, not generated at relaxation. */
264 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
265 #define SH64PCREL16_M (-32768 * 4 - 4)
266 #define SH64PCREL16_LENGTH 0
268 /* The next step is to change that PT insn into
269 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
270 SHORI (label - datalabel Ln) & 65535, R25
273 which means two extra insns, 8 extra bytes. This is the limit for the
276 The expressions look a bit bad since we have to adjust this to avoid overflow on a
278 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
279 #define SH64PCREL32_LENGTH (2 * 4)
281 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
283 #if BFD_HOST_64BIT_LONG
284 /* The "reach" type is long, so we can only do this for a 64-bit-long
286 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4)
287 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
288 #define SH64PCREL48_M (((long) -1 << 47) - 4)
289 #define SH64PCREL48_LENGTH (3 * 4)
291 /* If the host does not have 64-bit longs, just make this state identical
292 in reach to the 32-bit state. Note that we have a slightly incorrect
293 reach, but the correct one above will overflow a 32-bit number. */
294 #define SH64PCREL32_M (((long) -1 << 30) * 2)
295 #define SH64PCREL48_F SH64PCREL32_F
296 #define SH64PCREL48_M SH64PCREL32_M
297 #define SH64PCREL48_LENGTH (3 * 4)
298 #endif /* BFD_HOST_64BIT_LONG */
300 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
302 #define SH64PCREL64_LENGTH (4 * 4)
304 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
305 SH64PCREL expansions. The PCREL one is similar, but the other has no
306 pc-relative reach; it must be fully expanded in
307 shmedia_md_estimate_size_before_relax. */
308 #define MOVI_16_LENGTH 0
309 #define MOVI_16_F (32767 - 4)
310 #define MOVI_16_M (-32768 - 4)
311 #define MOVI_32_LENGTH 4
312 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
313 #define MOVI_48_LENGTH 8
315 #if BFD_HOST_64BIT_LONG
316 /* The "reach" type is long, so we can only do this for a 64-bit-long
318 #define MOVI_32_M (((long) -1 << 30) * 2 - 4)
319 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
320 #define MOVI_48_M (((long) -1 << 47) - 4)
322 /* If the host does not have 64-bit longs, just make this state identical
323 in reach to the 32-bit state. Note that we have a slightly incorrect
324 reach, but the correct one above will overflow a 32-bit number. */
325 #define MOVI_32_M (((long) -1 << 30) * 2)
326 #define MOVI_48_F MOVI_32_F
327 #define MOVI_48_M MOVI_32_M
328 #endif /* BFD_HOST_64BIT_LONG */
330 #define MOVI_64_LENGTH 12
331 #endif /* HAVE_SH64 */
333 #define EMPTY { 0, 0, 0, 0 }
335 const relax_typeS md_relax_table
[C (END
, 0)] = {
336 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
337 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
340 /* C (COND_JUMP, COND8) */
341 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
342 /* C (COND_JUMP, COND12) */
343 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
344 /* C (COND_JUMP, COND32) */
345 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
346 /* C (COND_JUMP, UNDEF_WORD_DISP) */
347 { 0, 0, COND32_LENGTH
, 0, },
349 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
352 /* C (COND_JUMP_DELAY, COND8) */
353 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
354 /* C (COND_JUMP_DELAY, COND12) */
355 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
356 /* C (COND_JUMP_DELAY, COND32) */
357 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
358 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
359 { 0, 0, COND32_LENGTH
, 0, },
361 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
364 /* C (UNCOND_JUMP, UNCOND12) */
365 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
366 /* C (UNCOND_JUMP, UNCOND32) */
367 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
369 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
370 { 0, 0, UNCOND32_LENGTH
, 0, },
372 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
375 /* C (SH64PCREL16_32, SH64PCREL16) */
377 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_32
, SH64PCREL32
) },
378 /* C (SH64PCREL16_32, SH64PCREL32) */
379 { 0, 0, SH64PCREL32_LENGTH
, 0 },
381 /* C (SH64PCREL16_32, SH64PCRELPLT) */
382 { 0, 0, SH64PCREL32_LENGTH
, 0 },
384 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
386 /* C (SH64PCREL16_64, SH64PCREL16) */
388 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_64
, SH64PCREL32
) },
389 /* C (SH64PCREL16_64, SH64PCREL32) */
390 { SH64PCREL32_F
, SH64PCREL32_M
, SH64PCREL32_LENGTH
, C (SH64PCREL16_64
, SH64PCREL48
) },
391 /* C (SH64PCREL16_64, SH64PCREL48) */
392 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16_64
, SH64PCREL64
) },
393 /* C (SH64PCREL16_64, SH64PCREL64) */
394 { 0, 0, SH64PCREL64_LENGTH
, 0 },
395 /* C (SH64PCREL16_64, SH64PCRELPLT) */
396 { 0, 0, SH64PCREL64_LENGTH
, 0 },
398 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
400 /* C (SH64PCREL16PT_32, SH64PCREL16) */
402 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_32
, SH64PCREL32
) },
403 /* C (SH64PCREL16PT_32, SH64PCREL32) */
404 { 0, 0, SH64PCREL32_LENGTH
, 0 },
406 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
407 { 0, 0, SH64PCREL32_LENGTH
, 0 },
409 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
411 /* C (SH64PCREL16PT_64, SH64PCREL16) */
413 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL32
) },
414 /* C (SH64PCREL16PT_64, SH64PCREL32) */
418 C (SH64PCREL16PT_64
, SH64PCREL48
) },
419 /* C (SH64PCREL16PT_64, SH64PCREL48) */
420 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL64
) },
421 /* C (SH64PCREL16PT_64, SH64PCREL64) */
422 { 0, 0, SH64PCREL64_LENGTH
, 0 },
423 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
424 { 0, 0, SH64PCREL64_LENGTH
, 0},
426 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
428 /* C (MOVI_IMM_32, UNDEF_MOVI) */
429 { 0, 0, MOVI_32_LENGTH
, 0 },
430 /* C (MOVI_IMM_32, MOVI_16) */
431 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32
, MOVI_32
) },
432 /* C (MOVI_IMM_32, MOVI_32) */
433 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, 0 },
435 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
436 { 0, 0, MOVI_32_LENGTH
, 0 },
437 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
439 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
441 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32_PCREL
, MOVI_32
) },
442 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
443 { 0, 0, MOVI_32_LENGTH
, 0 },
445 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
446 { 0, 0, MOVI_32_LENGTH
, 0 },
448 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
449 { 0, 0, MOVI_32_LENGTH
, 0 },
450 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
452 /* C (MOVI_IMM_64, UNDEF_MOVI) */
453 { 0, 0, MOVI_64_LENGTH
, 0 },
454 /* C (MOVI_IMM_64, MOVI_16) */
455 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64
, MOVI_32
) },
456 /* C (MOVI_IMM_64, MOVI_32) */
457 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64
, MOVI_48
) },
458 /* C (MOVI_IMM_64, MOVI_48) */
459 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64
, MOVI_64
) },
460 /* C (MOVI_IMM_64, MOVI_64) */
461 { 0, 0, MOVI_64_LENGTH
, 0 },
463 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
464 { 0, 0, MOVI_64_LENGTH
, 0 },
465 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
467 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
469 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_32
) },
470 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
471 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_48
) },
472 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
473 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_64
) },
474 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
475 { 0, 0, MOVI_64_LENGTH
, 0 },
476 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
477 { 0, 0, MOVI_64_LENGTH
, 0 },
479 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
480 { 0, 0, MOVI_64_LENGTH
, 0 },
481 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
483 #endif /* HAVE_SH64 */
489 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
493 /* Determinet whether the symbol needs any kind of PIC relocation. */
496 sh_PIC_related_p (symbolS
*sym
)
503 if (sym
== GOT_symbol
)
507 if (sh_PIC_related_p (*symbol_get_tc (sym
)))
511 exp
= symbol_get_value_expression (sym
);
513 return (exp
->X_op
== O_PIC_reloc
514 || sh_PIC_related_p (exp
->X_add_symbol
)
515 || sh_PIC_related_p (exp
->X_op_symbol
));
518 /* Determine the relocation type to be used to represent the
519 expression, that may be rearranged. */
522 sh_check_fixup (expressionS
*main_exp
, bfd_reloc_code_real_type
*r_type_p
)
524 expressionS
*exp
= main_exp
;
526 /* This is here for backward-compatibility only. GCC used to generated:
528 f@PLT + . - (.LPCS# + 2)
530 but we'd rather be able to handle this as a PIC-related reference
531 plus/minus a symbol. However, gas' parser gives us:
533 O_subtract (O_add (f@PLT, .), .LPCS#+2)
535 so we attempt to transform this into:
537 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
539 which we can handle simply below. */
540 if (exp
->X_op
== O_subtract
)
542 if (sh_PIC_related_p (exp
->X_op_symbol
))
545 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
547 if (exp
&& sh_PIC_related_p (exp
->X_op_symbol
))
550 if (exp
&& exp
->X_op
== O_add
551 && sh_PIC_related_p (exp
->X_add_symbol
))
553 symbolS
*sym
= exp
->X_add_symbol
;
555 exp
->X_op
= O_subtract
;
556 exp
->X_add_symbol
= main_exp
->X_op_symbol
;
558 main_exp
->X_op_symbol
= main_exp
->X_add_symbol
;
559 main_exp
->X_add_symbol
= sym
;
561 main_exp
->X_add_number
+= exp
->X_add_number
;
562 exp
->X_add_number
= 0;
567 else if (exp
->X_op
== O_add
&& sh_PIC_related_p (exp
->X_op_symbol
))
570 if (exp
->X_op
== O_symbol
|| exp
->X_op
== O_add
|| exp
->X_op
== O_subtract
)
573 if (exp
->X_add_symbol
574 && (exp
->X_add_symbol
== GOT_symbol
576 && *symbol_get_tc (exp
->X_add_symbol
) == GOT_symbol
)))
580 case BFD_RELOC_SH_IMM_LOW16
:
581 *r_type_p
= BFD_RELOC_SH_GOTPC_LOW16
;
584 case BFD_RELOC_SH_IMM_MEDLOW16
:
585 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDLOW16
;
588 case BFD_RELOC_SH_IMM_MEDHI16
:
589 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDHI16
;
592 case BFD_RELOC_SH_IMM_HI16
:
593 *r_type_p
= BFD_RELOC_SH_GOTPC_HI16
;
597 case BFD_RELOC_UNUSED
:
598 *r_type_p
= BFD_RELOC_SH_GOTPC
;
607 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
609 *r_type_p
= BFD_RELOC_SH_GOTPC
;
613 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
618 if (exp
->X_op
== O_PIC_reloc
)
623 case BFD_RELOC_UNUSED
:
624 *r_type_p
= exp
->X_md
;
627 case BFD_RELOC_SH_DISP20
:
630 case BFD_RELOC_32_GOT_PCREL
:
631 *r_type_p
= BFD_RELOC_SH_GOT20
;
634 case BFD_RELOC_32_GOTOFF
:
635 *r_type_p
= BFD_RELOC_SH_GOTOFF20
;
638 case BFD_RELOC_SH_GOTFUNCDESC
:
639 *r_type_p
= BFD_RELOC_SH_GOTFUNCDESC20
;
642 case BFD_RELOC_SH_GOTOFFFUNCDESC
:
643 *r_type_p
= BFD_RELOC_SH_GOTOFFFUNCDESC20
;
652 case BFD_RELOC_SH_IMM_LOW16
:
655 case BFD_RELOC_32_GOTOFF
:
656 *r_type_p
= BFD_RELOC_SH_GOTOFF_LOW16
;
659 case BFD_RELOC_SH_GOTPLT32
:
660 *r_type_p
= BFD_RELOC_SH_GOTPLT_LOW16
;
663 case BFD_RELOC_32_GOT_PCREL
:
664 *r_type_p
= BFD_RELOC_SH_GOT_LOW16
;
667 case BFD_RELOC_32_PLT_PCREL
:
668 *r_type_p
= BFD_RELOC_SH_PLT_LOW16
;
676 case BFD_RELOC_SH_IMM_MEDLOW16
:
679 case BFD_RELOC_32_GOTOFF
:
680 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDLOW16
;
683 case BFD_RELOC_SH_GOTPLT32
:
684 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDLOW16
;
687 case BFD_RELOC_32_GOT_PCREL
:
688 *r_type_p
= BFD_RELOC_SH_GOT_MEDLOW16
;
691 case BFD_RELOC_32_PLT_PCREL
:
692 *r_type_p
= BFD_RELOC_SH_PLT_MEDLOW16
;
700 case BFD_RELOC_SH_IMM_MEDHI16
:
703 case BFD_RELOC_32_GOTOFF
:
704 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDHI16
;
707 case BFD_RELOC_SH_GOTPLT32
:
708 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDHI16
;
711 case BFD_RELOC_32_GOT_PCREL
:
712 *r_type_p
= BFD_RELOC_SH_GOT_MEDHI16
;
715 case BFD_RELOC_32_PLT_PCREL
:
716 *r_type_p
= BFD_RELOC_SH_PLT_MEDHI16
;
724 case BFD_RELOC_SH_IMM_HI16
:
727 case BFD_RELOC_32_GOTOFF
:
728 *r_type_p
= BFD_RELOC_SH_GOTOFF_HI16
;
731 case BFD_RELOC_SH_GOTPLT32
:
732 *r_type_p
= BFD_RELOC_SH_GOTPLT_HI16
;
735 case BFD_RELOC_32_GOT_PCREL
:
736 *r_type_p
= BFD_RELOC_SH_GOT_HI16
;
739 case BFD_RELOC_32_PLT_PCREL
:
740 *r_type_p
= BFD_RELOC_SH_PLT_HI16
;
753 exp
->X_op
= O_symbol
;
756 main_exp
->X_add_symbol
= exp
->X_add_symbol
;
757 main_exp
->X_add_number
+= exp
->X_add_number
;
761 return (sh_PIC_related_p (exp
->X_add_symbol
)
762 || sh_PIC_related_p (exp
->X_op_symbol
));
767 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
770 sh_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
)
772 bfd_reloc_code_real_type r_type
= BFD_RELOC_UNUSED
;
774 if (sh_check_fixup (exp
, &r_type
))
775 as_bad (_("Invalid PIC expression."));
777 if (r_type
== BFD_RELOC_UNUSED
)
781 r_type
= BFD_RELOC_8
;
785 r_type
= BFD_RELOC_16
;
789 r_type
= BFD_RELOC_32
;
794 r_type
= BFD_RELOC_64
;
804 as_bad (_("unsupported BFD relocation size %u"), size
);
805 r_type
= BFD_RELOC_UNUSED
;
808 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
811 /* The regular cons() function, that reads constants, doesn't support
812 suffixes such as @GOT, @GOTOFF and @PLT, that generate
813 machine-specific relocation types. So we must define it here. */
814 /* Clobbers input_line_pointer, checks end-of-line. */
815 /* NBYTES 1=.byte, 2=.word, 4=.long */
817 sh_elf_cons (register int nbytes
)
823 /* Update existing range to include a previous insn, if there was one. */
824 sh64_update_contents_mark (TRUE
);
826 /* We need to make sure the contents type is set to data. */
829 #endif /* HAVE_SH64 */
831 if (is_it_end_of_statement ())
833 demand_empty_rest_of_line ();
838 md_cons_align (nbytes
);
844 emit_expr (&exp
, (unsigned int) nbytes
);
846 while (*input_line_pointer
++ == ',');
848 input_line_pointer
--; /* Put terminator back into stream. */
849 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
851 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
854 demand_empty_rest_of_line ();
857 /* The regular frag_offset_fixed_p doesn't work for rs_align_test
861 align_test_frag_offset_fixed_p (const fragS
*frag1
, const fragS
*frag2
,
867 /* Start with offset initialised to difference between the two frags.
868 Prior to assigning frag addresses this will be zero. */
869 off
= frag1
->fr_address
- frag2
->fr_address
;
876 /* Maybe frag2 is after frag1. */
878 while (frag
->fr_type
== rs_fill
879 || frag
->fr_type
== rs_align_test
)
881 if (frag
->fr_type
== rs_fill
)
882 off
+= frag
->fr_fix
+ frag
->fr_offset
* frag
->fr_var
;
885 frag
= frag
->fr_next
;
895 /* Maybe frag1 is after frag2. */
896 off
= frag1
->fr_address
- frag2
->fr_address
;
898 while (frag
->fr_type
== rs_fill
899 || frag
->fr_type
== rs_align_test
)
901 if (frag
->fr_type
== rs_fill
)
902 off
-= frag
->fr_fix
+ frag
->fr_offset
* frag
->fr_var
;
905 frag
= frag
->fr_next
;
918 /* Optimize a difference of symbols which have rs_align_test frag if
922 sh_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
927 && l
->X_op
== O_symbol
928 && r
->X_op
== O_symbol
929 && S_GET_SEGMENT (l
->X_add_symbol
) == S_GET_SEGMENT (r
->X_add_symbol
)
930 && (SEG_NORMAL (S_GET_SEGMENT (l
->X_add_symbol
))
931 || r
->X_add_symbol
== l
->X_add_symbol
)
932 && align_test_frag_offset_fixed_p (symbol_get_frag (l
->X_add_symbol
),
933 symbol_get_frag (r
->X_add_symbol
),
936 l
->X_add_number
-= r
->X_add_number
;
937 l
->X_add_number
-= frag_off
/ OCTETS_PER_BYTE
;
938 l
->X_add_number
+= (S_GET_VALUE (l
->X_add_symbol
)
939 - S_GET_VALUE (r
->X_add_symbol
));
940 l
->X_op
= O_constant
;
948 /* This function is called once, at assembler startup time. This should
949 set up all the tables, etc that the MD part of the assembler needs. */
954 const sh_opcode_info
*opcode
;
955 char *prev_name
= "";
956 unsigned int target_arch
;
959 = preset_target_arch
? preset_target_arch
: arch_sh_up
& ~arch_sh_has_dsp
;
960 valid_arch
= target_arch
;
966 opcode_hash_control
= hash_new ();
968 /* Insert unique names into hash table. */
969 for (opcode
= sh_table
; opcode
->name
; opcode
++)
971 if (strcmp (prev_name
, opcode
->name
) != 0)
973 if (!SH_MERGE_ARCH_SET_VALID (opcode
->arch
, target_arch
))
975 prev_name
= opcode
->name
;
976 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
983 static int reg_x
, reg_y
;
987 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
989 /* Try to parse a reg name. Return the number of chars consumed. */
992 parse_reg_without_prefix (char *src
, int *mode
, int *reg
)
994 char l0
= TOLOWER (src
[0]);
995 char l1
= l0
? TOLOWER (src
[1]) : 0;
997 /* We use ! IDENT_CHAR for the next character after the register name, to
998 make sure that we won't accidentally recognize a symbol name such as
999 'sram' or sr_ram as being a reference to the register 'sr'. */
1005 if (src
[2] >= '0' && src
[2] <= '5'
1006 && ! IDENT_CHAR ((unsigned char) src
[3]))
1009 *reg
= 10 + src
[2] - '0';
1013 if (l1
>= '0' && l1
<= '9'
1014 && ! IDENT_CHAR ((unsigned char) src
[2]))
1020 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
1021 && ! IDENT_CHAR ((unsigned char) src
[7]))
1028 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
1033 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
1044 if (! IDENT_CHAR ((unsigned char) src
[2]))
1050 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
1059 if (! IDENT_CHAR ((unsigned char) src
[2]))
1065 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
1073 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
1074 && ! IDENT_CHAR ((unsigned char) src
[3]))
1077 *reg
= 4 + (l1
- '0');
1080 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
1081 && ! IDENT_CHAR ((unsigned char) src
[3]))
1084 *reg
= 6 + (l1
- '0');
1087 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
1088 && ! IDENT_CHAR ((unsigned char) src
[3]))
1093 *reg
= n
| ((~n
& 2) << 1);
1098 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[2]))
1120 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
1121 && ! IDENT_CHAR ((unsigned char) src
[2]))
1124 *reg
= A_X0_NUM
+ l1
- '0';
1128 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
1129 && ! IDENT_CHAR ((unsigned char) src
[2]))
1132 *reg
= A_Y0_NUM
+ l1
- '0';
1136 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
1137 && ! IDENT_CHAR ((unsigned char) src
[2]))
1140 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
1146 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
1152 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
1153 && ! IDENT_CHAR ((unsigned char) src
[3]))
1159 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
1160 && ! IDENT_CHAR ((unsigned char) src
[3]))
1166 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
1167 && ! IDENT_CHAR ((unsigned char) src
[3]))
1173 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1174 && ! IDENT_CHAR ((unsigned char) src
[3]))
1180 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1186 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
1193 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1198 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
1200 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1201 and use an uninitialized immediate. */
1205 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1206 && ! IDENT_CHAR ((unsigned char) src
[3]))
1211 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1212 && ! IDENT_CHAR ((unsigned char) src
[3]))
1218 if (l0
== 't' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1219 && ! IDENT_CHAR ((unsigned char) src
[3]))
1224 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
1225 && ! IDENT_CHAR ((unsigned char) src
[4]))
1227 if (TOLOWER (src
[3]) == 'l')
1232 if (TOLOWER (src
[3]) == 'h')
1238 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
1239 && ! IDENT_CHAR ((unsigned char) src
[3]))
1244 if (l0
== 'f' && l1
== 'r')
1248 if (src
[3] >= '0' && src
[3] <= '5'
1249 && ! IDENT_CHAR ((unsigned char) src
[4]))
1252 *reg
= 10 + src
[3] - '0';
1256 if (src
[2] >= '0' && src
[2] <= '9'
1257 && ! IDENT_CHAR ((unsigned char) src
[3]))
1260 *reg
= (src
[2] - '0');
1264 if (l0
== 'd' && l1
== 'r')
1268 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1269 && ! IDENT_CHAR ((unsigned char) src
[4]))
1272 *reg
= 10 + src
[3] - '0';
1276 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1277 && ! IDENT_CHAR ((unsigned char) src
[3]))
1280 *reg
= (src
[2] - '0');
1284 if (l0
== 'x' && l1
== 'd')
1288 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1289 && ! IDENT_CHAR ((unsigned char) src
[4]))
1292 *reg
= 11 + src
[3] - '0';
1296 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1297 && ! IDENT_CHAR ((unsigned char) src
[3]))
1300 *reg
= (src
[2] - '0') + 1;
1304 if (l0
== 'f' && l1
== 'v')
1306 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
1312 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
1313 && ! IDENT_CHAR ((unsigned char) src
[3]))
1316 *reg
= (src
[2] - '0');
1320 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
1321 && TOLOWER (src
[3]) == 'l'
1322 && ! IDENT_CHAR ((unsigned char) src
[4]))
1328 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
1329 && TOLOWER (src
[3]) == 'c'
1330 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
1336 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
1337 && TOLOWER (src
[3]) == 'r'
1338 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
1347 /* Like parse_reg_without_prefix, but this version supports
1348 $-prefixed register names if enabled by the user. */
1351 parse_reg (char *src
, int *mode
, int *reg
)
1353 unsigned int prefix
;
1354 unsigned int consumed
;
1358 if (allow_dollar_register_prefix
)
1369 consumed
= parse_reg_without_prefix (src
, mode
, reg
);
1374 return consumed
+ prefix
;
1378 parse_exp (char *s
, sh_operand_info
*op
)
1383 save
= input_line_pointer
;
1384 input_line_pointer
= s
;
1385 expression (&op
->immediate
);
1386 if (op
->immediate
.X_op
== O_absent
)
1387 as_bad (_("missing operand"));
1388 new_pointer
= input_line_pointer
;
1389 input_line_pointer
= save
;
1393 /* The many forms of operand:
1396 @Rn Register indirect
1409 pr, gbr, vbr, macl, mach
1413 parse_at (char *src
, sh_operand_info
*op
)
1420 src
= parse_at (src
, op
);
1421 if (op
->type
== A_DISP_TBR
)
1422 op
->type
= A_DISP2_TBR
;
1424 as_bad (_("illegal double indirection"));
1426 else if (src
[0] == '-')
1428 /* Must be predecrement. */
1431 len
= parse_reg (src
, &mode
, &(op
->reg
));
1432 if (mode
!= A_REG_N
)
1433 as_bad (_("illegal register after @-"));
1438 else if (src
[0] == '(')
1440 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1443 len
= parse_reg (src
, &mode
, &(op
->reg
));
1444 if (len
&& mode
== A_REG_N
)
1449 as_bad (_("must be @(r0,...)"));
1454 /* Now can be rn or gbr. */
1455 len
= parse_reg (src
, &mode
, &(op
->reg
));
1465 op
->type
= A_R0_GBR
;
1467 else if (mode
== A_REG_N
)
1469 op
->type
= A_IND_R0_REG_N
;
1473 as_bad (_("syntax error in @(r0,...)"));
1478 as_bad (_("syntax error in @(r0...)"));
1483 /* Must be an @(disp,.. thing). */
1484 src
= parse_exp (src
, op
);
1487 /* Now can be rn, gbr or pc. */
1488 len
= parse_reg (src
, &mode
, &op
->reg
);
1491 if (mode
== A_REG_N
)
1493 op
->type
= A_DISP_REG_N
;
1495 else if (mode
== A_GBR
)
1497 op
->type
= A_DISP_GBR
;
1499 else if (mode
== A_TBR
)
1501 op
->type
= A_DISP_TBR
;
1503 else if (mode
== A_PC
)
1505 /* We want @(expr, pc) to uniformly address . + expr,
1506 no matter if expr is a constant, or a more complex
1507 expression, e.g. sym-. or sym1-sym2.
1508 However, we also used to accept @(sym,pc)
1509 as addressing sym, i.e. meaning the same as plain sym.
1510 Some existing code does use the @(sym,pc) syntax, so
1511 we give it the old semantics for now, but warn about
1512 its use, so that users have some time to fix their code.
1514 Note that due to this backward compatibility hack,
1515 we'll get unexpected results when @(offset, pc) is used,
1516 and offset is a symbol that is set later to an an address
1517 difference, or an external symbol that is set to an
1518 address difference in another source file, so we want to
1519 eventually remove it. */
1520 if (op
->immediate
.X_op
== O_symbol
)
1522 op
->type
= A_DISP_PC
;
1523 as_warn (_("Deprecated syntax."));
1527 op
->type
= A_DISP_PC_ABS
;
1528 /* Such operands don't get corrected for PC==.+4, so
1529 make the correction here. */
1530 op
->immediate
.X_add_number
-= 4;
1535 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1540 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1545 as_bad (_("expecting )"));
1551 src
+= parse_reg (src
, &mode
, &(op
->reg
));
1552 if (mode
!= A_REG_N
)
1553 as_bad (_("illegal register after @"));
1560 l0
= TOLOWER (src
[0]);
1561 l1
= TOLOWER (src
[1]);
1563 if ((l0
== 'r' && l1
== '8')
1564 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1567 op
->type
= AX_PMOD_N
;
1569 else if ( (l0
== 'r' && l1
== '9')
1570 || (l0
== 'i' && l1
== 'y'))
1573 op
->type
= AY_PMOD_N
;
1585 get_operand (char **ptr
, sh_operand_info
*op
)
1594 *ptr
= parse_exp (src
, op
);
1599 else if (src
[0] == '@')
1601 *ptr
= parse_at (src
, op
);
1604 len
= parse_reg (src
, &mode
, &(op
->reg
));
1613 /* Not a reg, the only thing left is a displacement. */
1614 *ptr
= parse_exp (src
, op
);
1615 op
->type
= A_DISP_PC
;
1621 get_operands (sh_opcode_info
*info
, char *args
, sh_operand_info
*operand
)
1626 /* The pre-processor will eliminate whitespace in front of '@'
1627 after the first argument; we may be called multiple times
1628 from assemble_ppi, so don't insist on finding whitespace here. */
1632 get_operand (&ptr
, operand
+ 0);
1639 get_operand (&ptr
, operand
+ 1);
1640 /* ??? Hack: psha/pshl have a varying operand number depending on
1641 the type of the first operand. We handle this by having the
1642 three-operand version first and reducing the number of operands
1643 parsed to two if we see that the first operand is an immediate.
1644 This works because no insn with three operands has an immediate
1645 as first operand. */
1646 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1652 get_operand (&ptr
, operand
+ 2);
1656 operand
[2].type
= 0;
1661 operand
[1].type
= 0;
1662 operand
[2].type
= 0;
1667 operand
[0].type
= 0;
1668 operand
[1].type
= 0;
1669 operand
[2].type
= 0;
1674 /* Passed a pointer to a list of opcodes which use different
1675 addressing modes, return the opcode which matches the opcodes
1678 static sh_opcode_info
*
1679 get_specific (sh_opcode_info
*opcode
, sh_operand_info
*operands
)
1681 sh_opcode_info
*this_try
= opcode
;
1682 char *name
= opcode
->name
;
1685 while (opcode
->name
)
1687 this_try
= opcode
++;
1688 if ((this_try
->name
!= name
) && (strcmp (this_try
->name
, name
) != 0))
1690 /* We've looked so far down the table that we've run out of
1691 opcodes with the same name. */
1695 /* Look at both operands needed by the opcodes and provided by
1696 the user - since an arg test will often fail on the same arg
1697 again and again, we'll try and test the last failing arg the
1698 first on each opcode try. */
1699 for (n
= 0; this_try
->arg
[n
]; n
++)
1701 sh_operand_info
*user
= operands
+ n
;
1702 sh_arg_type arg
= this_try
->arg
[n
];
1707 if (user
->type
== A_DISP_PC_ABS
)
1718 if (user
->type
!= arg
)
1722 /* opcode needs r0 */
1723 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1727 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1731 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1739 case A_IND_R0_REG_N
:
1748 /* Opcode needs rn */
1749 if (user
->type
!= arg
)
1754 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1770 if (user
->type
!= arg
)
1775 if (user
->type
!= arg
)
1781 if (user
->type
!= A_INC_N
)
1783 if (user
->reg
!= 15)
1789 if (user
->type
!= A_DEC_N
)
1791 if (user
->reg
!= 15)
1800 case A_IND_R0_REG_M
:
1803 /* Opcode needs rn */
1804 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1810 if (user
->type
!= A_DEC_N
)
1812 if (user
->reg
< 2 || user
->reg
> 5)
1818 if (user
->type
!= A_INC_N
)
1820 if (user
->reg
< 2 || user
->reg
> 5)
1826 if (user
->type
!= A_IND_N
)
1828 if (user
->reg
< 2 || user
->reg
> 5)
1834 if (user
->type
!= AX_PMOD_N
)
1836 if (user
->reg
< 2 || user
->reg
> 5)
1842 if (user
->type
!= A_INC_N
)
1844 if (user
->reg
< 4 || user
->reg
> 5)
1850 if (user
->type
!= A_IND_N
)
1852 if (user
->reg
< 4 || user
->reg
> 5)
1858 if (user
->type
!= AX_PMOD_N
)
1860 if (user
->reg
< 4 || user
->reg
> 5)
1866 if (user
->type
!= A_INC_N
)
1868 if ((user
->reg
< 4 || user
->reg
> 5)
1869 && (user
->reg
< 0 || user
->reg
> 1))
1875 if (user
->type
!= A_IND_N
)
1877 if ((user
->reg
< 4 || user
->reg
> 5)
1878 && (user
->reg
< 0 || user
->reg
> 1))
1884 if (user
->type
!= AX_PMOD_N
)
1886 if ((user
->reg
< 4 || user
->reg
> 5)
1887 && (user
->reg
< 0 || user
->reg
> 1))
1893 if (user
->type
!= A_INC_N
)
1895 if (user
->reg
< 6 || user
->reg
> 7)
1901 if (user
->type
!= A_IND_N
)
1903 if (user
->reg
< 6 || user
->reg
> 7)
1909 if (user
->type
!= AY_PMOD_N
)
1911 if (user
->reg
< 6 || user
->reg
> 7)
1917 if (user
->type
!= A_INC_N
)
1919 if ((user
->reg
< 6 || user
->reg
> 7)
1920 && (user
->reg
< 2 || user
->reg
> 3))
1926 if (user
->type
!= A_IND_N
)
1928 if ((user
->reg
< 6 || user
->reg
> 7)
1929 && (user
->reg
< 2 || user
->reg
> 3))
1935 if (user
->type
!= AY_PMOD_N
)
1937 if ((user
->reg
< 6 || user
->reg
> 7)
1938 && (user
->reg
< 2 || user
->reg
> 3))
1944 if (user
->type
!= DSP_REG_N
)
1946 if (user
->reg
!= A_A0_NUM
1947 && user
->reg
!= A_A1_NUM
)
1953 if (user
->type
!= DSP_REG_N
)
1975 if (user
->type
!= DSP_REG_N
)
1997 if (user
->type
!= DSP_REG_N
)
2019 if (user
->type
!= DSP_REG_N
)
2041 if (user
->type
!= DSP_REG_N
)
2063 if (user
->type
!= DSP_REG_N
)
2085 if (user
->type
!= DSP_REG_N
)
2107 if (user
->type
!= DSP_REG_N
)
2129 if (user
->type
!= DSP_REG_N
)
2151 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
2155 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
2159 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
2163 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
2167 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
2177 /* Opcode needs rn */
2178 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
2183 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
2188 if (user
->type
!= XMTRX_M4
)
2194 printf (_("unhandled %d\n"), arg
);
2197 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh2a_nofpu_up
)
2198 && ( arg
== A_DISP_REG_M
2199 || arg
== A_DISP_REG_N
))
2201 /* Check a few key IMM* fields for overflow. */
2203 long val
= user
->immediate
.X_add_number
;
2205 for (opf
= 0; opf
< 4; opf
++)
2206 switch (this_try
->nibbles
[opf
])
2210 if (val
< 0 || val
> 15)
2215 if (val
< 0 || val
> 15 * 2)
2220 if (val
< 0 || val
> 15 * 4)
2228 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch
, this_try
->arch
))
2230 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, this_try
->arch
);
2240 insert (char *where
, int how
, int pcrel
, sh_operand_info
*op
)
2242 fix_new_exp (frag_now
,
2243 where
- frag_now
->fr_literal
,
2251 insert4 (char * where
, int how
, int pcrel
, sh_operand_info
* op
)
2253 fix_new_exp (frag_now
,
2254 where
- frag_now
->fr_literal
,
2261 build_relax (sh_opcode_info
*opcode
, sh_operand_info
*op
)
2263 int high_byte
= target_big_endian
? 0 : 1;
2266 if (opcode
->arg
[0] == A_BDISP8
)
2268 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
2269 p
= frag_var (rs_machine_dependent
,
2270 md_relax_table
[C (what
, COND32
)].rlx_length
,
2271 md_relax_table
[C (what
, COND8
)].rlx_length
,
2273 op
->immediate
.X_add_symbol
,
2274 op
->immediate
.X_add_number
,
2276 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
2278 else if (opcode
->arg
[0] == A_BDISP12
)
2280 p
= frag_var (rs_machine_dependent
,
2281 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
2282 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
2284 op
->immediate
.X_add_symbol
,
2285 op
->immediate
.X_add_number
,
2287 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
2292 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
2295 insert_loop_bounds (char *output
, sh_operand_info
*operand
)
2300 /* Since the low byte of the opcode will be overwritten by the reloc, we
2301 can just stash the high byte into both bytes and ignore endianness. */
2304 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2305 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2309 static int count
= 0;
2311 /* If the last loop insn is a two-byte-insn, it is in danger of being
2312 swapped with the insn after it. To prevent this, create a new
2313 symbol - complete with SH_LABEL reloc - after the last loop insn.
2314 If the last loop insn is four bytes long, the symbol will be
2315 right in the middle, but four byte insns are not swapped anyways. */
2316 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
2317 Hence a 9 digit number should be enough to count all REPEATs. */
2319 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
2320 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
2321 /* Make this a local symbol. */
2323 SF_SET_LOCAL (end_sym
);
2324 #endif /* OBJ_COFF */
2325 symbol_table_insert (end_sym
);
2326 end_sym
->sy_value
= operand
[1].immediate
;
2327 end_sym
->sy_value
.X_add_number
+= 2;
2328 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
2331 output
= frag_more (2);
2334 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2335 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2337 return frag_more (2);
2340 /* Now we know what sort of opcodes it is, let's build the bytes. */
2343 build_Mytes (sh_opcode_info
*opcode
, sh_operand_info
*operand
)
2348 unsigned int size
= 2;
2349 int low_byte
= target_big_endian
? 1 : 0;
2351 bfd_reloc_code_real_type r_type
;
2353 int unhandled_pic
= 0;
2366 for (indx
= 0; indx
< 3; indx
++)
2367 if (opcode
->arg
[indx
] == A_IMM
2368 && operand
[indx
].type
== A_IMM
2369 && (operand
[indx
].immediate
.X_op
== O_PIC_reloc
2370 || sh_PIC_related_p (operand
[indx
].immediate
.X_add_symbol
)
2371 || sh_PIC_related_p (operand
[indx
].immediate
.X_op_symbol
)))
2375 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2377 output
= frag_more (4);
2382 output
= frag_more (2);
2384 for (indx
= 0; indx
< max_index
; indx
++)
2386 sh_nibble_type i
= opcode
->nibbles
[indx
];
2403 if (reg_n
< 2 || reg_n
> 5)
2404 as_bad (_("Invalid register: 'r%d'"), reg_n
);
2405 nbuf
[indx
] = (reg_n
& 3) | 4;
2408 nbuf
[indx
] = reg_n
| (reg_m
>> 2);
2411 nbuf
[indx
] = reg_b
| 0x08;
2414 nbuf
[indx
] = reg_n
| 0x01;
2419 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3
, 0, operand
);
2424 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3U
, 0, operand
);
2427 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
);
2430 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
);
2433 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
);
2436 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
);
2439 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
+1);
2442 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
+1);
2445 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
+1);
2448 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
+1);
2453 r_type
= BFD_RELOC_SH_DISP20
;
2455 if (sh_check_fixup (&operand
->immediate
, &r_type
))
2456 as_bad (_("Invalid PIC expression."));
2459 insert4 (output
, r_type
, 0, operand
);
2462 insert4 (output
, BFD_RELOC_SH_DISP20BY8
, 0, operand
);
2465 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
2468 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
2471 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
2474 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
2477 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
2480 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
2483 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
2486 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
2489 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
2492 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
2495 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
2498 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
2501 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
,
2502 operand
->type
!= A_DISP_PC_ABS
, operand
);
2505 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
,
2506 operand
->type
!= A_DISP_PC_ABS
, operand
);
2509 output
= insert_loop_bounds (output
, operand
);
2510 nbuf
[indx
] = opcode
->nibbles
[3];
2514 printf (_("failed for %d\n"), i
);
2520 as_bad (_("misplaced PIC operand"));
2522 if (!target_big_endian
)
2524 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
2525 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
2529 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
2530 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
2532 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2534 if (!target_big_endian
)
2536 output
[3] = (nbuf
[4] << 4) | (nbuf
[5]);
2537 output
[2] = (nbuf
[6] << 4) | (nbuf
[7]);
2541 output
[2] = (nbuf
[4] << 4) | (nbuf
[5]);
2542 output
[3] = (nbuf
[6] << 4) | (nbuf
[7]);
2548 /* Find an opcode at the start of *STR_P in the hash table, and set
2549 *STR_P to the first character after the last one read. */
2551 static sh_opcode_info
*
2552 find_cooked_opcode (char **str_p
)
2555 unsigned char *op_start
;
2556 unsigned char *op_end
;
2558 unsigned int nlen
= 0;
2560 /* Drop leading whitespace. */
2564 /* Find the op code end.
2565 The pre-processor will eliminate whitespace in front of
2566 any '@' after the first argument; we may be called from
2567 assemble_ppi, so the opcode might be terminated by an '@'. */
2568 for (op_start
= op_end
= (unsigned char *) str
;
2570 && nlen
< sizeof (name
) - 1
2571 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
2574 unsigned char c
= op_start
[nlen
];
2576 /* The machine independent code will convert CMP/EQ into cmp/EQ
2577 because it thinks the '/' is the end of the symbol. Moreover,
2578 all but the first sub-insn is a parallel processing insn won't
2579 be capitalized. Instead of hacking up the machine independent
2580 code, we just deal with it here. */
2587 *str_p
= (char *) op_end
;
2590 as_bad (_("can't find opcode "));
2592 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
2595 /* Assemble a parallel processing insn. */
2596 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2599 assemble_ppi (char *op_end
, sh_opcode_info
*opcode
)
2611 sh_operand_info operand
[3];
2613 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2614 Make sure we encode a defined insn pattern. */
2619 if (opcode
->arg
[0] != A_END
)
2620 op_end
= get_operands (opcode
, op_end
, operand
);
2622 opcode
= get_specific (opcode
, operand
);
2625 /* Couldn't find an opcode which matched the operands. */
2626 char *where
= frag_more (2);
2631 as_bad (_("invalid operands for opcode"));
2635 if (opcode
->nibbles
[0] != PPI
)
2636 as_bad (_("insn can't be combined with parallel processing insn"));
2638 switch (opcode
->nibbles
[1])
2643 as_bad (_("multiple movx specifications"));
2648 as_bad (_("multiple movy specifications"));
2654 as_bad (_("multiple movx specifications"));
2655 if ((reg_n
< 4 || reg_n
> 5)
2656 && (reg_n
< 0 || reg_n
> 1))
2657 as_bad (_("invalid movx address register"));
2658 if (movy
&& movy
!= DDT_BASE
)
2659 as_bad (_("insn cannot be combined with non-nopy"));
2660 movx
= ((((reg_n
& 1) != 0) << 9)
2661 + (((reg_n
& 4) == 0) << 8)
2663 + (opcode
->nibbles
[2] << 4)
2664 + opcode
->nibbles
[3]
2670 as_bad (_("multiple movy specifications"));
2671 if ((reg_n
< 6 || reg_n
> 7)
2672 && (reg_n
< 2 || reg_n
> 3))
2673 as_bad (_("invalid movy address register"));
2674 if (movx
&& movx
!= DDT_BASE
)
2675 as_bad (_("insn cannot be combined with non-nopx"));
2676 movy
= ((((reg_n
& 1) != 0) << 8)
2677 + (((reg_n
& 4) == 0) << 9)
2679 + (opcode
->nibbles
[2] << 4)
2680 + opcode
->nibbles
[3]
2686 as_bad (_("multiple movx specifications"));
2688 as_bad (_("previous movy requires nopx"));
2689 if (reg_n
< 4 || reg_n
> 5)
2690 as_bad (_("invalid movx address register"));
2691 if (opcode
->nibbles
[2] & 8)
2693 if (reg_m
== A_A1_NUM
)
2695 else if (reg_m
!= A_A0_NUM
)
2696 as_bad (_("invalid movx dsp register"));
2701 as_bad (_("invalid movx dsp register"));
2704 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
2709 as_bad (_("multiple movy specifications"));
2711 as_bad (_("previous movx requires nopy"));
2712 if (opcode
->nibbles
[2] & 8)
2714 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2717 if (reg_m
== A_A1_NUM
)
2719 else if (reg_m
!= A_A0_NUM
)
2720 as_bad (_("invalid movy dsp register"));
2725 as_bad (_("invalid movy dsp register"));
2728 if (reg_n
< 6 || reg_n
> 7)
2729 as_bad (_("invalid movy address register"));
2730 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
2734 if (operand
[0].immediate
.X_op
!= O_constant
)
2735 as_bad (_("dsp immediate shift value not constant"));
2736 field_b
= ((opcode
->nibbles
[2] << 12)
2737 | (operand
[0].immediate
.X_add_number
& 127) << 4
2744 goto try_another_opcode
;
2749 as_bad (_("multiple parallel processing specifications"));
2750 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2751 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2752 switch (opcode
->nibbles
[4])
2760 field_b
+= opcode
->nibbles
[4] << 4;
2768 as_bad (_("multiple condition specifications"));
2769 cond
= opcode
->nibbles
[2] << 8;
2771 goto skip_cond_check
;
2775 as_bad (_("multiple parallel processing specifications"));
2776 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2777 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2779 switch (opcode
->nibbles
[4])
2787 field_b
+= opcode
->nibbles
[4] << 4;
2796 if ((field_b
& 0xef00) == 0xa100)
2798 /* pclr Dz pmuls Se,Sf,Dg */
2799 else if ((field_b
& 0xff00) == 0x8d00
2800 && (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh4al_dsp_up
)))
2802 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, arch_sh4al_dsp_up
);
2806 as_bad (_("insn cannot be combined with pmuls"));
2807 switch (field_b
& 0xf)
2810 field_b
+= 0 - A_X0_NUM
;
2813 field_b
+= 1 - A_Y0_NUM
;
2816 field_b
+= 2 - A_A0_NUM
;
2819 field_b
+= 3 - A_A1_NUM
;
2822 as_bad (_("bad combined pmuls output operand"));
2824 /* Generate warning if the destination register for padd / psub
2825 and pmuls is the same ( only for A0 or A1 ).
2826 If the last nibble is 1010 then A0 is used in both
2827 padd / psub and pmuls. If it is 1111 then A1 is used
2828 as destination register in both padd / psub and pmuls. */
2830 if ((((field_b
| reg_efg
) & 0x000F) == 0x000A)
2831 || (((field_b
| reg_efg
) & 0x000F) == 0x000F))
2832 as_warn (_("destination register is same for parallel insns"));
2834 field_b
+= 0x4000 + reg_efg
;
2841 as_bad (_("condition not followed by conditionalizable insn"));
2847 opcode
= find_cooked_opcode (&op_end
);
2851 (_("unrecognized characters at end of parallel processing insn")));
2856 move_code
= movx
| movy
;
2859 /* Parallel processing insn. */
2860 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
2862 output
= frag_more (4);
2864 if (! target_big_endian
)
2866 output
[3] = ppi_code
>> 8;
2867 output
[2] = ppi_code
;
2871 output
[2] = ppi_code
>> 8;
2872 output
[3] = ppi_code
;
2874 move_code
|= 0xf800;
2878 /* Just a double data transfer. */
2879 output
= frag_more (2);
2882 if (! target_big_endian
)
2884 output
[1] = move_code
>> 8;
2885 output
[0] = move_code
;
2889 output
[0] = move_code
>> 8;
2890 output
[1] = move_code
;
2895 /* This is the guts of the machine-dependent assembler. STR points to a
2896 machine dependent instruction. This function is supposed to emit
2897 the frags/bytes it assembles to. */
2900 md_assemble (char *str
)
2903 sh_operand_info operand
[3];
2904 sh_opcode_info
*opcode
;
2905 unsigned int size
= 0;
2906 char *initial_str
= str
;
2909 if (sh64_isa_mode
== sh64_isa_shmedia
)
2911 shmedia_md_assemble (str
);
2916 /* If we've seen pseudo-directives, make sure any emitted data or
2917 frags are marked as data. */
2920 sh64_update_contents_mark (TRUE
);
2921 sh64_set_contents_type (CRT_SH5_ISA16
);
2926 #endif /* HAVE_SH64 */
2928 opcode
= find_cooked_opcode (&str
);
2933 /* The opcode is not in the hash table.
2934 This means we definitely have an assembly failure,
2935 but the instruction may be valid in another CPU variant.
2936 In this case emit something better than 'unknown opcode'.
2937 Search the full table in sh-opc.h to check. */
2939 char *name
= initial_str
;
2940 int name_length
= 0;
2941 const sh_opcode_info
*op
;
2944 /* identify opcode in string */
2945 while (ISSPACE (*name
))
2949 while (!ISSPACE (name
[name_length
]))
2954 /* search for opcode in full list */
2955 for (op
= sh_table
; op
->name
; op
++)
2957 if (strncasecmp (op
->name
, name
, name_length
) == 0
2958 && op
->name
[name_length
] == '\0')
2967 as_bad (_("opcode not valid for this cpu variant"));
2971 as_bad (_("unknown opcode"));
2977 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2979 /* Output a CODE reloc to tell the linker that the following
2980 bytes are instructions, not data. */
2981 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2983 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
2986 if (opcode
->nibbles
[0] == PPI
)
2988 size
= assemble_ppi (op_end
, opcode
);
2992 if (opcode
->arg
[0] == A_BDISP12
2993 || opcode
->arg
[0] == A_BDISP8
)
2995 /* Since we skip get_specific here, we have to check & update
2997 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, opcode
->arch
))
2998 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, opcode
->arch
);
3000 as_bad (_("Delayed branches not available on SH1"));
3001 parse_exp (op_end
+ 1, &operand
[0]);
3002 build_relax (opcode
, &operand
[0]);
3004 /* All branches are currently 16 bit. */
3009 if (opcode
->arg
[0] == A_END
)
3011 /* Ignore trailing whitespace. If there is any, it has already
3012 been compressed to a single space. */
3018 op_end
= get_operands (opcode
, op_end
, operand
);
3020 opcode
= get_specific (opcode
, operand
);
3024 /* Couldn't find an opcode which matched the operands. */
3025 char *where
= frag_more (2);
3030 as_bad (_("invalid operands for opcode"));
3035 as_bad (_("excess operands: '%s'"), op_end
);
3037 size
= build_Mytes (opcode
, operand
);
3042 dwarf2_emit_insn (size
);
3045 /* This routine is called each time a label definition is seen. It
3046 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
3049 sh_frob_label (symbolS
*sym
)
3051 static fragS
*last_label_frag
;
3052 static int last_label_offset
;
3055 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
3059 offset
= frag_now_fix ();
3060 if (frag_now
!= last_label_frag
3061 || offset
!= last_label_offset
)
3063 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
3064 last_label_frag
= frag_now
;
3065 last_label_offset
= offset
;
3069 dwarf2_emit_label (sym
);
3072 /* This routine is called when the assembler is about to output some
3073 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
3076 sh_flush_pending_output (void)
3079 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
3081 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
3083 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
3088 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
3093 /* Various routines to kill one day. */
3096 md_atof (int type
, char *litP
, int *sizeP
)
3098 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
3101 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
3102 call instruction. It refers to a label of the instruction which
3103 loads the register which the call uses. We use it to generate a
3104 special reloc for the linker. */
3107 s_uses (int ignore ATTRIBUTE_UNUSED
)
3112 as_warn (_(".uses pseudo-op seen when not relaxing"));
3116 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
3118 as_bad (_("bad .uses format"));
3119 ignore_rest_of_line ();
3123 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
3125 demand_empty_rest_of_line ();
3130 OPTION_RELAX
= OPTION_MD_BASE
,
3137 OPTION_ALLOW_REG_PREFIX
,
3141 OPTION_SHCOMPACT_CONST_CRANGE
,
3149 OPTION_DUMMY
/* Not used. This is just here to make it easy to add and subtract options from this enum. */
3152 const char *md_shortopts
= "";
3153 struct option md_longopts
[] =
3155 {"relax", no_argument
, NULL
, OPTION_RELAX
},
3156 {"big", no_argument
, NULL
, OPTION_BIG
},
3157 {"little", no_argument
, NULL
, OPTION_LITTLE
},
3158 /* The next two switches are here because the
3159 generic parts of the linker testsuite uses them. */
3160 {"EB", no_argument
, NULL
, OPTION_BIG
},
3161 {"EL", no_argument
, NULL
, OPTION_LITTLE
},
3162 {"small", no_argument
, NULL
, OPTION_SMALL
},
3163 {"dsp", no_argument
, NULL
, OPTION_DSP
},
3164 {"isa", required_argument
, NULL
, OPTION_ISA
},
3165 {"renesas", no_argument
, NULL
, OPTION_RENESAS
},
3166 {"allow-reg-prefix", no_argument
, NULL
, OPTION_ALLOW_REG_PREFIX
},
3169 {"abi", required_argument
, NULL
, OPTION_ABI
},
3170 {"no-mix", no_argument
, NULL
, OPTION_NO_MIX
},
3171 {"shcompact-const-crange", no_argument
, NULL
, OPTION_SHCOMPACT_CONST_CRANGE
},
3172 {"no-expand", no_argument
, NULL
, OPTION_NO_EXPAND
},
3173 {"expand-pt32", no_argument
, NULL
, OPTION_PT32
},
3174 #endif /* HAVE_SH64 */
3175 { "h-tick-hex", no_argument
, NULL
, OPTION_H_TICK_HEX
},
3178 {"fdpic", no_argument
, NULL
, OPTION_FDPIC
},
3181 {NULL
, no_argument
, NULL
, 0}
3183 size_t md_longopts_size
= sizeof (md_longopts
);
3186 md_parse_option (int c
, char *arg ATTRIBUTE_UNUSED
)
3195 target_big_endian
= 1;
3199 target_big_endian
= 0;
3207 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
3210 case OPTION_RENESAS
:
3211 dont_adjust_reloc_32
= 1;
3214 case OPTION_ALLOW_REG_PREFIX
:
3215 allow_dollar_register_prefix
= 1;
3219 if (strcasecmp (arg
, "dsp") == 0)
3220 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
3221 else if (strcasecmp (arg
, "fp") == 0)
3222 preset_target_arch
= arch_sh_up
& ~arch_sh_has_dsp
;
3223 else if (strcasecmp (arg
, "any") == 0)
3224 preset_target_arch
= arch_sh_up
;
3226 else if (strcasecmp (arg
, "shmedia") == 0)
3228 if (sh64_isa_mode
== sh64_isa_shcompact
)
3229 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
3230 sh64_isa_mode
= sh64_isa_shmedia
;
3232 else if (strcasecmp (arg
, "shcompact") == 0)
3234 if (sh64_isa_mode
== sh64_isa_shmedia
)
3235 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
3236 if (sh64_abi
== sh64_abi_64
)
3237 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
3238 sh64_isa_mode
= sh64_isa_shcompact
;
3240 #endif /* HAVE_SH64 */
3243 extern const bfd_arch_info_type bfd_sh_arch
;
3244 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
3246 preset_target_arch
= 0;
3247 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
3249 int len
= strlen(bfd_arch
->printable_name
);
3251 if (bfd_arch
->mach
== bfd_mach_sh5
)
3254 if (strncasecmp (bfd_arch
->printable_name
, arg
, len
) != 0)
3257 if (arg
[len
] == '\0')
3258 preset_target_arch
=
3259 sh_get_arch_from_bfd_mach (bfd_arch
->mach
);
3260 else if (strcasecmp(&arg
[len
], "-up") == 0)
3261 preset_target_arch
=
3262 sh_get_arch_up_from_bfd_mach (bfd_arch
->mach
);
3268 if (!preset_target_arch
)
3269 as_bad (_("Invalid argument to --isa option: %s"), arg
);
3275 if (strcmp (arg
, "32") == 0)
3277 if (sh64_abi
== sh64_abi_64
)
3278 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
3279 sh64_abi
= sh64_abi_32
;
3281 else if (strcmp (arg
, "64") == 0)
3283 if (sh64_abi
== sh64_abi_32
)
3284 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
3285 if (sh64_isa_mode
== sh64_isa_shcompact
)
3286 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
3287 sh64_abi
= sh64_abi_64
;
3290 as_bad (_("Invalid argument to --abi option: %s"), arg
);
3297 case OPTION_SHCOMPACT_CONST_CRANGE
:
3298 sh64_shcompact_const_crange
= TRUE
;
3301 case OPTION_NO_EXPAND
:
3302 sh64_expand
= FALSE
;
3308 #endif /* HAVE_SH64 */
3310 case OPTION_H_TICK_HEX
:
3311 enable_h_tick_hex
= 1;
3318 #endif /* OBJ_ELF */
3328 md_show_usage (FILE *stream
)
3330 fprintf (stream
, _("\
3332 --little generate little endian code\n\
3333 --big generate big endian code\n\
3334 --relax alter jump instructions for long displacements\n\
3335 --renesas disable optimization with section symbol for\n\
3336 compatibility with Renesas assembler.\n\
3337 --small align sections to 4 byte boundaries, not 16\n\
3338 --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
3339 --allow-reg-prefix allow '$' as a register name prefix.\n\
3340 --isa=[any use most appropriate isa\n\
3341 | dsp same as '-dsp'\n\
3344 extern const bfd_arch_info_type bfd_sh_arch
;
3345 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
3347 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
3348 if (bfd_arch
->mach
!= bfd_mach_sh5
)
3350 fprintf (stream
, "\n | %s", bfd_arch
->printable_name
);
3351 fprintf (stream
, "\n | %s-up", bfd_arch
->printable_name
);
3354 fprintf (stream
, "]\n");
3356 fprintf (stream
, _("\
3357 --isa=[shmedia set as the default instruction set for SH64\n\
3361 fprintf (stream
, _("\
3362 --abi=[32|64] set size of expanded SHmedia operands and object\n\
3364 --shcompact-const-crange emit code-range descriptors for constants in\n\
3365 SHcompact code sections\n\
3366 --no-mix disallow SHmedia code in the same section as\n\
3367 constants and SHcompact code\n\
3368 --no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
3369 --expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
3370 to 32 bits only\n"));
3371 #endif /* HAVE_SH64 */
3373 fprintf (stream
, _("\
3374 --fdpic generate an FDPIC object file\n"));
3375 #endif /* OBJ_ELF */
3378 /* This struct is used to pass arguments to sh_count_relocs through
3379 bfd_map_over_sections. */
3381 struct sh_count_relocs
3383 /* Symbol we are looking for. */
3385 /* Count of relocs found. */
3389 /* Count the number of fixups in a section which refer to a particular
3390 symbol. This is called via bfd_map_over_sections. */
3393 sh_count_relocs (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, void *data
)
3395 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
3396 segment_info_type
*seginfo
;
3400 seginfo
= seg_info (sec
);
3401 if (seginfo
== NULL
)
3405 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3407 if (fix
->fx_addsy
== sym
)
3415 /* Handle the count relocs for a particular section.
3416 This is called via bfd_map_over_sections. */
3419 sh_frob_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
,
3420 void *ignore ATTRIBUTE_UNUSED
)
3422 segment_info_type
*seginfo
;
3425 seginfo
= seg_info (sec
);
3426 if (seginfo
== NULL
)
3429 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3433 sym
= fix
->fx_addsy
;
3434 /* Check for a local_symbol. */
3435 if (sym
&& sym
->bsym
== NULL
)
3437 struct local_symbol
*ls
= (struct local_symbol
*)sym
;
3438 /* See if it's been converted. If so, canonicalize. */
3439 if (local_symbol_converted_p (ls
))
3440 fix
->fx_addsy
= local_symbol_get_real_symbol (ls
);
3444 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3449 struct sh_count_relocs info
;
3451 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
3454 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
3455 symbol in the same section. */
3456 sym
= fix
->fx_addsy
;
3458 || fix
->fx_subsy
!= NULL
3459 || fix
->fx_addnumber
!= 0
3460 || S_GET_SEGMENT (sym
) != sec
3461 || S_IS_EXTERNAL (sym
))
3463 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3464 _(".uses does not refer to a local symbol in the same section"));
3468 /* Look through the fixups again, this time looking for one
3469 at the same location as sym. */
3470 val
= S_GET_VALUE (sym
);
3471 for (fscan
= seginfo
->fix_root
;
3473 fscan
= fscan
->fx_next
)
3474 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
3475 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
3476 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
3477 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
3478 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
3482 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3483 _("can't find fixup pointed to by .uses"));
3487 if (fscan
->fx_tcbit
)
3489 /* We've already done this one. */
3493 /* The variable fscan should also be a fixup to a local symbol
3494 in the same section. */
3495 sym
= fscan
->fx_addsy
;
3497 || fscan
->fx_subsy
!= NULL
3498 || fscan
->fx_addnumber
!= 0
3499 || S_GET_SEGMENT (sym
) != sec
3500 || S_IS_EXTERNAL (sym
))
3502 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3503 _(".uses target does not refer to a local symbol in the same section"));
3507 /* Now we look through all the fixups of all the sections,
3508 counting the number of times we find a reference to sym. */
3511 bfd_map_over_sections (stdoutput
, sh_count_relocs
, &info
);
3516 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
3517 We have already adjusted the value of sym to include the
3518 fragment address, so we undo that adjustment here. */
3519 subseg_change (sec
, 0);
3520 fix_new (fscan
->fx_frag
,
3521 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
3522 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
3526 /* This function is called after the symbol table has been completed,
3527 but before the relocs or section contents have been written out.
3528 If we have seen any .uses pseudo-ops, they point to an instruction
3529 which loads a register with the address of a function. We look
3530 through the fixups to find where the function address is being
3531 loaded from. We then generate a COUNT reloc giving the number of
3532 times that function address is referred to. The linker uses this
3533 information when doing relaxing, to decide when it can eliminate
3534 the stored function address entirely. */
3540 shmedia_frob_file_before_adjust ();
3546 bfd_map_over_sections (stdoutput
, sh_frob_section
, NULL
);
3549 /* Called after relaxing. Set the correct sizes of the fragments, and
3550 create relocs so that md_apply_fix will fill in the correct values. */
3553 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
, segT seg
, fragS
*fragP
)
3557 switch (fragP
->fr_subtype
)
3559 case C (COND_JUMP
, COND8
):
3560 case C (COND_JUMP_DELAY
, COND8
):
3561 subseg_change (seg
, 0);
3562 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3563 1, BFD_RELOC_SH_PCDISP8BY2
);
3568 case C (UNCOND_JUMP
, UNCOND12
):
3569 subseg_change (seg
, 0);
3570 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3571 1, BFD_RELOC_SH_PCDISP12BY2
);
3576 case C (UNCOND_JUMP
, UNCOND32
):
3577 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3578 if (fragP
->fr_symbol
== NULL
)
3579 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3580 _("displacement overflows 12-bit field"));
3581 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3582 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3583 _("displacement to defined symbol %s overflows 12-bit field"),
3584 S_GET_NAME (fragP
->fr_symbol
));
3586 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3587 _("displacement to undefined symbol %s overflows 12-bit field"),
3588 S_GET_NAME (fragP
->fr_symbol
));
3589 /* Stabilize this frag, so we don't trip an assert. */
3590 fragP
->fr_fix
+= fragP
->fr_var
;
3594 case C (COND_JUMP
, COND12
):
3595 case C (COND_JUMP_DELAY
, COND12
):
3596 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
3597 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
3598 was due to gas incorrectly relaxing an out-of-range conditional
3599 branch with delay slot. It turned:
3600 bf.s L6 (slot mov.l r12,@(44,r0))
3603 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
3605 32: 10 cb mov.l r12,@(44,r0)
3606 Therefore, branches with delay slots have to be handled
3607 differently from ones without delay slots. */
3609 unsigned char *buffer
=
3610 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
3611 int highbyte
= target_big_endian
? 0 : 1;
3612 int lowbyte
= target_big_endian
? 1 : 0;
3613 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
3615 /* Toggle the true/false bit of the bcond. */
3616 buffer
[highbyte
] ^= 0x2;
3618 /* If this is a delayed branch, we may not put the bra in the
3619 slot. So we change it to a non-delayed branch, like that:
3620 b! cond slot_label; bra disp; slot_label: slot_insn
3621 ??? We should try if swapping the conditional branch and
3622 its delay-slot insn already makes the branch reach. */
3624 /* Build a relocation to six / four bytes farther on. */
3625 subseg_change (seg
, 0);
3626 fix_new (fragP
, fragP
->fr_fix
, 2, section_symbol (seg
),
3627 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
3628 1, BFD_RELOC_SH_PCDISP8BY2
);
3630 /* Set up a jump instruction. */
3631 buffer
[highbyte
+ 2] = 0xa0;
3632 buffer
[lowbyte
+ 2] = 0;
3633 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
3634 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
3638 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
3643 /* Fill in a NOP instruction. */
3644 buffer
[highbyte
+ 4] = 0x0;
3645 buffer
[lowbyte
+ 4] = 0x9;
3654 case C (COND_JUMP
, COND32
):
3655 case C (COND_JUMP_DELAY
, COND32
):
3656 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3657 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3658 if (fragP
->fr_symbol
== NULL
)
3659 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3660 _("displacement overflows 8-bit field"));
3661 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3662 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3663 _("displacement to defined symbol %s overflows 8-bit field"),
3664 S_GET_NAME (fragP
->fr_symbol
));
3666 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3667 _("displacement to undefined symbol %s overflows 8-bit field "),
3668 S_GET_NAME (fragP
->fr_symbol
));
3669 /* Stabilize this frag, so we don't trip an assert. */
3670 fragP
->fr_fix
+= fragP
->fr_var
;
3676 shmedia_md_convert_frag (headers
, seg
, fragP
, TRUE
);
3682 if (donerelax
&& !sh_relax
)
3683 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3684 _("overflow in branch to %s; converted into longer instruction sequence"),
3685 (fragP
->fr_symbol
!= NULL
3686 ? S_GET_NAME (fragP
->fr_symbol
)
3691 md_section_align (segT seg ATTRIBUTE_UNUSED
, valueT size
)
3695 #else /* ! OBJ_ELF */
3696 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
3697 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
3698 #endif /* ! OBJ_ELF */
3701 /* This static variable is set by s_uacons to tell sh_cons_align that
3702 the expression does not need to be aligned. */
3704 static int sh_no_align_cons
= 0;
3706 /* This handles the unaligned space allocation pseudo-ops, such as
3707 .uaword. .uaword is just like .word, but the value does not need
3711 s_uacons (int bytes
)
3713 /* Tell sh_cons_align not to align this value. */
3714 sh_no_align_cons
= 1;
3718 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3719 aligned correctly. Note that this can cause warnings to be issued
3720 when assembling initialized structured which were declared with the
3721 packed attribute. FIXME: Perhaps we should require an option to
3722 enable this warning? */
3725 sh_cons_align (int nbytes
)
3729 if (sh_no_align_cons
)
3731 /* This is an unaligned pseudo-op. */
3732 sh_no_align_cons
= 0;
3737 while ((nbytes
& 1) == 0)
3746 if (now_seg
== absolute_section
)
3748 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
3749 as_warn (_("misaligned data"));
3753 frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
3754 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
3756 record_alignment (now_seg
, nalign
);
3759 /* When relaxing, we need to output a reloc for any .align directive
3760 that requests alignment to a four byte boundary or larger. This is
3761 also where we check for misaligned data. */
3764 sh_handle_align (fragS
*frag
)
3766 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
3768 if (frag
->fr_type
== rs_align_code
)
3770 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
3771 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
3773 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
3782 if (target_big_endian
)
3784 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
3785 frag
->fr_var
= sizeof big_nop_pattern
;
3789 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
3790 frag
->fr_var
= sizeof little_nop_pattern
;
3793 else if (frag
->fr_type
== rs_align_test
)
3796 as_bad_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
3800 && (frag
->fr_type
== rs_align
3801 || frag
->fr_type
== rs_align_code
)
3802 && frag
->fr_address
+ frag
->fr_fix
> 0
3803 && frag
->fr_offset
> 1
3804 && now_seg
!= bss_section
)
3805 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
3806 BFD_RELOC_SH_ALIGN
);
3809 /* See whether the relocation should be resolved locally. */
3812 sh_local_pcrel (fixS
*fix
)
3815 && (fix
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
3816 || fix
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
3817 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
3818 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
3819 || fix
->fx_r_type
== BFD_RELOC_8_PCREL
3820 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH16
3821 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH32
));
3824 /* See whether we need to force a relocation into the output file.
3825 This is used to force out switch and PC relative relocations when
3829 sh_force_relocation (fixS
*fix
)
3831 /* These relocations can't make it into a DSO, so no use forcing
3832 them for global symbols. */
3833 if (sh_local_pcrel (fix
))
3836 /* Make sure some relocations get emitted. */
3837 if (fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
3838 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
3839 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_GD_32
3840 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LD_32
3841 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_IE_32
3842 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LDO_32
3843 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LE_32
3844 || generic_force_reloc (fix
))
3850 return (fix
->fx_pcrel
3851 || SWITCH_TABLE (fix
)
3852 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
3853 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
3854 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
3855 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3857 || fix
->fx_r_type
== BFD_RELOC_SH_SHMEDIA_CODE
3859 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
3864 sh_fix_adjustable (fixS
*fixP
)
3866 if (fixP
->fx_r_type
== BFD_RELOC_32_PLT_PCREL
3867 || fixP
->fx_r_type
== BFD_RELOC_32_GOT_PCREL
3868 || fixP
->fx_r_type
== BFD_RELOC_SH_GOT20
3869 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTPC
3870 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTFUNCDESC
3871 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTFUNCDESC20
3872 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTOFFFUNCDESC
3873 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTOFFFUNCDESC20
3874 || fixP
->fx_r_type
== BFD_RELOC_SH_FUNCDESC
3875 || ((fixP
->fx_r_type
== BFD_RELOC_32
) && dont_adjust_reloc_32
)
3876 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
3879 /* We need the symbol name for the VTABLE entries */
3880 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
3881 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
3888 sh_elf_final_processing (void)
3892 /* Set file-specific flags to indicate if this code needs
3893 a processor with the sh-dsp / sh2e ISA to execute. */
3895 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3896 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3897 if (sh64_isa_mode
!= sh64_isa_unspecified
)
3900 #elif defined TARGET_SYMBIAN
3903 extern int sh_symbian_find_elf_flags (unsigned int);
3905 val
= sh_symbian_find_elf_flags (valid_arch
);
3908 #endif /* HAVE_SH64 */
3909 val
= sh_find_elf_flags (valid_arch
);
3911 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
3912 elf_elfheader (stdoutput
)->e_flags
|= val
;
3915 elf_elfheader (stdoutput
)->e_flags
|= EF_SH_FDPIC
;
3920 /* Return the target format for uClinux. */
3923 sh_uclinux_target_format (void)
3926 return (!target_big_endian
? "elf32-sh-fdpic" : "elf32-shbig-fdpic");
3928 return (!target_big_endian
? "elf32-shl" : "elf32-sh");
3932 /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its
3933 assembly-time value. If we're generating a reloc for FIXP,
3934 see whether the addend should be stored in-place or whether
3935 it should be in an ELF r_addend field. */
3938 apply_full_field_fix (fixS
*fixP
, char *buf
, bfd_vma val
, int size
)
3940 reloc_howto_type
*howto
;
3942 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3944 howto
= bfd_reloc_type_lookup (stdoutput
, fixP
->fx_r_type
);
3945 if (howto
&& !howto
->partial_inplace
)
3947 fixP
->fx_addnumber
= val
;
3951 md_number_to_chars (buf
, val
, size
);
3954 /* Apply a fixup to the object file. */
3957 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3959 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3960 int lowbyte
= target_big_endian
? 1 : 0;
3961 int highbyte
= target_big_endian
? 0 : 1;
3962 long val
= (long) *valP
;
3966 /* A difference between two symbols, the second of which is in the
3967 current section, is transformed in a PC-relative relocation to
3968 the other symbol. We have to adjust the relocation type here. */
3971 switch (fixP
->fx_r_type
)
3977 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3980 /* Currently, we only support 32-bit PCREL relocations.
3981 We'd need a new reloc type to handle 16_PCREL, and
3982 8_PCREL is already taken for R_SH_SWITCH8, which
3983 apparently does something completely different than what
3986 bfd_set_error (bfd_error_bad_value
);
3990 bfd_set_error (bfd_error_bad_value
);
3995 /* The function adjust_reloc_syms won't convert a reloc against a weak
3996 symbol into a reloc against a section, but bfd_install_relocation
3997 will screw up if the symbol is defined, so we have to adjust val here
3998 to avoid the screw up later.
4000 For ordinary relocs, this does not happen for ELF, since for ELF,
4001 bfd_install_relocation uses the "special function" field of the
4002 howto, and does not execute the code that needs to be undone, as long
4003 as the special function does not return bfd_reloc_continue.
4004 It can happen for GOT- and PLT-type relocs the way they are
4005 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
4006 doesn't matter here since those relocs don't use VAL; see below. */
4007 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
4008 && fixP
->fx_addsy
!= NULL
4009 && S_IS_WEAK (fixP
->fx_addsy
))
4010 val
-= S_GET_VALUE (fixP
->fx_addsy
);
4012 if (SWITCH_TABLE (fixP
))
4013 val
-= S_GET_VALUE (fixP
->fx_subsy
);
4017 switch (fixP
->fx_r_type
)
4019 case BFD_RELOC_SH_IMM3
:
4021 * buf
= (* buf
& 0xf8) | (val
& 0x7);
4023 case BFD_RELOC_SH_IMM3U
:
4025 * buf
= (* buf
& 0x8f) | ((val
& 0x7) << 4);
4027 case BFD_RELOC_SH_DISP12
:
4029 buf
[lowbyte
] = val
& 0xff;
4030 buf
[highbyte
] |= (val
>> 8) & 0x0f;
4032 case BFD_RELOC_SH_DISP12BY2
:
4035 buf
[lowbyte
] = (val
>> 1) & 0xff;
4036 buf
[highbyte
] |= (val
>> 9) & 0x0f;
4038 case BFD_RELOC_SH_DISP12BY4
:
4041 buf
[lowbyte
] = (val
>> 2) & 0xff;
4042 buf
[highbyte
] |= (val
>> 10) & 0x0f;
4044 case BFD_RELOC_SH_DISP12BY8
:
4047 buf
[lowbyte
] = (val
>> 3) & 0xff;
4048 buf
[highbyte
] |= (val
>> 11) & 0x0f;
4050 case BFD_RELOC_SH_DISP20
:
4051 if (! target_big_endian
)
4055 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 12) & 0xf0);
4056 buf
[2] = (val
>> 8) & 0xff;
4057 buf
[3] = val
& 0xff;
4059 case BFD_RELOC_SH_DISP20BY8
:
4060 if (!target_big_endian
)
4065 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 20) & 0xf0);
4066 buf
[2] = (val
>> 16) & 0xff;
4067 buf
[3] = (val
>> 8) & 0xff;
4070 case BFD_RELOC_SH_IMM4
:
4072 *buf
= (*buf
& 0xf0) | (val
& 0xf);
4075 case BFD_RELOC_SH_IMM4BY2
:
4078 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
4081 case BFD_RELOC_SH_IMM4BY4
:
4084 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
4087 case BFD_RELOC_SH_IMM8BY2
:
4093 case BFD_RELOC_SH_IMM8BY4
:
4100 case BFD_RELOC_SH_IMM8
:
4101 /* Sometimes the 8 bit value is sign extended (e.g., add) and
4102 sometimes it is not (e.g., and). We permit any 8 bit value.
4103 Note that adding further restrictions may invalidate
4104 reasonable looking assembly code, such as ``and -0x1,r0''. */
4110 case BFD_RELOC_SH_PCRELIMM8BY4
:
4111 /* If we are dealing with a known destination ... */
4112 if ((fixP
->fx_addsy
== NULL
|| S_IS_DEFINED (fixP
->fx_addsy
))
4113 && (fixP
->fx_subsy
== NULL
|| S_IS_DEFINED (fixP
->fx_addsy
)))
4115 /* Don't silently move the destination due to misalignment.
4116 The absolute address is the fragment base plus the offset into
4117 the fragment plus the pc relative offset to the label. */
4118 if ((fixP
->fx_frag
->fr_address
+ fixP
->fx_where
+ val
) & 3)
4119 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
4120 _("offset to unaligned destination"));
4122 /* The displacement cannot be zero or backward even if aligned.
4123 Allow -2 because val has already been adjusted somewhere. */
4125 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("negative offset"));
4128 /* The lower two bits of the PC are cleared before the
4129 displacement is added in. We can assume that the destination
4130 is on a 4 byte boundary. If this instruction is also on a 4
4131 byte boundary, then we want
4133 and target - here is a multiple of 4.
4134 Otherwise, we are on a 2 byte boundary, and we want
4135 (target - (here - 2)) / 4
4136 and target - here is not a multiple of 4. Computing
4137 (target - (here - 2)) / 4 == (target - here + 2) / 4
4138 works for both cases, since in the first case the addition of
4139 2 will be removed by the division. target - here is in the
4141 val
= (val
+ 2) / 4;
4143 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4147 case BFD_RELOC_SH_PCRELIMM8BY2
:
4150 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4154 case BFD_RELOC_SH_PCDISP8BY2
:
4156 if (val
< -0x80 || val
> 0x7f)
4157 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4161 case BFD_RELOC_SH_PCDISP12BY2
:
4163 if (val
< -0x800 || val
> 0x7ff)
4164 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4165 buf
[lowbyte
] = val
& 0xff;
4166 buf
[highbyte
] |= (val
>> 8) & 0xf;
4170 case BFD_RELOC_32_PCREL
:
4171 apply_full_field_fix (fixP
, buf
, val
, 4);
4175 apply_full_field_fix (fixP
, buf
, val
, 2);
4178 case BFD_RELOC_SH_USES
:
4179 /* Pass the value into sh_reloc(). */
4180 fixP
->fx_addnumber
= val
;
4183 case BFD_RELOC_SH_COUNT
:
4184 case BFD_RELOC_SH_ALIGN
:
4185 case BFD_RELOC_SH_CODE
:
4186 case BFD_RELOC_SH_DATA
:
4187 case BFD_RELOC_SH_LABEL
:
4188 /* Nothing to do here. */
4191 case BFD_RELOC_SH_LOOP_START
:
4192 case BFD_RELOC_SH_LOOP_END
:
4194 case BFD_RELOC_VTABLE_INHERIT
:
4195 case BFD_RELOC_VTABLE_ENTRY
:
4200 case BFD_RELOC_32_PLT_PCREL
:
4201 /* Make the jump instruction point to the address of the operand. At
4202 runtime we merely add the offset to the actual PLT entry. */
4203 * valP
= 0xfffffffc;
4204 val
= fixP
->fx_offset
;
4206 val
-= S_GET_VALUE (fixP
->fx_subsy
);
4207 apply_full_field_fix (fixP
, buf
, val
, 4);
4210 case BFD_RELOC_SH_GOTPC
:
4211 /* This is tough to explain. We end up with this one if we have
4212 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
4213 The goal here is to obtain the absolute address of the GOT,
4214 and it is strongly preferable from a performance point of
4215 view to avoid using a runtime relocation for this. There are
4216 cases where you have something like:
4218 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
4220 and here no correction would be required. Internally in the
4221 assembler we treat operands of this form as not being pcrel
4222 since the '.' is explicitly mentioned, and I wonder whether
4223 it would simplify matters to do it this way. Who knows. In
4224 earlier versions of the PIC patches, the pcrel_adjust field
4225 was used to store the correction, but since the expression is
4226 not pcrel, I felt it would be confusing to do it this way. */
4228 apply_full_field_fix (fixP
, buf
, val
, 4);
4231 case BFD_RELOC_SH_TLS_GD_32
:
4232 case BFD_RELOC_SH_TLS_LD_32
:
4233 case BFD_RELOC_SH_TLS_IE_32
:
4234 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
4236 case BFD_RELOC_32_GOT_PCREL
:
4237 case BFD_RELOC_SH_GOT20
:
4238 case BFD_RELOC_SH_GOTPLT32
:
4239 case BFD_RELOC_SH_GOTFUNCDESC
:
4240 case BFD_RELOC_SH_GOTFUNCDESC20
:
4241 case BFD_RELOC_SH_GOTOFFFUNCDESC
:
4242 case BFD_RELOC_SH_GOTOFFFUNCDESC20
:
4243 case BFD_RELOC_SH_FUNCDESC
:
4244 * valP
= 0; /* Fully resolved at runtime. No addend. */
4245 apply_full_field_fix (fixP
, buf
, 0, 4);
4248 case BFD_RELOC_SH_TLS_LDO_32
:
4249 case BFD_RELOC_SH_TLS_LE_32
:
4250 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
4252 case BFD_RELOC_32_GOTOFF
:
4253 case BFD_RELOC_SH_GOTOFF20
:
4254 apply_full_field_fix (fixP
, buf
, val
, 4);
4260 shmedia_md_apply_fix (fixP
, valP
);
4269 if ((val
& ((1 << shift
) - 1)) != 0)
4270 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
4274 val
= ((val
>> shift
)
4275 | ((long) -1 & ~ ((long) -1 >> shift
)));
4278 /* Extend sign for 64-bit host. */
4279 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
4280 if (max
!= 0 && (val
< min
|| val
> max
))
4281 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
4283 /* Stop the generic code from trying to overlow check the value as well.
4284 It may not have the correct value anyway, as we do not store val back
4286 fixP
->fx_no_overflow
= 1;
4288 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
4292 /* Called just before address relaxation. Return the length
4293 by which a fragment must grow to reach it's destination. */
4296 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
4300 switch (fragP
->fr_subtype
)
4304 return shmedia_md_estimate_size_before_relax (fragP
, segment_type
);
4310 case C (UNCOND_JUMP
, UNDEF_DISP
):
4311 /* Used to be a branch to somewhere which was unknown. */
4312 if (!fragP
->fr_symbol
)
4314 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
4316 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
4318 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
4322 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
4326 case C (COND_JUMP
, UNDEF_DISP
):
4327 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
4328 what
= GET_WHAT (fragP
->fr_subtype
);
4329 /* Used to be a branch to somewhere which was unknown. */
4330 if (fragP
->fr_symbol
4331 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
4333 /* Got a symbol and it's defined in this segment, become byte
4334 sized - maybe it will fix up. */
4335 fragP
->fr_subtype
= C (what
, COND8
);
4337 else if (fragP
->fr_symbol
)
4339 /* Its got a segment, but its not ours, so it will always be long. */
4340 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
4344 /* We know the abs value. */
4345 fragP
->fr_subtype
= C (what
, COND8
);
4349 case C (UNCOND_JUMP
, UNCOND12
):
4350 case C (UNCOND_JUMP
, UNCOND32
):
4351 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
4352 case C (COND_JUMP
, COND8
):
4353 case C (COND_JUMP
, COND12
):
4354 case C (COND_JUMP
, COND32
):
4355 case C (COND_JUMP
, UNDEF_WORD_DISP
):
4356 case C (COND_JUMP_DELAY
, COND8
):
4357 case C (COND_JUMP_DELAY
, COND12
):
4358 case C (COND_JUMP_DELAY
, COND32
):
4359 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
4360 /* When relaxing a section for the second time, we don't need to
4361 do anything besides return the current size. */
4365 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
4366 return fragP
->fr_var
;
4369 /* Put number into target byte order. */
4372 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
4375 /* We might need to set the contents type to data. */
4376 sh64_flag_output ();
4379 if (! target_big_endian
)
4380 number_to_chars_littleendian (ptr
, use
, nbytes
);
4382 number_to_chars_bigendian (ptr
, use
, nbytes
);
4385 /* This version is used in obj-coff.c eg. for the sh-hms target. */
4388 md_pcrel_from (fixS
*fixP
)
4390 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
4394 md_pcrel_from_section (fixS
*fixP
, segT sec
)
4396 if (! sh_local_pcrel (fixP
)
4397 && fixP
->fx_addsy
!= (symbolS
*) NULL
4398 && (generic_force_reloc (fixP
)
4399 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
4401 /* The symbol is undefined (or is defined but not in this section,
4402 or we're not sure about it being the final definition). Let the
4403 linker figure it out. We need to adjust the subtraction of a
4404 symbol to the position of the relocated data, though. */
4405 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
4408 return md_pcrel_from (fixP
);
4411 /* Create a reloc. */
4414 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
4417 bfd_reloc_code_real_type r_type
;
4419 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4420 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4421 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4422 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4424 r_type
= fixp
->fx_r_type
;
4426 if (SWITCH_TABLE (fixp
))
4428 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
4430 if (r_type
== BFD_RELOC_16
)
4431 r_type
= BFD_RELOC_SH_SWITCH16
;
4432 else if (r_type
== BFD_RELOC_8
)
4433 r_type
= BFD_RELOC_8_PCREL
;
4434 else if (r_type
== BFD_RELOC_32
)
4435 r_type
= BFD_RELOC_SH_SWITCH32
;
4439 else if (r_type
== BFD_RELOC_SH_USES
)
4440 rel
->addend
= fixp
->fx_addnumber
;
4441 else if (r_type
== BFD_RELOC_SH_COUNT
)
4442 rel
->addend
= fixp
->fx_offset
;
4443 else if (r_type
== BFD_RELOC_SH_ALIGN
)
4444 rel
->addend
= fixp
->fx_offset
;
4445 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
4446 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
4447 rel
->addend
= fixp
->fx_offset
;
4448 else if (r_type
== BFD_RELOC_SH_LOOP_START
4449 || r_type
== BFD_RELOC_SH_LOOP_END
)
4450 rel
->addend
= fixp
->fx_offset
;
4451 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
4454 rel
->address
= rel
->addend
= fixp
->fx_offset
;
4457 else if (shmedia_init_reloc (rel
, fixp
))
4461 rel
->addend
= fixp
->fx_addnumber
;
4463 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
4465 if (rel
->howto
== NULL
)
4467 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4468 _("Cannot represent relocation type %s"),
4469 bfd_get_reloc_code_name (r_type
));
4470 /* Set howto to a garbage value so that we can keep going. */
4471 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4472 gas_assert (rel
->howto
!= NULL
);
4475 else if (rel
->howto
->type
== R_SH_IND12W
)
4476 rel
->addend
+= fixp
->fx_offset
- 4;
4483 inline static char *
4484 sh_end_of_match (char *cont
, char *what
)
4486 int len
= strlen (what
);
4488 if (strncasecmp (cont
, what
, strlen (what
)) == 0
4489 && ! is_part_of_name (cont
[len
]))
4496 sh_parse_name (char const *name
,
4498 enum expr_mode mode
,
4501 char *next
= input_line_pointer
;
4506 exprP
->X_op_symbol
= NULL
;
4508 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4511 GOT_symbol
= symbol_find_or_make (name
);
4513 exprP
->X_add_symbol
= GOT_symbol
;
4515 /* If we have an absolute symbol or a reg, then we know its
4517 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
4518 if (mode
!= expr_defer
&& segment
== absolute_section
)
4520 exprP
->X_op
= O_constant
;
4521 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4522 exprP
->X_add_symbol
= NULL
;
4524 else if (mode
!= expr_defer
&& segment
== reg_section
)
4526 exprP
->X_op
= O_register
;
4527 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4528 exprP
->X_add_symbol
= NULL
;
4532 exprP
->X_op
= O_symbol
;
4533 exprP
->X_add_number
= 0;
4539 exprP
->X_add_symbol
= symbol_find_or_make (name
);
4541 if (*nextcharP
!= '@')
4543 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFF")))
4544 reloc_type
= BFD_RELOC_32_GOTOFF
;
4545 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTPLT")))
4546 reloc_type
= BFD_RELOC_SH_GOTPLT32
;
4547 else if ((next_end
= sh_end_of_match (next
+ 1, "GOT")))
4548 reloc_type
= BFD_RELOC_32_GOT_PCREL
;
4549 else if ((next_end
= sh_end_of_match (next
+ 1, "PLT")))
4550 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
4551 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSGD")))
4552 reloc_type
= BFD_RELOC_SH_TLS_GD_32
;
4553 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSLDM")))
4554 reloc_type
= BFD_RELOC_SH_TLS_LD_32
;
4555 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTTPOFF")))
4556 reloc_type
= BFD_RELOC_SH_TLS_IE_32
;
4557 else if ((next_end
= sh_end_of_match (next
+ 1, "TPOFF")))
4558 reloc_type
= BFD_RELOC_SH_TLS_LE_32
;
4559 else if ((next_end
= sh_end_of_match (next
+ 1, "DTPOFF")))
4560 reloc_type
= BFD_RELOC_SH_TLS_LDO_32
;
4561 else if ((next_end
= sh_end_of_match (next
+ 1, "PCREL")))
4562 reloc_type
= BFD_RELOC_32_PCREL
;
4563 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTFUNCDESC")))
4564 reloc_type
= BFD_RELOC_SH_GOTFUNCDESC
;
4565 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFFFUNCDESC")))
4566 reloc_type
= BFD_RELOC_SH_GOTOFFFUNCDESC
;
4567 else if ((next_end
= sh_end_of_match (next
+ 1, "FUNCDESC")))
4568 reloc_type
= BFD_RELOC_SH_FUNCDESC
;
4572 *input_line_pointer
= *nextcharP
;
4573 input_line_pointer
= next_end
;
4574 *nextcharP
= *input_line_pointer
;
4575 *input_line_pointer
= '\0';
4577 exprP
->X_op
= O_PIC_reloc
;
4578 exprP
->X_add_number
= 0;
4579 exprP
->X_md
= reloc_type
;
4585 sh_cfi_frame_initial_instructions (void)
4587 cfi_add_CFA_def_cfa (15, 0);
4591 sh_regname_to_dw2regnum (char *regname
)
4593 unsigned int regnum
= -1;
4597 static struct { char *name
; int dw2regnum
; } regnames
[] =
4599 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 },
4600 { "macl", 21 }, { "fpul", 23 }
4603 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
4604 if (strcmp (regnames
[i
].name
, regname
) == 0)
4605 return regnames
[i
].dw2regnum
;
4607 if (regname
[0] == 'r')
4610 regnum
= strtoul (p
, &q
, 10);
4611 if (p
== q
|| *q
|| regnum
>= 16)
4614 else if (regname
[0] == 'f' && regname
[1] == 'r')
4617 regnum
= strtoul (p
, &q
, 10);
4618 if (p
== q
|| *q
|| regnum
>= 16)
4622 else if (regname
[0] == 'x' && regname
[1] == 'd')
4625 regnum
= strtoul (p
, &q
, 10);
4626 if (p
== q
|| *q
|| regnum
>= 8)
4632 #endif /* OBJ_ELF */