1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
22 /* Written By Steve Chamberlain <sac@cygnus.com> */
27 #include "opcodes/sh-opc.h"
28 #include "safe-ctype.h"
29 #include "struc-symbol.h"
35 #include "dwarf2dbg.h"
36 #include "dw2gencfi.h"
42 expressionS immediate
;
46 const char comment_chars
[] = "!";
47 const char line_separator_chars
[] = ";";
48 const char line_comment_chars
[] = "!#";
50 static void s_uses (int);
51 static void s_uacons (int);
54 static void sh_elf_cons (int);
56 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
60 big (int ignore ATTRIBUTE_UNUSED
)
62 if (! target_big_endian
)
63 as_bad (_("directive .big encountered when option -big required"));
65 /* Stop further messages. */
66 target_big_endian
= 1;
70 little (int ignore ATTRIBUTE_UNUSED
)
72 if (target_big_endian
)
73 as_bad (_("directive .little encountered when option -little required"));
75 /* Stop further messages. */
76 target_big_endian
= 0;
79 /* This table describes all the machine specific pseudo-ops the assembler
80 has to support. The fields are:
81 pseudo-op name without dot
82 function to call to execute this pseudo-op
83 Integer arg to pass to the function. */
85 const pseudo_typeS md_pseudo_table
[] =
88 {"long", sh_elf_cons
, 4},
89 {"int", sh_elf_cons
, 4},
90 {"word", sh_elf_cons
, 2},
91 {"short", sh_elf_cons
, 2},
97 {"form", listing_psize
, 0},
98 {"little", little
, 0},
99 {"heading", listing_title
, 0},
100 {"import", s_ignore
, 0},
101 {"page", listing_eject
, 0},
102 {"program", s_ignore
, 0},
104 {"uaword", s_uacons
, 2},
105 {"ualong", s_uacons
, 4},
106 {"uaquad", s_uacons
, 8},
107 {"2byte", s_uacons
, 2},
108 {"4byte", s_uacons
, 4},
109 {"8byte", s_uacons
, 8},
111 {"mode", s_sh64_mode
, 0 },
113 /* Have the old name too. */
114 {"isa", s_sh64_mode
, 0 },
116 /* Assert that the right ABI is used. */
117 {"abi", s_sh64_abi
, 0 },
119 { "vtable_inherit", sh64_vtable_inherit
, 0 },
120 { "vtable_entry", sh64_vtable_entry
, 0 },
121 #endif /* HAVE_SH64 */
125 int sh_relax
; /* set if -relax seen */
127 /* Whether -small was seen. */
131 /* Flag to generate relocations against symbol values for local symbols. */
133 static int dont_adjust_reloc_32
;
135 /* Flag to indicate that '$' is allowed as a register prefix. */
137 static int allow_dollar_register_prefix
;
139 /* Preset architecture set, if given; zero otherwise. */
141 static unsigned int preset_target_arch
;
143 /* The bit mask of architectures that could
144 accommodate the insns seen so far. */
145 static unsigned int valid_arch
;
147 const char EXP_CHARS
[] = "eE";
149 /* Chars that mean this number is a floating point constant. */
152 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
154 #define C(a,b) ENCODE_RELAX(a,b)
156 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
157 #define GET_WHAT(x) ((x>>4))
159 /* These are the three types of relaxable instruction. */
160 /* These are the types of relaxable instructions; except for END which is
163 #define COND_JUMP_DELAY 2
164 #define UNCOND_JUMP 3
168 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
169 #define SH64PCREL16_32 4
170 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
171 #define SH64PCREL16_64 5
173 /* Variants of the above for adjusting the insn to PTA or PTB according to
175 #define SH64PCREL16PT_32 6
176 #define SH64PCREL16PT_64 7
178 /* A MOVI expansion, expanding to at most 32 or 64 bits. */
179 #define MOVI_IMM_32 8
180 #define MOVI_IMM_32_PCREL 9
181 #define MOVI_IMM_64 10
182 #define MOVI_IMM_64_PCREL 11
185 #else /* HAVE_SH64 */
189 #endif /* HAVE_SH64 */
195 #define UNDEF_WORD_DISP 4
201 #define UNDEF_SH64PCREL 0
202 #define SH64PCREL16 1
203 #define SH64PCREL32 2
204 #define SH64PCREL48 3
205 #define SH64PCREL64 4
206 #define SH64PCRELPLT 5
214 #define MOVI_GOTOFF 6
216 #endif /* HAVE_SH64 */
218 /* Branch displacements are from the address of the branch plus
219 four, thus all minimum and maximum values have 4 added to them. */
222 #define COND8_LENGTH 2
224 /* There is one extra instruction before the branch, so we must add
225 two more bytes to account for it. */
226 #define COND12_F 4100
227 #define COND12_M -4090
228 #define COND12_LENGTH 6
230 #define COND12_DELAY_LENGTH 4
232 /* ??? The minimum and maximum values are wrong, but this does not matter
233 since this relocation type is not supported yet. */
234 #define COND32_F (1<<30)
235 #define COND32_M -(1<<30)
236 #define COND32_LENGTH 14
238 #define UNCOND12_F 4098
239 #define UNCOND12_M -4092
240 #define UNCOND12_LENGTH 2
242 /* ??? The minimum and maximum values are wrong, but this does not matter
243 since this relocation type is not supported yet. */
244 #define UNCOND32_F (1<<30)
245 #define UNCOND32_M -(1<<30)
246 #define UNCOND32_LENGTH 14
249 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
250 TRd" as is the current insn, so no extra length. Note that the "reach"
251 is calculated from the address *after* that insn, but the offset in the
252 insn is calculated from the beginning of the insn. We also need to
253 take into account the implicit 1 coded as the "A" in PTA when counting
254 forward. If PTB reaches an odd address, we trap that as an error
255 elsewhere, so we don't have to have different relaxation entries. We
256 don't add a one to the negative range, since PTB would then have the
257 farthest backward-reaching value skipped, not generated at relaxation. */
258 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
259 #define SH64PCREL16_M (-32768 * 4 - 4)
260 #define SH64PCREL16_LENGTH 0
262 /* The next step is to change that PT insn into
263 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
264 SHORI (label - datalabel Ln) & 65535, R25
267 which means two extra insns, 8 extra bytes. This is the limit for the
270 The expressions look a bit bad since we have to adjust this to avoid overflow on a
272 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
273 #define SH64PCREL32_LENGTH (2 * 4)
275 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
277 #if BFD_HOST_64BIT_LONG
278 /* The "reach" type is long, so we can only do this for a 64-bit-long
280 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4)
281 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
282 #define SH64PCREL48_M (((long) -1 << 47) - 4)
283 #define SH64PCREL48_LENGTH (3 * 4)
285 /* If the host does not have 64-bit longs, just make this state identical
286 in reach to the 32-bit state. Note that we have a slightly incorrect
287 reach, but the correct one above will overflow a 32-bit number. */
288 #define SH64PCREL32_M (((long) -1 << 30) * 2)
289 #define SH64PCREL48_F SH64PCREL32_F
290 #define SH64PCREL48_M SH64PCREL32_M
291 #define SH64PCREL48_LENGTH (3 * 4)
292 #endif /* BFD_HOST_64BIT_LONG */
294 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
296 #define SH64PCREL64_LENGTH (4 * 4)
298 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
299 SH64PCREL expansions. The PCREL one is similar, but the other has no
300 pc-relative reach; it must be fully expanded in
301 shmedia_md_estimate_size_before_relax. */
302 #define MOVI_16_LENGTH 0
303 #define MOVI_16_F (32767 - 4)
304 #define MOVI_16_M (-32768 - 4)
305 #define MOVI_32_LENGTH 4
306 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
307 #define MOVI_48_LENGTH 8
309 #if BFD_HOST_64BIT_LONG
310 /* The "reach" type is long, so we can only do this for a 64-bit-long
312 #define MOVI_32_M (((long) -1 << 30) * 2 - 4)
313 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
314 #define MOVI_48_M (((long) -1 << 47) - 4)
316 /* If the host does not have 64-bit longs, just make this state identical
317 in reach to the 32-bit state. Note that we have a slightly incorrect
318 reach, but the correct one above will overflow a 32-bit number. */
319 #define MOVI_32_M (((long) -1 << 30) * 2)
320 #define MOVI_48_F MOVI_32_F
321 #define MOVI_48_M MOVI_32_M
322 #endif /* BFD_HOST_64BIT_LONG */
324 #define MOVI_64_LENGTH 12
325 #endif /* HAVE_SH64 */
327 #define EMPTY { 0, 0, 0, 0 }
329 const relax_typeS md_relax_table
[C (END
, 0)] = {
330 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
331 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
334 /* C (COND_JUMP, COND8) */
335 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
336 /* C (COND_JUMP, COND12) */
337 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
338 /* C (COND_JUMP, COND32) */
339 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
340 /* C (COND_JUMP, UNDEF_WORD_DISP) */
341 { 0, 0, COND32_LENGTH
, 0, },
343 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
346 /* C (COND_JUMP_DELAY, COND8) */
347 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
348 /* C (COND_JUMP_DELAY, COND12) */
349 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
350 /* C (COND_JUMP_DELAY, COND32) */
351 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
352 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
353 { 0, 0, COND32_LENGTH
, 0, },
355 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
358 /* C (UNCOND_JUMP, UNCOND12) */
359 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
360 /* C (UNCOND_JUMP, UNCOND32) */
361 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
363 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
364 { 0, 0, UNCOND32_LENGTH
, 0, },
366 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
369 /* C (SH64PCREL16_32, SH64PCREL16) */
371 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_32
, SH64PCREL32
) },
372 /* C (SH64PCREL16_32, SH64PCREL32) */
373 { 0, 0, SH64PCREL32_LENGTH
, 0 },
375 /* C (SH64PCREL16_32, SH64PCRELPLT) */
376 { 0, 0, SH64PCREL32_LENGTH
, 0 },
378 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
380 /* C (SH64PCREL16_64, SH64PCREL16) */
382 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_64
, SH64PCREL32
) },
383 /* C (SH64PCREL16_64, SH64PCREL32) */
384 { SH64PCREL32_F
, SH64PCREL32_M
, SH64PCREL32_LENGTH
, C (SH64PCREL16_64
, SH64PCREL48
) },
385 /* C (SH64PCREL16_64, SH64PCREL48) */
386 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16_64
, SH64PCREL64
) },
387 /* C (SH64PCREL16_64, SH64PCREL64) */
388 { 0, 0, SH64PCREL64_LENGTH
, 0 },
389 /* C (SH64PCREL16_64, SH64PCRELPLT) */
390 { 0, 0, SH64PCREL64_LENGTH
, 0 },
392 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
394 /* C (SH64PCREL16PT_32, SH64PCREL16) */
396 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_32
, SH64PCREL32
) },
397 /* C (SH64PCREL16PT_32, SH64PCREL32) */
398 { 0, 0, SH64PCREL32_LENGTH
, 0 },
400 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
401 { 0, 0, SH64PCREL32_LENGTH
, 0 },
403 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
405 /* C (SH64PCREL16PT_64, SH64PCREL16) */
407 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL32
) },
408 /* C (SH64PCREL16PT_64, SH64PCREL32) */
412 C (SH64PCREL16PT_64
, SH64PCREL48
) },
413 /* C (SH64PCREL16PT_64, SH64PCREL48) */
414 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL64
) },
415 /* C (SH64PCREL16PT_64, SH64PCREL64) */
416 { 0, 0, SH64PCREL64_LENGTH
, 0 },
417 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
418 { 0, 0, SH64PCREL64_LENGTH
, 0},
420 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
422 /* C (MOVI_IMM_32, UNDEF_MOVI) */
423 { 0, 0, MOVI_32_LENGTH
, 0 },
424 /* C (MOVI_IMM_32, MOVI_16) */
425 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32
, MOVI_32
) },
426 /* C (MOVI_IMM_32, MOVI_32) */
427 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, 0 },
429 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
430 { 0, 0, MOVI_32_LENGTH
, 0 },
431 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
433 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
435 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32_PCREL
, MOVI_32
) },
436 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
437 { 0, 0, MOVI_32_LENGTH
, 0 },
439 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
440 { 0, 0, MOVI_32_LENGTH
, 0 },
442 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
443 { 0, 0, MOVI_32_LENGTH
, 0 },
444 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
446 /* C (MOVI_IMM_64, UNDEF_MOVI) */
447 { 0, 0, MOVI_64_LENGTH
, 0 },
448 /* C (MOVI_IMM_64, MOVI_16) */
449 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64
, MOVI_32
) },
450 /* C (MOVI_IMM_64, MOVI_32) */
451 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64
, MOVI_48
) },
452 /* C (MOVI_IMM_64, MOVI_48) */
453 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64
, MOVI_64
) },
454 /* C (MOVI_IMM_64, MOVI_64) */
455 { 0, 0, MOVI_64_LENGTH
, 0 },
457 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
458 { 0, 0, MOVI_64_LENGTH
, 0 },
459 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
461 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
463 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_32
) },
464 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
465 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_48
) },
466 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
467 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_64
) },
468 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
469 { 0, 0, MOVI_64_LENGTH
, 0 },
470 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
471 { 0, 0, MOVI_64_LENGTH
, 0 },
473 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
474 { 0, 0, MOVI_64_LENGTH
, 0 },
475 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
477 #endif /* HAVE_SH64 */
483 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
487 /* Determinet whether the symbol needs any kind of PIC relocation. */
490 sh_PIC_related_p (symbolS
*sym
)
497 if (sym
== GOT_symbol
)
501 if (sh_PIC_related_p (*symbol_get_tc (sym
)))
505 exp
= symbol_get_value_expression (sym
);
507 return (exp
->X_op
== O_PIC_reloc
508 || sh_PIC_related_p (exp
->X_add_symbol
)
509 || sh_PIC_related_p (exp
->X_op_symbol
));
512 /* Determine the relocation type to be used to represent the
513 expression, that may be rearranged. */
516 sh_check_fixup (expressionS
*main_exp
, bfd_reloc_code_real_type
*r_type_p
)
518 expressionS
*exp
= main_exp
;
520 /* This is here for backward-compatibility only. GCC used to generated:
522 f@PLT + . - (.LPCS# + 2)
524 but we'd rather be able to handle this as a PIC-related reference
525 plus/minus a symbol. However, gas' parser gives us:
527 O_subtract (O_add (f@PLT, .), .LPCS#+2)
529 so we attempt to transform this into:
531 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
533 which we can handle simply below. */
534 if (exp
->X_op
== O_subtract
)
536 if (sh_PIC_related_p (exp
->X_op_symbol
))
539 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
541 if (exp
&& sh_PIC_related_p (exp
->X_op_symbol
))
544 if (exp
&& exp
->X_op
== O_add
545 && sh_PIC_related_p (exp
->X_add_symbol
))
547 symbolS
*sym
= exp
->X_add_symbol
;
549 exp
->X_op
= O_subtract
;
550 exp
->X_add_symbol
= main_exp
->X_op_symbol
;
552 main_exp
->X_op_symbol
= main_exp
->X_add_symbol
;
553 main_exp
->X_add_symbol
= sym
;
555 main_exp
->X_add_number
+= exp
->X_add_number
;
556 exp
->X_add_number
= 0;
561 else if (exp
->X_op
== O_add
&& sh_PIC_related_p (exp
->X_op_symbol
))
564 if (exp
->X_op
== O_symbol
|| exp
->X_op
== O_add
|| exp
->X_op
== O_subtract
)
567 if (exp
->X_add_symbol
568 && (exp
->X_add_symbol
== GOT_symbol
570 && *symbol_get_tc (exp
->X_add_symbol
) == GOT_symbol
)))
574 case BFD_RELOC_SH_IMM_LOW16
:
575 *r_type_p
= BFD_RELOC_SH_GOTPC_LOW16
;
578 case BFD_RELOC_SH_IMM_MEDLOW16
:
579 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDLOW16
;
582 case BFD_RELOC_SH_IMM_MEDHI16
:
583 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDHI16
;
586 case BFD_RELOC_SH_IMM_HI16
:
587 *r_type_p
= BFD_RELOC_SH_GOTPC_HI16
;
591 case BFD_RELOC_UNUSED
:
592 *r_type_p
= BFD_RELOC_SH_GOTPC
;
601 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
603 *r_type_p
= BFD_RELOC_SH_GOTPC
;
607 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
612 if (exp
->X_op
== O_PIC_reloc
)
618 case BFD_RELOC_UNUSED
:
619 *r_type_p
= exp
->X_md
;
622 case BFD_RELOC_SH_IMM_LOW16
:
625 case BFD_RELOC_32_GOTOFF
:
626 *r_type_p
= BFD_RELOC_SH_GOTOFF_LOW16
;
629 case BFD_RELOC_SH_GOTPLT32
:
630 *r_type_p
= BFD_RELOC_SH_GOTPLT_LOW16
;
633 case BFD_RELOC_32_GOT_PCREL
:
634 *r_type_p
= BFD_RELOC_SH_GOT_LOW16
;
637 case BFD_RELOC_32_PLT_PCREL
:
638 *r_type_p
= BFD_RELOC_SH_PLT_LOW16
;
646 case BFD_RELOC_SH_IMM_MEDLOW16
:
649 case BFD_RELOC_32_GOTOFF
:
650 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDLOW16
;
653 case BFD_RELOC_SH_GOTPLT32
:
654 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDLOW16
;
657 case BFD_RELOC_32_GOT_PCREL
:
658 *r_type_p
= BFD_RELOC_SH_GOT_MEDLOW16
;
661 case BFD_RELOC_32_PLT_PCREL
:
662 *r_type_p
= BFD_RELOC_SH_PLT_MEDLOW16
;
670 case BFD_RELOC_SH_IMM_MEDHI16
:
673 case BFD_RELOC_32_GOTOFF
:
674 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDHI16
;
677 case BFD_RELOC_SH_GOTPLT32
:
678 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDHI16
;
681 case BFD_RELOC_32_GOT_PCREL
:
682 *r_type_p
= BFD_RELOC_SH_GOT_MEDHI16
;
685 case BFD_RELOC_32_PLT_PCREL
:
686 *r_type_p
= BFD_RELOC_SH_PLT_MEDHI16
;
694 case BFD_RELOC_SH_IMM_HI16
:
697 case BFD_RELOC_32_GOTOFF
:
698 *r_type_p
= BFD_RELOC_SH_GOTOFF_HI16
;
701 case BFD_RELOC_SH_GOTPLT32
:
702 *r_type_p
= BFD_RELOC_SH_GOTPLT_HI16
;
705 case BFD_RELOC_32_GOT_PCREL
:
706 *r_type_p
= BFD_RELOC_SH_GOT_HI16
;
709 case BFD_RELOC_32_PLT_PCREL
:
710 *r_type_p
= BFD_RELOC_SH_PLT_HI16
;
722 *r_type_p
= exp
->X_md
;
725 exp
->X_op
= O_symbol
;
728 main_exp
->X_add_symbol
= exp
->X_add_symbol
;
729 main_exp
->X_add_number
+= exp
->X_add_number
;
733 return (sh_PIC_related_p (exp
->X_add_symbol
)
734 || sh_PIC_related_p (exp
->X_op_symbol
));
739 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
742 sh_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
)
744 bfd_reloc_code_real_type r_type
= BFD_RELOC_UNUSED
;
746 if (sh_check_fixup (exp
, &r_type
))
747 as_bad (_("Invalid PIC expression."));
749 if (r_type
== BFD_RELOC_UNUSED
)
753 r_type
= BFD_RELOC_8
;
757 r_type
= BFD_RELOC_16
;
761 r_type
= BFD_RELOC_32
;
766 r_type
= BFD_RELOC_64
;
776 as_bad (_("unsupported BFD relocation size %u"), size
);
777 r_type
= BFD_RELOC_UNUSED
;
780 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
783 /* The regular cons() function, that reads constants, doesn't support
784 suffixes such as @GOT, @GOTOFF and @PLT, that generate
785 machine-specific relocation types. So we must define it here. */
786 /* Clobbers input_line_pointer, checks end-of-line. */
787 /* NBYTES 1=.byte, 2=.word, 4=.long */
789 sh_elf_cons (register int nbytes
)
795 /* Update existing range to include a previous insn, if there was one. */
796 sh64_update_contents_mark (TRUE
);
798 /* We need to make sure the contents type is set to data. */
801 #endif /* HAVE_SH64 */
803 if (is_it_end_of_statement ())
805 demand_empty_rest_of_line ();
810 md_cons_align (nbytes
);
816 emit_expr (&exp
, (unsigned int) nbytes
);
818 while (*input_line_pointer
++ == ',');
820 input_line_pointer
--; /* Put terminator back into stream. */
821 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
823 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
826 demand_empty_rest_of_line ();
829 /* The regular frag_offset_fixed_p doesn't work for rs_align_test
833 align_test_frag_offset_fixed_p (const fragS
*frag1
, const fragS
*frag2
,
839 /* Start with offset initialised to difference between the two frags.
840 Prior to assigning frag addresses this will be zero. */
841 off
= frag1
->fr_address
- frag2
->fr_address
;
848 /* Maybe frag2 is after frag1. */
850 while (frag
->fr_type
== rs_align_test
)
853 frag
= frag
->fr_next
;
863 /* Maybe frag1 is after frag2. */
864 off
= frag1
->fr_address
- frag2
->fr_address
;
866 while (frag
->fr_type
== rs_align_test
)
869 frag
= frag
->fr_next
;
883 /* Optimize a difference of symbols which have rs_align_test frag if
887 sh_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
893 && l
->X_op
== O_symbol
894 && r
->X_op
== O_symbol
895 && S_GET_SEGMENT (l
->X_add_symbol
) == S_GET_SEGMENT (r
->X_add_symbol
)
896 && (SEG_NORMAL (S_GET_SEGMENT (l
->X_add_symbol
))
897 || r
->X_add_symbol
== l
->X_add_symbol
)
898 && align_test_frag_offset_fixed_p (symbol_get_frag (l
->X_add_symbol
),
899 symbol_get_frag (r
->X_add_symbol
),
902 l
->X_add_number
-= r
->X_add_number
;
903 l
->X_add_number
-= frag_off
/ OCTETS_PER_BYTE
;
904 l
->X_add_number
+= (S_GET_VALUE (l
->X_add_symbol
)
905 - S_GET_VALUE (r
->X_add_symbol
));
906 l
->X_op
= O_constant
;
914 /* This function is called once, at assembler startup time. This should
915 set up all the tables, etc that the MD part of the assembler needs. */
920 const sh_opcode_info
*opcode
;
921 char *prev_name
= "";
922 unsigned int target_arch
;
925 = preset_target_arch
? preset_target_arch
: arch_sh_up
& ~arch_sh_has_dsp
;
926 valid_arch
= target_arch
;
932 opcode_hash_control
= hash_new ();
934 /* Insert unique names into hash table. */
935 for (opcode
= sh_table
; opcode
->name
; opcode
++)
937 if (strcmp (prev_name
, opcode
->name
) != 0)
939 if (!SH_MERGE_ARCH_SET_VALID (opcode
->arch
, target_arch
))
941 prev_name
= opcode
->name
;
942 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
949 static int reg_x
, reg_y
;
953 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
955 /* Try to parse a reg name. Return the number of chars consumed. */
958 parse_reg_without_prefix (char *src
, int *mode
, int *reg
)
960 char l0
= TOLOWER (src
[0]);
961 char l1
= l0
? TOLOWER (src
[1]) : 0;
963 /* We use ! IDENT_CHAR for the next character after the register name, to
964 make sure that we won't accidentally recognize a symbol name such as
965 'sram' or sr_ram as being a reference to the register 'sr'. */
971 if (src
[2] >= '0' && src
[2] <= '5'
972 && ! IDENT_CHAR ((unsigned char) src
[3]))
975 *reg
= 10 + src
[2] - '0';
979 if (l1
>= '0' && l1
<= '9'
980 && ! IDENT_CHAR ((unsigned char) src
[2]))
986 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
987 && ! IDENT_CHAR ((unsigned char) src
[7]))
994 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
999 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
1010 if (! IDENT_CHAR ((unsigned char) src
[2]))
1016 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
1025 if (! IDENT_CHAR ((unsigned char) src
[2]))
1031 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
1039 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
1040 && ! IDENT_CHAR ((unsigned char) src
[3]))
1043 *reg
= 4 + (l1
- '0');
1046 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
1047 && ! IDENT_CHAR ((unsigned char) src
[3]))
1050 *reg
= 6 + (l1
- '0');
1053 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
1054 && ! IDENT_CHAR ((unsigned char) src
[3]))
1059 *reg
= n
| ((~n
& 2) << 1);
1064 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[2]))
1086 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
1087 && ! IDENT_CHAR ((unsigned char) src
[2]))
1090 *reg
= A_X0_NUM
+ l1
- '0';
1094 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
1095 && ! IDENT_CHAR ((unsigned char) src
[2]))
1098 *reg
= A_Y0_NUM
+ l1
- '0';
1102 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
1103 && ! IDENT_CHAR ((unsigned char) src
[2]))
1106 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
1112 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
1118 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
1119 && ! IDENT_CHAR ((unsigned char) src
[3]))
1125 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
1126 && ! IDENT_CHAR ((unsigned char) src
[3]))
1132 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
1133 && ! IDENT_CHAR ((unsigned char) src
[3]))
1139 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1140 && ! IDENT_CHAR ((unsigned char) src
[3]))
1146 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1152 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
1159 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1164 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
1166 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1167 and use an uninitialized immediate. */
1171 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1172 && ! IDENT_CHAR ((unsigned char) src
[3]))
1177 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1178 && ! IDENT_CHAR ((unsigned char) src
[3]))
1184 if (l0
== 't' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1185 && ! IDENT_CHAR ((unsigned char) src
[3]))
1190 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
1191 && ! IDENT_CHAR ((unsigned char) src
[4]))
1193 if (TOLOWER (src
[3]) == 'l')
1198 if (TOLOWER (src
[3]) == 'h')
1204 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
1205 && ! IDENT_CHAR ((unsigned char) src
[3]))
1210 if (l0
== 'f' && l1
== 'r')
1214 if (src
[3] >= '0' && src
[3] <= '5'
1215 && ! IDENT_CHAR ((unsigned char) src
[4]))
1218 *reg
= 10 + src
[3] - '0';
1222 if (src
[2] >= '0' && src
[2] <= '9'
1223 && ! IDENT_CHAR ((unsigned char) src
[3]))
1226 *reg
= (src
[2] - '0');
1230 if (l0
== 'd' && l1
== 'r')
1234 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1235 && ! IDENT_CHAR ((unsigned char) src
[4]))
1238 *reg
= 10 + src
[3] - '0';
1242 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1243 && ! IDENT_CHAR ((unsigned char) src
[3]))
1246 *reg
= (src
[2] - '0');
1250 if (l0
== 'x' && l1
== 'd')
1254 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1255 && ! IDENT_CHAR ((unsigned char) src
[4]))
1258 *reg
= 11 + src
[3] - '0';
1262 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1263 && ! IDENT_CHAR ((unsigned char) src
[3]))
1266 *reg
= (src
[2] - '0') + 1;
1270 if (l0
== 'f' && l1
== 'v')
1272 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
1278 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
1279 && ! IDENT_CHAR ((unsigned char) src
[3]))
1282 *reg
= (src
[2] - '0');
1286 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
1287 && TOLOWER (src
[3]) == 'l'
1288 && ! IDENT_CHAR ((unsigned char) src
[4]))
1294 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
1295 && TOLOWER (src
[3]) == 'c'
1296 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
1302 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
1303 && TOLOWER (src
[3]) == 'r'
1304 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
1313 /* Like parse_reg_without_prefix, but this version supports
1314 $-prefixed register names if enabled by the user. */
1317 parse_reg (char *src
, int *mode
, int *reg
)
1319 unsigned int prefix
;
1320 unsigned int consumed
;
1324 if (allow_dollar_register_prefix
)
1335 consumed
= parse_reg_without_prefix (src
, mode
, reg
);
1340 return consumed
+ prefix
;
1344 parse_exp (char *s
, sh_operand_info
*op
)
1349 save
= input_line_pointer
;
1350 input_line_pointer
= s
;
1351 expression (&op
->immediate
);
1352 if (op
->immediate
.X_op
== O_absent
)
1353 as_bad (_("missing operand"));
1355 else if (op
->immediate
.X_op
== O_PIC_reloc
1356 || sh_PIC_related_p (op
->immediate
.X_add_symbol
)
1357 || sh_PIC_related_p (op
->immediate
.X_op_symbol
))
1358 as_bad (_("misplaced PIC operand"));
1360 new = input_line_pointer
;
1361 input_line_pointer
= save
;
1365 /* The many forms of operand:
1368 @Rn Register indirect
1381 pr, gbr, vbr, macl, mach
1385 parse_at (char *src
, sh_operand_info
*op
)
1392 src
= parse_at (src
, op
);
1393 if (op
->type
== A_DISP_TBR
)
1394 op
->type
= A_DISP2_TBR
;
1396 as_bad (_("illegal double indirection"));
1398 else if (src
[0] == '-')
1400 /* Must be predecrement. */
1403 len
= parse_reg (src
, &mode
, &(op
->reg
));
1404 if (mode
!= A_REG_N
)
1405 as_bad (_("illegal register after @-"));
1410 else if (src
[0] == '(')
1412 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1415 len
= parse_reg (src
, &mode
, &(op
->reg
));
1416 if (len
&& mode
== A_REG_N
)
1421 as_bad (_("must be @(r0,...)"));
1426 /* Now can be rn or gbr. */
1427 len
= parse_reg (src
, &mode
, &(op
->reg
));
1437 op
->type
= A_R0_GBR
;
1439 else if (mode
== A_REG_N
)
1441 op
->type
= A_IND_R0_REG_N
;
1445 as_bad (_("syntax error in @(r0,...)"));
1450 as_bad (_("syntax error in @(r0...)"));
1455 /* Must be an @(disp,.. thing). */
1456 src
= parse_exp (src
, op
);
1459 /* Now can be rn, gbr or pc. */
1460 len
= parse_reg (src
, &mode
, &op
->reg
);
1463 if (mode
== A_REG_N
)
1465 op
->type
= A_DISP_REG_N
;
1467 else if (mode
== A_GBR
)
1469 op
->type
= A_DISP_GBR
;
1471 else if (mode
== A_TBR
)
1473 op
->type
= A_DISP_TBR
;
1475 else if (mode
== A_PC
)
1477 /* We want @(expr, pc) to uniformly address . + expr,
1478 no matter if expr is a constant, or a more complex
1479 expression, e.g. sym-. or sym1-sym2.
1480 However, we also used to accept @(sym,pc)
1481 as addressing sym, i.e. meaning the same as plain sym.
1482 Some existing code does use the @(sym,pc) syntax, so
1483 we give it the old semantics for now, but warn about
1484 its use, so that users have some time to fix their code.
1486 Note that due to this backward compatibility hack,
1487 we'll get unexpected results when @(offset, pc) is used,
1488 and offset is a symbol that is set later to an an address
1489 difference, or an external symbol that is set to an
1490 address difference in another source file, so we want to
1491 eventually remove it. */
1492 if (op
->immediate
.X_op
== O_symbol
)
1494 op
->type
= A_DISP_PC
;
1495 as_warn (_("Deprecated syntax."));
1499 op
->type
= A_DISP_PC_ABS
;
1500 /* Such operands don't get corrected for PC==.+4, so
1501 make the correction here. */
1502 op
->immediate
.X_add_number
-= 4;
1507 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1512 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1517 as_bad (_("expecting )"));
1523 src
+= parse_reg (src
, &mode
, &(op
->reg
));
1524 if (mode
!= A_REG_N
)
1525 as_bad (_("illegal register after @"));
1532 l0
= TOLOWER (src
[0]);
1533 l1
= TOLOWER (src
[1]);
1535 if ((l0
== 'r' && l1
== '8')
1536 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1539 op
->type
= AX_PMOD_N
;
1541 else if ( (l0
== 'r' && l1
== '9')
1542 || (l0
== 'i' && l1
== 'y'))
1545 op
->type
= AY_PMOD_N
;
1557 get_operand (char **ptr
, sh_operand_info
*op
)
1566 *ptr
= parse_exp (src
, op
);
1571 else if (src
[0] == '@')
1573 *ptr
= parse_at (src
, op
);
1576 len
= parse_reg (src
, &mode
, &(op
->reg
));
1585 /* Not a reg, the only thing left is a displacement. */
1586 *ptr
= parse_exp (src
, op
);
1587 op
->type
= A_DISP_PC
;
1593 get_operands (sh_opcode_info
*info
, char *args
, sh_operand_info
*operand
)
1598 /* The pre-processor will eliminate whitespace in front of '@'
1599 after the first argument; we may be called multiple times
1600 from assemble_ppi, so don't insist on finding whitespace here. */
1604 get_operand (&ptr
, operand
+ 0);
1611 get_operand (&ptr
, operand
+ 1);
1612 /* ??? Hack: psha/pshl have a varying operand number depending on
1613 the type of the first operand. We handle this by having the
1614 three-operand version first and reducing the number of operands
1615 parsed to two if we see that the first operand is an immediate.
1616 This works because no insn with three operands has an immediate
1617 as first operand. */
1618 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1624 get_operand (&ptr
, operand
+ 2);
1628 operand
[2].type
= 0;
1633 operand
[1].type
= 0;
1634 operand
[2].type
= 0;
1639 operand
[0].type
= 0;
1640 operand
[1].type
= 0;
1641 operand
[2].type
= 0;
1646 /* Passed a pointer to a list of opcodes which use different
1647 addressing modes, return the opcode which matches the opcodes
1650 static sh_opcode_info
*
1651 get_specific (sh_opcode_info
*opcode
, sh_operand_info
*operands
)
1653 sh_opcode_info
*this_try
= opcode
;
1654 char *name
= opcode
->name
;
1657 while (opcode
->name
)
1659 this_try
= opcode
++;
1660 if ((this_try
->name
!= name
) && (strcmp (this_try
->name
, name
) != 0))
1662 /* We've looked so far down the table that we've run out of
1663 opcodes with the same name. */
1667 /* Look at both operands needed by the opcodes and provided by
1668 the user - since an arg test will often fail on the same arg
1669 again and again, we'll try and test the last failing arg the
1670 first on each opcode try. */
1671 for (n
= 0; this_try
->arg
[n
]; n
++)
1673 sh_operand_info
*user
= operands
+ n
;
1674 sh_arg_type arg
= this_try
->arg
[n
];
1676 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh2a_nofpu_up
)
1677 && ( arg
== A_DISP_REG_M
1678 || arg
== A_DISP_REG_N
))
1680 /* Check a few key IMM* fields for overflow. */
1682 long val
= user
->immediate
.X_add_number
;
1684 for (opf
= 0; opf
< 4; opf
++)
1685 switch (this_try
->nibbles
[opf
])
1689 if (val
< 0 || val
> 15)
1694 if (val
< 0 || val
> 15 * 2)
1699 if (val
< 0 || val
> 15 * 4)
1709 if (user
->type
== A_DISP_PC_ABS
)
1720 if (user
->type
!= arg
)
1724 /* opcode needs r0 */
1725 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1729 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1733 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1741 case A_IND_R0_REG_N
:
1750 /* Opcode needs rn */
1751 if (user
->type
!= arg
)
1756 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1772 if (user
->type
!= arg
)
1777 if (user
->type
!= arg
)
1783 if (user
->type
!= A_INC_N
)
1785 if (user
->reg
!= 15)
1791 if (user
->type
!= A_DEC_N
)
1793 if (user
->reg
!= 15)
1802 case A_IND_R0_REG_M
:
1805 /* Opcode needs rn */
1806 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1812 if (user
->type
!= A_DEC_N
)
1814 if (user
->reg
< 2 || user
->reg
> 5)
1820 if (user
->type
!= A_INC_N
)
1822 if (user
->reg
< 2 || user
->reg
> 5)
1828 if (user
->type
!= A_IND_N
)
1830 if (user
->reg
< 2 || user
->reg
> 5)
1836 if (user
->type
!= AX_PMOD_N
)
1838 if (user
->reg
< 2 || user
->reg
> 5)
1844 if (user
->type
!= A_INC_N
)
1846 if (user
->reg
< 4 || user
->reg
> 5)
1852 if (user
->type
!= A_IND_N
)
1854 if (user
->reg
< 4 || user
->reg
> 5)
1860 if (user
->type
!= AX_PMOD_N
)
1862 if (user
->reg
< 4 || user
->reg
> 5)
1868 if (user
->type
!= A_INC_N
)
1870 if ((user
->reg
< 4 || user
->reg
> 5)
1871 && (user
->reg
< 0 || user
->reg
> 1))
1877 if (user
->type
!= A_IND_N
)
1879 if ((user
->reg
< 4 || user
->reg
> 5)
1880 && (user
->reg
< 0 || user
->reg
> 1))
1886 if (user
->type
!= AX_PMOD_N
)
1888 if ((user
->reg
< 4 || user
->reg
> 5)
1889 && (user
->reg
< 0 || user
->reg
> 1))
1895 if (user
->type
!= A_INC_N
)
1897 if (user
->reg
< 6 || user
->reg
> 7)
1903 if (user
->type
!= A_IND_N
)
1905 if (user
->reg
< 6 || user
->reg
> 7)
1911 if (user
->type
!= AY_PMOD_N
)
1913 if (user
->reg
< 6 || user
->reg
> 7)
1919 if (user
->type
!= A_INC_N
)
1921 if ((user
->reg
< 6 || user
->reg
> 7)
1922 && (user
->reg
< 2 || user
->reg
> 3))
1928 if (user
->type
!= A_IND_N
)
1930 if ((user
->reg
< 6 || user
->reg
> 7)
1931 && (user
->reg
< 2 || user
->reg
> 3))
1937 if (user
->type
!= AY_PMOD_N
)
1939 if ((user
->reg
< 6 || user
->reg
> 7)
1940 && (user
->reg
< 2 || user
->reg
> 3))
1946 if (user
->type
!= DSP_REG_N
)
1948 if (user
->reg
!= A_A0_NUM
1949 && user
->reg
!= A_A1_NUM
)
1955 if (user
->type
!= DSP_REG_N
)
1977 if (user
->type
!= DSP_REG_N
)
1999 if (user
->type
!= DSP_REG_N
)
2021 if (user
->type
!= DSP_REG_N
)
2043 if (user
->type
!= DSP_REG_N
)
2065 if (user
->type
!= DSP_REG_N
)
2087 if (user
->type
!= DSP_REG_N
)
2109 if (user
->type
!= DSP_REG_N
)
2131 if (user
->type
!= DSP_REG_N
)
2153 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
2157 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
2161 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
2165 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
2169 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
2179 /* Opcode needs rn */
2180 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
2185 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
2190 if (user
->type
!= XMTRX_M4
)
2196 printf (_("unhandled %d\n"), arg
);
2200 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch
, this_try
->arch
))
2202 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, this_try
->arch
);
2212 insert (char *where
, int how
, int pcrel
, sh_operand_info
*op
)
2214 fix_new_exp (frag_now
,
2215 where
- frag_now
->fr_literal
,
2223 insert4 (char * where
, int how
, int pcrel
, sh_operand_info
* op
)
2225 fix_new_exp (frag_now
,
2226 where
- frag_now
->fr_literal
,
2233 build_relax (sh_opcode_info
*opcode
, sh_operand_info
*op
)
2235 int high_byte
= target_big_endian
? 0 : 1;
2238 if (opcode
->arg
[0] == A_BDISP8
)
2240 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
2241 p
= frag_var (rs_machine_dependent
,
2242 md_relax_table
[C (what
, COND32
)].rlx_length
,
2243 md_relax_table
[C (what
, COND8
)].rlx_length
,
2245 op
->immediate
.X_add_symbol
,
2246 op
->immediate
.X_add_number
,
2248 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
2250 else if (opcode
->arg
[0] == A_BDISP12
)
2252 p
= frag_var (rs_machine_dependent
,
2253 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
2254 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
2256 op
->immediate
.X_add_symbol
,
2257 op
->immediate
.X_add_number
,
2259 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
2264 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
2267 insert_loop_bounds (char *output
, sh_operand_info
*operand
)
2272 /* Since the low byte of the opcode will be overwritten by the reloc, we
2273 can just stash the high byte into both bytes and ignore endianness. */
2276 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2277 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2281 static int count
= 0;
2283 /* If the last loop insn is a two-byte-insn, it is in danger of being
2284 swapped with the insn after it. To prevent this, create a new
2285 symbol - complete with SH_LABEL reloc - after the last loop insn.
2286 If the last loop insn is four bytes long, the symbol will be
2287 right in the middle, but four byte insns are not swapped anyways. */
2288 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
2289 Hence a 9 digit number should be enough to count all REPEATs. */
2291 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
2292 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
2293 /* Make this a local symbol. */
2295 SF_SET_LOCAL (end_sym
);
2296 #endif /* OBJ_COFF */
2297 symbol_table_insert (end_sym
);
2298 end_sym
->sy_value
= operand
[1].immediate
;
2299 end_sym
->sy_value
.X_add_number
+= 2;
2300 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
2303 output
= frag_more (2);
2306 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2307 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2309 return frag_more (2);
2312 /* Now we know what sort of opcodes it is, let's build the bytes. */
2315 build_Mytes (sh_opcode_info
*opcode
, sh_operand_info
*operand
)
2320 unsigned int size
= 2;
2321 int low_byte
= target_big_endian
? 1 : 0;
2333 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2335 output
= frag_more (4);
2340 output
= frag_more (2);
2342 for (index
= 0; index
< max_index
; index
++)
2344 sh_nibble_type i
= opcode
->nibbles
[index
];
2355 nbuf
[index
] = reg_n
;
2358 nbuf
[index
] = reg_m
;
2361 if (reg_n
< 2 || reg_n
> 5)
2362 as_bad (_("Invalid register: 'r%d'"), reg_n
);
2363 nbuf
[index
] = (reg_n
& 3) | 4;
2366 nbuf
[index
] = reg_n
| (reg_m
>> 2);
2369 nbuf
[index
] = reg_b
| 0x08;
2372 nbuf
[index
] = reg_n
| 0x01;
2375 nbuf
[index
] |= 0x08;
2377 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3
, 0, operand
);
2380 nbuf
[index
] |= 0x80;
2382 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3U
, 0, operand
);
2385 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
);
2388 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
);
2391 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
);
2394 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
);
2397 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
+1);
2400 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
+1);
2403 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
+1);
2406 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
+1);
2411 insert4 (output
, BFD_RELOC_SH_DISP20
, 0, operand
);
2414 insert4 (output
, BFD_RELOC_SH_DISP20BY8
, 0, operand
);
2417 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
2420 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
2423 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
2426 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
2429 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
2432 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
2435 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
2438 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
2441 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
2444 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
2447 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
2450 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
2453 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
,
2454 operand
->type
!= A_DISP_PC_ABS
, operand
);
2457 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
,
2458 operand
->type
!= A_DISP_PC_ABS
, operand
);
2461 output
= insert_loop_bounds (output
, operand
);
2462 nbuf
[index
] = opcode
->nibbles
[3];
2466 printf (_("failed for %d\n"), i
);
2470 if (!target_big_endian
)
2472 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
2473 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
2477 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
2478 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
2480 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2482 if (!target_big_endian
)
2484 output
[3] = (nbuf
[4] << 4) | (nbuf
[5]);
2485 output
[2] = (nbuf
[6] << 4) | (nbuf
[7]);
2489 output
[2] = (nbuf
[4] << 4) | (nbuf
[5]);
2490 output
[3] = (nbuf
[6] << 4) | (nbuf
[7]);
2496 /* Find an opcode at the start of *STR_P in the hash table, and set
2497 *STR_P to the first character after the last one read. */
2499 static sh_opcode_info
*
2500 find_cooked_opcode (char **str_p
)
2503 unsigned char *op_start
;
2504 unsigned char *op_end
;
2508 /* Drop leading whitespace. */
2512 /* Find the op code end.
2513 The pre-processor will eliminate whitespace in front of
2514 any '@' after the first argument; we may be called from
2515 assemble_ppi, so the opcode might be terminated by an '@'. */
2516 for (op_start
= op_end
= (unsigned char *) str
;
2519 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
2522 unsigned char c
= op_start
[nlen
];
2524 /* The machine independent code will convert CMP/EQ into cmp/EQ
2525 because it thinks the '/' is the end of the symbol. Moreover,
2526 all but the first sub-insn is a parallel processing insn won't
2527 be capitalized. Instead of hacking up the machine independent
2528 code, we just deal with it here. */
2535 *str_p
= (char *) op_end
;
2538 as_bad (_("can't find opcode "));
2540 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
2543 /* Assemble a parallel processing insn. */
2544 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2547 assemble_ppi (char *op_end
, sh_opcode_info
*opcode
)
2559 sh_operand_info operand
[3];
2561 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2562 Make sure we encode a defined insn pattern. */
2567 if (opcode
->arg
[0] != A_END
)
2568 op_end
= get_operands (opcode
, op_end
, operand
);
2570 opcode
= get_specific (opcode
, operand
);
2573 /* Couldn't find an opcode which matched the operands. */
2574 char *where
= frag_more (2);
2579 as_bad (_("invalid operands for opcode"));
2583 if (opcode
->nibbles
[0] != PPI
)
2584 as_bad (_("insn can't be combined with parallel processing insn"));
2586 switch (opcode
->nibbles
[1])
2591 as_bad (_("multiple movx specifications"));
2596 as_bad (_("multiple movy specifications"));
2602 as_bad (_("multiple movx specifications"));
2603 if ((reg_n
< 4 || reg_n
> 5)
2604 && (reg_n
< 0 || reg_n
> 1))
2605 as_bad (_("invalid movx address register"));
2606 if (movy
&& movy
!= DDT_BASE
)
2607 as_bad (_("insn cannot be combined with non-nopy"));
2608 movx
= ((((reg_n
& 1) != 0) << 9)
2609 + (((reg_n
& 4) == 0) << 8)
2611 + (opcode
->nibbles
[2] << 4)
2612 + opcode
->nibbles
[3]
2618 as_bad (_("multiple movy specifications"));
2619 if ((reg_n
< 6 || reg_n
> 7)
2620 && (reg_n
< 2 || reg_n
> 3))
2621 as_bad (_("invalid movy address register"));
2622 if (movx
&& movx
!= DDT_BASE
)
2623 as_bad (_("insn cannot be combined with non-nopx"));
2624 movy
= ((((reg_n
& 1) != 0) << 8)
2625 + (((reg_n
& 4) == 0) << 9)
2627 + (opcode
->nibbles
[2] << 4)
2628 + opcode
->nibbles
[3]
2634 as_bad (_("multiple movx specifications"));
2636 as_bad (_("previous movy requires nopx"));
2637 if (reg_n
< 4 || reg_n
> 5)
2638 as_bad (_("invalid movx address register"));
2639 if (opcode
->nibbles
[2] & 8)
2641 if (reg_m
== A_A1_NUM
)
2643 else if (reg_m
!= A_A0_NUM
)
2644 as_bad (_("invalid movx dsp register"));
2649 as_bad (_("invalid movx dsp register"));
2652 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
2657 as_bad (_("multiple movy specifications"));
2659 as_bad (_("previous movx requires nopy"));
2660 if (opcode
->nibbles
[2] & 8)
2662 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2665 if (reg_m
== A_A1_NUM
)
2667 else if (reg_m
!= A_A0_NUM
)
2668 as_bad (_("invalid movy dsp register"));
2673 as_bad (_("invalid movy dsp register"));
2676 if (reg_n
< 6 || reg_n
> 7)
2677 as_bad (_("invalid movy address register"));
2678 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
2682 if (operand
[0].immediate
.X_op
!= O_constant
)
2683 as_bad (_("dsp immediate shift value not constant"));
2684 field_b
= ((opcode
->nibbles
[2] << 12)
2685 | (operand
[0].immediate
.X_add_number
& 127) << 4
2692 goto try_another_opcode
;
2697 as_bad (_("multiple parallel processing specifications"));
2698 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2699 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2700 switch (opcode
->nibbles
[4])
2708 field_b
+= opcode
->nibbles
[4] << 4;
2716 as_bad (_("multiple condition specifications"));
2717 cond
= opcode
->nibbles
[2] << 8;
2719 goto skip_cond_check
;
2723 as_bad (_("multiple parallel processing specifications"));
2724 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2725 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2727 switch (opcode
->nibbles
[4])
2735 field_b
+= opcode
->nibbles
[4] << 4;
2744 if ((field_b
& 0xef00) == 0xa100)
2746 /* pclr Dz pmuls Se,Sf,Dg */
2747 else if ((field_b
& 0xff00) == 0x8d00
2748 && (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh4al_dsp_up
)))
2750 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, arch_sh4al_dsp_up
);
2754 as_bad (_("insn cannot be combined with pmuls"));
2755 switch (field_b
& 0xf)
2758 field_b
+= 0 - A_X0_NUM
;
2761 field_b
+= 1 - A_Y0_NUM
;
2764 field_b
+= 2 - A_A0_NUM
;
2767 field_b
+= 3 - A_A1_NUM
;
2770 as_bad (_("bad combined pmuls output operand"));
2772 /* Generate warning if the destination register for padd / psub
2773 and pmuls is the same ( only for A0 or A1 ).
2774 If the last nibble is 1010 then A0 is used in both
2775 padd / psub and pmuls. If it is 1111 then A1 is used
2776 as destination register in both padd / psub and pmuls. */
2778 if ((((field_b
| reg_efg
) & 0x000F) == 0x000A)
2779 || (((field_b
| reg_efg
) & 0x000F) == 0x000F))
2780 as_warn (_("destination register is same for parallel insns"));
2782 field_b
+= 0x4000 + reg_efg
;
2789 as_bad (_("condition not followed by conditionalizable insn"));
2795 opcode
= find_cooked_opcode (&op_end
);
2799 (_("unrecognized characters at end of parallel processing insn")));
2804 move_code
= movx
| movy
;
2807 /* Parallel processing insn. */
2808 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
2810 output
= frag_more (4);
2812 if (! target_big_endian
)
2814 output
[3] = ppi_code
>> 8;
2815 output
[2] = ppi_code
;
2819 output
[2] = ppi_code
>> 8;
2820 output
[3] = ppi_code
;
2822 move_code
|= 0xf800;
2826 /* Just a double data transfer. */
2827 output
= frag_more (2);
2830 if (! target_big_endian
)
2832 output
[1] = move_code
>> 8;
2833 output
[0] = move_code
;
2837 output
[0] = move_code
>> 8;
2838 output
[1] = move_code
;
2843 /* This is the guts of the machine-dependent assembler. STR points to a
2844 machine dependent instruction. This function is supposed to emit
2845 the frags/bytes it assembles to. */
2848 md_assemble (char *str
)
2851 sh_operand_info operand
[3];
2852 sh_opcode_info
*opcode
;
2853 unsigned int size
= 0;
2854 char *initial_str
= str
;
2857 if (sh64_isa_mode
== sh64_isa_shmedia
)
2859 shmedia_md_assemble (str
);
2864 /* If we've seen pseudo-directives, make sure any emitted data or
2865 frags are marked as data. */
2868 sh64_update_contents_mark (TRUE
);
2869 sh64_set_contents_type (CRT_SH5_ISA16
);
2874 #endif /* HAVE_SH64 */
2876 opcode
= find_cooked_opcode (&str
);
2881 /* The opcode is not in the hash table.
2882 This means we definitely have an assembly failure,
2883 but the instruction may be valid in another CPU variant.
2884 In this case emit something better than 'unknown opcode'.
2885 Search the full table in sh-opc.h to check. */
2887 char *name
= initial_str
;
2888 int name_length
= 0;
2889 const sh_opcode_info
*op
;
2892 /* identify opcode in string */
2893 while (ISSPACE (*name
))
2897 while (!ISSPACE (name
[name_length
]))
2902 /* search for opcode in full list */
2903 for (op
= sh_table
; op
->name
; op
++)
2905 if (strncasecmp (op
->name
, name
, name_length
) == 0
2906 && op
->name
[name_length
] == '\0')
2915 as_bad (_("opcode not valid for this cpu variant"));
2919 as_bad (_("unknown opcode"));
2925 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2927 /* Output a CODE reloc to tell the linker that the following
2928 bytes are instructions, not data. */
2929 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2931 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
2934 if (opcode
->nibbles
[0] == PPI
)
2936 size
= assemble_ppi (op_end
, opcode
);
2940 if (opcode
->arg
[0] == A_BDISP12
2941 || opcode
->arg
[0] == A_BDISP8
)
2943 /* Since we skip get_specific here, we have to check & update
2945 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, opcode
->arch
))
2946 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, opcode
->arch
);
2948 as_bad (_("Delayed branches not available on SH1"));
2949 parse_exp (op_end
+ 1, &operand
[0]);
2950 build_relax (opcode
, &operand
[0]);
2952 /* All branches are currently 16 bit. */
2957 if (opcode
->arg
[0] == A_END
)
2959 /* Ignore trailing whitespace. If there is any, it has already
2960 been compressed to a single space. */
2966 op_end
= get_operands (opcode
, op_end
, operand
);
2968 opcode
= get_specific (opcode
, operand
);
2972 /* Couldn't find an opcode which matched the operands. */
2973 char *where
= frag_more (2);
2978 as_bad (_("invalid operands for opcode"));
2983 as_bad (_("excess operands: '%s'"), op_end
);
2985 size
= build_Mytes (opcode
, operand
);
2990 dwarf2_emit_insn (size
);
2993 /* This routine is called each time a label definition is seen. It
2994 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
2997 sh_frob_label (symbolS
*sym
)
2999 static fragS
*last_label_frag
;
3000 static int last_label_offset
;
3003 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
3007 offset
= frag_now_fix ();
3008 if (frag_now
!= last_label_frag
3009 || offset
!= last_label_offset
)
3011 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
3012 last_label_frag
= frag_now
;
3013 last_label_offset
= offset
;
3017 dwarf2_emit_label (sym
);
3020 /* This routine is called when the assembler is about to output some
3021 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
3024 sh_flush_pending_output (void)
3027 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
3029 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
3031 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
3036 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
3041 /* Various routines to kill one day. */
3042 /* Equal to MAX_PRECISION in atof-ieee.c. */
3043 #define MAX_LITTLENUMS 6
3045 /* Turn a string in input_line_pointer into a floating point constant
3046 of type TYPE, and store the appropriate bytes in *LITP. The number
3047 of LITTLENUMS emitted is stored in *SIZEP . An error message is
3048 returned, or NULL on OK. */
3051 md_atof (int type
, char *litP
, int *sizeP
)
3054 LITTLENUM_TYPE words
[4];
3070 return _("bad call to md_atof");
3073 t
= atof_ieee (input_line_pointer
, type
, words
);
3075 input_line_pointer
= t
;
3079 if (! target_big_endian
)
3081 for (i
= prec
- 1; i
>= 0; i
--)
3083 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
3089 for (i
= 0; i
< prec
; i
++)
3091 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
3099 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
3100 call instruction. It refers to a label of the instruction which
3101 loads the register which the call uses. We use it to generate a
3102 special reloc for the linker. */
3105 s_uses (int ignore ATTRIBUTE_UNUSED
)
3110 as_warn (_(".uses pseudo-op seen when not relaxing"));
3114 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
3116 as_bad (_("bad .uses format"));
3117 ignore_rest_of_line ();
3121 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
3123 demand_empty_rest_of_line ();
3128 OPTION_RELAX
= OPTION_MD_BASE
,
3135 OPTION_ALLOW_REG_PREFIX
,
3139 OPTION_SHCOMPACT_CONST_CRANGE
,
3143 OPTION_DUMMY
/* Not used. This is just here to make it easy to add and subtract options from this enum. */
3146 const char *md_shortopts
= "";
3147 struct option md_longopts
[] =
3149 {"relax", no_argument
, NULL
, OPTION_RELAX
},
3150 {"big", no_argument
, NULL
, OPTION_BIG
},
3151 {"little", no_argument
, NULL
, OPTION_LITTLE
},
3152 /* The next two switches are here because the
3153 generic parts of the linker testsuite uses them. */
3154 {"EB", no_argument
, NULL
, OPTION_BIG
},
3155 {"EL", no_argument
, NULL
, OPTION_LITTLE
},
3156 {"small", no_argument
, NULL
, OPTION_SMALL
},
3157 {"dsp", no_argument
, NULL
, OPTION_DSP
},
3158 {"isa", required_argument
, NULL
, OPTION_ISA
},
3159 {"renesas", no_argument
, NULL
, OPTION_RENESAS
},
3160 {"allow-reg-prefix", no_argument
, NULL
, OPTION_ALLOW_REG_PREFIX
},
3163 {"abi", required_argument
, NULL
, OPTION_ABI
},
3164 {"no-mix", no_argument
, NULL
, OPTION_NO_MIX
},
3165 {"shcompact-const-crange", no_argument
, NULL
, OPTION_SHCOMPACT_CONST_CRANGE
},
3166 {"no-expand", no_argument
, NULL
, OPTION_NO_EXPAND
},
3167 {"expand-pt32", no_argument
, NULL
, OPTION_PT32
},
3168 #endif /* HAVE_SH64 */
3170 {NULL
, no_argument
, NULL
, 0}
3172 size_t md_longopts_size
= sizeof (md_longopts
);
3175 md_parse_option (int c
, char *arg ATTRIBUTE_UNUSED
)
3184 target_big_endian
= 1;
3188 target_big_endian
= 0;
3196 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
3199 case OPTION_RENESAS
:
3200 dont_adjust_reloc_32
= 1;
3203 case OPTION_ALLOW_REG_PREFIX
:
3204 allow_dollar_register_prefix
= 1;
3208 if (strcasecmp (arg
, "dsp") == 0)
3209 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
3210 else if (strcasecmp (arg
, "fp") == 0)
3211 preset_target_arch
= arch_sh_up
& ~arch_sh_has_dsp
;
3212 else if (strcasecmp (arg
, "any") == 0)
3213 preset_target_arch
= arch_sh_up
;
3215 else if (strcasecmp (arg
, "shmedia") == 0)
3217 if (sh64_isa_mode
== sh64_isa_shcompact
)
3218 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
3219 sh64_isa_mode
= sh64_isa_shmedia
;
3221 else if (strcasecmp (arg
, "shcompact") == 0)
3223 if (sh64_isa_mode
== sh64_isa_shmedia
)
3224 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
3225 if (sh64_abi
== sh64_abi_64
)
3226 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
3227 sh64_isa_mode
= sh64_isa_shcompact
;
3229 #endif /* HAVE_SH64 */
3232 extern const bfd_arch_info_type bfd_sh_arch
;
3233 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
3235 preset_target_arch
= 0;
3236 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
3238 int len
= strlen(bfd_arch
->printable_name
);
3240 if (bfd_arch
->mach
== bfd_mach_sh5
)
3243 if (strncasecmp (bfd_arch
->printable_name
, arg
, len
) != 0)
3246 if (arg
[len
] == '\0')
3247 preset_target_arch
=
3248 sh_get_arch_from_bfd_mach (bfd_arch
->mach
);
3249 else if (strcasecmp(&arg
[len
], "-up") == 0)
3250 preset_target_arch
=
3251 sh_get_arch_up_from_bfd_mach (bfd_arch
->mach
);
3257 if (!preset_target_arch
)
3258 as_bad ("Invalid argument to --isa option: %s", arg
);
3264 if (strcmp (arg
, "32") == 0)
3266 if (sh64_abi
== sh64_abi_64
)
3267 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
3268 sh64_abi
= sh64_abi_32
;
3270 else if (strcmp (arg
, "64") == 0)
3272 if (sh64_abi
== sh64_abi_32
)
3273 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
3274 if (sh64_isa_mode
== sh64_isa_shcompact
)
3275 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
3276 sh64_abi
= sh64_abi_64
;
3279 as_bad ("Invalid argument to --abi option: %s", arg
);
3286 case OPTION_SHCOMPACT_CONST_CRANGE
:
3287 sh64_shcompact_const_crange
= TRUE
;
3290 case OPTION_NO_EXPAND
:
3291 sh64_expand
= FALSE
;
3297 #endif /* HAVE_SH64 */
3307 md_show_usage (FILE *stream
)
3309 fprintf (stream
, _("\
3311 --little generate little endian code\n\
3312 --big generate big endian code\n\
3313 --relax alter jump instructions for long displacements\n\
3314 --renesas disable optimization with section symbol for\n\
3315 compatibility with Renesas assembler.\n\
3316 --small align sections to 4 byte boundaries, not 16\n\
3317 --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
3318 --allow-reg-prefix allow '$' as a register name prefix.\n\
3319 --isa=[any use most appropriate isa\n\
3320 | dsp same as '-dsp'\n\
3323 extern const bfd_arch_info_type bfd_sh_arch
;
3324 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
3326 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
3327 if (bfd_arch
->mach
!= bfd_mach_sh5
)
3329 fprintf (stream
, "\n | %s", bfd_arch
->printable_name
);
3330 fprintf (stream
, "\n | %s-up", bfd_arch
->printable_name
);
3333 fprintf (stream
, "]\n");
3335 fprintf (stream
, _("\
3336 --isa=[shmedia set as the default instruction set for SH64\n\
3340 fprintf (stream
, _("\
3341 --abi=[32|64] set size of expanded SHmedia operands and object\n\
3343 --shcompact-const-crange emit code-range descriptors for constants in\n\
3344 SHcompact code sections\n\
3345 --no-mix disallow SHmedia code in the same section as\n\
3346 constants and SHcompact code\n\
3347 --no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
3348 --expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
3349 to 32 bits only\n"));
3350 #endif /* HAVE_SH64 */
3353 /* This struct is used to pass arguments to sh_count_relocs through
3354 bfd_map_over_sections. */
3356 struct sh_count_relocs
3358 /* Symbol we are looking for. */
3360 /* Count of relocs found. */
3364 /* Count the number of fixups in a section which refer to a particular
3365 symbol. This is called via bfd_map_over_sections. */
3368 sh_count_relocs (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, void *data
)
3370 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
3371 segment_info_type
*seginfo
;
3375 seginfo
= seg_info (sec
);
3376 if (seginfo
== NULL
)
3380 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3382 if (fix
->fx_addsy
== sym
)
3390 /* Handle the count relocs for a particular section.
3391 This is called via bfd_map_over_sections. */
3394 sh_frob_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
,
3395 void *ignore ATTRIBUTE_UNUSED
)
3397 segment_info_type
*seginfo
;
3400 seginfo
= seg_info (sec
);
3401 if (seginfo
== NULL
)
3404 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3408 sym
= fix
->fx_addsy
;
3409 /* Check for a local_symbol. */
3410 if (sym
&& sym
->bsym
== NULL
)
3412 struct local_symbol
*ls
= (struct local_symbol
*)sym
;
3413 /* See if it's been converted. If so, canonicalize. */
3414 if (local_symbol_converted_p (ls
))
3415 fix
->fx_addsy
= local_symbol_get_real_symbol (ls
);
3419 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3424 struct sh_count_relocs info
;
3426 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
3429 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
3430 symbol in the same section. */
3431 sym
= fix
->fx_addsy
;
3433 || fix
->fx_subsy
!= NULL
3434 || fix
->fx_addnumber
!= 0
3435 || S_GET_SEGMENT (sym
) != sec
3436 || S_IS_EXTERNAL (sym
))
3438 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3439 _(".uses does not refer to a local symbol in the same section"));
3443 /* Look through the fixups again, this time looking for one
3444 at the same location as sym. */
3445 val
= S_GET_VALUE (sym
);
3446 for (fscan
= seginfo
->fix_root
;
3448 fscan
= fscan
->fx_next
)
3449 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
3450 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
3451 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
3452 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
3453 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
3457 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3458 _("can't find fixup pointed to by .uses"));
3462 if (fscan
->fx_tcbit
)
3464 /* We've already done this one. */
3468 /* The variable fscan should also be a fixup to a local symbol
3469 in the same section. */
3470 sym
= fscan
->fx_addsy
;
3472 || fscan
->fx_subsy
!= NULL
3473 || fscan
->fx_addnumber
!= 0
3474 || S_GET_SEGMENT (sym
) != sec
3475 || S_IS_EXTERNAL (sym
))
3477 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3478 _(".uses target does not refer to a local symbol in the same section"));
3482 /* Now we look through all the fixups of all the sections,
3483 counting the number of times we find a reference to sym. */
3486 bfd_map_over_sections (stdoutput
, sh_count_relocs
, &info
);
3491 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
3492 We have already adjusted the value of sym to include the
3493 fragment address, so we undo that adjustment here. */
3494 subseg_change (sec
, 0);
3495 fix_new (fscan
->fx_frag
,
3496 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
3497 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
3501 /* This function is called after the symbol table has been completed,
3502 but before the relocs or section contents have been written out.
3503 If we have seen any .uses pseudo-ops, they point to an instruction
3504 which loads a register with the address of a function. We look
3505 through the fixups to find where the function address is being
3506 loaded from. We then generate a COUNT reloc giving the number of
3507 times that function address is referred to. The linker uses this
3508 information when doing relaxing, to decide when it can eliminate
3509 the stored function address entirely. */
3515 shmedia_frob_file_before_adjust ();
3521 bfd_map_over_sections (stdoutput
, sh_frob_section
, NULL
);
3524 /* Called after relaxing. Set the correct sizes of the fragments, and
3525 create relocs so that md_apply_fix will fill in the correct values. */
3528 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
, segT seg
, fragS
*fragP
)
3532 switch (fragP
->fr_subtype
)
3534 case C (COND_JUMP
, COND8
):
3535 case C (COND_JUMP_DELAY
, COND8
):
3536 subseg_change (seg
, 0);
3537 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3538 1, BFD_RELOC_SH_PCDISP8BY2
);
3543 case C (UNCOND_JUMP
, UNCOND12
):
3544 subseg_change (seg
, 0);
3545 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3546 1, BFD_RELOC_SH_PCDISP12BY2
);
3551 case C (UNCOND_JUMP
, UNCOND32
):
3552 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3553 if (fragP
->fr_symbol
== NULL
)
3554 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3555 _("displacement overflows 12-bit field"));
3556 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3557 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3558 _("displacement to defined symbol %s overflows 12-bit field"),
3559 S_GET_NAME (fragP
->fr_symbol
));
3561 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3562 _("displacement to undefined symbol %s overflows 12-bit field"),
3563 S_GET_NAME (fragP
->fr_symbol
));
3564 /* Stabilize this frag, so we don't trip an assert. */
3565 fragP
->fr_fix
+= fragP
->fr_var
;
3569 case C (COND_JUMP
, COND12
):
3570 case C (COND_JUMP_DELAY
, COND12
):
3571 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
3572 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
3573 was due to gas incorrectly relaxing an out-of-range conditional
3574 branch with delay slot. It turned:
3575 bf.s L6 (slot mov.l r12,@(44,r0))
3578 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
3580 32: 10 cb mov.l r12,@(44,r0)
3581 Therefore, branches with delay slots have to be handled
3582 differently from ones without delay slots. */
3584 unsigned char *buffer
=
3585 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
3586 int highbyte
= target_big_endian
? 0 : 1;
3587 int lowbyte
= target_big_endian
? 1 : 0;
3588 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
3590 /* Toggle the true/false bit of the bcond. */
3591 buffer
[highbyte
] ^= 0x2;
3593 /* If this is a delayed branch, we may not put the bra in the
3594 slot. So we change it to a non-delayed branch, like that:
3595 b! cond slot_label; bra disp; slot_label: slot_insn
3596 ??? We should try if swapping the conditional branch and
3597 its delay-slot insn already makes the branch reach. */
3599 /* Build a relocation to six / four bytes farther on. */
3600 subseg_change (seg
, 0);
3601 fix_new (fragP
, fragP
->fr_fix
, 2, section_symbol (seg
),
3602 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
3603 1, BFD_RELOC_SH_PCDISP8BY2
);
3605 /* Set up a jump instruction. */
3606 buffer
[highbyte
+ 2] = 0xa0;
3607 buffer
[lowbyte
+ 2] = 0;
3608 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
3609 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
3613 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
3618 /* Fill in a NOP instruction. */
3619 buffer
[highbyte
+ 4] = 0x0;
3620 buffer
[lowbyte
+ 4] = 0x9;
3629 case C (COND_JUMP
, COND32
):
3630 case C (COND_JUMP_DELAY
, COND32
):
3631 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3632 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3633 if (fragP
->fr_symbol
== NULL
)
3634 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3635 _("displacement overflows 8-bit field"));
3636 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3637 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3638 _("displacement to defined symbol %s overflows 8-bit field"),
3639 S_GET_NAME (fragP
->fr_symbol
));
3641 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3642 _("displacement to undefined symbol %s overflows 8-bit field "),
3643 S_GET_NAME (fragP
->fr_symbol
));
3644 /* Stabilize this frag, so we don't trip an assert. */
3645 fragP
->fr_fix
+= fragP
->fr_var
;
3651 shmedia_md_convert_frag (headers
, seg
, fragP
, TRUE
);
3657 if (donerelax
&& !sh_relax
)
3658 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3659 _("overflow in branch to %s; converted into longer instruction sequence"),
3660 (fragP
->fr_symbol
!= NULL
3661 ? S_GET_NAME (fragP
->fr_symbol
)
3666 md_section_align (segT seg ATTRIBUTE_UNUSED
, valueT size
)
3670 #else /* ! OBJ_ELF */
3671 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
3672 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
3673 #endif /* ! OBJ_ELF */
3676 /* This static variable is set by s_uacons to tell sh_cons_align that
3677 the expression does not need to be aligned. */
3679 static int sh_no_align_cons
= 0;
3681 /* This handles the unaligned space allocation pseudo-ops, such as
3682 .uaword. .uaword is just like .word, but the value does not need
3686 s_uacons (int bytes
)
3688 /* Tell sh_cons_align not to align this value. */
3689 sh_no_align_cons
= 1;
3693 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3694 aligned correctly. Note that this can cause warnings to be issued
3695 when assembling initialized structured which were declared with the
3696 packed attribute. FIXME: Perhaps we should require an option to
3697 enable this warning? */
3700 sh_cons_align (int nbytes
)
3705 if (sh_no_align_cons
)
3707 /* This is an unaligned pseudo-op. */
3708 sh_no_align_cons
= 0;
3713 while ((nbytes
& 1) == 0)
3722 if (now_seg
== absolute_section
)
3724 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
3725 as_warn (_("misaligned data"));
3729 p
= frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
3730 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
3732 record_alignment (now_seg
, nalign
);
3735 /* When relaxing, we need to output a reloc for any .align directive
3736 that requests alignment to a four byte boundary or larger. This is
3737 also where we check for misaligned data. */
3740 sh_handle_align (fragS
*frag
)
3742 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
3744 if (frag
->fr_type
== rs_align_code
)
3746 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
3747 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
3749 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
3758 if (target_big_endian
)
3760 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
3761 frag
->fr_var
= sizeof big_nop_pattern
;
3765 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
3766 frag
->fr_var
= sizeof little_nop_pattern
;
3769 else if (frag
->fr_type
== rs_align_test
)
3772 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
3776 && (frag
->fr_type
== rs_align
3777 || frag
->fr_type
== rs_align_code
)
3778 && frag
->fr_address
+ frag
->fr_fix
> 0
3779 && frag
->fr_offset
> 1
3780 && now_seg
!= bss_section
)
3781 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
3782 BFD_RELOC_SH_ALIGN
);
3785 /* See whether the relocation should be resolved locally. */
3788 sh_local_pcrel (fixS
*fix
)
3791 && (fix
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
3792 || fix
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
3793 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
3794 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
3795 || fix
->fx_r_type
== BFD_RELOC_8_PCREL
3796 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH16
3797 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH32
));
3800 /* See whether we need to force a relocation into the output file.
3801 This is used to force out switch and PC relative relocations when
3805 sh_force_relocation (fixS
*fix
)
3807 /* These relocations can't make it into a DSO, so no use forcing
3808 them for global symbols. */
3809 if (sh_local_pcrel (fix
))
3812 /* Make sure some relocations get emitted. */
3813 if (fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
3814 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
3815 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_GD_32
3816 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LD_32
3817 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_IE_32
3818 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LDO_32
3819 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LE_32
3820 || generic_force_reloc (fix
))
3826 return (fix
->fx_pcrel
3827 || SWITCH_TABLE (fix
)
3828 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
3829 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
3830 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
3831 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3833 || fix
->fx_r_type
== BFD_RELOC_SH_SHMEDIA_CODE
3835 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
3840 sh_fix_adjustable (fixS
*fixP
)
3842 if (fixP
->fx_r_type
== BFD_RELOC_32_PLT_PCREL
3843 || fixP
->fx_r_type
== BFD_RELOC_32_GOT_PCREL
3844 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTPC
3845 || ((fixP
->fx_r_type
== BFD_RELOC_32
) && dont_adjust_reloc_32
)
3846 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
3849 /* We need the symbol name for the VTABLE entries */
3850 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
3851 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
3858 sh_elf_final_processing (void)
3862 /* Set file-specific flags to indicate if this code needs
3863 a processor with the sh-dsp / sh2e ISA to execute. */
3865 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3866 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3867 if (sh64_isa_mode
!= sh64_isa_unspecified
)
3870 #elif defined TARGET_SYMBIAN
3873 extern int sh_symbian_find_elf_flags (unsigned int);
3875 val
= sh_symbian_find_elf_flags (valid_arch
);
3878 #endif /* HAVE_SH64 */
3879 val
= sh_find_elf_flags (valid_arch
);
3881 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
3882 elf_elfheader (stdoutput
)->e_flags
|= val
;
3886 /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its
3887 assembly-time value. If we're generating a reloc for FIXP,
3888 see whether the addend should be stored in-place or whether
3889 it should be in an ELF r_addend field. */
3892 apply_full_field_fix (fixS
*fixP
, char *buf
, bfd_vma val
, int size
)
3894 reloc_howto_type
*howto
;
3896 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3898 howto
= bfd_reloc_type_lookup (stdoutput
, fixP
->fx_r_type
);
3899 if (howto
&& !howto
->partial_inplace
)
3901 fixP
->fx_addnumber
= val
;
3905 md_number_to_chars (buf
, val
, size
);
3908 /* Apply a fixup to the object file. */
3911 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3913 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3914 int lowbyte
= target_big_endian
? 1 : 0;
3915 int highbyte
= target_big_endian
? 0 : 1;
3916 long val
= (long) *valP
;
3920 /* A difference between two symbols, the second of which is in the
3921 current section, is transformed in a PC-relative relocation to
3922 the other symbol. We have to adjust the relocation type here. */
3925 switch (fixP
->fx_r_type
)
3931 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3934 /* Currently, we only support 32-bit PCREL relocations.
3935 We'd need a new reloc type to handle 16_PCREL, and
3936 8_PCREL is already taken for R_SH_SWITCH8, which
3937 apparently does something completely different than what
3940 bfd_set_error (bfd_error_bad_value
);
3944 bfd_set_error (bfd_error_bad_value
);
3949 /* The function adjust_reloc_syms won't convert a reloc against a weak
3950 symbol into a reloc against a section, but bfd_install_relocation
3951 will screw up if the symbol is defined, so we have to adjust val here
3952 to avoid the screw up later.
3954 For ordinary relocs, this does not happen for ELF, since for ELF,
3955 bfd_install_relocation uses the "special function" field of the
3956 howto, and does not execute the code that needs to be undone, as long
3957 as the special function does not return bfd_reloc_continue.
3958 It can happen for GOT- and PLT-type relocs the way they are
3959 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
3960 doesn't matter here since those relocs don't use VAL; see below. */
3961 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
3962 && fixP
->fx_addsy
!= NULL
3963 && S_IS_WEAK (fixP
->fx_addsy
))
3964 val
-= S_GET_VALUE (fixP
->fx_addsy
);
3966 if (SWITCH_TABLE (fixP
))
3967 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3971 switch (fixP
->fx_r_type
)
3973 case BFD_RELOC_SH_IMM3
:
3975 * buf
= (* buf
& 0xf8) | (val
& 0x7);
3977 case BFD_RELOC_SH_IMM3U
:
3979 * buf
= (* buf
& 0x8f) | ((val
& 0x7) << 4);
3981 case BFD_RELOC_SH_DISP12
:
3983 buf
[lowbyte
] = val
& 0xff;
3984 buf
[highbyte
] |= (val
>> 8) & 0x0f;
3986 case BFD_RELOC_SH_DISP12BY2
:
3989 buf
[lowbyte
] = (val
>> 1) & 0xff;
3990 buf
[highbyte
] |= (val
>> 9) & 0x0f;
3992 case BFD_RELOC_SH_DISP12BY4
:
3995 buf
[lowbyte
] = (val
>> 2) & 0xff;
3996 buf
[highbyte
] |= (val
>> 10) & 0x0f;
3998 case BFD_RELOC_SH_DISP12BY8
:
4001 buf
[lowbyte
] = (val
>> 3) & 0xff;
4002 buf
[highbyte
] |= (val
>> 11) & 0x0f;
4004 case BFD_RELOC_SH_DISP20
:
4005 if (! target_big_endian
)
4009 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 12) & 0xf0);
4010 buf
[2] = (val
>> 8) & 0xff;
4011 buf
[3] = val
& 0xff;
4013 case BFD_RELOC_SH_DISP20BY8
:
4014 if (!target_big_endian
)
4019 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 20) & 0xf0);
4020 buf
[2] = (val
>> 16) & 0xff;
4021 buf
[3] = (val
>> 8) & 0xff;
4024 case BFD_RELOC_SH_IMM4
:
4026 *buf
= (*buf
& 0xf0) | (val
& 0xf);
4029 case BFD_RELOC_SH_IMM4BY2
:
4032 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
4035 case BFD_RELOC_SH_IMM4BY4
:
4038 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
4041 case BFD_RELOC_SH_IMM8BY2
:
4047 case BFD_RELOC_SH_IMM8BY4
:
4054 case BFD_RELOC_SH_IMM8
:
4055 /* Sometimes the 8 bit value is sign extended (e.g., add) and
4056 sometimes it is not (e.g., and). We permit any 8 bit value.
4057 Note that adding further restrictions may invalidate
4058 reasonable looking assembly code, such as ``and -0x1,r0''. */
4064 case BFD_RELOC_SH_PCRELIMM8BY4
:
4065 /* The lower two bits of the PC are cleared before the
4066 displacement is added in. We can assume that the destination
4067 is on a 4 byte boundary. If this instruction is also on a 4
4068 byte boundary, then we want
4070 and target - here is a multiple of 4.
4071 Otherwise, we are on a 2 byte boundary, and we want
4072 (target - (here - 2)) / 4
4073 and target - here is not a multiple of 4. Computing
4074 (target - (here - 2)) / 4 == (target - here + 2) / 4
4075 works for both cases, since in the first case the addition of
4076 2 will be removed by the division. target - here is in the
4078 val
= (val
+ 2) / 4;
4080 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4084 case BFD_RELOC_SH_PCRELIMM8BY2
:
4087 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4091 case BFD_RELOC_SH_PCDISP8BY2
:
4093 if (val
< -0x80 || val
> 0x7f)
4094 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4098 case BFD_RELOC_SH_PCDISP12BY2
:
4100 if (val
< -0x800 || val
> 0x7ff)
4101 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4102 buf
[lowbyte
] = val
& 0xff;
4103 buf
[highbyte
] |= (val
>> 8) & 0xf;
4107 case BFD_RELOC_32_PCREL
:
4108 apply_full_field_fix (fixP
, buf
, val
, 4);
4112 apply_full_field_fix (fixP
, buf
, val
, 2);
4115 case BFD_RELOC_SH_USES
:
4116 /* Pass the value into sh_reloc(). */
4117 fixP
->fx_addnumber
= val
;
4120 case BFD_RELOC_SH_COUNT
:
4121 case BFD_RELOC_SH_ALIGN
:
4122 case BFD_RELOC_SH_CODE
:
4123 case BFD_RELOC_SH_DATA
:
4124 case BFD_RELOC_SH_LABEL
:
4125 /* Nothing to do here. */
4128 case BFD_RELOC_SH_LOOP_START
:
4129 case BFD_RELOC_SH_LOOP_END
:
4131 case BFD_RELOC_VTABLE_INHERIT
:
4132 case BFD_RELOC_VTABLE_ENTRY
:
4137 case BFD_RELOC_32_PLT_PCREL
:
4138 /* Make the jump instruction point to the address of the operand. At
4139 runtime we merely add the offset to the actual PLT entry. */
4140 * valP
= 0xfffffffc;
4141 val
= fixP
->fx_offset
;
4143 val
-= S_GET_VALUE (fixP
->fx_subsy
);
4144 apply_full_field_fix (fixP
, buf
, val
, 4);
4147 case BFD_RELOC_SH_GOTPC
:
4148 /* This is tough to explain. We end up with this one if we have
4149 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
4150 The goal here is to obtain the absolute address of the GOT,
4151 and it is strongly preferable from a performance point of
4152 view to avoid using a runtime relocation for this. There are
4153 cases where you have something like:
4155 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
4157 and here no correction would be required. Internally in the
4158 assembler we treat operands of this form as not being pcrel
4159 since the '.' is explicitly mentioned, and I wonder whether
4160 it would simplify matters to do it this way. Who knows. In
4161 earlier versions of the PIC patches, the pcrel_adjust field
4162 was used to store the correction, but since the expression is
4163 not pcrel, I felt it would be confusing to do it this way. */
4165 apply_full_field_fix (fixP
, buf
, val
, 4);
4168 case BFD_RELOC_SH_TLS_GD_32
:
4169 case BFD_RELOC_SH_TLS_LD_32
:
4170 case BFD_RELOC_SH_TLS_IE_32
:
4171 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
4173 case BFD_RELOC_32_GOT_PCREL
:
4174 case BFD_RELOC_SH_GOTPLT32
:
4175 * valP
= 0; /* Fully resolved at runtime. No addend. */
4176 apply_full_field_fix (fixP
, buf
, 0, 4);
4179 case BFD_RELOC_SH_TLS_LDO_32
:
4180 case BFD_RELOC_SH_TLS_LE_32
:
4181 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
4183 case BFD_RELOC_32_GOTOFF
:
4184 apply_full_field_fix (fixP
, buf
, val
, 4);
4190 shmedia_md_apply_fix (fixP
, valP
);
4199 if ((val
& ((1 << shift
) - 1)) != 0)
4200 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
4204 val
= ((val
>> shift
)
4205 | ((long) -1 & ~ ((long) -1 >> shift
)));
4207 if (max
!= 0 && (val
< min
|| val
> max
))
4208 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
4210 /* Stop the generic code from trying to overlow check the value as well.
4211 It may not have the correct value anyway, as we do not store val back
4213 fixP
->fx_no_overflow
= 1;
4215 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
4219 /* Called just before address relaxation. Return the length
4220 by which a fragment must grow to reach it's destination. */
4223 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
4227 switch (fragP
->fr_subtype
)
4231 return shmedia_md_estimate_size_before_relax (fragP
, segment_type
);
4237 case C (UNCOND_JUMP
, UNDEF_DISP
):
4238 /* Used to be a branch to somewhere which was unknown. */
4239 if (!fragP
->fr_symbol
)
4241 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
4243 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
4245 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
4249 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
4253 case C (COND_JUMP
, UNDEF_DISP
):
4254 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
4255 what
= GET_WHAT (fragP
->fr_subtype
);
4256 /* Used to be a branch to somewhere which was unknown. */
4257 if (fragP
->fr_symbol
4258 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
4260 /* Got a symbol and it's defined in this segment, become byte
4261 sized - maybe it will fix up. */
4262 fragP
->fr_subtype
= C (what
, COND8
);
4264 else if (fragP
->fr_symbol
)
4266 /* Its got a segment, but its not ours, so it will always be long. */
4267 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
4271 /* We know the abs value. */
4272 fragP
->fr_subtype
= C (what
, COND8
);
4276 case C (UNCOND_JUMP
, UNCOND12
):
4277 case C (UNCOND_JUMP
, UNCOND32
):
4278 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
4279 case C (COND_JUMP
, COND8
):
4280 case C (COND_JUMP
, COND12
):
4281 case C (COND_JUMP
, COND32
):
4282 case C (COND_JUMP
, UNDEF_WORD_DISP
):
4283 case C (COND_JUMP_DELAY
, COND8
):
4284 case C (COND_JUMP_DELAY
, COND12
):
4285 case C (COND_JUMP_DELAY
, COND32
):
4286 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
4287 /* When relaxing a section for the second time, we don't need to
4288 do anything besides return the current size. */
4292 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
4293 return fragP
->fr_var
;
4296 /* Put number into target byte order. */
4299 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
4302 /* We might need to set the contents type to data. */
4303 sh64_flag_output ();
4306 if (! target_big_endian
)
4307 number_to_chars_littleendian (ptr
, use
, nbytes
);
4309 number_to_chars_bigendian (ptr
, use
, nbytes
);
4312 /* This version is used in obj-coff.c eg. for the sh-hms target. */
4315 md_pcrel_from (fixS
*fixP
)
4317 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
4321 md_pcrel_from_section (fixS
*fixP
, segT sec
)
4323 if (! sh_local_pcrel (fixP
)
4324 && fixP
->fx_addsy
!= (symbolS
*) NULL
4325 && (generic_force_reloc (fixP
)
4326 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
4328 /* The symbol is undefined (or is defined but not in this section,
4329 or we're not sure about it being the final definition). Let the
4330 linker figure it out. We need to adjust the subtraction of a
4331 symbol to the position of the relocated data, though. */
4332 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
4335 return md_pcrel_from (fixP
);
4338 /* Create a reloc. */
4341 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
4344 bfd_reloc_code_real_type r_type
;
4346 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4347 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4348 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4349 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4351 r_type
= fixp
->fx_r_type
;
4353 if (SWITCH_TABLE (fixp
))
4355 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
4357 if (r_type
== BFD_RELOC_16
)
4358 r_type
= BFD_RELOC_SH_SWITCH16
;
4359 else if (r_type
== BFD_RELOC_8
)
4360 r_type
= BFD_RELOC_8_PCREL
;
4361 else if (r_type
== BFD_RELOC_32
)
4362 r_type
= BFD_RELOC_SH_SWITCH32
;
4366 else if (r_type
== BFD_RELOC_SH_USES
)
4367 rel
->addend
= fixp
->fx_addnumber
;
4368 else if (r_type
== BFD_RELOC_SH_COUNT
)
4369 rel
->addend
= fixp
->fx_offset
;
4370 else if (r_type
== BFD_RELOC_SH_ALIGN
)
4371 rel
->addend
= fixp
->fx_offset
;
4372 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
4373 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
4374 rel
->addend
= fixp
->fx_offset
;
4375 else if (r_type
== BFD_RELOC_SH_LOOP_START
4376 || r_type
== BFD_RELOC_SH_LOOP_END
)
4377 rel
->addend
= fixp
->fx_offset
;
4378 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
4381 rel
->address
= rel
->addend
= fixp
->fx_offset
;
4384 else if (shmedia_init_reloc (rel
, fixp
))
4388 rel
->addend
= fixp
->fx_addnumber
;
4390 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
4392 if (rel
->howto
== NULL
)
4394 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4395 _("Cannot represent relocation type %s"),
4396 bfd_get_reloc_code_name (r_type
));
4397 /* Set howto to a garbage value so that we can keep going. */
4398 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4399 assert (rel
->howto
!= NULL
);
4402 else if (rel
->howto
->type
== R_SH_IND12W
)
4403 rel
->addend
+= fixp
->fx_offset
- 4;
4410 inline static char *
4411 sh_end_of_match (char *cont
, char *what
)
4413 int len
= strlen (what
);
4415 if (strncasecmp (cont
, what
, strlen (what
)) == 0
4416 && ! is_part_of_name (cont
[len
]))
4423 sh_parse_name (char const *name
,
4425 enum expr_mode mode
,
4428 char *next
= input_line_pointer
;
4433 exprP
->X_op_symbol
= NULL
;
4435 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4438 GOT_symbol
= symbol_find_or_make (name
);
4440 exprP
->X_add_symbol
= GOT_symbol
;
4442 /* If we have an absolute symbol or a reg, then we know its
4444 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
4445 if (mode
!= expr_defer
&& segment
== absolute_section
)
4447 exprP
->X_op
= O_constant
;
4448 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4449 exprP
->X_add_symbol
= NULL
;
4451 else if (mode
!= expr_defer
&& segment
== reg_section
)
4453 exprP
->X_op
= O_register
;
4454 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4455 exprP
->X_add_symbol
= NULL
;
4459 exprP
->X_op
= O_symbol
;
4460 exprP
->X_add_number
= 0;
4466 exprP
->X_add_symbol
= symbol_find_or_make (name
);
4468 if (*nextcharP
!= '@')
4470 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFF")))
4471 reloc_type
= BFD_RELOC_32_GOTOFF
;
4472 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTPLT")))
4473 reloc_type
= BFD_RELOC_SH_GOTPLT32
;
4474 else if ((next_end
= sh_end_of_match (next
+ 1, "GOT")))
4475 reloc_type
= BFD_RELOC_32_GOT_PCREL
;
4476 else if ((next_end
= sh_end_of_match (next
+ 1, "PLT")))
4477 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
4478 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSGD")))
4479 reloc_type
= BFD_RELOC_SH_TLS_GD_32
;
4480 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSLDM")))
4481 reloc_type
= BFD_RELOC_SH_TLS_LD_32
;
4482 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTTPOFF")))
4483 reloc_type
= BFD_RELOC_SH_TLS_IE_32
;
4484 else if ((next_end
= sh_end_of_match (next
+ 1, "TPOFF")))
4485 reloc_type
= BFD_RELOC_SH_TLS_LE_32
;
4486 else if ((next_end
= sh_end_of_match (next
+ 1, "DTPOFF")))
4487 reloc_type
= BFD_RELOC_SH_TLS_LDO_32
;
4491 *input_line_pointer
= *nextcharP
;
4492 input_line_pointer
= next_end
;
4493 *nextcharP
= *input_line_pointer
;
4494 *input_line_pointer
= '\0';
4496 exprP
->X_op
= O_PIC_reloc
;
4497 exprP
->X_add_number
= 0;
4498 exprP
->X_md
= reloc_type
;
4504 sh_cfi_frame_initial_instructions (void)
4506 cfi_add_CFA_def_cfa (15, 0);
4510 sh_regname_to_dw2regnum (char *regname
)
4512 unsigned int regnum
= -1;
4516 static struct { char *name
; int dw2regnum
; } regnames
[] =
4518 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 },
4519 { "macl", 21 }, { "fpul", 23 }
4522 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
4523 if (strcmp (regnames
[i
].name
, regname
) == 0)
4524 return regnames
[i
].dw2regnum
;
4526 if (regname
[0] == 'r')
4529 regnum
= strtoul (p
, &q
, 10);
4530 if (p
== q
|| *q
|| regnum
>= 16)
4533 else if (regname
[0] == 'f' && regname
[1] == 'r')
4536 regnum
= strtoul (p
, &q
, 10);
4537 if (p
== q
|| *q
|| regnum
>= 16)
4541 else if (regname
[0] == 'x' && regname
[1] == 'd')
4544 regnum
= strtoul (p
, &q
, 10);
4545 if (p
== q
|| *q
|| regnum
>= 8)
4551 #endif /* OBJ_ELF */