1 /* tc-sh.c -- Assemble code for the Hitachi Super-H
2 Copyright (C) 1993, 94, 95, 96, 97, 98, 99, 2000 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* Written By Steve Chamberlain <sac@cygnus.com> */
28 #include "opcodes/sh-opc.h"
30 #include "struc-symbol.h"
36 #include "dwarf2dbg.h"
37 struct dwarf2_line_info debug_line
;
39 const char comment_chars
[] = "!";
40 const char line_separator_chars
[] = ";";
41 const char line_comment_chars
[] = "!#";
43 static void s_uses
PARAMS ((int));
45 static void sh_count_relocs
PARAMS ((bfd
*, segT
, PTR
));
46 static void sh_frob_section
PARAMS ((bfd
*, segT
, PTR
));
49 void s_align_bytes ();
50 static void s_uacons
PARAMS ((int));
51 static sh_opcode_info
*find_cooked_opcode
PARAMS ((char **));
52 static unsigned int assemble_ppi
PARAMS ((char *, sh_opcode_info
*));
58 int ignore ATTRIBUTE_UNUSED
;
61 target_big_endian
= 0;
64 /* This table describes all the machine specific pseudo-ops the assembler
65 has to support. The fields are:
66 pseudo-op name without dot
67 function to call to execute this pseudo-op
68 Integer arg to pass to the function. */
70 const pseudo_typeS md_pseudo_table
[] =
74 {"form", listing_psize
, 0},
75 {"little", little
, 0},
76 {"heading", listing_title
, 0},
77 {"import", s_ignore
, 0},
78 {"page", listing_eject
, 0},
79 {"program", s_ignore
, 0},
81 {"uaword", s_uacons
, 2},
82 {"ualong", s_uacons
, 4},
83 { "file", dwarf2_directive_file
, 0 },
84 { "loc", dwarf2_directive_loc
, 0 },
88 /*int md_reloc_size; */
90 int sh_relax
; /* set if -relax seen */
92 /* Whether -small was seen. */
96 /* Whether -dsp was seen. */
100 /* The bit mask of architectures that could
101 accomodate the insns seen so far. */
102 static int valid_arch
;
104 const char EXP_CHARS
[] = "eE";
106 /* Chars that mean this number is a floating point constant. */
109 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
111 #define C(a,b) ENCODE_RELAX(a,b)
113 #define JREG 14 /* Register used as a temp when relaxing */
114 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
115 #define GET_WHAT(x) ((x>>4))
117 /* These are the three types of relaxable instrction. */
119 #define COND_JUMP_DELAY 2
120 #define UNCOND_JUMP 3
129 #define UNDEF_WORD_DISP 4
134 /* Branch displacements are from the address of the branch plus
135 four, thus all minimum and maximum values have 4 added to them. */
138 #define COND8_LENGTH 2
140 /* There is one extra instruction before the branch, so we must add
141 two more bytes to account for it. */
142 #define COND12_F 4100
143 #define COND12_M -4090
144 #define COND12_LENGTH 6
146 #define COND12_DELAY_LENGTH 4
148 /* ??? The minimum and maximum values are wrong, but this does not matter
149 since this relocation type is not supported yet. */
150 #define COND32_F (1<<30)
151 #define COND32_M -(1<<30)
152 #define COND32_LENGTH 14
154 #define UNCOND12_F 4098
155 #define UNCOND12_M -4092
156 #define UNCOND12_LENGTH 2
158 /* ??? The minimum and maximum values are wrong, but this does not matter
159 since this relocation type is not supported yet. */
160 #define UNCOND32_F (1<<30)
161 #define UNCOND32_M -(1<<30)
162 #define UNCOND32_LENGTH 14
164 #define EMPTY { 0, 0, 0, 0 }
166 const relax_typeS md_relax_table
[C (END
, 0)] = {
167 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
168 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
171 /* C (COND_JUMP, COND8) */
172 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
173 /* C (COND_JUMP, COND12) */
174 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
175 /* C (COND_JUMP, COND32) */
176 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
177 EMPTY
, EMPTY
, EMPTY
, EMPTY
,
178 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
181 /* C (COND_JUMP_DELAY, COND8) */
182 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
183 /* C (COND_JUMP_DELAY, COND12) */
184 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
185 /* C (COND_JUMP_DELAY, COND32) */
186 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
187 EMPTY
, EMPTY
, EMPTY
, EMPTY
,
188 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
191 /* C (UNCOND_JUMP, UNCOND12) */
192 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
193 /* C (UNCOND_JUMP, UNCOND32) */
194 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
195 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
196 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
201 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
203 /* This function is called once, at assembler startup time. This should
204 set up all the tables, etc that the MD part of the assembler needs. */
209 sh_opcode_info
*opcode
;
210 char *prev_name
= "";
214 /* The WinCE OS only supports little endian executables. */
215 target_big_endian
= 0;
218 target_big_endian
= 1;
221 target_arch
= arch_sh1_up
& ~(sh_dsp
? arch_sh3e_up
: arch_sh_dsp_up
);
222 valid_arch
= target_arch
;
224 opcode_hash_control
= hash_new ();
226 /* Insert unique names into hash table. */
227 for (opcode
= sh_table
; opcode
->name
; opcode
++)
229 if (strcmp (prev_name
, opcode
->name
))
231 if (! (opcode
->arch
& target_arch
))
233 prev_name
= opcode
->name
;
234 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
238 /* Make all the opcodes with the same name point to the same
240 opcode
->name
= prev_name
;
247 static int reg_x
, reg_y
;
255 expressionS immediate
;
259 #define IDENT_CHAR(c) (isalnum (c) || (c) == '_')
261 /* Try to parse a reg name. Return the number of chars consumed. */
264 parse_reg (src
, mode
, reg
)
269 /* We use ! IDENT_CHAR for the next character after the register name, to
270 make sure that we won't accidentally recognize a symbol name such as
271 'sram' or sr_ram as being a reference to the register 'sr'. */
277 if (src
[2] >= '0' && src
[2] <= '5'
278 && ! IDENT_CHAR ((unsigned char) src
[3]))
281 *reg
= 10 + src
[2] - '0';
285 if (src
[1] >= '0' && src
[1] <= '9'
286 && ! IDENT_CHAR ((unsigned char) src
[2]))
289 *reg
= (src
[1] - '0');
292 if (src
[1] >= '0' && src
[1] <= '7' && strncmp (&src
[2], "_bank", 5) == 0
293 && ! IDENT_CHAR ((unsigned char) src
[7]))
296 *reg
= (src
[1] - '0');
300 if (src
[1] == 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
305 if (src
[1] == 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
316 if (! IDENT_CHAR ((unsigned char) src
[2]))
322 if (src
[2] == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
331 if (! IDENT_CHAR ((unsigned char) src
[2]))
337 if (src
[2] == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
345 if (src
[1] == 'x' && src
[2] >= '0' && src
[2] <= '1'
346 && ! IDENT_CHAR ((unsigned char) src
[3]))
349 *reg
= 4 + (src
[1] - '0');
352 if (src
[1] == 'y' && src
[2] >= '0' && src
[2] <= '1'
353 && ! IDENT_CHAR ((unsigned char) src
[3]))
356 *reg
= 6 + (src
[1] - '0');
359 if (src
[1] == 's' && src
[2] >= '0' && src
[2] <= '3'
360 && ! IDENT_CHAR ((unsigned char) src
[3]))
362 int n
= src
[1] - '0';
365 *reg
= n
| ((~n
& 2) << 1);
370 if (src
[0] == 'i' && src
[1] && ! IDENT_CHAR ((unsigned char) src
[3]))
392 if (src
[0] == 'x' && src
[1] >= '0' && src
[1] <= '1'
393 && ! IDENT_CHAR ((unsigned char) src
[2]))
396 *reg
= A_X0_NUM
+ src
[1] - '0';
400 if (src
[0] == 'y' && src
[1] >= '0' && src
[1] <= '1'
401 && ! IDENT_CHAR ((unsigned char) src
[2]))
404 *reg
= A_Y0_NUM
+ src
[1] - '0';
408 if (src
[0] == 'm' && src
[1] >= '0' && src
[1] <= '1'
409 && ! IDENT_CHAR ((unsigned char) src
[2]))
412 *reg
= src
[1] == '0' ? A_M0_NUM
: A_M1_NUM
;
418 && src
[2] == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
424 if (src
[0] == 's' && src
[1] == 'p' && src
[2] == 'c'
425 && ! IDENT_CHAR ((unsigned char) src
[3]))
431 if (src
[0] == 's' && src
[1] == 'g' && src
[2] == 'r'
432 && ! IDENT_CHAR ((unsigned char) src
[3]))
438 if (src
[0] == 'd' && src
[1] == 's' && src
[2] == 'r'
439 && ! IDENT_CHAR ((unsigned char) src
[3]))
445 if (src
[0] == 'd' && src
[1] == 'b' && src
[2] == 'r'
446 && ! IDENT_CHAR ((unsigned char) src
[3]))
452 if (src
[0] == 's' && src
[1] == 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
458 if (src
[0] == 's' && src
[1] == 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
465 if (src
[0] == 'p' && src
[1] == 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
470 if (src
[0] == 'p' && src
[1] == 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
472 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
473 and use an uninitialized immediate. */
477 if (src
[0] == 'g' && src
[1] == 'b' && src
[2] == 'r'
478 && ! IDENT_CHAR ((unsigned char) src
[3]))
483 if (src
[0] == 'v' && src
[1] == 'b' && src
[2] == 'r'
484 && ! IDENT_CHAR ((unsigned char) src
[3]))
490 if (src
[0] == 'm' && src
[1] == 'a' && src
[2] == 'c'
491 && ! IDENT_CHAR ((unsigned char) src
[4]))
504 if (src
[0] == 'm' && src
[1] == 'o' && src
[2] == 'd'
505 && ! IDENT_CHAR ((unsigned char) src
[4]))
510 if (src
[0] == 'f' && src
[1] == 'r')
514 if (src
[3] >= '0' && src
[3] <= '5'
515 && ! IDENT_CHAR ((unsigned char) src
[4]))
518 *reg
= 10 + src
[3] - '0';
522 if (src
[2] >= '0' && src
[2] <= '9'
523 && ! IDENT_CHAR ((unsigned char) src
[3]))
526 *reg
= (src
[2] - '0');
530 if (src
[0] == 'd' && src
[1] == 'r')
534 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
535 && ! IDENT_CHAR ((unsigned char) src
[4]))
538 *reg
= 10 + src
[3] - '0';
542 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
543 && ! IDENT_CHAR ((unsigned char) src
[3]))
546 *reg
= (src
[2] - '0');
550 if (src
[0] == 'x' && src
[1] == 'd')
554 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
555 && ! IDENT_CHAR ((unsigned char) src
[4]))
558 *reg
= 11 + src
[3] - '0';
562 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
563 && ! IDENT_CHAR ((unsigned char) src
[3]))
566 *reg
= (src
[2] - '0') + 1;
570 if (src
[0] == 'f' && src
[1] == 'v')
572 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
578 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
579 && ! IDENT_CHAR ((unsigned char) src
[3]))
582 *reg
= (src
[2] - '0');
586 if (src
[0] == 'f' && src
[1] == 'p' && src
[2] == 'u' && src
[3] == 'l'
587 && ! IDENT_CHAR ((unsigned char) src
[4]))
593 if (src
[0] == 'f' && src
[1] == 'p' && src
[2] == 's' && src
[3] == 'c'
594 && src
[4] == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
600 if (src
[0] == 'x' && src
[1] == 'm' && src
[2] == 't' && src
[3] == 'r'
601 && src
[4] == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
615 /* JF: '.' is pseudo symbol with value of current location
616 in current segment. */
617 fake
= FAKE_LABEL_NAME
;
618 return symbol_new (fake
,
620 (valueT
) frag_now_fix (),
632 save
= input_line_pointer
;
633 input_line_pointer
= s
;
634 expression (&op
->immediate
);
635 if (op
->immediate
.X_op
== O_absent
)
636 as_bad (_("missing operand"));
637 new = input_line_pointer
;
638 input_line_pointer
= save
;
642 /* The many forms of operand:
645 @Rn Register indirect
658 pr, gbr, vbr, macl, mach
671 /* Must be predecrement. */
674 len
= parse_reg (src
, &mode
, &(op
->reg
));
676 as_bad (_("illegal register after @-"));
681 else if (src
[0] == '(')
683 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
686 len
= parse_reg (src
, &mode
, &(op
->reg
));
687 if (len
&& mode
== A_REG_N
)
692 as_bad (_("must be @(r0,...)"));
696 /* Now can be rn or gbr */
697 len
= parse_reg (src
, &mode
, &(op
->reg
));
702 else if (mode
== A_REG_N
)
704 op
->type
= A_IND_R0_REG_N
;
708 as_bad (_("syntax error in @(r0,...)"));
713 /* Must be an @(disp,.. thing) */
714 src
= parse_exp (src
, op
);
717 /* Now can be rn, gbr or pc */
718 len
= parse_reg (src
, &mode
, &op
->reg
);
723 op
->type
= A_DISP_REG_N
;
725 else if (mode
== A_GBR
)
727 op
->type
= A_DISP_GBR
;
729 else if (mode
== A_PC
)
731 /* Turn a plain @(4,pc) into @(.+4,pc). */
732 if (op
->immediate
.X_op
== O_constant
)
734 op
->immediate
.X_add_symbol
= dot();
735 op
->immediate
.X_op
= O_symbol
;
737 op
->type
= A_DISP_PC
;
741 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
746 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
751 as_bad (_("expecting )"));
757 src
+= parse_reg (src
, &mode
, &(op
->reg
));
760 as_bad (_("illegal register after @"));
765 if ((src
[0] == 'r' && src
[1] == '8')
766 || (src
[0] == 'i' && (src
[1] == 'x' || src
[1] == 's')))
771 if ((src
[0] == 'r' && src
[1] == '9')
772 || (src
[0] == 'i' && src
[1] == 'y'))
775 op
->type
= A_PMODY_N
;
789 get_operand (ptr
, op
)
800 *ptr
= parse_exp (src
, op
);
805 else if (src
[0] == '@')
807 *ptr
= parse_at (src
, op
);
810 len
= parse_reg (src
, &mode
, &(op
->reg
));
819 /* Not a reg, the only thing left is a displacement. */
820 *ptr
= parse_exp (src
, op
);
821 op
->type
= A_DISP_PC
;
827 get_operands (info
, args
, operand
)
828 sh_opcode_info
*info
;
830 sh_operand_info
*operand
;
835 /* The pre-processor will eliminate whitespace in front of '@'
836 after the first argument; we may be called multiple times
837 from assemble_ppi, so don't insist on finding whitespace here. */
841 get_operand (&ptr
, operand
+ 0);
848 get_operand (&ptr
, operand
+ 1);
849 /* ??? Hack: psha/pshl have a varying operand number depending on
850 the type of the first operand. We handle this by having the
851 three-operand version first and reducing the number of operands
852 parsed to two if we see that the first operand is an immediate.
853 This works because no insn with three operands has an immediate
855 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
861 get_operand (&ptr
, operand
+ 2);
883 /* Passed a pointer to a list of opcodes which use different
884 addressing modes, return the opcode which matches the opcodes
887 static sh_opcode_info
*
888 get_specific (opcode
, operands
)
889 sh_opcode_info
*opcode
;
890 sh_operand_info
*operands
;
892 sh_opcode_info
*this_try
= opcode
;
893 char *name
= opcode
->name
;
899 if (this_try
->name
!= name
)
901 /* We've looked so far down the table that we've run out of
902 opcodes with the same name. */
906 /* Look at both operands needed by the opcodes and provided by
907 the user - since an arg test will often fail on the same arg
908 again and again, we'll try and test the last failing arg the
909 first on each opcode try. */
910 for (n
= 0; this_try
->arg
[n
]; n
++)
912 sh_operand_info
*user
= operands
+ n
;
913 sh_arg_type arg
= this_try
->arg
[n
];
925 if (user
->type
!= arg
)
929 /* opcode needs r0 */
930 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
934 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
938 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
957 /* Opcode needs rn */
958 if (user
->type
!= arg
)
963 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
978 if (user
->type
!= arg
)
983 if (user
->type
!= arg
)
995 /* Opcode needs rn */
996 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1002 if (user
->type
!= DSP_REG_N
)
1024 if (user
->type
!= DSP_REG_N
)
1046 if (user
->type
!= DSP_REG_N
)
1068 if (user
->type
!= DSP_REG_N
)
1090 if (user
->type
!= DSP_REG_N
)
1112 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
1116 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
1120 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
1124 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
1128 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
1138 /* Opcode needs rn */
1139 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
1144 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1149 if (user
->type
!= XMTRX_M4
)
1155 printf (_("unhandled %d\n"), arg
);
1159 if ( !(valid_arch
& this_try
->arch
))
1161 valid_arch
&= this_try
->arch
;
1171 check (operand
, low
, high
)
1172 expressionS
*operand
;
1176 if (operand
->X_op
!= O_constant
1177 || operand
->X_add_number
< low
1178 || operand
->X_add_number
> high
)
1180 as_bad (_("operand must be absolute in range %d..%d"), low
, high
);
1182 return operand
->X_add_number
;
1186 insert (where
, how
, pcrel
, op
)
1190 sh_operand_info
*op
;
1192 fix_new_exp (frag_now
,
1193 where
- frag_now
->fr_literal
,
1201 build_relax (opcode
, op
)
1202 sh_opcode_info
*opcode
;
1203 sh_operand_info
*op
;
1205 int high_byte
= target_big_endian
? 0 : 1;
1208 if (opcode
->arg
[0] == A_BDISP8
)
1210 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
1211 p
= frag_var (rs_machine_dependent
,
1212 md_relax_table
[C (what
, COND32
)].rlx_length
,
1213 md_relax_table
[C (what
, COND8
)].rlx_length
,
1215 op
->immediate
.X_add_symbol
,
1216 op
->immediate
.X_add_number
,
1218 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
1220 else if (opcode
->arg
[0] == A_BDISP12
)
1222 p
= frag_var (rs_machine_dependent
,
1223 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
1224 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
1226 op
->immediate
.X_add_symbol
,
1227 op
->immediate
.X_add_number
,
1229 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
1234 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1237 insert_loop_bounds (output
, operand
)
1239 sh_operand_info
*operand
;
1244 /* Since the low byte of the opcode will be overwritten by the reloc, we
1245 can just stash the high byte into both bytes and ignore endianness. */
1248 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1249 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1253 static int count
= 0;
1255 /* If the last loop insn is a two-byte-insn, it is in danger of being
1256 swapped with the insn after it. To prevent this, create a new
1257 symbol - complete with SH_LABEL reloc - after the last loop insn.
1258 If the last loop insn is four bytes long, the symbol will be
1259 right in the middle, but four byte insns are not swapped anyways. */
1260 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1261 Hence a 9 digit number should be enough to count all REPEATs. */
1263 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
1264 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
1265 /* Make this a local symbol. */
1267 SF_SET_LOCAL (end_sym
);
1268 #endif /* OBJ_COFF */
1269 symbol_table_insert (end_sym
);
1270 end_sym
->sy_value
= operand
[1].immediate
;
1271 end_sym
->sy_value
.X_add_number
+= 2;
1272 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
1275 output
= frag_more (2);
1278 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1279 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1281 return frag_more (2);
1284 /* Now we know what sort of opcodes it is, let's build the bytes. */
1287 build_Mytes (opcode
, operand
)
1288 sh_opcode_info
*opcode
;
1289 sh_operand_info
*operand
;
1294 char *output
= frag_more (2);
1295 unsigned int size
= 2;
1296 int low_byte
= target_big_endian
? 1 : 0;
1302 for (index
= 0; index
< 4; index
++)
1304 sh_nibble_type i
= opcode
->nibbles
[index
];
1314 nbuf
[index
] = reg_n
;
1317 nbuf
[index
] = reg_m
;
1320 if (reg_n
< 2 || reg_n
> 5)
1321 as_bad (_("Invalid register: 'r%d'"), reg_n
);
1322 nbuf
[index
] = (reg_n
& 3) | 4;
1325 nbuf
[index
] = reg_n
| (reg_m
>> 2);
1328 nbuf
[index
] = reg_b
| 0x08;
1331 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
1334 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
1337 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
1340 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
1343 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
1346 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
1349 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
1352 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
1355 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
1358 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
1361 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
1364 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
1367 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
, 1, operand
);
1370 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
, 1, operand
);
1373 output
= insert_loop_bounds (output
, operand
);
1374 nbuf
[index
] = opcode
->nibbles
[3];
1378 printf (_("failed for %d\n"), i
);
1382 if (!target_big_endian
)
1384 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
1385 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
1389 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
1390 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
1395 /* Find an opcode at the start of *STR_P in the hash table, and set
1396 *STR_P to the first character after the last one read. */
1398 static sh_opcode_info
*
1399 find_cooked_opcode (str_p
)
1403 unsigned char *op_start
;
1404 unsigned char *op_end
;
1408 /* Drop leading whitespace. */
1412 /* Find the op code end.
1413 The pre-processor will eliminate whitespace in front of
1414 any '@' after the first argument; we may be called from
1415 assemble_ppi, so the opcode might be terminated by an '@'. */
1416 for (op_start
= op_end
= (unsigned char *) (str
);
1419 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
1422 unsigned char c
= op_start
[nlen
];
1424 /* The machine independent code will convert CMP/EQ into cmp/EQ
1425 because it thinks the '/' is the end of the symbol. Moreover,
1426 all but the first sub-insn is a parallel processing insn won't
1427 be capitailzed. Instead of hacking up the machine independent
1428 code, we just deal with it here. */
1429 c
= isupper (c
) ? tolower (c
) : c
;
1438 as_bad (_("can't find opcode "));
1440 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
1443 /* Assemble a parallel processing insn. */
1444 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
1447 assemble_ppi (op_end
, opcode
)
1449 sh_opcode_info
*opcode
;
1459 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
1460 Make sure we encode a defined insn pattern. */
1466 sh_operand_info operand
[3];
1468 if (opcode
->arg
[0] != A_END
)
1469 op_end
= get_operands (opcode
, op_end
, operand
);
1470 opcode
= get_specific (opcode
, operand
);
1473 /* Couldn't find an opcode which matched the operands. */
1474 char *where
= frag_more (2);
1479 as_bad (_("invalid operands for opcode"));
1483 if (opcode
->nibbles
[0] != PPI
)
1484 as_bad (_("insn can't be combined with parallel processing insn"));
1486 switch (opcode
->nibbles
[1])
1491 as_bad (_("multiple movx specifications"));
1496 as_bad (_("multiple movy specifications"));
1502 as_bad (_("multiple movx specifications"));
1503 if (reg_n
< 4 || reg_n
> 5)
1504 as_bad (_("invalid movx address register"));
1505 if (opcode
->nibbles
[2] & 8)
1507 if (reg_m
== A_A1_NUM
)
1509 else if (reg_m
!= A_A0_NUM
)
1510 as_bad (_("invalid movx dsp register"));
1515 as_bad (_("invalid movx dsp register"));
1518 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
1523 as_bad (_("multiple movy specifications"));
1524 if (opcode
->nibbles
[2] & 8)
1526 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
1529 if (reg_m
== A_A1_NUM
)
1531 else if (reg_m
!= A_A0_NUM
)
1532 as_bad (_("invalid movy dsp register"));
1537 as_bad (_("invalid movy dsp register"));
1540 if (reg_n
< 6 || reg_n
> 7)
1541 as_bad (_("invalid movy address register"));
1542 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
1546 if (operand
[0].immediate
.X_op
!= O_constant
)
1547 as_bad (_("dsp immediate shift value not constant"));
1548 field_b
= ((opcode
->nibbles
[2] << 12)
1549 | (operand
[0].immediate
.X_add_number
& 127) << 4
1554 as_bad (_("multiple parallel processing specifications"));
1555 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1556 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1560 as_bad (_("multiple condition specifications"));
1561 cond
= opcode
->nibbles
[2] << 8;
1563 goto skip_cond_check
;
1567 as_bad (_("multiple parallel processing specifications"));
1568 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1569 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1575 if ((field_b
& 0xef00) != 0xa100)
1576 as_bad (_("insn cannot be combined with pmuls"));
1578 switch (field_b
& 0xf)
1581 field_b
+= 0 - A_X0_NUM
;
1584 field_b
+= 1 - A_Y0_NUM
;
1587 field_b
+= 2 - A_A0_NUM
;
1590 field_b
+= 3 - A_A1_NUM
;
1593 as_bad (_("bad padd / psub pmuls output operand"));
1596 field_b
+= 0x4000 + reg_efg
;
1603 as_bad (_("condition not followed by conditionalizable insn"));
1609 opcode
= find_cooked_opcode (&op_end
);
1613 (_("unrecognized characters at end of parallel processing insn")));
1618 move_code
= movx
| movy
;
1621 /* Parallel processing insn. */
1622 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
1624 output
= frag_more (4);
1626 if (! target_big_endian
)
1628 output
[3] = ppi_code
>> 8;
1629 output
[2] = ppi_code
;
1633 output
[2] = ppi_code
>> 8;
1634 output
[3] = ppi_code
;
1636 move_code
|= 0xf800;
1640 /* Just a double data transfer. */
1641 output
= frag_more (2);
1644 if (! target_big_endian
)
1646 output
[1] = move_code
>> 8;
1647 output
[0] = move_code
;
1651 output
[0] = move_code
>> 8;
1652 output
[1] = move_code
;
1657 /* This is the guts of the machine-dependent assembler. STR points to a
1658 machine dependent instruction. This function is supposed to emit
1659 the frags/bytes it assembles to. */
1665 unsigned char *op_end
;
1666 sh_operand_info operand
[3];
1667 sh_opcode_info
*opcode
;
1670 opcode
= find_cooked_opcode (&str
);
1675 as_bad (_("unknown opcode"));
1680 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1682 /* Output a CODE reloc to tell the linker that the following
1683 bytes are instructions, not data. */
1684 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1686 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
1689 if (opcode
->nibbles
[0] == PPI
)
1691 size
= assemble_ppi (op_end
, opcode
);
1695 if (opcode
->arg
[0] == A_BDISP12
1696 || opcode
->arg
[0] == A_BDISP8
)
1698 parse_exp (op_end
+ 1, &operand
[0]);
1699 build_relax (opcode
, &operand
[0]);
1703 if (opcode
->arg
[0] == A_END
)
1705 /* Ignore trailing whitespace. If there is any, it has already
1706 been compressed to a single space. */
1712 op_end
= get_operands (opcode
, op_end
, operand
);
1714 opcode
= get_specific (opcode
, operand
);
1718 /* Couldn't find an opcode which matched the operands. */
1719 char *where
= frag_more (2);
1724 as_bad (_("invalid operands for opcode"));
1729 as_bad (_("excess operands: '%s'"), op_end
);
1731 size
= build_Mytes (opcode
, operand
);
1737 if (debug_type
== DEBUG_DWARF2
)
1741 /* First update the notion of the current source line. */
1742 dwarf2_where (&debug_line
);
1744 /* We want the offset of the start of this instruction within the
1745 the current frag. may be used later */
1746 addr
= frag_now
->fr_address
+ frag_now_fix () - size
;
1749 /* And record the information. */
1750 dwarf2_gen_line_info (addr
, &debug_line
);
1754 /* This routine is called each time a label definition is seen. It
1755 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
1760 static fragS
*last_label_frag
;
1761 static int last_label_offset
;
1764 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1768 offset
= frag_now_fix ();
1769 if (frag_now
!= last_label_frag
1770 || offset
!= last_label_offset
)
1772 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
1773 last_label_frag
= frag_now
;
1774 last_label_offset
= offset
;
1779 /* This routine is called when the assembler is about to output some
1780 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
1783 sh_flush_pending_output ()
1786 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1788 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1790 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
1795 md_undefined_symbol (name
)
1802 #ifndef BFD_ASSEMBLER
1805 tc_crawl_symbol_chain (headers
)
1806 object_headers
*headers
;
1808 printf (_("call to tc_crawl_symbol_chain \n"));
1812 tc_headers_hook (headers
)
1813 object_headers
*headers
;
1815 printf (_("call to tc_headers_hook \n"));
1821 /* Various routines to kill one day. */
1822 /* Equal to MAX_PRECISION in atof-ieee.c. */
1823 #define MAX_LITTLENUMS 6
1825 /* Turn a string in input_line_pointer into a floating point constant
1826 of type TYPE, and store the appropriate bytes in *LITP. The number
1827 of LITTLENUMS emitted is stored in *SIZEP . An error message is
1828 returned, or NULL on OK. */
1831 md_atof (type
, litP
, sizeP
)
1837 LITTLENUM_TYPE words
[4];
1853 return _("bad call to md_atof");
1856 t
= atof_ieee (input_line_pointer
, type
, words
);
1858 input_line_pointer
= t
;
1862 if (! target_big_endian
)
1864 for (i
= prec
- 1; i
>= 0; i
--)
1866 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
1872 for (i
= 0; i
< prec
; i
++)
1874 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
1882 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
1883 call instruction. It refers to a label of the instruction which
1884 loads the register which the call uses. We use it to generate a
1885 special reloc for the linker. */
1889 int ignore ATTRIBUTE_UNUSED
;
1894 as_warn (_(".uses pseudo-op seen when not relaxing"));
1898 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
1900 as_bad (_("bad .uses format"));
1901 ignore_rest_of_line ();
1905 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
1907 demand_empty_rest_of_line ();
1910 CONST
char *md_shortopts
= "";
1911 struct option md_longopts
[] =
1913 #define OPTION_RELAX (OPTION_MD_BASE)
1914 #define OPTION_LITTLE (OPTION_MD_BASE + 1)
1915 #define OPTION_SMALL (OPTION_LITTLE + 1)
1916 #define OPTION_DSP (OPTION_SMALL + 1)
1918 {"relax", no_argument
, NULL
, OPTION_RELAX
},
1919 {"little", no_argument
, NULL
, OPTION_LITTLE
},
1920 {"small", no_argument
, NULL
, OPTION_SMALL
},
1921 {"dsp", no_argument
, NULL
, OPTION_DSP
},
1922 {NULL
, no_argument
, NULL
, 0}
1924 size_t md_longopts_size
= sizeof (md_longopts
);
1927 md_parse_option (c
, arg
)
1929 char *arg ATTRIBUTE_UNUSED
;
1939 target_big_endian
= 0;
1958 md_show_usage (stream
)
1961 fprintf (stream
, _("\
1963 -little generate little endian code\n\
1964 -relax alter jump instructions for long displacements\n\
1965 -small align sections to 4 byte boundaries, not 16\n\
1966 -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n"));
1970 tc_Nout_fix_to_chars ()
1972 printf (_("call to tc_Nout_fix_to_chars \n"));
1976 /* This struct is used to pass arguments to sh_count_relocs through
1977 bfd_map_over_sections. */
1979 struct sh_count_relocs
1981 /* Symbol we are looking for. */
1983 /* Count of relocs found. */
1987 /* Count the number of fixups in a section which refer to a particular
1988 symbol. When using BFD_ASSEMBLER, this is called via
1989 bfd_map_over_sections. */
1992 sh_count_relocs (abfd
, sec
, data
)
1993 bfd
*abfd ATTRIBUTE_UNUSED
;
1997 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
1998 segment_info_type
*seginfo
;
2002 seginfo
= seg_info (sec
);
2003 if (seginfo
== NULL
)
2007 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2009 if (fix
->fx_addsy
== sym
)
2017 /* Handle the count relocs for a particular section. When using
2018 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
2021 sh_frob_section (abfd
, sec
, ignore
)
2022 bfd
*abfd ATTRIBUTE_UNUSED
;
2024 PTR ignore ATTRIBUTE_UNUSED
;
2026 segment_info_type
*seginfo
;
2029 seginfo
= seg_info (sec
);
2030 if (seginfo
== NULL
)
2033 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2038 struct sh_count_relocs info
;
2040 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
2043 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2044 symbol in the same section. */
2045 sym
= fix
->fx_addsy
;
2047 || fix
->fx_subsy
!= NULL
2048 || fix
->fx_addnumber
!= 0
2049 || S_GET_SEGMENT (sym
) != sec
2050 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2051 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2053 || S_IS_EXTERNAL (sym
))
2055 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2056 _(".uses does not refer to a local symbol in the same section"));
2060 /* Look through the fixups again, this time looking for one
2061 at the same location as sym. */
2062 val
= S_GET_VALUE (sym
);
2063 for (fscan
= seginfo
->fix_root
;
2065 fscan
= fscan
->fx_next
)
2066 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
2067 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
2068 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
2069 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
2070 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
2074 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2075 _("can't find fixup pointed to by .uses"));
2079 if (fscan
->fx_tcbit
)
2081 /* We've already done this one. */
2085 /* The variable fscan should also be a fixup to a local symbol
2086 in the same section. */
2087 sym
= fscan
->fx_addsy
;
2089 || fscan
->fx_subsy
!= NULL
2090 || fscan
->fx_addnumber
!= 0
2091 || S_GET_SEGMENT (sym
) != sec
2092 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2093 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2095 || S_IS_EXTERNAL (sym
))
2097 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2098 _(".uses target does not refer to a local symbol in the same section"));
2102 /* Now we look through all the fixups of all the sections,
2103 counting the number of times we find a reference to sym. */
2106 #ifdef BFD_ASSEMBLER
2107 bfd_map_over_sections (stdoutput
, sh_count_relocs
, (PTR
) &info
);
2112 for (iscan
= SEG_E0
; iscan
< SEG_UNKNOWN
; iscan
++)
2113 sh_count_relocs ((bfd
*) NULL
, iscan
, (PTR
) &info
);
2120 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2121 We have already adjusted the value of sym to include the
2122 fragment address, so we undo that adjustment here. */
2123 subseg_change (sec
, 0);
2124 fix_new (symbol_get_frag (sym
),
2125 S_GET_VALUE (sym
) - symbol_get_frag (sym
)->fr_address
,
2126 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
2130 /* This function is called after the symbol table has been completed,
2131 but before the relocs or section contents have been written out.
2132 If we have seen any .uses pseudo-ops, they point to an instruction
2133 which loads a register with the address of a function. We look
2134 through the fixups to find where the function address is being
2135 loaded from. We then generate a COUNT reloc giving the number of
2136 times that function address is referred to. The linker uses this
2137 information when doing relaxing, to decide when it can eliminate
2138 the stored function address entirely. */
2146 #ifdef BFD_ASSEMBLER
2147 bfd_map_over_sections (stdoutput
, sh_frob_section
, (PTR
) NULL
);
2152 for (iseg
= SEG_E0
; iseg
< SEG_UNKNOWN
; iseg
++)
2153 sh_frob_section ((bfd
*) NULL
, iseg
, (PTR
) NULL
);
2158 /* Called after relaxing. Set the correct sizes of the fragments, and
2159 create relocs so that md_apply_fix will fill in the correct values. */
2162 md_convert_frag (headers
, seg
, fragP
)
2163 #ifdef BFD_ASSEMBLER
2164 bfd
*headers ATTRIBUTE_UNUSED
;
2166 object_headers
*headers
;
2173 switch (fragP
->fr_subtype
)
2175 case C (COND_JUMP
, COND8
):
2176 case C (COND_JUMP_DELAY
, COND8
):
2177 subseg_change (seg
, 0);
2178 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2179 1, BFD_RELOC_SH_PCDISP8BY2
);
2184 case C (UNCOND_JUMP
, UNCOND12
):
2185 subseg_change (seg
, 0);
2186 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2187 1, BFD_RELOC_SH_PCDISP12BY2
);
2192 case C (UNCOND_JUMP
, UNCOND32
):
2193 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
2194 if (fragP
->fr_symbol
== NULL
)
2195 as_bad (_("at 0x%lx, displacement overflows 12-bit field"),
2196 (unsigned long) fragP
->fr_address
);
2197 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2198 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 12-bit field"),
2199 (unsigned long) fragP
->fr_address
,
2200 S_GET_NAME (fragP
->fr_symbol
));
2202 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 12-bit field"),
2203 (unsigned long) fragP
->fr_address
,
2204 S_GET_NAME (fragP
->fr_symbol
));
2207 /* This code works, but generates poor code and the compiler
2208 should never produce a sequence that requires it to be used. */
2210 /* A jump wont fit in 12 bits, make code which looks like
2216 int t
= buffer
[0] & 0x10;
2218 buffer
[highbyte
] = 0xa0; /* branch over move and disp */
2219 buffer
[lowbyte
] = 3;
2220 buffer
[highbyte
+ 2] = 0xd0 | JREG
; /* Build mov insn */
2221 buffer
[lowbyte
+ 2] = 0x00;
2223 buffer
[highbyte
+ 4] = 0; /* space for 32 bit jump disp */
2224 buffer
[lowbyte
+ 4] = 0;
2225 buffer
[highbyte
+ 6] = 0;
2226 buffer
[lowbyte
+ 6] = 0;
2228 buffer
[highbyte
+ 8] = 0x40 | JREG
; /* Build jmp @JREG */
2229 buffer
[lowbyte
+ 8] = t
? 0xb : 0x2b;
2231 buffer
[highbyte
+ 10] = 0x20; /* build nop */
2232 buffer
[lowbyte
+ 10] = 0x0b;
2234 /* Make reloc for the long disp. */
2242 fragP
->fr_fix
+= UNCOND32_LENGTH
;
2249 case C (COND_JUMP
, COND12
):
2250 case C (COND_JUMP_DELAY
, COND12
):
2251 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
2252 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2253 was due to gas incorrectly relaxing an out-of-range conditional
2254 branch with delay slot. It turned:
2255 bf.s L6 (slot mov.l r12,@(44,r0))
2258 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2260 32: 10 cb mov.l r12,@(44,r0)
2261 Therefore, branches with delay slots have to be handled
2262 differently from ones without delay slots. */
2264 unsigned char *buffer
=
2265 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
2266 int highbyte
= target_big_endian
? 0 : 1;
2267 int lowbyte
= target_big_endian
? 1 : 0;
2268 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
2270 /* Toggle the true/false bit of the bcond. */
2271 buffer
[highbyte
] ^= 0x2;
2273 /* If this is a dalayed branch, we may not put the the bra in the
2274 slot. So we change it to a non-delayed branch, like that:
2275 b! cond slot_label; bra disp; slot_label: slot_insn
2276 ??? We should try if swapping the conditional branch and
2277 its delay-slot insn already makes the branch reach. */
2279 /* Build a relocation to six / four bytes farther on. */
2280 subseg_change (seg
, 0);
2281 fix_new (fragP
, fragP
->fr_fix
, 2,
2282 #ifdef BFD_ASSEMBLER
2283 section_symbol (seg
),
2285 seg_info (seg
)->dot
,
2287 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
2288 1, BFD_RELOC_SH_PCDISP8BY2
);
2290 /* Set up a jump instruction. */
2291 buffer
[highbyte
+ 2] = 0xa0;
2292 buffer
[lowbyte
+ 2] = 0;
2293 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
2294 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
2298 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
2303 /* Fill in a NOP instruction. */
2304 buffer
[highbyte
+ 4] = 0x0;
2305 buffer
[lowbyte
+ 4] = 0x9;
2314 case C (COND_JUMP
, COND32
):
2315 case C (COND_JUMP_DELAY
, COND32
):
2316 case C (COND_JUMP
, UNDEF_WORD_DISP
):
2317 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
2318 if (fragP
->fr_symbol
== NULL
)
2319 as_bad (_("at 0x%lx, displacement overflows 8-bit field"),
2320 (unsigned long) fragP
->fr_address
);
2321 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2322 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 8-bit field "),
2323 (unsigned long) fragP
->fr_address
,
2324 S_GET_NAME (fragP
->fr_symbol
));
2326 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 8-bit field "),
2327 (unsigned long) fragP
->fr_address
,
2328 S_GET_NAME (fragP
->fr_symbol
));
2331 /* This code works, but generates poor code, and the compiler
2332 should never produce a sequence that requires it to be used. */
2334 /* A bcond won't fit and it won't go into a 12 bit
2335 displacement either, the code sequence looks like:
2344 buffer
[0] ^= 0x2; /* Toggle T/F bit */
2346 buffer
[1] = 5; /* branch over mov, jump, nop and ptr */
2347 buffer
[2] = 0xd0 | JREG
; /* Build mov insn */
2349 buffer
[4] = 0x40 | JREG
; /* Build jmp @JREG */
2351 buffer
[6] = 0x20; /* build nop */
2353 buffer
[8] = 0; /* space for 32 bit jump disp */
2359 /* Make reloc for the long disp */
2367 fragP
->fr_fix
+= COND32_LENGTH
;
2378 if (donerelax
&& !sh_relax
)
2379 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
2380 _("overflow in branch to %s; converted into longer instruction sequence"),
2381 (fragP
->fr_symbol
!= NULL
2382 ? S_GET_NAME (fragP
->fr_symbol
)
2387 md_section_align (seg
, size
)
2391 #ifdef BFD_ASSEMBLER
2394 #else /* ! OBJ_ELF */
2395 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
2396 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
2397 #endif /* ! OBJ_ELF */
2398 #else /* ! BFD_ASSEMBLER */
2399 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
2400 & (-1 << section_alignment
[(int) seg
]));
2401 #endif /* ! BFD_ASSEMBLER */
2404 /* This static variable is set by s_uacons to tell sh_cons_align that
2405 the expession does not need to be aligned. */
2407 static int sh_no_align_cons
= 0;
2409 /* This handles the unaligned space allocation pseudo-ops, such as
2410 .uaword. .uaword is just like .word, but the value does not need
2417 /* Tell sh_cons_align not to align this value. */
2418 sh_no_align_cons
= 1;
2422 /* If a .word, et. al., pseud-op is seen, warn if the value is not
2423 aligned correctly. Note that this can cause warnings to be issued
2424 when assembling initialized structured which were declared with the
2425 packed attribute. FIXME: Perhaps we should require an option to
2426 enable this warning? */
2429 sh_cons_align (nbytes
)
2435 if (sh_no_align_cons
)
2437 /* This is an unaligned pseudo-op. */
2438 sh_no_align_cons
= 0;
2443 while ((nbytes
& 1) == 0)
2452 if (now_seg
== absolute_section
)
2454 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
2455 as_warn (_("misaligned data"));
2459 p
= frag_var (rs_align_code
, 1, 1, (relax_substateT
) 0,
2460 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
2462 record_alignment (now_seg
, nalign
);
2465 /* When relaxing, we need to output a reloc for any .align directive
2466 that requests alignment to a four byte boundary or larger. This is
2467 also where we check for misaligned data. */
2470 sh_handle_align (frag
)
2474 && frag
->fr_type
== rs_align
2475 && frag
->fr_address
+ frag
->fr_fix
> 0
2476 && frag
->fr_offset
> 1
2477 && now_seg
!= bss_section
)
2478 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
2479 BFD_RELOC_SH_ALIGN
);
2481 if (frag
->fr_type
== rs_align_code
2482 && frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
!= 0)
2483 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
2486 /* This macro decides whether a particular reloc is an entry in a
2487 switch table. It is used when relaxing, because the linker needs
2488 to know about all such entries so that it can adjust them if
2491 #ifdef BFD_ASSEMBLER
2492 #define SWITCH_TABLE_CONS(fix) (0)
2494 #define SWITCH_TABLE_CONS(fix) \
2495 ((fix)->fx_r_type == 0 \
2496 && ((fix)->fx_size == 2 \
2497 || (fix)->fx_size == 1 \
2498 || (fix)->fx_size == 4))
2501 #define SWITCH_TABLE(fix) \
2502 ((fix)->fx_addsy != NULL \
2503 && (fix)->fx_subsy != NULL \
2504 && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
2505 && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
2506 && ((fix)->fx_r_type == BFD_RELOC_32 \
2507 || (fix)->fx_r_type == BFD_RELOC_16 \
2508 || (fix)->fx_r_type == BFD_RELOC_8 \
2509 || SWITCH_TABLE_CONS (fix)))
2511 /* See whether we need to force a relocation into the output file.
2512 This is used to force out switch and PC relative relocations when
2516 sh_force_relocation (fix
)
2520 if (fix
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2521 || fix
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
2522 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
2523 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
)
2529 return (fix
->fx_pcrel
2530 || SWITCH_TABLE (fix
)
2531 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
2532 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
2533 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
2534 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
2535 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
2540 sh_fix_adjustable (fixP
)
2544 if (fixP
->fx_addsy
== NULL
)
2547 /* We need the symbol name for the VTABLE entries */
2548 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2549 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
2556 sh_elf_final_processing ()
2560 /* Set file-specific flags to indicate if this code needs
2561 a processor with the sh-dsp / sh3e ISA to execute. */
2562 if (valid_arch
& arch_sh1
)
2564 else if (valid_arch
& arch_sh2
)
2566 else if (valid_arch
& arch_sh_dsp
)
2568 else if (valid_arch
& arch_sh3
)
2570 else if (valid_arch
& arch_sh3_dsp
)
2572 else if (valid_arch
& arch_sh3e
)
2574 else if (valid_arch
& arch_sh4
)
2579 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
2580 elf_elfheader (stdoutput
)->e_flags
|= val
;
2584 /* Apply a fixup to the object file. */
2586 #ifdef BFD_ASSEMBLER
2588 md_apply_fix (fixP
, valp
)
2593 md_apply_fix (fixP
, val
)
2598 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2599 int lowbyte
= target_big_endian
? 1 : 0;
2600 int highbyte
= target_big_endian
? 0 : 1;
2601 #ifdef BFD_ASSEMBLER
2607 #ifdef BFD_ASSEMBLER
2608 /* The function adjust_reloc_syms won't convert a reloc against a weak
2609 symbol into a reloc against a section, but bfd_install_relocation
2610 will screw up if the symbol is defined, so we have to adjust val here
2611 to avoid the screw up later. */
2612 if (fixP
->fx_addsy
!= NULL
2613 && S_IS_WEAK (fixP
->fx_addsy
))
2614 val
-= S_GET_VALUE (fixP
->fx_addsy
);
2617 #ifndef BFD_ASSEMBLER
2618 if (fixP
->fx_r_type
== 0)
2620 if (fixP
->fx_size
== 2)
2621 fixP
->fx_r_type
= BFD_RELOC_16
;
2622 else if (fixP
->fx_size
== 4)
2623 fixP
->fx_r_type
= BFD_RELOC_32
;
2624 else if (fixP
->fx_size
== 1)
2625 fixP
->fx_r_type
= BFD_RELOC_8
;
2633 switch (fixP
->fx_r_type
)
2635 case BFD_RELOC_SH_IMM4
:
2637 *buf
= (*buf
& 0xf0) | (val
& 0xf);
2640 case BFD_RELOC_SH_IMM4BY2
:
2643 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
2646 case BFD_RELOC_SH_IMM4BY4
:
2649 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
2652 case BFD_RELOC_SH_IMM8BY2
:
2658 case BFD_RELOC_SH_IMM8BY4
:
2665 case BFD_RELOC_SH_IMM8
:
2666 /* Sometimes the 8 bit value is sign extended (e.g., add) and
2667 sometimes it is not (e.g., and). We permit any 8 bit value.
2668 Note that adding further restrictions may invalidate
2669 reasonable looking assembly code, such as ``and -0x1,r0''. */
2675 case BFD_RELOC_SH_PCRELIMM8BY4
:
2676 /* The lower two bits of the PC are cleared before the
2677 displacement is added in. We can assume that the destination
2678 is on a 4 byte bounday. If this instruction is also on a 4
2679 byte boundary, then we want
2681 and target - here is a multiple of 4.
2682 Otherwise, we are on a 2 byte boundary, and we want
2683 (target - (here - 2)) / 4
2684 and target - here is not a multiple of 4. Computing
2685 (target - (here - 2)) / 4 == (target - here + 2) / 4
2686 works for both cases, since in the first case the addition of
2687 2 will be removed by the division. target - here is in the
2689 val
= (val
+ 2) / 4;
2691 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2695 case BFD_RELOC_SH_PCRELIMM8BY2
:
2698 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2702 case BFD_RELOC_SH_PCDISP8BY2
:
2704 if (val
< -0x80 || val
> 0x7f)
2705 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2709 case BFD_RELOC_SH_PCDISP12BY2
:
2711 if (val
< -0x800 || val
>= 0x7ff)
2712 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2713 buf
[lowbyte
] = val
& 0xff;
2714 buf
[highbyte
] |= (val
>> 8) & 0xf;
2718 md_number_to_chars (buf
, val
, 4);
2722 md_number_to_chars (buf
, val
, 2);
2725 case BFD_RELOC_SH_USES
:
2726 /* Pass the value into sh_coff_reloc_mangle. */
2727 fixP
->fx_addnumber
= val
;
2730 case BFD_RELOC_SH_COUNT
:
2731 case BFD_RELOC_SH_ALIGN
:
2732 case BFD_RELOC_SH_CODE
:
2733 case BFD_RELOC_SH_DATA
:
2734 case BFD_RELOC_SH_LABEL
:
2735 /* Nothing to do here. */
2738 case BFD_RELOC_SH_LOOP_START
:
2739 case BFD_RELOC_SH_LOOP_END
:
2741 case BFD_RELOC_VTABLE_INHERIT
:
2742 case BFD_RELOC_VTABLE_ENTRY
:
2744 #ifdef BFD_ASSEMBLER
2756 if ((val
& ((1 << shift
) - 1)) != 0)
2757 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
2761 val
= ((val
>> shift
)
2762 | ((long) -1 & ~ ((long) -1 >> shift
)));
2764 if (max
!= 0 && (val
< min
|| val
> max
))
2765 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
2767 #ifdef BFD_ASSEMBLER
2772 /* Called just before address relaxation. Return the length
2773 by which a fragment must grow to reach it's destination. */
2776 md_estimate_size_before_relax (fragP
, segment_type
)
2777 register fragS
*fragP
;
2778 register segT segment_type
;
2780 switch (fragP
->fr_subtype
)
2782 case C (UNCOND_JUMP
, UNDEF_DISP
):
2783 /* Used to be a branch to somewhere which was unknown. */
2784 if (!fragP
->fr_symbol
)
2786 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
2787 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
;
2789 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
2791 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
2792 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
;
2796 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
2797 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
;
2798 return md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
;
2804 case C (COND_JUMP
, UNDEF_DISP
):
2805 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
2806 /* Used to be a branch to somewhere which was unknown. */
2807 if (fragP
->fr_symbol
2808 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
2810 int what
= GET_WHAT (fragP
->fr_subtype
);
2811 /* Got a symbol and it's defined in this segment, become byte
2812 sized - maybe it will fix up. */
2813 fragP
->fr_subtype
= C (what
, COND8
);
2814 fragP
->fr_var
= md_relax_table
[C (what
, COND8
)].rlx_length
;
2816 else if (fragP
->fr_symbol
)
2818 int what
= GET_WHAT (fragP
->fr_subtype
);
2819 /* Its got a segment, but its not ours, so it will always be long. */
2820 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
2821 fragP
->fr_var
= md_relax_table
[C (what
, COND32
)].rlx_length
;
2822 return md_relax_table
[C (what
, COND32
)].rlx_length
;
2826 int what
= GET_WHAT (fragP
->fr_subtype
);
2827 /* We know the abs value. */
2828 fragP
->fr_subtype
= C (what
, COND8
);
2829 fragP
->fr_var
= md_relax_table
[C (what
, COND8
)].rlx_length
;
2834 return fragP
->fr_var
;
2837 /* Put number into target byte order. */
2840 md_number_to_chars (ptr
, use
, nbytes
)
2845 if (! target_big_endian
)
2846 number_to_chars_littleendian (ptr
, use
, nbytes
);
2848 number_to_chars_bigendian (ptr
, use
, nbytes
);
2852 md_pcrel_from (fixP
)
2855 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
2861 tc_coff_sizemachdep (frag
)
2864 return md_relax_table
[frag
->fr_subtype
].rlx_length
;
2867 #endif /* OBJ_COFF */
2869 /* When we align the .text section, insert the correct NOP pattern. */
2872 sh_do_align (n
, fill
, len
, max
)
2875 int len ATTRIBUTE_UNUSED
;
2879 && subseg_text_p (now_seg
)
2882 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
2883 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
2885 /* First align to a 2 byte boundary, in case there is an odd
2887 frag_align (1, 0, 0);
2888 if (target_big_endian
)
2889 frag_align_pattern (n
, big_nop_pattern
, sizeof big_nop_pattern
, max
);
2891 frag_align_pattern (n
, little_nop_pattern
, sizeof little_nop_pattern
,
2899 #ifndef BFD_ASSEMBLER
2902 /* Map BFD relocs to SH COFF relocs. */
2906 bfd_reloc_code_real_type bfd_reloc
;
2910 static const struct reloc_map coff_reloc_map
[] =
2912 { BFD_RELOC_32
, R_SH_IMM32
},
2913 { BFD_RELOC_16
, R_SH_IMM16
},
2914 { BFD_RELOC_8
, R_SH_IMM8
},
2915 { BFD_RELOC_SH_PCDISP8BY2
, R_SH_PCDISP8BY2
},
2916 { BFD_RELOC_SH_PCDISP12BY2
, R_SH_PCDISP
},
2917 { BFD_RELOC_SH_IMM4
, R_SH_IMM4
},
2918 { BFD_RELOC_SH_IMM4BY2
, R_SH_IMM4BY2
},
2919 { BFD_RELOC_SH_IMM4BY4
, R_SH_IMM4BY4
},
2920 { BFD_RELOC_SH_IMM8
, R_SH_IMM8
},
2921 { BFD_RELOC_SH_IMM8BY2
, R_SH_IMM8BY2
},
2922 { BFD_RELOC_SH_IMM8BY4
, R_SH_IMM8BY4
},
2923 { BFD_RELOC_SH_PCRELIMM8BY2
, R_SH_PCRELIMM8BY2
},
2924 { BFD_RELOC_SH_PCRELIMM8BY4
, R_SH_PCRELIMM8BY4
},
2925 { BFD_RELOC_8_PCREL
, R_SH_SWITCH8
},
2926 { BFD_RELOC_SH_SWITCH16
, R_SH_SWITCH16
},
2927 { BFD_RELOC_SH_SWITCH32
, R_SH_SWITCH32
},
2928 { BFD_RELOC_SH_USES
, R_SH_USES
},
2929 { BFD_RELOC_SH_COUNT
, R_SH_COUNT
},
2930 { BFD_RELOC_SH_ALIGN
, R_SH_ALIGN
},
2931 { BFD_RELOC_SH_CODE
, R_SH_CODE
},
2932 { BFD_RELOC_SH_DATA
, R_SH_DATA
},
2933 { BFD_RELOC_SH_LABEL
, R_SH_LABEL
},
2934 { BFD_RELOC_UNUSED
, 0 }
2937 /* Adjust a reloc for the SH. This is similar to the generic code,
2938 but does some minor tweaking. */
2941 sh_coff_reloc_mangle (seg
, fix
, intr
, paddr
)
2942 segment_info_type
*seg
;
2944 struct internal_reloc
*intr
;
2947 symbolS
*symbol_ptr
= fix
->fx_addsy
;
2950 intr
->r_vaddr
= paddr
+ fix
->fx_frag
->fr_address
+ fix
->fx_where
;
2952 if (! SWITCH_TABLE (fix
))
2954 const struct reloc_map
*rm
;
2956 for (rm
= coff_reloc_map
; rm
->bfd_reloc
!= BFD_RELOC_UNUSED
; rm
++)
2957 if (rm
->bfd_reloc
== (bfd_reloc_code_real_type
) fix
->fx_r_type
)
2959 if (rm
->bfd_reloc
== BFD_RELOC_UNUSED
)
2960 as_bad_where (fix
->fx_file
, fix
->fx_line
,
2961 _("Can not represent %s relocation in this object file format"),
2962 bfd_get_reloc_code_name (fix
->fx_r_type
));
2963 intr
->r_type
= rm
->sh_reloc
;
2970 if (fix
->fx_r_type
== BFD_RELOC_16
)
2971 intr
->r_type
= R_SH_SWITCH16
;
2972 else if (fix
->fx_r_type
== BFD_RELOC_8
)
2973 intr
->r_type
= R_SH_SWITCH8
;
2974 else if (fix
->fx_r_type
== BFD_RELOC_32
)
2975 intr
->r_type
= R_SH_SWITCH32
;
2979 /* For a switch reloc, we set r_offset to the difference between
2980 the reloc address and the subtrahend. When the linker is
2981 doing relaxing, it can use the determine the starting and
2982 ending points of the switch difference expression. */
2983 intr
->r_offset
= intr
->r_vaddr
- S_GET_VALUE (fix
->fx_subsy
);
2986 /* PC relative relocs are always against the current section. */
2987 if (symbol_ptr
== NULL
)
2989 switch (fix
->fx_r_type
)
2991 case BFD_RELOC_SH_PCRELIMM8BY2
:
2992 case BFD_RELOC_SH_PCRELIMM8BY4
:
2993 case BFD_RELOC_SH_PCDISP8BY2
:
2994 case BFD_RELOC_SH_PCDISP12BY2
:
2995 case BFD_RELOC_SH_USES
:
2996 symbol_ptr
= seg
->dot
;
3003 if (fix
->fx_r_type
== BFD_RELOC_SH_USES
)
3005 /* We can't store the offset in the object file, since this
3006 reloc does not take up any space, so we store it in r_offset.
3007 The fx_addnumber field was set in md_apply_fix. */
3008 intr
->r_offset
= fix
->fx_addnumber
;
3010 else if (fix
->fx_r_type
== BFD_RELOC_SH_COUNT
)
3012 /* We can't store the count in the object file, since this reloc
3013 does not take up any space, so we store it in r_offset. The
3014 fx_offset field was set when the fixup was created in
3015 sh_coff_frob_file. */
3016 intr
->r_offset
= fix
->fx_offset
;
3017 /* This reloc is always absolute. */
3020 else if (fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
)
3022 /* Store the alignment in the r_offset field. */
3023 intr
->r_offset
= fix
->fx_offset
;
3024 /* This reloc is always absolute. */
3027 else if (fix
->fx_r_type
== BFD_RELOC_SH_CODE
3028 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3029 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
)
3031 /* These relocs are always absolute. */
3035 /* Turn the segment of the symbol into an offset. */
3036 if (symbol_ptr
!= NULL
)
3038 dot
= segment_info
[S_GET_SEGMENT (symbol_ptr
)].dot
;
3040 intr
->r_symndx
= dot
->sy_number
;
3042 intr
->r_symndx
= symbol_ptr
->sy_number
;
3045 intr
->r_symndx
= -1;
3048 #endif /* OBJ_COFF */
3049 #endif /* ! BFD_ASSEMBLER */
3051 #ifdef BFD_ASSEMBLER
3053 /* Create a reloc. */
3056 tc_gen_reloc (section
, fixp
)
3057 asection
*section ATTRIBUTE_UNUSED
;
3061 bfd_reloc_code_real_type r_type
;
3063 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3064 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
3065 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
3066 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3068 r_type
= fixp
->fx_r_type
;
3070 if (SWITCH_TABLE (fixp
))
3072 rel
->addend
= rel
->address
- S_GET_VALUE (fixp
->fx_subsy
);
3073 if (r_type
== BFD_RELOC_16
)
3074 r_type
= BFD_RELOC_SH_SWITCH16
;
3075 else if (r_type
== BFD_RELOC_8
)
3076 r_type
= BFD_RELOC_8_PCREL
;
3077 else if (r_type
== BFD_RELOC_32
)
3078 r_type
= BFD_RELOC_SH_SWITCH32
;
3082 else if (r_type
== BFD_RELOC_SH_USES
)
3083 rel
->addend
= fixp
->fx_addnumber
;
3084 else if (r_type
== BFD_RELOC_SH_COUNT
)
3085 rel
->addend
= fixp
->fx_offset
;
3086 else if (r_type
== BFD_RELOC_SH_ALIGN
)
3087 rel
->addend
= fixp
->fx_offset
;
3088 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
3089 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
3090 rel
->addend
= fixp
->fx_offset
;
3091 else if (r_type
== BFD_RELOC_SH_LOOP_START
3092 || r_type
== BFD_RELOC_SH_LOOP_END
)
3093 rel
->addend
= fixp
->fx_offset
;
3094 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
3097 rel
->address
= rel
->addend
= fixp
->fx_offset
;
3099 else if (fixp
->fx_pcrel
)
3100 rel
->addend
= fixp
->fx_addnumber
;
3104 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
3105 if (rel
->howto
== NULL
)
3107 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3108 _("Cannot represent relocation type %s"),
3109 bfd_get_reloc_code_name (r_type
));
3110 /* Set howto to a garbage value so that we can keep going. */
3111 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3112 assert (rel
->howto
!= NULL
);
3118 #endif /* BFD_ASSEMBLER */
3123 if (debug_type
== DEBUG_DWARF2
)