1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
22 /* Written By Steve Chamberlain <sac@cygnus.com> */
27 #include "opcodes/sh-opc.h"
28 #include "safe-ctype.h"
29 #include "struc-symbol.h"
35 #include "dwarf2dbg.h"
36 #include "dw2gencfi.h"
42 expressionS immediate
;
46 const char comment_chars
[] = "!";
47 const char line_separator_chars
[] = ";";
48 const char line_comment_chars
[] = "!#";
50 static void s_uses (int);
51 static void s_uacons (int);
54 static void sh_elf_cons (int);
56 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
60 big (int ignore ATTRIBUTE_UNUSED
)
62 if (! target_big_endian
)
63 as_bad (_("directive .big encountered when option -big required"));
65 /* Stop further messages. */
66 target_big_endian
= 1;
70 little (int ignore ATTRIBUTE_UNUSED
)
72 if (target_big_endian
)
73 as_bad (_("directive .little encountered when option -little required"));
75 /* Stop further messages. */
76 target_big_endian
= 0;
79 /* This table describes all the machine specific pseudo-ops the assembler
80 has to support. The fields are:
81 pseudo-op name without dot
82 function to call to execute this pseudo-op
83 Integer arg to pass to the function. */
85 const pseudo_typeS md_pseudo_table
[] =
88 {"long", sh_elf_cons
, 4},
89 {"int", sh_elf_cons
, 4},
90 {"word", sh_elf_cons
, 2},
91 {"short", sh_elf_cons
, 2},
97 {"form", listing_psize
, 0},
98 {"little", little
, 0},
99 {"heading", listing_title
, 0},
100 {"import", s_ignore
, 0},
101 {"page", listing_eject
, 0},
102 {"program", s_ignore
, 0},
104 {"uaword", s_uacons
, 2},
105 {"ualong", s_uacons
, 4},
106 {"uaquad", s_uacons
, 8},
107 {"2byte", s_uacons
, 2},
108 {"4byte", s_uacons
, 4},
109 {"8byte", s_uacons
, 8},
111 {"mode", s_sh64_mode
, 0 },
113 /* Have the old name too. */
114 {"isa", s_sh64_mode
, 0 },
116 /* Assert that the right ABI is used. */
117 {"abi", s_sh64_abi
, 0 },
119 { "vtable_inherit", sh64_vtable_inherit
, 0 },
120 { "vtable_entry", sh64_vtable_entry
, 0 },
121 #endif /* HAVE_SH64 */
125 int sh_relax
; /* set if -relax seen */
127 /* Whether -small was seen. */
131 /* Flag to generate relocations against symbol values for local symbols. */
133 static int dont_adjust_reloc_32
;
135 /* Flag to indicate that '$' is allowed as a register prefix. */
137 static int allow_dollar_register_prefix
;
139 /* Preset architecture set, if given; zero otherwise. */
141 static unsigned int preset_target_arch
;
143 /* The bit mask of architectures that could
144 accommodate the insns seen so far. */
145 static unsigned int valid_arch
;
147 const char EXP_CHARS
[] = "eE";
149 /* Chars that mean this number is a floating point constant. */
152 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
154 #define C(a,b) ENCODE_RELAX(a,b)
156 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
157 #define GET_WHAT(x) ((x>>4))
159 /* These are the three types of relaxable instruction. */
160 /* These are the types of relaxable instructions; except for END which is
163 #define COND_JUMP_DELAY 2
164 #define UNCOND_JUMP 3
168 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
169 #define SH64PCREL16_32 4
170 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
171 #define SH64PCREL16_64 5
173 /* Variants of the above for adjusting the insn to PTA or PTB according to
175 #define SH64PCREL16PT_32 6
176 #define SH64PCREL16PT_64 7
178 /* A MOVI expansion, expanding to at most 32 or 64 bits. */
179 #define MOVI_IMM_32 8
180 #define MOVI_IMM_32_PCREL 9
181 #define MOVI_IMM_64 10
182 #define MOVI_IMM_64_PCREL 11
185 #else /* HAVE_SH64 */
189 #endif /* HAVE_SH64 */
195 #define UNDEF_WORD_DISP 4
201 #define UNDEF_SH64PCREL 0
202 #define SH64PCREL16 1
203 #define SH64PCREL32 2
204 #define SH64PCREL48 3
205 #define SH64PCREL64 4
206 #define SH64PCRELPLT 5
214 #define MOVI_GOTOFF 6
216 #endif /* HAVE_SH64 */
218 /* Branch displacements are from the address of the branch plus
219 four, thus all minimum and maximum values have 4 added to them. */
222 #define COND8_LENGTH 2
224 /* There is one extra instruction before the branch, so we must add
225 two more bytes to account for it. */
226 #define COND12_F 4100
227 #define COND12_M -4090
228 #define COND12_LENGTH 6
230 #define COND12_DELAY_LENGTH 4
232 /* ??? The minimum and maximum values are wrong, but this does not matter
233 since this relocation type is not supported yet. */
234 #define COND32_F (1<<30)
235 #define COND32_M -(1<<30)
236 #define COND32_LENGTH 14
238 #define UNCOND12_F 4098
239 #define UNCOND12_M -4092
240 #define UNCOND12_LENGTH 2
242 /* ??? The minimum and maximum values are wrong, but this does not matter
243 since this relocation type is not supported yet. */
244 #define UNCOND32_F (1<<30)
245 #define UNCOND32_M -(1<<30)
246 #define UNCOND32_LENGTH 14
249 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
250 TRd" as is the current insn, so no extra length. Note that the "reach"
251 is calculated from the address *after* that insn, but the offset in the
252 insn is calculated from the beginning of the insn. We also need to
253 take into account the implicit 1 coded as the "A" in PTA when counting
254 forward. If PTB reaches an odd address, we trap that as an error
255 elsewhere, so we don't have to have different relaxation entries. We
256 don't add a one to the negative range, since PTB would then have the
257 farthest backward-reaching value skipped, not generated at relaxation. */
258 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
259 #define SH64PCREL16_M (-32768 * 4 - 4)
260 #define SH64PCREL16_LENGTH 0
262 /* The next step is to change that PT insn into
263 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
264 SHORI (label - datalabel Ln) & 65535, R25
267 which means two extra insns, 8 extra bytes. This is the limit for the
270 The expressions look a bit bad since we have to adjust this to avoid overflow on a
272 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
273 #define SH64PCREL32_LENGTH (2 * 4)
275 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
277 #if BFD_HOST_64BIT_LONG
278 /* The "reach" type is long, so we can only do this for a 64-bit-long
280 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4)
281 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
282 #define SH64PCREL48_M (((long) -1 << 47) - 4)
283 #define SH64PCREL48_LENGTH (3 * 4)
285 /* If the host does not have 64-bit longs, just make this state identical
286 in reach to the 32-bit state. Note that we have a slightly incorrect
287 reach, but the correct one above will overflow a 32-bit number. */
288 #define SH64PCREL32_M (((long) -1 << 30) * 2)
289 #define SH64PCREL48_F SH64PCREL32_F
290 #define SH64PCREL48_M SH64PCREL32_M
291 #define SH64PCREL48_LENGTH (3 * 4)
292 #endif /* BFD_HOST_64BIT_LONG */
294 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
296 #define SH64PCREL64_LENGTH (4 * 4)
298 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
299 SH64PCREL expansions. The PCREL one is similar, but the other has no
300 pc-relative reach; it must be fully expanded in
301 shmedia_md_estimate_size_before_relax. */
302 #define MOVI_16_LENGTH 0
303 #define MOVI_16_F (32767 - 4)
304 #define MOVI_16_M (-32768 - 4)
305 #define MOVI_32_LENGTH 4
306 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
307 #define MOVI_48_LENGTH 8
309 #if BFD_HOST_64BIT_LONG
310 /* The "reach" type is long, so we can only do this for a 64-bit-long
312 #define MOVI_32_M (((long) -1 << 30) * 2 - 4)
313 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
314 #define MOVI_48_M (((long) -1 << 47) - 4)
316 /* If the host does not have 64-bit longs, just make this state identical
317 in reach to the 32-bit state. Note that we have a slightly incorrect
318 reach, but the correct one above will overflow a 32-bit number. */
319 #define MOVI_32_M (((long) -1 << 30) * 2)
320 #define MOVI_48_F MOVI_32_F
321 #define MOVI_48_M MOVI_32_M
322 #endif /* BFD_HOST_64BIT_LONG */
324 #define MOVI_64_LENGTH 12
325 #endif /* HAVE_SH64 */
327 #define EMPTY { 0, 0, 0, 0 }
329 const relax_typeS md_relax_table
[C (END
, 0)] = {
330 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
331 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
334 /* C (COND_JUMP, COND8) */
335 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
336 /* C (COND_JUMP, COND12) */
337 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
338 /* C (COND_JUMP, COND32) */
339 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
340 /* C (COND_JUMP, UNDEF_WORD_DISP) */
341 { 0, 0, COND32_LENGTH
, 0, },
343 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
346 /* C (COND_JUMP_DELAY, COND8) */
347 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
348 /* C (COND_JUMP_DELAY, COND12) */
349 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
350 /* C (COND_JUMP_DELAY, COND32) */
351 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
352 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
353 { 0, 0, COND32_LENGTH
, 0, },
355 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
358 /* C (UNCOND_JUMP, UNCOND12) */
359 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
360 /* C (UNCOND_JUMP, UNCOND32) */
361 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
363 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
364 { 0, 0, UNCOND32_LENGTH
, 0, },
366 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
369 /* C (SH64PCREL16_32, SH64PCREL16) */
371 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_32
, SH64PCREL32
) },
372 /* C (SH64PCREL16_32, SH64PCREL32) */
373 { 0, 0, SH64PCREL32_LENGTH
, 0 },
375 /* C (SH64PCREL16_32, SH64PCRELPLT) */
376 { 0, 0, SH64PCREL32_LENGTH
, 0 },
378 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
380 /* C (SH64PCREL16_64, SH64PCREL16) */
382 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_64
, SH64PCREL32
) },
383 /* C (SH64PCREL16_64, SH64PCREL32) */
384 { SH64PCREL32_F
, SH64PCREL32_M
, SH64PCREL32_LENGTH
, C (SH64PCREL16_64
, SH64PCREL48
) },
385 /* C (SH64PCREL16_64, SH64PCREL48) */
386 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16_64
, SH64PCREL64
) },
387 /* C (SH64PCREL16_64, SH64PCREL64) */
388 { 0, 0, SH64PCREL64_LENGTH
, 0 },
389 /* C (SH64PCREL16_64, SH64PCRELPLT) */
390 { 0, 0, SH64PCREL64_LENGTH
, 0 },
392 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
394 /* C (SH64PCREL16PT_32, SH64PCREL16) */
396 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_32
, SH64PCREL32
) },
397 /* C (SH64PCREL16PT_32, SH64PCREL32) */
398 { 0, 0, SH64PCREL32_LENGTH
, 0 },
400 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
401 { 0, 0, SH64PCREL32_LENGTH
, 0 },
403 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
405 /* C (SH64PCREL16PT_64, SH64PCREL16) */
407 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL32
) },
408 /* C (SH64PCREL16PT_64, SH64PCREL32) */
412 C (SH64PCREL16PT_64
, SH64PCREL48
) },
413 /* C (SH64PCREL16PT_64, SH64PCREL48) */
414 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL64
) },
415 /* C (SH64PCREL16PT_64, SH64PCREL64) */
416 { 0, 0, SH64PCREL64_LENGTH
, 0 },
417 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
418 { 0, 0, SH64PCREL64_LENGTH
, 0},
420 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
422 /* C (MOVI_IMM_32, UNDEF_MOVI) */
423 { 0, 0, MOVI_32_LENGTH
, 0 },
424 /* C (MOVI_IMM_32, MOVI_16) */
425 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32
, MOVI_32
) },
426 /* C (MOVI_IMM_32, MOVI_32) */
427 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, 0 },
429 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
430 { 0, 0, MOVI_32_LENGTH
, 0 },
431 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
433 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
435 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32_PCREL
, MOVI_32
) },
436 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
437 { 0, 0, MOVI_32_LENGTH
, 0 },
439 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
440 { 0, 0, MOVI_32_LENGTH
, 0 },
442 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
443 { 0, 0, MOVI_32_LENGTH
, 0 },
444 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
446 /* C (MOVI_IMM_64, UNDEF_MOVI) */
447 { 0, 0, MOVI_64_LENGTH
, 0 },
448 /* C (MOVI_IMM_64, MOVI_16) */
449 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64
, MOVI_32
) },
450 /* C (MOVI_IMM_64, MOVI_32) */
451 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64
, MOVI_48
) },
452 /* C (MOVI_IMM_64, MOVI_48) */
453 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64
, MOVI_64
) },
454 /* C (MOVI_IMM_64, MOVI_64) */
455 { 0, 0, MOVI_64_LENGTH
, 0 },
457 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
458 { 0, 0, MOVI_64_LENGTH
, 0 },
459 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
461 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
463 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_32
) },
464 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
465 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_48
) },
466 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
467 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_64
) },
468 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
469 { 0, 0, MOVI_64_LENGTH
, 0 },
470 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
471 { 0, 0, MOVI_64_LENGTH
, 0 },
473 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
474 { 0, 0, MOVI_64_LENGTH
, 0 },
475 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
477 #endif /* HAVE_SH64 */
483 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
487 /* Determinet whether the symbol needs any kind of PIC relocation. */
490 sh_PIC_related_p (symbolS
*sym
)
497 if (sym
== GOT_symbol
)
501 if (sh_PIC_related_p (*symbol_get_tc (sym
)))
505 exp
= symbol_get_value_expression (sym
);
507 return (exp
->X_op
== O_PIC_reloc
508 || sh_PIC_related_p (exp
->X_add_symbol
)
509 || sh_PIC_related_p (exp
->X_op_symbol
));
512 /* Determine the relocation type to be used to represent the
513 expression, that may be rearranged. */
516 sh_check_fixup (expressionS
*main_exp
, bfd_reloc_code_real_type
*r_type_p
)
518 expressionS
*exp
= main_exp
;
520 /* This is here for backward-compatibility only. GCC used to generated:
522 f@PLT + . - (.LPCS# + 2)
524 but we'd rather be able to handle this as a PIC-related reference
525 plus/minus a symbol. However, gas' parser gives us:
527 O_subtract (O_add (f@PLT, .), .LPCS#+2)
529 so we attempt to transform this into:
531 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
533 which we can handle simply below. */
534 if (exp
->X_op
== O_subtract
)
536 if (sh_PIC_related_p (exp
->X_op_symbol
))
539 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
541 if (exp
&& sh_PIC_related_p (exp
->X_op_symbol
))
544 if (exp
&& exp
->X_op
== O_add
545 && sh_PIC_related_p (exp
->X_add_symbol
))
547 symbolS
*sym
= exp
->X_add_symbol
;
549 exp
->X_op
= O_subtract
;
550 exp
->X_add_symbol
= main_exp
->X_op_symbol
;
552 main_exp
->X_op_symbol
= main_exp
->X_add_symbol
;
553 main_exp
->X_add_symbol
= sym
;
555 main_exp
->X_add_number
+= exp
->X_add_number
;
556 exp
->X_add_number
= 0;
561 else if (exp
->X_op
== O_add
&& sh_PIC_related_p (exp
->X_op_symbol
))
564 if (exp
->X_op
== O_symbol
|| exp
->X_op
== O_add
|| exp
->X_op
== O_subtract
)
567 if (exp
->X_add_symbol
568 && (exp
->X_add_symbol
== GOT_symbol
570 && *symbol_get_tc (exp
->X_add_symbol
) == GOT_symbol
)))
574 case BFD_RELOC_SH_IMM_LOW16
:
575 *r_type_p
= BFD_RELOC_SH_GOTPC_LOW16
;
578 case BFD_RELOC_SH_IMM_MEDLOW16
:
579 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDLOW16
;
582 case BFD_RELOC_SH_IMM_MEDHI16
:
583 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDHI16
;
586 case BFD_RELOC_SH_IMM_HI16
:
587 *r_type_p
= BFD_RELOC_SH_GOTPC_HI16
;
591 case BFD_RELOC_UNUSED
:
592 *r_type_p
= BFD_RELOC_SH_GOTPC
;
601 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
603 *r_type_p
= BFD_RELOC_SH_GOTPC
;
607 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
612 if (exp
->X_op
== O_PIC_reloc
)
618 case BFD_RELOC_UNUSED
:
619 *r_type_p
= exp
->X_md
;
622 case BFD_RELOC_SH_IMM_LOW16
:
625 case BFD_RELOC_32_GOTOFF
:
626 *r_type_p
= BFD_RELOC_SH_GOTOFF_LOW16
;
629 case BFD_RELOC_SH_GOTPLT32
:
630 *r_type_p
= BFD_RELOC_SH_GOTPLT_LOW16
;
633 case BFD_RELOC_32_GOT_PCREL
:
634 *r_type_p
= BFD_RELOC_SH_GOT_LOW16
;
637 case BFD_RELOC_32_PLT_PCREL
:
638 *r_type_p
= BFD_RELOC_SH_PLT_LOW16
;
646 case BFD_RELOC_SH_IMM_MEDLOW16
:
649 case BFD_RELOC_32_GOTOFF
:
650 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDLOW16
;
653 case BFD_RELOC_SH_GOTPLT32
:
654 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDLOW16
;
657 case BFD_RELOC_32_GOT_PCREL
:
658 *r_type_p
= BFD_RELOC_SH_GOT_MEDLOW16
;
661 case BFD_RELOC_32_PLT_PCREL
:
662 *r_type_p
= BFD_RELOC_SH_PLT_MEDLOW16
;
670 case BFD_RELOC_SH_IMM_MEDHI16
:
673 case BFD_RELOC_32_GOTOFF
:
674 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDHI16
;
677 case BFD_RELOC_SH_GOTPLT32
:
678 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDHI16
;
681 case BFD_RELOC_32_GOT_PCREL
:
682 *r_type_p
= BFD_RELOC_SH_GOT_MEDHI16
;
685 case BFD_RELOC_32_PLT_PCREL
:
686 *r_type_p
= BFD_RELOC_SH_PLT_MEDHI16
;
694 case BFD_RELOC_SH_IMM_HI16
:
697 case BFD_RELOC_32_GOTOFF
:
698 *r_type_p
= BFD_RELOC_SH_GOTOFF_HI16
;
701 case BFD_RELOC_SH_GOTPLT32
:
702 *r_type_p
= BFD_RELOC_SH_GOTPLT_HI16
;
705 case BFD_RELOC_32_GOT_PCREL
:
706 *r_type_p
= BFD_RELOC_SH_GOT_HI16
;
709 case BFD_RELOC_32_PLT_PCREL
:
710 *r_type_p
= BFD_RELOC_SH_PLT_HI16
;
722 *r_type_p
= exp
->X_md
;
725 exp
->X_op
= O_symbol
;
728 main_exp
->X_add_symbol
= exp
->X_add_symbol
;
729 main_exp
->X_add_number
+= exp
->X_add_number
;
733 return (sh_PIC_related_p (exp
->X_add_symbol
)
734 || sh_PIC_related_p (exp
->X_op_symbol
));
739 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
742 sh_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
)
744 bfd_reloc_code_real_type r_type
= BFD_RELOC_UNUSED
;
746 if (sh_check_fixup (exp
, &r_type
))
747 as_bad (_("Invalid PIC expression."));
749 if (r_type
== BFD_RELOC_UNUSED
)
753 r_type
= BFD_RELOC_8
;
757 r_type
= BFD_RELOC_16
;
761 r_type
= BFD_RELOC_32
;
766 r_type
= BFD_RELOC_64
;
776 as_bad (_("unsupported BFD relocation size %u"), size
);
777 r_type
= BFD_RELOC_UNUSED
;
780 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
783 /* The regular cons() function, that reads constants, doesn't support
784 suffixes such as @GOT, @GOTOFF and @PLT, that generate
785 machine-specific relocation types. So we must define it here. */
786 /* Clobbers input_line_pointer, checks end-of-line. */
787 /* NBYTES 1=.byte, 2=.word, 4=.long */
789 sh_elf_cons (register int nbytes
)
795 /* Update existing range to include a previous insn, if there was one. */
796 sh64_update_contents_mark (TRUE
);
798 /* We need to make sure the contents type is set to data. */
801 #endif /* HAVE_SH64 */
803 if (is_it_end_of_statement ())
805 demand_empty_rest_of_line ();
810 md_cons_align (nbytes
);
816 emit_expr (&exp
, (unsigned int) nbytes
);
818 while (*input_line_pointer
++ == ',');
820 input_line_pointer
--; /* Put terminator back into stream. */
821 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
823 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
826 demand_empty_rest_of_line ();
829 /* The regular frag_offset_fixed_p doesn't work for rs_align_test
833 align_test_frag_offset_fixed_p (const fragS
*frag1
, const fragS
*frag2
,
839 /* Start with offset initialised to difference between the two frags.
840 Prior to assigning frag addresses this will be zero. */
841 off
= frag1
->fr_address
- frag2
->fr_address
;
848 /* Maybe frag2 is after frag1. */
850 while (frag
->fr_type
== rs_fill
851 || frag
->fr_type
== rs_align_test
)
853 if (frag
->fr_type
== rs_fill
)
854 off
+= frag
->fr_fix
+ frag
->fr_offset
* frag
->fr_var
;
857 frag
= frag
->fr_next
;
867 /* Maybe frag1 is after frag2. */
868 off
= frag1
->fr_address
- frag2
->fr_address
;
870 while (frag
->fr_type
== rs_fill
871 || frag
->fr_type
== rs_align_test
)
873 if (frag
->fr_type
== rs_fill
)
874 off
-= frag
->fr_fix
+ frag
->fr_offset
* frag
->fr_var
;
877 frag
= frag
->fr_next
;
891 /* Optimize a difference of symbols which have rs_align_test frag if
895 sh_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
901 && l
->X_op
== O_symbol
902 && r
->X_op
== O_symbol
903 && S_GET_SEGMENT (l
->X_add_symbol
) == S_GET_SEGMENT (r
->X_add_symbol
)
904 && (SEG_NORMAL (S_GET_SEGMENT (l
->X_add_symbol
))
905 || r
->X_add_symbol
== l
->X_add_symbol
)
906 && align_test_frag_offset_fixed_p (symbol_get_frag (l
->X_add_symbol
),
907 symbol_get_frag (r
->X_add_symbol
),
910 l
->X_add_number
-= r
->X_add_number
;
911 l
->X_add_number
-= frag_off
/ OCTETS_PER_BYTE
;
912 l
->X_add_number
+= (S_GET_VALUE (l
->X_add_symbol
)
913 - S_GET_VALUE (r
->X_add_symbol
));
914 l
->X_op
= O_constant
;
922 /* This function is called once, at assembler startup time. This should
923 set up all the tables, etc that the MD part of the assembler needs. */
928 const sh_opcode_info
*opcode
;
929 char *prev_name
= "";
930 unsigned int target_arch
;
933 = preset_target_arch
? preset_target_arch
: arch_sh_up
& ~arch_sh_has_dsp
;
934 valid_arch
= target_arch
;
940 opcode_hash_control
= hash_new ();
942 /* Insert unique names into hash table. */
943 for (opcode
= sh_table
; opcode
->name
; opcode
++)
945 if (strcmp (prev_name
, opcode
->name
) != 0)
947 if (!SH_MERGE_ARCH_SET_VALID (opcode
->arch
, target_arch
))
949 prev_name
= opcode
->name
;
950 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
957 static int reg_x
, reg_y
;
961 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
963 /* Try to parse a reg name. Return the number of chars consumed. */
966 parse_reg_without_prefix (char *src
, int *mode
, int *reg
)
968 char l0
= TOLOWER (src
[0]);
969 char l1
= l0
? TOLOWER (src
[1]) : 0;
971 /* We use ! IDENT_CHAR for the next character after the register name, to
972 make sure that we won't accidentally recognize a symbol name such as
973 'sram' or sr_ram as being a reference to the register 'sr'. */
979 if (src
[2] >= '0' && src
[2] <= '5'
980 && ! IDENT_CHAR ((unsigned char) src
[3]))
983 *reg
= 10 + src
[2] - '0';
987 if (l1
>= '0' && l1
<= '9'
988 && ! IDENT_CHAR ((unsigned char) src
[2]))
994 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
995 && ! IDENT_CHAR ((unsigned char) src
[7]))
1002 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
1007 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
1018 if (! IDENT_CHAR ((unsigned char) src
[2]))
1024 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
1033 if (! IDENT_CHAR ((unsigned char) src
[2]))
1039 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
1047 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
1048 && ! IDENT_CHAR ((unsigned char) src
[3]))
1051 *reg
= 4 + (l1
- '0');
1054 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
1055 && ! IDENT_CHAR ((unsigned char) src
[3]))
1058 *reg
= 6 + (l1
- '0');
1061 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
1062 && ! IDENT_CHAR ((unsigned char) src
[3]))
1067 *reg
= n
| ((~n
& 2) << 1);
1072 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[2]))
1094 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
1095 && ! IDENT_CHAR ((unsigned char) src
[2]))
1098 *reg
= A_X0_NUM
+ l1
- '0';
1102 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
1103 && ! IDENT_CHAR ((unsigned char) src
[2]))
1106 *reg
= A_Y0_NUM
+ l1
- '0';
1110 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
1111 && ! IDENT_CHAR ((unsigned char) src
[2]))
1114 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
1120 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
1126 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
1127 && ! IDENT_CHAR ((unsigned char) src
[3]))
1133 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
1134 && ! IDENT_CHAR ((unsigned char) src
[3]))
1140 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
1141 && ! IDENT_CHAR ((unsigned char) src
[3]))
1147 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1148 && ! IDENT_CHAR ((unsigned char) src
[3]))
1154 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1160 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
1167 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1172 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
1174 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1175 and use an uninitialized immediate. */
1179 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1180 && ! IDENT_CHAR ((unsigned char) src
[3]))
1185 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1186 && ! IDENT_CHAR ((unsigned char) src
[3]))
1192 if (l0
== 't' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1193 && ! IDENT_CHAR ((unsigned char) src
[3]))
1198 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
1199 && ! IDENT_CHAR ((unsigned char) src
[4]))
1201 if (TOLOWER (src
[3]) == 'l')
1206 if (TOLOWER (src
[3]) == 'h')
1212 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
1213 && ! IDENT_CHAR ((unsigned char) src
[3]))
1218 if (l0
== 'f' && l1
== 'r')
1222 if (src
[3] >= '0' && src
[3] <= '5'
1223 && ! IDENT_CHAR ((unsigned char) src
[4]))
1226 *reg
= 10 + src
[3] - '0';
1230 if (src
[2] >= '0' && src
[2] <= '9'
1231 && ! IDENT_CHAR ((unsigned char) src
[3]))
1234 *reg
= (src
[2] - '0');
1238 if (l0
== 'd' && l1
== 'r')
1242 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1243 && ! IDENT_CHAR ((unsigned char) src
[4]))
1246 *reg
= 10 + src
[3] - '0';
1250 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1251 && ! IDENT_CHAR ((unsigned char) src
[3]))
1254 *reg
= (src
[2] - '0');
1258 if (l0
== 'x' && l1
== 'd')
1262 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1263 && ! IDENT_CHAR ((unsigned char) src
[4]))
1266 *reg
= 11 + src
[3] - '0';
1270 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1271 && ! IDENT_CHAR ((unsigned char) src
[3]))
1274 *reg
= (src
[2] - '0') + 1;
1278 if (l0
== 'f' && l1
== 'v')
1280 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
1286 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
1287 && ! IDENT_CHAR ((unsigned char) src
[3]))
1290 *reg
= (src
[2] - '0');
1294 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
1295 && TOLOWER (src
[3]) == 'l'
1296 && ! IDENT_CHAR ((unsigned char) src
[4]))
1302 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
1303 && TOLOWER (src
[3]) == 'c'
1304 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
1310 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
1311 && TOLOWER (src
[3]) == 'r'
1312 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
1321 /* Like parse_reg_without_prefix, but this version supports
1322 $-prefixed register names if enabled by the user. */
1325 parse_reg (char *src
, int *mode
, int *reg
)
1327 unsigned int prefix
;
1328 unsigned int consumed
;
1332 if (allow_dollar_register_prefix
)
1343 consumed
= parse_reg_without_prefix (src
, mode
, reg
);
1348 return consumed
+ prefix
;
1352 parse_exp (char *s
, sh_operand_info
*op
)
1357 save
= input_line_pointer
;
1358 input_line_pointer
= s
;
1359 expression (&op
->immediate
);
1360 if (op
->immediate
.X_op
== O_absent
)
1361 as_bad (_("missing operand"));
1363 else if (op
->immediate
.X_op
== O_PIC_reloc
1364 || sh_PIC_related_p (op
->immediate
.X_add_symbol
)
1365 || sh_PIC_related_p (op
->immediate
.X_op_symbol
))
1366 as_bad (_("misplaced PIC operand"));
1368 new = input_line_pointer
;
1369 input_line_pointer
= save
;
1373 /* The many forms of operand:
1376 @Rn Register indirect
1389 pr, gbr, vbr, macl, mach
1393 parse_at (char *src
, sh_operand_info
*op
)
1400 src
= parse_at (src
, op
);
1401 if (op
->type
== A_DISP_TBR
)
1402 op
->type
= A_DISP2_TBR
;
1404 as_bad (_("illegal double indirection"));
1406 else if (src
[0] == '-')
1408 /* Must be predecrement. */
1411 len
= parse_reg (src
, &mode
, &(op
->reg
));
1412 if (mode
!= A_REG_N
)
1413 as_bad (_("illegal register after @-"));
1418 else if (src
[0] == '(')
1420 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1423 len
= parse_reg (src
, &mode
, &(op
->reg
));
1424 if (len
&& mode
== A_REG_N
)
1429 as_bad (_("must be @(r0,...)"));
1434 /* Now can be rn or gbr. */
1435 len
= parse_reg (src
, &mode
, &(op
->reg
));
1445 op
->type
= A_R0_GBR
;
1447 else if (mode
== A_REG_N
)
1449 op
->type
= A_IND_R0_REG_N
;
1453 as_bad (_("syntax error in @(r0,...)"));
1458 as_bad (_("syntax error in @(r0...)"));
1463 /* Must be an @(disp,.. thing). */
1464 src
= parse_exp (src
, op
);
1467 /* Now can be rn, gbr or pc. */
1468 len
= parse_reg (src
, &mode
, &op
->reg
);
1471 if (mode
== A_REG_N
)
1473 op
->type
= A_DISP_REG_N
;
1475 else if (mode
== A_GBR
)
1477 op
->type
= A_DISP_GBR
;
1479 else if (mode
== A_TBR
)
1481 op
->type
= A_DISP_TBR
;
1483 else if (mode
== A_PC
)
1485 /* We want @(expr, pc) to uniformly address . + expr,
1486 no matter if expr is a constant, or a more complex
1487 expression, e.g. sym-. or sym1-sym2.
1488 However, we also used to accept @(sym,pc)
1489 as addressing sym, i.e. meaning the same as plain sym.
1490 Some existing code does use the @(sym,pc) syntax, so
1491 we give it the old semantics for now, but warn about
1492 its use, so that users have some time to fix their code.
1494 Note that due to this backward compatibility hack,
1495 we'll get unexpected results when @(offset, pc) is used,
1496 and offset is a symbol that is set later to an an address
1497 difference, or an external symbol that is set to an
1498 address difference in another source file, so we want to
1499 eventually remove it. */
1500 if (op
->immediate
.X_op
== O_symbol
)
1502 op
->type
= A_DISP_PC
;
1503 as_warn (_("Deprecated syntax."));
1507 op
->type
= A_DISP_PC_ABS
;
1508 /* Such operands don't get corrected for PC==.+4, so
1509 make the correction here. */
1510 op
->immediate
.X_add_number
-= 4;
1515 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1520 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1525 as_bad (_("expecting )"));
1531 src
+= parse_reg (src
, &mode
, &(op
->reg
));
1532 if (mode
!= A_REG_N
)
1533 as_bad (_("illegal register after @"));
1540 l0
= TOLOWER (src
[0]);
1541 l1
= TOLOWER (src
[1]);
1543 if ((l0
== 'r' && l1
== '8')
1544 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1547 op
->type
= AX_PMOD_N
;
1549 else if ( (l0
== 'r' && l1
== '9')
1550 || (l0
== 'i' && l1
== 'y'))
1553 op
->type
= AY_PMOD_N
;
1565 get_operand (char **ptr
, sh_operand_info
*op
)
1574 *ptr
= parse_exp (src
, op
);
1579 else if (src
[0] == '@')
1581 *ptr
= parse_at (src
, op
);
1584 len
= parse_reg (src
, &mode
, &(op
->reg
));
1593 /* Not a reg, the only thing left is a displacement. */
1594 *ptr
= parse_exp (src
, op
);
1595 op
->type
= A_DISP_PC
;
1601 get_operands (sh_opcode_info
*info
, char *args
, sh_operand_info
*operand
)
1606 /* The pre-processor will eliminate whitespace in front of '@'
1607 after the first argument; we may be called multiple times
1608 from assemble_ppi, so don't insist on finding whitespace here. */
1612 get_operand (&ptr
, operand
+ 0);
1619 get_operand (&ptr
, operand
+ 1);
1620 /* ??? Hack: psha/pshl have a varying operand number depending on
1621 the type of the first operand. We handle this by having the
1622 three-operand version first and reducing the number of operands
1623 parsed to two if we see that the first operand is an immediate.
1624 This works because no insn with three operands has an immediate
1625 as first operand. */
1626 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1632 get_operand (&ptr
, operand
+ 2);
1636 operand
[2].type
= 0;
1641 operand
[1].type
= 0;
1642 operand
[2].type
= 0;
1647 operand
[0].type
= 0;
1648 operand
[1].type
= 0;
1649 operand
[2].type
= 0;
1654 /* Passed a pointer to a list of opcodes which use different
1655 addressing modes, return the opcode which matches the opcodes
1658 static sh_opcode_info
*
1659 get_specific (sh_opcode_info
*opcode
, sh_operand_info
*operands
)
1661 sh_opcode_info
*this_try
= opcode
;
1662 char *name
= opcode
->name
;
1665 while (opcode
->name
)
1667 this_try
= opcode
++;
1668 if ((this_try
->name
!= name
) && (strcmp (this_try
->name
, name
) != 0))
1670 /* We've looked so far down the table that we've run out of
1671 opcodes with the same name. */
1675 /* Look at both operands needed by the opcodes and provided by
1676 the user - since an arg test will often fail on the same arg
1677 again and again, we'll try and test the last failing arg the
1678 first on each opcode try. */
1679 for (n
= 0; this_try
->arg
[n
]; n
++)
1681 sh_operand_info
*user
= operands
+ n
;
1682 sh_arg_type arg
= this_try
->arg
[n
];
1684 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh2a_nofpu_up
)
1685 && ( arg
== A_DISP_REG_M
1686 || arg
== A_DISP_REG_N
))
1688 /* Check a few key IMM* fields for overflow. */
1690 long val
= user
->immediate
.X_add_number
;
1692 for (opf
= 0; opf
< 4; opf
++)
1693 switch (this_try
->nibbles
[opf
])
1697 if (val
< 0 || val
> 15)
1702 if (val
< 0 || val
> 15 * 2)
1707 if (val
< 0 || val
> 15 * 4)
1717 if (user
->type
== A_DISP_PC_ABS
)
1728 if (user
->type
!= arg
)
1732 /* opcode needs r0 */
1733 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1737 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1741 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1749 case A_IND_R0_REG_N
:
1758 /* Opcode needs rn */
1759 if (user
->type
!= arg
)
1764 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1780 if (user
->type
!= arg
)
1785 if (user
->type
!= arg
)
1791 if (user
->type
!= A_INC_N
)
1793 if (user
->reg
!= 15)
1799 if (user
->type
!= A_DEC_N
)
1801 if (user
->reg
!= 15)
1810 case A_IND_R0_REG_M
:
1813 /* Opcode needs rn */
1814 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1820 if (user
->type
!= A_DEC_N
)
1822 if (user
->reg
< 2 || user
->reg
> 5)
1828 if (user
->type
!= A_INC_N
)
1830 if (user
->reg
< 2 || user
->reg
> 5)
1836 if (user
->type
!= A_IND_N
)
1838 if (user
->reg
< 2 || user
->reg
> 5)
1844 if (user
->type
!= AX_PMOD_N
)
1846 if (user
->reg
< 2 || user
->reg
> 5)
1852 if (user
->type
!= A_INC_N
)
1854 if (user
->reg
< 4 || user
->reg
> 5)
1860 if (user
->type
!= A_IND_N
)
1862 if (user
->reg
< 4 || user
->reg
> 5)
1868 if (user
->type
!= AX_PMOD_N
)
1870 if (user
->reg
< 4 || user
->reg
> 5)
1876 if (user
->type
!= A_INC_N
)
1878 if ((user
->reg
< 4 || user
->reg
> 5)
1879 && (user
->reg
< 0 || user
->reg
> 1))
1885 if (user
->type
!= A_IND_N
)
1887 if ((user
->reg
< 4 || user
->reg
> 5)
1888 && (user
->reg
< 0 || user
->reg
> 1))
1894 if (user
->type
!= AX_PMOD_N
)
1896 if ((user
->reg
< 4 || user
->reg
> 5)
1897 && (user
->reg
< 0 || user
->reg
> 1))
1903 if (user
->type
!= A_INC_N
)
1905 if (user
->reg
< 6 || user
->reg
> 7)
1911 if (user
->type
!= A_IND_N
)
1913 if (user
->reg
< 6 || user
->reg
> 7)
1919 if (user
->type
!= AY_PMOD_N
)
1921 if (user
->reg
< 6 || user
->reg
> 7)
1927 if (user
->type
!= A_INC_N
)
1929 if ((user
->reg
< 6 || user
->reg
> 7)
1930 && (user
->reg
< 2 || user
->reg
> 3))
1936 if (user
->type
!= A_IND_N
)
1938 if ((user
->reg
< 6 || user
->reg
> 7)
1939 && (user
->reg
< 2 || user
->reg
> 3))
1945 if (user
->type
!= AY_PMOD_N
)
1947 if ((user
->reg
< 6 || user
->reg
> 7)
1948 && (user
->reg
< 2 || user
->reg
> 3))
1954 if (user
->type
!= DSP_REG_N
)
1956 if (user
->reg
!= A_A0_NUM
1957 && user
->reg
!= A_A1_NUM
)
1963 if (user
->type
!= DSP_REG_N
)
1985 if (user
->type
!= DSP_REG_N
)
2007 if (user
->type
!= DSP_REG_N
)
2029 if (user
->type
!= DSP_REG_N
)
2051 if (user
->type
!= DSP_REG_N
)
2073 if (user
->type
!= DSP_REG_N
)
2095 if (user
->type
!= DSP_REG_N
)
2117 if (user
->type
!= DSP_REG_N
)
2139 if (user
->type
!= DSP_REG_N
)
2161 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
2165 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
2169 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
2173 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
2177 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
2187 /* Opcode needs rn */
2188 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
2193 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
2198 if (user
->type
!= XMTRX_M4
)
2204 printf (_("unhandled %d\n"), arg
);
2208 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch
, this_try
->arch
))
2210 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, this_try
->arch
);
2220 insert (char *where
, int how
, int pcrel
, sh_operand_info
*op
)
2222 fix_new_exp (frag_now
,
2223 where
- frag_now
->fr_literal
,
2231 insert4 (char * where
, int how
, int pcrel
, sh_operand_info
* op
)
2233 fix_new_exp (frag_now
,
2234 where
- frag_now
->fr_literal
,
2241 build_relax (sh_opcode_info
*opcode
, sh_operand_info
*op
)
2243 int high_byte
= target_big_endian
? 0 : 1;
2246 if (opcode
->arg
[0] == A_BDISP8
)
2248 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
2249 p
= frag_var (rs_machine_dependent
,
2250 md_relax_table
[C (what
, COND32
)].rlx_length
,
2251 md_relax_table
[C (what
, COND8
)].rlx_length
,
2253 op
->immediate
.X_add_symbol
,
2254 op
->immediate
.X_add_number
,
2256 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
2258 else if (opcode
->arg
[0] == A_BDISP12
)
2260 p
= frag_var (rs_machine_dependent
,
2261 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
2262 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
2264 op
->immediate
.X_add_symbol
,
2265 op
->immediate
.X_add_number
,
2267 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
2272 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
2275 insert_loop_bounds (char *output
, sh_operand_info
*operand
)
2280 /* Since the low byte of the opcode will be overwritten by the reloc, we
2281 can just stash the high byte into both bytes and ignore endianness. */
2284 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2285 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2289 static int count
= 0;
2291 /* If the last loop insn is a two-byte-insn, it is in danger of being
2292 swapped with the insn after it. To prevent this, create a new
2293 symbol - complete with SH_LABEL reloc - after the last loop insn.
2294 If the last loop insn is four bytes long, the symbol will be
2295 right in the middle, but four byte insns are not swapped anyways. */
2296 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
2297 Hence a 9 digit number should be enough to count all REPEATs. */
2299 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
2300 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
2301 /* Make this a local symbol. */
2303 SF_SET_LOCAL (end_sym
);
2304 #endif /* OBJ_COFF */
2305 symbol_table_insert (end_sym
);
2306 end_sym
->sy_value
= operand
[1].immediate
;
2307 end_sym
->sy_value
.X_add_number
+= 2;
2308 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
2311 output
= frag_more (2);
2314 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2315 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2317 return frag_more (2);
2320 /* Now we know what sort of opcodes it is, let's build the bytes. */
2323 build_Mytes (sh_opcode_info
*opcode
, sh_operand_info
*operand
)
2328 unsigned int size
= 2;
2329 int low_byte
= target_big_endian
? 1 : 0;
2341 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2343 output
= frag_more (4);
2348 output
= frag_more (2);
2350 for (index
= 0; index
< max_index
; index
++)
2352 sh_nibble_type i
= opcode
->nibbles
[index
];
2363 nbuf
[index
] = reg_n
;
2366 nbuf
[index
] = reg_m
;
2369 if (reg_n
< 2 || reg_n
> 5)
2370 as_bad (_("Invalid register: 'r%d'"), reg_n
);
2371 nbuf
[index
] = (reg_n
& 3) | 4;
2374 nbuf
[index
] = reg_n
| (reg_m
>> 2);
2377 nbuf
[index
] = reg_b
| 0x08;
2380 nbuf
[index
] = reg_n
| 0x01;
2383 nbuf
[index
] |= 0x08;
2385 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3
, 0, operand
);
2388 nbuf
[index
] |= 0x80;
2390 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3U
, 0, operand
);
2393 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
);
2396 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
);
2399 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
);
2402 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
);
2405 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
+1);
2408 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
+1);
2411 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
+1);
2414 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
+1);
2419 insert4 (output
, BFD_RELOC_SH_DISP20
, 0, operand
);
2422 insert4 (output
, BFD_RELOC_SH_DISP20BY8
, 0, operand
);
2425 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
2428 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
2431 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
2434 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
2437 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
2440 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
2443 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
2446 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
2449 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
2452 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
2455 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
2458 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
2461 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
,
2462 operand
->type
!= A_DISP_PC_ABS
, operand
);
2465 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
,
2466 operand
->type
!= A_DISP_PC_ABS
, operand
);
2469 output
= insert_loop_bounds (output
, operand
);
2470 nbuf
[index
] = opcode
->nibbles
[3];
2474 printf (_("failed for %d\n"), i
);
2478 if (!target_big_endian
)
2480 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
2481 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
2485 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
2486 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
2488 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2490 if (!target_big_endian
)
2492 output
[3] = (nbuf
[4] << 4) | (nbuf
[5]);
2493 output
[2] = (nbuf
[6] << 4) | (nbuf
[7]);
2497 output
[2] = (nbuf
[4] << 4) | (nbuf
[5]);
2498 output
[3] = (nbuf
[6] << 4) | (nbuf
[7]);
2504 /* Find an opcode at the start of *STR_P in the hash table, and set
2505 *STR_P to the first character after the last one read. */
2507 static sh_opcode_info
*
2508 find_cooked_opcode (char **str_p
)
2511 unsigned char *op_start
;
2512 unsigned char *op_end
;
2516 /* Drop leading whitespace. */
2520 /* Find the op code end.
2521 The pre-processor will eliminate whitespace in front of
2522 any '@' after the first argument; we may be called from
2523 assemble_ppi, so the opcode might be terminated by an '@'. */
2524 for (op_start
= op_end
= (unsigned char *) str
;
2527 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
2530 unsigned char c
= op_start
[nlen
];
2532 /* The machine independent code will convert CMP/EQ into cmp/EQ
2533 because it thinks the '/' is the end of the symbol. Moreover,
2534 all but the first sub-insn is a parallel processing insn won't
2535 be capitalized. Instead of hacking up the machine independent
2536 code, we just deal with it here. */
2543 *str_p
= (char *) op_end
;
2546 as_bad (_("can't find opcode "));
2548 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
2551 /* Assemble a parallel processing insn. */
2552 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2555 assemble_ppi (char *op_end
, sh_opcode_info
*opcode
)
2567 sh_operand_info operand
[3];
2569 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2570 Make sure we encode a defined insn pattern. */
2575 if (opcode
->arg
[0] != A_END
)
2576 op_end
= get_operands (opcode
, op_end
, operand
);
2578 opcode
= get_specific (opcode
, operand
);
2581 /* Couldn't find an opcode which matched the operands. */
2582 char *where
= frag_more (2);
2587 as_bad (_("invalid operands for opcode"));
2591 if (opcode
->nibbles
[0] != PPI
)
2592 as_bad (_("insn can't be combined with parallel processing insn"));
2594 switch (opcode
->nibbles
[1])
2599 as_bad (_("multiple movx specifications"));
2604 as_bad (_("multiple movy specifications"));
2610 as_bad (_("multiple movx specifications"));
2611 if ((reg_n
< 4 || reg_n
> 5)
2612 && (reg_n
< 0 || reg_n
> 1))
2613 as_bad (_("invalid movx address register"));
2614 if (movy
&& movy
!= DDT_BASE
)
2615 as_bad (_("insn cannot be combined with non-nopy"));
2616 movx
= ((((reg_n
& 1) != 0) << 9)
2617 + (((reg_n
& 4) == 0) << 8)
2619 + (opcode
->nibbles
[2] << 4)
2620 + opcode
->nibbles
[3]
2626 as_bad (_("multiple movy specifications"));
2627 if ((reg_n
< 6 || reg_n
> 7)
2628 && (reg_n
< 2 || reg_n
> 3))
2629 as_bad (_("invalid movy address register"));
2630 if (movx
&& movx
!= DDT_BASE
)
2631 as_bad (_("insn cannot be combined with non-nopx"));
2632 movy
= ((((reg_n
& 1) != 0) << 8)
2633 + (((reg_n
& 4) == 0) << 9)
2635 + (opcode
->nibbles
[2] << 4)
2636 + opcode
->nibbles
[3]
2642 as_bad (_("multiple movx specifications"));
2644 as_bad (_("previous movy requires nopx"));
2645 if (reg_n
< 4 || reg_n
> 5)
2646 as_bad (_("invalid movx address register"));
2647 if (opcode
->nibbles
[2] & 8)
2649 if (reg_m
== A_A1_NUM
)
2651 else if (reg_m
!= A_A0_NUM
)
2652 as_bad (_("invalid movx dsp register"));
2657 as_bad (_("invalid movx dsp register"));
2660 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
2665 as_bad (_("multiple movy specifications"));
2667 as_bad (_("previous movx requires nopy"));
2668 if (opcode
->nibbles
[2] & 8)
2670 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2673 if (reg_m
== A_A1_NUM
)
2675 else if (reg_m
!= A_A0_NUM
)
2676 as_bad (_("invalid movy dsp register"));
2681 as_bad (_("invalid movy dsp register"));
2684 if (reg_n
< 6 || reg_n
> 7)
2685 as_bad (_("invalid movy address register"));
2686 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
2690 if (operand
[0].immediate
.X_op
!= O_constant
)
2691 as_bad (_("dsp immediate shift value not constant"));
2692 field_b
= ((opcode
->nibbles
[2] << 12)
2693 | (operand
[0].immediate
.X_add_number
& 127) << 4
2700 goto try_another_opcode
;
2705 as_bad (_("multiple parallel processing specifications"));
2706 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2707 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2708 switch (opcode
->nibbles
[4])
2716 field_b
+= opcode
->nibbles
[4] << 4;
2724 as_bad (_("multiple condition specifications"));
2725 cond
= opcode
->nibbles
[2] << 8;
2727 goto skip_cond_check
;
2731 as_bad (_("multiple parallel processing specifications"));
2732 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2733 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2735 switch (opcode
->nibbles
[4])
2743 field_b
+= opcode
->nibbles
[4] << 4;
2752 if ((field_b
& 0xef00) == 0xa100)
2754 /* pclr Dz pmuls Se,Sf,Dg */
2755 else if ((field_b
& 0xff00) == 0x8d00
2756 && (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh4al_dsp_up
)))
2758 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, arch_sh4al_dsp_up
);
2762 as_bad (_("insn cannot be combined with pmuls"));
2763 switch (field_b
& 0xf)
2766 field_b
+= 0 - A_X0_NUM
;
2769 field_b
+= 1 - A_Y0_NUM
;
2772 field_b
+= 2 - A_A0_NUM
;
2775 field_b
+= 3 - A_A1_NUM
;
2778 as_bad (_("bad combined pmuls output operand"));
2780 /* Generate warning if the destination register for padd / psub
2781 and pmuls is the same ( only for A0 or A1 ).
2782 If the last nibble is 1010 then A0 is used in both
2783 padd / psub and pmuls. If it is 1111 then A1 is used
2784 as destination register in both padd / psub and pmuls. */
2786 if ((((field_b
| reg_efg
) & 0x000F) == 0x000A)
2787 || (((field_b
| reg_efg
) & 0x000F) == 0x000F))
2788 as_warn (_("destination register is same for parallel insns"));
2790 field_b
+= 0x4000 + reg_efg
;
2797 as_bad (_("condition not followed by conditionalizable insn"));
2803 opcode
= find_cooked_opcode (&op_end
);
2807 (_("unrecognized characters at end of parallel processing insn")));
2812 move_code
= movx
| movy
;
2815 /* Parallel processing insn. */
2816 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
2818 output
= frag_more (4);
2820 if (! target_big_endian
)
2822 output
[3] = ppi_code
>> 8;
2823 output
[2] = ppi_code
;
2827 output
[2] = ppi_code
>> 8;
2828 output
[3] = ppi_code
;
2830 move_code
|= 0xf800;
2834 /* Just a double data transfer. */
2835 output
= frag_more (2);
2838 if (! target_big_endian
)
2840 output
[1] = move_code
>> 8;
2841 output
[0] = move_code
;
2845 output
[0] = move_code
>> 8;
2846 output
[1] = move_code
;
2851 /* This is the guts of the machine-dependent assembler. STR points to a
2852 machine dependent instruction. This function is supposed to emit
2853 the frags/bytes it assembles to. */
2856 md_assemble (char *str
)
2859 sh_operand_info operand
[3];
2860 sh_opcode_info
*opcode
;
2861 unsigned int size
= 0;
2862 char *initial_str
= str
;
2865 if (sh64_isa_mode
== sh64_isa_shmedia
)
2867 shmedia_md_assemble (str
);
2872 /* If we've seen pseudo-directives, make sure any emitted data or
2873 frags are marked as data. */
2876 sh64_update_contents_mark (TRUE
);
2877 sh64_set_contents_type (CRT_SH5_ISA16
);
2882 #endif /* HAVE_SH64 */
2884 opcode
= find_cooked_opcode (&str
);
2889 /* The opcode is not in the hash table.
2890 This means we definitely have an assembly failure,
2891 but the instruction may be valid in another CPU variant.
2892 In this case emit something better than 'unknown opcode'.
2893 Search the full table in sh-opc.h to check. */
2895 char *name
= initial_str
;
2896 int name_length
= 0;
2897 const sh_opcode_info
*op
;
2900 /* identify opcode in string */
2901 while (ISSPACE (*name
))
2905 while (!ISSPACE (name
[name_length
]))
2910 /* search for opcode in full list */
2911 for (op
= sh_table
; op
->name
; op
++)
2913 if (strncasecmp (op
->name
, name
, name_length
) == 0
2914 && op
->name
[name_length
] == '\0')
2923 as_bad (_("opcode not valid for this cpu variant"));
2927 as_bad (_("unknown opcode"));
2933 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2935 /* Output a CODE reloc to tell the linker that the following
2936 bytes are instructions, not data. */
2937 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2939 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
2942 if (opcode
->nibbles
[0] == PPI
)
2944 size
= assemble_ppi (op_end
, opcode
);
2948 if (opcode
->arg
[0] == A_BDISP12
2949 || opcode
->arg
[0] == A_BDISP8
)
2951 /* Since we skip get_specific here, we have to check & update
2953 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, opcode
->arch
))
2954 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, opcode
->arch
);
2956 as_bad (_("Delayed branches not available on SH1"));
2957 parse_exp (op_end
+ 1, &operand
[0]);
2958 build_relax (opcode
, &operand
[0]);
2960 /* All branches are currently 16 bit. */
2965 if (opcode
->arg
[0] == A_END
)
2967 /* Ignore trailing whitespace. If there is any, it has already
2968 been compressed to a single space. */
2974 op_end
= get_operands (opcode
, op_end
, operand
);
2976 opcode
= get_specific (opcode
, operand
);
2980 /* Couldn't find an opcode which matched the operands. */
2981 char *where
= frag_more (2);
2986 as_bad (_("invalid operands for opcode"));
2991 as_bad (_("excess operands: '%s'"), op_end
);
2993 size
= build_Mytes (opcode
, operand
);
2998 dwarf2_emit_insn (size
);
3001 /* This routine is called each time a label definition is seen. It
3002 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
3005 sh_frob_label (symbolS
*sym
)
3007 static fragS
*last_label_frag
;
3008 static int last_label_offset
;
3011 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
3015 offset
= frag_now_fix ();
3016 if (frag_now
!= last_label_frag
3017 || offset
!= last_label_offset
)
3019 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
3020 last_label_frag
= frag_now
;
3021 last_label_offset
= offset
;
3025 dwarf2_emit_label (sym
);
3028 /* This routine is called when the assembler is about to output some
3029 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
3032 sh_flush_pending_output (void)
3035 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
3037 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
3039 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
3044 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
3049 /* Various routines to kill one day. */
3050 /* Equal to MAX_PRECISION in atof-ieee.c. */
3051 #define MAX_LITTLENUMS 6
3053 /* Turn a string in input_line_pointer into a floating point constant
3054 of type TYPE, and store the appropriate bytes in *LITP. The number
3055 of LITTLENUMS emitted is stored in *SIZEP . An error message is
3056 returned, or NULL on OK. */
3059 md_atof (int type
, char *litP
, int *sizeP
)
3062 LITTLENUM_TYPE words
[4];
3078 return _("bad call to md_atof");
3081 t
= atof_ieee (input_line_pointer
, type
, words
);
3083 input_line_pointer
= t
;
3087 if (! target_big_endian
)
3089 for (i
= prec
- 1; i
>= 0; i
--)
3091 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
3097 for (i
= 0; i
< prec
; i
++)
3099 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
3107 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
3108 call instruction. It refers to a label of the instruction which
3109 loads the register which the call uses. We use it to generate a
3110 special reloc for the linker. */
3113 s_uses (int ignore ATTRIBUTE_UNUSED
)
3118 as_warn (_(".uses pseudo-op seen when not relaxing"));
3122 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
3124 as_bad (_("bad .uses format"));
3125 ignore_rest_of_line ();
3129 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
3131 demand_empty_rest_of_line ();
3136 OPTION_RELAX
= OPTION_MD_BASE
,
3143 OPTION_ALLOW_REG_PREFIX
,
3147 OPTION_SHCOMPACT_CONST_CRANGE
,
3151 OPTION_DUMMY
/* Not used. This is just here to make it easy to add and subtract options from this enum. */
3154 const char *md_shortopts
= "";
3155 struct option md_longopts
[] =
3157 {"relax", no_argument
, NULL
, OPTION_RELAX
},
3158 {"big", no_argument
, NULL
, OPTION_BIG
},
3159 {"little", no_argument
, NULL
, OPTION_LITTLE
},
3160 /* The next two switches are here because the
3161 generic parts of the linker testsuite uses them. */
3162 {"EB", no_argument
, NULL
, OPTION_BIG
},
3163 {"EL", no_argument
, NULL
, OPTION_LITTLE
},
3164 {"small", no_argument
, NULL
, OPTION_SMALL
},
3165 {"dsp", no_argument
, NULL
, OPTION_DSP
},
3166 {"isa", required_argument
, NULL
, OPTION_ISA
},
3167 {"renesas", no_argument
, NULL
, OPTION_RENESAS
},
3168 {"allow-reg-prefix", no_argument
, NULL
, OPTION_ALLOW_REG_PREFIX
},
3171 {"abi", required_argument
, NULL
, OPTION_ABI
},
3172 {"no-mix", no_argument
, NULL
, OPTION_NO_MIX
},
3173 {"shcompact-const-crange", no_argument
, NULL
, OPTION_SHCOMPACT_CONST_CRANGE
},
3174 {"no-expand", no_argument
, NULL
, OPTION_NO_EXPAND
},
3175 {"expand-pt32", no_argument
, NULL
, OPTION_PT32
},
3176 #endif /* HAVE_SH64 */
3178 {NULL
, no_argument
, NULL
, 0}
3180 size_t md_longopts_size
= sizeof (md_longopts
);
3183 md_parse_option (int c
, char *arg ATTRIBUTE_UNUSED
)
3192 target_big_endian
= 1;
3196 target_big_endian
= 0;
3204 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
3207 case OPTION_RENESAS
:
3208 dont_adjust_reloc_32
= 1;
3211 case OPTION_ALLOW_REG_PREFIX
:
3212 allow_dollar_register_prefix
= 1;
3216 if (strcasecmp (arg
, "dsp") == 0)
3217 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
3218 else if (strcasecmp (arg
, "fp") == 0)
3219 preset_target_arch
= arch_sh_up
& ~arch_sh_has_dsp
;
3220 else if (strcasecmp (arg
, "any") == 0)
3221 preset_target_arch
= arch_sh_up
;
3223 else if (strcasecmp (arg
, "shmedia") == 0)
3225 if (sh64_isa_mode
== sh64_isa_shcompact
)
3226 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
3227 sh64_isa_mode
= sh64_isa_shmedia
;
3229 else if (strcasecmp (arg
, "shcompact") == 0)
3231 if (sh64_isa_mode
== sh64_isa_shmedia
)
3232 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
3233 if (sh64_abi
== sh64_abi_64
)
3234 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
3235 sh64_isa_mode
= sh64_isa_shcompact
;
3237 #endif /* HAVE_SH64 */
3240 extern const bfd_arch_info_type bfd_sh_arch
;
3241 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
3243 preset_target_arch
= 0;
3244 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
3246 int len
= strlen(bfd_arch
->printable_name
);
3248 if (bfd_arch
->mach
== bfd_mach_sh5
)
3251 if (strncasecmp (bfd_arch
->printable_name
, arg
, len
) != 0)
3254 if (arg
[len
] == '\0')
3255 preset_target_arch
=
3256 sh_get_arch_from_bfd_mach (bfd_arch
->mach
);
3257 else if (strcasecmp(&arg
[len
], "-up") == 0)
3258 preset_target_arch
=
3259 sh_get_arch_up_from_bfd_mach (bfd_arch
->mach
);
3265 if (!preset_target_arch
)
3266 as_bad ("Invalid argument to --isa option: %s", arg
);
3272 if (strcmp (arg
, "32") == 0)
3274 if (sh64_abi
== sh64_abi_64
)
3275 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
3276 sh64_abi
= sh64_abi_32
;
3278 else if (strcmp (arg
, "64") == 0)
3280 if (sh64_abi
== sh64_abi_32
)
3281 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
3282 if (sh64_isa_mode
== sh64_isa_shcompact
)
3283 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
3284 sh64_abi
= sh64_abi_64
;
3287 as_bad ("Invalid argument to --abi option: %s", arg
);
3294 case OPTION_SHCOMPACT_CONST_CRANGE
:
3295 sh64_shcompact_const_crange
= TRUE
;
3298 case OPTION_NO_EXPAND
:
3299 sh64_expand
= FALSE
;
3305 #endif /* HAVE_SH64 */
3315 md_show_usage (FILE *stream
)
3317 fprintf (stream
, _("\
3319 --little generate little endian code\n\
3320 --big generate big endian code\n\
3321 --relax alter jump instructions for long displacements\n\
3322 --renesas disable optimization with section symbol for\n\
3323 compatibility with Renesas assembler.\n\
3324 --small align sections to 4 byte boundaries, not 16\n\
3325 --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
3326 --allow-reg-prefix allow '$' as a register name prefix.\n\
3327 --isa=[any use most appropriate isa\n\
3328 | dsp same as '-dsp'\n\
3331 extern const bfd_arch_info_type bfd_sh_arch
;
3332 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
3334 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
3335 if (bfd_arch
->mach
!= bfd_mach_sh5
)
3337 fprintf (stream
, "\n | %s", bfd_arch
->printable_name
);
3338 fprintf (stream
, "\n | %s-up", bfd_arch
->printable_name
);
3341 fprintf (stream
, "]\n");
3343 fprintf (stream
, _("\
3344 --isa=[shmedia set as the default instruction set for SH64\n\
3348 fprintf (stream
, _("\
3349 --abi=[32|64] set size of expanded SHmedia operands and object\n\
3351 --shcompact-const-crange emit code-range descriptors for constants in\n\
3352 SHcompact code sections\n\
3353 --no-mix disallow SHmedia code in the same section as\n\
3354 constants and SHcompact code\n\
3355 --no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
3356 --expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
3357 to 32 bits only\n"));
3358 #endif /* HAVE_SH64 */
3361 /* This struct is used to pass arguments to sh_count_relocs through
3362 bfd_map_over_sections. */
3364 struct sh_count_relocs
3366 /* Symbol we are looking for. */
3368 /* Count of relocs found. */
3372 /* Count the number of fixups in a section which refer to a particular
3373 symbol. This is called via bfd_map_over_sections. */
3376 sh_count_relocs (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, void *data
)
3378 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
3379 segment_info_type
*seginfo
;
3383 seginfo
= seg_info (sec
);
3384 if (seginfo
== NULL
)
3388 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3390 if (fix
->fx_addsy
== sym
)
3398 /* Handle the count relocs for a particular section.
3399 This is called via bfd_map_over_sections. */
3402 sh_frob_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
,
3403 void *ignore ATTRIBUTE_UNUSED
)
3405 segment_info_type
*seginfo
;
3408 seginfo
= seg_info (sec
);
3409 if (seginfo
== NULL
)
3412 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3416 sym
= fix
->fx_addsy
;
3417 /* Check for a local_symbol. */
3418 if (sym
&& sym
->bsym
== NULL
)
3420 struct local_symbol
*ls
= (struct local_symbol
*)sym
;
3421 /* See if it's been converted. If so, canonicalize. */
3422 if (local_symbol_converted_p (ls
))
3423 fix
->fx_addsy
= local_symbol_get_real_symbol (ls
);
3427 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3432 struct sh_count_relocs info
;
3434 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
3437 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
3438 symbol in the same section. */
3439 sym
= fix
->fx_addsy
;
3441 || fix
->fx_subsy
!= NULL
3442 || fix
->fx_addnumber
!= 0
3443 || S_GET_SEGMENT (sym
) != sec
3444 || S_IS_EXTERNAL (sym
))
3446 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3447 _(".uses does not refer to a local symbol in the same section"));
3451 /* Look through the fixups again, this time looking for one
3452 at the same location as sym. */
3453 val
= S_GET_VALUE (sym
);
3454 for (fscan
= seginfo
->fix_root
;
3456 fscan
= fscan
->fx_next
)
3457 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
3458 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
3459 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
3460 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
3461 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
3465 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3466 _("can't find fixup pointed to by .uses"));
3470 if (fscan
->fx_tcbit
)
3472 /* We've already done this one. */
3476 /* The variable fscan should also be a fixup to a local symbol
3477 in the same section. */
3478 sym
= fscan
->fx_addsy
;
3480 || fscan
->fx_subsy
!= NULL
3481 || fscan
->fx_addnumber
!= 0
3482 || S_GET_SEGMENT (sym
) != sec
3483 || S_IS_EXTERNAL (sym
))
3485 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3486 _(".uses target does not refer to a local symbol in the same section"));
3490 /* Now we look through all the fixups of all the sections,
3491 counting the number of times we find a reference to sym. */
3494 bfd_map_over_sections (stdoutput
, sh_count_relocs
, &info
);
3499 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
3500 We have already adjusted the value of sym to include the
3501 fragment address, so we undo that adjustment here. */
3502 subseg_change (sec
, 0);
3503 fix_new (fscan
->fx_frag
,
3504 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
3505 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
3509 /* This function is called after the symbol table has been completed,
3510 but before the relocs or section contents have been written out.
3511 If we have seen any .uses pseudo-ops, they point to an instruction
3512 which loads a register with the address of a function. We look
3513 through the fixups to find where the function address is being
3514 loaded from. We then generate a COUNT reloc giving the number of
3515 times that function address is referred to. The linker uses this
3516 information when doing relaxing, to decide when it can eliminate
3517 the stored function address entirely. */
3523 shmedia_frob_file_before_adjust ();
3529 bfd_map_over_sections (stdoutput
, sh_frob_section
, NULL
);
3532 /* Called after relaxing. Set the correct sizes of the fragments, and
3533 create relocs so that md_apply_fix will fill in the correct values. */
3536 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
, segT seg
, fragS
*fragP
)
3540 switch (fragP
->fr_subtype
)
3542 case C (COND_JUMP
, COND8
):
3543 case C (COND_JUMP_DELAY
, COND8
):
3544 subseg_change (seg
, 0);
3545 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3546 1, BFD_RELOC_SH_PCDISP8BY2
);
3551 case C (UNCOND_JUMP
, UNCOND12
):
3552 subseg_change (seg
, 0);
3553 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3554 1, BFD_RELOC_SH_PCDISP12BY2
);
3559 case C (UNCOND_JUMP
, UNCOND32
):
3560 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3561 if (fragP
->fr_symbol
== NULL
)
3562 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3563 _("displacement overflows 12-bit field"));
3564 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3565 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3566 _("displacement to defined symbol %s overflows 12-bit field"),
3567 S_GET_NAME (fragP
->fr_symbol
));
3569 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3570 _("displacement to undefined symbol %s overflows 12-bit field"),
3571 S_GET_NAME (fragP
->fr_symbol
));
3572 /* Stabilize this frag, so we don't trip an assert. */
3573 fragP
->fr_fix
+= fragP
->fr_var
;
3577 case C (COND_JUMP
, COND12
):
3578 case C (COND_JUMP_DELAY
, COND12
):
3579 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
3580 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
3581 was due to gas incorrectly relaxing an out-of-range conditional
3582 branch with delay slot. It turned:
3583 bf.s L6 (slot mov.l r12,@(44,r0))
3586 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
3588 32: 10 cb mov.l r12,@(44,r0)
3589 Therefore, branches with delay slots have to be handled
3590 differently from ones without delay slots. */
3592 unsigned char *buffer
=
3593 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
3594 int highbyte
= target_big_endian
? 0 : 1;
3595 int lowbyte
= target_big_endian
? 1 : 0;
3596 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
3598 /* Toggle the true/false bit of the bcond. */
3599 buffer
[highbyte
] ^= 0x2;
3601 /* If this is a delayed branch, we may not put the bra in the
3602 slot. So we change it to a non-delayed branch, like that:
3603 b! cond slot_label; bra disp; slot_label: slot_insn
3604 ??? We should try if swapping the conditional branch and
3605 its delay-slot insn already makes the branch reach. */
3607 /* Build a relocation to six / four bytes farther on. */
3608 subseg_change (seg
, 0);
3609 fix_new (fragP
, fragP
->fr_fix
, 2, section_symbol (seg
),
3610 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
3611 1, BFD_RELOC_SH_PCDISP8BY2
);
3613 /* Set up a jump instruction. */
3614 buffer
[highbyte
+ 2] = 0xa0;
3615 buffer
[lowbyte
+ 2] = 0;
3616 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
3617 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
3621 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
3626 /* Fill in a NOP instruction. */
3627 buffer
[highbyte
+ 4] = 0x0;
3628 buffer
[lowbyte
+ 4] = 0x9;
3637 case C (COND_JUMP
, COND32
):
3638 case C (COND_JUMP_DELAY
, COND32
):
3639 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3640 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3641 if (fragP
->fr_symbol
== NULL
)
3642 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3643 _("displacement overflows 8-bit field"));
3644 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3645 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3646 _("displacement to defined symbol %s overflows 8-bit field"),
3647 S_GET_NAME (fragP
->fr_symbol
));
3649 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3650 _("displacement to undefined symbol %s overflows 8-bit field "),
3651 S_GET_NAME (fragP
->fr_symbol
));
3652 /* Stabilize this frag, so we don't trip an assert. */
3653 fragP
->fr_fix
+= fragP
->fr_var
;
3659 shmedia_md_convert_frag (headers
, seg
, fragP
, TRUE
);
3665 if (donerelax
&& !sh_relax
)
3666 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3667 _("overflow in branch to %s; converted into longer instruction sequence"),
3668 (fragP
->fr_symbol
!= NULL
3669 ? S_GET_NAME (fragP
->fr_symbol
)
3674 md_section_align (segT seg ATTRIBUTE_UNUSED
, valueT size
)
3678 #else /* ! OBJ_ELF */
3679 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
3680 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
3681 #endif /* ! OBJ_ELF */
3684 /* This static variable is set by s_uacons to tell sh_cons_align that
3685 the expression does not need to be aligned. */
3687 static int sh_no_align_cons
= 0;
3689 /* This handles the unaligned space allocation pseudo-ops, such as
3690 .uaword. .uaword is just like .word, but the value does not need
3694 s_uacons (int bytes
)
3696 /* Tell sh_cons_align not to align this value. */
3697 sh_no_align_cons
= 1;
3701 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3702 aligned correctly. Note that this can cause warnings to be issued
3703 when assembling initialized structured which were declared with the
3704 packed attribute. FIXME: Perhaps we should require an option to
3705 enable this warning? */
3708 sh_cons_align (int nbytes
)
3713 if (sh_no_align_cons
)
3715 /* This is an unaligned pseudo-op. */
3716 sh_no_align_cons
= 0;
3721 while ((nbytes
& 1) == 0)
3730 if (now_seg
== absolute_section
)
3732 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
3733 as_warn (_("misaligned data"));
3737 p
= frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
3738 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
3740 record_alignment (now_seg
, nalign
);
3743 /* When relaxing, we need to output a reloc for any .align directive
3744 that requests alignment to a four byte boundary or larger. This is
3745 also where we check for misaligned data. */
3748 sh_handle_align (fragS
*frag
)
3750 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
3752 if (frag
->fr_type
== rs_align_code
)
3754 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
3755 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
3757 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
3766 if (target_big_endian
)
3768 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
3769 frag
->fr_var
= sizeof big_nop_pattern
;
3773 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
3774 frag
->fr_var
= sizeof little_nop_pattern
;
3777 else if (frag
->fr_type
== rs_align_test
)
3780 as_bad_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
3784 && (frag
->fr_type
== rs_align
3785 || frag
->fr_type
== rs_align_code
)
3786 && frag
->fr_address
+ frag
->fr_fix
> 0
3787 && frag
->fr_offset
> 1
3788 && now_seg
!= bss_section
)
3789 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
3790 BFD_RELOC_SH_ALIGN
);
3793 /* See whether the relocation should be resolved locally. */
3796 sh_local_pcrel (fixS
*fix
)
3799 && (fix
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
3800 || fix
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
3801 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
3802 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
3803 || fix
->fx_r_type
== BFD_RELOC_8_PCREL
3804 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH16
3805 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH32
));
3808 /* See whether we need to force a relocation into the output file.
3809 This is used to force out switch and PC relative relocations when
3813 sh_force_relocation (fixS
*fix
)
3815 /* These relocations can't make it into a DSO, so no use forcing
3816 them for global symbols. */
3817 if (sh_local_pcrel (fix
))
3820 /* Make sure some relocations get emitted. */
3821 if (fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
3822 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
3823 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_GD_32
3824 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LD_32
3825 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_IE_32
3826 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LDO_32
3827 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LE_32
3828 || generic_force_reloc (fix
))
3834 return (fix
->fx_pcrel
3835 || SWITCH_TABLE (fix
)
3836 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
3837 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
3838 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
3839 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3841 || fix
->fx_r_type
== BFD_RELOC_SH_SHMEDIA_CODE
3843 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
3848 sh_fix_adjustable (fixS
*fixP
)
3850 if (fixP
->fx_r_type
== BFD_RELOC_32_PLT_PCREL
3851 || fixP
->fx_r_type
== BFD_RELOC_32_GOT_PCREL
3852 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTPC
3853 || ((fixP
->fx_r_type
== BFD_RELOC_32
) && dont_adjust_reloc_32
)
3854 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
3857 /* We need the symbol name for the VTABLE entries */
3858 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
3859 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
3866 sh_elf_final_processing (void)
3870 /* Set file-specific flags to indicate if this code needs
3871 a processor with the sh-dsp / sh2e ISA to execute. */
3873 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3874 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3875 if (sh64_isa_mode
!= sh64_isa_unspecified
)
3878 #elif defined TARGET_SYMBIAN
3881 extern int sh_symbian_find_elf_flags (unsigned int);
3883 val
= sh_symbian_find_elf_flags (valid_arch
);
3886 #endif /* HAVE_SH64 */
3887 val
= sh_find_elf_flags (valid_arch
);
3889 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
3890 elf_elfheader (stdoutput
)->e_flags
|= val
;
3894 /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its
3895 assembly-time value. If we're generating a reloc for FIXP,
3896 see whether the addend should be stored in-place or whether
3897 it should be in an ELF r_addend field. */
3900 apply_full_field_fix (fixS
*fixP
, char *buf
, bfd_vma val
, int size
)
3902 reloc_howto_type
*howto
;
3904 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3906 howto
= bfd_reloc_type_lookup (stdoutput
, fixP
->fx_r_type
);
3907 if (howto
&& !howto
->partial_inplace
)
3909 fixP
->fx_addnumber
= val
;
3913 md_number_to_chars (buf
, val
, size
);
3916 /* Apply a fixup to the object file. */
3919 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3921 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3922 int lowbyte
= target_big_endian
? 1 : 0;
3923 int highbyte
= target_big_endian
? 0 : 1;
3924 long val
= (long) *valP
;
3928 /* A difference between two symbols, the second of which is in the
3929 current section, is transformed in a PC-relative relocation to
3930 the other symbol. We have to adjust the relocation type here. */
3933 switch (fixP
->fx_r_type
)
3939 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3942 /* Currently, we only support 32-bit PCREL relocations.
3943 We'd need a new reloc type to handle 16_PCREL, and
3944 8_PCREL is already taken for R_SH_SWITCH8, which
3945 apparently does something completely different than what
3948 bfd_set_error (bfd_error_bad_value
);
3952 bfd_set_error (bfd_error_bad_value
);
3957 /* The function adjust_reloc_syms won't convert a reloc against a weak
3958 symbol into a reloc against a section, but bfd_install_relocation
3959 will screw up if the symbol is defined, so we have to adjust val here
3960 to avoid the screw up later.
3962 For ordinary relocs, this does not happen for ELF, since for ELF,
3963 bfd_install_relocation uses the "special function" field of the
3964 howto, and does not execute the code that needs to be undone, as long
3965 as the special function does not return bfd_reloc_continue.
3966 It can happen for GOT- and PLT-type relocs the way they are
3967 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
3968 doesn't matter here since those relocs don't use VAL; see below. */
3969 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
3970 && fixP
->fx_addsy
!= NULL
3971 && S_IS_WEAK (fixP
->fx_addsy
))
3972 val
-= S_GET_VALUE (fixP
->fx_addsy
);
3974 if (SWITCH_TABLE (fixP
))
3975 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3979 switch (fixP
->fx_r_type
)
3981 case BFD_RELOC_SH_IMM3
:
3983 * buf
= (* buf
& 0xf8) | (val
& 0x7);
3985 case BFD_RELOC_SH_IMM3U
:
3987 * buf
= (* buf
& 0x8f) | ((val
& 0x7) << 4);
3989 case BFD_RELOC_SH_DISP12
:
3991 buf
[lowbyte
] = val
& 0xff;
3992 buf
[highbyte
] |= (val
>> 8) & 0x0f;
3994 case BFD_RELOC_SH_DISP12BY2
:
3997 buf
[lowbyte
] = (val
>> 1) & 0xff;
3998 buf
[highbyte
] |= (val
>> 9) & 0x0f;
4000 case BFD_RELOC_SH_DISP12BY4
:
4003 buf
[lowbyte
] = (val
>> 2) & 0xff;
4004 buf
[highbyte
] |= (val
>> 10) & 0x0f;
4006 case BFD_RELOC_SH_DISP12BY8
:
4009 buf
[lowbyte
] = (val
>> 3) & 0xff;
4010 buf
[highbyte
] |= (val
>> 11) & 0x0f;
4012 case BFD_RELOC_SH_DISP20
:
4013 if (! target_big_endian
)
4017 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 12) & 0xf0);
4018 buf
[2] = (val
>> 8) & 0xff;
4019 buf
[3] = val
& 0xff;
4021 case BFD_RELOC_SH_DISP20BY8
:
4022 if (!target_big_endian
)
4027 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 20) & 0xf0);
4028 buf
[2] = (val
>> 16) & 0xff;
4029 buf
[3] = (val
>> 8) & 0xff;
4032 case BFD_RELOC_SH_IMM4
:
4034 *buf
= (*buf
& 0xf0) | (val
& 0xf);
4037 case BFD_RELOC_SH_IMM4BY2
:
4040 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
4043 case BFD_RELOC_SH_IMM4BY4
:
4046 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
4049 case BFD_RELOC_SH_IMM8BY2
:
4055 case BFD_RELOC_SH_IMM8BY4
:
4062 case BFD_RELOC_SH_IMM8
:
4063 /* Sometimes the 8 bit value is sign extended (e.g., add) and
4064 sometimes it is not (e.g., and). We permit any 8 bit value.
4065 Note that adding further restrictions may invalidate
4066 reasonable looking assembly code, such as ``and -0x1,r0''. */
4072 case BFD_RELOC_SH_PCRELIMM8BY4
:
4073 /* The lower two bits of the PC are cleared before the
4074 displacement is added in. We can assume that the destination
4075 is on a 4 byte boundary. If this instruction is also on a 4
4076 byte boundary, then we want
4078 and target - here is a multiple of 4.
4079 Otherwise, we are on a 2 byte boundary, and we want
4080 (target - (here - 2)) / 4
4081 and target - here is not a multiple of 4. Computing
4082 (target - (here - 2)) / 4 == (target - here + 2) / 4
4083 works for both cases, since in the first case the addition of
4084 2 will be removed by the division. target - here is in the
4086 val
= (val
+ 2) / 4;
4088 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4092 case BFD_RELOC_SH_PCRELIMM8BY2
:
4095 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4099 case BFD_RELOC_SH_PCDISP8BY2
:
4101 if (val
< -0x80 || val
> 0x7f)
4102 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4106 case BFD_RELOC_SH_PCDISP12BY2
:
4108 if (val
< -0x800 || val
> 0x7ff)
4109 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4110 buf
[lowbyte
] = val
& 0xff;
4111 buf
[highbyte
] |= (val
>> 8) & 0xf;
4115 case BFD_RELOC_32_PCREL
:
4116 apply_full_field_fix (fixP
, buf
, val
, 4);
4120 apply_full_field_fix (fixP
, buf
, val
, 2);
4123 case BFD_RELOC_SH_USES
:
4124 /* Pass the value into sh_reloc(). */
4125 fixP
->fx_addnumber
= val
;
4128 case BFD_RELOC_SH_COUNT
:
4129 case BFD_RELOC_SH_ALIGN
:
4130 case BFD_RELOC_SH_CODE
:
4131 case BFD_RELOC_SH_DATA
:
4132 case BFD_RELOC_SH_LABEL
:
4133 /* Nothing to do here. */
4136 case BFD_RELOC_SH_LOOP_START
:
4137 case BFD_RELOC_SH_LOOP_END
:
4139 case BFD_RELOC_VTABLE_INHERIT
:
4140 case BFD_RELOC_VTABLE_ENTRY
:
4145 case BFD_RELOC_32_PLT_PCREL
:
4146 /* Make the jump instruction point to the address of the operand. At
4147 runtime we merely add the offset to the actual PLT entry. */
4148 * valP
= 0xfffffffc;
4149 val
= fixP
->fx_offset
;
4151 val
-= S_GET_VALUE (fixP
->fx_subsy
);
4152 apply_full_field_fix (fixP
, buf
, val
, 4);
4155 case BFD_RELOC_SH_GOTPC
:
4156 /* This is tough to explain. We end up with this one if we have
4157 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
4158 The goal here is to obtain the absolute address of the GOT,
4159 and it is strongly preferable from a performance point of
4160 view to avoid using a runtime relocation for this. There are
4161 cases where you have something like:
4163 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
4165 and here no correction would be required. Internally in the
4166 assembler we treat operands of this form as not being pcrel
4167 since the '.' is explicitly mentioned, and I wonder whether
4168 it would simplify matters to do it this way. Who knows. In
4169 earlier versions of the PIC patches, the pcrel_adjust field
4170 was used to store the correction, but since the expression is
4171 not pcrel, I felt it would be confusing to do it this way. */
4173 apply_full_field_fix (fixP
, buf
, val
, 4);
4176 case BFD_RELOC_SH_TLS_GD_32
:
4177 case BFD_RELOC_SH_TLS_LD_32
:
4178 case BFD_RELOC_SH_TLS_IE_32
:
4179 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
4181 case BFD_RELOC_32_GOT_PCREL
:
4182 case BFD_RELOC_SH_GOTPLT32
:
4183 * valP
= 0; /* Fully resolved at runtime. No addend. */
4184 apply_full_field_fix (fixP
, buf
, 0, 4);
4187 case BFD_RELOC_SH_TLS_LDO_32
:
4188 case BFD_RELOC_SH_TLS_LE_32
:
4189 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
4191 case BFD_RELOC_32_GOTOFF
:
4192 apply_full_field_fix (fixP
, buf
, val
, 4);
4198 shmedia_md_apply_fix (fixP
, valP
);
4207 if ((val
& ((1 << shift
) - 1)) != 0)
4208 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
4212 val
= ((val
>> shift
)
4213 | ((long) -1 & ~ ((long) -1 >> shift
)));
4215 if (max
!= 0 && (val
< min
|| val
> max
))
4216 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
4218 /* Stop the generic code from trying to overlow check the value as well.
4219 It may not have the correct value anyway, as we do not store val back
4221 fixP
->fx_no_overflow
= 1;
4223 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
4227 /* Called just before address relaxation. Return the length
4228 by which a fragment must grow to reach it's destination. */
4231 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
4235 switch (fragP
->fr_subtype
)
4239 return shmedia_md_estimate_size_before_relax (fragP
, segment_type
);
4245 case C (UNCOND_JUMP
, UNDEF_DISP
):
4246 /* Used to be a branch to somewhere which was unknown. */
4247 if (!fragP
->fr_symbol
)
4249 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
4251 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
4253 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
4257 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
4261 case C (COND_JUMP
, UNDEF_DISP
):
4262 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
4263 what
= GET_WHAT (fragP
->fr_subtype
);
4264 /* Used to be a branch to somewhere which was unknown. */
4265 if (fragP
->fr_symbol
4266 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
4268 /* Got a symbol and it's defined in this segment, become byte
4269 sized - maybe it will fix up. */
4270 fragP
->fr_subtype
= C (what
, COND8
);
4272 else if (fragP
->fr_symbol
)
4274 /* Its got a segment, but its not ours, so it will always be long. */
4275 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
4279 /* We know the abs value. */
4280 fragP
->fr_subtype
= C (what
, COND8
);
4284 case C (UNCOND_JUMP
, UNCOND12
):
4285 case C (UNCOND_JUMP
, UNCOND32
):
4286 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
4287 case C (COND_JUMP
, COND8
):
4288 case C (COND_JUMP
, COND12
):
4289 case C (COND_JUMP
, COND32
):
4290 case C (COND_JUMP
, UNDEF_WORD_DISP
):
4291 case C (COND_JUMP_DELAY
, COND8
):
4292 case C (COND_JUMP_DELAY
, COND12
):
4293 case C (COND_JUMP_DELAY
, COND32
):
4294 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
4295 /* When relaxing a section for the second time, we don't need to
4296 do anything besides return the current size. */
4300 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
4301 return fragP
->fr_var
;
4304 /* Put number into target byte order. */
4307 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
4310 /* We might need to set the contents type to data. */
4311 sh64_flag_output ();
4314 if (! target_big_endian
)
4315 number_to_chars_littleendian (ptr
, use
, nbytes
);
4317 number_to_chars_bigendian (ptr
, use
, nbytes
);
4320 /* This version is used in obj-coff.c eg. for the sh-hms target. */
4323 md_pcrel_from (fixS
*fixP
)
4325 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
4329 md_pcrel_from_section (fixS
*fixP
, segT sec
)
4331 if (! sh_local_pcrel (fixP
)
4332 && fixP
->fx_addsy
!= (symbolS
*) NULL
4333 && (generic_force_reloc (fixP
)
4334 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
4336 /* The symbol is undefined (or is defined but not in this section,
4337 or we're not sure about it being the final definition). Let the
4338 linker figure it out. We need to adjust the subtraction of a
4339 symbol to the position of the relocated data, though. */
4340 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
4343 return md_pcrel_from (fixP
);
4346 /* Create a reloc. */
4349 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
4352 bfd_reloc_code_real_type r_type
;
4354 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4355 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4356 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4357 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4359 r_type
= fixp
->fx_r_type
;
4361 if (SWITCH_TABLE (fixp
))
4363 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
4365 if (r_type
== BFD_RELOC_16
)
4366 r_type
= BFD_RELOC_SH_SWITCH16
;
4367 else if (r_type
== BFD_RELOC_8
)
4368 r_type
= BFD_RELOC_8_PCREL
;
4369 else if (r_type
== BFD_RELOC_32
)
4370 r_type
= BFD_RELOC_SH_SWITCH32
;
4374 else if (r_type
== BFD_RELOC_SH_USES
)
4375 rel
->addend
= fixp
->fx_addnumber
;
4376 else if (r_type
== BFD_RELOC_SH_COUNT
)
4377 rel
->addend
= fixp
->fx_offset
;
4378 else if (r_type
== BFD_RELOC_SH_ALIGN
)
4379 rel
->addend
= fixp
->fx_offset
;
4380 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
4381 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
4382 rel
->addend
= fixp
->fx_offset
;
4383 else if (r_type
== BFD_RELOC_SH_LOOP_START
4384 || r_type
== BFD_RELOC_SH_LOOP_END
)
4385 rel
->addend
= fixp
->fx_offset
;
4386 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
4389 rel
->address
= rel
->addend
= fixp
->fx_offset
;
4392 else if (shmedia_init_reloc (rel
, fixp
))
4396 rel
->addend
= fixp
->fx_addnumber
;
4398 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
4400 if (rel
->howto
== NULL
)
4402 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4403 _("Cannot represent relocation type %s"),
4404 bfd_get_reloc_code_name (r_type
));
4405 /* Set howto to a garbage value so that we can keep going. */
4406 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4407 assert (rel
->howto
!= NULL
);
4410 else if (rel
->howto
->type
== R_SH_IND12W
)
4411 rel
->addend
+= fixp
->fx_offset
- 4;
4418 inline static char *
4419 sh_end_of_match (char *cont
, char *what
)
4421 int len
= strlen (what
);
4423 if (strncasecmp (cont
, what
, strlen (what
)) == 0
4424 && ! is_part_of_name (cont
[len
]))
4431 sh_parse_name (char const *name
,
4433 enum expr_mode mode
,
4436 char *next
= input_line_pointer
;
4441 exprP
->X_op_symbol
= NULL
;
4443 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4446 GOT_symbol
= symbol_find_or_make (name
);
4448 exprP
->X_add_symbol
= GOT_symbol
;
4450 /* If we have an absolute symbol or a reg, then we know its
4452 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
4453 if (mode
!= expr_defer
&& segment
== absolute_section
)
4455 exprP
->X_op
= O_constant
;
4456 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4457 exprP
->X_add_symbol
= NULL
;
4459 else if (mode
!= expr_defer
&& segment
== reg_section
)
4461 exprP
->X_op
= O_register
;
4462 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4463 exprP
->X_add_symbol
= NULL
;
4467 exprP
->X_op
= O_symbol
;
4468 exprP
->X_add_number
= 0;
4474 exprP
->X_add_symbol
= symbol_find_or_make (name
);
4476 if (*nextcharP
!= '@')
4478 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFF")))
4479 reloc_type
= BFD_RELOC_32_GOTOFF
;
4480 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTPLT")))
4481 reloc_type
= BFD_RELOC_SH_GOTPLT32
;
4482 else if ((next_end
= sh_end_of_match (next
+ 1, "GOT")))
4483 reloc_type
= BFD_RELOC_32_GOT_PCREL
;
4484 else if ((next_end
= sh_end_of_match (next
+ 1, "PLT")))
4485 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
4486 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSGD")))
4487 reloc_type
= BFD_RELOC_SH_TLS_GD_32
;
4488 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSLDM")))
4489 reloc_type
= BFD_RELOC_SH_TLS_LD_32
;
4490 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTTPOFF")))
4491 reloc_type
= BFD_RELOC_SH_TLS_IE_32
;
4492 else if ((next_end
= sh_end_of_match (next
+ 1, "TPOFF")))
4493 reloc_type
= BFD_RELOC_SH_TLS_LE_32
;
4494 else if ((next_end
= sh_end_of_match (next
+ 1, "DTPOFF")))
4495 reloc_type
= BFD_RELOC_SH_TLS_LDO_32
;
4499 *input_line_pointer
= *nextcharP
;
4500 input_line_pointer
= next_end
;
4501 *nextcharP
= *input_line_pointer
;
4502 *input_line_pointer
= '\0';
4504 exprP
->X_op
= O_PIC_reloc
;
4505 exprP
->X_add_number
= 0;
4506 exprP
->X_md
= reloc_type
;
4512 sh_cfi_frame_initial_instructions (void)
4514 cfi_add_CFA_def_cfa (15, 0);
4518 sh_regname_to_dw2regnum (char *regname
)
4520 unsigned int regnum
= -1;
4524 static struct { char *name
; int dw2regnum
; } regnames
[] =
4526 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 },
4527 { "macl", 21 }, { "fpul", 23 }
4530 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
4531 if (strcmp (regnames
[i
].name
, regname
) == 0)
4532 return regnames
[i
].dw2regnum
;
4534 if (regname
[0] == 'r')
4537 regnum
= strtoul (p
, &q
, 10);
4538 if (p
== q
|| *q
|| regnum
>= 16)
4541 else if (regname
[0] == 'f' && regname
[1] == 'r')
4544 regnum
= strtoul (p
, &q
, 10);
4545 if (p
== q
|| *q
|| regnum
>= 16)
4549 else if (regname
[0] == 'x' && regname
[1] == 'd')
4552 regnum
= strtoul (p
, &q
, 10);
4553 if (p
== q
|| *q
|| regnum
>= 8)
4559 #endif /* OBJ_ELF */