1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright (C) 1993-2019 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19 Boston, MA 02110-1301, USA. */
21 /* Written By Steve Chamberlain <sac@cygnus.com> */
26 #include "opcodes/sh-opc.h"
27 #include "safe-ctype.h"
33 #include "dwarf2dbg.h"
34 #include "dw2gencfi.h"
40 expressionS immediate
;
44 const char comment_chars
[] = "!";
45 const char line_separator_chars
[] = ";";
46 const char line_comment_chars
[] = "!#";
48 static void s_uses (int);
49 static void s_uacons (int);
52 static void sh_elf_cons (int);
54 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
58 big (int ignore ATTRIBUTE_UNUSED
)
60 if (! target_big_endian
)
61 as_bad (_("directive .big encountered when option -big required"));
63 /* Stop further messages. */
64 target_big_endian
= 1;
68 little (int ignore ATTRIBUTE_UNUSED
)
70 if (target_big_endian
)
71 as_bad (_("directive .little encountered when option -little required"));
73 /* Stop further messages. */
74 target_big_endian
= 0;
77 /* This table describes all the machine specific pseudo-ops the assembler
78 has to support. The fields are:
79 pseudo-op name without dot
80 function to call to execute this pseudo-op
81 Integer arg to pass to the function. */
83 const pseudo_typeS md_pseudo_table
[] =
86 {"long", sh_elf_cons
, 4},
87 {"int", sh_elf_cons
, 4},
88 {"word", sh_elf_cons
, 2},
89 {"short", sh_elf_cons
, 2},
95 {"form", listing_psize
, 0},
96 {"little", little
, 0},
97 {"heading", listing_title
, 0},
98 {"import", s_ignore
, 0},
99 {"page", listing_eject
, 0},
100 {"program", s_ignore
, 0},
102 {"uaword", s_uacons
, 2},
103 {"ualong", s_uacons
, 4},
104 {"uaquad", s_uacons
, 8},
105 {"2byte", s_uacons
, 2},
106 {"4byte", s_uacons
, 4},
107 {"8byte", s_uacons
, 8},
111 int sh_relax
; /* set if -relax seen */
113 /* Whether -small was seen. */
117 /* Flag to generate relocations against symbol values for local symbols. */
119 static int dont_adjust_reloc_32
;
121 /* Flag to indicate that '$' is allowed as a register prefix. */
123 static int allow_dollar_register_prefix
;
125 /* Preset architecture set, if given; zero otherwise. */
127 static unsigned int preset_target_arch
;
129 /* The bit mask of architectures that could
130 accommodate the insns seen so far. */
131 static unsigned int valid_arch
;
134 /* Whether --fdpic was given. */
138 const char EXP_CHARS
[] = "eE";
140 /* Chars that mean this number is a floating point constant. */
143 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
145 #define C(a,b) ENCODE_RELAX(a,b)
147 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
148 #define GET_WHAT(x) ((x>>4))
150 /* These are the three types of relaxable instruction. */
151 /* These are the types of relaxable instructions; except for END which is
154 #define COND_JUMP_DELAY 2
155 #define UNCOND_JUMP 3
163 #define UNDEF_WORD_DISP 4
168 /* Branch displacements are from the address of the branch plus
169 four, thus all minimum and maximum values have 4 added to them. */
172 #define COND8_LENGTH 2
174 /* There is one extra instruction before the branch, so we must add
175 two more bytes to account for it. */
176 #define COND12_F 4100
177 #define COND12_M -4090
178 #define COND12_LENGTH 6
180 #define COND12_DELAY_LENGTH 4
182 /* ??? The minimum and maximum values are wrong, but this does not matter
183 since this relocation type is not supported yet. */
184 #define COND32_F (1<<30)
185 #define COND32_M -(1<<30)
186 #define COND32_LENGTH 14
188 #define UNCOND12_F 4098
189 #define UNCOND12_M -4092
190 #define UNCOND12_LENGTH 2
192 /* ??? The minimum and maximum values are wrong, but this does not matter
193 since this relocation type is not supported yet. */
194 #define UNCOND32_F (1<<30)
195 #define UNCOND32_M -(1<<30)
196 #define UNCOND32_LENGTH 14
198 #define EMPTY { 0, 0, 0, 0 }
200 const relax_typeS md_relax_table
[C (END
, 0)] = {
201 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
202 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
205 /* C (COND_JUMP, COND8) */
206 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
207 /* C (COND_JUMP, COND12) */
208 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
209 /* C (COND_JUMP, COND32) */
210 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
211 /* C (COND_JUMP, UNDEF_WORD_DISP) */
212 { 0, 0, COND32_LENGTH
, 0, },
214 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
217 /* C (COND_JUMP_DELAY, COND8) */
218 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
219 /* C (COND_JUMP_DELAY, COND12) */
220 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
221 /* C (COND_JUMP_DELAY, COND32) */
222 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
223 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
224 { 0, 0, COND32_LENGTH
, 0, },
226 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
229 /* C (UNCOND_JUMP, UNCOND12) */
230 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
231 /* C (UNCOND_JUMP, UNCOND32) */
232 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
234 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
235 { 0, 0, UNCOND32_LENGTH
, 0, },
237 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
243 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
247 /* Determine whether the symbol needs any kind of PIC relocation. */
250 sh_PIC_related_p (symbolS
*sym
)
257 if (sym
== GOT_symbol
)
260 exp
= symbol_get_value_expression (sym
);
262 return (exp
->X_op
== O_PIC_reloc
263 || sh_PIC_related_p (exp
->X_add_symbol
)
264 || sh_PIC_related_p (exp
->X_op_symbol
));
267 /* Determine the relocation type to be used to represent the
268 expression, that may be rearranged. */
271 sh_check_fixup (expressionS
*main_exp
, bfd_reloc_code_real_type
*r_type_p
)
273 expressionS
*exp
= main_exp
;
275 /* This is here for backward-compatibility only. GCC used to generated:
277 f@PLT + . - (.LPCS# + 2)
279 but we'd rather be able to handle this as a PIC-related reference
280 plus/minus a symbol. However, gas' parser gives us:
282 O_subtract (O_add (f@PLT, .), .LPCS#+2)
284 so we attempt to transform this into:
286 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
288 which we can handle simply below. */
289 if (exp
->X_op
== O_subtract
)
291 if (sh_PIC_related_p (exp
->X_op_symbol
))
294 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
296 if (exp
&& sh_PIC_related_p (exp
->X_op_symbol
))
299 if (exp
&& exp
->X_op
== O_add
300 && sh_PIC_related_p (exp
->X_add_symbol
))
302 symbolS
*sym
= exp
->X_add_symbol
;
304 exp
->X_op
= O_subtract
;
305 exp
->X_add_symbol
= main_exp
->X_op_symbol
;
307 main_exp
->X_op_symbol
= main_exp
->X_add_symbol
;
308 main_exp
->X_add_symbol
= sym
;
310 main_exp
->X_add_number
+= exp
->X_add_number
;
311 exp
->X_add_number
= 0;
316 else if (exp
->X_op
== O_add
&& sh_PIC_related_p (exp
->X_op_symbol
))
319 if (exp
->X_op
== O_symbol
|| exp
->X_op
== O_add
|| exp
->X_op
== O_subtract
)
321 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
323 *r_type_p
= BFD_RELOC_SH_GOTPC
;
326 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
331 if (exp
->X_op
== O_PIC_reloc
)
336 case BFD_RELOC_UNUSED
:
337 *r_type_p
= exp
->X_md
;
340 case BFD_RELOC_SH_DISP20
:
343 case BFD_RELOC_32_GOT_PCREL
:
344 *r_type_p
= BFD_RELOC_SH_GOT20
;
347 case BFD_RELOC_32_GOTOFF
:
348 *r_type_p
= BFD_RELOC_SH_GOTOFF20
;
351 case BFD_RELOC_SH_GOTFUNCDESC
:
352 *r_type_p
= BFD_RELOC_SH_GOTFUNCDESC20
;
355 case BFD_RELOC_SH_GOTOFFFUNCDESC
:
356 *r_type_p
= BFD_RELOC_SH_GOTOFFFUNCDESC20
;
368 exp
->X_op
= O_symbol
;
371 main_exp
->X_add_symbol
= exp
->X_add_symbol
;
372 main_exp
->X_add_number
+= exp
->X_add_number
;
376 return (sh_PIC_related_p (exp
->X_add_symbol
)
377 || sh_PIC_related_p (exp
->X_op_symbol
));
382 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
385 sh_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
,
386 bfd_reloc_code_real_type r_type
)
388 r_type
= BFD_RELOC_UNUSED
;
390 if (sh_check_fixup (exp
, &r_type
))
391 as_bad (_("Invalid PIC expression."));
393 if (r_type
== BFD_RELOC_UNUSED
)
397 r_type
= BFD_RELOC_8
;
401 r_type
= BFD_RELOC_16
;
405 r_type
= BFD_RELOC_32
;
409 r_type
= BFD_RELOC_64
;
418 as_bad (_("unsupported BFD relocation size %u"), size
);
419 r_type
= BFD_RELOC_UNUSED
;
422 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
425 /* The regular cons() function, that reads constants, doesn't support
426 suffixes such as @GOT, @GOTOFF and @PLT, that generate
427 machine-specific relocation types. So we must define it here. */
428 /* Clobbers input_line_pointer, checks end-of-line. */
429 /* NBYTES 1=.byte, 2=.word, 4=.long */
431 sh_elf_cons (int nbytes
)
435 if (is_it_end_of_statement ())
437 demand_empty_rest_of_line ();
442 md_cons_align (nbytes
);
448 emit_expr (&exp
, (unsigned int) nbytes
);
450 while (*input_line_pointer
++ == ',');
452 input_line_pointer
--; /* Put terminator back into stream. */
453 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
455 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
458 demand_empty_rest_of_line ();
461 /* The regular frag_offset_fixed_p doesn't work for rs_align_test
465 align_test_frag_offset_fixed_p (const fragS
*frag1
, const fragS
*frag2
,
471 /* Start with offset initialised to difference between the two frags.
472 Prior to assigning frag addresses this will be zero. */
473 off
= frag1
->fr_address
- frag2
->fr_address
;
480 /* Maybe frag2 is after frag1. */
482 while (frag
->fr_type
== rs_fill
483 || frag
->fr_type
== rs_align_test
)
485 if (frag
->fr_type
== rs_fill
)
486 off
+= frag
->fr_fix
+ frag
->fr_offset
* frag
->fr_var
;
489 frag
= frag
->fr_next
;
499 /* Maybe frag1 is after frag2. */
500 off
= frag1
->fr_address
- frag2
->fr_address
;
502 while (frag
->fr_type
== rs_fill
503 || frag
->fr_type
== rs_align_test
)
505 if (frag
->fr_type
== rs_fill
)
506 off
-= frag
->fr_fix
+ frag
->fr_offset
* frag
->fr_var
;
509 frag
= frag
->fr_next
;
522 /* Optimize a difference of symbols which have rs_align_test frag if
526 sh_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
531 && l
->X_op
== O_symbol
532 && r
->X_op
== O_symbol
533 && S_GET_SEGMENT (l
->X_add_symbol
) == S_GET_SEGMENT (r
->X_add_symbol
)
534 && (SEG_NORMAL (S_GET_SEGMENT (l
->X_add_symbol
))
535 || r
->X_add_symbol
== l
->X_add_symbol
)
536 && align_test_frag_offset_fixed_p (symbol_get_frag (l
->X_add_symbol
),
537 symbol_get_frag (r
->X_add_symbol
),
540 offsetT symval_diff
= S_GET_VALUE (l
->X_add_symbol
)
541 - S_GET_VALUE (r
->X_add_symbol
);
542 subtract_from_result (l
, r
->X_add_number
, r
->X_extrabit
);
543 subtract_from_result (l
, frag_off
/ OCTETS_PER_BYTE
, 0);
544 add_to_result (l
, symval_diff
, symval_diff
< 0);
545 l
->X_op
= O_constant
;
553 /* This function is called once, at assembler startup time. This should
554 set up all the tables, etc that the MD part of the assembler needs. */
559 const sh_opcode_info
*opcode
;
560 const char *prev_name
= "";
561 unsigned int target_arch
;
564 = preset_target_arch
? preset_target_arch
: arch_sh_up
& ~arch_sh_has_dsp
;
565 valid_arch
= target_arch
;
567 opcode_hash_control
= hash_new ();
569 /* Insert unique names into hash table. */
570 for (opcode
= sh_table
; opcode
->name
; opcode
++)
572 if (strcmp (prev_name
, opcode
->name
) != 0)
574 if (!SH_MERGE_ARCH_SET_VALID (opcode
->arch
, target_arch
))
576 prev_name
= opcode
->name
;
577 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
584 static int reg_x
, reg_y
;
588 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
590 /* Try to parse a reg name. Return the number of chars consumed. */
593 parse_reg_without_prefix (char *src
, sh_arg_type
*mode
, int *reg
)
595 char l0
= TOLOWER (src
[0]);
596 char l1
= l0
? TOLOWER (src
[1]) : 0;
598 /* We use ! IDENT_CHAR for the next character after the register name, to
599 make sure that we won't accidentally recognize a symbol name such as
600 'sram' or sr_ram as being a reference to the register 'sr'. */
606 if (src
[2] >= '0' && src
[2] <= '5'
607 && ! IDENT_CHAR ((unsigned char) src
[3]))
610 *reg
= 10 + src
[2] - '0';
614 if (l1
>= '0' && l1
<= '9'
615 && ! IDENT_CHAR ((unsigned char) src
[2]))
621 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
622 && ! IDENT_CHAR ((unsigned char) src
[7]))
629 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
634 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
645 if (! IDENT_CHAR ((unsigned char) src
[2]))
651 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
660 if (! IDENT_CHAR ((unsigned char) src
[2]))
666 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
674 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
675 && ! IDENT_CHAR ((unsigned char) src
[3]))
678 *reg
= 4 + (l1
- '0');
681 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
682 && ! IDENT_CHAR ((unsigned char) src
[3]))
685 *reg
= 6 + (l1
- '0');
688 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
689 && ! IDENT_CHAR ((unsigned char) src
[3]))
694 *reg
= n
| ((~n
& 2) << 1);
699 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[2]))
721 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
722 && ! IDENT_CHAR ((unsigned char) src
[2]))
725 *reg
= A_X0_NUM
+ l1
- '0';
729 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
730 && ! IDENT_CHAR ((unsigned char) src
[2]))
733 *reg
= A_Y0_NUM
+ l1
- '0';
737 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
738 && ! IDENT_CHAR ((unsigned char) src
[2]))
741 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
747 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
753 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
754 && ! IDENT_CHAR ((unsigned char) src
[3]))
760 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
761 && ! IDENT_CHAR ((unsigned char) src
[3]))
767 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
768 && ! IDENT_CHAR ((unsigned char) src
[3]))
774 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
775 && ! IDENT_CHAR ((unsigned char) src
[3]))
781 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
787 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
794 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
799 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
801 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
802 and use an uninitialized immediate. */
806 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
807 && ! IDENT_CHAR ((unsigned char) src
[3]))
812 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
813 && ! IDENT_CHAR ((unsigned char) src
[3]))
819 if (l0
== 't' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
820 && ! IDENT_CHAR ((unsigned char) src
[3]))
825 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
826 && ! IDENT_CHAR ((unsigned char) src
[4]))
828 if (TOLOWER (src
[3]) == 'l')
833 if (TOLOWER (src
[3]) == 'h')
839 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
840 && ! IDENT_CHAR ((unsigned char) src
[3]))
845 if (l0
== 'f' && l1
== 'r')
849 if (src
[3] >= '0' && src
[3] <= '5'
850 && ! IDENT_CHAR ((unsigned char) src
[4]))
853 *reg
= 10 + src
[3] - '0';
857 if (src
[2] >= '0' && src
[2] <= '9'
858 && ! IDENT_CHAR ((unsigned char) src
[3]))
861 *reg
= (src
[2] - '0');
865 if (l0
== 'd' && l1
== 'r')
869 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
870 && ! IDENT_CHAR ((unsigned char) src
[4]))
873 *reg
= 10 + src
[3] - '0';
877 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
878 && ! IDENT_CHAR ((unsigned char) src
[3]))
881 *reg
= (src
[2] - '0');
885 if (l0
== 'x' && l1
== 'd')
889 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
890 && ! IDENT_CHAR ((unsigned char) src
[4]))
893 *reg
= 11 + src
[3] - '0';
897 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
898 && ! IDENT_CHAR ((unsigned char) src
[3]))
901 *reg
= (src
[2] - '0') + 1;
905 if (l0
== 'f' && l1
== 'v')
907 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
913 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
914 && ! IDENT_CHAR ((unsigned char) src
[3]))
917 *reg
= (src
[2] - '0');
921 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
922 && TOLOWER (src
[3]) == 'l'
923 && ! IDENT_CHAR ((unsigned char) src
[4]))
929 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
930 && TOLOWER (src
[3]) == 'c'
931 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
937 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
938 && TOLOWER (src
[3]) == 'r'
939 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
948 /* Like parse_reg_without_prefix, but this version supports
949 $-prefixed register names if enabled by the user. */
952 parse_reg (char *src
, sh_arg_type
*mode
, int *reg
)
955 unsigned int consumed
;
959 if (allow_dollar_register_prefix
)
970 consumed
= parse_reg_without_prefix (src
, mode
, reg
);
975 return consumed
+ prefix
;
979 parse_exp (char *s
, sh_operand_info
*op
)
984 save
= input_line_pointer
;
985 input_line_pointer
= s
;
986 expression (&op
->immediate
);
987 if (op
->immediate
.X_op
== O_absent
)
988 as_bad (_("missing operand"));
989 new_pointer
= input_line_pointer
;
990 input_line_pointer
= save
;
994 /* The many forms of operand:
997 @Rn Register indirect
1010 pr, gbr, vbr, macl, mach
1014 parse_at (char *src
, sh_operand_info
*op
)
1021 src
= parse_at (src
, op
);
1022 if (op
->type
== A_DISP_TBR
)
1023 op
->type
= A_DISP2_TBR
;
1025 as_bad (_("illegal double indirection"));
1027 else if (src
[0] == '-')
1029 /* Must be predecrement. */
1032 len
= parse_reg (src
, &mode
, &(op
->reg
));
1033 if (mode
!= A_REG_N
)
1034 as_bad (_("illegal register after @-"));
1039 else if (src
[0] == '(')
1041 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1044 len
= parse_reg (src
, &mode
, &(op
->reg
));
1045 if (len
&& mode
== A_REG_N
)
1050 as_bad (_("must be @(r0,...)"));
1055 /* Now can be rn or gbr. */
1056 len
= parse_reg (src
, &mode
, &(op
->reg
));
1066 op
->type
= A_R0_GBR
;
1068 else if (mode
== A_REG_N
)
1070 op
->type
= A_IND_R0_REG_N
;
1074 as_bad (_("syntax error in @(r0,...)"));
1079 as_bad (_("syntax error in @(r0...)"));
1084 /* Must be an @(disp,.. thing). */
1085 src
= parse_exp (src
, op
);
1088 /* Now can be rn, gbr or pc. */
1089 len
= parse_reg (src
, &mode
, &op
->reg
);
1092 if (mode
== A_REG_N
)
1094 op
->type
= A_DISP_REG_N
;
1096 else if (mode
== A_GBR
)
1098 op
->type
= A_DISP_GBR
;
1100 else if (mode
== A_TBR
)
1102 op
->type
= A_DISP_TBR
;
1104 else if (mode
== A_PC
)
1106 /* We want @(expr, pc) to uniformly address . + expr,
1107 no matter if expr is a constant, or a more complex
1108 expression, e.g. sym-. or sym1-sym2.
1109 However, we also used to accept @(sym,pc)
1110 as addressing sym, i.e. meaning the same as plain sym.
1111 Some existing code does use the @(sym,pc) syntax, so
1112 we give it the old semantics for now, but warn about
1113 its use, so that users have some time to fix their code.
1115 Note that due to this backward compatibility hack,
1116 we'll get unexpected results when @(offset, pc) is used,
1117 and offset is a symbol that is set later to an an address
1118 difference, or an external symbol that is set to an
1119 address difference in another source file, so we want to
1120 eventually remove it. */
1121 if (op
->immediate
.X_op
== O_symbol
)
1123 op
->type
= A_DISP_PC
;
1124 as_warn (_("Deprecated syntax."));
1128 op
->type
= A_DISP_PC_ABS
;
1129 /* Such operands don't get corrected for PC==.+4, so
1130 make the correction here. */
1131 op
->immediate
.X_add_number
-= 4;
1136 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1141 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1146 as_bad (_("expecting )"));
1152 src
+= parse_reg (src
, &mode
, &(op
->reg
));
1153 if (mode
!= A_REG_N
)
1154 as_bad (_("illegal register after @"));
1161 l0
= TOLOWER (src
[0]);
1162 l1
= TOLOWER (src
[1]);
1164 if ((l0
== 'r' && l1
== '8')
1165 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1168 op
->type
= AX_PMOD_N
;
1170 else if ( (l0
== 'r' && l1
== '9')
1171 || (l0
== 'i' && l1
== 'y'))
1174 op
->type
= AY_PMOD_N
;
1186 get_operand (char **ptr
, sh_operand_info
*op
)
1189 sh_arg_type mode
= (sh_arg_type
) -1;
1195 *ptr
= parse_exp (src
, op
);
1200 else if (src
[0] == '@')
1202 *ptr
= parse_at (src
, op
);
1205 len
= parse_reg (src
, &mode
, &(op
->reg
));
1214 /* Not a reg, the only thing left is a displacement. */
1215 *ptr
= parse_exp (src
, op
);
1216 op
->type
= A_DISP_PC
;
1222 get_operands (sh_opcode_info
*info
, char *args
, sh_operand_info
*operand
)
1227 /* The pre-processor will eliminate whitespace in front of '@'
1228 after the first argument; we may be called multiple times
1229 from assemble_ppi, so don't insist on finding whitespace here. */
1233 get_operand (&ptr
, operand
+ 0);
1240 get_operand (&ptr
, operand
+ 1);
1241 /* ??? Hack: psha/pshl have a varying operand number depending on
1242 the type of the first operand. We handle this by having the
1243 three-operand version first and reducing the number of operands
1244 parsed to two if we see that the first operand is an immediate.
1245 This works because no insn with three operands has an immediate
1246 as first operand. */
1247 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1253 get_operand (&ptr
, operand
+ 2);
1257 operand
[2].type
= 0;
1262 operand
[1].type
= 0;
1263 operand
[2].type
= 0;
1268 operand
[0].type
= 0;
1269 operand
[1].type
= 0;
1270 operand
[2].type
= 0;
1275 /* Passed a pointer to a list of opcodes which use different
1276 addressing modes, return the opcode which matches the opcodes
1279 static sh_opcode_info
*
1280 get_specific (sh_opcode_info
*opcode
, sh_operand_info
*operands
)
1282 sh_opcode_info
*this_try
= opcode
;
1283 const char *name
= opcode
->name
;
1286 while (opcode
->name
)
1288 this_try
= opcode
++;
1289 if ((this_try
->name
!= name
) && (strcmp (this_try
->name
, name
) != 0))
1291 /* We've looked so far down the table that we've run out of
1292 opcodes with the same name. */
1296 /* Look at both operands needed by the opcodes and provided by
1297 the user - since an arg test will often fail on the same arg
1298 again and again, we'll try and test the last failing arg the
1299 first on each opcode try. */
1300 for (n
= 0; this_try
->arg
[n
]; n
++)
1302 sh_operand_info
*user
= operands
+ n
;
1303 sh_arg_type arg
= this_try
->arg
[n
];
1308 if (user
->type
== A_DISP_PC_ABS
)
1319 if (user
->type
!= arg
)
1323 /* opcode needs r0 */
1324 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1328 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1332 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1340 case A_IND_R0_REG_N
:
1349 /* Opcode needs rn */
1350 if (user
->type
!= arg
)
1355 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1371 if (user
->type
!= arg
)
1376 if (user
->type
!= arg
)
1382 if (user
->type
!= A_INC_N
)
1384 if (user
->reg
!= 15)
1390 if (user
->type
!= A_DEC_N
)
1392 if (user
->reg
!= 15)
1401 case A_IND_R0_REG_M
:
1404 /* Opcode needs rn */
1405 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1411 if (user
->type
!= A_DEC_N
)
1413 if (user
->reg
< 2 || user
->reg
> 5)
1419 if (user
->type
!= A_INC_N
)
1421 if (user
->reg
< 2 || user
->reg
> 5)
1427 if (user
->type
!= A_IND_N
)
1429 if (user
->reg
< 2 || user
->reg
> 5)
1435 if (user
->type
!= AX_PMOD_N
)
1437 if (user
->reg
< 2 || user
->reg
> 5)
1443 if (user
->type
!= A_INC_N
)
1445 if (user
->reg
< 4 || user
->reg
> 5)
1451 if (user
->type
!= A_IND_N
)
1453 if (user
->reg
< 4 || user
->reg
> 5)
1459 if (user
->type
!= AX_PMOD_N
)
1461 if (user
->reg
< 4 || user
->reg
> 5)
1467 if (user
->type
!= A_INC_N
)
1469 if ((user
->reg
< 4 || user
->reg
> 5)
1470 && (user
->reg
< 0 || user
->reg
> 1))
1476 if (user
->type
!= A_IND_N
)
1478 if ((user
->reg
< 4 || user
->reg
> 5)
1479 && (user
->reg
< 0 || user
->reg
> 1))
1485 if (user
->type
!= AX_PMOD_N
)
1487 if ((user
->reg
< 4 || user
->reg
> 5)
1488 && (user
->reg
< 0 || user
->reg
> 1))
1494 if (user
->type
!= A_INC_N
)
1496 if (user
->reg
< 6 || user
->reg
> 7)
1502 if (user
->type
!= A_IND_N
)
1504 if (user
->reg
< 6 || user
->reg
> 7)
1510 if (user
->type
!= AY_PMOD_N
)
1512 if (user
->reg
< 6 || user
->reg
> 7)
1518 if (user
->type
!= A_INC_N
)
1520 if ((user
->reg
< 6 || user
->reg
> 7)
1521 && (user
->reg
< 2 || user
->reg
> 3))
1527 if (user
->type
!= A_IND_N
)
1529 if ((user
->reg
< 6 || user
->reg
> 7)
1530 && (user
->reg
< 2 || user
->reg
> 3))
1536 if (user
->type
!= AY_PMOD_N
)
1538 if ((user
->reg
< 6 || user
->reg
> 7)
1539 && (user
->reg
< 2 || user
->reg
> 3))
1545 if (user
->type
!= DSP_REG_N
)
1547 if (user
->reg
!= A_A0_NUM
1548 && user
->reg
!= A_A1_NUM
)
1554 if (user
->type
!= DSP_REG_N
)
1576 if (user
->type
!= DSP_REG_N
)
1598 if (user
->type
!= DSP_REG_N
)
1620 if (user
->type
!= DSP_REG_N
)
1642 if (user
->type
!= DSP_REG_N
)
1664 if (user
->type
!= DSP_REG_N
)
1686 if (user
->type
!= DSP_REG_N
)
1708 if (user
->type
!= DSP_REG_N
)
1730 if (user
->type
!= DSP_REG_N
)
1752 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
1756 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
1760 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
1764 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
1768 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
1778 /* Opcode needs rn */
1779 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
1784 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1789 if (user
->type
!= XMTRX_M4
)
1795 printf (_("unhandled %d\n"), arg
);
1798 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh2a_nofpu_up
)
1799 && ( arg
== A_DISP_REG_M
1800 || arg
== A_DISP_REG_N
))
1802 /* Check a few key IMM* fields for overflow. */
1804 long val
= user
->immediate
.X_add_number
;
1806 for (opf
= 0; opf
< 4; opf
++)
1807 switch (this_try
->nibbles
[opf
])
1811 if (val
< 0 || val
> 15)
1816 if (val
< 0 || val
> 15 * 2)
1821 if (val
< 0 || val
> 15 * 4)
1829 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch
, this_try
->arch
))
1831 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, this_try
->arch
);
1841 insert (char *where
, bfd_reloc_code_real_type how
, int pcrel
,
1842 sh_operand_info
*op
)
1844 fix_new_exp (frag_now
,
1845 where
- frag_now
->fr_literal
,
1853 insert4 (char * where
, bfd_reloc_code_real_type how
, int pcrel
,
1854 sh_operand_info
* op
)
1856 fix_new_exp (frag_now
,
1857 where
- frag_now
->fr_literal
,
1864 build_relax (sh_opcode_info
*opcode
, sh_operand_info
*op
)
1866 int high_byte
= target_big_endian
? 0 : 1;
1869 if (opcode
->arg
[0] == A_BDISP8
)
1871 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
1872 p
= frag_var (rs_machine_dependent
,
1873 md_relax_table
[C (what
, COND32
)].rlx_length
,
1874 md_relax_table
[C (what
, COND8
)].rlx_length
,
1876 op
->immediate
.X_add_symbol
,
1877 op
->immediate
.X_add_number
,
1879 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
1881 else if (opcode
->arg
[0] == A_BDISP12
)
1883 p
= frag_var (rs_machine_dependent
,
1884 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
1885 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
1887 op
->immediate
.X_add_symbol
,
1888 op
->immediate
.X_add_number
,
1890 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
1895 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1898 insert_loop_bounds (char *output
, sh_operand_info
*operand
)
1902 /* Since the low byte of the opcode will be overwritten by the reloc, we
1903 can just stash the high byte into both bytes and ignore endianness. */
1906 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1907 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1911 static int count
= 0;
1913 expressionS
*symval
;
1915 /* If the last loop insn is a two-byte-insn, it is in danger of being
1916 swapped with the insn after it. To prevent this, create a new
1917 symbol - complete with SH_LABEL reloc - after the last loop insn.
1918 If the last loop insn is four bytes long, the symbol will be
1919 right in the middle, but four byte insns are not swapped anyways. */
1920 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1921 Hence a 9 digit number should be enough to count all REPEATs. */
1922 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
1923 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
1924 /* Make this a local symbol. */
1926 SF_SET_LOCAL (end_sym
);
1927 #endif /* OBJ_COFF */
1928 symbol_table_insert (end_sym
);
1929 symval
= symbol_get_value_expression (end_sym
);
1930 *symval
= operand
[1].immediate
;
1931 symval
->X_add_number
+= 2;
1932 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
1935 output
= frag_more (2);
1938 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1939 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1941 return frag_more (2);
1944 /* Now we know what sort of opcodes it is, let's build the bytes. */
1947 build_Mytes (sh_opcode_info
*opcode
, sh_operand_info
*operand
)
1952 unsigned int size
= 2;
1953 int low_byte
= target_big_endian
? 1 : 0;
1955 bfd_reloc_code_real_type r_type
;
1957 int unhandled_pic
= 0;
1970 for (indx
= 0; indx
< 3; indx
++)
1971 if (opcode
->arg
[indx
] == A_IMM
1972 && operand
[indx
].type
== A_IMM
1973 && (operand
[indx
].immediate
.X_op
== O_PIC_reloc
1974 || sh_PIC_related_p (operand
[indx
].immediate
.X_add_symbol
)
1975 || sh_PIC_related_p (operand
[indx
].immediate
.X_op_symbol
)))
1979 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
1981 output
= frag_more (4);
1986 output
= frag_more (2);
1988 for (indx
= 0; indx
< max_index
; indx
++)
1990 sh_nibble_type i
= opcode
->nibbles
[indx
];
2007 if (reg_n
< 2 || reg_n
> 5)
2008 as_bad (_("Invalid register: 'r%d'"), reg_n
);
2009 nbuf
[indx
] = (reg_n
& 3) | 4;
2012 nbuf
[indx
] = reg_n
| (reg_m
>> 2);
2015 nbuf
[indx
] = reg_b
| 0x08;
2018 nbuf
[indx
] = reg_n
| 0x01;
2024 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3
, 0, operand
);
2030 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3U
, 0, operand
);
2033 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
);
2036 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
);
2039 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
);
2042 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
);
2045 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
+1);
2048 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
+1);
2051 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
+1);
2054 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
+1);
2059 r_type
= BFD_RELOC_SH_DISP20
;
2061 if (sh_check_fixup (&operand
->immediate
, &r_type
))
2062 as_bad (_("Invalid PIC expression."));
2065 insert4 (output
, r_type
, 0, operand
);
2068 insert4 (output
, BFD_RELOC_SH_DISP20BY8
, 0, operand
);
2071 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
2074 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
2077 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
2080 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
2083 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
2086 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
2089 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
2092 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
2095 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
2098 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
2101 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
2104 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
2107 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
,
2108 operand
->type
!= A_DISP_PC_ABS
, operand
);
2111 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
,
2112 operand
->type
!= A_DISP_PC_ABS
, operand
);
2115 output
= insert_loop_bounds (output
, operand
);
2116 nbuf
[indx
] = opcode
->nibbles
[3];
2120 printf (_("failed for %d\n"), i
);
2126 as_bad (_("misplaced PIC operand"));
2128 if (!target_big_endian
)
2130 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
2131 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
2135 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
2136 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
2138 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2140 if (!target_big_endian
)
2142 output
[3] = (nbuf
[4] << 4) | (nbuf
[5]);
2143 output
[2] = (nbuf
[6] << 4) | (nbuf
[7]);
2147 output
[2] = (nbuf
[4] << 4) | (nbuf
[5]);
2148 output
[3] = (nbuf
[6] << 4) | (nbuf
[7]);
2154 /* Find an opcode at the start of *STR_P in the hash table, and set
2155 *STR_P to the first character after the last one read. */
2157 static sh_opcode_info
*
2158 find_cooked_opcode (char **str_p
)
2161 unsigned char *op_start
;
2162 unsigned char *op_end
;
2164 unsigned int nlen
= 0;
2166 /* Drop leading whitespace. */
2170 /* Find the op code end.
2171 The pre-processor will eliminate whitespace in front of
2172 any '@' after the first argument; we may be called from
2173 assemble_ppi, so the opcode might be terminated by an '@'. */
2174 for (op_start
= op_end
= (unsigned char *) str
;
2176 && nlen
< sizeof (name
) - 1
2177 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
2180 unsigned char c
= op_start
[nlen
];
2182 /* The machine independent code will convert CMP/EQ into cmp/EQ
2183 because it thinks the '/' is the end of the symbol. Moreover,
2184 all but the first sub-insn is a parallel processing insn won't
2185 be capitalized. Instead of hacking up the machine independent
2186 code, we just deal with it here. */
2193 *str_p
= (char *) op_end
;
2196 as_bad (_("can't find opcode "));
2198 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
2201 /* Assemble a parallel processing insn. */
2202 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2205 assemble_ppi (char *op_end
, sh_opcode_info
*opcode
)
2217 sh_operand_info operand
[3];
2219 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2220 Make sure we encode a defined insn pattern. */
2225 if (opcode
->arg
[0] != A_END
)
2226 op_end
= get_operands (opcode
, op_end
, operand
);
2228 opcode
= get_specific (opcode
, operand
);
2231 /* Couldn't find an opcode which matched the operands. */
2232 char *where
= frag_more (2);
2237 as_bad (_("invalid operands for opcode"));
2241 if (opcode
->nibbles
[0] != PPI
)
2242 as_bad (_("insn can't be combined with parallel processing insn"));
2244 switch (opcode
->nibbles
[1])
2249 as_bad (_("multiple movx specifications"));
2254 as_bad (_("multiple movy specifications"));
2260 as_bad (_("multiple movx specifications"));
2261 if ((reg_n
< 4 || reg_n
> 5)
2262 && (reg_n
< 0 || reg_n
> 1))
2263 as_bad (_("invalid movx address register"));
2264 if (movy
&& movy
!= DDT_BASE
)
2265 as_bad (_("insn cannot be combined with non-nopy"));
2266 movx
= ((((reg_n
& 1) != 0) << 9)
2267 + (((reg_n
& 4) == 0) << 8)
2269 + (opcode
->nibbles
[2] << 4)
2270 + opcode
->nibbles
[3]
2276 as_bad (_("multiple movy specifications"));
2277 if ((reg_n
< 6 || reg_n
> 7)
2278 && (reg_n
< 2 || reg_n
> 3))
2279 as_bad (_("invalid movy address register"));
2280 if (movx
&& movx
!= DDT_BASE
)
2281 as_bad (_("insn cannot be combined with non-nopx"));
2282 movy
= ((((reg_n
& 1) != 0) << 8)
2283 + (((reg_n
& 4) == 0) << 9)
2285 + (opcode
->nibbles
[2] << 4)
2286 + opcode
->nibbles
[3]
2292 as_bad (_("multiple movx specifications"));
2294 as_bad (_("previous movy requires nopx"));
2295 if (reg_n
< 4 || reg_n
> 5)
2296 as_bad (_("invalid movx address register"));
2297 if (opcode
->nibbles
[2] & 8)
2299 if (reg_m
== A_A1_NUM
)
2301 else if (reg_m
!= A_A0_NUM
)
2302 as_bad (_("invalid movx dsp register"));
2307 as_bad (_("invalid movx dsp register"));
2310 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
2315 as_bad (_("multiple movy specifications"));
2317 as_bad (_("previous movx requires nopy"));
2318 if (opcode
->nibbles
[2] & 8)
2320 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2323 if (reg_m
== A_A1_NUM
)
2325 else if (reg_m
!= A_A0_NUM
)
2326 as_bad (_("invalid movy dsp register"));
2331 as_bad (_("invalid movy dsp register"));
2334 if (reg_n
< 6 || reg_n
> 7)
2335 as_bad (_("invalid movy address register"));
2336 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
2340 if (operand
[0].immediate
.X_op
!= O_constant
)
2341 as_bad (_("dsp immediate shift value not constant"));
2342 field_b
= ((opcode
->nibbles
[2] << 12)
2343 | (operand
[0].immediate
.X_add_number
& 127) << 4
2350 goto try_another_opcode
;
2355 as_bad (_("multiple parallel processing specifications"));
2356 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2357 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2358 switch (opcode
->nibbles
[4])
2366 field_b
+= opcode
->nibbles
[4] << 4;
2374 as_bad (_("multiple condition specifications"));
2375 cond
= opcode
->nibbles
[2] << 8;
2377 goto skip_cond_check
;
2381 as_bad (_("multiple parallel processing specifications"));
2382 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2383 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2385 switch (opcode
->nibbles
[4])
2393 field_b
+= opcode
->nibbles
[4] << 4;
2402 if ((field_b
& 0xef00) == 0xa100)
2404 /* pclr Dz pmuls Se,Sf,Dg */
2405 else if ((field_b
& 0xff00) == 0x8d00
2406 && (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh4al_dsp_up
)))
2408 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, arch_sh4al_dsp_up
);
2412 as_bad (_("insn cannot be combined with pmuls"));
2413 switch (field_b
& 0xf)
2416 field_b
+= 0 - A_X0_NUM
;
2419 field_b
+= 1 - A_Y0_NUM
;
2422 field_b
+= 2 - A_A0_NUM
;
2425 field_b
+= 3 - A_A1_NUM
;
2428 as_bad (_("bad combined pmuls output operand"));
2430 /* Generate warning if the destination register for padd / psub
2431 and pmuls is the same ( only for A0 or A1 ).
2432 If the last nibble is 1010 then A0 is used in both
2433 padd / psub and pmuls. If it is 1111 then A1 is used
2434 as destination register in both padd / psub and pmuls. */
2436 if ((((field_b
| reg_efg
) & 0x000F) == 0x000A)
2437 || (((field_b
| reg_efg
) & 0x000F) == 0x000F))
2438 as_warn (_("destination register is same for parallel insns"));
2440 field_b
+= 0x4000 + reg_efg
;
2447 as_bad (_("condition not followed by conditionalizable insn"));
2453 opcode
= find_cooked_opcode (&op_end
);
2457 (_("unrecognized characters at end of parallel processing insn")));
2462 move_code
= movx
| movy
;
2465 /* Parallel processing insn. */
2466 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
2468 output
= frag_more (4);
2470 if (! target_big_endian
)
2472 output
[3] = ppi_code
>> 8;
2473 output
[2] = ppi_code
;
2477 output
[2] = ppi_code
>> 8;
2478 output
[3] = ppi_code
;
2480 move_code
|= 0xf800;
2484 /* Just a double data transfer. */
2485 output
= frag_more (2);
2488 if (! target_big_endian
)
2490 output
[1] = move_code
>> 8;
2491 output
[0] = move_code
;
2495 output
[0] = move_code
>> 8;
2496 output
[1] = move_code
;
2501 /* This is the guts of the machine-dependent assembler. STR points to a
2502 machine dependent instruction. This function is supposed to emit
2503 the frags/bytes it assembles to. */
2506 md_assemble (char *str
)
2509 sh_operand_info operand
[3];
2510 sh_opcode_info
*opcode
;
2511 unsigned int size
= 0;
2512 char *initial_str
= str
;
2514 opcode
= find_cooked_opcode (&str
);
2519 /* The opcode is not in the hash table.
2520 This means we definitely have an assembly failure,
2521 but the instruction may be valid in another CPU variant.
2522 In this case emit something better than 'unknown opcode'.
2523 Search the full table in sh-opc.h to check. */
2525 char *name
= initial_str
;
2526 int name_length
= 0;
2527 const sh_opcode_info
*op
;
2530 /* identify opcode in string */
2531 while (ISSPACE (*name
))
2535 while (!ISSPACE (name
[name_length
]))
2540 /* search for opcode in full list */
2541 for (op
= sh_table
; op
->name
; op
++)
2543 if (strncasecmp (op
->name
, name
, name_length
) == 0
2544 && op
->name
[name_length
] == '\0')
2553 as_bad (_("opcode not valid for this cpu variant"));
2557 as_bad (_("unknown opcode"));
2563 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2565 /* Output a CODE reloc to tell the linker that the following
2566 bytes are instructions, not data. */
2567 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2569 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
2572 if (opcode
->nibbles
[0] == PPI
)
2574 size
= assemble_ppi (op_end
, opcode
);
2578 if (opcode
->arg
[0] == A_BDISP12
2579 || opcode
->arg
[0] == A_BDISP8
)
2581 /* Since we skip get_specific here, we have to check & update
2583 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, opcode
->arch
))
2584 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, opcode
->arch
);
2586 as_bad (_("Delayed branches not available on SH1"));
2587 parse_exp (op_end
+ 1, &operand
[0]);
2588 build_relax (opcode
, &operand
[0]);
2590 /* All branches are currently 16 bit. */
2595 if (opcode
->arg
[0] == A_END
)
2597 /* Ignore trailing whitespace. If there is any, it has already
2598 been compressed to a single space. */
2604 op_end
= get_operands (opcode
, op_end
, operand
);
2606 opcode
= get_specific (opcode
, operand
);
2610 /* Couldn't find an opcode which matched the operands. */
2611 char *where
= frag_more (2);
2616 as_bad (_("invalid operands for opcode"));
2621 as_bad (_("excess operands: '%s'"), op_end
);
2623 size
= build_Mytes (opcode
, operand
);
2628 dwarf2_emit_insn (size
);
2631 /* This routine is called each time a label definition is seen. It
2632 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
2635 sh_frob_label (symbolS
*sym
)
2637 static fragS
*last_label_frag
;
2638 static int last_label_offset
;
2641 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2645 offset
= frag_now_fix ();
2646 if (frag_now
!= last_label_frag
2647 || offset
!= last_label_offset
)
2649 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
2650 last_label_frag
= frag_now
;
2651 last_label_offset
= offset
;
2655 dwarf2_emit_label (sym
);
2658 /* This routine is called when the assembler is about to output some
2659 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
2662 sh_flush_pending_output (void)
2665 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2667 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2669 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
2674 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
2679 /* Various routines to kill one day. */
2682 md_atof (int type
, char *litP
, int *sizeP
)
2684 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
2687 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
2688 call instruction. It refers to a label of the instruction which
2689 loads the register which the call uses. We use it to generate a
2690 special reloc for the linker. */
2693 s_uses (int ignore ATTRIBUTE_UNUSED
)
2698 as_warn (_(".uses pseudo-op seen when not relaxing"));
2702 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
2704 as_bad (_("bad .uses format"));
2705 ignore_rest_of_line ();
2709 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
2711 demand_empty_rest_of_line ();
2716 OPTION_RELAX
= OPTION_MD_BASE
,
2723 OPTION_ALLOW_REG_PREFIX
,
2728 OPTION_DUMMY
/* Not used. This is just here to make it easy to add and subtract options from this enum. */
2731 const char *md_shortopts
= "";
2732 struct option md_longopts
[] =
2734 {"relax", no_argument
, NULL
, OPTION_RELAX
},
2735 {"big", no_argument
, NULL
, OPTION_BIG
},
2736 {"little", no_argument
, NULL
, OPTION_LITTLE
},
2737 /* The next two switches are here because the
2738 generic parts of the linker testsuite uses them. */
2739 {"EB", no_argument
, NULL
, OPTION_BIG
},
2740 {"EL", no_argument
, NULL
, OPTION_LITTLE
},
2741 {"small", no_argument
, NULL
, OPTION_SMALL
},
2742 {"dsp", no_argument
, NULL
, OPTION_DSP
},
2743 {"isa", required_argument
, NULL
, OPTION_ISA
},
2744 {"renesas", no_argument
, NULL
, OPTION_RENESAS
},
2745 {"allow-reg-prefix", no_argument
, NULL
, OPTION_ALLOW_REG_PREFIX
},
2747 { "h-tick-hex", no_argument
, NULL
, OPTION_H_TICK_HEX
},
2750 {"fdpic", no_argument
, NULL
, OPTION_FDPIC
},
2753 {NULL
, no_argument
, NULL
, 0}
2755 size_t md_longopts_size
= sizeof (md_longopts
);
2758 md_parse_option (int c
, const char *arg ATTRIBUTE_UNUSED
)
2767 target_big_endian
= 1;
2771 target_big_endian
= 0;
2779 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
2782 case OPTION_RENESAS
:
2783 dont_adjust_reloc_32
= 1;
2786 case OPTION_ALLOW_REG_PREFIX
:
2787 allow_dollar_register_prefix
= 1;
2791 if (strcasecmp (arg
, "dsp") == 0)
2792 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
2793 else if (strcasecmp (arg
, "fp") == 0)
2794 preset_target_arch
= arch_sh_up
& ~arch_sh_has_dsp
;
2795 else if (strcasecmp (arg
, "any") == 0)
2796 preset_target_arch
= arch_sh_up
;
2799 extern const bfd_arch_info_type bfd_sh_arch
;
2800 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
2802 preset_target_arch
= 0;
2803 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
2805 int len
= strlen(bfd_arch
->printable_name
);
2807 if (strncasecmp (bfd_arch
->printable_name
, arg
, len
) != 0)
2810 if (arg
[len
] == '\0')
2811 preset_target_arch
=
2812 sh_get_arch_from_bfd_mach (bfd_arch
->mach
);
2813 else if (strcasecmp(&arg
[len
], "-up") == 0)
2814 preset_target_arch
=
2815 sh_get_arch_up_from_bfd_mach (bfd_arch
->mach
);
2821 if (!preset_target_arch
)
2822 as_bad (_("Invalid argument to --isa option: %s"), arg
);
2826 case OPTION_H_TICK_HEX
:
2827 enable_h_tick_hex
= 1;
2834 #endif /* OBJ_ELF */
2844 md_show_usage (FILE *stream
)
2846 fprintf (stream
, _("\
2848 --little generate little endian code\n\
2849 --big generate big endian code\n\
2850 --relax alter jump instructions for long displacements\n\
2851 --renesas disable optimization with section symbol for\n\
2852 compatibility with Renesas assembler.\n\
2853 --small align sections to 4 byte boundaries, not 16\n\
2854 --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
2855 --allow-reg-prefix allow '$' as a register name prefix.\n\
2856 --isa=[any use most appropriate isa\n\
2857 | dsp same as '-dsp'\n\
2860 extern const bfd_arch_info_type bfd_sh_arch
;
2861 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
2863 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
2865 fprintf (stream
, "\n | %s", bfd_arch
->printable_name
);
2866 fprintf (stream
, "\n | %s-up", bfd_arch
->printable_name
);
2869 fprintf (stream
, "]\n");
2871 fprintf (stream
, _("\
2872 --fdpic generate an FDPIC object file\n"));
2873 #endif /* OBJ_ELF */
2876 /* This struct is used to pass arguments to sh_count_relocs through
2877 bfd_map_over_sections. */
2879 struct sh_count_relocs
2881 /* Symbol we are looking for. */
2883 /* Count of relocs found. */
2887 /* Count the number of fixups in a section which refer to a particular
2888 symbol. This is called via bfd_map_over_sections. */
2891 sh_count_relocs (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, void *data
)
2893 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
2894 segment_info_type
*seginfo
;
2898 seginfo
= seg_info (sec
);
2899 if (seginfo
== NULL
)
2903 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2905 if (fix
->fx_addsy
== sym
)
2913 /* Handle the count relocs for a particular section.
2914 This is called via bfd_map_over_sections. */
2917 sh_frob_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
,
2918 void *ignore ATTRIBUTE_UNUSED
)
2920 segment_info_type
*seginfo
;
2923 seginfo
= seg_info (sec
);
2924 if (seginfo
== NULL
)
2927 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2932 struct sh_count_relocs info
;
2934 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
2937 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2938 symbol in the same section. */
2939 sym
= fix
->fx_addsy
;
2941 || fix
->fx_subsy
!= NULL
2942 || fix
->fx_addnumber
!= 0
2943 || S_GET_SEGMENT (sym
) != sec
2944 || S_IS_EXTERNAL (sym
))
2946 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2947 _(".uses does not refer to a local symbol in the same section"));
2951 /* Look through the fixups again, this time looking for one
2952 at the same location as sym. */
2953 val
= S_GET_VALUE (sym
);
2954 for (fscan
= seginfo
->fix_root
;
2956 fscan
= fscan
->fx_next
)
2957 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
2958 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
2959 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
2960 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
2961 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
2965 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2966 _("can't find fixup pointed to by .uses"));
2970 if (fscan
->fx_tcbit
)
2972 /* We've already done this one. */
2976 /* The variable fscan should also be a fixup to a local symbol
2977 in the same section. */
2978 sym
= fscan
->fx_addsy
;
2980 || fscan
->fx_subsy
!= NULL
2981 || fscan
->fx_addnumber
!= 0
2982 || S_GET_SEGMENT (sym
) != sec
2983 || S_IS_EXTERNAL (sym
))
2985 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2986 _(".uses target does not refer to a local symbol in the same section"));
2990 /* Now we look through all the fixups of all the sections,
2991 counting the number of times we find a reference to sym. */
2994 bfd_map_over_sections (stdoutput
, sh_count_relocs
, &info
);
2999 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
3000 We have already adjusted the value of sym to include the
3001 fragment address, so we undo that adjustment here. */
3002 subseg_change (sec
, 0);
3003 fix_new (fscan
->fx_frag
,
3004 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
3005 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
3009 /* This function is called after the symbol table has been completed,
3010 but before the relocs or section contents have been written out.
3011 If we have seen any .uses pseudo-ops, they point to an instruction
3012 which loads a register with the address of a function. We look
3013 through the fixups to find where the function address is being
3014 loaded from. We then generate a COUNT reloc giving the number of
3015 times that function address is referred to. The linker uses this
3016 information when doing relaxing, to decide when it can eliminate
3017 the stored function address entirely. */
3025 bfd_map_over_sections (stdoutput
, sh_frob_section
, NULL
);
3028 /* Called after relaxing. Set the correct sizes of the fragments, and
3029 create relocs so that md_apply_fix will fill in the correct values. */
3032 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
, segT seg
, fragS
*fragP
)
3036 switch (fragP
->fr_subtype
)
3038 case C (COND_JUMP
, COND8
):
3039 case C (COND_JUMP_DELAY
, COND8
):
3040 subseg_change (seg
, 0);
3041 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3042 1, BFD_RELOC_SH_PCDISP8BY2
);
3047 case C (UNCOND_JUMP
, UNCOND12
):
3048 subseg_change (seg
, 0);
3049 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3050 1, BFD_RELOC_SH_PCDISP12BY2
);
3055 case C (UNCOND_JUMP
, UNCOND32
):
3056 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3057 if (fragP
->fr_symbol
== NULL
)
3058 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3059 _("displacement overflows 12-bit field"));
3060 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3061 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3062 _("displacement to defined symbol %s overflows 12-bit field"),
3063 S_GET_NAME (fragP
->fr_symbol
));
3065 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3066 _("displacement to undefined symbol %s overflows 12-bit field"),
3067 S_GET_NAME (fragP
->fr_symbol
));
3068 /* Stabilize this frag, so we don't trip an assert. */
3069 fragP
->fr_fix
+= fragP
->fr_var
;
3073 case C (COND_JUMP
, COND12
):
3074 case C (COND_JUMP_DELAY
, COND12
):
3075 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
3076 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
3077 was due to gas incorrectly relaxing an out-of-range conditional
3078 branch with delay slot. It turned:
3079 bf.s L6 (slot mov.l r12,@(44,r0))
3082 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
3084 32: 10 cb mov.l r12,@(44,r0)
3085 Therefore, branches with delay slots have to be handled
3086 differently from ones without delay slots. */
3088 unsigned char *buffer
=
3089 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
3090 int highbyte
= target_big_endian
? 0 : 1;
3091 int lowbyte
= target_big_endian
? 1 : 0;
3092 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
3094 /* Toggle the true/false bit of the bcond. */
3095 buffer
[highbyte
] ^= 0x2;
3097 /* If this is a delayed branch, we may not put the bra in the
3098 slot. So we change it to a non-delayed branch, like that:
3099 b! cond slot_label; bra disp; slot_label: slot_insn
3100 ??? We should try if swapping the conditional branch and
3101 its delay-slot insn already makes the branch reach. */
3103 /* Build a relocation to six / four bytes farther on. */
3104 subseg_change (seg
, 0);
3105 fix_new (fragP
, fragP
->fr_fix
, 2, section_symbol (seg
),
3106 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
3107 1, BFD_RELOC_SH_PCDISP8BY2
);
3109 /* Set up a jump instruction. */
3110 buffer
[highbyte
+ 2] = 0xa0;
3111 buffer
[lowbyte
+ 2] = 0;
3112 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
3113 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
3117 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
3122 /* Fill in a NOP instruction. */
3123 buffer
[highbyte
+ 4] = 0x0;
3124 buffer
[lowbyte
+ 4] = 0x9;
3133 case C (COND_JUMP
, COND32
):
3134 case C (COND_JUMP_DELAY
, COND32
):
3135 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3136 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3137 if (fragP
->fr_symbol
== NULL
)
3138 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3139 _("displacement overflows 8-bit field"));
3140 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3141 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3142 _("displacement to defined symbol %s overflows 8-bit field"),
3143 S_GET_NAME (fragP
->fr_symbol
));
3145 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3146 _("displacement to undefined symbol %s overflows 8-bit field "),
3147 S_GET_NAME (fragP
->fr_symbol
));
3148 /* Stabilize this frag, so we don't trip an assert. */
3149 fragP
->fr_fix
+= fragP
->fr_var
;
3157 if (donerelax
&& !sh_relax
)
3158 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3159 _("overflow in branch to %s; converted into longer instruction sequence"),
3160 (fragP
->fr_symbol
!= NULL
3161 ? S_GET_NAME (fragP
->fr_symbol
)
3166 md_section_align (segT seg ATTRIBUTE_UNUSED
, valueT size
)
3170 #else /* ! OBJ_ELF */
3171 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
3172 & -(1 << bfd_get_section_alignment (stdoutput
, seg
)));
3173 #endif /* ! OBJ_ELF */
3176 /* This static variable is set by s_uacons to tell sh_cons_align that
3177 the expression does not need to be aligned. */
3179 static int sh_no_align_cons
= 0;
3181 /* This handles the unaligned space allocation pseudo-ops, such as
3182 .uaword. .uaword is just like .word, but the value does not need
3186 s_uacons (int bytes
)
3188 /* Tell sh_cons_align not to align this value. */
3189 sh_no_align_cons
= 1;
3193 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3194 aligned correctly. Note that this can cause warnings to be issued
3195 when assembling initialized structured which were declared with the
3196 packed attribute. FIXME: Perhaps we should require an option to
3197 enable this warning? */
3200 sh_cons_align (int nbytes
)
3204 if (sh_no_align_cons
)
3206 /* This is an unaligned pseudo-op. */
3207 sh_no_align_cons
= 0;
3212 while ((nbytes
& 1) == 0)
3221 if (now_seg
== absolute_section
)
3223 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
3224 as_warn (_("misaligned data"));
3228 frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
3229 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
3231 record_alignment (now_seg
, nalign
);
3234 /* When relaxing, we need to output a reloc for any .align directive
3235 that requests alignment to a four byte boundary or larger. This is
3236 also where we check for misaligned data. */
3239 sh_handle_align (fragS
*frag
)
3241 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
3243 if (frag
->fr_type
== rs_align_code
)
3245 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
3246 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
3248 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
3257 if (target_big_endian
)
3259 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
3260 frag
->fr_var
= sizeof big_nop_pattern
;
3264 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
3265 frag
->fr_var
= sizeof little_nop_pattern
;
3268 else if (frag
->fr_type
== rs_align_test
)
3271 as_bad_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
3275 && (frag
->fr_type
== rs_align
3276 || frag
->fr_type
== rs_align_code
)
3277 && frag
->fr_address
+ frag
->fr_fix
> 0
3278 && frag
->fr_offset
> 1
3279 && now_seg
!= bss_section
)
3280 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
3281 BFD_RELOC_SH_ALIGN
);
3284 /* See whether the relocation should be resolved locally. */
3287 sh_local_pcrel (fixS
*fix
)
3290 && (fix
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
3291 || fix
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
3292 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
3293 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
3294 || fix
->fx_r_type
== BFD_RELOC_8_PCREL
3295 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH16
3296 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH32
));
3299 /* See whether we need to force a relocation into the output file.
3300 This is used to force out switch and PC relative relocations when
3304 sh_force_relocation (fixS
*fix
)
3306 /* These relocations can't make it into a DSO, so no use forcing
3307 them for global symbols. */
3308 if (sh_local_pcrel (fix
))
3311 /* Make sure some relocations get emitted. */
3312 if (fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
3313 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
3314 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_GD_32
3315 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LD_32
3316 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_IE_32
3317 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LDO_32
3318 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LE_32
3319 || generic_force_reloc (fix
))
3325 return (fix
->fx_pcrel
3326 || SWITCH_TABLE (fix
)
3327 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
3328 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
3329 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
3330 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3331 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
3336 sh_fix_adjustable (fixS
*fixP
)
3338 if (fixP
->fx_r_type
== BFD_RELOC_32_PLT_PCREL
3339 || fixP
->fx_r_type
== BFD_RELOC_32_GOT_PCREL
3340 || fixP
->fx_r_type
== BFD_RELOC_SH_GOT20
3341 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTPC
3342 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTFUNCDESC
3343 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTFUNCDESC20
3344 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTOFFFUNCDESC
3345 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTOFFFUNCDESC20
3346 || fixP
->fx_r_type
== BFD_RELOC_SH_FUNCDESC
3347 || ((fixP
->fx_r_type
== BFD_RELOC_32
) && dont_adjust_reloc_32
)
3348 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
3351 /* We need the symbol name for the VTABLE entries */
3352 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
3353 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
3360 sh_elf_final_processing (void)
3364 /* Set file-specific flags to indicate if this code needs
3365 a processor with the sh-dsp / sh2e ISA to execute. */
3366 val
= sh_find_elf_flags (valid_arch
);
3368 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
3369 elf_elfheader (stdoutput
)->e_flags
|= val
;
3372 elf_elfheader (stdoutput
)->e_flags
|= EF_SH_FDPIC
;
3377 /* Return the target format for uClinux. */
3380 sh_uclinux_target_format (void)
3383 return (!target_big_endian
? "elf32-sh-fdpic" : "elf32-shbig-fdpic");
3385 return (!target_big_endian
? "elf32-shl" : "elf32-sh");
3389 /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its
3390 assembly-time value. If we're generating a reloc for FIXP,
3391 see whether the addend should be stored in-place or whether
3392 it should be in an ELF r_addend field. */
3395 apply_full_field_fix (fixS
*fixP
, char *buf
, bfd_vma val
, int size
)
3397 reloc_howto_type
*howto
;
3399 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3401 howto
= bfd_reloc_type_lookup (stdoutput
, fixP
->fx_r_type
);
3402 if (howto
&& !howto
->partial_inplace
)
3404 fixP
->fx_addnumber
= val
;
3408 md_number_to_chars (buf
, val
, size
);
3411 /* Apply a fixup to the object file. */
3414 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3416 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3417 int lowbyte
= target_big_endian
? 1 : 0;
3418 int highbyte
= target_big_endian
? 0 : 1;
3419 long val
= (long) *valP
;
3423 /* A difference between two symbols, the second of which is in the
3424 current section, is transformed in a PC-relative relocation to
3425 the other symbol. We have to adjust the relocation type here. */
3428 switch (fixP
->fx_r_type
)
3434 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3437 /* Currently, we only support 32-bit PCREL relocations.
3438 We'd need a new reloc type to handle 16_PCREL, and
3439 8_PCREL is already taken for R_SH_SWITCH8, which
3440 apparently does something completely different than what
3443 bfd_set_error (bfd_error_bad_value
);
3447 bfd_set_error (bfd_error_bad_value
);
3452 /* The function adjust_reloc_syms won't convert a reloc against a weak
3453 symbol into a reloc against a section, but bfd_install_relocation
3454 will screw up if the symbol is defined, so we have to adjust val here
3455 to avoid the screw up later.
3457 For ordinary relocs, this does not happen for ELF, since for ELF,
3458 bfd_install_relocation uses the "special function" field of the
3459 howto, and does not execute the code that needs to be undone, as long
3460 as the special function does not return bfd_reloc_continue.
3461 It can happen for GOT- and PLT-type relocs the way they are
3462 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
3463 doesn't matter here since those relocs don't use VAL; see below. */
3464 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
3465 && fixP
->fx_addsy
!= NULL
3466 && S_IS_WEAK (fixP
->fx_addsy
))
3467 val
-= S_GET_VALUE (fixP
->fx_addsy
);
3469 if (SWITCH_TABLE (fixP
))
3470 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3474 switch (fixP
->fx_r_type
)
3476 case BFD_RELOC_SH_IMM3
:
3478 * buf
= (* buf
& 0xf8) | (val
& 0x7);
3480 case BFD_RELOC_SH_IMM3U
:
3482 * buf
= (* buf
& 0x8f) | ((val
& 0x7) << 4);
3484 case BFD_RELOC_SH_DISP12
:
3486 buf
[lowbyte
] = val
& 0xff;
3487 buf
[highbyte
] |= (val
>> 8) & 0x0f;
3489 case BFD_RELOC_SH_DISP12BY2
:
3492 buf
[lowbyte
] = (val
>> 1) & 0xff;
3493 buf
[highbyte
] |= (val
>> 9) & 0x0f;
3495 case BFD_RELOC_SH_DISP12BY4
:
3498 buf
[lowbyte
] = (val
>> 2) & 0xff;
3499 buf
[highbyte
] |= (val
>> 10) & 0x0f;
3501 case BFD_RELOC_SH_DISP12BY8
:
3504 buf
[lowbyte
] = (val
>> 3) & 0xff;
3505 buf
[highbyte
] |= (val
>> 11) & 0x0f;
3507 case BFD_RELOC_SH_DISP20
:
3508 if (! target_big_endian
)
3512 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 12) & 0xf0);
3513 buf
[2] = (val
>> 8) & 0xff;
3514 buf
[3] = val
& 0xff;
3516 case BFD_RELOC_SH_DISP20BY8
:
3517 if (!target_big_endian
)
3522 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 20) & 0xf0);
3523 buf
[2] = (val
>> 16) & 0xff;
3524 buf
[3] = (val
>> 8) & 0xff;
3527 case BFD_RELOC_SH_IMM4
:
3529 *buf
= (*buf
& 0xf0) | (val
& 0xf);
3532 case BFD_RELOC_SH_IMM4BY2
:
3535 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
3538 case BFD_RELOC_SH_IMM4BY4
:
3541 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
3544 case BFD_RELOC_SH_IMM8BY2
:
3550 case BFD_RELOC_SH_IMM8BY4
:
3557 case BFD_RELOC_SH_IMM8
:
3558 /* Sometimes the 8 bit value is sign extended (e.g., add) and
3559 sometimes it is not (e.g., and). We permit any 8 bit value.
3560 Note that adding further restrictions may invalidate
3561 reasonable looking assembly code, such as ``and -0x1,r0''. */
3567 case BFD_RELOC_SH_PCRELIMM8BY4
:
3568 /* If we are dealing with a known destination ... */
3569 if ((fixP
->fx_addsy
== NULL
|| S_IS_DEFINED (fixP
->fx_addsy
))
3570 && (fixP
->fx_subsy
== NULL
|| S_IS_DEFINED (fixP
->fx_addsy
)))
3572 /* Don't silently move the destination due to misalignment.
3573 The absolute address is the fragment base plus the offset into
3574 the fragment plus the pc relative offset to the label. */
3575 if ((fixP
->fx_frag
->fr_address
+ fixP
->fx_where
+ val
) & 3)
3576 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3577 _("offset to unaligned destination"));
3579 /* The displacement cannot be zero or backward even if aligned.
3580 Allow -2 because val has already been adjusted somewhere. */
3582 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("negative offset"));
3585 /* The lower two bits of the PC are cleared before the
3586 displacement is added in. We can assume that the destination
3587 is on a 4 byte boundary. If this instruction is also on a 4
3588 byte boundary, then we want
3590 and target - here is a multiple of 4.
3591 Otherwise, we are on a 2 byte boundary, and we want
3592 (target - (here - 2)) / 4
3593 and target - here is not a multiple of 4. Computing
3594 (target - (here - 2)) / 4 == (target - here + 2) / 4
3595 works for both cases, since in the first case the addition of
3596 2 will be removed by the division. target - here is in the
3598 val
= (val
+ 2) / 4;
3600 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3604 case BFD_RELOC_SH_PCRELIMM8BY2
:
3607 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3611 case BFD_RELOC_SH_PCDISP8BY2
:
3613 if (val
< -0x80 || val
> 0x7f)
3614 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3618 case BFD_RELOC_SH_PCDISP12BY2
:
3620 if (val
< -0x800 || val
> 0x7ff)
3621 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3622 buf
[lowbyte
] = val
& 0xff;
3623 buf
[highbyte
] |= (val
>> 8) & 0xf;
3627 case BFD_RELOC_32_PCREL
:
3628 apply_full_field_fix (fixP
, buf
, val
, 4);
3632 apply_full_field_fix (fixP
, buf
, val
, 2);
3635 case BFD_RELOC_SH_USES
:
3636 /* Pass the value into sh_reloc(). */
3637 fixP
->fx_addnumber
= val
;
3640 case BFD_RELOC_SH_COUNT
:
3641 case BFD_RELOC_SH_ALIGN
:
3642 case BFD_RELOC_SH_CODE
:
3643 case BFD_RELOC_SH_DATA
:
3644 case BFD_RELOC_SH_LABEL
:
3645 /* Nothing to do here. */
3648 case BFD_RELOC_SH_LOOP_START
:
3649 case BFD_RELOC_SH_LOOP_END
:
3651 case BFD_RELOC_VTABLE_INHERIT
:
3652 case BFD_RELOC_VTABLE_ENTRY
:
3657 case BFD_RELOC_32_PLT_PCREL
:
3658 /* Make the jump instruction point to the address of the operand. At
3659 runtime we merely add the offset to the actual PLT entry. */
3660 * valP
= 0xfffffffc;
3661 val
= fixP
->fx_offset
;
3663 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3664 apply_full_field_fix (fixP
, buf
, val
, 4);
3667 case BFD_RELOC_SH_GOTPC
:
3668 /* This is tough to explain. We end up with this one if we have
3669 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
3670 The goal here is to obtain the absolute address of the GOT,
3671 and it is strongly preferable from a performance point of
3672 view to avoid using a runtime relocation for this. There are
3673 cases where you have something like:
3675 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
3677 and here no correction would be required. Internally in the
3678 assembler we treat operands of this form as not being pcrel
3679 since the '.' is explicitly mentioned, and I wonder whether
3680 it would simplify matters to do it this way. Who knows. In
3681 earlier versions of the PIC patches, the pcrel_adjust field
3682 was used to store the correction, but since the expression is
3683 not pcrel, I felt it would be confusing to do it this way. */
3685 apply_full_field_fix (fixP
, buf
, val
, 4);
3688 case BFD_RELOC_SH_TLS_GD_32
:
3689 case BFD_RELOC_SH_TLS_LD_32
:
3690 case BFD_RELOC_SH_TLS_IE_32
:
3691 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
3693 case BFD_RELOC_32_GOT_PCREL
:
3694 case BFD_RELOC_SH_GOT20
:
3695 case BFD_RELOC_SH_GOTPLT32
:
3696 case BFD_RELOC_SH_GOTFUNCDESC
:
3697 case BFD_RELOC_SH_GOTFUNCDESC20
:
3698 case BFD_RELOC_SH_GOTOFFFUNCDESC
:
3699 case BFD_RELOC_SH_GOTOFFFUNCDESC20
:
3700 case BFD_RELOC_SH_FUNCDESC
:
3701 * valP
= 0; /* Fully resolved at runtime. No addend. */
3702 apply_full_field_fix (fixP
, buf
, 0, 4);
3705 case BFD_RELOC_SH_TLS_LDO_32
:
3706 case BFD_RELOC_SH_TLS_LE_32
:
3707 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
3709 case BFD_RELOC_32_GOTOFF
:
3710 case BFD_RELOC_SH_GOTOFF20
:
3711 apply_full_field_fix (fixP
, buf
, val
, 4);
3721 if ((val
& ((1 << shift
) - 1)) != 0)
3722 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
3726 val
= ((val
>> shift
)
3727 | ((long) -1 & ~ ((long) -1 >> shift
)));
3730 /* Extend sign for 64-bit host. */
3731 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
3732 if (max
!= 0 && (val
< min
|| val
> max
))
3733 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
3735 /* Stop the generic code from trying to overflow check the value as well.
3736 It may not have the correct value anyway, as we do not store val back
3738 fixP
->fx_no_overflow
= 1;
3740 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3744 /* Called just before address relaxation. Return the length
3745 by which a fragment must grow to reach it's destination. */
3748 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
3752 switch (fragP
->fr_subtype
)
3757 case C (UNCOND_JUMP
, UNDEF_DISP
):
3758 /* Used to be a branch to somewhere which was unknown. */
3759 if (!fragP
->fr_symbol
)
3761 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3763 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3765 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3769 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
3773 case C (COND_JUMP
, UNDEF_DISP
):
3774 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
3775 what
= GET_WHAT (fragP
->fr_subtype
);
3776 /* Used to be a branch to somewhere which was unknown. */
3777 if (fragP
->fr_symbol
3778 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3780 /* Got a symbol and it's defined in this segment, become byte
3781 sized - maybe it will fix up. */
3782 fragP
->fr_subtype
= C (what
, COND8
);
3784 else if (fragP
->fr_symbol
)
3786 /* It's got a segment, but it's not ours, so it will always be long. */
3787 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
3791 /* We know the abs value. */
3792 fragP
->fr_subtype
= C (what
, COND8
);
3796 case C (UNCOND_JUMP
, UNCOND12
):
3797 case C (UNCOND_JUMP
, UNCOND32
):
3798 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3799 case C (COND_JUMP
, COND8
):
3800 case C (COND_JUMP
, COND12
):
3801 case C (COND_JUMP
, COND32
):
3802 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3803 case C (COND_JUMP_DELAY
, COND8
):
3804 case C (COND_JUMP_DELAY
, COND12
):
3805 case C (COND_JUMP_DELAY
, COND32
):
3806 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3807 /* When relaxing a section for the second time, we don't need to
3808 do anything besides return the current size. */
3812 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
3813 return fragP
->fr_var
;
3816 /* Put number into target byte order. */
3819 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
3821 if (! target_big_endian
)
3822 number_to_chars_littleendian (ptr
, use
, nbytes
);
3824 number_to_chars_bigendian (ptr
, use
, nbytes
);
3827 /* This version is used in obj-coff.c eg. for the sh-hms target. */
3830 md_pcrel_from (fixS
*fixP
)
3832 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
3836 md_pcrel_from_section (fixS
*fixP
, segT sec
)
3838 if (! sh_local_pcrel (fixP
)
3839 && fixP
->fx_addsy
!= (symbolS
*) NULL
3840 && (generic_force_reloc (fixP
)
3841 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
3843 /* The symbol is undefined (or is defined but not in this section,
3844 or we're not sure about it being the final definition). Let the
3845 linker figure it out. We need to adjust the subtraction of a
3846 symbol to the position of the relocated data, though. */
3847 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
3850 return md_pcrel_from (fixP
);
3853 /* Create a reloc. */
3856 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
3859 bfd_reloc_code_real_type r_type
;
3861 rel
= XNEW (arelent
);
3862 rel
->sym_ptr_ptr
= XNEW (asymbol
*);
3863 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
3864 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3866 r_type
= fixp
->fx_r_type
;
3868 if (SWITCH_TABLE (fixp
))
3870 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
3871 rel
->addend
= rel
->address
- S_GET_VALUE(fixp
->fx_subsy
);
3872 if (r_type
== BFD_RELOC_16
)
3873 r_type
= BFD_RELOC_SH_SWITCH16
;
3874 else if (r_type
== BFD_RELOC_8
)
3875 r_type
= BFD_RELOC_8_PCREL
;
3876 else if (r_type
== BFD_RELOC_32
)
3877 r_type
= BFD_RELOC_SH_SWITCH32
;
3881 else if (r_type
== BFD_RELOC_SH_USES
)
3882 rel
->addend
= fixp
->fx_addnumber
;
3883 else if (r_type
== BFD_RELOC_SH_COUNT
)
3884 rel
->addend
= fixp
->fx_offset
;
3885 else if (r_type
== BFD_RELOC_SH_ALIGN
)
3886 rel
->addend
= fixp
->fx_offset
;
3887 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
3888 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
3889 rel
->addend
= fixp
->fx_offset
;
3890 else if (r_type
== BFD_RELOC_SH_LOOP_START
3891 || r_type
== BFD_RELOC_SH_LOOP_END
)
3892 rel
->addend
= fixp
->fx_offset
;
3893 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
3896 rel
->address
= rel
->addend
= fixp
->fx_offset
;
3899 rel
->addend
= fixp
->fx_addnumber
;
3901 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
3903 if (rel
->howto
== NULL
)
3905 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3906 _("Cannot represent relocation type %s"),
3907 bfd_get_reloc_code_name (r_type
));
3908 /* Set howto to a garbage value so that we can keep going. */
3909 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3910 gas_assert (rel
->howto
!= NULL
);
3913 else if (rel
->howto
->type
== R_SH_IND12W
)
3914 rel
->addend
+= fixp
->fx_offset
- 4;
3921 inline static char *
3922 sh_end_of_match (char *cont
, const char *what
)
3924 int len
= strlen (what
);
3926 if (strncasecmp (cont
, what
, strlen (what
)) == 0
3927 && ! is_part_of_name (cont
[len
]))
3934 sh_parse_name (char const *name
,
3936 enum expr_mode mode
,
3939 char *next
= input_line_pointer
;
3944 exprP
->X_op_symbol
= NULL
;
3946 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
3949 GOT_symbol
= symbol_find_or_make (name
);
3951 exprP
->X_add_symbol
= GOT_symbol
;
3953 /* If we have an absolute symbol or a reg, then we know its
3955 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
3956 if (mode
!= expr_defer
&& segment
== absolute_section
)
3958 exprP
->X_op
= O_constant
;
3959 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
3960 exprP
->X_add_symbol
= NULL
;
3962 else if (mode
!= expr_defer
&& segment
== reg_section
)
3964 exprP
->X_op
= O_register
;
3965 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
3966 exprP
->X_add_symbol
= NULL
;
3970 exprP
->X_op
= O_symbol
;
3971 exprP
->X_add_number
= 0;
3977 exprP
->X_add_symbol
= symbol_find_or_make (name
);
3979 if (*nextcharP
!= '@')
3981 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFF")))
3982 reloc_type
= BFD_RELOC_32_GOTOFF
;
3983 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTPLT")))
3984 reloc_type
= BFD_RELOC_SH_GOTPLT32
;
3985 else if ((next_end
= sh_end_of_match (next
+ 1, "GOT")))
3986 reloc_type
= BFD_RELOC_32_GOT_PCREL
;
3987 else if ((next_end
= sh_end_of_match (next
+ 1, "PLT")))
3988 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
3989 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSGD")))
3990 reloc_type
= BFD_RELOC_SH_TLS_GD_32
;
3991 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSLDM")))
3992 reloc_type
= BFD_RELOC_SH_TLS_LD_32
;
3993 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTTPOFF")))
3994 reloc_type
= BFD_RELOC_SH_TLS_IE_32
;
3995 else if ((next_end
= sh_end_of_match (next
+ 1, "TPOFF")))
3996 reloc_type
= BFD_RELOC_SH_TLS_LE_32
;
3997 else if ((next_end
= sh_end_of_match (next
+ 1, "DTPOFF")))
3998 reloc_type
= BFD_RELOC_SH_TLS_LDO_32
;
3999 else if ((next_end
= sh_end_of_match (next
+ 1, "PCREL")))
4000 reloc_type
= BFD_RELOC_32_PCREL
;
4001 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTFUNCDESC")))
4002 reloc_type
= BFD_RELOC_SH_GOTFUNCDESC
;
4003 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFFFUNCDESC")))
4004 reloc_type
= BFD_RELOC_SH_GOTOFFFUNCDESC
;
4005 else if ((next_end
= sh_end_of_match (next
+ 1, "FUNCDESC")))
4006 reloc_type
= BFD_RELOC_SH_FUNCDESC
;
4010 *input_line_pointer
= *nextcharP
;
4011 input_line_pointer
= next_end
;
4012 *nextcharP
= *input_line_pointer
;
4013 *input_line_pointer
= '\0';
4015 exprP
->X_op
= O_PIC_reloc
;
4016 exprP
->X_add_number
= 0;
4017 exprP
->X_md
= reloc_type
;
4023 sh_cfi_frame_initial_instructions (void)
4025 cfi_add_CFA_def_cfa (15, 0);
4029 sh_regname_to_dw2regnum (char *regname
)
4031 unsigned int regnum
= -1;
4035 static struct { const char *name
; int dw2regnum
; } regnames
[] =
4037 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 },
4038 { "macl", 21 }, { "fpul", 23 }
4041 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
4042 if (strcmp (regnames
[i
].name
, regname
) == 0)
4043 return regnames
[i
].dw2regnum
;
4045 if (regname
[0] == 'r')
4048 regnum
= strtoul (p
, &q
, 10);
4049 if (p
== q
|| *q
|| regnum
>= 16)
4052 else if (regname
[0] == 'f' && regname
[1] == 'r')
4055 regnum
= strtoul (p
, &q
, 10);
4056 if (p
== q
|| *q
|| regnum
>= 16)
4060 else if (regname
[0] == 'x' && regname
[1] == 'd')
4063 regnum
= strtoul (p
, &q
, 10);
4064 if (p
== q
|| *q
|| regnum
>= 8)
4070 #endif /* OBJ_ELF */