1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright (C) 1993-2017 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19 Boston, MA 02110-1301, USA. */
21 /* Written By Steve Chamberlain <sac@cygnus.com> */
26 #include "opcodes/sh-opc.h"
27 #include "safe-ctype.h"
28 #include "struc-symbol.h"
34 #include "dwarf2dbg.h"
35 #include "dw2gencfi.h"
41 expressionS immediate
;
45 const char comment_chars
[] = "!";
46 const char line_separator_chars
[] = ";";
47 const char line_comment_chars
[] = "!#";
49 static void s_uses (int);
50 static void s_uacons (int);
53 static void sh_elf_cons (int);
55 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
59 big (int ignore ATTRIBUTE_UNUSED
)
61 if (! target_big_endian
)
62 as_bad (_("directive .big encountered when option -big required"));
64 /* Stop further messages. */
65 target_big_endian
= 1;
69 little (int ignore ATTRIBUTE_UNUSED
)
71 if (target_big_endian
)
72 as_bad (_("directive .little encountered when option -little required"));
74 /* Stop further messages. */
75 target_big_endian
= 0;
78 /* This table describes all the machine specific pseudo-ops the assembler
79 has to support. The fields are:
80 pseudo-op name without dot
81 function to call to execute this pseudo-op
82 Integer arg to pass to the function. */
84 const pseudo_typeS md_pseudo_table
[] =
87 {"long", sh_elf_cons
, 4},
88 {"int", sh_elf_cons
, 4},
89 {"word", sh_elf_cons
, 2},
90 {"short", sh_elf_cons
, 2},
96 {"form", listing_psize
, 0},
97 {"little", little
, 0},
98 {"heading", listing_title
, 0},
99 {"import", s_ignore
, 0},
100 {"page", listing_eject
, 0},
101 {"program", s_ignore
, 0},
103 {"uaword", s_uacons
, 2},
104 {"ualong", s_uacons
, 4},
105 {"uaquad", s_uacons
, 8},
106 {"2byte", s_uacons
, 2},
107 {"4byte", s_uacons
, 4},
108 {"8byte", s_uacons
, 8},
110 {"mode", s_sh64_mode
, 0 },
112 /* Have the old name too. */
113 {"isa", s_sh64_mode
, 0 },
115 /* Assert that the right ABI is used. */
116 {"abi", s_sh64_abi
, 0 },
118 { "vtable_inherit", sh64_vtable_inherit
, 0 },
119 { "vtable_entry", sh64_vtable_entry
, 0 },
120 #endif /* HAVE_SH64 */
124 int sh_relax
; /* set if -relax seen */
126 /* Whether -small was seen. */
130 /* Flag to generate relocations against symbol values for local symbols. */
132 static int dont_adjust_reloc_32
;
134 /* Flag to indicate that '$' is allowed as a register prefix. */
136 static int allow_dollar_register_prefix
;
138 /* Preset architecture set, if given; zero otherwise. */
140 static unsigned int preset_target_arch
;
142 /* The bit mask of architectures that could
143 accommodate the insns seen so far. */
144 static unsigned int valid_arch
;
147 /* Whether --fdpic was given. */
151 const char EXP_CHARS
[] = "eE";
153 /* Chars that mean this number is a floating point constant. */
156 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
158 #define C(a,b) ENCODE_RELAX(a,b)
160 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
161 #define GET_WHAT(x) ((x>>4))
163 /* These are the three types of relaxable instruction. */
164 /* These are the types of relaxable instructions; except for END which is
167 #define COND_JUMP_DELAY 2
168 #define UNCOND_JUMP 3
172 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
173 #define SH64PCREL16_32 4
174 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
175 #define SH64PCREL16_64 5
177 /* Variants of the above for adjusting the insn to PTA or PTB according to
179 #define SH64PCREL16PT_32 6
180 #define SH64PCREL16PT_64 7
182 /* A MOVI expansion, expanding to at most 32 or 64 bits. */
183 #define MOVI_IMM_32 8
184 #define MOVI_IMM_32_PCREL 9
185 #define MOVI_IMM_64 10
186 #define MOVI_IMM_64_PCREL 11
189 #else /* HAVE_SH64 */
193 #endif /* HAVE_SH64 */
199 #define UNDEF_WORD_DISP 4
205 #define UNDEF_SH64PCREL 0
206 #define SH64PCREL16 1
207 #define SH64PCREL32 2
208 #define SH64PCREL48 3
209 #define SH64PCREL64 4
210 #define SH64PCRELPLT 5
218 #define MOVI_GOTOFF 6
220 #endif /* HAVE_SH64 */
222 /* Branch displacements are from the address of the branch plus
223 four, thus all minimum and maximum values have 4 added to them. */
226 #define COND8_LENGTH 2
228 /* There is one extra instruction before the branch, so we must add
229 two more bytes to account for it. */
230 #define COND12_F 4100
231 #define COND12_M -4090
232 #define COND12_LENGTH 6
234 #define COND12_DELAY_LENGTH 4
236 /* ??? The minimum and maximum values are wrong, but this does not matter
237 since this relocation type is not supported yet. */
238 #define COND32_F (1<<30)
239 #define COND32_M -(1<<30)
240 #define COND32_LENGTH 14
242 #define UNCOND12_F 4098
243 #define UNCOND12_M -4092
244 #define UNCOND12_LENGTH 2
246 /* ??? The minimum and maximum values are wrong, but this does not matter
247 since this relocation type is not supported yet. */
248 #define UNCOND32_F (1<<30)
249 #define UNCOND32_M -(1<<30)
250 #define UNCOND32_LENGTH 14
253 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
254 TRd" as is the current insn, so no extra length. Note that the "reach"
255 is calculated from the address *after* that insn, but the offset in the
256 insn is calculated from the beginning of the insn. We also need to
257 take into account the implicit 1 coded as the "A" in PTA when counting
258 forward. If PTB reaches an odd address, we trap that as an error
259 elsewhere, so we don't have to have different relaxation entries. We
260 don't add a one to the negative range, since PTB would then have the
261 farthest backward-reaching value skipped, not generated at relaxation. */
262 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
263 #define SH64PCREL16_M (-32768 * 4 - 4)
264 #define SH64PCREL16_LENGTH 0
266 /* The next step is to change that PT insn into
267 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
268 SHORI (label - datalabel Ln) & 65535, R25
271 which means two extra insns, 8 extra bytes. This is the limit for the
274 The expressions look a bit bad since we have to adjust this to avoid overflow on a
276 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
277 #define SH64PCREL32_LENGTH (2 * 4)
279 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
281 #if BFD_HOST_64BIT_LONG
282 /* The "reach" type is long, so we can only do this for a 64-bit-long
284 #define SH64PCREL32_M ((-((long) 1 << 30)) * 2 - 4)
285 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
286 #define SH64PCREL48_M ((-((long) 1 << 47)) - 4)
287 #define SH64PCREL48_LENGTH (3 * 4)
289 /* If the host does not have 64-bit longs, just make this state identical
290 in reach to the 32-bit state. Note that we have a slightly incorrect
291 reach, but the correct one above will overflow a 32-bit number. */
292 #define SH64PCREL32_M ((-((long) 1 << 30)) * 2)
293 #define SH64PCREL48_F SH64PCREL32_F
294 #define SH64PCREL48_M SH64PCREL32_M
295 #define SH64PCREL48_LENGTH (3 * 4)
296 #endif /* BFD_HOST_64BIT_LONG */
298 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
300 #define SH64PCREL64_LENGTH (4 * 4)
302 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
303 SH64PCREL expansions. The PCREL one is similar, but the other has no
304 pc-relative reach; it must be fully expanded in
305 shmedia_md_estimate_size_before_relax. */
306 #define MOVI_16_LENGTH 0
307 #define MOVI_16_F (32767 - 4)
308 #define MOVI_16_M (-32768 - 4)
309 #define MOVI_32_LENGTH 4
310 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
311 #define MOVI_48_LENGTH 8
313 #if BFD_HOST_64BIT_LONG
314 /* The "reach" type is long, so we can only do this for a 64-bit-long
316 #define MOVI_32_M ((-((long) 1 << 30)) * 2 - 4)
317 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
318 #define MOVI_48_M ((-((long) 1 << 47)) - 4)
320 /* If the host does not have 64-bit longs, just make this state identical
321 in reach to the 32-bit state. Note that we have a slightly incorrect
322 reach, but the correct one above will overflow a 32-bit number. */
323 #define MOVI_32_M ((-((long) 1 << 30)) * 2)
324 #define MOVI_48_F MOVI_32_F
325 #define MOVI_48_M MOVI_32_M
326 #endif /* BFD_HOST_64BIT_LONG */
328 #define MOVI_64_LENGTH 12
329 #endif /* HAVE_SH64 */
331 #define EMPTY { 0, 0, 0, 0 }
333 const relax_typeS md_relax_table
[C (END
, 0)] = {
334 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
335 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
338 /* C (COND_JUMP, COND8) */
339 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
340 /* C (COND_JUMP, COND12) */
341 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
342 /* C (COND_JUMP, COND32) */
343 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
344 /* C (COND_JUMP, UNDEF_WORD_DISP) */
345 { 0, 0, COND32_LENGTH
, 0, },
347 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
350 /* C (COND_JUMP_DELAY, COND8) */
351 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
352 /* C (COND_JUMP_DELAY, COND12) */
353 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
354 /* C (COND_JUMP_DELAY, COND32) */
355 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
356 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
357 { 0, 0, COND32_LENGTH
, 0, },
359 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
362 /* C (UNCOND_JUMP, UNCOND12) */
363 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
364 /* C (UNCOND_JUMP, UNCOND32) */
365 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
367 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
368 { 0, 0, UNCOND32_LENGTH
, 0, },
370 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
373 /* C (SH64PCREL16_32, SH64PCREL16) */
375 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_32
, SH64PCREL32
) },
376 /* C (SH64PCREL16_32, SH64PCREL32) */
377 { 0, 0, SH64PCREL32_LENGTH
, 0 },
379 /* C (SH64PCREL16_32, SH64PCRELPLT) */
380 { 0, 0, SH64PCREL32_LENGTH
, 0 },
382 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
384 /* C (SH64PCREL16_64, SH64PCREL16) */
386 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_64
, SH64PCREL32
) },
387 /* C (SH64PCREL16_64, SH64PCREL32) */
388 { SH64PCREL32_F
, SH64PCREL32_M
, SH64PCREL32_LENGTH
, C (SH64PCREL16_64
, SH64PCREL48
) },
389 /* C (SH64PCREL16_64, SH64PCREL48) */
390 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16_64
, SH64PCREL64
) },
391 /* C (SH64PCREL16_64, SH64PCREL64) */
392 { 0, 0, SH64PCREL64_LENGTH
, 0 },
393 /* C (SH64PCREL16_64, SH64PCRELPLT) */
394 { 0, 0, SH64PCREL64_LENGTH
, 0 },
396 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
398 /* C (SH64PCREL16PT_32, SH64PCREL16) */
400 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_32
, SH64PCREL32
) },
401 /* C (SH64PCREL16PT_32, SH64PCREL32) */
402 { 0, 0, SH64PCREL32_LENGTH
, 0 },
404 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
405 { 0, 0, SH64PCREL32_LENGTH
, 0 },
407 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
409 /* C (SH64PCREL16PT_64, SH64PCREL16) */
411 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL32
) },
412 /* C (SH64PCREL16PT_64, SH64PCREL32) */
416 C (SH64PCREL16PT_64
, SH64PCREL48
) },
417 /* C (SH64PCREL16PT_64, SH64PCREL48) */
418 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL64
) },
419 /* C (SH64PCREL16PT_64, SH64PCREL64) */
420 { 0, 0, SH64PCREL64_LENGTH
, 0 },
421 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
422 { 0, 0, SH64PCREL64_LENGTH
, 0},
424 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
426 /* C (MOVI_IMM_32, UNDEF_MOVI) */
427 { 0, 0, MOVI_32_LENGTH
, 0 },
428 /* C (MOVI_IMM_32, MOVI_16) */
429 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32
, MOVI_32
) },
430 /* C (MOVI_IMM_32, MOVI_32) */
431 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, 0 },
433 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
434 { 0, 0, MOVI_32_LENGTH
, 0 },
435 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
437 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
439 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32_PCREL
, MOVI_32
) },
440 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
441 { 0, 0, MOVI_32_LENGTH
, 0 },
443 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
444 { 0, 0, MOVI_32_LENGTH
, 0 },
446 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
447 { 0, 0, MOVI_32_LENGTH
, 0 },
448 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
450 /* C (MOVI_IMM_64, UNDEF_MOVI) */
451 { 0, 0, MOVI_64_LENGTH
, 0 },
452 /* C (MOVI_IMM_64, MOVI_16) */
453 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64
, MOVI_32
) },
454 /* C (MOVI_IMM_64, MOVI_32) */
455 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64
, MOVI_48
) },
456 /* C (MOVI_IMM_64, MOVI_48) */
457 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64
, MOVI_64
) },
458 /* C (MOVI_IMM_64, MOVI_64) */
459 { 0, 0, MOVI_64_LENGTH
, 0 },
461 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
462 { 0, 0, MOVI_64_LENGTH
, 0 },
463 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
465 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
467 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_32
) },
468 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
469 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_48
) },
470 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
471 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_64
) },
472 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
473 { 0, 0, MOVI_64_LENGTH
, 0 },
474 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
475 { 0, 0, MOVI_64_LENGTH
, 0 },
477 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
478 { 0, 0, MOVI_64_LENGTH
, 0 },
479 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
481 #endif /* HAVE_SH64 */
487 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
491 /* Determine whether the symbol needs any kind of PIC relocation. */
494 sh_PIC_related_p (symbolS
*sym
)
501 if (sym
== GOT_symbol
)
505 if (sh_PIC_related_p (*symbol_get_tc (sym
)))
509 exp
= symbol_get_value_expression (sym
);
511 return (exp
->X_op
== O_PIC_reloc
512 || sh_PIC_related_p (exp
->X_add_symbol
)
513 || sh_PIC_related_p (exp
->X_op_symbol
));
516 /* Determine the relocation type to be used to represent the
517 expression, that may be rearranged. */
520 sh_check_fixup (expressionS
*main_exp
, bfd_reloc_code_real_type
*r_type_p
)
522 expressionS
*exp
= main_exp
;
524 /* This is here for backward-compatibility only. GCC used to generated:
526 f@PLT + . - (.LPCS# + 2)
528 but we'd rather be able to handle this as a PIC-related reference
529 plus/minus a symbol. However, gas' parser gives us:
531 O_subtract (O_add (f@PLT, .), .LPCS#+2)
533 so we attempt to transform this into:
535 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
537 which we can handle simply below. */
538 if (exp
->X_op
== O_subtract
)
540 if (sh_PIC_related_p (exp
->X_op_symbol
))
543 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
545 if (exp
&& sh_PIC_related_p (exp
->X_op_symbol
))
548 if (exp
&& exp
->X_op
== O_add
549 && sh_PIC_related_p (exp
->X_add_symbol
))
551 symbolS
*sym
= exp
->X_add_symbol
;
553 exp
->X_op
= O_subtract
;
554 exp
->X_add_symbol
= main_exp
->X_op_symbol
;
556 main_exp
->X_op_symbol
= main_exp
->X_add_symbol
;
557 main_exp
->X_add_symbol
= sym
;
559 main_exp
->X_add_number
+= exp
->X_add_number
;
560 exp
->X_add_number
= 0;
565 else if (exp
->X_op
== O_add
&& sh_PIC_related_p (exp
->X_op_symbol
))
568 if (exp
->X_op
== O_symbol
|| exp
->X_op
== O_add
|| exp
->X_op
== O_subtract
)
571 if (exp
->X_add_symbol
572 && (exp
->X_add_symbol
== GOT_symbol
574 && *symbol_get_tc (exp
->X_add_symbol
) == GOT_symbol
)))
578 case BFD_RELOC_SH_IMM_LOW16
:
579 *r_type_p
= BFD_RELOC_SH_GOTPC_LOW16
;
582 case BFD_RELOC_SH_IMM_MEDLOW16
:
583 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDLOW16
;
586 case BFD_RELOC_SH_IMM_MEDHI16
:
587 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDHI16
;
590 case BFD_RELOC_SH_IMM_HI16
:
591 *r_type_p
= BFD_RELOC_SH_GOTPC_HI16
;
595 case BFD_RELOC_UNUSED
:
596 *r_type_p
= BFD_RELOC_SH_GOTPC
;
605 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
607 *r_type_p
= BFD_RELOC_SH_GOTPC
;
611 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
616 if (exp
->X_op
== O_PIC_reloc
)
621 case BFD_RELOC_UNUSED
:
622 *r_type_p
= exp
->X_md
;
625 case BFD_RELOC_SH_DISP20
:
628 case BFD_RELOC_32_GOT_PCREL
:
629 *r_type_p
= BFD_RELOC_SH_GOT20
;
632 case BFD_RELOC_32_GOTOFF
:
633 *r_type_p
= BFD_RELOC_SH_GOTOFF20
;
636 case BFD_RELOC_SH_GOTFUNCDESC
:
637 *r_type_p
= BFD_RELOC_SH_GOTFUNCDESC20
;
640 case BFD_RELOC_SH_GOTOFFFUNCDESC
:
641 *r_type_p
= BFD_RELOC_SH_GOTOFFFUNCDESC20
;
650 case BFD_RELOC_SH_IMM_LOW16
:
653 case BFD_RELOC_32_GOTOFF
:
654 *r_type_p
= BFD_RELOC_SH_GOTOFF_LOW16
;
657 case BFD_RELOC_SH_GOTPLT32
:
658 *r_type_p
= BFD_RELOC_SH_GOTPLT_LOW16
;
661 case BFD_RELOC_32_GOT_PCREL
:
662 *r_type_p
= BFD_RELOC_SH_GOT_LOW16
;
665 case BFD_RELOC_32_PLT_PCREL
:
666 *r_type_p
= BFD_RELOC_SH_PLT_LOW16
;
674 case BFD_RELOC_SH_IMM_MEDLOW16
:
677 case BFD_RELOC_32_GOTOFF
:
678 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDLOW16
;
681 case BFD_RELOC_SH_GOTPLT32
:
682 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDLOW16
;
685 case BFD_RELOC_32_GOT_PCREL
:
686 *r_type_p
= BFD_RELOC_SH_GOT_MEDLOW16
;
689 case BFD_RELOC_32_PLT_PCREL
:
690 *r_type_p
= BFD_RELOC_SH_PLT_MEDLOW16
;
698 case BFD_RELOC_SH_IMM_MEDHI16
:
701 case BFD_RELOC_32_GOTOFF
:
702 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDHI16
;
705 case BFD_RELOC_SH_GOTPLT32
:
706 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDHI16
;
709 case BFD_RELOC_32_GOT_PCREL
:
710 *r_type_p
= BFD_RELOC_SH_GOT_MEDHI16
;
713 case BFD_RELOC_32_PLT_PCREL
:
714 *r_type_p
= BFD_RELOC_SH_PLT_MEDHI16
;
722 case BFD_RELOC_SH_IMM_HI16
:
725 case BFD_RELOC_32_GOTOFF
:
726 *r_type_p
= BFD_RELOC_SH_GOTOFF_HI16
;
729 case BFD_RELOC_SH_GOTPLT32
:
730 *r_type_p
= BFD_RELOC_SH_GOTPLT_HI16
;
733 case BFD_RELOC_32_GOT_PCREL
:
734 *r_type_p
= BFD_RELOC_SH_GOT_HI16
;
737 case BFD_RELOC_32_PLT_PCREL
:
738 *r_type_p
= BFD_RELOC_SH_PLT_HI16
;
751 exp
->X_op
= O_symbol
;
754 main_exp
->X_add_symbol
= exp
->X_add_symbol
;
755 main_exp
->X_add_number
+= exp
->X_add_number
;
759 return (sh_PIC_related_p (exp
->X_add_symbol
)
760 || sh_PIC_related_p (exp
->X_op_symbol
));
765 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
768 sh_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
,
769 bfd_reloc_code_real_type r_type
)
771 r_type
= BFD_RELOC_UNUSED
;
773 if (sh_check_fixup (exp
, &r_type
))
774 as_bad (_("Invalid PIC expression."));
776 if (r_type
== BFD_RELOC_UNUSED
)
780 r_type
= BFD_RELOC_8
;
784 r_type
= BFD_RELOC_16
;
788 r_type
= BFD_RELOC_32
;
792 r_type
= BFD_RELOC_64
;
801 as_bad (_("unsupported BFD relocation size %u"), size
);
802 r_type
= BFD_RELOC_UNUSED
;
805 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
808 /* The regular cons() function, that reads constants, doesn't support
809 suffixes such as @GOT, @GOTOFF and @PLT, that generate
810 machine-specific relocation types. So we must define it here. */
811 /* Clobbers input_line_pointer, checks end-of-line. */
812 /* NBYTES 1=.byte, 2=.word, 4=.long */
814 sh_elf_cons (int nbytes
)
820 /* Update existing range to include a previous insn, if there was one. */
821 sh64_update_contents_mark (TRUE
);
823 /* We need to make sure the contents type is set to data. */
826 #endif /* HAVE_SH64 */
828 if (is_it_end_of_statement ())
830 demand_empty_rest_of_line ();
835 md_cons_align (nbytes
);
841 emit_expr (&exp
, (unsigned int) nbytes
);
843 while (*input_line_pointer
++ == ',');
845 input_line_pointer
--; /* Put terminator back into stream. */
846 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
848 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
851 demand_empty_rest_of_line ();
854 /* The regular frag_offset_fixed_p doesn't work for rs_align_test
858 align_test_frag_offset_fixed_p (const fragS
*frag1
, const fragS
*frag2
,
864 /* Start with offset initialised to difference between the two frags.
865 Prior to assigning frag addresses this will be zero. */
866 off
= frag1
->fr_address
- frag2
->fr_address
;
873 /* Maybe frag2 is after frag1. */
875 while (frag
->fr_type
== rs_fill
876 || frag
->fr_type
== rs_align_test
)
878 if (frag
->fr_type
== rs_fill
)
879 off
+= frag
->fr_fix
+ frag
->fr_offset
* frag
->fr_var
;
882 frag
= frag
->fr_next
;
892 /* Maybe frag1 is after frag2. */
893 off
= frag1
->fr_address
- frag2
->fr_address
;
895 while (frag
->fr_type
== rs_fill
896 || frag
->fr_type
== rs_align_test
)
898 if (frag
->fr_type
== rs_fill
)
899 off
-= frag
->fr_fix
+ frag
->fr_offset
* frag
->fr_var
;
902 frag
= frag
->fr_next
;
915 /* Optimize a difference of symbols which have rs_align_test frag if
919 sh_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
924 && l
->X_op
== O_symbol
925 && r
->X_op
== O_symbol
926 && S_GET_SEGMENT (l
->X_add_symbol
) == S_GET_SEGMENT (r
->X_add_symbol
)
927 && (SEG_NORMAL (S_GET_SEGMENT (l
->X_add_symbol
))
928 || r
->X_add_symbol
== l
->X_add_symbol
)
929 && align_test_frag_offset_fixed_p (symbol_get_frag (l
->X_add_symbol
),
930 symbol_get_frag (r
->X_add_symbol
),
933 offsetT symval_diff
= S_GET_VALUE (l
->X_add_symbol
)
934 - S_GET_VALUE (r
->X_add_symbol
);
935 subtract_from_result (l
, r
->X_add_number
, r
->X_extrabit
);
936 subtract_from_result (l
, frag_off
/ OCTETS_PER_BYTE
, 0);
937 add_to_result (l
, symval_diff
, symval_diff
< 0);
938 l
->X_op
= O_constant
;
946 /* This function is called once, at assembler startup time. This should
947 set up all the tables, etc that the MD part of the assembler needs. */
952 const sh_opcode_info
*opcode
;
953 const char *prev_name
= "";
954 unsigned int target_arch
;
957 = preset_target_arch
? preset_target_arch
: arch_sh_up
& ~arch_sh_has_dsp
;
958 valid_arch
= target_arch
;
964 opcode_hash_control
= hash_new ();
966 /* Insert unique names into hash table. */
967 for (opcode
= sh_table
; opcode
->name
; opcode
++)
969 if (strcmp (prev_name
, opcode
->name
) != 0)
971 if (!SH_MERGE_ARCH_SET_VALID (opcode
->arch
, target_arch
))
973 prev_name
= opcode
->name
;
974 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
981 static int reg_x
, reg_y
;
985 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
987 /* Try to parse a reg name. Return the number of chars consumed. */
990 parse_reg_without_prefix (char *src
, sh_arg_type
*mode
, int *reg
)
992 char l0
= TOLOWER (src
[0]);
993 char l1
= l0
? TOLOWER (src
[1]) : 0;
995 /* We use ! IDENT_CHAR for the next character after the register name, to
996 make sure that we won't accidentally recognize a symbol name such as
997 'sram' or sr_ram as being a reference to the register 'sr'. */
1003 if (src
[2] >= '0' && src
[2] <= '5'
1004 && ! IDENT_CHAR ((unsigned char) src
[3]))
1007 *reg
= 10 + src
[2] - '0';
1011 if (l1
>= '0' && l1
<= '9'
1012 && ! IDENT_CHAR ((unsigned char) src
[2]))
1018 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
1019 && ! IDENT_CHAR ((unsigned char) src
[7]))
1026 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
1031 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
1042 if (! IDENT_CHAR ((unsigned char) src
[2]))
1048 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
1057 if (! IDENT_CHAR ((unsigned char) src
[2]))
1063 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
1071 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
1072 && ! IDENT_CHAR ((unsigned char) src
[3]))
1075 *reg
= 4 + (l1
- '0');
1078 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
1079 && ! IDENT_CHAR ((unsigned char) src
[3]))
1082 *reg
= 6 + (l1
- '0');
1085 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
1086 && ! IDENT_CHAR ((unsigned char) src
[3]))
1091 *reg
= n
| ((~n
& 2) << 1);
1096 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[2]))
1118 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
1119 && ! IDENT_CHAR ((unsigned char) src
[2]))
1122 *reg
= A_X0_NUM
+ l1
- '0';
1126 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
1127 && ! IDENT_CHAR ((unsigned char) src
[2]))
1130 *reg
= A_Y0_NUM
+ l1
- '0';
1134 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
1135 && ! IDENT_CHAR ((unsigned char) src
[2]))
1138 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
1144 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
1150 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
1151 && ! IDENT_CHAR ((unsigned char) src
[3]))
1157 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
1158 && ! IDENT_CHAR ((unsigned char) src
[3]))
1164 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
1165 && ! IDENT_CHAR ((unsigned char) src
[3]))
1171 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1172 && ! IDENT_CHAR ((unsigned char) src
[3]))
1178 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1184 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
1191 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1196 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
1198 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1199 and use an uninitialized immediate. */
1203 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1204 && ! IDENT_CHAR ((unsigned char) src
[3]))
1209 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1210 && ! IDENT_CHAR ((unsigned char) src
[3]))
1216 if (l0
== 't' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1217 && ! IDENT_CHAR ((unsigned char) src
[3]))
1222 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
1223 && ! IDENT_CHAR ((unsigned char) src
[4]))
1225 if (TOLOWER (src
[3]) == 'l')
1230 if (TOLOWER (src
[3]) == 'h')
1236 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
1237 && ! IDENT_CHAR ((unsigned char) src
[3]))
1242 if (l0
== 'f' && l1
== 'r')
1246 if (src
[3] >= '0' && src
[3] <= '5'
1247 && ! IDENT_CHAR ((unsigned char) src
[4]))
1250 *reg
= 10 + src
[3] - '0';
1254 if (src
[2] >= '0' && src
[2] <= '9'
1255 && ! IDENT_CHAR ((unsigned char) src
[3]))
1258 *reg
= (src
[2] - '0');
1262 if (l0
== 'd' && l1
== 'r')
1266 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1267 && ! IDENT_CHAR ((unsigned char) src
[4]))
1270 *reg
= 10 + src
[3] - '0';
1274 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1275 && ! IDENT_CHAR ((unsigned char) src
[3]))
1278 *reg
= (src
[2] - '0');
1282 if (l0
== 'x' && l1
== 'd')
1286 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1287 && ! IDENT_CHAR ((unsigned char) src
[4]))
1290 *reg
= 11 + src
[3] - '0';
1294 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1295 && ! IDENT_CHAR ((unsigned char) src
[3]))
1298 *reg
= (src
[2] - '0') + 1;
1302 if (l0
== 'f' && l1
== 'v')
1304 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
1310 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
1311 && ! IDENT_CHAR ((unsigned char) src
[3]))
1314 *reg
= (src
[2] - '0');
1318 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
1319 && TOLOWER (src
[3]) == 'l'
1320 && ! IDENT_CHAR ((unsigned char) src
[4]))
1326 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
1327 && TOLOWER (src
[3]) == 'c'
1328 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
1334 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
1335 && TOLOWER (src
[3]) == 'r'
1336 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
1345 /* Like parse_reg_without_prefix, but this version supports
1346 $-prefixed register names if enabled by the user. */
1349 parse_reg (char *src
, sh_arg_type
*mode
, int *reg
)
1351 unsigned int prefix
;
1352 unsigned int consumed
;
1356 if (allow_dollar_register_prefix
)
1367 consumed
= parse_reg_without_prefix (src
, mode
, reg
);
1372 return consumed
+ prefix
;
1376 parse_exp (char *s
, sh_operand_info
*op
)
1381 save
= input_line_pointer
;
1382 input_line_pointer
= s
;
1383 expression (&op
->immediate
);
1384 if (op
->immediate
.X_op
== O_absent
)
1385 as_bad (_("missing operand"));
1386 new_pointer
= input_line_pointer
;
1387 input_line_pointer
= save
;
1391 /* The many forms of operand:
1394 @Rn Register indirect
1407 pr, gbr, vbr, macl, mach
1411 parse_at (char *src
, sh_operand_info
*op
)
1418 src
= parse_at (src
, op
);
1419 if (op
->type
== A_DISP_TBR
)
1420 op
->type
= A_DISP2_TBR
;
1422 as_bad (_("illegal double indirection"));
1424 else if (src
[0] == '-')
1426 /* Must be predecrement. */
1429 len
= parse_reg (src
, &mode
, &(op
->reg
));
1430 if (mode
!= A_REG_N
)
1431 as_bad (_("illegal register after @-"));
1436 else if (src
[0] == '(')
1438 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1441 len
= parse_reg (src
, &mode
, &(op
->reg
));
1442 if (len
&& mode
== A_REG_N
)
1447 as_bad (_("must be @(r0,...)"));
1452 /* Now can be rn or gbr. */
1453 len
= parse_reg (src
, &mode
, &(op
->reg
));
1463 op
->type
= A_R0_GBR
;
1465 else if (mode
== A_REG_N
)
1467 op
->type
= A_IND_R0_REG_N
;
1471 as_bad (_("syntax error in @(r0,...)"));
1476 as_bad (_("syntax error in @(r0...)"));
1481 /* Must be an @(disp,.. thing). */
1482 src
= parse_exp (src
, op
);
1485 /* Now can be rn, gbr or pc. */
1486 len
= parse_reg (src
, &mode
, &op
->reg
);
1489 if (mode
== A_REG_N
)
1491 op
->type
= A_DISP_REG_N
;
1493 else if (mode
== A_GBR
)
1495 op
->type
= A_DISP_GBR
;
1497 else if (mode
== A_TBR
)
1499 op
->type
= A_DISP_TBR
;
1501 else if (mode
== A_PC
)
1503 /* We want @(expr, pc) to uniformly address . + expr,
1504 no matter if expr is a constant, or a more complex
1505 expression, e.g. sym-. or sym1-sym2.
1506 However, we also used to accept @(sym,pc)
1507 as addressing sym, i.e. meaning the same as plain sym.
1508 Some existing code does use the @(sym,pc) syntax, so
1509 we give it the old semantics for now, but warn about
1510 its use, so that users have some time to fix their code.
1512 Note that due to this backward compatibility hack,
1513 we'll get unexpected results when @(offset, pc) is used,
1514 and offset is a symbol that is set later to an an address
1515 difference, or an external symbol that is set to an
1516 address difference in another source file, so we want to
1517 eventually remove it. */
1518 if (op
->immediate
.X_op
== O_symbol
)
1520 op
->type
= A_DISP_PC
;
1521 as_warn (_("Deprecated syntax."));
1525 op
->type
= A_DISP_PC_ABS
;
1526 /* Such operands don't get corrected for PC==.+4, so
1527 make the correction here. */
1528 op
->immediate
.X_add_number
-= 4;
1533 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1538 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1543 as_bad (_("expecting )"));
1549 src
+= parse_reg (src
, &mode
, &(op
->reg
));
1550 if (mode
!= A_REG_N
)
1551 as_bad (_("illegal register after @"));
1558 l0
= TOLOWER (src
[0]);
1559 l1
= TOLOWER (src
[1]);
1561 if ((l0
== 'r' && l1
== '8')
1562 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1565 op
->type
= AX_PMOD_N
;
1567 else if ( (l0
== 'r' && l1
== '9')
1568 || (l0
== 'i' && l1
== 'y'))
1571 op
->type
= AY_PMOD_N
;
1583 get_operand (char **ptr
, sh_operand_info
*op
)
1586 sh_arg_type mode
= (sh_arg_type
) -1;
1592 *ptr
= parse_exp (src
, op
);
1597 else if (src
[0] == '@')
1599 *ptr
= parse_at (src
, op
);
1602 len
= parse_reg (src
, &mode
, &(op
->reg
));
1611 /* Not a reg, the only thing left is a displacement. */
1612 *ptr
= parse_exp (src
, op
);
1613 op
->type
= A_DISP_PC
;
1619 get_operands (sh_opcode_info
*info
, char *args
, sh_operand_info
*operand
)
1624 /* The pre-processor will eliminate whitespace in front of '@'
1625 after the first argument; we may be called multiple times
1626 from assemble_ppi, so don't insist on finding whitespace here. */
1630 get_operand (&ptr
, operand
+ 0);
1637 get_operand (&ptr
, operand
+ 1);
1638 /* ??? Hack: psha/pshl have a varying operand number depending on
1639 the type of the first operand. We handle this by having the
1640 three-operand version first and reducing the number of operands
1641 parsed to two if we see that the first operand is an immediate.
1642 This works because no insn with three operands has an immediate
1643 as first operand. */
1644 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1650 get_operand (&ptr
, operand
+ 2);
1654 operand
[2].type
= 0;
1659 operand
[1].type
= 0;
1660 operand
[2].type
= 0;
1665 operand
[0].type
= 0;
1666 operand
[1].type
= 0;
1667 operand
[2].type
= 0;
1672 /* Passed a pointer to a list of opcodes which use different
1673 addressing modes, return the opcode which matches the opcodes
1676 static sh_opcode_info
*
1677 get_specific (sh_opcode_info
*opcode
, sh_operand_info
*operands
)
1679 sh_opcode_info
*this_try
= opcode
;
1680 const char *name
= opcode
->name
;
1683 while (opcode
->name
)
1685 this_try
= opcode
++;
1686 if ((this_try
->name
!= name
) && (strcmp (this_try
->name
, name
) != 0))
1688 /* We've looked so far down the table that we've run out of
1689 opcodes with the same name. */
1693 /* Look at both operands needed by the opcodes and provided by
1694 the user - since an arg test will often fail on the same arg
1695 again and again, we'll try and test the last failing arg the
1696 first on each opcode try. */
1697 for (n
= 0; this_try
->arg
[n
]; n
++)
1699 sh_operand_info
*user
= operands
+ n
;
1700 sh_arg_type arg
= this_try
->arg
[n
];
1705 if (user
->type
== A_DISP_PC_ABS
)
1716 if (user
->type
!= arg
)
1720 /* opcode needs r0 */
1721 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1725 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1729 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1737 case A_IND_R0_REG_N
:
1746 /* Opcode needs rn */
1747 if (user
->type
!= arg
)
1752 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1768 if (user
->type
!= arg
)
1773 if (user
->type
!= arg
)
1779 if (user
->type
!= A_INC_N
)
1781 if (user
->reg
!= 15)
1787 if (user
->type
!= A_DEC_N
)
1789 if (user
->reg
!= 15)
1798 case A_IND_R0_REG_M
:
1801 /* Opcode needs rn */
1802 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1808 if (user
->type
!= A_DEC_N
)
1810 if (user
->reg
< 2 || user
->reg
> 5)
1816 if (user
->type
!= A_INC_N
)
1818 if (user
->reg
< 2 || user
->reg
> 5)
1824 if (user
->type
!= A_IND_N
)
1826 if (user
->reg
< 2 || user
->reg
> 5)
1832 if (user
->type
!= AX_PMOD_N
)
1834 if (user
->reg
< 2 || user
->reg
> 5)
1840 if (user
->type
!= A_INC_N
)
1842 if (user
->reg
< 4 || user
->reg
> 5)
1848 if (user
->type
!= A_IND_N
)
1850 if (user
->reg
< 4 || user
->reg
> 5)
1856 if (user
->type
!= AX_PMOD_N
)
1858 if (user
->reg
< 4 || user
->reg
> 5)
1864 if (user
->type
!= A_INC_N
)
1866 if ((user
->reg
< 4 || user
->reg
> 5)
1867 && (user
->reg
< 0 || user
->reg
> 1))
1873 if (user
->type
!= A_IND_N
)
1875 if ((user
->reg
< 4 || user
->reg
> 5)
1876 && (user
->reg
< 0 || user
->reg
> 1))
1882 if (user
->type
!= AX_PMOD_N
)
1884 if ((user
->reg
< 4 || user
->reg
> 5)
1885 && (user
->reg
< 0 || user
->reg
> 1))
1891 if (user
->type
!= A_INC_N
)
1893 if (user
->reg
< 6 || user
->reg
> 7)
1899 if (user
->type
!= A_IND_N
)
1901 if (user
->reg
< 6 || user
->reg
> 7)
1907 if (user
->type
!= AY_PMOD_N
)
1909 if (user
->reg
< 6 || user
->reg
> 7)
1915 if (user
->type
!= A_INC_N
)
1917 if ((user
->reg
< 6 || user
->reg
> 7)
1918 && (user
->reg
< 2 || user
->reg
> 3))
1924 if (user
->type
!= A_IND_N
)
1926 if ((user
->reg
< 6 || user
->reg
> 7)
1927 && (user
->reg
< 2 || user
->reg
> 3))
1933 if (user
->type
!= AY_PMOD_N
)
1935 if ((user
->reg
< 6 || user
->reg
> 7)
1936 && (user
->reg
< 2 || user
->reg
> 3))
1942 if (user
->type
!= DSP_REG_N
)
1944 if (user
->reg
!= A_A0_NUM
1945 && user
->reg
!= A_A1_NUM
)
1951 if (user
->type
!= DSP_REG_N
)
1973 if (user
->type
!= DSP_REG_N
)
1995 if (user
->type
!= DSP_REG_N
)
2017 if (user
->type
!= DSP_REG_N
)
2039 if (user
->type
!= DSP_REG_N
)
2061 if (user
->type
!= DSP_REG_N
)
2083 if (user
->type
!= DSP_REG_N
)
2105 if (user
->type
!= DSP_REG_N
)
2127 if (user
->type
!= DSP_REG_N
)
2149 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
2153 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
2157 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
2161 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
2165 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
2175 /* Opcode needs rn */
2176 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
2181 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
2186 if (user
->type
!= XMTRX_M4
)
2192 printf (_("unhandled %d\n"), arg
);
2195 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh2a_nofpu_up
)
2196 && ( arg
== A_DISP_REG_M
2197 || arg
== A_DISP_REG_N
))
2199 /* Check a few key IMM* fields for overflow. */
2201 long val
= user
->immediate
.X_add_number
;
2203 for (opf
= 0; opf
< 4; opf
++)
2204 switch (this_try
->nibbles
[opf
])
2208 if (val
< 0 || val
> 15)
2213 if (val
< 0 || val
> 15 * 2)
2218 if (val
< 0 || val
> 15 * 4)
2226 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch
, this_try
->arch
))
2228 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, this_try
->arch
);
2238 insert (char *where
, bfd_reloc_code_real_type how
, int pcrel
,
2239 sh_operand_info
*op
)
2241 fix_new_exp (frag_now
,
2242 where
- frag_now
->fr_literal
,
2250 insert4 (char * where
, bfd_reloc_code_real_type how
, int pcrel
,
2251 sh_operand_info
* op
)
2253 fix_new_exp (frag_now
,
2254 where
- frag_now
->fr_literal
,
2261 build_relax (sh_opcode_info
*opcode
, sh_operand_info
*op
)
2263 int high_byte
= target_big_endian
? 0 : 1;
2266 if (opcode
->arg
[0] == A_BDISP8
)
2268 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
2269 p
= frag_var (rs_machine_dependent
,
2270 md_relax_table
[C (what
, COND32
)].rlx_length
,
2271 md_relax_table
[C (what
, COND8
)].rlx_length
,
2273 op
->immediate
.X_add_symbol
,
2274 op
->immediate
.X_add_number
,
2276 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
2278 else if (opcode
->arg
[0] == A_BDISP12
)
2280 p
= frag_var (rs_machine_dependent
,
2281 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
2282 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
2284 op
->immediate
.X_add_symbol
,
2285 op
->immediate
.X_add_number
,
2287 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
2292 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
2295 insert_loop_bounds (char *output
, sh_operand_info
*operand
)
2299 /* Since the low byte of the opcode will be overwritten by the reloc, we
2300 can just stash the high byte into both bytes and ignore endianness. */
2303 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2304 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2308 static int count
= 0;
2311 /* If the last loop insn is a two-byte-insn, it is in danger of being
2312 swapped with the insn after it. To prevent this, create a new
2313 symbol - complete with SH_LABEL reloc - after the last loop insn.
2314 If the last loop insn is four bytes long, the symbol will be
2315 right in the middle, but four byte insns are not swapped anyways. */
2316 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
2317 Hence a 9 digit number should be enough to count all REPEATs. */
2318 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
2319 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
2320 /* Make this a local symbol. */
2322 SF_SET_LOCAL (end_sym
);
2323 #endif /* OBJ_COFF */
2324 symbol_table_insert (end_sym
);
2325 end_sym
->sy_value
= operand
[1].immediate
;
2326 end_sym
->sy_value
.X_add_number
+= 2;
2327 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
2330 output
= frag_more (2);
2333 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2334 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2336 return frag_more (2);
2339 /* Now we know what sort of opcodes it is, let's build the bytes. */
2342 build_Mytes (sh_opcode_info
*opcode
, sh_operand_info
*operand
)
2347 unsigned int size
= 2;
2348 int low_byte
= target_big_endian
? 1 : 0;
2350 bfd_reloc_code_real_type r_type
;
2352 int unhandled_pic
= 0;
2365 for (indx
= 0; indx
< 3; indx
++)
2366 if (opcode
->arg
[indx
] == A_IMM
2367 && operand
[indx
].type
== A_IMM
2368 && (operand
[indx
].immediate
.X_op
== O_PIC_reloc
2369 || sh_PIC_related_p (operand
[indx
].immediate
.X_add_symbol
)
2370 || sh_PIC_related_p (operand
[indx
].immediate
.X_op_symbol
)))
2374 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2376 output
= frag_more (4);
2381 output
= frag_more (2);
2383 for (indx
= 0; indx
< max_index
; indx
++)
2385 sh_nibble_type i
= opcode
->nibbles
[indx
];
2402 if (reg_n
< 2 || reg_n
> 5)
2403 as_bad (_("Invalid register: 'r%d'"), reg_n
);
2404 nbuf
[indx
] = (reg_n
& 3) | 4;
2407 nbuf
[indx
] = reg_n
| (reg_m
>> 2);
2410 nbuf
[indx
] = reg_b
| 0x08;
2413 nbuf
[indx
] = reg_n
| 0x01;
2419 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3
, 0, operand
);
2425 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3U
, 0, operand
);
2428 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
);
2431 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
);
2434 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
);
2437 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
);
2440 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
+1);
2443 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
+1);
2446 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
+1);
2449 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
+1);
2454 r_type
= BFD_RELOC_SH_DISP20
;
2456 if (sh_check_fixup (&operand
->immediate
, &r_type
))
2457 as_bad (_("Invalid PIC expression."));
2460 insert4 (output
, r_type
, 0, operand
);
2463 insert4 (output
, BFD_RELOC_SH_DISP20BY8
, 0, operand
);
2466 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
2469 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
2472 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
2475 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
2478 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
2481 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
2484 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
2487 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
2490 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
2493 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
2496 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
2499 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
2502 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
,
2503 operand
->type
!= A_DISP_PC_ABS
, operand
);
2506 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
,
2507 operand
->type
!= A_DISP_PC_ABS
, operand
);
2510 output
= insert_loop_bounds (output
, operand
);
2511 nbuf
[indx
] = opcode
->nibbles
[3];
2515 printf (_("failed for %d\n"), i
);
2521 as_bad (_("misplaced PIC operand"));
2523 if (!target_big_endian
)
2525 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
2526 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
2530 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
2531 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
2533 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2535 if (!target_big_endian
)
2537 output
[3] = (nbuf
[4] << 4) | (nbuf
[5]);
2538 output
[2] = (nbuf
[6] << 4) | (nbuf
[7]);
2542 output
[2] = (nbuf
[4] << 4) | (nbuf
[5]);
2543 output
[3] = (nbuf
[6] << 4) | (nbuf
[7]);
2549 /* Find an opcode at the start of *STR_P in the hash table, and set
2550 *STR_P to the first character after the last one read. */
2552 static sh_opcode_info
*
2553 find_cooked_opcode (char **str_p
)
2556 unsigned char *op_start
;
2557 unsigned char *op_end
;
2559 unsigned int nlen
= 0;
2561 /* Drop leading whitespace. */
2565 /* Find the op code end.
2566 The pre-processor will eliminate whitespace in front of
2567 any '@' after the first argument; we may be called from
2568 assemble_ppi, so the opcode might be terminated by an '@'. */
2569 for (op_start
= op_end
= (unsigned char *) str
;
2571 && nlen
< sizeof (name
) - 1
2572 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
2575 unsigned char c
= op_start
[nlen
];
2577 /* The machine independent code will convert CMP/EQ into cmp/EQ
2578 because it thinks the '/' is the end of the symbol. Moreover,
2579 all but the first sub-insn is a parallel processing insn won't
2580 be capitalized. Instead of hacking up the machine independent
2581 code, we just deal with it here. */
2588 *str_p
= (char *) op_end
;
2591 as_bad (_("can't find opcode "));
2593 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
2596 /* Assemble a parallel processing insn. */
2597 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2600 assemble_ppi (char *op_end
, sh_opcode_info
*opcode
)
2612 sh_operand_info operand
[3];
2614 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2615 Make sure we encode a defined insn pattern. */
2620 if (opcode
->arg
[0] != A_END
)
2621 op_end
= get_operands (opcode
, op_end
, operand
);
2623 opcode
= get_specific (opcode
, operand
);
2626 /* Couldn't find an opcode which matched the operands. */
2627 char *where
= frag_more (2);
2632 as_bad (_("invalid operands for opcode"));
2636 if (opcode
->nibbles
[0] != PPI
)
2637 as_bad (_("insn can't be combined with parallel processing insn"));
2639 switch (opcode
->nibbles
[1])
2644 as_bad (_("multiple movx specifications"));
2649 as_bad (_("multiple movy specifications"));
2655 as_bad (_("multiple movx specifications"));
2656 if ((reg_n
< 4 || reg_n
> 5)
2657 && (reg_n
< 0 || reg_n
> 1))
2658 as_bad (_("invalid movx address register"));
2659 if (movy
&& movy
!= DDT_BASE
)
2660 as_bad (_("insn cannot be combined with non-nopy"));
2661 movx
= ((((reg_n
& 1) != 0) << 9)
2662 + (((reg_n
& 4) == 0) << 8)
2664 + (opcode
->nibbles
[2] << 4)
2665 + opcode
->nibbles
[3]
2671 as_bad (_("multiple movy specifications"));
2672 if ((reg_n
< 6 || reg_n
> 7)
2673 && (reg_n
< 2 || reg_n
> 3))
2674 as_bad (_("invalid movy address register"));
2675 if (movx
&& movx
!= DDT_BASE
)
2676 as_bad (_("insn cannot be combined with non-nopx"));
2677 movy
= ((((reg_n
& 1) != 0) << 8)
2678 + (((reg_n
& 4) == 0) << 9)
2680 + (opcode
->nibbles
[2] << 4)
2681 + opcode
->nibbles
[3]
2687 as_bad (_("multiple movx specifications"));
2689 as_bad (_("previous movy requires nopx"));
2690 if (reg_n
< 4 || reg_n
> 5)
2691 as_bad (_("invalid movx address register"));
2692 if (opcode
->nibbles
[2] & 8)
2694 if (reg_m
== A_A1_NUM
)
2696 else if (reg_m
!= A_A0_NUM
)
2697 as_bad (_("invalid movx dsp register"));
2702 as_bad (_("invalid movx dsp register"));
2705 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
2710 as_bad (_("multiple movy specifications"));
2712 as_bad (_("previous movx requires nopy"));
2713 if (opcode
->nibbles
[2] & 8)
2715 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2718 if (reg_m
== A_A1_NUM
)
2720 else if (reg_m
!= A_A0_NUM
)
2721 as_bad (_("invalid movy dsp register"));
2726 as_bad (_("invalid movy dsp register"));
2729 if (reg_n
< 6 || reg_n
> 7)
2730 as_bad (_("invalid movy address register"));
2731 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
2735 if (operand
[0].immediate
.X_op
!= O_constant
)
2736 as_bad (_("dsp immediate shift value not constant"));
2737 field_b
= ((opcode
->nibbles
[2] << 12)
2738 | (operand
[0].immediate
.X_add_number
& 127) << 4
2745 goto try_another_opcode
;
2750 as_bad (_("multiple parallel processing specifications"));
2751 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2752 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2753 switch (opcode
->nibbles
[4])
2761 field_b
+= opcode
->nibbles
[4] << 4;
2769 as_bad (_("multiple condition specifications"));
2770 cond
= opcode
->nibbles
[2] << 8;
2772 goto skip_cond_check
;
2776 as_bad (_("multiple parallel processing specifications"));
2777 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2778 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2780 switch (opcode
->nibbles
[4])
2788 field_b
+= opcode
->nibbles
[4] << 4;
2797 if ((field_b
& 0xef00) == 0xa100)
2799 /* pclr Dz pmuls Se,Sf,Dg */
2800 else if ((field_b
& 0xff00) == 0x8d00
2801 && (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh4al_dsp_up
)))
2803 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, arch_sh4al_dsp_up
);
2807 as_bad (_("insn cannot be combined with pmuls"));
2808 switch (field_b
& 0xf)
2811 field_b
+= 0 - A_X0_NUM
;
2814 field_b
+= 1 - A_Y0_NUM
;
2817 field_b
+= 2 - A_A0_NUM
;
2820 field_b
+= 3 - A_A1_NUM
;
2823 as_bad (_("bad combined pmuls output operand"));
2825 /* Generate warning if the destination register for padd / psub
2826 and pmuls is the same ( only for A0 or A1 ).
2827 If the last nibble is 1010 then A0 is used in both
2828 padd / psub and pmuls. If it is 1111 then A1 is used
2829 as destination register in both padd / psub and pmuls. */
2831 if ((((field_b
| reg_efg
) & 0x000F) == 0x000A)
2832 || (((field_b
| reg_efg
) & 0x000F) == 0x000F))
2833 as_warn (_("destination register is same for parallel insns"));
2835 field_b
+= 0x4000 + reg_efg
;
2842 as_bad (_("condition not followed by conditionalizable insn"));
2848 opcode
= find_cooked_opcode (&op_end
);
2852 (_("unrecognized characters at end of parallel processing insn")));
2857 move_code
= movx
| movy
;
2860 /* Parallel processing insn. */
2861 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
2863 output
= frag_more (4);
2865 if (! target_big_endian
)
2867 output
[3] = ppi_code
>> 8;
2868 output
[2] = ppi_code
;
2872 output
[2] = ppi_code
>> 8;
2873 output
[3] = ppi_code
;
2875 move_code
|= 0xf800;
2879 /* Just a double data transfer. */
2880 output
= frag_more (2);
2883 if (! target_big_endian
)
2885 output
[1] = move_code
>> 8;
2886 output
[0] = move_code
;
2890 output
[0] = move_code
>> 8;
2891 output
[1] = move_code
;
2896 /* This is the guts of the machine-dependent assembler. STR points to a
2897 machine dependent instruction. This function is supposed to emit
2898 the frags/bytes it assembles to. */
2901 md_assemble (char *str
)
2904 sh_operand_info operand
[3];
2905 sh_opcode_info
*opcode
;
2906 unsigned int size
= 0;
2907 char *initial_str
= str
;
2910 if (sh64_isa_mode
== sh64_isa_shmedia
)
2912 shmedia_md_assemble (str
);
2917 /* If we've seen pseudo-directives, make sure any emitted data or
2918 frags are marked as data. */
2921 sh64_update_contents_mark (TRUE
);
2922 sh64_set_contents_type (CRT_SH5_ISA16
);
2927 #endif /* HAVE_SH64 */
2929 opcode
= find_cooked_opcode (&str
);
2934 /* The opcode is not in the hash table.
2935 This means we definitely have an assembly failure,
2936 but the instruction may be valid in another CPU variant.
2937 In this case emit something better than 'unknown opcode'.
2938 Search the full table in sh-opc.h to check. */
2940 char *name
= initial_str
;
2941 int name_length
= 0;
2942 const sh_opcode_info
*op
;
2945 /* identify opcode in string */
2946 while (ISSPACE (*name
))
2950 while (!ISSPACE (name
[name_length
]))
2955 /* search for opcode in full list */
2956 for (op
= sh_table
; op
->name
; op
++)
2958 if (strncasecmp (op
->name
, name
, name_length
) == 0
2959 && op
->name
[name_length
] == '\0')
2968 as_bad (_("opcode not valid for this cpu variant"));
2972 as_bad (_("unknown opcode"));
2978 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2980 /* Output a CODE reloc to tell the linker that the following
2981 bytes are instructions, not data. */
2982 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2984 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
2987 if (opcode
->nibbles
[0] == PPI
)
2989 size
= assemble_ppi (op_end
, opcode
);
2993 if (opcode
->arg
[0] == A_BDISP12
2994 || opcode
->arg
[0] == A_BDISP8
)
2996 /* Since we skip get_specific here, we have to check & update
2998 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, opcode
->arch
))
2999 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, opcode
->arch
);
3001 as_bad (_("Delayed branches not available on SH1"));
3002 parse_exp (op_end
+ 1, &operand
[0]);
3003 build_relax (opcode
, &operand
[0]);
3005 /* All branches are currently 16 bit. */
3010 if (opcode
->arg
[0] == A_END
)
3012 /* Ignore trailing whitespace. If there is any, it has already
3013 been compressed to a single space. */
3019 op_end
= get_operands (opcode
, op_end
, operand
);
3021 opcode
= get_specific (opcode
, operand
);
3025 /* Couldn't find an opcode which matched the operands. */
3026 char *where
= frag_more (2);
3031 as_bad (_("invalid operands for opcode"));
3036 as_bad (_("excess operands: '%s'"), op_end
);
3038 size
= build_Mytes (opcode
, operand
);
3043 dwarf2_emit_insn (size
);
3046 /* This routine is called each time a label definition is seen. It
3047 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
3050 sh_frob_label (symbolS
*sym
)
3052 static fragS
*last_label_frag
;
3053 static int last_label_offset
;
3056 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
3060 offset
= frag_now_fix ();
3061 if (frag_now
!= last_label_frag
3062 || offset
!= last_label_offset
)
3064 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
3065 last_label_frag
= frag_now
;
3066 last_label_offset
= offset
;
3070 dwarf2_emit_label (sym
);
3073 /* This routine is called when the assembler is about to output some
3074 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
3077 sh_flush_pending_output (void)
3080 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
3082 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
3084 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
3089 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
3094 /* Various routines to kill one day. */
3097 md_atof (int type
, char *litP
, int *sizeP
)
3099 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
3102 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
3103 call instruction. It refers to a label of the instruction which
3104 loads the register which the call uses. We use it to generate a
3105 special reloc for the linker. */
3108 s_uses (int ignore ATTRIBUTE_UNUSED
)
3113 as_warn (_(".uses pseudo-op seen when not relaxing"));
3117 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
3119 as_bad (_("bad .uses format"));
3120 ignore_rest_of_line ();
3124 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
3126 demand_empty_rest_of_line ();
3131 OPTION_RELAX
= OPTION_MD_BASE
,
3138 OPTION_ALLOW_REG_PREFIX
,
3142 OPTION_SHCOMPACT_CONST_CRANGE
,
3150 OPTION_DUMMY
/* Not used. This is just here to make it easy to add and subtract options from this enum. */
3153 const char *md_shortopts
= "";
3154 struct option md_longopts
[] =
3156 {"relax", no_argument
, NULL
, OPTION_RELAX
},
3157 {"big", no_argument
, NULL
, OPTION_BIG
},
3158 {"little", no_argument
, NULL
, OPTION_LITTLE
},
3159 /* The next two switches are here because the
3160 generic parts of the linker testsuite uses them. */
3161 {"EB", no_argument
, NULL
, OPTION_BIG
},
3162 {"EL", no_argument
, NULL
, OPTION_LITTLE
},
3163 {"small", no_argument
, NULL
, OPTION_SMALL
},
3164 {"dsp", no_argument
, NULL
, OPTION_DSP
},
3165 {"isa", required_argument
, NULL
, OPTION_ISA
},
3166 {"renesas", no_argument
, NULL
, OPTION_RENESAS
},
3167 {"allow-reg-prefix", no_argument
, NULL
, OPTION_ALLOW_REG_PREFIX
},
3170 {"abi", required_argument
, NULL
, OPTION_ABI
},
3171 {"no-mix", no_argument
, NULL
, OPTION_NO_MIX
},
3172 {"shcompact-const-crange", no_argument
, NULL
, OPTION_SHCOMPACT_CONST_CRANGE
},
3173 {"no-expand", no_argument
, NULL
, OPTION_NO_EXPAND
},
3174 {"expand-pt32", no_argument
, NULL
, OPTION_PT32
},
3175 #endif /* HAVE_SH64 */
3176 { "h-tick-hex", no_argument
, NULL
, OPTION_H_TICK_HEX
},
3179 {"fdpic", no_argument
, NULL
, OPTION_FDPIC
},
3182 {NULL
, no_argument
, NULL
, 0}
3184 size_t md_longopts_size
= sizeof (md_longopts
);
3187 md_parse_option (int c
, const char *arg ATTRIBUTE_UNUSED
)
3196 target_big_endian
= 1;
3200 target_big_endian
= 0;
3208 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
3211 case OPTION_RENESAS
:
3212 dont_adjust_reloc_32
= 1;
3215 case OPTION_ALLOW_REG_PREFIX
:
3216 allow_dollar_register_prefix
= 1;
3220 if (strcasecmp (arg
, "dsp") == 0)
3221 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
3222 else if (strcasecmp (arg
, "fp") == 0)
3223 preset_target_arch
= arch_sh_up
& ~arch_sh_has_dsp
;
3224 else if (strcasecmp (arg
, "any") == 0)
3225 preset_target_arch
= arch_sh_up
;
3227 else if (strcasecmp (arg
, "shmedia") == 0)
3229 if (sh64_isa_mode
== sh64_isa_shcompact
)
3230 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
3231 sh64_isa_mode
= sh64_isa_shmedia
;
3233 else if (strcasecmp (arg
, "shcompact") == 0)
3235 if (sh64_isa_mode
== sh64_isa_shmedia
)
3236 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
3237 if (sh64_abi
== sh64_abi_64
)
3238 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
3239 sh64_isa_mode
= sh64_isa_shcompact
;
3241 #endif /* HAVE_SH64 */
3244 extern const bfd_arch_info_type bfd_sh_arch
;
3245 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
3247 preset_target_arch
= 0;
3248 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
3250 int len
= strlen(bfd_arch
->printable_name
);
3252 if (bfd_arch
->mach
== bfd_mach_sh5
)
3255 if (strncasecmp (bfd_arch
->printable_name
, arg
, len
) != 0)
3258 if (arg
[len
] == '\0')
3259 preset_target_arch
=
3260 sh_get_arch_from_bfd_mach (bfd_arch
->mach
);
3261 else if (strcasecmp(&arg
[len
], "-up") == 0)
3262 preset_target_arch
=
3263 sh_get_arch_up_from_bfd_mach (bfd_arch
->mach
);
3269 if (!preset_target_arch
)
3270 as_bad (_("Invalid argument to --isa option: %s"), arg
);
3276 if (strcmp (arg
, "32") == 0)
3278 if (sh64_abi
== sh64_abi_64
)
3279 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
3280 sh64_abi
= sh64_abi_32
;
3282 else if (strcmp (arg
, "64") == 0)
3284 if (sh64_abi
== sh64_abi_32
)
3285 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
3286 if (sh64_isa_mode
== sh64_isa_shcompact
)
3287 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
3288 sh64_abi
= sh64_abi_64
;
3291 as_bad (_("Invalid argument to --abi option: %s"), arg
);
3298 case OPTION_SHCOMPACT_CONST_CRANGE
:
3299 sh64_shcompact_const_crange
= TRUE
;
3302 case OPTION_NO_EXPAND
:
3303 sh64_expand
= FALSE
;
3309 #endif /* HAVE_SH64 */
3311 case OPTION_H_TICK_HEX
:
3312 enable_h_tick_hex
= 1;
3319 #endif /* OBJ_ELF */
3329 md_show_usage (FILE *stream
)
3331 fprintf (stream
, _("\
3333 --little generate little endian code\n\
3334 --big generate big endian code\n\
3335 --relax alter jump instructions for long displacements\n\
3336 --renesas disable optimization with section symbol for\n\
3337 compatibility with Renesas assembler.\n\
3338 --small align sections to 4 byte boundaries, not 16\n\
3339 --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
3340 --allow-reg-prefix allow '$' as a register name prefix.\n\
3341 --isa=[any use most appropriate isa\n\
3342 | dsp same as '-dsp'\n\
3345 extern const bfd_arch_info_type bfd_sh_arch
;
3346 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
3348 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
3349 if (bfd_arch
->mach
!= bfd_mach_sh5
)
3351 fprintf (stream
, "\n | %s", bfd_arch
->printable_name
);
3352 fprintf (stream
, "\n | %s-up", bfd_arch
->printable_name
);
3355 fprintf (stream
, "]\n");
3357 fprintf (stream
, _("\
3358 --isa=[shmedia set as the default instruction set for SH64\n\
3362 fprintf (stream
, _("\
3363 --abi=[32|64] set size of expanded SHmedia operands and object\n\
3365 --shcompact-const-crange emit code-range descriptors for constants in\n\
3366 SHcompact code sections\n\
3367 --no-mix disallow SHmedia code in the same section as\n\
3368 constants and SHcompact code\n\
3369 --no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
3370 --expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
3371 to 32 bits only\n"));
3372 #endif /* HAVE_SH64 */
3374 fprintf (stream
, _("\
3375 --fdpic generate an FDPIC object file\n"));
3376 #endif /* OBJ_ELF */
3379 /* This struct is used to pass arguments to sh_count_relocs through
3380 bfd_map_over_sections. */
3382 struct sh_count_relocs
3384 /* Symbol we are looking for. */
3386 /* Count of relocs found. */
3390 /* Count the number of fixups in a section which refer to a particular
3391 symbol. This is called via bfd_map_over_sections. */
3394 sh_count_relocs (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, void *data
)
3396 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
3397 segment_info_type
*seginfo
;
3401 seginfo
= seg_info (sec
);
3402 if (seginfo
== NULL
)
3406 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3408 if (fix
->fx_addsy
== sym
)
3416 /* Handle the count relocs for a particular section.
3417 This is called via bfd_map_over_sections. */
3420 sh_frob_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
,
3421 void *ignore ATTRIBUTE_UNUSED
)
3423 segment_info_type
*seginfo
;
3426 seginfo
= seg_info (sec
);
3427 if (seginfo
== NULL
)
3430 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3434 sym
= fix
->fx_addsy
;
3435 /* Check for a local_symbol. */
3436 if (sym
&& sym
->bsym
== NULL
)
3438 struct local_symbol
*ls
= (struct local_symbol
*)sym
;
3439 /* See if it's been converted. If so, canonicalize. */
3440 if (local_symbol_converted_p (ls
))
3441 fix
->fx_addsy
= local_symbol_get_real_symbol (ls
);
3445 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3450 struct sh_count_relocs info
;
3452 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
3455 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
3456 symbol in the same section. */
3457 sym
= fix
->fx_addsy
;
3459 || fix
->fx_subsy
!= NULL
3460 || fix
->fx_addnumber
!= 0
3461 || S_GET_SEGMENT (sym
) != sec
3462 || S_IS_EXTERNAL (sym
))
3464 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3465 _(".uses does not refer to a local symbol in the same section"));
3469 /* Look through the fixups again, this time looking for one
3470 at the same location as sym. */
3471 val
= S_GET_VALUE (sym
);
3472 for (fscan
= seginfo
->fix_root
;
3474 fscan
= fscan
->fx_next
)
3475 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
3476 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
3477 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
3478 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
3479 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
3483 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3484 _("can't find fixup pointed to by .uses"));
3488 if (fscan
->fx_tcbit
)
3490 /* We've already done this one. */
3494 /* The variable fscan should also be a fixup to a local symbol
3495 in the same section. */
3496 sym
= fscan
->fx_addsy
;
3498 || fscan
->fx_subsy
!= NULL
3499 || fscan
->fx_addnumber
!= 0
3500 || S_GET_SEGMENT (sym
) != sec
3501 || S_IS_EXTERNAL (sym
))
3503 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3504 _(".uses target does not refer to a local symbol in the same section"));
3508 /* Now we look through all the fixups of all the sections,
3509 counting the number of times we find a reference to sym. */
3512 bfd_map_over_sections (stdoutput
, sh_count_relocs
, &info
);
3517 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
3518 We have already adjusted the value of sym to include the
3519 fragment address, so we undo that adjustment here. */
3520 subseg_change (sec
, 0);
3521 fix_new (fscan
->fx_frag
,
3522 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
3523 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
3527 /* This function is called after the symbol table has been completed,
3528 but before the relocs or section contents have been written out.
3529 If we have seen any .uses pseudo-ops, they point to an instruction
3530 which loads a register with the address of a function. We look
3531 through the fixups to find where the function address is being
3532 loaded from. We then generate a COUNT reloc giving the number of
3533 times that function address is referred to. The linker uses this
3534 information when doing relaxing, to decide when it can eliminate
3535 the stored function address entirely. */
3541 shmedia_frob_file_before_adjust ();
3547 bfd_map_over_sections (stdoutput
, sh_frob_section
, NULL
);
3550 /* Called after relaxing. Set the correct sizes of the fragments, and
3551 create relocs so that md_apply_fix will fill in the correct values. */
3554 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
, segT seg
, fragS
*fragP
)
3558 switch (fragP
->fr_subtype
)
3560 case C (COND_JUMP
, COND8
):
3561 case C (COND_JUMP_DELAY
, COND8
):
3562 subseg_change (seg
, 0);
3563 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3564 1, BFD_RELOC_SH_PCDISP8BY2
);
3569 case C (UNCOND_JUMP
, UNCOND12
):
3570 subseg_change (seg
, 0);
3571 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3572 1, BFD_RELOC_SH_PCDISP12BY2
);
3577 case C (UNCOND_JUMP
, UNCOND32
):
3578 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3579 if (fragP
->fr_symbol
== NULL
)
3580 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3581 _("displacement overflows 12-bit field"));
3582 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3583 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3584 _("displacement to defined symbol %s overflows 12-bit field"),
3585 S_GET_NAME (fragP
->fr_symbol
));
3587 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3588 _("displacement to undefined symbol %s overflows 12-bit field"),
3589 S_GET_NAME (fragP
->fr_symbol
));
3590 /* Stabilize this frag, so we don't trip an assert. */
3591 fragP
->fr_fix
+= fragP
->fr_var
;
3595 case C (COND_JUMP
, COND12
):
3596 case C (COND_JUMP_DELAY
, COND12
):
3597 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
3598 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
3599 was due to gas incorrectly relaxing an out-of-range conditional
3600 branch with delay slot. It turned:
3601 bf.s L6 (slot mov.l r12,@(44,r0))
3604 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
3606 32: 10 cb mov.l r12,@(44,r0)
3607 Therefore, branches with delay slots have to be handled
3608 differently from ones without delay slots. */
3610 unsigned char *buffer
=
3611 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
3612 int highbyte
= target_big_endian
? 0 : 1;
3613 int lowbyte
= target_big_endian
? 1 : 0;
3614 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
3616 /* Toggle the true/false bit of the bcond. */
3617 buffer
[highbyte
] ^= 0x2;
3619 /* If this is a delayed branch, we may not put the bra in the
3620 slot. So we change it to a non-delayed branch, like that:
3621 b! cond slot_label; bra disp; slot_label: slot_insn
3622 ??? We should try if swapping the conditional branch and
3623 its delay-slot insn already makes the branch reach. */
3625 /* Build a relocation to six / four bytes farther on. */
3626 subseg_change (seg
, 0);
3627 fix_new (fragP
, fragP
->fr_fix
, 2, section_symbol (seg
),
3628 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
3629 1, BFD_RELOC_SH_PCDISP8BY2
);
3631 /* Set up a jump instruction. */
3632 buffer
[highbyte
+ 2] = 0xa0;
3633 buffer
[lowbyte
+ 2] = 0;
3634 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
3635 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
3639 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
3644 /* Fill in a NOP instruction. */
3645 buffer
[highbyte
+ 4] = 0x0;
3646 buffer
[lowbyte
+ 4] = 0x9;
3655 case C (COND_JUMP
, COND32
):
3656 case C (COND_JUMP_DELAY
, COND32
):
3657 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3658 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3659 if (fragP
->fr_symbol
== NULL
)
3660 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3661 _("displacement overflows 8-bit field"));
3662 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3663 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3664 _("displacement to defined symbol %s overflows 8-bit field"),
3665 S_GET_NAME (fragP
->fr_symbol
));
3667 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3668 _("displacement to undefined symbol %s overflows 8-bit field "),
3669 S_GET_NAME (fragP
->fr_symbol
));
3670 /* Stabilize this frag, so we don't trip an assert. */
3671 fragP
->fr_fix
+= fragP
->fr_var
;
3677 shmedia_md_convert_frag (headers
, seg
, fragP
, TRUE
);
3683 if (donerelax
&& !sh_relax
)
3684 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3685 _("overflow in branch to %s; converted into longer instruction sequence"),
3686 (fragP
->fr_symbol
!= NULL
3687 ? S_GET_NAME (fragP
->fr_symbol
)
3692 md_section_align (segT seg ATTRIBUTE_UNUSED
, valueT size
)
3696 #else /* ! OBJ_ELF */
3697 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
3698 & -(1 << bfd_get_section_alignment (stdoutput
, seg
)));
3699 #endif /* ! OBJ_ELF */
3702 /* This static variable is set by s_uacons to tell sh_cons_align that
3703 the expression does not need to be aligned. */
3705 static int sh_no_align_cons
= 0;
3707 /* This handles the unaligned space allocation pseudo-ops, such as
3708 .uaword. .uaword is just like .word, but the value does not need
3712 s_uacons (int bytes
)
3714 /* Tell sh_cons_align not to align this value. */
3715 sh_no_align_cons
= 1;
3719 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3720 aligned correctly. Note that this can cause warnings to be issued
3721 when assembling initialized structured which were declared with the
3722 packed attribute. FIXME: Perhaps we should require an option to
3723 enable this warning? */
3726 sh_cons_align (int nbytes
)
3730 if (sh_no_align_cons
)
3732 /* This is an unaligned pseudo-op. */
3733 sh_no_align_cons
= 0;
3738 while ((nbytes
& 1) == 0)
3747 if (now_seg
== absolute_section
)
3749 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
3750 as_warn (_("misaligned data"));
3754 frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
3755 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
3757 record_alignment (now_seg
, nalign
);
3760 /* When relaxing, we need to output a reloc for any .align directive
3761 that requests alignment to a four byte boundary or larger. This is
3762 also where we check for misaligned data. */
3765 sh_handle_align (fragS
*frag
)
3767 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
3769 if (frag
->fr_type
== rs_align_code
)
3771 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
3772 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
3774 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
3783 if (target_big_endian
)
3785 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
3786 frag
->fr_var
= sizeof big_nop_pattern
;
3790 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
3791 frag
->fr_var
= sizeof little_nop_pattern
;
3794 else if (frag
->fr_type
== rs_align_test
)
3797 as_bad_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
3801 && (frag
->fr_type
== rs_align
3802 || frag
->fr_type
== rs_align_code
)
3803 && frag
->fr_address
+ frag
->fr_fix
> 0
3804 && frag
->fr_offset
> 1
3805 && now_seg
!= bss_section
)
3806 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
3807 BFD_RELOC_SH_ALIGN
);
3810 /* See whether the relocation should be resolved locally. */
3813 sh_local_pcrel (fixS
*fix
)
3816 && (fix
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
3817 || fix
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
3818 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
3819 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
3820 || fix
->fx_r_type
== BFD_RELOC_8_PCREL
3821 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH16
3822 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH32
));
3825 /* See whether we need to force a relocation into the output file.
3826 This is used to force out switch and PC relative relocations when
3830 sh_force_relocation (fixS
*fix
)
3832 /* These relocations can't make it into a DSO, so no use forcing
3833 them for global symbols. */
3834 if (sh_local_pcrel (fix
))
3837 /* Make sure some relocations get emitted. */
3838 if (fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
3839 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
3840 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_GD_32
3841 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LD_32
3842 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_IE_32
3843 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LDO_32
3844 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LE_32
3845 || generic_force_reloc (fix
))
3851 return (fix
->fx_pcrel
3852 || SWITCH_TABLE (fix
)
3853 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
3854 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
3855 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
3856 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3858 || fix
->fx_r_type
== BFD_RELOC_SH_SHMEDIA_CODE
3860 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
3865 sh_fix_adjustable (fixS
*fixP
)
3867 if (fixP
->fx_r_type
== BFD_RELOC_32_PLT_PCREL
3868 || fixP
->fx_r_type
== BFD_RELOC_32_GOT_PCREL
3869 || fixP
->fx_r_type
== BFD_RELOC_SH_GOT20
3870 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTPC
3871 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTFUNCDESC
3872 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTFUNCDESC20
3873 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTOFFFUNCDESC
3874 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTOFFFUNCDESC20
3875 || fixP
->fx_r_type
== BFD_RELOC_SH_FUNCDESC
3876 || ((fixP
->fx_r_type
== BFD_RELOC_32
) && dont_adjust_reloc_32
)
3877 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
3880 /* We need the symbol name for the VTABLE entries */
3881 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
3882 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
3889 sh_elf_final_processing (void)
3893 /* Set file-specific flags to indicate if this code needs
3894 a processor with the sh-dsp / sh2e ISA to execute. */
3896 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3897 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3898 if (sh64_isa_mode
!= sh64_isa_unspecified
)
3901 #elif defined TARGET_SYMBIAN
3904 extern int sh_symbian_find_elf_flags (unsigned int);
3906 val
= sh_symbian_find_elf_flags (valid_arch
);
3909 #endif /* HAVE_SH64 */
3910 val
= sh_find_elf_flags (valid_arch
);
3912 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
3913 elf_elfheader (stdoutput
)->e_flags
|= val
;
3916 elf_elfheader (stdoutput
)->e_flags
|= EF_SH_FDPIC
;
3921 /* Return the target format for uClinux. */
3924 sh_uclinux_target_format (void)
3927 return (!target_big_endian
? "elf32-sh-fdpic" : "elf32-shbig-fdpic");
3929 return (!target_big_endian
? "elf32-shl" : "elf32-sh");
3933 /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its
3934 assembly-time value. If we're generating a reloc for FIXP,
3935 see whether the addend should be stored in-place or whether
3936 it should be in an ELF r_addend field. */
3939 apply_full_field_fix (fixS
*fixP
, char *buf
, bfd_vma val
, int size
)
3941 reloc_howto_type
*howto
;
3943 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3945 howto
= bfd_reloc_type_lookup (stdoutput
, fixP
->fx_r_type
);
3946 if (howto
&& !howto
->partial_inplace
)
3948 fixP
->fx_addnumber
= val
;
3952 md_number_to_chars (buf
, val
, size
);
3955 /* Apply a fixup to the object file. */
3958 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3960 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3961 int lowbyte
= target_big_endian
? 1 : 0;
3962 int highbyte
= target_big_endian
? 0 : 1;
3963 long val
= (long) *valP
;
3967 /* A difference between two symbols, the second of which is in the
3968 current section, is transformed in a PC-relative relocation to
3969 the other symbol. We have to adjust the relocation type here. */
3973 /* Safeguard; this must not occur for non-sh64 configurations. */
3974 gas_assert (fixP
->fx_r_type
!= BFD_RELOC_64
);
3977 switch (fixP
->fx_r_type
)
3983 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3986 /* Currently, we only support 32-bit PCREL relocations.
3987 We'd need a new reloc type to handle 16_PCREL, and
3988 8_PCREL is already taken for R_SH_SWITCH8, which
3989 apparently does something completely different than what
3992 bfd_set_error (bfd_error_bad_value
);
3996 bfd_set_error (bfd_error_bad_value
);
4001 /* The function adjust_reloc_syms won't convert a reloc against a weak
4002 symbol into a reloc against a section, but bfd_install_relocation
4003 will screw up if the symbol is defined, so we have to adjust val here
4004 to avoid the screw up later.
4006 For ordinary relocs, this does not happen for ELF, since for ELF,
4007 bfd_install_relocation uses the "special function" field of the
4008 howto, and does not execute the code that needs to be undone, as long
4009 as the special function does not return bfd_reloc_continue.
4010 It can happen for GOT- and PLT-type relocs the way they are
4011 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
4012 doesn't matter here since those relocs don't use VAL; see below. */
4013 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
4014 && fixP
->fx_addsy
!= NULL
4015 && S_IS_WEAK (fixP
->fx_addsy
))
4016 val
-= S_GET_VALUE (fixP
->fx_addsy
);
4018 if (SWITCH_TABLE (fixP
))
4019 val
-= S_GET_VALUE (fixP
->fx_subsy
);
4023 switch (fixP
->fx_r_type
)
4025 case BFD_RELOC_SH_IMM3
:
4027 * buf
= (* buf
& 0xf8) | (val
& 0x7);
4029 case BFD_RELOC_SH_IMM3U
:
4031 * buf
= (* buf
& 0x8f) | ((val
& 0x7) << 4);
4033 case BFD_RELOC_SH_DISP12
:
4035 buf
[lowbyte
] = val
& 0xff;
4036 buf
[highbyte
] |= (val
>> 8) & 0x0f;
4038 case BFD_RELOC_SH_DISP12BY2
:
4041 buf
[lowbyte
] = (val
>> 1) & 0xff;
4042 buf
[highbyte
] |= (val
>> 9) & 0x0f;
4044 case BFD_RELOC_SH_DISP12BY4
:
4047 buf
[lowbyte
] = (val
>> 2) & 0xff;
4048 buf
[highbyte
] |= (val
>> 10) & 0x0f;
4050 case BFD_RELOC_SH_DISP12BY8
:
4053 buf
[lowbyte
] = (val
>> 3) & 0xff;
4054 buf
[highbyte
] |= (val
>> 11) & 0x0f;
4056 case BFD_RELOC_SH_DISP20
:
4057 if (! target_big_endian
)
4061 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 12) & 0xf0);
4062 buf
[2] = (val
>> 8) & 0xff;
4063 buf
[3] = val
& 0xff;
4065 case BFD_RELOC_SH_DISP20BY8
:
4066 if (!target_big_endian
)
4071 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 20) & 0xf0);
4072 buf
[2] = (val
>> 16) & 0xff;
4073 buf
[3] = (val
>> 8) & 0xff;
4076 case BFD_RELOC_SH_IMM4
:
4078 *buf
= (*buf
& 0xf0) | (val
& 0xf);
4081 case BFD_RELOC_SH_IMM4BY2
:
4084 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
4087 case BFD_RELOC_SH_IMM4BY4
:
4090 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
4093 case BFD_RELOC_SH_IMM8BY2
:
4099 case BFD_RELOC_SH_IMM8BY4
:
4106 case BFD_RELOC_SH_IMM8
:
4107 /* Sometimes the 8 bit value is sign extended (e.g., add) and
4108 sometimes it is not (e.g., and). We permit any 8 bit value.
4109 Note that adding further restrictions may invalidate
4110 reasonable looking assembly code, such as ``and -0x1,r0''. */
4116 case BFD_RELOC_SH_PCRELIMM8BY4
:
4117 /* If we are dealing with a known destination ... */
4118 if ((fixP
->fx_addsy
== NULL
|| S_IS_DEFINED (fixP
->fx_addsy
))
4119 && (fixP
->fx_subsy
== NULL
|| S_IS_DEFINED (fixP
->fx_addsy
)))
4121 /* Don't silently move the destination due to misalignment.
4122 The absolute address is the fragment base plus the offset into
4123 the fragment plus the pc relative offset to the label. */
4124 if ((fixP
->fx_frag
->fr_address
+ fixP
->fx_where
+ val
) & 3)
4125 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
4126 _("offset to unaligned destination"));
4128 /* The displacement cannot be zero or backward even if aligned.
4129 Allow -2 because val has already been adjusted somewhere. */
4131 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("negative offset"));
4134 /* The lower two bits of the PC are cleared before the
4135 displacement is added in. We can assume that the destination
4136 is on a 4 byte boundary. If this instruction is also on a 4
4137 byte boundary, then we want
4139 and target - here is a multiple of 4.
4140 Otherwise, we are on a 2 byte boundary, and we want
4141 (target - (here - 2)) / 4
4142 and target - here is not a multiple of 4. Computing
4143 (target - (here - 2)) / 4 == (target - here + 2) / 4
4144 works for both cases, since in the first case the addition of
4145 2 will be removed by the division. target - here is in the
4147 val
= (val
+ 2) / 4;
4149 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4153 case BFD_RELOC_SH_PCRELIMM8BY2
:
4156 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4160 case BFD_RELOC_SH_PCDISP8BY2
:
4162 if (val
< -0x80 || val
> 0x7f)
4163 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4167 case BFD_RELOC_SH_PCDISP12BY2
:
4169 if (val
< -0x800 || val
> 0x7ff)
4170 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4171 buf
[lowbyte
] = val
& 0xff;
4172 buf
[highbyte
] |= (val
>> 8) & 0xf;
4177 apply_full_field_fix (fixP
, buf
, *valP
, 8);
4182 case BFD_RELOC_32_PCREL
:
4183 apply_full_field_fix (fixP
, buf
, val
, 4);
4187 apply_full_field_fix (fixP
, buf
, val
, 2);
4190 case BFD_RELOC_SH_USES
:
4191 /* Pass the value into sh_reloc(). */
4192 fixP
->fx_addnumber
= val
;
4195 case BFD_RELOC_SH_COUNT
:
4196 case BFD_RELOC_SH_ALIGN
:
4197 case BFD_RELOC_SH_CODE
:
4198 case BFD_RELOC_SH_DATA
:
4199 case BFD_RELOC_SH_LABEL
:
4200 /* Nothing to do here. */
4203 case BFD_RELOC_SH_LOOP_START
:
4204 case BFD_RELOC_SH_LOOP_END
:
4206 case BFD_RELOC_VTABLE_INHERIT
:
4207 case BFD_RELOC_VTABLE_ENTRY
:
4212 case BFD_RELOC_32_PLT_PCREL
:
4213 /* Make the jump instruction point to the address of the operand. At
4214 runtime we merely add the offset to the actual PLT entry. */
4215 * valP
= 0xfffffffc;
4216 val
= fixP
->fx_offset
;
4218 val
-= S_GET_VALUE (fixP
->fx_subsy
);
4219 apply_full_field_fix (fixP
, buf
, val
, 4);
4222 case BFD_RELOC_SH_GOTPC
:
4223 /* This is tough to explain. We end up with this one if we have
4224 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
4225 The goal here is to obtain the absolute address of the GOT,
4226 and it is strongly preferable from a performance point of
4227 view to avoid using a runtime relocation for this. There are
4228 cases where you have something like:
4230 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
4232 and here no correction would be required. Internally in the
4233 assembler we treat operands of this form as not being pcrel
4234 since the '.' is explicitly mentioned, and I wonder whether
4235 it would simplify matters to do it this way. Who knows. In
4236 earlier versions of the PIC patches, the pcrel_adjust field
4237 was used to store the correction, but since the expression is
4238 not pcrel, I felt it would be confusing to do it this way. */
4240 apply_full_field_fix (fixP
, buf
, val
, 4);
4243 case BFD_RELOC_SH_TLS_GD_32
:
4244 case BFD_RELOC_SH_TLS_LD_32
:
4245 case BFD_RELOC_SH_TLS_IE_32
:
4246 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
4248 case BFD_RELOC_32_GOT_PCREL
:
4249 case BFD_RELOC_SH_GOT20
:
4250 case BFD_RELOC_SH_GOTPLT32
:
4251 case BFD_RELOC_SH_GOTFUNCDESC
:
4252 case BFD_RELOC_SH_GOTFUNCDESC20
:
4253 case BFD_RELOC_SH_GOTOFFFUNCDESC
:
4254 case BFD_RELOC_SH_GOTOFFFUNCDESC20
:
4255 case BFD_RELOC_SH_FUNCDESC
:
4256 * valP
= 0; /* Fully resolved at runtime. No addend. */
4257 apply_full_field_fix (fixP
, buf
, 0, 4);
4260 case BFD_RELOC_SH_TLS_LDO_32
:
4261 case BFD_RELOC_SH_TLS_LE_32
:
4262 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
4264 case BFD_RELOC_32_GOTOFF
:
4265 case BFD_RELOC_SH_GOTOFF20
:
4266 apply_full_field_fix (fixP
, buf
, val
, 4);
4272 shmedia_md_apply_fix (fixP
, valP
);
4281 if ((val
& ((1 << shift
) - 1)) != 0)
4282 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
4286 val
= ((val
>> shift
)
4287 | ((long) -1 & ~ ((long) -1 >> shift
)));
4290 /* Extend sign for 64-bit host. */
4291 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
4292 if (max
!= 0 && (val
< min
|| val
> max
))
4293 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
4295 /* Stop the generic code from trying to overflow check the value as well.
4296 It may not have the correct value anyway, as we do not store val back
4298 fixP
->fx_no_overflow
= 1;
4300 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
4304 /* Called just before address relaxation. Return the length
4305 by which a fragment must grow to reach it's destination. */
4308 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
4312 switch (fragP
->fr_subtype
)
4316 return shmedia_md_estimate_size_before_relax (fragP
, segment_type
);
4322 case C (UNCOND_JUMP
, UNDEF_DISP
):
4323 /* Used to be a branch to somewhere which was unknown. */
4324 if (!fragP
->fr_symbol
)
4326 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
4328 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
4330 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
4334 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
4338 case C (COND_JUMP
, UNDEF_DISP
):
4339 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
4340 what
= GET_WHAT (fragP
->fr_subtype
);
4341 /* Used to be a branch to somewhere which was unknown. */
4342 if (fragP
->fr_symbol
4343 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
4345 /* Got a symbol and it's defined in this segment, become byte
4346 sized - maybe it will fix up. */
4347 fragP
->fr_subtype
= C (what
, COND8
);
4349 else if (fragP
->fr_symbol
)
4351 /* It's got a segment, but it's not ours, so it will always be long. */
4352 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
4356 /* We know the abs value. */
4357 fragP
->fr_subtype
= C (what
, COND8
);
4361 case C (UNCOND_JUMP
, UNCOND12
):
4362 case C (UNCOND_JUMP
, UNCOND32
):
4363 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
4364 case C (COND_JUMP
, COND8
):
4365 case C (COND_JUMP
, COND12
):
4366 case C (COND_JUMP
, COND32
):
4367 case C (COND_JUMP
, UNDEF_WORD_DISP
):
4368 case C (COND_JUMP_DELAY
, COND8
):
4369 case C (COND_JUMP_DELAY
, COND12
):
4370 case C (COND_JUMP_DELAY
, COND32
):
4371 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
4372 /* When relaxing a section for the second time, we don't need to
4373 do anything besides return the current size. */
4377 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
4378 return fragP
->fr_var
;
4381 /* Put number into target byte order. */
4384 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
4387 /* We might need to set the contents type to data. */
4388 sh64_flag_output ();
4391 if (! target_big_endian
)
4392 number_to_chars_littleendian (ptr
, use
, nbytes
);
4394 number_to_chars_bigendian (ptr
, use
, nbytes
);
4397 /* This version is used in obj-coff.c eg. for the sh-hms target. */
4400 md_pcrel_from (fixS
*fixP
)
4402 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
4406 md_pcrel_from_section (fixS
*fixP
, segT sec
)
4408 if (! sh_local_pcrel (fixP
)
4409 && fixP
->fx_addsy
!= (symbolS
*) NULL
4410 && (generic_force_reloc (fixP
)
4411 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
4413 /* The symbol is undefined (or is defined but not in this section,
4414 or we're not sure about it being the final definition). Let the
4415 linker figure it out. We need to adjust the subtraction of a
4416 symbol to the position of the relocated data, though. */
4417 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
4420 return md_pcrel_from (fixP
);
4423 /* Create a reloc. */
4426 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
4429 bfd_reloc_code_real_type r_type
;
4431 rel
= XNEW (arelent
);
4432 rel
->sym_ptr_ptr
= XNEW (asymbol
*);
4433 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4434 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4436 r_type
= fixp
->fx_r_type
;
4438 if (SWITCH_TABLE (fixp
))
4440 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
4441 rel
->addend
= rel
->address
- S_GET_VALUE(fixp
->fx_subsy
);
4442 if (r_type
== BFD_RELOC_16
)
4443 r_type
= BFD_RELOC_SH_SWITCH16
;
4444 else if (r_type
== BFD_RELOC_8
)
4445 r_type
= BFD_RELOC_8_PCREL
;
4446 else if (r_type
== BFD_RELOC_32
)
4447 r_type
= BFD_RELOC_SH_SWITCH32
;
4451 else if (r_type
== BFD_RELOC_SH_USES
)
4452 rel
->addend
= fixp
->fx_addnumber
;
4453 else if (r_type
== BFD_RELOC_SH_COUNT
)
4454 rel
->addend
= fixp
->fx_offset
;
4455 else if (r_type
== BFD_RELOC_SH_ALIGN
)
4456 rel
->addend
= fixp
->fx_offset
;
4457 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
4458 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
4459 rel
->addend
= fixp
->fx_offset
;
4460 else if (r_type
== BFD_RELOC_SH_LOOP_START
4461 || r_type
== BFD_RELOC_SH_LOOP_END
)
4462 rel
->addend
= fixp
->fx_offset
;
4463 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
4466 rel
->address
= rel
->addend
= fixp
->fx_offset
;
4469 else if (shmedia_init_reloc (rel
, fixp
))
4473 rel
->addend
= fixp
->fx_addnumber
;
4475 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
4477 if (rel
->howto
== NULL
)
4479 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4480 _("Cannot represent relocation type %s"),
4481 bfd_get_reloc_code_name (r_type
));
4482 /* Set howto to a garbage value so that we can keep going. */
4483 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4484 gas_assert (rel
->howto
!= NULL
);
4487 else if (rel
->howto
->type
== R_SH_IND12W
)
4488 rel
->addend
+= fixp
->fx_offset
- 4;
4495 inline static char *
4496 sh_end_of_match (char *cont
, const char *what
)
4498 int len
= strlen (what
);
4500 if (strncasecmp (cont
, what
, strlen (what
)) == 0
4501 && ! is_part_of_name (cont
[len
]))
4508 sh_parse_name (char const *name
,
4510 enum expr_mode mode
,
4513 char *next
= input_line_pointer
;
4518 exprP
->X_op_symbol
= NULL
;
4520 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4523 GOT_symbol
= symbol_find_or_make (name
);
4525 exprP
->X_add_symbol
= GOT_symbol
;
4527 /* If we have an absolute symbol or a reg, then we know its
4529 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
4530 if (mode
!= expr_defer
&& segment
== absolute_section
)
4532 exprP
->X_op
= O_constant
;
4533 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4534 exprP
->X_add_symbol
= NULL
;
4536 else if (mode
!= expr_defer
&& segment
== reg_section
)
4538 exprP
->X_op
= O_register
;
4539 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4540 exprP
->X_add_symbol
= NULL
;
4544 exprP
->X_op
= O_symbol
;
4545 exprP
->X_add_number
= 0;
4551 exprP
->X_add_symbol
= symbol_find_or_make (name
);
4553 if (*nextcharP
!= '@')
4555 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFF")))
4556 reloc_type
= BFD_RELOC_32_GOTOFF
;
4557 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTPLT")))
4558 reloc_type
= BFD_RELOC_SH_GOTPLT32
;
4559 else if ((next_end
= sh_end_of_match (next
+ 1, "GOT")))
4560 reloc_type
= BFD_RELOC_32_GOT_PCREL
;
4561 else if ((next_end
= sh_end_of_match (next
+ 1, "PLT")))
4562 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
4563 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSGD")))
4564 reloc_type
= BFD_RELOC_SH_TLS_GD_32
;
4565 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSLDM")))
4566 reloc_type
= BFD_RELOC_SH_TLS_LD_32
;
4567 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTTPOFF")))
4568 reloc_type
= BFD_RELOC_SH_TLS_IE_32
;
4569 else if ((next_end
= sh_end_of_match (next
+ 1, "TPOFF")))
4570 reloc_type
= BFD_RELOC_SH_TLS_LE_32
;
4571 else if ((next_end
= sh_end_of_match (next
+ 1, "DTPOFF")))
4572 reloc_type
= BFD_RELOC_SH_TLS_LDO_32
;
4573 else if ((next_end
= sh_end_of_match (next
+ 1, "PCREL")))
4574 reloc_type
= BFD_RELOC_32_PCREL
;
4575 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTFUNCDESC")))
4576 reloc_type
= BFD_RELOC_SH_GOTFUNCDESC
;
4577 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFFFUNCDESC")))
4578 reloc_type
= BFD_RELOC_SH_GOTOFFFUNCDESC
;
4579 else if ((next_end
= sh_end_of_match (next
+ 1, "FUNCDESC")))
4580 reloc_type
= BFD_RELOC_SH_FUNCDESC
;
4584 *input_line_pointer
= *nextcharP
;
4585 input_line_pointer
= next_end
;
4586 *nextcharP
= *input_line_pointer
;
4587 *input_line_pointer
= '\0';
4589 exprP
->X_op
= O_PIC_reloc
;
4590 exprP
->X_add_number
= 0;
4591 exprP
->X_md
= reloc_type
;
4597 sh_cfi_frame_initial_instructions (void)
4599 cfi_add_CFA_def_cfa (15, 0);
4603 sh_regname_to_dw2regnum (char *regname
)
4605 unsigned int regnum
= -1;
4609 static struct { const char *name
; int dw2regnum
; } regnames
[] =
4611 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 },
4612 { "macl", 21 }, { "fpul", 23 }
4615 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
4616 if (strcmp (regnames
[i
].name
, regname
) == 0)
4617 return regnames
[i
].dw2regnum
;
4619 if (regname
[0] == 'r')
4622 regnum
= strtoul (p
, &q
, 10);
4623 if (p
== q
|| *q
|| regnum
>= 16)
4626 else if (regname
[0] == 'f' && regname
[1] == 'r')
4629 regnum
= strtoul (p
, &q
, 10);
4630 if (p
== q
|| *q
|| regnum
>= 16)
4634 else if (regname
[0] == 'x' && regname
[1] == 'd')
4637 regnum
= strtoul (p
, &q
, 10);
4638 if (p
== q
|| *q
|| regnum
>= 8)
4644 #endif /* OBJ_ELF */