1 /* tc-sh.c -- Assemble code for the Hitachi Super-H
2 Copyright (C) 1993, 94, 95, 96, 97, 98, 99, 2000 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 Written By Steve Chamberlain
31 #include "opcodes/sh-opc.h"
33 #include "struc-symbol.h"
39 const char comment_chars
[] = "!";
40 const char line_separator_chars
[] = ";";
41 const char line_comment_chars
[] = "!#";
43 static void s_uses
PARAMS ((int));
45 static void sh_count_relocs
PARAMS ((bfd
*, segT
, PTR
));
46 static void sh_frob_section
PARAMS ((bfd
*, segT
, PTR
));
49 void s_align_bytes ();
50 static void s_uacons
PARAMS ((int));
51 static sh_opcode_info
*find_cooked_opcode
PARAMS ((char **));
52 static void assemble_ppi
PARAMS ((char *, sh_opcode_info
*));
58 int ignore ATTRIBUTE_UNUSED
;
61 target_big_endian
= 0;
64 /* This table describes all the machine specific pseudo-ops the assembler
65 has to support. The fields are:
66 pseudo-op name without dot
67 function to call to execute this pseudo-op
68 Integer arg to pass to the function
71 const pseudo_typeS md_pseudo_table
[] =
75 {"form", listing_psize
, 0},
76 {"little", little
, 0},
77 {"heading", listing_title
, 0},
78 {"import", s_ignore
, 0},
79 {"page", listing_eject
, 0},
80 {"program", s_ignore
, 0},
82 {"uaword", s_uacons
, 2},
83 {"ualong", s_uacons
, 4},
87 /*int md_reloc_size; */
89 int sh_relax
; /* set if -relax seen */
91 /* Whether -small was seen. */
95 /* Whether -dsp was seen. */
99 /* The bit mask of architectures that could
100 accomodate the insns seen so far. */
101 static int valid_arch
;
103 const char EXP_CHARS
[] = "eE";
105 /* Chars that mean this number is a floating point constant */
108 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
110 #define C(a,b) ENCODE_RELAX(a,b)
112 #define JREG 14 /* Register used as a temp when relaxing */
113 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
114 #define GET_WHAT(x) ((x>>4))
116 /* These are the three types of relaxable instrction */
118 #define COND_JUMP_DELAY 2
119 #define UNCOND_JUMP 3
128 #define UNDEF_WORD_DISP 4
133 /* Branch displacements are from the address of the branch plus
134 four, thus all minimum and maximum values have 4 added to them. */
137 #define COND8_LENGTH 2
139 /* There is one extra instruction before the branch, so we must add
140 two more bytes to account for it. */
141 #define COND12_F 4100
142 #define COND12_M -4090
143 #define COND12_LENGTH 6
145 #define COND12_DELAY_LENGTH 4
147 /* ??? The minimum and maximum values are wrong, but this does not matter
148 since this relocation type is not supported yet. */
149 #define COND32_F (1<<30)
150 #define COND32_M -(1<<30)
151 #define COND32_LENGTH 14
153 #define UNCOND12_F 4098
154 #define UNCOND12_M -4092
155 #define UNCOND12_LENGTH 2
157 /* ??? The minimum and maximum values are wrong, but this does not matter
158 since this relocation type is not supported yet. */
159 #define UNCOND32_F (1<<30)
160 #define UNCOND32_M -(1<<30)
161 #define UNCOND32_LENGTH 14
163 #define EMPTY { 0, 0, 0, 0 }
165 const relax_typeS md_relax_table
[C (END
, 0)] = {
166 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
167 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
170 /* C (COND_JUMP, COND8) */
171 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
172 /* C (COND_JUMP, COND12) */
173 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
174 /* C (COND_JUMP, COND32) */
175 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
176 EMPTY
, EMPTY
, EMPTY
, EMPTY
,
177 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
180 /* C (COND_JUMP_DELAY, COND8) */
181 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
182 /* C (COND_JUMP_DELAY, COND12) */
183 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
184 /* C (COND_JUMP_DELAY, COND32) */
185 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
186 EMPTY
, EMPTY
, EMPTY
, EMPTY
,
187 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
190 /* C (UNCOND_JUMP, UNCOND12) */
191 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
192 /* C (UNCOND_JUMP, UNCOND32) */
193 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
194 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
195 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
200 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
203 This function is called once, at assembler startup time. This should
204 set up all the tables, etc that the MD part of the assembler needs
210 sh_opcode_info
*opcode
;
211 char *prev_name
= "";
215 /* The WinCE OS only supports little endian executables. */
216 target_big_endian
= 0;
219 target_big_endian
= 1;
222 target_arch
= arch_sh1_up
& ~(sh_dsp
? arch_sh3e_up
: arch_sh_dsp_up
);
223 valid_arch
= target_arch
;
225 opcode_hash_control
= hash_new ();
227 /* Insert unique names into hash table */
228 for (opcode
= sh_table
; opcode
->name
; opcode
++)
230 if (strcmp (prev_name
, opcode
->name
))
232 if (! (opcode
->arch
& target_arch
))
234 prev_name
= opcode
->name
;
235 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
239 /* Make all the opcodes with the same name point to the same
241 opcode
->name
= prev_name
;
248 static int reg_x
, reg_y
;
256 expressionS immediate
;
260 #define IDENT_CHAR(c) (isalnum (c) || (c) == '_')
262 /* try and parse a reg name, returns number of chars consumed */
264 parse_reg (src
, mode
, reg
)
269 /* We use ! IDENT_CHAR for the next character after the register name, to
270 make sure that we won't accidentally recognize a symbol name such as
271 'sram' or sr_ram as being a reference to the register 'sr'. */
277 if (src
[2] >= '0' && src
[2] <= '5'
278 && ! IDENT_CHAR ((unsigned char) src
[3]))
281 *reg
= 10 + src
[2] - '0';
285 if (src
[1] >= '0' && src
[1] <= '9'
286 && ! IDENT_CHAR ((unsigned char) src
[2]))
289 *reg
= (src
[1] - '0');
292 if (src
[1] >= '0' && src
[1] <= '7' && strncmp (&src
[2], "_bank", 5) == 0
293 && ! IDENT_CHAR ((unsigned char) src
[7]))
296 *reg
= (src
[1] - '0');
300 if (src
[1] == 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
305 if (src
[1] == 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
316 if (! IDENT_CHAR ((unsigned char) src
[2]))
322 if (src
[2] == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
331 if (! IDENT_CHAR ((unsigned char) src
[2]))
337 if (src
[2] == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
345 if (src
[1] == 'x' && src
[2] >= '0' && src
[2] <= '1'
346 && ! IDENT_CHAR ((unsigned char) src
[3]))
349 *reg
= 4 + (src
[1] - '0');
352 if (src
[1] == 'y' && src
[2] >= '0' && src
[2] <= '1'
353 && ! IDENT_CHAR ((unsigned char) src
[3]))
356 *reg
= 6 + (src
[1] - '0');
359 if (src
[1] == 's' && src
[2] >= '0' && src
[2] <= '3'
360 && ! IDENT_CHAR ((unsigned char) src
[3]))
362 int n
= src
[1] - '0';
365 *reg
= n
| ((~n
& 2) << 1);
370 if (src
[0] == 'i' && src
[1] && ! IDENT_CHAR ((unsigned char) src
[3]))
392 if (src
[0] == 'x' && src
[1] >= '0' && src
[1] <= '1'
393 && ! IDENT_CHAR ((unsigned char) src
[2]))
396 *reg
= A_X0_NUM
+ src
[1] - '0';
400 if (src
[0] == 'y' && src
[1] >= '0' && src
[1] <= '1'
401 && ! IDENT_CHAR ((unsigned char) src
[2]))
404 *reg
= A_Y0_NUM
+ src
[1] - '0';
408 if (src
[0] == 'm' && src
[1] >= '0' && src
[1] <= '1'
409 && ! IDENT_CHAR ((unsigned char) src
[2]))
412 *reg
= src
[1] == '0' ? A_M0_NUM
: A_M1_NUM
;
418 && src
[2] == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
424 if (src
[0] == 's' && src
[1] == 'p' && src
[2] == 'c'
425 && ! IDENT_CHAR ((unsigned char) src
[3]))
431 if (src
[0] == 's' && src
[1] == 'g' && src
[2] == 'r'
432 && ! IDENT_CHAR ((unsigned char) src
[3]))
438 if (src
[0] == 'd' && src
[1] == 's' && src
[2] == 'r'
439 && ! IDENT_CHAR ((unsigned char) src
[3]))
445 if (src
[0] == 'd' && src
[1] == 'b' && src
[2] == 'r'
446 && ! IDENT_CHAR ((unsigned char) src
[3]))
452 if (src
[0] == 's' && src
[1] == 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
458 if (src
[0] == 's' && src
[1] == 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
465 if (src
[0] == 'p' && src
[1] == 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
470 if (src
[0] == 'p' && src
[1] == 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
472 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
473 and use an uninitialized immediate. */
477 if (src
[0] == 'g' && src
[1] == 'b' && src
[2] == 'r'
478 && ! IDENT_CHAR ((unsigned char) src
[3]))
483 if (src
[0] == 'v' && src
[1] == 'b' && src
[2] == 'r'
484 && ! IDENT_CHAR ((unsigned char) src
[3]))
490 if (src
[0] == 'm' && src
[1] == 'a' && src
[2] == 'c'
491 && ! IDENT_CHAR ((unsigned char) src
[4]))
504 if (src
[0] == 'm' && src
[1] == 'o' && src
[2] == 'd'
505 && ! IDENT_CHAR ((unsigned char) src
[4]))
510 if (src
[0] == 'f' && src
[1] == 'r')
514 if (src
[3] >= '0' && src
[3] <= '5'
515 && ! IDENT_CHAR ((unsigned char) src
[4]))
518 *reg
= 10 + src
[3] - '0';
522 if (src
[2] >= '0' && src
[2] <= '9'
523 && ! IDENT_CHAR ((unsigned char) src
[3]))
526 *reg
= (src
[2] - '0');
530 if (src
[0] == 'd' && src
[1] == 'r')
534 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
535 && ! IDENT_CHAR ((unsigned char) src
[4]))
538 *reg
= 10 + src
[3] - '0';
542 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
543 && ! IDENT_CHAR ((unsigned char) src
[3]))
546 *reg
= (src
[2] - '0');
550 if (src
[0] == 'x' && src
[1] == 'd')
554 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
555 && ! IDENT_CHAR ((unsigned char) src
[4]))
558 *reg
= 11 + src
[3] - '0';
562 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
563 && ! IDENT_CHAR ((unsigned char) src
[3]))
566 *reg
= (src
[2] - '0') + 1;
570 if (src
[0] == 'f' && src
[1] == 'v')
572 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
578 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
579 && ! IDENT_CHAR ((unsigned char) src
[3]))
582 *reg
= (src
[2] - '0');
586 if (src
[0] == 'f' && src
[1] == 'p' && src
[2] == 'u' && src
[3] == 'l'
587 && ! IDENT_CHAR ((unsigned char) src
[4]))
593 if (src
[0] == 'f' && src
[1] == 'p' && src
[2] == 's' && src
[3] == 'c'
594 && src
[4] == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
600 if (src
[0] == 'x' && src
[1] == 'm' && src
[2] == 't' && src
[3] == 'r'
601 && src
[4] == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
610 static symbolS
*dot()
614 /* JF: '.' is pseudo symbol with value of current location
615 in current segment. */
616 fake
= FAKE_LABEL_NAME
;
617 return symbol_new (fake
,
619 (valueT
) frag_now_fix (),
634 save
= input_line_pointer
;
635 input_line_pointer
= s
;
636 expression (&op
->immediate
);
637 if (op
->immediate
.X_op
== O_absent
)
638 as_bad (_("missing operand"));
639 new = input_line_pointer
;
640 input_line_pointer
= save
;
645 /* The many forms of operand:
648 @Rn Register indirect
661 pr, gbr, vbr, macl, mach
676 /* Must be predecrement */
679 len
= parse_reg (src
, &mode
, &(op
->reg
));
681 as_bad (_("illegal register after @-"));
686 else if (src
[0] == '(')
688 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
691 len
= parse_reg (src
, &mode
, &(op
->reg
));
692 if (len
&& mode
== A_REG_N
)
697 as_bad (_("must be @(r0,...)"));
701 /* Now can be rn or gbr */
702 len
= parse_reg (src
, &mode
, &(op
->reg
));
707 else if (mode
== A_REG_N
)
709 op
->type
= A_IND_R0_REG_N
;
713 as_bad (_("syntax error in @(r0,...)"));
718 /* Must be an @(disp,.. thing) */
719 src
= parse_exp (src
, op
);
722 /* Now can be rn, gbr or pc */
723 len
= parse_reg (src
, &mode
, &op
->reg
);
728 op
->type
= A_DISP_REG_N
;
730 else if (mode
== A_GBR
)
732 op
->type
= A_DISP_GBR
;
734 else if (mode
== A_PC
)
736 /* Turn a plain @(4,pc) into @(.+4,pc) */
737 if (op
->immediate
.X_op
== O_constant
) {
738 op
->immediate
.X_add_symbol
= dot();
739 op
->immediate
.X_op
= O_symbol
;
741 op
->type
= A_DISP_PC
;
745 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
750 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
755 as_bad (_("expecting )"));
761 src
+= parse_reg (src
, &mode
, &(op
->reg
));
764 as_bad (_("illegal register after @"));
769 if ((src
[0] == 'r' && src
[1] == '8')
770 || (src
[0] == 'i' && (src
[1] == 'x' || src
[1] == 's')))
775 if ((src
[0] == 'r' && src
[1] == '9')
776 || (src
[0] == 'i' && src
[1] == 'y'))
779 op
->type
= A_PMODY_N
;
793 get_operand (ptr
, op
)
804 *ptr
= parse_exp (src
, op
);
809 else if (src
[0] == '@')
811 *ptr
= parse_at (src
, op
);
814 len
= parse_reg (src
, &mode
, &(op
->reg
));
823 /* Not a reg, the only thing left is a displacement */
824 *ptr
= parse_exp (src
, op
);
825 op
->type
= A_DISP_PC
;
832 get_operands (info
, args
, operand
)
833 sh_opcode_info
*info
;
835 sh_operand_info
*operand
;
840 /* The pre-processor will eliminate whitespace in front of '@'
841 after the first argument; we may be called multiple times
842 from assemble_ppi, so don't insist on finding whitespace here. */
846 get_operand (&ptr
, operand
+ 0);
853 get_operand (&ptr
, operand
+ 1);
854 /* ??? Hack: psha/pshl have a varying operand number depending on
855 the type of the first operand. We handle this by having the
856 three-operand version first and reducing the number of operands
857 parsed to two if we see that the first operand is an immediate.
858 This works because no insn with three operands has an immediate
860 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
866 get_operand (&ptr
, operand
+ 2);
888 /* Passed a pointer to a list of opcodes which use different
889 addressing modes, return the opcode which matches the opcodes
895 get_specific (opcode
, operands
)
896 sh_opcode_info
*opcode
;
897 sh_operand_info
*operands
;
899 sh_opcode_info
*this_try
= opcode
;
900 char *name
= opcode
->name
;
905 if (this_try
->name
!= name
)
907 /* We've looked so far down the table that we've run out of
908 opcodes with the same name */
911 /* look at both operands needed by the opcodes and provided by
912 the user - since an arg test will often fail on the same arg
913 again and again, we'll try and test the last failing arg the
914 first on each opcode try */
916 for (n
= 0; this_try
->arg
[n
]; n
++)
918 sh_operand_info
*user
= operands
+ n
;
919 sh_arg_type arg
= this_try
->arg
[n
];
930 if (user
->type
!= arg
)
934 /* opcode needs r0 */
935 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
939 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
943 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
962 /* Opcode needs rn */
963 if (user
->type
!= arg
)
968 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
983 if (user
->type
!= arg
)
988 if (user
->type
!= arg
)
1000 /* Opcode needs rn */
1001 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1007 if (user
->type
!= DSP_REG_N
)
1029 if (user
->type
!= DSP_REG_N
)
1051 if (user
->type
!= DSP_REG_N
)
1073 if (user
->type
!= DSP_REG_N
)
1095 if (user
->type
!= DSP_REG_N
)
1117 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
1121 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
1125 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
1129 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
1133 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
1143 /* Opcode needs rn */
1144 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
1149 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1154 if (user
->type
!= XMTRX_M4
)
1160 printf (_("unhandled %d\n"), arg
);
1164 if ( !(valid_arch
& this_try
->arch
))
1166 valid_arch
&= this_try
->arch
;
1175 check (operand
, low
, high
)
1176 expressionS
*operand
;
1180 if (operand
->X_op
!= O_constant
1181 || operand
->X_add_number
< low
1182 || operand
->X_add_number
> high
)
1184 as_bad (_("operand must be absolute in range %d..%d"), low
, high
);
1186 return operand
->X_add_number
;
1191 insert (where
, how
, pcrel
, op
)
1195 sh_operand_info
*op
;
1197 fix_new_exp (frag_now
,
1198 where
- frag_now
->fr_literal
,
1206 build_relax (opcode
, op
)
1207 sh_opcode_info
*opcode
;
1208 sh_operand_info
*op
;
1210 int high_byte
= target_big_endian
? 0 : 1;
1213 if (opcode
->arg
[0] == A_BDISP8
)
1215 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
1216 p
= frag_var (rs_machine_dependent
,
1217 md_relax_table
[C (what
, COND32
)].rlx_length
,
1218 md_relax_table
[C (what
, COND8
)].rlx_length
,
1220 op
->immediate
.X_add_symbol
,
1221 op
->immediate
.X_add_number
,
1223 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
1225 else if (opcode
->arg
[0] == A_BDISP12
)
1227 p
= frag_var (rs_machine_dependent
,
1228 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
1229 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
1231 op
->immediate
.X_add_symbol
,
1232 op
->immediate
.X_add_number
,
1234 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
1239 /* insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1241 insert_loop_bounds (output
, operand
)
1243 sh_operand_info
*operand
;
1248 /* Since the low byte of the opcode will be overwritten by the reloc, we
1249 can just stash the high byte into both bytes and ignore endianness. */
1252 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1253 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1257 static int count
= 0;
1259 /* If the last loop insn is a two-byte-insn, it is in danger of being
1260 swapped with the insn after it. To prevent this, create a new
1261 symbol - complete with SH_LABEL reloc - after the last loop insn.
1262 If the last loop insn is four bytes long, the symbol will be
1263 right in the middle, but four byte insns are not swapped anyways. */
1264 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1265 Hence a 9 digit number should be enough to count all REPEATs. */
1267 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
1268 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
1269 /* Make this a local symbol. */
1271 SF_SET_LOCAL (end_sym
);
1272 #endif /* OBJ_COFF */
1273 symbol_table_insert (end_sym
);
1274 end_sym
->sy_value
= operand
[1].immediate
;
1275 end_sym
->sy_value
.X_add_number
+= 2;
1276 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
1279 output
= frag_more (2);
1282 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1283 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1285 return frag_more (2);
1288 /* Now we know what sort of opcodes it is, lets build the bytes. */
1290 build_Mytes (opcode
, operand
)
1291 sh_opcode_info
*opcode
;
1292 sh_operand_info
*operand
;
1297 char *output
= frag_more (2);
1298 int low_byte
= target_big_endian
? 1 : 0;
1304 for (index
= 0; index
< 4; index
++)
1306 sh_nibble_type i
= opcode
->nibbles
[index
];
1316 nbuf
[index
] = reg_n
;
1319 nbuf
[index
] = reg_m
;
1322 if (reg_n
< 2 || reg_n
> 5)
1323 as_bad (_("Invalid register: 'r%d'"), reg_n
);
1324 nbuf
[index
] = (reg_n
& 3) | 4;
1327 nbuf
[index
] = reg_n
| (reg_m
>> 2);
1330 nbuf
[index
] = reg_b
| 0x08;
1333 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
1336 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
1339 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
1342 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
1345 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
1348 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
1351 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
1354 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
1357 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
1360 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
1363 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
1366 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
1369 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
, 1, operand
);
1372 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
, 1, operand
);
1375 output
= insert_loop_bounds (output
, operand
);
1376 nbuf
[index
] = opcode
->nibbles
[3];
1380 printf (_("failed for %d\n"), i
);
1384 if (! target_big_endian
) {
1385 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
1386 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
1389 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
1390 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
1394 /* Find an opcode at the start of *STR_P in the hash table, and set
1395 *STR_P to the first character after the last one read. */
1397 static sh_opcode_info
*
1398 find_cooked_opcode (str_p
)
1402 unsigned char *op_start
;
1403 unsigned char *op_end
;
1406 /* Drop leading whitespace */
1410 /* Find the op code end.
1411 The pre-processor will eliminate whitespace in front of
1412 any '@' after the first argument; we may be called from
1413 assemble_ppi, so the opcode might be terminated by an '@'. */
1414 for (op_start
= op_end
= (unsigned char *) (str
);
1417 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
1420 unsigned char c
= op_start
[nlen
];
1422 /* The machine independent code will convert CMP/EQ into cmp/EQ
1423 because it thinks the '/' is the end of the symbol. Moreover,
1424 all but the first sub-insn is a parallel processing insn won't
1425 be capitailzed. Instead of hacking up the machine independent
1426 code, we just deal with it here. */
1427 c
= isupper (c
) ? tolower (c
) : c
;
1436 as_bad (_("can't find opcode "));
1439 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
1442 /* Assemble a parallel processing insn. */
1443 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
1445 assemble_ppi (op_end
, opcode
)
1447 sh_opcode_info
*opcode
;
1456 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
1457 Make sure we encode a defined insn pattern. */
1463 sh_operand_info operand
[3];
1465 if (opcode
->arg
[0] != A_END
)
1466 op_end
= get_operands (opcode
, op_end
, operand
);
1467 opcode
= get_specific (opcode
, operand
);
1470 /* Couldn't find an opcode which matched the operands */
1471 char *where
= frag_more (2);
1475 as_bad (_("invalid operands for opcode"));
1478 if (opcode
->nibbles
[0] != PPI
)
1479 as_bad (_("insn can't be combined with parallel processing insn"));
1481 switch (opcode
->nibbles
[1])
1486 as_bad (_("multiple movx specifications"));
1491 as_bad (_("multiple movy specifications"));
1497 as_bad (_("multiple movx specifications"));
1498 if (reg_n
< 4 || reg_n
> 5)
1499 as_bad (_("invalid movx address register"));
1500 if (opcode
->nibbles
[2] & 8)
1502 if (reg_m
== A_A1_NUM
)
1504 else if (reg_m
!= A_A0_NUM
)
1505 as_bad (_("invalid movx dsp register"));
1510 as_bad (_("invalid movx dsp register"));
1513 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
1518 as_bad (_("multiple movy specifications"));
1519 if (opcode
->nibbles
[2] & 8)
1521 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
1524 if (reg_m
== A_A1_NUM
)
1526 else if (reg_m
!= A_A0_NUM
)
1527 as_bad (_("invalid movy dsp register"));
1532 as_bad (_("invalid movy dsp register"));
1535 if (reg_n
< 6 || reg_n
> 7)
1536 as_bad (_("invalid movy address register"));
1537 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
1541 if (operand
[0].immediate
.X_op
!= O_constant
)
1542 as_bad (_("dsp immediate shift value not constant"));
1543 field_b
= ((opcode
->nibbles
[2] << 12)
1544 | (operand
[0].immediate
.X_add_number
& 127) << 4
1549 as_bad (_("multiple parallel processing specifications"));
1550 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1551 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1555 as_bad (_("multiple condition specifications"));
1556 cond
= opcode
->nibbles
[2] << 8;
1558 goto skip_cond_check
;
1562 as_bad (_("multiple parallel processing specifications"));
1563 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1564 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1570 if ((field_b
& 0xef00) != 0xa100)
1571 as_bad (_("insn cannot be combined with pmuls"));
1573 switch (field_b
& 0xf)
1576 field_b
+= 0 - A_X0_NUM
;
1579 field_b
+= 1 - A_Y0_NUM
;
1582 field_b
+= 2 - A_A0_NUM
;
1585 field_b
+= 3 - A_A1_NUM
;
1588 as_bad (_("bad padd / psub pmuls output operand"));
1591 field_b
+= 0x4000 + reg_efg
;
1598 as_bad (_("condition not followed by conditionalizable insn"));
1604 opcode
= find_cooked_opcode (&op_end
);
1608 (_("unrecognized characters at end of parallel processing insn")));
1613 move_code
= movx
| movy
;
1616 /* Parallel processing insn. */
1617 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
1619 output
= frag_more (4);
1620 if (! target_big_endian
)
1622 output
[3] = ppi_code
>> 8;
1623 output
[2] = ppi_code
;
1627 output
[2] = ppi_code
>> 8;
1628 output
[3] = ppi_code
;
1630 move_code
|= 0xf800;
1633 /* Just a double data transfer. */
1634 output
= frag_more (2);
1635 if (! target_big_endian
)
1637 output
[1] = move_code
>> 8;
1638 output
[0] = move_code
;
1642 output
[0] = move_code
>> 8;
1643 output
[1] = move_code
;
1647 /* This is the guts of the machine-dependent assembler. STR points to a
1648 machine dependent instruction. This function is supposed to emit
1649 the frags/bytes it assembles to.
1656 unsigned char *op_end
;
1657 sh_operand_info operand
[3];
1658 sh_opcode_info
*opcode
;
1660 opcode
= find_cooked_opcode (&str
);
1665 as_bad (_("unknown opcode"));
1670 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1672 /* Output a CODE reloc to tell the linker that the following
1673 bytes are instructions, not data. */
1674 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1676 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
1679 if (opcode
->nibbles
[0] == PPI
)
1681 assemble_ppi (op_end
, opcode
);
1685 if (opcode
->arg
[0] == A_BDISP12
1686 || opcode
->arg
[0] == A_BDISP8
)
1688 parse_exp (op_end
+ 1, &operand
[0]);
1689 build_relax (opcode
, &operand
[0]);
1693 if (opcode
->arg
[0] == A_END
)
1695 /* Ignore trailing whitespace. If there is any, it has already
1696 been compressed to a single space. */
1702 op_end
= get_operands (opcode
, op_end
, operand
);
1704 opcode
= get_specific (opcode
, operand
);
1708 /* Couldn't find an opcode which matched the operands */
1709 char *where
= frag_more (2);
1713 as_bad (_("invalid operands for opcode"));
1718 as_bad (_("excess operands: '%s'"), op_end
);
1720 build_Mytes (opcode
, operand
);
1725 /* This routine is called each time a label definition is seen. It
1726 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
1731 static fragS
*last_label_frag
;
1732 static int last_label_offset
;
1735 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1739 offset
= frag_now_fix ();
1740 if (frag_now
!= last_label_frag
1741 || offset
!= last_label_offset
)
1743 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
1744 last_label_frag
= frag_now
;
1745 last_label_offset
= offset
;
1750 /* This routine is called when the assembler is about to output some
1751 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
1754 sh_flush_pending_output ()
1757 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1759 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1761 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
1766 md_undefined_symbol (name
)
1773 #ifndef BFD_ASSEMBLER
1776 tc_crawl_symbol_chain (headers
)
1777 object_headers
*headers
;
1779 printf (_("call to tc_crawl_symbol_chain \n"));
1783 tc_headers_hook (headers
)
1784 object_headers
*headers
;
1786 printf (_("call to tc_headers_hook \n"));
1792 /* Various routines to kill one day */
1793 /* Equal to MAX_PRECISION in atof-ieee.c */
1794 #define MAX_LITTLENUMS 6
1796 /* Turn a string in input_line_pointer into a floating point constant of type
1797 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
1798 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
1801 md_atof (type
, litP
, sizeP
)
1807 LITTLENUM_TYPE words
[4];
1823 return _("bad call to md_atof");
1826 t
= atof_ieee (input_line_pointer
, type
, words
);
1828 input_line_pointer
= t
;
1832 if (! target_big_endian
)
1834 for (i
= prec
- 1; i
>= 0; i
--)
1836 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
1842 for (i
= 0; i
< prec
; i
++)
1844 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
1852 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
1853 call instruction. It refers to a label of the instruction which
1854 loads the register which the call uses. We use it to generate a
1855 special reloc for the linker. */
1859 int ignore ATTRIBUTE_UNUSED
;
1864 as_warn (_(".uses pseudo-op seen when not relaxing"));
1868 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
1870 as_bad (_("bad .uses format"));
1871 ignore_rest_of_line ();
1875 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
1877 demand_empty_rest_of_line ();
1880 CONST
char *md_shortopts
= "";
1881 struct option md_longopts
[] = {
1883 #define OPTION_RELAX (OPTION_MD_BASE)
1884 #define OPTION_LITTLE (OPTION_MD_BASE + 1)
1885 #define OPTION_SMALL (OPTION_LITTLE + 1)
1886 #define OPTION_DSP (OPTION_SMALL + 1)
1888 {"relax", no_argument
, NULL
, OPTION_RELAX
},
1889 {"little", no_argument
, NULL
, OPTION_LITTLE
},
1890 {"small", no_argument
, NULL
, OPTION_SMALL
},
1891 {"dsp", no_argument
, NULL
, OPTION_DSP
},
1892 {NULL
, no_argument
, NULL
, 0}
1894 size_t md_longopts_size
= sizeof(md_longopts
);
1897 md_parse_option (c
, arg
)
1899 char *arg ATTRIBUTE_UNUSED
;
1909 target_big_endian
= 0;
1928 md_show_usage (stream
)
1931 fprintf(stream
, _("\
1933 -little generate little endian code\n\
1934 -relax alter jump instructions for long displacements\n\
1935 -small align sections to 4 byte boundaries, not 16\n\
1936 -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n"));
1940 tc_Nout_fix_to_chars ()
1942 printf (_("call to tc_Nout_fix_to_chars \n"));
1946 /* This struct is used to pass arguments to sh_count_relocs through
1947 bfd_map_over_sections. */
1949 struct sh_count_relocs
1951 /* Symbol we are looking for. */
1953 /* Count of relocs found. */
1957 /* Count the number of fixups in a section which refer to a particular
1958 symbol. When using BFD_ASSEMBLER, this is called via
1959 bfd_map_over_sections. */
1963 sh_count_relocs (abfd
, sec
, data
)
1964 bfd
*abfd ATTRIBUTE_UNUSED
;
1968 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
1969 segment_info_type
*seginfo
;
1973 seginfo
= seg_info (sec
);
1974 if (seginfo
== NULL
)
1978 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
1980 if (fix
->fx_addsy
== sym
)
1988 /* Handle the count relocs for a particular section. When using
1989 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
1993 sh_frob_section (abfd
, sec
, ignore
)
1994 bfd
*abfd ATTRIBUTE_UNUSED
;
1996 PTR ignore ATTRIBUTE_UNUSED
;
1998 segment_info_type
*seginfo
;
2001 seginfo
= seg_info (sec
);
2002 if (seginfo
== NULL
)
2005 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2010 struct sh_count_relocs info
;
2012 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
2015 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2016 symbol in the same section. */
2017 sym
= fix
->fx_addsy
;
2019 || fix
->fx_subsy
!= NULL
2020 || fix
->fx_addnumber
!= 0
2021 || S_GET_SEGMENT (sym
) != sec
2022 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2023 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2025 || S_IS_EXTERNAL (sym
))
2027 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2028 _(".uses does not refer to a local symbol in the same section"));
2032 /* Look through the fixups again, this time looking for one
2033 at the same location as sym. */
2034 val
= S_GET_VALUE (sym
);
2035 for (fscan
= seginfo
->fix_root
;
2037 fscan
= fscan
->fx_next
)
2038 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
2039 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
2040 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
2041 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
2042 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
2046 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2047 _("can't find fixup pointed to by .uses"));
2051 if (fscan
->fx_tcbit
)
2053 /* We've already done this one. */
2057 /* fscan should also be a fixup to a local symbol in the same
2059 sym
= fscan
->fx_addsy
;
2061 || fscan
->fx_subsy
!= NULL
2062 || fscan
->fx_addnumber
!= 0
2063 || S_GET_SEGMENT (sym
) != sec
2064 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2065 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2067 || S_IS_EXTERNAL (sym
))
2069 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2070 _(".uses target does not refer to a local symbol in the same section"));
2074 /* Now we look through all the fixups of all the sections,
2075 counting the number of times we find a reference to sym. */
2078 #ifdef BFD_ASSEMBLER
2079 bfd_map_over_sections (stdoutput
, sh_count_relocs
, (PTR
) &info
);
2084 for (iscan
= SEG_E0
; iscan
< SEG_UNKNOWN
; iscan
++)
2085 sh_count_relocs ((bfd
*) NULL
, iscan
, (PTR
) &info
);
2092 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2093 We have already adjusted the value of sym to include the
2094 fragment address, so we undo that adjustment here. */
2095 subseg_change (sec
, 0);
2096 fix_new (symbol_get_frag (sym
),
2097 S_GET_VALUE (sym
) - symbol_get_frag (sym
)->fr_address
,
2098 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
2102 /* This function is called after the symbol table has been completed,
2103 but before the relocs or section contents have been written out.
2104 If we have seen any .uses pseudo-ops, they point to an instruction
2105 which loads a register with the address of a function. We look
2106 through the fixups to find where the function address is being
2107 loaded from. We then generate a COUNT reloc giving the number of
2108 times that function address is referred to. The linker uses this
2109 information when doing relaxing, to decide when it can eliminate
2110 the stored function address entirely. */
2118 #ifdef BFD_ASSEMBLER
2119 bfd_map_over_sections (stdoutput
, sh_frob_section
, (PTR
) NULL
);
2124 for (iseg
= SEG_E0
; iseg
< SEG_UNKNOWN
; iseg
++)
2125 sh_frob_section ((bfd
*) NULL
, iseg
, (PTR
) NULL
);
2130 /* Called after relaxing. Set the correct sizes of the fragments, and
2131 create relocs so that md_apply_fix will fill in the correct values. */
2134 md_convert_frag (headers
, seg
, fragP
)
2135 #ifdef BFD_ASSEMBLER
2136 bfd
*headers ATTRIBUTE_UNUSED
;
2138 object_headers
*headers
;
2145 switch (fragP
->fr_subtype
)
2147 case C (COND_JUMP
, COND8
):
2148 case C (COND_JUMP_DELAY
, COND8
):
2149 subseg_change (seg
, 0);
2150 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2151 1, BFD_RELOC_SH_PCDISP8BY2
);
2156 case C (UNCOND_JUMP
, UNCOND12
):
2157 subseg_change (seg
, 0);
2158 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2159 1, BFD_RELOC_SH_PCDISP12BY2
);
2164 case C (UNCOND_JUMP
, UNCOND32
):
2165 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
2166 if (fragP
->fr_symbol
== NULL
)
2167 as_bad (_("at 0x%lx, displacement overflows 12-bit field"),
2168 (unsigned long) fragP
->fr_address
);
2169 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2170 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 12-bit field"),
2171 (unsigned long) fragP
->fr_address
,
2172 S_GET_NAME (fragP
->fr_symbol
));
2174 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 12-bit field"),
2175 (unsigned long) fragP
->fr_address
,
2176 S_GET_NAME (fragP
->fr_symbol
));
2178 #if 0 /* This code works, but generates poor code and the compiler
2179 should never produce a sequence that requires it to be used. */
2181 /* A jump wont fit in 12 bits, make code which looks like
2187 int t
= buffer
[0] & 0x10;
2189 buffer
[highbyte
] = 0xa0; /* branch over move and disp */
2190 buffer
[lowbyte
] = 3;
2191 buffer
[highbyte
+2] = 0xd0 | JREG
; /* Build mov insn */
2192 buffer
[lowbyte
+2] = 0x00;
2194 buffer
[highbyte
+4] = 0; /* space for 32 bit jump disp */
2195 buffer
[lowbyte
+4] = 0;
2196 buffer
[highbyte
+6] = 0;
2197 buffer
[lowbyte
+6] = 0;
2199 buffer
[highbyte
+8] = 0x40 | JREG
; /* Build jmp @JREG */
2200 buffer
[lowbyte
+8] = t
? 0xb : 0x2b;
2202 buffer
[highbyte
+10] = 0x20; /* build nop */
2203 buffer
[lowbyte
+10] = 0x0b;
2205 /* Make reloc for the long disp */
2213 fragP
->fr_fix
+= UNCOND32_LENGTH
;
2220 case C (COND_JUMP
, COND12
):
2221 case C (COND_JUMP_DELAY
, COND12
):
2222 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop */
2223 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2224 was due to gas incorrectly relaxing an out-of-range conditional
2225 branch with delay slot. It turned:
2226 bf.s L6 (slot mov.l r12,@(44,r0))
2229 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2231 32: 10 cb mov.l r12,@(44,r0)
2232 Therefore, branches with delay slots have to be handled
2233 differently from ones without delay slots. */
2235 unsigned char *buffer
=
2236 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
2237 int highbyte
= target_big_endian
? 0 : 1;
2238 int lowbyte
= target_big_endian
? 1 : 0;
2239 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
2241 /* Toggle the true/false bit of the bcond. */
2242 buffer
[highbyte
] ^= 0x2;
2244 /* If this is a dalayed branch, we may not put the the bra in the
2245 slot. So we change it to a non-delayed branch, like that:
2246 b! cond slot_label; bra disp; slot_label: slot_insn
2247 ??? We should try if swapping the conditional branch and
2248 its delay-slot insn already makes the branch reach. */
2250 /* Build a relocation to six / four bytes farther on. */
2251 subseg_change (seg
, 0);
2252 fix_new (fragP
, fragP
->fr_fix
, 2,
2253 #ifdef BFD_ASSEMBLER
2254 section_symbol (seg
),
2256 seg_info (seg
)->dot
,
2258 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
2259 1, BFD_RELOC_SH_PCDISP8BY2
);
2261 /* Set up a jump instruction. */
2262 buffer
[highbyte
+ 2] = 0xa0;
2263 buffer
[lowbyte
+ 2] = 0;
2264 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
2265 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
2269 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
2274 /* Fill in a NOP instruction. */
2275 buffer
[highbyte
+ 4] = 0x0;
2276 buffer
[lowbyte
+ 4] = 0x9;
2285 case C (COND_JUMP
, COND32
):
2286 case C (COND_JUMP_DELAY
, COND32
):
2287 case C (COND_JUMP
, UNDEF_WORD_DISP
):
2288 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
2289 if (fragP
->fr_symbol
== NULL
)
2290 as_bad (_("at 0x%lx, displacement overflows 8-bit field"),
2291 (unsigned long) fragP
->fr_address
);
2292 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2293 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 8-bit field "),
2294 (unsigned long) fragP
->fr_address
,
2295 S_GET_NAME (fragP
->fr_symbol
));
2297 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 8-bit field "),
2298 (unsigned long) fragP
->fr_address
,
2299 S_GET_NAME (fragP
->fr_symbol
));
2301 #if 0 /* This code works, but generates poor code, and the compiler
2302 should never produce a sequence that requires it to be used. */
2304 /* A bcond won't fit and it won't go into a 12 bit
2305 displacement either, the code sequence looks like:
2314 buffer
[0] ^= 0x2; /* Toggle T/F bit */
2316 buffer
[1] = 5; /* branch over mov, jump, nop and ptr */
2317 buffer
[2] = 0xd0 | JREG
; /* Build mov insn */
2319 buffer
[4] = 0x40 | JREG
; /* Build jmp @JREG */
2321 buffer
[6] = 0x20; /* build nop */
2323 buffer
[8] = 0; /* space for 32 bit jump disp */
2329 /* Make reloc for the long disp */
2337 fragP
->fr_fix
+= COND32_LENGTH
;
2348 if (donerelax
&& !sh_relax
)
2349 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
2350 _("overflow in branch to %s; converted into longer instruction sequence"),
2351 (fragP
->fr_symbol
!= NULL
2352 ? S_GET_NAME (fragP
->fr_symbol
)
2357 md_section_align (seg
, size
)
2361 #ifdef BFD_ASSEMBLER
2364 #else /* ! OBJ_ELF */
2365 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
2366 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
2367 #endif /* ! OBJ_ELF */
2368 #else /* ! BFD_ASSEMBLER */
2369 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
2370 & (-1 << section_alignment
[(int) seg
]));
2371 #endif /* ! BFD_ASSEMBLER */
2374 /* This static variable is set by s_uacons to tell sh_cons_align that
2375 the expession does not need to be aligned. */
2377 static int sh_no_align_cons
= 0;
2379 /* This handles the unaligned space allocation pseudo-ops, such as
2380 .uaword. .uaword is just like .word, but the value does not need
2387 /* Tell sh_cons_align not to align this value. */
2388 sh_no_align_cons
= 1;
2392 /* If a .word, et. al., pseud-op is seen, warn if the value is not
2393 aligned correctly. Note that this can cause warnings to be issued
2394 when assembling initialized structured which were declared with the
2395 packed attribute. FIXME: Perhaps we should require an option to
2396 enable this warning? */
2399 sh_cons_align (nbytes
)
2405 if (sh_no_align_cons
)
2407 /* This is an unaligned pseudo-op. */
2408 sh_no_align_cons
= 0;
2413 while ((nbytes
& 1) == 0)
2422 if (now_seg
== absolute_section
)
2424 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
2425 as_warn (_("misaligned data"));
2429 p
= frag_var (rs_align_code
, 1, 1, (relax_substateT
) 0,
2430 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
2432 record_alignment (now_seg
, nalign
);
2435 /* When relaxing, we need to output a reloc for any .align directive
2436 that requests alignment to a four byte boundary or larger. This is
2437 also where we check for misaligned data. */
2440 sh_handle_align (frag
)
2444 && frag
->fr_type
== rs_align
2445 && frag
->fr_address
+ frag
->fr_fix
> 0
2446 && frag
->fr_offset
> 1
2447 && now_seg
!= bss_section
)
2448 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
2449 BFD_RELOC_SH_ALIGN
);
2451 if (frag
->fr_type
== rs_align_code
2452 && frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
!= 0)
2453 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
2456 /* This macro decides whether a particular reloc is an entry in a
2457 switch table. It is used when relaxing, because the linker needs
2458 to know about all such entries so that it can adjust them if
2461 #ifdef BFD_ASSEMBLER
2462 #define SWITCH_TABLE_CONS(fix) (0)
2464 #define SWITCH_TABLE_CONS(fix) \
2465 ((fix)->fx_r_type == 0 \
2466 && ((fix)->fx_size == 2 \
2467 || (fix)->fx_size == 1 \
2468 || (fix)->fx_size == 4))
2471 #define SWITCH_TABLE(fix) \
2472 ((fix)->fx_addsy != NULL \
2473 && (fix)->fx_subsy != NULL \
2474 && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
2475 && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
2476 && ((fix)->fx_r_type == BFD_RELOC_32 \
2477 || (fix)->fx_r_type == BFD_RELOC_16 \
2478 || (fix)->fx_r_type == BFD_RELOC_8 \
2479 || SWITCH_TABLE_CONS (fix)))
2481 /* See whether we need to force a relocation into the output file.
2482 This is used to force out switch and PC relative relocations when
2486 sh_force_relocation (fix
)
2490 if (fix
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2491 || fix
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
2492 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
2493 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
)
2499 return (fix
->fx_pcrel
2500 || SWITCH_TABLE (fix
)
2501 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
2502 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
2503 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
2504 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
2505 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
2510 sh_fix_adjustable (fixP
)
2514 if (fixP
->fx_addsy
== NULL
)
2517 /* We need the symbol name for the VTABLE entries */
2518 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2519 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
2525 void sh_elf_final_processing()
2529 /* Set file-specific flags to indicate if this code needs
2530 a processor with the sh-dsp / sh3e ISA to execute. */
2531 if (valid_arch
& arch_sh1
)
2533 else if (valid_arch
& arch_sh2
)
2535 else if (valid_arch
& arch_sh_dsp
)
2537 else if (valid_arch
& arch_sh3
)
2539 else if (valid_arch
& arch_sh3_dsp
)
2541 else if (valid_arch
& arch_sh3e
)
2543 else if (valid_arch
& arch_sh4
)
2548 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
2549 elf_elfheader (stdoutput
)->e_flags
|= val
;
2553 /* Apply a fixup to the object file. */
2555 #ifdef BFD_ASSEMBLER
2557 md_apply_fix (fixP
, valp
)
2562 md_apply_fix (fixP
, val
)
2567 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2568 int lowbyte
= target_big_endian
? 1 : 0;
2569 int highbyte
= target_big_endian
? 0 : 1;
2570 #ifdef BFD_ASSEMBLER
2576 #ifdef BFD_ASSEMBLER
2577 /* adjust_reloc_syms won't convert a reloc against a weak symbol
2578 into a reloc against a section, but bfd_install_relocation will
2579 screw up if the symbol is defined, so we have to adjust val here
2580 to avoid the screw up later. */
2581 if (fixP
->fx_addsy
!= NULL
2582 && S_IS_WEAK (fixP
->fx_addsy
))
2583 val
-= S_GET_VALUE (fixP
->fx_addsy
);
2586 #ifndef BFD_ASSEMBLER
2587 if (fixP
->fx_r_type
== 0)
2589 if (fixP
->fx_size
== 2)
2590 fixP
->fx_r_type
= BFD_RELOC_16
;
2591 else if (fixP
->fx_size
== 4)
2592 fixP
->fx_r_type
= BFD_RELOC_32
;
2593 else if (fixP
->fx_size
== 1)
2594 fixP
->fx_r_type
= BFD_RELOC_8
;
2602 switch (fixP
->fx_r_type
)
2604 case BFD_RELOC_SH_IMM4
:
2606 *buf
= (*buf
& 0xf0) | (val
& 0xf);
2609 case BFD_RELOC_SH_IMM4BY2
:
2612 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
2615 case BFD_RELOC_SH_IMM4BY4
:
2618 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
2621 case BFD_RELOC_SH_IMM8BY2
:
2627 case BFD_RELOC_SH_IMM8BY4
:
2634 case BFD_RELOC_SH_IMM8
:
2635 /* Sometimes the 8 bit value is sign extended (e.g., add) and
2636 sometimes it is not (e.g., and). We permit any 8 bit value.
2637 Note that adding further restrictions may invalidate
2638 reasonable looking assembly code, such as ``and -0x1,r0''. */
2644 case BFD_RELOC_SH_PCRELIMM8BY4
:
2645 /* The lower two bits of the PC are cleared before the
2646 displacement is added in. We can assume that the destination
2647 is on a 4 byte bounday. If this instruction is also on a 4
2648 byte boundary, then we want
2650 and target - here is a multiple of 4.
2651 Otherwise, we are on a 2 byte boundary, and we want
2652 (target - (here - 2)) / 4
2653 and target - here is not a multiple of 4. Computing
2654 (target - (here - 2)) / 4 == (target - here + 2) / 4
2655 works for both cases, since in the first case the addition of
2656 2 will be removed by the division. target - here is in the
2658 val
= (val
+ 2) / 4;
2660 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2664 case BFD_RELOC_SH_PCRELIMM8BY2
:
2667 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2671 case BFD_RELOC_SH_PCDISP8BY2
:
2673 if (val
< -0x80 || val
> 0x7f)
2674 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2678 case BFD_RELOC_SH_PCDISP12BY2
:
2680 if (val
< -0x800 || val
>= 0x7ff)
2681 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2682 buf
[lowbyte
] = val
& 0xff;
2683 buf
[highbyte
] |= (val
>> 8) & 0xf;
2687 if (! target_big_endian
)
2704 if (! target_big_endian
)
2716 case BFD_RELOC_SH_USES
:
2717 /* Pass the value into sh_coff_reloc_mangle. */
2718 fixP
->fx_addnumber
= val
;
2721 case BFD_RELOC_SH_COUNT
:
2722 case BFD_RELOC_SH_ALIGN
:
2723 case BFD_RELOC_SH_CODE
:
2724 case BFD_RELOC_SH_DATA
:
2725 case BFD_RELOC_SH_LABEL
:
2726 /* Nothing to do here. */
2729 case BFD_RELOC_SH_LOOP_START
:
2730 case BFD_RELOC_SH_LOOP_END
:
2732 case BFD_RELOC_VTABLE_INHERIT
:
2733 case BFD_RELOC_VTABLE_ENTRY
:
2735 #ifdef BFD_ASSEMBLER
2747 if ((val
& ((1 << shift
) - 1)) != 0)
2748 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
2752 val
= ((val
>> shift
)
2753 | ((long) -1 & ~ ((long) -1 >> shift
)));
2755 if (max
!= 0 && (val
< min
|| val
> max
))
2756 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
2758 #ifdef BFD_ASSEMBLER
2763 /* Called just before address relaxation. Return the length
2764 by which a fragment must grow to reach it's destination. */
2767 md_estimate_size_before_relax (fragP
, segment_type
)
2768 register fragS
*fragP
;
2769 register segT segment_type
;
2771 switch (fragP
->fr_subtype
)
2773 case C (UNCOND_JUMP
, UNDEF_DISP
):
2774 /* used to be a branch to somewhere which was unknown */
2775 if (!fragP
->fr_symbol
)
2777 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
2778 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
;
2780 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
2782 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
2783 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
;
2787 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
2788 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
;
2789 return md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
;
2795 case C (COND_JUMP
, UNDEF_DISP
):
2796 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
2797 /* used to be a branch to somewhere which was unknown */
2798 if (fragP
->fr_symbol
2799 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
2801 int what
= GET_WHAT (fragP
->fr_subtype
);
2802 /* Got a symbol and it's defined in this segment, become byte
2803 sized - maybe it will fix up */
2804 fragP
->fr_subtype
= C (what
, COND8
);
2805 fragP
->fr_var
= md_relax_table
[C (what
, COND8
)].rlx_length
;
2807 else if (fragP
->fr_symbol
)
2809 int what
= GET_WHAT (fragP
->fr_subtype
);
2810 /* Its got a segment, but its not ours, so it will always be long */
2811 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
2812 fragP
->fr_var
= md_relax_table
[C (what
, COND32
)].rlx_length
;
2813 return md_relax_table
[C (what
, COND32
)].rlx_length
;
2817 int what
= GET_WHAT (fragP
->fr_subtype
);
2818 /* We know the abs value */
2819 fragP
->fr_subtype
= C (what
, COND8
);
2820 fragP
->fr_var
= md_relax_table
[C (what
, COND8
)].rlx_length
;
2825 return fragP
->fr_var
;
2828 /* Put number into target byte order */
2831 md_number_to_chars (ptr
, use
, nbytes
)
2836 if (! target_big_endian
)
2837 number_to_chars_littleendian (ptr
, use
, nbytes
);
2839 number_to_chars_bigendian (ptr
, use
, nbytes
);
2843 md_pcrel_from (fixP
)
2846 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
2852 tc_coff_sizemachdep (frag
)
2855 return md_relax_table
[frag
->fr_subtype
].rlx_length
;
2858 #endif /* OBJ_COFF */
2860 /* When we align the .text section, insert the correct NOP pattern. */
2863 sh_do_align (n
, fill
, len
, max
)
2866 int len ATTRIBUTE_UNUSED
;
2870 && subseg_text_p (now_seg
)
2873 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
2874 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
2876 /* First align to a 2 byte boundary, in case there is an odd
2878 frag_align (1, 0, 0);
2879 if (target_big_endian
)
2880 frag_align_pattern (n
, big_nop_pattern
, sizeof big_nop_pattern
, max
);
2882 frag_align_pattern (n
, little_nop_pattern
, sizeof little_nop_pattern
,
2890 #ifndef BFD_ASSEMBLER
2893 /* Map BFD relocs to SH COFF relocs. */
2897 bfd_reloc_code_real_type bfd_reloc
;
2901 static const struct reloc_map coff_reloc_map
[] =
2903 { BFD_RELOC_32
, R_SH_IMM32
},
2904 { BFD_RELOC_16
, R_SH_IMM16
},
2905 { BFD_RELOC_8
, R_SH_IMM8
},
2906 { BFD_RELOC_SH_PCDISP8BY2
, R_SH_PCDISP8BY2
},
2907 { BFD_RELOC_SH_PCDISP12BY2
, R_SH_PCDISP
},
2908 { BFD_RELOC_SH_IMM4
, R_SH_IMM4
},
2909 { BFD_RELOC_SH_IMM4BY2
, R_SH_IMM4BY2
},
2910 { BFD_RELOC_SH_IMM4BY4
, R_SH_IMM4BY4
},
2911 { BFD_RELOC_SH_IMM8
, R_SH_IMM8
},
2912 { BFD_RELOC_SH_IMM8BY2
, R_SH_IMM8BY2
},
2913 { BFD_RELOC_SH_IMM8BY4
, R_SH_IMM8BY4
},
2914 { BFD_RELOC_SH_PCRELIMM8BY2
, R_SH_PCRELIMM8BY2
},
2915 { BFD_RELOC_SH_PCRELIMM8BY4
, R_SH_PCRELIMM8BY4
},
2916 { BFD_RELOC_8_PCREL
, R_SH_SWITCH8
},
2917 { BFD_RELOC_SH_SWITCH16
, R_SH_SWITCH16
},
2918 { BFD_RELOC_SH_SWITCH32
, R_SH_SWITCH32
},
2919 { BFD_RELOC_SH_USES
, R_SH_USES
},
2920 { BFD_RELOC_SH_COUNT
, R_SH_COUNT
},
2921 { BFD_RELOC_SH_ALIGN
, R_SH_ALIGN
},
2922 { BFD_RELOC_SH_CODE
, R_SH_CODE
},
2923 { BFD_RELOC_SH_DATA
, R_SH_DATA
},
2924 { BFD_RELOC_SH_LABEL
, R_SH_LABEL
},
2925 { BFD_RELOC_UNUSED
, 0 }
2928 /* Adjust a reloc for the SH. This is similar to the generic code,
2929 but does some minor tweaking. */
2932 sh_coff_reloc_mangle (seg
, fix
, intr
, paddr
)
2933 segment_info_type
*seg
;
2935 struct internal_reloc
*intr
;
2938 symbolS
*symbol_ptr
= fix
->fx_addsy
;
2941 intr
->r_vaddr
= paddr
+ fix
->fx_frag
->fr_address
+ fix
->fx_where
;
2943 if (! SWITCH_TABLE (fix
))
2945 const struct reloc_map
*rm
;
2947 for (rm
= coff_reloc_map
; rm
->bfd_reloc
!= BFD_RELOC_UNUSED
; rm
++)
2948 if (rm
->bfd_reloc
== (bfd_reloc_code_real_type
) fix
->fx_r_type
)
2950 if (rm
->bfd_reloc
== BFD_RELOC_UNUSED
)
2951 as_bad_where (fix
->fx_file
, fix
->fx_line
,
2952 _("Can not represent %s relocation in this object file format"),
2953 bfd_get_reloc_code_name (fix
->fx_r_type
));
2954 intr
->r_type
= rm
->sh_reloc
;
2961 if (fix
->fx_r_type
== BFD_RELOC_16
)
2962 intr
->r_type
= R_SH_SWITCH16
;
2963 else if (fix
->fx_r_type
== BFD_RELOC_8
)
2964 intr
->r_type
= R_SH_SWITCH8
;
2965 else if (fix
->fx_r_type
== BFD_RELOC_32
)
2966 intr
->r_type
= R_SH_SWITCH32
;
2970 /* For a switch reloc, we set r_offset to the difference between
2971 the reloc address and the subtrahend. When the linker is
2972 doing relaxing, it can use the determine the starting and
2973 ending points of the switch difference expression. */
2974 intr
->r_offset
= intr
->r_vaddr
- S_GET_VALUE (fix
->fx_subsy
);
2977 /* PC relative relocs are always against the current section. */
2978 if (symbol_ptr
== NULL
)
2980 switch (fix
->fx_r_type
)
2982 case BFD_RELOC_SH_PCRELIMM8BY2
:
2983 case BFD_RELOC_SH_PCRELIMM8BY4
:
2984 case BFD_RELOC_SH_PCDISP8BY2
:
2985 case BFD_RELOC_SH_PCDISP12BY2
:
2986 case BFD_RELOC_SH_USES
:
2987 symbol_ptr
= seg
->dot
;
2994 if (fix
->fx_r_type
== BFD_RELOC_SH_USES
)
2996 /* We can't store the offset in the object file, since this
2997 reloc does not take up any space, so we store it in r_offset.
2998 The fx_addnumber field was set in md_apply_fix. */
2999 intr
->r_offset
= fix
->fx_addnumber
;
3001 else if (fix
->fx_r_type
== BFD_RELOC_SH_COUNT
)
3003 /* We can't store the count in the object file, since this reloc
3004 does not take up any space, so we store it in r_offset. The
3005 fx_offset field was set when the fixup was created in
3006 sh_coff_frob_file. */
3007 intr
->r_offset
= fix
->fx_offset
;
3008 /* This reloc is always absolute. */
3011 else if (fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
)
3013 /* Store the alignment in the r_offset field. */
3014 intr
->r_offset
= fix
->fx_offset
;
3015 /* This reloc is always absolute. */
3018 else if (fix
->fx_r_type
== BFD_RELOC_SH_CODE
3019 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3020 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
)
3022 /* These relocs are always absolute. */
3026 /* Turn the segment of the symbol into an offset. */
3027 if (symbol_ptr
!= NULL
)
3029 dot
= segment_info
[S_GET_SEGMENT (symbol_ptr
)].dot
;
3031 intr
->r_symndx
= dot
->sy_number
;
3033 intr
->r_symndx
= symbol_ptr
->sy_number
;
3036 intr
->r_symndx
= -1;
3039 #endif /* OBJ_COFF */
3040 #endif /* ! BFD_ASSEMBLER */
3042 #ifdef BFD_ASSEMBLER
3044 /* Create a reloc. */
3047 tc_gen_reloc (section
, fixp
)
3048 asection
*section ATTRIBUTE_UNUSED
;
3052 bfd_reloc_code_real_type r_type
;
3054 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3055 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
3056 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
3057 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3059 r_type
= fixp
->fx_r_type
;
3061 if (SWITCH_TABLE (fixp
))
3063 rel
->addend
= rel
->address
- S_GET_VALUE (fixp
->fx_subsy
);
3064 if (r_type
== BFD_RELOC_16
)
3065 r_type
= BFD_RELOC_SH_SWITCH16
;
3066 else if (r_type
== BFD_RELOC_8
)
3067 r_type
= BFD_RELOC_8_PCREL
;
3068 else if (r_type
== BFD_RELOC_32
)
3069 r_type
= BFD_RELOC_SH_SWITCH32
;
3073 else if (r_type
== BFD_RELOC_SH_USES
)
3074 rel
->addend
= fixp
->fx_addnumber
;
3075 else if (r_type
== BFD_RELOC_SH_COUNT
)
3076 rel
->addend
= fixp
->fx_offset
;
3077 else if (r_type
== BFD_RELOC_SH_ALIGN
)
3078 rel
->addend
= fixp
->fx_offset
;
3079 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
3080 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
3081 rel
->addend
= fixp
->fx_offset
;
3082 else if (r_type
== BFD_RELOC_SH_LOOP_START
3083 || r_type
== BFD_RELOC_SH_LOOP_END
)
3084 rel
->addend
= fixp
->fx_offset
;
3085 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
3088 rel
->address
= rel
->addend
= fixp
->fx_offset
;
3090 else if (fixp
->fx_pcrel
)
3091 rel
->addend
= fixp
->fx_addnumber
;
3095 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
3096 if (rel
->howto
== NULL
)
3098 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3099 _("Cannot represent relocation type %s"),
3100 bfd_get_reloc_code_name (r_type
));
3101 /* Set howto to a garbage value so that we can keep going. */
3102 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3103 assert (rel
->howto
!= NULL
);
3109 #endif /* BFD_ASSEMBLER */