1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright (C) 1993-2014 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19 Boston, MA 02110-1301, USA. */
21 /* Written By Steve Chamberlain <sac@cygnus.com> */
26 #include "opcodes/sh-opc.h"
27 #include "safe-ctype.h"
28 #include "struc-symbol.h"
34 #include "dwarf2dbg.h"
35 #include "dw2gencfi.h"
41 expressionS immediate
;
45 const char comment_chars
[] = "!";
46 const char line_separator_chars
[] = ";";
47 const char line_comment_chars
[] = "!#";
49 static void s_uses (int);
50 static void s_uacons (int);
53 static void sh_elf_cons (int);
55 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
59 big (int ignore ATTRIBUTE_UNUSED
)
61 if (! target_big_endian
)
62 as_bad (_("directive .big encountered when option -big required"));
64 /* Stop further messages. */
65 target_big_endian
= 1;
69 little (int ignore ATTRIBUTE_UNUSED
)
71 if (target_big_endian
)
72 as_bad (_("directive .little encountered when option -little required"));
74 /* Stop further messages. */
75 target_big_endian
= 0;
78 /* This table describes all the machine specific pseudo-ops the assembler
79 has to support. The fields are:
80 pseudo-op name without dot
81 function to call to execute this pseudo-op
82 Integer arg to pass to the function. */
84 const pseudo_typeS md_pseudo_table
[] =
87 {"long", sh_elf_cons
, 4},
88 {"int", sh_elf_cons
, 4},
89 {"word", sh_elf_cons
, 2},
90 {"short", sh_elf_cons
, 2},
96 {"form", listing_psize
, 0},
97 {"little", little
, 0},
98 {"heading", listing_title
, 0},
99 {"import", s_ignore
, 0},
100 {"page", listing_eject
, 0},
101 {"program", s_ignore
, 0},
103 {"uaword", s_uacons
, 2},
104 {"ualong", s_uacons
, 4},
105 {"uaquad", s_uacons
, 8},
106 {"2byte", s_uacons
, 2},
107 {"4byte", s_uacons
, 4},
108 {"8byte", s_uacons
, 8},
110 {"mode", s_sh64_mode
, 0 },
112 /* Have the old name too. */
113 {"isa", s_sh64_mode
, 0 },
115 /* Assert that the right ABI is used. */
116 {"abi", s_sh64_abi
, 0 },
118 { "vtable_inherit", sh64_vtable_inherit
, 0 },
119 { "vtable_entry", sh64_vtable_entry
, 0 },
120 #endif /* HAVE_SH64 */
124 int sh_relax
; /* set if -relax seen */
126 /* Whether -small was seen. */
130 /* Flag to generate relocations against symbol values for local symbols. */
132 static int dont_adjust_reloc_32
;
134 /* Flag to indicate that '$' is allowed as a register prefix. */
136 static int allow_dollar_register_prefix
;
138 /* Preset architecture set, if given; zero otherwise. */
140 static unsigned int preset_target_arch
;
142 /* The bit mask of architectures that could
143 accommodate the insns seen so far. */
144 static unsigned int valid_arch
;
147 /* Whether --fdpic was given. */
151 const char EXP_CHARS
[] = "eE";
153 /* Chars that mean this number is a floating point constant. */
156 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
158 #define C(a,b) ENCODE_RELAX(a,b)
160 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
161 #define GET_WHAT(x) ((x>>4))
163 /* These are the three types of relaxable instruction. */
164 /* These are the types of relaxable instructions; except for END which is
167 #define COND_JUMP_DELAY 2
168 #define UNCOND_JUMP 3
172 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
173 #define SH64PCREL16_32 4
174 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
175 #define SH64PCREL16_64 5
177 /* Variants of the above for adjusting the insn to PTA or PTB according to
179 #define SH64PCREL16PT_32 6
180 #define SH64PCREL16PT_64 7
182 /* A MOVI expansion, expanding to at most 32 or 64 bits. */
183 #define MOVI_IMM_32 8
184 #define MOVI_IMM_32_PCREL 9
185 #define MOVI_IMM_64 10
186 #define MOVI_IMM_64_PCREL 11
189 #else /* HAVE_SH64 */
193 #endif /* HAVE_SH64 */
199 #define UNDEF_WORD_DISP 4
205 #define UNDEF_SH64PCREL 0
206 #define SH64PCREL16 1
207 #define SH64PCREL32 2
208 #define SH64PCREL48 3
209 #define SH64PCREL64 4
210 #define SH64PCRELPLT 5
218 #define MOVI_GOTOFF 6
220 #endif /* HAVE_SH64 */
222 /* Branch displacements are from the address of the branch plus
223 four, thus all minimum and maximum values have 4 added to them. */
226 #define COND8_LENGTH 2
228 /* There is one extra instruction before the branch, so we must add
229 two more bytes to account for it. */
230 #define COND12_F 4100
231 #define COND12_M -4090
232 #define COND12_LENGTH 6
234 #define COND12_DELAY_LENGTH 4
236 /* ??? The minimum and maximum values are wrong, but this does not matter
237 since this relocation type is not supported yet. */
238 #define COND32_F (1<<30)
239 #define COND32_M -(1<<30)
240 #define COND32_LENGTH 14
242 #define UNCOND12_F 4098
243 #define UNCOND12_M -4092
244 #define UNCOND12_LENGTH 2
246 /* ??? The minimum and maximum values are wrong, but this does not matter
247 since this relocation type is not supported yet. */
248 #define UNCOND32_F (1<<30)
249 #define UNCOND32_M -(1<<30)
250 #define UNCOND32_LENGTH 14
253 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
254 TRd" as is the current insn, so no extra length. Note that the "reach"
255 is calculated from the address *after* that insn, but the offset in the
256 insn is calculated from the beginning of the insn. We also need to
257 take into account the implicit 1 coded as the "A" in PTA when counting
258 forward. If PTB reaches an odd address, we trap that as an error
259 elsewhere, so we don't have to have different relaxation entries. We
260 don't add a one to the negative range, since PTB would then have the
261 farthest backward-reaching value skipped, not generated at relaxation. */
262 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
263 #define SH64PCREL16_M (-32768 * 4 - 4)
264 #define SH64PCREL16_LENGTH 0
266 /* The next step is to change that PT insn into
267 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
268 SHORI (label - datalabel Ln) & 65535, R25
271 which means two extra insns, 8 extra bytes. This is the limit for the
274 The expressions look a bit bad since we have to adjust this to avoid overflow on a
276 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
277 #define SH64PCREL32_LENGTH (2 * 4)
279 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
281 #if BFD_HOST_64BIT_LONG
282 /* The "reach" type is long, so we can only do this for a 64-bit-long
284 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4)
285 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
286 #define SH64PCREL48_M (((long) -1 << 47) - 4)
287 #define SH64PCREL48_LENGTH (3 * 4)
289 /* If the host does not have 64-bit longs, just make this state identical
290 in reach to the 32-bit state. Note that we have a slightly incorrect
291 reach, but the correct one above will overflow a 32-bit number. */
292 #define SH64PCREL32_M (((long) -1 << 30) * 2)
293 #define SH64PCREL48_F SH64PCREL32_F
294 #define SH64PCREL48_M SH64PCREL32_M
295 #define SH64PCREL48_LENGTH (3 * 4)
296 #endif /* BFD_HOST_64BIT_LONG */
298 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
300 #define SH64PCREL64_LENGTH (4 * 4)
302 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
303 SH64PCREL expansions. The PCREL one is similar, but the other has no
304 pc-relative reach; it must be fully expanded in
305 shmedia_md_estimate_size_before_relax. */
306 #define MOVI_16_LENGTH 0
307 #define MOVI_16_F (32767 - 4)
308 #define MOVI_16_M (-32768 - 4)
309 #define MOVI_32_LENGTH 4
310 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
311 #define MOVI_48_LENGTH 8
313 #if BFD_HOST_64BIT_LONG
314 /* The "reach" type is long, so we can only do this for a 64-bit-long
316 #define MOVI_32_M (((long) -1 << 30) * 2 - 4)
317 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
318 #define MOVI_48_M (((long) -1 << 47) - 4)
320 /* If the host does not have 64-bit longs, just make this state identical
321 in reach to the 32-bit state. Note that we have a slightly incorrect
322 reach, but the correct one above will overflow a 32-bit number. */
323 #define MOVI_32_M (((long) -1 << 30) * 2)
324 #define MOVI_48_F MOVI_32_F
325 #define MOVI_48_M MOVI_32_M
326 #endif /* BFD_HOST_64BIT_LONG */
328 #define MOVI_64_LENGTH 12
329 #endif /* HAVE_SH64 */
331 #define EMPTY { 0, 0, 0, 0 }
333 const relax_typeS md_relax_table
[C (END
, 0)] = {
334 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
335 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
338 /* C (COND_JUMP, COND8) */
339 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
340 /* C (COND_JUMP, COND12) */
341 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
342 /* C (COND_JUMP, COND32) */
343 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
344 /* C (COND_JUMP, UNDEF_WORD_DISP) */
345 { 0, 0, COND32_LENGTH
, 0, },
347 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
350 /* C (COND_JUMP_DELAY, COND8) */
351 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
352 /* C (COND_JUMP_DELAY, COND12) */
353 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
354 /* C (COND_JUMP_DELAY, COND32) */
355 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
356 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
357 { 0, 0, COND32_LENGTH
, 0, },
359 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
362 /* C (UNCOND_JUMP, UNCOND12) */
363 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
364 /* C (UNCOND_JUMP, UNCOND32) */
365 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
367 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
368 { 0, 0, UNCOND32_LENGTH
, 0, },
370 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
373 /* C (SH64PCREL16_32, SH64PCREL16) */
375 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_32
, SH64PCREL32
) },
376 /* C (SH64PCREL16_32, SH64PCREL32) */
377 { 0, 0, SH64PCREL32_LENGTH
, 0 },
379 /* C (SH64PCREL16_32, SH64PCRELPLT) */
380 { 0, 0, SH64PCREL32_LENGTH
, 0 },
382 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
384 /* C (SH64PCREL16_64, SH64PCREL16) */
386 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_64
, SH64PCREL32
) },
387 /* C (SH64PCREL16_64, SH64PCREL32) */
388 { SH64PCREL32_F
, SH64PCREL32_M
, SH64PCREL32_LENGTH
, C (SH64PCREL16_64
, SH64PCREL48
) },
389 /* C (SH64PCREL16_64, SH64PCREL48) */
390 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16_64
, SH64PCREL64
) },
391 /* C (SH64PCREL16_64, SH64PCREL64) */
392 { 0, 0, SH64PCREL64_LENGTH
, 0 },
393 /* C (SH64PCREL16_64, SH64PCRELPLT) */
394 { 0, 0, SH64PCREL64_LENGTH
, 0 },
396 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
398 /* C (SH64PCREL16PT_32, SH64PCREL16) */
400 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_32
, SH64PCREL32
) },
401 /* C (SH64PCREL16PT_32, SH64PCREL32) */
402 { 0, 0, SH64PCREL32_LENGTH
, 0 },
404 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
405 { 0, 0, SH64PCREL32_LENGTH
, 0 },
407 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
409 /* C (SH64PCREL16PT_64, SH64PCREL16) */
411 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL32
) },
412 /* C (SH64PCREL16PT_64, SH64PCREL32) */
416 C (SH64PCREL16PT_64
, SH64PCREL48
) },
417 /* C (SH64PCREL16PT_64, SH64PCREL48) */
418 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL64
) },
419 /* C (SH64PCREL16PT_64, SH64PCREL64) */
420 { 0, 0, SH64PCREL64_LENGTH
, 0 },
421 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
422 { 0, 0, SH64PCREL64_LENGTH
, 0},
424 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
426 /* C (MOVI_IMM_32, UNDEF_MOVI) */
427 { 0, 0, MOVI_32_LENGTH
, 0 },
428 /* C (MOVI_IMM_32, MOVI_16) */
429 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32
, MOVI_32
) },
430 /* C (MOVI_IMM_32, MOVI_32) */
431 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, 0 },
433 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
434 { 0, 0, MOVI_32_LENGTH
, 0 },
435 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
437 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
439 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32_PCREL
, MOVI_32
) },
440 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
441 { 0, 0, MOVI_32_LENGTH
, 0 },
443 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
444 { 0, 0, MOVI_32_LENGTH
, 0 },
446 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
447 { 0, 0, MOVI_32_LENGTH
, 0 },
448 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
450 /* C (MOVI_IMM_64, UNDEF_MOVI) */
451 { 0, 0, MOVI_64_LENGTH
, 0 },
452 /* C (MOVI_IMM_64, MOVI_16) */
453 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64
, MOVI_32
) },
454 /* C (MOVI_IMM_64, MOVI_32) */
455 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64
, MOVI_48
) },
456 /* C (MOVI_IMM_64, MOVI_48) */
457 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64
, MOVI_64
) },
458 /* C (MOVI_IMM_64, MOVI_64) */
459 { 0, 0, MOVI_64_LENGTH
, 0 },
461 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
462 { 0, 0, MOVI_64_LENGTH
, 0 },
463 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
465 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
467 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_32
) },
468 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
469 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_48
) },
470 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
471 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_64
) },
472 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
473 { 0, 0, MOVI_64_LENGTH
, 0 },
474 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
475 { 0, 0, MOVI_64_LENGTH
, 0 },
477 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
478 { 0, 0, MOVI_64_LENGTH
, 0 },
479 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
481 #endif /* HAVE_SH64 */
487 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
491 /* Determinet whether the symbol needs any kind of PIC relocation. */
494 sh_PIC_related_p (symbolS
*sym
)
501 if (sym
== GOT_symbol
)
505 if (sh_PIC_related_p (*symbol_get_tc (sym
)))
509 exp
= symbol_get_value_expression (sym
);
511 return (exp
->X_op
== O_PIC_reloc
512 || sh_PIC_related_p (exp
->X_add_symbol
)
513 || sh_PIC_related_p (exp
->X_op_symbol
));
516 /* Determine the relocation type to be used to represent the
517 expression, that may be rearranged. */
520 sh_check_fixup (expressionS
*main_exp
, bfd_reloc_code_real_type
*r_type_p
)
522 expressionS
*exp
= main_exp
;
524 /* This is here for backward-compatibility only. GCC used to generated:
526 f@PLT + . - (.LPCS# + 2)
528 but we'd rather be able to handle this as a PIC-related reference
529 plus/minus a symbol. However, gas' parser gives us:
531 O_subtract (O_add (f@PLT, .), .LPCS#+2)
533 so we attempt to transform this into:
535 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
537 which we can handle simply below. */
538 if (exp
->X_op
== O_subtract
)
540 if (sh_PIC_related_p (exp
->X_op_symbol
))
543 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
545 if (exp
&& sh_PIC_related_p (exp
->X_op_symbol
))
548 if (exp
&& exp
->X_op
== O_add
549 && sh_PIC_related_p (exp
->X_add_symbol
))
551 symbolS
*sym
= exp
->X_add_symbol
;
553 exp
->X_op
= O_subtract
;
554 exp
->X_add_symbol
= main_exp
->X_op_symbol
;
556 main_exp
->X_op_symbol
= main_exp
->X_add_symbol
;
557 main_exp
->X_add_symbol
= sym
;
559 main_exp
->X_add_number
+= exp
->X_add_number
;
560 exp
->X_add_number
= 0;
565 else if (exp
->X_op
== O_add
&& sh_PIC_related_p (exp
->X_op_symbol
))
568 if (exp
->X_op
== O_symbol
|| exp
->X_op
== O_add
|| exp
->X_op
== O_subtract
)
571 if (exp
->X_add_symbol
572 && (exp
->X_add_symbol
== GOT_symbol
574 && *symbol_get_tc (exp
->X_add_symbol
) == GOT_symbol
)))
578 case BFD_RELOC_SH_IMM_LOW16
:
579 *r_type_p
= BFD_RELOC_SH_GOTPC_LOW16
;
582 case BFD_RELOC_SH_IMM_MEDLOW16
:
583 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDLOW16
;
586 case BFD_RELOC_SH_IMM_MEDHI16
:
587 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDHI16
;
590 case BFD_RELOC_SH_IMM_HI16
:
591 *r_type_p
= BFD_RELOC_SH_GOTPC_HI16
;
595 case BFD_RELOC_UNUSED
:
596 *r_type_p
= BFD_RELOC_SH_GOTPC
;
605 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
607 *r_type_p
= BFD_RELOC_SH_GOTPC
;
611 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
616 if (exp
->X_op
== O_PIC_reloc
)
621 case BFD_RELOC_UNUSED
:
622 *r_type_p
= exp
->X_md
;
625 case BFD_RELOC_SH_DISP20
:
628 case BFD_RELOC_32_GOT_PCREL
:
629 *r_type_p
= BFD_RELOC_SH_GOT20
;
632 case BFD_RELOC_32_GOTOFF
:
633 *r_type_p
= BFD_RELOC_SH_GOTOFF20
;
636 case BFD_RELOC_SH_GOTFUNCDESC
:
637 *r_type_p
= BFD_RELOC_SH_GOTFUNCDESC20
;
640 case BFD_RELOC_SH_GOTOFFFUNCDESC
:
641 *r_type_p
= BFD_RELOC_SH_GOTOFFFUNCDESC20
;
650 case BFD_RELOC_SH_IMM_LOW16
:
653 case BFD_RELOC_32_GOTOFF
:
654 *r_type_p
= BFD_RELOC_SH_GOTOFF_LOW16
;
657 case BFD_RELOC_SH_GOTPLT32
:
658 *r_type_p
= BFD_RELOC_SH_GOTPLT_LOW16
;
661 case BFD_RELOC_32_GOT_PCREL
:
662 *r_type_p
= BFD_RELOC_SH_GOT_LOW16
;
665 case BFD_RELOC_32_PLT_PCREL
:
666 *r_type_p
= BFD_RELOC_SH_PLT_LOW16
;
674 case BFD_RELOC_SH_IMM_MEDLOW16
:
677 case BFD_RELOC_32_GOTOFF
:
678 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDLOW16
;
681 case BFD_RELOC_SH_GOTPLT32
:
682 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDLOW16
;
685 case BFD_RELOC_32_GOT_PCREL
:
686 *r_type_p
= BFD_RELOC_SH_GOT_MEDLOW16
;
689 case BFD_RELOC_32_PLT_PCREL
:
690 *r_type_p
= BFD_RELOC_SH_PLT_MEDLOW16
;
698 case BFD_RELOC_SH_IMM_MEDHI16
:
701 case BFD_RELOC_32_GOTOFF
:
702 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDHI16
;
705 case BFD_RELOC_SH_GOTPLT32
:
706 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDHI16
;
709 case BFD_RELOC_32_GOT_PCREL
:
710 *r_type_p
= BFD_RELOC_SH_GOT_MEDHI16
;
713 case BFD_RELOC_32_PLT_PCREL
:
714 *r_type_p
= BFD_RELOC_SH_PLT_MEDHI16
;
722 case BFD_RELOC_SH_IMM_HI16
:
725 case BFD_RELOC_32_GOTOFF
:
726 *r_type_p
= BFD_RELOC_SH_GOTOFF_HI16
;
729 case BFD_RELOC_SH_GOTPLT32
:
730 *r_type_p
= BFD_RELOC_SH_GOTPLT_HI16
;
733 case BFD_RELOC_32_GOT_PCREL
:
734 *r_type_p
= BFD_RELOC_SH_GOT_HI16
;
737 case BFD_RELOC_32_PLT_PCREL
:
738 *r_type_p
= BFD_RELOC_SH_PLT_HI16
;
751 exp
->X_op
= O_symbol
;
754 main_exp
->X_add_symbol
= exp
->X_add_symbol
;
755 main_exp
->X_add_number
+= exp
->X_add_number
;
759 return (sh_PIC_related_p (exp
->X_add_symbol
)
760 || sh_PIC_related_p (exp
->X_op_symbol
));
765 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
768 sh_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
)
770 bfd_reloc_code_real_type r_type
= BFD_RELOC_UNUSED
;
772 if (sh_check_fixup (exp
, &r_type
))
773 as_bad (_("Invalid PIC expression."));
775 if (r_type
== BFD_RELOC_UNUSED
)
779 r_type
= BFD_RELOC_8
;
783 r_type
= BFD_RELOC_16
;
787 r_type
= BFD_RELOC_32
;
791 r_type
= BFD_RELOC_64
;
800 as_bad (_("unsupported BFD relocation size %u"), size
);
801 r_type
= BFD_RELOC_UNUSED
;
804 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
807 /* The regular cons() function, that reads constants, doesn't support
808 suffixes such as @GOT, @GOTOFF and @PLT, that generate
809 machine-specific relocation types. So we must define it here. */
810 /* Clobbers input_line_pointer, checks end-of-line. */
811 /* NBYTES 1=.byte, 2=.word, 4=.long */
813 sh_elf_cons (register int nbytes
)
819 /* Update existing range to include a previous insn, if there was one. */
820 sh64_update_contents_mark (TRUE
);
822 /* We need to make sure the contents type is set to data. */
825 #endif /* HAVE_SH64 */
827 if (is_it_end_of_statement ())
829 demand_empty_rest_of_line ();
834 md_cons_align (nbytes
);
840 emit_expr (&exp
, (unsigned int) nbytes
);
842 while (*input_line_pointer
++ == ',');
844 input_line_pointer
--; /* Put terminator back into stream. */
845 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
847 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
850 demand_empty_rest_of_line ();
853 /* The regular frag_offset_fixed_p doesn't work for rs_align_test
857 align_test_frag_offset_fixed_p (const fragS
*frag1
, const fragS
*frag2
,
863 /* Start with offset initialised to difference between the two frags.
864 Prior to assigning frag addresses this will be zero. */
865 off
= frag1
->fr_address
- frag2
->fr_address
;
872 /* Maybe frag2 is after frag1. */
874 while (frag
->fr_type
== rs_fill
875 || frag
->fr_type
== rs_align_test
)
877 if (frag
->fr_type
== rs_fill
)
878 off
+= frag
->fr_fix
+ frag
->fr_offset
* frag
->fr_var
;
881 frag
= frag
->fr_next
;
891 /* Maybe frag1 is after frag2. */
892 off
= frag1
->fr_address
- frag2
->fr_address
;
894 while (frag
->fr_type
== rs_fill
895 || frag
->fr_type
== rs_align_test
)
897 if (frag
->fr_type
== rs_fill
)
898 off
-= frag
->fr_fix
+ frag
->fr_offset
* frag
->fr_var
;
901 frag
= frag
->fr_next
;
914 /* Optimize a difference of symbols which have rs_align_test frag if
918 sh_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
923 && l
->X_op
== O_symbol
924 && r
->X_op
== O_symbol
925 && S_GET_SEGMENT (l
->X_add_symbol
) == S_GET_SEGMENT (r
->X_add_symbol
)
926 && (SEG_NORMAL (S_GET_SEGMENT (l
->X_add_symbol
))
927 || r
->X_add_symbol
== l
->X_add_symbol
)
928 && align_test_frag_offset_fixed_p (symbol_get_frag (l
->X_add_symbol
),
929 symbol_get_frag (r
->X_add_symbol
),
932 offsetT symval_diff
= S_GET_VALUE (l
->X_add_symbol
)
933 - S_GET_VALUE (r
->X_add_symbol
);
934 subtract_from_result (l
, r
->X_add_number
, r
->X_extrabit
);
935 subtract_from_result (l
, frag_off
/ OCTETS_PER_BYTE
, 0);
936 add_to_result (l
, symval_diff
, symval_diff
< 0);
937 l
->X_op
= O_constant
;
945 /* This function is called once, at assembler startup time. This should
946 set up all the tables, etc that the MD part of the assembler needs. */
951 const sh_opcode_info
*opcode
;
952 char *prev_name
= "";
953 unsigned int target_arch
;
956 = preset_target_arch
? preset_target_arch
: arch_sh_up
& ~arch_sh_has_dsp
;
957 valid_arch
= target_arch
;
963 opcode_hash_control
= hash_new ();
965 /* Insert unique names into hash table. */
966 for (opcode
= sh_table
; opcode
->name
; opcode
++)
968 if (strcmp (prev_name
, opcode
->name
) != 0)
970 if (!SH_MERGE_ARCH_SET_VALID (opcode
->arch
, target_arch
))
972 prev_name
= opcode
->name
;
973 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
980 static int reg_x
, reg_y
;
984 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
986 /* Try to parse a reg name. Return the number of chars consumed. */
989 parse_reg_without_prefix (char *src
, int *mode
, int *reg
)
991 char l0
= TOLOWER (src
[0]);
992 char l1
= l0
? TOLOWER (src
[1]) : 0;
994 /* We use ! IDENT_CHAR for the next character after the register name, to
995 make sure that we won't accidentally recognize a symbol name such as
996 'sram' or sr_ram as being a reference to the register 'sr'. */
1002 if (src
[2] >= '0' && src
[2] <= '5'
1003 && ! IDENT_CHAR ((unsigned char) src
[3]))
1006 *reg
= 10 + src
[2] - '0';
1010 if (l1
>= '0' && l1
<= '9'
1011 && ! IDENT_CHAR ((unsigned char) src
[2]))
1017 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
1018 && ! IDENT_CHAR ((unsigned char) src
[7]))
1025 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
1030 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
1041 if (! IDENT_CHAR ((unsigned char) src
[2]))
1047 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
1056 if (! IDENT_CHAR ((unsigned char) src
[2]))
1062 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
1070 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
1071 && ! IDENT_CHAR ((unsigned char) src
[3]))
1074 *reg
= 4 + (l1
- '0');
1077 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
1078 && ! IDENT_CHAR ((unsigned char) src
[3]))
1081 *reg
= 6 + (l1
- '0');
1084 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
1085 && ! IDENT_CHAR ((unsigned char) src
[3]))
1090 *reg
= n
| ((~n
& 2) << 1);
1095 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[2]))
1117 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
1118 && ! IDENT_CHAR ((unsigned char) src
[2]))
1121 *reg
= A_X0_NUM
+ l1
- '0';
1125 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
1126 && ! IDENT_CHAR ((unsigned char) src
[2]))
1129 *reg
= A_Y0_NUM
+ l1
- '0';
1133 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
1134 && ! IDENT_CHAR ((unsigned char) src
[2]))
1137 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
1143 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
1149 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
1150 && ! IDENT_CHAR ((unsigned char) src
[3]))
1156 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
1157 && ! IDENT_CHAR ((unsigned char) src
[3]))
1163 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
1164 && ! IDENT_CHAR ((unsigned char) src
[3]))
1170 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1171 && ! IDENT_CHAR ((unsigned char) src
[3]))
1177 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1183 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
1190 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1195 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
1197 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1198 and use an uninitialized immediate. */
1202 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1203 && ! IDENT_CHAR ((unsigned char) src
[3]))
1208 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1209 && ! IDENT_CHAR ((unsigned char) src
[3]))
1215 if (l0
== 't' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1216 && ! IDENT_CHAR ((unsigned char) src
[3]))
1221 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
1222 && ! IDENT_CHAR ((unsigned char) src
[4]))
1224 if (TOLOWER (src
[3]) == 'l')
1229 if (TOLOWER (src
[3]) == 'h')
1235 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
1236 && ! IDENT_CHAR ((unsigned char) src
[3]))
1241 if (l0
== 'f' && l1
== 'r')
1245 if (src
[3] >= '0' && src
[3] <= '5'
1246 && ! IDENT_CHAR ((unsigned char) src
[4]))
1249 *reg
= 10 + src
[3] - '0';
1253 if (src
[2] >= '0' && src
[2] <= '9'
1254 && ! IDENT_CHAR ((unsigned char) src
[3]))
1257 *reg
= (src
[2] - '0');
1261 if (l0
== 'd' && l1
== 'r')
1265 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1266 && ! IDENT_CHAR ((unsigned char) src
[4]))
1269 *reg
= 10 + src
[3] - '0';
1273 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1274 && ! IDENT_CHAR ((unsigned char) src
[3]))
1277 *reg
= (src
[2] - '0');
1281 if (l0
== 'x' && l1
== 'd')
1285 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1286 && ! IDENT_CHAR ((unsigned char) src
[4]))
1289 *reg
= 11 + src
[3] - '0';
1293 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1294 && ! IDENT_CHAR ((unsigned char) src
[3]))
1297 *reg
= (src
[2] - '0') + 1;
1301 if (l0
== 'f' && l1
== 'v')
1303 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
1309 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
1310 && ! IDENT_CHAR ((unsigned char) src
[3]))
1313 *reg
= (src
[2] - '0');
1317 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
1318 && TOLOWER (src
[3]) == 'l'
1319 && ! IDENT_CHAR ((unsigned char) src
[4]))
1325 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
1326 && TOLOWER (src
[3]) == 'c'
1327 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
1333 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
1334 && TOLOWER (src
[3]) == 'r'
1335 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
1344 /* Like parse_reg_without_prefix, but this version supports
1345 $-prefixed register names if enabled by the user. */
1348 parse_reg (char *src
, int *mode
, int *reg
)
1350 unsigned int prefix
;
1351 unsigned int consumed
;
1355 if (allow_dollar_register_prefix
)
1366 consumed
= parse_reg_without_prefix (src
, mode
, reg
);
1371 return consumed
+ prefix
;
1375 parse_exp (char *s
, sh_operand_info
*op
)
1380 save
= input_line_pointer
;
1381 input_line_pointer
= s
;
1382 expression (&op
->immediate
);
1383 if (op
->immediate
.X_op
== O_absent
)
1384 as_bad (_("missing operand"));
1385 new_pointer
= input_line_pointer
;
1386 input_line_pointer
= save
;
1390 /* The many forms of operand:
1393 @Rn Register indirect
1406 pr, gbr, vbr, macl, mach
1410 parse_at (char *src
, sh_operand_info
*op
)
1417 src
= parse_at (src
, op
);
1418 if (op
->type
== A_DISP_TBR
)
1419 op
->type
= A_DISP2_TBR
;
1421 as_bad (_("illegal double indirection"));
1423 else if (src
[0] == '-')
1425 /* Must be predecrement. */
1428 len
= parse_reg (src
, &mode
, &(op
->reg
));
1429 if (mode
!= A_REG_N
)
1430 as_bad (_("illegal register after @-"));
1435 else if (src
[0] == '(')
1437 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1440 len
= parse_reg (src
, &mode
, &(op
->reg
));
1441 if (len
&& mode
== A_REG_N
)
1446 as_bad (_("must be @(r0,...)"));
1451 /* Now can be rn or gbr. */
1452 len
= parse_reg (src
, &mode
, &(op
->reg
));
1462 op
->type
= A_R0_GBR
;
1464 else if (mode
== A_REG_N
)
1466 op
->type
= A_IND_R0_REG_N
;
1470 as_bad (_("syntax error in @(r0,...)"));
1475 as_bad (_("syntax error in @(r0...)"));
1480 /* Must be an @(disp,.. thing). */
1481 src
= parse_exp (src
, op
);
1484 /* Now can be rn, gbr or pc. */
1485 len
= parse_reg (src
, &mode
, &op
->reg
);
1488 if (mode
== A_REG_N
)
1490 op
->type
= A_DISP_REG_N
;
1492 else if (mode
== A_GBR
)
1494 op
->type
= A_DISP_GBR
;
1496 else if (mode
== A_TBR
)
1498 op
->type
= A_DISP_TBR
;
1500 else if (mode
== A_PC
)
1502 /* We want @(expr, pc) to uniformly address . + expr,
1503 no matter if expr is a constant, or a more complex
1504 expression, e.g. sym-. or sym1-sym2.
1505 However, we also used to accept @(sym,pc)
1506 as addressing sym, i.e. meaning the same as plain sym.
1507 Some existing code does use the @(sym,pc) syntax, so
1508 we give it the old semantics for now, but warn about
1509 its use, so that users have some time to fix their code.
1511 Note that due to this backward compatibility hack,
1512 we'll get unexpected results when @(offset, pc) is used,
1513 and offset is a symbol that is set later to an an address
1514 difference, or an external symbol that is set to an
1515 address difference in another source file, so we want to
1516 eventually remove it. */
1517 if (op
->immediate
.X_op
== O_symbol
)
1519 op
->type
= A_DISP_PC
;
1520 as_warn (_("Deprecated syntax."));
1524 op
->type
= A_DISP_PC_ABS
;
1525 /* Such operands don't get corrected for PC==.+4, so
1526 make the correction here. */
1527 op
->immediate
.X_add_number
-= 4;
1532 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1537 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1542 as_bad (_("expecting )"));
1548 src
+= parse_reg (src
, &mode
, &(op
->reg
));
1549 if (mode
!= A_REG_N
)
1550 as_bad (_("illegal register after @"));
1557 l0
= TOLOWER (src
[0]);
1558 l1
= TOLOWER (src
[1]);
1560 if ((l0
== 'r' && l1
== '8')
1561 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1564 op
->type
= AX_PMOD_N
;
1566 else if ( (l0
== 'r' && l1
== '9')
1567 || (l0
== 'i' && l1
== 'y'))
1570 op
->type
= AY_PMOD_N
;
1582 get_operand (char **ptr
, sh_operand_info
*op
)
1591 *ptr
= parse_exp (src
, op
);
1596 else if (src
[0] == '@')
1598 *ptr
= parse_at (src
, op
);
1601 len
= parse_reg (src
, &mode
, &(op
->reg
));
1610 /* Not a reg, the only thing left is a displacement. */
1611 *ptr
= parse_exp (src
, op
);
1612 op
->type
= A_DISP_PC
;
1618 get_operands (sh_opcode_info
*info
, char *args
, sh_operand_info
*operand
)
1623 /* The pre-processor will eliminate whitespace in front of '@'
1624 after the first argument; we may be called multiple times
1625 from assemble_ppi, so don't insist on finding whitespace here. */
1629 get_operand (&ptr
, operand
+ 0);
1636 get_operand (&ptr
, operand
+ 1);
1637 /* ??? Hack: psha/pshl have a varying operand number depending on
1638 the type of the first operand. We handle this by having the
1639 three-operand version first and reducing the number of operands
1640 parsed to two if we see that the first operand is an immediate.
1641 This works because no insn with three operands has an immediate
1642 as first operand. */
1643 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1649 get_operand (&ptr
, operand
+ 2);
1653 operand
[2].type
= 0;
1658 operand
[1].type
= 0;
1659 operand
[2].type
= 0;
1664 operand
[0].type
= 0;
1665 operand
[1].type
= 0;
1666 operand
[2].type
= 0;
1671 /* Passed a pointer to a list of opcodes which use different
1672 addressing modes, return the opcode which matches the opcodes
1675 static sh_opcode_info
*
1676 get_specific (sh_opcode_info
*opcode
, sh_operand_info
*operands
)
1678 sh_opcode_info
*this_try
= opcode
;
1679 char *name
= opcode
->name
;
1682 while (opcode
->name
)
1684 this_try
= opcode
++;
1685 if ((this_try
->name
!= name
) && (strcmp (this_try
->name
, name
) != 0))
1687 /* We've looked so far down the table that we've run out of
1688 opcodes with the same name. */
1692 /* Look at both operands needed by the opcodes and provided by
1693 the user - since an arg test will often fail on the same arg
1694 again and again, we'll try and test the last failing arg the
1695 first on each opcode try. */
1696 for (n
= 0; this_try
->arg
[n
]; n
++)
1698 sh_operand_info
*user
= operands
+ n
;
1699 sh_arg_type arg
= this_try
->arg
[n
];
1704 if (user
->type
== A_DISP_PC_ABS
)
1715 if (user
->type
!= arg
)
1719 /* opcode needs r0 */
1720 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1724 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1728 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1736 case A_IND_R0_REG_N
:
1745 /* Opcode needs rn */
1746 if (user
->type
!= arg
)
1751 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1767 if (user
->type
!= arg
)
1772 if (user
->type
!= arg
)
1778 if (user
->type
!= A_INC_N
)
1780 if (user
->reg
!= 15)
1786 if (user
->type
!= A_DEC_N
)
1788 if (user
->reg
!= 15)
1797 case A_IND_R0_REG_M
:
1800 /* Opcode needs rn */
1801 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1807 if (user
->type
!= A_DEC_N
)
1809 if (user
->reg
< 2 || user
->reg
> 5)
1815 if (user
->type
!= A_INC_N
)
1817 if (user
->reg
< 2 || user
->reg
> 5)
1823 if (user
->type
!= A_IND_N
)
1825 if (user
->reg
< 2 || user
->reg
> 5)
1831 if (user
->type
!= AX_PMOD_N
)
1833 if (user
->reg
< 2 || user
->reg
> 5)
1839 if (user
->type
!= A_INC_N
)
1841 if (user
->reg
< 4 || user
->reg
> 5)
1847 if (user
->type
!= A_IND_N
)
1849 if (user
->reg
< 4 || user
->reg
> 5)
1855 if (user
->type
!= AX_PMOD_N
)
1857 if (user
->reg
< 4 || user
->reg
> 5)
1863 if (user
->type
!= A_INC_N
)
1865 if ((user
->reg
< 4 || user
->reg
> 5)
1866 && (user
->reg
< 0 || user
->reg
> 1))
1872 if (user
->type
!= A_IND_N
)
1874 if ((user
->reg
< 4 || user
->reg
> 5)
1875 && (user
->reg
< 0 || user
->reg
> 1))
1881 if (user
->type
!= AX_PMOD_N
)
1883 if ((user
->reg
< 4 || user
->reg
> 5)
1884 && (user
->reg
< 0 || user
->reg
> 1))
1890 if (user
->type
!= A_INC_N
)
1892 if (user
->reg
< 6 || user
->reg
> 7)
1898 if (user
->type
!= A_IND_N
)
1900 if (user
->reg
< 6 || user
->reg
> 7)
1906 if (user
->type
!= AY_PMOD_N
)
1908 if (user
->reg
< 6 || user
->reg
> 7)
1914 if (user
->type
!= A_INC_N
)
1916 if ((user
->reg
< 6 || user
->reg
> 7)
1917 && (user
->reg
< 2 || user
->reg
> 3))
1923 if (user
->type
!= A_IND_N
)
1925 if ((user
->reg
< 6 || user
->reg
> 7)
1926 && (user
->reg
< 2 || user
->reg
> 3))
1932 if (user
->type
!= AY_PMOD_N
)
1934 if ((user
->reg
< 6 || user
->reg
> 7)
1935 && (user
->reg
< 2 || user
->reg
> 3))
1941 if (user
->type
!= DSP_REG_N
)
1943 if (user
->reg
!= A_A0_NUM
1944 && user
->reg
!= A_A1_NUM
)
1950 if (user
->type
!= DSP_REG_N
)
1972 if (user
->type
!= DSP_REG_N
)
1994 if (user
->type
!= DSP_REG_N
)
2016 if (user
->type
!= DSP_REG_N
)
2038 if (user
->type
!= DSP_REG_N
)
2060 if (user
->type
!= DSP_REG_N
)
2082 if (user
->type
!= DSP_REG_N
)
2104 if (user
->type
!= DSP_REG_N
)
2126 if (user
->type
!= DSP_REG_N
)
2148 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
2152 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
2156 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
2160 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
2164 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
2174 /* Opcode needs rn */
2175 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
2180 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
2185 if (user
->type
!= XMTRX_M4
)
2191 printf (_("unhandled %d\n"), arg
);
2194 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh2a_nofpu_up
)
2195 && ( arg
== A_DISP_REG_M
2196 || arg
== A_DISP_REG_N
))
2198 /* Check a few key IMM* fields for overflow. */
2200 long val
= user
->immediate
.X_add_number
;
2202 for (opf
= 0; opf
< 4; opf
++)
2203 switch (this_try
->nibbles
[opf
])
2207 if (val
< 0 || val
> 15)
2212 if (val
< 0 || val
> 15 * 2)
2217 if (val
< 0 || val
> 15 * 4)
2225 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch
, this_try
->arch
))
2227 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, this_try
->arch
);
2237 insert (char *where
, int how
, int pcrel
, sh_operand_info
*op
)
2239 fix_new_exp (frag_now
,
2240 where
- frag_now
->fr_literal
,
2248 insert4 (char * where
, int how
, int pcrel
, sh_operand_info
* op
)
2250 fix_new_exp (frag_now
,
2251 where
- frag_now
->fr_literal
,
2258 build_relax (sh_opcode_info
*opcode
, sh_operand_info
*op
)
2260 int high_byte
= target_big_endian
? 0 : 1;
2263 if (opcode
->arg
[0] == A_BDISP8
)
2265 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
2266 p
= frag_var (rs_machine_dependent
,
2267 md_relax_table
[C (what
, COND32
)].rlx_length
,
2268 md_relax_table
[C (what
, COND8
)].rlx_length
,
2270 op
->immediate
.X_add_symbol
,
2271 op
->immediate
.X_add_number
,
2273 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
2275 else if (opcode
->arg
[0] == A_BDISP12
)
2277 p
= frag_var (rs_machine_dependent
,
2278 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
2279 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
2281 op
->immediate
.X_add_symbol
,
2282 op
->immediate
.X_add_number
,
2284 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
2289 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
2292 insert_loop_bounds (char *output
, sh_operand_info
*operand
)
2297 /* Since the low byte of the opcode will be overwritten by the reloc, we
2298 can just stash the high byte into both bytes and ignore endianness. */
2301 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2302 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2306 static int count
= 0;
2308 /* If the last loop insn is a two-byte-insn, it is in danger of being
2309 swapped with the insn after it. To prevent this, create a new
2310 symbol - complete with SH_LABEL reloc - after the last loop insn.
2311 If the last loop insn is four bytes long, the symbol will be
2312 right in the middle, but four byte insns are not swapped anyways. */
2313 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
2314 Hence a 9 digit number should be enough to count all REPEATs. */
2316 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
2317 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
2318 /* Make this a local symbol. */
2320 SF_SET_LOCAL (end_sym
);
2321 #endif /* OBJ_COFF */
2322 symbol_table_insert (end_sym
);
2323 end_sym
->sy_value
= operand
[1].immediate
;
2324 end_sym
->sy_value
.X_add_number
+= 2;
2325 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
2328 output
= frag_more (2);
2331 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2332 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2334 return frag_more (2);
2337 /* Now we know what sort of opcodes it is, let's build the bytes. */
2340 build_Mytes (sh_opcode_info
*opcode
, sh_operand_info
*operand
)
2345 unsigned int size
= 2;
2346 int low_byte
= target_big_endian
? 1 : 0;
2348 bfd_reloc_code_real_type r_type
;
2350 int unhandled_pic
= 0;
2363 for (indx
= 0; indx
< 3; indx
++)
2364 if (opcode
->arg
[indx
] == A_IMM
2365 && operand
[indx
].type
== A_IMM
2366 && (operand
[indx
].immediate
.X_op
== O_PIC_reloc
2367 || sh_PIC_related_p (operand
[indx
].immediate
.X_add_symbol
)
2368 || sh_PIC_related_p (operand
[indx
].immediate
.X_op_symbol
)))
2372 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2374 output
= frag_more (4);
2379 output
= frag_more (2);
2381 for (indx
= 0; indx
< max_index
; indx
++)
2383 sh_nibble_type i
= opcode
->nibbles
[indx
];
2400 if (reg_n
< 2 || reg_n
> 5)
2401 as_bad (_("Invalid register: 'r%d'"), reg_n
);
2402 nbuf
[indx
] = (reg_n
& 3) | 4;
2405 nbuf
[indx
] = reg_n
| (reg_m
>> 2);
2408 nbuf
[indx
] = reg_b
| 0x08;
2411 nbuf
[indx
] = reg_n
| 0x01;
2416 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3
, 0, operand
);
2421 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3U
, 0, operand
);
2424 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
);
2427 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
);
2430 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
);
2433 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
);
2436 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
+1);
2439 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
+1);
2442 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
+1);
2445 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
+1);
2450 r_type
= BFD_RELOC_SH_DISP20
;
2452 if (sh_check_fixup (&operand
->immediate
, &r_type
))
2453 as_bad (_("Invalid PIC expression."));
2456 insert4 (output
, r_type
, 0, operand
);
2459 insert4 (output
, BFD_RELOC_SH_DISP20BY8
, 0, operand
);
2462 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
2465 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
2468 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
2471 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
2474 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
2477 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
2480 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
2483 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
2486 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
2489 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
2492 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
2495 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
2498 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
,
2499 operand
->type
!= A_DISP_PC_ABS
, operand
);
2502 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
,
2503 operand
->type
!= A_DISP_PC_ABS
, operand
);
2506 output
= insert_loop_bounds (output
, operand
);
2507 nbuf
[indx
] = opcode
->nibbles
[3];
2511 printf (_("failed for %d\n"), i
);
2517 as_bad (_("misplaced PIC operand"));
2519 if (!target_big_endian
)
2521 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
2522 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
2526 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
2527 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
2529 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2531 if (!target_big_endian
)
2533 output
[3] = (nbuf
[4] << 4) | (nbuf
[5]);
2534 output
[2] = (nbuf
[6] << 4) | (nbuf
[7]);
2538 output
[2] = (nbuf
[4] << 4) | (nbuf
[5]);
2539 output
[3] = (nbuf
[6] << 4) | (nbuf
[7]);
2545 /* Find an opcode at the start of *STR_P in the hash table, and set
2546 *STR_P to the first character after the last one read. */
2548 static sh_opcode_info
*
2549 find_cooked_opcode (char **str_p
)
2552 unsigned char *op_start
;
2553 unsigned char *op_end
;
2555 unsigned int nlen
= 0;
2557 /* Drop leading whitespace. */
2561 /* Find the op code end.
2562 The pre-processor will eliminate whitespace in front of
2563 any '@' after the first argument; we may be called from
2564 assemble_ppi, so the opcode might be terminated by an '@'. */
2565 for (op_start
= op_end
= (unsigned char *) str
;
2567 && nlen
< sizeof (name
) - 1
2568 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
2571 unsigned char c
= op_start
[nlen
];
2573 /* The machine independent code will convert CMP/EQ into cmp/EQ
2574 because it thinks the '/' is the end of the symbol. Moreover,
2575 all but the first sub-insn is a parallel processing insn won't
2576 be capitalized. Instead of hacking up the machine independent
2577 code, we just deal with it here. */
2584 *str_p
= (char *) op_end
;
2587 as_bad (_("can't find opcode "));
2589 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
2592 /* Assemble a parallel processing insn. */
2593 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2596 assemble_ppi (char *op_end
, sh_opcode_info
*opcode
)
2608 sh_operand_info operand
[3];
2610 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2611 Make sure we encode a defined insn pattern. */
2616 if (opcode
->arg
[0] != A_END
)
2617 op_end
= get_operands (opcode
, op_end
, operand
);
2619 opcode
= get_specific (opcode
, operand
);
2622 /* Couldn't find an opcode which matched the operands. */
2623 char *where
= frag_more (2);
2628 as_bad (_("invalid operands for opcode"));
2632 if (opcode
->nibbles
[0] != PPI
)
2633 as_bad (_("insn can't be combined with parallel processing insn"));
2635 switch (opcode
->nibbles
[1])
2640 as_bad (_("multiple movx specifications"));
2645 as_bad (_("multiple movy specifications"));
2651 as_bad (_("multiple movx specifications"));
2652 if ((reg_n
< 4 || reg_n
> 5)
2653 && (reg_n
< 0 || reg_n
> 1))
2654 as_bad (_("invalid movx address register"));
2655 if (movy
&& movy
!= DDT_BASE
)
2656 as_bad (_("insn cannot be combined with non-nopy"));
2657 movx
= ((((reg_n
& 1) != 0) << 9)
2658 + (((reg_n
& 4) == 0) << 8)
2660 + (opcode
->nibbles
[2] << 4)
2661 + opcode
->nibbles
[3]
2667 as_bad (_("multiple movy specifications"));
2668 if ((reg_n
< 6 || reg_n
> 7)
2669 && (reg_n
< 2 || reg_n
> 3))
2670 as_bad (_("invalid movy address register"));
2671 if (movx
&& movx
!= DDT_BASE
)
2672 as_bad (_("insn cannot be combined with non-nopx"));
2673 movy
= ((((reg_n
& 1) != 0) << 8)
2674 + (((reg_n
& 4) == 0) << 9)
2676 + (opcode
->nibbles
[2] << 4)
2677 + opcode
->nibbles
[3]
2683 as_bad (_("multiple movx specifications"));
2685 as_bad (_("previous movy requires nopx"));
2686 if (reg_n
< 4 || reg_n
> 5)
2687 as_bad (_("invalid movx address register"));
2688 if (opcode
->nibbles
[2] & 8)
2690 if (reg_m
== A_A1_NUM
)
2692 else if (reg_m
!= A_A0_NUM
)
2693 as_bad (_("invalid movx dsp register"));
2698 as_bad (_("invalid movx dsp register"));
2701 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
2706 as_bad (_("multiple movy specifications"));
2708 as_bad (_("previous movx requires nopy"));
2709 if (opcode
->nibbles
[2] & 8)
2711 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2714 if (reg_m
== A_A1_NUM
)
2716 else if (reg_m
!= A_A0_NUM
)
2717 as_bad (_("invalid movy dsp register"));
2722 as_bad (_("invalid movy dsp register"));
2725 if (reg_n
< 6 || reg_n
> 7)
2726 as_bad (_("invalid movy address register"));
2727 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
2731 if (operand
[0].immediate
.X_op
!= O_constant
)
2732 as_bad (_("dsp immediate shift value not constant"));
2733 field_b
= ((opcode
->nibbles
[2] << 12)
2734 | (operand
[0].immediate
.X_add_number
& 127) << 4
2741 goto try_another_opcode
;
2746 as_bad (_("multiple parallel processing specifications"));
2747 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2748 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2749 switch (opcode
->nibbles
[4])
2757 field_b
+= opcode
->nibbles
[4] << 4;
2765 as_bad (_("multiple condition specifications"));
2766 cond
= opcode
->nibbles
[2] << 8;
2768 goto skip_cond_check
;
2772 as_bad (_("multiple parallel processing specifications"));
2773 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2774 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2776 switch (opcode
->nibbles
[4])
2784 field_b
+= opcode
->nibbles
[4] << 4;
2793 if ((field_b
& 0xef00) == 0xa100)
2795 /* pclr Dz pmuls Se,Sf,Dg */
2796 else if ((field_b
& 0xff00) == 0x8d00
2797 && (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh4al_dsp_up
)))
2799 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, arch_sh4al_dsp_up
);
2803 as_bad (_("insn cannot be combined with pmuls"));
2804 switch (field_b
& 0xf)
2807 field_b
+= 0 - A_X0_NUM
;
2810 field_b
+= 1 - A_Y0_NUM
;
2813 field_b
+= 2 - A_A0_NUM
;
2816 field_b
+= 3 - A_A1_NUM
;
2819 as_bad (_("bad combined pmuls output operand"));
2821 /* Generate warning if the destination register for padd / psub
2822 and pmuls is the same ( only for A0 or A1 ).
2823 If the last nibble is 1010 then A0 is used in both
2824 padd / psub and pmuls. If it is 1111 then A1 is used
2825 as destination register in both padd / psub and pmuls. */
2827 if ((((field_b
| reg_efg
) & 0x000F) == 0x000A)
2828 || (((field_b
| reg_efg
) & 0x000F) == 0x000F))
2829 as_warn (_("destination register is same for parallel insns"));
2831 field_b
+= 0x4000 + reg_efg
;
2838 as_bad (_("condition not followed by conditionalizable insn"));
2844 opcode
= find_cooked_opcode (&op_end
);
2848 (_("unrecognized characters at end of parallel processing insn")));
2853 move_code
= movx
| movy
;
2856 /* Parallel processing insn. */
2857 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
2859 output
= frag_more (4);
2861 if (! target_big_endian
)
2863 output
[3] = ppi_code
>> 8;
2864 output
[2] = ppi_code
;
2868 output
[2] = ppi_code
>> 8;
2869 output
[3] = ppi_code
;
2871 move_code
|= 0xf800;
2875 /* Just a double data transfer. */
2876 output
= frag_more (2);
2879 if (! target_big_endian
)
2881 output
[1] = move_code
>> 8;
2882 output
[0] = move_code
;
2886 output
[0] = move_code
>> 8;
2887 output
[1] = move_code
;
2892 /* This is the guts of the machine-dependent assembler. STR points to a
2893 machine dependent instruction. This function is supposed to emit
2894 the frags/bytes it assembles to. */
2897 md_assemble (char *str
)
2900 sh_operand_info operand
[3];
2901 sh_opcode_info
*opcode
;
2902 unsigned int size
= 0;
2903 char *initial_str
= str
;
2906 if (sh64_isa_mode
== sh64_isa_shmedia
)
2908 shmedia_md_assemble (str
);
2913 /* If we've seen pseudo-directives, make sure any emitted data or
2914 frags are marked as data. */
2917 sh64_update_contents_mark (TRUE
);
2918 sh64_set_contents_type (CRT_SH5_ISA16
);
2923 #endif /* HAVE_SH64 */
2925 opcode
= find_cooked_opcode (&str
);
2930 /* The opcode is not in the hash table.
2931 This means we definitely have an assembly failure,
2932 but the instruction may be valid in another CPU variant.
2933 In this case emit something better than 'unknown opcode'.
2934 Search the full table in sh-opc.h to check. */
2936 char *name
= initial_str
;
2937 int name_length
= 0;
2938 const sh_opcode_info
*op
;
2941 /* identify opcode in string */
2942 while (ISSPACE (*name
))
2946 while (!ISSPACE (name
[name_length
]))
2951 /* search for opcode in full list */
2952 for (op
= sh_table
; op
->name
; op
++)
2954 if (strncasecmp (op
->name
, name
, name_length
) == 0
2955 && op
->name
[name_length
] == '\0')
2964 as_bad (_("opcode not valid for this cpu variant"));
2968 as_bad (_("unknown opcode"));
2974 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2976 /* Output a CODE reloc to tell the linker that the following
2977 bytes are instructions, not data. */
2978 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2980 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
2983 if (opcode
->nibbles
[0] == PPI
)
2985 size
= assemble_ppi (op_end
, opcode
);
2989 if (opcode
->arg
[0] == A_BDISP12
2990 || opcode
->arg
[0] == A_BDISP8
)
2992 /* Since we skip get_specific here, we have to check & update
2994 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, opcode
->arch
))
2995 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, opcode
->arch
);
2997 as_bad (_("Delayed branches not available on SH1"));
2998 parse_exp (op_end
+ 1, &operand
[0]);
2999 build_relax (opcode
, &operand
[0]);
3001 /* All branches are currently 16 bit. */
3006 if (opcode
->arg
[0] == A_END
)
3008 /* Ignore trailing whitespace. If there is any, it has already
3009 been compressed to a single space. */
3015 op_end
= get_operands (opcode
, op_end
, operand
);
3017 opcode
= get_specific (opcode
, operand
);
3021 /* Couldn't find an opcode which matched the operands. */
3022 char *where
= frag_more (2);
3027 as_bad (_("invalid operands for opcode"));
3032 as_bad (_("excess operands: '%s'"), op_end
);
3034 size
= build_Mytes (opcode
, operand
);
3039 dwarf2_emit_insn (size
);
3042 /* This routine is called each time a label definition is seen. It
3043 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
3046 sh_frob_label (symbolS
*sym
)
3048 static fragS
*last_label_frag
;
3049 static int last_label_offset
;
3052 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
3056 offset
= frag_now_fix ();
3057 if (frag_now
!= last_label_frag
3058 || offset
!= last_label_offset
)
3060 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
3061 last_label_frag
= frag_now
;
3062 last_label_offset
= offset
;
3066 dwarf2_emit_label (sym
);
3069 /* This routine is called when the assembler is about to output some
3070 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
3073 sh_flush_pending_output (void)
3076 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
3078 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
3080 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
3085 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
3090 /* Various routines to kill one day. */
3093 md_atof (int type
, char *litP
, int *sizeP
)
3095 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
3098 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
3099 call instruction. It refers to a label of the instruction which
3100 loads the register which the call uses. We use it to generate a
3101 special reloc for the linker. */
3104 s_uses (int ignore ATTRIBUTE_UNUSED
)
3109 as_warn (_(".uses pseudo-op seen when not relaxing"));
3113 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
3115 as_bad (_("bad .uses format"));
3116 ignore_rest_of_line ();
3120 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
3122 demand_empty_rest_of_line ();
3127 OPTION_RELAX
= OPTION_MD_BASE
,
3134 OPTION_ALLOW_REG_PREFIX
,
3138 OPTION_SHCOMPACT_CONST_CRANGE
,
3146 OPTION_DUMMY
/* Not used. This is just here to make it easy to add and subtract options from this enum. */
3149 const char *md_shortopts
= "";
3150 struct option md_longopts
[] =
3152 {"relax", no_argument
, NULL
, OPTION_RELAX
},
3153 {"big", no_argument
, NULL
, OPTION_BIG
},
3154 {"little", no_argument
, NULL
, OPTION_LITTLE
},
3155 /* The next two switches are here because the
3156 generic parts of the linker testsuite uses them. */
3157 {"EB", no_argument
, NULL
, OPTION_BIG
},
3158 {"EL", no_argument
, NULL
, OPTION_LITTLE
},
3159 {"small", no_argument
, NULL
, OPTION_SMALL
},
3160 {"dsp", no_argument
, NULL
, OPTION_DSP
},
3161 {"isa", required_argument
, NULL
, OPTION_ISA
},
3162 {"renesas", no_argument
, NULL
, OPTION_RENESAS
},
3163 {"allow-reg-prefix", no_argument
, NULL
, OPTION_ALLOW_REG_PREFIX
},
3166 {"abi", required_argument
, NULL
, OPTION_ABI
},
3167 {"no-mix", no_argument
, NULL
, OPTION_NO_MIX
},
3168 {"shcompact-const-crange", no_argument
, NULL
, OPTION_SHCOMPACT_CONST_CRANGE
},
3169 {"no-expand", no_argument
, NULL
, OPTION_NO_EXPAND
},
3170 {"expand-pt32", no_argument
, NULL
, OPTION_PT32
},
3171 #endif /* HAVE_SH64 */
3172 { "h-tick-hex", no_argument
, NULL
, OPTION_H_TICK_HEX
},
3175 {"fdpic", no_argument
, NULL
, OPTION_FDPIC
},
3178 {NULL
, no_argument
, NULL
, 0}
3180 size_t md_longopts_size
= sizeof (md_longopts
);
3183 md_parse_option (int c
, char *arg ATTRIBUTE_UNUSED
)
3192 target_big_endian
= 1;
3196 target_big_endian
= 0;
3204 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
3207 case OPTION_RENESAS
:
3208 dont_adjust_reloc_32
= 1;
3211 case OPTION_ALLOW_REG_PREFIX
:
3212 allow_dollar_register_prefix
= 1;
3216 if (strcasecmp (arg
, "dsp") == 0)
3217 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
3218 else if (strcasecmp (arg
, "fp") == 0)
3219 preset_target_arch
= arch_sh_up
& ~arch_sh_has_dsp
;
3220 else if (strcasecmp (arg
, "any") == 0)
3221 preset_target_arch
= arch_sh_up
;
3223 else if (strcasecmp (arg
, "shmedia") == 0)
3225 if (sh64_isa_mode
== sh64_isa_shcompact
)
3226 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
3227 sh64_isa_mode
= sh64_isa_shmedia
;
3229 else if (strcasecmp (arg
, "shcompact") == 0)
3231 if (sh64_isa_mode
== sh64_isa_shmedia
)
3232 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
3233 if (sh64_abi
== sh64_abi_64
)
3234 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
3235 sh64_isa_mode
= sh64_isa_shcompact
;
3237 #endif /* HAVE_SH64 */
3240 extern const bfd_arch_info_type bfd_sh_arch
;
3241 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
3243 preset_target_arch
= 0;
3244 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
3246 int len
= strlen(bfd_arch
->printable_name
);
3248 if (bfd_arch
->mach
== bfd_mach_sh5
)
3251 if (strncasecmp (bfd_arch
->printable_name
, arg
, len
) != 0)
3254 if (arg
[len
] == '\0')
3255 preset_target_arch
=
3256 sh_get_arch_from_bfd_mach (bfd_arch
->mach
);
3257 else if (strcasecmp(&arg
[len
], "-up") == 0)
3258 preset_target_arch
=
3259 sh_get_arch_up_from_bfd_mach (bfd_arch
->mach
);
3265 if (!preset_target_arch
)
3266 as_bad (_("Invalid argument to --isa option: %s"), arg
);
3272 if (strcmp (arg
, "32") == 0)
3274 if (sh64_abi
== sh64_abi_64
)
3275 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
3276 sh64_abi
= sh64_abi_32
;
3278 else if (strcmp (arg
, "64") == 0)
3280 if (sh64_abi
== sh64_abi_32
)
3281 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
3282 if (sh64_isa_mode
== sh64_isa_shcompact
)
3283 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
3284 sh64_abi
= sh64_abi_64
;
3287 as_bad (_("Invalid argument to --abi option: %s"), arg
);
3294 case OPTION_SHCOMPACT_CONST_CRANGE
:
3295 sh64_shcompact_const_crange
= TRUE
;
3298 case OPTION_NO_EXPAND
:
3299 sh64_expand
= FALSE
;
3305 #endif /* HAVE_SH64 */
3307 case OPTION_H_TICK_HEX
:
3308 enable_h_tick_hex
= 1;
3315 #endif /* OBJ_ELF */
3325 md_show_usage (FILE *stream
)
3327 fprintf (stream
, _("\
3329 --little generate little endian code\n\
3330 --big generate big endian code\n\
3331 --relax alter jump instructions for long displacements\n\
3332 --renesas disable optimization with section symbol for\n\
3333 compatibility with Renesas assembler.\n\
3334 --small align sections to 4 byte boundaries, not 16\n\
3335 --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
3336 --allow-reg-prefix allow '$' as a register name prefix.\n\
3337 --isa=[any use most appropriate isa\n\
3338 | dsp same as '-dsp'\n\
3341 extern const bfd_arch_info_type bfd_sh_arch
;
3342 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
3344 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
3345 if (bfd_arch
->mach
!= bfd_mach_sh5
)
3347 fprintf (stream
, "\n | %s", bfd_arch
->printable_name
);
3348 fprintf (stream
, "\n | %s-up", bfd_arch
->printable_name
);
3351 fprintf (stream
, "]\n");
3353 fprintf (stream
, _("\
3354 --isa=[shmedia set as the default instruction set for SH64\n\
3358 fprintf (stream
, _("\
3359 --abi=[32|64] set size of expanded SHmedia operands and object\n\
3361 --shcompact-const-crange emit code-range descriptors for constants in\n\
3362 SHcompact code sections\n\
3363 --no-mix disallow SHmedia code in the same section as\n\
3364 constants and SHcompact code\n\
3365 --no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
3366 --expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
3367 to 32 bits only\n"));
3368 #endif /* HAVE_SH64 */
3370 fprintf (stream
, _("\
3371 --fdpic generate an FDPIC object file\n"));
3372 #endif /* OBJ_ELF */
3375 /* This struct is used to pass arguments to sh_count_relocs through
3376 bfd_map_over_sections. */
3378 struct sh_count_relocs
3380 /* Symbol we are looking for. */
3382 /* Count of relocs found. */
3386 /* Count the number of fixups in a section which refer to a particular
3387 symbol. This is called via bfd_map_over_sections. */
3390 sh_count_relocs (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, void *data
)
3392 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
3393 segment_info_type
*seginfo
;
3397 seginfo
= seg_info (sec
);
3398 if (seginfo
== NULL
)
3402 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3404 if (fix
->fx_addsy
== sym
)
3412 /* Handle the count relocs for a particular section.
3413 This is called via bfd_map_over_sections. */
3416 sh_frob_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
,
3417 void *ignore ATTRIBUTE_UNUSED
)
3419 segment_info_type
*seginfo
;
3422 seginfo
= seg_info (sec
);
3423 if (seginfo
== NULL
)
3426 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3430 sym
= fix
->fx_addsy
;
3431 /* Check for a local_symbol. */
3432 if (sym
&& sym
->bsym
== NULL
)
3434 struct local_symbol
*ls
= (struct local_symbol
*)sym
;
3435 /* See if it's been converted. If so, canonicalize. */
3436 if (local_symbol_converted_p (ls
))
3437 fix
->fx_addsy
= local_symbol_get_real_symbol (ls
);
3441 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3446 struct sh_count_relocs info
;
3448 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
3451 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
3452 symbol in the same section. */
3453 sym
= fix
->fx_addsy
;
3455 || fix
->fx_subsy
!= NULL
3456 || fix
->fx_addnumber
!= 0
3457 || S_GET_SEGMENT (sym
) != sec
3458 || S_IS_EXTERNAL (sym
))
3460 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3461 _(".uses does not refer to a local symbol in the same section"));
3465 /* Look through the fixups again, this time looking for one
3466 at the same location as sym. */
3467 val
= S_GET_VALUE (sym
);
3468 for (fscan
= seginfo
->fix_root
;
3470 fscan
= fscan
->fx_next
)
3471 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
3472 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
3473 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
3474 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
3475 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
3479 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3480 _("can't find fixup pointed to by .uses"));
3484 if (fscan
->fx_tcbit
)
3486 /* We've already done this one. */
3490 /* The variable fscan should also be a fixup to a local symbol
3491 in the same section. */
3492 sym
= fscan
->fx_addsy
;
3494 || fscan
->fx_subsy
!= NULL
3495 || fscan
->fx_addnumber
!= 0
3496 || S_GET_SEGMENT (sym
) != sec
3497 || S_IS_EXTERNAL (sym
))
3499 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3500 _(".uses target does not refer to a local symbol in the same section"));
3504 /* Now we look through all the fixups of all the sections,
3505 counting the number of times we find a reference to sym. */
3508 bfd_map_over_sections (stdoutput
, sh_count_relocs
, &info
);
3513 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
3514 We have already adjusted the value of sym to include the
3515 fragment address, so we undo that adjustment here. */
3516 subseg_change (sec
, 0);
3517 fix_new (fscan
->fx_frag
,
3518 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
3519 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
3523 /* This function is called after the symbol table has been completed,
3524 but before the relocs or section contents have been written out.
3525 If we have seen any .uses pseudo-ops, they point to an instruction
3526 which loads a register with the address of a function. We look
3527 through the fixups to find where the function address is being
3528 loaded from. We then generate a COUNT reloc giving the number of
3529 times that function address is referred to. The linker uses this
3530 information when doing relaxing, to decide when it can eliminate
3531 the stored function address entirely. */
3537 shmedia_frob_file_before_adjust ();
3543 bfd_map_over_sections (stdoutput
, sh_frob_section
, NULL
);
3546 /* Called after relaxing. Set the correct sizes of the fragments, and
3547 create relocs so that md_apply_fix will fill in the correct values. */
3550 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
, segT seg
, fragS
*fragP
)
3554 switch (fragP
->fr_subtype
)
3556 case C (COND_JUMP
, COND8
):
3557 case C (COND_JUMP_DELAY
, COND8
):
3558 subseg_change (seg
, 0);
3559 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3560 1, BFD_RELOC_SH_PCDISP8BY2
);
3565 case C (UNCOND_JUMP
, UNCOND12
):
3566 subseg_change (seg
, 0);
3567 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3568 1, BFD_RELOC_SH_PCDISP12BY2
);
3573 case C (UNCOND_JUMP
, UNCOND32
):
3574 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3575 if (fragP
->fr_symbol
== NULL
)
3576 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3577 _("displacement overflows 12-bit field"));
3578 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3579 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3580 _("displacement to defined symbol %s overflows 12-bit field"),
3581 S_GET_NAME (fragP
->fr_symbol
));
3583 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3584 _("displacement to undefined symbol %s overflows 12-bit field"),
3585 S_GET_NAME (fragP
->fr_symbol
));
3586 /* Stabilize this frag, so we don't trip an assert. */
3587 fragP
->fr_fix
+= fragP
->fr_var
;
3591 case C (COND_JUMP
, COND12
):
3592 case C (COND_JUMP_DELAY
, COND12
):
3593 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
3594 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
3595 was due to gas incorrectly relaxing an out-of-range conditional
3596 branch with delay slot. It turned:
3597 bf.s L6 (slot mov.l r12,@(44,r0))
3600 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
3602 32: 10 cb mov.l r12,@(44,r0)
3603 Therefore, branches with delay slots have to be handled
3604 differently from ones without delay slots. */
3606 unsigned char *buffer
=
3607 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
3608 int highbyte
= target_big_endian
? 0 : 1;
3609 int lowbyte
= target_big_endian
? 1 : 0;
3610 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
3612 /* Toggle the true/false bit of the bcond. */
3613 buffer
[highbyte
] ^= 0x2;
3615 /* If this is a delayed branch, we may not put the bra in the
3616 slot. So we change it to a non-delayed branch, like that:
3617 b! cond slot_label; bra disp; slot_label: slot_insn
3618 ??? We should try if swapping the conditional branch and
3619 its delay-slot insn already makes the branch reach. */
3621 /* Build a relocation to six / four bytes farther on. */
3622 subseg_change (seg
, 0);
3623 fix_new (fragP
, fragP
->fr_fix
, 2, section_symbol (seg
),
3624 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
3625 1, BFD_RELOC_SH_PCDISP8BY2
);
3627 /* Set up a jump instruction. */
3628 buffer
[highbyte
+ 2] = 0xa0;
3629 buffer
[lowbyte
+ 2] = 0;
3630 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
3631 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
3635 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
3640 /* Fill in a NOP instruction. */
3641 buffer
[highbyte
+ 4] = 0x0;
3642 buffer
[lowbyte
+ 4] = 0x9;
3651 case C (COND_JUMP
, COND32
):
3652 case C (COND_JUMP_DELAY
, COND32
):
3653 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3654 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3655 if (fragP
->fr_symbol
== NULL
)
3656 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3657 _("displacement overflows 8-bit field"));
3658 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3659 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3660 _("displacement to defined symbol %s overflows 8-bit field"),
3661 S_GET_NAME (fragP
->fr_symbol
));
3663 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3664 _("displacement to undefined symbol %s overflows 8-bit field "),
3665 S_GET_NAME (fragP
->fr_symbol
));
3666 /* Stabilize this frag, so we don't trip an assert. */
3667 fragP
->fr_fix
+= fragP
->fr_var
;
3673 shmedia_md_convert_frag (headers
, seg
, fragP
, TRUE
);
3679 if (donerelax
&& !sh_relax
)
3680 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3681 _("overflow in branch to %s; converted into longer instruction sequence"),
3682 (fragP
->fr_symbol
!= NULL
3683 ? S_GET_NAME (fragP
->fr_symbol
)
3688 md_section_align (segT seg ATTRIBUTE_UNUSED
, valueT size
)
3692 #else /* ! OBJ_ELF */
3693 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
3694 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
3695 #endif /* ! OBJ_ELF */
3698 /* This static variable is set by s_uacons to tell sh_cons_align that
3699 the expression does not need to be aligned. */
3701 static int sh_no_align_cons
= 0;
3703 /* This handles the unaligned space allocation pseudo-ops, such as
3704 .uaword. .uaword is just like .word, but the value does not need
3708 s_uacons (int bytes
)
3710 /* Tell sh_cons_align not to align this value. */
3711 sh_no_align_cons
= 1;
3715 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3716 aligned correctly. Note that this can cause warnings to be issued
3717 when assembling initialized structured which were declared with the
3718 packed attribute. FIXME: Perhaps we should require an option to
3719 enable this warning? */
3722 sh_cons_align (int nbytes
)
3726 if (sh_no_align_cons
)
3728 /* This is an unaligned pseudo-op. */
3729 sh_no_align_cons
= 0;
3734 while ((nbytes
& 1) == 0)
3743 if (now_seg
== absolute_section
)
3745 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
3746 as_warn (_("misaligned data"));
3750 frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
3751 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
3753 record_alignment (now_seg
, nalign
);
3756 /* When relaxing, we need to output a reloc for any .align directive
3757 that requests alignment to a four byte boundary or larger. This is
3758 also where we check for misaligned data. */
3761 sh_handle_align (fragS
*frag
)
3763 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
3765 if (frag
->fr_type
== rs_align_code
)
3767 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
3768 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
3770 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
3779 if (target_big_endian
)
3781 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
3782 frag
->fr_var
= sizeof big_nop_pattern
;
3786 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
3787 frag
->fr_var
= sizeof little_nop_pattern
;
3790 else if (frag
->fr_type
== rs_align_test
)
3793 as_bad_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
3797 && (frag
->fr_type
== rs_align
3798 || frag
->fr_type
== rs_align_code
)
3799 && frag
->fr_address
+ frag
->fr_fix
> 0
3800 && frag
->fr_offset
> 1
3801 && now_seg
!= bss_section
)
3802 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
3803 BFD_RELOC_SH_ALIGN
);
3806 /* See whether the relocation should be resolved locally. */
3809 sh_local_pcrel (fixS
*fix
)
3812 && (fix
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
3813 || fix
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
3814 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
3815 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
3816 || fix
->fx_r_type
== BFD_RELOC_8_PCREL
3817 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH16
3818 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH32
));
3821 /* See whether we need to force a relocation into the output file.
3822 This is used to force out switch and PC relative relocations when
3826 sh_force_relocation (fixS
*fix
)
3828 /* These relocations can't make it into a DSO, so no use forcing
3829 them for global symbols. */
3830 if (sh_local_pcrel (fix
))
3833 /* Make sure some relocations get emitted. */
3834 if (fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
3835 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
3836 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_GD_32
3837 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LD_32
3838 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_IE_32
3839 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LDO_32
3840 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LE_32
3841 || generic_force_reloc (fix
))
3847 return (fix
->fx_pcrel
3848 || SWITCH_TABLE (fix
)
3849 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
3850 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
3851 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
3852 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3854 || fix
->fx_r_type
== BFD_RELOC_SH_SHMEDIA_CODE
3856 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
3861 sh_fix_adjustable (fixS
*fixP
)
3863 if (fixP
->fx_r_type
== BFD_RELOC_32_PLT_PCREL
3864 || fixP
->fx_r_type
== BFD_RELOC_32_GOT_PCREL
3865 || fixP
->fx_r_type
== BFD_RELOC_SH_GOT20
3866 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTPC
3867 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTFUNCDESC
3868 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTFUNCDESC20
3869 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTOFFFUNCDESC
3870 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTOFFFUNCDESC20
3871 || fixP
->fx_r_type
== BFD_RELOC_SH_FUNCDESC
3872 || ((fixP
->fx_r_type
== BFD_RELOC_32
) && dont_adjust_reloc_32
)
3873 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
3876 /* We need the symbol name for the VTABLE entries */
3877 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
3878 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
3885 sh_elf_final_processing (void)
3889 /* Set file-specific flags to indicate if this code needs
3890 a processor with the sh-dsp / sh2e ISA to execute. */
3892 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3893 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3894 if (sh64_isa_mode
!= sh64_isa_unspecified
)
3897 #elif defined TARGET_SYMBIAN
3900 extern int sh_symbian_find_elf_flags (unsigned int);
3902 val
= sh_symbian_find_elf_flags (valid_arch
);
3905 #endif /* HAVE_SH64 */
3906 val
= sh_find_elf_flags (valid_arch
);
3908 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
3909 elf_elfheader (stdoutput
)->e_flags
|= val
;
3912 elf_elfheader (stdoutput
)->e_flags
|= EF_SH_FDPIC
;
3917 /* Return the target format for uClinux. */
3920 sh_uclinux_target_format (void)
3923 return (!target_big_endian
? "elf32-sh-fdpic" : "elf32-shbig-fdpic");
3925 return (!target_big_endian
? "elf32-shl" : "elf32-sh");
3929 /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its
3930 assembly-time value. If we're generating a reloc for FIXP,
3931 see whether the addend should be stored in-place or whether
3932 it should be in an ELF r_addend field. */
3935 apply_full_field_fix (fixS
*fixP
, char *buf
, bfd_vma val
, int size
)
3937 reloc_howto_type
*howto
;
3939 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3941 howto
= bfd_reloc_type_lookup (stdoutput
, fixP
->fx_r_type
);
3942 if (howto
&& !howto
->partial_inplace
)
3944 fixP
->fx_addnumber
= val
;
3948 md_number_to_chars (buf
, val
, size
);
3951 /* Apply a fixup to the object file. */
3954 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3956 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3957 int lowbyte
= target_big_endian
? 1 : 0;
3958 int highbyte
= target_big_endian
? 0 : 1;
3959 long val
= (long) *valP
;
3963 /* A difference between two symbols, the second of which is in the
3964 current section, is transformed in a PC-relative relocation to
3965 the other symbol. We have to adjust the relocation type here. */
3969 /* Safeguard; this must not occur for non-sh64 configurations. */
3970 gas_assert (fixP
->fx_r_type
!= BFD_RELOC_64
);
3973 switch (fixP
->fx_r_type
)
3979 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3982 /* Currently, we only support 32-bit PCREL relocations.
3983 We'd need a new reloc type to handle 16_PCREL, and
3984 8_PCREL is already taken for R_SH_SWITCH8, which
3985 apparently does something completely different than what
3988 bfd_set_error (bfd_error_bad_value
);
3992 bfd_set_error (bfd_error_bad_value
);
3997 /* The function adjust_reloc_syms won't convert a reloc against a weak
3998 symbol into a reloc against a section, but bfd_install_relocation
3999 will screw up if the symbol is defined, so we have to adjust val here
4000 to avoid the screw up later.
4002 For ordinary relocs, this does not happen for ELF, since for ELF,
4003 bfd_install_relocation uses the "special function" field of the
4004 howto, and does not execute the code that needs to be undone, as long
4005 as the special function does not return bfd_reloc_continue.
4006 It can happen for GOT- and PLT-type relocs the way they are
4007 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
4008 doesn't matter here since those relocs don't use VAL; see below. */
4009 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
4010 && fixP
->fx_addsy
!= NULL
4011 && S_IS_WEAK (fixP
->fx_addsy
))
4012 val
-= S_GET_VALUE (fixP
->fx_addsy
);
4014 if (SWITCH_TABLE (fixP
))
4015 val
-= S_GET_VALUE (fixP
->fx_subsy
);
4019 switch (fixP
->fx_r_type
)
4021 case BFD_RELOC_SH_IMM3
:
4023 * buf
= (* buf
& 0xf8) | (val
& 0x7);
4025 case BFD_RELOC_SH_IMM3U
:
4027 * buf
= (* buf
& 0x8f) | ((val
& 0x7) << 4);
4029 case BFD_RELOC_SH_DISP12
:
4031 buf
[lowbyte
] = val
& 0xff;
4032 buf
[highbyte
] |= (val
>> 8) & 0x0f;
4034 case BFD_RELOC_SH_DISP12BY2
:
4037 buf
[lowbyte
] = (val
>> 1) & 0xff;
4038 buf
[highbyte
] |= (val
>> 9) & 0x0f;
4040 case BFD_RELOC_SH_DISP12BY4
:
4043 buf
[lowbyte
] = (val
>> 2) & 0xff;
4044 buf
[highbyte
] |= (val
>> 10) & 0x0f;
4046 case BFD_RELOC_SH_DISP12BY8
:
4049 buf
[lowbyte
] = (val
>> 3) & 0xff;
4050 buf
[highbyte
] |= (val
>> 11) & 0x0f;
4052 case BFD_RELOC_SH_DISP20
:
4053 if (! target_big_endian
)
4057 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 12) & 0xf0);
4058 buf
[2] = (val
>> 8) & 0xff;
4059 buf
[3] = val
& 0xff;
4061 case BFD_RELOC_SH_DISP20BY8
:
4062 if (!target_big_endian
)
4067 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 20) & 0xf0);
4068 buf
[2] = (val
>> 16) & 0xff;
4069 buf
[3] = (val
>> 8) & 0xff;
4072 case BFD_RELOC_SH_IMM4
:
4074 *buf
= (*buf
& 0xf0) | (val
& 0xf);
4077 case BFD_RELOC_SH_IMM4BY2
:
4080 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
4083 case BFD_RELOC_SH_IMM4BY4
:
4086 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
4089 case BFD_RELOC_SH_IMM8BY2
:
4095 case BFD_RELOC_SH_IMM8BY4
:
4102 case BFD_RELOC_SH_IMM8
:
4103 /* Sometimes the 8 bit value is sign extended (e.g., add) and
4104 sometimes it is not (e.g., and). We permit any 8 bit value.
4105 Note that adding further restrictions may invalidate
4106 reasonable looking assembly code, such as ``and -0x1,r0''. */
4112 case BFD_RELOC_SH_PCRELIMM8BY4
:
4113 /* If we are dealing with a known destination ... */
4114 if ((fixP
->fx_addsy
== NULL
|| S_IS_DEFINED (fixP
->fx_addsy
))
4115 && (fixP
->fx_subsy
== NULL
|| S_IS_DEFINED (fixP
->fx_addsy
)))
4117 /* Don't silently move the destination due to misalignment.
4118 The absolute address is the fragment base plus the offset into
4119 the fragment plus the pc relative offset to the label. */
4120 if ((fixP
->fx_frag
->fr_address
+ fixP
->fx_where
+ val
) & 3)
4121 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
4122 _("offset to unaligned destination"));
4124 /* The displacement cannot be zero or backward even if aligned.
4125 Allow -2 because val has already been adjusted somewhere. */
4127 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("negative offset"));
4130 /* The lower two bits of the PC are cleared before the
4131 displacement is added in. We can assume that the destination
4132 is on a 4 byte boundary. If this instruction is also on a 4
4133 byte boundary, then we want
4135 and target - here is a multiple of 4.
4136 Otherwise, we are on a 2 byte boundary, and we want
4137 (target - (here - 2)) / 4
4138 and target - here is not a multiple of 4. Computing
4139 (target - (here - 2)) / 4 == (target - here + 2) / 4
4140 works for both cases, since in the first case the addition of
4141 2 will be removed by the division. target - here is in the
4143 val
= (val
+ 2) / 4;
4145 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4149 case BFD_RELOC_SH_PCRELIMM8BY2
:
4152 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4156 case BFD_RELOC_SH_PCDISP8BY2
:
4158 if (val
< -0x80 || val
> 0x7f)
4159 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4163 case BFD_RELOC_SH_PCDISP12BY2
:
4165 if (val
< -0x800 || val
> 0x7ff)
4166 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4167 buf
[lowbyte
] = val
& 0xff;
4168 buf
[highbyte
] |= (val
>> 8) & 0xf;
4173 apply_full_field_fix (fixP
, buf
, *valP
, 8);
4178 case BFD_RELOC_32_PCREL
:
4179 apply_full_field_fix (fixP
, buf
, val
, 4);
4183 apply_full_field_fix (fixP
, buf
, val
, 2);
4186 case BFD_RELOC_SH_USES
:
4187 /* Pass the value into sh_reloc(). */
4188 fixP
->fx_addnumber
= val
;
4191 case BFD_RELOC_SH_COUNT
:
4192 case BFD_RELOC_SH_ALIGN
:
4193 case BFD_RELOC_SH_CODE
:
4194 case BFD_RELOC_SH_DATA
:
4195 case BFD_RELOC_SH_LABEL
:
4196 /* Nothing to do here. */
4199 case BFD_RELOC_SH_LOOP_START
:
4200 case BFD_RELOC_SH_LOOP_END
:
4202 case BFD_RELOC_VTABLE_INHERIT
:
4203 case BFD_RELOC_VTABLE_ENTRY
:
4208 case BFD_RELOC_32_PLT_PCREL
:
4209 /* Make the jump instruction point to the address of the operand. At
4210 runtime we merely add the offset to the actual PLT entry. */
4211 * valP
= 0xfffffffc;
4212 val
= fixP
->fx_offset
;
4214 val
-= S_GET_VALUE (fixP
->fx_subsy
);
4215 apply_full_field_fix (fixP
, buf
, val
, 4);
4218 case BFD_RELOC_SH_GOTPC
:
4219 /* This is tough to explain. We end up with this one if we have
4220 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
4221 The goal here is to obtain the absolute address of the GOT,
4222 and it is strongly preferable from a performance point of
4223 view to avoid using a runtime relocation for this. There are
4224 cases where you have something like:
4226 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
4228 and here no correction would be required. Internally in the
4229 assembler we treat operands of this form as not being pcrel
4230 since the '.' is explicitly mentioned, and I wonder whether
4231 it would simplify matters to do it this way. Who knows. In
4232 earlier versions of the PIC patches, the pcrel_adjust field
4233 was used to store the correction, but since the expression is
4234 not pcrel, I felt it would be confusing to do it this way. */
4236 apply_full_field_fix (fixP
, buf
, val
, 4);
4239 case BFD_RELOC_SH_TLS_GD_32
:
4240 case BFD_RELOC_SH_TLS_LD_32
:
4241 case BFD_RELOC_SH_TLS_IE_32
:
4242 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
4244 case BFD_RELOC_32_GOT_PCREL
:
4245 case BFD_RELOC_SH_GOT20
:
4246 case BFD_RELOC_SH_GOTPLT32
:
4247 case BFD_RELOC_SH_GOTFUNCDESC
:
4248 case BFD_RELOC_SH_GOTFUNCDESC20
:
4249 case BFD_RELOC_SH_GOTOFFFUNCDESC
:
4250 case BFD_RELOC_SH_GOTOFFFUNCDESC20
:
4251 case BFD_RELOC_SH_FUNCDESC
:
4252 * valP
= 0; /* Fully resolved at runtime. No addend. */
4253 apply_full_field_fix (fixP
, buf
, 0, 4);
4256 case BFD_RELOC_SH_TLS_LDO_32
:
4257 case BFD_RELOC_SH_TLS_LE_32
:
4258 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
4260 case BFD_RELOC_32_GOTOFF
:
4261 case BFD_RELOC_SH_GOTOFF20
:
4262 apply_full_field_fix (fixP
, buf
, val
, 4);
4268 shmedia_md_apply_fix (fixP
, valP
);
4277 if ((val
& ((1 << shift
) - 1)) != 0)
4278 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
4282 val
= ((val
>> shift
)
4283 | ((long) -1 & ~ ((long) -1 >> shift
)));
4286 /* Extend sign for 64-bit host. */
4287 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
4288 if (max
!= 0 && (val
< min
|| val
> max
))
4289 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
4291 /* Stop the generic code from trying to overlow check the value as well.
4292 It may not have the correct value anyway, as we do not store val back
4294 fixP
->fx_no_overflow
= 1;
4296 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
4300 /* Called just before address relaxation. Return the length
4301 by which a fragment must grow to reach it's destination. */
4304 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
4308 switch (fragP
->fr_subtype
)
4312 return shmedia_md_estimate_size_before_relax (fragP
, segment_type
);
4318 case C (UNCOND_JUMP
, UNDEF_DISP
):
4319 /* Used to be a branch to somewhere which was unknown. */
4320 if (!fragP
->fr_symbol
)
4322 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
4324 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
4326 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
4330 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
4334 case C (COND_JUMP
, UNDEF_DISP
):
4335 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
4336 what
= GET_WHAT (fragP
->fr_subtype
);
4337 /* Used to be a branch to somewhere which was unknown. */
4338 if (fragP
->fr_symbol
4339 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
4341 /* Got a symbol and it's defined in this segment, become byte
4342 sized - maybe it will fix up. */
4343 fragP
->fr_subtype
= C (what
, COND8
);
4345 else if (fragP
->fr_symbol
)
4347 /* Its got a segment, but its not ours, so it will always be long. */
4348 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
4352 /* We know the abs value. */
4353 fragP
->fr_subtype
= C (what
, COND8
);
4357 case C (UNCOND_JUMP
, UNCOND12
):
4358 case C (UNCOND_JUMP
, UNCOND32
):
4359 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
4360 case C (COND_JUMP
, COND8
):
4361 case C (COND_JUMP
, COND12
):
4362 case C (COND_JUMP
, COND32
):
4363 case C (COND_JUMP
, UNDEF_WORD_DISP
):
4364 case C (COND_JUMP_DELAY
, COND8
):
4365 case C (COND_JUMP_DELAY
, COND12
):
4366 case C (COND_JUMP_DELAY
, COND32
):
4367 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
4368 /* When relaxing a section for the second time, we don't need to
4369 do anything besides return the current size. */
4373 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
4374 return fragP
->fr_var
;
4377 /* Put number into target byte order. */
4380 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
4383 /* We might need to set the contents type to data. */
4384 sh64_flag_output ();
4387 if (! target_big_endian
)
4388 number_to_chars_littleendian (ptr
, use
, nbytes
);
4390 number_to_chars_bigendian (ptr
, use
, nbytes
);
4393 /* This version is used in obj-coff.c eg. for the sh-hms target. */
4396 md_pcrel_from (fixS
*fixP
)
4398 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
4402 md_pcrel_from_section (fixS
*fixP
, segT sec
)
4404 if (! sh_local_pcrel (fixP
)
4405 && fixP
->fx_addsy
!= (symbolS
*) NULL
4406 && (generic_force_reloc (fixP
)
4407 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
4409 /* The symbol is undefined (or is defined but not in this section,
4410 or we're not sure about it being the final definition). Let the
4411 linker figure it out. We need to adjust the subtraction of a
4412 symbol to the position of the relocated data, though. */
4413 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
4416 return md_pcrel_from (fixP
);
4419 /* Create a reloc. */
4422 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
4425 bfd_reloc_code_real_type r_type
;
4427 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4428 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4429 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4430 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4432 r_type
= fixp
->fx_r_type
;
4434 if (SWITCH_TABLE (fixp
))
4436 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
4438 if (r_type
== BFD_RELOC_16
)
4439 r_type
= BFD_RELOC_SH_SWITCH16
;
4440 else if (r_type
== BFD_RELOC_8
)
4441 r_type
= BFD_RELOC_8_PCREL
;
4442 else if (r_type
== BFD_RELOC_32
)
4443 r_type
= BFD_RELOC_SH_SWITCH32
;
4447 else if (r_type
== BFD_RELOC_SH_USES
)
4448 rel
->addend
= fixp
->fx_addnumber
;
4449 else if (r_type
== BFD_RELOC_SH_COUNT
)
4450 rel
->addend
= fixp
->fx_offset
;
4451 else if (r_type
== BFD_RELOC_SH_ALIGN
)
4452 rel
->addend
= fixp
->fx_offset
;
4453 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
4454 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
4455 rel
->addend
= fixp
->fx_offset
;
4456 else if (r_type
== BFD_RELOC_SH_LOOP_START
4457 || r_type
== BFD_RELOC_SH_LOOP_END
)
4458 rel
->addend
= fixp
->fx_offset
;
4459 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
4462 rel
->address
= rel
->addend
= fixp
->fx_offset
;
4465 else if (shmedia_init_reloc (rel
, fixp
))
4469 rel
->addend
= fixp
->fx_addnumber
;
4471 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
4473 if (rel
->howto
== NULL
)
4475 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4476 _("Cannot represent relocation type %s"),
4477 bfd_get_reloc_code_name (r_type
));
4478 /* Set howto to a garbage value so that we can keep going. */
4479 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4480 gas_assert (rel
->howto
!= NULL
);
4483 else if (rel
->howto
->type
== R_SH_IND12W
)
4484 rel
->addend
+= fixp
->fx_offset
- 4;
4491 inline static char *
4492 sh_end_of_match (char *cont
, char *what
)
4494 int len
= strlen (what
);
4496 if (strncasecmp (cont
, what
, strlen (what
)) == 0
4497 && ! is_part_of_name (cont
[len
]))
4504 sh_parse_name (char const *name
,
4506 enum expr_mode mode
,
4509 char *next
= input_line_pointer
;
4514 exprP
->X_op_symbol
= NULL
;
4516 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4519 GOT_symbol
= symbol_find_or_make (name
);
4521 exprP
->X_add_symbol
= GOT_symbol
;
4523 /* If we have an absolute symbol or a reg, then we know its
4525 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
4526 if (mode
!= expr_defer
&& segment
== absolute_section
)
4528 exprP
->X_op
= O_constant
;
4529 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4530 exprP
->X_add_symbol
= NULL
;
4532 else if (mode
!= expr_defer
&& segment
== reg_section
)
4534 exprP
->X_op
= O_register
;
4535 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4536 exprP
->X_add_symbol
= NULL
;
4540 exprP
->X_op
= O_symbol
;
4541 exprP
->X_add_number
= 0;
4547 exprP
->X_add_symbol
= symbol_find_or_make (name
);
4549 if (*nextcharP
!= '@')
4551 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFF")))
4552 reloc_type
= BFD_RELOC_32_GOTOFF
;
4553 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTPLT")))
4554 reloc_type
= BFD_RELOC_SH_GOTPLT32
;
4555 else if ((next_end
= sh_end_of_match (next
+ 1, "GOT")))
4556 reloc_type
= BFD_RELOC_32_GOT_PCREL
;
4557 else if ((next_end
= sh_end_of_match (next
+ 1, "PLT")))
4558 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
4559 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSGD")))
4560 reloc_type
= BFD_RELOC_SH_TLS_GD_32
;
4561 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSLDM")))
4562 reloc_type
= BFD_RELOC_SH_TLS_LD_32
;
4563 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTTPOFF")))
4564 reloc_type
= BFD_RELOC_SH_TLS_IE_32
;
4565 else if ((next_end
= sh_end_of_match (next
+ 1, "TPOFF")))
4566 reloc_type
= BFD_RELOC_SH_TLS_LE_32
;
4567 else if ((next_end
= sh_end_of_match (next
+ 1, "DTPOFF")))
4568 reloc_type
= BFD_RELOC_SH_TLS_LDO_32
;
4569 else if ((next_end
= sh_end_of_match (next
+ 1, "PCREL")))
4570 reloc_type
= BFD_RELOC_32_PCREL
;
4571 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTFUNCDESC")))
4572 reloc_type
= BFD_RELOC_SH_GOTFUNCDESC
;
4573 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFFFUNCDESC")))
4574 reloc_type
= BFD_RELOC_SH_GOTOFFFUNCDESC
;
4575 else if ((next_end
= sh_end_of_match (next
+ 1, "FUNCDESC")))
4576 reloc_type
= BFD_RELOC_SH_FUNCDESC
;
4580 *input_line_pointer
= *nextcharP
;
4581 input_line_pointer
= next_end
;
4582 *nextcharP
= *input_line_pointer
;
4583 *input_line_pointer
= '\0';
4585 exprP
->X_op
= O_PIC_reloc
;
4586 exprP
->X_add_number
= 0;
4587 exprP
->X_md
= reloc_type
;
4593 sh_cfi_frame_initial_instructions (void)
4595 cfi_add_CFA_def_cfa (15, 0);
4599 sh_regname_to_dw2regnum (char *regname
)
4601 unsigned int regnum
= -1;
4605 static struct { char *name
; int dw2regnum
; } regnames
[] =
4607 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 },
4608 { "macl", 21 }, { "fpul", 23 }
4611 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
4612 if (strcmp (regnames
[i
].name
, regname
) == 0)
4613 return regnames
[i
].dw2regnum
;
4615 if (regname
[0] == 'r')
4618 regnum
= strtoul (p
, &q
, 10);
4619 if (p
== q
|| *q
|| regnum
>= 16)
4622 else if (regname
[0] == 'f' && regname
[1] == 'r')
4625 regnum
= strtoul (p
, &q
, 10);
4626 if (p
== q
|| *q
|| regnum
>= 16)
4630 else if (regname
[0] == 'x' && regname
[1] == 'd')
4633 regnum
= strtoul (p
, &q
, 10);
4634 if (p
== q
|| *q
|| regnum
>= 8)
4640 #endif /* OBJ_ELF */