1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright (C) 1993-2016 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19 Boston, MA 02110-1301, USA. */
21 /* Written By Steve Chamberlain <sac@cygnus.com> */
26 #include "opcodes/sh-opc.h"
27 #include "safe-ctype.h"
28 #include "struc-symbol.h"
34 #include "dwarf2dbg.h"
35 #include "dw2gencfi.h"
41 expressionS immediate
;
45 const char comment_chars
[] = "!";
46 const char line_separator_chars
[] = ";";
47 const char line_comment_chars
[] = "!#";
49 static void s_uses (int);
50 static void s_uacons (int);
53 static void sh_elf_cons (int);
55 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
59 big (int ignore ATTRIBUTE_UNUSED
)
61 if (! target_big_endian
)
62 as_bad (_("directive .big encountered when option -big required"));
64 /* Stop further messages. */
65 target_big_endian
= 1;
69 little (int ignore ATTRIBUTE_UNUSED
)
71 if (target_big_endian
)
72 as_bad (_("directive .little encountered when option -little required"));
74 /* Stop further messages. */
75 target_big_endian
= 0;
78 /* This table describes all the machine specific pseudo-ops the assembler
79 has to support. The fields are:
80 pseudo-op name without dot
81 function to call to execute this pseudo-op
82 Integer arg to pass to the function. */
84 const pseudo_typeS md_pseudo_table
[] =
87 {"long", sh_elf_cons
, 4},
88 {"int", sh_elf_cons
, 4},
89 {"word", sh_elf_cons
, 2},
90 {"short", sh_elf_cons
, 2},
96 {"form", listing_psize
, 0},
97 {"little", little
, 0},
98 {"heading", listing_title
, 0},
99 {"import", s_ignore
, 0},
100 {"page", listing_eject
, 0},
101 {"program", s_ignore
, 0},
103 {"uaword", s_uacons
, 2},
104 {"ualong", s_uacons
, 4},
105 {"uaquad", s_uacons
, 8},
106 {"2byte", s_uacons
, 2},
107 {"4byte", s_uacons
, 4},
108 {"8byte", s_uacons
, 8},
110 {"mode", s_sh64_mode
, 0 },
112 /* Have the old name too. */
113 {"isa", s_sh64_mode
, 0 },
115 /* Assert that the right ABI is used. */
116 {"abi", s_sh64_abi
, 0 },
118 { "vtable_inherit", sh64_vtable_inherit
, 0 },
119 { "vtable_entry", sh64_vtable_entry
, 0 },
120 #endif /* HAVE_SH64 */
124 int sh_relax
; /* set if -relax seen */
126 /* Whether -small was seen. */
130 /* Flag to generate relocations against symbol values for local symbols. */
132 static int dont_adjust_reloc_32
;
134 /* Flag to indicate that '$' is allowed as a register prefix. */
136 static int allow_dollar_register_prefix
;
138 /* Preset architecture set, if given; zero otherwise. */
140 static unsigned int preset_target_arch
;
142 /* The bit mask of architectures that could
143 accommodate the insns seen so far. */
144 static unsigned int valid_arch
;
147 /* Whether --fdpic was given. */
151 const char EXP_CHARS
[] = "eE";
153 /* Chars that mean this number is a floating point constant. */
156 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
158 #define C(a,b) ENCODE_RELAX(a,b)
160 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
161 #define GET_WHAT(x) ((x>>4))
163 /* These are the three types of relaxable instruction. */
164 /* These are the types of relaxable instructions; except for END which is
167 #define COND_JUMP_DELAY 2
168 #define UNCOND_JUMP 3
172 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
173 #define SH64PCREL16_32 4
174 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
175 #define SH64PCREL16_64 5
177 /* Variants of the above for adjusting the insn to PTA or PTB according to
179 #define SH64PCREL16PT_32 6
180 #define SH64PCREL16PT_64 7
182 /* A MOVI expansion, expanding to at most 32 or 64 bits. */
183 #define MOVI_IMM_32 8
184 #define MOVI_IMM_32_PCREL 9
185 #define MOVI_IMM_64 10
186 #define MOVI_IMM_64_PCREL 11
189 #else /* HAVE_SH64 */
193 #endif /* HAVE_SH64 */
199 #define UNDEF_WORD_DISP 4
205 #define UNDEF_SH64PCREL 0
206 #define SH64PCREL16 1
207 #define SH64PCREL32 2
208 #define SH64PCREL48 3
209 #define SH64PCREL64 4
210 #define SH64PCRELPLT 5
218 #define MOVI_GOTOFF 6
220 #endif /* HAVE_SH64 */
222 /* Branch displacements are from the address of the branch plus
223 four, thus all minimum and maximum values have 4 added to them. */
226 #define COND8_LENGTH 2
228 /* There is one extra instruction before the branch, so we must add
229 two more bytes to account for it. */
230 #define COND12_F 4100
231 #define COND12_M -4090
232 #define COND12_LENGTH 6
234 #define COND12_DELAY_LENGTH 4
236 /* ??? The minimum and maximum values are wrong, but this does not matter
237 since this relocation type is not supported yet. */
238 #define COND32_F (1<<30)
239 #define COND32_M -(1<<30)
240 #define COND32_LENGTH 14
242 #define UNCOND12_F 4098
243 #define UNCOND12_M -4092
244 #define UNCOND12_LENGTH 2
246 /* ??? The minimum and maximum values are wrong, but this does not matter
247 since this relocation type is not supported yet. */
248 #define UNCOND32_F (1<<30)
249 #define UNCOND32_M -(1<<30)
250 #define UNCOND32_LENGTH 14
253 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
254 TRd" as is the current insn, so no extra length. Note that the "reach"
255 is calculated from the address *after* that insn, but the offset in the
256 insn is calculated from the beginning of the insn. We also need to
257 take into account the implicit 1 coded as the "A" in PTA when counting
258 forward. If PTB reaches an odd address, we trap that as an error
259 elsewhere, so we don't have to have different relaxation entries. We
260 don't add a one to the negative range, since PTB would then have the
261 farthest backward-reaching value skipped, not generated at relaxation. */
262 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
263 #define SH64PCREL16_M (-32768 * 4 - 4)
264 #define SH64PCREL16_LENGTH 0
266 /* The next step is to change that PT insn into
267 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
268 SHORI (label - datalabel Ln) & 65535, R25
271 which means two extra insns, 8 extra bytes. This is the limit for the
274 The expressions look a bit bad since we have to adjust this to avoid overflow on a
276 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
277 #define SH64PCREL32_LENGTH (2 * 4)
279 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
281 #if BFD_HOST_64BIT_LONG
282 /* The "reach" type is long, so we can only do this for a 64-bit-long
284 #define SH64PCREL32_M ((-((long) 1 << 30)) * 2 - 4)
285 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
286 #define SH64PCREL48_M ((-((long) 1 << 47)) - 4)
287 #define SH64PCREL48_LENGTH (3 * 4)
289 /* If the host does not have 64-bit longs, just make this state identical
290 in reach to the 32-bit state. Note that we have a slightly incorrect
291 reach, but the correct one above will overflow a 32-bit number. */
292 #define SH64PCREL32_M ((-((long) 1 << 30)) * 2)
293 #define SH64PCREL48_F SH64PCREL32_F
294 #define SH64PCREL48_M SH64PCREL32_M
295 #define SH64PCREL48_LENGTH (3 * 4)
296 #endif /* BFD_HOST_64BIT_LONG */
298 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
300 #define SH64PCREL64_LENGTH (4 * 4)
302 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
303 SH64PCREL expansions. The PCREL one is similar, but the other has no
304 pc-relative reach; it must be fully expanded in
305 shmedia_md_estimate_size_before_relax. */
306 #define MOVI_16_LENGTH 0
307 #define MOVI_16_F (32767 - 4)
308 #define MOVI_16_M (-32768 - 4)
309 #define MOVI_32_LENGTH 4
310 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
311 #define MOVI_48_LENGTH 8
313 #if BFD_HOST_64BIT_LONG
314 /* The "reach" type is long, so we can only do this for a 64-bit-long
316 #define MOVI_32_M ((-((long) 1 << 30)) * 2 - 4)
317 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
318 #define MOVI_48_M ((-((long) 1 << 47)) - 4)
320 /* If the host does not have 64-bit longs, just make this state identical
321 in reach to the 32-bit state. Note that we have a slightly incorrect
322 reach, but the correct one above will overflow a 32-bit number. */
323 #define MOVI_32_M ((-((long) 1 << 30)) * 2)
324 #define MOVI_48_F MOVI_32_F
325 #define MOVI_48_M MOVI_32_M
326 #endif /* BFD_HOST_64BIT_LONG */
328 #define MOVI_64_LENGTH 12
329 #endif /* HAVE_SH64 */
331 #define EMPTY { 0, 0, 0, 0 }
333 const relax_typeS md_relax_table
[C (END
, 0)] = {
334 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
335 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
338 /* C (COND_JUMP, COND8) */
339 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
340 /* C (COND_JUMP, COND12) */
341 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
342 /* C (COND_JUMP, COND32) */
343 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
344 /* C (COND_JUMP, UNDEF_WORD_DISP) */
345 { 0, 0, COND32_LENGTH
, 0, },
347 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
350 /* C (COND_JUMP_DELAY, COND8) */
351 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
352 /* C (COND_JUMP_DELAY, COND12) */
353 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
354 /* C (COND_JUMP_DELAY, COND32) */
355 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
356 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
357 { 0, 0, COND32_LENGTH
, 0, },
359 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
362 /* C (UNCOND_JUMP, UNCOND12) */
363 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
364 /* C (UNCOND_JUMP, UNCOND32) */
365 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
367 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
368 { 0, 0, UNCOND32_LENGTH
, 0, },
370 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
373 /* C (SH64PCREL16_32, SH64PCREL16) */
375 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_32
, SH64PCREL32
) },
376 /* C (SH64PCREL16_32, SH64PCREL32) */
377 { 0, 0, SH64PCREL32_LENGTH
, 0 },
379 /* C (SH64PCREL16_32, SH64PCRELPLT) */
380 { 0, 0, SH64PCREL32_LENGTH
, 0 },
382 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
384 /* C (SH64PCREL16_64, SH64PCREL16) */
386 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_64
, SH64PCREL32
) },
387 /* C (SH64PCREL16_64, SH64PCREL32) */
388 { SH64PCREL32_F
, SH64PCREL32_M
, SH64PCREL32_LENGTH
, C (SH64PCREL16_64
, SH64PCREL48
) },
389 /* C (SH64PCREL16_64, SH64PCREL48) */
390 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16_64
, SH64PCREL64
) },
391 /* C (SH64PCREL16_64, SH64PCREL64) */
392 { 0, 0, SH64PCREL64_LENGTH
, 0 },
393 /* C (SH64PCREL16_64, SH64PCRELPLT) */
394 { 0, 0, SH64PCREL64_LENGTH
, 0 },
396 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
398 /* C (SH64PCREL16PT_32, SH64PCREL16) */
400 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_32
, SH64PCREL32
) },
401 /* C (SH64PCREL16PT_32, SH64PCREL32) */
402 { 0, 0, SH64PCREL32_LENGTH
, 0 },
404 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
405 { 0, 0, SH64PCREL32_LENGTH
, 0 },
407 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
409 /* C (SH64PCREL16PT_64, SH64PCREL16) */
411 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL32
) },
412 /* C (SH64PCREL16PT_64, SH64PCREL32) */
416 C (SH64PCREL16PT_64
, SH64PCREL48
) },
417 /* C (SH64PCREL16PT_64, SH64PCREL48) */
418 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL64
) },
419 /* C (SH64PCREL16PT_64, SH64PCREL64) */
420 { 0, 0, SH64PCREL64_LENGTH
, 0 },
421 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
422 { 0, 0, SH64PCREL64_LENGTH
, 0},
424 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
426 /* C (MOVI_IMM_32, UNDEF_MOVI) */
427 { 0, 0, MOVI_32_LENGTH
, 0 },
428 /* C (MOVI_IMM_32, MOVI_16) */
429 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32
, MOVI_32
) },
430 /* C (MOVI_IMM_32, MOVI_32) */
431 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, 0 },
433 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
434 { 0, 0, MOVI_32_LENGTH
, 0 },
435 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
437 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
439 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32_PCREL
, MOVI_32
) },
440 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
441 { 0, 0, MOVI_32_LENGTH
, 0 },
443 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
444 { 0, 0, MOVI_32_LENGTH
, 0 },
446 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
447 { 0, 0, MOVI_32_LENGTH
, 0 },
448 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
450 /* C (MOVI_IMM_64, UNDEF_MOVI) */
451 { 0, 0, MOVI_64_LENGTH
, 0 },
452 /* C (MOVI_IMM_64, MOVI_16) */
453 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64
, MOVI_32
) },
454 /* C (MOVI_IMM_64, MOVI_32) */
455 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64
, MOVI_48
) },
456 /* C (MOVI_IMM_64, MOVI_48) */
457 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64
, MOVI_64
) },
458 /* C (MOVI_IMM_64, MOVI_64) */
459 { 0, 0, MOVI_64_LENGTH
, 0 },
461 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
462 { 0, 0, MOVI_64_LENGTH
, 0 },
463 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
465 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
467 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_32
) },
468 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
469 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_48
) },
470 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
471 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_64
) },
472 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
473 { 0, 0, MOVI_64_LENGTH
, 0 },
474 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
475 { 0, 0, MOVI_64_LENGTH
, 0 },
477 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
478 { 0, 0, MOVI_64_LENGTH
, 0 },
479 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
481 #endif /* HAVE_SH64 */
487 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
491 /* Determinet whether the symbol needs any kind of PIC relocation. */
494 sh_PIC_related_p (symbolS
*sym
)
501 if (sym
== GOT_symbol
)
505 if (sh_PIC_related_p (*symbol_get_tc (sym
)))
509 exp
= symbol_get_value_expression (sym
);
511 return (exp
->X_op
== O_PIC_reloc
512 || sh_PIC_related_p (exp
->X_add_symbol
)
513 || sh_PIC_related_p (exp
->X_op_symbol
));
516 /* Determine the relocation type to be used to represent the
517 expression, that may be rearranged. */
520 sh_check_fixup (expressionS
*main_exp
, bfd_reloc_code_real_type
*r_type_p
)
522 expressionS
*exp
= main_exp
;
524 /* This is here for backward-compatibility only. GCC used to generated:
526 f@PLT + . - (.LPCS# + 2)
528 but we'd rather be able to handle this as a PIC-related reference
529 plus/minus a symbol. However, gas' parser gives us:
531 O_subtract (O_add (f@PLT, .), .LPCS#+2)
533 so we attempt to transform this into:
535 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
537 which we can handle simply below. */
538 if (exp
->X_op
== O_subtract
)
540 if (sh_PIC_related_p (exp
->X_op_symbol
))
543 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
545 if (exp
&& sh_PIC_related_p (exp
->X_op_symbol
))
548 if (exp
&& exp
->X_op
== O_add
549 && sh_PIC_related_p (exp
->X_add_symbol
))
551 symbolS
*sym
= exp
->X_add_symbol
;
553 exp
->X_op
= O_subtract
;
554 exp
->X_add_symbol
= main_exp
->X_op_symbol
;
556 main_exp
->X_op_symbol
= main_exp
->X_add_symbol
;
557 main_exp
->X_add_symbol
= sym
;
559 main_exp
->X_add_number
+= exp
->X_add_number
;
560 exp
->X_add_number
= 0;
565 else if (exp
->X_op
== O_add
&& sh_PIC_related_p (exp
->X_op_symbol
))
568 if (exp
->X_op
== O_symbol
|| exp
->X_op
== O_add
|| exp
->X_op
== O_subtract
)
571 if (exp
->X_add_symbol
572 && (exp
->X_add_symbol
== GOT_symbol
574 && *symbol_get_tc (exp
->X_add_symbol
) == GOT_symbol
)))
578 case BFD_RELOC_SH_IMM_LOW16
:
579 *r_type_p
= BFD_RELOC_SH_GOTPC_LOW16
;
582 case BFD_RELOC_SH_IMM_MEDLOW16
:
583 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDLOW16
;
586 case BFD_RELOC_SH_IMM_MEDHI16
:
587 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDHI16
;
590 case BFD_RELOC_SH_IMM_HI16
:
591 *r_type_p
= BFD_RELOC_SH_GOTPC_HI16
;
595 case BFD_RELOC_UNUSED
:
596 *r_type_p
= BFD_RELOC_SH_GOTPC
;
605 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
607 *r_type_p
= BFD_RELOC_SH_GOTPC
;
611 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
616 if (exp
->X_op
== O_PIC_reloc
)
621 case BFD_RELOC_UNUSED
:
622 *r_type_p
= exp
->X_md
;
625 case BFD_RELOC_SH_DISP20
:
628 case BFD_RELOC_32_GOT_PCREL
:
629 *r_type_p
= BFD_RELOC_SH_GOT20
;
632 case BFD_RELOC_32_GOTOFF
:
633 *r_type_p
= BFD_RELOC_SH_GOTOFF20
;
636 case BFD_RELOC_SH_GOTFUNCDESC
:
637 *r_type_p
= BFD_RELOC_SH_GOTFUNCDESC20
;
640 case BFD_RELOC_SH_GOTOFFFUNCDESC
:
641 *r_type_p
= BFD_RELOC_SH_GOTOFFFUNCDESC20
;
650 case BFD_RELOC_SH_IMM_LOW16
:
653 case BFD_RELOC_32_GOTOFF
:
654 *r_type_p
= BFD_RELOC_SH_GOTOFF_LOW16
;
657 case BFD_RELOC_SH_GOTPLT32
:
658 *r_type_p
= BFD_RELOC_SH_GOTPLT_LOW16
;
661 case BFD_RELOC_32_GOT_PCREL
:
662 *r_type_p
= BFD_RELOC_SH_GOT_LOW16
;
665 case BFD_RELOC_32_PLT_PCREL
:
666 *r_type_p
= BFD_RELOC_SH_PLT_LOW16
;
674 case BFD_RELOC_SH_IMM_MEDLOW16
:
677 case BFD_RELOC_32_GOTOFF
:
678 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDLOW16
;
681 case BFD_RELOC_SH_GOTPLT32
:
682 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDLOW16
;
685 case BFD_RELOC_32_GOT_PCREL
:
686 *r_type_p
= BFD_RELOC_SH_GOT_MEDLOW16
;
689 case BFD_RELOC_32_PLT_PCREL
:
690 *r_type_p
= BFD_RELOC_SH_PLT_MEDLOW16
;
698 case BFD_RELOC_SH_IMM_MEDHI16
:
701 case BFD_RELOC_32_GOTOFF
:
702 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDHI16
;
705 case BFD_RELOC_SH_GOTPLT32
:
706 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDHI16
;
709 case BFD_RELOC_32_GOT_PCREL
:
710 *r_type_p
= BFD_RELOC_SH_GOT_MEDHI16
;
713 case BFD_RELOC_32_PLT_PCREL
:
714 *r_type_p
= BFD_RELOC_SH_PLT_MEDHI16
;
722 case BFD_RELOC_SH_IMM_HI16
:
725 case BFD_RELOC_32_GOTOFF
:
726 *r_type_p
= BFD_RELOC_SH_GOTOFF_HI16
;
729 case BFD_RELOC_SH_GOTPLT32
:
730 *r_type_p
= BFD_RELOC_SH_GOTPLT_HI16
;
733 case BFD_RELOC_32_GOT_PCREL
:
734 *r_type_p
= BFD_RELOC_SH_GOT_HI16
;
737 case BFD_RELOC_32_PLT_PCREL
:
738 *r_type_p
= BFD_RELOC_SH_PLT_HI16
;
751 exp
->X_op
= O_symbol
;
754 main_exp
->X_add_symbol
= exp
->X_add_symbol
;
755 main_exp
->X_add_number
+= exp
->X_add_number
;
759 return (sh_PIC_related_p (exp
->X_add_symbol
)
760 || sh_PIC_related_p (exp
->X_op_symbol
));
765 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
768 sh_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
,
769 bfd_reloc_code_real_type r_type
)
771 r_type
= BFD_RELOC_UNUSED
;
773 if (sh_check_fixup (exp
, &r_type
))
774 as_bad (_("Invalid PIC expression."));
776 if (r_type
== BFD_RELOC_UNUSED
)
780 r_type
= BFD_RELOC_8
;
784 r_type
= BFD_RELOC_16
;
788 r_type
= BFD_RELOC_32
;
792 r_type
= BFD_RELOC_64
;
801 as_bad (_("unsupported BFD relocation size %u"), size
);
802 r_type
= BFD_RELOC_UNUSED
;
805 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
808 /* The regular cons() function, that reads constants, doesn't support
809 suffixes such as @GOT, @GOTOFF and @PLT, that generate
810 machine-specific relocation types. So we must define it here. */
811 /* Clobbers input_line_pointer, checks end-of-line. */
812 /* NBYTES 1=.byte, 2=.word, 4=.long */
814 sh_elf_cons (int nbytes
)
820 /* Update existing range to include a previous insn, if there was one. */
821 sh64_update_contents_mark (TRUE
);
823 /* We need to make sure the contents type is set to data. */
826 #endif /* HAVE_SH64 */
828 if (is_it_end_of_statement ())
830 demand_empty_rest_of_line ();
835 md_cons_align (nbytes
);
841 emit_expr (&exp
, (unsigned int) nbytes
);
843 while (*input_line_pointer
++ == ',');
845 input_line_pointer
--; /* Put terminator back into stream. */
846 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
848 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
851 demand_empty_rest_of_line ();
854 /* The regular frag_offset_fixed_p doesn't work for rs_align_test
858 align_test_frag_offset_fixed_p (const fragS
*frag1
, const fragS
*frag2
,
864 /* Start with offset initialised to difference between the two frags.
865 Prior to assigning frag addresses this will be zero. */
866 off
= frag1
->fr_address
- frag2
->fr_address
;
873 /* Maybe frag2 is after frag1. */
875 while (frag
->fr_type
== rs_fill
876 || frag
->fr_type
== rs_align_test
)
878 if (frag
->fr_type
== rs_fill
)
879 off
+= frag
->fr_fix
+ frag
->fr_offset
* frag
->fr_var
;
882 frag
= frag
->fr_next
;
892 /* Maybe frag1 is after frag2. */
893 off
= frag1
->fr_address
- frag2
->fr_address
;
895 while (frag
->fr_type
== rs_fill
896 || frag
->fr_type
== rs_align_test
)
898 if (frag
->fr_type
== rs_fill
)
899 off
-= frag
->fr_fix
+ frag
->fr_offset
* frag
->fr_var
;
902 frag
= frag
->fr_next
;
915 /* Optimize a difference of symbols which have rs_align_test frag if
919 sh_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
924 && l
->X_op
== O_symbol
925 && r
->X_op
== O_symbol
926 && S_GET_SEGMENT (l
->X_add_symbol
) == S_GET_SEGMENT (r
->X_add_symbol
)
927 && (SEG_NORMAL (S_GET_SEGMENT (l
->X_add_symbol
))
928 || r
->X_add_symbol
== l
->X_add_symbol
)
929 && align_test_frag_offset_fixed_p (symbol_get_frag (l
->X_add_symbol
),
930 symbol_get_frag (r
->X_add_symbol
),
933 offsetT symval_diff
= S_GET_VALUE (l
->X_add_symbol
)
934 - S_GET_VALUE (r
->X_add_symbol
);
935 subtract_from_result (l
, r
->X_add_number
, r
->X_extrabit
);
936 subtract_from_result (l
, frag_off
/ OCTETS_PER_BYTE
, 0);
937 add_to_result (l
, symval_diff
, symval_diff
< 0);
938 l
->X_op
= O_constant
;
946 /* This function is called once, at assembler startup time. This should
947 set up all the tables, etc that the MD part of the assembler needs. */
952 const sh_opcode_info
*opcode
;
953 const char *prev_name
= "";
954 unsigned int target_arch
;
957 = preset_target_arch
? preset_target_arch
: arch_sh_up
& ~arch_sh_has_dsp
;
958 valid_arch
= target_arch
;
964 opcode_hash_control
= hash_new ();
966 /* Insert unique names into hash table. */
967 for (opcode
= sh_table
; opcode
->name
; opcode
++)
969 if (strcmp (prev_name
, opcode
->name
) != 0)
971 if (!SH_MERGE_ARCH_SET_VALID (opcode
->arch
, target_arch
))
973 prev_name
= opcode
->name
;
974 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
981 static int reg_x
, reg_y
;
985 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
987 /* Try to parse a reg name. Return the number of chars consumed. */
990 parse_reg_without_prefix (char *src
, sh_arg_type
*mode
, int *reg
)
992 char l0
= TOLOWER (src
[0]);
993 char l1
= l0
? TOLOWER (src
[1]) : 0;
995 /* We use ! IDENT_CHAR for the next character after the register name, to
996 make sure that we won't accidentally recognize a symbol name such as
997 'sram' or sr_ram as being a reference to the register 'sr'. */
1003 if (src
[2] >= '0' && src
[2] <= '5'
1004 && ! IDENT_CHAR ((unsigned char) src
[3]))
1007 *reg
= 10 + src
[2] - '0';
1011 if (l1
>= '0' && l1
<= '9'
1012 && ! IDENT_CHAR ((unsigned char) src
[2]))
1018 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
1019 && ! IDENT_CHAR ((unsigned char) src
[7]))
1026 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
1031 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
1042 if (! IDENT_CHAR ((unsigned char) src
[2]))
1048 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
1057 if (! IDENT_CHAR ((unsigned char) src
[2]))
1063 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
1071 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
1072 && ! IDENT_CHAR ((unsigned char) src
[3]))
1075 *reg
= 4 + (l1
- '0');
1078 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
1079 && ! IDENT_CHAR ((unsigned char) src
[3]))
1082 *reg
= 6 + (l1
- '0');
1085 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
1086 && ! IDENT_CHAR ((unsigned char) src
[3]))
1091 *reg
= n
| ((~n
& 2) << 1);
1096 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[2]))
1118 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
1119 && ! IDENT_CHAR ((unsigned char) src
[2]))
1122 *reg
= A_X0_NUM
+ l1
- '0';
1126 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
1127 && ! IDENT_CHAR ((unsigned char) src
[2]))
1130 *reg
= A_Y0_NUM
+ l1
- '0';
1134 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
1135 && ! IDENT_CHAR ((unsigned char) src
[2]))
1138 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
1144 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
1150 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
1151 && ! IDENT_CHAR ((unsigned char) src
[3]))
1157 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
1158 && ! IDENT_CHAR ((unsigned char) src
[3]))
1164 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
1165 && ! IDENT_CHAR ((unsigned char) src
[3]))
1171 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1172 && ! IDENT_CHAR ((unsigned char) src
[3]))
1178 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1184 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
1191 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1196 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
1198 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1199 and use an uninitialized immediate. */
1203 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1204 && ! IDENT_CHAR ((unsigned char) src
[3]))
1209 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1210 && ! IDENT_CHAR ((unsigned char) src
[3]))
1216 if (l0
== 't' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1217 && ! IDENT_CHAR ((unsigned char) src
[3]))
1222 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
1223 && ! IDENT_CHAR ((unsigned char) src
[4]))
1225 if (TOLOWER (src
[3]) == 'l')
1230 if (TOLOWER (src
[3]) == 'h')
1236 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
1237 && ! IDENT_CHAR ((unsigned char) src
[3]))
1242 if (l0
== 'f' && l1
== 'r')
1246 if (src
[3] >= '0' && src
[3] <= '5'
1247 && ! IDENT_CHAR ((unsigned char) src
[4]))
1250 *reg
= 10 + src
[3] - '0';
1254 if (src
[2] >= '0' && src
[2] <= '9'
1255 && ! IDENT_CHAR ((unsigned char) src
[3]))
1258 *reg
= (src
[2] - '0');
1262 if (l0
== 'd' && l1
== 'r')
1266 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1267 && ! IDENT_CHAR ((unsigned char) src
[4]))
1270 *reg
= 10 + src
[3] - '0';
1274 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1275 && ! IDENT_CHAR ((unsigned char) src
[3]))
1278 *reg
= (src
[2] - '0');
1282 if (l0
== 'x' && l1
== 'd')
1286 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1287 && ! IDENT_CHAR ((unsigned char) src
[4]))
1290 *reg
= 11 + src
[3] - '0';
1294 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1295 && ! IDENT_CHAR ((unsigned char) src
[3]))
1298 *reg
= (src
[2] - '0') + 1;
1302 if (l0
== 'f' && l1
== 'v')
1304 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
1310 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
1311 && ! IDENT_CHAR ((unsigned char) src
[3]))
1314 *reg
= (src
[2] - '0');
1318 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
1319 && TOLOWER (src
[3]) == 'l'
1320 && ! IDENT_CHAR ((unsigned char) src
[4]))
1326 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
1327 && TOLOWER (src
[3]) == 'c'
1328 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
1334 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
1335 && TOLOWER (src
[3]) == 'r'
1336 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
1345 /* Like parse_reg_without_prefix, but this version supports
1346 $-prefixed register names if enabled by the user. */
1349 parse_reg (char *src
, sh_arg_type
*mode
, int *reg
)
1351 unsigned int prefix
;
1352 unsigned int consumed
;
1356 if (allow_dollar_register_prefix
)
1367 consumed
= parse_reg_without_prefix (src
, mode
, reg
);
1372 return consumed
+ prefix
;
1376 parse_exp (char *s
, sh_operand_info
*op
)
1381 save
= input_line_pointer
;
1382 input_line_pointer
= s
;
1383 expression (&op
->immediate
);
1384 if (op
->immediate
.X_op
== O_absent
)
1385 as_bad (_("missing operand"));
1386 new_pointer
= input_line_pointer
;
1387 input_line_pointer
= save
;
1391 /* The many forms of operand:
1394 @Rn Register indirect
1407 pr, gbr, vbr, macl, mach
1411 parse_at (char *src
, sh_operand_info
*op
)
1418 src
= parse_at (src
, op
);
1419 if (op
->type
== A_DISP_TBR
)
1420 op
->type
= A_DISP2_TBR
;
1422 as_bad (_("illegal double indirection"));
1424 else if (src
[0] == '-')
1426 /* Must be predecrement. */
1429 len
= parse_reg (src
, &mode
, &(op
->reg
));
1430 if (mode
!= A_REG_N
)
1431 as_bad (_("illegal register after @-"));
1436 else if (src
[0] == '(')
1438 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1441 len
= parse_reg (src
, &mode
, &(op
->reg
));
1442 if (len
&& mode
== A_REG_N
)
1447 as_bad (_("must be @(r0,...)"));
1452 /* Now can be rn or gbr. */
1453 len
= parse_reg (src
, &mode
, &(op
->reg
));
1463 op
->type
= A_R0_GBR
;
1465 else if (mode
== A_REG_N
)
1467 op
->type
= A_IND_R0_REG_N
;
1471 as_bad (_("syntax error in @(r0,...)"));
1476 as_bad (_("syntax error in @(r0...)"));
1481 /* Must be an @(disp,.. thing). */
1482 src
= parse_exp (src
, op
);
1485 /* Now can be rn, gbr or pc. */
1486 len
= parse_reg (src
, &mode
, &op
->reg
);
1489 if (mode
== A_REG_N
)
1491 op
->type
= A_DISP_REG_N
;
1493 else if (mode
== A_GBR
)
1495 op
->type
= A_DISP_GBR
;
1497 else if (mode
== A_TBR
)
1499 op
->type
= A_DISP_TBR
;
1501 else if (mode
== A_PC
)
1503 /* We want @(expr, pc) to uniformly address . + expr,
1504 no matter if expr is a constant, or a more complex
1505 expression, e.g. sym-. or sym1-sym2.
1506 However, we also used to accept @(sym,pc)
1507 as addressing sym, i.e. meaning the same as plain sym.
1508 Some existing code does use the @(sym,pc) syntax, so
1509 we give it the old semantics for now, but warn about
1510 its use, so that users have some time to fix their code.
1512 Note that due to this backward compatibility hack,
1513 we'll get unexpected results when @(offset, pc) is used,
1514 and offset is a symbol that is set later to an an address
1515 difference, or an external symbol that is set to an
1516 address difference in another source file, so we want to
1517 eventually remove it. */
1518 if (op
->immediate
.X_op
== O_symbol
)
1520 op
->type
= A_DISP_PC
;
1521 as_warn (_("Deprecated syntax."));
1525 op
->type
= A_DISP_PC_ABS
;
1526 /* Such operands don't get corrected for PC==.+4, so
1527 make the correction here. */
1528 op
->immediate
.X_add_number
-= 4;
1533 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1538 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1543 as_bad (_("expecting )"));
1549 src
+= parse_reg (src
, &mode
, &(op
->reg
));
1550 if (mode
!= A_REG_N
)
1551 as_bad (_("illegal register after @"));
1558 l0
= TOLOWER (src
[0]);
1559 l1
= TOLOWER (src
[1]);
1561 if ((l0
== 'r' && l1
== '8')
1562 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1565 op
->type
= AX_PMOD_N
;
1567 else if ( (l0
== 'r' && l1
== '9')
1568 || (l0
== 'i' && l1
== 'y'))
1571 op
->type
= AY_PMOD_N
;
1583 get_operand (char **ptr
, sh_operand_info
*op
)
1586 sh_arg_type mode
= (sh_arg_type
) -1;
1592 *ptr
= parse_exp (src
, op
);
1597 else if (src
[0] == '@')
1599 *ptr
= parse_at (src
, op
);
1602 len
= parse_reg (src
, &mode
, &(op
->reg
));
1611 /* Not a reg, the only thing left is a displacement. */
1612 *ptr
= parse_exp (src
, op
);
1613 op
->type
= A_DISP_PC
;
1619 get_operands (sh_opcode_info
*info
, char *args
, sh_operand_info
*operand
)
1624 /* The pre-processor will eliminate whitespace in front of '@'
1625 after the first argument; we may be called multiple times
1626 from assemble_ppi, so don't insist on finding whitespace here. */
1630 get_operand (&ptr
, operand
+ 0);
1637 get_operand (&ptr
, operand
+ 1);
1638 /* ??? Hack: psha/pshl have a varying operand number depending on
1639 the type of the first operand. We handle this by having the
1640 three-operand version first and reducing the number of operands
1641 parsed to two if we see that the first operand is an immediate.
1642 This works because no insn with three operands has an immediate
1643 as first operand. */
1644 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1650 get_operand (&ptr
, operand
+ 2);
1654 operand
[2].type
= 0;
1659 operand
[1].type
= 0;
1660 operand
[2].type
= 0;
1665 operand
[0].type
= 0;
1666 operand
[1].type
= 0;
1667 operand
[2].type
= 0;
1672 /* Passed a pointer to a list of opcodes which use different
1673 addressing modes, return the opcode which matches the opcodes
1676 static sh_opcode_info
*
1677 get_specific (sh_opcode_info
*opcode
, sh_operand_info
*operands
)
1679 sh_opcode_info
*this_try
= opcode
;
1680 const char *name
= opcode
->name
;
1683 while (opcode
->name
)
1685 this_try
= opcode
++;
1686 if ((this_try
->name
!= name
) && (strcmp (this_try
->name
, name
) != 0))
1688 /* We've looked so far down the table that we've run out of
1689 opcodes with the same name. */
1693 /* Look at both operands needed by the opcodes and provided by
1694 the user - since an arg test will often fail on the same arg
1695 again and again, we'll try and test the last failing arg the
1696 first on each opcode try. */
1697 for (n
= 0; this_try
->arg
[n
]; n
++)
1699 sh_operand_info
*user
= operands
+ n
;
1700 sh_arg_type arg
= this_try
->arg
[n
];
1705 if (user
->type
== A_DISP_PC_ABS
)
1716 if (user
->type
!= arg
)
1720 /* opcode needs r0 */
1721 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1725 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1729 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1737 case A_IND_R0_REG_N
:
1746 /* Opcode needs rn */
1747 if (user
->type
!= arg
)
1752 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1768 if (user
->type
!= arg
)
1773 if (user
->type
!= arg
)
1779 if (user
->type
!= A_INC_N
)
1781 if (user
->reg
!= 15)
1787 if (user
->type
!= A_DEC_N
)
1789 if (user
->reg
!= 15)
1798 case A_IND_R0_REG_M
:
1801 /* Opcode needs rn */
1802 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1808 if (user
->type
!= A_DEC_N
)
1810 if (user
->reg
< 2 || user
->reg
> 5)
1816 if (user
->type
!= A_INC_N
)
1818 if (user
->reg
< 2 || user
->reg
> 5)
1824 if (user
->type
!= A_IND_N
)
1826 if (user
->reg
< 2 || user
->reg
> 5)
1832 if (user
->type
!= AX_PMOD_N
)
1834 if (user
->reg
< 2 || user
->reg
> 5)
1840 if (user
->type
!= A_INC_N
)
1842 if (user
->reg
< 4 || user
->reg
> 5)
1848 if (user
->type
!= A_IND_N
)
1850 if (user
->reg
< 4 || user
->reg
> 5)
1856 if (user
->type
!= AX_PMOD_N
)
1858 if (user
->reg
< 4 || user
->reg
> 5)
1864 if (user
->type
!= A_INC_N
)
1866 if ((user
->reg
< 4 || user
->reg
> 5)
1867 && (user
->reg
< 0 || user
->reg
> 1))
1873 if (user
->type
!= A_IND_N
)
1875 if ((user
->reg
< 4 || user
->reg
> 5)
1876 && (user
->reg
< 0 || user
->reg
> 1))
1882 if (user
->type
!= AX_PMOD_N
)
1884 if ((user
->reg
< 4 || user
->reg
> 5)
1885 && (user
->reg
< 0 || user
->reg
> 1))
1891 if (user
->type
!= A_INC_N
)
1893 if (user
->reg
< 6 || user
->reg
> 7)
1899 if (user
->type
!= A_IND_N
)
1901 if (user
->reg
< 6 || user
->reg
> 7)
1907 if (user
->type
!= AY_PMOD_N
)
1909 if (user
->reg
< 6 || user
->reg
> 7)
1915 if (user
->type
!= A_INC_N
)
1917 if ((user
->reg
< 6 || user
->reg
> 7)
1918 && (user
->reg
< 2 || user
->reg
> 3))
1924 if (user
->type
!= A_IND_N
)
1926 if ((user
->reg
< 6 || user
->reg
> 7)
1927 && (user
->reg
< 2 || user
->reg
> 3))
1933 if (user
->type
!= AY_PMOD_N
)
1935 if ((user
->reg
< 6 || user
->reg
> 7)
1936 && (user
->reg
< 2 || user
->reg
> 3))
1942 if (user
->type
!= DSP_REG_N
)
1944 if (user
->reg
!= A_A0_NUM
1945 && user
->reg
!= A_A1_NUM
)
1951 if (user
->type
!= DSP_REG_N
)
1973 if (user
->type
!= DSP_REG_N
)
1995 if (user
->type
!= DSP_REG_N
)
2017 if (user
->type
!= DSP_REG_N
)
2039 if (user
->type
!= DSP_REG_N
)
2061 if (user
->type
!= DSP_REG_N
)
2083 if (user
->type
!= DSP_REG_N
)
2105 if (user
->type
!= DSP_REG_N
)
2127 if (user
->type
!= DSP_REG_N
)
2149 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
2153 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
2157 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
2161 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
2165 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
2175 /* Opcode needs rn */
2176 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
2181 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
2186 if (user
->type
!= XMTRX_M4
)
2192 printf (_("unhandled %d\n"), arg
);
2195 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh2a_nofpu_up
)
2196 && ( arg
== A_DISP_REG_M
2197 || arg
== A_DISP_REG_N
))
2199 /* Check a few key IMM* fields for overflow. */
2201 long val
= user
->immediate
.X_add_number
;
2203 for (opf
= 0; opf
< 4; opf
++)
2204 switch (this_try
->nibbles
[opf
])
2208 if (val
< 0 || val
> 15)
2213 if (val
< 0 || val
> 15 * 2)
2218 if (val
< 0 || val
> 15 * 4)
2226 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch
, this_try
->arch
))
2228 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, this_try
->arch
);
2238 insert (char *where
, bfd_reloc_code_real_type how
, int pcrel
,
2239 sh_operand_info
*op
)
2241 fix_new_exp (frag_now
,
2242 where
- frag_now
->fr_literal
,
2250 insert4 (char * where
, bfd_reloc_code_real_type how
, int pcrel
,
2251 sh_operand_info
* op
)
2253 fix_new_exp (frag_now
,
2254 where
- frag_now
->fr_literal
,
2261 build_relax (sh_opcode_info
*opcode
, sh_operand_info
*op
)
2263 int high_byte
= target_big_endian
? 0 : 1;
2266 if (opcode
->arg
[0] == A_BDISP8
)
2268 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
2269 p
= frag_var (rs_machine_dependent
,
2270 md_relax_table
[C (what
, COND32
)].rlx_length
,
2271 md_relax_table
[C (what
, COND8
)].rlx_length
,
2273 op
->immediate
.X_add_symbol
,
2274 op
->immediate
.X_add_number
,
2276 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
2278 else if (opcode
->arg
[0] == A_BDISP12
)
2280 p
= frag_var (rs_machine_dependent
,
2281 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
2282 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
2284 op
->immediate
.X_add_symbol
,
2285 op
->immediate
.X_add_number
,
2287 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
2292 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
2295 insert_loop_bounds (char *output
, sh_operand_info
*operand
)
2299 /* Since the low byte of the opcode will be overwritten by the reloc, we
2300 can just stash the high byte into both bytes and ignore endianness. */
2303 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2304 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2308 static int count
= 0;
2311 /* If the last loop insn is a two-byte-insn, it is in danger of being
2312 swapped with the insn after it. To prevent this, create a new
2313 symbol - complete with SH_LABEL reloc - after the last loop insn.
2314 If the last loop insn is four bytes long, the symbol will be
2315 right in the middle, but four byte insns are not swapped anyways. */
2316 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
2317 Hence a 9 digit number should be enough to count all REPEATs. */
2318 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
2319 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
2320 /* Make this a local symbol. */
2322 SF_SET_LOCAL (end_sym
);
2323 #endif /* OBJ_COFF */
2324 symbol_table_insert (end_sym
);
2325 end_sym
->sy_value
= operand
[1].immediate
;
2326 end_sym
->sy_value
.X_add_number
+= 2;
2327 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
2330 output
= frag_more (2);
2333 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2334 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2336 return frag_more (2);
2339 /* Now we know what sort of opcodes it is, let's build the bytes. */
2342 build_Mytes (sh_opcode_info
*opcode
, sh_operand_info
*operand
)
2347 unsigned int size
= 2;
2348 int low_byte
= target_big_endian
? 1 : 0;
2350 bfd_reloc_code_real_type r_type
;
2352 int unhandled_pic
= 0;
2365 for (indx
= 0; indx
< 3; indx
++)
2366 if (opcode
->arg
[indx
] == A_IMM
2367 && operand
[indx
].type
== A_IMM
2368 && (operand
[indx
].immediate
.X_op
== O_PIC_reloc
2369 || sh_PIC_related_p (operand
[indx
].immediate
.X_add_symbol
)
2370 || sh_PIC_related_p (operand
[indx
].immediate
.X_op_symbol
)))
2374 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2376 output
= frag_more (4);
2381 output
= frag_more (2);
2383 for (indx
= 0; indx
< max_index
; indx
++)
2385 sh_nibble_type i
= opcode
->nibbles
[indx
];
2402 if (reg_n
< 2 || reg_n
> 5)
2403 as_bad (_("Invalid register: 'r%d'"), reg_n
);
2404 nbuf
[indx
] = (reg_n
& 3) | 4;
2407 nbuf
[indx
] = reg_n
| (reg_m
>> 2);
2410 nbuf
[indx
] = reg_b
| 0x08;
2413 nbuf
[indx
] = reg_n
| 0x01;
2418 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3
, 0, operand
);
2423 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3U
, 0, operand
);
2426 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
);
2429 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
);
2432 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
);
2435 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
);
2438 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
+1);
2441 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
+1);
2444 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
+1);
2447 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
+1);
2452 r_type
= BFD_RELOC_SH_DISP20
;
2454 if (sh_check_fixup (&operand
->immediate
, &r_type
))
2455 as_bad (_("Invalid PIC expression."));
2458 insert4 (output
, r_type
, 0, operand
);
2461 insert4 (output
, BFD_RELOC_SH_DISP20BY8
, 0, operand
);
2464 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
2467 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
2470 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
2473 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
2476 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
2479 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
2482 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
2485 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
2488 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
2491 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
2494 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
2497 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
2500 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
,
2501 operand
->type
!= A_DISP_PC_ABS
, operand
);
2504 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
,
2505 operand
->type
!= A_DISP_PC_ABS
, operand
);
2508 output
= insert_loop_bounds (output
, operand
);
2509 nbuf
[indx
] = opcode
->nibbles
[3];
2513 printf (_("failed for %d\n"), i
);
2519 as_bad (_("misplaced PIC operand"));
2521 if (!target_big_endian
)
2523 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
2524 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
2528 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
2529 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
2531 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2533 if (!target_big_endian
)
2535 output
[3] = (nbuf
[4] << 4) | (nbuf
[5]);
2536 output
[2] = (nbuf
[6] << 4) | (nbuf
[7]);
2540 output
[2] = (nbuf
[4] << 4) | (nbuf
[5]);
2541 output
[3] = (nbuf
[6] << 4) | (nbuf
[7]);
2547 /* Find an opcode at the start of *STR_P in the hash table, and set
2548 *STR_P to the first character after the last one read. */
2550 static sh_opcode_info
*
2551 find_cooked_opcode (char **str_p
)
2554 unsigned char *op_start
;
2555 unsigned char *op_end
;
2557 unsigned int nlen
= 0;
2559 /* Drop leading whitespace. */
2563 /* Find the op code end.
2564 The pre-processor will eliminate whitespace in front of
2565 any '@' after the first argument; we may be called from
2566 assemble_ppi, so the opcode might be terminated by an '@'. */
2567 for (op_start
= op_end
= (unsigned char *) str
;
2569 && nlen
< sizeof (name
) - 1
2570 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
2573 unsigned char c
= op_start
[nlen
];
2575 /* The machine independent code will convert CMP/EQ into cmp/EQ
2576 because it thinks the '/' is the end of the symbol. Moreover,
2577 all but the first sub-insn is a parallel processing insn won't
2578 be capitalized. Instead of hacking up the machine independent
2579 code, we just deal with it here. */
2586 *str_p
= (char *) op_end
;
2589 as_bad (_("can't find opcode "));
2591 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
2594 /* Assemble a parallel processing insn. */
2595 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2598 assemble_ppi (char *op_end
, sh_opcode_info
*opcode
)
2610 sh_operand_info operand
[3];
2612 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2613 Make sure we encode a defined insn pattern. */
2618 if (opcode
->arg
[0] != A_END
)
2619 op_end
= get_operands (opcode
, op_end
, operand
);
2621 opcode
= get_specific (opcode
, operand
);
2624 /* Couldn't find an opcode which matched the operands. */
2625 char *where
= frag_more (2);
2630 as_bad (_("invalid operands for opcode"));
2634 if (opcode
->nibbles
[0] != PPI
)
2635 as_bad (_("insn can't be combined with parallel processing insn"));
2637 switch (opcode
->nibbles
[1])
2642 as_bad (_("multiple movx specifications"));
2647 as_bad (_("multiple movy specifications"));
2653 as_bad (_("multiple movx specifications"));
2654 if ((reg_n
< 4 || reg_n
> 5)
2655 && (reg_n
< 0 || reg_n
> 1))
2656 as_bad (_("invalid movx address register"));
2657 if (movy
&& movy
!= DDT_BASE
)
2658 as_bad (_("insn cannot be combined with non-nopy"));
2659 movx
= ((((reg_n
& 1) != 0) << 9)
2660 + (((reg_n
& 4) == 0) << 8)
2662 + (opcode
->nibbles
[2] << 4)
2663 + opcode
->nibbles
[3]
2669 as_bad (_("multiple movy specifications"));
2670 if ((reg_n
< 6 || reg_n
> 7)
2671 && (reg_n
< 2 || reg_n
> 3))
2672 as_bad (_("invalid movy address register"));
2673 if (movx
&& movx
!= DDT_BASE
)
2674 as_bad (_("insn cannot be combined with non-nopx"));
2675 movy
= ((((reg_n
& 1) != 0) << 8)
2676 + (((reg_n
& 4) == 0) << 9)
2678 + (opcode
->nibbles
[2] << 4)
2679 + opcode
->nibbles
[3]
2685 as_bad (_("multiple movx specifications"));
2687 as_bad (_("previous movy requires nopx"));
2688 if (reg_n
< 4 || reg_n
> 5)
2689 as_bad (_("invalid movx address register"));
2690 if (opcode
->nibbles
[2] & 8)
2692 if (reg_m
== A_A1_NUM
)
2694 else if (reg_m
!= A_A0_NUM
)
2695 as_bad (_("invalid movx dsp register"));
2700 as_bad (_("invalid movx dsp register"));
2703 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
2708 as_bad (_("multiple movy specifications"));
2710 as_bad (_("previous movx requires nopy"));
2711 if (opcode
->nibbles
[2] & 8)
2713 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2716 if (reg_m
== A_A1_NUM
)
2718 else if (reg_m
!= A_A0_NUM
)
2719 as_bad (_("invalid movy dsp register"));
2724 as_bad (_("invalid movy dsp register"));
2727 if (reg_n
< 6 || reg_n
> 7)
2728 as_bad (_("invalid movy address register"));
2729 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
2733 if (operand
[0].immediate
.X_op
!= O_constant
)
2734 as_bad (_("dsp immediate shift value not constant"));
2735 field_b
= ((opcode
->nibbles
[2] << 12)
2736 | (operand
[0].immediate
.X_add_number
& 127) << 4
2743 goto try_another_opcode
;
2748 as_bad (_("multiple parallel processing specifications"));
2749 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2750 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2751 switch (opcode
->nibbles
[4])
2759 field_b
+= opcode
->nibbles
[4] << 4;
2767 as_bad (_("multiple condition specifications"));
2768 cond
= opcode
->nibbles
[2] << 8;
2770 goto skip_cond_check
;
2774 as_bad (_("multiple parallel processing specifications"));
2775 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2776 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2778 switch (opcode
->nibbles
[4])
2786 field_b
+= opcode
->nibbles
[4] << 4;
2795 if ((field_b
& 0xef00) == 0xa100)
2797 /* pclr Dz pmuls Se,Sf,Dg */
2798 else if ((field_b
& 0xff00) == 0x8d00
2799 && (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh4al_dsp_up
)))
2801 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, arch_sh4al_dsp_up
);
2805 as_bad (_("insn cannot be combined with pmuls"));
2806 switch (field_b
& 0xf)
2809 field_b
+= 0 - A_X0_NUM
;
2812 field_b
+= 1 - A_Y0_NUM
;
2815 field_b
+= 2 - A_A0_NUM
;
2818 field_b
+= 3 - A_A1_NUM
;
2821 as_bad (_("bad combined pmuls output operand"));
2823 /* Generate warning if the destination register for padd / psub
2824 and pmuls is the same ( only for A0 or A1 ).
2825 If the last nibble is 1010 then A0 is used in both
2826 padd / psub and pmuls. If it is 1111 then A1 is used
2827 as destination register in both padd / psub and pmuls. */
2829 if ((((field_b
| reg_efg
) & 0x000F) == 0x000A)
2830 || (((field_b
| reg_efg
) & 0x000F) == 0x000F))
2831 as_warn (_("destination register is same for parallel insns"));
2833 field_b
+= 0x4000 + reg_efg
;
2840 as_bad (_("condition not followed by conditionalizable insn"));
2846 opcode
= find_cooked_opcode (&op_end
);
2850 (_("unrecognized characters at end of parallel processing insn")));
2855 move_code
= movx
| movy
;
2858 /* Parallel processing insn. */
2859 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
2861 output
= frag_more (4);
2863 if (! target_big_endian
)
2865 output
[3] = ppi_code
>> 8;
2866 output
[2] = ppi_code
;
2870 output
[2] = ppi_code
>> 8;
2871 output
[3] = ppi_code
;
2873 move_code
|= 0xf800;
2877 /* Just a double data transfer. */
2878 output
= frag_more (2);
2881 if (! target_big_endian
)
2883 output
[1] = move_code
>> 8;
2884 output
[0] = move_code
;
2888 output
[0] = move_code
>> 8;
2889 output
[1] = move_code
;
2894 /* This is the guts of the machine-dependent assembler. STR points to a
2895 machine dependent instruction. This function is supposed to emit
2896 the frags/bytes it assembles to. */
2899 md_assemble (char *str
)
2902 sh_operand_info operand
[3];
2903 sh_opcode_info
*opcode
;
2904 unsigned int size
= 0;
2905 char *initial_str
= str
;
2908 if (sh64_isa_mode
== sh64_isa_shmedia
)
2910 shmedia_md_assemble (str
);
2915 /* If we've seen pseudo-directives, make sure any emitted data or
2916 frags are marked as data. */
2919 sh64_update_contents_mark (TRUE
);
2920 sh64_set_contents_type (CRT_SH5_ISA16
);
2925 #endif /* HAVE_SH64 */
2927 opcode
= find_cooked_opcode (&str
);
2932 /* The opcode is not in the hash table.
2933 This means we definitely have an assembly failure,
2934 but the instruction may be valid in another CPU variant.
2935 In this case emit something better than 'unknown opcode'.
2936 Search the full table in sh-opc.h to check. */
2938 char *name
= initial_str
;
2939 int name_length
= 0;
2940 const sh_opcode_info
*op
;
2943 /* identify opcode in string */
2944 while (ISSPACE (*name
))
2948 while (!ISSPACE (name
[name_length
]))
2953 /* search for opcode in full list */
2954 for (op
= sh_table
; op
->name
; op
++)
2956 if (strncasecmp (op
->name
, name
, name_length
) == 0
2957 && op
->name
[name_length
] == '\0')
2966 as_bad (_("opcode not valid for this cpu variant"));
2970 as_bad (_("unknown opcode"));
2976 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2978 /* Output a CODE reloc to tell the linker that the following
2979 bytes are instructions, not data. */
2980 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2982 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
2985 if (opcode
->nibbles
[0] == PPI
)
2987 size
= assemble_ppi (op_end
, opcode
);
2991 if (opcode
->arg
[0] == A_BDISP12
2992 || opcode
->arg
[0] == A_BDISP8
)
2994 /* Since we skip get_specific here, we have to check & update
2996 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, opcode
->arch
))
2997 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, opcode
->arch
);
2999 as_bad (_("Delayed branches not available on SH1"));
3000 parse_exp (op_end
+ 1, &operand
[0]);
3001 build_relax (opcode
, &operand
[0]);
3003 /* All branches are currently 16 bit. */
3008 if (opcode
->arg
[0] == A_END
)
3010 /* Ignore trailing whitespace. If there is any, it has already
3011 been compressed to a single space. */
3017 op_end
= get_operands (opcode
, op_end
, operand
);
3019 opcode
= get_specific (opcode
, operand
);
3023 /* Couldn't find an opcode which matched the operands. */
3024 char *where
= frag_more (2);
3029 as_bad (_("invalid operands for opcode"));
3034 as_bad (_("excess operands: '%s'"), op_end
);
3036 size
= build_Mytes (opcode
, operand
);
3041 dwarf2_emit_insn (size
);
3044 /* This routine is called each time a label definition is seen. It
3045 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
3048 sh_frob_label (symbolS
*sym
)
3050 static fragS
*last_label_frag
;
3051 static int last_label_offset
;
3054 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
3058 offset
= frag_now_fix ();
3059 if (frag_now
!= last_label_frag
3060 || offset
!= last_label_offset
)
3062 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
3063 last_label_frag
= frag_now
;
3064 last_label_offset
= offset
;
3068 dwarf2_emit_label (sym
);
3071 /* This routine is called when the assembler is about to output some
3072 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
3075 sh_flush_pending_output (void)
3078 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
3080 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
3082 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
3087 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
3092 /* Various routines to kill one day. */
3095 md_atof (int type
, char *litP
, int *sizeP
)
3097 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
3100 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
3101 call instruction. It refers to a label of the instruction which
3102 loads the register which the call uses. We use it to generate a
3103 special reloc for the linker. */
3106 s_uses (int ignore ATTRIBUTE_UNUSED
)
3111 as_warn (_(".uses pseudo-op seen when not relaxing"));
3115 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
3117 as_bad (_("bad .uses format"));
3118 ignore_rest_of_line ();
3122 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
3124 demand_empty_rest_of_line ();
3129 OPTION_RELAX
= OPTION_MD_BASE
,
3136 OPTION_ALLOW_REG_PREFIX
,
3140 OPTION_SHCOMPACT_CONST_CRANGE
,
3148 OPTION_DUMMY
/* Not used. This is just here to make it easy to add and subtract options from this enum. */
3151 const char *md_shortopts
= "";
3152 struct option md_longopts
[] =
3154 {"relax", no_argument
, NULL
, OPTION_RELAX
},
3155 {"big", no_argument
, NULL
, OPTION_BIG
},
3156 {"little", no_argument
, NULL
, OPTION_LITTLE
},
3157 /* The next two switches are here because the
3158 generic parts of the linker testsuite uses them. */
3159 {"EB", no_argument
, NULL
, OPTION_BIG
},
3160 {"EL", no_argument
, NULL
, OPTION_LITTLE
},
3161 {"small", no_argument
, NULL
, OPTION_SMALL
},
3162 {"dsp", no_argument
, NULL
, OPTION_DSP
},
3163 {"isa", required_argument
, NULL
, OPTION_ISA
},
3164 {"renesas", no_argument
, NULL
, OPTION_RENESAS
},
3165 {"allow-reg-prefix", no_argument
, NULL
, OPTION_ALLOW_REG_PREFIX
},
3168 {"abi", required_argument
, NULL
, OPTION_ABI
},
3169 {"no-mix", no_argument
, NULL
, OPTION_NO_MIX
},
3170 {"shcompact-const-crange", no_argument
, NULL
, OPTION_SHCOMPACT_CONST_CRANGE
},
3171 {"no-expand", no_argument
, NULL
, OPTION_NO_EXPAND
},
3172 {"expand-pt32", no_argument
, NULL
, OPTION_PT32
},
3173 #endif /* HAVE_SH64 */
3174 { "h-tick-hex", no_argument
, NULL
, OPTION_H_TICK_HEX
},
3177 {"fdpic", no_argument
, NULL
, OPTION_FDPIC
},
3180 {NULL
, no_argument
, NULL
, 0}
3182 size_t md_longopts_size
= sizeof (md_longopts
);
3185 md_parse_option (int c
, const char *arg ATTRIBUTE_UNUSED
)
3194 target_big_endian
= 1;
3198 target_big_endian
= 0;
3206 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
3209 case OPTION_RENESAS
:
3210 dont_adjust_reloc_32
= 1;
3213 case OPTION_ALLOW_REG_PREFIX
:
3214 allow_dollar_register_prefix
= 1;
3218 if (strcasecmp (arg
, "dsp") == 0)
3219 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
3220 else if (strcasecmp (arg
, "fp") == 0)
3221 preset_target_arch
= arch_sh_up
& ~arch_sh_has_dsp
;
3222 else if (strcasecmp (arg
, "any") == 0)
3223 preset_target_arch
= arch_sh_up
;
3225 else if (strcasecmp (arg
, "shmedia") == 0)
3227 if (sh64_isa_mode
== sh64_isa_shcompact
)
3228 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
3229 sh64_isa_mode
= sh64_isa_shmedia
;
3231 else if (strcasecmp (arg
, "shcompact") == 0)
3233 if (sh64_isa_mode
== sh64_isa_shmedia
)
3234 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
3235 if (sh64_abi
== sh64_abi_64
)
3236 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
3237 sh64_isa_mode
= sh64_isa_shcompact
;
3239 #endif /* HAVE_SH64 */
3242 extern const bfd_arch_info_type bfd_sh_arch
;
3243 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
3245 preset_target_arch
= 0;
3246 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
3248 int len
= strlen(bfd_arch
->printable_name
);
3250 if (bfd_arch
->mach
== bfd_mach_sh5
)
3253 if (strncasecmp (bfd_arch
->printable_name
, arg
, len
) != 0)
3256 if (arg
[len
] == '\0')
3257 preset_target_arch
=
3258 sh_get_arch_from_bfd_mach (bfd_arch
->mach
);
3259 else if (strcasecmp(&arg
[len
], "-up") == 0)
3260 preset_target_arch
=
3261 sh_get_arch_up_from_bfd_mach (bfd_arch
->mach
);
3267 if (!preset_target_arch
)
3268 as_bad (_("Invalid argument to --isa option: %s"), arg
);
3274 if (strcmp (arg
, "32") == 0)
3276 if (sh64_abi
== sh64_abi_64
)
3277 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
3278 sh64_abi
= sh64_abi_32
;
3280 else if (strcmp (arg
, "64") == 0)
3282 if (sh64_abi
== sh64_abi_32
)
3283 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
3284 if (sh64_isa_mode
== sh64_isa_shcompact
)
3285 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
3286 sh64_abi
= sh64_abi_64
;
3289 as_bad (_("Invalid argument to --abi option: %s"), arg
);
3296 case OPTION_SHCOMPACT_CONST_CRANGE
:
3297 sh64_shcompact_const_crange
= TRUE
;
3300 case OPTION_NO_EXPAND
:
3301 sh64_expand
= FALSE
;
3307 #endif /* HAVE_SH64 */
3309 case OPTION_H_TICK_HEX
:
3310 enable_h_tick_hex
= 1;
3317 #endif /* OBJ_ELF */
3327 md_show_usage (FILE *stream
)
3329 fprintf (stream
, _("\
3331 --little generate little endian code\n\
3332 --big generate big endian code\n\
3333 --relax alter jump instructions for long displacements\n\
3334 --renesas disable optimization with section symbol for\n\
3335 compatibility with Renesas assembler.\n\
3336 --small align sections to 4 byte boundaries, not 16\n\
3337 --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
3338 --allow-reg-prefix allow '$' as a register name prefix.\n\
3339 --isa=[any use most appropriate isa\n\
3340 | dsp same as '-dsp'\n\
3343 extern const bfd_arch_info_type bfd_sh_arch
;
3344 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
3346 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
3347 if (bfd_arch
->mach
!= bfd_mach_sh5
)
3349 fprintf (stream
, "\n | %s", bfd_arch
->printable_name
);
3350 fprintf (stream
, "\n | %s-up", bfd_arch
->printable_name
);
3353 fprintf (stream
, "]\n");
3355 fprintf (stream
, _("\
3356 --isa=[shmedia set as the default instruction set for SH64\n\
3360 fprintf (stream
, _("\
3361 --abi=[32|64] set size of expanded SHmedia operands and object\n\
3363 --shcompact-const-crange emit code-range descriptors for constants in\n\
3364 SHcompact code sections\n\
3365 --no-mix disallow SHmedia code in the same section as\n\
3366 constants and SHcompact code\n\
3367 --no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
3368 --expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
3369 to 32 bits only\n"));
3370 #endif /* HAVE_SH64 */
3372 fprintf (stream
, _("\
3373 --fdpic generate an FDPIC object file\n"));
3374 #endif /* OBJ_ELF */
3377 /* This struct is used to pass arguments to sh_count_relocs through
3378 bfd_map_over_sections. */
3380 struct sh_count_relocs
3382 /* Symbol we are looking for. */
3384 /* Count of relocs found. */
3388 /* Count the number of fixups in a section which refer to a particular
3389 symbol. This is called via bfd_map_over_sections. */
3392 sh_count_relocs (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, void *data
)
3394 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
3395 segment_info_type
*seginfo
;
3399 seginfo
= seg_info (sec
);
3400 if (seginfo
== NULL
)
3404 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3406 if (fix
->fx_addsy
== sym
)
3414 /* Handle the count relocs for a particular section.
3415 This is called via bfd_map_over_sections. */
3418 sh_frob_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
,
3419 void *ignore ATTRIBUTE_UNUSED
)
3421 segment_info_type
*seginfo
;
3424 seginfo
= seg_info (sec
);
3425 if (seginfo
== NULL
)
3428 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3432 sym
= fix
->fx_addsy
;
3433 /* Check for a local_symbol. */
3434 if (sym
&& sym
->bsym
== NULL
)
3436 struct local_symbol
*ls
= (struct local_symbol
*)sym
;
3437 /* See if it's been converted. If so, canonicalize. */
3438 if (local_symbol_converted_p (ls
))
3439 fix
->fx_addsy
= local_symbol_get_real_symbol (ls
);
3443 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3448 struct sh_count_relocs info
;
3450 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
3453 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
3454 symbol in the same section. */
3455 sym
= fix
->fx_addsy
;
3457 || fix
->fx_subsy
!= NULL
3458 || fix
->fx_addnumber
!= 0
3459 || S_GET_SEGMENT (sym
) != sec
3460 || S_IS_EXTERNAL (sym
))
3462 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3463 _(".uses does not refer to a local symbol in the same section"));
3467 /* Look through the fixups again, this time looking for one
3468 at the same location as sym. */
3469 val
= S_GET_VALUE (sym
);
3470 for (fscan
= seginfo
->fix_root
;
3472 fscan
= fscan
->fx_next
)
3473 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
3474 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
3475 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
3476 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
3477 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
3481 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3482 _("can't find fixup pointed to by .uses"));
3486 if (fscan
->fx_tcbit
)
3488 /* We've already done this one. */
3492 /* The variable fscan should also be a fixup to a local symbol
3493 in the same section. */
3494 sym
= fscan
->fx_addsy
;
3496 || fscan
->fx_subsy
!= NULL
3497 || fscan
->fx_addnumber
!= 0
3498 || S_GET_SEGMENT (sym
) != sec
3499 || S_IS_EXTERNAL (sym
))
3501 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3502 _(".uses target does not refer to a local symbol in the same section"));
3506 /* Now we look through all the fixups of all the sections,
3507 counting the number of times we find a reference to sym. */
3510 bfd_map_over_sections (stdoutput
, sh_count_relocs
, &info
);
3515 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
3516 We have already adjusted the value of sym to include the
3517 fragment address, so we undo that adjustment here. */
3518 subseg_change (sec
, 0);
3519 fix_new (fscan
->fx_frag
,
3520 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
3521 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
3525 /* This function is called after the symbol table has been completed,
3526 but before the relocs or section contents have been written out.
3527 If we have seen any .uses pseudo-ops, they point to an instruction
3528 which loads a register with the address of a function. We look
3529 through the fixups to find where the function address is being
3530 loaded from. We then generate a COUNT reloc giving the number of
3531 times that function address is referred to. The linker uses this
3532 information when doing relaxing, to decide when it can eliminate
3533 the stored function address entirely. */
3539 shmedia_frob_file_before_adjust ();
3545 bfd_map_over_sections (stdoutput
, sh_frob_section
, NULL
);
3548 /* Called after relaxing. Set the correct sizes of the fragments, and
3549 create relocs so that md_apply_fix will fill in the correct values. */
3552 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
, segT seg
, fragS
*fragP
)
3556 switch (fragP
->fr_subtype
)
3558 case C (COND_JUMP
, COND8
):
3559 case C (COND_JUMP_DELAY
, COND8
):
3560 subseg_change (seg
, 0);
3561 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3562 1, BFD_RELOC_SH_PCDISP8BY2
);
3567 case C (UNCOND_JUMP
, UNCOND12
):
3568 subseg_change (seg
, 0);
3569 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3570 1, BFD_RELOC_SH_PCDISP12BY2
);
3575 case C (UNCOND_JUMP
, UNCOND32
):
3576 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3577 if (fragP
->fr_symbol
== NULL
)
3578 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3579 _("displacement overflows 12-bit field"));
3580 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3581 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3582 _("displacement to defined symbol %s overflows 12-bit field"),
3583 S_GET_NAME (fragP
->fr_symbol
));
3585 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3586 _("displacement to undefined symbol %s overflows 12-bit field"),
3587 S_GET_NAME (fragP
->fr_symbol
));
3588 /* Stabilize this frag, so we don't trip an assert. */
3589 fragP
->fr_fix
+= fragP
->fr_var
;
3593 case C (COND_JUMP
, COND12
):
3594 case C (COND_JUMP_DELAY
, COND12
):
3595 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
3596 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
3597 was due to gas incorrectly relaxing an out-of-range conditional
3598 branch with delay slot. It turned:
3599 bf.s L6 (slot mov.l r12,@(44,r0))
3602 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
3604 32: 10 cb mov.l r12,@(44,r0)
3605 Therefore, branches with delay slots have to be handled
3606 differently from ones without delay slots. */
3608 unsigned char *buffer
=
3609 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
3610 int highbyte
= target_big_endian
? 0 : 1;
3611 int lowbyte
= target_big_endian
? 1 : 0;
3612 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
3614 /* Toggle the true/false bit of the bcond. */
3615 buffer
[highbyte
] ^= 0x2;
3617 /* If this is a delayed branch, we may not put the bra in the
3618 slot. So we change it to a non-delayed branch, like that:
3619 b! cond slot_label; bra disp; slot_label: slot_insn
3620 ??? We should try if swapping the conditional branch and
3621 its delay-slot insn already makes the branch reach. */
3623 /* Build a relocation to six / four bytes farther on. */
3624 subseg_change (seg
, 0);
3625 fix_new (fragP
, fragP
->fr_fix
, 2, section_symbol (seg
),
3626 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
3627 1, BFD_RELOC_SH_PCDISP8BY2
);
3629 /* Set up a jump instruction. */
3630 buffer
[highbyte
+ 2] = 0xa0;
3631 buffer
[lowbyte
+ 2] = 0;
3632 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
3633 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
3637 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
3642 /* Fill in a NOP instruction. */
3643 buffer
[highbyte
+ 4] = 0x0;
3644 buffer
[lowbyte
+ 4] = 0x9;
3653 case C (COND_JUMP
, COND32
):
3654 case C (COND_JUMP_DELAY
, COND32
):
3655 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3656 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3657 if (fragP
->fr_symbol
== NULL
)
3658 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3659 _("displacement overflows 8-bit field"));
3660 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3661 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3662 _("displacement to defined symbol %s overflows 8-bit field"),
3663 S_GET_NAME (fragP
->fr_symbol
));
3665 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3666 _("displacement to undefined symbol %s overflows 8-bit field "),
3667 S_GET_NAME (fragP
->fr_symbol
));
3668 /* Stabilize this frag, so we don't trip an assert. */
3669 fragP
->fr_fix
+= fragP
->fr_var
;
3675 shmedia_md_convert_frag (headers
, seg
, fragP
, TRUE
);
3681 if (donerelax
&& !sh_relax
)
3682 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3683 _("overflow in branch to %s; converted into longer instruction sequence"),
3684 (fragP
->fr_symbol
!= NULL
3685 ? S_GET_NAME (fragP
->fr_symbol
)
3690 md_section_align (segT seg ATTRIBUTE_UNUSED
, valueT size
)
3694 #else /* ! OBJ_ELF */
3695 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
3696 & -(1 << bfd_get_section_alignment (stdoutput
, seg
)));
3697 #endif /* ! OBJ_ELF */
3700 /* This static variable is set by s_uacons to tell sh_cons_align that
3701 the expression does not need to be aligned. */
3703 static int sh_no_align_cons
= 0;
3705 /* This handles the unaligned space allocation pseudo-ops, such as
3706 .uaword. .uaword is just like .word, but the value does not need
3710 s_uacons (int bytes
)
3712 /* Tell sh_cons_align not to align this value. */
3713 sh_no_align_cons
= 1;
3717 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3718 aligned correctly. Note that this can cause warnings to be issued
3719 when assembling initialized structured which were declared with the
3720 packed attribute. FIXME: Perhaps we should require an option to
3721 enable this warning? */
3724 sh_cons_align (int nbytes
)
3728 if (sh_no_align_cons
)
3730 /* This is an unaligned pseudo-op. */
3731 sh_no_align_cons
= 0;
3736 while ((nbytes
& 1) == 0)
3745 if (now_seg
== absolute_section
)
3747 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
3748 as_warn (_("misaligned data"));
3752 frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
3753 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
3755 record_alignment (now_seg
, nalign
);
3758 /* When relaxing, we need to output a reloc for any .align directive
3759 that requests alignment to a four byte boundary or larger. This is
3760 also where we check for misaligned data. */
3763 sh_handle_align (fragS
*frag
)
3765 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
3767 if (frag
->fr_type
== rs_align_code
)
3769 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
3770 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
3772 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
3781 if (target_big_endian
)
3783 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
3784 frag
->fr_var
= sizeof big_nop_pattern
;
3788 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
3789 frag
->fr_var
= sizeof little_nop_pattern
;
3792 else if (frag
->fr_type
== rs_align_test
)
3795 as_bad_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
3799 && (frag
->fr_type
== rs_align
3800 || frag
->fr_type
== rs_align_code
)
3801 && frag
->fr_address
+ frag
->fr_fix
> 0
3802 && frag
->fr_offset
> 1
3803 && now_seg
!= bss_section
)
3804 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
3805 BFD_RELOC_SH_ALIGN
);
3808 /* See whether the relocation should be resolved locally. */
3811 sh_local_pcrel (fixS
*fix
)
3814 && (fix
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
3815 || fix
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
3816 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
3817 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
3818 || fix
->fx_r_type
== BFD_RELOC_8_PCREL
3819 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH16
3820 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH32
));
3823 /* See whether we need to force a relocation into the output file.
3824 This is used to force out switch and PC relative relocations when
3828 sh_force_relocation (fixS
*fix
)
3830 /* These relocations can't make it into a DSO, so no use forcing
3831 them for global symbols. */
3832 if (sh_local_pcrel (fix
))
3835 /* Make sure some relocations get emitted. */
3836 if (fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
3837 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
3838 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_GD_32
3839 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LD_32
3840 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_IE_32
3841 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LDO_32
3842 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LE_32
3843 || generic_force_reloc (fix
))
3849 return (fix
->fx_pcrel
3850 || SWITCH_TABLE (fix
)
3851 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
3852 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
3853 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
3854 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3856 || fix
->fx_r_type
== BFD_RELOC_SH_SHMEDIA_CODE
3858 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
3863 sh_fix_adjustable (fixS
*fixP
)
3865 if (fixP
->fx_r_type
== BFD_RELOC_32_PLT_PCREL
3866 || fixP
->fx_r_type
== BFD_RELOC_32_GOT_PCREL
3867 || fixP
->fx_r_type
== BFD_RELOC_SH_GOT20
3868 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTPC
3869 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTFUNCDESC
3870 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTFUNCDESC20
3871 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTOFFFUNCDESC
3872 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTOFFFUNCDESC20
3873 || fixP
->fx_r_type
== BFD_RELOC_SH_FUNCDESC
3874 || ((fixP
->fx_r_type
== BFD_RELOC_32
) && dont_adjust_reloc_32
)
3875 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
3878 /* We need the symbol name for the VTABLE entries */
3879 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
3880 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
3887 sh_elf_final_processing (void)
3891 /* Set file-specific flags to indicate if this code needs
3892 a processor with the sh-dsp / sh2e ISA to execute. */
3894 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3895 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3896 if (sh64_isa_mode
!= sh64_isa_unspecified
)
3899 #elif defined TARGET_SYMBIAN
3902 extern int sh_symbian_find_elf_flags (unsigned int);
3904 val
= sh_symbian_find_elf_flags (valid_arch
);
3907 #endif /* HAVE_SH64 */
3908 val
= sh_find_elf_flags (valid_arch
);
3910 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
3911 elf_elfheader (stdoutput
)->e_flags
|= val
;
3914 elf_elfheader (stdoutput
)->e_flags
|= EF_SH_FDPIC
;
3919 /* Return the target format for uClinux. */
3922 sh_uclinux_target_format (void)
3925 return (!target_big_endian
? "elf32-sh-fdpic" : "elf32-shbig-fdpic");
3927 return (!target_big_endian
? "elf32-shl" : "elf32-sh");
3931 /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its
3932 assembly-time value. If we're generating a reloc for FIXP,
3933 see whether the addend should be stored in-place or whether
3934 it should be in an ELF r_addend field. */
3937 apply_full_field_fix (fixS
*fixP
, char *buf
, bfd_vma val
, int size
)
3939 reloc_howto_type
*howto
;
3941 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3943 howto
= bfd_reloc_type_lookup (stdoutput
, fixP
->fx_r_type
);
3944 if (howto
&& !howto
->partial_inplace
)
3946 fixP
->fx_addnumber
= val
;
3950 md_number_to_chars (buf
, val
, size
);
3953 /* Apply a fixup to the object file. */
3956 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3958 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3959 int lowbyte
= target_big_endian
? 1 : 0;
3960 int highbyte
= target_big_endian
? 0 : 1;
3961 long val
= (long) *valP
;
3965 /* A difference between two symbols, the second of which is in the
3966 current section, is transformed in a PC-relative relocation to
3967 the other symbol. We have to adjust the relocation type here. */
3971 /* Safeguard; this must not occur for non-sh64 configurations. */
3972 gas_assert (fixP
->fx_r_type
!= BFD_RELOC_64
);
3975 switch (fixP
->fx_r_type
)
3981 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3984 /* Currently, we only support 32-bit PCREL relocations.
3985 We'd need a new reloc type to handle 16_PCREL, and
3986 8_PCREL is already taken for R_SH_SWITCH8, which
3987 apparently does something completely different than what
3990 bfd_set_error (bfd_error_bad_value
);
3994 bfd_set_error (bfd_error_bad_value
);
3999 /* The function adjust_reloc_syms won't convert a reloc against a weak
4000 symbol into a reloc against a section, but bfd_install_relocation
4001 will screw up if the symbol is defined, so we have to adjust val here
4002 to avoid the screw up later.
4004 For ordinary relocs, this does not happen for ELF, since for ELF,
4005 bfd_install_relocation uses the "special function" field of the
4006 howto, and does not execute the code that needs to be undone, as long
4007 as the special function does not return bfd_reloc_continue.
4008 It can happen for GOT- and PLT-type relocs the way they are
4009 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
4010 doesn't matter here since those relocs don't use VAL; see below. */
4011 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
4012 && fixP
->fx_addsy
!= NULL
4013 && S_IS_WEAK (fixP
->fx_addsy
))
4014 val
-= S_GET_VALUE (fixP
->fx_addsy
);
4016 if (SWITCH_TABLE (fixP
))
4017 val
-= S_GET_VALUE (fixP
->fx_subsy
);
4021 switch (fixP
->fx_r_type
)
4023 case BFD_RELOC_SH_IMM3
:
4025 * buf
= (* buf
& 0xf8) | (val
& 0x7);
4027 case BFD_RELOC_SH_IMM3U
:
4029 * buf
= (* buf
& 0x8f) | ((val
& 0x7) << 4);
4031 case BFD_RELOC_SH_DISP12
:
4033 buf
[lowbyte
] = val
& 0xff;
4034 buf
[highbyte
] |= (val
>> 8) & 0x0f;
4036 case BFD_RELOC_SH_DISP12BY2
:
4039 buf
[lowbyte
] = (val
>> 1) & 0xff;
4040 buf
[highbyte
] |= (val
>> 9) & 0x0f;
4042 case BFD_RELOC_SH_DISP12BY4
:
4045 buf
[lowbyte
] = (val
>> 2) & 0xff;
4046 buf
[highbyte
] |= (val
>> 10) & 0x0f;
4048 case BFD_RELOC_SH_DISP12BY8
:
4051 buf
[lowbyte
] = (val
>> 3) & 0xff;
4052 buf
[highbyte
] |= (val
>> 11) & 0x0f;
4054 case BFD_RELOC_SH_DISP20
:
4055 if (! target_big_endian
)
4059 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 12) & 0xf0);
4060 buf
[2] = (val
>> 8) & 0xff;
4061 buf
[3] = val
& 0xff;
4063 case BFD_RELOC_SH_DISP20BY8
:
4064 if (!target_big_endian
)
4069 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 20) & 0xf0);
4070 buf
[2] = (val
>> 16) & 0xff;
4071 buf
[3] = (val
>> 8) & 0xff;
4074 case BFD_RELOC_SH_IMM4
:
4076 *buf
= (*buf
& 0xf0) | (val
& 0xf);
4079 case BFD_RELOC_SH_IMM4BY2
:
4082 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
4085 case BFD_RELOC_SH_IMM4BY4
:
4088 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
4091 case BFD_RELOC_SH_IMM8BY2
:
4097 case BFD_RELOC_SH_IMM8BY4
:
4104 case BFD_RELOC_SH_IMM8
:
4105 /* Sometimes the 8 bit value is sign extended (e.g., add) and
4106 sometimes it is not (e.g., and). We permit any 8 bit value.
4107 Note that adding further restrictions may invalidate
4108 reasonable looking assembly code, such as ``and -0x1,r0''. */
4114 case BFD_RELOC_SH_PCRELIMM8BY4
:
4115 /* If we are dealing with a known destination ... */
4116 if ((fixP
->fx_addsy
== NULL
|| S_IS_DEFINED (fixP
->fx_addsy
))
4117 && (fixP
->fx_subsy
== NULL
|| S_IS_DEFINED (fixP
->fx_addsy
)))
4119 /* Don't silently move the destination due to misalignment.
4120 The absolute address is the fragment base plus the offset into
4121 the fragment plus the pc relative offset to the label. */
4122 if ((fixP
->fx_frag
->fr_address
+ fixP
->fx_where
+ val
) & 3)
4123 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
4124 _("offset to unaligned destination"));
4126 /* The displacement cannot be zero or backward even if aligned.
4127 Allow -2 because val has already been adjusted somewhere. */
4129 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("negative offset"));
4132 /* The lower two bits of the PC are cleared before the
4133 displacement is added in. We can assume that the destination
4134 is on a 4 byte boundary. If this instruction is also on a 4
4135 byte boundary, then we want
4137 and target - here is a multiple of 4.
4138 Otherwise, we are on a 2 byte boundary, and we want
4139 (target - (here - 2)) / 4
4140 and target - here is not a multiple of 4. Computing
4141 (target - (here - 2)) / 4 == (target - here + 2) / 4
4142 works for both cases, since in the first case the addition of
4143 2 will be removed by the division. target - here is in the
4145 val
= (val
+ 2) / 4;
4147 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4151 case BFD_RELOC_SH_PCRELIMM8BY2
:
4154 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4158 case BFD_RELOC_SH_PCDISP8BY2
:
4160 if (val
< -0x80 || val
> 0x7f)
4161 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4165 case BFD_RELOC_SH_PCDISP12BY2
:
4167 if (val
< -0x800 || val
> 0x7ff)
4168 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
4169 buf
[lowbyte
] = val
& 0xff;
4170 buf
[highbyte
] |= (val
>> 8) & 0xf;
4175 apply_full_field_fix (fixP
, buf
, *valP
, 8);
4180 case BFD_RELOC_32_PCREL
:
4181 apply_full_field_fix (fixP
, buf
, val
, 4);
4185 apply_full_field_fix (fixP
, buf
, val
, 2);
4188 case BFD_RELOC_SH_USES
:
4189 /* Pass the value into sh_reloc(). */
4190 fixP
->fx_addnumber
= val
;
4193 case BFD_RELOC_SH_COUNT
:
4194 case BFD_RELOC_SH_ALIGN
:
4195 case BFD_RELOC_SH_CODE
:
4196 case BFD_RELOC_SH_DATA
:
4197 case BFD_RELOC_SH_LABEL
:
4198 /* Nothing to do here. */
4201 case BFD_RELOC_SH_LOOP_START
:
4202 case BFD_RELOC_SH_LOOP_END
:
4204 case BFD_RELOC_VTABLE_INHERIT
:
4205 case BFD_RELOC_VTABLE_ENTRY
:
4210 case BFD_RELOC_32_PLT_PCREL
:
4211 /* Make the jump instruction point to the address of the operand. At
4212 runtime we merely add the offset to the actual PLT entry. */
4213 * valP
= 0xfffffffc;
4214 val
= fixP
->fx_offset
;
4216 val
-= S_GET_VALUE (fixP
->fx_subsy
);
4217 apply_full_field_fix (fixP
, buf
, val
, 4);
4220 case BFD_RELOC_SH_GOTPC
:
4221 /* This is tough to explain. We end up with this one if we have
4222 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
4223 The goal here is to obtain the absolute address of the GOT,
4224 and it is strongly preferable from a performance point of
4225 view to avoid using a runtime relocation for this. There are
4226 cases where you have something like:
4228 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
4230 and here no correction would be required. Internally in the
4231 assembler we treat operands of this form as not being pcrel
4232 since the '.' is explicitly mentioned, and I wonder whether
4233 it would simplify matters to do it this way. Who knows. In
4234 earlier versions of the PIC patches, the pcrel_adjust field
4235 was used to store the correction, but since the expression is
4236 not pcrel, I felt it would be confusing to do it this way. */
4238 apply_full_field_fix (fixP
, buf
, val
, 4);
4241 case BFD_RELOC_SH_TLS_GD_32
:
4242 case BFD_RELOC_SH_TLS_LD_32
:
4243 case BFD_RELOC_SH_TLS_IE_32
:
4244 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
4246 case BFD_RELOC_32_GOT_PCREL
:
4247 case BFD_RELOC_SH_GOT20
:
4248 case BFD_RELOC_SH_GOTPLT32
:
4249 case BFD_RELOC_SH_GOTFUNCDESC
:
4250 case BFD_RELOC_SH_GOTFUNCDESC20
:
4251 case BFD_RELOC_SH_GOTOFFFUNCDESC
:
4252 case BFD_RELOC_SH_GOTOFFFUNCDESC20
:
4253 case BFD_RELOC_SH_FUNCDESC
:
4254 * valP
= 0; /* Fully resolved at runtime. No addend. */
4255 apply_full_field_fix (fixP
, buf
, 0, 4);
4258 case BFD_RELOC_SH_TLS_LDO_32
:
4259 case BFD_RELOC_SH_TLS_LE_32
:
4260 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
4262 case BFD_RELOC_32_GOTOFF
:
4263 case BFD_RELOC_SH_GOTOFF20
:
4264 apply_full_field_fix (fixP
, buf
, val
, 4);
4270 shmedia_md_apply_fix (fixP
, valP
);
4279 if ((val
& ((1 << shift
) - 1)) != 0)
4280 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
4284 val
= ((val
>> shift
)
4285 | ((long) -1 & ~ ((long) -1 >> shift
)));
4288 /* Extend sign for 64-bit host. */
4289 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
4290 if (max
!= 0 && (val
< min
|| val
> max
))
4291 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
4293 /* Stop the generic code from trying to overlow check the value as well.
4294 It may not have the correct value anyway, as we do not store val back
4296 fixP
->fx_no_overflow
= 1;
4298 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
4302 /* Called just before address relaxation. Return the length
4303 by which a fragment must grow to reach it's destination. */
4306 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
4310 switch (fragP
->fr_subtype
)
4314 return shmedia_md_estimate_size_before_relax (fragP
, segment_type
);
4320 case C (UNCOND_JUMP
, UNDEF_DISP
):
4321 /* Used to be a branch to somewhere which was unknown. */
4322 if (!fragP
->fr_symbol
)
4324 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
4326 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
4328 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
4332 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
4336 case C (COND_JUMP
, UNDEF_DISP
):
4337 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
4338 what
= GET_WHAT (fragP
->fr_subtype
);
4339 /* Used to be a branch to somewhere which was unknown. */
4340 if (fragP
->fr_symbol
4341 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
4343 /* Got a symbol and it's defined in this segment, become byte
4344 sized - maybe it will fix up. */
4345 fragP
->fr_subtype
= C (what
, COND8
);
4347 else if (fragP
->fr_symbol
)
4349 /* Its got a segment, but its not ours, so it will always be long. */
4350 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
4354 /* We know the abs value. */
4355 fragP
->fr_subtype
= C (what
, COND8
);
4359 case C (UNCOND_JUMP
, UNCOND12
):
4360 case C (UNCOND_JUMP
, UNCOND32
):
4361 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
4362 case C (COND_JUMP
, COND8
):
4363 case C (COND_JUMP
, COND12
):
4364 case C (COND_JUMP
, COND32
):
4365 case C (COND_JUMP
, UNDEF_WORD_DISP
):
4366 case C (COND_JUMP_DELAY
, COND8
):
4367 case C (COND_JUMP_DELAY
, COND12
):
4368 case C (COND_JUMP_DELAY
, COND32
):
4369 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
4370 /* When relaxing a section for the second time, we don't need to
4371 do anything besides return the current size. */
4375 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
4376 return fragP
->fr_var
;
4379 /* Put number into target byte order. */
4382 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
4385 /* We might need to set the contents type to data. */
4386 sh64_flag_output ();
4389 if (! target_big_endian
)
4390 number_to_chars_littleendian (ptr
, use
, nbytes
);
4392 number_to_chars_bigendian (ptr
, use
, nbytes
);
4395 /* This version is used in obj-coff.c eg. for the sh-hms target. */
4398 md_pcrel_from (fixS
*fixP
)
4400 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
4404 md_pcrel_from_section (fixS
*fixP
, segT sec
)
4406 if (! sh_local_pcrel (fixP
)
4407 && fixP
->fx_addsy
!= (symbolS
*) NULL
4408 && (generic_force_reloc (fixP
)
4409 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
4411 /* The symbol is undefined (or is defined but not in this section,
4412 or we're not sure about it being the final definition). Let the
4413 linker figure it out. We need to adjust the subtraction of a
4414 symbol to the position of the relocated data, though. */
4415 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
4418 return md_pcrel_from (fixP
);
4421 /* Create a reloc. */
4424 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
4427 bfd_reloc_code_real_type r_type
;
4429 rel
= XNEW (arelent
);
4430 rel
->sym_ptr_ptr
= XNEW (asymbol
*);
4431 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4432 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4434 r_type
= fixp
->fx_r_type
;
4436 if (SWITCH_TABLE (fixp
))
4438 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
4439 rel
->addend
= rel
->address
- S_GET_VALUE(fixp
->fx_subsy
);
4440 if (r_type
== BFD_RELOC_16
)
4441 r_type
= BFD_RELOC_SH_SWITCH16
;
4442 else if (r_type
== BFD_RELOC_8
)
4443 r_type
= BFD_RELOC_8_PCREL
;
4444 else if (r_type
== BFD_RELOC_32
)
4445 r_type
= BFD_RELOC_SH_SWITCH32
;
4449 else if (r_type
== BFD_RELOC_SH_USES
)
4450 rel
->addend
= fixp
->fx_addnumber
;
4451 else if (r_type
== BFD_RELOC_SH_COUNT
)
4452 rel
->addend
= fixp
->fx_offset
;
4453 else if (r_type
== BFD_RELOC_SH_ALIGN
)
4454 rel
->addend
= fixp
->fx_offset
;
4455 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
4456 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
4457 rel
->addend
= fixp
->fx_offset
;
4458 else if (r_type
== BFD_RELOC_SH_LOOP_START
4459 || r_type
== BFD_RELOC_SH_LOOP_END
)
4460 rel
->addend
= fixp
->fx_offset
;
4461 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
4464 rel
->address
= rel
->addend
= fixp
->fx_offset
;
4467 else if (shmedia_init_reloc (rel
, fixp
))
4471 rel
->addend
= fixp
->fx_addnumber
;
4473 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
4475 if (rel
->howto
== NULL
)
4477 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4478 _("Cannot represent relocation type %s"),
4479 bfd_get_reloc_code_name (r_type
));
4480 /* Set howto to a garbage value so that we can keep going. */
4481 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4482 gas_assert (rel
->howto
!= NULL
);
4485 else if (rel
->howto
->type
== R_SH_IND12W
)
4486 rel
->addend
+= fixp
->fx_offset
- 4;
4493 inline static char *
4494 sh_end_of_match (char *cont
, const char *what
)
4496 int len
= strlen (what
);
4498 if (strncasecmp (cont
, what
, strlen (what
)) == 0
4499 && ! is_part_of_name (cont
[len
]))
4506 sh_parse_name (char const *name
,
4508 enum expr_mode mode
,
4511 char *next
= input_line_pointer
;
4516 exprP
->X_op_symbol
= NULL
;
4518 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4521 GOT_symbol
= symbol_find_or_make (name
);
4523 exprP
->X_add_symbol
= GOT_symbol
;
4525 /* If we have an absolute symbol or a reg, then we know its
4527 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
4528 if (mode
!= expr_defer
&& segment
== absolute_section
)
4530 exprP
->X_op
= O_constant
;
4531 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4532 exprP
->X_add_symbol
= NULL
;
4534 else if (mode
!= expr_defer
&& segment
== reg_section
)
4536 exprP
->X_op
= O_register
;
4537 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4538 exprP
->X_add_symbol
= NULL
;
4542 exprP
->X_op
= O_symbol
;
4543 exprP
->X_add_number
= 0;
4549 exprP
->X_add_symbol
= symbol_find_or_make (name
);
4551 if (*nextcharP
!= '@')
4553 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFF")))
4554 reloc_type
= BFD_RELOC_32_GOTOFF
;
4555 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTPLT")))
4556 reloc_type
= BFD_RELOC_SH_GOTPLT32
;
4557 else if ((next_end
= sh_end_of_match (next
+ 1, "GOT")))
4558 reloc_type
= BFD_RELOC_32_GOT_PCREL
;
4559 else if ((next_end
= sh_end_of_match (next
+ 1, "PLT")))
4560 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
4561 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSGD")))
4562 reloc_type
= BFD_RELOC_SH_TLS_GD_32
;
4563 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSLDM")))
4564 reloc_type
= BFD_RELOC_SH_TLS_LD_32
;
4565 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTTPOFF")))
4566 reloc_type
= BFD_RELOC_SH_TLS_IE_32
;
4567 else if ((next_end
= sh_end_of_match (next
+ 1, "TPOFF")))
4568 reloc_type
= BFD_RELOC_SH_TLS_LE_32
;
4569 else if ((next_end
= sh_end_of_match (next
+ 1, "DTPOFF")))
4570 reloc_type
= BFD_RELOC_SH_TLS_LDO_32
;
4571 else if ((next_end
= sh_end_of_match (next
+ 1, "PCREL")))
4572 reloc_type
= BFD_RELOC_32_PCREL
;
4573 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTFUNCDESC")))
4574 reloc_type
= BFD_RELOC_SH_GOTFUNCDESC
;
4575 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFFFUNCDESC")))
4576 reloc_type
= BFD_RELOC_SH_GOTOFFFUNCDESC
;
4577 else if ((next_end
= sh_end_of_match (next
+ 1, "FUNCDESC")))
4578 reloc_type
= BFD_RELOC_SH_FUNCDESC
;
4582 *input_line_pointer
= *nextcharP
;
4583 input_line_pointer
= next_end
;
4584 *nextcharP
= *input_line_pointer
;
4585 *input_line_pointer
= '\0';
4587 exprP
->X_op
= O_PIC_reloc
;
4588 exprP
->X_add_number
= 0;
4589 exprP
->X_md
= reloc_type
;
4595 sh_cfi_frame_initial_instructions (void)
4597 cfi_add_CFA_def_cfa (15, 0);
4601 sh_regname_to_dw2regnum (char *regname
)
4603 unsigned int regnum
= -1;
4607 static struct { const char *name
; int dw2regnum
; } regnames
[] =
4609 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 },
4610 { "macl", 21 }, { "fpul", 23 }
4613 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
4614 if (strcmp (regnames
[i
].name
, regname
) == 0)
4615 return regnames
[i
].dw2regnum
;
4617 if (regname
[0] == 'r')
4620 regnum
= strtoul (p
, &q
, 10);
4621 if (p
== q
|| *q
|| regnum
>= 16)
4624 else if (regname
[0] == 'f' && regname
[1] == 'r')
4627 regnum
= strtoul (p
, &q
, 10);
4628 if (p
== q
|| *q
|| regnum
>= 16)
4632 else if (regname
[0] == 'x' && regname
[1] == 'd')
4635 regnum
= strtoul (p
, &q
, 10);
4636 if (p
== q
|| *q
|| regnum
>= 8)
4642 #endif /* OBJ_ELF */