1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
22 /* Written By Steve Chamberlain <sac@cygnus.com> */
27 #include "opcodes/sh-opc.h"
28 #include "safe-ctype.h"
29 #include "struc-symbol.h"
35 #include "dwarf2dbg.h"
36 #include "dw2gencfi.h"
42 expressionS immediate
;
46 const char comment_chars
[] = "!";
47 const char line_separator_chars
[] = ";";
48 const char line_comment_chars
[] = "!#";
50 static void s_uses (int);
51 static void s_uacons (int);
54 static void sh_elf_cons (int);
56 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
60 big (int ignore ATTRIBUTE_UNUSED
)
62 if (! target_big_endian
)
63 as_bad (_("directive .big encountered when option -big required"));
65 /* Stop further messages. */
66 target_big_endian
= 1;
70 little (int ignore ATTRIBUTE_UNUSED
)
72 if (target_big_endian
)
73 as_bad (_("directive .little encountered when option -little required"));
75 /* Stop further messages. */
76 target_big_endian
= 0;
79 /* This table describes all the machine specific pseudo-ops the assembler
80 has to support. The fields are:
81 pseudo-op name without dot
82 function to call to execute this pseudo-op
83 Integer arg to pass to the function. */
85 const pseudo_typeS md_pseudo_table
[] =
88 {"long", sh_elf_cons
, 4},
89 {"int", sh_elf_cons
, 4},
90 {"word", sh_elf_cons
, 2},
91 {"short", sh_elf_cons
, 2},
97 {"form", listing_psize
, 0},
98 {"little", little
, 0},
99 {"heading", listing_title
, 0},
100 {"import", s_ignore
, 0},
101 {"page", listing_eject
, 0},
102 {"program", s_ignore
, 0},
104 {"uaword", s_uacons
, 2},
105 {"ualong", s_uacons
, 4},
106 {"uaquad", s_uacons
, 8},
107 {"2byte", s_uacons
, 2},
108 {"4byte", s_uacons
, 4},
109 {"8byte", s_uacons
, 8},
111 {"mode", s_sh64_mode
, 0 },
113 /* Have the old name too. */
114 {"isa", s_sh64_mode
, 0 },
116 /* Assert that the right ABI is used. */
117 {"abi", s_sh64_abi
, 0 },
119 { "vtable_inherit", sh64_vtable_inherit
, 0 },
120 { "vtable_entry", sh64_vtable_entry
, 0 },
121 #endif /* HAVE_SH64 */
125 int sh_relax
; /* set if -relax seen */
127 /* Whether -small was seen. */
131 /* Flag to generate relocations against symbol values for local symbols. */
133 static int dont_adjust_reloc_32
;
135 /* Flag to indicate that '$' is allowed as a register prefix. */
137 static int allow_dollar_register_prefix
;
139 /* Preset architecture set, if given; zero otherwise. */
141 static unsigned int preset_target_arch
;
143 /* The bit mask of architectures that could
144 accommodate the insns seen so far. */
145 static unsigned int valid_arch
;
147 const char EXP_CHARS
[] = "eE";
149 /* Chars that mean this number is a floating point constant. */
152 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
154 #define C(a,b) ENCODE_RELAX(a,b)
156 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
157 #define GET_WHAT(x) ((x>>4))
159 /* These are the three types of relaxable instruction. */
160 /* These are the types of relaxable instructions; except for END which is
163 #define COND_JUMP_DELAY 2
164 #define UNCOND_JUMP 3
168 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
169 #define SH64PCREL16_32 4
170 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
171 #define SH64PCREL16_64 5
173 /* Variants of the above for adjusting the insn to PTA or PTB according to
175 #define SH64PCREL16PT_32 6
176 #define SH64PCREL16PT_64 7
178 /* A MOVI expansion, expanding to at most 32 or 64 bits. */
179 #define MOVI_IMM_32 8
180 #define MOVI_IMM_32_PCREL 9
181 #define MOVI_IMM_64 10
182 #define MOVI_IMM_64_PCREL 11
185 #else /* HAVE_SH64 */
189 #endif /* HAVE_SH64 */
195 #define UNDEF_WORD_DISP 4
201 #define UNDEF_SH64PCREL 0
202 #define SH64PCREL16 1
203 #define SH64PCREL32 2
204 #define SH64PCREL48 3
205 #define SH64PCREL64 4
206 #define SH64PCRELPLT 5
214 #define MOVI_GOTOFF 6
216 #endif /* HAVE_SH64 */
218 /* Branch displacements are from the address of the branch plus
219 four, thus all minimum and maximum values have 4 added to them. */
222 #define COND8_LENGTH 2
224 /* There is one extra instruction before the branch, so we must add
225 two more bytes to account for it. */
226 #define COND12_F 4100
227 #define COND12_M -4090
228 #define COND12_LENGTH 6
230 #define COND12_DELAY_LENGTH 4
232 /* ??? The minimum and maximum values are wrong, but this does not matter
233 since this relocation type is not supported yet. */
234 #define COND32_F (1<<30)
235 #define COND32_M -(1<<30)
236 #define COND32_LENGTH 14
238 #define UNCOND12_F 4098
239 #define UNCOND12_M -4092
240 #define UNCOND12_LENGTH 2
242 /* ??? The minimum and maximum values are wrong, but this does not matter
243 since this relocation type is not supported yet. */
244 #define UNCOND32_F (1<<30)
245 #define UNCOND32_M -(1<<30)
246 #define UNCOND32_LENGTH 14
249 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
250 TRd" as is the current insn, so no extra length. Note that the "reach"
251 is calculated from the address *after* that insn, but the offset in the
252 insn is calculated from the beginning of the insn. We also need to
253 take into account the implicit 1 coded as the "A" in PTA when counting
254 forward. If PTB reaches an odd address, we trap that as an error
255 elsewhere, so we don't have to have different relaxation entries. We
256 don't add a one to the negative range, since PTB would then have the
257 farthest backward-reaching value skipped, not generated at relaxation. */
258 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
259 #define SH64PCREL16_M (-32768 * 4 - 4)
260 #define SH64PCREL16_LENGTH 0
262 /* The next step is to change that PT insn into
263 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
264 SHORI (label - datalabel Ln) & 65535, R25
267 which means two extra insns, 8 extra bytes. This is the limit for the
270 The expressions look a bit bad since we have to adjust this to avoid overflow on a
272 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
273 #define SH64PCREL32_LENGTH (2 * 4)
275 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
277 #if BFD_HOST_64BIT_LONG
278 /* The "reach" type is long, so we can only do this for a 64-bit-long
280 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4)
281 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
282 #define SH64PCREL48_M (((long) -1 << 47) - 4)
283 #define SH64PCREL48_LENGTH (3 * 4)
285 /* If the host does not have 64-bit longs, just make this state identical
286 in reach to the 32-bit state. Note that we have a slightly incorrect
287 reach, but the correct one above will overflow a 32-bit number. */
288 #define SH64PCREL32_M (((long) -1 << 30) * 2)
289 #define SH64PCREL48_F SH64PCREL32_F
290 #define SH64PCREL48_M SH64PCREL32_M
291 #define SH64PCREL48_LENGTH (3 * 4)
292 #endif /* BFD_HOST_64BIT_LONG */
294 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
296 #define SH64PCREL64_LENGTH (4 * 4)
298 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
299 SH64PCREL expansions. The PCREL one is similar, but the other has no
300 pc-relative reach; it must be fully expanded in
301 shmedia_md_estimate_size_before_relax. */
302 #define MOVI_16_LENGTH 0
303 #define MOVI_16_F (32767 - 4)
304 #define MOVI_16_M (-32768 - 4)
305 #define MOVI_32_LENGTH 4
306 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
307 #define MOVI_48_LENGTH 8
309 #if BFD_HOST_64BIT_LONG
310 /* The "reach" type is long, so we can only do this for a 64-bit-long
312 #define MOVI_32_M (((long) -1 << 30) * 2 - 4)
313 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
314 #define MOVI_48_M (((long) -1 << 47) - 4)
316 /* If the host does not have 64-bit longs, just make this state identical
317 in reach to the 32-bit state. Note that we have a slightly incorrect
318 reach, but the correct one above will overflow a 32-bit number. */
319 #define MOVI_32_M (((long) -1 << 30) * 2)
320 #define MOVI_48_F MOVI_32_F
321 #define MOVI_48_M MOVI_32_M
322 #endif /* BFD_HOST_64BIT_LONG */
324 #define MOVI_64_LENGTH 12
325 #endif /* HAVE_SH64 */
327 #define EMPTY { 0, 0, 0, 0 }
329 const relax_typeS md_relax_table
[C (END
, 0)] = {
330 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
331 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
334 /* C (COND_JUMP, COND8) */
335 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
336 /* C (COND_JUMP, COND12) */
337 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
338 /* C (COND_JUMP, COND32) */
339 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
340 /* C (COND_JUMP, UNDEF_WORD_DISP) */
341 { 0, 0, COND32_LENGTH
, 0, },
343 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
346 /* C (COND_JUMP_DELAY, COND8) */
347 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
348 /* C (COND_JUMP_DELAY, COND12) */
349 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
350 /* C (COND_JUMP_DELAY, COND32) */
351 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
352 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
353 { 0, 0, COND32_LENGTH
, 0, },
355 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
358 /* C (UNCOND_JUMP, UNCOND12) */
359 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
360 /* C (UNCOND_JUMP, UNCOND32) */
361 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
363 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
364 { 0, 0, UNCOND32_LENGTH
, 0, },
366 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
369 /* C (SH64PCREL16_32, SH64PCREL16) */
371 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_32
, SH64PCREL32
) },
372 /* C (SH64PCREL16_32, SH64PCREL32) */
373 { 0, 0, SH64PCREL32_LENGTH
, 0 },
375 /* C (SH64PCREL16_32, SH64PCRELPLT) */
376 { 0, 0, SH64PCREL32_LENGTH
, 0 },
378 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
380 /* C (SH64PCREL16_64, SH64PCREL16) */
382 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_64
, SH64PCREL32
) },
383 /* C (SH64PCREL16_64, SH64PCREL32) */
384 { SH64PCREL32_F
, SH64PCREL32_M
, SH64PCREL32_LENGTH
, C (SH64PCREL16_64
, SH64PCREL48
) },
385 /* C (SH64PCREL16_64, SH64PCREL48) */
386 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16_64
, SH64PCREL64
) },
387 /* C (SH64PCREL16_64, SH64PCREL64) */
388 { 0, 0, SH64PCREL64_LENGTH
, 0 },
389 /* C (SH64PCREL16_64, SH64PCRELPLT) */
390 { 0, 0, SH64PCREL64_LENGTH
, 0 },
392 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
394 /* C (SH64PCREL16PT_32, SH64PCREL16) */
396 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_32
, SH64PCREL32
) },
397 /* C (SH64PCREL16PT_32, SH64PCREL32) */
398 { 0, 0, SH64PCREL32_LENGTH
, 0 },
400 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
401 { 0, 0, SH64PCREL32_LENGTH
, 0 },
403 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
405 /* C (SH64PCREL16PT_64, SH64PCREL16) */
407 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL32
) },
408 /* C (SH64PCREL16PT_64, SH64PCREL32) */
412 C (SH64PCREL16PT_64
, SH64PCREL48
) },
413 /* C (SH64PCREL16PT_64, SH64PCREL48) */
414 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL64
) },
415 /* C (SH64PCREL16PT_64, SH64PCREL64) */
416 { 0, 0, SH64PCREL64_LENGTH
, 0 },
417 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
418 { 0, 0, SH64PCREL64_LENGTH
, 0},
420 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
422 /* C (MOVI_IMM_32, UNDEF_MOVI) */
423 { 0, 0, MOVI_32_LENGTH
, 0 },
424 /* C (MOVI_IMM_32, MOVI_16) */
425 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32
, MOVI_32
) },
426 /* C (MOVI_IMM_32, MOVI_32) */
427 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, 0 },
429 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
430 { 0, 0, MOVI_32_LENGTH
, 0 },
431 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
433 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
435 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32_PCREL
, MOVI_32
) },
436 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
437 { 0, 0, MOVI_32_LENGTH
, 0 },
439 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
440 { 0, 0, MOVI_32_LENGTH
, 0 },
442 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
443 { 0, 0, MOVI_32_LENGTH
, 0 },
444 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
446 /* C (MOVI_IMM_64, UNDEF_MOVI) */
447 { 0, 0, MOVI_64_LENGTH
, 0 },
448 /* C (MOVI_IMM_64, MOVI_16) */
449 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64
, MOVI_32
) },
450 /* C (MOVI_IMM_64, MOVI_32) */
451 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64
, MOVI_48
) },
452 /* C (MOVI_IMM_64, MOVI_48) */
453 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64
, MOVI_64
) },
454 /* C (MOVI_IMM_64, MOVI_64) */
455 { 0, 0, MOVI_64_LENGTH
, 0 },
457 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
458 { 0, 0, MOVI_64_LENGTH
, 0 },
459 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
461 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
463 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_32
) },
464 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
465 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_48
) },
466 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
467 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_64
) },
468 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
469 { 0, 0, MOVI_64_LENGTH
, 0 },
470 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
471 { 0, 0, MOVI_64_LENGTH
, 0 },
473 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
474 { 0, 0, MOVI_64_LENGTH
, 0 },
475 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
477 #endif /* HAVE_SH64 */
483 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
487 /* Determinet whether the symbol needs any kind of PIC relocation. */
490 sh_PIC_related_p (symbolS
*sym
)
497 if (sym
== GOT_symbol
)
501 if (sh_PIC_related_p (*symbol_get_tc (sym
)))
505 exp
= symbol_get_value_expression (sym
);
507 return (exp
->X_op
== O_PIC_reloc
508 || sh_PIC_related_p (exp
->X_add_symbol
)
509 || sh_PIC_related_p (exp
->X_op_symbol
));
512 /* Determine the relocation type to be used to represent the
513 expression, that may be rearranged. */
516 sh_check_fixup (expressionS
*main_exp
, bfd_reloc_code_real_type
*r_type_p
)
518 expressionS
*exp
= main_exp
;
520 /* This is here for backward-compatibility only. GCC used to generated:
522 f@PLT + . - (.LPCS# + 2)
524 but we'd rather be able to handle this as a PIC-related reference
525 plus/minus a symbol. However, gas' parser gives us:
527 O_subtract (O_add (f@PLT, .), .LPCS#+2)
529 so we attempt to transform this into:
531 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
533 which we can handle simply below. */
534 if (exp
->X_op
== O_subtract
)
536 if (sh_PIC_related_p (exp
->X_op_symbol
))
539 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
541 if (exp
&& sh_PIC_related_p (exp
->X_op_symbol
))
544 if (exp
&& exp
->X_op
== O_add
545 && sh_PIC_related_p (exp
->X_add_symbol
))
547 symbolS
*sym
= exp
->X_add_symbol
;
549 exp
->X_op
= O_subtract
;
550 exp
->X_add_symbol
= main_exp
->X_op_symbol
;
552 main_exp
->X_op_symbol
= main_exp
->X_add_symbol
;
553 main_exp
->X_add_symbol
= sym
;
555 main_exp
->X_add_number
+= exp
->X_add_number
;
556 exp
->X_add_number
= 0;
561 else if (exp
->X_op
== O_add
&& sh_PIC_related_p (exp
->X_op_symbol
))
564 if (exp
->X_op
== O_symbol
|| exp
->X_op
== O_add
|| exp
->X_op
== O_subtract
)
567 if (exp
->X_add_symbol
568 && (exp
->X_add_symbol
== GOT_symbol
570 && *symbol_get_tc (exp
->X_add_symbol
) == GOT_symbol
)))
574 case BFD_RELOC_SH_IMM_LOW16
:
575 *r_type_p
= BFD_RELOC_SH_GOTPC_LOW16
;
578 case BFD_RELOC_SH_IMM_MEDLOW16
:
579 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDLOW16
;
582 case BFD_RELOC_SH_IMM_MEDHI16
:
583 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDHI16
;
586 case BFD_RELOC_SH_IMM_HI16
:
587 *r_type_p
= BFD_RELOC_SH_GOTPC_HI16
;
591 case BFD_RELOC_UNUSED
:
592 *r_type_p
= BFD_RELOC_SH_GOTPC
;
601 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
603 *r_type_p
= BFD_RELOC_SH_GOTPC
;
607 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
612 if (exp
->X_op
== O_PIC_reloc
)
618 case BFD_RELOC_UNUSED
:
619 *r_type_p
= exp
->X_md
;
622 case BFD_RELOC_SH_IMM_LOW16
:
625 case BFD_RELOC_32_GOTOFF
:
626 *r_type_p
= BFD_RELOC_SH_GOTOFF_LOW16
;
629 case BFD_RELOC_SH_GOTPLT32
:
630 *r_type_p
= BFD_RELOC_SH_GOTPLT_LOW16
;
633 case BFD_RELOC_32_GOT_PCREL
:
634 *r_type_p
= BFD_RELOC_SH_GOT_LOW16
;
637 case BFD_RELOC_32_PLT_PCREL
:
638 *r_type_p
= BFD_RELOC_SH_PLT_LOW16
;
646 case BFD_RELOC_SH_IMM_MEDLOW16
:
649 case BFD_RELOC_32_GOTOFF
:
650 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDLOW16
;
653 case BFD_RELOC_SH_GOTPLT32
:
654 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDLOW16
;
657 case BFD_RELOC_32_GOT_PCREL
:
658 *r_type_p
= BFD_RELOC_SH_GOT_MEDLOW16
;
661 case BFD_RELOC_32_PLT_PCREL
:
662 *r_type_p
= BFD_RELOC_SH_PLT_MEDLOW16
;
670 case BFD_RELOC_SH_IMM_MEDHI16
:
673 case BFD_RELOC_32_GOTOFF
:
674 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDHI16
;
677 case BFD_RELOC_SH_GOTPLT32
:
678 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDHI16
;
681 case BFD_RELOC_32_GOT_PCREL
:
682 *r_type_p
= BFD_RELOC_SH_GOT_MEDHI16
;
685 case BFD_RELOC_32_PLT_PCREL
:
686 *r_type_p
= BFD_RELOC_SH_PLT_MEDHI16
;
694 case BFD_RELOC_SH_IMM_HI16
:
697 case BFD_RELOC_32_GOTOFF
:
698 *r_type_p
= BFD_RELOC_SH_GOTOFF_HI16
;
701 case BFD_RELOC_SH_GOTPLT32
:
702 *r_type_p
= BFD_RELOC_SH_GOTPLT_HI16
;
705 case BFD_RELOC_32_GOT_PCREL
:
706 *r_type_p
= BFD_RELOC_SH_GOT_HI16
;
709 case BFD_RELOC_32_PLT_PCREL
:
710 *r_type_p
= BFD_RELOC_SH_PLT_HI16
;
722 *r_type_p
= exp
->X_md
;
725 exp
->X_op
= O_symbol
;
728 main_exp
->X_add_symbol
= exp
->X_add_symbol
;
729 main_exp
->X_add_number
+= exp
->X_add_number
;
733 return (sh_PIC_related_p (exp
->X_add_symbol
)
734 || sh_PIC_related_p (exp
->X_op_symbol
));
739 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
742 sh_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
)
744 bfd_reloc_code_real_type r_type
= BFD_RELOC_UNUSED
;
746 if (sh_check_fixup (exp
, &r_type
))
747 as_bad (_("Invalid PIC expression."));
749 if (r_type
== BFD_RELOC_UNUSED
)
753 r_type
= BFD_RELOC_8
;
757 r_type
= BFD_RELOC_16
;
761 r_type
= BFD_RELOC_32
;
766 r_type
= BFD_RELOC_64
;
776 as_bad (_("unsupported BFD relocation size %u"), size
);
777 r_type
= BFD_RELOC_UNUSED
;
780 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
783 /* The regular cons() function, that reads constants, doesn't support
784 suffixes such as @GOT, @GOTOFF and @PLT, that generate
785 machine-specific relocation types. So we must define it here. */
786 /* Clobbers input_line_pointer, checks end-of-line. */
787 /* NBYTES 1=.byte, 2=.word, 4=.long */
789 sh_elf_cons (register int nbytes
)
795 /* Update existing range to include a previous insn, if there was one. */
796 sh64_update_contents_mark (TRUE
);
798 /* We need to make sure the contents type is set to data. */
801 #endif /* HAVE_SH64 */
803 if (is_it_end_of_statement ())
805 demand_empty_rest_of_line ();
810 md_cons_align (nbytes
);
816 emit_expr (&exp
, (unsigned int) nbytes
);
818 while (*input_line_pointer
++ == ',');
820 input_line_pointer
--; /* Put terminator back into stream. */
821 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
823 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
826 demand_empty_rest_of_line ();
831 /* This function is called once, at assembler startup time. This should
832 set up all the tables, etc that the MD part of the assembler needs. */
837 const sh_opcode_info
*opcode
;
838 char *prev_name
= "";
839 unsigned int target_arch
;
842 = preset_target_arch
? preset_target_arch
: arch_sh_up
& ~arch_sh_has_dsp
;
843 valid_arch
= target_arch
;
849 opcode_hash_control
= hash_new ();
851 /* Insert unique names into hash table. */
852 for (opcode
= sh_table
; opcode
->name
; opcode
++)
854 if (strcmp (prev_name
, opcode
->name
) != 0)
856 if (!SH_MERGE_ARCH_SET_VALID (opcode
->arch
, target_arch
))
858 prev_name
= opcode
->name
;
859 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
866 static int reg_x
, reg_y
;
870 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
872 /* Try to parse a reg name. Return the number of chars consumed. */
875 parse_reg_without_prefix (char *src
, int *mode
, int *reg
)
877 char l0
= TOLOWER (src
[0]);
878 char l1
= l0
? TOLOWER (src
[1]) : 0;
880 /* We use ! IDENT_CHAR for the next character after the register name, to
881 make sure that we won't accidentally recognize a symbol name such as
882 'sram' or sr_ram as being a reference to the register 'sr'. */
888 if (src
[2] >= '0' && src
[2] <= '5'
889 && ! IDENT_CHAR ((unsigned char) src
[3]))
892 *reg
= 10 + src
[2] - '0';
896 if (l1
>= '0' && l1
<= '9'
897 && ! IDENT_CHAR ((unsigned char) src
[2]))
903 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
904 && ! IDENT_CHAR ((unsigned char) src
[7]))
911 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
916 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
927 if (! IDENT_CHAR ((unsigned char) src
[2]))
933 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
942 if (! IDENT_CHAR ((unsigned char) src
[2]))
948 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
956 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
957 && ! IDENT_CHAR ((unsigned char) src
[3]))
960 *reg
= 4 + (l1
- '0');
963 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
964 && ! IDENT_CHAR ((unsigned char) src
[3]))
967 *reg
= 6 + (l1
- '0');
970 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
971 && ! IDENT_CHAR ((unsigned char) src
[3]))
976 *reg
= n
| ((~n
& 2) << 1);
981 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[2]))
1003 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
1004 && ! IDENT_CHAR ((unsigned char) src
[2]))
1007 *reg
= A_X0_NUM
+ l1
- '0';
1011 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
1012 && ! IDENT_CHAR ((unsigned char) src
[2]))
1015 *reg
= A_Y0_NUM
+ l1
- '0';
1019 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
1020 && ! IDENT_CHAR ((unsigned char) src
[2]))
1023 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
1029 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
1035 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
1036 && ! IDENT_CHAR ((unsigned char) src
[3]))
1042 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
1043 && ! IDENT_CHAR ((unsigned char) src
[3]))
1049 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
1050 && ! IDENT_CHAR ((unsigned char) src
[3]))
1056 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1057 && ! IDENT_CHAR ((unsigned char) src
[3]))
1063 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1069 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
1076 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1081 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
1083 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1084 and use an uninitialized immediate. */
1088 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1089 && ! IDENT_CHAR ((unsigned char) src
[3]))
1094 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1095 && ! IDENT_CHAR ((unsigned char) src
[3]))
1101 if (l0
== 't' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1102 && ! IDENT_CHAR ((unsigned char) src
[3]))
1107 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
1108 && ! IDENT_CHAR ((unsigned char) src
[4]))
1110 if (TOLOWER (src
[3]) == 'l')
1115 if (TOLOWER (src
[3]) == 'h')
1121 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
1122 && ! IDENT_CHAR ((unsigned char) src
[3]))
1127 if (l0
== 'f' && l1
== 'r')
1131 if (src
[3] >= '0' && src
[3] <= '5'
1132 && ! IDENT_CHAR ((unsigned char) src
[4]))
1135 *reg
= 10 + src
[3] - '0';
1139 if (src
[2] >= '0' && src
[2] <= '9'
1140 && ! IDENT_CHAR ((unsigned char) src
[3]))
1143 *reg
= (src
[2] - '0');
1147 if (l0
== 'd' && l1
== 'r')
1151 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1152 && ! IDENT_CHAR ((unsigned char) src
[4]))
1155 *reg
= 10 + src
[3] - '0';
1159 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1160 && ! IDENT_CHAR ((unsigned char) src
[3]))
1163 *reg
= (src
[2] - '0');
1167 if (l0
== 'x' && l1
== 'd')
1171 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1172 && ! IDENT_CHAR ((unsigned char) src
[4]))
1175 *reg
= 11 + src
[3] - '0';
1179 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1180 && ! IDENT_CHAR ((unsigned char) src
[3]))
1183 *reg
= (src
[2] - '0') + 1;
1187 if (l0
== 'f' && l1
== 'v')
1189 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
1195 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
1196 && ! IDENT_CHAR ((unsigned char) src
[3]))
1199 *reg
= (src
[2] - '0');
1203 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
1204 && TOLOWER (src
[3]) == 'l'
1205 && ! IDENT_CHAR ((unsigned char) src
[4]))
1211 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
1212 && TOLOWER (src
[3]) == 'c'
1213 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
1219 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
1220 && TOLOWER (src
[3]) == 'r'
1221 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
1230 /* Like parse_reg_without_prefix, but this version supports
1231 $-prefixed register names if enabled by the user. */
1234 parse_reg (char *src
, int *mode
, int *reg
)
1236 unsigned int prefix
;
1237 unsigned int consumed
;
1241 if (allow_dollar_register_prefix
)
1252 consumed
= parse_reg_without_prefix (src
, mode
, reg
);
1257 return consumed
+ prefix
;
1261 parse_exp (char *s
, sh_operand_info
*op
)
1266 save
= input_line_pointer
;
1267 input_line_pointer
= s
;
1268 expression (&op
->immediate
);
1269 if (op
->immediate
.X_op
== O_absent
)
1270 as_bad (_("missing operand"));
1272 else if (op
->immediate
.X_op
== O_PIC_reloc
1273 || sh_PIC_related_p (op
->immediate
.X_add_symbol
)
1274 || sh_PIC_related_p (op
->immediate
.X_op_symbol
))
1275 as_bad (_("misplaced PIC operand"));
1277 new = input_line_pointer
;
1278 input_line_pointer
= save
;
1282 /* The many forms of operand:
1285 @Rn Register indirect
1298 pr, gbr, vbr, macl, mach
1302 parse_at (char *src
, sh_operand_info
*op
)
1309 src
= parse_at (src
, op
);
1310 if (op
->type
== A_DISP_TBR
)
1311 op
->type
= A_DISP2_TBR
;
1313 as_bad (_("illegal double indirection"));
1315 else if (src
[0] == '-')
1317 /* Must be predecrement. */
1320 len
= parse_reg (src
, &mode
, &(op
->reg
));
1321 if (mode
!= A_REG_N
)
1322 as_bad (_("illegal register after @-"));
1327 else if (src
[0] == '(')
1329 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1332 len
= parse_reg (src
, &mode
, &(op
->reg
));
1333 if (len
&& mode
== A_REG_N
)
1338 as_bad (_("must be @(r0,...)"));
1343 /* Now can be rn or gbr. */
1344 len
= parse_reg (src
, &mode
, &(op
->reg
));
1354 op
->type
= A_R0_GBR
;
1356 else if (mode
== A_REG_N
)
1358 op
->type
= A_IND_R0_REG_N
;
1362 as_bad (_("syntax error in @(r0,...)"));
1367 as_bad (_("syntax error in @(r0...)"));
1372 /* Must be an @(disp,.. thing). */
1373 src
= parse_exp (src
, op
);
1376 /* Now can be rn, gbr or pc. */
1377 len
= parse_reg (src
, &mode
, &op
->reg
);
1380 if (mode
== A_REG_N
)
1382 op
->type
= A_DISP_REG_N
;
1384 else if (mode
== A_GBR
)
1386 op
->type
= A_DISP_GBR
;
1388 else if (mode
== A_TBR
)
1390 op
->type
= A_DISP_TBR
;
1392 else if (mode
== A_PC
)
1394 /* We want @(expr, pc) to uniformly address . + expr,
1395 no matter if expr is a constant, or a more complex
1396 expression, e.g. sym-. or sym1-sym2.
1397 However, we also used to accept @(sym,pc)
1398 as addressing sym, i.e. meaning the same as plain sym.
1399 Some existing code does use the @(sym,pc) syntax, so
1400 we give it the old semantics for now, but warn about
1401 its use, so that users have some time to fix their code.
1403 Note that due to this backward compatibility hack,
1404 we'll get unexpected results when @(offset, pc) is used,
1405 and offset is a symbol that is set later to an an address
1406 difference, or an external symbol that is set to an
1407 address difference in another source file, so we want to
1408 eventually remove it. */
1409 if (op
->immediate
.X_op
== O_symbol
)
1411 op
->type
= A_DISP_PC
;
1412 as_warn (_("Deprecated syntax."));
1416 op
->type
= A_DISP_PC_ABS
;
1417 /* Such operands don't get corrected for PC==.+4, so
1418 make the correction here. */
1419 op
->immediate
.X_add_number
-= 4;
1424 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1429 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1434 as_bad (_("expecting )"));
1440 src
+= parse_reg (src
, &mode
, &(op
->reg
));
1441 if (mode
!= A_REG_N
)
1442 as_bad (_("illegal register after @"));
1449 l0
= TOLOWER (src
[0]);
1450 l1
= TOLOWER (src
[1]);
1452 if ((l0
== 'r' && l1
== '8')
1453 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1456 op
->type
= AX_PMOD_N
;
1458 else if ( (l0
== 'r' && l1
== '9')
1459 || (l0
== 'i' && l1
== 'y'))
1462 op
->type
= AY_PMOD_N
;
1474 get_operand (char **ptr
, sh_operand_info
*op
)
1483 *ptr
= parse_exp (src
, op
);
1488 else if (src
[0] == '@')
1490 *ptr
= parse_at (src
, op
);
1493 len
= parse_reg (src
, &mode
, &(op
->reg
));
1502 /* Not a reg, the only thing left is a displacement. */
1503 *ptr
= parse_exp (src
, op
);
1504 op
->type
= A_DISP_PC
;
1510 get_operands (sh_opcode_info
*info
, char *args
, sh_operand_info
*operand
)
1515 /* The pre-processor will eliminate whitespace in front of '@'
1516 after the first argument; we may be called multiple times
1517 from assemble_ppi, so don't insist on finding whitespace here. */
1521 get_operand (&ptr
, operand
+ 0);
1528 get_operand (&ptr
, operand
+ 1);
1529 /* ??? Hack: psha/pshl have a varying operand number depending on
1530 the type of the first operand. We handle this by having the
1531 three-operand version first and reducing the number of operands
1532 parsed to two if we see that the first operand is an immediate.
1533 This works because no insn with three operands has an immediate
1534 as first operand. */
1535 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1541 get_operand (&ptr
, operand
+ 2);
1545 operand
[2].type
= 0;
1550 operand
[1].type
= 0;
1551 operand
[2].type
= 0;
1556 operand
[0].type
= 0;
1557 operand
[1].type
= 0;
1558 operand
[2].type
= 0;
1563 /* Passed a pointer to a list of opcodes which use different
1564 addressing modes, return the opcode which matches the opcodes
1567 static sh_opcode_info
*
1568 get_specific (sh_opcode_info
*opcode
, sh_operand_info
*operands
)
1570 sh_opcode_info
*this_try
= opcode
;
1571 char *name
= opcode
->name
;
1574 while (opcode
->name
)
1576 this_try
= opcode
++;
1577 if ((this_try
->name
!= name
) && (strcmp (this_try
->name
, name
) != 0))
1579 /* We've looked so far down the table that we've run out of
1580 opcodes with the same name. */
1584 /* Look at both operands needed by the opcodes and provided by
1585 the user - since an arg test will often fail on the same arg
1586 again and again, we'll try and test the last failing arg the
1587 first on each opcode try. */
1588 for (n
= 0; this_try
->arg
[n
]; n
++)
1590 sh_operand_info
*user
= operands
+ n
;
1591 sh_arg_type arg
= this_try
->arg
[n
];
1593 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh2a_nofpu_up
)
1594 && ( arg
== A_DISP_REG_M
1595 || arg
== A_DISP_REG_N
))
1597 /* Check a few key IMM* fields for overflow. */
1599 long val
= user
->immediate
.X_add_number
;
1601 for (opf
= 0; opf
< 4; opf
++)
1602 switch (this_try
->nibbles
[opf
])
1606 if (val
< 0 || val
> 15)
1611 if (val
< 0 || val
> 15 * 2)
1616 if (val
< 0 || val
> 15 * 4)
1626 if (user
->type
== A_DISP_PC_ABS
)
1637 if (user
->type
!= arg
)
1641 /* opcode needs r0 */
1642 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1646 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1650 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1658 case A_IND_R0_REG_N
:
1667 /* Opcode needs rn */
1668 if (user
->type
!= arg
)
1673 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1689 if (user
->type
!= arg
)
1694 if (user
->type
!= arg
)
1700 if (user
->type
!= A_INC_N
)
1702 if (user
->reg
!= 15)
1708 if (user
->type
!= A_DEC_N
)
1710 if (user
->reg
!= 15)
1719 case A_IND_R0_REG_M
:
1722 /* Opcode needs rn */
1723 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1729 if (user
->type
!= A_DEC_N
)
1731 if (user
->reg
< 2 || user
->reg
> 5)
1737 if (user
->type
!= A_INC_N
)
1739 if (user
->reg
< 2 || user
->reg
> 5)
1745 if (user
->type
!= A_IND_N
)
1747 if (user
->reg
< 2 || user
->reg
> 5)
1753 if (user
->type
!= AX_PMOD_N
)
1755 if (user
->reg
< 2 || user
->reg
> 5)
1761 if (user
->type
!= A_INC_N
)
1763 if (user
->reg
< 4 || user
->reg
> 5)
1769 if (user
->type
!= A_IND_N
)
1771 if (user
->reg
< 4 || user
->reg
> 5)
1777 if (user
->type
!= AX_PMOD_N
)
1779 if (user
->reg
< 4 || user
->reg
> 5)
1785 if (user
->type
!= A_INC_N
)
1787 if ((user
->reg
< 4 || user
->reg
> 5)
1788 && (user
->reg
< 0 || user
->reg
> 1))
1794 if (user
->type
!= A_IND_N
)
1796 if ((user
->reg
< 4 || user
->reg
> 5)
1797 && (user
->reg
< 0 || user
->reg
> 1))
1803 if (user
->type
!= AX_PMOD_N
)
1805 if ((user
->reg
< 4 || user
->reg
> 5)
1806 && (user
->reg
< 0 || user
->reg
> 1))
1812 if (user
->type
!= A_INC_N
)
1814 if (user
->reg
< 6 || user
->reg
> 7)
1820 if (user
->type
!= A_IND_N
)
1822 if (user
->reg
< 6 || user
->reg
> 7)
1828 if (user
->type
!= AY_PMOD_N
)
1830 if (user
->reg
< 6 || user
->reg
> 7)
1836 if (user
->type
!= A_INC_N
)
1838 if ((user
->reg
< 6 || user
->reg
> 7)
1839 && (user
->reg
< 2 || user
->reg
> 3))
1845 if (user
->type
!= A_IND_N
)
1847 if ((user
->reg
< 6 || user
->reg
> 7)
1848 && (user
->reg
< 2 || user
->reg
> 3))
1854 if (user
->type
!= AY_PMOD_N
)
1856 if ((user
->reg
< 6 || user
->reg
> 7)
1857 && (user
->reg
< 2 || user
->reg
> 3))
1863 if (user
->type
!= DSP_REG_N
)
1865 if (user
->reg
!= A_A0_NUM
1866 && user
->reg
!= A_A1_NUM
)
1872 if (user
->type
!= DSP_REG_N
)
1894 if (user
->type
!= DSP_REG_N
)
1916 if (user
->type
!= DSP_REG_N
)
1938 if (user
->type
!= DSP_REG_N
)
1960 if (user
->type
!= DSP_REG_N
)
1982 if (user
->type
!= DSP_REG_N
)
2004 if (user
->type
!= DSP_REG_N
)
2026 if (user
->type
!= DSP_REG_N
)
2048 if (user
->type
!= DSP_REG_N
)
2070 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
2074 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
2078 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
2082 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
2086 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
2096 /* Opcode needs rn */
2097 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
2102 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
2107 if (user
->type
!= XMTRX_M4
)
2113 printf (_("unhandled %d\n"), arg
);
2117 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch
, this_try
->arch
))
2119 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, this_try
->arch
);
2129 insert (char *where
, int how
, int pcrel
, sh_operand_info
*op
)
2131 fix_new_exp (frag_now
,
2132 where
- frag_now
->fr_literal
,
2140 insert4 (char * where
, int how
, int pcrel
, sh_operand_info
* op
)
2142 fix_new_exp (frag_now
,
2143 where
- frag_now
->fr_literal
,
2150 build_relax (sh_opcode_info
*opcode
, sh_operand_info
*op
)
2152 int high_byte
= target_big_endian
? 0 : 1;
2155 if (opcode
->arg
[0] == A_BDISP8
)
2157 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
2158 p
= frag_var (rs_machine_dependent
,
2159 md_relax_table
[C (what
, COND32
)].rlx_length
,
2160 md_relax_table
[C (what
, COND8
)].rlx_length
,
2162 op
->immediate
.X_add_symbol
,
2163 op
->immediate
.X_add_number
,
2165 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
2167 else if (opcode
->arg
[0] == A_BDISP12
)
2169 p
= frag_var (rs_machine_dependent
,
2170 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
2171 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
2173 op
->immediate
.X_add_symbol
,
2174 op
->immediate
.X_add_number
,
2176 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
2181 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
2184 insert_loop_bounds (char *output
, sh_operand_info
*operand
)
2189 /* Since the low byte of the opcode will be overwritten by the reloc, we
2190 can just stash the high byte into both bytes and ignore endianness. */
2193 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2194 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2198 static int count
= 0;
2200 /* If the last loop insn is a two-byte-insn, it is in danger of being
2201 swapped with the insn after it. To prevent this, create a new
2202 symbol - complete with SH_LABEL reloc - after the last loop insn.
2203 If the last loop insn is four bytes long, the symbol will be
2204 right in the middle, but four byte insns are not swapped anyways. */
2205 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
2206 Hence a 9 digit number should be enough to count all REPEATs. */
2208 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
2209 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
2210 /* Make this a local symbol. */
2212 SF_SET_LOCAL (end_sym
);
2213 #endif /* OBJ_COFF */
2214 symbol_table_insert (end_sym
);
2215 end_sym
->sy_value
= operand
[1].immediate
;
2216 end_sym
->sy_value
.X_add_number
+= 2;
2217 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
2220 output
= frag_more (2);
2223 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2224 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2226 return frag_more (2);
2229 /* Now we know what sort of opcodes it is, let's build the bytes. */
2232 build_Mytes (sh_opcode_info
*opcode
, sh_operand_info
*operand
)
2237 unsigned int size
= 2;
2238 int low_byte
= target_big_endian
? 1 : 0;
2250 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2252 output
= frag_more (4);
2257 output
= frag_more (2);
2259 for (index
= 0; index
< max_index
; index
++)
2261 sh_nibble_type i
= opcode
->nibbles
[index
];
2272 nbuf
[index
] = reg_n
;
2275 nbuf
[index
] = reg_m
;
2278 if (reg_n
< 2 || reg_n
> 5)
2279 as_bad (_("Invalid register: 'r%d'"), reg_n
);
2280 nbuf
[index
] = (reg_n
& 3) | 4;
2283 nbuf
[index
] = reg_n
| (reg_m
>> 2);
2286 nbuf
[index
] = reg_b
| 0x08;
2289 nbuf
[index
] = reg_n
| 0x01;
2292 nbuf
[index
] |= 0x08;
2294 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3
, 0, operand
);
2297 nbuf
[index
] |= 0x80;
2299 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3U
, 0, operand
);
2302 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
);
2305 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
);
2308 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
);
2311 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
);
2314 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
+1);
2317 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
+1);
2320 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
+1);
2323 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
+1);
2328 insert4 (output
, BFD_RELOC_SH_DISP20
, 0, operand
);
2331 insert4 (output
, BFD_RELOC_SH_DISP20BY8
, 0, operand
);
2334 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
2337 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
2340 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
2343 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
2346 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
2349 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
2352 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
2355 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
2358 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
2361 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
2364 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
2367 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
2370 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
,
2371 operand
->type
!= A_DISP_PC_ABS
, operand
);
2374 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
,
2375 operand
->type
!= A_DISP_PC_ABS
, operand
);
2378 output
= insert_loop_bounds (output
, operand
);
2379 nbuf
[index
] = opcode
->nibbles
[3];
2383 printf (_("failed for %d\n"), i
);
2387 if (!target_big_endian
)
2389 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
2390 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
2394 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
2395 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
2397 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2399 if (!target_big_endian
)
2401 output
[3] = (nbuf
[4] << 4) | (nbuf
[5]);
2402 output
[2] = (nbuf
[6] << 4) | (nbuf
[7]);
2406 output
[2] = (nbuf
[4] << 4) | (nbuf
[5]);
2407 output
[3] = (nbuf
[6] << 4) | (nbuf
[7]);
2413 /* Find an opcode at the start of *STR_P in the hash table, and set
2414 *STR_P to the first character after the last one read. */
2416 static sh_opcode_info
*
2417 find_cooked_opcode (char **str_p
)
2420 unsigned char *op_start
;
2421 unsigned char *op_end
;
2425 /* Drop leading whitespace. */
2429 /* Find the op code end.
2430 The pre-processor will eliminate whitespace in front of
2431 any '@' after the first argument; we may be called from
2432 assemble_ppi, so the opcode might be terminated by an '@'. */
2433 for (op_start
= op_end
= (unsigned char *) str
;
2436 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
2439 unsigned char c
= op_start
[nlen
];
2441 /* The machine independent code will convert CMP/EQ into cmp/EQ
2442 because it thinks the '/' is the end of the symbol. Moreover,
2443 all but the first sub-insn is a parallel processing insn won't
2444 be capitalized. Instead of hacking up the machine independent
2445 code, we just deal with it here. */
2452 *str_p
= (char *) op_end
;
2455 as_bad (_("can't find opcode "));
2457 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
2460 /* Assemble a parallel processing insn. */
2461 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2464 assemble_ppi (char *op_end
, sh_opcode_info
*opcode
)
2476 sh_operand_info operand
[3];
2478 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2479 Make sure we encode a defined insn pattern. */
2484 if (opcode
->arg
[0] != A_END
)
2485 op_end
= get_operands (opcode
, op_end
, operand
);
2487 opcode
= get_specific (opcode
, operand
);
2490 /* Couldn't find an opcode which matched the operands. */
2491 char *where
= frag_more (2);
2496 as_bad (_("invalid operands for opcode"));
2500 if (opcode
->nibbles
[0] != PPI
)
2501 as_bad (_("insn can't be combined with parallel processing insn"));
2503 switch (opcode
->nibbles
[1])
2508 as_bad (_("multiple movx specifications"));
2513 as_bad (_("multiple movy specifications"));
2519 as_bad (_("multiple movx specifications"));
2520 if ((reg_n
< 4 || reg_n
> 5)
2521 && (reg_n
< 0 || reg_n
> 1))
2522 as_bad (_("invalid movx address register"));
2523 if (movy
&& movy
!= DDT_BASE
)
2524 as_bad (_("insn cannot be combined with non-nopy"));
2525 movx
= ((((reg_n
& 1) != 0) << 9)
2526 + (((reg_n
& 4) == 0) << 8)
2528 + (opcode
->nibbles
[2] << 4)
2529 + opcode
->nibbles
[3]
2535 as_bad (_("multiple movy specifications"));
2536 if ((reg_n
< 6 || reg_n
> 7)
2537 && (reg_n
< 2 || reg_n
> 3))
2538 as_bad (_("invalid movy address register"));
2539 if (movx
&& movx
!= DDT_BASE
)
2540 as_bad (_("insn cannot be combined with non-nopx"));
2541 movy
= ((((reg_n
& 1) != 0) << 8)
2542 + (((reg_n
& 4) == 0) << 9)
2544 + (opcode
->nibbles
[2] << 4)
2545 + opcode
->nibbles
[3]
2551 as_bad (_("multiple movx specifications"));
2553 as_bad (_("previous movy requires nopx"));
2554 if (reg_n
< 4 || reg_n
> 5)
2555 as_bad (_("invalid movx address register"));
2556 if (opcode
->nibbles
[2] & 8)
2558 if (reg_m
== A_A1_NUM
)
2560 else if (reg_m
!= A_A0_NUM
)
2561 as_bad (_("invalid movx dsp register"));
2566 as_bad (_("invalid movx dsp register"));
2569 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
2574 as_bad (_("multiple movy specifications"));
2576 as_bad (_("previous movx requires nopy"));
2577 if (opcode
->nibbles
[2] & 8)
2579 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2582 if (reg_m
== A_A1_NUM
)
2584 else if (reg_m
!= A_A0_NUM
)
2585 as_bad (_("invalid movy dsp register"));
2590 as_bad (_("invalid movy dsp register"));
2593 if (reg_n
< 6 || reg_n
> 7)
2594 as_bad (_("invalid movy address register"));
2595 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
2599 if (operand
[0].immediate
.X_op
!= O_constant
)
2600 as_bad (_("dsp immediate shift value not constant"));
2601 field_b
= ((opcode
->nibbles
[2] << 12)
2602 | (operand
[0].immediate
.X_add_number
& 127) << 4
2609 goto try_another_opcode
;
2614 as_bad (_("multiple parallel processing specifications"));
2615 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2616 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2617 switch (opcode
->nibbles
[4])
2625 field_b
+= opcode
->nibbles
[4] << 4;
2633 as_bad (_("multiple condition specifications"));
2634 cond
= opcode
->nibbles
[2] << 8;
2636 goto skip_cond_check
;
2640 as_bad (_("multiple parallel processing specifications"));
2641 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2642 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2644 switch (opcode
->nibbles
[4])
2652 field_b
+= opcode
->nibbles
[4] << 4;
2661 if ((field_b
& 0xef00) == 0xa100)
2663 /* pclr Dz pmuls Se,Sf,Dg */
2664 else if ((field_b
& 0xff00) == 0x8d00
2665 && (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh4al_dsp_up
)))
2667 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, arch_sh4al_dsp_up
);
2671 as_bad (_("insn cannot be combined with pmuls"));
2672 switch (field_b
& 0xf)
2675 field_b
+= 0 - A_X0_NUM
;
2678 field_b
+= 1 - A_Y0_NUM
;
2681 field_b
+= 2 - A_A0_NUM
;
2684 field_b
+= 3 - A_A1_NUM
;
2687 as_bad (_("bad combined pmuls output operand"));
2689 /* Generate warning if the destination register for padd / psub
2690 and pmuls is the same ( only for A0 or A1 ).
2691 If the last nibble is 1010 then A0 is used in both
2692 padd / psub and pmuls. If it is 1111 then A1 is used
2693 as destination register in both padd / psub and pmuls. */
2695 if ((((field_b
| reg_efg
) & 0x000F) == 0x000A)
2696 || (((field_b
| reg_efg
) & 0x000F) == 0x000F))
2697 as_warn (_("destination register is same for parallel insns"));
2699 field_b
+= 0x4000 + reg_efg
;
2706 as_bad (_("condition not followed by conditionalizable insn"));
2712 opcode
= find_cooked_opcode (&op_end
);
2716 (_("unrecognized characters at end of parallel processing insn")));
2721 move_code
= movx
| movy
;
2724 /* Parallel processing insn. */
2725 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
2727 output
= frag_more (4);
2729 if (! target_big_endian
)
2731 output
[3] = ppi_code
>> 8;
2732 output
[2] = ppi_code
;
2736 output
[2] = ppi_code
>> 8;
2737 output
[3] = ppi_code
;
2739 move_code
|= 0xf800;
2743 /* Just a double data transfer. */
2744 output
= frag_more (2);
2747 if (! target_big_endian
)
2749 output
[1] = move_code
>> 8;
2750 output
[0] = move_code
;
2754 output
[0] = move_code
>> 8;
2755 output
[1] = move_code
;
2760 /* This is the guts of the machine-dependent assembler. STR points to a
2761 machine dependent instruction. This function is supposed to emit
2762 the frags/bytes it assembles to. */
2765 md_assemble (char *str
)
2768 sh_operand_info operand
[3];
2769 sh_opcode_info
*opcode
;
2770 unsigned int size
= 0;
2771 char *initial_str
= str
;
2774 if (sh64_isa_mode
== sh64_isa_shmedia
)
2776 shmedia_md_assemble (str
);
2781 /* If we've seen pseudo-directives, make sure any emitted data or
2782 frags are marked as data. */
2785 sh64_update_contents_mark (TRUE
);
2786 sh64_set_contents_type (CRT_SH5_ISA16
);
2791 #endif /* HAVE_SH64 */
2793 opcode
= find_cooked_opcode (&str
);
2798 /* The opcode is not in the hash table.
2799 This means we definitely have an assembly failure,
2800 but the instruction may be valid in another CPU variant.
2801 In this case emit something better than 'unknown opcode'.
2802 Search the full table in sh-opc.h to check. */
2804 char *name
= initial_str
;
2805 int name_length
= 0;
2806 const sh_opcode_info
*op
;
2809 /* identify opcode in string */
2810 while (ISSPACE (*name
))
2814 while (!ISSPACE (name
[name_length
]))
2819 /* search for opcode in full list */
2820 for (op
= sh_table
; op
->name
; op
++)
2822 if (strncasecmp (op
->name
, name
, name_length
) == 0
2823 && op
->name
[name_length
] == '\0')
2832 as_bad (_("opcode not valid for this cpu variant"));
2836 as_bad (_("unknown opcode"));
2842 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2844 /* Output a CODE reloc to tell the linker that the following
2845 bytes are instructions, not data. */
2846 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2848 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
2851 if (opcode
->nibbles
[0] == PPI
)
2853 size
= assemble_ppi (op_end
, opcode
);
2857 if (opcode
->arg
[0] == A_BDISP12
2858 || opcode
->arg
[0] == A_BDISP8
)
2860 /* Since we skip get_specific here, we have to check & update
2862 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, opcode
->arch
))
2863 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, opcode
->arch
);
2865 as_bad (_("Delayed branches not available on SH1"));
2866 parse_exp (op_end
+ 1, &operand
[0]);
2867 build_relax (opcode
, &operand
[0]);
2871 if (opcode
->arg
[0] == A_END
)
2873 /* Ignore trailing whitespace. If there is any, it has already
2874 been compressed to a single space. */
2880 op_end
= get_operands (opcode
, op_end
, operand
);
2882 opcode
= get_specific (opcode
, operand
);
2886 /* Couldn't find an opcode which matched the operands. */
2887 char *where
= frag_more (2);
2892 as_bad (_("invalid operands for opcode"));
2897 as_bad (_("excess operands: '%s'"), op_end
);
2899 size
= build_Mytes (opcode
, operand
);
2904 dwarf2_emit_insn (size
);
2907 /* This routine is called each time a label definition is seen. It
2908 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
2911 sh_frob_label (symbolS
*sym
)
2913 static fragS
*last_label_frag
;
2914 static int last_label_offset
;
2917 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2921 offset
= frag_now_fix ();
2922 if (frag_now
!= last_label_frag
2923 || offset
!= last_label_offset
)
2925 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
2926 last_label_frag
= frag_now
;
2927 last_label_offset
= offset
;
2931 dwarf2_emit_label (sym
);
2934 /* This routine is called when the assembler is about to output some
2935 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
2938 sh_flush_pending_output (void)
2941 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2943 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2945 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
2950 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
2955 /* Various routines to kill one day. */
2956 /* Equal to MAX_PRECISION in atof-ieee.c. */
2957 #define MAX_LITTLENUMS 6
2959 /* Turn a string in input_line_pointer into a floating point constant
2960 of type TYPE, and store the appropriate bytes in *LITP. The number
2961 of LITTLENUMS emitted is stored in *SIZEP . An error message is
2962 returned, or NULL on OK. */
2965 md_atof (int type
, char *litP
, int *sizeP
)
2968 LITTLENUM_TYPE words
[4];
2984 return _("bad call to md_atof");
2987 t
= atof_ieee (input_line_pointer
, type
, words
);
2989 input_line_pointer
= t
;
2993 if (! target_big_endian
)
2995 for (i
= prec
- 1; i
>= 0; i
--)
2997 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
3003 for (i
= 0; i
< prec
; i
++)
3005 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
3013 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
3014 call instruction. It refers to a label of the instruction which
3015 loads the register which the call uses. We use it to generate a
3016 special reloc for the linker. */
3019 s_uses (int ignore ATTRIBUTE_UNUSED
)
3024 as_warn (_(".uses pseudo-op seen when not relaxing"));
3028 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
3030 as_bad (_("bad .uses format"));
3031 ignore_rest_of_line ();
3035 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
3037 demand_empty_rest_of_line ();
3042 OPTION_RELAX
= OPTION_MD_BASE
,
3049 OPTION_ALLOW_REG_PREFIX
,
3053 OPTION_SHCOMPACT_CONST_CRANGE
,
3057 OPTION_DUMMY
/* Not used. This is just here to make it easy to add and subtract options from this enum. */
3060 const char *md_shortopts
= "";
3061 struct option md_longopts
[] =
3063 {"relax", no_argument
, NULL
, OPTION_RELAX
},
3064 {"big", no_argument
, NULL
, OPTION_BIG
},
3065 {"little", no_argument
, NULL
, OPTION_LITTLE
},
3066 {"small", no_argument
, NULL
, OPTION_SMALL
},
3067 {"dsp", no_argument
, NULL
, OPTION_DSP
},
3068 {"isa", required_argument
, NULL
, OPTION_ISA
},
3069 {"renesas", no_argument
, NULL
, OPTION_RENESAS
},
3070 {"allow-reg-prefix", no_argument
, NULL
, OPTION_ALLOW_REG_PREFIX
},
3073 {"abi", required_argument
, NULL
, OPTION_ABI
},
3074 {"no-mix", no_argument
, NULL
, OPTION_NO_MIX
},
3075 {"shcompact-const-crange", no_argument
, NULL
, OPTION_SHCOMPACT_CONST_CRANGE
},
3076 {"no-expand", no_argument
, NULL
, OPTION_NO_EXPAND
},
3077 {"expand-pt32", no_argument
, NULL
, OPTION_PT32
},
3078 #endif /* HAVE_SH64 */
3080 {NULL
, no_argument
, NULL
, 0}
3082 size_t md_longopts_size
= sizeof (md_longopts
);
3085 md_parse_option (int c
, char *arg ATTRIBUTE_UNUSED
)
3094 target_big_endian
= 1;
3098 target_big_endian
= 0;
3106 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
3109 case OPTION_RENESAS
:
3110 dont_adjust_reloc_32
= 1;
3113 case OPTION_ALLOW_REG_PREFIX
:
3114 allow_dollar_register_prefix
= 1;
3118 if (strcasecmp (arg
, "dsp") == 0)
3119 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
3120 else if (strcasecmp (arg
, "fp") == 0)
3121 preset_target_arch
= arch_sh_up
& ~arch_sh_has_dsp
;
3122 else if (strcasecmp (arg
, "any") == 0)
3123 preset_target_arch
= arch_sh_up
;
3125 else if (strcasecmp (arg
, "shmedia") == 0)
3127 if (sh64_isa_mode
== sh64_isa_shcompact
)
3128 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
3129 sh64_isa_mode
= sh64_isa_shmedia
;
3131 else if (strcasecmp (arg
, "shcompact") == 0)
3133 if (sh64_isa_mode
== sh64_isa_shmedia
)
3134 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
3135 if (sh64_abi
== sh64_abi_64
)
3136 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
3137 sh64_isa_mode
= sh64_isa_shcompact
;
3139 #endif /* HAVE_SH64 */
3142 extern const bfd_arch_info_type bfd_sh_arch
;
3143 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
3145 preset_target_arch
= 0;
3146 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
3148 int len
= strlen(bfd_arch
->printable_name
);
3150 if (bfd_arch
->mach
== bfd_mach_sh5
)
3153 if (strncasecmp (bfd_arch
->printable_name
, arg
, len
) != 0)
3156 if (arg
[len
] == '\0')
3157 preset_target_arch
=
3158 sh_get_arch_from_bfd_mach (bfd_arch
->mach
);
3159 else if (strcasecmp(&arg
[len
], "-up") == 0)
3160 preset_target_arch
=
3161 sh_get_arch_up_from_bfd_mach (bfd_arch
->mach
);
3167 if (!preset_target_arch
)
3168 as_bad ("Invalid argument to --isa option: %s", arg
);
3174 if (strcmp (arg
, "32") == 0)
3176 if (sh64_abi
== sh64_abi_64
)
3177 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
3178 sh64_abi
= sh64_abi_32
;
3180 else if (strcmp (arg
, "64") == 0)
3182 if (sh64_abi
== sh64_abi_32
)
3183 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
3184 if (sh64_isa_mode
== sh64_isa_shcompact
)
3185 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
3186 sh64_abi
= sh64_abi_64
;
3189 as_bad ("Invalid argument to --abi option: %s", arg
);
3196 case OPTION_SHCOMPACT_CONST_CRANGE
:
3197 sh64_shcompact_const_crange
= TRUE
;
3200 case OPTION_NO_EXPAND
:
3201 sh64_expand
= FALSE
;
3207 #endif /* HAVE_SH64 */
3217 md_show_usage (FILE *stream
)
3219 fprintf (stream
, _("\
3221 --little generate little endian code\n\
3222 --big generate big endian code\n\
3223 --relax alter jump instructions for long displacements\n\
3224 --renesas disable optimization with section symbol for\n\
3225 compatibility with Renesas assembler.\n\
3226 --small align sections to 4 byte boundaries, not 16\n\
3227 --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
3228 --allow-reg-prefix allow '$' as a register name prefix.\n\
3229 --isa=[any use most appropriate isa\n\
3230 | dsp same as '-dsp'\n\
3233 extern const bfd_arch_info_type bfd_sh_arch
;
3234 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
3236 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
3237 if (bfd_arch
->mach
!= bfd_mach_sh5
)
3239 fprintf (stream
, "\n | %s", bfd_arch
->printable_name
);
3240 fprintf (stream
, "\n | %s-up", bfd_arch
->printable_name
);
3243 fprintf (stream
, "]\n");
3245 fprintf (stream
, _("\
3246 --isa=[shmedia set as the default instruction set for SH64\n\
3250 fprintf (stream
, _("\
3251 --abi=[32|64] set size of expanded SHmedia operands and object\n\
3253 --shcompact-const-crange emit code-range descriptors for constants in\n\
3254 SHcompact code sections\n\
3255 --no-mix disallow SHmedia code in the same section as\n\
3256 constants and SHcompact code\n\
3257 --no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
3258 --expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
3259 to 32 bits only\n"));
3260 #endif /* HAVE_SH64 */
3263 /* This struct is used to pass arguments to sh_count_relocs through
3264 bfd_map_over_sections. */
3266 struct sh_count_relocs
3268 /* Symbol we are looking for. */
3270 /* Count of relocs found. */
3274 /* Count the number of fixups in a section which refer to a particular
3275 symbol. This is called via bfd_map_over_sections. */
3278 sh_count_relocs (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, void *data
)
3280 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
3281 segment_info_type
*seginfo
;
3285 seginfo
= seg_info (sec
);
3286 if (seginfo
== NULL
)
3290 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3292 if (fix
->fx_addsy
== sym
)
3300 /* Handle the count relocs for a particular section.
3301 This is called via bfd_map_over_sections. */
3304 sh_frob_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
,
3305 void *ignore ATTRIBUTE_UNUSED
)
3307 segment_info_type
*seginfo
;
3310 seginfo
= seg_info (sec
);
3311 if (seginfo
== NULL
)
3314 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3319 struct sh_count_relocs info
;
3321 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
3324 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
3325 symbol in the same section. */
3326 sym
= fix
->fx_addsy
;
3328 || fix
->fx_subsy
!= NULL
3329 || fix
->fx_addnumber
!= 0
3330 || S_GET_SEGMENT (sym
) != sec
3331 || S_IS_EXTERNAL (sym
))
3333 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3334 _(".uses does not refer to a local symbol in the same section"));
3338 /* Look through the fixups again, this time looking for one
3339 at the same location as sym. */
3340 val
= S_GET_VALUE (sym
);
3341 for (fscan
= seginfo
->fix_root
;
3343 fscan
= fscan
->fx_next
)
3344 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
3345 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
3346 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
3347 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
3348 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
3352 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3353 _("can't find fixup pointed to by .uses"));
3357 if (fscan
->fx_tcbit
)
3359 /* We've already done this one. */
3363 /* The variable fscan should also be a fixup to a local symbol
3364 in the same section. */
3365 sym
= fscan
->fx_addsy
;
3367 || fscan
->fx_subsy
!= NULL
3368 || fscan
->fx_addnumber
!= 0
3369 || S_GET_SEGMENT (sym
) != sec
3370 || S_IS_EXTERNAL (sym
))
3372 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3373 _(".uses target does not refer to a local symbol in the same section"));
3377 /* Now we look through all the fixups of all the sections,
3378 counting the number of times we find a reference to sym. */
3381 bfd_map_over_sections (stdoutput
, sh_count_relocs
, &info
);
3386 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
3387 We have already adjusted the value of sym to include the
3388 fragment address, so we undo that adjustment here. */
3389 subseg_change (sec
, 0);
3390 fix_new (fscan
->fx_frag
,
3391 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
3392 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
3396 /* This function is called after the symbol table has been completed,
3397 but before the relocs or section contents have been written out.
3398 If we have seen any .uses pseudo-ops, they point to an instruction
3399 which loads a register with the address of a function. We look
3400 through the fixups to find where the function address is being
3401 loaded from. We then generate a COUNT reloc giving the number of
3402 times that function address is referred to. The linker uses this
3403 information when doing relaxing, to decide when it can eliminate
3404 the stored function address entirely. */
3410 shmedia_frob_file_before_adjust ();
3416 bfd_map_over_sections (stdoutput
, sh_frob_section
, NULL
);
3419 /* Called after relaxing. Set the correct sizes of the fragments, and
3420 create relocs so that md_apply_fix will fill in the correct values. */
3423 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
, segT seg
, fragS
*fragP
)
3427 switch (fragP
->fr_subtype
)
3429 case C (COND_JUMP
, COND8
):
3430 case C (COND_JUMP_DELAY
, COND8
):
3431 subseg_change (seg
, 0);
3432 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3433 1, BFD_RELOC_SH_PCDISP8BY2
);
3438 case C (UNCOND_JUMP
, UNCOND12
):
3439 subseg_change (seg
, 0);
3440 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3441 1, BFD_RELOC_SH_PCDISP12BY2
);
3446 case C (UNCOND_JUMP
, UNCOND32
):
3447 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3448 if (fragP
->fr_symbol
== NULL
)
3449 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3450 _("displacement overflows 12-bit field"));
3451 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3452 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3453 _("displacement to defined symbol %s overflows 12-bit field"),
3454 S_GET_NAME (fragP
->fr_symbol
));
3456 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3457 _("displacement to undefined symbol %s overflows 12-bit field"),
3458 S_GET_NAME (fragP
->fr_symbol
));
3459 /* Stabilize this frag, so we don't trip an assert. */
3460 fragP
->fr_fix
+= fragP
->fr_var
;
3464 case C (COND_JUMP
, COND12
):
3465 case C (COND_JUMP_DELAY
, COND12
):
3466 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
3467 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
3468 was due to gas incorrectly relaxing an out-of-range conditional
3469 branch with delay slot. It turned:
3470 bf.s L6 (slot mov.l r12,@(44,r0))
3473 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
3475 32: 10 cb mov.l r12,@(44,r0)
3476 Therefore, branches with delay slots have to be handled
3477 differently from ones without delay slots. */
3479 unsigned char *buffer
=
3480 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
3481 int highbyte
= target_big_endian
? 0 : 1;
3482 int lowbyte
= target_big_endian
? 1 : 0;
3483 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
3485 /* Toggle the true/false bit of the bcond. */
3486 buffer
[highbyte
] ^= 0x2;
3488 /* If this is a delayed branch, we may not put the bra in the
3489 slot. So we change it to a non-delayed branch, like that:
3490 b! cond slot_label; bra disp; slot_label: slot_insn
3491 ??? We should try if swapping the conditional branch and
3492 its delay-slot insn already makes the branch reach. */
3494 /* Build a relocation to six / four bytes farther on. */
3495 subseg_change (seg
, 0);
3496 fix_new (fragP
, fragP
->fr_fix
, 2, section_symbol (seg
),
3497 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
3498 1, BFD_RELOC_SH_PCDISP8BY2
);
3500 /* Set up a jump instruction. */
3501 buffer
[highbyte
+ 2] = 0xa0;
3502 buffer
[lowbyte
+ 2] = 0;
3503 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
3504 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
3508 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
3513 /* Fill in a NOP instruction. */
3514 buffer
[highbyte
+ 4] = 0x0;
3515 buffer
[lowbyte
+ 4] = 0x9;
3524 case C (COND_JUMP
, COND32
):
3525 case C (COND_JUMP_DELAY
, COND32
):
3526 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3527 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3528 if (fragP
->fr_symbol
== NULL
)
3529 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3530 _("displacement overflows 8-bit field"));
3531 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3532 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3533 _("displacement to defined symbol %s overflows 8-bit field"),
3534 S_GET_NAME (fragP
->fr_symbol
));
3536 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3537 _("displacement to undefined symbol %s overflows 8-bit field "),
3538 S_GET_NAME (fragP
->fr_symbol
));
3539 /* Stabilize this frag, so we don't trip an assert. */
3540 fragP
->fr_fix
+= fragP
->fr_var
;
3546 shmedia_md_convert_frag (headers
, seg
, fragP
, TRUE
);
3552 if (donerelax
&& !sh_relax
)
3553 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3554 _("overflow in branch to %s; converted into longer instruction sequence"),
3555 (fragP
->fr_symbol
!= NULL
3556 ? S_GET_NAME (fragP
->fr_symbol
)
3561 md_section_align (segT seg ATTRIBUTE_UNUSED
, valueT size
)
3565 #else /* ! OBJ_ELF */
3566 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
3567 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
3568 #endif /* ! OBJ_ELF */
3571 /* This static variable is set by s_uacons to tell sh_cons_align that
3572 the expression does not need to be aligned. */
3574 static int sh_no_align_cons
= 0;
3576 /* This handles the unaligned space allocation pseudo-ops, such as
3577 .uaword. .uaword is just like .word, but the value does not need
3581 s_uacons (int bytes
)
3583 /* Tell sh_cons_align not to align this value. */
3584 sh_no_align_cons
= 1;
3588 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3589 aligned correctly. Note that this can cause warnings to be issued
3590 when assembling initialized structured which were declared with the
3591 packed attribute. FIXME: Perhaps we should require an option to
3592 enable this warning? */
3595 sh_cons_align (int nbytes
)
3600 if (sh_no_align_cons
)
3602 /* This is an unaligned pseudo-op. */
3603 sh_no_align_cons
= 0;
3608 while ((nbytes
& 1) == 0)
3617 if (now_seg
== absolute_section
)
3619 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
3620 as_warn (_("misaligned data"));
3624 p
= frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
3625 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
3627 record_alignment (now_seg
, nalign
);
3630 /* When relaxing, we need to output a reloc for any .align directive
3631 that requests alignment to a four byte boundary or larger. This is
3632 also where we check for misaligned data. */
3635 sh_handle_align (fragS
*frag
)
3637 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
3639 if (frag
->fr_type
== rs_align_code
)
3641 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
3642 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
3644 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
3653 if (target_big_endian
)
3655 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
3656 frag
->fr_var
= sizeof big_nop_pattern
;
3660 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
3661 frag
->fr_var
= sizeof little_nop_pattern
;
3664 else if (frag
->fr_type
== rs_align_test
)
3667 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
3671 && (frag
->fr_type
== rs_align
3672 || frag
->fr_type
== rs_align_code
)
3673 && frag
->fr_address
+ frag
->fr_fix
> 0
3674 && frag
->fr_offset
> 1
3675 && now_seg
!= bss_section
)
3676 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
3677 BFD_RELOC_SH_ALIGN
);
3680 /* See whether the relocation should be resolved locally. */
3683 sh_local_pcrel (fixS
*fix
)
3686 && (fix
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
3687 || fix
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
3688 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
3689 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
3690 || fix
->fx_r_type
== BFD_RELOC_8_PCREL
3691 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH16
3692 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH32
));
3695 /* See whether we need to force a relocation into the output file.
3696 This is used to force out switch and PC relative relocations when
3700 sh_force_relocation (fixS
*fix
)
3702 /* These relocations can't make it into a DSO, so no use forcing
3703 them for global symbols. */
3704 if (sh_local_pcrel (fix
))
3707 /* Make sure some relocations get emitted. */
3708 if (fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
3709 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
3710 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_GD_32
3711 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LD_32
3712 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_IE_32
3713 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LDO_32
3714 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LE_32
3715 || generic_force_reloc (fix
))
3721 return (fix
->fx_pcrel
3722 || SWITCH_TABLE (fix
)
3723 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
3724 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
3725 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
3726 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3728 || fix
->fx_r_type
== BFD_RELOC_SH_SHMEDIA_CODE
3730 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
3735 sh_fix_adjustable (fixS
*fixP
)
3737 if (fixP
->fx_r_type
== BFD_RELOC_32_PLT_PCREL
3738 || fixP
->fx_r_type
== BFD_RELOC_32_GOT_PCREL
3739 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTPC
3740 || ((fixP
->fx_r_type
== BFD_RELOC_32
) && dont_adjust_reloc_32
)
3741 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
3744 /* We need the symbol name for the VTABLE entries */
3745 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
3746 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
3753 sh_elf_final_processing (void)
3757 /* Set file-specific flags to indicate if this code needs
3758 a processor with the sh-dsp / sh2e ISA to execute. */
3760 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3761 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3762 if (sh64_isa_mode
!= sh64_isa_unspecified
)
3765 #elif defined TARGET_SYMBIAN
3768 extern int sh_symbian_find_elf_flags (unsigned int);
3770 val
= sh_symbian_find_elf_flags (valid_arch
);
3773 #endif /* HAVE_SH64 */
3774 val
= sh_find_elf_flags (valid_arch
);
3776 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
3777 elf_elfheader (stdoutput
)->e_flags
|= val
;
3781 /* Apply a fixup to the object file. */
3784 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3786 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3787 int lowbyte
= target_big_endian
? 1 : 0;
3788 int highbyte
= target_big_endian
? 0 : 1;
3789 long val
= (long) *valP
;
3793 /* A difference between two symbols, the second of which is in the
3794 current section, is transformed in a PC-relative relocation to
3795 the other symbol. We have to adjust the relocation type here. */
3798 switch (fixP
->fx_r_type
)
3804 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3807 /* Currently, we only support 32-bit PCREL relocations.
3808 We'd need a new reloc type to handle 16_PCREL, and
3809 8_PCREL is already taken for R_SH_SWITCH8, which
3810 apparently does something completely different than what
3813 bfd_set_error (bfd_error_bad_value
);
3817 bfd_set_error (bfd_error_bad_value
);
3822 /* The function adjust_reloc_syms won't convert a reloc against a weak
3823 symbol into a reloc against a section, but bfd_install_relocation
3824 will screw up if the symbol is defined, so we have to adjust val here
3825 to avoid the screw up later.
3827 For ordinary relocs, this does not happen for ELF, since for ELF,
3828 bfd_install_relocation uses the "special function" field of the
3829 howto, and does not execute the code that needs to be undone, as long
3830 as the special function does not return bfd_reloc_continue.
3831 It can happen for GOT- and PLT-type relocs the way they are
3832 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
3833 doesn't matter here since those relocs don't use VAL; see below. */
3834 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
3835 && fixP
->fx_addsy
!= NULL
3836 && S_IS_WEAK (fixP
->fx_addsy
))
3837 val
-= S_GET_VALUE (fixP
->fx_addsy
);
3839 if (SWITCH_TABLE (fixP
))
3840 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3844 switch (fixP
->fx_r_type
)
3846 case BFD_RELOC_SH_IMM3
:
3848 * buf
= (* buf
& 0xf8) | (val
& 0x7);
3850 case BFD_RELOC_SH_IMM3U
:
3852 * buf
= (* buf
& 0x8f) | ((val
& 0x7) << 4);
3854 case BFD_RELOC_SH_DISP12
:
3856 buf
[lowbyte
] = val
& 0xff;
3857 buf
[highbyte
] |= (val
>> 8) & 0x0f;
3859 case BFD_RELOC_SH_DISP12BY2
:
3862 buf
[lowbyte
] = (val
>> 1) & 0xff;
3863 buf
[highbyte
] |= (val
>> 9) & 0x0f;
3865 case BFD_RELOC_SH_DISP12BY4
:
3868 buf
[lowbyte
] = (val
>> 2) & 0xff;
3869 buf
[highbyte
] |= (val
>> 10) & 0x0f;
3871 case BFD_RELOC_SH_DISP12BY8
:
3874 buf
[lowbyte
] = (val
>> 3) & 0xff;
3875 buf
[highbyte
] |= (val
>> 11) & 0x0f;
3877 case BFD_RELOC_SH_DISP20
:
3878 if (! target_big_endian
)
3882 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 12) & 0xf0);
3883 buf
[2] = (val
>> 8) & 0xff;
3884 buf
[3] = val
& 0xff;
3886 case BFD_RELOC_SH_DISP20BY8
:
3887 if (!target_big_endian
)
3892 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 20) & 0xf0);
3893 buf
[2] = (val
>> 16) & 0xff;
3894 buf
[3] = (val
>> 8) & 0xff;
3897 case BFD_RELOC_SH_IMM4
:
3899 *buf
= (*buf
& 0xf0) | (val
& 0xf);
3902 case BFD_RELOC_SH_IMM4BY2
:
3905 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
3908 case BFD_RELOC_SH_IMM4BY4
:
3911 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
3914 case BFD_RELOC_SH_IMM8BY2
:
3920 case BFD_RELOC_SH_IMM8BY4
:
3927 case BFD_RELOC_SH_IMM8
:
3928 /* Sometimes the 8 bit value is sign extended (e.g., add) and
3929 sometimes it is not (e.g., and). We permit any 8 bit value.
3930 Note that adding further restrictions may invalidate
3931 reasonable looking assembly code, such as ``and -0x1,r0''. */
3937 case BFD_RELOC_SH_PCRELIMM8BY4
:
3938 /* The lower two bits of the PC are cleared before the
3939 displacement is added in. We can assume that the destination
3940 is on a 4 byte boundary. If this instruction is also on a 4
3941 byte boundary, then we want
3943 and target - here is a multiple of 4.
3944 Otherwise, we are on a 2 byte boundary, and we want
3945 (target - (here - 2)) / 4
3946 and target - here is not a multiple of 4. Computing
3947 (target - (here - 2)) / 4 == (target - here + 2) / 4
3948 works for both cases, since in the first case the addition of
3949 2 will be removed by the division. target - here is in the
3951 val
= (val
+ 2) / 4;
3953 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3957 case BFD_RELOC_SH_PCRELIMM8BY2
:
3960 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3964 case BFD_RELOC_SH_PCDISP8BY2
:
3966 if (val
< -0x80 || val
> 0x7f)
3967 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3971 case BFD_RELOC_SH_PCDISP12BY2
:
3973 if (val
< -0x800 || val
> 0x7ff)
3974 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3975 buf
[lowbyte
] = val
& 0xff;
3976 buf
[highbyte
] |= (val
>> 8) & 0xf;
3980 case BFD_RELOC_32_PCREL
:
3981 md_number_to_chars (buf
, val
, 4);
3985 md_number_to_chars (buf
, val
, 2);
3988 case BFD_RELOC_SH_USES
:
3989 /* Pass the value into sh_reloc(). */
3990 fixP
->fx_addnumber
= val
;
3993 case BFD_RELOC_SH_COUNT
:
3994 case BFD_RELOC_SH_ALIGN
:
3995 case BFD_RELOC_SH_CODE
:
3996 case BFD_RELOC_SH_DATA
:
3997 case BFD_RELOC_SH_LABEL
:
3998 /* Nothing to do here. */
4001 case BFD_RELOC_SH_LOOP_START
:
4002 case BFD_RELOC_SH_LOOP_END
:
4004 case BFD_RELOC_VTABLE_INHERIT
:
4005 case BFD_RELOC_VTABLE_ENTRY
:
4010 case BFD_RELOC_32_PLT_PCREL
:
4011 /* Make the jump instruction point to the address of the operand. At
4012 runtime we merely add the offset to the actual PLT entry. */
4013 * valP
= 0xfffffffc;
4014 val
= fixP
->fx_offset
;
4016 val
-= S_GET_VALUE (fixP
->fx_subsy
);
4017 fixP
->fx_addnumber
= val
;
4018 md_number_to_chars (buf
, val
, 4);
4021 case BFD_RELOC_SH_GOTPC
:
4022 /* This is tough to explain. We end up with this one if we have
4023 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
4024 The goal here is to obtain the absolute address of the GOT,
4025 and it is strongly preferable from a performance point of
4026 view to avoid using a runtime relocation for this. There are
4027 cases where you have something like:
4029 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
4031 and here no correction would be required. Internally in the
4032 assembler we treat operands of this form as not being pcrel
4033 since the '.' is explicitly mentioned, and I wonder whether
4034 it would simplify matters to do it this way. Who knows. In
4035 earlier versions of the PIC patches, the pcrel_adjust field
4036 was used to store the correction, but since the expression is
4037 not pcrel, I felt it would be confusing to do it this way. */
4039 md_number_to_chars (buf
, val
, 4);
4042 case BFD_RELOC_SH_TLS_GD_32
:
4043 case BFD_RELOC_SH_TLS_LD_32
:
4044 case BFD_RELOC_SH_TLS_IE_32
:
4045 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
4047 case BFD_RELOC_32_GOT_PCREL
:
4048 case BFD_RELOC_SH_GOTPLT32
:
4049 * valP
= 0; /* Fully resolved at runtime. No addend. */
4050 md_number_to_chars (buf
, 0, 4);
4053 case BFD_RELOC_SH_TLS_LDO_32
:
4054 case BFD_RELOC_SH_TLS_LE_32
:
4055 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
4057 case BFD_RELOC_32_GOTOFF
:
4058 md_number_to_chars (buf
, val
, 4);
4064 shmedia_md_apply_fix (fixP
, valP
);
4073 if ((val
& ((1 << shift
) - 1)) != 0)
4074 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
4078 val
= ((val
>> shift
)
4079 | ((long) -1 & ~ ((long) -1 >> shift
)));
4081 if (max
!= 0 && (val
< min
|| val
> max
))
4082 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
4084 /* Stop the generic code from trying to overlow check the value as well.
4085 It may not have the correct value anyway, as we do not store val back
4087 fixP
->fx_no_overflow
= 1;
4089 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
4093 /* Called just before address relaxation. Return the length
4094 by which a fragment must grow to reach it's destination. */
4097 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
4101 switch (fragP
->fr_subtype
)
4105 return shmedia_md_estimate_size_before_relax (fragP
, segment_type
);
4111 case C (UNCOND_JUMP
, UNDEF_DISP
):
4112 /* Used to be a branch to somewhere which was unknown. */
4113 if (!fragP
->fr_symbol
)
4115 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
4117 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
4119 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
4123 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
4127 case C (COND_JUMP
, UNDEF_DISP
):
4128 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
4129 what
= GET_WHAT (fragP
->fr_subtype
);
4130 /* Used to be a branch to somewhere which was unknown. */
4131 if (fragP
->fr_symbol
4132 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
4134 /* Got a symbol and it's defined in this segment, become byte
4135 sized - maybe it will fix up. */
4136 fragP
->fr_subtype
= C (what
, COND8
);
4138 else if (fragP
->fr_symbol
)
4140 /* Its got a segment, but its not ours, so it will always be long. */
4141 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
4145 /* We know the abs value. */
4146 fragP
->fr_subtype
= C (what
, COND8
);
4150 case C (UNCOND_JUMP
, UNCOND12
):
4151 case C (UNCOND_JUMP
, UNCOND32
):
4152 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
4153 case C (COND_JUMP
, COND8
):
4154 case C (COND_JUMP
, COND12
):
4155 case C (COND_JUMP
, COND32
):
4156 case C (COND_JUMP
, UNDEF_WORD_DISP
):
4157 case C (COND_JUMP_DELAY
, COND8
):
4158 case C (COND_JUMP_DELAY
, COND12
):
4159 case C (COND_JUMP_DELAY
, COND32
):
4160 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
4161 /* When relaxing a section for the second time, we don't need to
4162 do anything besides return the current size. */
4166 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
4167 return fragP
->fr_var
;
4170 /* Put number into target byte order. */
4173 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
4176 /* We might need to set the contents type to data. */
4177 sh64_flag_output ();
4180 if (! target_big_endian
)
4181 number_to_chars_littleendian (ptr
, use
, nbytes
);
4183 number_to_chars_bigendian (ptr
, use
, nbytes
);
4186 /* This version is used in obj-coff.c eg. for the sh-hms target. */
4189 md_pcrel_from (fixS
*fixP
)
4191 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
4195 md_pcrel_from_section (fixS
*fixP
, segT sec
)
4197 if (! sh_local_pcrel (fixP
)
4198 && fixP
->fx_addsy
!= (symbolS
*) NULL
4199 && (generic_force_reloc (fixP
)
4200 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
4202 /* The symbol is undefined (or is defined but not in this section,
4203 or we're not sure about it being the final definition). Let the
4204 linker figure it out. We need to adjust the subtraction of a
4205 symbol to the position of the relocated data, though. */
4206 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
4209 return md_pcrel_from (fixP
);
4212 /* Create a reloc. */
4215 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
4218 bfd_reloc_code_real_type r_type
;
4220 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4221 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4222 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4223 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4225 r_type
= fixp
->fx_r_type
;
4227 if (SWITCH_TABLE (fixp
))
4229 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
4231 if (r_type
== BFD_RELOC_16
)
4232 r_type
= BFD_RELOC_SH_SWITCH16
;
4233 else if (r_type
== BFD_RELOC_8
)
4234 r_type
= BFD_RELOC_8_PCREL
;
4235 else if (r_type
== BFD_RELOC_32
)
4236 r_type
= BFD_RELOC_SH_SWITCH32
;
4240 else if (r_type
== BFD_RELOC_SH_USES
)
4241 rel
->addend
= fixp
->fx_addnumber
;
4242 else if (r_type
== BFD_RELOC_SH_COUNT
)
4243 rel
->addend
= fixp
->fx_offset
;
4244 else if (r_type
== BFD_RELOC_SH_ALIGN
)
4245 rel
->addend
= fixp
->fx_offset
;
4246 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
4247 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
4248 rel
->addend
= fixp
->fx_offset
;
4249 else if (r_type
== BFD_RELOC_SH_LOOP_START
4250 || r_type
== BFD_RELOC_SH_LOOP_END
)
4251 rel
->addend
= fixp
->fx_offset
;
4252 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
4255 rel
->address
= rel
->addend
= fixp
->fx_offset
;
4258 else if (shmedia_init_reloc (rel
, fixp
))
4261 else if (fixp
->fx_pcrel
)
4262 rel
->addend
= fixp
->fx_addnumber
;
4263 else if (r_type
== BFD_RELOC_32
|| r_type
== BFD_RELOC_32_GOTOFF
)
4264 rel
->addend
= fixp
->fx_addnumber
;
4268 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
4270 if (rel
->howto
== NULL
)
4272 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4273 _("Cannot represent relocation type %s"),
4274 bfd_get_reloc_code_name (r_type
));
4275 /* Set howto to a garbage value so that we can keep going. */
4276 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4277 assert (rel
->howto
!= NULL
);
4280 else if (rel
->howto
->type
== R_SH_IND12W
)
4281 rel
->addend
+= fixp
->fx_offset
- 4;
4288 inline static char *
4289 sh_end_of_match (char *cont
, char *what
)
4291 int len
= strlen (what
);
4293 if (strncasecmp (cont
, what
, strlen (what
)) == 0
4294 && ! is_part_of_name (cont
[len
]))
4301 sh_parse_name (char const *name
,
4303 enum expr_mode mode
,
4306 char *next
= input_line_pointer
;
4311 exprP
->X_op_symbol
= NULL
;
4313 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4316 GOT_symbol
= symbol_find_or_make (name
);
4318 exprP
->X_add_symbol
= GOT_symbol
;
4320 /* If we have an absolute symbol or a reg, then we know its
4322 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
4323 if (mode
!= expr_defer
&& segment
== absolute_section
)
4325 exprP
->X_op
= O_constant
;
4326 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4327 exprP
->X_add_symbol
= NULL
;
4329 else if (mode
!= expr_defer
&& segment
== reg_section
)
4331 exprP
->X_op
= O_register
;
4332 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4333 exprP
->X_add_symbol
= NULL
;
4337 exprP
->X_op
= O_symbol
;
4338 exprP
->X_add_number
= 0;
4344 exprP
->X_add_symbol
= symbol_find_or_make (name
);
4346 if (*nextcharP
!= '@')
4348 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFF")))
4349 reloc_type
= BFD_RELOC_32_GOTOFF
;
4350 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTPLT")))
4351 reloc_type
= BFD_RELOC_SH_GOTPLT32
;
4352 else if ((next_end
= sh_end_of_match (next
+ 1, "GOT")))
4353 reloc_type
= BFD_RELOC_32_GOT_PCREL
;
4354 else if ((next_end
= sh_end_of_match (next
+ 1, "PLT")))
4355 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
4356 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSGD")))
4357 reloc_type
= BFD_RELOC_SH_TLS_GD_32
;
4358 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSLDM")))
4359 reloc_type
= BFD_RELOC_SH_TLS_LD_32
;
4360 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTTPOFF")))
4361 reloc_type
= BFD_RELOC_SH_TLS_IE_32
;
4362 else if ((next_end
= sh_end_of_match (next
+ 1, "TPOFF")))
4363 reloc_type
= BFD_RELOC_SH_TLS_LE_32
;
4364 else if ((next_end
= sh_end_of_match (next
+ 1, "DTPOFF")))
4365 reloc_type
= BFD_RELOC_SH_TLS_LDO_32
;
4369 *input_line_pointer
= *nextcharP
;
4370 input_line_pointer
= next_end
;
4371 *nextcharP
= *input_line_pointer
;
4372 *input_line_pointer
= '\0';
4374 exprP
->X_op
= O_PIC_reloc
;
4375 exprP
->X_add_number
= 0;
4376 exprP
->X_md
= reloc_type
;
4382 sh_cfi_frame_initial_instructions (void)
4384 cfi_add_CFA_def_cfa (15, 0);
4388 sh_regname_to_dw2regnum (char *regname
)
4390 unsigned int regnum
= -1;
4394 static struct { char *name
; int dw2regnum
; } regnames
[] =
4396 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 },
4397 { "macl", 21 }, { "fpul", 23 }
4400 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
4401 if (strcmp (regnames
[i
].name
, regname
) == 0)
4402 return regnames
[i
].dw2regnum
;
4404 if (regname
[0] == 'r')
4407 regnum
= strtoul (p
, &q
, 10);
4408 if (p
== q
|| *q
|| regnum
>= 16)
4411 else if (regname
[0] == 'f' && regname
[1] == 'r')
4414 regnum
= strtoul (p
, &q
, 10);
4415 if (p
== q
|| *q
|| regnum
>= 16)
4419 else if (regname
[0] == 'x' && regname
[1] == 'd')
4422 regnum
= strtoul (p
, &q
, 10);
4423 if (p
== q
|| *q
|| regnum
>= 8)
4429 #endif /* OBJ_ELF */